coldfire-0.2.2/0042755000175000017500000000000010057152040011722 5ustar davedavecoldfire-0.2.2/i.c0100644000175000017500000001312310015265004012310 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(i); #define MALLOC_STEP 16 struct _Instruction *Instruction = NULL; short InstructionCount=0; struct _Instruction **instruction_cache = NULL; void Instruction_Init(void) { TRACE("Initializing...\n"); /* Ensure sanity */ Instruction = NULL; InstructionCount=0; instruction_cache = malloc(0x10000 * 4); if(!instruction_cache) printf("Could not allocate instruction cache\n"); TRACE("Done.\n"); } /* This is for sorting */ static int Instruction_CompareFunction(const void *A, const void *B) { /* Biggest mask first, this sorts backwards */ /* printf("Comparing %p and %p. Mask=%x %x\n", A, B, IA->Mask, IB->Mask);*/ return ( ((struct _Instruction *)B)->Mask - ((struct _Instruction *)A)->Mask ); } void instruction_register(unsigned short code, unsigned short mask, void (*execute)(void), long (*disassemble)(char *, char *, char *)) { struct _Instruction *InstrPtr; /* Check if any reallocating is necessary */ TRACE("Registering Code=0x%04hx Mask=0x%04hx\n", code, mask); if((InstructionCount % MALLOC_STEP)==0) { TRACE("Reallocing to %d bytes\n",(InstructionCount + MALLOC_STEP) * sizeof(struct _Instruction)); Instruction = realloc(Instruction, (InstructionCount + MALLOC_STEP) * sizeof(struct _Instruction)); } /* Add this instruction */ InstrPtr = &Instruction[InstructionCount]; InstrPtr->Code = code; InstrPtr->Mask = mask; InstrPtr->FunctionPtr = (void (*)(void))execute; InstrPtr->DIFunctionPtr = (long (*)(char *Instruction, char *Arg1, char *Arg2))disassemble; InstructionCount++; qsort(Instruction, InstructionCount, sizeof(struct _Instruction), &Instruction_CompareFunction); TRACE("Done\n"); } void Instruction_DeInit(void) { if(instruction_cache) free(instruction_cache); if(Instruction) free(Instruction); } /* Returns a pointer to the instruction that matches Instr * (Finds by matching Code and Mask) */ static struct _Instruction *Instruction_LookupInstruction(unsigned short Instr) { int x; for(x=0;xcpu) { case CF_5206: printf(" (Motorola Coldfire 5206)\n"); printf("\tunimplemented instructions: CPUSHL PULSE WDDATA WDEBUG\n"); break; case CF_5206e: printf(" (Motorola Coldfire 5206e)\n"); printf("\tunimplemented instructions: CPUSHL PULSE WDDATA WDEBUG\n"); break; case CF_5307: printf(" (Motorola Coldfire 5307)\n"); printf("\tunimplemented instructions: CPUSHL PULSE WDDATA WDEBUG\n"); break; default: printf("\tUnknown processor type '%d'\n", bd->cpu); break; } /* Register intstructions */ x+=add_5206_register(); x+=adda_5206_register(); x+=addi_5206_register(); x+=addq_5206_register(); x+=addx_5206_register(); x+=and_5206_register(); x+=andi_5206_register(); x+=asx_5206_register(); x+=bcc_5206_register(); x+=btst_5206_register(); x+=clr_5206_register(); x+=cmp_5206_register(); x+=cmpa_5206_register(); x+=cmpi_5206_register(); x+=dc_5206_register(); x+=eor_5206_register(); x+=eori_5206_register(); x+=ext_5206_register(); x+=halt_5206_register(); x+=illegal_5206_register(); x+=jmp_5206_register(); x+=jsr_5206_register(); x+=lea_5206_register(); x+=link_5206_register(); x+=lsx_5206_register(); x+=move_5206_register(); x+=movec_5206_register(); x+=movem_5206_register(); x+=moveq_5206_register(); x+=movexr_5206_register(); x+=mulu_l_5206_register(); x+=mul_w_5206_register(); x+=neg_5206_register(); x+=negx_5206_register(); x+=nop_5206_register(); x+=not_5206_register(); x+=or_5206_register(); x+=ori_5206_register(); x+=pea_5206_register(); x+=rte_5206_register(); x+=rts_5206_register(); x+=scc_5206_register(); x+=stop_5206_register(); x+=sub_5206_register(); x+=suba_5206_register(); x+=subi_5206_register(); x+=subq_5206_register(); x+=subx_5206_register(); x+=swap_5206_register(); x+=trap_5206_register(); x+=trapf_5206_register(); x+=tst_5206_register(); x+=unlk_5206_register(); if(bd->cpu >= CF_5206e) x+= div_5206e_register(); printf("\t%d instructions registered\n", x); if(x==0) { /* This could get interesting */ ERR("No registered instructions, hmmm, something is wrong\n"); exit(0); } instruction_build_cache(); /* for(x=0;x Copyright (C) 19yy This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) 19yy name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker. , 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. coldfire-0.2.2/sim.c0100644000175000017500000000116010015265005012647 0ustar davedave/**********************************/ /* */ /* Copyright 2004, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include /*#define TRACER_OFF*/ #include "coldfire.h" TRACER_DEFAULT_CHANNEL(sim); struct _sim *sim = NULL; void sim_register(struct _sim *sim_data) { if(sim) { printf("Attempt to register a second sim module.\n"); printf("Probably an error in a board config file.\n"); exit(1); } sim = sim_data; } coldfire-0.2.2/run.c0100644000175000017500000001077710057151573012713 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #ifdef HAVE_LIBREADLINE #include #endif #include "coldfire.h" char Run_Exit = 0; TRACER_DEFAULT_CHANNEL(run); static int stop_now = 0; static void sigint(int sig) { #ifdef HAVE_LIBREADLINE char *input; #else char input[128]; #endif int argc; char *argv[8]; extern struct _board_data board_data; printf("execution suspended. \n"); printf("0. Exit emulator\n"); printf("1. External software interrupt lev7 (return to monitor)\n"); printf("2. Force external software interrupt (resets SP and lev7 ISR)\n"); printf("3. TraceRun is currently %s, turn it %s.\n", board_data.trace_run ? "ON" : "OFF", board_data.trace_run ? "OFF" : "ON" ); printf("others <= do nothing, continue execution\n"); #ifdef HAVE_LIBREADLINE input=(char *)readline("suspend> "); if(!input) exit(1); #else printf("suspend> "); fgets(input, 81, stdin); #endif argc = arg_split(&argv[0], input, 8); if(argc) { switch(argv[0][0]) { case '`': case '~': exit(1); break; case '3': board_data.trace_run = !board_data.trace_run; break; case '2': /* Search for flash segment */ /* set lev7 vector in vbr to point there */ /* set sp to something useful reset sp? */ /* fall through*/ case '1': stop_now = 1; break; case '0': Run_Exit = 1; break; } } signal(SIGINT, sigint); } void Run(void) { unsigned long Instr; struct _Instruction *InstructionPtr; #ifdef INSTRUCTION_PROFILE unsigned long long LowTime=0, HighTime=0; char Buffer[16]; #endif extern struct _board_data board_data; signal(SIGINT, sigint); //signal(SIGQUIT, sigint); while(!Run_Exit) { TRACE("New cycle, PC=0x%08lx, SP=0x%08lx\n", memory_core.pc, memory_core.a[7]); /* Check for any pending exceptions */ exception_check_and_handle(); /* As we're coming back from an interrupt, check for exit */ if(Run_Exit) break; /* Save the PC for the beginning of this instruction * This is useful for exceptions that reset the PC */ memory_core.pc_instruction_begin = memory_core.pc; /* Before we execute this instruction, catch a bad PC counter */ if(memory_core.pc % 2) { exception_do_exception(3); continue; } /* Get the instruction from memory */ if(!Memory_RetrWord(&Instr, memory_core.pc)) continue; /* Look it up */ InstructionPtr = Instruction_FindInstruction(Instr); if(InstructionPtr==NULL) { exception_do_exception(4); continue; } else { /* Run the instruction */ #ifdef INSTRUCTION_PROFILE LowTime=Profile_time_in_ms(); #endif (*InstructionPtr->FunctionPtr)(); #ifdef INSTRUCTION_PROFILE HighTime=Profile_time_in_ms(); #endif } /* FIXME: this causes the same instruction to be stopped on * if we do a 'trace 1' after hitting a breakpoint. * The correct behaviour is to NEVER trace the first * instruction after returning from an exception. */ if(SRBits->T) { #ifdef INSTRUCTION_PROFILE Profile_MakeTimeString(Buffer, LowTime, HighTime); fprintf(stderr, "ExecTime: %ss\n", Buffer); #endif exception_do_exception(9); } if(board_data.trace_run) { /* dump from 'rd' command */ char buffer[256]; void rd_dump_registers(unsigned long cpc, unsigned long csr); int Monitor_InstructionDI(long FromPC, char *buffer); /* printf("vbr: %08lx mbar: %08lx\n", memory_core.vbr, memory_core.mbar);*/ rd_dump_registers(memory_core.pc, memory_core.sr); Monitor_InstructionDI(memory_core.pc, buffer); printf("%s\n", buffer); } if(stop_now) { if(stop_now == 1) { /* Send autovector interrupt 7 , * (the black button on the Arnewsh board) */ exception_do_exception(31); } else { /* Force autovector 7 */ printf("Forcing Autovector Interrupt 7\n"); exception_push_stack_frame(31); Monitor_HandleException(31); exception_restore_from_stack_frame(); } stop_now = 0; /* fprintf(stderr, "Stopped at PC=0x%08lx, SP=0x%08lx\n", memory_core.pc, Areg[7]); * break; */ } /* Now update anything that could cause an interrupt, so we * can catch it in the next cycle */ /* Call this, which will call an update * for things like the UARTs and Timers */ memory_update(); } } coldfire-0.2.2/cycle.c0100644000175000017500000000362010015265005013161 0ustar davedave/**********************************/ /* */ /* Copyright 2003, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* August 2000: Matt Minnis * March 2003: David Grant -- Rewrote everything for speed */ #include #include "coldfire.h" void cycle(unsigned long number) { extern struct _board_data board_data; if(number < 1) return; /* ignore 0 and -1 times since they are invalid */ board_data.cycle_count += number; return; } /* Lookup table for getting the right offset in the timing tables * in each instruction */ static short cycle_EA_lookup[] = { 0, 0, 1, 2, 3, 4, 5, 6, 6, 4, 5, 7 }; int cycle_EA(short reg, short mode) { if(mode == 7) return cycle_EA_lookup[reg+7]; return cycle_EA_lookup[mode]; } #ifdef explanation_of_what_the_above_routine_is_doing int MoveCycle_EA (int Register, int Mode) (These two are the same) int Cycle_EA (int Register, int Mode) { switch (Mode) /* Return value 0-7 for destination addressing. */ { case 0: return sDRD; /* Dy */ case 1: return sDRD; /* Ay */ case 2: return sARI; /* (Ay) */ case 3: return sARIPO; /* (Ay)+ */ case 4: return sARIPR; /* -(Ay) */ case 5: return sARID; /* (d16,Ay) */ case 6: return sARIIB; /* (d8,An,Xi) */ case 7: switch (Register) { case 0: return sAS; /* word addressing */ case 1: return sAS; /* long addressing */ case 2: return sARID; /* (d16,PC) */ case 3: return sARIIB; /* (d8,PC,Xi) */ case 4: return sIM; /* (d8,PC,Xi) */ } break; } /* This can cause a segfault, this returns an offset, returning -1 is bad (DG) */ return -1; /* Shouldn't get here */ } #endif coldfire-0.2.2/README0100644000175000017500000000577510015265006012614 0ustar davedaveThis README file contains the following information: 1) History of Dave's Coldfire Emulator, now just "The Coldfire Emulator" since I'm not the only author anymore :) 2) Emulator requirements 3) How to use dBug 4) Where to get the latest version 1) History of The Coldfire Emulator (written by Austin, editted slightly by me.) ------------------------------------------------------------------------- The Coldfire Emulator is a Motorola Coldfire 5206 Emulator. It's original beginnings date back to the fourth term (2nd year) of the University of Waterloo's Computer Engineering program (summer of 1999). The Electrical and Computer Engineering (E&CE) 222 course - Digital Computers - taught Motorola Coldfire 5206 assembly as an introduction to machine assembly language. Since the Computer Engineering class of 2002 is twice the size of previous classes, the demand for Coldfire boards was much greater than their availability. (Also the fact that several classmates apparently didn't understand "NO food or drinks in the labs" and kept getting the labs deadbolted on us didn't help). Thus, David Grant began his emulator project to work on labs without requiring the actual hardware boards. Although the emulator progressed far enough to be used for the first three labs, interrupts were not yet implemented so the real boards were used for the final assignment. The next term featured the course E&CE 354 - Real-Time Operating Systems - where a project involved writing a real-time executive (RTX) for the Motorola Coldfire 5206 platform. (Insert same problems with availability and stupid classmates here). So, the emulator was dusted off and developed in parallel with the RTX. Special thanks to Austin, Kris, and Tennille (in order of alphabeticalness) for putting up with me sometimes developing the emulator over our project :) In March, 2000, Dave released his emulator to the general public under the GPL, in the hope that it will be useful to other people... In particular to the E&CE department, and potentially save many future generations of electrical and computer engineers from stuffy overcrowded Coldfire labs. :) The emulator currently features all but 5 assembly instructions, a full dBug (rip off of Motorola's dBUG) with extra functionality, both serial ports, the parallel port, interrupts (through telnet sessions), full exception handling, timers and timer interrupts, and full tracing capability. 2) Emulator Requirements ------------------------------------------------------------------------- Well, it used to need PThreads, but it doesn't anymore. It builds nicely on just about every Linux flavour I've come across. It build on Windows using the Cygwin compiler. 3) How To Use dBug ------------------------------------------------------------------------- Fire up the Coldfire and type 'help'. :) 4) Where To Get The Latest Version ------------------------------------------------------------------------- http://www.lightbox.org/coldfire/ Have fun with it... dave. -- dave@reach.net coldfire-0.2.2/configure0100755000175000017500000021216710015265010013631 0ustar davedave#! /bin/sh # Guess values for system-dependent variables and create Makefiles. # Generated automatically using autoconf version 2.13 # Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. # # This configure script is free software; the Free Software Foundation # gives unlimited permission to copy, distribute and modify it. # Defaults: ac_help= ac_default_prefix=/usr/local # Any additions from configure.in: ac_help="$ac_help --enable-instr-profile compile with instruction profiling (timing)" ac_help="$ac_help --enable-mem-stats gather memory stats while running" ac_help="$ac_help --enable-profile adds -pg to the compile/link options" # Initialize some variables set by options. # The variables have the same names as the options, with # dashes changed to underlines. build=NONE cache_file=./config.cache exec_prefix=NONE host=NONE no_create= nonopt=NONE no_recursion= prefix=NONE program_prefix=NONE program_suffix=NONE program_transform_name=s,x,x, silent= site= srcdir= target=NONE verbose= x_includes=NONE x_libraries=NONE bindir='${exec_prefix}/bin' sbindir='${exec_prefix}/sbin' libexecdir='${exec_prefix}/libexec' datadir='${prefix}/share' sysconfdir='${prefix}/etc' sharedstatedir='${prefix}/com' localstatedir='${prefix}/var' libdir='${exec_prefix}/lib' includedir='${prefix}/include' oldincludedir='/usr/include' infodir='${prefix}/info' mandir='${prefix}/man' # Initialize some other variables. subdirs= MFLAGS= MAKEFLAGS= SHELL=${CONFIG_SHELL-/bin/sh} # Maximum number of lines to put in a shell here document. ac_max_here_lines=12 ac_prev= for ac_option do # If the previous option needs an argument, assign it. if test -n "$ac_prev"; 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then enableval="$enable_instr_profile" if test "$enableval" = "yes"; then cat >> confdefs.h <<\EOF #define INSTRUCTION_TIMING 1 EOF EXTRA_OBJS="$EXTRA_OBJS profile.o" fi fi # Check whether --enable-mem-stats or --disable-mem-stats was given. if test "${enable_mem_stats+set}" = set; then enableval="$enable_mem_stats" if test "$enableval" = "yes"; then cat >> confdefs.h <<\EOF #define MEMORY_STATS 1 EOF EXTRA_OBJS="$EXTRA_OBJS stats.o" fi fi # Check whether --enable-profile or --disable-profile was given. if test "${enable_profile+set}" = set; then enableval="$enable_profile" if test "$enableval" = "yes"; then LDFLAGS="$LDFLAGS -pg"; CFLAGS="$CFLAGS -pg"; fi fi echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 echo "configure:905: checking for Cygwin environment" >&5 if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_cygwin=yes else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* ac_cv_cygwin=no fi rm -f conftest* rm -f conftest* fi echo "$ac_t""$ac_cv_cygwin" 1>&6 CYGWIN= test "$ac_cv_cygwin" = yes && CYGWIN=yes if test "$CYGWIN" = "yes"; then echo $ac_n "checking for main in -lgmon""... $ac_c" 1>&6 echo "configure:941: checking for main in -lgmon" >&5 ac_lib_var=`echo gmon'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_save_LIBS="$LIBS" LIBS="-lgmon $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=no" fi rm -f conftest* LIBS="$ac_save_LIBS" fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 ac_tr_lib=HAVE_LIB`echo gmon | sed -e 's/[^a-zA-Z0-9_]/_/g' \ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'` cat >> confdefs.h <&6 fi echo $ac_n "checking for main in -lwininet""... $ac_c" 1>&6 echo "configure:984: checking for main in -lwininet" >&5 ac_lib_var=`echo wininet'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_save_LIBS="$LIBS" LIBS="-lwininet $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=no" fi rm -f conftest* LIBS="$ac_save_LIBS" fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 ac_tr_lib=HAVE_LIB`echo wininet | sed -e 's/[^a-zA-Z0-9_]/_/g' \ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'` cat >> confdefs.h <&6 fi fi for lib in ncurses termcap ; do echo $ac_n "checking for tgoto in -l${lib}""... $ac_c" 1>&6 echo "configure:1030: checking for tgoto in -l${lib}" >&5 ac_lib_var=`echo ${lib}'_'tgoto | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_save_LIBS="$LIBS" LIBS="-l${lib} $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=no" fi rm -f conftest* LIBS="$ac_save_LIBS" fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 LIBS="-l${lib} $LIBS"; break else echo "$ac_t""no" 1>&6 fi done echo $ac_n "checking for readline in -lreadline""... $ac_c" 1>&6 echo "configure:1071: checking for readline in -lreadline" >&5 ac_lib_var=`echo readline'_'readline | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_save_LIBS="$LIBS" LIBS="-lreadline $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=no" fi rm -f conftest* LIBS="$ac_save_LIBS" fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 ac_tr_lib=HAVE_LIB`echo readline | sed -e 's/[^a-zA-Z0-9_]/_/g' \ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'` cat >> confdefs.h <&6 fi echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 echo "configure:1119: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= fi if test -z "$CPP"; then if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else # This must be in double quotes, not single quotes, because CPP may get # substituted into the Makefile and "${CC-cc}" will confuse make. CPP="${CC-cc} -E" # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext < Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" { (eval echo configure:1140: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : else echo "$ac_err" >&5 echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext < Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" { (eval echo configure:1157: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : else echo "$ac_err" >&5 echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext < Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" { (eval echo configure:1174: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : else echo "$ac_err" >&5 echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* CPP=/lib/cpp fi rm -f conftest* fi rm -f conftest* fi rm -f conftest* ac_cv_prog_CPP="$CPP" fi CPP="$ac_cv_prog_CPP" else ac_cv_prog_CPP="$CPP" fi echo "$ac_t""$CPP" 1>&6 echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 echo "configure:1199: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < #include #include #include EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" { (eval echo configure:1212: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* ac_cv_header_stdc=yes else echo "$ac_err" >&5 echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* ac_cv_header_stdc=no fi rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext < EOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | egrep "memchr" >/dev/null 2>&1; then : else rm -rf conftest* ac_cv_header_stdc=no fi rm -f conftest* fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext < EOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | egrep "free" >/dev/null 2>&1; then : else rm -rf conftest* ac_cv_header_stdc=no fi rm -f conftest* fi if test $ac_cv_header_stdc = yes; then # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext < #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') #define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) #define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) int main () { int i; for (i = 0; i < 256; i++) if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF if { (eval echo configure:1279: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -fr conftest* ac_cv_header_stdc=no fi rm -fr conftest* fi fi fi echo "$ac_t""$ac_cv_header_stdc" 1>&6 if test $ac_cv_header_stdc = yes; then cat >> confdefs.h <<\EOF #define STDC_HEADERS 1 EOF fi for ac_hdr in fcntl.h sys/ioctl.h sys/time.h unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 echo "configure:1306: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" { (eval echo configure:1316: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* eval "ac_cv_header_$ac_safe=yes" else echo "$ac_err" >&5 echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* eval "ac_cv_header_$ac_safe=no" fi rm -f conftest* fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` cat >> confdefs.h <&6 fi done echo $ac_n "checking for working const""... $ac_c" 1>&6 echo "configure:1344: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <j = 5; } { /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */ const int foo = 10; } ; return 0; } EOF if { (eval echo configure:1398: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* ac_cv_c_const=no fi rm -f conftest* fi echo "$ac_t""$ac_cv_c_const" 1>&6 if test $ac_cv_c_const = no; then cat >> confdefs.h <<\EOF #define const EOF fi echo $ac_n "checking whether time.h and sys/time.h may both be included""... $ac_c" 1>&6 echo "configure:1419: checking whether time.h and sys/time.h may both be included" >&5 if eval "test \"`echo '$''{'ac_cv_header_time'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < #include #include int main() { struct tm *tp; ; return 0; } EOF if { (eval echo configure:1433: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_header_time=yes else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* ac_cv_header_time=no fi rm -f conftest* fi echo "$ac_t""$ac_cv_header_time" 1>&6 if test $ac_cv_header_time = yes; then cat >> confdefs.h <<\EOF #define TIME_WITH_SYS_TIME 1 EOF fi echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6 echo "configure:1455: checking whether byte ordering is bigendian" >&5 if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_bigendian=unknown # See if sys/param.h defines the BYTE_ORDER macro. cat > conftest.$ac_ext < #include int main() { #if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN bogus endian macros #endif ; return 0; } EOF if { (eval echo configure:1473: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* # It does; now see whether it defined to BIG_ENDIAN or not. cat > conftest.$ac_ext < #include int main() { #if BYTE_ORDER != BIG_ENDIAN not big endian #endif ; return 0; } EOF if { (eval echo configure:1488: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_bigendian=yes else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -rf conftest* ac_cv_c_bigendian=no fi rm -f conftest* else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 fi rm -f conftest* if test $ac_cv_c_bigendian = unknown; then if test "$cross_compiling" = yes; then { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; } else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_bigendian=no else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 rm -fr conftest* ac_cv_c_bigendian=yes fi rm -fr conftest* fi fi fi echo "$ac_t""$ac_cv_c_bigendian" 1>&6 if test $ac_cv_c_bigendian = yes; then cat >> confdefs.h <<\EOF #define WORDS_BIGENDIAN 1 EOF fi if test $ac_cv_prog_gcc = yes; then echo $ac_n "checking whether ${CC-cc} needs -traditional""... $ac_c" 1>&6 echo "configure:1547: checking whether ${CC-cc} needs -traditional" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc_traditional'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_pattern="Autoconf.*'x'" cat > conftest.$ac_ext < Autoconf TIOCGETP EOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | egrep "$ac_pattern" >/dev/null 2>&1; then rm -rf conftest* ac_cv_prog_gcc_traditional=yes else rm -rf conftest* ac_cv_prog_gcc_traditional=no fi rm -f conftest* if test $ac_cv_prog_gcc_traditional = no; then cat > conftest.$ac_ext < Autoconf TCGETA EOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | egrep "$ac_pattern" >/dev/null 2>&1; then rm -rf conftest* ac_cv_prog_gcc_traditional=yes fi rm -f conftest* fi fi echo "$ac_t""$ac_cv_prog_gcc_traditional" 1>&6 if test $ac_cv_prog_gcc_traditional = yes; then CC="$CC -traditional" fi fi for ac_func in gethostbyname do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 echo "configure:1595: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 builtin and then its argument prototype would still apply. */ char $ac_func(); int main() { /* The GNU C library defines this for functions which it implements to always fail with ENOSYS. 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AFTER getting AC_PROG_CC to set CFLAGS et al. for us AC_ARG_ENABLE(instr-profile, [ --enable-instr-profile compile with instruction profiling (timing)], [if test "$enableval" = "yes"; then AC_DEFINE(INSTRUCTION_TIMING, 1, [Whether each instruction should be timed]) EXTRA_OBJS="$EXTRA_OBJS profile.o" fi]) AC_ARG_ENABLE(mem-stats, [ --enable-mem-stats gather memory stats while running], [if test "$enableval" = "yes"; then AC_DEFINE(MEMORY_STATS, 1, [Whether stats about the number and type of address] [ accesses should be generated]) EXTRA_OBJS="$EXTRA_OBJS stats.o" fi]) AC_ARG_ENABLE(profile, [ --enable-profile adds -pg to the compile/link options], [if test "$enableval" = "yes"; then LDFLAGS="$LDFLAGS -pg"; CFLAGS="$CFLAGS -pg"; fi]) dnl I thought about this, but if it was optional, then we couldn't fire the dnl timer based on cpu cycles which have passed, unless we want more (ugh) dnl ifdefs dnl AC_ARG_ENABLE(cycle-counting, dnl [ --enable-cycle-counting Keep record of CPU cycles for each instruction], dnl [if test "$enableval" = "yes"; then dnl AC_DEFINE(USE_CYCLE_COUNTING, 1, [Keep record of CPU cycles used by each instruction]) dnl EXTRA_OBJS="$EXTRA_OBJS cycle.o" dnl fi]) AC_SUBST(EXTRA_OBJS) dnl Check for cygwin windows environment AC_CYGWIN dnl Checks for libraries. dnl In windows, we need to check for the following, in unix, we don't if test "$CYGWIN" = "yes"; then dnl Replace `main' with a function in -lgmon: AC_CHECK_LIB(gmon, main) dnl Replace `main' with a function in -lwininet: AC_CHECK_LIB(wininet, main) fi dnl should we check for curses terminfo termlib, too? for lib in ncurses termcap ; do AC_CHECK_LIB(${lib}, tgoto, [LIBS="-l${lib} $LIBS"; break]) done AC_CHECK_LIB(readline, readline,) dnl Checks for header files. AC_HEADER_STDC AC_CHECK_HEADERS(fcntl.h sys/ioctl.h sys/time.h unistd.h) dnl Checks for typedefs, structures, and compiler characteristics. AC_C_CONST AC_HEADER_TIME dnl Chech endianness AC_C_BIGENDIAN dnl Checks for library functions. AC_PROG_GCC_TRADITIONAL dnl Check for -lnsl for Solaris AC_CHECK_FUNCS(gethostbyname,, AC_CHECK_LIB(nsl, gethostbyname,, AC_CHECK_LIB(socket, gethostbyname,, , -lnsl), -lsocket)) dnl Check for -lsocket for Solaris AC_CHECK_FUNCS(connect,,AC_CHECK_LIB(socket,connect)) AC_CHECK_FUNCS(select socket,,,$LIBS) AC_CHECK_FUNCS(_snprintf snprintf) AC_MSG_CHECKING(for unaligned long accesses) AC_TRY_RUN([ void main(void) { unsigned char data[sizeof(long)*2]; long *ptr; #if !defined(__i386__) /* Assume unaligned accesses on i386 */ exit(1); #endif data[0] = 0xa5; ptr = (long *)(&data[1]); *ptr = 0x1a253a45; if(data[0] == 0xa5 && *ptr == 0x1a253a45) exit(0); exit(1); }], AC_MSG_RESULT(permitted) AC_DEFINE(UNALIGNED_ACCESS,1, [Define if the system can do a unaligned longword access]), AC_MSG_RESULT(not permitted), AC_MSG_RESULT(unknown, assuming not permitted) ) MAKEFILE_RULES=Makefile.rules AC_SUBST_FILE(MAKEFILE_RULES) AC_OUTPUT( [Makefile.rules Makefile i_5206/Makefile i_5206e/Makefile i_5307/Makefile monitor/Makefile peripherals/Makefile tracer/Makefile ]) coldfire-0.2.2/config.guess0100644000175000017500000007477410015265011014252 0ustar davedave#! /bin/sh # Attempt to guess a canonical system name. # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Written by Per Bothner . # The master version of this file is at the FSF in /home/gd/gnu/lib. # Please send patches to . # # This script attempts to guess a canonical system name similar to # config.sub. If it succeeds, it prints the system name on stdout, and # exits with 0. Otherwise, it exits with 1. # # The plan is that this can be called by configure scripts if you # don't specify an explicit system type (host/target name). # # Only a few systems have been added to this list; please add others # (but try to keep the structure clean). # # Use $HOST_CC if defined. $CC may point to a cross-compiler if test x"$CC_FOR_BUILD" = x; then if test x"$HOST_CC" != x; then CC_FOR_BUILD="$HOST_CC" else if test x"$CC" != x; then CC_FOR_BUILD="$CC" else CC_FOR_BUILD=cc fi fi fi # This is needed to find uname on a Pyramid OSx when run in the BSD universe. # (ghazi@noc.rutgers.edu 8/24/94.) if (test -f /.attbin/uname) >/dev/null 2>&1 ; then PATH=$PATH:/.attbin ; export PATH fi UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown dummy=dummy-$$ trap 'rm -f $dummy.c $dummy.o $dummy; exit 1' 1 2 15 # Note: order is significant - the case branches are not exclusive. case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in alpha:OSF1:*:*) if test $UNAME_RELEASE = "V4.0"; then UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` fi # A Vn.n version is a released version. # A Tn.n version is a released field test version. # A Xn.n version is an unreleased experimental baselevel. # 1.2 uses "1.2" for uname -r. cat <$dummy.s .globl main .ent main main: .frame \$30,0,\$26,0 .prologue 0 .long 0x47e03d80 # implver $0 lda \$2,259 .long 0x47e20c21 # amask $2,$1 srl \$1,8,\$2 sll \$2,2,\$2 sll \$0,3,\$0 addl \$1,\$0,\$0 addl \$2,\$0,\$0 ret \$31,(\$26),1 .end main EOF $CC_FOR_BUILD $dummy.s -o $dummy 2>/dev/null if test "$?" = 0 ; then ./$dummy case "$?" in 7) UNAME_MACHINE="alpha" ;; 15) UNAME_MACHINE="alphaev5" ;; 14) UNAME_MACHINE="alphaev56" ;; 10) UNAME_MACHINE="alphapca56" ;; 16) UNAME_MACHINE="alphaev6" ;; esac fi rm -f $dummy.s $dummy echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[VTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` exit 0 ;; Alpha\ *:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # Should we change UNAME_MACHINE based on the output of uname instead # of the specific Alpha model? echo alpha-pc-interix exit 0 ;; 21064:Windows_NT:50:3) echo alpha-dec-winnt3.5 exit 0 ;; Amiga*:UNIX_System_V:4.0:*) echo m68k-cbm-sysv4 exit 0;; amiga:NetBSD:*:*) echo m68k-cbm-netbsd${UNAME_RELEASE} exit 0 ;; amiga:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; *:[Aa]miga[Oo][Ss]:*:*) echo ${UNAME_MACHINE}-unknown-amigaos exit 0 ;; arc64:OpenBSD:*:*) echo mips64el-unknown-openbsd${UNAME_RELEASE} exit 0 ;; arc:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; hkmips:OpenBSD:*:*) echo mips-unknown-openbsd${UNAME_RELEASE} exit 0 ;; pmax:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; sgi:OpenBSD:*:*) echo mips-unknown-openbsd${UNAME_RELEASE} exit 0 ;; wgrisc:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; *:OS/390:*:*) echo i370-ibm-openedition exit 0 ;; arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) echo arm-acorn-riscix${UNAME_RELEASE} exit 0;; arm32:NetBSD:*:*) echo arm-unknown-netbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` exit 0 ;; SR2?01:HI-UX/MPP:*:*) echo hppa1.1-hitachi-hiuxmpp exit 0;; Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. if test "`(/bin/universe) 2>/dev/null`" = att ; then echo pyramid-pyramid-sysv3 else echo pyramid-pyramid-bsd fi exit 0 ;; NILE*:*:*:dcosx) echo pyramid-pyramid-svr4 exit 0 ;; sun4H:SunOS:5.*:*) echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; i86pc:SunOS:5.*:*) echo i386-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; sun4*:SunOS:6*:*) # According to config.sub, this is the proper way to canonicalize # SunOS6. Hard to guess exactly what SunOS6 will be like, but # it's likely to be more like Solaris than SunOS4. echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; sun4*:SunOS:*:*) case "`/usr/bin/arch -k`" in Series*|S4*) UNAME_RELEASE=`uname -v` ;; esac # Japanese Language versions have a version number like `4.1.3-JL'. echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` exit 0 ;; sun3*:SunOS:*:*) echo m68k-sun-sunos${UNAME_RELEASE} exit 0 ;; sun*:*:4.2BSD:*) UNAME_RELEASE=`(head -1 /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 case "`/bin/arch`" in sun3) echo m68k-sun-sunos${UNAME_RELEASE} ;; sun4) echo sparc-sun-sunos${UNAME_RELEASE} ;; esac exit 0 ;; aushp:SunOS:*:*) echo sparc-auspex-sunos${UNAME_RELEASE} exit 0 ;; atari*:NetBSD:*:*) echo m68k-atari-netbsd${UNAME_RELEASE} exit 0 ;; atari*:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; # The situation for MiNT is a little confusing. The machine name # can be virtually everything (everything which is not # "atarist" or "atariste" at least should have a processor # > m68000). The system name ranges from "MiNT" over "FreeMiNT" # to the lowercase version "mint" (or "freemint"). Finally # the system name "TOS" denotes a system which is actually not # MiNT. But MiNT is downward compatible to TOS, so this should # be no problem. atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit 0 ;; atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit 0 ;; *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit 0 ;; milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) echo m68k-milan-mint${UNAME_RELEASE} exit 0 ;; hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) echo m68k-hades-mint${UNAME_RELEASE} exit 0 ;; *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) echo m68k-unknown-mint${UNAME_RELEASE} exit 0 ;; sun3*:NetBSD:*:*) echo m68k-sun-netbsd${UNAME_RELEASE} exit 0 ;; sun3*:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mac68k:NetBSD:*:*) echo m68k-apple-netbsd${UNAME_RELEASE} exit 0 ;; mac68k:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mvme68k:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mvme88k:OpenBSD:*:*) echo m88k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; powerpc:machten:*:*) echo powerpc-apple-machten${UNAME_RELEASE} exit 0 ;; macppc:NetBSD:*:*) echo powerpc-apple-netbsd${UNAME_RELEASE} exit 0 ;; RISC*:Mach:*:*) echo mips-dec-mach_bsd4.3 exit 0 ;; RISC*:ULTRIX:*:*) echo mips-dec-ultrix${UNAME_RELEASE} exit 0 ;; VAX*:ULTRIX*:*:*) echo vax-dec-ultrix${UNAME_RELEASE} exit 0 ;; 2020:CLIX:*:* | 2430:CLIX:*:*) echo clipper-intergraph-clix${UNAME_RELEASE} exit 0 ;; mips:*:*:UMIPS | mips:*:*:RISCos) sed 's/^ //' << EOF >$dummy.c #ifdef __cplusplus int main (int argc, char *argv[]) { #else int main (argc, argv) int argc; char *argv[]; { #endif #if defined (host_mips) && defined (MIPSEB) #if defined (SYSTYPE_SYSV) printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_SVR4) printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); #endif #endif exit (-1); } EOF $CC_FOR_BUILD $dummy.c -o $dummy \ && ./$dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \ && rm $dummy.c $dummy && exit 0 rm -f $dummy.c $dummy echo mips-mips-riscos${UNAME_RELEASE} exit 0 ;; Night_Hawk:Power_UNIX:*:*) echo powerpc-harris-powerunix exit 0 ;; m88k:CX/UX:7*:*) echo m88k-harris-cxux7 exit 0 ;; m88k:*:4*:R4*) echo m88k-motorola-sysv4 exit 0 ;; m88k:*:3*:R3*) echo m88k-motorola-sysv3 exit 0 ;; AViiON:dgux:*:*) # DG/UX returns AViiON for all architectures UNAME_PROCESSOR=`/usr/bin/uname -p` if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110] then if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ [ ${TARGET_BINARY_INTERFACE}x = x ] then echo m88k-dg-dgux${UNAME_RELEASE} else echo m88k-dg-dguxbcs${UNAME_RELEASE} fi else echo i586-dg-dgux${UNAME_RELEASE} fi exit 0 ;; M88*:DolphinOS:*:*) # DolphinOS (SVR3) echo m88k-dolphin-sysv3 exit 0 ;; M88*:*:R3*:*) # Delta 88k system running SVR3 echo m88k-motorola-sysv3 exit 0 ;; XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) echo m88k-tektronix-sysv3 exit 0 ;; Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) echo m68k-tektronix-bsd exit 0 ;; *:IRIX*:*:*) echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` exit 0 ;; ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id exit 0 ;; # Note that: echo "'`uname -s`'" gives 'AIX ' i?86:AIX:*:*) echo i386-ibm-aix exit 0 ;; *:AIX:2:3) if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then sed 's/^ //' << EOF >$dummy.c #include main() { if (!__power_pc()) exit(1); puts("powerpc-ibm-aix3.2.5"); exit(0); } EOF $CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm $dummy.c $dummy && exit 0 rm -f $dummy.c $dummy echo rs6000-ibm-aix3.2.5 elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then echo rs6000-ibm-aix3.2.4 else echo rs6000-ibm-aix3.2 fi exit 0 ;; *:AIX:*:4) IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | head -1 | awk '{ print $1 }'` if /usr/sbin/lsattr -EHl ${IBM_CPU_ID} | grep POWER >/dev/null 2>&1; then IBM_ARCH=rs6000 else IBM_ARCH=powerpc fi if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=4.${UNAME_RELEASE} fi echo ${IBM_ARCH}-ibm-aix${IBM_REV} exit 0 ;; *:AIX:*:*) echo rs6000-ibm-aix exit 0 ;; ibmrt:4.4BSD:*|romp-ibm:BSD:*) echo romp-ibm-bsd4.4 exit 0 ;; ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC NetBSD and echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to exit 0 ;; # report: romp-ibm BSD 4.3 *:BOSX:*:*) echo rs6000-bull-bosx exit 0 ;; DPX/2?00:B.O.S.:*:*) echo m68k-bull-sysv3 exit 0 ;; 9000/[34]??:4.3bsd:1.*:*) echo m68k-hp-bsd exit 0 ;; hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) echo m68k-hp-bsd4.4 exit 0 ;; 9000/[34678]??:HP-UX:*:*) case "${UNAME_MACHINE}" in 9000/31? ) HP_ARCH=m68000 ;; 9000/[34]?? ) HP_ARCH=m68k ;; 9000/[678][0-9][0-9]) sed 's/^ //' << EOF >$dummy.c #include #include int main () { #if defined(_SC_KERNEL_BITS) long bits = sysconf(_SC_KERNEL_BITS); #endif long cpu = sysconf (_SC_CPU_VERSION); switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0"); break; case CPU_PA_RISC1_1: puts ("hppa1.1"); break; case CPU_PA_RISC2_0: #if defined(_SC_KERNEL_BITS) switch (bits) { case 64: puts ("hppa2.0w"); break; case 32: puts ("hppa2.0n"); break; default: puts ("hppa2.0"); break; } break; #else /* !defined(_SC_KERNEL_BITS) */ puts ("hppa2.0"); break; #endif default: puts ("hppa1.0"); break; } exit (0); } EOF (CCOPTS= $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null ) && HP_ARCH=`./$dummy` rm -f $dummy.c $dummy esac HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` echo ${HP_ARCH}-hp-hpux${HPUX_REV} exit 0 ;; 3050*:HI-UX:*:*) sed 's/^ //' << EOF >$dummy.c #include int main () { long cpu = sysconf (_SC_CPU_VERSION); /* The order matters, because CPU_IS_HP_MC68K erroneously returns true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct results, however. */ if (CPU_IS_PA_RISC (cpu)) { switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; default: puts ("hppa-hitachi-hiuxwe2"); break; } } else if (CPU_IS_HP_MC68K (cpu)) puts ("m68k-hitachi-hiuxwe2"); else puts ("unknown-hitachi-hiuxwe2"); exit (0); } EOF $CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm $dummy.c $dummy && exit 0 rm -f $dummy.c $dummy echo unknown-hitachi-hiuxwe2 exit 0 ;; 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) echo hppa1.1-hp-bsd exit 0 ;; 9000/8??:4.3bsd:*:*) echo hppa1.0-hp-bsd exit 0 ;; *9??*:MPE/iX:*:*) echo hppa1.0-hp-mpeix exit 0 ;; hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) echo hppa1.1-hp-osf exit 0 ;; hp8??:OSF1:*:*) echo hppa1.0-hp-osf exit 0 ;; i?86:OSF1:*:*) if [ -x /usr/sbin/sysversion ] ; then echo ${UNAME_MACHINE}-unknown-osf1mk else echo ${UNAME_MACHINE}-unknown-osf1 fi exit 0 ;; parisc*:Lites*:*:*) echo hppa1.1-hp-lites exit 0 ;; hppa*:OpenBSD:*:*) echo hppa-unknown-openbsd exit 0 ;; C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) echo c1-convex-bsd exit 0 ;; C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit 0 ;; C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) echo c34-convex-bsd exit 0 ;; C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) echo c38-convex-bsd exit 0 ;; C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) echo c4-convex-bsd exit 0 ;; CRAY*X-MP:*:*:*) echo xmp-cray-unicos exit 0 ;; CRAY*Y-MP:*:*:*) echo ymp-cray-unicos${UNAME_RELEASE} exit 0 ;; CRAY*[A-Z]90:*:*:*) echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ exit 0 ;; CRAY*TS:*:*:*) echo t90-cray-unicos${UNAME_RELEASE} exit 0 ;; CRAY*T3E:*:*:*) echo alpha-cray-unicosmk${UNAME_RELEASE} exit 0 ;; CRAY-2:*:*:*) echo cray2-cray-unicos exit 0 ;; F300:UNIX_System_V:*:*) FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "f300-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit 0 ;; F301:UNIX_System_V:*:*) echo f301-fujitsu-uxpv`echo $UNAME_RELEASE | sed 's/ .*//'` exit 0 ;; hp3[0-9][05]:NetBSD:*:*) echo m68k-hp-netbsd${UNAME_RELEASE} exit 0 ;; hp300:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; i?86:BSD/386:*:* | i?86:BSD/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit 0 ;; sparc*:BSD/OS:*:*) echo sparc-unknown-bsdi${UNAME_RELEASE} exit 0 ;; *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit 0 ;; *:FreeBSD:*:*) if test -x /usr/bin/objformat; then if test "elf" = "`/usr/bin/objformat`"; then echo ${UNAME_MACHINE}-unknown-freebsdelf`echo ${UNAME_RELEASE}|sed -e 's/[-_].*//'` exit 0 fi fi echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` exit 0 ;; *:NetBSD:*:*) echo ${UNAME_MACHINE}-unknown-netbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*//'` exit 0 ;; *:OpenBSD:*:*) echo ${UNAME_MACHINE}-unknown-openbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` exit 0 ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin exit 0 ;; i*:MINGW*:*) echo ${UNAME_MACHINE}-pc-mingw32 exit 0 ;; i*:Windows_NT*:* | Pentium*:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we # UNAME_MACHINE based on the output of uname instead of i386? echo i386-pc-interix exit 0 ;; i*:UWIN*:*) echo ${UNAME_MACHINE}-pc-uwin exit 0 ;; p*:CYGWIN*:*) echo powerpcle-unknown-cygwin exit 0 ;; prep*:SunOS:5.*:*) echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; *:GNU:*:*) echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` exit 0 ;; *:Linux:*:*) # The BFD linker knows what the default object file format is, so # first see if it will tell us. cd to the root directory to prevent # problems with other programs or directories called `ld' in the path. ld_help_string=`cd /; ld --help 2>&1` ld_supported_emulations=`echo $ld_help_string \ | sed -ne '/supported emulations:/!d s/[ ][ ]*/ /g s/.*supported emulations: *// s/ .*// p'` case "$ld_supported_emulations" in *ia64) echo "${UNAME_MACHINE}-unknown-linux" exit 0 ;; i?86linux) echo "${UNAME_MACHINE}-pc-linux-gnuaout" exit 0 ;; i?86coff) echo "${UNAME_MACHINE}-pc-linux-gnucoff" exit 0 ;; sparclinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" exit 0 ;; armlinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" exit 0 ;; elf32arm*) echo "${UNAME_MACHINE}-unknown-linux-gnu" exit 0 ;; armelf_linux*) echo "${UNAME_MACHINE}-unknown-linux-gnu" exit 0 ;; m68klinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" exit 0 ;; elf32ppc) # Determine Lib Version cat >$dummy.c < #if defined(__GLIBC__) extern char __libc_version[]; extern char __libc_release[]; #endif main(argc, argv) int argc; char *argv[]; { #if defined(__GLIBC__) printf("%s %s\n", __libc_version, __libc_release); #else printf("unkown\n"); #endif return 0; } EOF LIBC="" $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null if test "$?" = 0 ; then ./$dummy | grep 1\.99 > /dev/null if test "$?" = 0 ; then LIBC="libc1" fi fi rm -f $dummy.c $dummy echo powerpc-unknown-linux-gnu${LIBC} exit 0 ;; esac if test "${UNAME_MACHINE}" = "alpha" ; then sed 's/^ //' <$dummy.s .globl main .ent main main: .frame \$30,0,\$26,0 .prologue 0 .long 0x47e03d80 # implver $0 lda \$2,259 .long 0x47e20c21 # amask $2,$1 srl \$1,8,\$2 sll \$2,2,\$2 sll \$0,3,\$0 addl \$1,\$0,\$0 addl \$2,\$0,\$0 ret \$31,(\$26),1 .end main EOF LIBC="" $CC_FOR_BUILD $dummy.s -o $dummy 2>/dev/null if test "$?" = 0 ; then ./$dummy case "$?" in 7) UNAME_MACHINE="alpha" ;; 15) UNAME_MACHINE="alphaev5" ;; 14) UNAME_MACHINE="alphaev56" ;; 10) UNAME_MACHINE="alphapca56" ;; 16) UNAME_MACHINE="alphaev6" ;; esac objdump --private-headers $dummy | \ grep ld.so.1 > /dev/null if test "$?" = 0 ; then LIBC="libc1" fi fi rm -f $dummy.s $dummy echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} ; exit 0 elif test "${UNAME_MACHINE}" = "mips" ; then cat >$dummy.c </dev/null && ./$dummy "${UNAME_MACHINE}" && rm $dummy.c $dummy && exit 0 rm -f $dummy.c $dummy else # Either a pre-BFD a.out linker (linux-gnuoldld) # or one that does not give us useful --help. # GCC wants to distinguish between linux-gnuoldld and linux-gnuaout. # If ld does not provide *any* "supported emulations:" # that means it is gnuoldld. echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations:" test $? != 0 && echo "${UNAME_MACHINE}-pc-linux-gnuoldld" && exit 0 case "${UNAME_MACHINE}" in i?86) VENDOR=pc; ;; *) VENDOR=unknown; ;; esac # Determine whether the default compiler is a.out or elf cat >$dummy.c < #ifdef __cplusplus int main (int argc, char *argv[]) { #else int main (argc, argv) int argc; char *argv[]; { #endif #ifdef __ELF__ # ifdef __GLIBC__ # if __GLIBC__ >= 2 printf ("%s-${VENDOR}-linux-gnu\n", argv[1]); # else printf ("%s-${VENDOR}-linux-gnulibc1\n", argv[1]); # endif # else printf ("%s-${VENDOR}-linux-gnulibc1\n", argv[1]); # endif #else printf ("%s-${VENDOR}-linux-gnuaout\n", argv[1]); #endif return 0; } EOF $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy "${UNAME_MACHINE}" && rm $dummy.c $dummy && exit 0 rm -f $dummy.c $dummy fi ;; # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. earlier versions # are messed up and put the nodename in both sysname and nodename. i?86:DYNIX/ptx:4*:*) echo i386-sequent-sysv4 exit 0 ;; i?86:UNIX_SV:4.2MP:2.*) # Unixware is an offshoot of SVR4, but it has its own version # number series starting with 2... # I am not positive that other SVR4 systems won't match this, # I just have to hope. -- rms. # Use sysv4.2uw... so that sysv4* matches it. echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} exit 0 ;; i?86:*:4.*:* | i?86:SYSTEM_V:4.*:*) UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} else echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} fi exit 0 ;; i?86:*:5:7*) # Fixed at (any) Pentium or better UNAME_MACHINE=i586 if [ ${UNAME_SYSTEM} = "UnixWare" ] ; then echo ${UNAME_MACHINE}-sco-sysv${UNAME_RELEASE}uw${UNAME_VERSION} else echo ${UNAME_MACHINE}-pc-sysv${UNAME_RELEASE} fi exit 0 ;; i?86:*:3.2:*) if test -f /usr/options/cb.name; then UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then UNAME_REL=`(/bin/uname -X|egrep Release|sed -e 's/.*= //')` (/bin/uname -X|egrep i80486 >/dev/null) && UNAME_MACHINE=i486 (/bin/uname -X|egrep '^Machine.*Pentium' >/dev/null) \ && UNAME_MACHINE=i586 (/bin/uname -X|egrep '^Machine.*Pent ?II' >/dev/null) \ && UNAME_MACHINE=i686 (/bin/uname -X|egrep '^Machine.*Pentium Pro' >/dev/null) \ && UNAME_MACHINE=i686 echo ${UNAME_MACHINE}-pc-sco$UNAME_REL else echo ${UNAME_MACHINE}-pc-sysv32 fi exit 0 ;; pc:*:*:*) # uname -m prints for DJGPP always 'pc', but it prints nothing about # the processor, so we play safe by assuming i386. echo i386-pc-msdosdjgpp exit 0 ;; Intel:Mach:3*:*) echo i386-pc-mach3 exit 0 ;; paragon:*:*:*) echo i860-intel-osf1 exit 0 ;; i860:*:4.*:*) # i860-SVR4 if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 else # Add other i860-SVR4 vendors below as they are discovered. echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 fi exit 0 ;; mini*:CTIX:SYS*5:*) # "miniframe" echo m68010-convergent-sysv exit 0 ;; M68*:*:R3V[567]*:*) test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;; 3[34]??:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 4850:*:4.0:3.0) OS_REL='' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && echo i486-ncr-sysv4.3${OS_REL} && exit 0 /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && echo i586-ncr-sysv4.3${OS_REL} && exit 0 ;; 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && echo i486-ncr-sysv4 && exit 0 ;; m68*:LynxOS:2.*:*) echo m68k-unknown-lynxos${UNAME_RELEASE} exit 0 ;; mc68030:UNIX_System_V:4.*:*) echo m68k-atari-sysv4 exit 0 ;; i?86:LynxOS:2.*:* | i?86:LynxOS:3.[01]*:*) echo i386-unknown-lynxos${UNAME_RELEASE} exit 0 ;; TSUNAMI:LynxOS:2.*:*) echo sparc-unknown-lynxos${UNAME_RELEASE} exit 0 ;; rs6000:LynxOS:2.*:* | PowerPC:LynxOS:2.*:*) echo rs6000-unknown-lynxos${UNAME_RELEASE} exit 0 ;; SM[BE]S:UNIX_SV:*:*) echo mips-dde-sysv${UNAME_RELEASE} exit 0 ;; RM*:ReliantUNIX-*:*:*) echo mips-sni-sysv4 exit 0 ;; RM*:SINIX-*:*:*) echo mips-sni-sysv4 exit 0 ;; *:SINIX-*:*:*) if uname -p 2>/dev/null >/dev/null ; then UNAME_MACHINE=`(uname -p) 2>/dev/null` echo ${UNAME_MACHINE}-sni-sysv4 else echo ns32k-sni-sysv fi exit 0 ;; PENTIUM:CPunix:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort # says echo i586-unisys-sysv4 exit 0 ;; *:UNIX_System_V:4*:FTX*) # From Gerald Hewes . # How about differentiating between stratus architectures? -djm echo hppa1.1-stratus-sysv4 exit 0 ;; *:*:*:FTX*) # From seanf@swdc.stratus.com. echo i860-stratus-sysv4 exit 0 ;; mc68*:A/UX:*:*) echo m68k-apple-aux${UNAME_RELEASE} exit 0 ;; news*:NEWS-OS:*:6*) echo mips-sony-newsos6 exit 0 ;; R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) if [ -d /usr/nec ]; then echo mips-nec-sysv${UNAME_RELEASE} else echo mips-unknown-sysv${UNAME_RELEASE} fi exit 0 ;; BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. echo powerpc-be-beos exit 0 ;; BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. echo powerpc-apple-beos exit 0 ;; BePC:BeOS:*:*) # BeOS running on Intel PC compatible. echo i586-pc-beos exit 0 ;; SX-4:SUPER-UX:*:*) echo sx4-nec-superux${UNAME_RELEASE} exit 0 ;; SX-5:SUPER-UX:*:*) echo sx5-nec-superux${UNAME_RELEASE} exit 0 ;; Power*:Rhapsody:*:*) echo powerpc-apple-rhapsody${UNAME_RELEASE} exit 0 ;; *:Rhapsody:*:*) echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} exit 0 ;; *:QNX:*:4*) echo i386-qnx-qnx${UNAME_VERSION} exit 0 ;; esac #echo '(No uname command or uname output not recognized.)' 1>&2 #echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 cat >$dummy.c < # include #endif main () { #if defined (sony) #if defined (MIPSEB) /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, I don't know.... */ printf ("mips-sony-bsd\n"); exit (0); #else #include printf ("m68k-sony-newsos%s\n", #ifdef NEWSOS4 "4" #else "" #endif ); exit (0); #endif #endif #if defined (__arm) && defined (__acorn) && defined (__unix) printf ("arm-acorn-riscix"); exit (0); #endif #if defined (hp300) && !defined (hpux) printf ("m68k-hp-bsd\n"); exit (0); #endif #if defined (NeXT) #if !defined (__ARCHITECTURE__) #define __ARCHITECTURE__ "m68k" #endif int version; version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; if (version < 4) printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); else printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); exit (0); #endif #if defined (MULTIMAX) || defined (n16) #if defined (UMAXV) printf ("ns32k-encore-sysv\n"); exit (0); #else #if defined (CMU) printf ("ns32k-encore-mach\n"); exit (0); #else printf ("ns32k-encore-bsd\n"); exit (0); #endif #endif #endif #if defined (__386BSD__) printf ("i386-pc-bsd\n"); exit (0); #endif #if defined (sequent) #if defined (i386) printf ("i386-sequent-dynix\n"); exit (0); #endif #if defined (ns32000) printf ("ns32k-sequent-dynix\n"); exit (0); #endif #endif #if defined (_SEQUENT_) struct utsname un; uname(&un); if (strncmp(un.version, "V2", 2) == 0) { printf ("i386-sequent-ptx2\n"); exit (0); } if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ printf ("i386-sequent-ptx1\n"); exit (0); } printf ("i386-sequent-ptx\n"); exit (0); #endif #if defined (vax) #if !defined (ultrix) printf ("vax-dec-bsd\n"); exit (0); #else printf ("vax-dec-ultrix\n"); exit (0); #endif #endif #if defined (alliant) && defined (i860) printf ("i860-alliant-bsd\n"); exit (0); #endif exit (1); } EOF $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy && rm $dummy.c $dummy && exit 0 rm -f $dummy.c $dummy # Apollos put the system type in the environment. test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit 0; } # Convex versions that predate uname can use getsysinfo(1) if [ -x /usr/convex/getsysinfo ] then case `getsysinfo -f cpu_type` in c1*) echo c1-convex-bsd exit 0 ;; c2*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit 0 ;; c34*) echo c34-convex-bsd exit 0 ;; c38*) echo c38-convex-bsd exit 0 ;; c4*) echo c4-convex-bsd exit 0 ;; esac fi #echo '(Unable to guess system type)' 1>&2 exit 1 coldfire-0.2.2/install-sh0100644000175000017500000000000110015265011013702 0ustar davedave coldfire-0.2.2/autogen.sh0100755000175000017500000000011110015265011013704 0ustar davedaveaclocal # -I /usr/local/share/aclocal autoheader autoconf ./configure $* coldfire-0.2.2/config.sub0100644000175000017500000005772710015265011013714 0ustar davedave#! /bin/sh # Configuration validation subroutine script, version 1.1. # Copyright (C) 1991, 92-97, 1998, 1999 Free Software Foundation, Inc. # This file is (in principle) common to ALL GNU software. # The presence of a machine in this file suggests that SOME GNU software # can handle that machine. It does not imply ALL GNU software can. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, # Boston, MA 02111-1307, USA. # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Configuration subroutine to validate and canonicalize a configuration type. # Supply the specified configuration type as an argument. # If it is invalid, we print an error message on stderr and exit with code 1. # Otherwise, we print the canonical config type on stdout and succeed. # This file is supposed to be the same for all GNU packages # and recognize all the CPU types, system types and aliases # that are meaningful with *any* GNU software. # Each package is responsible for reporting which valid configurations # it does not support. The user should be able to distinguish # a failure to support a valid configuration from a meaningless # configuration. # The goal of this file is to map all the various variations of a given # machine specification into a single specification in the form: # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM # or in some cases, the newer four-part form: # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM # It is wrong to echo any other type of specification. if [ x$1 = x ] then echo Configuration name missing. 1>&2 echo "Usage: $0 CPU-MFR-OPSYS" 1>&2 echo "or $0 ALIAS" 1>&2 echo where ALIAS is a recognized configuration type. 1>&2 exit 1 fi # First pass through any local machine types. case $1 in *local*) echo $1 exit 0 ;; *) ;; esac # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). # Here we must recognize all the valid KERNEL-OS combinations. maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` case $maybe_os in linux-gnu*) os=-$maybe_os basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` ;; *) basic_machine=`echo $1 | sed 's/-[^-]*$//'` if [ $basic_machine != $1 ] then os=`echo $1 | sed 's/.*-/-/'` else os=; fi ;; esac ### Let's recognize common machines as not being operating systems so ### that things like config.sub decstation-3100 work. We also ### recognize some manufacturers as not being operating systems, so we ### can provide default operating systems below. case $os in -sun*os*) # Prevent following clause from handling this invalid input. ;; -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ -apple) os= basic_machine=$1 ;; -sim | -cisco | -oki | -wec | -winbond) os= basic_machine=$1 ;; -scout) ;; -wrs) os=-vxworks basic_machine=$1 ;; -hiux*) os=-hiuxwe2 ;; -sco5) os=-sco3.2v5 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco4) os=-sco3.2v4 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2.[4-9]*) os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2v[4-9]*) # Don't forget version if it is 3.2v4 or newer. basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco*) os=-sco3.2v2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -udk*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -isc) os=-isc2.2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -clix*) basic_machine=clipper-intergraph ;; -isc*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -lynx*) os=-lynxos ;; -ptx*) basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` ;; -windowsnt*) os=`echo $os | sed -e 's/windowsnt/winnt/'` ;; -psos*) os=-psos ;; -mint | -mint[0-9]*) basic_machine=m68k-atari os=-mint ;; esac # Decode aliases for certain CPU-COMPANY combinations. case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \ | arme[lb] | pyramid | mn10200 | mn10300 | tron | a29k \ | 580 | i960 | h8300 \ | hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \ | alpha | alphaev[4-7] | alphaev56 | alphapca5[67] \ | we32k | ns16k | clipper | i370 | sh | powerpc | powerpcle \ | 1750a | dsp16xx | pdp11 | mips16 | mips64 | mipsel | mips64el \ | mips64orion | mips64orionel | mipstx39 | mipstx39el \ | mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \ | mips64vr5000 | miprs64vr5000el | mcore \ | sparc | sparclet | sparclite | sparc64 | sparcv9 | v850 | c4x \ | thumb | d10v | fr30) basic_machine=$basic_machine-unknown ;; m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | z8k | v70 | h8500 | w65 | pj | pjl) ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and # (2) the word "unknown" tends to confuse beginning users. i[34567]86) basic_machine=$basic_machine-pc ;; # Object if more than one company name word. *-*-*) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; # Recognize the basic CPU types with company name. # FIXME: clean up the formatting here. vax-* | tahoe-* | i[34567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \ | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \ | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \ | power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \ | xmp-* | ymp-* \ | hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* | hppa2.0n-* \ | alpha-* | alphaev[4-7]-* | alphaev56-* | alphapca5[67]-* \ | we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \ | clipper-* | orion-* \ | sparclite-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \ | sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \ | mips64el-* | mips64orion-* | mips64orionel-* \ | mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \ | mipstx39-* | mipstx39el-* | mcore-* \ | f301-* | armv*-* | t3e-* \ | m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \ | thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* ) ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) basic_machine=i386-unknown os=-bsd ;; 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) basic_machine=m68000-att ;; 3b*) basic_machine=we32k-att ;; a29khif) basic_machine=a29k-amd os=-udi ;; adobe68k) basic_machine=m68010-adobe os=-scout ;; alliant | fx80) basic_machine=fx80-alliant ;; altos | altos3068) basic_machine=m68k-altos ;; am29k) basic_machine=a29k-none os=-bsd ;; amdahl) basic_machine=580-amdahl os=-sysv ;; amiga | amiga-*) basic_machine=m68k-cbm ;; amigaos | amigados) basic_machine=m68k-cbm os=-amigaos ;; amigaunix | amix) basic_machine=m68k-cbm os=-sysv4 ;; apollo68) basic_machine=m68k-apollo os=-sysv ;; apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; aux) basic_machine=m68k-apple os=-aux ;; balance) basic_machine=ns32k-sequent os=-dynix ;; convex-c1) basic_machine=c1-convex os=-bsd ;; convex-c2) basic_machine=c2-convex os=-bsd ;; convex-c32) basic_machine=c32-convex os=-bsd ;; convex-c34) basic_machine=c34-convex os=-bsd ;; convex-c38) basic_machine=c38-convex os=-bsd ;; cray | ymp) basic_machine=ymp-cray os=-unicos ;; cray2) basic_machine=cray2-cray os=-unicos ;; [ctj]90-cray) basic_machine=c90-cray os=-unicos ;; crds | unos) basic_machine=m68k-crds ;; da30 | da30-*) basic_machine=m68k-da30 ;; decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) basic_machine=mips-dec ;; delta | 3300 | motorola-3300 | motorola-delta \ | 3300-motorola | delta-motorola) basic_machine=m68k-motorola ;; delta88) basic_machine=m88k-motorola os=-sysv3 ;; dpx20 | dpx20-*) basic_machine=rs6000-bull os=-bosx ;; dpx2* | dpx2*-bull) basic_machine=m68k-bull os=-sysv3 ;; ebmon29k) basic_machine=a29k-amd os=-ebmon ;; elxsi) basic_machine=elxsi-elxsi os=-bsd ;; encore | umax | mmax) basic_machine=ns32k-encore ;; es1800 | OSE68k | ose68k | ose | OSE) basic_machine=m68k-ericsson os=-ose ;; fx2800) basic_machine=i860-alliant ;; genix) basic_machine=ns32k-ns ;; gmicro) basic_machine=tron-gmicro os=-sysv ;; h3050r* | hiux*) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; h8300hms) basic_machine=h8300-hitachi os=-hms ;; h8300xray) basic_machine=h8300-hitachi os=-xray ;; h8500hms) basic_machine=h8500-hitachi os=-hms ;; harris) basic_machine=m88k-harris os=-sysv3 ;; hp300-*) basic_machine=m68k-hp ;; hp300bsd) basic_machine=m68k-hp os=-bsd ;; hp300hpux) basic_machine=m68k-hp os=-hpux ;; hp3k9[0-9][0-9] | hp9[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k2[0-9][0-9] | hp9k31[0-9]) basic_machine=m68000-hp ;; hp9k3[2-9][0-9]) basic_machine=m68k-hp ;; hp9k6[0-9][0-9] | hp6[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k7[0-79][0-9] | hp7[0-79][0-9]) basic_machine=hppa1.1-hp ;; hp9k78[0-9] | hp78[0-9]) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[0-9][13679] | hp8[0-9][13679]) basic_machine=hppa1.1-hp ;; hp9k8[0-9][0-9] | hp8[0-9][0-9]) basic_machine=hppa1.0-hp ;; hppa-next) os=-nextstep3 ;; hppaosf) basic_machine=hppa1.1-hp os=-osf ;; hppro) basic_machine=hppa1.1-hp os=-proelf ;; i370-ibm* | ibm*) basic_machine=i370-ibm ;; # I'm not sure what "Sysv32" means. Should this be sysv3.2? i[34567]86v32) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv32 ;; i[34567]86v4*) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv4 ;; i[34567]86v) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv ;; i[34567]86sol2) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-solaris2 ;; i386mach) basic_machine=i386-mach os=-mach ;; i386-vsta | vsta) basic_machine=i386-unknown os=-vsta ;; i386-go32 | go32) basic_machine=i386-unknown os=-go32 ;; i386-mingw32 | mingw32) basic_machine=i386-unknown os=-mingw32 ;; i386-qnx | qnx) basic_machine=i386-qnx ;; iris | iris4d) basic_machine=mips-sgi case $os in -irix*) ;; *) os=-irix4 ;; esac ;; isi68 | isi) basic_machine=m68k-isi os=-sysv ;; m88k-omron*) basic_machine=m88k-omron ;; magnum | m3230) basic_machine=mips-mips os=-sysv ;; merlin) basic_machine=ns32k-utek os=-sysv ;; miniframe) basic_machine=m68000-convergent ;; *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) basic_machine=m68k-atari os=-mint ;; mipsel*-linux*) basic_machine=mipsel-unknown os=-linux-gnu ;; mips*-linux*) basic_machine=mips-unknown os=-linux-gnu ;; mips3*-*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` ;; mips3*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown ;; monitor) basic_machine=m68k-rom68k os=-coff ;; msdos) basic_machine=i386-unknown os=-msdos ;; mvs) basic_machine=i370-ibm os=-mvs ;; ncr3000) basic_machine=i486-ncr os=-sysv4 ;; netbsd386) basic_machine=i386-unknown os=-netbsd ;; netwinder) basic_machine=armv4l-rebel os=-linux ;; news | news700 | news800 | news900) basic_machine=m68k-sony os=-newsos ;; news1000) basic_machine=m68030-sony os=-newsos ;; news-3600 | risc-news) basic_machine=mips-sony os=-newsos ;; necv70) basic_machine=v70-nec os=-sysv ;; next | m*-next ) basic_machine=m68k-next case $os in -nextstep* ) ;; -ns2*) os=-nextstep2 ;; *) os=-nextstep3 ;; esac ;; nh3000) basic_machine=m68k-harris os=-cxux ;; nh[45]000) basic_machine=m88k-harris os=-cxux ;; nindy960) basic_machine=i960-intel os=-nindy ;; mon960) basic_machine=i960-intel os=-mon960 ;; np1) basic_machine=np1-gould ;; op50n-* | op60c-*) basic_machine=hppa1.1-oki os=-proelf ;; OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose ;; os68k) basic_machine=m68k-none os=-os68k ;; pa-hitachi) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; paragon) basic_machine=i860-intel os=-osf ;; pbd) basic_machine=sparc-tti ;; pbb) basic_machine=m68k-tti ;; pc532 | pc532-*) basic_machine=ns32k-pc532 ;; pentium | p5 | k5 | k6 | nexen) basic_machine=i586-pc ;; pentiumpro | p6 | 6x86) basic_machine=i686-pc ;; pentiumii | pentium2) basic_machine=i786-pc ;; pentium-* | p5-* | k5-* | k6-* | nexen-*) basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumpro-* | p6-* | 6x86-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumii-* | pentium2-*) basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pn) basic_machine=pn-gould ;; power) basic_machine=rs6000-ibm ;; ppc) basic_machine=powerpc-unknown ;; ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppcle | powerpclittle | ppc-le | powerpc-little) basic_machine=powerpcle-unknown ;; ppcle-* | powerpclittle-*) basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ps2) basic_machine=i386-ibm ;; rom68k) basic_machine=m68k-rom68k os=-coff ;; rm[46]00) basic_machine=mips-siemens ;; rtpc | rtpc-*) basic_machine=romp-ibm ;; sa29200) basic_machine=a29k-amd os=-udi ;; sequent) basic_machine=i386-sequent ;; sh) basic_machine=sh-hitachi os=-hms ;; sparclite-wrs) basic_machine=sparclite-wrs os=-vxworks ;; sps7) basic_machine=m68k-bull os=-sysv2 ;; spur) basic_machine=spur-unknown ;; st2000) basic_machine=m68k-tandem ;; stratus) basic_machine=i860-stratus os=-sysv4 ;; sun2) basic_machine=m68000-sun ;; sun2os3) basic_machine=m68000-sun os=-sunos3 ;; sun2os4) basic_machine=m68000-sun os=-sunos4 ;; sun3os3) basic_machine=m68k-sun os=-sunos3 ;; sun3os4) basic_machine=m68k-sun os=-sunos4 ;; sun4os3) basic_machine=sparc-sun os=-sunos3 ;; sun4os4) basic_machine=sparc-sun os=-sunos4 ;; sun4sol2) basic_machine=sparc-sun os=-solaris2 ;; sun3 | sun3-*) basic_machine=m68k-sun ;; sun4) basic_machine=sparc-sun ;; sun386 | sun386i | roadrunner) basic_machine=i386-sun ;; symmetry) basic_machine=i386-sequent os=-dynix ;; t3e) basic_machine=t3e-cray os=-unicos ;; tx39) basic_machine=mipstx39-unknown ;; tx39el) basic_machine=mipstx39el-unknown ;; tower | tower-32) basic_machine=m68k-ncr ;; udi29k) basic_machine=a29k-amd os=-udi ;; ultra3) basic_machine=a29k-nyu os=-sym1 ;; v810 | necv810) basic_machine=v810-nec os=-none ;; vaxv) basic_machine=vax-dec os=-sysv ;; vms) basic_machine=vax-dec os=-vms ;; vpp*|vx|vx-*) basic_machine=f301-fujitsu ;; vxworks960) basic_machine=i960-wrs os=-vxworks ;; vxworks68) basic_machine=m68k-wrs os=-vxworks ;; vxworks29k) basic_machine=a29k-wrs os=-vxworks ;; w65*) basic_machine=w65-wdc os=-none ;; w89k-*) basic_machine=hppa1.1-winbond os=-proelf ;; xmp) basic_machine=xmp-cray os=-unicos ;; xps | xps100) basic_machine=xps100-honeywell ;; z8k-*-coff) basic_machine=z8k-unknown os=-sim ;; none) basic_machine=none-none os=-none ;; # Here we handle the default manufacturer of certain CPU types. It is in # some cases the only manufacturer, in others, it is the most popular. w89k) basic_machine=hppa1.1-winbond ;; op50n) basic_machine=hppa1.1-oki ;; op60c) basic_machine=hppa1.1-oki ;; mips) if [ x$os = x-linux-gnu ]; then basic_machine=mips-unknown else basic_machine=mips-mips fi ;; romp) basic_machine=romp-ibm ;; rs6000) basic_machine=rs6000-ibm ;; vax) basic_machine=vax-dec ;; pdp11) basic_machine=pdp11-dec ;; we32k) basic_machine=we32k-att ;; sparc | sparcv9) basic_machine=sparc-sun ;; cydra) basic_machine=cydra-cydrome ;; orion) basic_machine=orion-highlevel ;; orion105) basic_machine=clipper-highlevel ;; mac | mpw | mac-mpw) basic_machine=m68k-apple ;; pmac | pmac-mpw) basic_machine=powerpc-apple ;; c4x*) basic_machine=c4x-none os=-coff ;; *) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; esac # Here we canonicalize certain aliases for manufacturers. case $basic_machine in *-digital*) basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'` ;; *-commodore*) basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'` ;; *) ;; esac # Decode manufacturer-specific aliases for certain operating systems. if [ x"$os" != x"" ] then case $os in # First match some system type aliases # that might get confused with valid system types. # -solaris* is a basic system type, with this one exception. -solaris1 | -solaris1.*) os=`echo $os | sed -e 's|solaris1|sunos4|'` ;; -solaris) os=-solaris2 ;; -svr4*) os=-sysv4 ;; -unixware*) os=-sysv4.2uw ;; -gnu/linux*) os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'` ;; # First accept the basic system types. # The portable systems comes first. # Each alternative MUST END IN A *, to match a version number. # -sysv* is not here because it comes later, after sysvr4. -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \ | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[34]*\ | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \ | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \ | -aos* \ | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ | -hiux* | -386bsd* | -netbsd* | -openbsd* | -freebsd* | -riscix* \ | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \ | -interix* | -uwin* | -rhapsody* | -opened* | -openstep* | -oskit*) # Remember, each alternative MUST END IN *, to match a version number. ;; -sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \ | -windows* | -osx | -abug | -netware* | -os9* | -beos* \ | -macos* | -mpw* | -magic* | -mon960* | -lnews*) ;; -mac*) os=`echo $os | sed -e 's|mac|macos|'` ;; -linux*) os=`echo $os | sed -e 's|linux|linux-gnu|'` ;; -sunos5*) os=`echo $os | sed -e 's|sunos5|solaris2|'` ;; -sunos6*) os=`echo $os | sed -e 's|sunos6|solaris3|'` ;; -opened*) os=-openedition ;; -osfrose*) os=-osfrose ;; -osf*) os=-osf ;; -utek*) os=-bsd ;; -dynix*) os=-bsd ;; -acis*) os=-aos ;; -386bsd) os=-bsd ;; -ctix* | -uts*) os=-sysv ;; -ns2 ) os=-nextstep2 ;; # Preserve the version number of sinix5. -sinix5.*) os=`echo $os | sed -e 's|sinix|sysv|'` ;; -sinix*) os=-sysv4 ;; -triton*) os=-sysv3 ;; -oss*) os=-sysv3 ;; -qnx) os=-qnx4 ;; -svr4) os=-sysv4 ;; -svr3) os=-sysv3 ;; -sysvr4) os=-sysv4 ;; # This must come after -sysvr4. -sysv*) ;; -ose*) os=-ose ;; -es1800*) os=-ose ;; -xenix) os=-xenix ;; -*mint | -*MiNT) os=-mint ;; -none) ;; *) # Get rid of the `-' at the beginning of $os. os=`echo $os | sed 's/[^-]*-//'` echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2 exit 1 ;; esac else # Here we handle the default operating systems that come with various machines. # The value should be what the vendor currently ships out the door with their # machine or put another way, the most popular os provided with the machine. # Note that if you're going to try to match "-MANUFACTURER" here (say, # "-sun"), then you have to tell the case statement up towards the top # that MANUFACTURER isn't an operating system. Otherwise, code above # will signal an error saying that MANUFACTURER isn't an operating # system, and we'll never get to this point. case $basic_machine in *-acorn) os=-riscix1.2 ;; arm*-rebel) os=-linux ;; arm*-semi) os=-aout ;; pdp11-*) os=-none ;; *-dec | vax-*) os=-ultrix4.2 ;; m68*-apollo) os=-domain ;; i386-sun) os=-sunos4.0.2 ;; m68000-sun) os=-sunos3 # This also exists in the configure program, but was not the # default. # os=-sunos4 ;; m68*-cisco) os=-aout ;; mips*-cisco) os=-elf ;; mips*-*) os=-elf ;; *-tti) # must be before sparc entry or we get the wrong os. os=-sysv3 ;; sparc-* | *-sun) os=-sunos4.1.1 ;; *-be) os=-beos ;; *-ibm) os=-aix ;; *-wec) os=-proelf ;; *-winbond) os=-proelf ;; *-oki) os=-proelf ;; *-hp) os=-hpux ;; *-hitachi) os=-hiux ;; i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent) os=-sysv ;; *-cbm) os=-amigaos ;; *-dg) os=-dgux ;; *-dolphin) os=-sysv3 ;; m68k-ccur) os=-rtu ;; m88k-omron*) os=-luna ;; *-next ) os=-nextstep ;; *-sequent) os=-ptx ;; *-crds) os=-unos ;; *-ns) os=-genix ;; i370-*) os=-mvs ;; *-next) os=-nextstep3 ;; *-gould) os=-sysv ;; *-highlevel) os=-bsd ;; *-encore) os=-bsd ;; *-sgi) os=-irix ;; *-siemens) os=-sysv4 ;; *-masscomp) os=-rtu ;; f301-fujitsu) os=-uxpv ;; *-rom68k) os=-coff ;; *-*bug) os=-coff ;; *-apple) os=-macos ;; *-atari*) os=-mint ;; *) os=-none ;; esac fi # Here we handle the case where we know the os, and the CPU type, but not the # manufacturer. We pick the logical manufacturer. vendor=unknown case $basic_machine in *-unknown) case $os in -riscix*) vendor=acorn ;; -sunos*) vendor=sun ;; -aix*) vendor=ibm ;; -beos*) vendor=be ;; -hpux*) vendor=hp ;; -mpeix*) vendor=hp ;; -hiux*) vendor=hitachi ;; -unos*) vendor=crds ;; -dgux*) vendor=dg ;; -luna*) vendor=omron ;; -genix*) vendor=ns ;; -mvs* | -opened*) vendor=ibm ;; -ptx*) vendor=sequent ;; -vxsim* | -vxworks*) vendor=wrs ;; -aux*) vendor=apple ;; -hms*) vendor=hitachi ;; -mpw* | -macos*) vendor=apple ;; -*mint | -*MiNT) vendor=atari ;; esac basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"` ;; esac echo $basic_machine$os coldfire-0.2.2/stats.c0100644000175000017500000000215010015265012013213 0ustar davedave/* (c) 2000, Matt Minnis */ #include "config.h" #include "stats.h" int Stats_Mode [sBAD]={0}; int Stats_AReg [8]={0}; int Stats_DReg [8]={0}; int Stats_Build_EA (int Register, int Mode) { if (Mode!=7) { if (Mode==0) Stats_DReg[Register]++;/* Count # times data register is in use */ else Stats_AReg[Register]++; /* Count # times address register is in use */ } switch (Mode) { /* Count # times each addressing mode is used. */ case 0: Stats_Mode[sDRD]++; break; /* Dy */ case 1: Stats_Mode[sARD]++; break; /* Ay */ case 2: Stats_Mode[sARI]++; break; /* (Ay) */ case 3: Stats_Mode[sARIPO]++; break; /* (Ay)+ */ case 4: Stats_Mode[sARIPR]++; break; /* -(Ay) */ case 5: Stats_Mode[sARID]++; break; /* (d16,Ay) */ case 6: Stats_Mode[sARIIB]++; break; /* (d8,An,Xi) */ case 7: switch (Register) { case 0: Stats_Mode[sAS]++; break; /* word addressing */ case 1: Stats_Mode[sAL]++; break; /* long addressing */ case 2: Stats_Mode[sPCID]++; break; /* (d16,PC) */ case 3: Stats_Mode[sPCIIB]++; break; /* (d8,PC,Xi) */ case 4: Stats_Mode[sIM]++; break; /* (d8,PC,Xi) */ } break; } return 0; } coldfire-0.2.2/stats.h0100644000175000017500000000232210015265012013221 0ustar davedave/* Stats.h */ #ifndef STATS_H #define STATS_H /* Addressing Mode Mode Register Description Dy 000 Dregnum data register direct Ay 001 Aregnum address register direct (Ay) 010 Aregnum address register indirect (Ay)+ 011 Aregnum ari with postincrement -(Ay) 100 Aregnum ari with predecrement (d16,Ay) 101 Aregnum ari with displacement (d8,Ay,Xi) 110 Aregnum ari with index base (xxx).W 111 000 absolute short (xxx).L 111 001 absolute long # 111 100 immediate (d16,PC) 111 010 program counter indirect disp (d8,PC,Xi) 111 011 pci with index base */ #ifdef MEMORY_STATS enum { sDRD=0, sARD, sARI, sARIPO, sARIPR, sARID, sARIIB, sAS, sAL, sIM, sPCID, sPCIIB, sBAD}; /* sBAD must be last addressing mode */ int Stats_Build_EA (int Register, int Mode); extern int Stats_Mode [sBAD]; extern int Stats_AReg [8]; extern int Stats_DReg [8]; #endif /* MEMORY_STATS */ #endif /* STATS_H */ coldfire-0.2.2/HACKING0100644000175000017500000000115010015265012012677 0ustar davedaveHacking Notes: - Memory_Retr (and Memory_Retr*) DO NOT do any sign extension. 8 bit read on FFFFFFFF returns 000000FF. - EA_GetValue does do sign extenstion. 8 bit read on xxxxxxF0 returns FFFFFFF0. - Any jump address in the VBR that is FFFFFFFF (ie, way up in ROM on the real coldfire).. will be passed to Monitor_HandleException(Vector). This includes things like the TRACE exception (#9). So yes, you can override any exception handler (just like in the real thing). - Our dBug (a dBUG clone) runs completely on exceptions.. the only way to get into dBug is through an exception. coldfire-0.2.2/boards/0042755000175000017500000000000010057152024013176 5ustar davedavecoldfire-0.2.2/boards/cjdesign-5307.board0100644000175000017500000000304210015265022016360 0ustar davedave; CJDesign 5307 board. Designed for the university of waterloo ; memory map: ; $00000000 - $0FFFFFFF Flash ; $10000000 - $1FFFFFFF SDRam ; $20000000 - $3FFFFFFF Peripheral Space ; $40000000 - $FFFF7FFF Unused ; $FFFF8000 - $FFFFFFFF Internal SRAM ; however, the rom on the board uses 0xf000000 as the peripheral ; space, so we'll configure the MBAR to be that ; Board ID board "CJDesign" ; The CPU we want to use cpu "5307" ; Reset values for internal registers reg PC=0x0 reg SP=0x11000000 reg RAMBAR=0xFFFF8000 reg ROMBAR=0x0 reg VBR=0x10000000 reg MBAR=0xf0000000 reg SR=0x2000 ; DRAM is most likely to be accessed (16Mb) ram name="dram", base=0x10000000, len=0x01000000 ; Then the SIM, the sim_init initializes the entire sim region, ; so the timer and uart need to go first else we'll never send ; read/writes into them ; We also don't need the lengths, the modules know how long they are timer_5206 name="timer0", base=MBAR+0x140, int=9 timer_5206 name="timer1", base=MBAR+0x180, int=10 ; uart0 is the default uart, different than the 5206 boards where ; the second uart is the default one. uart_5206 name="uart0", base=MBAR+0x1c0, int=12, code=00 uart_5206 name="uart1", base=MBAR+0x200, int=13 sim_5307 name="sim", base=MBAR+0x0 ; Least likely to be accessed ;dummy name=ne2000, base=0x40000300, len=0x0100 ;dummy name=isa, base=0x40000000, len=0x00100000 ; rom gets pre-loaded with return to monitor code. rom name=flash, base=ROMBAR+0x0, len=0x00040000, \ code=70004e4f ram name=sram, base=RAMBAR+0x0, len=0x00008000 coldfire-0.2.2/boards/elia-5307.board0100644000175000017500000000441510015265022015511 0ustar davedave; eLIA 5307 board - Rodney Davies Rodneygd@uow.edu.au ; - David Grant ;The ColdFire memory space is set up as follows ; ; ADDRESS HARDWARE COMMENT ; ; 00000000 - 00ffffff SDRAM 16MB, 32bits, Bank0 ; 01000000 - 01ffffff SDRAM (optional) 16MB, 32bits, Bank1 ; 10000000 - 100fffff ColdFire SIM Internal to CPU ; 20000000 - 20000fff ColdFire SRAM Internal 4k SRAM CPU ; 30600000 - 307fffff Ethernet CS3, 16bit, SMC91c96 ; 30c00000 - 30cfffff IDE Interface CS6, 16bit ; 80000000 - 801fffff PCI bridge CS1, 32bit, CO-MEM Lite ; f0000000 - f01fffff FLASH CS0, 16bit, 1MB (or 2MB) ; Board ID board "eLIA" ; The CPU we want to use cpu "5307" ; Reset values for internal registers reg PC=0xf0000000 ; start the PC executing out of the flash reg SP=0x01000000 ; SP at end of SDRAM reg RAMBAR=0x20000000 ; sram usually. reg ROMBAR=0xf0000000 ; a.k.a the flash. reg VBR=0x00000000 ; vbr, in normal ram? reg MBAR=0x10000000 ; this is the SIM reg SR=0x2700 ; SDRAM is most likely to be accessed (16Mb) 2 banks of it, 2nd one optional. ram name="sdram0", base=0x00000000, len=0x01000000 ;ram name="sdram1", base=0x01000000, len=0x01000000 ; Then the SIM, the sim_init initializes the entire sim region, ; so the timer and uart need to go first else we'll never send ; read/writes into them ; We also don't need the lengths, the modules know how long they are ; The 5307 uses the same hardware modules ast he 5206 for the timer and uart timer_5206 name="timer0", base=MBAR+0x140, int=9 timer_5206 name="timer1", base=MBAR+0x180, int=10 ; uart0 is the default uart (so we signal that with the code=00), ; different than the 5206 boards where the second uart is the default one. uart_5206 name="uart0", base=MBAR+0x1c0, int=12, code=00 uart_5206 name="uart1", base=MBAR+0x200, int=13 sim_5307 name="sim", base=MBAR+0x0 ; Least likely to be accessed dummy name=smc91c96, base=0x30600000, len=0x00200000 dummy name=isa, base=0x30c00000, len=0x00100000 dummy name=pci, base=0x80000000, len=0x00200000 ; rom gets pre-loaded with return to monitor code. rom name=flash, base=ROMBAR+0x0, len=0x00040000, code=70004e4f ram name=sram, base=RAMBAR+0x0, len=0x00001000 coldfire-0.2.2/boards/lite-5206e.board0100644000175000017500000000160410015265022015674 0ustar davedave; M5206eLITE memory map: ; ; 0x00000000 - 0x003FFFFF 4M of ADRAMs ; 0x10000000 - 0x100003FF Internal Module registers ; 0x20000000 - 0x20001FFF Internal SDRAM (8K) ; 0x30000000 - 0x300FFFFF Extrneal FSRAM (1M == 256k * 32bits) ; 0x40000000 - 0x4000FFFF 64K of GPIO ; 0xFFE00000 - 0xFFEFFFFF Flash EEPROM (1M == 512K * 16bits) ; board "LITE" ; This should be 5206e, but we don't have emulation for that yet. cpu "5206" ram name="adram", base=0x0, len=0x00400000 sim_timer name="timer1", base=MBAR+0x100, int=9 sim_timer name="timer2", base=MBAR+0x120, int=10 sim_uart name="uart1", base=MBAR+0x140, int=12 sim_uart name="uart2", base=MBAR+0x180, int=13 sim name="sim", base=MBAR+0x0 ram name="sdram", base=0x20000000, len=0x00002000 ram name="fsram", base=0x30000000, len=0x00100000 ram name="gpio", base=0x40000000, len=0x00010000 rom name="rom", base=0xFFE00000, len=0x00100000 coldfire-0.2.2/boards/arnewsh-5206.board0100644000175000017500000000242310015265022016241 0ustar davedave; Arnewsh memory map: ; $00000000 - $01FFFFFF DRAM ; $10000000 - $100003FF Internal module registers ; $20000000 - $200001FF Internal SRAM ; $30000000 - $300FFFFF 1Meg space for MC68HC901 ; $40000000 - $400FFFFF 1Meg ISA bus area ; $FFE00000 - $FFE3FFFF 256K flash rom ; Board ID board "Arnewsh" ; The CPU we want to use cpu "5206" ; Default core register values reg VBR=0x0 reg MBAR=0x10000000 reg RAMBAR=0x20000000 reg ROMBAR=0xFFE00000 reg PC=0xFFE00000 reg SP=0x00400000 reg SR=0x2000 ; DRAM is most likely to be accessed ram name="dram", base=0x0, len=0x00400000 ; Then the SIM, the sim_init initializes the entire sim region, ; so the timer and uart need to go first else we'll never send ; read/writes into them ; We also don't need the lengths, the modules know how long they are timer_5206 name="timer1", base=MBAR+0x100, int=9 timer_5206 name="timer2", base=MBAR+0x120, int=10 uart_5206 name="uart1", base=MBAR+0x140, int=12 uart_5206 name="uart2", base=MBAR+0x180, int=13, code=00 sim_5206 name="sim", base=MBAR+0x0 ; Least likely to be accessed dummy name=ne2000, base=0x40000300, len=0x0100 dummy name=isa, base=0x40000000, len=0x00100000 rom name=rom, base=ROMBAR+0x0, len=0x00040000, \ code=70004e4f ram name=sram, base=RAMBAR+0x0, len=0x00000100 coldfire-0.2.2/handlers.c0100644000175000017500000001020310015265012013653 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(handlers); void SR_Set(short Instr, long Source, long Destination, long Result) { char Sm = (Source >= 0) ? 0 : 1; char Dm = (Destination >= 0) ? 0 : 1; char Rm = (Result >= 0) ? 0 : 1; short BackupSR = memory_core.sr; TRACE("Setting Source=0x%08lx, Destination=0x%08lx, Result=0x%08lx\n", Source, Destination, Result); TRACE("Sm=%d, Dm=%d, Rm=%d\n", Sm,Dm,Rm); /* Clear out the XNZVC */ memory_core.sr &= 0xFFE0; switch(Instr) { case I_ADDX: /* Z - cleared if result is non-zero, unchanged otherwise */ case I_ADD: case I_ADDI: case I_ADDQ: /* Set the status register */ /* X - Set to value of carry bit N - Set if result is -ve, cleared otherwise Z - Set if result is zero, cleared otherwise V - Set if an overflow occurs, cleared otherwise C - Set if a carry is generated, cleared otherwise */ if(Rm) memory_core.sr |= SR_N; if(Instr==I_ADDX) { if(Result) /* SR_Z will already be cleared */; else /* Restore the old one */ memory_core.sr |= (BackupSR & SR_Z); } else { if(Result==0) memory_core.sr |= SR_Z; } if((Sm && Dm && !Rm) || (!Sm && !Dm && Rm) ) memory_core.sr |= SR_V; if((Sm && Dm) || (!Rm && Dm) || (Sm && !Rm) ) { memory_core.sr |= SR_C; memory_core.sr |= SR_X; } break; case I_SUBX: /* Z - cleared if result is non-zero, unchanged otherwise */ case I_SUB: case I_SUBI: case I_SUBQ: /* Set the status register */ /* X - Set to value of carry bit N - Set if result is -ve, cleared otherwise Z - Set if result is zero, cleared otherwise V - Set if an overflow occurs, cleared otherwise C - Set if a borrow occurs, cleared otherwise */ if(Rm) memory_core.sr |= SR_N; if(Instr==I_SUBX) { if(Result) /* SR_Z will already be cleared */; else /* Restore the old one */ memory_core.sr |= (BackupSR & SR_Z); } else { if(Result==0) memory_core.sr |= SR_Z; } if((!Sm && Dm && !Rm) || (Sm && !Dm && Rm) ) memory_core.sr |= SR_V; if((Sm && !Dm) || (Rm && !Dm) || (Sm && Rm) ) { memory_core.sr |= SR_C; memory_core.sr |= SR_X; } break; case I_CMP: case I_CMPA: case I_CMPI: /* Set the status register * X - Not affected * N - Set if result is -ve, cleared otherwise * Z - Set if result is zero, cleared otherwise * V - Set if an overflow occurs, cleared otherwise * C - Set if a borrow occurs, cleared otherwise */ if(Rm) memory_core.sr |= SR_N; if(Result==0) memory_core.sr |= SR_Z; if((!Sm && Dm && !Rm) || (Sm && !Dm && Rm) ) memory_core.sr |= SR_V; if((Sm && !Dm) || (Rm && !Dm) || (Sm && Rm) ) memory_core.sr |= SR_C; /* Restore X */ memory_core.sr |= (BackupSR & SR_X); break; case I_NEG: /* X - Set to value of carry bit N - Set if result is -ve, cleared otherwise Z - Set if result is zero, cleared otherwise V - Set if an overflow occurs, cleared otherwise C - Cleared if the result is zero, set otherwise */ if(Rm) memory_core.sr |= SR_N; if(Result==0) memory_core.sr |= SR_Z; if(Dm && Rm) memory_core.sr |= SR_V; if(Dm || Rm) memory_core.sr |= (SR_C | SR_X); break; case I_NEGX: /* X - Set to value of carry bit N - Set if result is -ve, cleared otherwise Z - Cleared if the result is non-zero, unchanged otherwise V - Set if an overflow occurs, cleared otherwise C - Cleared if the result is zero, set otherwise */ if(Rm) memory_core.sr |= SR_N; if(Result==0) memory_core.sr |= (BackupSR & SR_Z); if(Dm && Rm) memory_core.sr |= SR_V; if(Dm || Rm) memory_core.sr |= (SR_C | SR_X); break; default: ERR("Called with unknown instruction %d\n", Instr); break; } TRACE("X:%d, Neg:%d, Zero:%d, Overflow:%d, Carry:%d\n", (memory_core.sr&SR_X) >> 4,(memory_core.sr&SR_N) >> 3,(memory_core.sr&SR_Z) >> 2,(memory_core.sr&SR_V) >> 1, (memory_core.sr&SR_C)); return; } coldfire-0.2.2/monitor/0042755000175000017500000000000010057152040013411 5ustar davedavecoldfire-0.2.2/monitor/br.c0100644000175000017500000000624310015265022014157 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); #define MAX_BREAKPOINTS 16 struct _breakpoint { unsigned long address; unsigned long count; unsigned long save_word; char trigger; } breakpoint[MAX_BREAKPOINTS]; /* = {[0 ... MAX_BREAKPOINTS-1] {0,0,0,0}};*/ int breakpoint_count = 0; int Monitor_BR(int argc, char **argv) { unsigned long addr; int x; if(argc < 2) { /* Print breakpoints */ printf(" Address Count Trigger\n"); for(x=0; x #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); #include "elf-include.h" UBYTE *elfbuffer=NULL; ULONG elfsize=0; struct Elf32_Ehdr *elfheader=NULL; struct Elf32_Phdr *elfsegments=NULL; struct Elf32_Shdr *elfsections=NULL; struct Elf32_Sym *elfsymtab=NULL; ULONG elfsymtabcount=0; struct Elf32_Rela *elfrela=NULL; ULONG elfrelacount=0; char *sectionnames=NULL; char *strtab=NULL; char *sectiontypes[]= { "SHT_NULL", "SHT_PROGBITS", "SHT_SYMTAB", "SHT_STRTAB", "SHT_RELA", "SHT_HASH", "SHT_DYNAMIC", "SHT_NOTE", "SHT_NOBITS", "SHT_REL", "SHT_SHLIB", "SHT_DYNSYM" }; LONG proglength=0; UBYTE *progbuffer; ULONG baseaddress=0x10000; int verbosemode=0; LONG get_section_addr(LONG section) { LONG i, addr=0; for(i=0; ie_shnum); i++) { if (i==section) return addr; if (ECL(elfsections[i].sh_type)==SHT_PROGBITS) addr+=ECL(elfsections[i].sh_size); } return -1; } LONG get_sym_addr(char *symbol) { ULONG i, symsection=-1, adr=0; for(i=0; ie_shnum); i++) { if (ECL(elfsections[i].sh_type)==SHT_STRTAB && i==ECW(elfheader->e_shstrndx)) { sectionnames=elfbuffer+ECL(elfsections[i].sh_offset); } else if (ECL(elfsections[i].sh_type)==SHT_STRTAB) { strtab=elfbuffer+ECL(elfsections[i].sh_offset); } else if (ECL(elfsections[i].sh_type)==SHT_SYMTAB) { elfsymtab=(struct Elf32_Sym *) (elfbuffer+ECL(elfsections[i].sh_offset)); elfsymtabcount=ECL(elfsections[i].sh_size)/sizeof(struct Elf32_Sym); } else if (ECL(elfsections[i].sh_type)==SHT_PROGBITS) { proglength+=ECL(elfsections[i].sh_size); } else if (ECL(elfsections[i].sh_type)==SHT_RELA) { elfrela=(struct Elf32_Rela *) (elfbuffer+ECL(elfsections[i].sh_offset)); elfrelacount=ECL(elfsections[i].sh_size)/sizeof(struct Elf32_Rela); } } } extern char *memory_ram; void load_program(void) { LONG i,j; UBYTE *buf; /*Will point to memory_ram; */ long Offset=baseaddress; for(i=0; ie_shnum); i++) { if (ECL(elfsections[i].sh_type)==SHT_PROGBITS) { if (ECL(elfsections[i].sh_size)>0) { if ((strcmp(§ionnames[ECL(elfsections[i].sh_name)],".text")==0)) /*Find the executable section */ { j=0; buf=&elfbuffer[ECL(elfsections[i].sh_offset)]; while (je_ident[EI_MAG0]==0x7F && elfheader->e_ident[EI_MAG1]=='E' && elfheader->e_ident[EI_MAG2]=='L' && elfheader->e_ident[EI_MAG3]=='F' && elfheader->e_ident[EI_CLASS]==1 && elfheader->e_ident[EI_DATA]==2 && elfheader->e_ident[EI_VERSION]==EV_CURRENT && ECW(elfheader->e_machine)==EM_68K && ECL(elfheader->e_version)==EV_CURRENT) /*Make sure this is appropriate for us to run */ { printf("Identified as Motorola 68k 32Bit ELF file, version: %ld.\n",ECL(elfheader->e_version)); if ((ECW(elfheader->e_type)==ET_REL) || (ECW(elfheader->e_type)==ET_EXEC)) { if (ECW(elfheader->e_shentsize)==sizeof(struct Elf32_Shdr)) { ULONG mainadr; printf("Section size is Ok. There are %d sections.\n", ECW(elfheader->e_shnum)); elfsections=(struct Elf32_Shdr *) (elfbuffer+ECL(elfheader->e_shoff)); scan_sections(); if ((progbuffer=malloc(proglength))) { printf("Using base address $%lx.\n", baseaddress); load_program(); mainadr=get_sym_addr("main")+baseaddress; free(progbuffer); } else printf("Error: not enough memory!\n"); } } } free(elfbuffer); } else printf("Error: not enough memory!\n"); fclose(elffile); } } return 0; } int Monitor_DE(int argc, char **argv) { if(argc != 2) return Monitor_show_help("de"); read_then_get_elf(argv[1]); printf("\n"); return 1; } coldfire-0.2.2/monitor/di.c0100644000175000017500000000404510015265022014146 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); /* From: Start of address to disassemble buffer: buffer to place disassembled line RETURNS: Length of disassembled instruction, in bytes */ int Monitor_InstructionDI(long FromPC, char *buffer) { unsigned long Value; long x; long OldPC; char InstrStr[16]; char Arg1[32]; char Arg2[32]; struct _Instruction *InstructionPtr; buffer[0]=0; /* Save the PC, and set the new value */ OldPC=memory_core.pc; memory_core.pc=FromPC; /* Retrieve the instruction */ Memory_RetrWord(&Value, memory_core.pc); buffer+=sprintf(buffer,"%08lX: ", memory_core.pc); InstructionPtr=Instruction_FindInstruction(Value); if(InstructionPtr==NULL) { memory_core.pc+=2; } else { /* disassemble the instruction */ (*InstructionPtr->DIFunctionPtr)(&InstrStr[0], &Arg1[0], &Arg2[0]); /* Here, the PC will have changed, so we can tell if we used instructions or not */ for(x=FromPC;x 1) sscanf(argv[1], "%lx", &addr); for(x=0;x < monitor_config.disassemble_lines; x++) { addr += Monitor_InstructionDI(addr, buffer); printf("%s\n", buffer); } di_saved_PC = addr; return 1; } coldfire-0.2.2/monitor/dl.c0100644000175000017500000000651610015265022014156 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); static void dl_binary(FILE *in, long offset) { char inchar; printf("Downloading Binary image... (offset=0x%08lx)\n", offset); while(!feof(in)) { fread(&inchar, 1, 1, in); Memory_StorByte(offset++, (char)inchar); } } static int decode_line(char *buffer, unsigned int *return_address, char *return_data, char *return_checksum) { unsigned int count; char *ptr = &buffer[4]; int x; sscanf(&buffer[2], "%2x", &count); /* Decode the address */ switch(buffer[1]) { case '0': case '1': case '5': case '9': /* 2 byte address */ sscanf(ptr, "%4x", return_address); ptr+=4; break; case '2': case '8': sscanf(ptr, "%6x", return_address); ptr+=6; break; case '3': case '7': sscanf(ptr, "%8x", return_address); ptr+=8; break; } /* Decode the data */ for(x=0;x #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_DN(int argc, char **argv) { printf("Does anyone want to write me a TFTP downloader for this? :)\n"); return 1; } coldfire-0.2.2/monitor/go.c0100644000175000017500000000125010015265022014152 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_GO(int argc, char **argv) { if(argc == 1) { /* Use the existing PC */ } else { /* Take the AddressString, and stuff it into PC */ sscanf(argv[1], "%lx", &memory_core.pc); /* Also stuff it into the stackframe */ Memory_Stor(32,memory_core.a[7]+4,memory_core.pc); } return 0; } coldfire-0.2.2/monitor/md.c0100644000175000017500000000410510015265023014150 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include #include #include #define TRACER_OFF #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); unsigned long next_md_start=0; static void dump(unsigned long start, unsigned long len) { unsigned long offset; int char_num; char char_str[17]; /* Start on a multiple of 16 bytes */ offset = start & 0xfffffff0; char_str[16] = 0; char_num=0; while(1) { /* Print offset, if needed */ if(char_num==0) printf("%08lx: ", offset); /* If we're before the beginning or after the end, do * something useful */ if(offset < start || len == 0) { char_str[char_num] = ' '; printf(" "); } else { /* Get the data as a charater, and print it */ unsigned long data; /* Get the data */ Memory_Retr(&data, 8, offset); /* Print it */ printf("%02lx", data & 0x000000ff); /* Update the string */ char_str[char_num] = isprint(data) ? data : '.'; /* Decrement the length, so we know when to end */ len--; } /* Insert spaces in appropriate places */ if(char_num % 2 == 1) printf(" "); /* Increment counters */ char_num++; offset++; /* Print the end of line, and exit if needed */ if(char_num == 0x10) { printf(" %s\n", char_str); char_num = 0; if(len==0) break; } } } int Monitor_MD(int argc, char **argv) { unsigned long addr, end, len; addr = next_md_start; /* Default to the next start address */ end = 0; /* Default to setting length to 16 lines */ if(argc > 1) sscanf(argv[1], "%lx", &addr); if(argc > 2) sscanf(argv[2], "%lx", &end); /* Calculate length, which must include the end offset */ if(end >= addr) { len = (end+1) - addr; } else { len = 256; /* default is 16 lines */ } dump(addr, len); /* Save the position */ next_md_start = addr+len; return 1; } coldfire-0.2.2/monitor/mm.c0100644000175000017500000000256610015265023014172 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_MM(int argc, char **argv) { long addr; unsigned long value; char command[128]; char *cmd; char width; if(argc != 2) return Monitor_show_help("mm"); sscanf(argv[0], "mm.%c", &width); sscanf(argv[1], "%lx", &addr); if(width=='w') width=16; else width=32; while(1) { if(width==16) { Memory_RetrWord(&value, addr); printf("%08lx: [%04lx] ", addr, value); } else { Memory_RetrLongWord(&value, addr); printf("%08lx: [%08lx] ", addr, value); } /* FIXME: Remove this, and have MM use the main (readlined) * prompt below */ fgets(&command[0], 81, stdin); cmd=strtok(&command[0], "\r\n "); if(cmd==NULL) ; /* Do nothing, just prevent the other ifs from accessing it */ else if(strcmp(cmd, ".") == 0) break; else { if(width==16) { short TempS; sscanf(cmd, "%hx", &TempS); Memory_StorWord(addr, TempS); } else { long TempL; sscanf(cmd, "%lx", &TempL); Memory_StorLongWord(addr, TempL); } } addr+=(width/8); } return 1; } coldfire-0.2.2/monitor/rd.c0100644000175000017500000000353210015265023014160 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); /* Dump processor registers */ int Monitor_PRD(int argc, char **argv) { printf("VBR: 0x%08lx\n", memory_core.vbr); return 1; } void rd_dump_registers(unsigned long cpc, unsigned long csr) { const char sr_str[2][17] = { "t.sm.000...xnzvc", "T.SM.111...XNZVC" }; int x; extern struct _board_data board_data; /* Here is the format, right from coldfire PC: 0001002C SR: 2000 [t.Sm.000...xnzvc] An: 00012000 00011500 00020001 00000000 00000000 00000000 00000000 00080000 Dn: 00DE90F0 00000000 00000000 FFFFFFFF 00000000 00000000 00000000 00000000 */ /* The PC and SR */ printf("PC: %08lX SR: %04lX [", cpc, csr); /* The expanded SR */ for(x=0;x<16;x++) printf("%c", sr_str[(csr>>(15-x))&0x1][x]); printf("]"); if(!monitor_config.dbug_compatibility) printf(" Cycles: 0x%08lx (%ldd)",board_data.cycle_count,board_data.cycle_count); /* A and D registers */ printf("\nAn:"); for(x=0;x<7;x++) printf(" %08lX", memory_core.a[x]); /* Add 8 to remove the exception stackframe from the stack * before printing it */ printf(" %08lX", memory_core.a[x]/*+8*/); printf("\nDn:"); for(x=0;x<8;x++) printf(" %08lX", memory_core.d[x]); printf("\n"); } /* Dump register(s) */ int Monitor_RD(int argc, char **argv) { unsigned long current_PC; unsigned long current_SR; Memory_Retr(¤t_PC, 32, memory_core.a[7]+4); Memory_Retr(¤t_SR, 16, memory_core.a[7]+2); if(argc == 1) { rd_dump_registers(current_PC, current_SR); } /* else Monitor_CFRD(argv[1]);*/ return 1; } coldfire-0.2.2/monitor/rm.c0100644000175000017500000000256010015265023014171 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); /* Modify a register */ int Monitor_RM(int argc, char **argv) { unsigned int x; unsigned long value; char register_str[8]; if(argc != 3) return Monitor_show_help("rm"); sscanf(argv[1], "%s", register_str); sscanf(argv[2], "%lx", &value); printf("%s = %lx\n", register_str, value); if((register_str[0]=='D') || (register_str[0]=='d')) { if(1 != sscanf(register_str+1, "%u", &x)) return Monitor_show_help("rm"); if(x > 7) { printf("Error: Invalid register_str: %s\n", register_str); return 1; } memory_core.d[x]=value; } else if((register_str[0]=='A') || (register_str[0]=='a')) { if(1 != sscanf(register_str+1, "%u", &x)) return Monitor_show_help("rm"); if(x > 7) { printf("Error: Invalid register_str: %s\n", register_str); return 1; } memory_core.a[x]=value; } else if(strcasecmp(register_str, "PC") == 0) { memory_core.pc=value; /* Also stuff it into the stackframe */ Memory_Stor(32,memory_core.a[7]+4,memory_core.pc); }/* else Monitor_CFRM(Str);*/ return 1; } coldfire-0.2.2/monitor/ss.c0100644000175000017500000000413410015265023014177 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* Monitor Show Stats */ /* by Matt Minnis */ #include #include #include #include "coldfire.h" int Monitor_SS(int argc, char **argv) { #ifdef MEMORY_STATS int Temp; int i; if(argc==1) { printf("\nColdfire CPU Usage Statisitcs:\n" "==================================\n"); Temp=0; printf("Data Registers:\t\t"); printf("Address Registers:\n"); for (i=0; i < 8; i++) { printf("%6d : D%d",Stats_DReg[i],i); printf("\t\t\t%6d : A%d\n",Stats_AReg[i],i); } printf("\nAddressing Modes:\n"); printf("%6d : Dy data register direct\n",Stats_Mode[sDRD]); printf("%6d : Ay address register direct\n",Stats_Mode[sARD]); printf("%6d : (Ay) address register indirect\n",Stats_Mode[sARI]); printf("%6d : (Ay)+ ari with postincrement\n",Stats_Mode[sARIPO]); printf("%6d : -(Ay) ari with predecrement\n",Stats_Mode[sARIPR]); printf("%6d : (d16,Ay) ari with displacement\n",Stats_Mode[sARID]); printf("%6d : (d8,Ay,Xi) ari with index base\n",Stats_Mode[sARIIB]); printf("%6d : (xxx).W absolute short\n",Stats_Mode[sAS]); printf("%6d : (xxx).L absolute long\n",Stats_Mode[sAL]); printf("%6d : # immediate\n",Stats_Mode[sIM]); printf("%6d : (d16,PC) program counter indirect disp\n",Stats_Mode[sPCID]); printf("%6d : (d8,PC,Xi) pci with index base\n",Stats_Mode[sPCIIB]); printf("%6d : None Bad Addressing Mode\n",Stats_Mode[sBAD]); } else if(argc==2 && (argv[1][0] == 'C' || argv[1][0] == 'c')) { for (i=0; i<8; i++) { Stats_DReg[i]=0; Stats_AReg[i]=0; } for (i=0; i < sBAD; i++) Stats_Mode[i]=0; } else { return Monitor_show_help("SS"); } #else printf("Memory Stats were not compiled into this build.\n"); printf("Use 'configure --enable-mem-stats' and rebuild to enable stat gathering\n"); #endif return 1; } coldfire-0.2.2/monitor/reset.c0100644000175000017500000000102110015265023014664 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* reset.c */ /* by Matt Minnis */ /* 2003-03-31 David Grant * - Changed to use board_reset */ #include #include "coldfire.h" int Monitor_RESET(int argc, char **argv) { printf("Hard Reset..."); board_reset(); return 1; } coldfire-0.2.2/monitor/set.c0100644000175000017500000000255010015265023014345 0ustar davedave/**********************************/ /* */ /* Copyright 2000, 2001 David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_SET(int argc, char **argv) { char cmd[16]="", value[8]=""; if(argc==1) { /* Show compatability */ printf("dBUG output compatability: %s\n", monitor_config.dbug_compatibility == 1 ? "ON" : "OFF"); printf("Disassemble lines: %d\n", monitor_config.disassemble_lines); return 1; } if(argc != 3) { Monitor_show_help("set"); return 1; } sscanf(argv[1], "%s", cmd); sscanf(argv[2], "%s", value); if(strcasecmp(cmd, "compat")==0) { if(strcasecmp(value,"off") == 0 || strcasecmp(value,"0") == 0 || strcasecmp(value,"no") == 0) { monitor_config.dbug_compatibility = 0; } else { monitor_config.dbug_compatibility = 1; } printf("dBUG output compatability has been turned %s\n", monitor_config.dbug_compatibility == 1 ? "ON" : "OFF"); } else if(strcasecmp(cmd, "dislen")==0) { sscanf(value, "%d", &monitor_config.disassemble_lines); printf("Disassemble lines set to %d lines\n", monitor_config.disassemble_lines); } return 1; } coldfire-0.2.2/monitor/cfrm.c0100644000175000017500000000356410015265024014510 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); /* Modify a CFRegister */ int Monitor_CFRM(int argc, char **argv) { struct _sim_register *reg; unsigned long value=0; char CFRegister[8]; if(argc!=3) return Monitor_show_help("cfrm"); sscanf(argv[1], "%s", CFRegister); sscanf(argv[2], "%lx", &value); reg = sim->register_lookup_by_name(CFRegister); if(!reg) { printf ("CFRegister: %s not found\n",CFRegister); return 1; } Memory_Stor(reg->width, memory_core.mbar + reg->offset, value); printf("%s = %lx [%s: %s]\n", CFRegister, value, reg->name, reg->description); return 1; } /* Display a CFRegister */ int Monitor_CFRD(int argc, char **argv) { struct _sim_register *reg; char CFRegister[8]; unsigned long Value; if(argc != 2) return Monitor_show_help("cfrd"); sscanf(argv[1], "%s", CFRegister); reg = sim->register_lookup_by_name(CFRegister); if(!reg) { printf ("CFRegister: %s not found\n",CFRegister); return 1; } Memory_Retr(&Value, reg->width, memory_core.mbar + reg->offset); printf("CFRegister(%s) = %8lx\n", CFRegister, Value); return 1; } /* Dump info about all sim registers */ int Monitor_CFRI(int argc, char **argv) { struct _sim_register *reg; int x; char *rw[4] = { "None, hmm.. doesn't that make it difficult to access?", "W", "R", "R/W" }; for(x=0;x<0x200;x++) { reg = sim->register_lookup_by_offset(x); if(!reg) continue; printf("%s: %s\n", reg->name, reg->description); printf("\toffset=0x%lx, %d-bit, %s, reset=0x%08lx\n", reg->offset, reg->width, rw[(reg->read<<1)+reg->write], reg->resetvalue); } return 1; } coldfire-0.2.2/monitor/help.c0100644000175000017500000000613710015265024014510 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" #include "version.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_HELP_PrintVersion (int argc, char **argv) { printf("%s\n%s\n",TITLE,COPYRIGHT); printf("Version: %s\n", VERSION); return 1; } int Monitor_ALIAS(int argc, char **argv) { printf("\n"); printf("Command Aliases:\n"); printf("--------------------------\n"); printf("help:\t\thelp, ?\n"); printf("quit:\t\tquit, exit, q, bye \n"); printf("reset:\t\treset, reboot \n"); printf("set:\t\tset, env\n"); printf("ss:\t\tstat, stats, ss \n"); printf("trace:\t\tstep, trace, tr\n"); printf("time:\t\ttime, t\n"); printf("\n"); return 1; } int Monitor_show_help(char *cmd) { if(strcasecmp(cmd, "mm") == 0) { printf("MM.W (address) - Edit words at address\n"); printf("MM.L (address) - Edit longs at address\n"); } else if(strcasecmp(cmd, "rm") == 0) { printf("RM ([A|D][0-7])|(PC) - Edit register\n"); } else if(strcasecmp(cmd, "ss") == 0) { printf("SS 'SS' to show statistics , 'SS C' or 'SS Clear' to rezero\n"); } else if(strcasecmp(cmd, "set") == 0) { printf("SET COMPAT [on|off] Try to behave and look like dBUG\n"); printf("SET DISLEN Set number of lines DI disassembles\n"); } return 1; } int Monitor_HELP(int argc, char **argv) { if(argc == 2) return Monitor_show_help(argv[1]); printf("\n"); Monitor_HELP_PrintVersion(0, NULL); printf("\n"); printf("Commands:\n"); printf("--------------------------\n"); /* In alphabetical order ... */ printf("ALIAS List alternate command names\n"); printf("BR [] Display or Set Breakpoints\n"); printf("CFRD Coldfire CPU Peripheral Register dump\n"); printf("CFRI Dumps Coldfire Peripheral register names & info\n"); printf("CFRM Modify Coldfire CPU Peripheral registers\n"); printf("DE Download elf object file\n"); printf("DI
Disassemble at address\n"); printf("DL Download filename into the emulator (.s19 or binary)\n"); printf("DN Download Network. (Not implemented)\n"); printf("EXIT Exits the emulator\n"); printf("GO
Start running at address\n"); printf("MM.L
Memory edit (long)\n"); printf("MM.W
Memory edit (word)\n"); printf("RD Register dump\n"); printf("PRD Processor Register dump\n"); /* printf("PRD Processor Register dump\n");*/ printf("RM Modify cpu registers\n"); printf("SS [(c)lear] Show Statistics for CPU registers & addressing\n"); printf("COMPAT Set monitor run time options\n"); printf("TRACE Trace count instructions\n"); printf("TIME Show an estimate for how much time has elapsed\n"); printf("\n"); return 1; } coldfire-0.2.2/monitor/Makefile.in0100644000175000017500000000040410015265024015450 0ustar davedave TOPSRCDIR = @top_srcdir@ SUBDIRS = BUILD = monitor.o C_SRCS = br.c cfrm.c de.c di.c dl.c dn.c go.c help.c main.c \ md.c mm.c quit.c rd.c reset.c rm.c \ set.c ss.c time.c trace.c tracer.c @MAKEFILE_RULES@ $(BUILD): $(OBJS) $(LD_R) $(OBJS) -o $@ coldfire-0.2.2/monitor/trace.c0100644000175000017500000000241110015265024014645 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); /* For counting the number of instructions left to trace */ long Trace_InstructionCount=0; int Monitor_TRACE(int argc, char **argv) { unsigned long frame; if(argc > 1) sscanf(argv[1], "%lx", &Trace_InstructionCount); else Trace_InstructionCount = 1; /* Get the to-be-restored stack pointer, and set the T bit */ Memory_Retr(&frame, 32, memory_core.a[7]); frame |= 0x00008000; Memory_Stor(32,memory_core.a[7],frame); /* Trace on */ SRBits->T=1; /* Continue execution */ return 0; } void Monitor_TRACE_Entry(short Vector, char *enter_monitor, char *dump_info) { unsigned long frame; *dump_info=1; Trace_InstructionCount--; if(Trace_InstructionCount == 0) { SRBits->T = 0; /* Stop tracing when the count == 0 */ Memory_Retr(&frame, 32, memory_core.a[7]); frame &= ~0x00008000; Memory_Stor(32,memory_core.a[7],frame); *enter_monitor = 1; } else { *enter_monitor = 0; } } coldfire-0.2.2/monitor/main.c0100644000175000017500000001525210020476211014500 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); char Monitor_Initialized = 0; struct _monitor_config monitor_config; static void Monitor_Init(void) { struct _board_data *bd = board_get_data(); printf("Initializing monitor...\n"); /* Set default PC */ /* memory_core.pc = 0x10000;*/ /* Initialize default config */ monitor_config.disassemble_lines = 16; monitor_config.dbug_compatibility = 1; if(bd->cpu == CF_5206) { /* Initialize the ICR registers... the real dBUG apparently * changes the default inizialization from the chip */ unsigned char ICR_init_value[13] = {0x85, 0x8B, 0x8E, 0x12, 0x95, 0x98, 0x9F, 0x1E, 0x97, 0x96, 0x8C, 0x8E, 0x8D}; int x; for(x=0;x<13;x++) { Memory_Stor(8, memory_core.mbar + 0x14 + x, ICR_init_value[x]); } /* Also change the default mask */ Memory_Stor(16, memory_core.mbar+0x36, 0x3F7E); } /* { int x, y; char line[128]; FILE *out; printf("Preping disassemble list\n"); out=fopen("di.txt", "wt"); for(x=0;x<0xffff;x++) { Memory_Stor(16, 0x10000, x); printf("0x%08x\r", x); for(y=0;y<0xffff; y++) { Memory_Stor(16, 0x10002, y); Monitor_InstructionDI(0x10000, line); fprintf(out, "%s\n", line); } } fclose(out); } */ printf("Enter 'help' for help.\n"); } struct _MonitorCommand { char *cmd; int (*func)(int argc, char **argv); } MonitorCommand[] = { {"alias", &Monitor_ALIAS}, {"br", &Monitor_BR}, {"cfrd", &Monitor_CFRD}, {"cfri", &Monitor_CFRI}, {"cfrm", &Monitor_CFRM}, {"de", &Monitor_DE}, {"dl", &Monitor_DL}, {"di", &Monitor_DI}, {"dn", &Monitor_DN}, {"go", &Monitor_GO}, {"md", &Monitor_MD}, {"mm.w", &Monitor_MM}, {"mm.l", &Monitor_MM}, {"prd", &Monitor_PRD}, {"trace", &Monitor_TRACE}, {"step", &Monitor_TRACE}, {"tracer", &monitor_tracer}, {"rd", &Monitor_RD}, {"reset", &Monitor_RESET}, /* Eventually: Soft boot */ {"reboot", &Monitor_RESET}, /* Eventually: Hard boot */ {"rm", &Monitor_RM}, {"set", &Monitor_SET}, {"env", &Monitor_SET}, {"ss", &Monitor_SS}, {"stat", &Monitor_SS}, {"stats", &Monitor_SS}, {"t", &Monitor_TIME}, {"time", &Monitor_TIME}, {"help", &Monitor_HELP}, {"?", &Monitor_HELP}, {"ver", &Monitor_HELP_PrintVersion}, /* Cover all the bases here :) */ {"v", &Monitor_HELP_PrintVersion}, {"quit", &Monitor_QUIT}, {"q", &Monitor_QUIT}, {"exit", &Monitor_QUIT}, {"bye", &Monitor_QUIT}, {NULL, NULL} }; #ifdef HAVE_LIBREADLINE extern unsigned char* readline(char *prompt); extern void add_history(unsigned char *line); #endif void Monitor_Entry(void) { #ifdef HAVE_LIBREADLINE char *input; #else char input[128]; #endif int x, Result=0; int argc; char *argv[8]; while(1) { #ifdef HAVE_LIBREADLINE input=(char *)readline("dBug> "); if(!input) { /* End of input from command line */ Run_Exit = 1; break; } if(input[0]) add_history((unsigned char *)input); #else printf("dBug> "); input[0] = 0; fgets(input, 81, stdin); #endif argc = arg_split(&argv[0], input, 8); if(argc == 0) continue; /* printf("%d args: ", argc); for(x=0;x #include #include #define TRACER_OFF #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_QUIT(int argc, char **argv) { Run_Exit = 1; return 0; } coldfire-0.2.2/monitor/time.c0100644000175000017500000000341710015265024014514 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* Time.c */ /* Provide Cycle Counting */ /* to Approximate Elapsed */ /* Time. */ /* by Matt Minnis */ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int Monitor_TIME (int argc, char **argv) { register unsigned long seconds; register unsigned long nano_seconds; struct _board_data *b = board_get_data(); /* 1e9 ns 1 ns * ------------ * ------------- = ------ * second cycles/second cycle */ unsigned long ns_per_cycle = 1000000000 / b->clock_speed; /* Remember, clock speed is cycles in a second */ TRACE("ns_per_cycle = %lu\n", ns_per_cycle); if(argc==2 && (argv[1][0] == 'c' || argv[1][0] == 'r')) { b->total_cycle_count += b->cycle_count; b->cycle_count = 0; printf("Cycle Counter Cleared: OK\n"); } else { unsigned long total = b->total_cycle_count + b->cycle_count; /* cycles 1 seconds * * ------------- = * cycles/second */ seconds = total / b->clock_speed; /* Grab cycles and multiply by ns / cycle to give ns */ nano_seconds = (total % b->clock_speed) * ns_per_cycle; printf("\nTotal Cycles: %8lu (%lu.%09lus)\n", total, seconds, nano_seconds); seconds = b->cycle_count / b->clock_speed; nano_seconds = (b->cycle_count % b->clock_speed) * ns_per_cycle; printf(" Cycles: %8lu (%lu.%09lus)\n", b->cycle_count, seconds, nano_seconds); } return 1; } coldfire-0.2.2/monitor/elf-include.h0100644000175000017500000000633110015265024015750 0ustar davedave#ifndef __ELF_H #define __ELF_H typedef char BYTE; typedef unsigned char UBYTE; typedef short WORD; typedef unsigned short UWORD; typedef long LONG; typedef unsigned long ULONG; typedef char * STRPTR; /*#define SUN #define BIGENDIAN*/ #ifdef BIGENDIAN #define ECW(i) (i) #define ECL(i) (i) #else #define ECW(i) ( (((i)&0xFF)<<8) | (((i)>>8)&0xff) ) #define ECL(i) ( (((i)&0xFF)<<24) | (((i)<<8)&0xff0000) | (((i)>>8)&0xff00) | ((i)>>24)) #endif #define EI_NIDENT 16 struct Elf32_Ehdr { UBYTE e_ident[EI_NIDENT]; UWORD e_type; UWORD e_machine; ULONG e_version; ULONG e_entry; ULONG e_phoff; ULONG e_shoff; ULONG e_flags; UWORD e_ehsize; UWORD e_phentsize; UWORD e_phnum; UWORD e_shentsize; UWORD e_shnum; UWORD e_shstrndx; }; /* --- e_indent indexes ---*/ #define EI_MAG0 0 #define EI_MAG1 1 #define EI_MAG2 2 #define EI_MAG3 3 #define EI_CLASS 4 #define EI_DATA 5 #define EI_VERSION 6 #define EI_PAD 7 /* --- EI_CLASS ---*/ #define ELFCLASSNONE 0 #define ELFCLASS32 1 #define ELFCLASS64 2 /* --- EI_DATA --- */ #define ELFDATANONE 0 #define ELFDATA2LSB 1 #define ELFDATA2MSB 2 /* --- e_type --- */ #define ET_NONE 0 #define ET_REL 1 #define ET_EXEC 2 #define ET_DYN 3 #define ET_CORE 4 /* --- e_version --- */ #define EV_NONE 0 #define EV_CURRENT 1 /* --- e_machine --- */ #define EM_NONE 0 #define EM_M32 1 #define EM_SPARC 2 #define EM_386 3 #define EM_68K 4 #define EM_88K 5 #define EM_860 7 #define EM_MIPS 8 #define EM_POWERPC 20 struct Elf32_Shdr { ULONG sh_name; ULONG sh_type; ULONG sh_flags; ULONG sh_addr; ULONG sh_offset; ULONG sh_size; ULONG sh_link; ULONG sh_info; ULONG sh_addralign; ULONG sh_entsize; }; /* --- special sections indexes --- */ #define SHN_UNDEF 0 #define SHN_ABS 0xfff1 #define SHN_COMMON 0xfff2 /* --- sh_type --- */ #define SHT_NULL 0 #define SHT_PROGBITS 1 #define SHT_SYMTAB 2 #define SHT_STRTAB 3 #define SHT_RELA 4 #define SHT_HASH 5 #define SHT_DYNAMIC 6 #define SHT_NOTE 7 #define SHT_NOBITS 8 #define SHT_REL 9 #define SHT_SHLIB 10 #define SHT_DYNSYM 11 /* --- sh_flags --- */ #define SHF_WRITE 0x1 #define SHF_ALLOC 0x2 #define SHF_EXECINSTR 0x4 struct Elf32_Sym { ULONG st_name; ULONG st_value; ULONG st_size; UBYTE st_info; UBYTE st_other; UWORD st_shndx; }; /* --- st_info --- */ #define ELF32_ST_BIND(i) ((i)>>4) #define ELF32_ST_TYPE(i) ((i)&0xf) #define ELF32_ST_INFO(b,t) (((b)<<4)+((t)&0xf)) /* --- ST_BIND --- */ #define STB_LOCAL 0 #define STB_GLOBAL 1 #define STB_WEAK 2 /* --- ST_TYPE --- */ #define STT_NOTYPE 0 #define STT_OBJECT 1 #define STT_FUNC 2 #define STT_SECTION 3 #define STT_FILE 4 struct Elf32_Rel { ULONG r_offset; ULONG r_info; }; struct Elf32_Rela { ULONG r_offset; ULONG r_info; ULONG r_addend; }; /* --- r_info --- */ #define ELF32_R_SYM(i) ((i)>>8) #define ELF32_R_TYPE(i) ((UBYTE)(i)) #define ELF32_R_INFO(s,t) (((s)<<8)+(UBYTE)(t)) struct Elf32_Phdr { ULONG p_type; ULONG p_offset; ULONG p_vaddr; ULONG p_paddr; ULONG p_filesz; ULONG p_memsz; ULONG p_flags; ULONG p_align; }; #define PT_NULL 0 #define PT_LOAD 1 #define PT_DYNAMIC 2 #define PT_INTERP 3 #define PT_NOTE 4 #define PT_SHLIB 5 #define PT_PHDR 6 #endif coldfire-0.2.2/monitor/monitor.h0100644000175000017500000000412010015265024015242 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see ../LICENSE for more details */ /* */ /**********************************/ /* Function calls the outside world can know about */ /*void Monitor_Init(void);*/ void Monitor_Entry(void); void Monitor_HandleException(short Vector); /* Functions the outside world shouldn't call */ /* Notes: * - Return values of 1 indicate "stay in monitor" * - Values of 0 indicate, return from exception */ int Monitor_ALIAS(int argc, char **argv); int Monitor_BR(int argc, char **argv); void Monitor_BR_EnterException(void); void Monitor_BR_ExitException(void); void Monitor_BR_Entry(short Vector, char *enter_monitor, char *dump_info); int Monitor_CFRM(int argc, char **argv); int Monitor_CFRM(int argc, char **argv); int Monitor_CFRD(int argc, char **argv); int Monitor_CFRI(int argc, char **argv); int Monitor_SET(int argc, char **argv); int Monitor_SS (int argc, char **argv); int Monitor_DI(int argc, char **argv); int Monitor_DE(int argc, char **argv); int Monitor_DL(int argc, char **argv); int Monitor_DN(int argc, char **argv); int Monitor_GO(int argc, char **argv); int Monitor_HELP(int argc, char **argv); int Monitor_show_help(char *cmd); int Monitor_HELP_PrintVersion(int argc, char **argv); int Monitor_InstructionDI(long FromPC, char *Buffer); int Monitor_MD(int argc, char **argv); int Monitor_MM(int argc, char **argv); int Monitor_PRD(int argc, char **argv); int Monitor_QUIT(int argc, char **argv); int Monitor_RD(int argc, char **argv); int Monitor_RM(int argc, char **argv); int Monitor_TRACE(int argc, char **argv); void Monitor_TRACE_Entry(short Vector, char *enter_monitor, char *dump_info); int PrintVersion(int argc, char **argv); int Monitor_TIME(int argc, char **argv); int Monitor_RESET(int argc, char **argv); int monitor_tracer(int argc, char **argv); /* Data for the monitor */ struct _monitor_config { int disassemble_lines; char dbug_compatibility; }; extern struct _monitor_config monitor_config; coldfire-0.2.2/monitor/tracer.c0100644000175000017500000000077510015265025015043 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* & Matt Minnis */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(monitor); int monitor_tracer(int argc, char **argv) { if(argc > 1) tracer_setuptrace(argv[1]); /* Stay in the monitor */ return 1; } coldfire-0.2.2/i_5206/0042755000175000017500000000000010057152031012626 5ustar davedavecoldfire-0.2.2/i_5206/i_trapf.c0100644000175000017500000000421210015265026014413 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Trapf instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | OpMode | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Optional Immediate Word | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Optional Immediate Word | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int TRAPFTime=1; TRACER_DEFAULT_CHANNEL(i_trapf); INSTRUCTION_2ARGS(TRAPF, unsigned Code1,13, unsigned OpMode,3); static void execute(void) { TRAPF_Instr Instr; unsigned long dummy; Memory_RetrWordFromPC(&Instr.Code); TRACE("OpMode=0x%02x\n", Instr.Bits.OpMode); switch(Instr.Bits.OpMode) { case 0x2: /* One extension word */ Memory_RetrWordFromPC(&dummy); break; case 0x3: /* Two extension words */ Memory_RetrLongWordFromPC(&dummy); break; case 0x4: /* No extension words */ break; default: ERR("Invalid OpMode=%d\n", Instr.Bits.OpMode); break; } TRACE("Done\n"); cycle(TRAPFTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { TRAPF_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); switch(Instr.Bits.OpMode) { case 0x2: /* One extension word */ sprintf(Instruction, "TRAPF.W"); Addressing_Print(16, 7, 4, Arg1); break; case 0x3: /* Two extension words */ sprintf(Instruction, "TRAPF.L"); Addressing_Print(32, 7, 4, Arg1); break; case 0x4: /* No extension words */ sprintf(Instruction, "TRAPF"); break; default: ERR("Invalid OpMode=%d\n", Instr.Bits.OpMode); break; } Arg2[0]=0; return 0; } long trapf_5206_register(void) { instruction_register(0x51F8, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_illegal.c0100644000175000017500000000237610015265026014721 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Generate Illegal Instruction (ILLEGAL) */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ TRACER_DEFAULT_CHANNEL(i_illegal); INSTRUCTION_1ARG(ILLEGAL, unsigned Code,16); static void execute(void) { unsigned long dummy; /* Read the instruction with out storing it.. we already know what it is */ Memory_RetrWordFromPC(&dummy); TRACE("Generaing illegal instruction exception...\n"); exception_do_exception(4); TRACE("Done.\n"); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long dummy; Memory_RetrWordFromPC(&dummy); sprintf(Instruction, "ILLEGAL"); Arg1[0]=0; Arg2[0]=0; return 0; } long illegal_5206_register(void) { instruction_register(0x4AFC, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_mulu_l.c0100644000175000017500000000546110015265026014603 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Long Unsigned multiply (MULU.L) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | Register | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int MULLTime[8]={18, 20, 20, 20, 20, -1, -1, -1}; TRACER_DEFAULT_CHANNEL(i_mulu_l); INSTRUCTION_3ARGS(MULU_L, unsigned Code1,10, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; char Register; unsigned long Instr2; MULU_L_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&Instr2); Register=(Instr2 & 0x7000) >> 12; if(Instr.Bits.EAMode==1) { ERR("May Not specify Address Register (Ay) for MULU.L"); return; } else if(Instr.Bits.EAMode==7) { ERR("May Not specify Direct Addressing for MULU.L"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); /* FIXME: I'm not sure if this discards the upper 32 bits (as required in the spec) or if it does something FuNkY */ if(Instr2 & 0x0800) { /* Signed multiply */ Result = (long)(SValue) * (long)(DValue); } else { /* Unsigned multiply */ Result = (unsigned long)(SValue) * (unsigned long)(DValue); } TRACE("0x%08lx * 0x%08lx = 0x%08lx\n", SValue, DValue, Result); /* Set the status register */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(MULLTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long Instr2; char Register; MULU_L_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&Instr2); Register=(Instr2 & 0x7000) >> 12; sprintf(Instruction, "MUL%c.L", (Instr2 & 0x0800) ? 'S' : 'U'); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Register, Arg2); return 0; } long mulu_l_5206_register(void) { instruction_register(0x4C00, 0xFFC0, &execute, &disassemble); return 2; } coldfire-0.2.2/i_5206/i_mulu_w.c0100644000175000017500000000535410015265026014617 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Word Unsigned multiply (MUL.W) instruction */ /* Word Unsigned multiply (MULS.W) instruction */ /* Format for MUL.W 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 0 | 0 | Register | 0 | 1 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Format for MULS.W 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 0 | 0 | Register |U/S| 1 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int MULWTime[8]={9, 11, 11, 11, 11, 12, 11, 9}; TRACER_DEFAULT_CHANNEL(i_mul_w); INSTRUCTION_6ARGS(MUL_W, unsigned Code2,4, unsigned Register,3, unsigned US,1, unsigned Code1,2, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; MUL_W_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.EAMode==1) { ERR("May Not specify Address Register (Ay) for MUL.W"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 16, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetValue(&SValue, &Source); TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); if(Instr.Bits.US == 0) { /* Unsigned */ Result = (unsigned short)(SValue&0x0000FFFF) * (unsigned short)(DValue&0x0000FFFF); } else { Result = (short)(SValue&0x0000FFFF) * (short)(DValue&0x0000FFFF); } TRACE("0x%04lx * 0x%04lx = 0x%04lx\n", (SValue&0x0000FFFF), (DValue&0x0000FFFF), Result); /* Set the status register */ memory_core.sr &= 0xFF00; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(MULWTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { MUL_W_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.US == 0) /* Unsigned */ sprintf(Instruction, "MULU.W"); else sprintf(Instruction, "MULS.W"); Addressing_Print(16, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long mul_w_5206_register(void) { instruction_register(0xC0C0, 0xF0C0, &execute, &disassemble); return 2; } coldfire-0.2.2/i_5206/Makefile.in0100644000175000017500000000117110015265026014671 0ustar davedave TOPSRCDIR = @top_srcdir@ SUBDIRS = BUILD = i.o C_SRCS = i_add.c i_adda.c i_addi.c i_addq.c i_addx.c i_and.c \ i_andi.c i_asx.c i_bcc.c i_btst.c i_clr.c i_cmp.c \ i_cmpa.c i_cmpi.c i_dc.c i_eor.c i_eori.c i_ext.c \ i_halt.c i_illegal.c i_jmp.c i_jsr.c i_lea.c \ i_link.c i_lsx.c i_move.c i_movec.c i_movem.c \ i_moveq.c i_movexr.c i_mulu_l.c i_mulu_w.c \ i_neg.c i_negx.c i_nop.c i_not.c i_or.c \ i_ori.c i_pea.c i_rte.c i_rts.c i_scc.c i_stop.c \ i_sub.c i_suba.c i_subi.c i_subq.c i_subx.c \ i_swap.c i_trap.c i_trapf.c i_tst.c i_unlk.c @MAKEFILE_RULES@ $(BUILD): $(OBJS) $(LD_R) $(OBJS) -o $@ coldfire-0.2.2/i_5206/i_dc.c0100644000175000017500000000247510015265026013676 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* DC.W */ /* Format ... well.. anything that any of the other instructions don't handle 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ TRACER_DEFAULT_CHANNEL(i_dc); INSTRUCTION_1ARG(DC, unsigned Code1,16); static void execute(void) { unsigned long dummy; TRACE("Called\n"); /* Read the instruction, we already know what it is */ Memory_RetrWordFromPC(&dummy); TRACE("Value=0x%04x, doing exception vector 4\n", dummy); /* Do an exception */ exception_do_exception(4); TRACE("Done\n"); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long dummy; Memory_RetrWordFromPC(&dummy); sprintf(Instruction, "DC.W"); sprintf(Arg1, "0x%04lx", dummy); Arg2[0]=0; return 0; } long dc_5206_register(void) { instruction_register(0x0000, 0x0000, &execute, &disassemble); return 0; } coldfire-0.2.2/i_5206/i_or.c0100644000175000017500000000635510015265027013732 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* OR instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 0 | 0 | Register | OPmode | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ORTime[2][8]={{1, 3, 3, 3, 3, 4, 3, 1}, {-1, 3, 3, 3, 3, 4, 3, -1}}; TRACER_DEFAULT_CHANNEL(i_or); INSTRUCTION_5ARGS(OR, unsigned Code1,4, unsigned Register,3, unsigned OPMode,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; OR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.OPMode==2) { /* y | Dx */ TRACE("y | Dx -> Dx\n"); if(Instr.Bits.EAMode==1) { ERR("May not specify Ax for source"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; } else if (Instr.Bits.OPMode==6) { /* Dy | x -> x */ if(Instr.Bits.EAMode==0) { ERR("May not specify Dx for destination when source is Dx"); return; } else if (Instr.Bits.EAMode==1) { ERR("May not specify Ax for destination when source is Dx"); return; } else if (Instr.Bits.EAMode==7 && Instr.Bits.EARegister==4) { ERR("May not specify Immediate Addressing for destination"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.Register)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; } else { ERR("Unknown OPMode %d", Instr.Bits.OPMode); return; } EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue | DValue; TRACE("0x%08lx | 0x%08lx = 0x%08lx\n", SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); /* Set the status register * X - not affected * N - set it MSB or result is 1 * Z - set if result is zero * V,C always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Done\n"); if (Instr.Bits.OPMode==2) cycle(ORTime[0][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); else cycle(ORTime[1][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { OR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "OR.L"); if(Instr.Bits.OPMode==2) { /* y | Dx */ Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); } else { Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); } return 0; } long or_5206_register(void) { instruction_register(0x8000, 0xF000, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_adda.c0100644000175000017500000000355710015265027014204 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Add instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 0 | 1 | Register | 1 | 1 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ADDATime[]={-1, 3, 3, 3, 3, 4, 3, -1 }; TRACER_DEFAULT_CHANNEL(i_adda); INSTRUCTION_5ARGS(ADDA, unsigned Code2,4, unsigned Register,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; ADDA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 1, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue + DValue; TRACE("0x%08lx + 0x%08lx = 0x%08lx\n", SValue, DValue, Result); /* Status register is not affected */ TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(ADDATime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ADDA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ADDA.L"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 1, Instr.Bits.Register, Arg2); return 0; } long adda_5206_register(void) { instruction_register(0xD1C0, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_addi.c0100644000175000017500000000343010015265027014202 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Add Immediate (ADDI) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ADDITime=1; /* All the rest of the modes are not valid */ TRACER_DEFAULT_CHANNEL(i_addi); INSTRUCTION_2ARGS(ADDI, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; ADDI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 7, 4)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue + DValue; TRACE("0x%08lx + 0x%08lx = 0x%08lx\n", SValue, DValue, Result); /* Set the status register */ SR_Set(I_ADDI, SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done"); cycle(ADDITime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ADDI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ADDI.L"); Addressing_Print(32, 7, 4, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long addi_5206_register(void) { instruction_register(0x0680, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_addq.c0100644000175000017500000000465010015265027014217 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Add quick (ADDQ) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 1 | Data | 0 | 1 | 0 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ADDQTime[]={1, 3, 3, 3, 3, 4, 3, -1}; TRACER_DEFAULT_CHANNEL(i_addq); INSTRUCTION_5ARGS(ADDQ, unsigned Code2,4, unsigned Data,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Destination; unsigned long Result, SValue, DValue; ADDQ_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source: (pulling from immediate data=%d where {0=8})\n", Instr.Bits.Data); /* Instr.Data is the immedate data, 1-7 represents 1-7, 0 represents 8 */ SValue=Instr.Bits.Data; if(SValue==0) SValue = 8; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetValue(&DValue, &Destination); if(Instr.Bits.EAMode==7) { switch(Instr.Bits.EARegister) { case 2: ERR("(d_16,PC) addressing mode invalid."); return; case 3: ERR("(d_8,PC,Xn) addressing mode invalid."); return; case 4: ERR("# addressing mode invalid."); return; } } Result = SValue + DValue; TRACE("0x%08lx + 0x%08lx = 0x%08lx\n", SValue, DValue, Result); /* The condition codes are not affected when the destation is an address register */ if(Instr.Bits.EAMode!=1) SR_Set(I_ADDQ, SValue, DValue, Result); else ; /* Destination is an address register */ TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(ADDQTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ADDQ_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ADDQ.L"); sprintf(Arg1, "#0x%02X", (Instr.Bits.Data == 0) ? 8 : Instr.Bits.Data); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); return 0; } long addq_5206_register(void) { instruction_register(0x5080, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_addx.c0100644000175000017500000000354110015265027014224 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* AddX instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 0 | 1 |Register Dx| 1 | 1 | 0 | 0 | 0 | 0 |Register Dy| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ADDXTime=1; /* All the rest of the modes are not valid */ TRACER_DEFAULT_CHANNEL(i_addx); INSTRUCTION_4ARGS(ADDX, unsigned Code2,4, unsigned RegisterDx,3, unsigned Code1,6, unsigned RegisterDy,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; long Extend = SRBits->X; ADDX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.RegisterDy)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.RegisterDx)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue + DValue + Extend; TRACE("0x%08lx + 0x%08lx + %d = 0x%08lx\n", SValue, DValue, Extend, Result); SR_Set(I_ADDX, SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(ADDXTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ADDX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ADDX.L"); Addressing_Print(32, 0, Instr.Bits.RegisterDy, Arg1); Addressing_Print(32, 0, Instr.Bits.RegisterDx, Arg2); return 0; } long addx_5206_register(void) { instruction_register(0xD180, 0xF1F8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_andi.c0100644000175000017500000000430710015265027014220 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* AND instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Upper Word of Immediate Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Lower Word of Immediate Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ANDITime=1; TRACER_DEFAULT_CHANNEL(i_andi); INSTRUCTION_2ARGS(ANDI, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; ANDI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 7, 4)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue & DValue; TRACE("0x%08lx & 0x%08lx = 0x%08lx\n", SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); /* Set the status register * X - Not affected * N - Set if source is -ve, cleared otherwise * Z - Set if source is zero, cleared otherwise * V - always cleared * C - always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Done\n"); cycle(ANDITime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ANDI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ANDI.L"); Addressing_Print(32, 7, 4, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long andi_5206_register(void) { instruction_register(0x0280, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_btst.c0100644000175000017500000001115710015265027014262 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Bit Test (BTST) instruction */ /* Format, Bit number dynamic 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | Register | 1 | OP | EAMode |EARegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Format, Bit number static (immediate data) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | OP | EAMode |EARegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | Bit Number | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ OP: 00 == BTST 01 == BCHG 10 == BCLR 11 == BSET */ TRACER_DEFAULT_CHANNEL(i_btst); INSTRUCTION_6ARGS(BTST, unsigned Code2,4, unsigned Register,3, unsigned Dynamic,1, unsigned OP,2, unsigned EAMode,3, unsigned EARegister,3); int BTSTTime[2][8]={{1, 3, 3, 3, 3, -1, -1, 1}, {2, 3, 3, 3, 3, 4, 3, -1}}; static void execute(void) { struct _Address Destination, BitNum; unsigned long DValue, BitNumValue; long mask; BTST_Instr Instr; /* If the destination is a data register, size is longword, else, * size is byte */ char size; /* Pull the instruction */ Memory_RetrWordFromPC(&Instr.Code); /* Do this after fetching the instruction */ size = (Instr.Bits.EAMode == 0) ? 32 : 8; TRACE("pc=0x%08lx\n", memory_core.pc); /* Get the bit number FIRST, since the order of the opcode is * BTST [bit number] [EA offset] */ /* For dynamic (Dynamic==1) a data register is given, need 32 bits * from the register * For static (Dynamic==0) the bit number is the displacement * specified in the extension word, (8 bits from the PC) */ if(Instr.Bits.Dynamic == 1) { /* Dynamic, pull bit from a register */ if(!EA_GetFromPC(&BitNum, 32, 0, Instr.Bits.Register)) return; } else { /* Get the bit number from immediate data */ /* Magic happening here.... Remember, size 8 from the * PC skips the first byte, and only grabs the second * one of the word, so this is OK */ if(!EA_GetFromPC(&BitNum, 8, 7, 4)) return; } EA_GetValue(&BitNumValue, &BitNum); BitNumValue %= size; /* Longword for Data register, all others byte operation */ TRACE("Destination (size=%d):\n", size); if(!EA_GetFromPC(&Destination, size, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetValue(&DValue, &Destination); mask = (0x1 << BitNumValue); TRACE("Destination value is 0x%08lx, testing bit %d (mask=0x%08lx\n", DValue, BitNumValue, mask); /* Condition codes */ /* If the tested bit is 0, Z is set, else it is cleared */ /* Else, unchanged */ SRBits->Z = (DValue & mask) ? 0 : 1; switch(Instr.Bits.OP) { case 0: /* BTST */ /* leave the bit alone, short circuit to done */ TRACE("Done\n"); return; case 1: /* BCHG */ /* Toggle the bit */ DValue = (DValue & ~mask) | (DValue ^ mask); break; case 2: /* BCLR */ /* Clear the bit */ DValue &= ~mask; break; case 3: /* BSET */ /* Set the bit */ DValue |= mask; break; } EA_PutValue(&Destination, DValue); if (Instr.Bits.Dynamic == 1) cycle(BTSTTime[0][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); else cycle(BTSTTime[1][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); TRACE("Done\n"); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { BTST_Instr Instr; char size = (Instr.Bits.EAMode == 0) ? 32 : 8; Memory_RetrWordFromPC(&Instr.Code); switch(Instr.Bits.OP) { case 0: /* BTST */ /* sprintf(Instruction, "BTST%s", (size == 32) ? ".L" : ""); */ strcpy(Instruction, "BTST"); break; case 1: /* BCHG */ strcpy(Instruction, "BCHG"); break; case 2: /* BCLR */ strcpy(Instruction, "BCLR"); break; case 3: /* BSET */ strcpy(Instruction, "BSET"); break; } if(Instr.Bits.Dynamic == 1) Addressing_Print(32, 0, Instr.Bits.Register, Arg1); else Addressing_Print(8, 7, 4, Arg1); Addressing_Print(size, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); return 0; } long btst_5206_register(void) { /* Register both forms for the "same" instruction */ /* Dynamic */ instruction_register(0x0100, 0xF100, &execute, &disassemble); /* Static */ instruction_register(0x0800, 0xFF00, &execute, &disassemble); return 4; /* BTST, BCLR, BSET, BCHG */ } coldfire-0.2.2/i_5206/i_cmpa.c0100644000175000017500000000356310015265027014230 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Compare address (CMPA) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 1 | 1 | Register | 1 | 1 | 1 | EAMode |EARegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int CMPATime[8]={ 1, 3, 3, 3, 3, 4, 3, 1}; TRACER_DEFAULT_CHANNEL(i_cmpa); INSTRUCTION_5ARGS(CMPA, unsigned Code2,4, unsigned Register,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; CMPA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 1, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = DValue - SValue; TRACE("Comparing 0x%08lx with 0x%08lx\n", SValue, DValue); /* Set the status register */ SR_Set(I_CMPA, SValue, DValue, Result); TRACE("Done"); cycle(CMPATime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { CMPA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "CMPA.L"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 1, Instr.Bits.Register, Arg2); return 0; } long cmpa_5206_register(void) { instruction_register(0xB1C0, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_cmpi.c0100644000175000017500000000363410015265027014237 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Compare immediate (CMPI) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Upper Word of Immediate Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Lower Word of Immediate Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int CMPITime=1; TRACER_DEFAULT_CHANNEL(i_cmpi); INSTRUCTION_2ARGS(CMPI, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; CMPI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 7, 4)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = DValue - SValue; TRACE("Comparing 0x%08lx with 0x%08lx\n", SValue, DValue); /* Set the status register */ SR_Set(I_CMPI, SValue, DValue, Result); cycle(CMPITime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { CMPI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "CMPI.L"); Addressing_Print(32, 7, 4, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long cmpi_5206_register(void) { instruction_register(0x0C80, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_movexr.c0100644000175000017500000000636210015265030014622 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* MOVE to SR instruction * MOVE from SR instruction * MOVE to CCR instruction * MOVE from CCR instruction */ /* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MOVE to SR: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | Mode | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ MOVE from SR: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ MOVE to CCR: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | Mode | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ MOVE from CCR: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ TRACER_DEFAULT_CHANNEL(i_movexr); INSTRUCTION_6ARGS(MOVEXR, unsigned Code2,5, unsigned To,1, unsigned Reg,1, unsigned Code1,3, unsigned Mode,3, unsigned Register,3); int MOVE2SRTime=1; /* Add +6 for non immediate EA */ int MOVEXRTime=1; static void execute(void) { struct _Address Source; unsigned long SValue; char CCR; MOVEXR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); CCR = Instr.Bits.To ^ Instr.Bits.Reg; TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 16, Instr.Bits.Mode, Instr.Bits.Register)) return; TRACE("CCR=%d, Supervisor State=%d\n", CCR, SRBits->S); if(CCR == 0 && !SRBits->S ) { /* User state, ptivilege violation */ TRACE("Attempt to %s SR while in user state.\n", Instr.Bits.To ? "write" : "read"); exception_do_exception(8); return; } if(Instr.Bits.To) { EA_GetValue(&SValue, &Source); if(CCR == 0) { memory_core.sr = SValue; if( (Instr.Bits.Mode == 0x07) && (Instr.Bits.Register==0x04) ) cycle(MOVE2SRTime + 6); else cycle(MOVE2SRTime); } else { memory_core.sr = (memory_core.sr & 0xffffff00) | (SValue & 0x000000ff); cycle(MOVEXRTime); } } else { SValue = (unsigned long)((CCR==0) ? memory_core.sr : (memory_core.sr&0x000000ff) ); EA_PutValue(&Source, SValue); cycle(MOVEXRTime); } /* Don't play with the Status register any more :) */ TRACE("Done\n"); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { MOVEXR_Instr Instr; char CCR; Memory_RetrWordFromPC(&Instr.Code); CCR = Instr.Bits.To ^ Instr.Bits.Reg; sprintf(Instruction, "MOVE"); if(Instr.Bits.To) { char *ptr; ptr = Arg1; Arg1 = Arg2; Arg2 = ptr; } if(CCR) sprintf(Arg1, "CCR"); else sprintf(Arg1, "SR"); Addressing_Print(16, Instr.Bits.Mode, Instr.Bits.Register, Arg2); return 0; } long movexr_5206_register(void) { instruction_register(0x40C0, 0xF9C0, &execute, &disassemble); instruction_register(0x40C0, 0xF9C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_eori.c0100644000175000017500000000362310015265030014235 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* EORI Immediate (EORI) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int EORITime=1; TRACER_DEFAULT_CHANNEL(i_eori); INSTRUCTION_2ARGS(EORI, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; EORI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 7, 4)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue ^ DValue; TRACE("0x%08lx ^ 0x%08lx = 0x%08lx\n", SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); /* Set the status register * X - not affected * N - set if MSB or result is 1 * Z - set if result is zero * V,C always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Done"); cycle(EORITime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { EORI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "EORI.L"); Addressing_Print(32, 7, 4, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long eori_5206_register(void) { instruction_register(0x0A80, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_halt.c0100644000175000017500000000255210015265030014227 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* HALT instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int HALTTime=7; /* minimum time to halt per Sue Cozart */ TRACER_DEFAULT_CHANNEL(i_halt); INSTRUCTION_1ARG(HALT, unsigned Code,16); static void execute(void) { HALT_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(SRBits->S) { /* Supervisor State */ ERR("Halting the processor:\n"); return; } else { /* User state */ TRACE("Attempt to HALT while in user state\n"); /* FIXME: Generate an exception violation here */ } TRACE("Done\n"); cycle(HALTTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { HALT_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "HALT"); Arg1[0]=0; Arg2[0]=0; return 0; } long halt_5206_register(void) { instruction_register(0x4AC8, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_add.c0100644000175000017500000000544710015265030014035 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Add instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 0 | 1 | Register | OPmode | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ADDTime[2][8]={{1, 3, 3, 3, 3, 4, 3, 1 }, {-1, 3, 3, 3, 3, 4, 3, -1 }}; TRACER_DEFAULT_CHANNEL(i_add); INSTRUCTION_5ARGS(ADD, unsigned Code1,4, unsigned Register,3, unsigned OPMode,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; ADD_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.OPMode==2) { /* y + Dx */ TRACE("y + Dx -> Dx\n"); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; } else { /* Dy + x -> x */ TRACE("Dy + x -> x\n"); if(Instr.Bits.EAMode==0) { ERR("May not specify Dx for destination when source is Dx"); return; } else if (Instr.Bits.EAMode==1) { ERR("May not specify Ax for destination when source is Dx"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.Register)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; } EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue + DValue; TRACE("0x%08lx + 0x%08lx = 0x%08lx\n", SValue, DValue, Result); SR_Set(I_ADD, SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); if(Instr.Bits.OPMode==2) /* y + Dx */ cycle(ADDTime[0][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); else cycle(ADDTime[1][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ADD_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ADD.L"); if(Instr.Bits.OPMode==2) { /* y & Dx */ Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); } else { Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); } return 0; } long add_5206_register(void) { instruction_register(0xD000, 0xF000, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_bcc.c0100644000175000017500000001513110015265030014023 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Branch Contitionally, Branch Always (BRA) and Branch To Subroutine (BSR) instructions */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 1 | 0 | Condition | 8-Bit displacement | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 16-Bit displacement if 8bit is 00 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int BRATime = 2; int BSRTime = 3; int BCCTime[] = { 3, 1, 2, 3 }; TRACER_DEFAULT_CHANNEL(i_bcc); INSTRUCTION_3ARGS(BCC, unsigned Code1,4, unsigned Condition,4, signed Displacement,8); static void execute(void) { unsigned long Displacement; /* The PC for the branch contains the address of the BCC instruction _plus two_ */ unsigned long ReferencePC=memory_core.pc+2; BCC_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); Displacement=Instr.Bits.Displacement; if(Displacement==0) { Memory_RetrWordFromPC(&Displacement); Displacement = (short)Displacement; } TRACE("BCC: called, Displacement=%ld\n", Displacement); switch(Instr.Bits.Condition) { case 0: /* BRA */ /* Do nothing, this is always true */ TRACE("BCC: BRA %hx\n", Displacement); cycle(BRATime); goto i_bcc_do_branch; case 1: /* BSR */ /* Save the PC in the A7 stack pointer */ TRACE("BCC: BSR %hx\n", Displacement); Stack_Push(32, memory_core.pc); cycle(BSRTime); goto i_bcc_do_branch; case 2: /* BHI */ /* Branch if not carry, or not zero */ if(!SRBits->C && !SRBits->Z) { TRACE("BHI: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BHI: NOT Branching\n"); goto i_bcc_branch_not_taken; case 3: /* BLS */ /* Branch if low or same */ if(SRBits->C || SRBits->Z) { TRACE("BLS: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BLS: NOT Branching\n"); goto i_bcc_branch_not_taken; case 4: /* BCC */ /* Branch if carry cleared */ if(!SRBits->C) { TRACE("BCC: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BCC: NOT Branching\n"); goto i_bcc_branch_not_taken; case 5: /* BCS */ /* Branch if carry set */ if(SRBits->C) { TRACE("BCS: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BCS: NOT Branching\n"); goto i_bcc_branch_not_taken; case 6: /* BNE */ /* Branch if they are not equal, ie Dest-Source != 0 */ if(!SRBits->Z) { TRACE("BNE: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BNE: NOT Branching\n"); goto i_bcc_branch_not_taken; case 7: /* BEQ */ /* Don't branch if they are not equal */ if(SRBits->Z) { TRACE("BEQ: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BEQ: NOT branching\n"); goto i_bcc_branch_not_taken; case 8: /* BVC */ if(!SRBits->V) { TRACE("BVC: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BVC: NOT branching\n"); goto i_bcc_branch_not_taken; case 9: /* BVS */ if(SRBits->V) { TRACE("BVS: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BVS: NOT branching\n"); goto i_bcc_branch_not_taken; case 10: /* BPL */ if(!SRBits->N) { TRACE("BPL: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } goto i_bcc_branch_not_taken; case 11: /* BMI */ if(SRBits->N) { TRACE("BMI: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } goto i_bcc_branch_not_taken; case 12: /* BGE */ if((SRBits->N && SRBits->V) || (!SRBits->N && !SRBits->V)) { TRACE("BGE: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } goto i_bcc_branch_not_taken; case 13: /* BLT */ if((SRBits->N && !SRBits->V) || (!SRBits->N && SRBits->V)) { TRACE("BLT: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BLT: NOT branching\n"); goto i_bcc_branch_not_taken; case 14: /* BGT */ if((SRBits->N && SRBits->V && !SRBits->Z) || (!SRBits->N && !SRBits->V && !SRBits->Z)) { TRACE("BGT: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BGT: NOT branching\n"); goto i_bcc_branch_not_taken; case 15: /* BLE */ if((SRBits->Z) || (SRBits->N && !SRBits->V) || (!SRBits->N && SRBits->V)) { TRACE("BLE: Branching %hx\n", Displacement); goto i_bcc_branch_taken; } TRACE("BLE: NOT branching\n"); goto i_bcc_branch_not_taken; default: ERR("Unknown Condition Code 0x%02x\n", Instr.Bits.Condition); break; } ERR("This should NOT happen!\n"); return; /* Set the new PC */ i_bcc_branch_taken: cycle(BCCTime[ (Displacement > 0) ? 2 : 0 ]); i_bcc_do_branch: memory_core.pc=ReferencePC+Displacement; TRACE("BCC: New PC = %lx\n", memory_core.pc); return; i_bcc_branch_not_taken: cycle(BCCTime[ (Displacement > 0) ? 3 : 1 ]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long ReferencePC=memory_core.pc+2; unsigned long Displacement; BCC_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); Displacement=Instr.Bits.Displacement; switch(Instr.Bits.Condition) { case 0: /* BRA */ sprintf(Instruction, "BRA"); break; case 1: /* BSR */ sprintf(Instruction, "BSR"); break; case 2: /* BHI */ sprintf(Instruction, "BHI"); break; case 3: /* BLS */ sprintf(Instruction, "BLS"); break; case 4: /* BCC */ sprintf(Instruction, "BCC"); break; case 5: /* BCS */ sprintf(Instruction, "BCS"); break; case 6: /* BNE */ sprintf(Instruction, "BNE"); break; case 7: /* BEQ */ sprintf(Instruction, "BEQ"); break; case 8: /* BVC */ sprintf(Instruction, "BVC"); break; case 9: /* BVS */ sprintf(Instruction, "BVS"); break; case 10: /* BPL */ sprintf(Instruction, "BPL"); break; case 11: /* BMI */ sprintf(Instruction, "BMI"); break; case 12: /* BGE */ sprintf(Instruction, "BGE"); break; case 13: /* BLT */ sprintf(Instruction, "BLT"); break; case 14: /* BGT */ sprintf(Instruction, "BGT"); break; case 15: /* BLE */ sprintf(Instruction, "BLE"); break; } if(Displacement==0) { Memory_RetrWordFromPC(&Displacement); Displacement = (short)Displacement; /* sprintf(&Instruction[3], ".W");*/ } /* else sprintf(&Instruction[3], ".B");*/ sprintf(Arg1, "0x%08lX", ReferencePC+Displacement); Arg2[0]=0; return 0; } long bcc_5206_register(void) { instruction_register(0x6000, 0xF000, &execute, &disassemble); return 3; } coldfire-0.2.2/i_5206/i_and.c0100644000175000017500000000646310015265030014046 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* AND instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 0 | 0 | Register | OPmode | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ANDTime[2][8]={{ 1, 3, 3, 3, 3, 4, 3, 1}, {-1, 3, 3, 3, 3, 4, 3, -1}}; TRACER_DEFAULT_CHANNEL(i_and); INSTRUCTION_5ARGS(AND, unsigned Code1,4, unsigned Register,3, unsigned OPMode,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; AND_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.OPMode==2) { /* y & Dx */ TRACE("y & Dx -> Dx\n"); if(Instr.Bits.EAMode==1) { ERR("May not specify Ax for source"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; } else if (Instr.Bits.OPMode==6) { /* Dy & x -> x */ if(Instr.Bits.EAMode==0) { ERR("May not specify Dx for destination when source is Dx"); return; } else if (Instr.Bits.EAMode==1) { ERR("May not specify Ax for destination when source is Dx"); return; } else if (Instr.Bits.EAMode==7 && Instr.Bits.EARegister==4) { ERR("May not specify Immediate Addressing for destination"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.Register)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; } else { ERR("Unknown OPMode %d", Instr.Bits.OPMode); return; } EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue & DValue; TRACE("0x%08lx & 0x%08lx = 0x%08lx\n", SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); /* Set the status register * X - Not affected * N - Set if source is -ve, cleared otherwise * Z - Set if source is zero, cleared otherwise * V - always cleared * C - always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Done\n"); if (Instr.Bits.OPMode==2) cycle(ANDTime[0][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); else cycle(ANDTime[1][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { AND_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "AND.L"); if(Instr.Bits.OPMode==2) { /* y & Dx */ Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); } else { Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); } return 0; } long and_5206_register(void) { instruction_register(0xC000, 0xF000, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_asx.c0100644000175000017500000000567310015265031014102 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Arithmetic Shift Left/Right ASL, ASR instructions */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 1 | 0 | Count/Reg | dr| 1 | 0 |i/r| 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ASXTime=1; TRACER_DEFAULT_CHANNEL(i_asx); INSTRUCTION_7ARGS(ASX, unsigned Code3,4, unsigned CountReg,3, unsigned DR,1, unsigned Code2,2, unsigned IR,1, unsigned Code1,2, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; ASX_Instr Instr; int x; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(Instr.Bits.IR==0) { /* Shift from count in instruction word */ SValue = Instr.Bits.CountReg; if(SValue == 0) SValue = 8; TRACE("Shift by count in instruction word = %d\n", SValue); } else { if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.CountReg)) return; /* Get source, modulo 64 */ EA_GetValue(&SValue, &Source); SValue &= 0x0000003F; TRACE("Shift by count in D%d = \n", Instr.Bits.CountReg, SValue); } TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); Result = DValue; if(Instr.Bits.DR==0) { /* Shift Right */ TRACE("Shift Right\n"); for(x=0;xC = Result & 0x00000001; SRBits->X = Result & 0x00000001; Result >>= 1; if(Result & 0x40000000) Result |= 0x80000000; } } else { /* Shift Left */ TRACE("Shift Left\n"); for(x=0;xC = (Result & 0x80000000) ? 1 : 0; SRBits->X = (Result & 0x80000000) ? 1 : 0; Result <<= 1; } } SRBits->N=((signed long)Result<0) ? 1 : 0; SRBits->Z=(Result==0) ? 1 : 0; SRBits->V=0; TRACE("0x%08lx %s 0x%02lx = 0x%08lx\n", DValue, (Instr.Bits.DR==0) ? ">>" : "<<", SValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(ASXTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ASX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.DR==0) { /* Shift Right */ sprintf(Instruction, "ASR.L"); } else { /* Shift Left */ sprintf(Instruction, "ASL.L"); } if(Instr.Bits.IR==0) { /* Shift from count in instruction word */ long SValue = Instr.Bits.CountReg; if(SValue == 0) SValue = 8; sprintf(Arg1, "#0x%02ld", SValue); } else { sprintf(Arg1, "D%d", Instr.Bits.CountReg); } Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long asx_5206_register(void) { instruction_register(0xE080, 0xF0D8, &execute, &disassemble); return 2; } coldfire-0.2.2/i_5206/i_clr.c0100644000175000017500000000365610015265031014066 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Clear (CLR) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Size | EAMode |EARegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int CLRTime[8]={ 1, 1, 1, 1, 1, 2, 1, -1}; TRACER_DEFAULT_CHANNEL(i_clr); INSTRUCTION_4ARGS(CLR, unsigned Code1,8, unsigned Size,2, unsigned EAMode,3, unsigned EARegister,3); const short CLR_SizeBits[4]={ 8 , 16 , 32 , 0 }; const char CLR_SizeStr[4]= {'B', 'W', 'L', '?'}; static void execute(void) { struct _Address Destination; CLR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.Size == 3) { ERR("Invalid size=3", memory_core.pc); return; } TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, CLR_SizeBits[(short)Instr.Bits.Size], Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Clearing:\n"); EA_PutValue(&Destination, 0); /* X - Not affected N - Always Cleared Z - Always Set V - Always Cleared C - Always Cleared */ SRBits->N=0; SRBits->Z=1; SRBits->V=0; SRBits->C=0; cycle(CLRTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { CLR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "CLR.%c", CLR_SizeStr[(short)Instr.Bits.Size]); Addressing_Print(CLR_SizeBits[(short)Instr.Bits.Size], Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Arg2[0]=0; return 0; } long clr_5206_register(void) { instruction_register(0x4200, 0xFF00, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_cmp.c0100644000175000017500000000351110015265031014053 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Compare (CMP) instruction */ /* Format CMP 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 1 | 1 | Register | 0 | 1 | 0 | EAMode |EARegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int CMPTime[8]={ 1, 3, 3, 3, 3, 4, 3, 1}; TRACER_DEFAULT_CHANNEL(i_cmp); INSTRUCTION_5ARGS(CMP, unsigned Code2,4, unsigned Register,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; CMP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); TRACE("Comparing 0x%08lx and 0x%08lx\n", SValue, DValue); Result = DValue - SValue; SR_Set(I_CMP, SValue, DValue, Result); TRACE("Done\n"); cycle(CMPTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { CMP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "CMP.L"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long cmp_5206_register(void) { instruction_register(0xB080, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_eor.c0100644000175000017500000000622310015265031014064 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* FIXME: Unverified correct operation */ #include "coldfire.h" /* EOR instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 1 | 1 | Register | OPmode | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int EORTime[8]={1, 3, 3, 3, 3, 4, 3, -1}; TRACER_DEFAULT_CHANNEL(i_eor); INSTRUCTION_5ARGS(EOR, unsigned Code1,4, unsigned Register,3, unsigned OPMode,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; EOR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.OPMode==2) { /* y ^ Dx */ TRACE("y ^ Dx -> Dx\n"); if(Instr.Bits.EAMode==1) { ERR("May not specify Ax for source"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; } else if (Instr.Bits.OPMode==6) { /* Dy & x -> x */ /* if(Instr.Bits.EAMode==0) { ERR("May not specify Dx for destination when source is Dx"); return; } else if (Instr.Bits.EAMode==1) { ERR("May not specify Ax for destination when source is Dx"); return; } else */ if (Instr.Bits.EAMode==7 && Instr.Bits.EARegister==4) { ERR("May not specify Immediate Addressing for destination"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.Register)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; } else { ERR("Unknown OPMode %d", Instr.Bits.OPMode); return; } EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue ^ DValue; TRACE("0x%08lx ^ 0x%08lx = 0x%08lx\n", SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); /* Set the status register * X - not affected * N - set if MSB or result is 1 * Z - set if result is zero * V,C always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); cycle(EORTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); TRACE("Done\n"); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { EOR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "EOR.L"); if(Instr.Bits.OPMode==2) { /* y ^ Dx */ Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); } else { Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); } return 0; } long eor_5206_register(void) { instruction_register(0xB180, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_ext.c0100644000175000017500000000531010015265031014073 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Sign Extend (EXT,EXTB) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 0 | 0 | OPmode | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int EXTTime=1; TRACER_DEFAULT_CHANNEL(i_ext); INSTRUCTION_4ARGS(EXT, unsigned Code2,7, unsigned OPMode,3, unsigned Code1,3, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long SValue, Result; EXT_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); if(Instr.Bits.OPMode==2) { /* Byte -> Word */ TRACE("Destination: (Byte -> Word)\n"); if(!EA_GetFromPC(&Destination, 16, 0, Instr.Bits.Register)) return; Result=(char)SValue; } else if(Instr.Bits.OPMode==3) { /* Word -> Long */ TRACE("Destination: (Word -> Long)\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; Result=(short)SValue; EA_PutValue(&Destination, (short)SValue); } else if(Instr.Bits.OPMode==7) { /* Byte -> Long */ TRACE("Destination: (Byte -> Long)\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; Result=(char)SValue; } else { ERR("Unknown opmode %d\n", Instr.Bits.OPMode); return; } EA_PutValue(&Destination, Result); /* Set the status register; * X - Not affected * N - Set if result is -ve, cleared otherwise * Z - Set if result is zero, cleared otherwise * V - always cleared * C - always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Done\n"); cycle(EXTTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { EXT_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.OPMode==2) { /* Byte -> Word */ sprintf(Instruction, "EXT.W"); } else if(Instr.Bits.OPMode==3) { /* Word -> Long */ sprintf(Instruction, "EXT.L"); } else if(Instr.Bits.OPMode==7) { /* Byte -> Long */ sprintf(Instruction, "EXTB.L"); } else { ERR("Unknown opmode\n"); } Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Arg2[0]=0; return 0; } long ext_5206_register(void) { instruction_register(0x4800, 0xFE38, &execute, &disassemble); instruction_register(0x4800, 0xFE38, &execute, &disassemble); return 2; } coldfire-0.2.2/i_5206/i_jmp.c0100644000175000017500000000312110015265031014057 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Jump (JMP) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | EAMode | EARegister| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int JMPTime[8]={-1, 3, -1, -1, 3, 4, 3, -1}; TRACER_DEFAULT_CHANNEL(i_jmp); INSTRUCTION_3ARGS(JMP, unsigned Code1,10, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Destination; unsigned long DValue; JMP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Called...\n"); TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetEA(&DValue, &Destination); TRACE("New PC=0x%08lx\n", DValue); /* Set the new PC */ memory_core.pc=DValue; TRACE("Done\n"); cycle(JMPTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { JMP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "JMP"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Arg2[0]=0; return 0; } long jmp_5206_register(void) { instruction_register(0x4EC0, 0xFFC0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_jsr.c0100644000175000017500000000326510015265031014100 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Jump To Subroutine (JSR) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | EAMode | EARegister| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int JSRTime[8]={-1, 3, -1, -1, 3, 4, 3, -1}; TRACER_DEFAULT_CHANNEL(i_jsr); INSTRUCTION_3ARGS(JSR, unsigned Code1,10, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Destination; unsigned long DValue; JSR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetEA(&DValue, &Destination); TRACE("Saving PC to the stack\n"); Stack_Push(32,memory_core.pc); TRACE("New PC=0x%08lx\n", DValue); /* Set the new PC */ memory_core.pc=DValue; /* Condition codes are not affected */ TRACE("Done\n"); cycle(JSRTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { JSR_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "JSR"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Arg2[0]=0; return 0; } long jsr_5206_register(void) { instruction_register(0x4E80, 0xFFC0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_lea.c0100644000175000017500000000351510015265031014041 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Load Effective Address (lea) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | ARegister | 1 | 1 | 1 | EAMode | EARegister| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int LEATime[8]={-1, 1, -1, -1, 1, 2, 1, -1}; TRACER_DEFAULT_CHANNEL(i_lea); INSTRUCTION_5ARGS(LEA, unsigned Code2,4, unsigned Register,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long SValue; LEA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 1, Instr.Bits.Register)) return; EA_GetEA(&SValue, &Source); TRACE("Loading 0x%08lx into A%d\n", SValue, Instr.Bits.Register); /* Condition codes are not affected */ TRACE("Storing Result:\n"); EA_PutValue(&Destination, SValue); TRACE("Done\n"); cycle(LEATime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { LEA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "LEA"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 1, Instr.Bits.Register, Arg2); return 0; } long lea_5206_register(void) { instruction_register(0x41C0, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_lsx.c0100644000175000017500000000735310015265031014112 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Logical Shift Left/Right LSL, LSR instructions */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 1 | 1 | 0 | Count/Reg | dr| 1 | 0 |i/r| 0 | 1 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int LSXTime=1; TRACER_DEFAULT_CHANNEL(i_lsx); INSTRUCTION_7ARGS(LSX, unsigned Code3,4, unsigned CountReg,3, unsigned DR,1, unsigned Code2,2, unsigned IR,1, unsigned Code1,2, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; LSX_Instr Instr; long last_bit; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(Instr.Bits.IR==0) { /* Shift from count in instruction word */ SValue = Instr.Bits.CountReg; if(SValue == 0) SValue = 8; TRACE("Shift by count in instruction word = %d\n", SValue); } else { if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.CountReg)) return; /* Get source, modulo 64 */ EA_GetValue(&SValue, &Source); SValue &= 0x0000003F; TRACE("Shift by count in D%d = \n", Instr.Bits.CountReg, SValue); } TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); if(SValue == 0) { TRACE("No Shift"); SRBits->C = 0; Result = DValue; } else { last_bit = 0; if(Instr.Bits.DR==0) { /* Shift Right */ TRACE("Shift Right\n"); /* Catch if we are shifting the register clean, this * catchs any funny modulo arithmetic the native * hardware does with a shift */ if(SValue <= 32) last_bit = DValue & (0x1 << (SValue-1)); /* On x86, the instruction takes modulo 32, so a * shift by 0x20 actually shifts 0, and * 0x21 shifts 1, etc. but we want to be able * to shift everything out of the register */ Result = (SValue >= 32) ? 0 : (DValue >> SValue); } else { /* Shift Left */ TRACE("Shift Left\n"); if(SValue <= 32) last_bit = DValue & (0x80000000 >> (SValue-1)); Result = (SValue >= 32) ? 0 : (DValue << SValue); } SRBits->C = (last_bit) ? 1 : 0; SRBits->X = (last_bit) ? 1 : 0; } TRACE("0x%08lx %s 0x%02lx = 0x%08lx\n", DValue, (Instr.Bits.DR==0) ? ">>" : "<<", SValue, Result); /* X - Set according to last bit shifted out of the operand; unaffected for shift count of 0 N - Set if result is -ve, cleared otherwise Z - Set if result is zero, cleared otherwise V - always cleared C - set according to the last bit shifted out of the operand; cleared for a shift count of 0 */ SRBits->N = ((long)Result < 0) ? 1 : 0; SRBits->Z = (Result == 0) ? 1 : 0; TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(LSXTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { LSX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.DR==0) { /* Shift Right */ sprintf(Instruction, "LSR.L"); } else { /* Shift Left */ sprintf(Instruction, "LSL.L"); } if(Instr.Bits.IR==0) { /* Shift from count in instruction word */ long SValue = Instr.Bits.CountReg; if(SValue == 0) SValue = 8; sprintf(Arg1, "#0x%02lX", SValue); } else { sprintf(Arg1, "D%d", Instr.Bits.CountReg); } Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long lsx_5206_register(void) { instruction_register(0xE088, 0xF0D8, &execute, &disassemble); instruction_register(0xE088, 0xF0D8, &execute, &disassemble); return 2; } coldfire-0.2.2/i_5206/i_neg.c0100644000175000017500000000303210015265032014044 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Negate instruction (NEG) */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int NEGTime=1; TRACER_DEFAULT_CHANNEL(i_neg); INSTRUCTION_2ARGS(NEG, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Destination; unsigned long Result, DValue; NEG_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); Result = 0 - DValue; TRACE("~0x%08lx = 0x%08lx\n", DValue, Result); /* Set the status register */ SR_Set(I_NEG, 0, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(NEGTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { NEG_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "NEG.L"); Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Arg2[0]=0; return 0; } long neg_5206_register(void) { instruction_register(0x4480, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_link.c0100644000175000017500000000470410015265032014237 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Link and Allocate (LINK) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Displacement | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int LINKTime=2; TRACER_DEFAULT_CHANNEL(i_link); INSTRUCTION_2ARGS(LINK, unsigned Code1,13, unsigned Register,3); static void execute(void) { unsigned long Displacement; struct _Address ARegister,Stack; unsigned long StackValue; LINK_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&Displacement); Displacement = (short)Displacement; TRACE("Retrieving ARegister\n"); /* Get the A register, and push it to the stack */ if(!EA_GetFromPC(&ARegister, 32, 1, Instr.Bits.Register)) return; TRACE("Pushing ARegister onto stack\n"); EA_GetValue(&StackValue, &ARegister); Stack_Push(32,StackValue); /* Now store the stack pointer in the register before modifying it */ TRACE("Retrieving Stack Pointer\n"); if(!EA_GetFromPC(&Stack, 32, 1, 7)) return; EA_GetValue(&StackValue, &Stack); TRACE("Storing Stack Pointer=0x%08lx in the ARegister\n", StackValue); EA_PutValue(&ARegister, StackValue); /* Move the stack pointer Displacement bytes */ /* The displacement will be -ve, causes the SP to move down */ TRACE("Displacing Stack Pointer by 0x%04lx to 0x%08lx\n", Displacement, StackValue+Displacement); EA_PutValue(&Stack, StackValue + Displacement); TRACE("Done"); cycle(LINKTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { LINK_Instr Instr; unsigned long Displacement; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&Displacement); sprintf(Instruction, "LINK"); Addressing_Print(32, 1, Instr.Bits.Register, Arg1); /* Print manually because it uses negative numbers */ sprintf(Arg2, "#%hd", (short)Displacement); return 0; } long link_5206_register(void) { instruction_register(0x4E50, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_nop.c0100644000175000017500000000236110015265032014073 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* No Operation (NOP) */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int NOPTime=3; TRACER_DEFAULT_CHANNEL(i_nop); INSTRUCTION_1ARG(NOP, unsigned Code1,16); static void execute(void) { unsigned long dummy; /* Read the instruction with out storing it.. we already know what it is */ Memory_RetrWordFromPC(&dummy); TRACE("Doing nothing :) ...\n"); TRACE("Done.\n"); cycle(NOPTime); /* Everything takes some time...*/ return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long dummy; Memory_RetrWordFromPC(&dummy); sprintf(Instruction, "NOP"); Arg1[0]=0; Arg2[0]=0; return 0; } long nop_5206_register(void) { instruction_register(0x4E71, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_not.c0100644000175000017500000000310410015265032014073 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* NOT instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 1 1 0 1 0 0 0 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int NOTTime=1; TRACER_DEFAULT_CHANNEL(i_not); INSTRUCTION_2ARGS(NOT, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Destination; unsigned long Result, DValue; NOT_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); Result = ~DValue; TRACE("~0x%08lx = 0x%08lx\n", DValue, Result); /* Set the status register */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(NOTTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { NOT_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "NOT.L"); Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Arg2[0]=0; return 0; } long not_5206_register(void) { instruction_register(0x4680, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_pea.c0100644000175000017500000000316310015265032014045 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Push Effective Address (pea) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | EAMode | EARegister| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int PEATime[8]={-1, 2, -1, -1, 2, 3, 2, -1}; TRACER_DEFAULT_CHANNEL(i_pea); INSTRUCTION_3ARGS(PEA, unsigned Code1,10, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source; unsigned long SValue; PEA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); /* Retrive the effective address, not the value that the EA points to */ TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetEA(&SValue, &Source); TRACE("Pusing 0x%08lx to the stack\n", SValue); Stack_Push(32,SValue); TRACE("Done\n"); cycle(PEATime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { PEA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "PEA"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Arg2[0]=0; return 0; } long pea_5206_register(void) { instruction_register(0x4840, 0xFFC0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_ori.c0100644000175000017500000000366610015265033014102 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* FIXME: Unverified correct operation */ #include "coldfire.h" /* ORI Immediate (ORI) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int ORITime=1; TRACER_DEFAULT_CHANNEL(i_ori); INSTRUCTION_2ARGS(ORI, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; ORI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 7, 4)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = SValue | DValue; TRACE("0x%08lx | 0x%08lx = 0x%08lx\n", SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); /* Set the status register * X - not affected * N - set it MSB or result is 1 * Z - set if result is zero * V,C always cleared */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)Result < 0); SRBits->Z = (Result == 0); TRACE("Done"); cycle(ORITime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { ORI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "ORI.L"); Addressing_Print(32, 7, 4, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long ori_5206_register(void) { instruction_register(0x0080, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_scc.c0100644000175000017500000000573310015265033014056 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Set Conditionally */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 1 | Condition | 1 | 1 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ const char *code_mnemonic[16] = { "T", "F", "HI", "LS", "CC", "CS", "NE", "EQ", "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE"}; TRACER_DEFAULT_CHANNEL(i_scc); INSTRUCTION_4ARGS(SCC, unsigned Code2,4, unsigned Condition,4, unsigned Code1,5, unsigned Register,3); int SCCTime=1; static void execute(void) { struct _Address Destination; SCC_Instr Instr; unsigned char Result=0; Memory_RetrWordFromPC(&Instr.Code); if(!EA_GetFromPC(&Destination, 8, 0, Instr.Bits.Register)) return; cycle(SCCTime); switch(Instr.Bits.Condition) { case 0: /* True */ Result=1; break; case 1: /* False */ break; case 2: /* SHI */ /* The docs say (!C or !Z), however processor seems to do * this: */ Result = SRBits->C || !SRBits->Z; break; case 3: /* SLS */ Result = SRBits->C || SRBits->Z; break; case 4: /* SCC */ Result = !SRBits->C; break; case 5: /* SCS */ Result = SRBits->C; break; case 6: /* SNE */ /* Set if they are not equal, ie Dest-Source != 0 */ Result = (!SRBits->Z); break; case 7: /* BEQ */ /* Don't set if they are not equal */ Result = (SRBits->Z); break; case 8: /* SVC */ Result = (!SRBits->V); break; case 9: /* SVS */ Result = SRBits->V; break; case 10: /* SPL */ Result = !SRBits->N; break; case 11: /* SMI */ Result = SRBits->N; break; case 12: /* SGE */ Result = ((SRBits->N && SRBits->V) || (!SRBits->N && !SRBits->V)); break; case 13: /* SLT */ Result = ((SRBits->N && !SRBits->V) || (!SRBits->N && SRBits->V)); break; case 14: /* SGT */ Result = ((SRBits->N && SRBits->V && !SRBits->Z) || (!SRBits->N && !SRBits->V && !SRBits->Z)); break; case 15: /* SLE */ Result = (SRBits->Z || (SRBits->N && !SRBits->V) || (!SRBits->N && SRBits->V) ); break; default: ERR("Unknown Condition Code 0x%02x\n", Instr.Bits.Condition); return; } TRACE("S%s: Result=%d\n", code_mnemonic[(int)Instr.Bits.Condition], Result); if(Result) Result = 0x000000FF; TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SCC_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "S%s", code_mnemonic[(int)Instr.Bits.Condition]); sprintf(Arg1, "D%d", Instr.Bits.Register); Arg2[0]=0; return 0; } long scc_5206_register(void) { instruction_register(0x50C0, 0xF0F8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_rte.c0100644000175000017500000000233310015265033014071 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Return from Exception (RTE) */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int RTETime=8; TRACER_DEFAULT_CHANNEL(i_rte); INSTRUCTION_1ARG(RTE, unsigned Code1,16); static void execute(void) { unsigned long dummy; /* Read the instruction with out storing it.. we already know what it is */ Memory_RetrWordFromPC(&dummy); exception_restore_from_stack_frame(); TRACE("Done\n"); cycle(RTETime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long dummy; Memory_RetrWordFromPC(&dummy); sprintf(Instruction, "RTE"); Arg1[0]=0; Arg2[0]=0; return 0; } long rte_5206_register(void) { instruction_register(0x4E73, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_rts.c0100644000175000017500000000245310015265033014112 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Return from Subroutine (RTS) */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int RTSTime=5; TRACER_DEFAULT_CHANNEL(i_rts); INSTRUCTION_1ARG(RTS, unsigned Code1,16); static void execute(void) { unsigned long dummy; /* Read the instruction with out storing it.. we already know what it is */ Memory_RetrWordFromPC(&dummy); /* Pop the PC from the A7 stack pointer */ memory_core.pc=Stack_Pop(32); TRACE("Set PC=0x%08lx\n", memory_core.pc); TRACE("Done\n"); cycle(RTSTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long dummy; Memory_RetrWordFromPC(&dummy); sprintf(Instruction, "RTS"); Arg1[0]=0; Arg2[0]=0; return 0; } long rts_5206_register(void) { instruction_register(0x4E75, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_sub.c0100644000175000017500000000602510015265033014072 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Subtract instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 0 | 1 | Register | OPmode | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int SUBTime[2][8]={{1, 3, 3, 3, 3, 4, 3, 1 }, {-1, 3, 3, 3, 3, 4, 3, -1 }}; TRACER_DEFAULT_CHANNEL(i_sub); INSTRUCTION_5ARGS(SUB, unsigned Code1,4, unsigned Register,3, unsigned OPMode,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; SUB_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); /* printf("SUB: Register=%d, OPMode=%d, EAMode=%d, EARegister=%d\n", Register, OPMode, EAMode,EARegister);*/ if(Instr.Bits.OPMode==2) { /* y + Dx */ TRACE("y + Dx -> Dx\n"); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; } else if(Instr.Bits.OPMode==6) { /* Dy + x -> x */ TRACE("Dy + x -> x\n"); if(Instr.Bits.EAMode==0) { ERR("May not specify Dx for destination when source is Dx"); return; } else if(Instr.Bits.EAMode==1) { ERR("May not specify Ax for destination when source is Dx"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.Register)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; } else { ERR("Unknown opcode %x\n", Instr.Bits.OPMode); return; } EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = DValue - SValue; TRACE("0x%08lx - 0x%08lx = 0x%08lx\n", DValue, SValue, Result); /* Set the status register */ SR_Set(I_SUB, SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); if(Instr.Bits.OPMode==2) /* y + Dx */ cycle(SUBTime[0][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); else cycle(SUBTime[1][cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SUB_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "SUB.L"); if(Instr.Bits.OPMode==2) { /* y & Dx */ Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); } else { Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); } return 0; } long sub_5206_register(void) { instruction_register(0x9000, 0xF000, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_tst.c0100644000175000017500000000446710015265033014123 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Test (TST) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | Size | EAMode |EARegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int TSTTime[8]={1, 3, 3, 3, 3, 4, 3, 1}; TRACER_DEFAULT_CHANNEL(i_tst); INSTRUCTION_4ARGS(TST, unsigned Code1,8, unsigned Size,2, unsigned EAMode,3, unsigned EARegister,3); const short TST_SizeBits[4]={ 8 , 16 , 32 , 0 }; const char TST_SizeStr[4]= {'B', 'W', 'L', '?'}; static void execute(void) { struct _Address Source; unsigned long SValue; TST_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.Size == 3) { ERR("Invalid size=3"); return; } TRACE("Size = %d=n", Instr.Bits.Size); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, TST_SizeBits[(short)Instr.Bits.Size], Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetValue(&SValue, &Source); TRACE("Testing 0x%08lx\n", SValue); /* Set the status register; * X - Not affected * N - Set if source is -ve, cleared otherwise * Z - Set if source is zero, cleared otherwise * V - always cleared * C - always cleared */ SRBits->N = ((long)SValue < 0); SRBits->Z = (SValue == 0); SRBits->V = 0; SRBits->C = 0; TRACE("Done\n"); cycle(TSTTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { TST_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "TST.%c", TST_SizeStr[(short)Instr.Bits.Size]); Addressing_Print(TST_SizeBits[(short)Instr.Bits.Size], Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Arg2[0]=0; return 0; } long tst_5206_register(void) { /* This needs to be 3 registers, 4A[11xx]x is taken (ILLEGAL) :( */ instruction_register(0x4A00, 0xFFC0, &execute, &disassemble); instruction_register(0x4A40, 0xFFC0, &execute, &disassemble); instruction_register(0x4A80, 0xFFC0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_negx.c0100644000175000017500000000316410015265033014243 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Negate with Excend (NEGX) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int NEGXTime=1; TRACER_DEFAULT_CHANNEL(i_negx); INSTRUCTION_2ARGS(NEGX, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Destination; unsigned long Result, DValue; NEGX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source: is 0\n"); TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); Result = 0 - DValue - (unsigned long)SRBits->X; TRACE("-0x%08lx - %d = 0x%08lx\n", DValue, (unsigned long)SRBits->X, Result); SR_Set(I_NEGX, 0, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(NEGXTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { NEGX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "NEGX.L"); Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Arg2[0]=0; return 0; } long negx_5206_register(void) { instruction_register(0x4080, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_move.c0100644000175000017500000001013510015265033014244 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Move instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | Size | DRegister | DMode | SMode | SRegister | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ If the destination is an address register, then the condition codes are unaffected, and MOVEA designates this */ TRACER_DEFAULT_CHANNEL(i_move); INSTRUCTION_6ARGS(MOVE, unsigned Code1,2, unsigned Size,2, unsigned DestRegister,3, unsigned DestMode,3, unsigned SourceMode,3, unsigned SourceRegister,3); const short MOVE_SizeBits[4]={ 0 , 8 , 32 , 16 }; const char MOVE_SizeStr[4]= {'?', 'B', 'L', 'W'}; int MOVE816Time[][7]= { {1,1,1,1,1,2,1}, {1,1,1,1,1,2,1}, {3,3,3,3,3,4,3}, {3,3,3,3,3,4,3}, {3,3,3,3,3,4,3}, {3,3,3,3,3,-1,-1}, {4,4,4,4,-1,-1,-1}, {3,3,3,3,-1,-1,-1}, {3,3,3,3,-1,-1,-1}, {3,3,3,3,3,-1,-1}, {4,4,4,4,-1,-1,-1}, {1,3,3,3,-1,-1,-1} }; int MOVE32Time[][7]= { {1,1,1,1,1,2,1}, {1,1,1,1,1,2,1}, {2,2,2,2,2,3,2}, {2,2,2,2,2,3,2}, {2,2,2,2,2,3,2}, {2,2,2,2,2,-1,-1}, {3,3,3,3,-1,-1,-1}, {2,2,2,2,-1,-1,-1}, {2,2,2,2,-1,-1,-1}, {2,2,2,2,2,-1,-1}, {3,3,3,3,-1,-1,-1}, {1,2,2,2,-1,-1,-1} }; static void execute(void) { struct _Address Source, Destination; unsigned long SValue; int cycle_source_ea=0, cycle_destination_ea=0; MOVE_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(Instr.Bits.Size==0) { ERR("Invalid size in instruction, size=0\n"); return; } TRACE("Source:\n"); if(!EA_GetFromPC(&Source, MOVE_SizeBits[(short)Instr.Bits.Size], Instr.Bits.SourceMode, Instr.Bits.SourceRegister)) return; EA_GetValue(&SValue, &Source); TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, MOVE_SizeBits[(short)Instr.Bits.Size], Instr.Bits.DestMode, Instr.Bits.DestRegister)) return; TRACE("Storing Result:\n"); EA_PutValue(&Destination, SValue); /* X - not affected N - set if result is -ve, cleared otherwise Z - set if result is zero, cleared otherwise V - always cleared C - always cleared */ /* Set the status register */ if(Instr.Bits.DestMode != 1) { /* MOVE */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)SValue < 0); SRBits->Z = (SValue == 0); } else { /* MOVEA */ /* Destination is an address register, codes are unaffected */ } /* Do cycle counting */ cycle_source_ea = cycle_EA(Instr.Bits.SourceRegister, Instr.Bits.SourceMode); cycle_destination_ea = cycle_EA(Instr.Bits.DestRegister, Instr.Bits.DestMode); if(Instr.Bits.Size == 0x02) /* 32 bit */ cycle(MOVE32Time[cycle_source_ea][cycle_destination_ea]); else cycle(MOVE816Time[cycle_source_ea][cycle_destination_ea]); TRACE("Done\n"); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { MOVE_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); /* If dest is 'A' an size is (2) == 32 bit or (3)==16 bit, * then it's actually a MOVEA.L/W instruction */ if(Instr.Bits.DestMode == 1 && Instr.Bits.Size >= 2) sprintf(Instruction, "MOVEA.%c", MOVE_SizeStr[(short)Instr.Bits.Size]); else sprintf(Instruction, "MOVE.%c", MOVE_SizeStr[(short)Instr.Bits.Size]); Addressing_Print(MOVE_SizeBits[(short)Instr.Bits.Size], Instr.Bits.SourceMode, Instr.Bits.SourceRegister, Arg1); Addressing_Print(MOVE_SizeBits[(short)Instr.Bits.Size], Instr.Bits.DestMode, Instr.Bits.DestRegister, Arg2); return 0; } long move_5206_register(void) { /* Register once for each size, we don't want to decode an instruction * where the size specifier turns out to be 00 */ instruction_register(0x1000, 0xF000, &execute, &disassemble); instruction_register(0x2000, 0xF000, &execute, &disassemble); instruction_register(0x3000, 0xF000, &execute, &disassemble); instruction_register(0x3000, 0xF000, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_suba.c0100644000175000017500000000363010015265034014233 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Subtract instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 0 | 1 | Register | 1 | 1 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int SUBATime[]={-1, 3, 3, 3, 3, 4, 3, -1 }; TRACER_DEFAULT_CHANNEL(i_suba); INSTRUCTION_5ARGS(SUBA, unsigned Code2,4, unsigned Register,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; SUBA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 1, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = DValue - SValue; TRACE("0x%08lx - 0x%08lx = 0x%08lx\n", DValue, SValue, Result); /* Condition codes are not affected */ TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(SUBATime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SUBA_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "SUBA.L"); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); Addressing_Print(32, 1, Instr.Bits.Register, Arg2); return 0; } long suba_5206_register(void) { instruction_register(0x91C0, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_subi.c0100644000175000017500000000376610015265034014255 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Subtract Immediate (SUBI) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Upper Word of Immediate Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | Lower Word of Immediate Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int SUBITime=1; TRACER_DEFAULT_CHANNEL(i_subi); INSTRUCTION_2ARGS(SUBI, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; SUBI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 7, 4)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = DValue - SValue; TRACE("0x%08lx - 0x%08lx = 0x%08lx\n", DValue, SValue, Result); /* Set the status register */ SR_Set(I_SUBI, SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(SUBITime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SUBI_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "SUBI.L"); Addressing_Print(32, 7, 4, Arg1); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long subi_5206_register(void) { instruction_register(0x0480, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_subq.c0100644000175000017500000000471510015265034014260 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Subtract instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 1 | Data | 1 | 1 | 0 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int SUBQTime[]={1, 3, 3, 3, 3, 4, 3, -1}; TRACER_DEFAULT_CHANNEL(i_subq); INSTRUCTION_5ARGS(SUBQ, unsigned Code2,4, unsigned Data,3, unsigned Code1,3, unsigned EAMode,3, unsigned EARegister,3); static void execute(void) { struct _Address Destination; unsigned long Result, SValue, DValue; SUBQ_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); /* Instr.Data is the immedate data, 1-7 represents 1-7, 0 represents 8 */ TRACE("Source: (Retrieving from instruction word) = 0x%02x where (0=8)\n", Instr.Bits.Data); SValue=Instr.Bits.Data; if(SValue==0) SValue = 8; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; if(Instr.Bits.EAMode==7) { switch(Instr.Bits.EARegister) { case 2: ERR("(d_16,PC) addressing mode invalid."); return; case 3: ERR("(d_8,PC,Xn) addressing mode invalid."); return; case 4: ERR("# addressing mode invalid."); return; } } EA_GetValue(&DValue, &Destination); Result = DValue - SValue; TRACE("0x%08lx - 0x%08lx = 0x%08lx\n", DValue, SValue, Result); /* Set the status register, the condition codes are unaffected when subtracting from an address register */ if(Instr.Bits.EAMode!=1) SR_Set(I_SUBQ, SValue, DValue, Result); else ; /* Address register */ TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); TRACE("Done\n"); cycle(SUBQTime[cycle_EA(Instr.Bits.EARegister,Instr.Bits.EAMode)]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SUBQ_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "SUBQ.L"); sprintf(Arg1, "#0x%02X", (char)(Instr.Bits.Data == 0) ? 8 : Instr.Bits.Data); Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); return 0; } long subq_5206_register(void) { instruction_register(0x5180, 0xF1C0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_subx.c0100644000175000017500000000345010015265034014262 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* SubX instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 0 | 1 |Register Dx| 1 | 1 | 0 | 0 | 0 | 0 |Register Dy| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int SUBXTime=1; TRACER_DEFAULT_CHANNEL(i_subx); INSTRUCTION_4ARGS(SUBX, unsigned Code2,4, unsigned RegisterDx,3, unsigned Code1,6, unsigned RegisterDy,3); static void execute(void) { struct _Address Source,Destination; unsigned long Result, SValue, DValue; SUBX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 32, 0, Instr.Bits.RegisterDy)) return; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.RegisterDx)) return; EA_GetValue(&SValue, &Source); EA_GetValue(&DValue, &Destination); Result = DValue - SValue - (long)SRBits->X; TRACE("0x%08lx - 0x%08lx - %d = 0x%08lx\n", DValue, SValue, (long)SRBits->X, Result); SR_Set(I_SUBX, SValue, DValue, Result); TRACE("Storing Result:\n"); EA_PutValue(&Destination, Result); cycle(SUBXTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SUBX_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "SUBX.L"); Addressing_Print(32, 0, Instr.Bits.RegisterDy, Arg1); Addressing_Print(32, 0, Instr.Bits.RegisterDx, Arg2); return 0; } long subx_5206_register(void) { instruction_register(0x9180, 0xF1F8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_stop.c0100644000175000017500000000317010015265034014265 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* FIXME: Unverified correct operation */ #include "coldfire.h" /* Stop (STOP) instruction */ /* MHM July 13, 2000 */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int STOPTime=3; TRACER_DEFAULT_CHANNEL(i_stop); INSTRUCTION_1ARG(STOP, unsigned Code1,16); static void execute(void) { struct _Address Source; unsigned long Result, SValue; STOP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source:\n"); if(!EA_GetFromPC(&Source, 16, 7, 4)) return; EA_GetValue(&SValue, &Source); Result = SValue; TRACE("#0x%08lx\n", Result); TRACE("Storing Result:\n"); /* Set the status register */ memory_core.sr=Result; /* Not quite finished yet */ TRACE("Done\n"); cycle(STOPTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { STOP_Instr Instr; unsigned long SValue; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "STOP"); Memory_RetrWordFromPC(&SValue); sprintf(Arg1, "#$%08lx", SValue); Arg2[0]=0; /* Addressing_Print(32, 0, Instr.Bits.Register, Arg2); */ return 0; } long stop_5206_register(void) { instruction_register(0x4E72, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_swap.c0100644000175000017500000000336610015265034014261 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Swap register halves (SWAP) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int SWAPTime=1; TRACER_DEFAULT_CHANNEL(i_swap); INSTRUCTION_2ARGS(SWAP, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address Destination; unsigned long DValue; unsigned long Tmp; SWAP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; EA_GetValue(&DValue, &Destination); Tmp = (DValue << 16) & 0xFFFF0000; Tmp += (DValue >> 16) & 0x0000FFFF; TRACE("Storing result:\n"); EA_PutValue(&Destination, Tmp); /* X - Not affected N - Set if 32bits result is negative Z - Set if 32bit result is zero V - Always Cleared C - Always Cleared */ SRBits->N= ((long)Tmp < 0) ? 1 : 0; SRBits->Z= (Tmp == 0) ? 1 : 0; SRBits->V=0; SRBits->C=0; cycle(SWAPTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { SWAP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "SWAP"); Addressing_Print(32, 0, Instr.Bits.Register, Arg1); Arg2[0]=0; return 0; } long swap_5206_register(void) { instruction_register(0x4840, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_trap.c0100644000175000017500000000250210015265034014244 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Trap instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | Vector | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int TRAPTime=15; TRACER_DEFAULT_CHANNEL(i_trap); INSTRUCTION_2ARGS(TRAP, unsigned Code1,12, unsigned Vector,4); static void execute(void) { TRAP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Vector=0x%02x\n", Instr.Bits.Vector); /* this is done in the exception SRBits->T=0; SRBits->S=1; */ exception_do_exception(32+Instr.Bits.Vector); TRACE("Done\n"); cycle(TRAPTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { TRAP_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "TRAP"); sprintf(Arg1, "#0x%02X", Instr.Bits.Vector); Arg2[0]=0; return 0; } long trap_5206_register(void) { instruction_register(0x4E40, 0xFFF0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_unlk.c0100644000175000017500000000350610015265034014254 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Unlink (UNLK) instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int UNLKTime=2; TRACER_DEFAULT_CHANNEL(i_unlk); INSTRUCTION_2ARGS(UNLK, unsigned Code1,13, unsigned Register,3); static void execute(void) { struct _Address ARegister,Stack; unsigned long Result; UNLK_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); if(!EA_GetFromPC(&ARegister, 32, 1, Instr.Bits.Register)) return; if(!EA_GetFromPC(&Stack, 32, 1, 7)) return; /* Load the stack pointer from the A register */ TRACE("Loading Stack Pointer from A%d:\n", Instr.Bits.Register); EA_GetValue(&Result, &ARegister); EA_PutValue(&Stack, Result); TRACE("New Stack Pointer is 0x%08lx\n", Result); /* Now pop a longword from the stack and set that to be the A register */ TRACE("Popping old Aregister value from the stack\n"); Result = Stack_Pop(32); TRACE(" Value=0x%08lx, storing it...\n", Result); EA_PutValue(&ARegister, Result); TRACE("Done\n"); cycle(UNLKTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { UNLK_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "UNLK"); Addressing_Print(32, 1, Instr.Bits.Register, Arg1); Arg2[0]=0; return 0; } long unlk_5206_register(void) { instruction_register(0x4E58, 0xFFF8, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_5206.h0100644000175000017500000000354110015265034013703 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ long add_5206_register(void); long adda_5206_register(void); long addi_5206_register(void); long addq_5206_register(void); long addx_5206_register(void); long and_5206_register(void); long andi_5206_register(void); long asx_5206_register(void); long bcc_5206_register(void); long btst_5206_register(void); long clr_5206_register(void); long cmp_5206_register(void); long cmpa_5206_register(void); long cmpi_5206_register(void); long dc_5206_register(void); long eor_5206_register(void); long eori_5206_register(void); long ext_5206_register(void); long halt_5206_register(void); long illegal_5206_register(void); long jmp_5206_register(void); long jsr_5206_register(void); long lea_5206_register(void); long link_5206_register(void); long lsx_5206_register(void); long move_5206_register(void); long movec_5206_register(void); long movem_5206_register(void); long moveq_5206_register(void); long movexr_5206_register(void); long mulu_l_5206_register(void); long mul_w_5206_register(void); long neg_5206_register(void); long negx_5206_register(void); long nop_5206_register(void); long not_5206_register(void); long or_5206_register(void); long ori_5206_register(void); long pea_5206_register(void); long rte_5206_register(void); long rts_5206_register(void); long scc_5206_register(void); long stop_5206_register(void); long sub_5206_register(void); long suba_5206_register(void); long subi_5206_register(void); long subq_5206_register(void); long subx_5206_register(void); long swap_5206_register(void); long trap_5206_register(void); long trapf_5206_register(void); long tst_5206_register(void); long unlk_5206_register(void); coldfire-0.2.2/i_5206/i_movec.c0100644000175000017500000000752510015265034014421 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* MoveC instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |A/D| Register | Control Register | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int MOVECTime=9; TRACER_DEFAULT_CHANNEL(i_movec); /* We are going to cheat here, and define this for the SECOND * word of the instr */ INSTRUCTION_3ARGS(MOVEC, unsigned AD,1, unsigned Register,3, unsigned ControlRegister,12); static void execute(void) { struct _Address Source; unsigned long SValue; MOVEC_Instr Instr; /* Get the instr, but we alreday know what it is */ Memory_RetrWordFromPC(&Instr.Code); /* Get the second word, that we care about */ Memory_RetrWordFromPC(&Instr.Code); TRACE("Retrieving source (A...\n"); if(!EA_GetFromPC(&Source, 32, Instr.Bits.AD, Instr.Bits.Register)) return; EA_GetValue(&SValue, &Source); if(SRBits->S) { /* Supervisor State */ switch(Instr.Bits.ControlRegister) { case 0x002: /* Cache Control Register */ memory_core.cacr = SValue; break; case 0x004: /* Access Control Register 0 */ ERR("Storing 0x%08lx in the ACR0 is unimplemented!\n", SValue); break; case 0x005: /* Access Control Register 1 */ ERR("Storing 0x%08lx in the ACR1 is unimplemented!\n", SValue); break; case 0x801: /* VBR */ TRACE("Storing 0x%08lx in the VBR\n", SValue); memory_core.vbr = SValue; break; case 0x80F: /* Program Counter */ TRACE("Storing 0x%08lx in the PC\n", SValue); memory_core.pc = SValue; break; case 0xC00: /* ROM Base Address Register */ memory_core.rombar = SValue & 0xfffffc00; TRACE("Storing 0x%08lx in the ROMBAR\n", memory_core.rombar); break; case 0xC04: /* SRAM Base Address Register */ memory_core.rambar = SValue & 0xfffffc00; TRACE("Storing 0x%08lx in the RAMBAR\n", memory_core.rambar); break; case 0xC0F: /* Module Base Address Register */ memory_core.mbar = SValue & 0xfffffc00; TRACE("Storing 0x%08lx in the MBAR\n", memory_core.mbar); break; default: ERR("Unimplemented Control register 0x%x\n", Instr.Bits.ControlRegister); break; } /* Condition code are not affected */ } else { /* User state */ TRACE("Attempt to write to SR while in user state\n"); /* FIXME: Generate an exception violation here */ } TRACE("Done\n"); cycle(MOVECTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { MOVEC_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "MOVEC"); Addressing_Print(32, Instr.Bits.AD, Instr.Bits.Register, Arg1); switch(Instr.Bits.ControlRegister) { case 0x002: /* Cache Control Register */ sprintf(Arg2, "CACR"); break; case 0x004: /* Access Control Register 0 */ sprintf(Arg2, "ACR0"); break; case 0x005: /* Access Control Register 1 */ sprintf(Arg2, "ACR1"); break; case 0x801: /* VBR */ sprintf(Arg2, "VBR"); break; case 0x80F: /* Program Counter */ sprintf(Arg2, "PC"); break; case 0xC00: /* ROM Base Address Register */ sprintf(Arg2, "ROMBAR"); break; case 0xC04: /* SRAM Base Address Register */ sprintf(Arg2, "RAMBAR"); break; case 0xC0F: /* Module Base Address Register */ sprintf(Arg2, "MBAR"); break; default: sprintf(Arg2, "???"); break; } return 0; } long movec_5206_register(void) { instruction_register(0x4E7B, 0xFFFF, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_movem.c0100644000175000017500000001026310015265035014425 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Movem instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | dr| 0 | 0 | 1 | 1 | EAMode | EARegister| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | A7..A0,D7...D0 Register List Mask | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ TRACER_DEFAULT_CHANNEL(i_movem); INSTRUCTION_5ARGS(MOVEM, unsigned Code2,5, unsigned Direction,1, unsigned Code1,4, unsigned EAMode,3, unsigned EARegister,3); int MOVEMTime=1; static void execute(void) { struct _Address Address; unsigned long AddressValue; MOVEM_Instr Instr; unsigned long RegisterListMask; short move_count; long x; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&RegisterListMask); /* dr field: 0- register to memory 1- memory to register */ if(Instr.Bits.EAMode != 2 && Instr.Bits.EAMode != 5) { printf("MOVEM: EAMode 0x%02x is not allowed\n", Instr.Bits.EAMode); return; } /* Get the effective address */ if(!EA_GetFromPC(&Address, 32, Instr.Bits.EAMode, Instr.Bits.EARegister)) return; EA_GetEA(&AddressValue, &Address); move_count=0; if(Instr.Bits.Direction==0) { /* Registers to memory */ for(x=0;x<8;x++,RegisterListMask>>=1) { if(RegisterListMask & 0x0001) { /* Save this register */ Memory_Stor(32, AddressValue + (move_count*4), memory_core.d[x]); move_count++; } } for(x=8;x<16;x++,RegisterListMask>>=1) { if(RegisterListMask & 0x0001) { /* Save this register */ Memory_Stor(32, AddressValue + (move_count*4), memory_core.a[x-8]); move_count++; } } } else { /* Memory to registers */ for(x=0;x<8;x++,RegisterListMask>>=1) { if(RegisterListMask & 0x0001) { /* Retr this register */ Memory_Retr(&memory_core.d[x], 32, AddressValue + (move_count*4)); move_count++; } } for(x=8;x<16;x++,RegisterListMask>>=1) { if(RegisterListMask & 0x0001) { /* Retr this register */ Memory_Retr(&memory_core.a[x-8], 32, AddressValue + (move_count*4)); move_count++; } } } /* Condition codes are not affected */ cycle((MOVEMTime + move_count)); return; } static int movem_print(char *buffer, char reg, unsigned long reg_list) { int x; char n_printed = 0; char one_printed = 0; char *orignal_buffer = buffer; /* reg_list number 8 should be 0, so after the 8th register, we will * always write out the last string of registers (if any) */ for(x=0;x<9;x++,reg_list >>= 1) { if(reg_list & 1) { if(!n_printed) { /* Last one not printed, and this one needs it */ /* If at least one is printed, we need a comma */ if(one_printed) buffer += sprintf(buffer, ","); buffer += sprintf(buffer, "%c%d", reg, x); one_printed = 1; } n_printed++; } else { if(n_printed > 1) { buffer += sprintf(buffer, "-%c%d", reg, x-1); n_printed = 0; } } } return (buffer - orignal_buffer); } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { MOVEM_Instr Instr; char *regStr; short size; unsigned long RegisterListMask; Memory_RetrWordFromPC(&Instr.Code); Memory_RetrWordFromPC(&RegisterListMask); sprintf(Instruction, "MOVEM.L"); if(Instr.Bits.Direction==0) { /* Registers to memory */ regStr = Arg1; Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg2); } else { Addressing_Print(32, Instr.Bits.EAMode, Instr.Bits.EARegister, Arg1); regStr = Arg2; } regStr[0]=0; /* RegisterListMask 1 for "yes", 0 for no A7 A6 A5 ... A1 A0 D7 D6 .... D1 D0 */ size = movem_print(regStr, 'D', RegisterListMask & 0x00FF); if(size && (RegisterListMask & 0xFF00)) { regStr += size; regStr += sprintf(regStr, "/"); } movem_print(regStr, 'A', (RegisterListMask & 0xFF00) >> 8); return 0; } long movem_5206_register(void) { instruction_register(0x48C0, 0xFBC0, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5206/i_moveq.c0100644000175000017500000000354510015265035014436 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* Move instruction */ /* Format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 1 | 1 | Register | 0 | Data | +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ int MOVEQTime=1; TRACER_DEFAULT_CHANNEL(i_moveq); INSTRUCTION_4ARGS(MOVEQ, unsigned Code2,4, unsigned Register,3, unsigned Code1,1, signed Data,8); static void execute(void) { struct _Address Destination; unsigned long SValue; MOVEQ_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); TRACE("Source: (from Instruction word) = 0x%02x\n", Instr.Bits.Data); SValue=(unsigned long)Instr.Bits.Data; TRACE("Destination:\n"); if(!EA_GetFromPC(&Destination, 32, 0, Instr.Bits.Register)) return; TRACE("Storing result:\n"); EA_PutValue(&Destination, SValue); /* X - not affected N - set if result is -ve, cleared otherwise Z - set if result is zero, cleared otherwise V - always cleared C - always cleared */ /* Set the status register */ memory_core.sr &= 0xFFF0; SRBits->N = ((long)SValue < 0); SRBits->Z = (SValue == 0); TRACE("Done\n"); cycle(MOVEQTime); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { MOVEQ_Instr Instr; Memory_RetrWordFromPC(&Instr.Code); sprintf(Instruction, "MOVEQ"); sprintf(Arg1, "#0x%02X", ((char)Instr.Bits.Data) & 0x000000FF); Addressing_Print(32, 0, Instr.Bits.Register, Arg2); return 0; } long moveq_5206_register(void) { instruction_register(0x7000, 0xF100, &execute, &disassemble); return 1; } coldfire-0.2.2/i_5307/0042755000175000017500000000000010057152031012630 5ustar davedavecoldfire-0.2.2/i_5307/Makefile.in0100644000175000017500000000017410015265035014675 0ustar davedave TOPSRCDIR = @top_srcdir@ SUBDIRS = BUILD = i.o C_SRCS = @MAKEFILE_RULES@ $(BUILD): $(OBJS) $(LD_R) $(OBJS) -o $@ coldfire-0.2.2/i_5307/i_5307.h0100644000175000017500000000000010015265035013673 0ustar davedavecoldfire-0.2.2/Makefile.in0100644000175000017500000000333010057151726013773 0ustar davedave# Makefile.in, try not to edit :) VER_MAJOR = 0 VER_MINOR = 2 VER_BUILD = 2 VERSION = $(VER_MAJOR).$(VER_MINOR).$(VER_BUILD) NAME = coldfire-$(VERSION) TOPSRCDIR = @top_srcdir@ SUBDIRS = tracer i_5206 i_5206e peripherals monitor SUBDIR_OBJS = tracer/tracer.o peripherals/peripherals.o monitor/monitor.o \ i_5206/i.o i_5206e/i.o #i_5307/i.o BUILD = version.h coldfire C_SRCS= addressing.c board.c cycle.c exception.c main.c memory.c handlers.c \ network.c i.c misc.c run.c sim.c @MAKEFILE_RULES@ OBJS+=@EXTRA_OBJS@ #Force version to be made before subdirectories subdirs-all: version.h coldfire: $(OBJS) force $(CC) $(LDFLAGS) $(OBJS) $(SUBDIR_OBJS) -o $@ $(LIBS) install: coldfire cp coldfire $(bindir) chmod 755 $(bindir)/coldfire mkdir -p $(datadir)/coldfire cp boards/*.board $(datadir)/coldfire uninstall: rm -f $(bindir)/coldfire rm -rf $(datadir)/coldfire distclean: rm -f coldfire version.h Makefile.rules rm -f config.cache config.log config.h config.status version.h: @echo "Creating version.h" @echo "#define COPYRIGHT \"Copyright 2000, by David Grant, and AUTHORS\"" > .ver @echo "#define TITLE \"Coldfire CPU Emulator\"" >> .ver @echo "#define VERSION \"$(VERSION)\"" >> .ver @mv -f .ver version.h tar: distclean cd .. \ && cp -a coldfire $(NAME) \ && rm -rf $(NAME)/CVS $(NAME)/test \ && tar -zcvf $(NAME).tar.gz $(NAME) \ && rm -rf $(NAME) cvstar: mkdir $(NAME) \ && echo Checking out coldfire-$(VER_MAJOR)_$(VER_MINOR)_$(VER_BUILD) \ && cvs export -d $(NAME) \ -r coldfire-$(VER_MAJOR)_$(VER_MINOR)_$(VER_BUILD) coldfire \ && rm -rf $(NAME)/test \ && rm -rf $(NAME)/CVS \ && find $(NAME) -name .cvsignore -exec rm {} \; \ && tar -zcvf $(NAME).tar.gz $(NAME) \ && rm -rf $(NAME) coldfire-0.2.2/main.c0100644000175000017500000000555210015265012013012 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include "coldfire.h" #include "version.h" TRACER_DEFAULT_CHANNEL(main); void main_show_help(char **argv) { printf("\nUsage: %s [options]\n", argv[0]); printf("Options:\n"); printf("\t--board Load board config file \n"); printf("\t--timerhack Change the timer so the TRR ticks once \n" "\t per instruction, instead of at an \n" "\t almost correct rate based on \n" "\t cycles executed\n"); printf("\n"); printf("All CPU options depricated. Use a board config file instead.\n"); printf("\n"); } int main(int argc, char **argv) { int x; char *board_config_file = NULL; extern struct _board_data board_data; /* Init the board, but don't load the config file yet */ board_init(); for(x=1;x header file. */ #undef HAVE_FCNTL_H /* Define if you have the `gethostbyname' function. */ #undef HAVE_GETHOSTBYNAME /* Define if you have the `gmon' library (-lgmon). */ #undef HAVE_LIBGMON /* Define if you have the `nsl' library (-lnsl). */ #undef HAVE_LIBNSL /* Define if you have the `readline' library (-lreadline). */ #undef HAVE_LIBREADLINE /* Define if you have the `socket' library (-lsocket). */ #undef HAVE_LIBSOCKET /* Define if you have the `wininet' library (-lwininet). */ #undef HAVE_LIBWININET /* Define if you have the `select' function. */ #undef HAVE_SELECT /* Define if you have the `snprintf' function. */ #undef HAVE_SNPRINTF /* Define if you have the `socket' function. */ #undef HAVE_SOCKET /* Define if you have the header file. */ #undef HAVE_SYS_IOCTL_H /* Define if you have the header file. */ #undef HAVE_SYS_TIME_H /* Define if you have the header file. */ #undef HAVE_UNISTD_H /* Define if you have the `_snprintf' function. */ #undef HAVE__SNPRINTF /* Whether each instruction should be timed */ #undef INSTRUCTION_TIMING /* Whether stats about the number and type of address accesses should be generated */ #undef MEMORY_STATS /* Define if you have the ANSI C header files. */ #undef STDC_HEADERS /* Define if you can safely include both and . */ #undef TIME_WITH_SYS_TIME /* Define if the system can do a unaligned longword access */ #undef UNALIGNED_ACCESS /* Define if your processor stores words with the most significant byte first (like Motorola and SPARC, unlike Intel and VAX). */ #undef WORDS_BIGENDIAN /* Define to empty if `const' does not conform to ANSI C. */ #undef const coldfire-0.2.2/misc.c0100644000175000017500000000267710015265012013026 0ustar davedave/**********************************/ /* */ /* Copyright 2002, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(misc); int arg_split_chars(char **argv, char *buffer, int max_args, char *split) { char *ptr = buffer; int argc = 0; TRACE("going to split '%s', max %d buffer\n", buffer, max_args); /* Still return a (which will be empty) if there are no buffer */ if(!buffer) return 0; while(1) { /* Use up all the characters we don't want */ while(strchr(split, *ptr) != NULL && *ptr != 0) *ptr++=0; if(*ptr == 0) return argc; /* Record the arg start position */ argv[argc] = ptr; TRACE("found arg start= [%s]\n", ptr); /* Check for max args before quotes, everything goes * into the last arg */ if(max_args > 0 && argc == max_args-1) { char *end_ptr = &ptr[strlen(ptr)-1]; if(*ptr=='"' && *end_ptr=='"') { *argv[argc]++ = 0; *end_ptr = 0; } break; } /* If the arg starts with a ", find the closing " */ if(*ptr == '"') { *argv[argc]++ = 0; ptr = strchr(ptr+1, '"'); *ptr++=0; } else { /* Advance to the next split char, or \0 */ ptr = strpbrk(ptr, split); if(!ptr) break; } argc++; } argc++; return argc; } int arg_split(char **argv, char *buffer, int max_args) { return arg_split_chars(argv, buffer, max_args, " \t\n\r"); } coldfire-0.2.2/network.c0100644000175000017500000000436610015265012013561 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include #include #include #include #include #include #include #include /* Leave this one at the bottom to keep cygwin happy */ #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(network); int network_setup_on_port(int *fd, unsigned short port) { struct sockaddr_in s; /* Bind onto a port, and wait */ *fd = socket(AF_INET,SOCK_STREAM,0); s.sin_family = AF_INET; s.sin_port = htons(port); s.sin_addr.s_addr = htonl(INADDR_ANY); TRACE("Binding to address %s\n", inet_ntoa(s.sin_addr)); if(bind(*fd,(struct sockaddr *)&s,sizeof(struct sockaddr_in)) < 0) { /* ERR("bind: errno=%d\n", errno); perror("Network_SetupOnPort:bind");*/ return -1; } if(listen(*fd,0) < 0) { perror("Network_SetupOnPort:listen"); return -1; } TRACE("Ready to accept a connection\n"); return 0; } int network_accept(int *fd, int *client_fd) { int status; status = accept(*fd, NULL, 0); TRACE("Accept returned %d\n", status); if(status == -1) { TRACE("Error condition is %d\n", errno); perror("accept:"); return 0; } /* Leave the old bind fd open */ *client_fd = status; /* Force telnet into "echo off", "unbuffered" */ send(*client_fd, "\xff\xfb\x01\xff\xfb\x03\xff\xfd\x0f3", 9, 0); return 1; } int network_check_accept(int *fd) { int status; fd_set set; struct timeval tv; FD_ZERO(&set); FD_SET(*fd, &set); tv.tv_sec = tv.tv_usec = 0; if(!select((*fd)+1, &set, NULL, NULL, &tv)) return 0; status = accept(*fd, NULL, 0); TRACE("Accept returned %d\n", status); if(status == -1) { TRACE("Error condition is %d\n", errno); perror("accept:"); return 0; } /* Close the old (bind) fd, and setup the new (client) one */ close(*fd); *fd = status; fcntl(*fd, F_SETFL, O_NONBLOCK); /* Force telnet into "echo off", "unbuffered" */ send(*fd, "\xff\xfb\x01\xff\xfb\x03\xff\xfd\x0f3", 9, 0); return 1; } coldfire-0.2.2/i_5206e/0042755000175000017500000000000010057152031012773 5ustar davedavecoldfire-0.2.2/i_5206e/Makefile.in0100644000175000017500000000020310015265035015031 0ustar davedave TOPSRCDIR = @top_srcdir@ SUBDIRS = BUILD = i.o C_SRCS = i_div.c @MAKEFILE_RULES@ $(BUILD): $(OBJS) $(LD_R) $(OBJS) -o $@ coldfire-0.2.2/i_5206e/i_div.c0100644000175000017500000001537510015324236014241 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include "coldfire.h" /* 4 formats for divide DIVS Word Format: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 0 | 0 | Register | 1 | 1 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ DIVU Word Format: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 1 | 0 | 0 | 0 | Register | 0 | 1 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ DIVS Long Format: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 |Register Dx| 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |Register Dx| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ DIVU Long Format: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 |Register Dx| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |Register Dx| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 2 remainder formats: REMS Long format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 |Register Dx| 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |Register Dw| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Note that this is the same as the DIVS format, when Dq==Dr, then it's DIVS, else, it's REMS REMU Long format 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | EA Mode |EA Register| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ | 0 |Register Dx| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |Register Dw| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Again, when Dq==Dr this is DIVU, else it's REMU REM y,Dw:Dx 32bit Dx / 32bit y => 32bit Dw */ int DIVSTime[8]={18, 20, 20, 20, 20, -1, -1, -1}; TRACER_DEFAULT_CHANNEL(i_div); #define DIV_W_REGISTER(word) (((word)&0x0e00) >> 9) #define DIV_W_DIVS(word) (((word)&0x0100)) #define DIV_L_DX(word) (((word)&0x7000) >> 12) #define DIV_L_DW(word) (((word)&0x0007)) #define DIV_L_DIVS(word) (((word)&0x0800)) #define DIV_EAMODE(word) (((word)&0x0038) >> 3) #define DIV_EAREG(word) (((word)&0x0007)) static void execute(void) { struct _Address source, destination, remainder; unsigned long code[2]; unsigned long s, d, r; // printf("DIV executed!\n"); // printf("PC=%ld\n", memory_core.pc); Memory_RetrWordFromPC(&code[0]); if(code[0] & 0x8000) { /* word format */ // char overflow=0; if(!EA_GetFromPC(&source, 16, DIV_EAMODE(code[0]), DIV_EAREG(code[0]) )) return ; if(!EA_GetFromPC(&destination, 32, 0, DIV_W_REGISTER(code[0]))) return ; EA_GetValue(&s, &source); EA_GetValue(&d, &destination); if(DIV_W_DIVS(code[0])) { /* Signed operation */ TRACE("signed word divide %ld / %ld\n", (signed)d, (signed)s); (signed)r = (signed)d % (signed)s; (signed)d = (signed)d / (signed)s; if((signed)d < 0 && ((d&0xffff0000) == 0xffff0000) ) { d &= 0x0000ffff; } SRBits->N = ((signed)d < 0) ? 1 : 0; } else { TRACE("signed word divide %lu / %lu\n", d,s); r = d % s; d = d / s; SRBits->N = 0; } TRACE(" (q=0x%08x, r=0x%08x)\n", d,r); if(d & 0xffff0000) { /* Overflow, result doesn't fit in 16 bits */ SRBits->N=0; SRBits->Z=0; SRBits->V=1; TRACE("overflow, q doesn't fit in 16 bits\n"); } else { d = ((r & 0x0000ffff) << 16) | (d & 0x0000ffff); SRBits->Z = ((d & 0x0000ffff) == 0) ? 1 : 0; SRBits->V = 0; TRACE("= 0x%08lx\n",d); EA_PutValue(&destination, d); } SRBits->C=0; } else { /* long format */ char result_negative = 0; // char overflow = 0; Memory_RetrWordFromPC(&code[1]); if(!EA_GetFromPC(&source, 32, DIV_EAMODE(code[0]), DIV_EAREG(code[0]) )) return; if(!EA_GetFromPC(&destination, 32, 0, DIV_L_DX(code[1]) )) return ; if(!EA_GetFromPC(&remainder, 32, 0, DIV_L_DW(code[1]) )) return ; EA_GetValue(&s, &source); EA_GetValue(&d, &destination); if(DIV_L_DIVS(code[1])) { TRACE("Signed long divide/remainder\n"); /* Turn source and dest into signed values */ result_negative = (s ^ d) & 0x8000000; if((signed)s < 0) s = -(signed)s; if((signed)d < 0) d = -(signed)d; } else { TRACE("unigned long divide/remainder\n"); } TRACE(" d=%08lx / s=0x%08lx (neg=%d)\n", d, s, result_negative ? 1 : 0); r = d % s; d = d / s; if(result_negative) (signed)d = -(signed)d; TRACE(" = d=%08lx : r=0x%08lx\n", d, r); if(DIV_L_DX(code[1]) != DIV_L_DW(code[1])) { /* REM operation */ TRACE("writing remainder\n"); EA_PutValue(&remainder, r); SRBits->N = 0; /* cannot have a negative remainder */ SRBits->Z = (r == 0) ? 1 : 0; } else { TRACE("writing quotient\n"); EA_PutValue(&destination, d); SRBits->N = result_negative ? 1 : 0; SRBits->Z = (d == 0) ? 1 : 0; } SRBits->C = 0; SRBits->V = 0; } TRACE("Done\n"); //FIXME:cycle(DIVSTime[cycle_EA(DIV_EAREG(code[0]),DIV_EAMODE(code[0]))]); return; } static long disassemble(char *Instruction, char *Arg1, char *Arg2) { unsigned long code[2]; Memory_RetrWordFromPC(&code[0]); Addressing_Print(32, DIV_EAMODE(code[0]), DIV_EAREG(code[0]),Arg1); if(code[0] & 0x8000) { /* word */ sprintf(Instruction, "DIV%c.W", DIV_W_DIVS(code[0]) ? 'S':'U'); Addressing_Print(32, 0, DIV_W_REGISTER(code[0]), Arg2); } else { char rem=0; Memory_RetrWordFromPC(&code[1]); Arg2[0] = 0; /* long */ if(DIV_L_DX(code[1]) != DIV_L_DW(code[1])) { rem=1; Addressing_Print(32, 0, DIV_L_DW(code[1]), Arg2); strcat(Arg2, ":"); } Addressing_Print(32, 0, DIV_L_DX(code[1]), &Arg2[strlen(Arg2)]); sprintf(Instruction, "%s%c.L", rem ? "REM" : "DIV", DIV_L_DIVS(code[1]) ? 'S':'U'); } return 0; } long div_5206e_register(void) { instruction_register(0x81C0, 0xF0C0, &execute, &disassemble); instruction_register(0x4C40, 0xFFC0, &execute, &disassemble); return 6; } coldfire-0.2.2/i_5206e/i_5206e.h0100644000175000017500000000044310015265036014215 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ long div_5206e_register(void); coldfire-0.2.2/tracer/0042755000175000017500000000000010057152040013202 5ustar davedavecoldfire-0.2.2/tracer/README0100644000175000017500000000042110015265036014056 0ustar davedaveNotes: - The tracer subdir should be the first one build in a 'make'. It generates the channel header file, which is needed by tracer.h. - Delete the generated.channels.h file if you add a channel, and rebuild _everything_. Some channel numbers could have changed. coldfire-0.2.2/tracer/mktracech.sh0100755000175000017500000000060110015265037015477 0ustar davedave#!/bin/sh # Arg 1: Directory to start search in # We always output to current directory outfile="generated.channels.h" echo "/* We define TRACER_DECLARE(ch) so we can use this list more than once */" > $outfile find $1 -name \*.c -exec cat {} \; \ | grep TRACER_DEFAULT_CHANNEL\ | sed -e "s/TRACER_DEFAULT_CHANNEL/TRACER_DECLARE/"\ | sed -e "s/;.*$//" | sort | uniq >> $outfile coldfire-0.2.2/tracer/Makefile.in0100644000175000017500000000044510015265037015252 0ustar davedave TOPSRCDIR = @top_srcdir@ SUBDIRS = BUILD = tracer.o C_SRCS = main.c @MAKEFILE_RULES@ generated.channels.h: ./mktracech.sh .. distclean: $(RM) generated.channels.h $(BUILD): generated.channels.h $(OBJS) $(LD_R) $(OBJS) -o $@ # Deps tracer.o: generated.channels.h main.c tracer.h coldfire-0.2.2/tracer/main.c0100644000175000017500000000324110015265037014272 0ustar davedave/*************************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see ../LICENSE for more details */ /* */ /*************************************/ /* THANKS: to the WINE project.. www.winehq.com.. for many ideas on how * to make this :) */ #include #include #include #include #include "tracer.h" #define TRACER_DECLARE(ch) {#ch,0}, struct _TRACER_Info TRACER_Info[] = { #include "generated.channels.h" {NULL,0} }; #undef TRACER_DECLARE int tracer_indent=0; int tracer_printf(char *msg, ...) { va_list Args; int x; /*f(*msg=='+') tracer_indent++;*/ /*f(*msg!=':') { printf("%02d:" tracer_indent); for(x=0;x 111 100 (d16,PC) 111 010 (d8,PC,Xi) 111 011 */ TRACER_DEFAULT_CHANNEL(ea); /* FUNCTION: Retrives the value in memory based on the supplied Mode and Register ARGS: Size=8,16,32, we are careful with this because an 8 bit retrive for a Dx, or Ax is the LSB, but for memory addressing, it is the 8 bits where the pointer is pointing to. Mode=the mode from the instruction Register=the register from the instruction EAValue=if true, we return the address.. not what is at the address... this means that we can't use Dx,Ay, and some others (because they don't have an EA RETURNS: The value requested, or the EA if EAValue is turned on COMMENTS: */ /* -------------------------------------*/ long Addressing_Print(short Size, char Mode, char Register, char *Str) { unsigned long Result=0; short Scale; struct _InstructionExtensionWord *EWordPtr = (void *)&Result; switch(Mode) { case 0: /* Dy */ sprintf(Str, "D%d", Register); break; case 1: /* Ay */ sprintf(Str, "A%d", Register); break; case 2: /* (Ay) */ sprintf(Str, "(A%d)", Register); break; case 3: /* (Ay)+ */ sprintf(Str, "(A%d)+", Register); break; case 4: /* -(Ay) */ sprintf(Str, "-(A%d)", Register); break; case 5: /* (d16,Ay) */ Memory_RetrWordFromPC(&Result); sprintf(Str, "%hd(A%d)",(short)Result,Register); break; case 6: /* (d8,Ax,Xi) */ Memory_RetrWordFromPC(&Result); if(EWordPtr->Scale == 0) Scale=1; else if(EWordPtr->Scale == 1) Scale=2; else if(EWordPtr->Scale == 2) Scale=4; else Scale=1; sprintf(Str, "%d(A%d,%c%d.L*%d)",EWordPtr->Displacement, Register, EWordPtr->AD ? 'A' : 'D', EWordPtr->Register, Scale); break; case 7: /* Direct modes */ switch(Register) { case 0: /* word addressing */ Memory_RetrWordFromPC(&Result); sprintf(Str, "(0x%04hX.W)", (short)Result); break; case 1: /* long addressing */ Memory_RetrLongWordFromPC(&Result); sprintf(Str, "(0x%08lX.L)", Result); break; case 2: /* (d16,PC) */ Memory_RetrWordFromPC(&Result); sprintf(Str, "%hd(PC)",(short)Result); break; case 3: /* (d8,PC,Xi) */ Memory_RetrWordFromPC(&Result); if(EWordPtr->Scale == 0) Scale=1; else if(EWordPtr->Scale == 1) Scale=2; else if(EWordPtr->Scale == 2) Scale=4; else Scale=1; sprintf(Str, "%d(PC,%c%d.L*%d)",EWordPtr->Displacement, EWordPtr->AD ? 'A' : 'D', EWordPtr->Register, Scale); break; case 4: if(Size==8) { Memory_RetrByteFromPC(&Result); /* if( (char)Result < 0) sprintf(Str, "#%d", (char)Result); else*/ sprintf(Str, "#0x%02lX", Result); } else if(Size==16) { Memory_RetrWordFromPC(&Result); /* if( (short)Result < 0) sprintf(Str, "#%d", (short)Result); else if((short)Result == 0) sprintf(Str, "#0"); else*/ sprintf(Str, "#0x%04lX", Result); } else if(Size==32) { Memory_RetrLongWordFromPC(&Result); /* if( (long)Result < 0) sprintf(Str, "#%ld", (long)Result); else*/ sprintf(Str, "#0x%08lX", Result); } break; default: sprintf(Str, "---"); break; } } return 0; } /* This gets an address, and all useful information about an address from * the PC. Once the address is retrieved, it can be used (multiple times) * to write to, read from, etc. This allows us to only need to access the * PC once during instruction operand fetch. So if the destionation is (say) * an immediate address, we already have it.. we don't need to do any PC * magic to reset it, and re-read the address. I don't know if this is * actally how the Coldfire works (what happens if you write to the address * you're fetching from.. does the board re-fetch the operand, or just use * the value of the address it pulled the source from?) */ /* It also lets us do things like auto increment, and autodecrement.. and * stores the original address in a place where we can use it again */ char EA_GetFromPC(struct _Address *Addr, short Size, char Mode, char Register) { struct _InstructionExtensionWord *EWordPtr = (struct _InstructionExtensionWord *)&Addr->Data; short Scale; Addr->Mode=Mode; Addr->Register=Register; Addr->Data=0; /* This is for storing operands that are in the instruction */ Addr->Address = 0xdeadbeef; Addr->Size=Size; TRACE("Size=%d, Mode=%d, Register=%d\n", Size, Mode, Register); #ifdef MEMORY_STATS /* FIXME: this could be moved to the EA_GetValue, GetEA, and PutValue functions, * it might give a more accurate representation there (some instructions do a direct * read from the PC if they know what they are reading, but usually they go through * the EA_* routines), and would let things be split into reads/writes. */ Stats_Build_EA(Register, Mode); #endif /* MEMORY_STATS */ switch(Mode) { case 0: /* Dy */ TRACE(" Mode=Dy, Register=D%d=0x%08lx\n", Register, memory_core.d[(int)Register]); return 1; case 1: /* Ay */ TRACE(" Mode=Ay, Register=A%d=0x%08lx\n", Register, memory_core.a[(int)Register]); return 1; case 2: /* (Ay) */ Addr->Address = memory_core.a[(int)Register]; TRACE(" Mode=(Ay), Register=A%d=0x%08lx, Address=0x%08lx\n", Register, memory_core.a[(int)Register], Addr->Address); return 1; case 3: /* (Ay)+ */ Addr->Address = memory_core.a[(int)Register]; TRACE(" Mode=(Ay)+, Register=A%d=0x%08lx, Address=0x%08lx\n", Register, memory_core.a[(int)Register], Addr->Address); memory_core.a[(int)Register]+=Size>>3; TRACE(" Incremented A%d to 0x%08lx\n", Register, memory_core.a[(int)Register]); return 1; case 4: /* -(Ay) */ memory_core.a[(int)Register]-=Size>>3; TRACE(" Mode=-(Ay), Register=A%d=0x%08lx, Decremented 0x%08lx\n", Register, memory_core.a[(int)Register], memory_core.a[(int)Register]); Addr->Address = memory_core.a[(int)Register]; TRACE(" Address=0x%08lx\n", Addr->Address); return 1; case 5: /* (d16,Ay) */ if(!Memory_RetrWordFromPC(&Addr->Data)) return 0; TRACE(" Mode=(d16,Ay), Register=A%d=0x%08lx, Displacement=0x%04lx\n", Register, memory_core.a[(int)Register], Addr->Data); Addr->Address = memory_core.a[(int)Register]+(short)Addr->Data; TRACE(" Address=0x%08lx\n", Addr->Address); return 1; case 6: /* (d8,An,Xi) */ if(!Memory_RetrWordFromPC(&Addr->Data)) return 0; if(EWordPtr->Scale == 0) Scale=1; else if(EWordPtr->Scale == 1) Scale=2; else if(EWordPtr->Scale == 2) Scale=4; else Scale=1; TRACE(" Mode=(d8,An,Xi), Displacement=%d, Index=%s%d=0x%08lx * Scale=%d, Register=A%d=0x%08lx\n", EWordPtr->Displacement, EWordPtr->AD ? "A" : "D", EWordPtr->Register, EWordPtr->AD ? memory_core.a[EWordPtr->Register] : memory_core.d[EWordPtr->Register], Scale, Register, memory_core.a[(int)Register]); Addr->Address = memory_core.a[(int)Register] + EWordPtr->Displacement; /* EWordPtr->AD == 0 for memory_core.dister */ if(EWordPtr->AD==0) Addr->Address += memory_core.d[(int)EWordPtr->Register] * Scale; else Addr->Address += memory_core.a[(int)EWordPtr->Register] * Scale; TRACE(" Address=0x%08lx\n", Addr->Address); return 1; case 7: /* Direct modes */ switch(Register) { case 0: /* word addressing */ if(!Memory_RetrWordFromPC(&Addr->Data)) return 0; Addr->Address = Addr->Data; TRACE(" Mode=(xxx).W, Data=0x%04lx, Address=0x%08lx\n", Addr->Data, Addr->Data); return 1; case 1: /* long addressing */ if (!Memory_RetrLongWordFromPC(&Addr->Data)) return 0; Addr->Address = Addr->Data; TRACE(" Mode=(xxx).L, Data=0x%08lx, Address=0x%08lx\n", Addr->Data, Addr->Data); return 1; case 2: /* (d16,PC) */ /* This uses the value of the PC as the address of the extenstion word, we are already there */ Addr->Address = memory_core.pc; /* Now alter the PC to get the extension word */ if(!Memory_RetrWordFromPC(&Addr->Data)) return 0; TRACE(" Mode=(d16,PC), Displacement=0x%04lx\n", (short)Addr->Data); Addr->Address += (short)Addr->Data; TRACE(" Address=0x%08lx\n", Addr->Address); return 1; case 3: /* (d8,PC,Xi) */ /* This uses the value of the PC as the address of the extenstion word, we are already there */ Addr->Address = memory_core.pc; /* Now alter the PC to get the extension word */ if(!Memory_RetrWordFromPC(&Addr->Data)) return 0; if(EWordPtr->Scale == 0) Scale=1; else if(EWordPtr->Scale == 1) Scale=2; else if(EWordPtr->Scale == 2) Scale=4; else Scale=1; TRACE(" Mode=(d8,PC,Xi), Displacement=%d, Index=%s%d=0x%08lx * Scale=%d\n", EWordPtr->Displacement, EWordPtr->AD ? "A" : "D", EWordPtr->Register, EWordPtr->AD ? memory_core.a[EWordPtr->Register] : memory_core.d[EWordPtr->Register], Scale, memory_core.a[(int)Register]); Addr->Address += EWordPtr->Displacement; /* EWordPtr->AD == 0 for memory_core.dister */ if(EWordPtr->AD==0) Addr->Address += memory_core.d[(int)EWordPtr->Register] * Scale; else Addr->Address += memory_core.a[(int)EWordPtr->Register] * Scale; TRACE(" Address=0x%08lx\n", Addr->Address); return 1; case 4: if(!Memory_RetrFromPC(&Addr->Data, Size)) return 0; Addr->Address = 0xdeadbeef; if(Size==8) { TRACE(" Mode=#, Data=0x%02lx\n", Addr->Data); } else if(Size==16) { TRACE(" Mode=#, Data=0x%04lx\n", Addr->Data); } else { TRACE(" Mode=#, Data=0x%08lx\n", Addr->Data); } return 1; } /* Should never get here */ break; } return 0; } /* Takes an address, (that we build from EA_GetFromPC), and returns the * value associated with it (with proper masking of bits) * This sign extends the return so it can be used directly for math ops * or for negative compares without worrying about actual size */ char EA_GetValue(unsigned long *Result, struct _Address *Addr) { char ReturnValue = 1; switch(Addr->Mode) { case 0: /* Dy */ TRACE("Retrieving size=%d value from D%d\n", Addr->Size, Addr->Register); *Result = memory_core.d[(int)Addr->Register]; break; case 1: /* Ay */ TRACE("Retrieving size=%d value from A%d\n", Addr->Size, Addr->Register); *Result = memory_core.a[(int)Addr->Register]; break; case 2: /* (Ay) */ case 3: /* (Ay)+ */ case 4: /* -(Ay) */ case 5: /* (d16,Ay) */ case 6: /* (d8,An,Xi) */ TRACE("Retrieving size=%d value from address 0x%08lx\n", Addr->Size, Addr->Address); ReturnValue = Memory_Retr(Result, Addr->Size,Addr->Address); break; case 7: /* Direct modes */ switch(Addr->Register) { case 0: /* word addressing */ case 1: /* long addressing */ case 2: /* (d16,PC) */ case 3: /* (d8,PC,Xi) */ TRACE("Retrieving size=%d value from address 0x%08lx\n", Addr->Size, Addr->Address); ReturnValue = Memory_Retr(Result, Addr->Size,Addr->Address); break; case 4: TRACE("Retrieving size=%d value from immediate data\n", Addr->Size); *Result = Addr->Data; break; } break; } TRACE("32 bit value... 0x%08lx\n", *Result); /* Now mask it through the size .. eg & 0x000000FF for 8bit, etc. */ if(Addr->Size & 0x0020) return 1; if(Addr->Size & 0x0010) *Result = (short)*Result; else *Result = (char)*Result; TRACE("Returning size modified value... 0x%08lx\n", *Result); return ReturnValue; } /* This is used by instructions that play with effective addresses (EAs) * instead of getting the value at an addrss, we get the actual address */ char EA_GetEA(unsigned long *Result, struct _Address *Addr) { switch(Addr->Mode) { case 0: /* Dy */ case 1: /* Ay */ case 3: /* (Ay)+ */ case 4: /* -(Ay) */ ERR("Can't get the EA of a register..\n"); return 0; case 2: /* (Ay) */ case 5: /* (d16,Ay) */ case 6: /* (d8,An,Xi) */ TRACE("Retrieving Effective Address from address 0x%08lx\n", Addr->Address); *Result = Addr->Address; break; case 7: /* Direct modes */ switch(Addr->Register) { case 0: /* word addressing */ case 1: /* long addressing */ case 2: /* (d16,PC) */ case 3: /* (d8,PC,Xi) */ TRACE("Retrieving Effective Address from address 0x%08lx\n", Addr->Address); *Result = Addr->Address; break; case 4: return 0; } break; } TRACE(" Value=0x%08lx\n", *Result); return 1; } /* Given a value, and an address, this puts that value */ void EA_PutValue(struct _Address *Addr, unsigned long Value) { /* Value is long, sign extended */ switch(Addr->Mode) { case 0: /* Dy */ TRACE("Storing size=%d value=0x%08lx into D%d\n", Addr->Size, Value, Addr->Register); /* Coldfire preserves the bits not written to when writing * to a D register */ if(Addr->Size & 0x0020) { memory_core.d[(int)Addr->Register] = Value; return; } else if(Addr->Size & 0x0010) { memory_core.d[(int)Addr->Register] &= 0xFFFF0000; memory_core.d[(int)Addr->Register] |= Value & 0x0000FFFF; return; } else { memory_core.d[(int)Addr->Register] &= 0xFFFFFF00; memory_core.d[(int)Addr->Register] |= Value & 0x000000FF; return; } return; case 1: /* Ay */ TRACE("Storing size=%d value=0x%08lx into A%d\n", Addr->Size, Value, Addr->Register); /* for both word and long writes to the A register, we * store the long sign extended value, but for byte writes, * we only overwrite the lowest byte. */ if(Addr->Size & 0x0030) { memory_core.a[(int)Addr->Register] = Value; return; /* } else if(Addr->Size & 0x0010) { memory_core.a[(int)Addr->Register] &= 0xFFFF0000; memory_core.a[(int)Addr->Register] |= Value & 0x0000FFFF; return;*/ } else { memory_core.a[(int)Addr->Register] &= 0xFFFFFF00; memory_core.a[(int)Addr->Register] |= Value & 0x000000FF; return; } return; case 2: /* (Ay) */ case 3: /* (Ay)+ */ case 4: /* -(Ay) */ case 5: /* (d16,Ay) */ case 6: /* (d8,An,Xi) */ if(Addr->Size & 0x0020); else if(Addr->Size & 0x0010) Value = (unsigned short)Value; else Value = (unsigned char)Value; TRACE("Storing size=%d value=0x%08lx into address 0x%08lx\n", Addr->Size, Value, Addr->Address); Memory_Stor(Addr->Size,Addr->Address,Value); return; case 7: /* Direct modes */ switch(Addr->Register) { case 0: /* word addressing */ case 1: /* long addressing */ if(Addr->Size & 0x0020); else if(Addr->Size & 0x0010) Value = (unsigned short)Value; else Value = (unsigned char)Value; TRACE("Storing size=%d value=0x%08lx into address 0x%08lx\n", Addr->Size, Value, Addr->Address); Memory_Stor(Addr->Size,Addr->Address,Value); return; case 2: /* (d16,PC) */ case 3: /* (d8,PC,Xi) */ case 4: ERR("Can't write to the PC, go away.\n"); return; } /* Shouldn't get here */ break; } } void Stack_Push(short Size, unsigned long Value) { struct _Address Dest; TRACE("SP=0x%08lx, Size=%d, Pushing 0x%08lx onto stack (predecrement)\n", memory_core.a[7], Size, Value); EA_GetFromPC(&Dest, Size, 4, 7); EA_PutValue(&Dest, Value); TRACE("Done\n"); } unsigned long Stack_Pop(short Size) { struct _Address Dest; unsigned long Value; TRACE("SP=0x%08lx, Popping a value off the stack (postincrement)\n", memory_core.a[7]); EA_GetFromPC(&Dest, Size, 3, 7); EA_GetValue(&Value, &Dest); TRACE("Done, Value=0x%08lx, Size=%d\n", Value, Size); return Value; } coldfire-0.2.2/addressing.h0100644000175000017500000000174310015265013014215 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ struct _Address { short Size; char Mode; char Register; unsigned long Address; unsigned long Data; }; /*ng Addressing_Retr(short Size, char Mode, char Register, char EAValue); void Addressing_Stor(short Size, char Mode, char Register, long Value);*/ long Addressing_Print(short Size, char Mode, char Register, char *Str); char EA_GetFromPC(struct _Address *Addr, short Size, char Mode, char Register); char EA_GetValue(unsigned long *Result, struct _Address *Addr); char EA_GetEA(unsigned long *Result, struct _Address *Addr); /*long EA_GetAddress(struct _Address *Addr);*/ void EA_PutValue(struct _Address *Addr, unsigned long Value); void Stack_Push(short Size, unsigned long Value); unsigned long Stack_Pop(short Size); coldfire-0.2.2/profile.c0100644000175000017500000000275210015265013013526 0ustar davedave#ifdef INSTRUCTION_PROFILE #include #define PPRO 1 #define CPU_SPEED 600000000 unsigned long long Profile_time_in_ms(void) { unsigned long timer_hi; unsigned long timer_lo; unsigned long long result=0; #ifdef PPRO asm volatile ("cpuid" : /* no ouputs */ : /* no inputs */ ); #endif asm volatile ("rdtsc; movl %%edx, %0; movl %%eax, %1" : "=r" (timer_hi), "=r" (timer_lo) : /* no inputs */ : "%edx", "%eax"); asm volatile ("nop" : /* no ouputs */ : /* no inputs */ ); result = result << 32; result += timer_lo; return(result); } static char *eng(double value, int places) { const char * const prefixes[] = { "a", "f", "p", "n", "u", "m", "", "k", "M", "G", "T" }; int p = 6; static char result[30]; char *res = result; if (value < 0.) { *res++ = '-'; value = -value; } while (value != 0 && value < 1. && p > 0) { value *= 1000.; p--; } while (value != 0 && value > 1000. && p < 10 ) { value /= 1000.; p++; } if (value > 100.) places--; if (value > 10.) places--; sprintf(res, "%.*f %s", places-1, value, prefixes[p]); return result; } void Profile_MakeTimeString(char *Buffer, unsigned long long Low, unsigned long long High) { double ExecTime; unsigned long long Elapsed=0; Elapsed=(abs((High-Low))); ExecTime=(double) (((double)Elapsed)/(double)CPU_SPEED); sprintf(Buffer, "%s", eng(ExecTime,6)); } void Profile_Init (void) { printf ("Native Instruction Profiling: Enabled\n"); } #endif coldfire-0.2.2/profile.h0100644000175000017500000000036010015265013013524 0ustar davedave#ifndef PROFILE_H #define PROFILE_H #ifdef INSTRUCTION_PROFILE unsigned long Profile_time_in_ms(void); void Profile_MakeTimeString(char *Buffer, unsigned long long Low, unsigned long long High); void Profile_Init (void); #endif #endif coldfire-0.2.2/INSTALL0100644000175000017500000000005210015265013012742 0ustar davedave ./configure make make install (easy :) coldfire-0.2.2/exception.c0100644000175000017500000001422610015265013014063 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /*#define TRACER_OFF*/ #include "coldfire.h" TRACER_DEFAULT_CHANNEL(exception); static short exception_pending = 0; static unsigned long (*iack_func[8])(unsigned long interrupt_level) = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }; void exception_check_and_handle(void) { int x; if(!exception_pending) return; TRACE("exception_pending = 0x%04x\n", exception_pending); /* if the mask is 7, do nothing, if the mask is 0, check * all interrupts 7->1, interrupts level 0 doesn't make sense * FIXME: can the coldfire fire an interrupt with priority 0 ? */ TRACE("currint interrupt mask is %d, checking 7->%d\n", SRBits->InterruptPriorityMask, SRBits->InterruptPriorityMask+1); for(x=7; x>=SRBits->InterruptPriorityMask+1; x--) { if(iack_func[x] != NULL) { unsigned long vector; TRACE("Found interrupt_level %d to do exception.\n", x); vector = (iack_func[x])(x); TRACE("iack_func returned vector %lu\n", vector); exception_push_stack_frame(vector); /* Set the new interrupt priority */ SRBits->InterruptPriorityMask = x; /* Set the Master/Interrupt bit to 0 */ SRBits->M = 0; TRACE(" Interrupt Priority mask is now %d\n", SRBits->InterruptPriorityMask); /* Do the RAW exception */ exception_do_raw_exception(vector); return; } } } void exception_post(unsigned long interrupt_level, unsigned long (*func)(unsigned long interrupt_level) ) { TRACE("Exception posted at interrupt level %d\n", interrupt_level); exception_pending |= (0x1 << interrupt_level); iack_func[interrupt_level] = func; } void exception_withdraw(unsigned long interrupt_level) { TRACE("Exception withdrawn at interrupt level %d\n", interrupt_level); if(iack_func[interrupt_level] == NULL) { ERR("Attempting to withdraw interrupt level %d which is not set.\n", interrupt_level); } exception_pending &= ~(0x1 << interrupt_level); iack_func[interrupt_level] = NULL; } /* This table is for whether the PC should be set to the next instruction * after the fault, or the current instruction, this is only the first 16 * Vectors.. all others are '0' * * 0 = Next address 1 = Fault address */ static char exception_pc_location[16] = { 0, 0, 1, 1, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0, 1, 0 }; void exception_push_stack_frame(short vector) { unsigned long PC_to_push = memory_core.pc; unsigned long stack_frame; /* Restore the PC to the fault address */ TRACE("pushing exception stack frame for exception vector=%d\n", vector); if(vector < 16) { if(exception_pc_location[vector] == 1) PC_to_push = memory_core.pc_instruction_begin; } /* See if we can read from SP-4 and SP-8 */ if(!memory_seek(memory_core.a[7]-4) || !memory_seek(memory_core.a[7]-8)) { /* Push won't fit */ printf("pushing to SP=0x%08lx for vector %d would cause an error\n", memory_core.a[7], vector); /* location of a known good stack pointer: * - 5206, the SP is in the MBAR, 32 bit offset #1 * */ Memory_Retr(&memory_core.a[7], 32, memory_core.vbr); printf("SP reset to 0x%08lx\n", memory_core.a[7]); /* Force return to monitor for debugging.*/ printf("Forcing Autovector Interrupt 7\n"); exception_push_stack_frame(31); Monitor_HandleException(31); exception_restore_from_stack_frame(); } /* Stack Frame: * 31 27 25 17 15 0 * +--------+---------+-------------+---------+------------+ * | Format | FS[3:2] | Vector[7:0] | FS[1:0] | SR | * +--------+---------+-------------+---------+------------+ * | PC | * +-------------------------------------------------------+ */ /* Build the stack frame in a portable fashion */ stack_frame = ((0x4 | (memory_core.a[7] & 0x3)) << 28) | (0x0 << 26) | ((vector & 0xFF) << 18) | (0x0 << 16) | (memory_core.sr & 0xFFFF); TRACE("Pushing PC [0x%x] and StackFrame [0x%x]\n", PC_to_push, *(long *)&stack_frame); /* Align the stack to the next longword offset */ /* FIXME: I'm not convinced that this is correct memory_core.a[7] &= 0xfffffffc;*/ /* Push the PC to the stack */ Stack_Push(32, PC_to_push); /* Push the rest of the stack frame */ Stack_Push(32, *(long *)&stack_frame); } void exception_restore_from_stack_frame(void) { long frame; /* Pop the SR and PC off the stack */ frame=Stack_Pop(32); memory_core.sr= frame & 0x0000FFFF; memory_core.pc=Stack_Pop(32); /* Align the stack according to the format */ /* FIXME: I'm not convinced that this is correct memory_core.a[7] += (frame & 0x30000000 >> 28);*/ TRACE("Set SR=0x%08lx\n", memory_core.sr); TRACE("Set PC=0x%08lx\n", memory_core.pc); } long exception_do_raw_exception(short vector) { unsigned long offset=0; static struct _memory_segment *seg; /* Find the jump offset in the vbr */ TRACE("Doing Exception Vector=%d, vbr=0x%08lx\n", vector, memory_core.vbr); /* If this falis, we could go into an infinite loop, with an invalid * memory access exception */ if(!Memory_Retr(&offset, 32, memory_core.vbr + (vector*4))) return 0; TRACE("ISR is at 0x%08lx\n", offset); /* Assert the S bit, and clear the T bit */ SRBits->S = 1; SRBits->T = 0; /* If the offset is in the rom, (the base_register for the * segment the ISR is in is the address of the rombar) * then we'll ask the monitor to handle the exception */ seg = memory_find_segment_for(offset); if( seg->base_register == &memory_core.rombar) { /* Handler in rom, somwhere. Ask monitor to handle the * exception for us . * Monitor provides an alternative for every exception */ Monitor_HandleException(vector); /* Restore the process for monitor, because it doens't * know how to do it */ exception_restore_from_stack_frame(); return 0; } memory_core.pc=offset; TRACE("Set PC to ISR offset [0x%x]\n", memory_core.pc); TRACE("Done\n"); return 0; } long exception_do_exception(short vector) { exception_push_stack_frame(vector); return exception_do_raw_exception(vector); } coldfire-0.2.2/peripherals/0042755000175000017500000000000010057152036014245 5ustar davedavecoldfire-0.2.2/peripherals/isa.c0100644000175000017500000000307210015265037015162 0ustar davedave/**********************************/ /* */ /* Copyright 2002, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* ISA BUS emulation */ #include #include #include /*#define TRACER_OFF*/ #include "coldfire.h" TRACER_DEFAULT_CHANNEL(isa); static void isa_setup(struct _memory_segment *s); static void isa_fini(struct _memory_segment *s); static char isa_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset); static char isa_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value); static void isa_reset(struct _memory_segment *s); void isa_init(void) { memory_module_register("dummy", &isa_setup); } static void isa_setup(struct _memory_segment *s) { /* Do some checks to make sure people don't try dumb things */ if(s->base_register != NULL) { printf("warning: creating movable dummy area\n"); } s->fini = &isa_fini; s->read = &isa_read; s->write = &isa_write; s->reset = &isa_reset; s->update = NULL; s->data = NULL; } static void isa_fini(struct _memory_segment *s) { free(s->name); free(s->data); } static void isa_reset(struct _memory_segment *s) { } static char isa_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset) { *result = 0; return 1; } static char isa_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { return 1; } coldfire-0.2.2/peripherals/ram.c0100644000175000017500000001232110015265037015162 0ustar davedave/**********************************/ /* */ /* Copyright 2002, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* RAM and ROM memory modules */ #include #include #include /*#define TRACER_OFF*/ #include "coldfire.h" TRACER_DEFAULT_CHANNEL(ram); void ram_init(void); static void ram_setup(struct _memory_segment *s); static void rom_setup(struct _memory_segment *s); static void ram_fini(struct _memory_segment *s); static char ram_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset); static char ram_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value); static char rom_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value); static void rom_reset(struct _memory_segment *s); struct _mem_data { char *begin; char *end; int len; }; void ram_init(void) { memory_module_register("ram", &ram_setup); memory_module_register("rom", &rom_setup); } static void ram_setup(struct _memory_segment *s) { int len; struct _mem_data *mem; mem = malloc(sizeof(struct _mem_data)); /* Get the length, which is actually the mask + 1 */ len = (~s->mask) + 1; TRACE("len=%x\n", len); /* +3 for those long reads at EOM */ mem->begin=malloc((size_t)(len+3)); mem->end = mem->begin + len /* +3 -3 */; TRACE("end=%x\n", mem->end); mem->len = len; s->data = mem; /* Now set the functions to use */ s->fini = &ram_fini; s->read = &ram_read; s->write = &ram_write; s->reset = NULL; s->update = NULL; } static void rom_setup(struct _memory_segment *s) { ram_setup(s); s->write = &rom_write; s->reset = &rom_reset; } static void ram_fini(struct _memory_segment *s) { struct _mem_data *mem = (struct _mem_data *)s->data; free(mem->begin); free(s->name); free(s->data); } static void rom_reset(struct _memory_segment *s) { struct _mem_data *mem = (struct _mem_data *)s->data; int x; /* Map out the rom in bigendian */ TRACE("ROM setup with code_length=%d\n", s->code_len); for(x=0;xcode_len;x++) { TRACE(" code[%d] = 0x%02x\n", x, s->code[x]); } #ifdef UNALIGNED_ACCESS #ifndef WORDS_BIGENDIAN /* Put them in backards, starting at ram->end+3 */ for(x=0;xcode_len; x++) mem->end[3 - x] = s->code[x]; #else memcpy(mem->begin, s->code, s->code_len); #endif #else /* Endianness doesn't matter if we can't do unaligned * reads/writes. We just convert everything to big endian */ memcpy(mem->begin, s->code, s->code_len); #endif } static char ram_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset) { struct _mem_data *mem = (struct _mem_data *)s->data; #ifdef UNALIGNED_ACCESS unsigned long *ptr; TRACE("size=%d, offset=0x%08lx\n", size, offset); #ifndef WORDS_BIGENDIAN ptr = (unsigned long *)(mem->end - offset); #else ptr = (unsigned long *)(mem->begin + offset); #endif *result = (*ptr) >> (32 - size); #else unsigned char *ptr = (unsigned char *)(mem->begin + offset); TRACE("mem->begin=0x%08lx size=%d, offset=0x%08lx, ptr=%p\n", mem->begin, size, offset, ptr); if(size == 32) *result = (*ptr<<24) | (*(ptr+1)<<16) | (*(ptr+2)<<8) | *(ptr+3); else if (size == 16) *result = (*ptr<< 8) | *(ptr+1); else *result = *ptr; #endif TRACE("result=0x%08lx\n", *result); return 1; } static char ram_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { #ifdef UNALIGNED_ACCESS void *ptr; unsigned long templ; #else unsigned char *ptr; #endif struct _mem_data *mem = (struct _mem_data *)s->data; TRACE("s=%p\n", s); TRACE("size=%d, offset=0x%08lx, value=0x%08lx\n", size, offset, value); /* Normal memory access */ #ifdef UNALIGNED_ACCESS #ifndef WORDS_BIGENDIAN ptr = (void *)(mem->end - offset); #else ptr = (void *)(mem->begin + offset); #endif TRACE("s=%p\n", s); TRACE("ptr=%p\n", ptr); TRACE("mem->end=%p\n", mem->end); if(size == 32) { *(unsigned long *)ptr = value; return 1; } else if (size == 0x0010) { /* *(unsigned short *)ptr = (unsigned short)(value & 0x0000FFFF);*/ memcpy(&templ, ptr, 4); templ &= 0x0000FFFF; templ |= (value << 16); memcpy(ptr, &templ, 4); return 1; } /* Else, 8 bits */ else { /* *(unsigned char *)ptr = (unsigned char)(value & 0x000000FF);*/ memcpy(&templ, ptr, 4); templ &= 0x00FFFFFF; templ |= (value << 24); memcpy(ptr, &templ, 4); return 1; } #else ptr = (unsigned char *)(mem->begin + offset); TRACE("s=%p\n", s); TRACE("ptr=%p\n", ptr); TRACE("mem->end=%p\n", mem->end); if(size == 32) { *ptr = (value >> 24) & 0xFF; *(ptr+1)= (value >> 16) & 0xFF; *(ptr+2)= (value >> 8) & 0xFF; *(ptr+3)= (value ) & 0xFF; return 1; } else if (size == 16) { *ptr = (value >> 8) & 0xFF; *(ptr+1)= (value ) & 0xFF; return 1; } else { *ptr = (value ) & 0xFF; return 1; } #endif /* memcpy(ptr, &templ, 4);*/ return 0; } static char rom_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { ERR("size=%d, offset=0x%08lx, value=0x%08lx\n", size, offset, value); ERR("Cannot write to ROM, go away.\n"); return 1; } coldfire-0.2.2/peripherals/peripherals.h0100644000175000017500000000073610015265037016735 0ustar davedave /* isa.c -- ISA bus emulation */ void isa_init(void); /* ram.c -- RAM memory module * -- ROM memory module * -- SRAM memory module */ void ram_init(void); void rom_init(void); void sram_init(void); /* sim_5206.c */ void sim_5206_init(void); /* sim_5307.c */ void sim_5307_init(void); /* timer_5206.c */ void timer_5206_init(void); /* uart_5206.c */ void serial_5206_init(void); char serial_getch(short port_number); void serial_putch(short port_number, char c); coldfire-0.2.2/peripherals/Makefile.in0100644000175000017500000000031310015265037016302 0ustar davedave TOPSRCDIR = @top_srcdir@ SUBDIRS = BUILD = peripherals.o C_SRCS = isa.c ram.c \ sim_5206.c timer_5206.c uart_5206.c \ sim_5307.c @MAKEFILE_RULES@ $(BUILD): $(OBJS) $(LD_R) $(OBJS) -o $@ coldfire-0.2.2/peripherals/sim_5206.c0100644000175000017500000004466610015265040015662 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include /*#define TRACER_OFF*/ #include "coldfire.h" #include "sim_5206.h" TRACER_DEFAULT_CHANNEL(sim); static struct _sim_register *sim_register_lookup_by_offset(long offset); static struct _sim_register *sim_register_lookup_by_name(char *name); static void sim_interrupt_assert(short number, short vector); static void sim_interrupt_withdraw(short number); struct _sim sim_data; /* name, offset, width, read, write, resetvalue, description */ static struct _sim_register sim_reg[] = { {"SIMR", 0x0003, 8, 1, 1, 0xC0, "SIM Configuration Register"}, {"ICR1", 0x0014, 8, 1, 1, 0x04, "Interrupt Control Register Ext1"}, {"ICR2", 0x0015, 8, 1, 1, 0x08, "Interrupt Control Register Ext2"}, {"ICR3", 0x0016, 8, 1, 1, 0x0C, "Interrupt Control Register Ext3"}, {"ICR4", 0x0017, 8, 1, 1, 0x10, "Interrupt Control Register Ext4"}, {"ICR5", 0x0018, 8, 1, 1, 0x14, "Interrupt Control Register Ext5"}, {"ICR6", 0x0019, 8, 1, 1, 0x18, "Interrupt Control Register Ext6"}, {"ICR7", 0x001A, 8, 1, 1, 0x1C, "Interrupt Control Register Ext7"}, {"ICR8", 0x001B, 8, 1, 1, 0x1C, "Interrupt Control Register Ext8"}, {"ICR9", 0x001C, 8, 1, 1, 0x80, "Interrupt Control Register Ext9"}, {"ICR10", 0x001D, 8, 1, 1, 0x80, "Interrupt Control Register Ext10"}, {"ICR11", 0x001E, 8, 1, 1, 0x00, "Interrupt Control Register Ext11"}, {"ICR12", 0x001F, 8, 1, 1, 0x00, "Interrupt Control Register Ext12"}, {"ICR13", 0x0020, 8, 1, 1, 0x00, "Interrupt Control Register Ext13"}, /* Motorola's docs have these next two marked as 32 wide, * my docs say they're 16 */ {"IMR", 0x0036, 16, 1, 1, 0x3FFE, "Interrupt Mask Register"}, {"IPR", 0x003A, 16, 1, 0, 0x0000, "Interrupt Pending Register"}, /* Reset Status Register reset == 0x80 or 0x20 * I guess we pick one at ramdom ?? */ {"RSR", 0x0040, 8, 1, 1, 0x80, "Reset Status Register"}, {"SYPCR", 0x0041, 8, 1, 1, 0x00, "System Protection Control Register"}, {"SWIVR", 0x0042, 8, 0, 1, 0x0F, "Software Watchdog Interrupt Vector Register"}, {"SWSR", 0x0043, 8, 0, 1, 0xde /* Unitialized */, "Software Watchdog Service Register"}, /* FIXME: I'm down to here with filling in reset values, noticing * differences, and changing the register names to be consistant with the * docs motorola give out */ /* General Purpose I/O */ {"PAR", 0x00CB, 8, 1, 1, 0x00000000, "Pin Assignment Register"}, {"PPDDR", 0x01C5, 8, 1, 1, 0x00000000, "Port A Data Direction Register"}, {"PPDAT", 0x01C9, 8, 1, 1, 0x00000000, "Port A Data Register"}, /* Chip Select Registers */ {"CSAR0", 0x0064, 16, 1, 1, 0x00000000, "Chip-Select 0 Base Address Register"}, {"CSMR0", 0x0068, 32, 1, 1, 0x00000000, "Chip-Select 0 Address Mask Register"}, {"CSCR0", 0x006E, 16, 1, 1, 0x00000000, "Chip-Select 0 Control Register"}, {"CSAR1", 0x0070, 16, 1, 1, 0x00000000, "Chip-Select 1 Base Address Register"}, {"CSMR1", 0x0074, 32, 1, 1, 0x00000000, "Chip-Select 1 Address Mask Register"}, {"CSCR1", 0x007A, 16, 1, 1, 0x00000000, "Chip-Select 1 Control Register"}, {"CSAR2", 0x007C, 16, 1, 1, 0x00000000, "Chip-Select 2 Base Address Register"}, {"CSMR2", 0x0080, 32, 1, 1, 0x00000000, "Chip-Select 2 Address Mask Register"}, {"CSCR2", 0x0086, 16, 1, 1, 0x00000000, "Chip-Select 2 Control Register"}, {"CSAR3", 0x0088, 16, 1, 1, 0x00000000, "Chip-Select 3 Base Address Register"}, {"CSMR3", 0x008C, 32, 1, 1, 0x00000000, "Chip-Select 3 Address Mask Register"}, {"CSCR3", 0x0092, 16, 1, 1, 0x00000000, "Chip-Select 3 Control Register"}, {"CSAR4", 0x0094, 16, 1, 1, 0x00000000, "Chip-Select 4 Base Address Register"}, {"CSMR4", 0x0098, 32, 1, 1, 0x00000000, "Chip-Select 4 Address Mask Register"}, {"CSCR4", 0x009E, 16, 1, 1, 0x00000000, "Chip-Select 4 Control Register"}, {"CSAR5", 0x00A0, 16, 1, 1, 0x00000000, "Chip-Select 5 Base Address Register"}, {"CSMR5", 0x00A4, 32, 1, 1, 0x00000000, "Chip-Select 5 Address Mask Register"}, {"CSCR5", 0x00AA, 16, 1, 1, 0x00000000, "Chip-Select 5 Control Register"}, {"CSAR6", 0x00AC, 16, 1, 1, 0x00000000, "Chip-Select 6 Base Address Register"}, {"CSMR6", 0x00B0, 32, 1, 1, 0x00000000, "Chip-Select 6 Address Mask Register"}, {"CSCR6", 0x00B6, 16, 1, 1, 0x00000000, "Chip-Select 6 Control Register"}, {"CSAR7", 0x00B8, 16, 1, 1, 0x00000000, "Chip-Select 7 Base Address Register"}, {"CSMR7", 0x00BC, 32, 1, 1, 0x00000000, "Chip-Select 7 Address Mask Register"}, {"CSCR7", 0x00C2, 16, 1, 1, 0x00000000, "Chip-Select 7 Control Register"}, {"DMCR", 0x00C6, 16, 1, 1, 0x00000000, "Default Memory Control Register"}, /* DRAM Controller Registers */ {"DCRR", 0x0046, 16, 1, 1, 0x00000000, "DRAM Controller Refresh Register"}, {"DCTR", 0x004A, 16, 1, 1, 0x00000000, "DRAM Controller Timing Register"}, {"DCAR0", 0x004C, 16, 1, 1, 0x00000000, "DRAM Controller Bank 0 Address Register"}, {"DCMR0", 0x0050, 32, 1, 1, 0x00000000, "DRAM Controller Bank 0 Mask Register"}, {"DCCR0", 0x0057, 8, 1, 1, 0x00000000, "DRAM Controller Bank 0 Control Register"}, {"DCAR1", 0x0058, 16, 1, 1, 0x00000000, "DRAM Controller Bank 1 Address Register"}, {"DCMR1", 0x005C, 32, 1, 1, 0x00000000, "DRAM Controller Bank 1 Mask Register"}, {"DCCR1", 0x0063, 8, 1, 1, 0x00000000, "DRAM Controller Bank 1 Control Register"}, /* Timer Registers */ /* Timer 1 */ {"TMR1", 0x0100, 16, 1, 1, 0x0000, "TIMER1 Mode Register"}, {"TRR1", 0x0104, 16, 1, 1, 0xFFFF, "TIMER1 Reference Register"}, {"TCR1", 0x0108, 16, 1, 0, 0x0000, "TIMER1 Capture Register"}, {"TCN1", 0x010C, 16, 1, 1, 0x0000, "TIMER1 Counter"}, {"TER1", 0x0111, 8, 1, 1, 0x00, "TIMER1 Event Register"}, /* Timer 2 */ {"TMR2", 0x0120, 16, 1, 1, 0x0000, "TIMER2 Mode Register"}, {"TRR2", 0x0124, 16, 1, 1, 0xFFFF, "TIMER2 Reference Register"}, {"TCR2", 0x0128, 16, 1, 0, 0x0000, "TIMER2 Capture Register"}, {"TCN2", 0x012C, 16, 1, 1, 0x0000, "TIMER2 Counter"}, {"TER2", 0x0131, 8, 1, 1, 0x00, "TIMER2 Event Register"}, /* Serial Module Registers */ /* UART1 */ {"UMR1", 0x0140, 8, 1, 1, 0x00000000, "UART1 Mode Register"}, {"USR1", 0x0144, 8, 1, 0, 0x00000000, "UART1 Status Register"}, {"UCSR1", 0x0144, 8, 0, 1, 0x00000000, "UART1 Clock Select Register"}, {"UCR1", 0x0148, 8, 0, 1, 0x00000000, "UART1 Command Register"}, {"URBUF1",0x014C, 8, 1, 0, 0x00000000, "UART1 Receiver Buffer"}, {"UTBUF1",0x014C, 8, 0, 1, 0x00000000, "UART1 Transmitter Buffer"}, {"UISR1", 0x0150, 8, 1, 0, 0x00000000, "UART1 Input Port Change Register"}, {"UACR1", 0x0150, 8, 0, 1, 0x00000000, "UART1 Auxiliary Control Register"}, {"UIR1", 0x0154, 8, 1, 0, 0x00000000, "UART1 Interrupt Status Register"}, {"UIMR1", 0x0154, 8, 0, 1, 0x00000000, "UART1 Interrupt Mask Register"}, {"UBG11", 0x0158, 8, 0, 1, 0x00000000, "UART1 Baud Rate Generator PreScale MSB"}, {"UBG21", 0x015C, 8, 0, 1, 0x00000000, "UART1 Baud Rate Generator PreScale LSB"}, {"UIVR1", 0x0170, 8, 1, 1, 0x00000000, "UART1 Interrupt Vector Register"}, {"UIP1", 0x0174, 8, 1, 0, 0x00000000, "UART1 Input Port Register"}, {"UOP11", 0x0178, 8, 0, 1, 0x00000000, "UART1 Output Port Bit Set Command"}, {"UOP01", 0x017C, 8, 0, 1, 0x00000000, "UART1 Output Port Bit Reset Command"}, /* UART2 */ {"UMR2", 0x0180, 8, 1, 1, 0x00000000, "UART2 Mode Register"}, {"USR2", 0x0184, 8, 1, 0, 0x00000000, "UART2 Status Register"}, {"UCSR2", 0x0184, 8, 0, 1, 0x00000000, "UART2 Clock Select Register"}, {"UCR2", 0x0188, 8, 0, 1, 0x00000000, "UART2 Command Register"}, {"URBUF2",0x018C, 8, 1, 0, 0x00000000, "UART2 Receiver Buffer"}, {"UTBUF2",0x018C, 8, 0, 1, 0x00000000, "UART2 Transmitter Buffer"}, {"UISR2", 0x0190, 8, 1, 0, 0x00000000, "UART2 Input Port Change Register"}, {"UACR2", 0x0190, 8, 0, 1, 0x00000000, "UART2 Auxiliary Control Register"}, {"UIR2", 0x0194, 8, 1, 0, 0x00000000, "UART2 Interrupt Status Register"}, {"UIMR2", 0x0194, 8, 0, 1, 0x00000000, "UART2 Interrupt Mask Register"}, {"UBG12", 0x0198, 8, 0, 1, 0x00000000, "UART1 Baud Rate Generator PreScale MSB"}, {"UBG22", 0x019C, 8, 0, 1, 0x00000000, "UART2 Baud Rate Generator PreScale LSB"}, {"UIVR2", 0x01B0, 8, 1, 1, 0x00000000, "UART2 Interrupt Vector Register"}, {"UIP2", 0x01B4, 8, 1, 0, 0x00000000, "UART2 Input Port Register"}, {"UOP12", 0x01B8, 8, 0, 1, 0x00000000, "UART2 Output Port Bit Set Command"}, {"UOP02", 0x01BC, 8, 0, 1, 0x00000000, "UART2 Output Port Bit Reset Command"}, /* M-BUS Registers */ {"MADR", 0x01E0, 8, 1, 1, 0x00000000, "M-BUS Address Register"}, {"MFDR", 0x01E4, 8, 1, 1, 0x00000000, "M-BUS Frequency Divider Register"}, {"MBCR", 0x01E8, 8, 1, 1, 0x00000000, "M-BUS Control Register"}, {"MBSR", 0x01EC, 8, 1, 1, 0x00000000, "M-BUS Status Register"}, {"MBDR", 0x01F0, 8, 1, 1, 0x00000000, "M-BUS Data I/O Register"}, { NULL, 0, 0, 0, 0 , 0, NULL }}; static int sim_reg_count = 0; /* Will be filled in inside Init() */ static struct _memory_segment *sim_memory_segment = NULL; /* Interrupts go from 1 -> 13 on the 5206, and * 1 -> 15 on the 5206e (unimplemented) */ /* ICR: * +----+----+----+----+----+----+----+----+ * | av | xx | xx | int level | int pri | * +----+----+----+----+----+----+----+----+ * av -- autovectored, 1=yes * int level -- interrupt level, 0 -> 7 * int pri -- interrupt priority 11(high) -> 00 (low) */ #define ICR_LEVEL(icr) (((icr) & 0x1c) >> 2) #define ICR_PRI(icr) ((icr) & 0x02) #define ICR_AVEC(icr) ((icr) & 0x80) static int sim_register_offset_compare(const void *a, const void *b) { /* ascending order */ return ( ((struct _sim_register *)a)->offset - ((struct _sim_register *)b)->offset ); } static struct _sim_register *sim_register_lookup_by_offset(long offset) { struct _sim_register key; /* Setup search key */ key.offset = offset; return bsearch(&key, &sim_reg, sim_reg_count, sizeof(struct _sim_register), &sim_register_offset_compare); } static struct _sim_register *sim_register_lookup_by_name(char *name) { int x; for(x=0;xmask && s->mask != 0xFFFFFC00) { printf("warning: sim length must be 0x3FF, not 0x%08lx. reset.\n", ~s->mask); } s->mask = 0xFFFFFC00; s->fini = &sim_fini; s->read = &sim_read; s->write = &sim_write; s->reset = &sim_reset; s->update = NULL; s->data = malloc(sizeof(struct _sim_5206)); memset(s->data, 0, sizeof(struct _sim_5206)); if(sim_memory_segment) { printf("A SIM has already been defined!\n"); printf("There is probably 2 SIMs defined in the board config.\n"); printf("Aborting.\n"); exit(1); } TRACE("setting sim_memory_segment to %p, s->data=%p\n", s, s->data); sim_memory_segment = s; } static void sim_fini(struct _memory_segment *s) { TRACE("starting.\n"); free(s->data); free(s->name); TRACE("done.\n"); } static void sim_reset(struct _memory_segment *s) { int x; for(x=0; xdata; TRACE("size=%d, offset=0x%08lx\n", size, offset); reg = sim_register_lookup_by_offset(offset); if(!reg) { ERR("Unaligned SIM memory access, offset=0x%08lx\n", offset); return 0; } if(!reg->read) { /* Register is not read-able */ /* FIXME: do something intelligent here :) */ } TRACE("reg=%s, offset=0x%lx, width=%d\n", reg->name, reg->offset, reg->width); if(reg->width == 32) *result = *(unsigned long *)((unsigned long)sd + offset); else if(reg->width == 16) *result = *(unsigned short *)((unsigned long)sd + offset); else *result = *(unsigned char *)((unsigned long)sd + offset); TRACE("Returning with result=0x%08lx\n", *result); return 1; } static char sim_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { /* register long *ptr = (unsigned long *)0xdeadbeef;*/ struct _sim_register *reg; struct _sim_5206 *sd = (struct _sim_5206 *)s->data; TRACE("size=%d, offset=0x%08lx, value=0x%08lx\n", size, offset, value); reg = sim_register_lookup_by_offset(offset); if(!reg) { ERR("Unaligned SIM memory access, offset=0x%08lx\n", offset); return 0; } /* Find a register we can write in, if not this one, maybe the * next one as long as the offset is the same */ if(!reg->write) { if( ((reg+1)->write) && ((reg+1)->offset == offset) ) reg++; } TRACE("reg=%s, offset=0x%lx, width=%d\n", reg->name, reg->offset, reg->width); if(!reg->write) { /* Register is not write-able */ /* FIXME: do something intelligent here :) */ ERR("Attempt to write to read-only register %s(%s)\n", reg->name, reg->description); } if(size != reg->width) { ERR("Warning: %d bit write to %d bit register %s(%s)\n", size, reg->width, reg->name, reg->description); } if(reg->width == 32) *(unsigned long *)((unsigned long)sd + offset) = value; else if(reg->width == 16) *(unsigned short *)((unsigned long)sd + offset) = value; else *(unsigned char *)((unsigned long)sd + offset) = value; return 1; } /* We use this to store the vector of an interrupt we are posting. * if the interrupt is not autovectored, we will jump to whatever one * of the 256 interrupts is specified in here. In here [0] will be * unused. Interrupts start at 1. BUT in the ICR, that starts at [0], * so we;ll need to remember to sub 1 from any ICR access */ static unsigned char interrupt_acknowledge[16]; static int interrupts_at_level[8] = { 0,0,0,0,0,0,0,0 }; /* This is given to the core when there's an interrupt, this figures * out the vector of the interrupt for the core */ static unsigned long sim_iack_func(unsigned long interrupt_level) { struct _sim_5206 *s = (struct _sim_5206 *)sim_memory_segment->data; unsigned long vector=0; int x; short mask = 0x1; TRACE("called for interrupt_level=%d\n", interrupt_level); /* Find the _pending_ interrupt with level == interrupt_level */ for(x=1; x<14; x++) { int icr_avec, icr_level, icr_pri; mask <<= 1; if(! (s->IPR & mask)) { TRACE("sim input number %d is not pending.\n", x); continue; } icr_avec = ICR_AVEC(s->ICR[x-1]); icr_level = ICR_LEVEL(s->ICR[x-1]); icr_pri = ICR_PRI(s->ICR[x-1]); TRACE(" %d: ICR = 0x%02x (IL=%d,pri=%d,avec=%d)\n", x, s->ICR[x-1], icr_level, icr_pri, icr_avec?1:0); if(icr_level != interrupt_level) continue; if(icr_avec) { TRACE(" This interrupt is autovectored, using autovector.\n"); TRACE(" vector = 24 + interrupt level(%d) = %d\n", icr_level, 24 + icr_level); vector = 24 + icr_level; } else { TRACE(" Polling the device to get the vector number...\n"); vector = interrupt_acknowledge[x]; TRACE(" vector = %d\n", vector); } break; } if(x==14) { ERR("Inside iack_func, but no interrupt is waiting with level %d\n", interrupt_level); return 0; } return vector; } static void sim_interrupt_assert(short number, short vector) { short mask = (0x1 << number); struct _sim_5206 *s = (struct _sim_5206 *)sim_memory_segment->data; int icr_level = ICR_LEVEL(s->ICR[number-1]); TRACE("Posting interrupt Number=%d, Vector=%d\n", number, vector); /* Post an interrupt */ if(!(s->IMR & mask )) { /* this emulates the coldfire interupt ack bus cycle to * fetch the vector number, this is the vector that * the device reports to us */ interrupt_acknowledge[number] = vector; /* Set us pending */ if(s->IPR & mask) { TRACE("Already pending, not playing with registers further.\n"); return; } s->IPR |= mask; TRACE("Done, IPR is now 0x%04x\n", s->IPR); /* Tell the coldfire that we would like an interrupt */ exception_post(icr_level, &sim_iack_func); interrupts_at_level[icr_level]++; TRACE("interrupts_at_level[%d] = %d\n", icr_level, interrupts_at_level[icr_level]); return; } TRACE("NOT Posted, The interrupt is unmasked in the IMR\n"); return; } static void sim_interrupt_withdraw(short number) { short mask = (0x1 << number); struct _sim_5206 *s = (struct _sim_5206 *)sim_memory_segment->data; int icr_level = ICR_LEVEL(s->ICR[number-1]); // TRACE("Withdrawing interrupt Number=%d, Vector=%d\n", number); /* Post an interrupt */ if(!(s->IMR & mask )) { TRACE("Withdrawing interrupt Number=%d\n", number); interrupt_acknowledge[number] = 0; if(! (s->IPR & mask) ) { /* This interrupt isn't pending, there's no * need to withdraw it further */ TRACE("Interrupt wasn't pending, no need to withdraw.\n"); return; } /* Set us not pending */ s->IPR &= ~mask; /* withdraw from the coldfire too, only if there are * no interrupts left pending at that level, there could * be multiple interrupts at a single level */ interrupts_at_level[icr_level]--; TRACE("interrupts_at_level[%d] = %d\n", icr_level, interrupts_at_level[icr_level]); if(interrupts_at_level[icr_level] == 0) { TRACE("calling exception routines to remove interrupt\n"); exception_withdraw(icr_level); } TRACE("Done.\n"); return; } // TRACE("NOT Withdrawn, the interrupt is unmasked in the IMR\n"); return; } coldfire-0.2.2/peripherals/sim_5206.h0100644000175000017500000001257310015265041015660 0ustar davedave #ifndef SIM5206_H #define SIM5206_H #define UINT8 unsigned char #define UINT16 unsigned short #define UINT32 unsigned long /* DRAM controller bank (0x000c bytes)*/ struct _dram_bank { UINT16 DCAR; /* 00: DRAM Controller Address Register */ UINT8 pad0[2]; /* 02: */ UINT32 DCMR; /* 04: DRAM Controller Mask Register */ UINT8 pad[3]; /* 08: */ UINT8 DCCR; /* 0b: DRAM Controller Control Register */ }; /* DRAM controller (0x001e bytes)*/ struct _dram { UINT16 DCRR; /* 00: DRAM Controller Refresh */ UINT8 pad0[2]; /* 02: */ UINT16 DCTR; /* 04: DRAM Controller Timing Register */ struct _dram_bank Bank0; /* 06: Bank 0 */ struct _dram_bank Bank1; /* 12: Bank 1 */ }; /* One Bank for the The Chip Select module (0x000c bytes) */ struct _chip_select { UINT16 CSAR; /* 00: Chip-Select Address Register */ UINT8 pad0[2]; /* 02: */ UINT32 CSMR; /* 04: Chip-Select Address Mask Register */ UINT8 pad1[2]; /* 08: */ UINT16 CSCR; /* 0a: Chip-Select Control Register */ }; /* Timer module (0x0020 bytes) */ struct _timer { UINT16 TMR; /* 00: Timer Mode Register */ UINT8 pad0[2]; /* 02: */ UINT16 TRR; /* 04: Timer Reference Register */ UINT8 pad1[2]; /* 06: */ UINT16 TCR; /* 08: Timer Capture Register */ UINT8 pad2[2]; /* 0a: */ UINT16 TCN; /* 0c: Timer Counter */ UINT8 pad3[3]; /* 0e: */ UINT8 TER; /* 11: Timer Event Register */ UINT8 pad4[0xe]; /* 12: */ }; /* M-BUS module (0x0014 bytes( */ struct _mbus { UINT8 MADR; /* 00: M-BUS Address Register */ UINT8 pad0[0x03]; /* 01: */ UINT8 MFDR; /* 04: M-BUS Frequency Divider Register */ UINT8 pad1[0x03]; /* 05: */ UINT8 MBCR; /* 08: M-BUS Control Register */ UINT8 pad2[0x03]; /* 09: */ UINT8 MBSR; /* 0c: M-BUS Status Register */ UINT8 pad3[0x03]; /* 0d: */ UINT8 MBDR; /* 10: M-BUS Data I/O Register */ UINT8 pad4[0x03]; /* 11: */ }; #if 0 /* DMA structure, (0x0040 bytes) */ struct _dma { UINT32 SAR; /* 00: DMA Source Address Register */ UINT32 DAR; /* 04: DMA Destination Address Register */ UINT16 DCR; /* 08: DMA Control Register */ UINT8 pad0[0x02]; /* 0a: */ UINT16 BCR; /* 0c: DMA Byte Count Regsiter */ UINT8 pad1[0x02]; /* 0e: */ UINT8 DSR; /* 10: DMA Status Register */ UINT8 pad2[0x03]; /* 11: */ UINT8 DIVR; /* 14: DMA Interrupt Vector Register */ UINT8 pad3[0x2B]; /* 15: */ }; #endif struct _sim_5206 { /* MBar only needs 22 bits, we have 24 here, so we could store mbar * in the first 3 bytes of the sim..... ah well.... */ UINT8 pad00[0x03]; /* 000: */ UINT8 SIMR; /* 003: SIM Configuration Register */ UINT8 pad01[0x10]; /* 004: */ UINT8 ICR[13]; /* 014: Interrupt Control Register 1 - External IRQ1/IPL1 */ /* 015: Interrupt Control Register 2 - External IPL2 */ /* 016: Interrupt Control Register 3 - External IPL3 */ /* 017: Interrupt Control Register 4 - External IRQ4/IPL4 */ /* 018: Interrupt Control Register 5 - External IPL5 */ /* 019: Interrupt Control Register 6 - External IPL6*/ /* 01a: Interrupt Control Register 7 - External IRQ7/IPL7 */ /* 01b: Interrupt Control Register 8 - SWT */ /* 01c: Interrupt Control Register 9 - Timer1 Interrupt */ /* 01d: Interrupt Control Register 10 - Timer2 Interrupt */ /* 01e: Interrupt Control Register 11 - MBUS Interrupt */ /* 01f: Interrupt Control Register 12 - UART1 Interrupt */ /* 020: Interrupt Control Register 13 - UART2 Interrupt */ #if 0 /* For the 5206e */ UINT8 ICR14; /* 021: Interrupt Control Register 14 - ??? */ UINT8 ICR15; /* 022: Interrupt Control Register 15 - ??? */ #else UINT8 pad02[0x02]; /* 021: */ #endif UINT8 pad03[0x13]; /* 023: */ UINT16 IMR; /* 036: Interrupt Mask Register */ UINT8 pad04[0x02]; /* 038: */ UINT16 IPR; /* 03a: Interrupt Pending Register */ UINT8 pad05[0x04]; /* 03c: */ UINT8 RSR; /* 040: Reset Status Register */ UINT8 SYPCR; /* 041: System Procection Control Register */ UINT8 SWIVR; /* 042: Software Watchdog Interrupt Vector Register */ UINT8 SWSR; /* 043: Software Watchdog Service Register */ UINT8 pad06[0x02]; /* 044 */ struct _dram DRAM; /* 046: DRAM stuff */ struct _chip_select CSBank0; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank1; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank2; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank3; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank4; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank5; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank6; /* 064: Chip-Select Bank 0 */ struct _chip_select CSBank7; /* 0b8: Chip-Select Bank 7 */ UINT8 pad07[0x02]; /* 0c4: */ UINT16 DMCR; /* 0c6: Default Memory Control Register */ UINT8 pad08[0x02]; /* 0c8: */ #if 0 UINT16 PAR; /* 0ca: Pin Assignment Register */ #else UINT8 pad09; /* 0ca: */ UINT8 PAR; /* 0cb: Pin Assignment Register */ #endif UINT8 pad0a[0x34]; /* 0cc: */ UINT8 timer1[0x20]; /* 100: Timer 1 Module placeholder */ UINT8 timer2[0x20]; /* 120: Timer 2 Module placeholder */ UINT8 UART1[0x40]; /* 140: UART1 placeholder */ UINT8 UART2[0x40]; /* 180: UART1 placeholder */ UINT8 pad0b[0x05]; /* 1c0: */ UINT8 PPDDR; /* 1c5: Port A Data Direction Register */ UINT8 pad0c[0x03]; /* 1c6: */ UINT8 PPDAT; /* 1c9: Port A Data */ UINT8 pad0d[0x16]; /* 1ca: Port A Data */ struct _mbus MBUS; /* 1e0: MBUS module */ #if 0 UINT8 pad0e[0x0c]; /* 1f4: */ struct _dma DMA0; /* 200: DMA Channel 0 */ struct _dma DMA1: /* 240: DMA Channel 1 */ #endif }; #endif coldfire-0.2.2/peripherals/sim_5307.c0100644000175000017500000003222710015265042015654 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include /*#define TRACER_OFF*/ #include "coldfire.h" TRACER_DEFAULT_CHANNEL(sim); typedef unsigned char __u8; typedef unsigned short __u16; typedef unsigned long __u32; struct _sim_5307 { /* MBar only needs 22 bits, we have 24 here, so we could store mbar * in the first 3 bytes of the sim..... ah well.... */ __u8 rsr; /* 000: reset status register */ __u8 sypcr; /* 001: system protection control register */ __u8 swivr; /* 002: software watchdog interrupt vector register */ __u8 swsr; /* 003: software watchdog service register */ __u16 par; /* 004: pin assignment register */ __u8 irqpar; /* 006: interrupt port assignment register */ __u8 pad00; /* 007: reserved */ __u8 pllcr; /* 008: pll control */ __u8 pad01[0x03]; /* 009: reserved */ __u8 mpark; /* 00c: default bus master park register */ __u8 pad02[0x03]; /* 00d: reserved */ __u8 pad03[0x30]; /* 010: 0x10->0x3f reserved */ __u32 ipr; /* 040: interrupt pending register */ __u32 imr; /* 044: interrupt mask register */ __u8 pad04[0x03]; /* 048: reserved */ __u8 avr; /* 04b: autovector register */ __u8 icr[10]; /* 04c: Interrupt Control Registers * icr0: software watchdog timer * icr1: timer0 * icr2: timer1 * icr3: i2c * icr4: uart0 * icr5: uart1 * icr6: dma0 * icr7: dma1 * icr8: dma2 * icr9: dma3 */ __u8 pad05[0x02]; /* 056: reserved*/ }; static struct _sim_register *sim_register_lookup_by_offset(long offset); static struct _sim_register *sim_register_lookup_by_name(char *name); static void sim_interrupt_assert(short number, short vector); static void sim_interrupt_withdraw(short number); struct _sim sim_data; /* name, offset, width, read, write, resetvalue, description */ static struct _sim_register sim_reg[] = { {"RSR", 0x0000, 8, 1, 1, 0x00, "Reset Status Register"}, {"SYPCR", 0x0001, 8, 1, 1, 0x00, "System Protection Control Register"}, {"SWIVR", 0x0002, 8, 1, 1, 0x0f, "Software Watchdog Interrupt Vector Register"}, {"SWSR", 0x0003, 8, 1, 1, 0x00, "Software Watchdog Service Register"}, {"PAR", 0x0004,16, 1, 1, 0x0000, "Pin Assignment Register"}, {"IRQPAR",0x0006, 8, 1, 1, 0x00, "Interrupt Port Assignment Register"}, {"PLLCR", 0x0008, 8, 1, 1, 0x00, "PLL control Register"}, {"MPARK", 0x000c, 8, 1, 1, 0x00, "Default Bus Master Park Register"}, {"IPR", 0x0040,32, 1, 0, 0x00000000, "Interrupt Pending Register"}, {"IMR", 0x0044,32, 1, 1, 0x0003fffe, "Interrupt Mask Register"}, {"AVR", 0x004b, 8, 1, 1, 0x00, "Autovector Register"}, {"ICR0", 0x004c, 8, 1, 1, 0x00, "Software Watchdog Timer ICR"}, {"ICR1", 0x004d, 8, 1, 1, 0x00, "Timer0 ICR"}, {"ICR2", 0x004e, 8, 1, 1, 0x00, "Timer1 ICR"}, {"ICR3", 0x004f, 8, 1, 1, 0x00, "i2c ICR"}, {"ICR4", 0x0050, 8, 1, 1, 0x00, "Uart0 ICR"}, {"ICR5", 0x0051, 8, 1, 1, 0x00, "Uart1 ICR"}, {"ICR6", 0x0052, 8, 1, 1, 0x00, "DMA0 ICR"}, {"ICR7", 0x0053, 8, 1, 1, 0x00, "DMA1 ICR"}, {"ICR8", 0x0054, 8, 1, 1, 0x00, "DMA2 ICR"}, {"ICR9", 0x0055, 8, 1, 1, 0x00, "DMA3 ICR"}, { NULL, 0, 0, 0, 0 , 0, NULL }}; static int sim_reg_count = 0; /* Will be filled in inside Init() */ static struct _memory_segment *sim_memory_segment = NULL; /* Interrupts go from 0 -> 9 on the 5307, with the 7 external * autovector only interrupts defined in the autovector interrupt */ /* ICR: * +----+----+----+----+----+----+----+----+ * | av | xx | xx | int level | int pri | * +----+----+----+----+----+----+----+----+ * av -- autovectored, 1=yes * int level -- interrupt level, 0 -> 7 * int pri -- interrupt priority 11(high) -> 00 (low) */ #define ICR_LEVEL(icr) (((icr) & 0x1c) >> 2) #define ICR_PRI(icr) ((icr) & 0x02) #define ICR_AVEC(icr) ((icr) & 0x80) static int sim_register_offset_compare(const void *a, const void *b) { /* ascending order */ return ( ((struct _sim_register *)a)->offset - ((struct _sim_register *)b)->offset ); } static struct _sim_register *sim_register_lookup_by_offset(long offset) { struct _sim_register key; /* Setup search key */ key.offset = offset; return bsearch(&key, &sim_reg, sim_reg_count, sizeof(struct _sim_register), &sim_register_offset_compare); } static struct _sim_register *sim_register_lookup_by_name(char *name) { int x; for(x=0;xmask && s->mask != 0xFFFFFF00) { printf("warning: sim length must be 0xFF, not 0x%08lx. reset.\n", ~s->mask); } s->mask = 0xFFFFFF00; s->fini = &sim_fini; s->read = &sim_read; s->write = &sim_write; s->reset = &sim_reset; s->update = NULL; s->data = malloc(sizeof(struct _sim_5307)); memset(s->data, 0, sizeof(struct _sim_5307)); if(sim_memory_segment) { printf("A SIM has already been defined!\n"); printf("There is probably 2 SIMs defined in the board config.\n"); printf("Aborting.\n"); exit(1); } sim_memory_segment = s; } static void sim_fini(struct _memory_segment *s) { free(s->data); free(s->name); } static void sim_reset(struct _memory_segment *s) { int x; for(x=0; xdata; TRACE("size=%d, offset=0x%08lx\n", size, offset); reg = sim_register_lookup_by_offset(offset); if(!reg) { ERR("Unaligned SIM memory access, offset=0x%08lx\n", offset); return 0; } if(!reg->read) { /* Register is not read-able */ /* FIXME: do something intelligent here :) */ } TRACE("reg=%s, offset=0x%lx, width=%d\n", reg->name, reg->offset, reg->width); if(reg->width == 32) *result = *(unsigned long *)((unsigned long)sd + offset); else if(reg->width == 16) *result = *(unsigned short *)((unsigned long)sd + offset); else *result = *(unsigned char *)((unsigned long)sd + offset); TRACE("Returning with result=0x%08lx\n", *result); return 1; } static char sim_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { /* register long *ptr = (unsigned long *)0xdeadbeef;*/ struct _sim_register *reg; struct _sim_5307 *sd = (struct _sim_5307 *)s->data; TRACE("size=%d, offset=0x%08lx, value=0x%08lx\n", size, offset, value); reg = sim_register_lookup_by_offset(offset); if(!reg) { ERR("Unaligned SIM memory access, offset=0x%08lx\n", offset); return 0; } /* Find a register we can write in, if not this one, maybe the * next one as long as the offset is the same */ if(!reg->write) { if( ((reg+1)->write) && ((reg+1)->offset == offset) ) reg++; } TRACE("reg=%s, offset=0x%lx, width=%d\n", reg->name, reg->offset, reg->width); if(!reg->write) { /* Register is not write-able */ /* FIXME: do something intelligent here :) */ ERR("Attempt to write to read-only register %s(%s)\n", reg->name, reg->description); } if(size != reg->width) { ERR("Warning: %d bit write to %d bit register %s(%s)\n", size, reg->width, reg->name, reg->description); } if(reg->width == 32) *(unsigned long *)((unsigned long)sd + offset) = value; else if(reg->width == 16) *(unsigned short *)((unsigned long)sd + offset) = value; else *(unsigned char *)((unsigned long)sd + offset) = value; return 1; } /* We use this to store the vector of an interrupt we are posting. * if the interrupt is not autovectored, we will jump to whatever one * of the 256 interrupts is specified in here. In here [0] will be * unused. Interrupts start at 1. BUT in the ICR, that starts at [0], * so we;ll need to remember to sub 1 from any ICR access */ static unsigned char interrupt_acknowledge[32]; static int interrupts_at_level[8] = { 0,0,0,0,0,0,0,0 }; /* This is given to the core when there's an interrupt, this figures * out the vector of the interrupt for the core */ static unsigned long sim_iack_func(unsigned long interrupt_level) { struct _sim_5307 *s = (struct _sim_5307 *)sim_memory_segment->data; unsigned long vector=0; int x; short mask = 0x1; TRACE("called for interrupt_level=%d\n", interrupt_level); /* Find the _pending_ interrupt with level == interrupt_level */ for(x=1; x<18; x++) { int icr_avec, icr_level, icr_pri; mask <<= 1; if(! (s->ipr & mask)) { TRACE("sim input number %d is not pending.\n", x); continue; } /* icr_avec will be non-zero if it's autovectored, but * it will be different for each interrupt level */ if(x >= 8) { icr_avec = ICR_AVEC(s->icr[x-8]); icr_level = ICR_LEVEL(s->icr[x-8]); icr_pri = ICR_PRI(s->icr[x-8]); TRACE(" %d: ICR = 0x%02x (IL=%d,pri=%d,avec=%d)\n", x, s->icr[x-8], icr_level, icr_pri, icr_avec?1:0); } else { /* 0 - interrupt source returns vector * 1 - autovector */ icr_avec = (s->avr & (0x1<data; int icr_level = ICR_LEVEL(s->icr[number-8]); TRACE("Posting interrupt Number=%d, Vector=%d\n", number, vector); /* Post an interrupt */ if(!(s->imr & mask )) { /* this emulates the coldfire interupt ack bus cycle to * fetch the vector number, this is the vector that * the device reports to us */ interrupt_acknowledge[number] = vector; /* Set us pending */ if(s->ipr & mask) { TRACE("Already pending, not playing with registers further.\n"); return; } s->ipr |= mask; TRACE("Done, IPR is now 0x%04x\n", s->ipr); /* Tell the coldfire that we would like an interrupt */ exception_post(icr_level, &sim_iack_func); interrupts_at_level[icr_level]++; TRACE("interrupts_at_level[%d] = %d\n", icr_level, interrupts_at_level[icr_level]); return; } TRACE("NOT Posted, The interrupt is unmasked in the IMR\n"); return; } static void sim_interrupt_withdraw(short number) { short mask = (0x1 << number); struct _sim_5307 *s = (struct _sim_5307 *)sim_memory_segment->data; int icr_level = ICR_LEVEL(s->icr[number-8]); // TRACE("Withdrawing interrupt Number=%d, Vector=%d\n", number); /* Post an interrupt */ if(!(s->imr & mask )) { TRACE("Withdrawing interrupt Number=%d\n", number); interrupt_acknowledge[number] = 0; if(! (s->ipr & mask) ) { /* This interrupt isn't pending, there's no * need to withdraw it further */ TRACE("Interrupt wasn't pending, no need to withdraw.\n"); return; } /* Set us not pending */ s->ipr &= ~mask; /* withdraw from the coldfire too, only if there are * no interrupts left pending at that level, there could * be multiple interrupts at a single level */ interrupts_at_level[icr_level]--; TRACE("interrupts_at_level[%d] = %d\n", icr_level, interrupts_at_level[icr_level]); if(interrupts_at_level[icr_level] == 0) { TRACE("calling exception routines to remove interrupt\n"); exception_withdraw(icr_level); } TRACE("Done.\n"); return; } // TRACE("NOT Withdrawn, the interrupt is unmasked in the IMR\n"); return; } coldfire-0.2.2/peripherals/timer_5206.c0100644000175000017500000002241410015265042016177 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(timer); /* TMR (timer mode register) : * 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 * +-------------------------------+-------+---+---+---+-------+---+ * | Prescalar | CE1-0 |OM |ORI|FRR|CLK1-0 |RST| * +-------------------------------+-------+---+---+---+-------+---+ * */ struct _TMR { unsigned char PS; /* PS 7-0 */ char CE; /* CE 1-0 */ char OM; /* OM */ char ORI; /* ORI */ char FRR; /* FRR */ char CLK; /* CLK 1-0 */ char RST; /* RST */ }; /* TER (timer event register) : * 7 6 5 4 3 2 1 0 * +-----------------------+---+---+ * | Reserved |REF|CAP| * +-----------------------+---+---+ * */ struct _TER { char REF; char CAP; }; struct _timer_data { struct _TMR TMR; unsigned short TRR; unsigned short TCR; unsigned short TCN; struct _TER TER; char enable; unsigned long cycles_per_tick; unsigned long next_tick; }; static void timer_setup(struct _memory_segment *s); static void timer_fini(struct _memory_segment *s); static char timer_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset); static char timer_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value); static void timer_reset(struct _memory_segment *s); static void timer_update(struct _memory_segment *s); void timer_5206_init(void) { memory_module_register("timer_5206", &timer_setup); } static void timer_setup(struct _memory_segment *s) { struct _timer_data *timer; if(s->mask != 0 && s->mask != 0xFFFFFFE0) { printf("warning: %s length must be 0x1F, not 0x%08lx. reset.\n", s->name, ~s->mask); } s->mask = 0xFFFFFFE0; s->fini = &timer_fini; s->read = &timer_read; s->write = &timer_write; s->reset = &timer_reset; s->update = &timer_update; if(s->interrupt_line == 0) { /* timer1 - 9 * timer2 - 10 */ if(s->name[strlen(s->name) - 1] == '1') { s->interrupt_line = 9; } else { s->interrupt_line = 10; } ERR("Interrupt line for %s not set, defaulting to %d\n", s->name, s->interrupt_line); } timer = malloc(sizeof(struct _timer_data)); memset(timer, 0, sizeof(struct _timer_data)); s->data = timer; } static void timer_fini(struct _memory_segment *s) { /* struct _timer_data *timer = (struct _timer_data *)s->data;*/ free(s->name); free(s->data); } static void timer_reset(struct _memory_segment *s) { struct _timer_data *timer = (struct _timer_data *)s->data; memset(&timer->TMR, 0, sizeof(struct _TMR)); timer->TRR = 0xffff; timer->TCR = 0; timer->TCN = 0; memset(&timer->TER, 0, sizeof(struct _TER)); timer->enable=0; timer->cycles_per_tick = 1; timer->next_tick = 0; /* Leave timer_interrupt_number alone :) */ } static void timer_update(struct _memory_segment *s) { /* This routine is in charge of asserting, or withdrawing the * serial interrupt */ /* FIXME: use the global tick counter, not ++, because the global * tick counter is incremented according to each instruction's * execution time. */ struct _timer_data *timer = (struct _timer_data *)s->data; extern struct _board_data board_data; /* TRACE("timer%d: Updating timer\n", timerNumber+1);*/ if(!timer->enable) return; if(board_data.use_timer_hack) { /* Hack to make things work right, ignore the prescalar and the * CLK setting and the elapsed cycles, just increment * the TRR every update */ } else { /* Proper timing for the timer */ /* If we're not ready to tick, we should at least * check interrupts, because we may need to withdraw * an interrupt */ if(board_data.cycle_count < timer->next_tick) goto check_interrupts; timer->next_tick += timer->cycles_per_tick; } /* From the docs, the reference isn't matched until the TCN==TRR, * AND the TCN is ready to increment again, so we'll hold off * incrementing the TCN until we compare it to the TRR */ if(timer->TCN == timer->TRR) { /* timer reference hit */ TRACE(" %s: TCN == TRR = %ld\n", s->name, timer->TRR); timer->TER.REF=1; if(timer->TMR.FRR) { TRACE(" %s: Restart flag is on, restarting the timer\n", s->name); /* Restart the timer */ timer->TCN=0; } } else { /* Ensure the interupt condition is off */ timer->TER.REF=0; } /* Now increment the TCN * FIXME: maybe we shouldn't do this if we just reset the TCN? */ timer->TCN++; check_interrupts: /* If the timer is at its reference, and ORI is set, then interrupt */ if(timer->TER.REF && timer->TMR.ORI) { TRACE(" %s: timer reference condition exists\n", s->name); goto interrupts_on; } /* If we get here, we couln't find a condition to turn/leave the interrupts on , so turn 'em off */ /* TRACE(" No interrupt conditions, withdrawing any interrupt requests\n");*/ sim->interrupt_withdraw(s->interrupt_line); return; interrupts_on: TRACE(" Posting interrupt request for %s\n", s->name); sim->interrupt_assert(s->interrupt_line, 0); return; } /* Handles hardware writes to the serial ports */ static char timer_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { struct _timer_data *timer = (struct _timer_data *)s->data; struct _board_data *b = board_get_data(); TRACE("%s: size=%d, offset=0x%04lx, value=0x%08lx\n", s->name, size, offset, value); switch(offset) { case 0x0000: /* timer Mode Register (TMR) */ /* Before writing, check for a 1->0 transition on reset */ TRACE(" Setting timer Mode Register (TMR)\n"); if((timer->TMR.RST==1) && (value & 0x0001)==0) { timer_reset(s); } timer->TMR.PS = (value & 0xFF00) >> 8; timer->TMR.CE = (value & 0x00C0) >> 6; timer->TMR.OM = (value & 0x0020) ? 1 : 0; timer->TMR.ORI= (value & 0x0010) ? 1 : 0; timer->TMR.FRR= (value & 0x0008) ? 1 : 0; timer->TMR.CLK= (value & 0x0006) >> 1; timer->TMR.RST= (value & 0x0001) ; TRACE(" PS=0x%02x, CE=%d, OM=%d, ORI=%d\n", timer->TMR.PS, timer->TMR.CE, timer->TMR.OM, timer->TMR.ORI); TRACE(" FRR=%d, CLK=%d, RST=%d\n", timer->TMR.FRR, timer->TMR.CLK, timer->TMR.RST); /* Recompute the cycles_per_tick */ if(timer->TMR.CLK==1) { timer->cycles_per_tick = (timer->TMR.PS + 1); } else if(timer->TMR.CLK==2) { timer->cycles_per_tick = (timer->TMR.PS + 1) * 16; } else { timer->cycles_per_tick = 0; } TRACE(" cycles per tick=%ld\n", timer->cycles_per_tick); /* See if the timer should be on or off */ /* If RST is 0, values can still be written, but clocking * doesn't happen (1->0) transition resets the timer */ if(timer->TMR.CLK == 0 || timer->TMR.CLK == 3 || timer->TMR.RST==0) { /* timer is disabled */ timer->enable=0; } else { timer->enable=1; timer->next_tick = b->cycle_count + timer->cycles_per_tick; } break; case 0x0004: /* timer Reference Register (TRR) */ timer->TRR = (unsigned short)value; TRACE(" Setting timer Reference Register (TRR)\n"); break; case 0x0008: /* timer Capture Register (TCR) */ timer->TCR = (unsigned short)value; TRACE(" Setting timer Capture Register (TCR)\n"); break; case 0x000C: /* timer Counter (TCN) */ timer->TCN = (unsigned short)value; TRACE(" Setting timer Counter (TCN)\n"); break; case 0x0011: /* timer Event Register (TER) */ TRACE(" Setting timer Event Register (TER)\n"); if(value & 0x2) { timer->TER.REF = 0; TRACE(" Clearing Output Reference Event\n"); } if(value & 0x1) { timer->TER.CAP = 0; TRACE(" Clearing Capture Event\n"); } /* INterrupts status will be updated on the next * Tick() call */ break; default: return 0; } return 1; } static char timer_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset) { struct _timer_data *timer = (struct _timer_data *)s->data; TRACE("%s: size=%d, offset=0x%04lx\n", s->name, size, offset); switch(offset) { case 0x0000: /* timer Mode Register (TMR) */ *result = (((unsigned long)timer->TMR.PS ) << 8) | (((unsigned long)timer->TMR.CE & 0x0002) << 6) | (timer->TMR.OM ? 0x00000020 : 0x0) | (timer->TMR.ORI ? 0x00000010 : 0x0) | (timer->TMR.FRR ? 0x00000008 : 0x0) | (((unsigned long)timer->TMR.CLK & 0x0002) << 1) | (timer->TMR.RST ? 0x00000001 : 0x0); TRACE(" Retrieving timer Mode Register (TMR)\n"); break; case 0x0004: /* timer Reference Register (TRR) */ *result = timer->TRR; TRACE(" Retrieving timer Reference Register (TRR)\n"); break; case 0x0008: /* timer Capture Register (TCR) */ *result = timer->TCR; TRACE(" Retrieving timer Capture Register (TCR)\n"); break; case 0x000C: /* timer Counter (TCN) */ *result = timer->TCN; TRACE(" Retrieving timer Counter (TCN)\n"); break; case 0x0011: /* timer Event Register (TER) */ *result = (timer->TER.REF ? 0x00000002 : 0x0) | (timer->TER.CAP ? 0x00000001 : 0x0); TRACE(" Retrieving timer Event Register (TER)\n"); break; default: return 0; } TRACE(" Returning 0x%08lx\n", *result); return 1; } coldfire-0.2.2/peripherals/uart_5206.c0100644000175000017500000005006210057150702016034 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ /* NOTES: - TxEMP interrrupts untested. Use TxRDY for interrupts for guaranteed proper operation. */ #include #include #include #include #include #include #include "coldfire.h" TRACER_DEFAULT_CHANNEL(serial); /* UMR1 -- Mode Register 1 * 7 6 5 4 3 2 1 0 * +-----+-----+---+-------+---+-------+ * |RxRTS|RxIRQ|ERR| PM1-0 |PT |B/C1-0 | * +-----+-----+---+-------+---+-------+ */ struct _UMR1 { unsigned char RxRTS; unsigned char RxIRQ; unsigned char ER; unsigned char PM; unsigned char PT; unsigned char BC; }; /* UMR2 -- Mode Register 2 * 7 6 5 4 3 2 1 0 * +-------+-----+-----+---------------+ * | CM1-0 |TxRTS|TxCTS| SB3-0 | * +-------+-----+-----+---------------+ */ struct _UMR2 { unsigned char CM; unsigned char TxRTS; unsigned char TxCTS; unsigned char SB; }; /* USR -- Status Register * 7 6 5 4 3 2 1 0 * +-----+-----+-----+-----+-----+-----+-----+-----+ * | RB | FE | PE | OE |TxEMP|TxRDY|FFULL|RxRDY| * +-----+-----+-----+-----+-----+-----+-----+-----+ */ struct _USR { unsigned char RB; unsigned char FE; unsigned char PE; unsigned char OE; unsigned char TxEMP; unsigned char TxRDY; unsigned char FFULL; unsigned char RxRDY; }; /* UCSR -- Clock Select Register * 7 6 5 4 3 2 1 0 * +-----------------------+-----------------------+ * | RCS3-0 | TCS3-0 | * +-----------------------+-----------------------+ */ struct _UCSR { unsigned char RCS; unsigned char TCS; }; /* UCR -- Command Register * 7 6 5 4 3 2 1 0 * +-----+-----------------+-----------+-----------+ * | --- | MISC2-0 | TC1-0 | RC1-0 | * +-----+-----------------+-----------+-----------+ */ struct _UCR { unsigned char MISC; unsigned char TC; unsigned char RC; }; /* UIPCR - Input Port Change Register * 7 6 5 4 3 2 1 0 * +-----+-----+-----+-----+-----+-----+-----+-----+ * | 0 | 0 | 0 | COS | 1 | 1 | 1 | CTS | * +-----+-----+-----+-----+-----+-----+-----+-----+ */ struct _UIPCR { unsigned char COS; unsigned char CTS; }; /* UISR - Interrupt Status Register * 7 6 5 4 3 2 1 0 * +-----+-----+-----+-----+-----+-----+-----+-----+ * | COS | - | - | - | - | DB |RxRDY|TxRDY| * +-----+-----+-----+-----+-----+-----+-----+-----+ */ struct _UISR { unsigned char COS; unsigned char DB; unsigned char RxRDY; unsigned char TxRDY; }; /* UIMR - Interrupt Mask Register * 7 6 5 4 3 2 1 0 * +-----+-----+-----+-----+-----+-----+-----+-----+ * | COS | - | - | - | - | DB |FFULL|TxRDY| * +-----+-----+-----+-----+-----+-----+-----+-----+ */ struct _UIMR { unsigned char COS; unsigned char DB; unsigned char FFULL; unsigned char TxRDY; }; struct _uart_data { /* Read */ struct _UMR1 UMR1; struct _UMR2 UMR2; unsigned char UMR_pointer; struct _USR USR; char URB[3]; /* Recieve Buffer */ unsigned char URB_count; struct _UIPCR UIPCR; struct _UISR UISR; unsigned char UBG1; unsigned char UBG2; unsigned char UIVR; char UIP; /* Write */ struct _UCSR UCSR; struct _UCR UCR; /* We dont' need to save this, but thisi is a good * place to put the register for decoding */ char UTB; /* Transmit Buffer */ char UACR; struct _UIMR UIMR; char transmitter_enabled; char receiver_enabled; int fd; char fd_connected; }; static void serial_setup(struct _memory_segment *s); static void serial_fini(struct _memory_segment *s); static void serial_reset(struct _memory_segment *s); static void serial_update(struct _memory_segment *s); static char serial_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset); static char serial_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value); void serial_5206_init(void) { memory_module_register("uart_5206", &serial_setup); } static unsigned long *default_uart_base_reg = NULL; static unsigned long default_uart_base = 0; static void serial_setup(struct _memory_segment *s) { struct _uart_data *uart; int port=5206; if(s->mask != 0 && s->mask != 0xFFFFFFC0) { printf("warning: %s length must be 0x3F, not 0x%08lx. reset.\n", s->name, ~s->mask); } s->mask = 0xFFFFFFC0; s->fini = &serial_fini; s->read = &serial_read; s->write = &serial_write; s->reset = &serial_reset; s->update = &serial_update; if(s->interrupt_line == 0) { /* uart1 - 12 * uart2 - 13 */ if(s->name[strlen(s->name) - 1] == '1') { s->interrupt_line = 12; } else { s->interrupt_line = 13; } ERR("Interrupt line for %s not set, defaulting to %d\n", s->name, s->interrupt_line); } uart = malloc(sizeof(struct _uart_data)); memset(uart, 0, sizeof(struct _uart_data)); s->data = uart; /* Setup a bind for the port */ uart->fd_connected = 0; while(-1 == network_setup_on_port(&uart->fd, port)) port++; printf("(on port %d)", port); /* Ensure we have a default serial segment, it will be the one * marked with code=xx, or the first segment we find. */ if(s->code_len || default_uart_base_reg == NULL) { default_uart_base_reg = s->base_register; default_uart_base = s->base; } } static void serial_fini(struct _memory_segment *s) { /* struct _uart_data *uart = (struct _uart_data *)s->data;*/ free(s->name); free(s->data); } static void serial_reset(struct _memory_segment *s) { struct _uart_data *uart = (struct _uart_data *)s->data; memset(&uart->UMR1, 0, sizeof(struct _UMR1)); memset(&uart->UCR, 0, sizeof(struct _UCR)); uart->URB[0]=0; uart->URB_count=0; } /* This is called on every tick */ static void serial_update(struct _memory_segment *s) { /* This routine handles transmitting, receiving, and is * in charge of asserting, or withdrawing the serial interrupt */ struct _uart_data *uart = (struct _uart_data *)s->data; int status; /* short Baud = (uart->UBG1 << 8) | uart->UBG2;*/ /* TRACE("%s: update: connected=%d, transmitterenabled=%d, receiverenabled=%d\n", PortNumber, uart->fd_connected, uart->transmitter_enabled, uart->receiver_enabled); */ if(!uart->fd_connected) { /* This eats up a bit of extra time, but we need to do * a !connected check anyway.. (if we don't.. then below, * we'll try to read/write to a bad fd).. So, I guess * accepting connections is most naturally put here */ if(network_check_accept(&uart->fd)) { /* fd_connected */ send(uart->fd, s->name, 5, 0); send(uart->fd, "\r\n", 2, 0); uart->fd_connected=1; } } /* Transmit stuff */ if(uart->transmitter_enabled) { /* If TransmitterReady (TxRDY bit of Status Reg USR) * 0 - Character waiting in UTB to send * 1 - Transmitter UTB is empty, and ready to be loaded */ if(uart->USR.TxRDY == 0) { /* We use the fact that send() buffers characters * for us, so we don't need to shift anything * into transmit buffers */ TRACE("%s: Sending character %c(%d)\n", s->name, uart->UTB,uart->UTB); if(uart->fd_connected) send(uart->fd, &uart->UTB, 1, 0); /* Signal that there is room in the buffer */ uart->USR.TxRDY = 1; /* The UISR duplicates the USR for TxRDY */ uart->UISR.TxRDY = 1; /* Now that the character is sent, set the buffer * empty condition */ uart->USR.TxEMP=1; } } /* Receive stuff */ if(uart->receiver_enabled) { unsigned char c; /* See if there is any data */ /* TRACE("%s: recv...\n", PortNumber);*/ if(uart->fd_connected) { status = recv(uart->fd, &c, 1, 0); } else { status=0; c=0; } if(status == -1 || c==0) goto interrupt_update; if(c==0) goto interrupt_update; if(c==0xff) { /* Escape sequence */ status = recv(uart->fd, &c, 1, 0); status = recv(uart->fd, &c, 1, 0); goto interrupt_update; } TRACE("%s: Got character %d[%c]\n", s->name, c, c); /* If URB has room, store the character */ if(uart->URB_count < 3) { uart->URB[(int)uart->URB_count]=c; uart->URB_count++; } else { ERR("%s: URB_count just overflowed!\n", s->name); } uart->USR.RxRDY = 1; if(uart->URB_count == 3) uart->USR.FFULL=1; if(uart->UMR1.RxIRQ==0) uart->UISR.RxRDY = uart->USR.RxRDY; else uart->UISR.RxRDY = uart->USR.FFULL; } interrupt_update: /* Adjust the interrupt status */ /* If the TX is masked on, and there is room in the buffer, we want the interrupt on */ if(uart->UIMR.TxRDY && uart->USR.TxRDY) { TRACE("%s: Transmit Interrupt Condition exists\n", s->name); goto interrupts_on; } /* If Rx is masked on, and we are interrupting on RxRDY, and RxRDY is on, then interrupt */ if(uart->UIMR.FFULL && !uart->UMR1.RxIRQ && uart->USR.RxRDY) { TRACE("%s: Recieve RxRDY interrupt Condition exists\n", s->name); goto interrupts_on; } /* If Rx is masked on, and we are interrupting on FFULL, and FFULL is on, then interrupt */ if(uart->UIMR.FFULL && uart->UMR1.RxIRQ && uart->USR.FFULL) { TRACE("%s: Recieve FFULL interrupt Condition exists\n", s->name); goto interrupts_on; } /* If we get here, we couln't find a condition to turn/leave the interrupts on , so turn 'em off */ /* TRACE("%s: No interrupt conditions, withdrawing any interrupt requests\n", s->name);*/ sim->interrupt_withdraw(s->interrupt_line); return; interrupts_on: TRACE("%s: Posting interrupt request for %s\n", s->name); sim->interrupt_assert(s->interrupt_line, uart->UIVR); return; } /* Handles hardware writes to the serial ports */ static char serial_write(struct _memory_segment *s, short size, unsigned long offset, unsigned long value) { struct _uart_data *uart = (struct _uart_data *)s->data; /* We ASSUME that we are passed an offset that is valid for us, and that MBAR has already been subtracted from it */ TRACE("%s: size=%d, offset=0x%04lx, value=0x%08lx\n", s->name, size, offset, value); switch(offset) { case 0x0000: /* Mode Register (UMR1, UMR2) */ if(uart->UMR_pointer==0) { uart->UMR1.RxRTS = (value & 0x80) ? 1 : 0; uart->UMR1.RxIRQ = (value & 0x40) ? 1 : 0; uart->UMR1.ER = (value & 0x20) ? 1 : 0; uart->UMR1.PM = (value & 0x18) >> 3; uart->UMR1.PT = (value & 0x04) ? 1 : 0; uart->UMR1.BC = (value & 0x03); uart->UMR_pointer=1; TRACE("%s: Setting Mode Register 1 (UMR1)\n", s->name); TRACE("%s: RxRTS=%d, RxIRQ=%d, ErrorMode(ERR)=%d, ParityMode(PM)=%d\n", s->name, uart->UMR1.RxRTS, uart->UMR1.RxIRQ, uart->UMR1.ER, uart->UMR1.PM); TRACE("%s: ParityType(PT)=%d, BitsPerCharacter(BC)=%d\n", s->name, uart->UMR1.PT, uart->UMR1.BC); } else { uart->UMR2.CM = (value & 0xC0) >> 6; uart->UMR2.TxRTS = (value & 0x02) ? 1 : 0; uart->UMR2.TxCTS = (value & 0x01) ? 1 : 0; uart->UMR2.SB = (value & 0x0F); TRACE("%s: Setting Mode Register 2 (UMR2)\n", s->name); TRACE("%s: CM=%d, TxRTS=%d, TxCTS=%d, SB=%d\n", s->name, uart->UMR2.CM, uart->UMR2.TxRTS, uart->UMR2.TxCTS, uart->UMR2.SB); } break; case 0x0004: /* Clock-Select Register (UCSR) */ uart->UCSR.RCS = (value & 0xF0) >> 4; uart->UCSR.TCS = (value & 0x0F); TRACE("%s: Clock-Select Register (UCSR)\n", s->name); TRACE("%s: RCS=%d, TCS=%d\n", s->name, uart->UCSR.RCS, uart->UCSR.TCS); break; case 0x0008: /* Command Register (UCR) */ uart->UCR.MISC = (value & 0x70) >> 4; uart->UCR.TC = (value & 0x0C) >> 2; uart->UCR.RC = (value & 0x03); switch(uart->UCR.MISC) { case 0: /* No Command */ break; case 1: /* Reset Mode Register Pointer */ TRACE(" Resetting Mode Register Pointer\n"); uart->UMR_pointer=0; break; case 2: /* Reset Receiver */ TRACE(" Resetting Receiver\n"); uart->receiver_enabled=0; uart->USR.FFULL=0; uart->USR.RxRDY=0; break; case 3: /* Reset Transmitter */ TRACE(" Resetting Transmitter\n"); uart->transmitter_enabled=0; uart->USR.TxEMP=0; uart->USR.TxRDY=0; uart->UISR.TxRDY=0; /* Serial_InterruptUpdate(PortNumber);*/ break; case 4: /* Reset Error Status */ TRACE(" Resetting Error Status\n"); uart->USR.OE=0; uart->USR.FE=0; uart->USR.PE=0; uart->USR.RB=0; break; case 5: /* Reset Break-Change Interrupt */ ERR("%s: Resetting Break-Change Interrupt (NOT IMPLEMENTED)\n", s->name); break; case 6: /* Start Break */ ERR("%s: Setting Start Break (NOT IMPLEMENTED)\n", s->name); break; case 7: /* Stop Break */ ERR("%s: Setting Stop Break (NOT IMPLEMENTED)\n", s->name); break; } switch(uart->UCR.TC) { case 0: /* No action */ break; case 1: /* Transmitter Enable */ TRACE(" Enabling Transmitter\n"); if(!uart->transmitter_enabled) { uart->transmitter_enabled=1; uart->USR.TxEMP=1; uart->USR.TxRDY=1; uart->UISR.TxRDY=1; /* Serial_InterruptUpdate(PortNumber);*/ } break; case 2: /* Transmitter Disable */ TRACE(" Disabling Transmitter\n"); if(uart->transmitter_enabled) { uart->transmitter_enabled=0; uart->USR.TxEMP=0; uart->USR.TxRDY=0; uart->UISR.TxRDY=0; /* Serial_InterruptUpdate(PortNumber);*/ } break; case 3: /* Do Not Use */ ERR("%s: Accessed DO NOT USE bit for UCR:TC bits\n", s->name); break; } /* Receiver stuff */ switch(uart->UCR.RC) { case 0: /* No action */ break; case 1: /* Receiver Enable */ TRACE(" Enabling Receiver\n"); if(!uart->receiver_enabled) uart->receiver_enabled=1; break; case 2: /* Receiver Disable */ TRACE(" Disabling Receiver\n"); if(uart->transmitter_enabled) uart->receiver_enabled=0; break; case 3: /* Do Not Use */ ERR("%s: Accessed DO NOT USE bit for UCR:RC bits\n", s->name); break; } break; case 0x000C: /* Transmitter Buffer (UTB) */ TRACE(" Transmitting character 0x%02x\n", value); uart->UTB = (char)value; /* A write to the UTB Clears the TxRDY bit */ uart->USR.TxRDY=0; uart->UISR.TxRDY=0; /* Also ensure the empty bit is off, we just wrote * to the transmitter, the buffer is not empty */ uart->USR.TxEMP=0; break; case 0x0010: /* Auxiliary Control Register (UACR) */ /* We can't interrupt on a change in the CTS line of * the serial port.. because.. well.. we're not connected * to a real serial port.. so we ignore writes to * this register, but print an error if someone * tries to enable this */ if( ((char)value) & 0x01) { /* Enable CTS interrupt */ ERR("%s: Setting Auxiliary Control Register (UACR) " "IEC (Interrupt Enable Control) has no effect, " "because we don't have a CTS pin on the serial " "port to interrupt on. Sorry.\n", s->name); } break; case 0x0014: /* Intrerrupt Mask Register (UIMR) */ TRACE(" Setting Interrupt Mask Register (UMIR) to 0x%02x\n", value); uart->UIMR.COS = (value &0x80) ? 1 : 0; uart->UIMR.DB = (value &0x04) ? 1 : 0; uart->UIMR.FFULL = (value &0x02) ? 1 : 0; uart->UIMR.TxRDY = (value &0x01) ? 1 : 0; TRACE(" Change-of-State (COS) interrupt: %s\n", uart->UIMR.COS ? "enabled":"disabled"); TRACE(" Delta Break (DB) interrupt: %s\n", uart->UIMR.DB ? "enabled":"disabled"); TRACE(" FIFO Full (FFULL) interrupt: %s\n", uart->UIMR.FFULL ? "enabled":"disabled"); TRACE(" Transmitter Ready (TxRDY) interrupt: %s\n", uart->UIMR.TxRDY ? "enabled":"disabled"); /* Serial_InterruptUpdate(PortNumber);*/ break; case 0x0018: /* Baud Rate Generator Prescale MSB (UBG1) */ TRACE(" Baud Rate Generator Prescale MSB to 0x%02x\n", value); uart->UBG1 = (unsigned char)value; TRACE(" Baud Rate is %d\n", (uart->UBG1 << 8) + uart->UBG2); break; case 0x001C: /* Baud Rate Generator Prescale LSB (UBG2) */ TRACE(" Baud Rage Generator Prescale LSB to 0x%02x\n", value); uart->UBG2 = (unsigned char)value; TRACE(" Baud Rate is %d\n", (uart->UBG1 << 8) + uart->UBG2); break; case 0x0030: /* Interrupt Vector Register (UIVR) */ TRACE(" Setting Interrupt Vector Register to 0x%02x\n", value); uart->UIVR = (unsigned char)value; break; case 0x0034: /* NO NOT ACCESS */ break; case 0x0038: /* Output Port Bit Set CMD (UOP1) */ /* Since we don't have a direct connection to a sieral * port, this does nothing */ TRACE("%s: Set Output Port Bit (UOP1) (no effect)\n", s->name); break; case 0x003C: /* Output Port Bit Reset CMD (UOP0) */ TRACE("%s: Reset Output Port Bit (UOP0) (no effect)\n", s->name); break; default: return 0; } return 1; } static char serial_read(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset) { struct _uart_data *uart = (struct _uart_data *)s->data; /* We ASSUME that we are passed an offset that is valid for us, and that MBAR has already been subtracted from it */ TRACE("%s: size=%d, offset=0x%04lx\n", s->name, size, offset); *result=0; switch(offset) { case 0x0000: /* Mode Register (UMR1, UMR2) */ break; case 0x0004: /* Status Register (USR) */ *result = (uart->USR.RB ? 0x80 : 0x00) | (uart->USR.FE ? 0x40 : 0x00) | (uart->USR.PE ? 0x20 : 0x00) | (uart->USR.OE ? 0x10 : 0x00) | (uart->USR.TxEMP? 0x08 : 0x00) | (uart->USR.TxRDY? 0x04 : 0x00) | (uart->USR.FFULL? 0x02 : 0x00) | (uart->USR.RxRDY? 0x01 : 0x00); break; case 0x0008: /* DO NOT ACCESS */ return 0; case 0x000C: /* Receiver Buffer (URB) */ *result = uart->URB[0]; /* Shift the FIFO */ uart->URB[0] = uart->URB[1]; uart->URB[1] = uart->URB[2]; /* See if we can decrement the fifo count */ if(uart->URB_count == 0) { ERR("%s: underrun (read but no data in FIFO)\n", s->name); uart->URB_count=0; } else { uart->URB_count--; } /* Check to see if there is nothing left in the buffer */ if(uart->URB_count==0) uart->USR.RxRDY = 0; /* The buffer cannot be full anymore, we just did a read */ uart->USR.FFULL=0; /* Set the UISR */ if(uart->UMR1.RxIRQ==0) uart->UISR.RxRDY = uart->USR.RxRDY; else uart->UISR.RxRDY = uart->USR.FFULL; /* Update the status of the serial intrrupt */ /* Serial_InterruptUpdate(PortNumber);*/ break; case 0x0010: /* Input Port Change Register (UIPCR) */ break; case 0x0014: /* Interrupt Status Register (UISR) */ *result = (uart->UISR.COS ? 0x80 : 0x00) | (uart->UISR.DB ? 0x04 : 0x00) | (uart->UISR.RxRDY? 0x02 : 0x00) | (uart->UISR.TxRDY? 0x01 : 0x00); break; case 0x018: /* Baud Rate Generator Prescale MSB (UBG1) */ *result = uart->UBG1; break; case 0x01C: /* Baud Rate Generator Prescale LSB (UBG2) */ *result = uart->UBG2; break; case 0x0030: /* Interrupt Vector Register (UIVR) */ *result = uart->UIVR; break; case 0x0034: /* Input Port Register (UIP) */ *result = 0; break; case 0x0038: /* NO NOT ACCESS */ case 0x003C: /* NO NOT ACCESS */ default: ERR("%s: Unaligned access!\n",s->name); return 0; } TRACE("%s: result=0x%08lx\n", s->name, *result); return 1; } /* FIXME: We need to fix the Serial_getch and Serial_putch routines, * so they use the serial port access rouintes above... The routines * below are for TRAP #15 */ char serial_getch(short port_number) { unsigned long base = *default_uart_base_reg + default_uart_base; unsigned long usr; unsigned long c; /* Enable Receiver */ Memory_StorByte(base + 0x08, 0x05); TRACE("default uart: Getting a character..\n"); while(1) { Memory_RetrByte(&usr, base + 0x04); if(usr & 0x01) { /* Reveiver has 1 or more characters */ Memory_RetrByte(&c, base + 0x0C); break; } memory_update(); } TRACE("default uart: done, returning character %d[%c]\n", c, c); return (char)c; } void serial_putch(short port_number, char c) { unsigned long base = *default_uart_base_reg + default_uart_base; unsigned long usr; /* Enable transmitter */ Memory_StorByte(base + 0x08, 0x05); /* Wait for TxRDY to go low */ TRACE("default uart: Directly putting character %d[%c]\n", c, c); while(1) { Memory_RetrByte(&usr, base + 0x04); if(usr & 0x04) { Memory_StorByte(base + 0x0C, c); break; } memory_update(); } /*Serial_Stor(8, 0x014C + (0x40*PortNumber), c);*/ /* send(Serialuart[PortNumber].fd, &c, 1, 0);*/ TRACE("default uart: done\n"); } coldfire-0.2.2/board.c0100644000175000017500000001153710015265014013157 0ustar davedave#include #include #include #include "coldfire.h" /* Arnewsh memory map */ /* $00000000 - $01FFFFFF DRAM * $10000000 - $100003FF Internal module registers * $20000000 - $200001FF Internal SRAM * $30000000 - $300FFFFF 1Meg space for MC68HC901 * $40000000 - $400FFFFF 1Meg ISA bus area * $FFE00000 - $FFE3FFFF 256K flash rom */ static const char *arnewsh_config_data = "board \"Arnewsh\"\n" "cpu \"5206\"\n" "\n" "; DRAM is most likely to be accessed\n" "ram name=\"dram\", base=0x0, len=0x00400000\n" "\n" "; Default core register values\n" "reg VBR=0x0\n" "reg MBAR=0x10000000\n" "reg RAMBAR=0x20000000\n" "reg ROMBAR=0xFFE00000\n" "reg PC=0xFFE00000\n" "reg SP=0x00400000\n" "reg SR=0x2000\n" "\n" "; Then the SIM, the sim_init initializes the entire sim region, \n" "; so the timer and uart need to go first else we'll never send \n" "; read/writes into them \n" "; We also don't need the lengths, the modules know how long they are\n" "timer_5206 name=\"timer1\", base=MBAR+0x100, int=9\n" "timer_5206 name=\"timer2\", base=MBAR+0x120, int=10\n" "uart_5206 name=\"uart1\", base=MBAR+0x140, int=12\n" "uart_5206 name=\"uart2\", base=MBAR+0x180, int=13, code=00\n" "sim_5206 name=\"sim\", base=MBAR+0x0\n" "\n" "; Least likely to be accessed\n" "dummy name=ne2000, base=0x40000300, len=0x0100\n" "dummy name=isa, base=0x40000000, len=0x00100000\n" "rom name=rom, base=ROMBAR+0x0, len=0x00040000, \\\n" " code=70004e4f\n" "ram name=sram, base=RAMBAR+0x0, len=0x00000100\n"; struct _board_data board_data; struct _board_data *board_get_data(void) { return &board_data; } void board_init(void) { /* Setup global board data */ memset(&board_data, 0, sizeof(struct _board_data)); /* Set some defaults */ board_data.clock_speed = 25000000; board_data.cycle_count = 0; board_data.use_timer_hack = 0; board_data.trace_run = 0; board_data.cpu = CF_NULL; } void board_reset(void) { board_data.cycle_count = 0; memory_reset(); } void board_fini(void) { } void board_do_config(char *config_data) { char *ptr = config_data; char *next_ptr, *tmp_ptr; int argc; char *argv[3]; int num_memory_segments=0; /* printf("[%s]\n", config_data);*/ while(1) { next_ptr = strchr(ptr, '\n'); if(next_ptr != NULL) { *next_ptr = 0; next_ptr++; } tmp_ptr = strchr(ptr, ';'); if(tmp_ptr) *tmp_ptr=0; argc = arg_split(argv, ptr, 2); if(!argc) goto next; if(strcasecmp(argv[0], "board") == 0) { printf("Board ID: %s\n", argv[1]); } else if(strcasecmp(argv[0], "cpu") == 0) { printf("CPU: %s", argv[1]); if(strcmp(argv[1], "5206") == 0) { board_data.cpu = CF_5206; } else if(strcmp(argv[1], "5206e") == 0) { board_data.cpu = CF_5206e; } else if(strcmp(argv[1], "5307") == 0) { board_data.cpu = CF_5307; } instruction_register_instructions(); } else if(strcasecmp(argv[0], "reg") == 0) { memory_core_set_reset_values(argv[1]); } else if(argc > 1) { if(num_memory_segments % 4 == 0) { if(num_memory_segments==0) printf("Memory segments: "); else printf(" "); } memory_module_setup_segment(argv[0], argv[1]); num_memory_segments++; if(num_memory_segments % 4 == 0) { printf("\n"); } } argc = 0; next: if(next_ptr == NULL) break; ptr = next_ptr; } printf("\n"); } void board_setup(char *file) { char *data = NULL; FILE *in = NULL; char *dirs[] = { NULL, "/usr/local/share/coldfire/", "/usr/share/coldfire/", NULL }; char *ptr; char clearing_line = 0; ptr = getenv("HOME"); dirs[0] = malloc(strlen(ptr) + 12); sprintf(dirs[0], "%s/.coldfire/", ptr); if(file) { char filename[256]; int x; if(strchr(file, '/')) { strcpy(filename, file); in = fopen(filename, "rt"); } else { for(x=0;dirs[x] != NULL; x++) { snprintf(filename, 255, "%s%s", dirs[x], file); in = fopen(filename, "rt"); if(in) break; } if(!in) { printf("\tCouldn't open board config file. Tried:\n"); for(x=0;dirs[x] != NULL; x++) { snprintf(filename, 255, "%s%s", dirs[x], file); printf("\t [%s]\n", filename); } } } if(in){ int len; printf("\tOpened [%s]\n", filename); fseek(in, 0, SEEK_END); len = ftell(in); data = malloc(len+1); fseek(in, 0, SEEK_SET); fread(data, len, 1, in); fclose(in); } else { printf("\tUsing default (arnewsh-5206) configuration.\n"); file = NULL; } } if(!file) { data = strdup(arnewsh_config_data); } /* Find any backslashes that have newlines after them * and replace the backslash and the newline with a space */ clearing_line = 0; for(ptr=data; *ptr != 0; ptr++) { if(*ptr == '\\') { *ptr = ' '; clearing_line = 1; } if((*ptr == '\n' || *ptr == '\r') && clearing_line == 1 ) { clearing_line = 0; *ptr++ = ' '; if(*ptr == '\n' || *ptr == '\r') *ptr = ' '; } } board_do_config(data); free(data); } coldfire-0.2.2/coldfire.h0100644000175000017500000001401010015265014013651 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include "tracer/tracer.h" #include "config.h" #include "configdefs.h" struct _Instruction { void (*FunctionPtr)(void); unsigned short Code; unsigned short Mask; long (*DIFunctionPtr)(char *Instruction, char *Arg1, char *Arg2); }; /* This is ALWAYS cast into a longword, so we need to pad it to a longword */ struct _InstructionExtensionWord { #ifndef WORDS_BIGENDIAN signed Displacement:8; unsigned EV:1; unsigned Scale:2; unsigned WL:1; unsigned Register:3; unsigned AD:1; unsigned pad:16; #else unsigned pad:16; unsigned AD:1; unsigned Register:3; unsigned WL:1; unsigned Scale:2; unsigned EV:1; signed Displacement:8; #endif }; enum { I_ADD, I_ADDA, I_ADDI, I_ADDQ, I_ADDX, I_AND, I_ANDI, I_ASL, I_ASR, I_BCC, I_BCHG, I_BCLR, I_BRA, I_BSET, I_BSR, I_BTST, I_CLR, I_CMP, I_CMPA, I_CMPI, I_DIVS, I_DIVL, I_DIVU, I_DIVUL, I_EOR, I_EORI, I_EXT, I_JMP, I_JSR, I_LEA, I_LINK, I_LSR, I_LSL, I_MOVE, I_MOVEC, I_MOVEA, I_MOVEM, I_MOVEQ, I_MOVETOSR, I_MULS, I_MULU, I_NEG, I_NEGX, I_NOP, I_NOT, I_OR, I_ORI, I_RTE, I_RTS, I_SCC, I_SUB, I_SUBA, I_SUBI, I_SUBQ, I_SUBX, I_SWAP, I_TRAP, I_TRAPF, I_TST, I_UNLK, I_LAST }; enum _coldfire_cpu_id { CF_NULL, CF_5206, CF_5206e, CF_5276, CF_5307, CF_5407, CF_LAST }; #define INSTRUCTION_(I,A) \ typedef union _##I##_instr { \ struct _##I##_bits { \ A; \ } Bits; \ unsigned long Code; \ } I##_Instr #ifndef WORDS_BIGENDIAN #define INSTRUCTION_1ARG(I,A1,S1) \ INSTRUCTION_(I, A1:S1) #define INSTRUCTION_2ARGS(I,A1,S1,A2,S2) \ INSTRUCTION_(I, A2:S2; A1:S1) #define INSTRUCTION_3ARGS(I,A1,S1,A2,S2,A3,S3) \ INSTRUCTION_(I, A3:S3; A2:S2; A1:S1) #define INSTRUCTION_4ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4) \ INSTRUCTION_(I, A4:S4; A3:S3; A2:S2; A1:S1) #define INSTRUCTION_5ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4,A5,S5) \ INSTRUCTION_(I, A5:S5; A4:S4; A3:S3; A2:S2; A1:S1) #define INSTRUCTION_6ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4,A5,S5,A6,S6) \ INSTRUCTION_(I, A6:S6; A5:S5; A4:S4; A3:S3; A2:S2; A1:S1) #define INSTRUCTION_7ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4,A5,S5,A6,S6,A7,S7) \ INSTRUCTION_(I, A7:S7; A6:S6; A5:S5; A4:S4; A3:S3; A2:S2; A1:S1) #else #define INSTRUCTION_1ARG(I,A1,S1) \ INSTRUCTION_(I, unsigned pad:(32-S1); \ A1:S1) #define INSTRUCTION_2ARGS(I,A1,S1,A2,S2) \ INSTRUCTION_(I, unsigned pad:(32-S1-S2); \ A1:S1; A2:S2) #define INSTRUCTION_3ARGS(I,A1,S1,A2,S2,A3,S3) \ INSTRUCTION_(I, unsigned pad:(32-S1-S2-S3); \ A1:S1; A2:S2; A3:S3) #define INSTRUCTION_4ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4) \ INSTRUCTION_(I, unsigned pad:(32-S1-S2-S3-S4); \ A1:S1; A2:S2; A3:S3; A4:S4) #define INSTRUCTION_5ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4,A5,S5); \ INSTRUCTION_(I, unsigned pad:(32-S1-S2-S3-S4-S5); \ A1:S1; A2:S2; A3:S3; A4:S4; A5:S5) #define INSTRUCTION_6ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4,A5,S5,A6,S6)\ INSTRUCTION_(I, unsigned pad:(32-S1-S2-S3-S4-S5-S6); \ A1:S1; A2:S2; A3:S3; A4:S4; A5:S5; A6:S6) #define INSTRUCTION_7ARGS(I,A1,S1,A2,S2,A3,S3,A4,S4,A5,S5,A6,S6,A7,S7) \ INSTRUCTION_(I, unsigned pad:(32-S1-S2-S3-S4-S5-S6-S7); \ A1:S1; A2:S2; A3:S3; A4:S4; A5:S5; A6:S6; A7:S7) #endif #include "memory.h" #include "addressing.h" #include "monitor/monitor.h" #include "i_5206/i_5206.h" #include "i_5206e/i_5206e.h" #include "i_5307/i_5307.h" #include "peripherals/peripherals.h" /* board.c -- definitions of various eval board layouts */ struct _board_data { char *cpu_id; unsigned long clock_speed; unsigned long cycle_count; unsigned long total_cycle_count; char use_timer_hack; char trace_run; enum _coldfire_cpu_id cpu; }; void board_init(void); void board_reset(void); void board_fini(void); void board_setup(char *file); struct _board_data *board_get_data(void); /* cycle.c */ void cycle(unsigned long number); int cycle_EA(short reg, short mode); /* exception.c -- exception generators */ long exception_do_raw_exception(short vector); long exception_do_exception(short vector); void exception_restore_from_stack_frame(void); void exception_push_stack_frame(short vector); void exception_post(unsigned long interrupt_level, unsigned long (*func)(unsigned long interrupt_level) ); void exception_withdraw(unsigned long interrupt_level); void exception_check_and_handle(void); /* handlers.c -- misc functions */ void SR_Set(short Instr, long Source, long Destination, long Result); /* i.c -- instructions */ void Instruction_Init(void); void instruction_register(unsigned short code, unsigned short mask, void (*execute)(void), long (*disassemble)(char *, char *, char *)); void Instruction_DeInit(void); struct _Instruction *Instruction_FindInstruction(unsigned short Instr); void instruction_register_instructions(void); /* misc.c -- Misc functions */ int arg_split(char **argv, char *buffer, int max_args); int arg_split_chars(char **argv, char *buffer, int max_args, char *split); /* network.c -- Network functions */ int network_setup_on_port(int *fd, unsigned short port); int network_check_accept(int *fd); /* run.c -- Running the core */ extern char Run_Exit; void Run(void); /* sim.c -- System Integration Module */ struct _sim_register { char *name; long offset; char width; char read; char write; long resetvalue; char *description; }; struct _sim { /* These are for peripherals to talk to the sim */ void (*interrupt_assert)(short number, short vector); void (*interrupt_withdraw)(short number); /* These are for the monitor to query SIM registers */ struct _sim_register *(*register_lookup_by_offset)(long offset); struct _sim_register *(*register_lookup_by_name)(char *name); }; void sim_register(struct _sim *sim_data); extern struct _sim *sim; /* INSTRUCTION TIMING is firewalled inside profile.h */ #include "profile.h" /* MEMORY_STATS is firewalled inside stats.h */ #include "stats.h" coldfire-0.2.2/Makefile.rules.in0100644000175000017500000000133610015265014015116 0ustar davedaveCC = @CC@ CFLAGS = -Wall -fomit-frame-pointer @CFLAGS@ -I$(TOPSRCDIR) LIBS = @LIBS@ LD_R = ld -r RM = rm -f LDFLAGS = prefix = @prefix@ exec_prefix = @exec_prefix@ bindir = @bindir@ libdir = @libdir@ infodir = @infodir@ mandir = @mandir@ datadir = @datadir@ OBJS = $(C_SRCS:.c=.o) all: subdirs-all $(BUILD) .c.o: $(CC) $(CFLAGS) -c $< subdirs-%: force set -e; s='$(SUBDIRS)'; for i in $$s; do cd $$i && $(MAKE) $* && cd ..; done; install: subdirs-install uninstall: subdirs-uninstall clean: subdirs-clean clean-default distclean: subdirs-distclean distclean-default clean-default: $(RM) $(OBJS) $(BUILD) distclean-default: $(RM) $(OBJS) $(BUILD) Makefile force: ; coldfire-0.2.2/memory.c0100644000175000017500000002646210057150702013406 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #include #include #include /*#define TRACER_OFF*/ #include "coldfire.h" /* longword - (msb) 3 2 1 0 (lsb) * Big endian: * b3 b2 b1 b0 * Little endian: * b0 b1 b2 b3 */ /* External defs that need to be initialized */ struct _memory_core memory_core; struct _SR *SRBits = (struct _SR *)&memory_core.sr; /* memory core copy with values used when reset */ static struct _memory_core memory_core_reset_values; TRACER_DEFAULT_CHANNEL(memory); static struct _memory_module *memory_module = NULL; static int memory_module_count=0; static int memory_module_count_max=0; /* Make a list of pointers to segments. Note: we don't make a list of segments * directly, because some segments will want to save a pointer to themselves, * and they can't do that if we're realloc()ing the list as we add more items. */ struct _memory_segment_list_item { struct _memory_segment *seg; }; static struct _memory_segment_list_item *memory_segment_list = NULL; static int memory_segment_count=0; static int memory_segment_count_max=0; void memory_module_register(char *name, void (*setup)(struct _memory_segment *s)) { if(memory_module_count == memory_module_count_max) { memory_module_count_max += 4; memory_module = realloc(memory_module, sizeof(struct _memory_module) * memory_module_count_max); } memory_module[memory_module_count].name = strdup(name); memory_module[memory_module_count].setup = setup; memory_module_count++; } static unsigned long zero_register = 0; void memory_module_setup_segment(char *module_name, char *data) { struct _memory_segment *s; struct _memory_segment_list_item *i; int argc; char *argv[16]; int x; char movable = 1; struct _reg{ char *name; unsigned long *ptr; } regs[] = { { "mbar", &memory_core.mbar }, { "rombar", &memory_core.rombar }, { "rambar", &memory_core.rambar }, { NULL, NULL }}; /* Setup the memory segment */ if(memory_segment_count == memory_segment_count_max) { memory_segment_count_max += 4; memory_segment_list = realloc(memory_segment_list, sizeof(struct _memory_segment_list_item) * memory_segment_count_max); } i = &memory_segment_list[memory_segment_count]; s = malloc(sizeof(struct _memory_segment)); i->seg = s; memset(s, 0, sizeof(struct _memory_segment)); /* Split the data */ TRACE("data=[%s]\n", data); argc = arg_split_chars(argv, data, 15, " \t,="); TRACE(" split into %d args\n", argc); for(x=0;xname = strdup(argv[x+1]); TRACE("name=[%s]\n", s->name); } else if(strcasecmp(argv[x], "base") == 0) { int b_argc; char *b_argv[4]; int i; /* now the base register */ TRACE("base=[%s]\n", argv[x+1]); b_argc = arg_split_chars(b_argv, argv[x+1], 4, "+"); TRACE("split into %d args\n", b_argc); for(i=0;ibase); continue; } for(r=regs; r->name != NULL; r++) { if(strcasecmp(r->name, b_argv[i])==0){ TRACE("base register=[%s]\n", b_argv[i]); s->base_register = r->ptr; break; } } } } else if(strcasecmp(argv[x], "len") == 0) { TRACE("len=[%s]\n", argv[x+1]); /* turn the length into an access mask, if len is unspecified, then * we rely on the module to set the mask correctly */ sscanf(argv[x+1], "%lx", &s->mask); /* The mask is the inverted length * len 0x100 == mask FFFFFF00 */ s->mask = ~(s->mask - 1); } else if(strcasecmp(argv[x], "int") == 0) { sscanf(argv[x+1], "%hu", &s->interrupt_line); } else if(strcasecmp(argv[x], "code") == 0) { int i; s->code_len = strlen(argv[x+1]) / 2; s->code = malloc(s->code_len); TRACE("code length=%d\n", s->code_len); for(i=0;icode_len; i++) { char val[3] = { argv[x+1][(i*2)], argv[x+1][(i*2)+1], 0 }; int v; sscanf(val, "%x", &v); s->code[i] = v; TRACE(" code[%d] = 0x%02x\n", i, v); } } } printf("%s", s->name); /* Find the module, and run the module setup */ for(x=0;xbase_register == NULL) { s->base_register = &zero_register; movable=0; } /* printf("0x%08lx -> 0x%08lx %s\n", *s->base_register + s->base, *s->base_register + s->base + ~s->mask, movable ? "(movable)" : ""); */ printf(" "); fflush(stdout); memory_segment_count++; } struct _memory_segment *memory_find_segment_for(unsigned long offset) { int x; struct _memory_segment_list_item *i; TRACE("looing for a segment for offset=0x%08lx\n", offset); for(x=0,i=&memory_segment_list[0];xseg; register unsigned long b = *s->base_register + s->base; TRACE("%d: name=%s, base_reg=0x%08lx, base=0x%08x, mask=0x%08x\n", x, s->name, *s->base_register, s->base, s->mask); if( (offset & s->mask) == b) { TRACE(" match.\n"); return s; } } TRACE("no match.\n"); return NULL; } static void memory_core_reset(void) { /* resetore default values */ memory_core.pc_instruction_begin = 0x0; memory_core.sr = memory_core_reset_values.sr; memory_core.vbr = memory_core_reset_values.vbr; memory_core.mbar = memory_core_reset_values.mbar; memory_core.rambar = memory_core_reset_values.rambar; memory_core.rombar = memory_core_reset_values.rombar; memory_core.pc = memory_core_reset_values.pc; memory_core.a[7] = memory_core_reset_values.a[7] & 0xFFFFFFF0; } void memory_core_set_reset_values(char *s) { int argc; char *argv[16]; int x; struct _reg{ char *name; unsigned long *ptr; } regs[] = { { "mbar", &memory_core_reset_values.mbar }, { "rombar", &memory_core_reset_values.rombar }, { "rambar", &memory_core_reset_values.rambar }, { "vbr", &memory_core_reset_values.vbr }, { "sr", &memory_core_reset_values.sr }, { "pc", &memory_core_reset_values.pc }, { "sp", &memory_core_reset_values.a[7] }, { NULL, NULL }}; argc = arg_split_chars(argv, s, 15, " \t,="); for(x=0;xseg; if(s->reset) s->reset(s); } #if 0 TRACE("finding memory length\n"); /* Detect the length of the memory */ x = ; while(1) { x += 0x100; if(!memory_seek(x)) { break; } } TRACE("length=0x%08lx\n", x); /* Start A7 pointing aligned at the end of memory */ memory_core.a[7]=(x & 0xFFFFFFF0) -4; #endif TRACE("storing PC and SR\n"); /* Fill out the values of the PC and the SP in the vector table */ Memory_Stor(32, memory_core.vbr, memory_core.a[7]); Memory_Stor(32, memory_core.vbr+4, memory_core.pc); } void Memory_Init(void) { /* First reset the core, this just sets the core regsters, useful * because the modules depend on some of the core registers, like * the rombar and the mbar (just so they print properly) */ memory_core_reset(); printf("Loading memory modules...\n"); ram_init(); timer_5206_init(); serial_5206_init(); sim_5206_init(); sim_5307_init(); isa_init(); } void Memory_DeInit(void) { int x; struct _memory_segment_list_item *i; for(x=0,i=&memory_segment_list[0];xseg; s->fini(s); if(s->code) free(s->code); free(s); } free(memory_segment_list); } /* See if we can seek to address at offset */ char memory_seek(unsigned long offset) { struct _memory_segment *s; TRACE("Testing Offset=0x%08lx\n", offset); s = memory_find_segment_for(offset); return (s==NULL) ? 0 : 1; } /* Desc: Retrieves a value from the memory * Returns: 1 if successful, 0 if something bad happened * Notes: This always first retrieves a long into *Result, then it trims it down */ void rd_dump_registers(unsigned long cpc, unsigned long csr); char Memory_Retr(unsigned long *Result, short Size, long Offset) { struct _memory_segment *s; unsigned long base_offset; TRACE("Size=%d, Offset=0x%08lx\n", Size, Offset); s = memory_find_segment_for(Offset); if(s) { base_offset = (unsigned long)Offset - (*s->base_register + s->base); /* base_offset = (unsigned long)Offset & ~(s->base); */ return s->read(s, Result, Size, base_offset); } /* Coulnd't find it in the tables */ printf("retr retr failed for size=%d, offset=0x%08lx\n", Size, Offset); rd_dump_registers(memory_core.pc, memory_core.sr); exception_do_exception(2); return 0; } char Memory_Stor(short Size, long Offset, unsigned long Value) { struct _memory_segment *s; unsigned long base_offset; TRACE("Size=%d, Offset=0x%08lx, Value=0x%08lx\n", Size, Offset, Value); /* Value will be in whatever endianness the computer is */ s = memory_find_segment_for(Offset); if(s) { base_offset = (unsigned long)Offset - (*s->base_register + s->base); /* base_offset = (unsigned long)Offset & ~(s->base); */ return s->write(s, Size, base_offset, Value); } /* Exception 2, access error */ printf("retr stor failed for size=%d, offset=0x%08lx\n", Size, Offset); rd_dump_registers(memory_core.pc, memory_core.sr); exception_do_exception(2); return 0; } char Memory_RetrFromPC(unsigned long *Result, short Size) { char ReturnValue; switch(Size) { case 32: ReturnValue = Memory_Retr(Result, 32, memory_core.pc); memory_core.pc+=4; return ReturnValue; case 16: ReturnValue = Memory_Retr(Result, 16, memory_core.pc); memory_core.pc+=2; return ReturnValue; case 8: memory_core.pc+=1; /* Skip the first byte */ ReturnValue = Memory_Retr(Result, 8, memory_core.pc); memory_core.pc+=1; /* Go past the byte we just read */ return ReturnValue; } return 0; } void memory_update(void) { int x; struct _memory_segment_list_item *i; for(x=0, i=&memory_segment_list[0];xseg; if(s->update) s->update(s); } } void memory_dump_segments(void) { int x; struct _memory_segment_list_item *i; for(x=0, i=&memory_segment_list[0];xseg; printf("%s: @%p, base_reg=%p, base=0x%08lx, data=%p\n", s->name, s, s->base_register, s->base, s->data); } } coldfire-0.2.2/memory.h0100644000175000017500000000624610015265015013407 0ustar davedave/**********************************/ /* */ /* Copyright 2000, David Grant */ /* */ /* see LICENSE for more details */ /* */ /**********************************/ #ifndef MEMORY_H #define MEMORY_H /* Memory definitions */ struct _memory_core { unsigned long pc; unsigned long pc_instruction_begin; unsigned long sr; unsigned long mbar; unsigned long rambar; unsigned long rombar; unsigned long vbr; unsigned long cacr; unsigned long d[8]; unsigned long a[8]; }; /* Actually declared in memory.c */ extern struct _memory_core memory_core; struct _SR { #ifndef WORDS_BIGENDIAN unsigned C:1; unsigned V:1; unsigned Z:1; unsigned N:1; unsigned X:1; unsigned Unused:3; unsigned InterruptPriorityMask:3; unsigned Unused2:1; unsigned M:1; unsigned S:1; unsigned Unused3:1; unsigned T:1; unsigned pad:16; #else unsigned pad:16; unsigned T:1; unsigned Unused3:1; unsigned S:1; unsigned M:1; unsigned Unused2:1; unsigned InterruptPriorityMask:3; unsigned Unused:3; unsigned X:1; unsigned N:1; unsigned Z:1; unsigned V:1; unsigned C:1; #endif }; extern struct _SR *SRBits; void memory_reset(void); void Memory_Init(void); void Memory_DeInit(void); /* Memory seek */ char memory_seek(unsigned long offset); /* Memory retrive */ #define Memory_RetrLongWord(V,Offset) Memory_Retr(V,32,Offset) #define Memory_RetrWord(V,Offset) Memory_Retr(V,16,Offset) #define Memory_RetrByte(V,Offset) Memory_Retr(V,8,Offset) char Memory_Retr(unsigned long *Result, short Size, long Offset); /* Memory Store */ #define Memory_StorLongWord(Offset,Value) Memory_Stor(32,Offset,Value) #define Memory_StorWord(Offset,Value) Memory_Stor(16,Offset,Value) #define Memory_StorByte(Offset,Value) Memory_Stor(8,Offset,Value) char Memory_Stor(short Size, long Offset, unsigned long Value); /* Memory retrive, and update the PC */ #define Memory_RetrByteFromPC(V) Memory_RetrFromPC(V,8) #define Memory_RetrWordFromPC(V) Memory_RetrFromPC(V,16) #define Memory_RetrLongWordFromPC(V) Memory_RetrFromPC(V,32) char Memory_RetrFromPC(unsigned long *Result, short Size); void memory_update(void); enum { SR_C = 0x0001, SR_V = 0x0002, SR_Z = 0x0004, SR_N = 0x0008, SR_X = 0x0010 }; /* Memory modules */ struct _memory_segment { char *name; unsigned long base; unsigned long *base_register; unsigned long mask; unsigned short interrupt_line; char *code; unsigned long code_len; void (*fini)(struct _memory_segment *s); char (*read)(struct _memory_segment *s, unsigned long *result, short size, unsigned long offset); char (*write)(struct _memory_segment *s, short size, unsigned long offset, unsigned long value); void (*reset)(struct _memory_segment *s); void (*update)(struct _memory_segment *s); void *data; }; struct _memory_module { char *name; void (*setup)(struct _memory_segment *s); }; void memory_module_register(char *name, void (*setup)(struct _memory_segment *s)); void memory_module_setup_segment(char *module_name, char *data); struct _memory_segment *memory_find_segment_for(unsigned long offset); void memory_core_set_reset_values(char *s); void memory_dump_segments(void); #endif