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[\fIFILENAME\fR] .SH DESCRIPTION \fBemu8051\fR is a simulator/emulator for the Intel 8051 family of microcontrollers. It is available in two versions: a console (text-only) version and a graphical version (using the GTK+ toolkit). This is an Open-Source project. The program can load Intel HEX files. Once loaded, a program can be run (it will run indefinitely or until a breakpoint is encountered). You can also use the STEP button to execute only a single instruction at a time and see the effects on registers and memory. It is written in C++, and uses Perl scripts to generate automatically C++ functions corresponding to each assembly instruction of the 8051 microcontroller. .SH "OPTIONS" .TP \fB\-h\fR display usage and exit .TP \fB\-version\fR output version information and exit .SH CREDITS \fBemu8051\fR was originally written by Jonathan St-André, Hugo Villeneuve and Pascal Fecteau. .SH COPYRIGHT \fBemu8051\fR is free; anyone may redistribute it to anyone under the terms stated in the GNU General Public License. A copy of the license is included in the \fBemu8051\fR distribution. You can also browse it online at .I http://www.gnu.org/copyleft/gpl.html emu8051-1.1.1/src/0000755000175000017500000000000011671304554010414 500000000000000emu8051-1.1.1/src/memwin.c0000644000175000017500000000673111653065330011777 00000000000000/* * memwin.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include "common.h" #include "memory.h" #include "hexfile.h" #include "cpu8051.h" #include "gtksizes.h" #include "memwin.h" static GtkWidget *memclist; GtkWidget * memwin_init(int width, int height) { int i; GtkWidget *fixed_frame; PangoFontDescription *pango_font; char *memdummy[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; fixed_frame = gtk_frame_new(0); gtk_frame_set_shadow_type(GTK_FRAME(fixed_frame), GTK_SHADOW_ETCHED_OUT); gtk_widget_set_usize(GTK_WIDGET(fixed_frame), width, height); memclist = gtk_clist_new(18); gtk_clist_set_selection_mode(GTK_CLIST(memclist), GTK_SELECTION_SINGLE); gtk_widget_set_usize(GTK_WIDGET(memclist), 620, 250); for (i = 0; i < 18; i++) { gtk_clist_set_column_justification( GTK_CLIST(memclist), i, GTK_JUSTIFY_LEFT); } gtk_clist_set_column_width(GTK_CLIST(memclist), 0, 5 * FIXED_FONT_SYMBOL_WIDTH); for (i = 1; i < 17; i++) gtk_clist_set_column_width(GTK_CLIST(memclist), i, 2 * FIXED_FONT_SYMBOL_WIDTH); gtk_clist_set_column_width(GTK_CLIST(memclist), 17, 16 * FIXED_FONT_SYMBOL_WIDTH); pango_font = pango_font_description_from_string(FIXED_FONT); gtk_widget_modify_font(memclist, pango_font); for (i = 0; i < 16; i++) gtk_clist_append(GTK_CLIST(memclist), memdummy); gtk_container_add(GTK_CONTAINER(fixed_frame), memclist); return fixed_frame; } /* Dump 16 rows of 16 bytes from Address in Memory (direct addressing) */ void memwin_DumpD(char *MemAddress) { char TextTmp[1024]; int row, column, TextLength; unsigned int Address; if (strlen(MemAddress) != 0) { if (STREQ(MemAddress, "PC")) Address = cpu8051.pc; else Address = Ascii2Hex(MemAddress, strlen(MemAddress)); } else { Address = 0; } gtk_clist_freeze(GTK_CLIST(memclist)); for (row = 0; row < 16; row++) { sprintf(TextTmp, "%.4X", Address); gtk_clist_set_text(GTK_CLIST(memclist), row, 0, TextTmp); for (column = 0; column < 16; column++) { sprintf(TextTmp, "%.2X", (int) cpu8051_ReadD(Address + column)); gtk_clist_set_text(GTK_CLIST(memclist), row, column + 1, TextTmp); } TextLength = 0; for (column = 0; column < 16; column++) { if (((int) cpu8051_ReadD(Address + column) >= 32) && ((int) cpu8051_ReadD(Address + column) <= 126)) TextLength += sprintf( &TextTmp[TextLength], "%c", cpu8051_ReadD(Address + column)); else TextLength += sprintf(&TextTmp[TextLength], "."); } gtk_clist_set_text(GTK_CLIST(memclist), row, 17, TextTmp); Address += 16; } gtk_clist_select_row(GTK_CLIST(memclist), 0, 0); gtk_clist_thaw(GTK_CLIST(memclist)); } emu8051-1.1.1/src/memwin.h0000644000175000017500000000175311653065330012003 00000000000000/* * memwin.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef MEMWIN_H #define MEMWIN_H 1 #include GtkWidget * memwin_init(int width, int height); void memwin_DumpD(char *Address); #endif /* MEMWIN_H */ emu8051-1.1.1/src/regwin.c0000644000175000017500000001227211653065330011773 00000000000000/* * regwin.cpp * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include "common.h" #include "reg8051.h" #include "cpu8051.h" #include "regwin.h" static GtkWidget *regclist; GtkWidget * regwin_init(int width, int height) { int i; GtkWidget *fixed_frame; PangoFontDescription *pango_font; char *regdummy[] = { 0 }; fixed_frame = gtk_frame_new(0); gtk_frame_set_shadow_type(GTK_FRAME(fixed_frame), GTK_SHADOW_ETCHED_OUT); gtk_widget_set_usize(GTK_WIDGET(fixed_frame), width, height); regclist = gtk_clist_new(1); gtk_clist_set_selection_mode(GTK_CLIST(regclist), GTK_SELECTION_SINGLE); gtk_widget_set_usize(GTK_WIDGET(regclist), width, height); gtk_clist_set_column_justification(GTK_CLIST(regclist), 0, GTK_JUSTIFY_LEFT); gtk_clist_set_column_width(GTK_CLIST(regclist), 0, width); pango_font = pango_font_description_from_string(FIXED_FONT); gtk_widget_modify_font(regclist, pango_font); for (i = 0; i < 24; i++) gtk_clist_append(GTK_CLIST(regclist), regdummy); gtk_container_add(GTK_CONTAINER(fixed_frame), regclist); return fixed_frame; } /* Show registers. */ void regwin_Show(void) { char TextTmp[255]; int row = 0; unsigned char PSW = cpu8051_ReadD(_PSW_); unsigned char Rbank; gtk_clist_freeze(GTK_CLIST(regclist)); /* Main registers */ sprintf(TextTmp , "PC = %.4X", cpu8051.pc); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "SP = %.2X", cpu8051_ReadD(_SP_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "A = %.2X", cpu8051_ReadD(_ACC_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "B = %.2X", cpu8051_ReadD(_B_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "DPTR = %.4X", (cpu8051_ReadD(_DPTRHIGH_) << 8) + cpu8051_ReadD(_DPTRLOW_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); /* Program Status Word */ sprintf(TextTmp, "PSW = %.2X", PSW); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); /* Ports registers */ sprintf(TextTmp , "P0 = %.2X", cpu8051_ReadD(_P0_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "P1 = %.2X", cpu8051_ReadD(_P1_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "P2 = %.2X", cpu8051_ReadD(_P2_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "P3 = %.2X", cpu8051_ReadD(_P3_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); /* Misc Registers */ sprintf(TextTmp , "TCON = %.2X", cpu8051_ReadD(_TCON_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "TMOD = %.2X", cpu8051_ReadD(_TMOD_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "SCON = %.2X", cpu8051_ReadD(_SCON_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "IE = %.2X", cpu8051_ReadD(_IE_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "IP = %.2X", cpu8051_ReadD(_IP_)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); /* R0-R7 Registers in current Bank */ Rbank = cpu8051_ReadD(_PSW_) & 0x18; sprintf(TextTmp , "Bank = %.2X", Rbank); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R0 = %.2X", cpu8051_ReadD(_R0_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R1 = %.2X", cpu8051_ReadD(_R1_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R2 = %.2X", cpu8051_ReadD(_R2_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R3 = %.2X", cpu8051_ReadD(_R3_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R4 = %.2X", cpu8051_ReadD(_R4_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R5 = %.2X", cpu8051_ReadD(_R5_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R6 = %.2X", cpu8051_ReadD(_R6_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); sprintf(TextTmp , "R7 = %.2X", cpu8051_ReadD(_R7_ + Rbank)); gtk_clist_set_text(GTK_CLIST(regclist), row++, 0, TextTmp); gtk_clist_select_row(GTK_CLIST(regclist), 0, 0); gtk_clist_thaw(GTK_CLIST(regclist)); } emu8051-1.1.1/src/regwin.h0000644000175000017500000000176711653065330012007 00000000000000/* * regwin.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef REGWIN_H #define REGWIN_H 1 #include #include "gtksizes.h" GtkWidget * regwin_init(int width, int height); void regwin_Show(void); #endif /* REGWIN_H */ emu8051-1.1.1/src/opcode2c.pl0000755000175000017500000010573111653065330012375 00000000000000#!/usr/bin/perl # # Copyright (C) 1999 Jonathan St-AndrĂ© # Copyright (C) 1999 Hugo Villeneuve # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. open INST_DEF, ">instructions_8051.h" or die "Error creating : $!\n"; open INST_IMP, ">instructions_8051.c" or die "Error creating : $!\n"; open OPCODELST, "opcodes.lst" or die "Error opening : $!\n"; open DISASM_H, ">disasm.h" or die "Error creating : $!\n"; # Header for instructions_8051.c print INST_IMP "/*\n"; print INST_IMP " * instructions_8051.c\n"; print INST_IMP " *\n"; print INST_IMP " * Do not modify this file directly, as it was created by opcode2c.pl\n"; print INST_IMP " * Any modifications made directly to this file will be lost.\n"; print INST_IMP " *\n"; print INST_IMP " * Copyright (C) 1999 Jonathan St-AndrĂ©\n"; print INST_IMP " * Copyright (C) 1999 Hugo Villeneuve \n"; print INST_IMP " *\n"; print INST_IMP " * This program is free software; you can redistribute it and/or modify\n"; print INST_IMP " * it under the terms of the GNU General Public License as published by\n"; print INST_IMP " * the Free Software Foundation; either version 2 of the License, or\n"; print INST_IMP " * (at your option) any later version.\n"; print INST_IMP " *\n"; print INST_IMP " * This program is distributed in the hope that it will be useful,\n"; print INST_IMP " * but WITHOUT ANY WARRANTY; without even the implied warranty of\n"; print INST_IMP " * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"; print INST_IMP " * GNU General Public License for more details.\n"; print INST_IMP " *\n"; print INST_IMP " * You should have received a copy of the GNU General Public License\n"; print INST_IMP " * along with this program; if not, write to the Free Software\n"; print INST_IMP " * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.\n"; print INST_IMP "*/\n\n"; print INST_IMP "/* Define only here, for not having extern scope on local variables. */\n"; print INST_IMP "#define INSTRUCTIONS_8051_M 1\n\n\n"; print INST_IMP "#include \"reg8051.h\"\n"; print INST_IMP "#include \"cpu8051.h\"\n"; print INST_IMP "#include \"memory.h\"\n"; print INST_IMP "#include \"instructions_8051.h\"\n\n\n"; # Header for disasm.h print DISASM_H "/*\n"; print DISASM_H " * disasm.h\n"; print DISASM_H " *\n"; print DISASM_H " * Do not modify this file directly, as it was created by opcode2c.pl\n"; print DISASM_H " * Any modifications made directly to this file will be lost.\n"; print DISASM_H " *\n"; print DISASM_H " * Copyright (C) 1999 Jonathan St-AndrĂ©\n"; print DISASM_H " * Copyright (C) 1999 Hugo Villeneuve \n"; print DISASM_H " *\n"; print DISASM_H " * This program is free software; you can redistribute it and/or modify\n"; print DISASM_H " * it under the terms of the GNU General Public License as published by\n"; print DISASM_H " * the Free Software Foundation; either version 2 of the License, or\n"; print DISASM_H " * (at your option) any later version.\n"; print DISASM_H " *\n"; print DISASM_H " * This program is distributed in the hope that it will be useful,\n"; print DISASM_H " * but WITHOUT ANY WARRANTY; without even the implied warranty of\n"; print DISASM_H " * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"; print DISASM_H " * GNU General Public License for more details.\n"; print DISASM_H " *\n"; print DISASM_H " * You should have received a copy of the GNU General Public License\n"; print DISASM_H " * along with this program; if not, write to the Free Software\n"; print DISASM_H " * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.\n"; print DISASM_H "*/\n\n"; print DISASM_H "#ifndef DISASM_H\n"; print DISASM_H "#define DISASM_H 1\n\n"; $nbinst=0; $nbaddr=0; $nbargs=0; $instnumb=0; $ligne=; $ligne=; while($ligne=) { chop $ligne; if (length $ligne < 2) {next;} @wordlist=split ' ',$ligne; $nbword=@wordlist; $instruction=$wordlist[2]; for($i=3;$i<($nbword-2);$i++) {$instruction="$instruction $wordlist[$i]";} $a_instruction[$instnumb]=$instruction; $a_bytes[$instnumb]=$wordlist[$nbword-2]; $a_cycles[$instnumb]=$wordlist[$nbword-1]; $a_opcodehex[$instnumb]=$wordlist[1]; $a_opcodebin[$instnumb]=$wordlist[0]; $instfunction[$instnumb]="CPU8051::OP_$wordlist[1]"; $instargs[$instnumb << 2]=$instargs[($instnumb << 2) + 1]=$instargs[($instnumb << 2) + 2]=$instargs[($instnumb << 2) + 3]=0; if ($nbword > 5) { @argslist=split /\,/,$wordlist[3]; $argslistsize=@argslist; $instargs[$instnumb << 2]=$argslistsize; for ($i=0;$i<$argslistsize;$i++) { if (not exists $argstypes{$argslist[$i]}) { $argstypes[$nbargs]=$argslist[$i]; $argstypes{$argslist[$i]}=$nbargs++; } $instargs[($instnumb << 2) + $i + 1]=$argstypes{$argslist[$i]}; } } if (not exists $insttext{$wordlist[2]}) { $insttext[$nbinst]=$wordlist[2]; $insttext{$wordlist[2]}=$nbinst++; } $insttype[$instnumb]=$insttext{$wordlist[2]}; if ( not exists $addrmode{$wordlist[3]}) { $addrmode[$nbaddr]=$wordlist[3]; $addrmode{$wordlist[3]}=$nbaddr++; } $nbbytes[$instnumb]=$wordlist[$nbword-2]; $instaddr[$instnumb]=$addrmode{$wordlist[3]}; $instnumb++; } # ------------------------------------------------------------------------------ print DISASM_H "/*\n"; print DISASM_H " * For all 256 opcodes, the value in this table gives the instruction type\n"; print DISASM_H " * ex.: MOV, INC, CLR, CPL,...\n"; print DISASM_H " * To know what is the instruction type, use\n"; print DISASM_H " * the number as an offset in the InstTextTbl[]\n"; print DISASM_H " */\n"; print DISASM_H "static int InstTypesTbl[] = {\n"; for($i=0;$i<256;$i++) { print DISASM_H " $insttype[$i]"; ($i != 255) and print DISASM_H ","; if (($i+1) % 16 == 0) { print DISASM_H "\n"; } } print DISASM_H "};\n"; print DISASM_H "\n"; # ------------------------------------------------------------------------------ print DISASM_H "/* Size(in bytes) of each instruction (offset in table is instruction opcode) */\n"; print DISASM_H "static int InstSizesTbl[] = {\n"; for($i=0;$i<256;$i++) { print DISASM_H " $nbbytes[$i]"; ($i != 255) and print DISASM_H ","; if (($i+1) % 16 == 0) { print DISASM_H "\n"; } } print DISASM_H "};\n"; print DISASM_H "\n"; # ------------------------------------------------------------------------------ print DISASM_H "/* List of instructions types referenced by InstTypesTbl[] */\n"; $nbelement=@insttext; print DISASM_H "\#define InstTextTblLength $nbelement\n"; $elementnb=0; print DISASM_H "static char *InstTextTbl[] = {\n"; foreach $instruc (@insttext) { print DISASM_H " \"$instruc\""; ($elementnb++ < $nbelement-1) and print DISASM_H ","; print DISASM_H "\n"; } print DISASM_H "};\n"; print DISASM_H "\n"; # ------------------------------------------------------------------------------ print DISASM_H "/*\n"; print DISASM_H " * Table describing all arguments types of an instruction\n"; print DISASM_H " * The table is indexed InstArgTbl[ opcode * 4]\n"; print DISASM_H " * InstArgTbl[opcode*4 + 1] gives the number of arguments the instruction has\n"; print DISASM_H " * InstArgTbl[opcode*4 + i] for i=1,2 and 3 give the type of each argument\n"; print DISASM_H " * for most instructions, the 3rd argument isn't used\n"; print DISASM_H " * the argument type is referecing to ArgsTextTbl[]\n"; print DISASM_H " */\n"; print DISASM_H "\#define InstArgTblLength 256\n"; print DISASM_H "static int InstArgTbl[] = {\n"; for($i=0;$i<1024;$i++) { print DISASM_H " $instargs[$i]"; ($i != 1023) and print DISASM_H ","; if (($i+1) % 16 == 0) { print DISASM_H "\n"; } } print DISASM_H "};\n"; print DISASM_H "\n"; # ------------------------------------------------------------------------------ print DISASM_H "/*\n"; print DISASM_H " * List all types of arguments available to instructions\n"; print DISASM_H " * Referenced by InstArgsTbl[]\n"; print DISASM_H " */\n"; $nbelement=@argstypes; print DISASM_H "\#define ArgsTextTblLength $nbelement\n"; $elementnb=0; print DISASM_H "static char *ArgsTextTbl[] = {\n"; foreach $args (@argstypes) { print DISASM_H " \"$args\""; ($elementnb++ < $nbelement-1) and print DISASM_H ","; print DISASM_H "\n"; } print DISASM_H "};\n"; print DISASM_H "\n"; # ------------------------------------------------------------------------------ for ($i=0 ; $i< 256; $i++) { print INST_IMP "/*","*"x76,"\n"; print INST_IMP " * Instruction \"$a_instruction[$i]\" takes $a_cycles[$i] cycle(s) and $a_bytes[$i] byte(s).\n"; print INST_IMP " ","*"x76,"/\n"; print INST_IMP "int\n"; print INST_IMP "cpu8051_OP_$a_opcodehex[$i](void)\n"; # TEST hugo new... # print INST_DEF "int OP_$a_opcodehex[$i]( );\n"; print INST_IMP "{\n"; if( $i == 0x85 ) { # Cas particulier pour MOV direct,direct -> src et dest sont inverses dans la memoire print INST_IMP " unsigned char srcaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; print INST_IMP " unsigned char source = cpu8051_ReadD( srcaddr );\n"; print INST_IMP " unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; print INST_IMP " unsigned char destination = cpu8051_ReadD( destaddr );\n"; print INST_IMP " destination = source;\n"; print INST_IMP " cpu8051_WriteD( destaddr, destination );\n"; } else { if ($instargs[$i*4] > 0) { $op_destination=$instargs[$i*4+1]; if ($op_destination == 0) { # addr11 print INST_IMP " unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; } if ($op_destination == 1) { # addr16 print INST_IMP "unsigned int addr16 = ( memory_read8( PGM_MEM_ID, cpu8051.pc++ ) << 8 );\n"; print INST_IMP "addr16 += memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; } if ($op_destination == 2) { # A print INST_IMP "unsigned char destination = cpu8051_ReadD( _ACC_ );\n"; } if ($op_destination == 3) { # direct print INST_IMP "unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; print INST_IMP "unsigned char destination = cpu8051_ReadD( destaddr );\n"; } if ($op_destination == 4) { # @R0 print INST_IMP "unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) );\n"; } if ($op_destination == 5) { # @R1 print INST_IMP "unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) );\n"; } if ($op_destination == 6) { # R0 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ );\n"; } if ($op_destination == 7) { # R1 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ );\n"; } if ($op_destination == 8) { # R2 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ );\n"; } if ($op_destination == 9) { # R3 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ );\n"; } if ($op_destination == 10) { # R4 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ );\n"; } if ($op_destination == 11) { # R5 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ );\n"; } if ($op_destination == 12) { # R6 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ );\n"; } if ($op_destination == 13) { # R7 print INST_IMP "unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ );\n"; } if ($op_destination == 14) { # bitaddr print INST_IMP "unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; print INST_IMP "destination = cpu8051_ReadB( dstbitaddr );\n"; } if ($op_destination == 15) { # reladdr print INST_IMP "cpu8051.pc++;\n"; print INST_IMP "unsigned int destination = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc;\n"; } if ($op_destination == 16) { # #data print INST_IMP "unsigned char destination = memory_read8( PGM_MEM_ID, cpu8051.pc++ );\n"; } if ($op_destination == 17) { # C print INST_IMP "unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 );\n"; } if ($op_destination == 18) { # @A+DPTR print INST_IMP "unsigned int destination = cpu8051_ReadI( cpu8051_ReadD( _ACC_ ) + cpu8051_ReadD( _DPTRLOW_ ) + ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) );\n"; } # Mis en commentaire car donnait un warning (destination et source unused variables...) # if ($op_destination == 20) { # AB # print INST_IMP "unsigned char destination = cpu8051_ReadD( _ACC_ );\n"; # print INST_IMP "unsigned char source = cpu8051_ReadD( _B_ );\n"; # } if ($op_destination == 21) { # DPTR print INST_IMP "unsigned int destination = ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ );\n"; } if ($op_destination == 22) { # #data16 print INST_IMP "unsigned char destination = ( memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ) << 8 );\n"; print INST_IMP "destination += memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; } if ($op_destination == 23) { # /bitaddr print INST_IMP "unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; print INST_IMP "destination = ( cpu8051_ReadB( dstbitaddr ) ^ 1 );\n"; } if ($op_destination == 24) { # @DPTR print INST_IMP "unsigned char destination = cpu8051_ReadI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_) );\n"; } } if ($instargs[$i*4] > 1) { $op_source=$instargs[$i*4+2]; if ($op_source == 0) { # addr11 print INST_IMP "unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; } if ($op_source == 1) { # addr16 print INST_IMP "unsigned int addr16 = ( memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ) << 8 );\n"; print INST_IMP "addr16 += memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; } if ($op_source == 2) { # A print INST_IMP "unsigned char source = cpu8051_ReadD( _ACC_ );\n"; } if ($op_source == 3) { # direct print INST_IMP "unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; print INST_IMP "unsigned char source = cpu8051_ReadD( srcaddr );\n"; } if ($op_source == 4) { # @R0 print INST_IMP "unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) );\n"; } if ($op_source == 5) { # @R1 print INST_IMP "unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) );\n"; } if ($op_source == 6) { # R0 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ );\n"; } if ($op_source == 7) { # R1 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ );\n"; } if ($op_source == 8) { # R2 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ );\n"; } if ($op_source == 9) { # R3 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ );\n"; } if ($op_source == 10) { # R4 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ );\n"; } if ($op_source == 11) { # R5 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ );\n"; } if ($op_source == 12) { # R6 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ );\n"; } if ($op_source == 13) { # R7 print INST_IMP "unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ );\n"; } if ($op_source == 14) { # bitaddr print INST_IMP "unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; print INST_IMP "source = cpu8051_ReadB( srcbitaddr );\n"; } if ($op_source == 15) { # reladdr print INST_IMP "(cpu8051.pc)++;\n"; print INST_IMP "unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc;\n"; } if ($op_source == 16) { # #data print INST_IMP "unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; } if ($op_source == 17) { # C print INST_IMP "unsigned char source = ( cpu8051_ReadD( _PSW_ ) >> 7 );\n"; } if ($op_source == 18) { # @A+DPTR print INST_IMP "unsigned char source = memory_read8( PGM_MEM_ID, cpu8051_ReadD( _ACC_ ) + cpu8051_ReadD( _DPTRLOW_ ) + ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) );\n"; } if ($op_source == 19) { # @A+PC print INST_IMP "unsigned char source = memory_read8( PGM_MEM_ID, cpu8051_ReadD( _ACC_ ) + ( ++cpu8051.pc ) );\n"; } if ($op_source == 21) { # DPTR print INST_IMP "unsigned int source = ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ );\n"; } if ($op_source == 22) { # #data16 print INST_IMP "unsigned char source = ( memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ) << 8 );\n"; print INST_IMP "source += memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; } if ($op_source == 23) { # /bitaddr print INST_IMP "unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ );\n"; print INST_IMP "source = ( cpu8051_ReadB( srcbitaddr ) ^ 1 );\n"; } if ($op_source == 24) { # @DPTR print INST_IMP "unsigned char source = cpu8051_ReadI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_) );\n"; } } ############################################################################## $modifysrc=0; # print INST_IMP "\n// Inserer le code ici\n\n"; # RR if ($insttype[$i] == 3) { print INST_IMP "destination = ( destination >> 1 ) | ( destination << 7 );\n"; } # INC if ($insttype[$i] == 4) { print INST_IMP "destination++;\n"; } # JBC if ($insttype[$i] == 5) { print INST_IMP "if ( destination == 1 ) { cpu8051.pc = source; destination = 0; }\n"; } # ACALL if ($insttype[$i] == 6) { print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; print INST_IMP "cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) );\n"; print INST_IMP "cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) );\n"; print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; } # LCALL if ($insttype[$i] == 7) { print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; print INST_IMP "cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) );\n"; print INST_IMP "cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) );\n"; print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; } # RRC if ($insttype[$i] == 8) { print INST_IMP "unsigned char tmpval = destination;\n"; print INST_IMP "destination = ( destination >> 1 ) | ( cpu8051_ReadD( _PSW_ ) & 0x80 );\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) | ( tmpval << 7 ) );\n"; } # DEC if ($insttype[$i] == 9) { print INST_IMP "destination--;\n"; } # JB if ($insttype[$i] == 10) { print INST_IMP "if ( destination == 1 ) { cpu8051.pc = source; }\n"; } # RET if ($insttype[$i] == 11) { print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; print INST_IMP "cpu8051.pc = ( cpu8051_ReadI( SP-- ) << 8 );\n"; print INST_IMP "cpu8051.pc += cpu8051_ReadI ( SP-- );\n"; print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; } # RL if ($insttype[$i] == 12) { print INST_IMP "destination = ( destination << 1 ) | ( destination >> 7 );\n"; } # ADD if ($insttype[$i] == 13) { print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) );\n"; print INST_IMP "if ( destination + source > 0xFF ) {\n"; print INST_IMP " cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; print INST_IMP " if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "} else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "destination += source;\n"; } # JNB if ($insttype[$i] == 14) { print INST_IMP "if ( destination == 0 ) { cpu8051.pc = source; }\n"; } # RETI if ($insttype[$i] == 15) { print INST_IMP "cpu8051.active_priority = -1;\n"; print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; print INST_IMP "cpu8051.pc = ( cpu8051_ReadI( SP-- ) << 8 );\n"; print INST_IMP "cpu8051.pc += cpu8051_ReadI( SP-- );\n"; } # RLC if ($insttype[$i] == 16) { print INST_IMP "unsigned char tmpval = destination;\n"; print INST_IMP "destination = ( destination << 1 ) | ( ( cpu8051_ReadD( _PSW_ ) & 0x80 ) >> 7 );\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) | ( tmpval & 0x80 ) );\n"; } # ADDC if ($insttype[$i] == 17) { print INST_IMP "unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 );\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) );\n"; print INST_IMP "if ( destination + source + carryflag > 0xFF ) {\n"; print INST_IMP " cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; print INST_IMP " if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "} else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) );\n"; print INST_IMP "destination += source;\n"; } # JC if ($insttype[$i] == 18) { print INST_IMP "if ( cpu8051_ReadD( _PSW_ ) > 0x7F) { cpu8051.pc = destination; }\n"; } # ORL if ($insttype[$i] == 19) { if ($instargs[$i*4+1] == 17) { # sur des bits print INST_IMP "cpu8051_WriteD( _PSW_ , ( ( destination | source ) << 7 ) );\n"; } else { # sur des bytes print INST_IMP "destination |= source;\n"; } } # JNC if ($insttype[$i] == 20) { print INST_IMP "if ( cpu8051_ReadD( _PSW_ ) < 0x80 ) { cpu8051.pc = destination; }\n"; } # ANL if ($insttype[$i] == 21) { if ($instargs[$i*4+1] == 17) { # sur des bits print INST_IMP "cpu8051_WriteD( _PSW_, ( ( destination & source) << 7 ) );\n"; } else { # sur des bytes print INST_IMP "destination &= source;\n"; } } # JZ if ($insttype[$i] == 22) { print INST_IMP "if ( cpu8051_ReadD( _ACC_ ) == 0 ) { cpu8051.pc = destination; }\n"; } # XRL if ($insttype[$i] == 23) { print INST_IMP "destination ^= source;\n"; } # JNZ if ($insttype[$i] == 24) { print INST_IMP "if ( cpu8051_ReadD( _ACC_ ) != 0 ) { cpu8051.pc = destination; }\n"; } # JMP if ($insttype[$i] == 25) { print INST_IMP "cpu8051.pc = destination;\n"; } # MOV if ($insttype[$i] == 26) { print INST_IMP "destination = source;\n"; } # SJMP if ($insttype[$i] == 27) { print INST_IMP "cpu8051.pc = destination;\n"; } # MOVC if ($insttype[$i] == 28) { print INST_IMP "destination = source;\n"; } # DIV if ($insttype[$i] == 29) { print INST_IMP "unsigned char A = cpu8051_ReadD( _ACC_ ), B = cpu8051_ReadD( _B_ );\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7B ) );\n"; print INST_IMP "if ( B != 0 ) {\n"; print INST_IMP "cpu8051_WriteD( _ACC_, A/B ); cpu8051_WriteD( _B_, A%B );\n"; print INST_IMP "} else cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; } # SUBB if ($insttype[$i] == 30) { print INST_IMP "unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7;\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) );\n"; print INST_IMP "if ( destination < ( source + carryflag ) ) {\n"; print INST_IMP " cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; print INST_IMP " if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "} else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; print INST_IMP "if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) );\n"; print INST_IMP "destination -= source + carryflag;\n"; } # MUL if ($insttype[$i] == 31) { print INST_IMP "unsigned char A = cpu8051_ReadD( _ACC_ ), B = cpu8051_ReadD( _B_ );\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7B ) );\n"; print INST_IMP "cpu8051_WriteD( _ACC_ , ( ( A * B ) & 0x00FF ) ); cpu8051_WriteD( _B_, ( A * B ) / 0x100 );\n"; print INST_IMP "if ( cpu8051_ReadD( _B_ ) > 0) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) );\n"; } # CPL if ($insttype[$i] == 33) { if ($instargs[$i*4+1] == 2) { print INST_IMP "destination ^= 0xFF;\n"; } else { print INST_IMP "destination ^= 0x01;\n"; } } # CJNE if ($insttype[$i] == 34) { print INST_IMP "unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1);\n"; print INST_IMP "cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) );\n"; print INST_IMP "if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; print INST_IMP "if ( destination != source ) cpu8051.pc = reladdr;\n"; } # PUSH if ($insttype[$i] == 35) { print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; print INST_IMP "cpu8051_WriteI( ++SP, destination );\n"; print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; } # CLR if ($insttype[$i] == 36) { print INST_IMP "destination = 0;\n"; } # SWAP if ($insttype[$i] == 37) { print INST_IMP "destination = ( destination << 4 ) + ( destination >> 4 );\n"; } # XCH if ($insttype[$i] == 38) { print INST_IMP "unsigned char tmpval = destination;\n"; print INST_IMP "destination = source; source = tmpval;\n"; $modifysrc=1; } # POP if ($insttype[$i] == 39) { print INST_IMP "unsigned char SP = cpu8051_ReadD( _SP_ );\n"; print INST_IMP "destination = cpu8051_ReadI( SP-- );\n"; print INST_IMP "cpu8051_WriteD( _SP_, SP );\n"; } # SETB if ($insttype[$i] == 40) { print INST_IMP "destination = 1;\n"; } # DA if ($insttype[$i] == 41) { print INST_IMP "if ( ( ( destination & 0x0F ) > 9) || ( cpu8051_ReadD( _PSW_ ) | 0x40)) {\n"; print INST_IMP " if ( ( destination + 6 ) > 0xFF) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; print INST_IMP " destination += 6;\n"; print INST_IMP "}\n"; print INST_IMP "if ( ( cpu8051_ReadD( _PSW_ ) & 0x80) || ( ( destination & 0xF0 ) > 0x90 ) ) {\n"; print INST_IMP " if ( ( destination + 0x60 ) > 0xFF ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) );\n"; print INST_IMP " destination += 0x60;\n"; print INST_IMP "}\n"; } # DJNZ if ($insttype[$i] == 42) { print INST_IMP "destination--;\n"; print INST_IMP "if ( destination != 0 ) cpu8051.pc = source;\n"; } # XCHD if ($insttype[$i] == 43) { print INST_IMP "unsigned char tmpval = ( destination & 0x0F );\n"; print INST_IMP "destination = ( destination & 0xF0 ) + ( source & 0x0F );\n"; print INST_IMP "source = ( source & 0xF0 ) + tmpval;\n"; $modifysrc=1; } # MOVX if ($insttype[$i] == 44) { print INST_IMP "destination = source;\n"; } ############################################################################## if ($instargs[$i*4] > 0) { $op_destination=$instargs[$i*4+1]; if ($op_destination == 0) { # addr11 print INST_IMP "cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11;\n"; } if ($op_destination == 1) { # addr16 print INST_IMP "cpu8051.pc = addr16;\n"; } if ($op_destination == 2) { # A print INST_IMP "cpu8051_WriteD( _ACC_, destination );\n"; } if ($op_destination == 3) { # direct print INST_IMP "cpu8051_WriteD( destaddr, destination );\n"; } if ($op_destination == 4) { # @R0 print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination );\n"; } if ($op_destination == 5) { # @R1 print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination );\n"; } if ($op_destination == 6) { # R0 print INST_IMP "cpu8051_WriteD( BANKPSW + _R0_, destination );\n"; } if ($op_destination == 7) { # R1 print INST_IMP "cpu8051_WriteD( BANKPSW + _R1_, destination );\n"; } if ($op_destination == 8) { # R2 print INST_IMP "cpu8051_WriteD( BANKPSW + _R2_, destination );\n"; } if ($op_destination == 9) { # R3 print INST_IMP "cpu8051_WriteD( BANKPSW + _R3_, destination );\n"; } if ($op_destination == 10) { # R4 print INST_IMP "cpu8051_WriteD( BANKPSW + _R4_, destination );\n"; } if ($op_destination == 11) { # R5 print INST_IMP "cpu8051_WriteD( BANKPSW + _R5_, destination );\n"; } if ($op_destination == 12) { # R6 print INST_IMP "cpu8051_WriteD( BANKPSW + _R6_, destination );\n"; } if ($op_destination == 13) { # R7 print INST_IMP "cpu8051_WriteD( BANKPSW + _R7_, destination );\n"; } if ($op_destination == 14) { # bitaddr print INST_IMP "cpu8051_WriteB( dstbitaddr, destination );\n"; } if ($op_destination == 17) { # C print INST_IMP "cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) );\n"; } if ($op_destination == 21) { # DPTR print INST_IMP "cpu8051_WriteD( _DPTRHIGH_, ( destination >> 8 ) );\n"; print INST_IMP "cpu8051_WriteD( _DPTRLOW_, ( destination & 0xFF ) );\n"; } if ($op_destination == 23) { # /bitaddr print INST_IMP "cpu8051_WriteB( dstbitaddr, destination );\n"; } if ($op_destination == 24) { # @DPTR print INST_IMP "cpu8051_WriteI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ), destination );\n"; } } if ($modifysrc == 1) { if ($instargs[$i*4] > 1) { $op_source=$instargs[$i*4+2]; if ($op_source == 0) { # addr11 print INST_IMP "cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11;\n"; } if ($op_source == 1) { # addr16 print INST_IMP "cpu8051.pc = addr16;\n"; } if ($op_source == 2) { # A print INST_IMP "cpu8051_WriteD( _ACC_, source );\n"; } if ($op_source == 3) { # direct print INST_IMP "cpu8051_WriteD( srcaddr, source );\n"; } if ($op_source == 4) { # @R0 print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), source );\n"; } if ($op_source == 5) { # @R1 print INST_IMP "cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), source );\n"; } if ($op_source == 6) { # R0 print INST_IMP "cpu8051_WriteD( BANKPSW + _R0_, source );\n"; } if ($op_source == 7) { # R1 print INST_IMP "cpu8051_WriteD( BANKPSW + _R1_, source );\n"; } if ($op_source == 8) { # R2 print INST_IMP "cpu8051_WriteD( BANKPSW + _R2_, source );\n"; } if ($op_source == 9) { # R3 print INST_IMP "cpu8051_WriteD( BANKPSW + _R3_, source );\n"; } if ($op_source == 10) { # R4 print INST_IMP "cpu8051_WriteD( BANKPSW + _R4_, source );\n"; } if ($op_source == 11) { # R5 print INST_IMP "cpu8051_WriteD( BANKPSW + _R5_, source );\n"; } if ($op_source == 12) { # R6 print INST_IMP "cpu8051_WriteD( BANKPSW + _R6_, source );\n"; } if ($op_source == 13) { # R7 print INST_IMP "cpu8051_WriteD( BANKPSW + _R7_, source );\n"; } if ($op_source == 14) { # bitaddr print INST_IMP "cpu8051_WriteB( srcbitaddr, source );\n"; } if ($op_source == 17) { # C print INST_IMP "cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( source << 7 ) ) );\n"; } if ($op_source == 21) { # DPTR print INST_IMP "cpu8051_WriteD( _DPTRHIGH_, ( source >> 8 ) );\n"; print INST_IMP "cpu8051_WriteD( _DPTRLOW_, ( source & 0xFF ) );\n"; } if ($op_source == 23) { # /bitaddr print INST_IMP "cpu8051_WriteB( srcbitaddr, source );\n"; } if ($op_source == 24) { # @DPTR print INST_IMP "cpu8051_WriteI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ), source );\n"; } } } } print INST_IMP "return $a_cycles[$i];\n"; print INST_IMP "}\n"; print INST_IMP "\n\n"; } # ------------------------------------------------------------------------------ # Header for instructions_8051.h print INST_DEF "/*\n"; print INST_DEF " * instructions_8051.h\n"; print INST_DEF " *\n"; print INST_DEF " * Do not modify this file directly, as it was created by opcode2c.pl\n"; print INST_DEF " * Any modifications made directly to this file will be lost.\n"; print INST_DEF " *\n"; print INST_DEF " * Copyright (C) 1999 Jonathan St-AndrĂ©\n"; print INST_DEF " * Copyright (C) 1999 Hugo Villeneuve \n"; print INST_DEF " *\n"; print INST_DEF " * This program is free software; you can redistribute it and/or modify\n"; print INST_DEF " * it under the terms of the GNU General Public License as published by\n"; print INST_DEF " * the Free Software Foundation; either version 2 of the License, or\n"; print INST_DEF " * (at your option) any later version.\n"; print INST_DEF " *\n"; print INST_DEF " * This program is distributed in the hope that it will be useful,\n"; print INST_DEF " * but WITHOUT ANY WARRANTY; without even the implied warranty of\n"; print INST_DEF " * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"; print INST_DEF " * GNU General Public License for more details.\n"; print INST_DEF " *\n"; print INST_DEF " * You should have received a copy of the GNU General Public License\n"; print INST_DEF " * along with this program; if not, write to the Free Software\n"; print INST_DEF " * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.\n"; print INST_DEF "*/\n\n"; print INST_DEF "#ifndef INSTRUCTIONS_8051_H\n"; print INST_DEF "#define INSTRUCTIONS_8051_H 1\n\n\n"; print INST_DEF "#define BANKPSW (cpu8051_ReadD(_PSW_) & 0x18)\n\n"; print INST_DEF "typedef int (*OPCODE_FP)(void);\n\n\n"; for( $i=0; $i<256; $i++ ) { print INST_DEF "int\n"; print INST_DEF "cpu8051_OP_$a_opcodehex[$i](void);\n\n"; } print INST_DEF "\n"; print INST_DEF "/* Exported variables. */\n"; print INST_DEF "#ifdef INSTRUCTIONS_8051_M\n"; print INST_DEF "OPCODE_FP opcode_table[256] = {\n"; for( $i=0; $i<256; $i++ ) { $ifunc=substr($instfunction[$i], 9); if( $i < 255 ) { print INST_DEF " cpu8051_$ifunc,\n"; } else { print INST_DEF " cpu8051_$ifunc\n"; print INST_DEF "};\n"; } } print INST_DEF "#else\n"; print INST_DEF "OPCODE_FP opcode_table[256];\n"; print INST_DEF "#endif\n\n\n"; print INST_DEF "#endif /* INSTRUCTIONS_8051_H */\n"; print DISASM_H "#endif /* DISASM_H */\n"; close DISASM_H; close OPCODELST; close INST_DEF; close INST_IMP; emu8051-1.1.1/src/reg8051.h0000644000175000017500000000346011653065330011577 00000000000000/* * reg8051.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef REG8051_H #define REG8051_H 1 /* SFR Registers ( $80 - $FF ) */ #define _ACC_ 0xE0 #define _B_ 0xF0 #define _PSW_ 0xD0 #define _SP_ 0x81 #define _DPTRLOW_ _DPL_ #define _DPTRHIGH_ _DPH_ #define _DPL_ 0x82 #define _DPH_ 0x83 #define _P0_ 0x80 #define _P1_ 0x90 #define _P2_ 0xA0 #define _P3_ 0xB0 #define _IP_ 0xB8 #define _IE_ 0xA8 #define _TMOD_ 0x89 #define _TCON_ 0x88 #define _TH0_ 0x8C #define _TL0_ 0x8A #define _TH1_ 0x8D #define _TL1_ 0x8B #define _SCON_ 0x98 #define _SBUF_ 0x99 #define _PCON_ 0x87 #define _T2CON_ 0xC8 #define _R0_ 0x00 #define _R1_ 0x01 #define _R2_ 0x02 #define _R3_ 0x03 #define _R4_ 0x04 #define _R5_ 0x05 #define _R6_ 0x06 #define _R7_ 0x07 #define _BANK0_ 0x00 #define _BANK1_ 0x08 #define _BANK2_ 0x10 #define _BANK3_ 0x18 #endif /* REG8051_H */ emu8051-1.1.1/src/pgmwin.c0000644000175000017500000000613011653065330011775 00000000000000/* * pgmwin.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include "common.h" #include "cpu8051.h" #include "pgmwin.h" static GtkWidget *pgmclist; static unsigned int DisasmAddresses[24]; /* Disasm 24 lines from CPU */ void pgmwin_Disasm(void) { char TextTmp[255]; int row; int InstSize; unsigned int Address; Address = cpu8051.pc; gtk_clist_freeze(GTK_CLIST(pgmclist)); for (row = 0; row < 24; row++) { InstSize = cpu8051_Disasm(Address, TextTmp); if (IsBreakpoint(Address)) TextTmp[0] = '*'; gtk_clist_set_text(GTK_CLIST(pgmclist), row, 0, TextTmp); DisasmAddresses[row] = Address; Address += InstSize; } gtk_clist_select_row(GTK_CLIST(pgmclist), 0, 0); gtk_clist_thaw(GTK_CLIST(pgmclist)); } /* Mouse button pressed in the window. */ static gint pgmwin_ButtonPressEvent(GtkWidget *widget, GdkEvent *event, gpointer data) { gint row, column; char TextTmp[255]; gtk_clist_get_selection_info(GTK_CLIST(pgmclist), (int) event->button.x, (int) event->button.y, &row, &column); if (row >= 24 || row < 0) return TRUE; if (column >= 1 || column < 0) return TRUE; sprintf(TextTmp, "pgmwin_ButtonPressEvent() at %d,%d\n", column, row); g_print(TextTmp); ToggleBreakpoint(DisasmAddresses[row]); pgmwin_Disasm(); return FALSE; } GtkWidget * pgmwin_init(int width, int height) { int i; GtkWidget *fixed_frame; fixed_frame = gtk_frame_new(0); gtk_frame_set_shadow_type(GTK_FRAME(fixed_frame), GTK_SHADOW_ETCHED_OUT); gtk_widget_set_usize(GTK_WIDGET(fixed_frame), width, height); pgmclist = gtk_clist_new(1); gtk_clist_set_selection_mode(GTK_CLIST(pgmclist), GTK_SELECTION_SINGLE); gtk_widget_set_usize(GTK_WIDGET(pgmclist), width, height); gtk_clist_set_column_justification(GTK_CLIST(pgmclist), 0, GTK_JUSTIFY_LEFT); gtk_clist_set_column_width(GTK_CLIST(pgmclist), 0, width-10); PangoFontDescription *pango_font; pango_font = pango_font_description_from_string(FIXED_FONT); gtk_widget_modify_font(pgmclist, pango_font); char *pgmdummy[] = { 0 }; for (i = 0; i < 24; i++) gtk_clist_append(GTK_CLIST(pgmclist), pgmdummy); gtk_container_add(GTK_CONTAINER(fixed_frame), pgmclist); gtk_signal_connect(GTK_OBJECT(pgmclist), "button-press-event", GTK_SIGNAL_FUNC(pgmwin_ButtonPressEvent), NULL); return fixed_frame; } emu8051-1.1.1/src/pgmwin.h0000644000175000017500000000205111653065330012000 00000000000000/* * pgmwin.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef PGMWIN_H #define PGMWIN_H 1 #include #include "gtksizes.h" GtkWidget * pgmwin_init(int width, int height); void pgmwin_Disasm(void); int pgmwin_IsBreakpoint(unsigned int address); #endif /* PGMWIN_H */ emu8051-1.1.1/src/opcodes.lst0000644000175000017500000001641511653065330012517 00000000000000Opcode(bin) Opcode Instruction Bytes Cycles -------------------------------------------------------------- 00000000 00 NOP 1 1 00000001 01 AJMP addr11 2 2 00000010 02 LJMP addr16 3 2 00000011 03 RR A 1 1 00000100 04 INC A 1 1 00000101 05 INC direct 2 1 00000110 06 INC @R0 1 1 00000111 07 INC @R1 1 1 00001000 08 INC R0 1 1 00001001 09 INC R1 1 1 00001010 0A INC R2 1 1 00001011 0B INC R3 1 1 00001100 0C INC R4 1 1 00001101 0D INC R5 1 1 00001110 0E INC R6 1 1 00001111 0F INC R7 1 1 00010000 10 JBC bitaddr,reladdr 3 2 00010001 11 ACALL addr11 2 2 00010010 12 LCALL addr16 3 2 00010011 13 RRC A 1 1 00010100 14 DEC A 1 1 00010101 15 DEC direct 2 1 00010110 16 DEC @R0 1 1 00010111 17 DEC @R1 1 1 00011000 18 DEC R0 1 1 00011001 19 DEC R1 1 1 00011010 1A DEC R2 1 1 00011011 1B DEC R3 1 1 00011100 1C DEC R4 1 1 00011101 1D DEC R5 1 1 00011110 1E DEC R6 1 1 00011111 1F DEC R7 1 1 00100000 20 JB bitaddr,reladdr 3 2 00100001 21 AJMP addr11 2 2 00100010 22 RET 1 2 00100011 23 RL A 1 1 00100100 24 ADD A,#data 2 1 00100101 25 ADD A,direct 2 1 00100110 26 ADD A,@R0 1 1 00100111 27 ADD A,@R1 1 1 00101000 28 ADD A,R0 1 1 00101001 29 ADD A,R1 1 1 00101010 2A ADD A,R2 1 1 00101011 2B ADD A,R3 1 1 00101100 2C ADD A,R4 1 1 00101101 2D ADD A,R5 1 1 00101110 2E ADD A,R6 1 1 00101111 2F ADD A,R7 1 1 00110000 30 JNB bitaddr,reladdr 3 2 00110001 31 ACALL addr11 2 2 00110010 32 RETI 1 2 00110011 33 RLC A 1 1 00110100 34 ADDC A,#data 2 1 00110101 35 ADDC A,direct 2 1 00110110 36 ADDC A,@R0 1 1 00110111 37 ADDC A,@R1 1 1 00111000 38 ADDC A,R0 1 1 00111001 39 ADDC A,R1 1 1 00111010 3A ADDC A,R2 1 1 00111011 3B ADDC A,R3 1 1 00111100 3C ADDC A,R4 1 1 00111101 3D ADDC A,R5 1 1 00111110 3E ADDC A,R6 1 1 00111111 3F ADDC A,R7 1 1 01000000 40 JC reladdr 2 2 01000001 41 AJMP addr11 2 2 01000010 42 ORL direct,A 2 1 01000011 43 ORL direct,#data 3 2 01000100 44 ORL A,#data 2 1 01000101 45 ORL A,direct 2 1 01000110 46 ORL A,@R0 1 1 01000111 47 ORL A,@R1 1 1 01001000 48 ORL A,R0 1 1 01001001 49 ORL A,R1 1 1 01001010 4A ORL A,R2 1 1 01001011 4B ORL A,R3 1 1 01001100 4C ORL A,R4 1 1 01001101 4D ORL A,R5 1 1 01001110 4E ORL A,R6 1 1 01001111 4F ORL A,R7 1 1 01010000 50 JNC reladdr 2 2 01010001 51 ACALL addr11 2 2 01010010 52 ANL direct,A 2 1 01010011 53 ANL direct,#data 3 2 01010100 54 ANL A,#data 2 1 01010101 55 ANL A,direct 2 1 01010110 56 ANL A,@R0 1 1 01010111 57 ANL A,@R1 1 1 01011000 58 ANL A,R0 1 1 01011001 59 ANL A,R1 1 1 01011010 5A ANL A,R2 1 1 01011011 5B ANL A,R3 1 1 01011100 5C ANL A,R4 1 1 01011101 5D ANL A,R5 1 1 01011110 5E ANL A,R6 1 1 01011111 5F ANL A,R7 1 1 01100000 60 JZ reladdr 2 2 01100001 61 AJMP addr11 2 2 01100010 62 XRL direct,A 2 1 01100011 63 XRL direct,#data 3 2 01100100 64 XRL A,#data 2 1 01100101 65 XRL A,direct 2 1 01100110 66 XRL A,@R0 1 1 01100111 67 XRL A,@R1 1 1 01101000 68 XRL A,R0 1 1 01101001 69 XRL A,R1 1 1 01101010 6A XRL A,R2 1 1 01101011 6B XRL A,R3 1 1 01101100 6C XRL A,R4 1 1 01101101 6D XRL A,R5 1 1 01101110 6E XRL A,R6 1 1 01101111 6F XRL A,R7 1 1 01110000 70 JNZ reladdr 2 2 01110001 71 ACALL addr11 2 2 01110010 72 ORL C,bitaddr 2 2 01110011 73 JMP @A+DPTR 1 2 01110100 74 MOV A,#data 2 1 01110101 75 MOV direct,#data 3 2 01110110 76 MOV @R0,#data 2 1 01110111 77 MOV @R1,#data 2 1 01111000 78 MOV R0,#data 2 1 01111001 79 MOV R1,#data 2 1 01111010 7A MOV R2,#data 2 1 01111011 7B MOV R3,#data 2 1 01111100 7C MOV R4,#data 2 1 01111101 7D MOV R5,#data 2 1 01111110 7E MOV R6,#data 2 1 01111111 7F MOV R7,#data 2 1 10000000 80 SJMP reladdr 2 2 10000001 81 AJMP addr11 2 2 10000010 82 ANL C,bitaddr 2 1 10000011 83 MOVC A,@A+PC 1 1 10000100 84 DIV AB 1 4 10000101 85 MOV direct,direct 3 1 10000110 86 MOV direct,@R0 2 2 10000111 87 MOV direct,@R1 2 2 10001000 88 MOV direct,R0 2 2 10001001 89 MOV direct,R1 2 2 10001010 8A MOV direct,R2 2 2 10001011 8B MOV direct,R3 2 2 10001100 8C MOV direct,R4 2 2 10001101 8D MOV direct,R5 2 2 10001110 8E MOV direct,R6 2 2 10001111 8F MOV direct,R7 2 2 10010000 90 MOV DPTR,#data16 3 2 10010001 91 ACALL addr11 2 2 10010010 92 MOV bitaddr,C 2 2 10010011 93 MOVC A,@A+DPTR 1 2 10010100 94 SUBB A,#data 2 1 10010101 95 SUBB A,direct 2 1 10010110 96 SUBB A,@R0 1 1 10010111 97 SUBB A,@R1 1 1 10011000 98 SUBB A,R0 1 1 10011001 99 SUBB A,R1 1 1 10011010 9A SUBB A,R2 1 1 10011011 9B SUBB A,R3 1 1 10011100 9C SUBB A,R4 1 1 10011101 9D SUBB A,R5 1 1 10011110 9E SUBB A,R6 1 1 10011111 9F SUBB A,R7 1 1 10100000 A0 ORL C,/bitaddr 2 1 10100001 A1 AJMP addr11 2 2 10100010 A2 MOV C,bitaddr 2 1 10100011 A3 INC DPTR 1 2 10100100 A4 MUL AB 1 4 10100101 A5 INVALID 1 1 10100110 A6 MOV @R0,direct 2 2 10100111 A7 MOV @R1,direct 2 2 10101000 A8 MOV R0,direct 2 2 10101001 A9 MOV R1,direct 2 2 10101010 AA MOV R2,direct 2 2 10101011 AB MOV R3,direct 2 2 10101100 AC MOV R4,direct 2 2 10101101 AD MOV R5,direct 2 2 10101110 AE MOV R6,direct 2 2 10101111 AF MOV R7,direct 2 2 10110000 B0 ANL C,/bitaddr 2 1 10110001 B1 ACALL addr11 2 2 10110010 B2 CPL bitaddr 2 1 10110011 B3 CPL C 1 1 10110100 B4 CJNE A,#data,reladdr 3 2 10110101 B5 CJNE A,direct,reladdr 3 2 10110110 B6 CJNE @R0,#data,reladdr 3 2 10110111 B7 CJNE @R1,#data,reladdr 3 2 10111000 B8 CJNE R0,#data,reladdr 3 2 10111001 B9 CJNE R1,#data,reladdr 3 2 10111010 BA CJNE R2,#data,reladdr 3 2 10111011 BB CJNE R3,#data,reladdr 3 2 10111100 BC CJNE R4,#data,reladdr 3 2 10111101 BD CJNE R5,#data,reladdr 3 2 10111110 BE CJNE R6,#data,reladdr 3 2 10111111 BF CJNE R7,#data,reladdr 3 2 11000000 C0 PUSH direct 2 2 11000001 C1 AJMP addr11 2 2 11000010 C2 CLR bitaddr 2 1 11000011 C3 CLR C 1 1 11000100 C4 SWAP A 1 1 11000101 C5 XCH A,direct 2 1 11000110 C6 XCH A,@R0 1 1 11000111 C7 XCH A,@R1 1 1 11001000 C8 XCH A,R0 1 1 11001001 C9 XCH A,R1 1 1 11001010 CA XCH A,R2 1 1 11001011 CB XCH A,R3 1 1 11001100 CC XCH A,R4 1 1 11001101 CD XCH A,R5 1 1 11001110 CE XCH A,R6 1 1 11001111 CF XCH A,R7 1 1 11010000 D0 POP direct 2 2 11010001 D1 ACALL addr11 2 2 11010010 D2 SETB bitaddr 2 1 11010011 D3 SETB C 1 1 11010100 D4 DA A 1 1 11010101 D5 DJNZ direct,reladdr 3 2 11010110 D6 XCHD A,@R0 1 1 11010111 D7 XCHD A,@R1 1 1 11011000 D8 DJNZ R0,reladdr 2 2 11011001 D9 DJNZ R1,reladdr 2 2 11011010 DA DJNZ R2,reladdr 2 2 11011011 DB DJNZ R3,reladdr 2 2 11011100 DC DJNZ R4,reladdr 2 2 11011101 DD DJNZ R5,reladdr 2 2 11011110 DE DJNZ R6,reladdr 2 2 11011111 DF DJNZ R7,reladdr 2 2 11100000 E0 MOVX A,@DPTR 1 2 11100001 E1 AJMP addr11 2 2 11100010 E2 MOVX A,@R0 1 2 11100011 E3 MOVX A,@R1 1 2 11100100 E4 CLR A 1 1 11100101 E5 MOV A,direct 2 1 11100110 E6 MOV A,@R0 1 1 11100111 E7 MOV A,@R1 1 1 11101000 E8 MOV A,R0 1 1 11101001 E9 MOV A,R1 1 1 11101010 EA MOV A,R2 1 1 11101011 EB MOV A,R3 1 1 11101100 EC MOV A,R4 1 1 11101101 ED MOV A,R5 1 1 11101110 EE MOV A,R6 1 1 11101111 EF MOV A,R7 1 1 11110000 F0 MOVX @DPTR,A 1 2 11110001 F1 ACALL addr11 2 2 11110010 F2 MOVX @R0,A 1 2 11110011 F3 MOVX @R1,A 1 2 11110100 F4 CPL A 1 1 11110101 F5 MOV direct,A 2 1 11110110 F6 MOV @R0,A 1 1 11110111 F7 MOV @R1,A 1 1 11111000 F8 MOV R0,A 1 1 11111001 F9 MOV R1,A 1 1 11111010 FA MOV R2,A 1 1 11111011 FB MOV R3,A 1 1 11111100 FC MOV R4,A 1 1 11111101 FD MOV R5,A 1 1 11111110 FE MOV R6,A 1 1 11111111 FF MOV R7,A 1 1 emu8051-1.1.1/src/cpu8051.c0000644000175000017500000003600311653065330011603 00000000000000/* * cpu8051.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ /* Define only here, for not having extern scope on local variables. */ #define CPU8051_M 1 #include #include #include "reg8051.h" #include "cpu8051.h" #include "memory.h" #include "disasm.h" #include "instructions_8051.h" /* Check if the address is a breakpoint */ int IsBreakpoint(unsigned int address) { int k; for (k = 0; k < cpu8051.bp_count; k++) { if (cpu8051.bp[k] == address) return 1; } /* The address was not found in the list of breakpoints */ return 0; } /* Show Breakpoints list */ void ShowBreakpoints(void) { int k; for (k = 0; k < cpu8051.bp_count; k++) printf("Breakpoint at address = %.4X\n", cpu8051.bp[k]); } /* Set Breakpoint at address at the end of the breakpoint list */ void SetBreakpoint(unsigned int address) { if (IsBreakpoint(address)) return; /* Already a breakpoint */ if (cpu8051.bp_count < MAXBP) cpu8051.bp[cpu8051.bp_count++] = address; } /* Clear Breakpoint at Address from list */ void ClearBreakpoint(unsigned int address) { int k; for (k = 0; k < cpu8051.bp_count; k++) { if (cpu8051.bp[k] == address) { /* Fill removed breakpoint slot with last entry */ cpu8051.bp[k] = cpu8051.bp[cpu8051.bp_count - 1]; cpu8051.bp_count--; } } } /* Toggle the breakpoint at Address. */ void ToggleBreakpoint(unsigned int address) { if (IsBreakpoint(address)) ClearBreakpoint(address); else SetBreakpoint(address); } void cpu8051_init(void) { cpu8051.pc = 0; cpu8051.clock = 0; cpu8051.active_priority = -1; cpu8051.bp_count = 0; } /* Reset the registers and CPU state */ void cpu8051_Reset(void) { int i; cpu8051.pc = 0; cpu8051.clock = 0; cpu8051.active_priority = -1; /* Reset registers */ for (i = 0; i < 256; i++) { /* Clear IRAM nad SFR */ memory_write8(INT_MEM_ID, i, 0); } memory_write8(INT_MEM_ID, _P0_, 0xFF); memory_write8(INT_MEM_ID, _P1_, 0xFF); memory_write8(INT_MEM_ID, _P2_, 0xFF); memory_write8(INT_MEM_ID, _P3_, 0xFF); memory_write8(INT_MEM_ID, _SP_, 0x07); } static void cpu8051_convert_bit_address(uint8_t bit_address, uint8_t *byte_address, uint8_t *bit_number) { if (bit_address > 0x7F) { /* SFR 80-FF */ *byte_address = bit_address & 0xF8; *bit_number = bit_address & 0x07; } else { /* 20-2F */ *byte_address = (bit_address >> 3) + 0x20; *bit_number = bit_address & 0x07; } } /* Write with a direct addressing mode at Address the new Value */ void cpu8051_WriteD(unsigned int Address, unsigned char Value) { memory_write8(INT_MEM_ID, Address, Value); } /* Write with an indirect addressing mode at Address the new Value */ void cpu8051_WriteI(unsigned int Address, unsigned char Value) { if (Address > 0x7F) { memory_write8(EXT_MEM_ID, Address, Value); return; } memory_write8(INT_MEM_ID, Address, Value); } /* Write with a bit addressing mode at BitAddress the new Value */ void cpu8051_WriteB(uint8_t bit_address, uint8_t value) { uint8_t byte_address; uint8_t bit_number; unsigned char ByteValue, ByteMask; cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number); ByteMask = ((1 << bit_number) ^ 0xFF); ByteValue = cpu8051_ReadD(byte_address) & ByteMask; ByteValue += value << bit_number; cpu8051_WriteD(byte_address, ByteValue); } /* Read with a direct addressing mode at Address */ unsigned char cpu8051_ReadD(unsigned int Address) { if (Address > 0xFF) return memory_read8(EXT_MEM_ID, Address); else return memory_read8(INT_MEM_ID, Address); } /* Read with a indirect addressing mode at Address */ unsigned char cpu8051_ReadI(unsigned int Address) { if (Address > 0x7F) return memory_read8(EXT_MEM_ID, Address); else return memory_read8(INT_MEM_ID, Address); } /* Read with a bit addressing mode at BitAddress */ unsigned char cpu8051_ReadB(uint8_t bit_address) { uint8_t byte_address; uint8_t bit_number; unsigned char BitValue; cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number); BitValue = (cpu8051_ReadD(byte_address) >> bit_number); BitValue &= 1; return BitValue; } static void cpu8051_process_interrupt(int pc, int pri) { unsigned char SP; SP = cpu8051_ReadD(_SP_); cpu8051_WriteI(++SP, (cpu8051.pc & 0xFF)); cpu8051_WriteI(++SP, (cpu8051.pc >> 8)); cpu8051_WriteD(_SP_, SP); cpu8051.pc = 0x0B; cpu8051.active_priority = pri; } /* Check interrupts state and process them as needed */ static void cpu8051_CheckInterrupts(void) { int i; if ((cpu8051_ReadD(_IE_) & 0x80) == 0) return; for (i = 1; i >= 0; i--) { if (cpu8051.active_priority < i) { /* Interrupt timer 0 */ if ((cpu8051_ReadD(_IE_) & 0x02) && ((cpu8051_ReadD(_IP_ & 0x02) ? i : !i) && (cpu8051_ReadD(_TCON_) & 0x20))) { cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) & 0xDF); cpu8051_process_interrupt(0x0B, i); return; } /* Interrupt timer 1 */ if ((cpu8051_ReadD(_IE_) & 0x08) && ((cpu8051_ReadD(_IP_) & 0x08) ? i : !i) && (cpu8051_ReadD(_TCON_) & 0x80)) { cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) & 0x7F); cpu8051_process_interrupt(0x1B, i); return; } /* Serial Interrupts */ if ((cpu8051_ReadD(_IE_) & 0x10) && ((cpu8051_ReadD(_IP_) & 0x10) ? i : !i) && (cpu8051_ReadD(_SCON_) & 0x03)) { cpu8051_process_interrupt(0x23, i); return; } /* Interrupt timer 2 */ if ((cpu8051_ReadD(_IE_) & 0x20) && ((cpu8051_ReadD(_IP_) & 0x20) ? i : !i) && (cpu8051_ReadD(_T2CON_) & 0x80)) { cpu8051_process_interrupt(0x2B, i); return; } } } } static void process_timer(uint8_t tl, uint8_t th, uint8_t tf_mask, uint8_t TR, uint8_t mode, uint8_t GATE, uint32_t TimerCounter) { unsigned int tmp; switch (mode) { case 0: /* Mode 0, 13-bits counter. */ tmp = cpu8051_ReadD(th) * 0x100 + cpu8051_ReadD(tl); tmp++; tmp &= 0x1FFF; /* We keep only 13 bits */ if (tmp == 0) /* If overflow set TF0 */ cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) | tf_mask); cpu8051_WriteD(_TH0_, tmp / 0x100); cpu8051_WriteD(_TL0_, tmp & 0xFF); break; case 1: /* Mode 1, 16-bits counter */ tmp = cpu8051_ReadD(th) * 0x100 + cpu8051_ReadD(tl); tmp++; tmp &= 0xFFFF; /* We keep only 16 bits */ if (tmp == 0) /* If overflow set TF0 */ cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) | tf_mask); cpu8051_WriteD(_TH0_, (tmp / 0x100)); cpu8051_WriteD(_TL0_, (tmp & 0xFF)); break; case 2: /* Mode 2, 8-bits counter with Auto-Reload */ tmp = cpu8051_ReadD(tl); tmp++; tmp &= 0xFF; if (tmp == 0) { /* If overflow -> reload and set TF0 */ cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) | tf_mask); cpu8051_WriteD(tl, cpu8051_ReadD(th)); } else cpu8051_WriteD(tl, tmp); break; case 3: /* Mode 3 : inactive mode for timer 1 */ if (tl == _TL0_) { /* TL0 and TH0 are 2 independents 8-bits timers. */ if (TR && !GATE && !TimerCounter) { tmp = cpu8051_ReadD(tl); tmp++; tmp &= 0xFF; if (tmp == 0) /* If TL0 overflow set TF0 */ cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) | tf_mask); cpu8051_WriteD(tl, tmp); } /* TH0 utilise TR1 et TF1. */ TR = cpu8051_ReadD(_TCON_) & 0x40; if (TR) { tmp = cpu8051_ReadD(th); tmp++; tmp &= 0xFF; if (tmp == 0) /* If TH0 overflow set TF1 */ cpu8051_WriteD(_TCON_, cpu8051_ReadD(_TCON_) | 0x80); cpu8051_WriteD(_TH0_, tmp); } } break; } } /* Run timers */ static void cpu8051_DoTimers(void) { unsigned int TR; unsigned int MODE; unsigned int GATE; unsigned int TimerCounter; /* Timer 0 */ TR = cpu8051_ReadD(_TCON_) & 0x10; MODE = cpu8051_ReadD(_TMOD_) & 0x03; GATE = cpu8051_ReadD(_TMOD_) & 0x08; TimerCounter = cpu8051_ReadD(_TMOD_) & 0x04; if ((TR && !GATE && !TimerCounter) || (MODE == 3)) process_timer(_TL0_, _TH0_, 0x20, TR, MODE, GATE, TimerCounter); /* Timer 1 */ TR = cpu8051_ReadD(_TCON_) & 0x40; MODE = (cpu8051_ReadD(_TMOD_) & 0x30) >> 4 ; GATE = cpu8051_ReadD(_TMOD_) & 0x80; TimerCounter = cpu8051_ReadD(_TMOD_) & 0x40; if (TR && !GATE && !TimerCounter) process_timer(_TL1_, _TH1_, 0x80, TR, MODE, GATE, TimerCounter); } /* Execute at address cpu8051.pc from PGMMem */ void cpu8051_Exec(void) { int i; unsigned char opcode; int insttiming; opcode = memory_read8(PGM_MEM_ID, cpu8051.pc); cpu8051.pc++; insttiming = (*opcode_table[opcode])(); /* Function callback. */ for (i = 0; i < insttiming; i++) { cpu8051_CheckInterrupts(); cpu8051_DoTimers(); cpu8051.clock++; } } /* * Addressing modes defined in the order as they appear in disasm.h * from table argstext[] */ #define ADDR11 0 #define ADDR16 1 #define DIRECT 3 #define BITADDR 14 #define RELADDR 15 #define DATAIMM 16 #define DATA16 22 #define CBITADDR 23 /* * SFR Memory map [80h - FFh] * --------------------------------------------------------------- * F8 | | | | | | | | | FF * F0 | B | | | | | | | | F7 * E8 | | | | | | | | | EF * E0 | ACC | | | | | | | | E7 * D8 | | | | | | | | | DF * D0 | PSW | | | | | | | | D7 * C8 | T2CON| |RCAP2L|RCAP2H| TL2 | TH2 | | | CF * C0 | | | | | | | | | C7 * B8 | IP | | | | | | | | BF * B0 | P3 | | | | | | | | B7 * A8 | IE | | | | | | | | AF * A0 | P2 | | | | | | | | A7 * 98 | SCON | SBUF | | | | | | | 9F * 90 | P1 | | | | | | | | 97 * 88 | TCON | TMOD | TL0 | TL1 | TH0 | TH1 | | | 8F * 80 | P0 | SP | DPL | DPH | | | | PCON | 87 * --------------------------------------------------------------- */ /* Return as Text the name of the SFR register at Address if any */ static int cpu8051_SFRMemInfo(unsigned int Address, char *Text) { switch (Address) { case 0x80: return sprintf(Text, "P0"); case 0x81: return sprintf(Text, "SP"); case 0x82: return sprintf(Text, "DPL"); case 0x83: return sprintf(Text, "DPH"); case 0x87: return sprintf(Text, "PCON"); case 0x88: return sprintf(Text, "TCON"); case 0x89: return sprintf(Text, "TMOD"); case 0x8A: return sprintf(Text, "TL0"); case 0x8B: return sprintf(Text, "TL1"); case 0x8C: return sprintf(Text, "TH0"); case 0x8D: return sprintf(Text, "TH1"); case 0x90: return sprintf(Text, "P1"); case 0x98: return sprintf(Text, "SCON"); case 0x99: return sprintf(Text, "SBUF"); case 0xA0: return sprintf(Text, "P2"); case 0xA8: return sprintf(Text, "IE"); case 0xB0: return sprintf(Text, "P3"); case 0xB8: return sprintf(Text, "IP"); case 0xC8: return sprintf(Text, "T2CON"); case 0xCA: return sprintf(Text, "RCAP2L"); case 0xCB: return sprintf(Text, "RCAP2H"); case 0xCC: return sprintf(Text, "TL2"); case 0xCD: return sprintf(Text, "TH2"); case 0xD0: return sprintf(Text, "PSW"); case 0xE0: return sprintf(Text, "ACC"); case 0xF0: return sprintf(Text, "B"); default: return sprintf(Text, "%.2XH", Address); } } /* Return as Text the decoded BitAddress */ static void cpu8051_IntMemBitInfo(uint8_t bit_address, char *text) { uint8_t byte_address; uint8_t bit_number; int len; cpu8051_convert_bit_address(bit_address, &byte_address, &bit_number); len = cpu8051_SFRMemInfo(byte_address, text); sprintf(&text[len], ".%X", bit_address); } /* Disasm one instruction at Address into a Text string */ int cpu8051_Disasm(unsigned int Address, char *Text) { int len = 0; char TextTmp[20]; unsigned char OpCode; int ArgTblOfs; int InstSize; int i; OpCode = memory_read8(PGM_MEM_ID, Address); InstSize = InstSizesTbl[OpCode]; len += sprintf(Text, " %.4X ", Address); for (i = 0; i < InstSize; i++) len += sprintf(&Text[len], " %.2X", memory_read8(PGM_MEM_ID, Address + i)); Address++; for (; len < 17;) len += sprintf(&Text[len], " "); len += sprintf(&Text[len], "%s ", InstTextTbl[InstTypesTbl[OpCode]]); ArgTblOfs = OpCode << 2; for (; len < 25;) len += sprintf(&Text[len], " "); /* * MOV direct, direct (OpCode 85h) is peculiar, the operands * are inverted */ if (OpCode == 0x85) { cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address + 1), TextTmp); len += sprintf(&Text[len], "%s,", TextTmp); cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address), TextTmp); len += sprintf(&Text[len], "%s", TextTmp); Address += 2; return InstSize; } for (i = 1; i <= InstArgTbl[ArgTblOfs]; i++) { switch (InstArgTbl[ArgTblOfs + i]) { case ADDR11: { len += sprintf(&Text[len], "%.4XH", ((OpCode << 3) & 0xF00) + (memory_read8(PGM_MEM_ID, Address))); Address++; break; } case ADDR16: { len += sprintf( &Text[len], "%.4XH", ((memory_read8(PGM_MEM_ID, Address) << 8) + memory_read8(PGM_MEM_ID, Address + 1))); Address += 2; break; } case DIRECT: { cpu8051_SFRMemInfo(memory_read8(PGM_MEM_ID, Address), TextTmp); len += sprintf(&Text[len], "%s", TextTmp); Address++; break; } case BITADDR: { cpu8051_IntMemBitInfo( (memory_read8(PGM_MEM_ID, Address) & 0xF8), TextTmp); len += sprintf(&Text[len], "%s.%X" , TextTmp, (memory_read8(PGM_MEM_ID, Address) & 7)); Address++; break; } case RELADDR: { Address++; len += sprintf(&Text[len], "%.4XH", (Address & 0xFF00) + (((Address & 0xFF) + memory_read8(PGM_MEM_ID, Address - 1)) & 0xFF)); break; } case DATAIMM: { len += sprintf(&Text[len], "#%.2XH", memory_read8(PGM_MEM_ID, Address)); Address++; break; } case DATA16: { len += sprintf(&Text[len], "#%.4XH", ((memory_read8(PGM_MEM_ID, Address) << 8) + memory_read8(PGM_MEM_ID, Address+1))); Address += 2; break; } case CBITADDR: { cpu8051_IntMemBitInfo((memory_read8(PGM_MEM_ID, Address) & 0xF8), TextTmp); len += sprintf(&Text[len], "/%s.%X", TextTmp, (memory_read8(PGM_MEM_ID, Address) & 7)); Address++; break; } default: { len += sprintf(&Text[len], "%s", ArgsTextTbl[InstArgTbl[ArgTblOfs + i]]); } } if (i < InstArgTbl[ArgTblOfs]) len += sprintf(&Text[len], ","); } return InstSize; } emu8051-1.1.1/src/cpu8051.h0000644000175000017500000000370011653065330011606 00000000000000/* * cpu8051.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef CPU8051_H #define CPU8051_H 1 #include /* Maximum number of BreakPoints */ #define MAXBP 32 struct cpu8051_t { unsigned int pc; /* Program counter */ unsigned long clock; int active_priority; int bp_count; unsigned int bp[MAXBP]; /* List of breakpoints */ }; /* Exported variables */ #undef _SCOPE_ #ifdef CPU8051_M # define _SCOPE_ /**/ #else # define _SCOPE_ extern #endif _SCOPE_ struct cpu8051_t cpu8051; int IsBreakpoint(unsigned int Address); void ShowBreakpoints(void); void SetBreakpoint(unsigned int Address); void ClearBreakpoint(unsigned int Address); void ToggleBreakpoint(unsigned int Address); void cpu8051_init(void); void cpu8051_Exec(void); void cpu8051_Reset(void); void cpu8051_WriteD(unsigned int Address, unsigned char Value); void cpu8051_WriteI(unsigned int Address, unsigned char Value); void cpu8051_WriteB(uint8_t bit_address, uint8_t value); unsigned char cpu8051_ReadD(unsigned int Address); unsigned char cpu8051_ReadI(unsigned int Address); unsigned char cpu8051_ReadB(uint8_t bit_address); int cpu8051_Disasm(unsigned int Address, char *Text); #endif /* CPU8051_H */ emu8051-1.1.1/src/disasm.h0000644000175000017500000001712011662270661011767 00000000000000/* * disasm.h * * Do not modify this file directly, as it was created by opcode2c.pl * Any modifications made directly to this file will be lost. * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef DISASM_H #define DISASM_H 1 /* * For all 256 opcodes, the value in this table gives the instruction type * ex.: MOV, INC, CLR, CPL,... * To know what is the instruction type, use * the number as an offset in the InstTextTbl[] */ static int InstTypesTbl[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 10, 1, 11, 12, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 14, 6, 15, 16, 17, 17, 17, 17, 17, 17, 17, 17, 17, 17, 17, 17, 18, 1, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 20, 6, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 22, 1, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 24, 6, 19, 25, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 27, 1, 21, 28, 29, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 6, 26, 28, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 19, 1, 26, 4, 31, 32, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 21, 6, 33, 33, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 35, 1, 36, 36, 37, 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, 39, 6, 40, 40, 41, 42, 43, 43, 42, 42, 42, 42, 42, 42, 42, 42, 44, 1, 44, 44, 36, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 44, 6, 44, 44, 33, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26 }; /* Size(in bytes) of each instruction (offset in table is instruction opcode) */ static int InstSizesTbl[] = { 1, 2, 3, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 2, 3, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 2, 1, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 2, 1, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 1, 2, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 2, 2, 1, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 1, 1, 3, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; /* List of instructions types referenced by InstTypesTbl[] */ #define InstTextTblLength 45 static char *InstTextTbl[] = { "NOP", "AJMP", "LJMP", "RR", "INC", "JBC", "ACALL", "LCALL", "RRC", "DEC", "JB", "RET", "RL", "ADD", "JNB", "RETI", "RLC", "ADDC", "JC", "ORL", "JNC", "ANL", "JZ", "XRL", "JNZ", "JMP", "MOV", "SJMP", "MOVC", "DIV", "SUBB", "MUL", "INVALID", "CPL", "CJNE", "PUSH", "CLR", "SWAP", "XCH", "POP", "SETB", "DA", "DJNZ", "XCHD", "MOVX" }; /* * Table describing all arguments types of an instruction * The table is indexed InstArgTbl[ opcode * 4] * InstArgTbl[opcode*4 + 1] gives the number of arguments the instruction has * InstArgTbl[opcode*4 + i] for i=1,2 and 3 give the type of each argument * for most instructions, the 3rd argument isn't used * the argument type is referecing to ArgsTextTbl[] */ #define InstArgTblLength 256 static int InstArgTbl[] = { 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 2, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0, 1, 6, 0, 0, 1, 7, 0, 0, 1, 8, 0, 0, 1, 9, 0, 0, 1, 10, 0, 0, 1, 11, 0, 0, 1, 12, 0, 0, 1, 13, 0, 0, 2, 14, 15, 0, 1, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 2, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0, 1, 6, 0, 0, 1, 7, 0, 0, 1, 8, 0, 0, 1, 9, 0, 0, 1, 10, 0, 0, 1, 11, 0, 0, 1, 12, 0, 0, 1, 13, 0, 0, 2, 14, 15, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 2, 16, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 2, 14, 15, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 2, 16, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 1, 15, 0, 0, 1, 0, 0, 0, 2, 3, 2, 0, 2, 3, 16, 0, 2, 2, 16, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 1, 15, 0, 0, 1, 0, 0, 0, 2, 3, 2, 0, 2, 3, 16, 0, 2, 2, 16, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 1, 15, 0, 0, 1, 0, 0, 0, 2, 3, 2, 0, 2, 3, 16, 0, 2, 2, 16, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 1, 15, 0, 0, 1, 0, 0, 0, 2, 17, 14, 0, 1, 18, 0, 0, 2, 2, 16, 0, 2, 3, 16, 0, 2, 4, 16, 0, 2, 5, 16, 0, 2, 6, 16, 0, 2, 7, 16, 0, 2, 8, 16, 0, 2, 9, 16, 0, 2, 10, 16, 0, 2, 11, 16, 0, 2, 12, 16, 0, 2, 13, 16, 0, 1, 15, 0, 0, 1, 0, 0, 0, 2, 17, 14, 0, 2, 2, 19, 0, 1, 20, 0, 0, 2, 3, 3, 0, 2, 3, 4, 0, 2, 3, 5, 0, 2, 3, 6, 0, 2, 3, 7, 0, 2, 3, 8, 0, 2, 3, 9, 0, 2, 3, 10, 0, 2, 3, 11, 0, 2, 3, 12, 0, 2, 3, 13, 0, 2, 21, 22, 0, 1, 0, 0, 0, 2, 14, 17, 0, 2, 2, 18, 0, 2, 2, 16, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 2, 17, 23, 0, 1, 0, 0, 0, 2, 17, 14, 0, 1, 21, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 2, 4, 3, 0, 2, 5, 3, 0, 2, 6, 3, 0, 2, 7, 3, 0, 2, 8, 3, 0, 2, 9, 3, 0, 2, 10, 3, 0, 2, 11, 3, 0, 2, 12, 3, 0, 2, 13, 3, 0, 2, 17, 23, 0, 1, 0, 0, 0, 1, 14, 0, 0, 1, 17, 0, 0, 3, 2, 16, 15, 3, 2, 3, 15, 3, 4, 16, 15, 3, 5, 16, 15, 3, 6, 16, 15, 3, 7, 16, 15, 3, 8, 16, 15, 3, 9, 16, 15, 3, 10, 16, 15, 3, 11, 16, 15, 3, 12, 16, 15, 3, 13, 16, 15, 1, 3, 0, 0, 1, 0, 0, 0, 1, 14, 0, 0, 1, 17, 0, 0, 1, 2, 0, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 1, 3, 0, 0, 1, 0, 0, 0, 1, 14, 0, 0, 1, 17, 0, 0, 1, 2, 0, 0, 2, 3, 15, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 6, 15, 0, 2, 7, 15, 0, 2, 8, 15, 0, 2, 9, 15, 0, 2, 10, 15, 0, 2, 11, 15, 0, 2, 12, 15, 0, 2, 13, 15, 0, 2, 2, 24, 0, 1, 0, 0, 0, 2, 2, 4, 0, 2, 2, 5, 0, 1, 2, 0, 0, 2, 2, 3, 0, 2, 2, 4, 0, 2, 2, 5, 0, 2, 2, 6, 0, 2, 2, 7, 0, 2, 2, 8, 0, 2, 2, 9, 0, 2, 2, 10, 0, 2, 2, 11, 0, 2, 2, 12, 0, 2, 2, 13, 0, 2, 24, 2, 0, 1, 0, 0, 0, 2, 4, 2, 0, 2, 5, 2, 0, 1, 2, 0, 0, 2, 3, 2, 0, 2, 4, 2, 0, 2, 5, 2, 0, 2, 6, 2, 0, 2, 7, 2, 0, 2, 8, 2, 0, 2, 9, 2, 0, 2, 10, 2, 0, 2, 11, 2, 0, 2, 12, 2, 0, 2, 13, 2, 0 }; /* * List all types of arguments available to instructions * Referenced by InstArgsTbl[] */ #define ArgsTextTblLength 25 static char *ArgsTextTbl[] = { "addr11", "addr16", "A", "direct", "@R0", "@R1", "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "bitaddr", "reladdr", "#data", "C", "@A+DPTR", "@A+PC", "AB", "DPTR", "#data16", "/bitaddr", "@DPTR" }; #endif /* DISASM_H */ emu8051-1.1.1/src/helpmenu.c0000644000175000017500000000446211653065330012317 00000000000000/* * helpmenu.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #if STDC_HEADERS # include #elif HAVE_STRINGS_H # include #endif #include #include "common.h" #include "options.h" #include "emugtk.h" #include "messagebox.h" #include "helpmenu.h" static void HelpCommandsEvent(gchar *string) { ShowMessage("Command Line Options", COMMAND_LINE_OPTIONS, GTK_JUSTIFY_LEFT, MESSAGE_DIALOG_FIXED_FONT); } static void HelpAboutEvent(gchar *string) { ShowMessage("About", VERSION_STRING, GTK_JUSTIFY_CENTER, MESSAGE_DIALOG_NORMAL_FONT); } void HelpAddMenu(GtkWidget *menu_bar) { GtkWidget *item; GtkWidget *menu; menu = gtk_menu_new(); /* Create the 'Help Command Line Options' item. */ item = gtk_menu_item_new_with_label("Command Line Options"); gtk_menu_append(GTK_MENU(menu), item); /* Attach the callback functions to the activate signal. */ gtk_signal_connect_object(GTK_OBJECT(item), "activate", GTK_SIGNAL_FUNC(HelpCommandsEvent), NULL); AddMenuSeparator(menu); /* Create the 'Help About' item. */ item = gtk_menu_item_new_with_label("About " PACKAGE); gtk_menu_append(GTK_MENU(menu), item); /* Attach the callback functions to the activate signal. */ gtk_signal_connect_object(GTK_OBJECT(item), "activate", GTK_SIGNAL_FUNC(HelpAboutEvent), NULL); /* Adding submenu title. */ item = gtk_menu_item_new_with_label("Help"); gtk_menu_item_set_submenu(GTK_MENU_ITEM(item), menu); gtk_menu_bar_append(GTK_MENU_BAR(menu_bar), item); } emu8051-1.1.1/src/helpmenu.h0000644000175000017500000000170711653065330012323 00000000000000/* * helpmenu.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef HELPMENU_H #define HELPMENU_H 1 #include void HelpAddMenu(GtkWidget *menu_bar); #endif /* HELPMENU_H */ emu8051-1.1.1/src/common.h0000644000175000017500000000314311653065330011772 00000000000000/* * common.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef COMMON_H #define COMMON_H 1 /* Define this to have debugging output. */ /* #define EMU8051_DEBUG 1 */ #include #include #include #if STDC_HEADERS # include #elif HAVE_STRINGS_H # include #endif #define FIXED_FONT "monospace 12" /* Common constants. */ #ifndef EXIT_SUCCESS # define EXIT_SUCCESS 0 # define EXIT_FAILURE 1 #endif /* Returns TRUE if the strings 'a' and 'b' are equal. */ #define STREQ(a, b) (strcasecmp((a), (b)) == 0) /* Returns TRUE if the first 'c' characters of strings 'a' and 'b' are equal. */ #define STREQ_LEN(a, b, c) (strncasecmp((a), (b), (c)) == 0) inline void ErrorLocation(const char *file, int line); void * xmalloc(size_t size, const char *filename, int line_number); #endif /* COMMON_H */ emu8051-1.1.1/src/filemenu.c0000644000175000017500000000705511653065330012307 00000000000000/* * filemenu.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include /* UNIX standard function definitions */ #include #include #include "common.h" #include "emugtk.h" #include "messagebox.h" #include "filemenu.h" #define FILENAME_DESCRIPTION "Open Intel Hex file" static void FileOpenDialog_OK(GtkWidget *widget, gpointer file_dialog) { char *selected_file; #if defined(DEBUG) g_print("FileOpenDialog_OK()\n"); #endif /* * The cast to (char *) is to remove a warning in GTK2, because the * return value of the gtk_file_selection_get_filename() function is * 'G_CONST_RETURN gchar *'. */ selected_file = (char *) gtk_file_selection_get_filename( GTK_FILE_SELECTION(file_dialog)); g_print("emugtk_File = %s\n", selected_file); emugtk_new_file(selected_file); gtk_widget_destroy(GTK_WIDGET(file_dialog)); } void FileOpenEvent(GtkObject *object, gpointer data) { GtkWidget *file_dialog; #if defined(DEBUG) g_print("FileOpenEvent()\n"); #endif /* Create a new file selection widget. */ file_dialog = gtk_file_selection_new(FILENAME_DESCRIPTION); /* Connect the file dialog's OK button up to a handler. */ gtk_signal_connect( GTK_OBJECT(GTK_FILE_SELECTION(file_dialog)->ok_button), "clicked", GTK_SIGNAL_FUNC(FileOpenDialog_OK), file_dialog); /* * Ensure that the file selection dialog box is destroyed when the user * clicks CANCEL. */ gtk_signal_connect_object( GTK_OBJECT(GTK_FILE_SELECTION(file_dialog)->cancel_button), "clicked", GTK_SIGNAL_FUNC(gtk_widget_destroy), (gpointer) file_dialog); /* Show the dialog. */ gtk_widget_show(GTK_WIDGET(file_dialog)); /* * To have the main window of our application being unusable while * using the dialog. */ gtk_window_set_modal(GTK_WINDOW(file_dialog), TRUE); } static void FileQuitEvent(gchar *string) { #if defined(DEBUG) g_print("%s\n", string); #endif gtk_main_quit(); } void FileAddMenu(GtkWidget *menu_bar) { GtkWidget *item; GtkWidget *menu; menu = gtk_menu_new(); /* Create the 'open' item. */ item = gtk_menu_item_new_with_label(FILENAME_DESCRIPTION); gtk_menu_append(GTK_MENU(menu), item); /* Attach the callback functions to the activate signal. */ gtk_signal_connect_object(GTK_OBJECT(item), "activate", GTK_SIGNAL_FUNC(FileOpenEvent), NULL); AddMenuSeparator(menu); item = gtk_menu_item_new_with_label("Exit"); gtk_menu_append(GTK_MENU(menu), item); /* We can attach the Quit menu item to our exit function */ gtk_signal_connect_object(GTK_OBJECT(item), "activate", GTK_SIGNAL_FUNC(FileQuitEvent), (gpointer) "file.quit"); /* Adding submenu title. */ item = gtk_menu_item_new_with_label("File"); gtk_menu_item_set_submenu(GTK_MENU_ITEM(item), menu); gtk_menu_bar_append(GTK_MENU_BAR(menu_bar), item); } emu8051-1.1.1/src/filemenu.h0000644000175000017500000000206611653065330012311 00000000000000/* * filemenu.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef FILEMENU_H #define FILEMENU_H 1 #include void FileOpenEvent(GtkObject *object, gpointer data); void FileResetEvent(GtkObject *object, gpointer data); void FileAddMenu(GtkWidget *menu_bar); #endif /* FILEMENU_H */ emu8051-1.1.1/src/emugtk.c0000644000175000017500000001773711653065330012007 00000000000000/* * emugtk.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include "config.h" #include #include "common.h" #include "cpu8051.h" #include "options.h" #include "hexfile.h" #include "emugtk.h" #include "reset.xpm" #include "run.xpm" #include "stop.xpm" #include "step.xpm" #include "filemenu.h" #include "viewmenu.h" #include "helpmenu.h" #include "regwin.h" #include "pgmwin.h" #include "memwin.h" static int running; static int running_function_tag; static GtkWidget *mainwin; /* Signal DestroyEvent */ static void WindowDestroyEvent(GtkWidget *widget, gpointer data) { #ifdef EMU8051_DEBUG g_print("emugtk_DestroyEvent(...)\n"); #endif gtk_main_quit(); } /* Step out of running state */ static void emugtk_stop_running() { if (running) { #ifdef EMU8051_DEBUG printf("emugtk_StopRunning()\n"); #endif gtk_idle_remove(running_function_tag); running = 0; regwin_Show(); pgmwin_Disasm(); memwin_DumpD("00"); } } /* Running function called when idle from gtk_main */ static gboolean emugtk_running(gpointer data) { cpu8051_Exec(); if (IsBreakpoint(cpu8051.pc)) { #ifdef EMU8051_DEBUG g_print("Breakpoint Hit, stopping!\n"); #endif emugtk_stop_running(); } return TRUE; } /* Get in the running state */ static void emugtk_start_running(void) { if (!running) { #ifdef EMU8051_DEBUG printf("emugtk_StartRunning()\n"); #endif running_function_tag = gtk_idle_add(emugtk_running, 0); running = 1; } } /* Taken from the Gxine source code. */ static GtkWidget * AddPixButton(GtkWidget *box, gchar **pixmap_array) { GtkWidget *button, *icon; GdkPixmap *image; GdkBitmap *transparent; button = gtk_button_new(); gtk_button_set_relief(GTK_BUTTON(button), GTK_RELIEF_NORMAL); image = gdk_pixmap_colormap_create_from_xpm_d( NULL, gdk_colormap_get_system(), &transparent, NULL, pixmap_array); icon = gtk_pixmap_new(image, transparent); gtk_container_add(GTK_CONTAINER(button), icon); gtk_box_pack_start(GTK_BOX(box), button, FALSE, FALSE, 0); return button; } /* CPU reset and Gtk UI update */ static void emugtk_Reset(void) { cpu8051_Reset(); regwin_Show(); pgmwin_Disasm(); memwin_DumpD("00"); } /* Signal ResetEvent (ResetButton) */ static void emugtk_ResetEvent(GtkWidget *widget, GdkEvent *event, gpointer data) { #ifdef EMU8051_DEBUG g_print("emugtk_ResetEvent(...)\n"); #endif emugtk_stop_running(); emugtk_Reset(); } /* CPU Step and Gtk UI update */ static void emugtk_Step(void) { cpu8051_Exec(); regwin_Show(); pgmwin_Disasm(); memwin_DumpD("00"); } /* Signal RunEvent (RunButton) */ static void emugtk_RunEvent(GtkWidget *widget, GdkEvent *event, gpointer data) { #ifdef EMU8051_DEBUG g_print("emugtk_RunEvent(...)\n"); #endif if (running) emugtk_stop_running(); else emugtk_start_running(); } /* Signal StopEvent (StopButton) */ static void emugtk_StopEvent(GtkWidget *widget, GdkEvent *event, gpointer data) { #ifdef EMU8051_DEBUG g_print("emugtk_StopEvent(...)\n"); #endif emugtk_stop_running(); } /* Signal StepEvent (StepButton) */ static void emugtk_StepEvent(GtkWidget *widget, GdkEvent *event, gpointer data) { #ifdef EMU8051_DEBUG g_print("emugtk_StepEvent(...)\n"); #endif emugtk_stop_running(); emugtk_Step(); } /* Creates the Reset, Run, Stop and Step buttons. */ static GtkWidget * AddButtons(void) { GtkWidget *button_hbox; GtkWidget *button; /* The buttons of the hbox are NOT given equal space in the box. */ button_hbox = gtk_hbox_new(FALSE, 0); /* Creating the RESET button. */ button = AddPixButton(button_hbox, reset_xpm); gtk_signal_connect(GTK_OBJECT(button), "clicked", GTK_SIGNAL_FUNC(emugtk_ResetEvent), NULL); /* Creating the RUN button. */ button = AddPixButton(button_hbox, run_xpm); gtk_signal_connect(GTK_OBJECT(button), "clicked", GTK_SIGNAL_FUNC(emugtk_RunEvent), NULL); /* Creating STOP button. */ button = AddPixButton(button_hbox, stop_xpm); gtk_signal_connect(GTK_OBJECT(button), "clicked", GTK_SIGNAL_FUNC(emugtk_StopEvent), NULL); /* Creating STEP button. */ button = AddPixButton(button_hbox, step_xpm); gtk_signal_connect(GTK_OBJECT(button), "clicked", GTK_SIGNAL_FUNC(emugtk_StepEvent), NULL); return button_hbox; } static GtkWidget * AddMenu(void) { GtkWidget *menu_bar; /* Creating menu item. */ menu_bar = gtk_menu_bar_new(); /* Adding the 'File' submenu */ FileAddMenu(menu_bar); /* Adding the 'View' submenu */ ViewAddMenu(menu_bar); /* Adding the 'Help' submenu */ HelpAddMenu(menu_bar); gtk_widget_show_all(GTK_WIDGET(menu_bar)); return menu_bar; } static void emugtk_window_init(void) { GtkWidget *main_vbox; GtkWidget *menu_bar; GtkWidget *buttons_bar; GtkWidget *emufixed; GtkWidget *fixed_frame; mainwin = gtk_window_new(GTK_WINDOW_TOPLEVEL); gtk_window_set_title(GTK_WINDOW(mainwin), PACKAGE); gtk_widget_set_usize(GTK_WIDGET(mainwin), MAIN_WIN_WIDTH, MAIN_WIN_HEIGHT); gtk_container_set_border_width(GTK_CONTAINER(mainwin), 0); /* Window DESTROY event. */ gtk_signal_connect(GTK_OBJECT(mainwin), "destroy", GTK_SIGNAL_FUNC(WindowDestroyEvent), NULL); /* * Setting main window geometry based on command line options * (if specified). */ /*MainWindowSetGeometry();*/ /* * main_vbox contains the menu bar and body_vbox (for all remaining * items). */ main_vbox = gtk_vbox_new(FALSE, 1); /* Creating the menu bar. */ menu_bar = AddMenu(); /* Adding menu bar to main_vbox */ gtk_box_pack_start(GTK_BOX(main_vbox), menu_bar, FALSE, FALSE, 1); /* Creating the buttons bar. */ buttons_bar = AddButtons(); /* Adding buttons bar to main_vbox */ gtk_box_pack_start(GTK_BOX(main_vbox), buttons_bar, FALSE, FALSE, 1); /* Emulator fixed window. */ emufixed = gtk_fixed_new(); gtk_widget_set_usize(GTK_WIDGET(emufixed), MAIN_WIN_WIDTH, REG_WIN_HEIGHT + MEM_WIN_HEIGHT + 10); /* 8051 registers frame. */ fixed_frame = regwin_init(REG_WIN_WIDTH, REG_WIN_HEIGHT); gtk_fixed_put(GTK_FIXED(emufixed), fixed_frame, 0, 0); /* Program disassembly frame. */ fixed_frame = pgmwin_init(PGM_WIN_WIDTH, PGM_WIN_HEIGHT); gtk_fixed_put(GTK_FIXED(emufixed), fixed_frame, REG_WIN_WIDTH + 10, 0); /* Memory dump frame. */ fixed_frame = memwin_init(MEM_WIN_WIDTH, MEM_WIN_HEIGHT); gtk_fixed_put(GTK_FIXED(emufixed), fixed_frame, 0, REG_WIN_HEIGHT); /* Adding fixed window to main_vbox */ gtk_box_pack_start(GTK_BOX(main_vbox), emufixed, FALSE, FALSE, 1); /* Adding the main_vbox to the main window. */ gtk_container_add(GTK_CONTAINER(mainwin), main_vbox); gtk_widget_show_all(mainwin); } static void emugtk_UpdateDisplay(void) { #ifdef EMU8051_DEBUG g_print("emugtk_UpdateDisplay()\n"); #endif regwin_Show(); pgmwin_Disasm(); memwin_DumpD("00"); } void AddMenuSeparator(GtkWidget *menu) { GtkWidget *item; item = gtk_menu_item_new(); gtk_menu_append(GTK_MENU(menu), item); } void emugtk_new_file(char *file) { emugtk_stop_running(); LoadHexFile(file); emugtk_Reset(); emugtk_UpdateDisplay(); } int main(int argc, char **argv) { char *hex_file; ParseCommandLineOptions(argc, argv); cpu8051_init(); running = 0; gtk_init(&argc, &argv); emugtk_window_init(); hex_file = get_hex_filename(); if (hex_file != NULL) emugtk_new_file(hex_file); gtk_main(); #ifdef EMU8051_DEBUG printf("End of program.\n"); #endif return EXIT_SUCCESS; } emu8051-1.1.1/src/emugtk.h0000644000175000017500000000177111653065330012003 00000000000000/* * emugtk.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef EMUGTK_H #define EMUGTK_H 1 #include #include "gtksizes.h" void AddMenuSeparator(GtkWidget *menu); void emugtk_new_file(char *file); #endif /* EMUGTK_H */ emu8051-1.1.1/src/gtksizes.h0000644000175000017500000000342111653065330012344 00000000000000/* * gtksizes.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _GTKSIZES_H_ #define _GTKSIZES_H_ /* Width, in pixels, of a fixed font symbol. */ #define FIXED_FONT_SYMBOL_WIDTH 10 /* Height, in pixels, of a fixed font symbol. */ #define FIXED_FONT_SYMBOL_HEIGHT 22 #define NUMBER_OF_BUTTONS 5 #define BUTTON_WIDTH 60 #define BUTTON_HEIGHT 60 #define BUTTONS_BAR_WIDTH (NUMBER_OF_BUTTONS * BUTTON_WIDTH) #define BUTTONS_BAR_HEIGHT BUTTON_HEIGHT /* 12 symbols + border. */ #define REG_WIN_WIDTH (FIXED_FONT_SYMBOL_WIDTH * 13) #define REG_WIN_HEIGHT (FIXED_FONT_SYMBOL_HEIGHT * 24) #define MEM_WIN_WIDTH (FIXED_FONT_SYMBOL_WIDTH * 68) /* 68 symbols. */ #define MEM_WIN_HEIGHT (FIXED_FONT_SYMBOL_HEIGHT * 17) #define PGM_WIN_WIDTH (MEM_WIN_WIDTH - REG_WIN_WIDTH) #define PGM_WIN_HEIGHT REG_WIN_HEIGHT #define MENU_BAR_HEIGHT 0 #define MAIN_WIN_WIDTH MEM_WIN_WIDTH #define MAIN_WIN_HEIGHT (BUTTONS_BAR_HEIGHT + REG_WIN_HEIGHT + MEM_WIN_HEIGHT) #endif /* _GTKSIZES_H_ */ emu8051-1.1.1/src/Makefile.am0000644000175000017500000000250511662271120012362 00000000000000# This file is processed by GNU automake to generate Makefile.in INCLUDES = \ -I$(top_srcdir) \ -I$(top_srcdir)/pixmaps \ $(GTK_CFLAGS) bin_PROGRAMS = emu8051-cli # instructions_8051.c must be first, because it and other files # (instructions_8051.h and disasm.h) are automatically generated by a perl # script, and other source files include them (the .h). common_SOURCES = \ instructions_8051.c \ options.c \ options.h \ hexfile.c \ hexfile.h \ cpu8051.c \ cpu8051.h \ memory.c \ memory.h \ common.h \ reg8051.h if USE_GTK bin_PROGRAMS += emu8051-gtk emu8051_gtk_SOURCES = \ $(common_SOURCES) \ emugtk.c \ emugtk.h \ memwin.c \ memwin.h \ pgmwin.c \ pgmwin.h \ regwin.c \ regwin.h \ filemenu.c \ filemenu.h \ viewmenu.c \ viewmenu.h \ helpmenu.c \ helpmenu.h \ messagebox.c \ messagebox.h \ gtksizes.h emu8051_gtk_LDADD = $(GTK_LIBS) endif emu8051_cli_SOURCES = \ $(common_SOURCES) \ emuconsole.c \ keyboard.c \ keyboard.h # These files are generated automatically by a perl script. instructions_8051.c instructions_8051.h disasm.h : opcode2c.pl opcodes.lst ./opcode2c.pl CLEANFILES = *~ DISTCLEANFILES = .deps/*.P MAINTAINERCLEANFILES = \ Makefile.in \ instructions_8051.c \ instructions_8051.h \ disasm.h EXTRA_DIST = \ opcode2c.pl \ opcodes.lst \ instructions_8051.h \ disasm.h emu8051-1.1.1/src/Makefile.in0000644000175000017500000004436411671304515012411 00000000000000# Makefile.in generated by automake 1.11.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, # Inc. # This Makefile.in is free software; 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you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include #include #if STDC_HEADERS # include #elif HAVE_STRINGS_H # include #endif #include "common.h" #include "memory.h" /* Convert an ascii string to an hexadecimal number. */ unsigned int Ascii2Hex(char *istring, int length) { unsigned int result = 0; int i, ascii_code; if (!length || (length > (int) strlen(istring))) length = strlen(istring); for (i = 0; i < length; i++) { ascii_code = istring[i]; if (ascii_code > 0x39) ascii_code &= 0xDF; if ((ascii_code >= 0x30 && ascii_code <= 0x39) || (ascii_code >= 0x41 && ascii_code <= 0x46)) { ascii_code -= 0x30; if (ascii_code > 9) ascii_code -= 7; result <<= 4; result += ascii_code; } else { printf("%s: In Ascii2Hex(), syntax error.\n", PACKAGE); printf(" str=%s, length=%d\n", istring, length); } } return result; } void LoadHexFile(const char *filename) { int i, j, RecLength, LoadOffset, RecType, Data, Checksum; #define LINE_BUFFER_LEN 256 FILE *fp; int status; char line[LINE_BUFFER_LEN]; if (filename == NULL) { printf("%s: No file specified\n", PACKAGE); exit(EXIT_FAILURE); } /* Trying to open the file. */ fp = fopen(filename, "r"); if (fp == NULL) { perror(PACKAGE); /*ErrorLocation(__FILE__, __LINE__);*/ exit(EXIT_FAILURE); } /* Reading one line of data from the hex file. */ /* char *fgets(char *s, int size, FILE *stream); Reading stops after an EOF or a newline. If a newline is read, it is stored into the buffer. A '\0' is stored after the last character in the buffer. */ while (fgets(line, LINE_BUFFER_LEN, fp) != NULL) { i = 0; Checksum = 0; if (line[i++] != ':') { printf("%s: line not beginning with \":\"\n", PACKAGE); goto close_file; } RecLength = Ascii2Hex(&line[i], 2); i += 2; Checksum += RecLength; LoadOffset = Ascii2Hex(&line[i], 4); Checksum += LoadOffset / 256; Checksum += LoadOffset % 256; i += 4; RecType = Ascii2Hex(&line[i], 2); i += 2; Checksum += RecType; if (RecType == 1) { Checksum += Ascii2Hex(&line[i], 2); Checksum &= 0x000000FF; if (Checksum) { /* Error. */ printf("%s: Invalid format\n", PACKAGE); goto close_file; } else { /* OK */ goto close_file; } } for (j = 0; j < RecLength; j++) { Data = Ascii2Hex(&line[i], 2); memory_write8(PGM_MEM_ID, (unsigned int)(LoadOffset + j), (unsigned char)Data); i += 2; Checksum += Data; } RecType = Ascii2Hex(&line[i], 2); Checksum += RecType; Checksum &= 0x000000FF; if (Checksum) { printf("%s: Invalid format\n", PACKAGE); goto close_file; } } close_file: status = fclose(fp); if (status != EXIT_SUCCESS) { fprintf(stderr, "%s: Error closing hex file.\n", PACKAGE); /*ErrorLocation(__FILE__, __LINE__);*/ exit(EXIT_FAILURE); } } emu8051-1.1.1/src/hexfile.h0000644000175000017500000000174211653065330012131 00000000000000/* * hexfile.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef HEXFILE_H #define HEXFILE_H 1 unsigned int Ascii2Hex(char *istring, int length); void LoadHexFile(const char *filename); #endif /* HEXFILE_H */ emu8051-1.1.1/src/options.c0000644000175000017500000000621411653065330012172 00000000000000/* * Processing command-line options and arguments. * * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include #include #if STDC_HEADERS # include #elif HAVE_STRINGS_H # include #endif #include "common.h" #include "options.h" static char *hex_file; /* * Return the hex file name */ char * get_hex_filename(void) { return hex_file; } /******************************************************************************* * Display the help message and exit ******************************************************************************/ static void DisplayUsage(void) { printf(COMMAND_LINE_OPTIONS); } /******************************************************************************* * Display version information and exit ******************************************************************************/ static void DisplayVersion(void) { printf("\n"); printf(" %s, version %s\n", PACKAGE, VERSION); printf(" Written by Jonathan St-AndrĂ©, Pascal Fecteau" "and Hugo Villeneuve\n\n"); } static void InvalidOption(const char *message, /*@null@*/ const char *string) { if (string == NULL) fprintf(stderr, "%s: %s\n", PACKAGE, message); else fprintf(stderr, "%s: %s %s\n", PACKAGE, message, string); fprintf(stderr, "Try `%s -h' for more information.\n", PACKAGE); exit(EXIT_FAILURE); } /******************************************************************************* * Initializes the different options passed as arguments on the command line. ******************************************************************************/ void ParseCommandLineOptions(int argc, char *argv[]) { int i; char *token; for (i = 1; i < argc; i++) { token = argv[i]; switch (token[0]) { case '-': /* Processing options names */ switch (token[1]) { case 'h': if (strlen(&token[1]) == 1) { DisplayUsage(); exit(EXIT_SUCCESS); } InvalidOption("invalid option", token); break; case 'v': if (STREQ("version", &token[1])) { DisplayVersion(); exit(EXIT_SUCCESS); } else InvalidOption("invalid option", token); break; default: InvalidOption("invalid option", token); break; } /* end switch(token[1]) */ break; default: /* Processing options arguments */ /* Must be the filename... */ hex_file = token; break; } /* end switch(token[0]) */ } /* end for */ } emu8051-1.1.1/src/options.h0000644000175000017500000000255311653065330012201 00000000000000/* * options.h * * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef OPTIONS_H #define OPTIONS_H 1 #define COMMAND_LINE_OPTIONS \ "Usage: " PACKAGE " [OPTION]... [FILENAME]\n" \ "Simulator/emulator for 8051 family microcontrollers.\n\n" \ " -h display this help and exit\n" \ " -version display version information and exit\n" #define VERSION_STRING \ PACKAGE "\n" \ "Version " VERSION "\n" \ "\n" \ "Written by\n" \ "Hugo Villeneuve\n" \ "Jonathan St-AndrĂ©\n" \ "Pascal Fecteau" void ParseCommandLineOptions(int argc, char *argv[]); char * get_hex_filename(void); #endif /* OPTIONS_H */ emu8051-1.1.1/src/emuconsole.c0000644000175000017500000002720211662266365012663 00000000000000/* * emuconsole.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #define _GNU_SOURCE /* For getline() */ #include #include #include /* For isblank, toupper() */ #include "config.h" #include "common.h" #include "cpu8051.h" #include "reg8051.h" #include "memory.h" #include "options.h" #include "hexfile.h" #include "keyboard.h" /* Capitalize all letters in buffer */ static void Capitalize(char *buffer) { int k; for (k = 0; k < strlen(buffer); k++) buffer[k] = toupper(buffer[k]); } /* Remove leading spaces from string in buffer */ static void RemoveSpaces(char *buffer) { int k = 0; while ((k < strlen(buffer)) && isblank(buffer[k])) k++; if (k != 0) strcpy(buffer, &buffer[k]); } /* CPU exec and Console UI update */ static void console_exec(char *Address, char *NumberInst) { char dummy; int NbInst = -1; /* -1 is infinity */ if (strlen(Address) == 0) { printf("Invalid address\n"); return; } if (STREQ(Address, "PC")) cpu8051.pc = Ascii2Hex(Address, strlen(Address)); if (strlen(NumberInst) != 0) NbInst = Ascii2Hex(NumberInst, strlen(NumberInst)); InitUnixKB(); printf("Program executing...\n"); do { cpu8051_Exec(); if (NbInst > 0) NbInst--; } while (!IsBreakpoint(cpu8051.pc) && (NbInst != 0) && !kbhit()); if (kbhit()) { dummy = getch(); /* Flush key */ printf("Caught break signal!\n"); } if (NbInst == 0) printf("Number of instructions reached! Stopping!\n"); if (IsBreakpoint(cpu8051.pc)) printf("Breakpoint hit at %.4X! Stopping!\n", cpu8051.pc); ResetUnixKB(); } /* Disassemble NumberInst instructions at Address */ static void DisasmN(unsigned int Address, int NumberInst) { char TextTmp[255]; int Row; for (Row = 0; Row < NumberInst ; Row++) { Address += cpu8051_Disasm(Address, TextTmp); printf("%s\n", TextTmp); } } /* Disassemble 16 instructions at Address */ static void Disasm(char *Address, char *NumberInst) { unsigned int MemAddress, NbInst; if ((strlen(Address) == 0) || (STREQ(Address, "PC"))) MemAddress = cpu8051.pc; else MemAddress = Ascii2Hex(Address, strlen(Address)); if (strlen(NumberInst) == 0) NumberInst = "10"; NbInst = Ascii2Hex(NumberInst, strlen(NumberInst)); DisasmN(MemAddress, NbInst); } /* Set NewValue to Register */ static void SetRegister(char *Register, char *NewValue) { if (STREQ(Register, "PC")) cpu8051.pc = Ascii2Hex(NewValue, 4); else if (STREQ(Register, "A")) cpu8051_WriteD(_ACC_, Ascii2Hex(NewValue, 2)); else if (STREQ(Register, "B")) cpu8051_WriteD(_B_, Ascii2Hex(NewValue, 2)); else if (STREQ(Register, "SP")) cpu8051_WriteD(_SP_, Ascii2Hex(NewValue, 2)); else { printf("\nInvalid register name!\n"); printf("Valid registers are A, B, PC and SP.\n"); } } /* Show CPU registers */ static void console_show_registers(void) { unsigned char PSW = cpu8051_ReadD(_PSW_); int BankSelect = (PSW & 0x18); printf("---------------------------------------------------------------" "-------\n"); printf("| PC | SP | DPTR | ACC | B | PSW: CY AC F0 RS1 RS0 OV" " - P |\n"); printf("| %.4X | %.2X | %.4X | %.2X | %.2X |", cpu8051.pc, cpu8051_ReadD(_SP_), (cpu8051_ReadD(_DPTRHIGH_) << 8) + cpu8051_ReadD(_DPTRLOW_), cpu8051_ReadD(_ACC_), cpu8051_ReadD(_B_)); printf(" %d %d %d %d %d %d %d %d |", (PSW >> 7) & 1, (PSW >> 6) & 1, (PSW >> 5) & 1, (PSW >> 4) & 1, (PSW >> 3) & 1, (PSW >> 2) & 1, (PSW >> 1) & 1, PSW & 1); printf("\n"); printf("---------------------------------------------------------------" "-------\n"); printf("| TCON | TMOD | IE | IP | R0 | R1 | R2 | R3 | R4 | R5 | R6 | R7" " | |\n"); printf("| %.2X | %.2X | %.2X | %.2X ", cpu8051_ReadD(_TCON_), cpu8051_ReadD(_TMOD_), cpu8051_ReadD(_IE_), cpu8051_ReadD(_IP_)); printf("| %.2X | %.2X | %.2X | %.2X ", cpu8051_ReadD(BankSelect + _R0_), cpu8051_ReadD(BankSelect + _R1_), cpu8051_ReadD(BankSelect + _R2_), cpu8051_ReadD(BankSelect + _R3_)); printf("| %.2X | %.2X | %.2X | %.2X ", cpu8051_ReadD(BankSelect + _R4_), cpu8051_ReadD(BankSelect + _R5_), cpu8051_ReadD(BankSelect + _R6_), cpu8051_ReadD(BankSelect + _R7_)); printf("| |\n"); printf("---------------------------------------------------------------" "-------\n"); } /* CPU reset and Console UI update */ static void console_reset(void) { printf("Resetting... "); cpu8051_Reset(); printf("Done.\n"); console_show_registers(); } /* CPU trace and Console UI update */ static void console_trace(char *Address) { if (strlen(Address) != 0) cpu8051.pc = Ascii2Hex(Address, strlen(Address)); cpu8051_Exec(); console_show_registers(); DisasmN(cpu8051.pc, 1); } /* EmuConsole main loop */ static void console_main(void) { unsigned int Index; char *line = NULL; char prompt[] = "-> "; char *Title[] = { " *******************", " * 8051 Emulator *", " *******************", "", 0 }; char *Menu[] = { " Available commands, [ ] = options", "", " Set Breakpoint.............. SB [address]", " Remove Breakpoint........... RB [address]", " Display Breakpoint(s)....... DB", " Dump External Data Memory... DE [address] [size]", " Dump Internal Data Memory... DI [address] [size]", " Dump Program Memory......... DP [address] [size]", " Display Registers content... DR", " Execute..................... EM [address" " [number of instructions]]", " Help........................ H", " Modify External Data Memory. ME address value", " Modify Internal Data Memory. MI address value", " Modify Program Memory....... MP address value", " Modify Register............. MR register value", " Quit Emulator............... Q", " Trace mode.................. T [address]", " Unassemble.................. U [address]" " [number of instructions]", " Reset processor............. Z", 0 }; Index = 0; while (Title[Index] != 0) printf("%s\n", Title[Index++]); Index = 0; while (Menu[Index] != 0) printf("%s\n", Menu[Index++]); console_reset(); int QuitRequest = 0; while (!QuitRequest) { int slen; size_t len = 0; ssize_t bytes_read; char Command[256]; char Args[256]; char Parameter1[256]; char Parameter2[256]; Parameter1[0] = '\0'; Parameter2[0] = '\0'; printf(prompt); bytes_read = getline(&line, &len, stdin); Capitalize(line); RemoveSpaces(line); /* Strip trailing newline */ slen = strlen(line); if (line[slen - 1] == '\n') line[slen - 1] = '\0'; /* Find command-arguments delimiter */ for (Index = 0; Index < strlen(line); Index++) { if (isblank(line[Index])) break; } /* Keep only the Command part from the input line */ memcpy(Command, &line[0], Index); Command[Index] = '\0'; /* Keep only the arguments part from the input line */ if (Index < strlen(line)) { slen = strlen(line) - Index; memcpy(Args, &line[Index + 1], slen); } else { slen = 0; } Args[slen] = '\0'; RemoveSpaces(Args); /* Find multi-arguments delimiter */ for (Index = 0; Index < strlen(Args); Index++) { if (isblank(Args[Index])) break; } memcpy(Parameter1, &Args[0], Index); Parameter1[Index] = '\0'; if (Index < strlen(Args)) { slen = strlen(Args) - Index; memcpy(Parameter2, &Args[Index + 1], slen); } else { slen = 0; } Parameter2[slen] = '\0'; RemoveSpaces(Parameter2); if (strlen(Command) == 0) { goto syntax_error; continue; } if ((strlen(Parameter1) > 4) || (strlen(Parameter2) > 4)) { printf("Invalid Parameter Format!\n"); continue; } switch (Command[0]) { case 'D': if (STREQ(Command, "DB") && (strlen(Parameter1) == 0)) ShowBreakpoints(); else if (STREQ(Command, "DE")) DumpMem(Parameter1, Parameter2, EXT_MEM_ID); else if (STREQ(Command, "DI")) DumpMem(Parameter1, Parameter2, INT_MEM_ID); else if (STREQ(Command, "DP")) { if ((strlen(Parameter1) == 0)) strcpy(Parameter1, "PC"); DumpMem(Parameter1, Parameter2, PGM_MEM_ID); } else if (STREQ(Command, "DR") && (strlen(Parameter1) == 0)) console_show_registers(); else goto syntax_error; break; case 'E': if (STREQ(Command, "EM")) console_exec(Parameter1, Parameter2); else goto syntax_error; break; case 'H': if (STREQ(Command, "H") && (strlen(Parameter1) == 0) && (strlen(Parameter2) == 0)) { Index = 0; while (Menu[Index] != 0) printf("%s\n", Menu[Index++]); } else goto syntax_error; break; case 'M': if ((strlen(Parameter1) == 0) || (strlen(Parameter2) == 0)) printf("Missing Parameter!\n"); else if (STREQ(Command, "ME")) { unsigned int adresse = Ascii2Hex(Parameter1, 4); unsigned char valeur = Ascii2Hex(Parameter2, 2); memory_write8(EXT_MEM_ID, adresse, valeur); } else if (STREQ(Command, "MI")) { unsigned int adresse = Ascii2Hex(Parameter1, 2); unsigned char valeur = Ascii2Hex(Parameter2, 2); memory_write8(INT_MEM_ID, adresse, valeur); } else if (STREQ(Command, "MP")) { unsigned int adresse = Ascii2Hex(Parameter1, 4); unsigned char valeur = Ascii2Hex(Parameter2, 2); memory_write8(PGM_MEM_ID, adresse, valeur); } else if (STREQ(Command, "MR")) SetRegister(Parameter1, Parameter2); else goto syntax_error; break; case 'Q': if (STREQ(Command, "Q") && (strlen(Parameter1) == 0) && (strlen(Parameter2) == 0)) QuitRequest = 1; else goto syntax_error; break; case 'R': if (strlen(Parameter2) != 0) goto TooMuchParameters; if (STREQ(Command, "RB")) { if (strlen(Parameter1) == 0) ClearBreakpoint(cpu8051.pc); else ClearBreakpoint( Ascii2Hex(Parameter1, 4)); } else goto syntax_error; break; case 'S': if (strlen(Parameter2) != 0) goto TooMuchParameters; if (STREQ(Command, "SB")) { if (strlen(Parameter1) == 0) SetBreakpoint(cpu8051.pc); else SetBreakpoint(Ascii2Hex(Parameter1, 4)); } else goto syntax_error; break; case 'T': if (strlen(Parameter2) != 0) printf("Wrong Number of Parameters!\n"); if (STREQ(Command, "T")) console_trace(Parameter1); else goto syntax_error; break; case 'U': if (STREQ(Command, "U")) Disasm(Parameter1, Parameter2); else goto syntax_error; break; case 'Z': if (STREQ(Command, "Z") && (strlen(Parameter1) == 0) && (strlen(Parameter2) == 0)) cpu8051_Reset(); else goto syntax_error; break; case '\n': break; default: goto syntax_error; } continue; syntax_error: printf("Syntax Error!\n"); continue; TooMuchParameters: printf("Wrong Number of Parameters!\n"); continue; } if (line) free(line); } int main(int argc, char **argv) { char *hex_file; ParseCommandLineOptions(argc, argv); cpu8051_init(); hex_file = get_hex_filename(); if (hex_file != NULL) LoadHexFile(hex_file); console_main(); #ifdef EMU8051_DEBUG printf("End of program.\n"); #endif return 0; } emu8051-1.1.1/src/messagebox.c0000644000175000017500000001165411653065330012640 00000000000000/* * messagebox.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include "common.h" #include "messagebox.h" #define MESSAGE_DIALOG_BORDER 25 #define BUTTON_TEXT_BORDER 3 /* This function is used to adjust the border around the text in a button. */ static GtkWidget * AddTextButton(gchar *button_text) { GtkWidget *button; GtkWidget *label; GtkWidget *label_window; /* * The GtkLabel widget is one of a few GTK+ widgets that don't create * their own window to render themselves into. Instead, they draw * themselves directly onto their parents window. This means that in * order to set a property for a GtkLabel widget, you need to change the * property of its parent, i.e. the object that you pack it into. * Another solution (short term workaround) is to put the label widget * inside another widget that does get its own window, like the * 'ViewPort' or 'EventBox' widget. */ /* * Using workaround described above to set the border width of 'label' * widget. */ label_window = gtk_event_box_new(); /* Creating our label. */ label = gtk_label_new(button_text); /* Adding label widget to label_window widget. */ gtk_container_add(GTK_CONTAINER(label_window), label); /* * Changing border width of the label widget by way of label_window * widget. */ gtk_container_set_border_width(GTK_CONTAINER(label_window), BUTTON_TEXT_BORDER); /* Create the button. */ button = gtk_button_new(); /* Adding label to button. */ gtk_container_add(GTK_CONTAINER(button), label_window); return button; } void ShowMessage(gchar *title, gchar *message, int justification, int font_style) { GtkWidget *dialog; GtkWidget *label; GtkWidget *okay_button; GtkWidget *label_window; GtkWidget *center; /* Set-up a dialog window, centered on the screen. */ dialog = gtk_dialog_new(); gtk_window_set_title(GTK_WINDOW(dialog), title); gtk_window_set_position(GTK_WINDOW(dialog), GTK_WIN_POS_CENTER); /* * To have the main window of our application being unusable while using * the dialog. */ gtk_window_set_modal(GTK_WINDOW(dialog), TRUE); /* * The GtkLabel widget is one of a few GTK+ widgets that don't create * their own window to render themselves into. Instead, they draw * themselves directly onto their parents window. This means that in * order to set a property for a GtkLabel widget, you need to change the * property of its parent, i.e. the object that you pack it into. * Another solution (short term workaround) is to put the label widget * inside another widget that does get its own window, like the * 'ViewPort' or 'EventBox' widget. */ /* * Using workaround described above to set the border width of 'label' * widget. */ label_window = gtk_event_box_new(); /* Creating our label. */ label = gtk_label_new(message); gtk_label_set_justify(GTK_LABEL(label), justification); if (font_style == MESSAGE_DIALOG_FIXED_FONT) { PangoFontDescription *pango_font; pango_font = pango_font_description_from_string(FIXED_FONT); gtk_widget_modify_font(label, pango_font); } /* Adding label widget to label_window widget. */ gtk_container_add(GTK_CONTAINER(label_window), label); /* * Changing border width of the label widget by way of label_window * widget. */ gtk_container_set_border_width(GTK_CONTAINER(label_window), MESSAGE_DIALOG_BORDER); /* xalign, yalign, xscale, yscale */ center = gtk_alignment_new(0.5, 0.5, 0.0, 0.0); /* Create the OK button. */ okay_button = AddTextButton("OK"); /* Ensure that the dialog box is destroyed when the user clicks ok. */ gtk_signal_connect_object(GTK_OBJECT(okay_button), "clicked", GTK_SIGNAL_FUNC(gtk_widget_destroy), (gpointer) dialog); /* Add the OK button to the alignment widget. */ gtk_container_add(GTK_CONTAINER(center), okay_button); /* Add the alignment widget to the dialog window. */ gtk_container_add(GTK_CONTAINER(GTK_DIALOG(dialog)->action_area), center); /* Add the label_window to the dialog window. */ gtk_container_add(GTK_CONTAINER(GTK_DIALOG(dialog)->vbox), label_window); /* Show everything we've added to the dialog. */ gtk_widget_show_all(dialog); } emu8051-1.1.1/src/messagebox.h0000644000175000017500000000210611653065330012635 00000000000000/* * messagebox.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef MESSAGEBOX_H #define MESSAGEBOX_H 1 #include #define MESSAGE_DIALOG_NORMAL_FONT 0 #define MESSAGE_DIALOG_FIXED_FONT 1 void ShowMessage(gchar *title, gchar *message, int justification, int font_style); #endif /* MESSAGEBOX_H */ emu8051-1.1.1/src/keyboard.c0000644000175000017500000000312211653065330012272 00000000000000/* * keyboard.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include static struct termios orig, newtio; static int peek = -1; int kbhit(void) { char ch; int nread; if (peek != -1) return 1; newtio.c_cc[VMIN] = 0; tcsetattr(0, TCSANOW, &newtio); nread = read(0, &ch, 1); newtio.c_cc[VMIN] = 1; tcsetattr(0, TCSANOW, &newtio); if (nread == 1) { peek = ch; return 1; } return 0; } int getch(void) { char ch; if (peek != -1) { ch = peek; peek = -1; return ch; } read(0, &ch, 1); return ch; } void InitUnixKB(void) { tcgetattr(0, &orig); newtio = orig; newtio.c_lflag &= ~ICANON; newtio.c_lflag &= ~ECHO; newtio.c_lflag &= ~ISIG; newtio.c_cc[VMIN] = 1; newtio.c_cc[VTIME] = 0; tcsetattr(0, TCSANOW, &newtio); } void ResetUnixKB(void) { tcsetattr(0, TCSANOW, &orig); } emu8051-1.1.1/src/keyboard.h0000644000175000017500000000174211653065330012305 00000000000000/* * keyboard.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _KEYBOARD_H_ #define _KEYBOARD_H_ int kbhit(void); int getch(void); void InitUnixKB(void); void ResetUnixKB(void); #endif /* _KEYBOARD_H_ */ emu8051-1.1.1/src/instructions_8051.c0000644000175000017500000043260711662270661013736 00000000000000/* * instructions_8051.c * * Do not modify this file directly, as it was created by opcode2c.pl * Any modifications made directly to this file will be lost. * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ /* Define only here, for not having extern scope on local variables. */ #define INSTRUCTIONS_8051_M 1 #include "reg8051.h" #include "cpu8051.h" #include "memory.h" #include "instructions_8051.h" /***************************************************************************** * Instruction "NOP" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_00(void) { return 1; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_01(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "LJMP addr16" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_02(void) { unsigned int addr16 = ( memory_read8( PGM_MEM_ID, cpu8051.pc++ ) << 8 ); addr16 += memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = addr16; return 2; } /***************************************************************************** * Instruction "RR A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_03(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination = ( destination >> 1 ) | ( destination << 7 ); cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "INC A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_04(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination++; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "INC direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_05(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); destination++; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "INC @R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_06(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination++; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 1; } /***************************************************************************** * Instruction "INC @R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_07(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination++; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 1; } /***************************************************************************** * Instruction "INC R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_08(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); destination++; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 1; } /***************************************************************************** * Instruction "INC R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_09(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); destination++; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 1; } /***************************************************************************** * Instruction "INC R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_0A(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); destination++; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 1; } /***************************************************************************** * Instruction "INC R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_0B(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); destination++; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 1; } /***************************************************************************** * Instruction "INC R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_0C(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); destination++; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 1; } /***************************************************************************** * Instruction "INC R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_0D(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); destination++; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 1; } /***************************************************************************** * Instruction "INC R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_0E(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); destination++; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 1; } /***************************************************************************** * Instruction "INC R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_0F(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); destination++; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 1; } /***************************************************************************** * Instruction "JBC bitaddr,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_10(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( destination == 1 ) { cpu8051.pc = source; destination = 0; } cpu8051_WriteB( dstbitaddr, destination ); return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_11(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "LCALL addr16" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_12(void) { unsigned int addr16 = ( memory_read8( PGM_MEM_ID, cpu8051.pc++ ) << 8 ); addr16 += memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = addr16; return 2; } /***************************************************************************** * Instruction "RRC A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_13(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char tmpval = destination; destination = ( destination >> 1 ) | ( cpu8051_ReadD( _PSW_ ) & 0x80 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) | ( tmpval << 7 ) ); cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "DEC A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_14(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination--; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "DEC direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_15(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); destination--; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "DEC @R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_16(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination--; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 1; } /***************************************************************************** * Instruction "DEC @R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_17(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination--; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 1; } /***************************************************************************** * Instruction "DEC R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_18(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); destination--; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_19(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); destination--; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_1A(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); destination--; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_1B(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); destination--; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_1C(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); destination--; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_1D(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); destination--; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_1E(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); destination--; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 1; } /***************************************************************************** * Instruction "DEC R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_1F(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); destination--; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 1; } /***************************************************************************** * Instruction "JB bitaddr,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_20(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( destination == 1 ) { cpu8051.pc = source; } cpu8051_WriteB( dstbitaddr, destination ); return 2; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_21(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "RET" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_22(void) { unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051.pc = ( cpu8051_ReadI( SP-- ) << 8 ); cpu8051.pc += cpu8051_ReadI ( SP-- ); cpu8051_WriteD( _SP_, SP ); return 2; } /***************************************************************************** * Instruction "RL A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_23(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination = ( destination << 1 ) | ( destination >> 7 ); cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_24(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_25(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_26(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_27(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_28(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_29(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_2A(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_2B(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_2C(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_2D(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_2E(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADD A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_2F(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "JNB bitaddr,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_30(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( destination == 0 ) { cpu8051.pc = source; } cpu8051_WriteB( dstbitaddr, destination ); return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_31(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "RETI" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_32(void) { cpu8051.active_priority = -1; unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051.pc = ( cpu8051_ReadI( SP-- ) << 8 ); cpu8051.pc += cpu8051_ReadI( SP-- ); return 2; } /***************************************************************************** * Instruction "RLC A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_33(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char tmpval = destination; destination = ( destination << 1 ) | ( ( cpu8051_ReadD( _PSW_ ) & 0x80 ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) | ( tmpval & 0x80 ) ); cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_34(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_35(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_36(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_37(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_38(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_39(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_3A(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_3B(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_3C(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_3D(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_3E(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ADDC A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_3F(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char carryflag = ( cpu8051_ReadD( _PSW_ ) >> 7 ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination + source + carryflag > 0xFF ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag < 0x80 ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) + ( source & 0x7F ) + carryflag > 0x7F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) + ( source & 0x0F ) + carryflag > 0x0F ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination += source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "JC reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_40(void) { cpu8051.pc++; unsigned int destination = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( cpu8051_ReadD( _PSW_ ) > 0x7F) { cpu8051.pc = destination; } return 2; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_41(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "ORL direct,A" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_42(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination |= source; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "ORL direct,#data" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_43(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination |= source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "ORL A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_44(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_45(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_46(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_47(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_48(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_49(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_4A(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_4B(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_4C(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_4D(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_4E(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_4F(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); destination |= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "JNC reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_50(void) { cpu8051.pc++; unsigned int destination = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( cpu8051_ReadD( _PSW_ ) < 0x80 ) { cpu8051.pc = destination; } return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_51(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "ANL direct,A" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_52(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination &= source; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "ANL direct,#data" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_53(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination &= source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "ANL A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_54(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_55(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_56(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_57(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_58(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_59(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_5A(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_5B(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_5C(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_5D(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_5E(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ANL A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_5F(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); destination &= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "JZ reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_60(void) { cpu8051.pc++; unsigned int destination = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( cpu8051_ReadD( _ACC_ ) == 0 ) { cpu8051.pc = destination; } return 2; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_61(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "XRL direct,A" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_62(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination ^= source; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "XRL direct,#data" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_63(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination ^= source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "XRL A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_64(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_65(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_66(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_67(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_68(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_69(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_6A(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_6B(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_6C(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_6D(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_6E(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XRL A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_6F(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); destination ^= source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "JNZ reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_70(void) { cpu8051.pc++; unsigned int destination = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; if ( cpu8051_ReadD( _ACC_ ) != 0 ) { cpu8051.pc = destination; } return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_71(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "ORL C,bitaddr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_72(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); source = cpu8051_ReadB( srcbitaddr ); cpu8051_WriteD( _PSW_ , ( ( destination | source ) << 7 ) ); cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 2; } /***************************************************************************** * Instruction "JMP @A+DPTR" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_73(void) { unsigned int destination = cpu8051_ReadI( cpu8051_ReadD( _ACC_ ) + cpu8051_ReadD( _DPTRLOW_ ) + ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) ); cpu8051.pc = destination; return 2; } /***************************************************************************** * Instruction "MOV A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_74(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV direct,#data" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_75(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV @R0,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_76(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 1; } /***************************************************************************** * Instruction "MOV @R1,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_77(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 1; } /***************************************************************************** * Instruction "MOV R0,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_78(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R1,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_79(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R2,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_7A(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R3,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_7B(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R4,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_7C(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R5,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_7D(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R6,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_7E(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R7,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_7F(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 1; } /***************************************************************************** * Instruction "SJMP reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_80(void) { cpu8051.pc++; unsigned int destination = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; cpu8051.pc = destination; return 2; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_81(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "ANL C,bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_82(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); source = cpu8051_ReadB( srcbitaddr ); cpu8051_WriteD( _PSW_, ( ( destination & source) << 7 ) ); cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "MOVC A,@A+PC" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_83(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, cpu8051_ReadD( _ACC_ ) + ( ++cpu8051.pc ) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "DIV AB" takes 4 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_84(void) { unsigned char A = cpu8051_ReadD( _ACC_ ), B = cpu8051_ReadD( _B_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7B ) ); if ( B != 0 ) { cpu8051_WriteD( _ACC_, A/B ); cpu8051_WriteD( _B_, A%B ); } else cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); return 4; } /***************************************************************************** * Instruction "MOV direct,direct" takes 1 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_85(void) { unsigned char srcaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char source = cpu8051_ReadD( srcaddr ); unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); destination = source; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "MOV direct,@R0" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_86(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,@R1" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_87(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R0" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_88(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R1" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_89(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R2" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_8A(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R3" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_8B(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R4" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_8C(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R5" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_8D(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R6" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_8E(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV direct,R7" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_8F(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOV DPTR,#data16" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_90(void) { unsigned int destination = ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ); unsigned char source = ( memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ) << 8 ); source += memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); destination = source; cpu8051_WriteD( _DPTRHIGH_, ( destination >> 8 ) ); cpu8051_WriteD( _DPTRLOW_, ( destination & 0xFF ) ); return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_91(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "MOV bitaddr,C" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_92(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); unsigned char source = ( cpu8051_ReadD( _PSW_ ) >> 7 ); destination = source; cpu8051_WriteB( dstbitaddr, destination ); return 2; } /***************************************************************************** * Instruction "MOVC A,@A+DPTR" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_93(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, cpu8051_ReadD( _ACC_ ) + cpu8051_ReadD( _DPTRLOW_ ) + ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 2; } /***************************************************************************** * Instruction "SUBB A,#data" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_94(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_95(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_96(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_97(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_98(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_99(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_9A(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_9B(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_9C(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_9D(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_9E(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "SUBB A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_9F(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char carryflag = cpu8051_ReadD( _PSW_ ) >> 7; cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x3B ) ); if ( destination < ( source + carryflag ) ) { cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( ( destination & 0x7F ) > ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); } else if ( ( destination & 0x7F ) < ( ( source + carryflag ) & 0x7F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); if ( ( destination & 0x0F ) < ( ( source + carryflag ) & 0x0F ) ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x40 ) ); destination -= source + carryflag; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "ORL C,/bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A0(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); source = ( cpu8051_ReadB( srcbitaddr ) ^ 1 ); cpu8051_WriteD( _PSW_ , ( ( destination | source ) << 7 ) ); cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A1(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "MOV C,bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A2(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); source = cpu8051_ReadB( srcbitaddr ); destination = source; cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "INC DPTR" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_A3(void) { unsigned int destination = ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ); destination++; cpu8051_WriteD( _DPTRHIGH_, ( destination >> 8 ) ); cpu8051_WriteD( _DPTRLOW_, ( destination & 0xFF ) ); return 2; } /***************************************************************************** * Instruction "MUL AB" takes 4 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_A4(void) { unsigned char A = cpu8051_ReadD( _ACC_ ), B = cpu8051_ReadD( _B_ ); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7B ) ); cpu8051_WriteD( _ACC_ , ( ( A * B ) & 0x00FF ) ); cpu8051_WriteD( _B_, ( A * B ) / 0x100 ); if ( cpu8051_ReadD( _B_ ) > 0) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x04 ) ); return 4; } /***************************************************************************** * Instruction "INVALID" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_A5(void) { return 1; } /***************************************************************************** * Instruction "MOV @R0,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A6(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 2; } /***************************************************************************** * Instruction "MOV @R1,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A7(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 2; } /***************************************************************************** * Instruction "MOV R0,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A8(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R1,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_A9(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R2,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_AA(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R3,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_AB(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R4,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_AC(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R5,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_AD(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R6,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_AE(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 2; } /***************************************************************************** * Instruction "MOV R7,direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_AF(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 2; } /***************************************************************************** * Instruction "ANL C,/bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_B0(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); unsigned char source, srcbitaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); source = ( cpu8051_ReadB( srcbitaddr ) ^ 1 ); cpu8051_WriteD( _PSW_, ( ( destination & source) << 7 ) ); cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_B1(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "CPL bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_B2(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); destination ^= 0x01; cpu8051_WriteB( dstbitaddr, destination ); return 1; } /***************************************************************************** * Instruction "CPL C" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_B3(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); destination ^= 0x01; cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "CJNE A,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_B4(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( _ACC_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE A,direct,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_B5(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( _ACC_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE @R0,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_B6(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 2; } /***************************************************************************** * Instruction "CJNE @R1,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_B7(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 2; } /***************************************************************************** * Instruction "CJNE R0,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_B8(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R1,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_B9(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R2,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_BA(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R3,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_BB(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R4,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_BC(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R5,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_BD(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R6,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_BE(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 2; } /***************************************************************************** * Instruction "CJNE R7,#data,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_BF(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char source = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned int reladdr = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc)) + (cpu8051.pc + 1); cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) & 0x7F ) ); if ( destination < source ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); if ( destination != source ) cpu8051.pc = reladdr; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 2; } /***************************************************************************** * Instruction "PUSH direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_C0(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, destination ); cpu8051_WriteD( _SP_, SP ); cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_C1(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "CLR bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_C2(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); destination = 0; cpu8051_WriteB( dstbitaddr, destination ); return 1; } /***************************************************************************** * Instruction "CLR C" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_C3(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); destination = 0; cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "SWAP A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_C4(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination = ( destination << 4 ) + ( destination >> 4 ); cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "XCH A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_C5(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( srcaddr, source ); return 1; } /***************************************************************************** * Instruction "XCH A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_C6(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), source ); return 1; } /***************************************************************************** * Instruction "XCH A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_C7(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), source ); return 1; } /***************************************************************************** * Instruction "XCH A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_C8(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R0_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_C9(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R1_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_CA(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R2_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_CB(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R3_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_CC(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R4_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_CD(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R5_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_CE(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R6_, source ); return 1; } /***************************************************************************** * Instruction "XCH A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_CF(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char tmpval = destination; destination = source; source = tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteD( BANKPSW + _R7_, source ); return 1; } /***************************************************************************** * Instruction "POP direct" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_D0(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char SP = cpu8051_ReadD( _SP_ ); destination = cpu8051_ReadI( SP-- ); cpu8051_WriteD( _SP_, SP ); cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_D1(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "SETB bitaddr" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_D2(void) { unsigned char destination, dstbitaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); destination = cpu8051_ReadB( dstbitaddr ); destination = 1; cpu8051_WriteB( dstbitaddr, destination ); return 1; } /***************************************************************************** * Instruction "SETB C" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_D3(void) { unsigned char destination = ( cpu8051_ReadD( _PSW_ ) >> 7 ); destination = 1; cpu8051_WriteD( _PSW_, ( ( cpu8051_ReadD( _PSW_ ) & 0x7F) | ( destination << 7 ) ) ); return 1; } /***************************************************************************** * Instruction "DA A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_D4(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); if ( ( ( destination & 0x0F ) > 9) || ( cpu8051_ReadD( _PSW_ ) | 0x40)) { if ( ( destination + 6 ) > 0xFF) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); destination += 6; } if ( ( cpu8051_ReadD( _PSW_ ) & 0x80) || ( ( destination & 0xF0 ) > 0x90 ) ) { if ( ( destination + 0x60 ) > 0xFF ) cpu8051_WriteD( _PSW_, ( cpu8051_ReadD( _PSW_ ) | 0x80 ) ); destination += 0x60; } cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "DJNZ direct,reladdr" takes 2 cycle(s) and 3 byte(s). ****************************************************************************/ int cpu8051_OP_D5(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( destaddr, destination ); return 2; } /***************************************************************************** * Instruction "XCHD A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_D6(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char tmpval = ( destination & 0x0F ); destination = ( destination & 0xF0 ) + ( source & 0x0F ); source = ( source & 0xF0 ) + tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), source ); return 1; } /***************************************************************************** * Instruction "XCHD A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_D7(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char tmpval = ( destination & 0x0F ); destination = ( destination & 0xF0 ) + ( source & 0x0F ); source = ( source & 0xF0 ) + tmpval; cpu8051_WriteD( _ACC_, destination ); cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), source ); return 1; } /***************************************************************************** * Instruction "DJNZ R0,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_D8(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R1,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_D9(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R2,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_DA(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R3,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_DB(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R4,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_DC(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R5,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_DD(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R6,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_DE(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 2; } /***************************************************************************** * Instruction "DJNZ R7,reladdr" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_DF(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); (cpu8051.pc)++; unsigned int source = ((char) memory_read8(PGM_MEM_ID, cpu8051.pc - 1)) + cpu8051.pc; destination--; if ( destination != 0 ) cpu8051.pc = source; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 2; } /***************************************************************************** * Instruction "MOVX A,@DPTR" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E0(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 2; } /***************************************************************************** * Instruction "AJMP addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_E1(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "MOVX A,@R0" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E2(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 2; } /***************************************************************************** * Instruction "MOVX A,@R1" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E3(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 2; } /***************************************************************************** * Instruction "CLR A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E4(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination = 0; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,direct" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_E5(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char srcaddr = memory_read8( PGM_MEM_ID, (cpu8051.pc)++ ); unsigned char source = cpu8051_ReadD( srcaddr ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,@R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E6(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,@R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E7(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R0" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E8(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R0_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R1" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_E9(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R1_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R2" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_EA(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R2_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R3" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_EB(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R3_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R4" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_EC(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R4_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R5" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_ED(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R5_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R6" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_EE(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R6_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV A,R7" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_EF(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); unsigned char source = cpu8051_ReadD( BANKPSW + _R7_ ); destination = source; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOVX @DPTR,A" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F0(void) { unsigned char destination = cpu8051_ReadI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_) ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteI( ( cpu8051_ReadD( _DPTRHIGH_ ) << 8 ) + cpu8051_ReadD( _DPTRLOW_ ), destination ); return 2; } /***************************************************************************** * Instruction "ACALL addr11" takes 2 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_F1(void) { unsigned int addr11 = ( ( memory_read8( PGM_MEM_ID, cpu8051.pc - 1 ) << 3 ) & 0xF00 ) + memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char SP = cpu8051_ReadD( _SP_ ); cpu8051_WriteI( ++SP, ( cpu8051.pc & 0x00FF ) ); cpu8051_WriteI( ++SP, ( cpu8051.pc >> 8 ) ); cpu8051_WriteD( _SP_, SP ); cpu8051.pc = ( cpu8051.pc & 0xF800 ) | addr11; return 2; } /***************************************************************************** * Instruction "MOVX @R0,A" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F2(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 2; } /***************************************************************************** * Instruction "MOVX @R1,A" takes 2 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F3(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 2; } /***************************************************************************** * Instruction "CPL A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F4(void) { unsigned char destination = cpu8051_ReadD( _ACC_ ); destination ^= 0xFF; cpu8051_WriteD( _ACC_, destination ); return 1; } /***************************************************************************** * Instruction "MOV direct,A" takes 1 cycle(s) and 2 byte(s). ****************************************************************************/ int cpu8051_OP_F5(void) { unsigned char destaddr = memory_read8( PGM_MEM_ID, cpu8051.pc++ ); unsigned char destination = cpu8051_ReadD( destaddr ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( destaddr, destination ); return 1; } /***************************************************************************** * Instruction "MOV @R0,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F6(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R0_ ) ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R0_ ), destination ); return 1; } /***************************************************************************** * Instruction "MOV @R1,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F7(void) { unsigned char destination = cpu8051_ReadI ( cpu8051_ReadD( BANKPSW + _R1_ ) ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteI( cpu8051_ReadD( BANKPSW + _R1_ ), destination ); return 1; } /***************************************************************************** * Instruction "MOV R0,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F8(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R0_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R0_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R1,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_F9(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R1_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R1_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R2,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_FA(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R2_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R2_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R3,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_FB(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R3_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R3_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R4,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_FC(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R4_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R4_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R5,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_FD(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R5_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R5_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R6,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_FE(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R6_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R6_, destination ); return 1; } /***************************************************************************** * Instruction "MOV R7,A" takes 1 cycle(s) and 1 byte(s). ****************************************************************************/ int cpu8051_OP_FF(void) { unsigned char destination = cpu8051_ReadD( BANKPSW + _R7_ ); unsigned char source = cpu8051_ReadD( _ACC_ ); destination = source; cpu8051_WriteD( BANKPSW + _R7_, destination ); return 1; } emu8051-1.1.1/src/instructions_8051.h0000644000175000017500000003000111662270661013721 00000000000000/* * instructions_8051.h * * Do not modify this file directly, as it was created by opcode2c.pl * Any modifications made directly to this file will be lost. * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef INSTRUCTIONS_8051_H #define INSTRUCTIONS_8051_H 1 #define BANKPSW (cpu8051_ReadD(_PSW_) & 0x18) typedef int (*OPCODE_FP)(void); int cpu8051_OP_00(void); int cpu8051_OP_01(void); int cpu8051_OP_02(void); int cpu8051_OP_03(void); int cpu8051_OP_04(void); int cpu8051_OP_05(void); int cpu8051_OP_06(void); int cpu8051_OP_07(void); int cpu8051_OP_08(void); int cpu8051_OP_09(void); int cpu8051_OP_0A(void); int cpu8051_OP_0B(void); int cpu8051_OP_0C(void); int cpu8051_OP_0D(void); int cpu8051_OP_0E(void); int cpu8051_OP_0F(void); int cpu8051_OP_10(void); int cpu8051_OP_11(void); int cpu8051_OP_12(void); int cpu8051_OP_13(void); int cpu8051_OP_14(void); int cpu8051_OP_15(void); int cpu8051_OP_16(void); int cpu8051_OP_17(void); int cpu8051_OP_18(void); int cpu8051_OP_19(void); int cpu8051_OP_1A(void); int cpu8051_OP_1B(void); int cpu8051_OP_1C(void); int cpu8051_OP_1D(void); int cpu8051_OP_1E(void); int cpu8051_OP_1F(void); int cpu8051_OP_20(void); int cpu8051_OP_21(void); int cpu8051_OP_22(void); int cpu8051_OP_23(void); int cpu8051_OP_24(void); int cpu8051_OP_25(void); int cpu8051_OP_26(void); int cpu8051_OP_27(void); int cpu8051_OP_28(void); int cpu8051_OP_29(void); int cpu8051_OP_2A(void); int cpu8051_OP_2B(void); int cpu8051_OP_2C(void); int cpu8051_OP_2D(void); int cpu8051_OP_2E(void); int cpu8051_OP_2F(void); int cpu8051_OP_30(void); int cpu8051_OP_31(void); int cpu8051_OP_32(void); int cpu8051_OP_33(void); int cpu8051_OP_34(void); int cpu8051_OP_35(void); int cpu8051_OP_36(void); int cpu8051_OP_37(void); int cpu8051_OP_38(void); int cpu8051_OP_39(void); int cpu8051_OP_3A(void); int cpu8051_OP_3B(void); int cpu8051_OP_3C(void); int cpu8051_OP_3D(void); int cpu8051_OP_3E(void); int cpu8051_OP_3F(void); int cpu8051_OP_40(void); int cpu8051_OP_41(void); int cpu8051_OP_42(void); int cpu8051_OP_43(void); int cpu8051_OP_44(void); int cpu8051_OP_45(void); int cpu8051_OP_46(void); int cpu8051_OP_47(void); int cpu8051_OP_48(void); int cpu8051_OP_49(void); int cpu8051_OP_4A(void); int cpu8051_OP_4B(void); int cpu8051_OP_4C(void); int cpu8051_OP_4D(void); int cpu8051_OP_4E(void); int cpu8051_OP_4F(void); int cpu8051_OP_50(void); int cpu8051_OP_51(void); int cpu8051_OP_52(void); int cpu8051_OP_53(void); int cpu8051_OP_54(void); int cpu8051_OP_55(void); int cpu8051_OP_56(void); int cpu8051_OP_57(void); int cpu8051_OP_58(void); int cpu8051_OP_59(void); int cpu8051_OP_5A(void); int cpu8051_OP_5B(void); int cpu8051_OP_5C(void); int cpu8051_OP_5D(void); int cpu8051_OP_5E(void); int cpu8051_OP_5F(void); int cpu8051_OP_60(void); int cpu8051_OP_61(void); int cpu8051_OP_62(void); int cpu8051_OP_63(void); int cpu8051_OP_64(void); int cpu8051_OP_65(void); int cpu8051_OP_66(void); int cpu8051_OP_67(void); int cpu8051_OP_68(void); int cpu8051_OP_69(void); int cpu8051_OP_6A(void); int cpu8051_OP_6B(void); int cpu8051_OP_6C(void); int cpu8051_OP_6D(void); int cpu8051_OP_6E(void); int cpu8051_OP_6F(void); int cpu8051_OP_70(void); int cpu8051_OP_71(void); int cpu8051_OP_72(void); int cpu8051_OP_73(void); int cpu8051_OP_74(void); int cpu8051_OP_75(void); int cpu8051_OP_76(void); int cpu8051_OP_77(void); int cpu8051_OP_78(void); int cpu8051_OP_79(void); int cpu8051_OP_7A(void); int cpu8051_OP_7B(void); int cpu8051_OP_7C(void); int cpu8051_OP_7D(void); int cpu8051_OP_7E(void); int cpu8051_OP_7F(void); int cpu8051_OP_80(void); int cpu8051_OP_81(void); int cpu8051_OP_82(void); int cpu8051_OP_83(void); int cpu8051_OP_84(void); int cpu8051_OP_85(void); int cpu8051_OP_86(void); int cpu8051_OP_87(void); int cpu8051_OP_88(void); int cpu8051_OP_89(void); int cpu8051_OP_8A(void); int cpu8051_OP_8B(void); int cpu8051_OP_8C(void); int cpu8051_OP_8D(void); int cpu8051_OP_8E(void); int cpu8051_OP_8F(void); int cpu8051_OP_90(void); int cpu8051_OP_91(void); int cpu8051_OP_92(void); int cpu8051_OP_93(void); int cpu8051_OP_94(void); int cpu8051_OP_95(void); int cpu8051_OP_96(void); int cpu8051_OP_97(void); int cpu8051_OP_98(void); int cpu8051_OP_99(void); int cpu8051_OP_9A(void); int cpu8051_OP_9B(void); int cpu8051_OP_9C(void); int cpu8051_OP_9D(void); int cpu8051_OP_9E(void); int cpu8051_OP_9F(void); int cpu8051_OP_A0(void); int cpu8051_OP_A1(void); int cpu8051_OP_A2(void); int cpu8051_OP_A3(void); int cpu8051_OP_A4(void); int cpu8051_OP_A5(void); int cpu8051_OP_A6(void); int cpu8051_OP_A7(void); int cpu8051_OP_A8(void); int cpu8051_OP_A9(void); int cpu8051_OP_AA(void); int cpu8051_OP_AB(void); int cpu8051_OP_AC(void); int cpu8051_OP_AD(void); int cpu8051_OP_AE(void); int cpu8051_OP_AF(void); int cpu8051_OP_B0(void); int cpu8051_OP_B1(void); int cpu8051_OP_B2(void); int cpu8051_OP_B3(void); int cpu8051_OP_B4(void); int cpu8051_OP_B5(void); int cpu8051_OP_B6(void); int cpu8051_OP_B7(void); int cpu8051_OP_B8(void); int cpu8051_OP_B9(void); int cpu8051_OP_BA(void); int cpu8051_OP_BB(void); int cpu8051_OP_BC(void); int cpu8051_OP_BD(void); int cpu8051_OP_BE(void); int cpu8051_OP_BF(void); int cpu8051_OP_C0(void); int cpu8051_OP_C1(void); int cpu8051_OP_C2(void); int cpu8051_OP_C3(void); int cpu8051_OP_C4(void); int cpu8051_OP_C5(void); int cpu8051_OP_C6(void); int cpu8051_OP_C7(void); int cpu8051_OP_C8(void); int cpu8051_OP_C9(void); int cpu8051_OP_CA(void); int cpu8051_OP_CB(void); int cpu8051_OP_CC(void); int cpu8051_OP_CD(void); int cpu8051_OP_CE(void); int cpu8051_OP_CF(void); int cpu8051_OP_D0(void); int cpu8051_OP_D1(void); int cpu8051_OP_D2(void); int cpu8051_OP_D3(void); int cpu8051_OP_D4(void); int cpu8051_OP_D5(void); int cpu8051_OP_D6(void); int cpu8051_OP_D7(void); int cpu8051_OP_D8(void); int cpu8051_OP_D9(void); int cpu8051_OP_DA(void); int cpu8051_OP_DB(void); int cpu8051_OP_DC(void); int cpu8051_OP_DD(void); int cpu8051_OP_DE(void); int cpu8051_OP_DF(void); int cpu8051_OP_E0(void); int cpu8051_OP_E1(void); int cpu8051_OP_E2(void); int cpu8051_OP_E3(void); int cpu8051_OP_E4(void); int cpu8051_OP_E5(void); int cpu8051_OP_E6(void); int cpu8051_OP_E7(void); int cpu8051_OP_E8(void); int cpu8051_OP_E9(void); int cpu8051_OP_EA(void); int cpu8051_OP_EB(void); int cpu8051_OP_EC(void); int cpu8051_OP_ED(void); int cpu8051_OP_EE(void); int cpu8051_OP_EF(void); int cpu8051_OP_F0(void); int cpu8051_OP_F1(void); int cpu8051_OP_F2(void); int cpu8051_OP_F3(void); int cpu8051_OP_F4(void); int cpu8051_OP_F5(void); int cpu8051_OP_F6(void); int cpu8051_OP_F7(void); int cpu8051_OP_F8(void); int cpu8051_OP_F9(void); int cpu8051_OP_FA(void); int cpu8051_OP_FB(void); int cpu8051_OP_FC(void); int cpu8051_OP_FD(void); int cpu8051_OP_FE(void); int cpu8051_OP_FF(void); /* Exported variables. */ #ifdef INSTRUCTIONS_8051_M OPCODE_FP opcode_table[256] = { cpu8051_OP_00, cpu8051_OP_01, cpu8051_OP_02, cpu8051_OP_03, cpu8051_OP_04, cpu8051_OP_05, cpu8051_OP_06, cpu8051_OP_07, cpu8051_OP_08, cpu8051_OP_09, cpu8051_OP_0A, cpu8051_OP_0B, cpu8051_OP_0C, cpu8051_OP_0D, cpu8051_OP_0E, cpu8051_OP_0F, cpu8051_OP_10, cpu8051_OP_11, cpu8051_OP_12, cpu8051_OP_13, cpu8051_OP_14, cpu8051_OP_15, cpu8051_OP_16, cpu8051_OP_17, cpu8051_OP_18, cpu8051_OP_19, cpu8051_OP_1A, cpu8051_OP_1B, cpu8051_OP_1C, cpu8051_OP_1D, cpu8051_OP_1E, cpu8051_OP_1F, cpu8051_OP_20, cpu8051_OP_21, cpu8051_OP_22, cpu8051_OP_23, cpu8051_OP_24, cpu8051_OP_25, cpu8051_OP_26, cpu8051_OP_27, cpu8051_OP_28, cpu8051_OP_29, cpu8051_OP_2A, cpu8051_OP_2B, cpu8051_OP_2C, cpu8051_OP_2D, cpu8051_OP_2E, cpu8051_OP_2F, cpu8051_OP_30, cpu8051_OP_31, cpu8051_OP_32, cpu8051_OP_33, cpu8051_OP_34, cpu8051_OP_35, cpu8051_OP_36, cpu8051_OP_37, cpu8051_OP_38, cpu8051_OP_39, cpu8051_OP_3A, cpu8051_OP_3B, cpu8051_OP_3C, cpu8051_OP_3D, cpu8051_OP_3E, cpu8051_OP_3F, cpu8051_OP_40, cpu8051_OP_41, cpu8051_OP_42, cpu8051_OP_43, cpu8051_OP_44, cpu8051_OP_45, cpu8051_OP_46, cpu8051_OP_47, cpu8051_OP_48, cpu8051_OP_49, cpu8051_OP_4A, cpu8051_OP_4B, cpu8051_OP_4C, cpu8051_OP_4D, cpu8051_OP_4E, cpu8051_OP_4F, cpu8051_OP_50, cpu8051_OP_51, cpu8051_OP_52, cpu8051_OP_53, cpu8051_OP_54, cpu8051_OP_55, cpu8051_OP_56, cpu8051_OP_57, cpu8051_OP_58, cpu8051_OP_59, cpu8051_OP_5A, cpu8051_OP_5B, cpu8051_OP_5C, cpu8051_OP_5D, cpu8051_OP_5E, cpu8051_OP_5F, cpu8051_OP_60, cpu8051_OP_61, cpu8051_OP_62, cpu8051_OP_63, cpu8051_OP_64, cpu8051_OP_65, cpu8051_OP_66, cpu8051_OP_67, cpu8051_OP_68, cpu8051_OP_69, cpu8051_OP_6A, cpu8051_OP_6B, cpu8051_OP_6C, cpu8051_OP_6D, cpu8051_OP_6E, cpu8051_OP_6F, cpu8051_OP_70, cpu8051_OP_71, cpu8051_OP_72, cpu8051_OP_73, cpu8051_OP_74, cpu8051_OP_75, cpu8051_OP_76, cpu8051_OP_77, cpu8051_OP_78, cpu8051_OP_79, cpu8051_OP_7A, cpu8051_OP_7B, cpu8051_OP_7C, cpu8051_OP_7D, cpu8051_OP_7E, cpu8051_OP_7F, cpu8051_OP_80, cpu8051_OP_81, cpu8051_OP_82, cpu8051_OP_83, cpu8051_OP_84, cpu8051_OP_85, cpu8051_OP_86, cpu8051_OP_87, cpu8051_OP_88, cpu8051_OP_89, cpu8051_OP_8A, cpu8051_OP_8B, cpu8051_OP_8C, cpu8051_OP_8D, cpu8051_OP_8E, cpu8051_OP_8F, cpu8051_OP_90, cpu8051_OP_91, cpu8051_OP_92, cpu8051_OP_93, cpu8051_OP_94, cpu8051_OP_95, cpu8051_OP_96, cpu8051_OP_97, cpu8051_OP_98, cpu8051_OP_99, cpu8051_OP_9A, cpu8051_OP_9B, cpu8051_OP_9C, cpu8051_OP_9D, cpu8051_OP_9E, cpu8051_OP_9F, cpu8051_OP_A0, cpu8051_OP_A1, cpu8051_OP_A2, cpu8051_OP_A3, cpu8051_OP_A4, cpu8051_OP_A5, cpu8051_OP_A6, cpu8051_OP_A7, cpu8051_OP_A8, cpu8051_OP_A9, cpu8051_OP_AA, cpu8051_OP_AB, cpu8051_OP_AC, cpu8051_OP_AD, cpu8051_OP_AE, cpu8051_OP_AF, cpu8051_OP_B0, cpu8051_OP_B1, cpu8051_OP_B2, cpu8051_OP_B3, cpu8051_OP_B4, cpu8051_OP_B5, cpu8051_OP_B6, cpu8051_OP_B7, cpu8051_OP_B8, cpu8051_OP_B9, cpu8051_OP_BA, cpu8051_OP_BB, cpu8051_OP_BC, cpu8051_OP_BD, cpu8051_OP_BE, cpu8051_OP_BF, cpu8051_OP_C0, cpu8051_OP_C1, cpu8051_OP_C2, cpu8051_OP_C3, cpu8051_OP_C4, cpu8051_OP_C5, cpu8051_OP_C6, cpu8051_OP_C7, cpu8051_OP_C8, cpu8051_OP_C9, cpu8051_OP_CA, cpu8051_OP_CB, cpu8051_OP_CC, cpu8051_OP_CD, cpu8051_OP_CE, cpu8051_OP_CF, cpu8051_OP_D0, cpu8051_OP_D1, cpu8051_OP_D2, cpu8051_OP_D3, cpu8051_OP_D4, cpu8051_OP_D5, cpu8051_OP_D6, cpu8051_OP_D7, cpu8051_OP_D8, cpu8051_OP_D9, cpu8051_OP_DA, cpu8051_OP_DB, cpu8051_OP_DC, cpu8051_OP_DD, cpu8051_OP_DE, cpu8051_OP_DF, cpu8051_OP_E0, cpu8051_OP_E1, cpu8051_OP_E2, cpu8051_OP_E3, cpu8051_OP_E4, cpu8051_OP_E5, cpu8051_OP_E6, cpu8051_OP_E7, cpu8051_OP_E8, cpu8051_OP_E9, cpu8051_OP_EA, cpu8051_OP_EB, cpu8051_OP_EC, cpu8051_OP_ED, cpu8051_OP_EE, cpu8051_OP_EF, cpu8051_OP_F0, cpu8051_OP_F1, cpu8051_OP_F2, cpu8051_OP_F3, cpu8051_OP_F4, cpu8051_OP_F5, cpu8051_OP_F6, cpu8051_OP_F7, cpu8051_OP_F8, cpu8051_OP_F9, cpu8051_OP_FA, cpu8051_OP_FB, cpu8051_OP_FC, cpu8051_OP_FD, cpu8051_OP_FE, cpu8051_OP_FF }; #else OPCODE_FP opcode_table[256]; #endif #endif /* INSTRUCTIONS_8051_H */ emu8051-1.1.1/src/viewmenu.c0000644000175000017500000000446411653065330012343 00000000000000/* * viewmenu.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #if HAVE_CONFIG_H # include "config.h" #endif #include #include "common.h" #include "emugtk.h" /* For AddMenuSeparator() function. */ #include "messagebox.h" #include "viewmenu.h" static void ViewMenuExternalDump(gchar *string) { ShowMessage("External Memory Dump", "Not implemented yet!", GTK_JUSTIFY_CENTER, MESSAGE_DIALOG_NORMAL_FONT); } static void ViewMenuInternalDump(gchar *string) { ShowMessage("Internal Memory Dump", "Not implemented yet!", GTK_JUSTIFY_CENTER, MESSAGE_DIALOG_NORMAL_FONT); } void ViewAddMenu(GtkWidget *menu_bar) { GtkWidget *item; GtkWidget *menu; menu = gtk_menu_new(); /* Create the 'Viewmenu External Memory Dump' item. */ item = gtk_menu_item_new_with_label("External Memory Dump"); gtk_menu_append(GTK_MENU(menu), item); /* Attach the callback functions to the activate signal. */ gtk_signal_connect_object(GTK_OBJECT(item), "activate", GTK_SIGNAL_FUNC(ViewMenuExternalDump), NULL); AddMenuSeparator(menu); /* Create the 'Viewmenu Internal Memory Dump' item. */ item = gtk_menu_item_new_with_label("Internal Memory Dump"); gtk_menu_append(GTK_MENU(menu), item); /* Attach the callback functions to the activate signal. */ gtk_signal_connect_object(GTK_OBJECT(item), "activate", GTK_SIGNAL_FUNC(ViewMenuInternalDump), NULL); /* Adding submenu title. */ item = gtk_menu_item_new_with_label("View"); gtk_menu_item_set_submenu(GTK_MENU_ITEM(item), menu); gtk_menu_bar_append(GTK_MENU_BAR(menu_bar), item); } emu8051-1.1.1/src/viewmenu.h0000644000175000017500000000170711653065330012345 00000000000000/* * viewmenu.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef VIEWMENU_H #define VIEWMENU_H 1 #include void ViewAddMenu(GtkWidget *menu_bar); #endif /* VIEWMENU_H */ emu8051-1.1.1/src/memory.c0000644000175000017500000000705011662266464012021 00000000000000/* * memory.c * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include "common.h" #include "cpu8051.h" #include "hexfile.h" #include "memory.h" #define PGM_MEM_SIZE 65536 #define INT_MEM_SIZE 256 /* IRAM = Direct addresses $00 to $7F * SFR = Direct addresses $80 to $FF */ #define EXT_MEM_SIZE 65536 static u_int8_t pgm_mem[PGM_MEM_SIZE]; static u_int8_t int_mem[INT_MEM_SIZE]; static u_int8_t ext_mem[EXT_MEM_SIZE]; void memory_write8(int memory_id, unsigned long address, u_int8_t value) { switch (memory_id) { case PGM_MEM_ID: if (address >= PGM_MEM_SIZE) { printf("Address (%lu) is greater than PGM_MEM_SIZE\n", address); return; } else pgm_mem[address] = value; break; case INT_MEM_ID: if (address >= INT_MEM_SIZE) { printf("Address (%lu) is greater than INT_MEM_SIZE\n", address); return; } else int_mem[address] = value; break; case EXT_MEM_ID: if (address >= EXT_MEM_SIZE) { printf("Address (%lu) is greater than EXT_MEM_SIZE\n", address); return; } else ext_mem[address] = value; break; default: /* Error. */ break; } } u_int8_t memory_read8(int memory_id, unsigned long address) { switch (memory_id) { case PGM_MEM_ID: if (address < PGM_MEM_SIZE) return pgm_mem[address]; else { printf("Address (%lu) is greater than PGM_MEM_SIZE\n", address); return 0; } break; case INT_MEM_ID: if (address < INT_MEM_SIZE) return int_mem[address]; else { printf("Address (%lu) is greater than INT_MEM_SIZE\n", address); return 0; } break; case EXT_MEM_ID: if (address < EXT_MEM_SIZE) return ext_mem[address]; else { printf("Address (%lu) is greater than EXT_MEM_SIZE\n", address); return 0; } break; default: /* Error. */ return 0; break; } } /* Dump memory */ void DumpMem(char *Address, char *Asize, int memory_id) { unsigned int MemAddress; int size; int Offset, Column; if (strlen(Address) != 0) { if (STREQ(Address, "PC")) MemAddress = cpu8051.pc; else MemAddress = Ascii2Hex(Address, strlen(Address)); } else { MemAddress = 0; } if (strlen(Asize) != 0) { size = Ascii2Hex(Asize, strlen(Asize)); } else { size = 256; /* Default size if not specified. */ } for (Offset = 0; Offset < size; Offset += 16) { unsigned char data[16]; printf("%.4X ", MemAddress + Offset); for (Column = 0; Column < 16; Column++) { data[Column] = memory_read8(memory_id, MemAddress + Offset + Column); printf(" %.2X", (int) data[Column]); } printf(" "); /* Display any ASCII characters */ for (Column = 0; Column < 16; Column++) { if ((int) data[Column] >= 32 && (int) data[Column] <= 126) { printf("%c", data[Column]); } else printf("."); } printf("\n"); } } emu8051-1.1.1/src/memory.h0000644000175000017500000000222011662266173012015 00000000000000/* * memory.h * * Copyright (C) 1999 Jonathan St-AndrĂ© * Copyright (C) 1999 Hugo Villeneuve * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef MEMORY_H #define MEMORY_H 1 #include enum { PGM_MEM_ID, INT_MEM_ID, EXT_MEM_ID }; void memory_write8(int memory_id, unsigned long address, u_int8_t value); u_int8_t memory_read8(int memory_id, unsigned long address); void DumpMem(char *Address, char *Asize, int memory_id); #endif /* MEMORY_H */ emu8051-1.1.1/NEWS0000644000175000017500000000204111671304327010237 000000000000002011-12-11: emu8051-1.1.1 has been released (from emu8051-1.1.1-rc2). 2011-11-20: emu8051-1.1.1-rc2 has been released. Added optional size parameter when dumping memory. Created two separate executables, emu8051-cli (default) and optional emu8051-gtk if Gtk+ is detected. See the file 'ChangeLog' for further details. 2011-10-29: emu8051-1.1.1-rc1 has been released. Fixed SJMP error and improved columns and rows sizing 2010-03-19: emu8051-1.1.0 has been released. Reintroduced the console mode if no GTK+ librairies are detected. 2009-02-09: emu8051-1.0.2 has been released. Updated Free Software Foundation address. 2008-11-05: emu8051-1.0.1 has been released. See the file 'ChangeLog' for further details. 2008-04-28: emu8051-1.0.0 has been released. Removed gtk+-1.0 support, now requires gtk+-2 2005-05-07: emu8051-0.1.0 has been released. Fixed bug with CJNE instruction and autoconf files cleanup. See the file 'ChangeLog' for further details. emu8051-1.1.1/TODO0000644000175000017500000000116411653065330010233 00000000000000 THINGS TO DO ------------ -Compile only one program for both graphical and console modes, or support only the graphical mode. - Some fine tuning around the classes - Make MemWin, RegWin be able to make a standalone window if parentwin=0. - Connect File->Open, View->... and Help->License menus. - Make the RegWin and MemWin react when mouse clicked. (modify register or memory) - Enlever les fonctions ReadI, WriteI, dumpI etc... et plutot utiliser les fonctions ReadInt, WriteInt, DumpInt, DumpExt, etc. - Lors d'un DumpInt, verifier a ne pas afficher plus haut que la taille reelle de la memoire interne. (Detail) emu8051-1.1.1/aclocal.m40000644000175000017500000012265111671304513011407 00000000000000# generated automatically by aclocal 1.11.1 -*- Autoconf -*- # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, # 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. # This file is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. m4_ifndef([AC_AUTOCONF_VERSION], [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl m4_if(m4_defn([AC_AUTOCONF_VERSION]), [2.68],, [m4_warning([this file was generated for autoconf 2.68. You have another version of autoconf. It may work, but is not guaranteed to. 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AC_INIT(emu8051, 1.1.1) AC_CONFIG_AUX_DIR(config) AC_CONFIG_SRCDIR(src/cpu8051.c) AM_CONFIG_HEADER(config.h:config-h.in) dnl Checking if the NEWS file has been updated to reflect the current version. AM_INIT_AUTOMAKE(check-news) AM_SILENT_RULES([yes]) dnl Testing the C compiler. AM_PROG_CC_C_O AC_LANG_C dnl Checking for typedefs, structures, and compiler characteristics. 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CR EQU 0Dh ; Code ASCII pour un retour de chariot. LF EQU 0Ah ; Code ASCII pour un changement de ligne ;******************************************************************************* ;* Définition des variables * ;******************************************************************************* BSEG ORG 20h C_FLAG: DBIT 1 Z_FLAG: DBIT 2 N_FLAG: DBIT 3 ; Utilisé par la sous-routine MULT8_16 SIGNE: DBIT 4 ; Utilisé pour l'interpolation. DSEG ORG 30h PERIODE2: DS 1 ; Période pour une rotation du vilebrequin, sur 24 bits. PERIODE1: DS 1 PERIODE0: DS 1 POSITION_VILB: DS 1 ; Renseignement sur la position actuelle du vilebrequin (zones 0,1 ou 2). VITESSE_RPM: DS 2 ; Vitesse de rotation du moteur en RPM. INDEX_RPM: DS 1 ; Index de 8 bits pour l'adressage des colonnes de la table d'allumage. INDEX_MAP: DS 1 ; Index de 8 bits pour l'adressage des lignes de la table d'allumage. ANGLE: DS 1 ; Angle d'allumage calculé à partir de la table. BAT: DS 2 ; Voltage de la batterie. MAT: DS 2 ; Manifold Air Temperature. CLT: DS 2 ; Coolant Temperature. TPS: DS 2 ; Throttle Position Sensor. MAP: DS 2 ; Manifold Absolute Pressure. EGO: DS 2 ; Exhaust Gas-Oxygen Sensor. CAN6: DS 2 ; Canal #6 du convertisseur AN. CAN7: DS 2 ; Canal #7 du convertisseur AN. GAMMA: DS 2 ; Rapport Air/Carburant. LSB_CAN: DS 1 ; Octet de poids faible de la conversion Analogique-Numérique. MSB_CAN: DS 1 ; Octet de poids fort de la conversion Analogique-Numérique. NOMBRE4: DS 1 ; Stockage des codes ASCII pour les conversions. NOMBRE3: DS 1 NOMBRE2: DS 1 NOMBRE1: DS 1 NOMBRE0: DS 1 C3: DS 1 ; Accumulateur C de 32 bits pour les calculs mathématiques. C2: DS 1 C1: DS 1 C0: DS 1 D3: DS 1 ; Accumulateur D de 32 bits pour les calculs mathématiques. D2: DS 1 D1: DS 1 D0: DS 1 TMP6: DS 1 ; Variables temporaires utilisées pour les calculs mathématiques. TMP5: DS 1 ; FAIRE LE MÉNAGE VARIABLES NON UTILISEES!!! TMP4: DS 1 TMP3: DS 1 TMP2: DS 1 TMP1: DS 1 TMP0: DS 1 VAR0: DS 1 VAR1: DS 1 VAR2: DS 1 ;******************************************************************************* ;* Définition des régistres spécifiques au AT89S8252 * ;******************************************************************************* SPCR DATA 0D5h ; SPCR - SPI Control Register SPSR DATA 0AAh ; SPSR - SPI Status Register SPIF EQU 10000000b ; Masque pour le drapeau SPI. WCOL EQU 01000000b ; Masque pour le drapeau Write Collision. SPDR DATA 086h ; SPDR - SPI Data Register ;******************************************************************************* ;* Vecteurs d'interruptions * ;******************************************************************************* CSEG ORG 0000h ; Vecteur d'interruption du RESET. JMP DEBUT ORG 0003h ; Vecteur pour l'interruption EXTERNE 0. JMP VILEBREQUIN ORG 000Bh ; Vecteur pour l'interruption du TIMER 0. JMP DEBUT ORG 0013h ; Vecteur pour l'interruption EXTERNE 1. JMP DEBUT ORG 001Bh ; Vecteur pour l'interruption du TIMER 1. JMP DEBUT ORG 0023h ; Vecteur pour l'interruption du Port série. JMP DEBUT ORG 002Bh ; Vecteur pour l'interruption du TIMER 2. JMP DEBUT ;******************************************************************************* ;* Début du programme principal * ;******************************************************************************* ORG 0033h DEBUT: MOV SP,#TOS ; Initialisation de la pile. CALL INITIALISATION ; il ne faut pas modifier la valeur de P1.0!!! ICI: NOP NOP NOP NOP JMP ICI ;******************************************************************************* ;* Délai * ;******************************************************************************* DELAI: MOV TMP0,#016h ; Délai de 1/2 seconde. B3: MOV A,#0 B2: MOV B,#0 B1: DJNZ B,B1 DJNZ ACC,B2 DJNZ TMP0,B3 RET ;******************************************************************************* ;* INTERRUPTION * ;******************************************************************************* VILEBREQUIN: RETI ;******************************************************************************* ;* Initialisation * ;******************************************************************************* INITIALISATION: MOV SPCR,#01000100b ; Interruption SPI désactivée; ; Activation du port SPI; ; Ordre des transferts : MSB en premier; ; Opération en mode escalve (SLAVE); ; Polarité de l'horloge : niveau bas si inactif. ; Phase de l'horloge : transfert sur front montant. MOV TH0,#2 MOV TL0,#55h SETB TCON.4 ; Timer 0 ON. SETB TCON.6 ; Timer 1 ON. MOV TMOD,#00010001B ; Initialisation des timers 0 et 1 en timers de ; 16 bits, incrémentés par l'horloge interne ; Chaque timer est incrémenté tant que le bit correspondant de ; TCON est à 1 (TCON.4 et TCON.6). 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:1006C300313131313111111C3438383C3C3C3C3C24 :1006D3003C3C3C3C3C11111C2A2D2D313131313134 :0506E30031313131311D :00000001FF emu8051-1.1.1/test-files/.svn/prop-base/0000755000175000017500000000000011653065330014454 500000000000000emu8051-1.1.1/test-files/.svn/all-wcprops0000444000175000017500000000067311653065330014676 00000000000000K 25 svn:wc:ra_dav:version-url V 32 /svn/!svn/ver/5/trunk/test-files END timer.asm K 25 svn:wc:ra_dav:version-url V 42 /svn/!svn/ver/5/trunk/test-files/timer.asm END test.hex K 25 svn:wc:ra_dav:version-url V 41 /svn/!svn/ver/5/trunk/test-files/test.hex END timer.hex K 25 svn:wc:ra_dav:version-url V 42 /svn/!svn/ver/5/trunk/test-files/timer.hex END siae1.hex K 25 svn:wc:ra_dav:version-url V 42 /svn/!svn/ver/5/trunk/test-files/siae1.hex END emu8051-1.1.1/test-files/timer.asm0000644000175000017500000001605411653065330013450 00000000000000;******************************************************************************* ;* Système d'Injection et d'Allumage Électronique * ;* Version : 01 * ;* Auteur : Hugo Villeneuve * ;* * ;* 10 mars 1999 * ;******************************************************************************* $MOD52 ; Micro-contrôleur Atmel AT89S8252 ;******************************************************************************* ;* Définition des constantes * ;******************************************************************************* TOS EQU 60h ; Adresse du dessus de la pile. CR EQU 0Dh ; Code ASCII pour un retour de chariot. LF EQU 0Ah ; Code ASCII pour un changement de ligne ;******************************************************************************* ;* Définition des variables * ;******************************************************************************* BSEG ORG 20h C_FLAG: DBIT 1 Z_FLAG: DBIT 2 N_FLAG: DBIT 3 ; Utilisé par la sous-routine MULT8_16 SIGNE: DBIT 4 ; Utilisé pour l'interpolation. DSEG ORG 30h PERIODE2: DS 1 ; Période pour une rotation du vilebrequin, sur 24 bits. PERIODE1: DS 1 PERIODE0: DS 1 POSITION_VILB: DS 1 ; Renseignement sur la position actuelle du vilebrequin (zones 0,1 ou 2). VITESSE_RPM: DS 2 ; Vitesse de rotation du moteur en RPM. INDEX_RPM: DS 1 ; Index de 8 bits pour l'adressage des colonnes de la table d'allumage. INDEX_MAP: DS 1 ; Index de 8 bits pour l'adressage des lignes de la table d'allumage. ANGLE: DS 1 ; Angle d'allumage calculé à partir de la table. BAT: DS 2 ; Voltage de la batterie. MAT: DS 2 ; Manifold Air Temperature. CLT: DS 2 ; Coolant Temperature. TPS: DS 2 ; Throttle Position Sensor. MAP: DS 2 ; Manifold Absolute Pressure. EGO: DS 2 ; Exhaust Gas-Oxygen Sensor. CAN6: DS 2 ; Canal #6 du convertisseur AN. CAN7: DS 2 ; Canal #7 du convertisseur AN. GAMMA: DS 2 ; Rapport Air/Carburant. LSB_CAN: DS 1 ; Octet de poids faible de la conversion Analogique-Numérique. MSB_CAN: DS 1 ; Octet de poids fort de la conversion Analogique-Numérique. NOMBRE4: DS 1 ; Stockage des codes ASCII pour les conversions. NOMBRE3: DS 1 NOMBRE2: DS 1 NOMBRE1: DS 1 NOMBRE0: DS 1 C3: DS 1 ; Accumulateur C de 32 bits pour les calculs mathématiques. C2: DS 1 C1: DS 1 C0: DS 1 D3: DS 1 ; Accumulateur D de 32 bits pour les calculs mathématiques. D2: DS 1 D1: DS 1 D0: DS 1 TMP6: DS 1 ; Variables temporaires utilisées pour les calculs mathématiques. TMP5: DS 1 ; FAIRE LE MÉNAGE VARIABLES NON UTILISEES!!! TMP4: DS 1 TMP3: DS 1 TMP2: DS 1 TMP1: DS 1 TMP0: DS 1 VAR0: DS 1 VAR1: DS 1 VAR2: DS 1 ;******************************************************************************* ;* Définition des régistres spécifiques au AT89S8252 * ;******************************************************************************* SPCR DATA 0D5h ; SPCR - SPI Control Register SPSR DATA 0AAh ; SPSR - SPI Status Register SPIF EQU 10000000b ; Masque pour le drapeau SPI. WCOL EQU 01000000b ; Masque pour le drapeau Write Collision. SPDR DATA 086h ; SPDR - SPI Data Register ;******************************************************************************* ;* Vecteurs d'interruptions * ;******************************************************************************* CSEG ORG 0000h ; Vecteur d'interruption du RESET. JMP DEBUT ORG 0003h ; Vecteur pour l'interruption EXTERNE 0. JMP VILEBREQUIN ORG 000Bh ; Vecteur pour l'interruption du TIMER 0. JMP DEBUT ORG 0013h ; Vecteur pour l'interruption EXTERNE 1. JMP DEBUT ORG 001Bh ; Vecteur pour l'interruption du TIMER 1. JMP DEBUT ORG 0023h ; Vecteur pour l'interruption du Port série. JMP DEBUT ORG 002Bh ; Vecteur pour l'interruption du TIMER 2. JMP DEBUT ;******************************************************************************* ;* Début du programme principal * ;******************************************************************************* ORG 0033h DEBUT: MOV SP,#TOS ; Initialisation de la pile. CALL INITIALISATION ; il ne faut pas modifier la valeur de P1.0!!! ICI: NOP NOP NOP NOP JMP ICI ;******************************************************************************* ;* Délai * ;******************************************************************************* DELAI: MOV TMP0,#016h ; Délai de 1/2 seconde. B3: MOV A,#0 B2: MOV B,#0 B1: DJNZ B,B1 DJNZ ACC,B2 DJNZ TMP0,B3 RET ;******************************************************************************* ;* INTERRUPTION * ;******************************************************************************* VILEBREQUIN: RETI ;******************************************************************************* ;* Initialisation * ;******************************************************************************* INITIALISATION: MOV SPCR,#01000100b ; Interruption SPI désactivée; ; Activation du port SPI; ; Ordre des transferts : MSB en premier; ; Opération en mode escalve (SLAVE); ; Polarité de l'horloge : niveau bas si inactif. ; Phase de l'horloge : transfert sur front montant. MOV TH0,#2 MOV TL0,#55h SETB TCON.4 ; Timer 0 ON. SETB TCON.6 ; Timer 1 ON. MOV TMOD,#00010001B ; Initialisation des timers 0 et 1 en timers de ; 16 bits, incrémentés par l'horloge interne ; Chaque timer est incrémenté tant que le bit correspondant de ; TCON est à 1 (TCON.4 et TCON.6). RET END emu8051-1.1.1/test-files/timer.hex0000644000175000017500000000040211653065330013442 00000000000000:0600000002003302005172 :03000B00020033BD :03001300020033B5 :03001B00020033AD :03002300020033A5 :03002B000200339D :100033007581601200520000000080FA756016742A :100043000075F000D5F0FDD5E0F7D560F2223275EA :10005300D544758C02758A55D28CD28E758911223E :00000001FF emu8051-1.1.1/test-files/test.hex0000644000175000017500000000077011653065330013311 00000000000000:03000000020033C8 :1000330075818075D54475A000C290E4F500E50094 :1000430012007DF586D29005A07400D5E0FDC29024 :10005300E5AA53E08060F9E5861200690500C3E56F :1000630000945040D92222752005740075F000D504 :10007300F0FDD5E0F7D520F20022248BF582740041 :100083003400F5837400932252504D3A31303234A8 :1000930035204D41503A313033204D41543A3131BE :1000A30030204241543A31322E3420202020202067 :1000B3000D0A0A45474F3A31342E36202054505307 :1000C3003A31303020414E473A33302020434C54AC :0B00D3003A313038202020202020206F :00000001FF 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:1006C300313131313111111C3438383C3C3C3C3C24 :1006D3003C3C3C3C3C11111C2A2D2D313131313134 :0506E30031313131311D :00000001FF emu8051-1.1.1/autogen.sh0000755000175000017500000000302211653065330011537 00000000000000#!/bin/sh # autogen.sh -- Use this script to create generated files from the SVN distribution # Taken from glib CVS PROJECT=Emu8051 TEST_TYPE=-f TEST_FILE=src/cpu8051.c ACLOCAL_FLAGS="${ACLOCAL_FLAGS} -I config" srcdir=`dirname $0` test -z "$srcdir" && srcdir=. ORIGDIR=`pwd` cd ${srcdir} DIE=0 (autoconf --version) < /dev/null > /dev/null 2>&1 || { echo echo "You must have autoconf installed to compile $PROJECT." echo "Download the appropriate package for your distribution," echo "or get the source tarball at ftp://ftp.gnu.org/pub/gnu/" DIE=1 } (automake --version) < /dev/null > /dev/null 2>&1 || { echo echo "You must have automake installed to compile $PROJECT." echo "Get ftp://sourceware.cygnus.com/pub/automake/automake-1.4.tar.gz" echo "(or a newer version if it is available)" DIE=1 } (libtoolize --version) < /dev/null > /dev/null 2>&1 || { echo echo "You must have libtool installed to compile $PROJECT." echo "Visit http://www.gnu.org/software/libtool/ for more information." DIE=1 } if test "${DIE}" -eq 1; then exit 1 fi test ${TEST_TYPE} ${TEST_FILE} || { echo "You must run this script in the top-level $PROJECT directory" exit 1 } case ${CC} in *xlc | *xlc\ * | *lcc | *lcc\ *) am_opt=--include-deps;; esac aclocal ${ACLOCAL_FLAGS} #libtoolize --force --copy # Optionally feature autoheader (autoheader --version) < /dev/null > /dev/null 2>&1 && autoheader automake --add-missing --copy ${am_opt} autoconf cd ${ORIGDIR} rm -rf autom4te.cache emu8051-1.1.1/config/0000755000175000017500000000000011671304554011072 500000000000000emu8051-1.1.1/config/compile0000755000175000017500000000727111662270640012375 00000000000000#! /bin/sh # Wrapper for compilers which do not understand `-c -o'. scriptversion=2009-10-06.20; # UTC # Copyright (C) 1999, 2000, 2003, 2004, 2005, 2009 Free Software # Foundation, Inc. # Written by Tom Tromey . # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # This file is maintained in Automake, please report # bugs to or send patches to # . case $1 in '') echo "$0: No command. Try \`$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: compile [--help] [--version] PROGRAM [ARGS] Wrapper for compilers which do not understand `-c -o'. Remove `-o dest.o' from ARGS, run PROGRAM with the remaining arguments, and rename the output as expected. If you are trying to build a whole package this is not the right script to run: please start by reading the file `INSTALL'. Report bugs to . EOF exit $? ;; -v | --v*) echo "compile $scriptversion" exit $? ;; esac ofile= cfile= eat= for arg do if test -n "$eat"; then eat= else case $1 in -o) # configure might choose to run compile as `compile cc -o foo foo.c'. # So we strip `-o arg' only if arg is an object. eat=1 case $2 in *.o | *.obj) ofile=$2 ;; *) set x "$@" -o "$2" shift ;; esac ;; *.c) cfile=$1 set x "$@" "$1" shift ;; *) set x "$@" "$1" shift ;; esac fi shift done if test -z "$ofile" || test -z "$cfile"; then # If no `-o' option was seen then we might have been invoked from a # pattern rule where we don't need one. That is ok -- this is a # normal compilation that the losing compiler can handle. If no # `.c' file was seen then we are probably linking. That is also # ok. exec "$@" fi # Name of file we expect compiler to create. cofile=`echo "$cfile" | sed 's|^.*[\\/]||; s|^[a-zA-Z]:||; s/\.c$/.o/'` # Create the lock directory. # Note: use `[/\\:.-]' here to ensure that we don't use the same name # that we are using for the .o file. Also, base the name on the expected # object file name, since that is what matters with a parallel build. lockdir=`echo "$cofile" | sed -e 's|[/\\:.-]|_|g'`.d while true; do if mkdir "$lockdir" >/dev/null 2>&1; then break fi sleep 1 done # FIXME: race condition here if user kills between mkdir and trap. trap "rmdir '$lockdir'; exit 1" 1 2 15 # Run the compile. "$@" ret=$? if test -f "$cofile"; then test "$cofile" = "$ofile" || mv "$cofile" "$ofile" elif test -f "${cofile}bj"; then test "${cofile}bj" = "$ofile" || mv "${cofile}bj" "$ofile" fi rmdir "$lockdir" exit $ret # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: emu8051-1.1.1/config/depcomp0000755000175000017500000004426711662270640012402 00000000000000#! /bin/sh # depcomp - compile a program generating dependencies as side-effects scriptversion=2009-04-28.21; # UTC # Copyright (C) 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2009 Free # Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Alexandre Oliva . case $1 in '') echo "$0: No command. Try \`$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: depcomp [--help] [--version] PROGRAM [ARGS] Run PROGRAMS ARGS to compile a file, generating dependencies as side-effects. Environment variables: depmode Dependency tracking mode. source Source file read by `PROGRAMS ARGS'. object Object file output by `PROGRAMS ARGS'. DEPDIR directory where to store dependencies. depfile Dependency file to output. tmpdepfile Temporary file to use when outputing dependencies. libtool Whether libtool is used (yes/no). Report bugs to . EOF exit $? ;; -v | --v*) echo "depcomp $scriptversion" exit $? ;; esac if test -z "$depmode" || test -z "$source" || test -z "$object"; then echo "depcomp: Variables source, object and depmode must be set" 1>&2 exit 1 fi # Dependencies for sub/bar.o or sub/bar.obj go into sub/.deps/bar.Po. depfile=${depfile-`echo "$object" | sed 's|[^\\/]*$|'${DEPDIR-.deps}'/&|;s|\.\([^.]*\)$|.P\1|;s|Pobj$|Po|'`} tmpdepfile=${tmpdepfile-`echo "$depfile" | sed 's/\.\([^.]*\)$/.T\1/'`} rm -f "$tmpdepfile" # Some modes work just like other modes, but use different flags. We # parameterize here, but still list the modes in the big case below, # to make depend.m4 easier to write. Note that we *cannot* use a case # here, because this file can only contain one case statement. if test "$depmode" = hp; then # HP compiler uses -M and no extra arg. gccflag=-M depmode=gcc fi if test "$depmode" = dashXmstdout; then # This is just like dashmstdout with a different argument. dashmflag=-xM depmode=dashmstdout fi cygpath_u="cygpath -u -f -" if test "$depmode" = msvcmsys; then # This is just like msvisualcpp but w/o cygpath translation. # Just convert the backslash-escaped backslashes to single forward # slashes to satisfy depend.m4 cygpath_u="sed s,\\\\\\\\,/,g" depmode=msvisualcpp fi case "$depmode" in gcc3) ## gcc 3 implements dependency tracking that does exactly what ## we want. Yay! Note: for some reason libtool 1.4 doesn't like ## it if -MD -MP comes after the -MF stuff. Hmm. ## Unfortunately, FreeBSD c89 acceptance of flags depends upon ## the command line argument order; so add the flags where they ## appear in depend2.am. Note that the slowdown incurred here ## affects only configure: in makefiles, %FASTDEP% shortcuts this. for arg do case $arg in -c) set fnord "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" "$arg" ;; *) set fnord "$@" "$arg" ;; esac shift # fnord shift # $arg done "$@" stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile" exit $stat fi mv "$tmpdepfile" "$depfile" ;; gcc) ## There are various ways to get dependency output from gcc. Here's ## why we pick this rather obscure method: ## - Don't want to use -MD because we'd like the dependencies to end ## up in a subdir. Having to rename by hand is ugly. ## (We might end up doing this anyway to support other compilers.) ## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like ## -MM, not -M (despite what the docs say). ## - Using -M directly means running the compiler twice (even worse ## than renaming). if test -z "$gccflag"; then gccflag=-MD, fi "$@" -Wp,"$gccflag$tmpdepfile" stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" echo "$object : \\" > "$depfile" alpha=ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz ## The second -e expression handles DOS-style file names with drive letters. sed -e 's/^[^:]*: / /' \ -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile" ## This next piece of magic avoids the `deleted header file' problem. ## The problem is that when a header file which appears in a .P file ## is deleted, the dependency causes make to die (because there is ## typically no way to rebuild the header). We avoid this by adding ## dummy dependencies for each header file. Too bad gcc doesn't do ## this for us directly. tr ' ' ' ' < "$tmpdepfile" | ## Some versions of gcc put a space before the `:'. On the theory ## that the space means something, we add a space to the output as ## well. ## Some versions of the HPUX 10.20 sed can't process this invocation ## correctly. Breaking it into two sed invocations is a workaround. sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; hp) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; sgi) if test "$libtool" = yes; then "$@" "-Wp,-MDupdate,$tmpdepfile" else "$@" -MDupdate "$tmpdepfile" fi stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" if test -f "$tmpdepfile"; then # yes, the sourcefile depend on other files echo "$object : \\" > "$depfile" # Clip off the initial element (the dependent). Don't try to be # clever and replace this with sed code, as IRIX sed won't handle # lines with more than a fixed number of characters (4096 in # IRIX 6.2 sed, 8192 in IRIX 6.5). We also remove comment lines; # the IRIX cc adds comments like `#:fec' to the end of the # dependency line. tr ' ' ' ' < "$tmpdepfile" \ | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' | \ tr ' ' ' ' >> "$depfile" echo >> "$depfile" # The second pass generates a dummy entry for each header file. tr ' ' ' ' < "$tmpdepfile" \ | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \ >> "$depfile" else # The sourcefile does not contain any dependencies, so just # store a dummy comment line, to avoid errors with the Makefile # "include basename.Plo" scheme. echo "#dummy" > "$depfile" fi rm -f "$tmpdepfile" ;; aix) # The C for AIX Compiler uses -M and outputs the dependencies # in a .u file. In older versions, this file always lives in the # current directory. Also, the AIX compiler puts `$object:' at the # start of each line; $object doesn't have directory information. # Version 6 uses the directory in both cases. dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` test "x$dir" = "x$object" && dir= base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` if test "$libtool" = yes; then tmpdepfile1=$dir$base.u tmpdepfile2=$base.u tmpdepfile3=$dir.libs/$base.u "$@" -Wc,-M else tmpdepfile1=$dir$base.u tmpdepfile2=$dir$base.u tmpdepfile3=$dir$base.u "$@" -M fi stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" exit $stat fi for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" do test -f "$tmpdepfile" && break done if test -f "$tmpdepfile"; then # Each line is of the form `foo.o: dependent.h'. # Do two passes, one to just change these to # `$object: dependent.h' and one to simply `dependent.h:'. sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile" # That's a tab and a space in the []. sed -e 's,^.*\.[a-z]*:[ ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile" else # The sourcefile does not contain any dependencies, so just # store a dummy comment line, to avoid errors with the Makefile # "include basename.Plo" scheme. echo "#dummy" > "$depfile" fi rm -f "$tmpdepfile" ;; icc) # Intel's C compiler understands `-MD -MF file'. However on # icc -MD -MF foo.d -c -o sub/foo.o sub/foo.c # ICC 7.0 will fill foo.d with something like # foo.o: sub/foo.c # foo.o: sub/foo.h # which is wrong. We want: # sub/foo.o: sub/foo.c # sub/foo.o: sub/foo.h # sub/foo.c: # sub/foo.h: # ICC 7.1 will output # foo.o: sub/foo.c sub/foo.h # and will wrap long lines using \ : # foo.o: sub/foo.c ... \ # sub/foo.h ... \ # ... "$@" -MD -MF "$tmpdepfile" stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" # Each line is of the form `foo.o: dependent.h', # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'. # Do two passes, one to just change these to # `$object: dependent.h' and one to simply `dependent.h:'. sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile" # Some versions of the HPUX 10.20 sed can't process this invocation # correctly. Breaking it into two sed invocations is a workaround. sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; hp2) # The "hp" stanza above does not work with aCC (C++) and HP's ia64 # compilers, which have integrated preprocessors. The correct option # to use with these is +Maked; it writes dependencies to a file named # 'foo.d', which lands next to the object file, wherever that # happens to be. # Much of this is similar to the tru64 case; see comments there. dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` test "x$dir" = "x$object" && dir= base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` if test "$libtool" = yes; then tmpdepfile1=$dir$base.d tmpdepfile2=$dir.libs/$base.d "$@" -Wc,+Maked else tmpdepfile1=$dir$base.d tmpdepfile2=$dir$base.d "$@" +Maked fi stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile1" "$tmpdepfile2" exit $stat fi for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" do test -f "$tmpdepfile" && break done if test -f "$tmpdepfile"; then sed -e "s,^.*\.[a-z]*:,$object:," "$tmpdepfile" > "$depfile" # Add `dependent.h:' lines. sed -ne '2,${ s/^ *// s/ \\*$// s/$/:/ p }' "$tmpdepfile" >> "$depfile" else echo "#dummy" > "$depfile" fi rm -f "$tmpdepfile" "$tmpdepfile2" ;; tru64) # The Tru64 compiler uses -MD to generate dependencies as a side # effect. `cc -MD -o foo.o ...' puts the dependencies into `foo.o.d'. # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put # dependencies in `foo.d' instead, so we check for that too. # Subdirectories are respected. dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` test "x$dir" = "x$object" && dir= base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` if test "$libtool" = yes; then # With Tru64 cc, shared objects can also be used to make a # static library. This mechanism is used in libtool 1.4 series to # handle both shared and static libraries in a single compilation. # With libtool 1.4, dependencies were output in $dir.libs/$base.lo.d. # # With libtool 1.5 this exception was removed, and libtool now # generates 2 separate objects for the 2 libraries. These two # compilations output dependencies in $dir.libs/$base.o.d and # in $dir$base.o.d. We have to check for both files, because # one of the two compilations can be disabled. We should prefer # $dir$base.o.d over $dir.libs/$base.o.d because the latter is # automatically cleaned when .libs/ is deleted, while ignoring # the former would cause a distcleancheck panic. tmpdepfile1=$dir.libs/$base.lo.d # libtool 1.4 tmpdepfile2=$dir$base.o.d # libtool 1.5 tmpdepfile3=$dir.libs/$base.o.d # libtool 1.5 tmpdepfile4=$dir.libs/$base.d # Compaq CCC V6.2-504 "$@" -Wc,-MD else tmpdepfile1=$dir$base.o.d tmpdepfile2=$dir$base.d tmpdepfile3=$dir$base.d tmpdepfile4=$dir$base.d "$@" -MD fi stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" "$tmpdepfile4" exit $stat fi for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" "$tmpdepfile4" do test -f "$tmpdepfile" && break done if test -f "$tmpdepfile"; then sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile" # That's a tab and a space in the []. sed -e 's,^.*\.[a-z]*:[ ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile" else echo "#dummy" > "$depfile" fi rm -f "$tmpdepfile" ;; #nosideeffect) # This comment above is used by automake to tell side-effect # dependency tracking mechanisms from slower ones. dashmstdout) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout, regardless of -o. "$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # Remove `-o $object'. IFS=" " for arg do case $arg in -o) shift ;; $object) shift ;; *) set fnord "$@" "$arg" shift # fnord shift # $arg ;; esac done test -z "$dashmflag" && dashmflag=-M # Require at least two characters before searching for `:' # in the target name. This is to cope with DOS-style filenames: # a dependency such as `c:/foo/bar' could be seen as target `c' otherwise. "$@" $dashmflag | sed 's:^[ ]*[^: ][^:][^:]*\:[ ]*:'"$object"'\: :' > "$tmpdepfile" rm -f "$depfile" cat < "$tmpdepfile" > "$depfile" tr ' ' ' ' < "$tmpdepfile" | \ ## Some versions of the HPUX 10.20 sed can't process this invocation ## correctly. Breaking it into two sed invocations is a workaround. sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; dashXmstdout) # This case only exists to satisfy depend.m4. It is never actually # run, as this mode is specially recognized in the preamble. exit 1 ;; makedepend) "$@" || exit $? # Remove any Libtool call if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # X makedepend shift cleared=no eat=no for arg do case $cleared in no) set ""; shift cleared=yes ;; esac if test $eat = yes; then eat=no continue fi case "$arg" in -D*|-I*) set fnord "$@" "$arg"; shift ;; # Strip any option that makedepend may not understand. Remove # the object too, otherwise makedepend will parse it as a source file. -arch) eat=yes ;; -*|$object) ;; *) set fnord "$@" "$arg"; shift ;; esac done obj_suffix=`echo "$object" | sed 's/^.*\././'` touch "$tmpdepfile" ${MAKEDEPEND-makedepend} -o"$obj_suffix" -f"$tmpdepfile" "$@" rm -f "$depfile" cat < "$tmpdepfile" > "$depfile" sed '1,2d' "$tmpdepfile" | tr ' ' ' ' | \ ## Some versions of the HPUX 10.20 sed can't process this invocation ## correctly. Breaking it into two sed invocations is a workaround. sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" "$tmpdepfile".bak ;; cpp) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout. "$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # Remove `-o $object'. IFS=" " for arg do case $arg in -o) shift ;; $object) shift ;; *) set fnord "$@" "$arg" shift # fnord shift # $arg ;; esac done "$@" -E | sed -n -e '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ -e '/^#line [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' | sed '$ s: \\$::' > "$tmpdepfile" rm -f "$depfile" echo "$object : \\" > "$depfile" cat < "$tmpdepfile" >> "$depfile" sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; msvisualcpp) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout. 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This case will never be run, # since it is checked for above. exit 1 ;; none) exec "$@" ;; *) echo "Unknown depmode $depmode" 1>&2 exit 1 ;; esac exit 0 # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: emu8051-1.1.1/config/install-sh0000755000175000017500000003253711662270640013026 00000000000000#!/bin/sh # install - install a program, script, or datafile scriptversion=2009-04-28.21; # UTC # This originates from X11R5 (mit/util/scripts/install.sh), which was # later released in X11R6 (xc/config/util/install.sh) with the # following copyright and license. # # Copyright (C) 1994 X Consortium # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to # deal in the Software without restriction, including without limitation the # rights to use, copy, modify, merge, publish, distribute, sublicense, and/or # sell copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN # AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNEC- # TION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # # Except as contained in this notice, the name of the X Consortium shall not # be used in advertising or otherwise to promote the sale, use or other deal- # ings in this Software without prior written authorization from the X Consor- # tium. # # # FSF changes to this file are in the public domain. # # Calling this script install-sh is preferred over install.sh, to prevent # `make' implicit rules from creating a file called install from it # when there is no Makefile. # # This script is compatible with the BSD install script, but was written # from scratch. nl=' ' IFS=" "" $nl" # set DOITPROG to echo to test this script # Don't use :- since 4.3BSD and earlier shells don't like it. doit=${DOITPROG-} if test -z "$doit"; then doit_exec=exec else doit_exec=$doit fi # Put in absolute file names if you don't have them in your path; # or use environment vars. chgrpprog=${CHGRPPROG-chgrp} chmodprog=${CHMODPROG-chmod} chownprog=${CHOWNPROG-chown} cmpprog=${CMPPROG-cmp} cpprog=${CPPROG-cp} mkdirprog=${MKDIRPROG-mkdir} mvprog=${MVPROG-mv} rmprog=${RMPROG-rm} stripprog=${STRIPPROG-strip} posix_glob='?' initialize_posix_glob=' test "$posix_glob" != "?" || { if (set -f) 2>/dev/null; then posix_glob= else posix_glob=: fi } ' posix_mkdir= # Desired mode of installed file. mode=0755 chgrpcmd= chmodcmd=$chmodprog chowncmd= mvcmd=$mvprog rmcmd="$rmprog -f" stripcmd= src= dst= dir_arg= dst_arg= copy_on_change=false no_target_directory= usage="\ Usage: $0 [OPTION]... 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Generated from configure.ac by autoheader. */ /* Set to 1 to enable debugging messages. */ #undef DEBUG /* Set to 1 to enable GTK+ support for building GUI. */ #undef HAVE_GTK /* Define to 1 if you have the header file. */ #undef HAVE_INTTYPES_H /* Define to 1 if you have the header file. */ #undef HAVE_MEMORY_H /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H /* Define to 1 if you have the header file. */ #undef HAVE_STDLIB_H /* Define to 1 if you have the header file. */ #undef HAVE_STRINGS_H /* Define to 1 if you have the header file. */ #undef HAVE_STRING_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_STAT_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_TYPES_H /* Define to 1 if you have the header file. */ #undef HAVE_UNISTD_H /* Define to 1 if your C compiler doesn't accept -c and -o together. */ #undef NO_MINUS_C_MINUS_O /* Name of package */ #undef PACKAGE /* Define to the address where bug reports for this package should be sent. */ #undef PACKAGE_BUGREPORT /* Define to the full name of this package. */ #undef PACKAGE_NAME /* Define to the full name and version of this package. */ #undef PACKAGE_STRING /* Define to the one symbol short name of this package. */ #undef PACKAGE_TARNAME /* Define to the home page for this package. */ #undef PACKAGE_URL /* Define to the version of this package. */ #undef PACKAGE_VERSION /* Define to 1 if you have the ANSI C header files. */ #undef STDC_HEADERS /* Version number of package */ #undef VERSION /* Define to empty if `const' does not conform to ANSI C. */ #undef const /* Define to `int' if does not define. */ #undef pid_t /* Define to `unsigned int' if does not define. */ #undef size_t emu8051-1.1.1/AUTHORS0000644000175000017500000000010511653065330010605 00000000000000 Hugo Villeneuve Jonathan St-André Pascal Fecteau Jimmy Ringuette emu8051-1.1.1/INSTALL0000644000175000017500000002202411653065330010572 00000000000000Copyright 1994, 1995, 1996, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. This file is free documentation; the Free Software Foundation gives unlimited permission to copy, distribute and modify it. Basic Installation ================== These are generic installation instructions. The `configure' shell script attempts to guess correct values for various system-dependent variables used during compilation. It uses those values to create a `Makefile' in each directory of the package. It may also create one or more `.h' files containing system-dependent definitions. Finally, it creates a shell script `config.status' that you can run in the future to recreate the current configuration, and a file `config.log' containing compiler output (useful mainly for debugging `configure'). It can also use an optional file (typically called `config.cache' and enabled with `--cache-file=config.cache' or simply `-C') that saves the results of its tests to speed up reconfiguring. (Caching is disabled by default to prevent problems with accidental use of stale cache files.) If you need to do unusual things to compile the package, please try to figure out how `configure' could check whether to do them, and mail diffs or instructions to the address given in the `README' so they can be considered for the next release. If you are using the cache, and at some point `config.cache' contains results you don't want to keep, you may remove or edit it. The file `configure.ac' (or `configure.in') is used to create `configure' by a program called `autoconf'. You only need `configure.ac' if you want to change it or regenerate `configure' using a newer version of `autoconf'. The simplest way to compile this package is: 1. `cd' to the directory containing the package's source code and type `./configure' to configure the package for your system. If you're using `csh' on an old version of System V, you might need to type `sh ./configure' instead to prevent `csh' from trying to execute `configure' itself. Running `configure' takes awhile. While running, it prints some messages telling which features it is checking for. 2. Type `make' to compile the package. 3. Optionally, type `make check' to run any self-tests that come with the package. 4. Type `make install' to install the programs and any data files and documentation. 5. You can remove the program binaries and object files from the source code directory by typing `make clean'. To also remove the files that `configure' created (so you can compile the package for a different kind of computer), type `make distclean'. There is also a `make maintainer-clean' target, but that is intended mainly for the package's developers. If you use it, you may have to get all sorts of other programs in order to regenerate files that came with the distribution. Compilers and Options ===================== Some systems require unusual options for compilation or linking that the `configure' script does not know about. Run `./configure --help' for details on some of the pertinent environment variables. You can give `configure' initial values for configuration parameters by setting variables in the command line or in the environment. Here is an example: ./configure CC=c89 CFLAGS=-O2 LIBS=-lposix *Note Defining Variables::, for more details. Compiling For Multiple Architectures ==================================== You can compile the package for more than one kind of computer at the same time, by placing the object files for each architecture in their own directory. To do this, you must use a version of `make' that supports the `VPATH' variable, such as GNU `make'. `cd' to the directory where you want the object files and executables to go and run the `configure' script. `configure' automatically checks for the source code in the directory that `configure' is in and in `..'. If you have to use a `make' that does not support the `VPATH' variable, you have to compile the package for one architecture at a time in the source code directory. After you have installed the package for one architecture, use `make distclean' before reconfiguring for another architecture. Installation Names ================== By default, `make install' will install the package's files in `/usr/local/bin', `/usr/local/man', etc. You can specify an installation prefix other than `/usr/local' by giving `configure' the option `--prefix=PATH'. You can specify separate installation prefixes for architecture-specific files and architecture-independent files. If you give `configure' the option `--exec-prefix=PATH', the package will use PATH as the prefix for installing programs and libraries. Documentation and other data files will still use the regular prefix. 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If `config.sub' isn't included in this package, then this package doesn't need to know the machine type. If you are _building_ compiler tools for cross-compiling, you should use the `--target=TYPE' option to select the type of system they will produce code for. If you want to _use_ a cross compiler, that generates code for a platform different from the build platform, you should specify the "host" platform (i.e., that on which the generated programs will eventually be run) with `--host=TYPE'. Sharing Defaults ================ If you want to set default values for `configure' scripts to share, you can create a site shell script called `config.site' that gives default values for variables like `CC', `cache_file', and `prefix'. `configure' looks for `PREFIX/share/config.site' if it exists, then `PREFIX/etc/config.site' if it exists. Or, you can set the `CONFIG_SITE' environment variable to the location of the site script. A warning: not all `configure' scripts look for a site script. Defining Variables ================== Variables not defined in a site shell script can be set in the environment passed to `configure'. However, some packages may run configure again during the build, and the customized values of these variables may be lost. In order to avoid this problem, you should set them in the `configure' command line, using `VAR=value'. For example: ./configure CC=/usr/local2/bin/gcc will cause the specified gcc to be used as the C compiler (unless it is overridden in the site shell script). `configure' Invocation ====================== `configure' recognizes the following options to control how it operates. `--help' `-h' Print a summary of the options to `configure', and exit. `--version' `-V' Print the version of Autoconf used to generate the `configure' script, and exit. `--cache-file=FILE' Enable the cache: use and save the results of the tests in FILE, traditionally `config.cache'. FILE defaults to `/dev/null' to disable caching. `--config-cache' `-C' Alias for `--cache-file=config.cache'. `--quiet' `--silent' `-q' Do not print messages saying which checks are being made. To suppress all normal output, redirect it to `/dev/null' (any error messages will still be shown). `--srcdir=DIR' Look for the package's source code in directory DIR. Usually `configure' can determine that directory automatically. `configure' also accepts some other, not widely useful, options. Run `configure --help' for more details. emu8051-1.1.1/pixmaps/0000755000175000017500000000000011653065330011302 500000000000000emu8051-1.1.1/pixmaps/.svn/0000755000175000017500000000000011653065330012166 500000000000000emu8051-1.1.1/pixmaps/.svn/tmp/0000755000175000017500000000000011653065330012766 500000000000000emu8051-1.1.1/pixmaps/.svn/tmp/props/0000755000175000017500000000000011653065330014131 500000000000000emu8051-1.1.1/pixmaps/.svn/tmp/text-base/0000755000175000017500000000000011653065330014662 500000000000000emu8051-1.1.1/pixmaps/.svn/tmp/prop-base/0000755000175000017500000000000011653065330014656 500000000000000emu8051-1.1.1/pixmaps/.svn/props/0000755000175000017500000000000011653065330013331 500000000000000emu8051-1.1.1/pixmaps/.svn/entries0000444000175000017500000000133611653065330013503 0000000000000010 dir 21 https://emu8051.googlecode.com/svn/trunk/pixmaps https://emu8051.googlecode.com/svn 2004-05-08T02:56:47.789250Z 1 b16f683b-584c-df02-229f-e7a19a03f390 reset.xpm file 2011-10-29T21:06:32.000000Z 686bdec71766a36e9f30aedb8889c047 2004-05-08T02:56:47.789250Z 1 2592 run.xpm file 2011-10-29T21:06:32.000000Z a9aa98d4c693cb1c4b514a1d9caa92fb 2004-05-08T02:56:47.789250Z 1 2605 stop.xpm file 2011-10-29T21:06:32.000000Z a1d8a48bf31cefcfd274928591840a02 2004-05-08T02:56:47.789250Z 1 2606 step.xpm file 2011-10-29T21:06:32.000000Z b8a173d47ad6d0fe595b58ac9298c180 2004-05-08T02:56:47.789250Z 1 2621 emu8051-1.1.1/pixmaps/.svn/text-base/0000755000175000017500000000000011653065330014062 500000000000000emu8051-1.1.1/pixmaps/.svn/text-base/reset.xpm.svn-base0000444000175000017500000000504011653065330017364 00000000000000/* XPM */ static char * reset_xpm[] = { "48 48 3 1", " c None", ". c #005A9C", "+ c #FFFFFF", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "..+++++++..++++++++..+++++++.++++++++.++++++++..", "..++++++++.++++++++.++++++++.++++++++.++++++++..", "..++....++.++.......++.......++..........++.....", "..++....++.++.......++.......++..........++.....", "..++....++.++.......++.......++..........++.....", "..++....++.+++++++..+++++++..+++++++.....++.....", "..+++++++..+++++++...+++++++.+++++++.....++.....", "..+++++++..++.............++.++..........++.....", "..++....++.++.............++.++..........++.....", "..++....++.++.............++.++..........++.....", "..++....++.++++++++.++++++++.++++++++....++.....", "..++....++.++++++++.+++++++..++++++++....++.....", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................"}; 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", " ........+++++++........ ", " ................... ", " ........... ", " "}; emu8051-1.1.1/pixmaps/.svn/text-base/stop.xpm.svn-base0000444000175000017500000000505611653065330017236 00000000000000/* XPM */ static char * stop_xpm[] = { "48 48 4 1", " c None", ". c #000000", "+ c #C60021", "@ c #FFFFFF", " .................... ", " .++++++++++++++++++++. ", " .++@@@@@@@@@@@@@@@@@@++. ", " .++@@++++++++++++++++@@++. ", " .++@@++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++++++@@++. ", ".++@@++++++++++++++++++++++++++++++++++++++@@++.", ".+@@++++++++++++++++++++++++++++++++++++++++@@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@+++++@@@@@@@+@@@@@@@@++@@@@@@++@@@@@@@++++@+.", ".+@++++@@@@@@@@+@@@@@@@@++@@@@@@++@@@@@@@@+++@+.", ".+@++++@@++++++++++@@++++@@@++@@@+@@++++@@+++@+.", ".+@++++@@++++++++++@@++++@@++++@@+@@++++@@+++@+.", ".+@++++@@++++++++++@@++++@@++++@@+@@++++@@+++@+.", ".+@++++@@@@@@@+++++@@++++@@++++@@+@@++++@@+++@+.", ".+@+++++@@@@@@@++++@@++++@@++++@@+@@@@@@@@+++@+.", ".+@++++++++++@@++++@@++++@@++++@@+@@@@@@@++++@+.", ".+@++++++++++@@++++@@++++@@++++@@+@@+++++++++@+.", ".+@++++++++++@@++++@@++++@@@++@@@+@@+++++++++@+.", ".+@++++@@@@@@@@++++@@+++++@@@@@@++@@+++++++++@+.", ".+@++++@@@@@@@+++++@@+++++@@@@@@++@@+++++++++@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@@++++++++++++++++++++++++++++++++++++++++@@+.", ".++@@++++++++++++++++++++++++++++++++++++++@@++.", " .++@@++++++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++@@++. ", " .++@@++++++++++++++++@@++. ", " .++@@@@@@@@@@@@@@@@@@@+. ", " .++++++++++++++++++++. ", " .................... "}; emu8051-1.1.1/pixmaps/.svn/prop-base/0000755000175000017500000000000011653065330014056 500000000000000emu8051-1.1.1/pixmaps/.svn/all-wcprops0000444000175000017500000000064611653065330014300 00000000000000K 25 svn:wc:ra_dav:version-url V 29 /svn/!svn/ver/1/trunk/pixmaps END reset.xpm K 25 svn:wc:ra_dav:version-url V 39 /svn/!svn/ver/1/trunk/pixmaps/reset.xpm END run.xpm K 25 svn:wc:ra_dav:version-url V 37 /svn/!svn/ver/1/trunk/pixmaps/run.xpm END stop.xpm K 25 svn:wc:ra_dav:version-url V 38 /svn/!svn/ver/1/trunk/pixmaps/stop.xpm END step.xpm K 25 svn:wc:ra_dav:version-url V 38 /svn/!svn/ver/1/trunk/pixmaps/step.xpm END emu8051-1.1.1/pixmaps/run.xpm0000644000175000017500000000505511653065330012561 00000000000000/* XPM */ static char * run_xpm[] = { "48 48 4 1", " c None", ". c #000000", "+ c #008C6B", "@ c #FFFFFF", " ........... ", " ................... ", " ........+++++++........ ", " ......+++++++++++++++...... ", " .....+++++++++++++++++++..... ", " .....+++++++++++++++++++++++..... ", " .....+++++++++++++++++++++++++..... ", " ....+++++++++++++++++++++++++++++.... ", " ...+++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++... ", " ....+++++++++++++++++++++++++++++++++.... ", " ...+++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++++... ", " ..+++++++++++++++++++++++++++++++++++++++++.. ", " ..++++++++@@@@@@@++@@++++@@+@@++++@@+++++++.. ", "...++++++++@@@@@@@@+@@++++@@+@@@+++@@+++++++... ", "...++++++++@@++++@@+@@++++@@+@@@+++@@+++++++... ", "..+++++++++@@++++@@+@@++++@@+@@@@++@@++++++++.. ", "..+++++++++@@++++@@+@@++++@@+@@@@++@@++++++++.. ", "..+++++++++@@++++@@+@@++++@@+@@+@@+@@++++++++.. ", "..+++++++++@@@@@@@++@@++++@@+@@+@@+@@++++++++.. ", "..+++++++++@@@@@@@++@@++++@@+@@++@@@@++++++++.. ", "..+++++++++@@++++@@+@@++++@@+@@++@@@@++++++++.. ", "..+++++++++@@++++@@+@@++++@@+@@+++@@@++++++++.. ", "...++++++++@@++++@@+@@@@@@@@+@@+++@@@+++++++... ", "...++++++++@@++++@@++@@@@@@++@@++++@@+++++++... ", " ..+++++++++++++++++++++++++++++++++++++++++.. ", " ..+++++++++++++++++++++++++++++++++++++++++.. ", " ...+++++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++++++... ", " ....+++++++++++++++++++++++++++++++++.... ", " ...+++++++++++++++++++++++++++++++++... ", " ...+++++++++++++++++++++++++++++++... ", " ....+++++++++++++++++++++++++++++.... ", " .....+++++++++++++++++++++++++..... ", " .....+++++++++++++++++++++++..... ", " .....+++++++++++++++++++..... ", " ......+++++++++++++++...... ", " ........+++++++........ ", " ................... ", " ........... ", " "}; emu8051-1.1.1/pixmaps/reset.xpm0000644000175000017500000000504011653065330013071 00000000000000/* XPM */ static char * reset_xpm[] = { "48 48 3 1", " c None", ". c #005A9C", "+ c #FFFFFF", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "..+++++++..++++++++..+++++++.++++++++.++++++++..", "..++++++++.++++++++.++++++++.++++++++.++++++++..", "..++....++.++.......++.......++..........++.....", "..++....++.++.......++.......++..........++.....", "..++....++.++.......++.......++..........++.....", "..++....++.+++++++..+++++++..+++++++.....++.....", "..+++++++..+++++++...+++++++.+++++++.....++.....", "..+++++++..++.............++.++..........++.....", "..++....++.++.............++.++..........++.....", "..++....++.++.............++.++..........++.....", "..++....++.++++++++.++++++++.++++++++....++.....", "..++....++.++++++++.+++++++..++++++++....++.....", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................", "................................................"}; emu8051-1.1.1/pixmaps/step.xpm0000644000175000017500000000507511653065330012732 00000000000000/* XPM */ static char * step_xpm[] = { "48 48 5 1", " c None", ". c #FFDE08", "+ c #000000", "@ c #FFFFFF", "# c #080800", "..........++++++++++++............++++++++++++..", "...........++++++++++++............++++++++++++.", "............++++++++++++............++++++++++++", "+............++++++++++++............+++++++++++", "++............++++++++++++............++++++++++", "+++............++++++++++++............+++++++++", "++++............++++++++++++............++++++++", "+++++............++++++++++++............+++++++", "++++++............++++++++++++............++++++", "+++++++............++++++++++++............+++++", "++++++++............++++++++++++............++++", "+++++++++............++++++++++++............+++", "++++++++++............++++++++++++............++", "+++++++++++............++++++++++++............+", "++++++++++++............++++++++++++............", ".++++++++++++++++++++++++++++++++++++++++++++...", "..+++++++++++++++++++++++++++++++++++++++++++...", "...++++++++++++++++++++++++++++++++++++++++++...", "....++++@@@@@@@+@@@@@@@@+@@@@@@@@+@@@@@@@++++...", "....+++@@@@@@@@+@@@@@@@@+@@@@@@@@+@@@@@@@@+++...", "....+++@@++++++++++@@++++@@+++++++@@++++@@+++...", "....+++@@++++++++++@@++++@@+++++++@@++++@@+++...", "....+++@@++++++++++@@++++@@+++++++@@++++@@+++...", "....+++@@@@@@@+++++@@++++@@@@@@@++@@++++@@+++...", "....++++@@@@@@@++++@@++++@@@@@@@++@@@@@@@@++++..", "....+++++++++@@++++@@++++@@+++++++@@@@@@@++++++.", "....+++++++++@@++++@@++++@@+++++++@@++++++++++++", "+...+++++++++@@++++@@++++@@+++++++@@++++++++++++", "++..+++@@@@@@@@++++@@++++@@@@@@@@+@@++++++++++++", "+++.+++@@@@@@@+++++@@++++@@@@@@@@+@@++++++++++++", "++++++++++++++++++++++++++++++++++++++++++++++++", "++++++++++++++++++++++++++++++++++++++++++++++++", "++++++++++++++++++++++++++++++++++++++++++++++++", "+++++++............++++++++++++............+++++", "++++++++............++++++++++++............++++", "+++++++++............+#++++++++++............+++", "++++++++++............++++++++++++............++", "#++++++++++............++++++++++++............+", "++++++++++++............++++++++++++............", ".+#++++++++++............+#++++++++++...........", "..++++++++++++............+#++++++++++..........", "...++++++++++++............++++++++++++.........", "....++++++++++++............++++++++++++........", ".....+#++++++++++............+#++++++++++.......", "......++++++++++++............++++++++++++......", ".......++++++++++++............++++++++++++.....", "........+#++++++++++............++++++++++++....", ".........++++++++++++............+#++++++++++..."}; emu8051-1.1.1/pixmaps/stop.xpm0000644000175000017500000000505611653065330012743 00000000000000/* XPM */ static char * stop_xpm[] = { "48 48 4 1", " c None", ". c #000000", "+ c #C60021", "@ c #FFFFFF", " .................... ", " .++++++++++++++++++++. ", " .++@@@@@@@@@@@@@@@@@@++. ", " .++@@++++++++++++++++@@++. ", " .++@@++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++++++@@++. ", ".++@@++++++++++++++++++++++++++++++++++++++@@++.", ".+@@++++++++++++++++++++++++++++++++++++++++@@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@+++++@@@@@@@+@@@@@@@@++@@@@@@++@@@@@@@++++@+.", ".+@++++@@@@@@@@+@@@@@@@@++@@@@@@++@@@@@@@@+++@+.", ".+@++++@@++++++++++@@++++@@@++@@@+@@++++@@+++@+.", ".+@++++@@++++++++++@@++++@@++++@@+@@++++@@+++@+.", ".+@++++@@++++++++++@@++++@@++++@@+@@++++@@+++@+.", ".+@++++@@@@@@@+++++@@++++@@++++@@+@@++++@@+++@+.", ".+@+++++@@@@@@@++++@@++++@@++++@@+@@@@@@@@+++@+.", ".+@++++++++++@@++++@@++++@@++++@@+@@@@@@@++++@+.", ".+@++++++++++@@++++@@++++@@++++@@+@@+++++++++@+.", ".+@++++++++++@@++++@@++++@@@++@@@+@@+++++++++@+.", ".+@++++@@@@@@@@++++@@+++++@@@@@@++@@+++++++++@+.", ".+@++++@@@@@@@+++++@@+++++@@@@@@++@@+++++++++@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@++++++++++++++++++++++++++++++++++++++++++@+.", ".+@@++++++++++++++++++++++++++++++++++++++++@@+.", ".++@@++++++++++++++++++++++++++++++++++++++@@++.", " .++@@++++++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++++@@++. ", " .++@@++++++++++++++++++@@++. ", " .++@@++++++++++++++++@@++. ", " .++@@@@@@@@@@@@@@@@@@@+. ", " .++++++++++++++++++++. ", " .................... "}; emu8051-1.1.1/ChangeLog0000644000175000017500000005611211671304447011325 000000000000002011-12-11 Hugo Villeneuve Added optional size parameter when dumping memory. Created two separate executables, emu8051-cli (default) and optional emu8051-gtk if Gtk+ is detected. 2011-10-29 Hugo Villeneuve Fixed SJMP error and improved columns and rows sizing 2010-03-19 Hugo Villeneuve Reintroduced the console mode if no GTK+ librairies are detected. The default is to build the GUI if GTK+ is detected, but the console mode can always be forced by using "--enable-gui=no" as a configure option. 2009-02-09 Hugo Villeneuve * Updated Free Software Foundation address. 2008-11-05 Hugo Villeneuve * Added licencing informations for each source file. * Removed some debugging messages. 2008-04-28 Hugo Villeneuve * Removed gtk+-1.0 support, now requires gtk+-2 2004-05-07 Hugo Villeneuve * Corrected a bug with the CJNE instruction. * Modified the directory layout and autoconf files. * Added support for GTK2. * Added project to subversion. 2002-11-12 Hugo Villeneuve * Removed some warnings for GCC 3.2: replaced by and by . * Added "using namespace std;" in EmuGtk.hpp (for GCC 3.2) * Removed all unused variables * Corrected error in CPU8051.cpp, in function: 'void CPU8051::IntMemBitInfo( unsigned int BitAddress, char *Text )' Modified this: 'sprintf( &Text[ TextLength ], ".%X", BitAddress );' instead of: 'sprintf( &Text[ TextLength ], ".%X" );' * In Opcode2cpp.pl (line 767), modified for GCC 3.2: 'print INST_IMP " funcptr[$i]=&CPU8051::$ifunc;\n";' instead of: 'print INST_IMP " funcptr[$i]=&$ifunc;\n";' * EmuGtk.cpp, added '#include ' * Modified the return type of some functions to void to remove warnings. * In function 'void RegWin::Show( CPU8051 *CPU )' (RegWin.cpp), removed all the '\n' in 'gtk_clist_set_text' calls (to fix a display problem) 1999-04-27 Hugo Villeneuve * Ajoute les fonctions DumpInt dans EmuConsole.hpp ainsi que ReadInt dans CPU8051.hpp. Corrige des bugs dans WriteInt et WriteExt. * Corrige l'implementation des timers. Les 4 modes ont ete testes et semblent bien fonctionner maintenant. LEs flags sont mis correctement et les timers augmentent maintenant (au lieu d'etre decrementes). * Ajoute un fichier timer.hex pour tester les timers. 1999-04-22 Hugo Villeneuve * Ajoute les fonctions ME, MI et MP (voir definitions dans EmuConsole.cpp). Ajoute les fonctions membres WriteExt et WriteInt dans la classe CPU8051 afin de suivre la logique de l'espace memoire du 8051. WriteExt permet de modifier la memoire externe qui va de $00 a $FFFF (et non de $100 a $FFFF comme c'etait le cas avant). De meme, WriteInt permet de modifier la memoire interne qui va de $00 a $FF (incluant les SFR). Meme si la memoire externe contient les adresses $00 a $FF, il n'y a pas de conflit avec la memoire interne de $00 a $FF car la memoire externe est accedee avec l'instruction MOVX alors que la memoire interne l'est avec les instructions MOV (direct ou indirect). * Renomme l'option DD du menu pour DE (dump External data memory). Change la description de l'option DI du menu pour Dump External Data Memory. * Ajoute la fonction ReadExt dans la classe CPU8051, toujours pour la logique de la memoire du 8051. Ajoute la fonction DumpExt dans la classe EmuConsole pour dumper la memoire externe. * Ces nouvelles fonctions ont ete testees et semblent bien fonctionner. 1999-04-09 Jonathan St-Andre * Refait marche le RunningState avec les classes. * Reconnecte les signaux aux boutons Trace, Run, Reset et Quit. * Ajoute bouton Step qui ajoute un breakpoint a la ligne suivante et passe en RunningState. Pratique lorsqu'arrive un CALL et qu'on ne veut pas y entrer contrairement a Trace. 1999-04-06 Jonathan St-Andre * Creation de EmuConsole.hpp et EmuConsole.cpp * Cette nouvelle archive est presque rendue au meme niveau que l'ancienne. Vous allez pouvoir commencer a laisser faire l'ancienne et vous concentrer sur celle-ci. (Les modifs annoncee se rapportent a l'ancienne archive mais elles ont ete ramenee dans celle-ci par Jonathan St-Andre) 1999-04-05 Jonathan St-Andre * Corrige qq malfonctions dans exec de mainconsole.cpp (nb d'inst. peut etre l'infini, caractere est attendu au clavier seulement si l'execution est arretee par une touche. * Corrige probleme d'instructions sans operandes mal desassemblees (il ne faut pas ecrire le caractere ' ' dans la chaine, il faut utiliser sprintf avec " " a la place car sprintf termine la chaine avec un 0 a la fin. La chaine n'etait pas terminee par un 0 et elle affichait du garbage de la memoire) * Corrige probleme dans disasm.cpp en rapport avec addr11 qui ne prenait pas opcode mais memoire[opcode] (je devais etre chaud quand j'ai ecrit ca). * Bouton Run se change en Stop dans l'interface Gtk+ lorsque l'on clique dessus et le cpu se met en mode execution. Les fonctions de l'interface restent disponibles. N'importe quelle action dans l'interface(excepte le fait de cliquer dans les fenetre memoire et programme) cause l'arret de l'execution et la mise a jour de l'affichage. * Il est possible de placer des breakpoints pendant qu'il est dans le "RunningState". * Enleve les pixmaps sur les boutons dans l'interface Gtk+ * Ajoute verification de breakpoint deja existant dans setbreakpoint. Hugo Villeneuve * Modifie l'affichage de disasm pour que les operandes soient alignees. * Modifie la fonction DP pour qu'elle prenne l'adresse du PC par defaut si aucune adresse n'est specifiee. * Erreur avec l'instruction ACALL qui ne calculait pas l'adresse correctement et qui ne poussait pas l'adresse de retour sur la pile. Il est important que le PC soit incremente de 2 avant de calculer addr11 et de pousser le PC sur la pile... Il faut aussi modifier le dessassemblage de cette instruction qui n'affiche que la deuxieme operande (adresse de 8 bits), alors que l'adresse est sur 11 bits... * Erreur avec l'instruction RET( fichier siae1.asm adresse 03A4) , affiche RET @%K * Ajoute la possibilite d'arreter l'execution du programme en pesant sur n'importe quelle touche grace a la fonction kbhit(). * Ajoute les fonctions SB, RB et DB pour les breakpoints dans le mode console. L'execution se fait jusqu'au breakpoint. Une fois arrive au breakpoint, si on fait de nouveau EM, on peut continuer l'execution du programme passe ce breakpoint. Autrement dit, EM ne verifie pas si la premiere instruction qu'il execute est un break point, ce qui est pratique pour continuer l'execution du prog apres un breakpoint. 1999-03-31 Jonathan St-Andre * Reecriture de TOUT les sources en imbriquant au maximum dans des classes pour que ce soit plus lisible et reutilisable. * Les classes sont CPU8051, Memory, EmuGtk, MemWin, RegWin, PgmWin et les exceptions. * Tout est en anglais pour rendre le programme disponible sur internet. * Je n'ai pas encore refais l'interface Console en classes donc elle n'est pas incluse dans cette archive. Il faudrait vraiment la refaire en tant que classe. * Ajout fichiers TODO, CREDITS et COPYING (license GPL) 1999-03-30 Jonathan St-Andre * Corrige bug lors du desassemblage dans l'interpretation des adresses directes dans 0-7F. disasm.cpp * Corrige bug dans l'opcode 0x85, ajoute conditions particulieres pour cette instruction dans script Perl et dans desassemblage. Les operandes de cette instruction sont inversees dans la memoire programme. Ex.: MOV 50H,51H est ecrit 85 51 50 dans la memoire programme. Hugo Villeneuve * Bug dans les instructions ayant un mode d'adressage direct qui utilisent des adresses dans 0-7F. Le desassembleur interprete les adresses comme etant des adresses de bit. * Bug dans l'opcode 0x85 MOV direct,direct. La source et la destination sont inverses dans le desassemblage et dans l'execution. 1999-03-29 Jonathan St-Andre * Remplace string::erase pour string::replace partout, g++ a l'universite ne connait pas encore string::erase, c'est trop recent. * Ajoute "-w" pour disabler les warnings et "-fhandle-exceptions" pour activer les exceptions a l'universite. Pascal Fecteau * Ajoute .h comme extension aux fichiers inclus, sinon ca ne fonctionne pas a l'universite. Pascal Fecteau Hugo Villeneuve * Corrige une erreur dans les instructions AJMP addr11 1999-03-28 Hugo Villeneuve * Modification de la presentation de "Dump Register" sur la console. Beaucoup plus facile a lire maintenant. * Correction d'un bug dans l'instruction DA (opcode 0xD4). 1999-03-27 Hugo Villeneuve * Correction d'un probleme avec l'instruction CJNE. * Correction de bugs dans LoadHexFile (voir 1999-03-22) Jonathan St-Andre * Augmente la hauteur de la fenetre Internal RAM. * Correction de probleme avec tous les XCH et XCHD, l'operande source n'etait pas modifiee (Trouve par Hugo et suggestion de correction par Hugo). * Ajout de P0, P1, P2 et P3 dans la fenetre des registres. (Suggestion d'Hugo). * View -> Data Memory Dump et View -> Program Memory Dump sont fonctionnels. On ne peut visionner que les 16384 premiers octets. Il ne veut pas prendre 65536 lignes dans une scrolled window. Probablement parce que 18colonnes x 65536lignes = 1179648 cellules est beaucoup trop. * J'ai remarque qu'avec Gtk, on peut facilement changer les raccoucis dans les menus. Pour associer "View -> Program Memory Dump" au raccourci "Alt-2" par exemple, il suffit d'aller dans le menu "View", se placer au dessus de "Program Memory Dump" et appuyer "Alt-2". Le menu se modifiera automatiquement pour afficher "Alt-2" au bout de la ligne et desormais, lorsque vous appuierez "Alt-2", l'action sera executee. Ca dure seulement durant la session presente. * Reduit la taille de la fenetre principale en largeur de 120 pixels et en hauteur de 20 pixels. 1999-03-25 Jonathan St-Andre * Fenetre dump connais la position ou on clique dedans. * Generalise dans une classe la fenetre memorydump, il sera plus facile d'ajouter plusieurs fenetres memory dump a partir du menu plus tard. * Implemente Run jusqu'a un breakpoint (si aucun breakpoint, loop sans fin -> il faut killer). * Suffit de cliquer sur une ligne de programme dans Gtk pour placer ou retirer un breakpoint. Les breakpoints apparaissent comme une asterisque (*) a droite de l'adresse dans la fenetre program. * Ajoute bouton Run dans interface Gtk * Implemente quelques fonctions necessaires au breakpoints. * Change un peu le layout * Enleve image de fond (cause leger delai au chargement) * Fait un peu de menage dans fichiers relatifs au Gtk 1999-03-23 Jonathan St-Andre * Changement des champs GTK_TEXT des fenetres Registre, Program et Internal RAM pour des champs GTK_CLIST. Plus beau, moins de flickering quand on trace et plus pratique pour ce qui s'en vient. * Integration des fichiers xpm dans l'executable. Mais c'est encore trop long a charger lors de l'execution, va probablement falloir les compresser ou laisser faire l'image de fond. * Ajout de pixmaps sur les boutons Trace, Reset et Quit (Gtk) * Ajout de pixmap comme fond (Gtk) 1999-03-22 Hugo Villeneuve * Corrige un bug dans la fonction LoadHexFile : Le checksum n'etait pas calcule correctement, ce qui entrainait des erreurs a l'ouverture de certains fichiers HEX. L'erreur venait du fait que le checksum se calculait avec la valeur absolue du LoadOffset, au lieu d'utiliser les caracteres composant le LoadOffset. Exemple : si LoadOffset = 0103, il faut additionner 01h+03h=4h au Checksum et non pas 0103h = 259 en decimal. * Deplace la fonction enleve_espaces de main_console vers mainemu car elle est commune aux deux interfaces graphiques. * Modifie la fonction majuscules pour qu'elle puisse convertir les lettres de minuscule a majuscule meme si la chaine contient des chiffres ou autres signes de ponctuation. * Modifie la declaration des fonctions dans tous les fichiers .hpp: enleve le nom des parametres car c'etait inutile. * Stocke le nom des registres dans un fichier registres8051.hpp. Ainsi, si on veut emuler un autre type de processeur, il suffira de se creer un autre fichier registres8052xxx.hpp par exemple. * Implemente l'affichage en francais ou en anglais dependant de l'option passee sur la ligne de commande. L'interface est beaucoup plus lisible de cette facon. Par defaut, l'affichage est en anglais. 1999-03-21 Hugo Villeneuve * Ajoute deux parametres qu'on peut passer par la ligne de commande: /? affiche les options disponibles sur la ligne de commande. -f force l'affichage en francais (pas encore implemente!!!) * Ajoute le controle d'erreur pour le chargement d'un fichier HEX. Les differentes erreurs sont controlees ( checksum, rectype, fin de fichier, etc.). * Modifie la fonction unasm pour qu'elle accepte 0,1 ou 2 parametres. U (adresse) (nombre d'instructions) Si adresse et nombre d'instructions non-specifies: Adresse = PC et Nombre d'Instructions = 16 Si adresse specifie et nombre d'instructions non-specifie: Adresse = adresse specifiee et Nombre d'Instructions = 16 Si adresse specifie et nombre d'instructions specifie: Adresse = adresse specifiee et Nombre d'Instructions = nb specifie A noter: on peut specifier une adresse comme etant un nombre hexadecimal, ou tout simplement en entrant "PC" ou "pc". Jonathan St-Andre * Ajout des interruptions du port serie. * Ajout du timer 2 (8052). 1999-03-20 Hugo Villeneuve * Separe le fichier main.cpp en deux: main.cpp et fonctions.cpp. fonctions.cpp contient les fonctions necessaires a main.cpp. * Ajoute un fichier exceptions.hpp qui permet de gerer les erreurs. * Modifie le Makefile en consequence. * On peut maintenant entrer les adresses < a quatre caracteres : ex: adresse 0000h = 0 ou 00 ou 000 ou 0000. * Enleve le include * Remplace toutes les commandes printf du main par cout. * Modifie l'apparence du menu. * Le programme est maintenant plus robuste en ce qui concerne les erreurs de syntaxe, les adresses invalides, etc (a tester...). * Modifier l'operation et la syntaxe de certaines commandes S (set register) devient MR (modify register) car set veut plutot dire "mettre a 1", et on pourra aussi implementer MM (modify Memory). R devient DR (display Register), pour suivre la logique de DP, DM et DI. * Ajoute une commande Execute Memory: EM addr n * La gestion des chaines de caracteres se fait maintenant uniquement avec des variables de type STRING, selon le C++. * Enleve variables i,j,k et inputcars dans le main. * Modifie la fonction RESET pour quelle n'affiche pas les registres au demarrage... ca faisait pas beau! Ajoute cependant un message pour dire que le up est resette. * Pour changer un registre, on doit entrer PC (et non p) ainsi que SP (et non seulement s). * Ajoute une fonction qui convertit une chaine de caracteres en majuscules. 1999-03-19 Jonathan St-Andre * Fonction reset51() ajoutee dans cpu8051.cpp, reset() ajoutee dans main.cpp. * Commande "Z" fait un reset du processeur sur la console et le bouton Reset fonctionne dans le GUI. Jimmy Ringuette * Les interruptions sont maintenant implementees. check_hardware() a ete supprimee et Do_timers() est appelee directement de exec8051(). 1999-03-18 Hugo Villeneuve * Modifie l'entree des commandes pour gerer un peu plus les erreurs de syntaxe (je n'ai pas fini, il y a encore de la job a faire pour mettre ca error proof). * Simplifie l'entree des parametres pour chacune des fonctions. * Re-modifie l'instruction trace pour avoir seulement deux modes: trace a adresse et trace 1 instruction. Cela simplifie l'entree de la commande (on n'a pas a faire TA, qui n'est pas une commande standard dans les emulateurs). Si on veut faire tracer pour plusieurs instructions, alors il suffira d'implementer la commande EXECUTE Nombre_instructions, ce qui est beaucoup plus logique et c'est ce qu'on retrouve dans la plupart des emulateurs. * Ajoute la description des commandes en francais (loi 101). 1999-03-18 Jonathan St-Andre * Le bouton Trace dans la version Gtk+ fonctionne. On peut tracer et les 3 fenetres(registres, memoire, programme) se mettent a jour. * Ajout de 2 nouvelles fonctions trace : "tracenb()" et "traceat()" Qui, respectivement, prenent un nombre d'instruction a executer ou une adresse ou commencer l'execution. La fonction trace() a ete resimplifiee. * Dans les instructions RET, RETI, LCALL, PUSH et POP la pile prend la iram seulement pour les adresses sous 0x80, la data RAM est utilisee autrement. Avant, les SFR se faisaient ecraser! * Modes d'addressage addr16, reladdr, #data16 modifies! En tenant compte de ce que Hugo avait fait remarquer ce matin : ex.: si PC++ apparait 2 fois sur une ligne, les 2 fois il repartira de la meme valeur de PC et suite a cette ligne, on se trouve avec un PC incremente 1 fois au lieu de 2. * Menu accepte maj/minuscules * Corrige bug dans "setreg", les registres peuvent vraiment etre donnes en maj/minuscules maintenant. 1999-03-17 Hugo Villeneuve * Correction de bugs relatifs a la compilation sur VC5. Dont ajout de #include . 1999-03-13 Jimmy Ringuette * Ajout des timers dans cpu8051.cpp. Il faudrait tester a fond. 1999-03-12 Jonathan St-Andre * Je crois qu'il sera plus interessant si on garde le memory dump normal dans une fenetre exterieur et dont on pourra en ouvrir plusieurs pour monitorer differents endroits de la memoire, c'est pourquoi je n'ai place que "Internal RAM" comme memory dump dans la fenetre principale. * Au demarrage, effectue un premier memory dump dans la fenetre "Internal RAM", un unasm dans "Program" et un show register dans "Registers". * Bouton Quit, menus "File -> Quit" et "Help -> About" reagissent. * Comporte maintenant 2 Makefile : Makefile.console(fonctionne sur toutes les plateformes) et Makefile.gtk(teste seulement sous Linux). * DEBUT d'interface graphique Gtk+ (ne fait qu'afficher une fenetre avec un layout tres simple), presentement je cours apres des sources de documentations.(le manuel n'est pas encore complet) 1999-03-09 Jimmy Ringuette * Regle le bug avec mul (probleme avec les bits 15-8 du resultat ne se ramenaient pas dans les bits 7-0 du registre B) * La conversion chaine->hexadecimal accepte les minuscules * Il n'est plus obligatoire d'ecrire les 4 caracteres lorsqu'il faut entrer une valeur hexadecimale. 1999-03-05 Jonathan St-Andre * Corrige un warning de compilation sous Solaris. 1999-03-04 Jonathan St-Andre * Ca execute! (presque) * Phase de corrections des bugs dans les instructions, une premiere implementation est faite pour toutes les instructions. * Ajout fonction "trace" et "dump internal memory" * Les modes d'adressage sont pratiquement termines dans les instructions. * Certaines instructions ont un debut d'implementation. * Desassembleur, bit addressable segment 00-7F -> 20.0-2F.7 1999-03-03 Jonathan St-Andre * Ajout automatique de certaines lignes de codes concernant l'adressage dans les fonctions d'instructions tres brouillon * Ajout de stub pour write_mem et read_mem, modifs dans exec8051 * Ajout de la fonction showregister() et de la commande 'r'. * Correction d'une erreur iram_mem doit etre unsigned char et non int * Note : Il y a des references a certaines parties du 8052 mais elles ne seront pas implementees. Ce n'est qu'a titre d'informations. * Ajout de #define pour faire correspondre les registres SFR avec leur adresse dans la iram. * Renomme instructions.cpp a instructions.hpp et ajout du tableau de pointeurs sur les fonctions * Ajout de la ram interne 00-FF et valeurs initiale au reset dans cpu8051.cpp avec le registre : unsigned int PC. * Ajout de cpu8051.cpp contenant exec8051() 1999-03-02 Jonathan St-Andre * Ajout de remarques dans le source * Il faudrait maintenant tester avec plusieurs programmes pour reperer les bugs. * Le desassembleur reconnait maintenant les registres du SFR (ex.: 88H est remplace par TCON, F0 par B, etc...) * Changement au desassembleur (instructions peuvent avoir jusqu'a 3 arguments ex.: CJNE R0,#data,reladdr) * La vrai instruction CJNE comporte 3 arguments il faut changer radicalement le desassembleur 1999-03-01 Jonathan St-Andre * Probleme dans opcodes.lst au niveau de l'instruction CJNE (mauvaise definition) * Tous les types d'adressages semblent fonctionner * Le desassembleur peut lire les arguments et les afficher (ex.: MOV A,#data peut devenir plus concret MOV A,#20) * Desassembleur (instructions ont 2 arguments : instleftarg et instrightarg) 1999-02-28 Jonathan St-Andre * Charge un fichier .hex donne en parametre (format Intel Hexadecimal produit par ASM51) * Effectue le dump program memory et dump data memory * On peut quitter (YEAH!) * Affiche le menu * Creation de opcodes.lst et script Perl pour l'interpreter * Debut emu8051-1.1.1/COPYING0000644000175000017500000004311011653065330010573 00000000000000 GNU GENERAL PUBLIC LICENSE Version 2, June 1991 Copyright (C) 1989, 1991 Free Software Foundation, Inc. 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. Preamble The licenses for most software are designed to take away your freedom to share and change it. By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users. This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. (Some other Free Software Foundation software is covered by the GNU Library General Public License instead.) You can apply it to your programs, too. When we speak of free software, we are referring to freedom, not price. Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish), that you receive source code or can get it if you want it, that you can change the software or use pieces of it in new free programs; and that you know you can do these things. To protect your rights, we need to make restrictions that forbid anyone to deny you these rights or to ask you to surrender the rights. These restrictions translate to certain responsibilities for you if you distribute copies of the software, or if you modify it. For example, if you distribute copies of such a program, whether gratis or for a fee, you must give the recipients all the rights that you have. You must make sure that they, too, receive or can get the source code. And you must show them these terms so they know their rights. We protect your rights with two steps: (1) copyright the software, and (2) offer you this license which gives you legal permission to copy, distribute and/or modify the software. Also, for each author's protection and ours, we want to make certain that everyone understands that there is no warranty for this free software. If the software is modified by someone else and passed on, we want its recipients to know that what they have is not the original, so that any problems introduced by others will not reflect on the original authors' reputations. Finally, any free program is threatened constantly by software patents. We wish to avoid the danger that redistributors of a free program will individually obtain patent licenses, in effect making the program proprietary. To prevent this, we have made it clear that any patent must be licensed for everyone's free use or not licensed at all. The precise terms and conditions for copying, distribution and modification follow. GNU GENERAL PUBLIC LICENSE TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 0. This License applies to any program or other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Public License. The "Program", below, refers to any such program or work, and a "work based on the Program" means either the Program or any derivative work under copyright law: that is to say, a work containing the Program or a portion of it, either verbatim or with modifications and/or translated into another language. (Hereinafter, translation is included without limitation in the term "modification".) Each licensee is addressed as "you". Activities other than copying, distribution and modification are not covered by this License; they are outside its scope. The act of running the Program is not restricted, and the output from the Program is covered only if its contents constitute a work based on the Program (independent of having been made by running the Program). Whether that is true depends on what the Program does. 1. You may copy and distribute verbatim copies of the Program's source code as you receive it, in any medium, provided that you conspicuously and appropriately publish on each copy an appropriate copyright notice and disclaimer of warranty; keep intact all the notices that refer to this License and to the absence of any warranty; and give any other recipients of the Program a copy of this License along with the Program. You may charge a fee for the physical act of transferring a copy, and you may at your option offer warranty protection in exchange for a fee. 2. You may modify your copy or copies of the Program or any portion of it, thus forming a work based on the Program, and copy and distribute such modifications or work under the terms of Section 1 above, provided that you also meet all of these conditions: a) You must cause the modified files to carry prominent notices stating that you changed the files and the date of any change. b) You must cause any work that you distribute or publish, that in whole or in part contains or is derived from the Program or any part thereof, to be licensed as a whole at no charge to all third parties under the terms of this License. c) If the modified program normally reads commands interactively when run, you must cause it, when started running for such interactive use in the most ordinary way, to print or display an announcement including an appropriate copyright notice and a notice that there is no warranty (or else, saying that you provide a warranty) and that users may redistribute the program under these conditions, and telling the user how to view a copy of this License. (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.) These requirements apply to the modified work as a whole. If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in themselves, then this License, and its terms, do not apply to those sections when you distribute them as separate works. But when you distribute the same sections as part of a whole which is a work based on the Program, the distribution of the whole must be on the terms of this License, whose permissions for other licensees extend to the entire whole, and thus to each and every part regardless of who wrote it. Thus, it is not the intent of this section to claim rights or contest your rights to work written entirely by you; rather, the intent is to exercise the right to control the distribution of derivative or collective works based on the Program. In addition, mere aggregation of another work not based on the Program with the Program (or with a work based on the Program) on a volume of a storage or distribution medium does not bring the other work under the scope of this License. 3. You may copy and distribute the Program (or a work based on it, under Section 2) in object code or executable form under the terms of Sections 1 and 2 above provided that you also do one of the following: a) Accompany it with the complete corresponding machine-readable source code, which must be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, b) Accompany it with a written offer, valid for at least three years, to give any third party, for a charge no more than your cost of physically performing source distribution, a complete machine-readable copy of the corresponding source code, to be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, c) Accompany it with the information you received as to the offer to distribute corresponding source code. (This alternative is allowed only for noncommercial distribution and only if you received the program in object code or executable form with such an offer, in accord with Subsection b above.) The source code for a work means the preferred form of the work for making modifications to it. For an executable work, complete source code means all the source code for all modules it contains, plus any associated interface definition files, plus the scripts used to control compilation and installation of the executable. However, as a special exception, the source code distributed need not include anything that is normally distributed (in either source or binary form) with the major components (compiler, kernel, and so on) of the operating system on which the executable runs, unless that component itself accompanies the executable. If distribution of executable or object code is made by offering access to copy from a designated place, then offering equivalent access to copy the source code from the same place counts as distribution of the source code, even though third parties are not compelled to copy the source along with the object code. 4. You may not copy, modify, sublicense, or distribute the Program except as expressly provided under this License. Any attempt otherwise to copy, modify, sublicense or distribute the Program is void, and will automatically terminate your rights under this License. However, parties who have received copies, or rights, from you under this License will not have their licenses terminated so long as such parties remain in full compliance. 5. You are not required to accept this License, since you have not signed it. However, nothing else grants you permission to modify or distribute the Program or its derivative works. These actions are prohibited by law if you do not accept this License. Therefore, by modifying or distributing the Program (or any work based on the Program), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying the Program or works based on it. 6. Each time you redistribute the Program (or any work based on the Program), the recipient automatically receives a license from the original licensor to copy, distribute or modify the Program subject to these terms and conditions. You may not impose any further restrictions on the recipients' exercise of the rights granted herein. You are not responsible for enforcing compliance by third parties to this License. 7. If, as a consequence of a court judgment or allegation of patent infringement or for any other reason (not limited to patent issues), conditions are imposed on you (whether by court order, agreement or otherwise) that contradict the conditions of this License, they do not excuse you from the conditions of this License. If you cannot distribute so as to satisfy simultaneously your obligations under this License and any other pertinent obligations, then as a consequence you may not distribute the Program at all. For example, if a patent license would not permit royalty-free redistribution of the Program by all those who receive copies directly or indirectly through you, then the only way you could satisfy both it and this License would be to refrain entirely from distribution of the Program. If any portion of this section is held invalid or unenforceable under any particular circumstance, the balance of the section is intended to apply and the section as a whole is intended to apply in other circumstances. It is not the purpose of this section to induce you to infringe any patents or other property right claims or to contest validity of any such claims; this section has the sole purpose of protecting the integrity of the free software distribution system, which is implemented by public license practices. Many people have made generous contributions to the wide range of software distributed through that system in reliance on consistent application of that system; it is up to the author/donor to decide if he or she is willing to distribute software through any other system and a licensee cannot impose that choice. This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License. 8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License. 9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. Copyright (C) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker. , 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License.