debian/0000755000000000000000000000000012066036043007166 5ustar debian/libfpga0.dirs0000644000000000000000000000001012057773142011534 0ustar usr/lib debian/fpgatools.install0000644000000000000000000000003612057773142012563 0ustar usr/bin/bit2fp usr/bin/fp2bit debian/clean.sh0000644000000000000000000000344412057773142010621 0ustar #!/bin/sh # Clean up after a failed build. # # Requires access to .gitignore files excluding _all_ modified files. # # Requires a working /dev/fd (with more than just /dev/fd/0 and 1) # or gawk. set -e splitgitignore='#!/usr/bin/awk !/^#/ && !/^$/ { glob = /[[*?]/; directory = /\/$/; sub(/\/$/, ""); anchored = /\//; sub(/^\//, ""); output = "nonexistent/nonsense"; if (anchored) { if (!directory && !glob) output = "/dev/fd/1"; else if (directory && !glob) output = "/dev/fd/3"; else if (!directory && glob) output = "/dev/fd/4"; else if (directory && glob) output = "/dev/fd/5"; } else { if (!directory) output = "/dev/fd/6"; else output = "/dev/fd/7"; } print >> output; } ' offlimits="-type d -name '.*' -prune -o -type d -name debian -prune" remove_file_globs() { while read glob do eval "rm -f $glob" done } remove_directory_globs() { while read glob do eval "rm -fr $glob" done } remove_file_findpatterns() { while read pat do find . $offlimits -o \ '(' -name "$pat" -execdir rm -f '{}' + ')' done } remove_directory_findpatterns() { while read pat do find . $offlimits -o \ '(' -type d -name "$pat" -execdir rm -fr '{}' + ')' done } find . $offlimits -o '(' -name .gitignore -print ')' | while read file do ( cd "$(dirname "$file")" # Dispatch using pipes. Yuck. { { { { { awk "$splitgitignore" | { # anchored files (globless) xargs -d '\n' rm -f } } 3>&1 >&2 | { # anchored directories (globless) xargs -d '\n' rm -fr } } 4>&1 >&2 | { # anchored files remove_file_globs } } 5>&1 >&2 | { # anchored directories remove_directory_globs } } 6>&1 >&2 | { # unanchored files remove_file_findpatterns } } 7>&1 >&2 | { remove_directory_findpatterns } >&2 ) < "$file" done debian/source/0000755000000000000000000000000012057773142010476 5ustar debian/source/format0000644000000000000000000000001412057773142011704 0ustar 3.0 (quilt) debian/changelog0000644000000000000000000000032212057773142011045 0ustar fpgatools (0.0+201212-1) unstable; urgency=low * New snapshot, taken from commit f4b5b89 * Initial release. (Closes: #686949) -- Xiangfu Liu Tue, 14 Aug 2012 10:03:41 +0800 debian/rules0000755000000000000000000000144512057773142010262 0ustar #!/usr/bin/make -f # This file is in the public domain. # You may freely use, modify, distribute, and relicense it. # Uncomment this to turn on verbose mode. #export DH_VERBOSE=1 DPKG_EXPORT_BUILDFLAGS = 1 include /usr/share/dpkg/buildflags.mk export PREFIX=/usr %: dh $@ override_dh_auto_build: $(MAKE) fp2bit bit2fp override_dh_auto_clean: $(MAKE) clean sh debian/clean.sh override_dh_installchangelogs: dpkg-parsechangelog --format rfc822 --all | \ awk -f debian/changelog.upstream.awk dh_installchangelogs debian/changelog.upstream # Remove auto test for fast develop # will include auto_test in the end override_dh_auto_test: REPO = git://github.com/Wolfgang-Spraul/fpgatools.git BRANCH = master get-orig-source: REPO='$(REPO)' BRANCH='$(BRANCH)' \ sh ./debian/get-orig-source.sh debian/changelog.upstream.awk0000644000000000000000000000537512057773142013502 0ustar #!/bin/awk -f # Generate debian/changelog.upstream from debian/changelog and # the git revision log. Inspired by Gerrit Pape’s # debian/changelog.upstream.sh, from the git-core Debian package. # # Requires a working /dev/stderr. # # Usage: # dpkg-parsechangelog --format rfc822 --all | # awk -f debian/changelog.upstream.awk # If argument matches /^Version: /, return remaining text. # Result is nonempty if and only if argument matches. function version_line(line) { if (line ~ /^Version: /) { sub(/^Version: /, "", line); return line; } return ""; } # If argument matches /^\*.* from commit /, return remaining text. # Result is nonempty if and only if argument matches. function commit_id_line(line) { if (line ~ / from commit /) { sub(/^.* from commit /, "", line); sub(/[(][Cc]loses.*/, "", line); sub(/[^0-9a-f]*$/, "", line); return line; } return ""; } # Read standard input, scanning for a changelog entry of the # form “* New snapshot, taken from commit .” # Result is . # Result is empty and writes a message to standard error if no such entry is # found before the next Version: line with a different upstream # version (or EOF). # Argument is the upstream version sought. function read_commit_id(upstream, line,version,corresponding_upstream,commit) { while (getline line) { version = version_line(line); corresponding_upstream = version; sub(/-[^-]*$/, "", corresponding_upstream); if (version != "" && corresponding_upstream != upstream) break; commit = commit_id_line(line); if (commit != "") return commit; } print "No commit id for " upstream >> "/dev/stderr"; return ""; } BEGIN { last = "none"; last_cid = "none"; cl = "debian/changelog.upstream"; } # Add a list of all revisions up to last to debian/changelog.upstream # and set last = new_cid. # new is a user-readable name for the commit new_cide. function add_version(new,new_cid, limiter,versionline,command,line) { if (last == "none") { printf "" > cl; last = new; last_cid = new_cid; return 0; } if (new == "none") { versionline = "Version " last; limiter = ""; } else { versionline = "Version " last "; changes since " new ":"; limiter = new_cid ".."; } print versionline >> cl; gsub(/./, "-", versionline); print versionline >> cl; print "" >> cl; command = "git shortlog \"" limiter last_cid "\""; while(command | getline line) print line >> cl; if (new != "none") print "" >> cl; last = new; last_cid = new_cid; } { version = version_line($0); if (version != "") { # strip Debian revision upstream_version = version; sub(/-[^-]*$/, "", upstream_version); commit = read_commit_id(upstream_version); if (commit == "") exit 1; add_version(upstream_version, commit); } } END { add_version("none", "none"); } debian/fpgatools.manpages0000644000000000000000000000003212057773142012704 0ustar doc/bit2fp.1 doc/fp2bit.1 debian/libfpga0.install0000644000000000000000000000002612057773142012250 0ustar usr/lib/libfpga*.so.* debian/libfpga-dev.install0000644000000000000000000000004412057773142012744 0ustar usr/include/*.h usr/lib/libfpga*.so debian/get-orig-source.sh0000644000000000000000000000166012057773142012550 0ustar #!/bin/sh # Build a tarball from the latest upstream version, with a nice # version number. # # Requires git 1.6.6 or later, GNU date, and gzip. set -e if ! which git; then echo "Please install the git version control system to retrieve source code." exit -1 fi : ${REPO=git://github.com/Wolfgang-Spraul/fpgatools.git} : ${BRANCH=remotes/origin/master} mkdir debian-orig-source trap 'rm -fr debian-orig-source || exit 1' EXIT git init -q debian-orig-source GIT_DIR=$(pwd)/debian-orig-source/.git export GIT_DIR # Fetch latest upstream version. git fetch -q "$REPO" "$BRANCH" # Determine version number. release=0.0 date=$(date --utc --date="$(git log -1 --pretty=format:%cD FETCH_HEAD)" "+%Y%m") upstream_version="${release}+${date}" # Generate tarball. echo "packaging $(git rev-parse --short FETCH_HEAD)" git archive --format=tar --prefix="fpgatools-${date}/" FETCH_HEAD | gzip -n -9 >"fpgatools_$upstream_version.orig.tar.gz" debian/compat0000644000000000000000000000000212057773142010374 0ustar 9 debian/fpgatools.dirs0000644000000000000000000000001012057773142012046 0ustar usr/bin debian/README.source0000644000000000000000000000056512057773142011363 0ustar This Debian package is developed in a Git repository. to build from a git checkout: debian/rules get-orig-source # take commit from debian/changelog mv fpgatools_0.0+*.orig.tar.gz .. debuild A quick how to generate symbols file: dpkg-gensymbols -plibfpga0 | patch -p0 mv new_symbol_file debian/libfpga0.symbols perl -pi -e 's/-\d.*//' debian/libfpga0.symbols debian/changelog.upstream0000644000000000000000000002515312057773342012717 0ustar Version 0.0+201212 ------------------ Wolfgang Spraul (215): parse .bit header strings minor README update added header and (some) command parsing first steps small improvement in frame structure a little more memory dumping, not satisfied with hacking speed a little more beauty giselle learned a little about the I/O pins tiny svg steps shorten the output a little, make it more readable added some boolean algebra (part I) finished lut equiv. schematic css added quine-mccluskey algo, still open: petrick's method, xor, others? ramb16 cleanup, going public domain, see unlicense.org cleaner ramb16 inst little more ramb16 cleanup. next: two-pass frame handling, better support for compressed bitstreams incremental commit, some refactoring committing a bit more frequently because my HDD clicks strangely and replacement only arrives tomorrow... minor cleanup, bug fixes finished frame cleanup. tomorrow: back to clb, then other primitives. initial lut support minor lut fix a little DSP support, lots of reading and thinking ran into a wall with routing drawings, starting a C model of the chip working on C model finished top, bottom and center - left and right missing started modeling left side of chip finished first round in tile modeling - next back to semiconductor devices and routing moved model into separate file so multiple utils can use it added new stub util new_floorplan added simple hashed string array for tile and wire names minor model cleanup modeled first line - NN2 minor README update another small wire segment modeled modeling wires, about 0.7% of them done wires wires wires 1.1% modeling wires wires first steps in logic wires cleanup, wires, new_fp prints static connections small sort order fix some dcm and pll wiring tile positioning cleanup p1 finished tile positioning cleanup started with global clock wiring wires left and right working more powerful hashed string array, high-speed search and replace utility hstrrep added small text utilities hstrrep, sort_seq and merge_seq cleanup, fixes, some gclk vertical wiring moving functions around a little finished gclk some bram, macc and logic ports a few more ports wrote pair2net utility to build nets out of connection pairs cleanup, some more devices a little switch infrastructure better tools, a bit of logicout wiring a few more devices NN4 SS4 some work around switches first steps in logicin routing finished logicin switches finished logicout switches more logicin switching more switches more switches ports IO connections more term connections term pcice connections broke up the 5000 line model.c into 7 sub-files gfan, clk, sr, logic carry IO switches switches iologic switches logic switches higher-level compiler warnings - thanks to Werner! planning some libs: model, bits, floorplan, control, test starting with auto-tester autotester very first steps in autotester Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools minor iob work don't stop me now autotester minor cleanup added bit2fp stub clarification make bit2txt output a bit more readable autotester, iob pinwire fixes added 2 switch and conn helper functions autotest stub logicio switches merged bit2txt into bit2fp first steps in fp2bit, header and regs worked on fp2bit, will breakup bits.c into 2 files next... broke bits.c into 2 separate files bit_regs.c and bit_frames.c bit2fp cleanup working in model, 0.1% README update with some TODO plans minor README update minor README update minor README update slow day some switch work autotest, minor fixes all over cleanup minor routing improvement tile and x-coord flag cleanup logic block and logicin ports a little more routing enabling a few switches switches, but hit a dead end, have to work on nets... pinwire cleanup pinwire cleanup minor devidx cleanup, net preparation some net helper functions minor floorplan fixes net cleanup minor fixes, slow Sunday... cleanup, fixes, renames/reorg - messy but committed to set base for next steps... better routing from and to logic block minor testing and lut fixes, merge_log.sh helper script what a mess, this can only be the first step... minor testing additions - next: big autotest cleanup autotest cleanup better autotest framework, make test slightly improved switch design, preparing for switch device started with routing switches Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools more logic config Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools a little iologic switch work intro paragraph a few more short north and south wires, autotester switch cleanup more switches more switches Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools finished modeling routing switchbox (2nd version) moved switchbox to parts.c, cleanup switch cleanup - nice code savings! renamed fpga_net to fnet, added hello_world continued in hello_world.c hello world minor improvement improving hello_world a little more iob support minor lut work disable auto-crc by default better iologic switch support improved iob config fixed minor iob bugs, improved iob_cfg test added mini-jtag for configuration changelog update TODO update improved testing Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools forgot added blinking_led preparing for some more lut work added lut_encoding tests Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools support IO standards LVCMOS 33/25/18/15/12, LVTTL Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools lut cleanup and support for more cases - unfinished Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools improved logic testing better support for latches more logic and lut configuration work cleanup and improvement of logic configuration continued on blinking_led.c fixed some pad names carry chain fixes several bug fixes more work in iologic switches, minor fixes minor pieces here and there, a little lost right now... carry chain fixes, devices, bram and macc switches more switch work some more switches forgot one header line... LINKS cleanup some work on horizontal wiring worked on directional wires more dirwire modeling wire work more wires pcice wires wires - more to come worked on wires of all kinds some more pll lock, ioclk wires and cleanup error handling improvement switches minor cleanup speed optimization for connections Merge branch 'master' of github.com:Wolfgang-Spraul/fpgatools minor 5% speed improvement in building model started with clock routing more clock routing more clock routing more clock routing improved switches more logic device cases routing improvements more routing more routing work blinking_led verified blinking_led cmdline params Wolfgang-Spraul (1): Merge pull request #2 from minux/mine Xiangfu (53): using pkg-config for libxml-2.0 cflags etc Makefile: add install/uninstall rules files for debian package add an empty man page file add REAME for build debian package, small cleanup Makefile: add verbosity control ignore error on rmdir only install fp2bit and bit2fp on fpgatools debian: report a ITP bug for fpgatools package create static lib files: libfpga-bit.a libfpga-control.a libfpga-cores.a libfpga-floorplan.a libfpga-model.a add simple man page for bit2fp and fp2bit debian: fix man page add libs package debian: some update on description Makefile: add automatic dependencies Makefile: build .so instead of .a libs makefile: include dev files debian: remove empty -doc package, we can add it later .gitignore: update Makefile: forget bit.h create a subfolder for libs remove rpath after install, add libs version debian: update manpages path libs: remove all files when uninstall debian: update ocommit for get-orig-source using bash in Makefile mini-jtag: using macros on clean mini-jtag: include ../Makefile.common, fix some warnings mini-jtag: update usage() mini-jtag: load bitstream from stdin mini-jtag: small cleanup on parameters, add rev_dump for remove duplicate code" mini-jtag: add test-hello_world fix warnings mini-jtag: remove globle buf, use independent out buffer mini-jtag: code style clean up mini-jtag: split shift_dr/ir function mini-jtag: more code on readreg mini-jtag: add test all rule mini-jtag: finish readreg mini-jtag: load bits file does not require JPROGRAM instruction fix load not working with xc6slx45 mini-jtag: replace atoi with strtol debian: update to latest commit install: only depends on fp2bit and bit2fp update libs/Makefile for debian packaging debian: more works on libfpga and fpgatools depends debian: remove debian/ from fpgatools upstream move libxml depends to draw_svg_tiles target fix no format arguments warnings debian package build system will mark this as error add CPPFLAGS and LDFALGS, run chrpath on .so files libs/Makefile: more lib version works libs: cleanup clean/install/uninstall mini-jtag: reset board before load config bits file mini-jtag: reset board before load config bits file fix snprintf no format arguments warnings minux (5): Makefile.common: change -Ofast to -O2 for compat. *.sh: use "/usr/bin/env bash" shebang line libs, mini-jtag: fix two typos Makefile.common: don't export CC, AR, ... to sub-make libs/bit.h: compat. change for embedded anonymous union debian/copyright0000644000000000000000000000170612057773142011135 0ustar This work was packaged for Debian by: Xiangfu Liu on Tue, 14 Aug 2012 10:57:14 +0800 It was downloaded from: https://github.com/Wolfgang-Spraul/fpgatools Upstream Author: Wolfgang Spraul Copyright: Copyright 2012 by Wolfgang Spraul License: THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. For more information, please refer to The Debian packaging is: Copyright (C) 2012 Xiangfu Liu and is released into the public domain. debian/libfpga0.lintian-overrides0000644000000000000000000000005412057773142014241 0ustar libfpga0: package-name-doesnt-match-sonames debian/libfpga-dev.dirs0000644000000000000000000000002412057773142012235 0ustar usr/lib usr/include debian/control0000644000000000000000000000361012066035604010573 0ustar Source: fpgatools Section: electronics Priority: extra Maintainer: Xiangfu Liu Build-Depends: debhelper (>= 9), dpkg-dev (>= 1.16.1~), bash (>= 4), chrpath (>= 0.13) Standards-Version: 3.9.4 DM-Upload-Allowed: yes Homepage: https://github.com/Wolfgang-Spraul/fpgatools Vcs-Git: git://github.com/Wolfgang-Spraul/fpgatools.git Vcs-Browser: https://github.com/Wolfgang-Spraul/fpgatools Package: libfpga0 Architecture: any Section: libs Depends: ${shlibs:Depends}, ${misc:Depends} Description: libraries of fpgatools fpgatools is a toolchain to program field-programmable gate arrays (FPGA). The only supported chip at this time is the xc6slx9, a cheap but powerful 45nm-generation chip with about 2400 LUTs, block ram and multiply-accumulate devices. . This package provides a shared library for small independent command line utilities contributing to the fpgatools. * plain C, no C++ * simple Makefiles * text-based file formats * automatic test suite Package: libfpga-dev Architecture: any Section: libdevel Depends: libfpga0 (= ${binary:Version}), ${misc:Depends} Description: development files for fpgatools fpgatools is a toolchain to program field-programmable gate arrays (FPGA). The only supported chip at this time is the xc6slx9, a cheap but powerful 45nm-generation chip with about 2400 LUTs, block ram and multiply-accumulate devices. . This package contains headers and libraries for developing bits file that makes use of libfpga. Package: fpgatools Section: utils Architecture: any Depends: ${shlibs:Depends}, ${misc:Depends}, libfpga0 (= ${binary:Version}) Description: tool to program field-programmable gate arrays fpgatools is a toolchain to program field-programmable gate array (FPGA). The only supported chip at this time is the xc6slx9, a cheap but powerful 45nm-generation chip with about 2400 LUTs, block ram and multiply-accumulate devices.