libsigrokdecode-0.5.0/0000755000175000017500000000000013117367246011660 500000000000000libsigrokdecode-0.5.0/instance.c0000644000175000017500000010642213117366227013553 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2010 Uwe Hermann * Copyright (C) 2012 Bert Vermeulen * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #include #include "libsigrokdecode-internal.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */ #include "libsigrokdecode.h" #include #include #include #include /** @cond PRIVATE */ extern SRD_PRIV GSList *sessions; /* module_sigrokdecode.c */ extern SRD_PRIV PyObject *srd_logic_type; static void srd_inst_join_decode_thread(struct srd_decoder_inst *di); static void srd_inst_reset_state(struct srd_decoder_inst *di); SRD_PRIV void oldpins_array_free(struct srd_decoder_inst *di); /** @endcond */ /** * @file * * Decoder instance handling. */ /** * @defgroup grp_instances Decoder instances * * Decoder instance handling. * * @{ */ /** * Set one or more options in a decoder instance. * * Handled options are removed from the hash. * * @param di Decoder instance. * @param options A GHashTable of options to set. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.1.0 */ SRD_API int srd_inst_option_set(struct srd_decoder_inst *di, GHashTable *options) { struct srd_decoder_option *sdo; PyObject *py_di_options, *py_optval; GVariant *value; GSList *l; double val_double; gint64 val_int; int ret; const char *val_str; if (!di) { srd_err("Invalid decoder instance."); return SRD_ERR_ARG; } if (!options) { srd_err("Invalid options GHashTable."); return SRD_ERR_ARG; } if (!PyObject_HasAttrString(di->decoder->py_dec, "options")) { /* Decoder has no options. */ if (g_hash_table_size(options) == 0) { /* No options provided. */ return SRD_OK; } else { srd_err("Protocol decoder has no options."); return SRD_ERR_ARG; } return SRD_OK; } ret = SRD_ERR_PYTHON; py_optval = NULL; /* * The 'options' tuple is a class variable, but we need to * change it. Changing it directly will affect the entire class, * so we need to create a new object for it, and populate that * instead. */ if (!(py_di_options = PyObject_GetAttrString(di->py_inst, "options"))) goto err_out; Py_DECREF(py_di_options); py_di_options = PyDict_New(); PyObject_SetAttrString(di->py_inst, "options", py_di_options); for (l = di->decoder->options; l; l = l->next) { sdo = l->data; if ((value = g_hash_table_lookup(options, sdo->id))) { /* A value was supplied for this option. */ if (!g_variant_type_equal(g_variant_get_type(value), g_variant_get_type(sdo->def))) { srd_err("Option '%s' should have the same type " "as the default value.", sdo->id); goto err_out; } } else { /* Use default for this option. */ value = sdo->def; } if (g_variant_is_of_type(value, G_VARIANT_TYPE_STRING)) { val_str = g_variant_get_string(value, NULL); if (!(py_optval = PyUnicode_FromString(val_str))) { /* Some UTF-8 encoding error. */ PyErr_Clear(); srd_err("Option '%s' requires a UTF-8 string value.", sdo->id); goto err_out; } } else if (g_variant_is_of_type(value, G_VARIANT_TYPE_INT64)) { val_int = g_variant_get_int64(value); if (!(py_optval = PyLong_FromLong(val_int))) { /* ValueError Exception */ PyErr_Clear(); srd_err("Option '%s' has invalid integer value.", sdo->id); goto err_out; } } else if (g_variant_is_of_type(value, G_VARIANT_TYPE_DOUBLE)) { val_double = g_variant_get_double(value); if (!(py_optval = PyFloat_FromDouble(val_double))) { /* ValueError Exception */ PyErr_Clear(); srd_err("Option '%s' has invalid float value.", sdo->id); goto err_out; } } if (PyDict_SetItemString(py_di_options, sdo->id, py_optval) == -1) goto err_out; /* Not harmful even if we used the default. */ g_hash_table_remove(options, sdo->id); } if (g_hash_table_size(options) != 0) srd_warn("Unknown options specified for '%s'", di->inst_id); ret = SRD_OK; err_out: Py_XDECREF(py_optval); if (PyErr_Occurred()) { srd_exception_catch("Stray exception in srd_inst_option_set()"); ret = SRD_ERR_PYTHON; } return ret; } /* Helper GComparefunc for g_slist_find_custom() in srd_inst_channel_set_all() */ static gint compare_channel_id(const struct srd_channel *pdch, const char *channel_id) { return strcmp(pdch->id, channel_id); } /** * Set all channels in a decoder instance. * * This function sets _all_ channels for the specified decoder instance, i.e., * it overwrites any channels that were already defined (if any). * * @param di Decoder instance. * @param new_channels A GHashTable of channels to set. Key is channel name, * value is the channel number. Samples passed to this * instance will be arranged in this order. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.4.0 */ SRD_API int srd_inst_channel_set_all(struct srd_decoder_inst *di, GHashTable *new_channels) { GVariant *channel_val; GList *l; GSList *sl; struct srd_channel *pdch; int *new_channelmap, new_channelnum, num_required_channels, i; char *channel_id; srd_dbg("Setting channels for instance %s with list of %d channels.", di->inst_id, g_hash_table_size(new_channels)); if (g_hash_table_size(new_channels) == 0) /* No channels provided. */ return SRD_OK; if (di->dec_num_channels == 0) { /* Decoder has no channels. */ srd_err("Protocol decoder %s has no channels to define.", di->decoder->name); return SRD_ERR_ARG; } new_channelmap = g_malloc(sizeof(int) * di->dec_num_channels); /* * For now, map all indexes to channel -1 (can be overridden later). * This -1 is interpreted as an unspecified channel later. */ for (i = 0; i < di->dec_num_channels; i++) new_channelmap[i] = -1; for (l = g_hash_table_get_keys(new_channels); l; l = l->next) { channel_id = l->data; channel_val = g_hash_table_lookup(new_channels, channel_id); if (!g_variant_is_of_type(channel_val, G_VARIANT_TYPE_INT32)) { /* Channel name was specified without a value. */ srd_err("No channel number was specified for %s.", channel_id); g_free(new_channelmap); return SRD_ERR_ARG; } new_channelnum = g_variant_get_int32(channel_val); if (!(sl = g_slist_find_custom(di->decoder->channels, channel_id, (GCompareFunc)compare_channel_id))) { /* Fall back on optional channels. */ if (!(sl = g_slist_find_custom(di->decoder->opt_channels, channel_id, (GCompareFunc)compare_channel_id))) { srd_err("Protocol decoder %s has no channel " "'%s'.", di->decoder->name, channel_id); g_free(new_channelmap); return SRD_ERR_ARG; } } pdch = sl->data; new_channelmap[pdch->order] = new_channelnum; srd_dbg("Setting channel mapping: %s (index %d) = channel %d.", pdch->id, pdch->order, new_channelnum); } srd_dbg("Final channel map:"); num_required_channels = g_slist_length(di->decoder->channels); for (i = 0; i < di->dec_num_channels; i++) { srd_dbg(" - index %d = channel %d (%s)", i, new_channelmap[i], (i < num_required_channels) ? "required" : "optional"); } /* Report an error if not all required channels were specified. */ for (i = 0; i < num_required_channels; i++) { if (new_channelmap[i] != -1) continue; pdch = g_slist_nth(di->decoder->channels, i)->data; srd_err("Required channel '%s' (index %d) was not specified.", pdch->id, i); return SRD_ERR; } g_free(di->dec_channelmap); di->dec_channelmap = new_channelmap; return SRD_OK; } /** * Create a new protocol decoder instance. * * @param sess The session holding the protocol decoder instance. * @param decoder_id Decoder 'id' field. * @param options GHashtable of options which override the defaults set in * the decoder class. May be NULL. * * @return Pointer to a newly allocated struct srd_decoder_inst, or * NULL in case of failure. * * @since 0.3.0 */ SRD_API struct srd_decoder_inst *srd_inst_new(struct srd_session *sess, const char *decoder_id, GHashTable *options) { int i; struct srd_decoder *dec; struct srd_decoder_inst *di; char *inst_id; i = 1; srd_dbg("Creating new %s instance.", decoder_id); if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return NULL; } if (!(dec = srd_decoder_get_by_id(decoder_id))) { srd_err("Protocol decoder %s not found.", decoder_id); return NULL; } di = g_malloc0(sizeof(struct srd_decoder_inst)); di->decoder = dec; di->sess = sess; if (options) { inst_id = g_hash_table_lookup(options, "id"); if (inst_id) di->inst_id = g_strdup(inst_id); g_hash_table_remove(options, "id"); } /* Create a unique instance ID (as none was provided). */ if (!di->inst_id) { di->inst_id = g_strdup_printf("%s-%d", decoder_id, i++); while (srd_inst_find_by_id(sess, di->inst_id)) { g_free(di->inst_id); di->inst_id = g_strdup_printf("%s-%d", decoder_id, i++); } } /* * Prepare a default channel map, where samples come in the * order in which the decoder class defined them. */ di->dec_num_channels = g_slist_length(di->decoder->channels) + g_slist_length(di->decoder->opt_channels); if (di->dec_num_channels) { di->dec_channelmap = g_malloc(sizeof(int) * di->dec_num_channels); for (i = 0; i < di->dec_num_channels; i++) di->dec_channelmap[i] = i; /* * Will be used to prepare a sample at every iteration * of the instance's decode() method. */ di->channel_samples = g_malloc(di->dec_num_channels); } /* Default to the initial pins being the same as in sample 0. */ di->old_pins_array = g_array_sized_new(FALSE, TRUE, sizeof(uint8_t), di->dec_num_channels); g_array_set_size(di->old_pins_array, di->dec_num_channels); memset(di->old_pins_array->data, SRD_INITIAL_PIN_SAME_AS_SAMPLE0, di->dec_num_channels); /* Create a new instance of this decoder class. */ if (!(di->py_inst = PyObject_CallObject(dec->py_dec, NULL))) { if (PyErr_Occurred()) srd_exception_catch("Failed to create %s instance", decoder_id); g_free(di->dec_channelmap); g_free(di); return NULL; } if (options && srd_inst_option_set(di, options) != SRD_OK) { g_free(di->dec_channelmap); g_free(di); return NULL; } di->condition_list = NULL; di->match_array = NULL; di->abs_start_samplenum = 0; di->abs_end_samplenum = 0; di->inbuf = NULL; di->inbuflen = 0; di->abs_cur_samplenum = 0; di->thread_handle = NULL; di->got_new_samples = FALSE; di->handled_all_samples = FALSE; di->want_wait_terminate = FALSE; /* * Strictly speaking initialization of statically allocated * condition and mutex variables (or variables allocated on the * stack) is not required, but won't harm either. Explicitly * running init() will better match subsequent clear() calls. */ g_cond_init(&di->got_new_samples_cond); g_cond_init(&di->handled_all_samples_cond); g_mutex_init(&di->data_mutex); /* Instance takes input from a frontend by default. */ sess->di_list = g_slist_append(sess->di_list, di); srd_dbg("Created new %s instance with ID %s.", decoder_id, di->inst_id); return di; } static void srd_inst_join_decode_thread(struct srd_decoder_inst *di) { if (!di) return; if (!di->thread_handle) return; srd_dbg("%s: Joining decoder thread.", di->inst_id); /* * Terminate potentially running threads which still * execute the decoder instance's decode() method. */ srd_dbg("%s: Raising want_term, sending got_new.", di->inst_id); g_mutex_lock(&di->data_mutex); di->want_wait_terminate = TRUE; g_cond_signal(&di->got_new_samples_cond); g_mutex_unlock(&di->data_mutex); srd_dbg("%s: Running join().", di->inst_id); (void)g_thread_join(di->thread_handle); srd_dbg("%s: Call to join() done.", di->inst_id); di->thread_handle = NULL; /* * Reset condition and mutex variables, such that next * operations on them will find them in a clean state. */ g_cond_clear(&di->got_new_samples_cond); g_cond_init(&di->got_new_samples_cond); g_cond_clear(&di->handled_all_samples_cond); g_cond_init(&di->handled_all_samples_cond); g_mutex_clear(&di->data_mutex); g_mutex_init(&di->data_mutex); } static void srd_inst_reset_state(struct srd_decoder_inst *di) { if (!di) return; srd_dbg("%s: Resetting decoder state.", di->inst_id); /* * Reset internal state of the decoder. */ condition_list_free(di); match_array_free(di); di->abs_start_samplenum = 0; di->abs_end_samplenum = 0; di->inbuf = NULL; di->inbuflen = 0; di->abs_cur_samplenum = 0; oldpins_array_free(di); di->got_new_samples = FALSE; di->handled_all_samples = FALSE; di->want_wait_terminate = FALSE; /* Conditions and mutex got reset after joining the thread. */ } /** * Stack a decoder instance on top of another. * * @param sess The session holding the protocol decoder instances. * @param di_bottom The instance on top of which di_top will be stacked. * @param di_top The instance to go on top. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.3.0 */ SRD_API int srd_inst_stack(struct srd_session *sess, struct srd_decoder_inst *di_bottom, struct srd_decoder_inst *di_top) { if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return SRD_ERR_ARG; } if (!di_bottom || !di_top) { srd_err("Invalid from/to instance pair."); return SRD_ERR_ARG; } if (g_slist_find(sess->di_list, di_top)) { /* Remove from the unstacked list. */ sess->di_list = g_slist_remove(sess->di_list, di_top); } /* Stack on top of source di. */ di_bottom->next_di = g_slist_append(di_bottom->next_di, di_top); srd_dbg("Stacked %s onto %s.", di_top->inst_id, di_bottom->inst_id); return SRD_OK; } /** * Search a decoder instance and its stack for instance ID. * * @param[in] inst_id ID to search for. * @param[in] stack A decoder instance, potentially with stacked instances. * * @return The matching instance, or NULL. */ static struct srd_decoder_inst *srd_inst_find_by_id_stack(const char *inst_id, struct srd_decoder_inst *stack) { const GSList *l; struct srd_decoder_inst *tmp, *di; if (!strcmp(stack->inst_id, inst_id)) return stack; /* Otherwise, look recursively in our stack. */ di = NULL; if (stack->next_di) { for (l = stack->next_di; l; l = l->next) { tmp = l->data; if (!strcmp(tmp->inst_id, inst_id)) { di = tmp; break; } } } return di; } /** * Find a decoder instance by its instance ID. * * This will recurse to find the instance anywhere in the stack tree of the * given session. * * @param sess The session holding the protocol decoder instance. * @param inst_id The instance ID to be found. * * @return Pointer to struct srd_decoder_inst, or NULL if not found. * * @since 0.3.0 */ SRD_API struct srd_decoder_inst *srd_inst_find_by_id(struct srd_session *sess, const char *inst_id) { GSList *l; struct srd_decoder_inst *tmp, *di; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return NULL; } di = NULL; for (l = sess->di_list; l; l = l->next) { tmp = l->data; if ((di = srd_inst_find_by_id_stack(inst_id, tmp)) != NULL) break; } return di; } static struct srd_decoder_inst *srd_sess_inst_find_by_obj( struct srd_session *sess, const GSList *stack, const PyObject *obj) { const GSList *l; struct srd_decoder_inst *tmp, *di; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return NULL; } di = NULL; for (l = stack ? stack : sess->di_list; di == NULL && l != NULL; l = l->next) { tmp = l->data; if (tmp->py_inst == obj) di = tmp; else if (tmp->next_di) di = srd_sess_inst_find_by_obj(sess, tmp->next_di, obj); } return di; } /** * Find a decoder instance by its Python object. * * I.e. find that instance's instantiation of the sigrokdecode.Decoder class. * This will recurse to find the instance anywhere in the stack tree of all * sessions. * * @param stack Pointer to a GSList of struct srd_decoder_inst, indicating the * stack to search. To start searching at the bottom level of * decoder instances, pass NULL. * @param obj The Python class instantiation. * * @return Pointer to struct srd_decoder_inst, or NULL if not found. * * @private * * @since 0.1.0 */ SRD_PRIV struct srd_decoder_inst *srd_inst_find_by_obj(const GSList *stack, const PyObject *obj) { struct srd_decoder_inst *di; struct srd_session *sess; GSList *l; di = NULL; for (l = sessions; di == NULL && l != NULL; l = l->next) { sess = l->data; di = srd_sess_inst_find_by_obj(sess, stack, obj); } return di; } /** * Set the list of initial (assumed) pin values. * * @param di Decoder instance to use. Must not be NULL. * @param initial_pins A GArray of uint8_t values. Must not be NULL. * * @since 0.5.0 */ SRD_API int srd_inst_initial_pins_set_all(struct srd_decoder_inst *di, GArray *initial_pins) { int i; GString *s; if (!di) { srd_err("Invalid decoder instance."); return SRD_ERR_ARG; } if (!initial_pins) return SRD_ERR_ARG; if (initial_pins->len != (guint)di->dec_num_channels) { srd_err("Incorrect number of channels (need %d, got %d).", di->dec_num_channels, initial_pins->len); return SRD_ERR_ARG; } /* Sanity-check initial pin state values. */ for (i = 0; i < di->dec_num_channels; i++) { if (initial_pins->data[i] <= 2) continue; srd_err("Invalid initial channel %d pin state: %d.", i, initial_pins->data[i]); return SRD_ERR_ARG; } s = g_string_sized_new(100); for (i = 0; i < di->dec_num_channels; i++) { di->old_pins_array->data[i] = initial_pins->data[i]; g_string_append_printf(s, "%d, ", di->old_pins_array->data[i]); } s = g_string_truncate(s, s->len - 2); srd_dbg("Initial pins: %s.", s->str); g_string_free(s, TRUE); return SRD_OK; } /** @private */ SRD_PRIV void oldpins_array_free(struct srd_decoder_inst *di) { if (!di) return; if (!di->old_pins_array) return; srd_dbg("%s: Releasing initial pin state.", di->inst_id); g_array_free(di->old_pins_array, TRUE); di->old_pins_array = NULL; } /** @private */ SRD_PRIV int srd_inst_start(struct srd_decoder_inst *di) { PyObject *py_res; GSList *l; struct srd_decoder_inst *next_di; int ret; srd_dbg("Calling start() method on protocol decoder instance %s.", di->inst_id); /* Run self.start(). */ if (!(py_res = PyObject_CallMethod(di->py_inst, "start", NULL))) { srd_exception_catch("Protocol decoder instance %s", di->inst_id); return SRD_ERR_PYTHON; } Py_DecRef(py_res); /* Set self.samplenum to 0. */ PyObject_SetAttrString(di->py_inst, "samplenum", PyLong_FromLong(0)); /* Set self.matched to None. */ PyObject_SetAttrString(di->py_inst, "matched", Py_None); /* Start all the PDs stacked on top of this one. */ for (l = di->next_di; l; l = l->next) { next_di = l->data; if ((ret = srd_inst_start(next_di)) != SRD_OK) return ret; } return SRD_OK; } /** * Check whether the specified sample matches the specified term. * * In the case of SRD_TERM_SKIP, this function can modify * term->num_samples_already_skipped. * * @param old_sample The value of the previous sample (0/1). * @param sample The value of the current sample (0/1). * @param term The term that should be checked for a match. Must not be NULL. * * @retval TRUE The current sample matches the specified term. * @retval FALSE The current sample doesn't match the specified term, or an * invalid term was provided. * * @private */ static gboolean sample_matches(uint8_t old_sample, uint8_t sample, struct srd_term *term) { if (!term) return FALSE; switch (term->type) { case SRD_TERM_HIGH: if (sample == 1) return TRUE; break; case SRD_TERM_LOW: if (sample == 0) return TRUE; break; case SRD_TERM_RISING_EDGE: if (old_sample == 0 && sample == 1) return TRUE; break; case SRD_TERM_FALLING_EDGE: if (old_sample == 1 && sample == 0) return TRUE; break; case SRD_TERM_EITHER_EDGE: if ((old_sample == 1 && sample == 0) || (old_sample == 0 && sample == 1)) return TRUE; break; case SRD_TERM_NO_EDGE: if ((old_sample == 0 && sample == 0) || (old_sample == 1 && sample == 1)) return TRUE; break; case SRD_TERM_SKIP: if (term->num_samples_already_skipped == term->num_samples_to_skip) return TRUE; term->num_samples_already_skipped++; break; default: srd_err("Unknown term type %d.", term->type); break; } return FALSE; } /** @private */ SRD_PRIV void match_array_free(struct srd_decoder_inst *di) { if (!di || !di->match_array) return; g_array_free(di->match_array, TRUE); di->match_array = NULL; } /** @private */ SRD_PRIV void condition_list_free(struct srd_decoder_inst *di) { GSList *l, *ll; if (!di) return; for (l = di->condition_list; l; l = l->next) { ll = l->data; if (ll) g_slist_free_full(ll, g_free); } di->condition_list = NULL; } static gboolean have_non_null_conds(const struct srd_decoder_inst *di) { GSList *l, *cond; if (!di) return FALSE; for (l = di->condition_list; l; l = l->next) { cond = l->data; if (cond) return TRUE; } return FALSE; } static void update_old_pins_array(struct srd_decoder_inst *di, const uint8_t *sample_pos) { uint8_t sample; int i, byte_offset, bit_offset; if (!di || !di->dec_channelmap || !sample_pos) return; for (i = 0; i < di->dec_num_channels; i++) { byte_offset = di->dec_channelmap[i] / 8; bit_offset = di->dec_channelmap[i] % 8; sample = *(sample_pos + byte_offset) & (1 << bit_offset) ? 1 : 0; di->old_pins_array->data[i] = sample; } } static void update_old_pins_array_initial_pins(struct srd_decoder_inst *di) { uint8_t sample; int i, byte_offset, bit_offset; const uint8_t *sample_pos; if (!di || !di->dec_channelmap) return; sample_pos = di->inbuf + ((di->abs_cur_samplenum - di->abs_start_samplenum) * di->data_unitsize); for (i = 0; i < di->dec_num_channels; i++) { if (di->old_pins_array->data[i] != SRD_INITIAL_PIN_SAME_AS_SAMPLE0) continue; byte_offset = di->dec_channelmap[i] / 8; bit_offset = di->dec_channelmap[i] % 8; sample = *(sample_pos + byte_offset) & (1 << bit_offset) ? 1 : 0; di->old_pins_array->data[i] = sample; } } static gboolean term_matches(const struct srd_decoder_inst *di, struct srd_term *term, const uint8_t *sample_pos) { uint8_t old_sample, sample; int byte_offset, bit_offset, ch; if (!di || !di->dec_channelmap || !term || !sample_pos) return FALSE; /* Overwritten below (or ignored for SRD_TERM_SKIP). */ old_sample = sample = 0; if (term->type != SRD_TERM_SKIP) { ch = term->channel; byte_offset = di->dec_channelmap[ch] / 8; bit_offset = di->dec_channelmap[ch] % 8; sample = *(sample_pos + byte_offset) & (1 << bit_offset) ? 1 : 0; old_sample = di->old_pins_array->data[ch]; } return sample_matches(old_sample, sample, term); } static gboolean all_terms_match(const struct srd_decoder_inst *di, const GSList *cond, const uint8_t *sample_pos) { const GSList *l; struct srd_term *term; if (!di || !cond || !sample_pos) return FALSE; for (l = cond; l; l = l->next) { term = l->data; if (!term_matches(di, term, sample_pos)) return FALSE; } return TRUE; } static gboolean at_least_one_condition_matched( const struct srd_decoder_inst *di, unsigned int num_conditions) { unsigned int i; if (!di) return FALSE; for (i = 0; i < num_conditions; i++) { if (di->match_array->data[i]) return TRUE; } return FALSE; } static gboolean find_match(struct srd_decoder_inst *di) { static uint64_t s = 0; uint64_t i, j, num_samples_to_process; GSList *l, *cond; const uint8_t *sample_pos; unsigned int num_conditions; /* Check whether the condition list is NULL/empty. */ if (!di->condition_list) { srd_dbg("NULL/empty condition list, automatic match."); return TRUE; } /* Check whether we have any non-NULL conditions. */ if (!have_non_null_conds(di)) { srd_dbg("Only NULL conditions in list, automatic match."); return TRUE; } num_samples_to_process = di->abs_end_samplenum - di->abs_cur_samplenum; num_conditions = g_slist_length(di->condition_list); /* di->match_array is NULL here. Create a new GArray. */ di->match_array = g_array_sized_new(FALSE, TRUE, sizeof(gboolean), num_conditions); g_array_set_size(di->match_array, num_conditions); /* Sample 0: Set di->old_pins_array for SRD_INITIAL_PIN_SAME_AS_SAMPLE0 pins. */ if (di->abs_cur_samplenum == 0) update_old_pins_array_initial_pins(di); for (i = 0, s = 0; i < num_samples_to_process; i++, s++, (di->abs_cur_samplenum)++) { sample_pos = di->inbuf + ((di->abs_cur_samplenum - di->abs_start_samplenum) * di->data_unitsize); /* Check whether the current sample matches at least one of the conditions (logical OR). */ /* IMPORTANT: We need to check all conditions, even if there was a match already! */ for (l = di->condition_list, j = 0; l; l = l->next, j++) { cond = l->data; if (!cond) continue; /* All terms in 'cond' must match (logical AND). */ di->match_array->data[j] = all_terms_match(di, cond, sample_pos); } update_old_pins_array(di, sample_pos); /* If at least one condition matched we're done. */ if (at_least_one_condition_matched(di, num_conditions)) return TRUE; } return FALSE; } /** * Process available samples and check if they match the defined conditions. * * This function returns if there is an error, or when a match is found, or * when all samples have been processed (whether a match was found or not). * This function immediately terminates when the decoder's wait() method * invocation shall get terminated. * * @param di The decoder instance to use. Must not be NULL. * @param found_match Will be set to TRUE if at least one condition matched, * FALSE otherwise. Must not be NULL. * * @retval SRD_OK No errors occured, see found_match for the result. * @retval SRD_ERR_ARG Invalid arguments. * * @private */ SRD_PRIV int process_samples_until_condition_match(struct srd_decoder_inst *di, gboolean *found_match) { if (!di || !found_match) return SRD_ERR_ARG; *found_match = FALSE; if (di->want_wait_terminate) return SRD_OK; /* Check if any of the current condition(s) match. */ while (TRUE) { /* Feed the (next chunk of the) buffer to find_match(). */ *found_match = find_match(di); /* Did we handle all samples yet? */ if (di->abs_cur_samplenum >= di->abs_end_samplenum) { srd_dbg("Done, handled all samples (abs cur %" PRIu64 " / abs end %" PRIu64 ").", di->abs_cur_samplenum, di->abs_end_samplenum); return SRD_OK; } /* If we didn't find a match, continue looking. */ if (!(*found_match)) continue; /* At least one condition matched, return. */ return SRD_OK; } return SRD_OK; } /** * Worker thread (per PD-stack). * * @param data Pointer to the lowest-level PD's device instance. * Must not be NULL. * * @return NULL if there was an error. */ static gpointer di_thread(gpointer data) { PyObject *py_res; struct srd_decoder_inst *di; int wanted_term; if (!data) return NULL; di = data; srd_dbg("%s: Starting thread routine for decoder.", di->inst_id); /* * Call self.decode(). Only returns if the PD throws an exception. * "Regular" termination of the decode() method is not expected. */ Py_IncRef(di->py_inst); srd_dbg("%s: Calling decode() method.", di->inst_id); py_res = PyObject_CallMethod(di->py_inst, "decode", NULL); srd_dbg("%s: decode() method terminated.", di->inst_id); /* * Make sure to unblock potentially pending srd_inst_decode() * calls in application threads after the decode() method might * have terminated, while it neither has processed sample data * nor has terminated upon request. This happens e.g. when "need * a samplerate to decode" exception is thrown. */ g_mutex_lock(&di->data_mutex); wanted_term = di->want_wait_terminate; di->want_wait_terminate = TRUE; di->handled_all_samples = TRUE; g_cond_signal(&di->handled_all_samples_cond); g_mutex_unlock(&di->data_mutex); /* * Check for the termination cause of the decode() method. * Though this is mostly for information. */ if (!py_res && wanted_term) { /* * Silently ignore errors upon return from decode() calls * when termination was requested. Terminate the thread * which executed this instance's decode() logic. */ srd_dbg("%s: Thread done (!res, want_term).", di->inst_id); PyErr_Clear(); return NULL; } if (!py_res) { /* * The decode() invocation terminated unexpectedly. Have * the back trace printed, and terminate the thread which * executed the decode() method. */ srd_dbg("%s: decode() terminated unrequested.", di->inst_id); srd_exception_catch("Protocol decoder instance %s: ", di->inst_id); srd_dbg("%s: Thread done (!res, !want_term).", di->inst_id); return NULL; } /* * TODO: By design the decode() method is not supposed to terminate. * Nevertheless we have the thread joined, and srd backend calls to * decode() will re-start another thread transparently. */ srd_dbg("%s: decode() terminated (req %d).", di->inst_id, wanted_term); Py_DecRef(py_res); PyErr_Clear(); srd_dbg("%s: Thread done (with res).", di->inst_id); return NULL; } /** * Decode a chunk of samples. * * The calls to this function must provide the samples that shall be * used by the protocol decoder * - in the correct order ([...]5, 6, 4, 7, 8[...] is a bug), * - starting from sample zero (2, 3, 4, 5, 6[...] is a bug), * - consecutively, with no gaps (0, 1, 2, 4, 5[...] is a bug). * * The start- and end-sample numbers are absolute sample numbers (relative * to the start of the whole capture/file/stream), i.e. they are not relative * sample numbers within the chunk specified by 'inbuf' and 'inbuflen'. * * Correct example (4096 samples total, 4 chunks @ 1024 samples each): * srd_inst_decode(di, 0, 1024, inbuf, 1024, 1); * srd_inst_decode(di, 1024, 2048, inbuf, 1024, 1); * srd_inst_decode(di, 2048, 3072, inbuf, 1024, 1); * srd_inst_decode(di, 3072, 4096, inbuf, 1024, 1); * * The chunk size ('inbuflen') can be arbitrary and can differ between calls. * * Correct example (4096 samples total, 7 chunks @ various samples each): * srd_inst_decode(di, 0, 1024, inbuf, 1024, 1); * srd_inst_decode(di, 1024, 1124, inbuf, 100, 1); * srd_inst_decode(di, 1124, 1424, inbuf, 300, 1); * srd_inst_decode(di, 1424, 1643, inbuf, 219, 1); * srd_inst_decode(di, 1643, 2048, inbuf, 405, 1); * srd_inst_decode(di, 2048, 3072, inbuf, 1024, 1); * srd_inst_decode(di, 3072, 4096, inbuf, 1024, 1); * * INCORRECT example (4096 samples total, 4 chunks @ 1024 samples each, but * the start- and end-samplenumbers are not absolute): * srd_inst_decode(di, 0, 1024, inbuf, 1024, 1); * srd_inst_decode(di, 0, 1024, inbuf, 1024, 1); * srd_inst_decode(di, 0, 1024, inbuf, 1024, 1); * srd_inst_decode(di, 0, 1024, inbuf, 1024, 1); * * @param di The decoder instance to call. Must not be NULL. * @param abs_start_samplenum The absolute starting sample number for the * buffer's sample set, relative to the start of capture. * @param abs_end_samplenum The absolute ending sample number for the * buffer's sample set, relative to the start of capture. * @param inbuf The buffer to decode. Must not be NULL. * @param inbuflen Length of the buffer. Must be > 0. * @param unitsize The number of bytes per sample. Must be > 0. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @private */ SRD_PRIV int srd_inst_decode(struct srd_decoder_inst *di, uint64_t abs_start_samplenum, uint64_t abs_end_samplenum, const uint8_t *inbuf, uint64_t inbuflen, uint64_t unitsize) { PyObject *py_res; srd_logic *logic; long apiver; /* Return an error upon unusable input. */ if (!di) { srd_dbg("empty decoder instance"); return SRD_ERR_ARG; } if (!inbuf) { srd_dbg("NULL buffer pointer"); return SRD_ERR_ARG; } if (inbuflen == 0) { srd_dbg("empty buffer"); return SRD_ERR_ARG; } if (unitsize == 0) { srd_dbg("unitsize 0"); return SRD_ERR_ARG; } if (abs_start_samplenum != di->abs_cur_samplenum || abs_end_samplenum < abs_start_samplenum) { srd_dbg("Incorrect sample numbers: start=%" PRIu64 ", cur=%" PRIu64 ", end=%" PRIu64 ".", abs_start_samplenum, di->abs_cur_samplenum, abs_end_samplenum); return SRD_ERR_ARG; } di->data_unitsize = unitsize; srd_dbg("Decoding: abs start sample %" PRIu64 ", abs end sample %" PRIu64 " (%" PRIu64 " samples, %" PRIu64 " bytes, unitsize = " "%d), instance %s.", abs_start_samplenum, abs_end_samplenum, abs_end_samplenum - abs_start_samplenum, inbuflen, di->data_unitsize, di->inst_id); apiver = srd_decoder_apiver(di->decoder); if (apiver == 2) { /* * Create new srd_logic object. Each iteration around the PD's * loop will fill one sample into this object. */ logic = PyObject_New(srd_logic, (PyTypeObject *)srd_logic_type); Py_INCREF(logic); logic->di = (struct srd_decoder_inst *)di; logic->abs_start_samplenum = abs_start_samplenum; logic->itercnt = 0; logic->inbuf = (uint8_t *)inbuf; logic->inbuflen = inbuflen; logic->sample = PyList_New(2); Py_INCREF(logic->sample); Py_IncRef(di->py_inst); if (!(py_res = PyObject_CallMethod(di->py_inst, "decode", "KKO", abs_start_samplenum, abs_end_samplenum, logic))) { srd_exception_catch("Protocol decoder instance %s", di->inst_id); return SRD_ERR_PYTHON; } di->abs_cur_samplenum = abs_end_samplenum; Py_DecRef(py_res); } else { /* If this is the first call, start the worker thread. */ if (!di->thread_handle) { srd_dbg("No worker thread for this decoder stack " "exists yet, creating one: %s.", di->inst_id); di->thread_handle = g_thread_new(di->inst_id, di_thread, di); } /* Push the new sample chunk to the worker thread. */ g_mutex_lock(&di->data_mutex); di->abs_start_samplenum = abs_start_samplenum; di->abs_end_samplenum = abs_end_samplenum; di->inbuf = inbuf; di->inbuflen = inbuflen; di->got_new_samples = TRUE; di->handled_all_samples = FALSE; di->want_wait_terminate = FALSE; /* Signal the thread that we have new data. */ g_cond_signal(&di->got_new_samples_cond); g_mutex_unlock(&di->data_mutex); /* When all samples in this chunk were handled, return. */ g_mutex_lock(&di->data_mutex); while (!di->handled_all_samples && !di->want_wait_terminate) g_cond_wait(&di->handled_all_samples_cond, &di->data_mutex); g_mutex_unlock(&di->data_mutex); } return SRD_OK; } /** @private */ SRD_PRIV void srd_inst_free(struct srd_decoder_inst *di) { GSList *l; struct srd_pd_output *pdo; srd_dbg("Freeing instance %s", di->inst_id); srd_inst_join_decode_thread(di); srd_inst_reset_state(di); Py_DecRef(di->py_inst); g_free(di->inst_id); g_free(di->dec_channelmap); g_free(di->channel_samples); g_slist_free(di->next_di); for (l = di->pd_output; l; l = l->next) { pdo = l->data; g_free(pdo->proto_id); g_free(pdo); } g_slist_free(di->pd_output); g_free(di); } /** @private */ SRD_PRIV void srd_inst_free_all(struct srd_session *sess) { if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return; } g_slist_free_full(sess->di_list, (GDestroyNotify)srd_inst_free); } /** @} */ libsigrokdecode-0.5.0/error.c0000644000175000017500000000677013117366227013105 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include "libsigrokdecode.h" /** * @file * * Error handling in libsigrokdecode. */ /** * @defgroup grp_error Error handling * * Error handling in libsigrokdecode. * * libsigrokdecode functions usually return @ref SRD_OK upon success, or a * negative error code on failure. * * @{ */ /** * Return a human-readable error string for the given libsigrokdecode error * code. * * @param error_code A libsigrokdecode error code number, such as * SRD_ERR_MALLOC. * * @return A const string containing a short, human-readable (English) * description of the error, such as "memory allocation error". * The string must NOT be free'd by the caller! * * @see srd_strerror_name * * @since 0.2.0 */ SRD_API const char *srd_strerror(int error_code) { const char *str; /* * Note: All defined SRD_* error macros from libsigrokdecode.h must * have an entry in this function, as well as in srd_strerror_name(). */ switch (error_code) { case SRD_OK: str = "no error"; break; case SRD_ERR: str = "generic/unspecified error"; break; case SRD_ERR_MALLOC: str = "memory allocation error"; break; case SRD_ERR_ARG: str = "invalid argument"; break; case SRD_ERR_BUG: str = "internal error"; break; case SRD_ERR_PYTHON: str = "Python API error"; break; case SRD_ERR_DECODERS_DIR: str = "decoders directory access error"; break; default: str = "unknown error"; break; } return str; } /** * Return the "name" string of the given libsigrokdecode error code. * * For example, the "name" of the SRD_ERR_MALLOC error code is * "SRD_ERR_MALLOC", the name of the SRD_OK code is "SRD_OK", and so on. * * This function can be used for various purposes where the "name" string of * a libsigrokdecode error code is useful. * * @param error_code A libsigrokdecode error code number, such as * SRD_ERR_MALLOC. * * @return A const string containing the "name" of the error code as string. * The string must NOT be free'd by the caller! * * @see srd_strerror * * @since 0.2.0 */ SRD_API const char *srd_strerror_name(int error_code) { const char *str; /* * Note: All defined SRD_* error macros from libsigrokdecode.h must * have an entry in this function, as well as in srd_strerror(). */ switch (error_code) { case SRD_OK: str = "SRD_OK"; break; case SRD_ERR: str = "SRD_ERR"; break; case SRD_ERR_MALLOC: str = "SRD_ERR_MALLOC"; break; case SRD_ERR_ARG: str = "SRD_ERR_ARG"; break; case SRD_ERR_BUG: str = "SRD_ERR_BUG"; break; case SRD_ERR_PYTHON: str = "SRD_ERR_PYTHON"; break; case SRD_ERR_DECODERS_DIR: str = "SRD_ERR_DECODERS_DIR"; break; default: str = "unknown error code"; break; } return str; } /** @} */ libsigrokdecode-0.5.0/tests/0000755000175000017500000000000013117367246013022 500000000000000libsigrokdecode-0.5.0/tests/core.c0000644000175000017500000000603213117366227014035 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include /* First, to avoid compiler warning. */ #include #include #include "lib.h" /* * Check various basic init related things. * * - Check whether an srd_init() call with path == NULL works. * If it returns != SRD_OK (or segfaults) this test will fail. * * - Check whether a subsequent srd_exit() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_init_exit) { int ret; ret = srd_init(NULL); fail_unless(ret == SRD_OK, "srd_init() failed: %d.", ret); ret = srd_exit(); fail_unless(ret == SRD_OK, "srd_exit() failed: %d.", ret); } END_TEST /* * Check whether nested srd_init()/srd_exit() calls work/fail correctly. * Two consecutive srd_init() calls without any srd_exit() inbetween are * not allowed and should fail. However, two consecutive srd_exit() calls * are currently allowed, the second one will just be a NOP basically. */ START_TEST(test_init_exit_2) { int ret; ret = srd_init(NULL); fail_unless(ret == SRD_OK, "srd_init() 1 failed: %d.", ret); ret = srd_init(NULL); fail_unless(ret != SRD_OK, "srd_init() 2 didn't fail: %d.", ret); ret = srd_exit(); fail_unless(ret == SRD_OK, "srd_exit() 2 failed: %d.", ret); ret = srd_exit(); fail_unless(ret == SRD_OK, "srd_exit() 1 failed: %d.", ret); } END_TEST /* * Check whether three nested srd_init()/srd_exit() calls work/fail correctly. */ START_TEST(test_init_exit_3) { int ret; ret = srd_init(NULL); fail_unless(ret == SRD_OK, "srd_init() 1 failed: %d.", ret); ret = srd_init(NULL); fail_unless(ret != SRD_OK, "srd_init() 2 didn't fail: %d.", ret); ret = srd_init(NULL); fail_unless(ret != SRD_OK, "srd_init() 3 didn't fail: %d.", ret); ret = srd_exit(); fail_unless(ret == SRD_OK, "srd_exit() 3 failed: %d.", ret); ret = srd_exit(); fail_unless(ret == SRD_OK, "srd_exit() 2 failed: %d.", ret); ret = srd_exit(); fail_unless(ret == SRD_OK, "srd_exit() 1 failed: %d.", ret); } END_TEST Suite *suite_core(void) { Suite *s; TCase *tc; s = suite_create("core"); tc = tcase_create("init_exit"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_init_exit); tcase_add_test(tc, test_init_exit_2); tcase_add_test(tc, test_init_exit_3); suite_add_tcase(s, tc); return s; } libsigrokdecode-0.5.0/tests/lib.h0000644000175000017500000000176213117366227013665 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #ifndef LIBSIGROKDECODE_TESTS_LIB_H #define LIBSIGROKDECODE_TESTS_LIB_H void srdtest_setup(void); void srdtest_teardown(void); Suite *suite_core(void); Suite *suite_decoder(void); Suite *suite_inst(void); Suite *suite_session(void); #endif libsigrokdecode-0.5.0/tests/session.c0000644000175000017500000001517013117366227014573 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include /* First, to avoid compiler warning. */ #include #include #include #include #include "lib.h" /* * Check whether srd_session_new() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_new) { int ret; struct srd_session *sess; srd_init(NULL); ret = srd_session_new(&sess); fail_unless(ret == SRD_OK, "srd_session_new() failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_session_new() fails for bogus parameters. * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_new_bogus) { int ret; srd_init(NULL); ret = srd_session_new(NULL); fail_unless(ret != SRD_OK, "srd_session_new(NULL) worked."); srd_exit(); } END_TEST /* * Check whether multiple srd_session_new() calls work. * If any call returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_new_multiple) { int ret; struct srd_session *sess1, *sess2, *sess3; sess1 = sess2 = sess3 = NULL; srd_init(NULL); /* Multiple srd_session_new() calls must work. */ ret = srd_session_new(&sess1); fail_unless(ret == SRD_OK, "srd_session_new() 1 failed: %d.", ret); ret = srd_session_new(&sess2); fail_unless(ret == SRD_OK, "srd_session_new() 2 failed: %d.", ret); ret = srd_session_new(&sess3); fail_unless(ret == SRD_OK, "srd_session_new() 3 failed: %d.", ret); /* The returned session pointers must all be non-NULL. */ fail_unless(sess1 != NULL); fail_unless(sess2 != NULL); fail_unless(sess3 != NULL); /* The returned session pointers must not be the same. */ fail_unless(sess1 != sess2); fail_unless(sess1 != sess3); fail_unless(sess2 != sess3); /* Each session must have another ID than any other session. */ fail_unless(sess1->session_id != sess2->session_id); fail_unless(sess1->session_id != sess3->session_id); fail_unless(sess2->session_id != sess3->session_id); /* Destroying any of the sessions must work. */ ret = srd_session_destroy(sess1); fail_unless(ret == SRD_OK, "srd_session_destroy() 1 failed: %d.", ret); ret = srd_session_destroy(sess2); fail_unless(ret == SRD_OK, "srd_session_destroy() 2 failed: %d.", ret); ret = srd_session_destroy(sess3); fail_unless(ret == SRD_OK, "srd_session_destroy() 3 failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_session_destroy() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_destroy) { int ret; struct srd_session *sess; srd_init(NULL); srd_session_new(&sess); ret = srd_session_destroy(sess); fail_unless(ret == SRD_OK, "srd_session_destroy() failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_session_destroy() fails for bogus sessions. * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_destroy_bogus) { int ret; srd_init(NULL); ret = srd_session_destroy(NULL); fail_unless(ret != SRD_OK, "srd_session_destroy() failed: %d.", ret); srd_exit(); } END_TEST static void conf_check_ok(struct srd_session *sess, int key, uint64_t x) { int ret; ret = srd_session_metadata_set(sess, key, g_variant_new_uint64(x)); fail_unless(ret == SRD_OK, "srd_session_metadata_set(%p, %d, %" PRIu64 ") failed: %d.", sess, key, x, ret); } static void conf_check_fail(struct srd_session *sess, int key, uint64_t x) { int ret; ret = srd_session_metadata_set(sess, key, g_variant_new_uint64(x)); fail_unless(ret != SRD_OK, "srd_session_metadata_set(%p, %d, %" PRIu64 ") worked.", sess, key, x); } static void conf_check_fail_null(struct srd_session *sess, int key) { int ret; ret = srd_session_metadata_set(sess, key, NULL); fail_unless(ret != SRD_OK, "srd_session_metadata_set(NULL) for key %d worked.", key); } static void conf_check_fail_str(struct srd_session *sess, int key, const char *s) { int ret; ret = srd_session_metadata_set(sess, key, g_variant_new_string(s)); fail_unless(ret != SRD_OK, "srd_session_metadata_set() for key %d " "failed: %d.", key, ret); } /* * Check whether srd_session_metadata_set() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_metadata_set) { uint64_t i; struct srd_session *sess; srd_init(NULL); srd_session_new(&sess); /* Try a bunch of values. */ for (i = 0; i < 1000; i++) conf_check_ok(sess, SRD_CONF_SAMPLERATE, i); /* Try the max. possible value. */ conf_check_ok(sess, SRD_CONF_SAMPLERATE, UINT64_MAX); srd_session_destroy(sess); srd_exit(); } END_TEST /* * Check whether srd_session_metadata_set() fails with invalid input. * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_session_metadata_set_bogus) { struct srd_session *sess; srd_init(NULL); srd_session_new(&sess); /* Incorrect GVariant type (currently only uint64 is used). */ conf_check_fail_str(sess, SRD_CONF_SAMPLERATE, ""); conf_check_fail_str(sess, SRD_CONF_SAMPLERATE, "Foo"); /* NULL data pointer. */ conf_check_fail_null(sess, SRD_CONF_SAMPLERATE); /* NULL session. */ conf_check_fail(NULL, SRD_CONF_SAMPLERATE, 0); /* Invalid keys. */ conf_check_fail(sess, -1, 0); conf_check_fail(sess, 9, 0); conf_check_fail(sess, 123, 0); srd_session_destroy(sess); srd_exit(); } END_TEST Suite *suite_session(void) { Suite *s; TCase *tc; s = suite_create("session"); tc = tcase_create("new_destroy"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_session_new); tcase_add_test(tc, test_session_new_bogus); tcase_add_test(tc, test_session_new_multiple); tcase_add_test(tc, test_session_destroy); tcase_add_test(tc, test_session_destroy_bogus); suite_add_tcase(s, tc); tc = tcase_create("config"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_session_metadata_set); tcase_add_test(tc, test_session_metadata_set_bogus); suite_add_tcase(s, tc); return s; } libsigrokdecode-0.5.0/tests/inst.c0000644000175000017500000001104213117366227014057 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include /* First, to avoid compiler warning. */ #include #include #include "lib.h" /* * Check whether srd_inst_new() works. * If it returns NULL (or segfaults) this test will fail. */ START_TEST(test_inst_new) { struct srd_session *sess; struct srd_decoder_inst *inst; srd_init(DECODERS_TESTDIR); srd_decoder_load("uart"); srd_session_new(&sess); inst = srd_inst_new(sess, "uart", NULL); fail_unless(inst != NULL, "srd_inst_new() failed."); srd_exit(); } END_TEST /* * Check whether multiple srd_inst_new() calls work. * If any of them returns NULL (or segfaults) this test will fail. */ START_TEST(test_inst_new_multiple) { struct srd_session *sess; struct srd_decoder_inst *inst1, *inst2, *inst3; inst1 = inst2 = inst3 = NULL; srd_init(DECODERS_TESTDIR); srd_decoder_load_all(); srd_session_new(&sess); /* Multiple srd_inst_new() calls must work. */ inst1 = srd_inst_new(sess, "uart", NULL); fail_unless(inst1 != NULL, "srd_inst_new() 1 failed."); inst2 = srd_inst_new(sess, "spi", NULL); fail_unless(inst2 != NULL, "srd_inst_new() 2 failed."); inst3 = srd_inst_new(sess, "can", NULL); fail_unless(inst3 != NULL, "srd_inst_new() 3 failed."); /* The returned instance pointers must not be the same. */ fail_unless(inst1 != inst2); fail_unless(inst1 != inst3); fail_unless(inst2 != inst3); /* Each instance must have another py_inst than any of the others. */ fail_unless(inst1->py_inst != inst2->py_inst); fail_unless(inst1->py_inst != inst3->py_inst); fail_unless(inst2->py_inst != inst3->py_inst); srd_exit(); } END_TEST /* * Check whether srd_inst_option_set() works for an empty options hash. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_inst_option_set_empty) { int ret; struct srd_session *sess; struct srd_decoder_inst *inst; GHashTable *options; srd_init(DECODERS_TESTDIR); srd_decoder_load_all(); srd_session_new(&sess); inst = srd_inst_new(sess, "uart", NULL); options = g_hash_table_new_full(g_str_hash, g_str_equal, g_free, (GDestroyNotify)g_variant_unref); ret = srd_inst_option_set(inst, options); fail_unless(ret == SRD_OK, "srd_inst_option_set() with empty options " "hash failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_inst_option_set() works for bogus options. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_inst_option_set_bogus) { int ret; struct srd_session *sess; struct srd_decoder_inst *inst; GHashTable *options; srd_init(DECODERS_TESTDIR); srd_decoder_load_all(); srd_session_new(&sess); inst = srd_inst_new(sess, "uart", NULL); options = g_hash_table_new_full(g_str_hash, g_str_equal, g_free, (GDestroyNotify)g_variant_unref); /* NULL instance. */ ret = srd_inst_option_set(NULL, options); fail_unless(ret != SRD_OK, "srd_inst_option_set() with NULL " "instance failed: %d.", ret); /* NULL 'options' GHashTable. */ ret = srd_inst_option_set(inst, NULL); fail_unless(ret != SRD_OK, "srd_inst_option_set() with NULL " "options hash failed: %d.", ret); /* NULL instance and NULL 'options' GHashTable. */ ret = srd_inst_option_set(NULL, NULL); fail_unless(ret != SRD_OK, "srd_inst_option_set() with NULL " "instance and NULL options hash failed: %d.", ret); srd_exit(); } END_TEST Suite *suite_inst(void) { Suite *s; TCase *tc; s = suite_create("inst"); tc = tcase_create("new"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_inst_new); tcase_add_test(tc, test_inst_new_multiple); suite_add_tcase(s, tc); tc = tcase_create("option"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_inst_option_set_empty); tcase_add_test(tc, test_inst_option_set_bogus); suite_add_tcase(s, tc); return s; } libsigrokdecode-0.5.0/tests/main.c0000644000175000017500000000304613117366227014033 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include /* First, to avoid compiler warning. */ #include #include #include "lib.h" void srdtest_setup(void) { /* Silence libsigrokdecode while the unit tests run. */ srd_log_loglevel_set(SRD_LOG_NONE); } void srdtest_teardown(void) { } int main(void) { int ret; Suite *s; SRunner *srunner; s = suite_create("mastersuite"); srunner = srunner_create(s); /* Add all testsuites to the master suite. */ srunner_add_suite(srunner, suite_core()); srunner_add_suite(srunner, suite_decoder()); srunner_add_suite(srunner, suite_inst()); srunner_add_suite(srunner, suite_session()); srunner_run_all(srunner, CK_VERBOSE); ret = srunner_ntests_failed(srunner); srunner_free(srunner); return (ret == 0) ? EXIT_SUCCESS : EXIT_FAILURE; } libsigrokdecode-0.5.0/tests/decoder.c0000644000175000017500000003171413117366227014517 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2013 Uwe Hermann * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include /* First, to avoid compiler warning. */ #include #include #include "lib.h" /* * Check whether srd_decoder_load_all() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_load_all) { int ret; srd_init(DECODERS_TESTDIR); ret = srd_decoder_load_all(); fail_unless(ret == SRD_OK, "srd_decoder_load_all() failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_decoder_load_all() fails without prior srd_init(). * If it returns != SRD_OK (or segfaults) this test will fail. * See also: http://sigrok.org/bugzilla/show_bug.cgi?id=178 */ START_TEST(test_load_all_no_init) { int ret; ret = srd_decoder_load_all(); fail_unless(ret != SRD_OK, "srd_decoder_load_all() didn't fail properly."); } END_TEST /* * Check whether srd_decoder_load() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_load) { int ret; srd_init(DECODERS_TESTDIR); ret = srd_decoder_load("uart"); fail_unless(ret == SRD_OK, "srd_decoder_load(uart) failed: %d.", ret); ret = srd_decoder_load("spi"); fail_unless(ret == SRD_OK, "srd_decoder_load(spi) failed: %d.", ret); ret = srd_decoder_load("usb_signalling"); fail_unless(ret == SRD_OK, "srd_decoder_load(usb_signalling) failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_decoder_load() fails for non-existing or bogus PDs. * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_load_bogus) { srd_init(DECODERS_TESTDIR); /* http://sigrok.org/bugzilla/show_bug.cgi?id=176 */ fail_unless(srd_decoder_load(NULL) != SRD_OK); fail_unless(srd_decoder_load("") != SRD_OK); fail_unless(srd_decoder_load(" ") != SRD_OK); fail_unless(srd_decoder_load("nonexisting") != SRD_OK); fail_unless(srd_decoder_load("UART") != SRD_OK); fail_unless(srd_decoder_load("UaRt") != SRD_OK); fail_unless(srd_decoder_load("u a r t") != SRD_OK); fail_unless(srd_decoder_load("uart ") != SRD_OK); fail_unless(srd_decoder_load(" uart") != SRD_OK); fail_unless(srd_decoder_load(" uart ") != SRD_OK); fail_unless(srd_decoder_load("uart spi") != SRD_OK); srd_exit(); } END_TEST /* * Check whether srd_decoder_load() works/fails for valid/bogus PDs. * If it returns incorrect values (or segfaults) this test will fail. */ START_TEST(test_load_valid_and_bogus) { srd_init(DECODERS_TESTDIR); fail_unless(srd_decoder_load("") != SRD_OK); fail_unless(srd_decoder_load("uart") == SRD_OK); fail_unless(srd_decoder_load("") != SRD_OK); fail_unless(srd_decoder_load("spi") == SRD_OK); fail_unless(srd_decoder_load("") != SRD_OK); fail_unless(srd_decoder_load("can") == SRD_OK); fail_unless(srd_decoder_load("") != SRD_OK); srd_exit(); } END_TEST /* * Check whether srd_decoder_load() fails when run multiple times. * If it returns a value != SRD_OK (or segfaults) this test will fail. * See also: http://sigrok.org/bugzilla/show_bug.cgi?id=177 */ START_TEST(test_load_multiple) { int ret; srd_init(DECODERS_TESTDIR); ret = srd_decoder_load("uart"); fail_unless(ret == SRD_OK, "Loading uart PD 1x failed: %d", ret); ret = srd_decoder_load("uart"); fail_unless(ret == SRD_OK, "Loading uart PD 2x failed: %d", ret); ret = srd_decoder_load("uart"); fail_unless(ret == SRD_OK, "Loading uart PD 3x failed: %d", ret); srd_exit(); } END_TEST /* * Check whether srd_decoder_load() fails if a non-existing PD dir is used. * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_load_nonexisting_pd_dir) { #if 0 /* TODO: Build libsigrokdecode with no default PD dir. */ srd_init("/nonexisting_dir"); fail_unless(srd_decoder_load("spi") != SRD_OK); fail_unless(g_slist_length((GSList *)srd_decoder_list()) == 0); srd_exit(); #endif } END_TEST /* * Check whether srd_decoder_unload_all() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload_all) { int ret; srd_init(DECODERS_TESTDIR); ret = srd_decoder_load_all(); fail_unless(ret == SRD_OK, "srd_decoder_load_all() failed: %d.", ret); ret = srd_decoder_unload_all(); fail_unless(ret == SRD_OK, "srd_decoder_unload_all() failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_decoder_unload_all() works without prior srd_init(). * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload_all_no_init) { int ret; ret = srd_decoder_unload_all(); fail_unless(ret == SRD_OK, "srd_decoder_unload_all() failed: %d.", ret); } END_TEST /* * Check whether srd_decoder_unload_all() works multiple times. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload_all_multiple) { int ret, i; srd_init(DECODERS_TESTDIR); for (i = 0; i < 10; i++) { ret = srd_decoder_load_all(); fail_unless(ret == SRD_OK, "srd_decoder_load_all() failed: %d.", ret); ret = srd_decoder_unload_all(); fail_unless(ret == SRD_OK, "srd_decoder_unload_all() failed: %d.", ret); } srd_exit(); } END_TEST /* * Check whether srd_decoder_unload_all() works multiple times (no load). * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload_all_multiple_noload) { int ret, i; srd_init(DECODERS_TESTDIR); for (i = 0; i < 10; i++) { ret = srd_decoder_unload_all(); fail_unless(ret == SRD_OK, "srd_decoder_unload_all() failed: %d.", ret); } srd_exit(); } END_TEST /* * Check whether srd_decoder_unload() works. * If it returns != SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload) { int ret; struct srd_decoder *dec; srd_init(DECODERS_TESTDIR); ret = srd_decoder_load("uart"); fail_unless(ret == SRD_OK, "srd_decoder_load(uart) failed: %d.", ret); dec = srd_decoder_get_by_id("uart"); fail_unless(dec != NULL); ret = srd_decoder_unload(dec); fail_unless(ret == SRD_OK, "srd_decoder_unload() failed: %d.", ret); srd_exit(); } END_TEST /* * Check whether srd_decoder_unload(NULL) fails. * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload_null) { srd_init(DECODERS_TESTDIR); fail_unless(srd_decoder_unload(NULL) != SRD_OK); srd_exit(); } END_TEST /* * Check whether srd_decoder_unload(NULL) fails without prior srd_init(). * If it returns SRD_OK (or segfaults) this test will fail. */ START_TEST(test_unload_null_no_init) { fail_unless(srd_decoder_unload(NULL) != SRD_OK); } END_TEST /* * Check whether srd_decoder_list() returns a non-empty list. * If it returns an empty list (or segfaults) this test will fail. */ START_TEST(test_decoder_list) { srd_init(DECODERS_TESTDIR); srd_decoder_load_all(); fail_unless(srd_decoder_list() != NULL); srd_exit(); } END_TEST /* * Check whether srd_decoder_list() without prior srd_decoder_load_all() * returns an empty list (return value != NULL). * If it returns a non-empty list (or segfaults) this test will fail. */ START_TEST(test_decoder_list_no_load) { srd_init(DECODERS_TESTDIR); fail_unless(srd_decoder_list() == NULL); srd_exit(); } END_TEST /* * Check whether srd_decoder_list() without prior srd_init() * returns an empty list. * If it returns a non-empty list (or segfaults) this test will fail. * See also: http://sigrok.org/bugzilla/show_bug.cgi?id=178 */ START_TEST(test_decoder_list_no_init) { srd_decoder_load_all(); fail_unless(srd_decoder_list() == NULL); } END_TEST /* * Check whether srd_decoder_list() without prior srd_init() and without * prior srd_decoder_load_all() returns an empty list. * If it returns a non-empty list (or segfaults) this test will fail. */ START_TEST(test_decoder_list_no_init_no_load) { fail_unless(srd_decoder_list() == NULL); } END_TEST /* * Check whether srd_decoder_list() returns the correct number of PDs. * If it returns a wrong number (or segfaults) this test will fail. */ START_TEST(test_decoder_list_correct_numbers) { srd_init(DECODERS_TESTDIR); fail_unless(g_slist_length((GSList *)srd_decoder_list()) == 0); srd_decoder_load("spi"); fail_unless(g_slist_length((GSList *)srd_decoder_list()) == 1); srd_decoder_load("uart"); fail_unless(g_slist_length((GSList *)srd_decoder_list()) == 2); srd_decoder_load("can"); fail_unless(g_slist_length((GSList *)srd_decoder_list()) == 3); srd_decoder_load("can"); /* Load same PD twice. */ fail_unless(g_slist_length((GSList *)srd_decoder_list()) == 3); srd_exit(); } END_TEST /* * Check whether srd_decoder_get_by_id() works. * If it returns NULL for valid PDs (or segfaults) this test will fail. */ START_TEST(test_get_by_id) { srd_init(DECODERS_TESTDIR); srd_decoder_load("uart"); fail_unless(srd_decoder_get_by_id("uart") != NULL); fail_unless(srd_decoder_get_by_id("can") == NULL); srd_decoder_load("can"); fail_unless(srd_decoder_get_by_id("uart") != NULL); fail_unless(srd_decoder_get_by_id("can") != NULL); srd_exit(); } END_TEST /* * Check whether srd_decoder_get_by_id() works multiple times in a row. * If it returns NULL for valid PDs (or segfaults) this test will fail. */ START_TEST(test_get_by_id_multiple) { srd_init(DECODERS_TESTDIR); srd_decoder_load("uart"); fail_unless(srd_decoder_get_by_id("uart") != NULL); fail_unless(srd_decoder_get_by_id("uart") != NULL); fail_unless(srd_decoder_get_by_id("uart") != NULL); fail_unless(srd_decoder_get_by_id("uart") != NULL); srd_exit(); } END_TEST /* * Check whether srd_decoder_get_by_id() fails for bogus PDs. * If it returns a value != NULL (or segfaults) this test will fail. */ START_TEST(test_get_by_id_bogus) { srd_init(DECODERS_TESTDIR); fail_unless(srd_decoder_get_by_id(NULL) == NULL); fail_unless(srd_decoder_get_by_id("") == NULL); fail_unless(srd_decoder_get_by_id(" ") == NULL); fail_unless(srd_decoder_get_by_id("nonexisting") == NULL); fail_unless(srd_decoder_get_by_id("sPi") == NULL); fail_unless(srd_decoder_get_by_id("SPI") == NULL); fail_unless(srd_decoder_get_by_id("s p i") == NULL); fail_unless(srd_decoder_get_by_id(" spi") == NULL); fail_unless(srd_decoder_get_by_id("spi ") == NULL); fail_unless(srd_decoder_get_by_id(" spi ") == NULL); fail_unless(srd_decoder_get_by_id("spi uart") == NULL); srd_exit(); } END_TEST /* * Check whether srd_decoder_doc_get() works. * If it returns NULL for valid PDs (or segfaults) this test will fail. */ START_TEST(test_doc_get) { struct srd_decoder *dec; srd_init(DECODERS_TESTDIR); srd_decoder_load("uart"); dec = srd_decoder_get_by_id("uart"); fail_unless(srd_decoder_doc_get(dec) != NULL); srd_exit(); } END_TEST /* * Check whether srd_decoder_doc_get() fails with NULL as argument. * If it returns a value != NULL (or segfaults) this test will fail. * See also: http://sigrok.org/bugzilla/show_bug.cgi?id=179 */ START_TEST(test_doc_get_null) { srd_init(DECODERS_TESTDIR); fail_unless(srd_decoder_doc_get(NULL) == NULL); srd_exit(); } END_TEST Suite *suite_decoder(void) { Suite *s; TCase *tc; s = suite_create("decoder"); tc = tcase_create("load"); tcase_set_timeout(tc, 0); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_load_all); tcase_add_test(tc, test_load_all_no_init); tcase_add_test(tc, test_load); tcase_add_test(tc, test_load_bogus); tcase_add_test(tc, test_load_valid_and_bogus); tcase_add_test(tc, test_load_multiple); tcase_add_test(tc, test_load_nonexisting_pd_dir); suite_add_tcase(s, tc); tc = tcase_create("unload"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_unload_all); tcase_add_test(tc, test_unload_all_no_init); tcase_add_test(tc, test_unload_all_multiple); tcase_add_test(tc, test_unload_all_multiple_noload); tcase_add_test(tc, test_unload); tcase_add_test(tc, test_unload_null); tcase_add_test(tc, test_unload_null_no_init); suite_add_tcase(s, tc); tc = tcase_create("list"); tcase_add_checked_fixture(tc, srdtest_setup, srdtest_teardown); tcase_add_test(tc, test_decoder_list); tcase_add_test(tc, test_decoder_list_no_load); tcase_add_test(tc, test_decoder_list_no_init); tcase_add_test(tc, test_decoder_list_no_init_no_load); tcase_add_test(tc, test_decoder_list_correct_numbers); suite_add_tcase(s, tc); tc = tcase_create("get_by_id"); tcase_add_test(tc, test_get_by_id); tcase_add_test(tc, test_get_by_id_multiple); tcase_add_test(tc, test_get_by_id_bogus); suite_add_tcase(s, tc); tc = tcase_create("doc_get"); tcase_add_test(tc, test_doc_get); tcase_add_test(tc, test_doc_get_null); suite_add_tcase(s, tc); return s; } libsigrokdecode-0.5.0/AUTHORS0000644000175000017500000000043513117366227012650 00000000000000------------------------------------------------------------------------------- AUTHORS ------------------------------------------------------------------------------- Please check the source code files and/or git history and/or ChangeLog for a list of all authors and contributors. libsigrokdecode-0.5.0/libsigrokdecode-internal.h0000644000175000017500000001150413117366227016713 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2011 Uwe Hermann * Copyright (C) 2012 Bert Vermeulen * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #ifndef LIBSIGROKDECODE_LIBSIGROKDECODE_INTERNAL_H #define LIBSIGROKDECODE_LIBSIGROKDECODE_INTERNAL_H /* Use the stable ABI subset as per PEP 384. */ #define Py_LIMITED_API 0x03020000 #include /* First, so we avoid a _POSIX_C_SOURCE warning. */ #include "libsigrokdecode.h" enum { SRD_TERM_HIGH, SRD_TERM_LOW, SRD_TERM_RISING_EDGE, SRD_TERM_FALLING_EDGE, SRD_TERM_EITHER_EDGE, SRD_TERM_NO_EDGE, SRD_TERM_SKIP, }; struct srd_term { int type; int channel; uint64_t num_samples_to_skip; uint64_t num_samples_already_skipped; }; /* Custom Python types: */ typedef struct { PyObject_HEAD struct srd_decoder_inst *di; uint64_t abs_start_samplenum; unsigned int itercnt; uint8_t *inbuf; uint64_t inbuflen; PyObject *sample; } srd_logic; struct srd_session { int session_id; /* List of decoder instances. */ GSList *di_list; /* List of frontend callbacks to receive decoder output. */ GSList *callbacks; }; /* srd.c */ SRD_PRIV int srd_decoder_searchpath_add(const char *path); /* session.c */ SRD_PRIV int session_is_valid(struct srd_session *sess); SRD_PRIV struct srd_pd_callback *srd_pd_output_callback_find(struct srd_session *sess, int output_type); /* instance.c */ SRD_PRIV struct srd_decoder_inst *srd_inst_find_by_obj( const GSList *stack, const PyObject *obj); SRD_PRIV int srd_inst_start(struct srd_decoder_inst *di); SRD_PRIV void match_array_free(struct srd_decoder_inst *di); SRD_PRIV void condition_list_free(struct srd_decoder_inst *di); SRD_PRIV int srd_inst_decode(struct srd_decoder_inst *di, uint64_t abs_start_samplenum, uint64_t abs_end_samplenum, const uint8_t *inbuf, uint64_t inbuflen, uint64_t unitsize); SRD_PRIV int process_samples_until_condition_match(struct srd_decoder_inst *di, gboolean *found_match); SRD_PRIV void srd_inst_free(struct srd_decoder_inst *di); SRD_PRIV void srd_inst_free_all(struct srd_session *sess); /* log.c */ #if defined(G_OS_WIN32) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)) /* * On MinGW, we need to specify the gnu_printf format flavor or GCC * will assume non-standard Microsoft printf syntax. */ SRD_PRIV int srd_log(int loglevel, const char *format, ...) __attribute__((__format__ (__gnu_printf__, 2, 3))); #else SRD_PRIV int srd_log(int loglevel, const char *format, ...) G_GNUC_PRINTF(2, 3); #endif #define srd_spew(...) srd_log(SRD_LOG_SPEW, __VA_ARGS__) #define srd_dbg(...) srd_log(SRD_LOG_DBG, __VA_ARGS__) #define srd_info(...) srd_log(SRD_LOG_INFO, __VA_ARGS__) #define srd_warn(...) srd_log(SRD_LOG_WARN, __VA_ARGS__) #define srd_err(...) srd_log(SRD_LOG_ERR, __VA_ARGS__) /* decoder.c */ SRD_PRIV long srd_decoder_apiver(const struct srd_decoder *d); /* type_decoder.c */ SRD_PRIV PyObject *srd_Decoder_type_new(void); /* type_logic.c */ SRD_PRIV PyObject *srd_logic_type_new(void); /* module_sigrokdecode.c */ PyMODINIT_FUNC PyInit_sigrokdecode(void); /* util.c */ SRD_PRIV PyObject *py_import_by_name(const char *name); SRD_PRIV int py_attr_as_str(PyObject *py_obj, const char *attr, char **outstr); SRD_PRIV int py_attr_as_strlist(PyObject *py_obj, const char *attr, GSList **outstrlist); SRD_PRIV int py_dictitem_as_str(PyObject *py_obj, const char *key, char **outstr); SRD_PRIV int py_listitem_as_str(PyObject *py_obj, Py_ssize_t idx, char **outstr); SRD_PRIV int py_pydictitem_as_str(PyObject *py_obj, PyObject *py_key, char **outstr); SRD_PRIV int py_pydictitem_as_long(PyObject *py_obj, PyObject *py_key, uint64_t *out); SRD_PRIV int py_str_as_str(PyObject *py_str, char **outstr); SRD_PRIV int py_strseq_to_char(PyObject *py_strseq, char ***out_strv); SRD_PRIV GVariant *py_obj_to_variant(PyObject *py_obj); /* exception.c */ #if defined(G_OS_WIN32) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)) /* * On MinGW, we need to specify the gnu_printf format flavor or GCC * will assume non-standard Microsoft printf syntax. */ SRD_PRIV void srd_exception_catch(const char *format, ...) __attribute__((__format__ (__gnu_printf__, 1, 2))); #else SRD_PRIV void srd_exception_catch(const char *format, ...) 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" >&6; } if ${lt_cv_path_NM+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$NM"; then # Let the user override the test. lt_cv_path_NM=$NM else lt_nm_to_check=${ac_tool_prefix}nm if test -n "$ac_tool_prefix" && test "$build" = "$host"; then lt_nm_to_check="$lt_nm_to_check nm" fi for lt_tmp_nm in $lt_nm_to_check; do lt_save_ifs=$IFS; IFS=$PATH_SEPARATOR for ac_dir in $PATH /usr/ccs/bin/elf /usr/ccs/bin /usr/ucb /bin; do IFS=$lt_save_ifs test -z "$ac_dir" && ac_dir=. tmp_nm=$ac_dir/$lt_tmp_nm if test -f "$tmp_nm" || test -f "$tmp_nm$ac_exeext"; then # Check to see if the nm accepts a BSD-compat flag. # Adding the 'sed 1q' prevents false positives on HP-UX, which says: # nm: unknown option "B" ignored # Tru64's nm complains that /dev/null is an invalid object file # MSYS converts /dev/null to NUL, MinGW nm treats NUL as empty case $build_os in mingw*) lt_bad_file=conftest.nm/nofile ;; *) lt_bad_file=/dev/null ;; esac case `"$tmp_nm" -B $lt_bad_file 2>&1 | sed '1q'` in *$lt_bad_file* | *'Invalid file or object type'*) lt_cv_path_NM="$tmp_nm -B" break 2 ;; *) case `"$tmp_nm" -p /dev/null 2>&1 | sed '1q'` in */dev/null*) lt_cv_path_NM="$tmp_nm -p" break 2 ;; *) lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but continue # so that we can try to find one that supports BSD flags ;; esac ;; esac fi done IFS=$lt_save_ifs done : ${lt_cv_path_NM=no} fi fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_NM" >&5 $as_echo "$lt_cv_path_NM" >&6; } if test no != "$lt_cv_path_NM"; then NM=$lt_cv_path_NM else # Didn't find any BSD compatible name lister, look for dumpbin. if test -n "$DUMPBIN"; then : # Let the user override the test. else if test -n "$ac_tool_prefix"; then for ac_prog in dumpbin "link -dump" do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DUMPBIN+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DUMPBIN"; then ac_cv_prog_DUMPBIN="$DUMPBIN" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DUMPBIN="$ac_tool_prefix$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DUMPBIN=$ac_cv_prog_DUMPBIN if test -n "$DUMPBIN"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DUMPBIN" >&5 $as_echo "$DUMPBIN" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$DUMPBIN" && break done fi if test -z "$DUMPBIN"; then ac_ct_DUMPBIN=$DUMPBIN for ac_prog in dumpbin "link -dump" do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... 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" >&6; } if ${lt_cv_nm_interface+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_nm_interface="BSD nm" echo "int some_variable = 0;" > conftest.$ac_ext (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5) (eval "$ac_compile" 2>conftest.err) cat conftest.err >&5 (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5) (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out) cat conftest.err >&5 (eval echo "\"\$as_me:$LINENO: output\"" >&5) cat conftest.out >&5 if $GREP 'External.*some_variable' conftest.out > /dev/null; then lt_cv_nm_interface="MS dumpbin" fi rm -f conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_nm_interface" >&5 $as_echo "$lt_cv_nm_interface" >&6; } # find the maximum length of command line arguments { $as_echo "$as_me:${as_lineno-$LINENO}: checking the maximum length of command line arguments" >&5 $as_echo_n "checking the maximum length of command line arguments... " >&6; } if ${lt_cv_sys_max_cmd_len+:} false; then : $as_echo_n "(cached) " >&6 else i=0 teststring=ABCD case $build_os in msdosdjgpp*) # On DJGPP, this test can blow up pretty badly due to problems in libc # (any single argument exceeding 2000 bytes causes a buffer overrun # during glob expansion). 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Likely further. if test -x /sbin/sysctl; then lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` elif test -x /usr/sbin/sysctl; then lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` else lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs fi # And add a safety zone lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` ;; interix*) # We know the value 262144 and hardcode it with a safety zone (like BSD) lt_cv_sys_max_cmd_len=196608 ;; os2*) # The test takes a long time on OS/2. lt_cv_sys_max_cmd_len=8192 ;; osf*) # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[ ]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test X`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test 17 != "$i" # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac fi if test -n "$lt_cv_sys_max_cmd_len"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sys_max_cmd_len" >&5 $as_echo "$lt_cv_sys_max_cmd_len" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: none" >&5 $as_echo "none" >&6; } fi max_cmd_len=$lt_cv_sys_max_cmd_len : ${CP="cp -f"} : ${MV="mv -f"} : ${RM="rm -f"} if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then lt_unset=unset else lt_unset=false fi # test EBCDIC or ASCII case `echo X|tr X '\101'` in A) # ASCII based system # \n is not interpreted correctly by Solaris 8 /usr/ucb/tr lt_SP2NL='tr \040 \012' lt_NL2SP='tr \015\012 \040\040' ;; *) # EBCDIC based system lt_SP2NL='tr \100 \n' lt_NL2SP='tr \r\n \100\100' ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5 $as_echo_n "checking how to convert $build file names to $host format... " >&6; } if ${lt_cv_to_host_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32 ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32 ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32 ;; esac ;; *-*-cygwin* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_noop ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin ;; esac ;; * ) # unhandled hosts (and "normal" native builds) lt_cv_to_host_file_cmd=func_convert_file_noop ;; esac fi to_host_file_cmd=$lt_cv_to_host_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5 $as_echo "$lt_cv_to_host_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5 $as_echo_n "checking how to convert $build file names to toolchain format... " >&6; } if ${lt_cv_to_tool_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else #assume ordinary cross tools, or native build. lt_cv_to_tool_file_cmd=func_convert_file_noop case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32 ;; esac ;; esac fi to_tool_file_cmd=$lt_cv_to_tool_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5 $as_echo "$lt_cv_to_tool_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5 $as_echo_n "checking for $LD option to reload object files... " >&6; } if ${lt_cv_ld_reload_flag+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_reload_flag='-r' fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_reload_flag" >&5 $as_echo "$lt_cv_ld_reload_flag" >&6; } reload_flag=$lt_cv_ld_reload_flag case $reload_flag in "" | " "*) ;; *) reload_flag=" $reload_flag" ;; esac reload_cmds='$LD$reload_flag -o $output$reload_objs' case $host_os in cygwin* | mingw* | pw32* | cegcc*) if test yes != "$GCC"; then reload_cmds=false fi ;; darwin*) if test yes = "$GCC"; then reload_cmds='$LTCC $LTCFLAGS -nostdlib $wl-r -o $output$reload_objs' else reload_cmds='$LD$reload_flag -o $output$reload_objs' fi ;; esac if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}objdump", so it can be a program name with args. set dummy ${ac_tool_prefix}objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OBJDUMP"; then ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OBJDUMP="${ac_tool_prefix}objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OBJDUMP=$ac_cv_prog_OBJDUMP if test -n "$OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OBJDUMP" >&5 $as_echo "$OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OBJDUMP"; then ac_ct_OBJDUMP=$OBJDUMP # Extract the first word of "objdump", so it can be a program name with args. set dummy objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OBJDUMP"; then ac_cv_prog_ac_ct_OBJDUMP="$ac_ct_OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OBJDUMP="objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OBJDUMP=$ac_cv_prog_ac_ct_OBJDUMP if test -n "$ac_ct_OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OBJDUMP" >&5 $as_echo "$ac_ct_OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OBJDUMP" = x; then OBJDUMP="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OBJDUMP=$ac_ct_OBJDUMP fi else OBJDUMP="$ac_cv_prog_OBJDUMP" fi test -z "$OBJDUMP" && OBJDUMP=objdump { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to recognize dependent libraries" >&5 $as_echo_n "checking how to recognize dependent libraries... " >&6; } if ${lt_cv_deplibs_check_method+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_file_magic_cmd='$MAGIC_CMD' lt_cv_file_magic_test_file= lt_cv_deplibs_check_method='unknown' # Need to set the preceding variable on all platforms that support # interlibrary dependencies. # 'none' -- dependencies not supported. # 'unknown' -- same as none, but documents that we really don't know. # 'pass_all' -- all dependencies passed with no checks. # 'test_compile' -- check by making test program. # 'file_magic [[regex]]' -- check by looking for files in library path # that responds to the $file_magic_cmd with a given extended regex. # If you have 'file' or equivalent on your system and you're not sure # whether 'pass_all' will *always* work, you probably want this one. case $host_os in aix[4-9]*) lt_cv_deplibs_check_method=pass_all ;; beos*) lt_cv_deplibs_check_method=pass_all ;; bsdi[45]*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' lt_cv_file_magic_cmd='/usr/bin/file -L' lt_cv_file_magic_test_file=/shlib/libc.so ;; cygwin*) # func_win32_libid is a shell function defined in ltmain.sh lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' ;; mingw* | pw32*) # Base MSYS/MinGW do not provide the 'file' command needed by # func_win32_libid shell function, so use a weaker test based on 'objdump', # unless we find 'file', for example because we are cross-compiling. if ( file / ) >/dev/null 2>&1; then lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' else # Keep this pattern in sync with the one in func_win32_libid. lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' lt_cv_file_magic_cmd='$OBJDUMP -f' fi ;; cegcc*) # use the weaker test based on 'objdump'. See mingw*. lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?' lt_cv_file_magic_cmd='$OBJDUMP -f' ;; darwin* | rhapsody*) lt_cv_deplibs_check_method=pass_all ;; freebsd* | dragonfly*) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then case $host_cpu in i*86 ) # Not sure whether the presence of OpenBSD here was a mistake. # Let's accept both of them until this is cleared up. lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD|DragonFly)/i[3-9]86 (compact )?demand paged shared library' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` ;; esac else lt_cv_deplibs_check_method=pass_all fi ;; haiku*) lt_cv_deplibs_check_method=pass_all ;; hpux10.20* | hpux11*) lt_cv_file_magic_cmd=/usr/bin/file case $host_cpu in ia64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - IA64' lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so ;; hppa*64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]' lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl ;; *) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library' lt_cv_file_magic_test_file=/usr/lib/libc.sl ;; esac ;; interix[3-9]*) # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|\.a)$' ;; irix5* | irix6* | nonstopux*) case $LD in *-32|*"-32 ") libmagic=32-bit;; *-n32|*"-n32 ") libmagic=N32;; *-64|*"-64 ") libmagic=64-bit;; *) libmagic=never-match;; esac lt_cv_deplibs_check_method=pass_all ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) lt_cv_deplibs_check_method=pass_all ;; netbsd* | netbsdelf*-gnu) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|_pic\.a)$' fi ;; newos6*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=/usr/lib/libnls.so ;; *nto* | *qnx*) lt_cv_deplibs_check_method=pass_all ;; openbsd* | bitrig*) if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|\.so|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' fi ;; osf3* | osf4* | osf5*) lt_cv_deplibs_check_method=pass_all ;; rdos*) lt_cv_deplibs_check_method=pass_all ;; solaris*) lt_cv_deplibs_check_method=pass_all ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) lt_cv_deplibs_check_method=pass_all ;; sysv4 | sysv4.3*) case $host_vendor in motorola) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` ;; ncr) lt_cv_deplibs_check_method=pass_all ;; sequent) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; sni) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" lt_cv_file_magic_test_file=/lib/libc.so ;; siemens) lt_cv_deplibs_check_method=pass_all ;; pc) lt_cv_deplibs_check_method=pass_all ;; esac ;; tpf*) lt_cv_deplibs_check_method=pass_all ;; os2*) lt_cv_deplibs_check_method=pass_all ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5 $as_echo "$lt_cv_deplibs_check_method" >&6; } file_magic_glob= want_nocaseglob=no if test "$build" = "$host"; then case $host_os in mingw* | pw32*) if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then want_nocaseglob=yes else file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"` fi ;; esac fi file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method test -z "$deplibs_check_method" && deplibs_check_method=unknown if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args. set dummy ${ac_tool_prefix}dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DLLTOOL"; then ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DLLTOOL=$ac_cv_prog_DLLTOOL if test -n "$DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5 $as_echo "$DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DLLTOOL"; then ac_ct_DLLTOOL=$DLLTOOL # Extract the first word of "dlltool", so it can be a program name with args. set dummy dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DLLTOOL"; then ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DLLTOOL="dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL if test -n "$ac_ct_DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5 $as_echo "$ac_ct_DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DLLTOOL" = x; then DLLTOOL="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DLLTOOL=$ac_ct_DLLTOOL fi else DLLTOOL="$ac_cv_prog_DLLTOOL" fi test -z "$DLLTOOL" && DLLTOOL=dlltool { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5 $as_echo_n "checking how to associate runtime and link libraries... " >&6; } if ${lt_cv_sharedlib_from_linklib_cmd+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_sharedlib_from_linklib_cmd='unknown' case $host_os in cygwin* | mingw* | pw32* | cegcc*) # two different shell functions defined in ltmain.sh; # decide which one to use based on capabilities of $DLLTOOL case `$DLLTOOL --help 2>&1` in *--identify-strict*) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib ;; *) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback ;; esac ;; *) # fallback: assume linklib IS sharedlib lt_cv_sharedlib_from_linklib_cmd=$ECHO ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5 $as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; } sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO if test -n "$ac_tool_prefix"; then for ac_prog in ar do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$AR"; then ac_cv_prog_AR="$AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AR="$ac_tool_prefix$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi AR=$ac_cv_prog_AR if test -n "$AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 $as_echo "$AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$AR" && break done fi if test -z "$AR"; then ac_ct_AR=$AR for ac_prog in ar do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_AR"; then ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_AR="$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_AR=$ac_cv_prog_ac_ct_AR if test -n "$ac_ct_AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5 $as_echo "$ac_ct_AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$ac_ct_AR" && break done if test "x$ac_ct_AR" = x; then AR="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac AR=$ac_ct_AR fi fi : ${AR=ar} : ${AR_FLAGS=cru} { $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5 $as_echo_n "checking for archiver @FILE support... " >&6; } if ${lt_cv_ar_at_file+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ar_at_file=no cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_compile "$LINENO"; then : echo conftest.$ac_objext > conftest.lst lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5' { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test 0 -eq "$ac_status"; then # Ensure the archiver fails upon bogus file names. rm -f conftest.$ac_objext libconftest.a { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test 0 -ne "$ac_status"; then lt_cv_ar_at_file=@ fi fi rm -f conftest.* libconftest.a fi rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5 $as_echo "$lt_cv_ar_at_file" >&6; } if test no = "$lt_cv_ar_at_file"; then archiver_list_spec= else archiver_list_spec=$lt_cv_ar_at_file fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$STRIP"; then ac_cv_prog_STRIP="$STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_STRIP="${ac_tool_prefix}strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi STRIP=$ac_cv_prog_STRIP if test -n "$STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 $as_echo "$STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_STRIP"; then ac_ct_STRIP=$STRIP # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_STRIP"; then ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_STRIP="strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP if test -n "$ac_ct_STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 $as_echo "$ac_ct_STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_STRIP" = x; then STRIP=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac STRIP=$ac_ct_STRIP fi else STRIP="$ac_cv_prog_STRIP" fi test -z "$STRIP" && STRIP=: if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$RANLIB"; then ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi RANLIB=$ac_cv_prog_RANLIB if test -n "$RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 $as_echo "$RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_RANLIB"; then ac_ct_RANLIB=$RANLIB # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_RANLIB"; then ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_RANLIB="ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB if test -n "$ac_ct_RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 $as_echo "$ac_ct_RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_RANLIB" = x; then RANLIB=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac RANLIB=$ac_ct_RANLIB fi else RANLIB="$ac_cv_prog_RANLIB" fi test -z "$RANLIB" && RANLIB=: # Determine commands to create old-style static archives. old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs' old_postinstall_cmds='chmod 644 $oldlib' old_postuninstall_cmds= if test -n "$RANLIB"; then case $host_os in bitrig* | openbsd*) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB -t \$tool_oldlib" ;; *) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB \$tool_oldlib" ;; esac old_archive_cmds="$old_archive_cmds~\$RANLIB \$tool_oldlib" fi case $host_os in darwin*) lock_old_archive_extraction=yes ;; *) lock_old_archive_extraction=no ;; esac # If no C compiler was specified, use CC. LTCC=${LTCC-"$CC"} # If no C compiler flags were specified, use CFLAGS. LTCFLAGS=${LTCFLAGS-"$CFLAGS"} # Allow CC to be a program name with arguments. compiler=$CC # Check for command to grab the raw symbol name followed by C symbol from nm. { $as_echo "$as_me:${as_lineno-$LINENO}: checking command to parse $NM output from $compiler object" >&5 $as_echo_n "checking command to parse $NM output from $compiler object... " >&6; } if ${lt_cv_sys_global_symbol_pipe+:} false; then : $as_echo_n "(cached) " >&6 else # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[BCDEGRST]' # Regexp to match symbols that can be accessed directly from C. sympat='\([_A-Za-z][_A-Za-z0-9]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[BCDT]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[ABCDGISTW]' ;; hpux*) if test ia64 = "$host_cpu"; then symcode='[ABCDEGRST]' fi ;; irix* | nonstopux*) symcode='[BCDEGRST]' ;; osf*) symcode='[BCDEGQRST]' ;; solaris*) symcode='[BDRT]' ;; sco3.2v5*) symcode='[DT]' ;; sysv4.2uw2*) symcode='[DT]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[ABDT]' ;; sysv4) symcode='[DFNSTU]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[ABCDGIRSTW]' ;; esac if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Gets list of data symbols to import. lt_cv_sys_global_symbol_to_import="sed -n -e 's/^I .* \(.*\)$/\1/p'" # Adjust the below global symbol transforms to fixup imported variables. lt_cdecl_hook=" -e 's/^I .* \(.*\)$/extern __declspec(dllimport) char \1;/p'" lt_c_name_hook=" -e 's/^I .* \(.*\)$/ {\"\1\", (void *) 0},/p'" lt_c_name_lib_hook="\ -e 's/^I .* \(lib.*\)$/ {\"\1\", (void *) 0},/p'\ -e 's/^I .* \(.*\)$/ {\"lib\1\", (void *) 0},/p'" else # Disable hooks by default. lt_cv_sys_global_symbol_to_import= lt_cdecl_hook= lt_c_name_hook= lt_c_name_lib_hook= fi # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n"\ $lt_cdecl_hook\ " -e 's/^T .* \(.*\)$/extern int \1();/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n"\ $lt_c_name_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/p'" # Transform an extracted symbol line into symbol name with lib prefix and # symbol address. lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n"\ $lt_c_name_lib_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(lib.*\)$/ {\"\1\", (void *) \&\1},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"lib\1\", (void *) \&\1},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function, # D for any global variable and I for any imported variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK '"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " /^ *Symbol name *: /{split(\$ 0,sn,\":\"); si=substr(sn[2],2)};"\ " /^ *Type *: code/{print \"T\",si,substr(si,length(prfx))};"\ " /^ *Type *: data/{print \"I\",si,substr(si,length(prfx))};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=\"D\"}; \$ 0~/\(\).*\|/{f=\"T\"};"\ " {split(\$ 0,a,/\||\r/); split(a[2],s)};"\ " s[1]~/^[@?]/{print f,s[1],s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print f,t[1],substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then # Now try to grab the symbols. nlist=conftest.nm if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5 (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS=conftstm.$ac_objext CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag" if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s conftest$ac_exeext; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&5 fi else echo "cannot find nm_test_var in $nlist" >&5 fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 fi else echo "$progname: failed program was:" >&5 cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test yes = "$pipe_works"; then break else lt_cv_sys_global_symbol_pipe= fi done fi if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: failed" >&5 $as_echo "failed" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok" >&5 $as_echo "ok" >&6; } fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then nm_file_list_spec='@' fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5 $as_echo_n "checking for sysroot... " >&6; } # Check whether --with-sysroot was given. if test "${with_sysroot+set}" = set; then : withval=$with_sysroot; else with_sysroot=no fi lt_sysroot= case $with_sysroot in #( yes) if test yes = "$GCC"; then lt_sysroot=`$CC --print-sysroot 2>/dev/null` fi ;; #( /*) lt_sysroot=`echo "$with_sysroot" | sed -e "$sed_quote_subst"` ;; #( no|'') ;; #( *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_sysroot" >&5 $as_echo "$with_sysroot" >&6; } as_fn_error $? "The sysroot must be an absolute path." "$LINENO" 5 ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5 $as_echo "${lt_sysroot:-no}" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a working dd" >&5 $as_echo_n "checking for a working dd... " >&6; } if ${ac_cv_path_lt_DD+:} false; then : $as_echo_n "(cached) " >&6 else printf 0123456789abcdef0123456789abcdef >conftest.i cat conftest.i conftest.i >conftest2.i : ${lt_DD:=$DD} if test -z "$lt_DD"; then ac_path_lt_DD_found=false # Loop through the user's path and test for each of PROGNAME-LIST as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_prog in dd; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_lt_DD="$as_dir/$ac_prog$ac_exec_ext" as_fn_executable_p "$ac_path_lt_DD" || continue if "$ac_path_lt_DD" bs=32 count=1 conftest.out 2>/dev/null; then cmp -s conftest.i conftest.out \ && ac_cv_path_lt_DD="$ac_path_lt_DD" ac_path_lt_DD_found=: fi $ac_path_lt_DD_found && break 3 done done done IFS=$as_save_IFS if test -z "$ac_cv_path_lt_DD"; then : fi else ac_cv_path_lt_DD=$lt_DD fi rm -f conftest.i conftest2.i conftest.out fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_lt_DD" >&5 $as_echo "$ac_cv_path_lt_DD" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to truncate binary pipes" >&5 $as_echo_n "checking how to truncate binary pipes... " >&6; } if ${lt_cv_truncate_bin+:} false; then : $as_echo_n "(cached) " >&6 else printf 0123456789abcdef0123456789abcdef >conftest.i cat conftest.i conftest.i >conftest2.i lt_cv_truncate_bin= if "$ac_cv_path_lt_DD" bs=32 count=1 conftest.out 2>/dev/null; then cmp -s conftest.i conftest.out \ && lt_cv_truncate_bin="$ac_cv_path_lt_DD bs=4096 count=1" fi rm -f conftest.i conftest2.i conftest.out test -z "$lt_cv_truncate_bin" && lt_cv_truncate_bin="$SED -e 4q" fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_truncate_bin" >&5 $as_echo "$lt_cv_truncate_bin" >&6; } # Calculate cc_basename. Skip known compiler wrappers and cross-prefix. func_cc_basename () { for cc_temp in $*""; do case $cc_temp in compile | *[\\/]compile | ccache | *[\\/]ccache ) ;; distcc | *[\\/]distcc | purify | *[\\/]purify ) ;; \-*) ;; *) break;; esac done func_cc_basename_result=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"` } # Check whether --enable-libtool-lock was given. if test "${enable_libtool_lock+set}" = set; then : enableval=$enable_libtool_lock; fi test no = "$enable_libtool_lock" || enable_libtool_lock=yes # Some flags need to be propagated to the compiler or linker for good # libtool support. case $host in ia64-*-hpux*) # Find out what ABI is being produced by ac_compile, and set mode # options accordingly. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.$ac_objext` in *ELF-32*) HPUX_IA64_MODE=32 ;; *ELF-64*) HPUX_IA64_MODE=64 ;; esac fi rm -rf conftest* ;; *-*-irix6*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then if test yes = "$lt_cv_prog_gnu_ld"; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -melf32bsmip" ;; *N32*) LD="${LD-ld} -melf32bmipn32" ;; *64-bit*) LD="${LD-ld} -melf64bmip" ;; esac else case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -32" ;; *N32*) LD="${LD-ld} -n32" ;; *64-bit*) LD="${LD-ld} -64" ;; esac fi fi rm -rf conftest* ;; mips64*-*linux*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then emul=elf case `/usr/bin/file conftest.$ac_objext` in *32-bit*) emul="${emul}32" ;; *64-bit*) emul="${emul}64" ;; esac case `/usr/bin/file conftest.$ac_objext` in *MSB*) emul="${emul}btsmip" ;; *LSB*) emul="${emul}ltsmip" ;; esac case `/usr/bin/file conftest.$ac_objext` in *N32*) emul="${emul}n32" ;; esac LD="${LD-ld} -m $emul" fi rm -rf conftest* ;; x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. Note that the listed cases only cover the # situations where additional linker options are needed (such as when # doing 32-bit compilation for a host where ld defaults to 64-bit, or # vice versa); the common cases where no linker options are needed do # not appear in the list. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *32-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) case `/usr/bin/file conftest.o` in *x86-64*) LD="${LD-ld} -m elf32_x86_64" ;; *) LD="${LD-ld} -m elf_i386" ;; esac ;; powerpc64le-*linux*) LD="${LD-ld} -m elf32lppclinux" ;; powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" ;; s390x-*linux*) LD="${LD-ld} -m elf_s390" ;; sparc64-*linux*) LD="${LD-ld} -m elf32_sparc" ;; esac ;; *64-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_x86_64_fbsd" ;; x86_64-*linux*) LD="${LD-ld} -m elf_x86_64" ;; powerpcle-*linux*) LD="${LD-ld} -m elf64lppc" ;; powerpc-*linux*) LD="${LD-ld} -m elf64ppc" ;; s390*-*linux*|s390*-*tpf*) LD="${LD-ld} -m elf64_s390" ;; sparc*-*linux*) LD="${LD-ld} -m elf64_sparc" ;; esac ;; esac fi rm -rf conftest* ;; *-*-sco3.2v5*) # On SCO OpenServer 5, we need -belf to get full-featured binaries. SAVE_CFLAGS=$CFLAGS CFLAGS="$CFLAGS -belf" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler needs -belf" >&5 $as_echo_n "checking whether the C compiler needs -belf... " >&6; } if ${lt_cv_cc_needs_belf+:} false; then : $as_echo_n "(cached) " >&6 else ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_cc_needs_belf=yes else lt_cv_cc_needs_belf=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_cc_needs_belf" >&5 $as_echo "$lt_cv_cc_needs_belf" >&6; } if test yes != "$lt_cv_cc_needs_belf"; then # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf CFLAGS=$SAVE_CFLAGS fi ;; *-*solaris*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *64-bit*) case $lt_cv_prog_gnu_ld in yes*) case $host in i?86-*-solaris*|x86_64-*-solaris*) LD="${LD-ld} -m elf_x86_64" ;; sparc*-*-solaris*) LD="${LD-ld} -m elf64_sparc" ;; esac # GNU ld 2.21 introduced _sol2 emulations. Use them if available. if ${LD-ld} -V | grep _sol2 >/dev/null 2>&1; then LD=${LD-ld}_sol2 fi ;; *) if ${LD-ld} -64 -r -o conftest2.o conftest.o >/dev/null 2>&1; then LD="${LD-ld} -64" fi ;; esac ;; esac fi rm -rf conftest* ;; esac need_locks=$enable_libtool_lock if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args. set dummy ${ac_tool_prefix}mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$MANIFEST_TOOL"; then ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL if test -n "$MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5 $as_echo "$MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_MANIFEST_TOOL"; then ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL # Extract the first word of "mt", so it can be a program name with args. set dummy mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_MANIFEST_TOOL"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL if test -n "$ac_ct_MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5 $as_echo "$ac_ct_MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_MANIFEST_TOOL" = x; then MANIFEST_TOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL fi else MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL" fi test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5 $as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; } if ${lt_cv_path_mainfest_tool+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_path_mainfest_tool=no echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5 $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out cat conftest.err >&5 if $GREP 'Manifest Tool' conftest.out > /dev/null; then lt_cv_path_mainfest_tool=yes fi rm -f conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5 $as_echo "$lt_cv_path_mainfest_tool" >&6; } if test yes != "$lt_cv_path_mainfest_tool"; then MANIFEST_TOOL=: fi case $host_os in rhapsody* | darwin*) if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dsymutil", so it can be a program name with args. set dummy ${ac_tool_prefix}dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DSYMUTIL"; then ac_cv_prog_DSYMUTIL="$DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DSYMUTIL="${ac_tool_prefix}dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DSYMUTIL=$ac_cv_prog_DSYMUTIL if test -n "$DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DSYMUTIL" >&5 $as_echo "$DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DSYMUTIL"; then ac_ct_DSYMUTIL=$DSYMUTIL # Extract the first word of "dsymutil", so it can be a program name with args. set dummy dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DSYMUTIL"; then ac_cv_prog_ac_ct_DSYMUTIL="$ac_ct_DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DSYMUTIL="dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DSYMUTIL=$ac_cv_prog_ac_ct_DSYMUTIL if test -n "$ac_ct_DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DSYMUTIL" >&5 $as_echo "$ac_ct_DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DSYMUTIL" = x; then DSYMUTIL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DSYMUTIL=$ac_ct_DSYMUTIL fi else DSYMUTIL="$ac_cv_prog_DSYMUTIL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}nmedit", so it can be a program name with args. set dummy ${ac_tool_prefix}nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$NMEDIT"; then ac_cv_prog_NMEDIT="$NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_NMEDIT="${ac_tool_prefix}nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi NMEDIT=$ac_cv_prog_NMEDIT if test -n "$NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $NMEDIT" >&5 $as_echo "$NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_NMEDIT"; then ac_ct_NMEDIT=$NMEDIT # Extract the first word of "nmedit", so it can be a program name with args. set dummy nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_NMEDIT"; then ac_cv_prog_ac_ct_NMEDIT="$ac_ct_NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_NMEDIT="nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_NMEDIT=$ac_cv_prog_ac_ct_NMEDIT if test -n "$ac_ct_NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_NMEDIT" >&5 $as_echo "$ac_ct_NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_NMEDIT" = x; then NMEDIT=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac NMEDIT=$ac_ct_NMEDIT fi else NMEDIT="$ac_cv_prog_NMEDIT" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}lipo", so it can be a program name with args. set dummy ${ac_tool_prefix}lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$LIPO"; then ac_cv_prog_LIPO="$LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_LIPO="${ac_tool_prefix}lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi LIPO=$ac_cv_prog_LIPO if test -n "$LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LIPO" >&5 $as_echo "$LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_LIPO"; then ac_ct_LIPO=$LIPO # Extract the first word of "lipo", so it can be a program name with args. set dummy lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_LIPO"; then ac_cv_prog_ac_ct_LIPO="$ac_ct_LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_LIPO="lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_LIPO=$ac_cv_prog_ac_ct_LIPO if test -n "$ac_ct_LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_LIPO" >&5 $as_echo "$ac_ct_LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_LIPO" = x; then LIPO=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac LIPO=$ac_ct_LIPO fi else LIPO="$ac_cv_prog_LIPO" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool", so it can be a program name with args. set dummy ${ac_tool_prefix}otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL"; then ac_cv_prog_OTOOL="$OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL="${ac_tool_prefix}otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL=$ac_cv_prog_OTOOL if test -n "$OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL" >&5 $as_echo "$OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL"; then ac_ct_OTOOL=$OTOOL # Extract the first word of "otool", so it can be a program name with args. set dummy otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL"; then ac_cv_prog_ac_ct_OTOOL="$ac_ct_OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL="otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL=$ac_cv_prog_ac_ct_OTOOL if test -n "$ac_ct_OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL" >&5 $as_echo "$ac_ct_OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL" = x; then OTOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL=$ac_ct_OTOOL fi else OTOOL="$ac_cv_prog_OTOOL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool64", so it can be a program name with args. set dummy ${ac_tool_prefix}otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL64"; then ac_cv_prog_OTOOL64="$OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL64="${ac_tool_prefix}otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL64=$ac_cv_prog_OTOOL64 if test -n "$OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL64" >&5 $as_echo "$OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL64"; then ac_ct_OTOOL64=$OTOOL64 # Extract the first word of "otool64", so it can be a program name with args. set dummy otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL64"; then ac_cv_prog_ac_ct_OTOOL64="$ac_ct_OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL64="otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL64=$ac_cv_prog_ac_ct_OTOOL64 if test -n "$ac_ct_OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL64" >&5 $as_echo "$ac_ct_OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL64" = x; then OTOOL64=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL64=$ac_ct_OTOOL64 fi else OTOOL64="$ac_cv_prog_OTOOL64" fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -single_module linker flag" >&5 $as_echo_n "checking for -single_module linker flag... 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We urge you to upgrade GNU *** binutils to release 2.16.91.0.3 or newer. Another option is to modify *** your PATH or compiler configuration so that the native linker is *** used, and then restart. _LT_EOF ;; *) # For security reasons, it is highly recommended that you always # use absolute paths for naming shared libraries, and exclude the # DT_RUNPATH tag from executables and libraries. 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The following line is correct: shared_flag='-G' else if test yes = "$aix_use_runtimelinking"; then shared_flag='$wl-G' else shared_flag='$wl-bM:SRE' fi shared_flag_aix='$wl-bM:SRE' shared_flag_svr4='$wl-G' fi fi export_dynamic_flag_spec='$wl-bexpall' # It seems that -bexpall does not export symbols beginning with # underscore (_), so it is better to generate a list of symbols to export. always_export_symbols=yes if test aix,yes = "$with_aix_soname,$aix_use_runtimelinking"; then # Warning - without using the other runtime loading flags (-brtl), # -berok will link without error, but may produce a broken library. allow_undefined_flag='-berok' # Determine the default libpath from the value encoded in an # empty executable. if test set = "${lt_cv_aix_libpath+set}"; then aix_libpath=$lt_cv_aix_libpath else if ${lt_cv_aix_libpath_+:} false; then : $as_echo_n "(cached) " >&6 else cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_aix_libpath_sed=' /Import File Strings/,/^$/ { /^0/ { s/^0 *\([^ ]*\) *$/\1/ p } }' lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` # Check for a 64-bit object if we didn't find anything. if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=/usr/lib:/lib fi fi aix_libpath=$lt_cv_aix_libpath_ fi hardcode_libdir_flag_spec='$wl-blibpath:$libdir:'"$aix_libpath" archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs $wl'$no_entry_flag' $compiler_flags `if test -n "$allow_undefined_flag"; then func_echo_all "$wl$allow_undefined_flag"; else :; fi` $wl'$exp_sym_flag:\$export_symbols' '$shared_flag else if test ia64 = "$host_cpu"; then hardcode_libdir_flag_spec='$wl-R $libdir:/usr/lib:/lib' allow_undefined_flag="-z nodefs" archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\$wl$no_entry_flag"' $compiler_flags $wl$allow_undefined_flag '"\$wl$exp_sym_flag:\$export_symbols" else # Determine the default libpath from the value encoded in an # empty executable. if test set = "${lt_cv_aix_libpath+set}"; then aix_libpath=$lt_cv_aix_libpath else if ${lt_cv_aix_libpath_+:} false; then : $as_echo_n "(cached) " >&6 else cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_aix_libpath_sed=' /Import File Strings/,/^$/ { /^0/ { s/^0 *\([^ ]*\) *$/\1/ p } }' lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` # Check for a 64-bit object if we didn't find anything. if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=/usr/lib:/lib fi fi aix_libpath=$lt_cv_aix_libpath_ fi hardcode_libdir_flag_spec='$wl-blibpath:$libdir:'"$aix_libpath" # Warning - without using the other run time loading flags, # -berok will link without error, but may produce a broken library. no_undefined_flag=' $wl-bernotok' allow_undefined_flag=' $wl-berok' if test yes = "$with_gnu_ld"; then # We only use this code for GNU lds that support --whole-archive. whole_archive_flag_spec='$wl--whole-archive$convenience $wl--no-whole-archive' else # Exported symbols can be pulled into shared objects from archives whole_archive_flag_spec='$convenience' fi archive_cmds_need_lc=yes archive_expsym_cmds='$RM -r $output_objdir/$realname.d~$MKDIR $output_objdir/$realname.d' # -brtl affects multiple linker settings, -berok does not and is overridden later compiler_flags_filtered='`func_echo_all "$compiler_flags " | $SED -e "s%-brtl\\([, ]\\)%-berok\\1%g"`' if test svr4 != "$with_aix_soname"; then # This is similar to how AIX traditionally builds its shared libraries. archive_expsym_cmds="$archive_expsym_cmds"'~$CC '$shared_flag_aix' -o $output_objdir/$realname.d/$soname $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$realname.d/$soname' fi if test aix != "$with_aix_soname"; then archive_expsym_cmds="$archive_expsym_cmds"'~$CC '$shared_flag_svr4' -o $output_objdir/$realname.d/$shared_archive_member_spec.o $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$STRIP -e $output_objdir/$realname.d/$shared_archive_member_spec.o~( func_echo_all "#! $soname($shared_archive_member_spec.o)"; if test shr_64 = "$shared_archive_member_spec"; then func_echo_all "# 64"; else func_echo_all "# 32"; fi; cat $export_symbols ) > $output_objdir/$realname.d/$shared_archive_member_spec.imp~$AR $AR_FLAGS $output_objdir/$soname $output_objdir/$realname.d/$shared_archive_member_spec.o $output_objdir/$realname.d/$shared_archive_member_spec.imp' else # used by -dlpreopen to get the symbols archive_expsym_cmds="$archive_expsym_cmds"'~$MV $output_objdir/$realname.d/$soname $output_objdir' fi archive_expsym_cmds="$archive_expsym_cmds"'~$RM -r $output_objdir/$realname.d' fi fi ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='' ;; 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dgux*) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_libdir_flag_spec='-L$libdir' hardcode_shlibpath_var=no ;; # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor # support. 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" >&6; } if ${lt_cv_irix_exported_symbol+:} false; then : $as_echo_n "(cached) " >&6 else save_LDFLAGS=$LDFLAGS LDFLAGS="$LDFLAGS -shared $wl-exported_symbol ${wl}foo $wl-update_registry $wl/dev/null" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int foo (void) { return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_irix_exported_symbol=yes else lt_cv_irix_exported_symbol=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5 $as_echo "$lt_cv_irix_exported_symbol" >&6; } if test yes = "$lt_cv_irix_exported_symbol"; then archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations $wl-exports_file $wl$export_symbols -o $lib' fi link_all_deplibs=no else archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -exports_file $export_symbols -o $lib' fi archive_cmds_need_lc='no' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: inherit_rpath=yes link_all_deplibs=yes ;; linux*) case $cc_basename in tcc*) # Fabrice Bellard et al's Tiny C Compiler ld_shlibs=yes archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' ;; esac ;; netbsd* | netbsdelf*-gnu) if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out else archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF fi hardcode_libdir_flag_spec='-R$libdir' hardcode_direct=yes hardcode_shlibpath_var=no ;; newsos6) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: hardcode_shlibpath_var=no ;; *nto* | *qnx*) ;; openbsd* | bitrig*) if test -f /usr/libexec/ld.so; then hardcode_direct=yes hardcode_shlibpath_var=no hardcode_direct_absolute=yes if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags $wl-retain-symbols-file,$export_symbols' hardcode_libdir_flag_spec='$wl-rpath,$libdir' export_dynamic_flag_spec='$wl-E' else archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' hardcode_libdir_flag_spec='$wl-rpath,$libdir' fi else ld_shlibs=no fi ;; os2*) hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes allow_undefined_flag=unsupported shrext_cmds=.dll archive_cmds='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ emxexp $libobjs | $SED /"_DLL_InitTerm"/d >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' archive_expsym_cmds='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ prefix_cmds="$SED"~ if test EXPORTS = "`$SED 1q $export_symbols`"; then prefix_cmds="$prefix_cmds -e 1d"; fi~ prefix_cmds="$prefix_cmds -e \"s/^\(.*\)$/_\1/g\""~ cat $export_symbols | $prefix_cmds >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' old_archive_From_new_cmds='emximp -o $output_objdir/${libname}_dll.a $output_objdir/$libname.def' enable_shared_with_static_runtimes=yes ;; osf3*) if test yes = "$GCC"; then allow_undefined_flag=' $wl-expect_unresolved $wl\*' archive_cmds='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' else allow_undefined_flag=' -expect_unresolved \*' archive_cmds='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' fi archive_cmds_need_lc='no' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: ;; osf4* | osf5*) # as osf3* with the addition of -msym flag if test yes = "$GCC"; then allow_undefined_flag=' $wl-expect_unresolved $wl\*' archive_cmds='$CC -shared$allow_undefined_flag $pic_flag $libobjs $deplibs $compiler_flags $wl-msym $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' else allow_undefined_flag=' -expect_unresolved \*' archive_cmds='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~ $CC -shared$allow_undefined_flag $wl-input $wl$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib~$RM $lib.exp' # Both c and cxx compiler support -rpath directly hardcode_libdir_flag_spec='-rpath $libdir' fi archive_cmds_need_lc='no' hardcode_libdir_separator=: ;; solaris*) no_undefined_flag=' -z defs' if test yes = "$GCC"; then wlarc='$wl' archive_cmds='$CC -shared $pic_flag $wl-z ${wl}text $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -shared $pic_flag $wl-z ${wl}text $wl-M $wl$lib.exp $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' else case `$CC -V 2>&1` in *"Compilers 5.0"*) wlarc='' archive_cmds='$LD -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $linker_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $LD -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' ;; *) wlarc='$wl' archive_cmds='$CC -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' ;; esac fi hardcode_libdir_flag_spec='-R$libdir' hardcode_shlibpath_var=no case $host_os in solaris2.[0-5] | solaris2.[0-5].*) ;; *) # The compiler driver will combine and reorder linker options, # but understands '-z linker_flag'. GCC discards it without '$wl', # but is careful enough not to reorder. # Supported since Solaris 2.6 (maybe 2.5.1?) if test yes = "$GCC"; then whole_archive_flag_spec='$wl-z ${wl}allextract$convenience $wl-z ${wl}defaultextract' else whole_archive_flag_spec='-z allextract$convenience -z defaultextract' fi ;; esac link_all_deplibs=yes ;; sunos4*) if test sequent = "$host_vendor"; then # Use $CC to link under sequent, because it throws in some extra .o # files that make .init and .fini sections work. archive_cmds='$CC -G $wl-h $soname -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' fi hardcode_libdir_flag_spec='-L$libdir' hardcode_direct=yes hardcode_minus_L=yes hardcode_shlibpath_var=no ;; sysv4) case $host_vendor in sni) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes # is this really true??? ;; siemens) ## LD is ld it makes a PLAMLIB ## CC just makes a GrossModule. archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' reload_cmds='$CC -r -o $output$reload_objs' hardcode_direct=no ;; motorola) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=no #Motorola manual says yes, but my tests say they lie ;; esac runpath_var='LD_RUN_PATH' hardcode_shlibpath_var=no ;; sysv4.3*) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_shlibpath_var=no export_dynamic_flag_spec='-Bexport' ;; sysv4*MP*) if test -d /usr/nec; then archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_shlibpath_var=no runpath_var=LD_RUN_PATH hardcode_runpath_var=yes ld_shlibs=yes fi ;; sysv4*uw2* | sysv5OpenUNIX* | sysv5UnixWare7.[01].[10]* | unixware7* | sco3.2v5.0.[024]*) no_undefined_flag='$wl-z,text' archive_cmds_need_lc=no hardcode_shlibpath_var=no runpath_var='LD_RUN_PATH' if test yes = "$GCC"; then archive_cmds='$CC -shared $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -shared $wl-Bexport:$export_symbols $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$CC -G $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -G $wl-Bexport:$export_symbols $wl-h,$soname -o $lib $libobjs $deplibs $compiler_flags' fi ;; sysv5* | sco3.2v5* | sco5v6*) # Note: We CANNOT use -z defs as we might desire, because we do not # link with -lc, and that would cause any symbols used from libc to # always be unresolved, which means just about no library would # ever link correctly. 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esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[3-9]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test yes = "$lt_cv_prog_gnu_ld"; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$release$shared_ext $libname$shared_ext' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; 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# This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no # Some binutils ld are patched to set DT_RUNPATH if ${lt_cv_shlibpath_overrides_runpath+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_shlibpath_overrides_runpath=no save_LDFLAGS=$LDFLAGS save_libdir=$libdir eval "libdir=/foo; wl=\"$lt_prog_compiler_wl\"; \ LDFLAGS=\"\$LDFLAGS $hardcode_libdir_flag_spec\"" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : if ($OBJDUMP -p conftest$ac_exeext) 2>/dev/null | grep "RUNPATH.*$libdir" >/dev/null; then : lt_cv_shlibpath_overrides_runpath=yes fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS libdir=$save_libdir fi shlibpath_overrides_runpath=$lt_cv_shlibpath_overrides_runpath # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes # Ideally, we could use ldconfig to report *all* directores which are # searched for libraries, however this is still not possible. Aside from not # being certain /sbin/ldconfig is available, command # 'ldconfig -N -X -v | grep ^/' on 64bit Fedora does not report /usr/lib64, # even though it is searched at run-time. Try to do the best guess by # appending ld.so.conf contents (and includes) to the search path. if test -f /etc/ld.so.conf; then lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" fi # We used to test for /lib/ld.so.1 and disable shared libraries on # powerpc, because MkLinux only supported shared libraries with the # GNU dynamic linker. Since this was broken with cross compilers, # most powerpc-linux boxes support dynamic linking these days and # people can always --disable-shared, the test was removed, and we # assume the GNU/Linux dynamic linker is in use. dynamic_linker='GNU/Linux ld.so' ;; netbsdelf*-gnu) version_type=linux need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='NetBSD ld.elf_so' ;; netbsd*) version_type=sunos need_lib_prefix=no need_version=no if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' dynamic_linker='NetBSD (a.out) ld.so' else library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='NetBSD ld.elf_so' fi shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes ;; newsos6) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; *nto* | *qnx*) version_type=qnx need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='ldqnx.so' ;; openbsd* | bitrig*) version_type=sunos sys_lib_dlsearch_path_spec=/usr/lib need_lib_prefix=no if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then need_version=no else need_version=yes fi library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; os2*) libname_spec='$name' version_type=windows shrext_cmds=.dll need_version=no need_lib_prefix=no # OS/2 can only load a DLL with a base name of 8 characters or less. soname_spec='`test -n "$os2dllname" && libname="$os2dllname"; v=$($ECHO $release$versuffix | tr -d .-); n=$($ECHO $libname | cut -b -$((8 - ${#v})) | tr . _); $ECHO $n$v`$shared_ext' library_names_spec='${libname}_dll.$libext' dynamic_linker='OS/2 ld.exe' shlibpath_var=BEGINLIBPATH sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec postinstall_cmds='base_file=`basename \$file`~ dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\$base_file'\''i; $ECHO \$dlname'\''`~ dldir=$destdir/`dirname \$dlpath`~ test -d \$dldir || mkdir -p \$dldir~ $install_prog $dir/$dlname \$dldir/$dlname~ chmod a+x \$dldir/$dlname~ if test -n '\''$stripme'\'' && test -n '\''$striplib'\''; then eval '\''$striplib \$dldir/$dlname'\'' || exit \$?; fi' postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; $ECHO \$dlname'\''`~ dlpath=$dir/\$dldll~ $RM \$dlpath' ;; osf3* | osf4* | osf5*) version_type=osf need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec ;; rdos*) dynamic_linker=no ;; solaris*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes # ldd complains unless libraries are executable postinstall_cmds='chmod +x $lib' ;; sunos4*) version_type=sunos library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes if test yes = "$with_gnu_ld"; then need_lib_prefix=no fi need_version=yes ;; sysv4 | sysv4.3*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH case $host_vendor in sni) shlibpath_overrides_runpath=no need_lib_prefix=no runpath_var=LD_RUN_PATH ;; siemens) need_lib_prefix=no ;; motorola) need_lib_prefix=no need_version=no shlibpath_overrides_runpath=no sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' ;; esac ;; sysv4*MP*) if test -d /usr/nec; then version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$shared_ext.$versuffix $libname$shared_ext.$major $libname$shared_ext' soname_spec='$libname$shared_ext.$major' shlibpath_var=LD_LIBRARY_PATH fi ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) version_type=sco need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes if test yes = "$with_gnu_ld"; then sys_lib_search_path_spec='/usr/local/lib /usr/gnu/lib /usr/ccs/lib /usr/lib /lib' else sys_lib_search_path_spec='/usr/ccs/lib /usr/lib' case $host_os in sco3.2v5*) sys_lib_search_path_spec="$sys_lib_search_path_spec /lib" ;; esac fi sys_lib_dlsearch_path_spec='/usr/lib' ;; tpf*) # TPF is a cross-target only. Preferred cross-host = GNU/Linux. version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; uts4*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH ;; *) dynamic_linker=no ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: $dynamic_linker" >&5 $as_echo "$dynamic_linker" >&6; } test no = "$dynamic_linker" && can_build_shared=no variables_saved_for_relink="PATH $shlibpath_var $runpath_var" if test yes = "$GCC"; then variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" fi if test set = "${lt_cv_sys_lib_search_path_spec+set}"; then sys_lib_search_path_spec=$lt_cv_sys_lib_search_path_spec fi if test set = "${lt_cv_sys_lib_dlsearch_path_spec+set}"; then sys_lib_dlsearch_path_spec=$lt_cv_sys_lib_dlsearch_path_spec fi # remember unaugmented sys_lib_dlsearch_path content for libtool script decls... configure_time_dlsearch_path=$sys_lib_dlsearch_path_spec # ... but it needs LT_SYS_LIBRARY_PATH munging for other configure-time code func_munge_path_list sys_lib_dlsearch_path_spec "$LT_SYS_LIBRARY_PATH" # to be used as default LT_SYS_LIBRARY_PATH value in generated libtool configure_time_lt_sys_library_path=$LT_SYS_LIBRARY_PATH { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5 $as_echo_n "checking how to hardcode library paths into programs... " >&6; } hardcode_action= if test -n "$hardcode_libdir_flag_spec" || test -n "$runpath_var" || test yes = "$hardcode_automatic"; then # We can hardcode non-existent directories. if test no != "$hardcode_direct" && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library # when we should be linking with a yet-to-be-installed one ## test no != "$_LT_TAGVAR(hardcode_shlibpath_var, )" && test no != "$hardcode_minus_L"; then # Linking always hardcodes the temporary library directory. hardcode_action=relink else # We can link without hardcoding, and we can hardcode nonexisting dirs. hardcode_action=immediate fi else # We cannot hardcode anything, or else we can only hardcode existing # directories. hardcode_action=unsupported fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $hardcode_action" >&5 $as_echo "$hardcode_action" >&6; } if test relink = "$hardcode_action" || test yes = "$inherit_rpath"; then # Fast installation is not supported enable_fast_install=no elif test yes = "$shlibpath_overrides_runpath" || test no = "$enable_shared"; then # Fast installation is not necessary enable_fast_install=needless fi if test yes != "$enable_dlopen"; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen=load_add_on lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; mingw* | pw32* | cegcc*) lt_cv_dlopen=LoadLibrary lt_cv_dlopen_libs= ;; cygwin*) lt_cv_dlopen=dlopen lt_cv_dlopen_libs= ;; darwin*) # if libdl is installed we need to link against it { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl else lt_cv_dlopen=dyld lt_cv_dlopen_libs= lt_cv_dlopen_self=yes fi ;; tpf*) # Don't try to run any link tests for TPF. We know it's impossible # because TPF is a cross-compiler, and we know how we open DSOs. lt_cv_dlopen=dlopen lt_cv_dlopen_libs= lt_cv_dlopen_self=no ;; *) ac_fn_c_check_func "$LINENO" "shl_load" "ac_cv_func_shl_load" if test "x$ac_cv_func_shl_load" = xyes; then : lt_cv_dlopen=shl_load else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for shl_load in -ldld" >&5 $as_echo_n "checking for shl_load in -ldld... " >&6; } if ${ac_cv_lib_dld_shl_load+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char shl_load (); int main () { return shl_load (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dld_shl_load=yes else ac_cv_lib_dld_shl_load=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_shl_load" >&5 $as_echo "$ac_cv_lib_dld_shl_load" >&6; } if test "x$ac_cv_lib_dld_shl_load" = xyes; then : lt_cv_dlopen=shl_load lt_cv_dlopen_libs=-ldld else ac_fn_c_check_func "$LINENO" "dlopen" "ac_cv_func_dlopen" if test "x$ac_cv_func_dlopen" = xyes; then : lt_cv_dlopen=dlopen else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -lsvld" >&5 $as_echo_n "checking for dlopen in -lsvld... " >&6; } if ${ac_cv_lib_svld_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-lsvld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_svld_dlopen=yes else ac_cv_lib_svld_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_svld_dlopen" >&5 $as_echo "$ac_cv_lib_svld_dlopen" >&6; } if test "x$ac_cv_lib_svld_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-lsvld else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dld_link in -ldld" >&5 $as_echo_n "checking for dld_link in -ldld... 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See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ #include #include "libsigrokdecode-internal.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */ #include "libsigrokdecode.h" #include #include #include /** * @file * * Controlling the libsigrokdecode message logging functionality. */ /** * @defgroup grp_logging Logging * * Controlling the libsigrokdecode message logging functionality. * * @{ */ /* Currently selected libsigrokdecode loglevel. Default: SRD_LOG_WARN. */ static int cur_loglevel = SRD_LOG_WARN; /* Show errors+warnings per default. */ /* Function prototype. */ static int srd_logv(void *cb_data, int loglevel, const char *format, va_list args); /* Pointer to the currently selected log callback. Default: srd_logv(). */ static srd_log_callback srd_log_cb = srd_logv; /* * Pointer to private data that can be passed to the log callback. * This can be used (for example) by C++ GUIs to pass a "this" pointer. */ static void *srd_log_cb_data = NULL; /** * Set the libsigrokdecode loglevel. * * This influences the amount of log messages (debug messages, error messages, * and so on) libsigrokdecode will output. Using SRD_LOG_NONE disables all * messages. * * Note that this function itself will also output log messages. After the * loglevel has changed, it will output a debug message with SRD_LOG_DBG for * example. Whether this message is shown depends on the (new) loglevel. * * @param loglevel The loglevel to set (SRD_LOG_NONE, SRD_LOG_ERR, * SRD_LOG_WARN, SRD_LOG_INFO, SRD_LOG_DBG, or SRD_LOG_SPEW). * * @return SRD_OK upon success, SRD_ERR_ARG upon invalid loglevel. * * @since 0.1.0 */ SRD_API int srd_log_loglevel_set(int loglevel) { if (loglevel < SRD_LOG_NONE || loglevel > SRD_LOG_SPEW) { srd_err("Invalid loglevel %d.", loglevel); return SRD_ERR_ARG; } cur_loglevel = loglevel; srd_dbg("libsigrokdecode loglevel set to %d.", loglevel); return SRD_OK; } /** * Get the libsigrokdecode loglevel. * * @return The currently configured libsigrokdecode loglevel. * * @since 0.1.0 */ SRD_API int srd_log_loglevel_get(void) { return cur_loglevel; } /** * Set the libsigrokdecode log callback to the specified function. * * @param cb Function pointer to the log callback function to use. * Must not be NULL. * @param cb_data Pointer to private data to be passed on. This can be used * by the caller to pass arbitrary data to the log functions. * This pointer is only stored or passed on by libsigrokdecode, * and is never used or interpreted in any way. The pointer * is allowed to be NULL if the caller doesn't need/want to * pass any data. * * @return SRD_OK upon success, SRD_ERR_ARG upon invalid arguments. * * @since 0.3.0 */ SRD_API int srd_log_callback_set(srd_log_callback cb, void *cb_data) { if (!cb) { srd_err("log: %s: cb was NULL", __func__); return SRD_ERR_ARG; } /* Note: 'cb_data' is allowed to be NULL. */ srd_log_cb = cb; srd_log_cb_data = cb_data; return SRD_OK; } /** * Set the libsigrokdecode log callback to the default built-in one. * * Additionally, the internal 'srd_log_cb_data' pointer is set to NULL. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.1.0 */ SRD_API int srd_log_callback_set_default(void) { /* * Note: No log output in this function, as it should safely work * even if the currently set log callback is buggy/broken. */ srd_log_cb = srd_logv; srd_log_cb_data = NULL; return SRD_OK; } static int srd_logv(void *cb_data, int loglevel, const char *format, va_list args) { /* This specific log callback doesn't need the void pointer data. */ (void)cb_data; /* Only output messages of at least the selected loglevel(s). */ if (loglevel > cur_loglevel) return SRD_OK; if (fputs("srd: ", stderr) < 0 || g_vfprintf(stderr, format, args) < 0 || putc('\n', stderr) < 0) return SRD_ERR; return SRD_OK; } /** @private */ SRD_PRIV int srd_log(int loglevel, const char *format, ...) { int ret; va_list args; va_start(args, format); ret = srd_log_cb(srd_log_cb_data, loglevel, format, args); va_end(args); return ret; } /** @} */ libsigrokdecode-0.5.0/session.c0000644000175000017500000002465413117366227013440 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2010 Uwe Hermann * Copyright (C) 2013 Bert Vermeulen * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #include #include "libsigrokdecode-internal.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */ #include "libsigrokdecode.h" #include #include /** * @file * * Session handling. */ /** * @defgroup grp_session Session handling * * Starting and handling decoding sessions. * * @{ */ /** @cond PRIVATE */ SRD_PRIV GSList *sessions = NULL; SRD_PRIV int max_session_id = -1; /** @endcond */ /** @private */ SRD_PRIV int session_is_valid(struct srd_session *sess) { if (!sess || sess->session_id < 1) return SRD_ERR; return SRD_OK; } /** * Create a decoding session. * * A session holds all decoder instances, their stack relationships and * output callbacks. * * @param sess A pointer which will hold a pointer to a newly * initialized session on return. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.3.0 */ SRD_API int srd_session_new(struct srd_session **sess) { if (!sess) { srd_err("Invalid session pointer."); return SRD_ERR_ARG; } *sess = g_malloc(sizeof(struct srd_session)); (*sess)->session_id = ++max_session_id; (*sess)->di_list = (*sess)->callbacks = NULL; /* Keep a list of all sessions, so we can clean up as needed. */ sessions = g_slist_append(sessions, *sess); srd_dbg("Created session %d.", (*sess)->session_id); return SRD_OK; } /** * Start a decoding session. * * Decoders, instances and stack must have been prepared beforehand, * and all SRD_CONF parameters set. * * @param sess The session to start. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.3.0 */ SRD_API int srd_session_start(struct srd_session *sess) { GSList *d; struct srd_decoder_inst *di; int ret; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session pointer."); return SRD_ERR; } srd_dbg("Calling start() on all instances in session %d.", sess->session_id); /* Run the start() method on all decoders receiving frontend data. */ ret = SRD_OK; for (d = sess->di_list; d; d = d->next) { di = d->data; if ((ret = srd_inst_start(di)) != SRD_OK) break; } return ret; } static int srd_inst_send_meta(struct srd_decoder_inst *di, int key, GVariant *data) { PyObject *py_ret; GSList *l; struct srd_decoder_inst *next_di; int ret; if (key != SRD_CONF_SAMPLERATE) /* This is the only key we pass on to the decoder for now. */ return SRD_OK; if (PyObject_HasAttrString(di->py_inst, "metadata")) { py_ret = PyObject_CallMethod(di->py_inst, "metadata", "lK", (long)SRD_CONF_SAMPLERATE, (unsigned long long)g_variant_get_uint64(data)); Py_XDECREF(py_ret); } /* Push metadata to all the PDs stacked on top of this one. */ for (l = di->next_di; l; l = l->next) { next_di = l->data; if ((ret = srd_inst_send_meta(next_di, key, data)) != SRD_OK) return ret; } return SRD_OK; } /** * Set a metadata configuration key in a session. * * @param sess The session to configure. * @param key The configuration key (SRD_CONF_*). * @param data The new value for the key, as a GVariant with GVariantType * appropriate to that key. A floating reference can be passed * in; its refcount will be sunk and unreferenced after use. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.3.0 */ SRD_API int srd_session_metadata_set(struct srd_session *sess, int key, GVariant *data) { GSList *l; int ret; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return SRD_ERR_ARG; } if (!key) { srd_err("Invalid key."); return SRD_ERR_ARG; } if (!data) { srd_err("Invalid value."); return SRD_ERR_ARG; } /* Hardcoded to samplerate/uint64 for now. */ if (key != SRD_CONF_SAMPLERATE) { srd_err("Unknown config key %d.", key); return SRD_ERR_ARG; } if (!g_variant_is_of_type(data, G_VARIANT_TYPE_UINT64)) { srd_err("Invalid value type: expected uint64, got %s", g_variant_get_type_string(data)); return SRD_ERR_ARG; } srd_dbg("Setting session %d samplerate to %"PRIu64".", sess->session_id, g_variant_get_uint64(data)); ret = SRD_OK; for (l = sess->di_list; l; l = l->next) { if ((ret = srd_inst_send_meta(l->data, key, data)) != SRD_OK) break; } g_variant_unref(data); return ret; } /** * Send a chunk of logic sample data to a running decoder session. * * If no channel map has been set up, the logic samples must be arranged * in channel order, in the least amount of space possible. The default * channel set consists of all required channels + all optional channels. * * The size of a sample in inbuf is 'unitsize' bytes. If no channel map * has been configured, it is the minimum number of bytes needed to store * the default channels. * * The calls to this function must provide the samples that shall be * used by the protocol decoder * - in the correct order ([...]5, 6, 4, 7, 8[...] is a bug), * - starting from sample zero (2, 3, 4, 5, 6[...] is a bug), * - consecutively, with no gaps (0, 1, 2, 4, 5[...] is a bug). * * The start- and end-sample numbers are absolute sample numbers (relative * to the start of the whole capture/file/stream), i.e. they are not relative * sample numbers within the chunk specified by 'inbuf' and 'inbuflen'. * * Correct example (4096 samples total, 4 chunks @ 1024 samples each): * srd_session_send(s, 0, 1023, inbuf, 1024, 1); * srd_session_send(s, 1024, 2047, inbuf, 1024, 1); * srd_session_send(s, 2048, 3071, inbuf, 1024, 1); * srd_session_send(s, 3072, 4095, inbuf, 1024, 1); * * The chunk size ('inbuflen') can be arbitrary and can differ between calls. * * Correct example (4096 samples total, 7 chunks @ various samples each): * srd_session_send(s, 0, 1023, inbuf, 1024, 1); * srd_session_send(s, 1024, 1123, inbuf, 100, 1); * srd_session_send(s, 1124, 1423, inbuf, 300, 1); * srd_session_send(s, 1424, 1642, inbuf, 219, 1); * srd_session_send(s, 1643, 2047, inbuf, 405, 1); * srd_session_send(s, 2048, 3071, inbuf, 1024, 1); * srd_session_send(s, 3072, 4095, inbuf, 1024, 1); * * INCORRECT example (4096 samples total, 4 chunks @ 1024 samples each, but * the start- and end-samplenumbers are not absolute): * srd_session_send(s, 0, 1023, inbuf, 1024, 1); * srd_session_send(s, 0, 1023, inbuf, 1024, 1); * srd_session_send(s, 0, 1023, inbuf, 1024, 1); * srd_session_send(s, 0, 1023, inbuf, 1024, 1); * * @param sess The session to use. Must not be NULL. * @param abs_start_samplenum The absolute starting sample number for the * buffer's sample set, relative to the start of capture. * @param abs_end_samplenum The absolute ending sample number for the * buffer's sample set, relative to the start of capture. * @param inbuf Pointer to sample data. Must not be NULL. * @param inbuflen Length in bytes of the buffer. Must be > 0. * @param unitsize The number of bytes per sample. Must be > 0. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.4.0 */ SRD_API int srd_session_send(struct srd_session *sess, uint64_t abs_start_samplenum, uint64_t abs_end_samplenum, const uint8_t *inbuf, uint64_t inbuflen, uint64_t unitsize) { GSList *d; int ret; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return SRD_ERR_ARG; } for (d = sess->di_list; d; d = d->next) { if ((ret = srd_inst_decode(d->data, abs_start_samplenum, abs_end_samplenum, inbuf, inbuflen, unitsize)) != SRD_OK) return ret; } return SRD_OK; } /** * Destroy a decoding session. * * All decoder instances and output callbacks are properly released. * * @param sess The session to be destroyed. * * @return SRD_OK upon success, a (negative) error code otherwise. * * @since 0.3.0 */ SRD_API int srd_session_destroy(struct srd_session *sess) { int session_id; if (!sess) { srd_err("Invalid session."); return SRD_ERR_ARG; } session_id = sess->session_id; if (sess->di_list) srd_inst_free_all(sess); if (sess->callbacks) g_slist_free_full(sess->callbacks, g_free); sessions = g_slist_remove(sessions, sess); g_free(sess); srd_dbg("Destroyed session %d.", session_id); return SRD_OK; } /** * Register/add a decoder output callback function. * * The function will be called when a protocol decoder sends output back * to the PD controller (except for Python objects, which only go up the * stack). * * @param sess The output session in which to register the callback. * @param output_type The output type this callback will receive. Only one * callback per output type can be registered. * @param cb The function to call. Must not be NULL. * @param cb_data Private data for the callback function. Can be NULL. * * @since 0.3.0 */ SRD_API int srd_pd_output_callback_add(struct srd_session *sess, int output_type, srd_pd_output_callback cb, void *cb_data) { struct srd_pd_callback *pd_cb; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return SRD_ERR_ARG; } srd_dbg("Registering new callback for output type %d.", output_type); pd_cb = g_malloc(sizeof(struct srd_pd_callback)); pd_cb->output_type = output_type; pd_cb->cb = cb; pd_cb->cb_data = cb_data; sess->callbacks = g_slist_append(sess->callbacks, pd_cb); return SRD_OK; } /** @private */ SRD_PRIV struct srd_pd_callback *srd_pd_output_callback_find( struct srd_session *sess, int output_type) { GSList *l; struct srd_pd_callback *tmp, *pd_cb; if (session_is_valid(sess) != SRD_OK) { srd_err("Invalid session."); return NULL; } pd_cb = NULL; for (l = sess->callbacks; l; l = l->next) { tmp = l->data; if (tmp->output_type == output_type) { pd_cb = tmp; break; } } return pd_cb; } /** @} */ libsigrokdecode-0.5.0/type_logic.c0000644000175000017500000000576413117366227014114 00000000000000/* * This file is part of the libsigrokdecode project. * * Copyright (C) 2012 Bert Vermeulen * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #include #include "libsigrokdecode-internal.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */ #include "libsigrokdecode.h" #include #include static PyObject *srd_logic_iter(PyObject *self) { return self; } static PyObject *srd_logic_iternext(PyObject *self) { srd_logic *logic; PyObject *py_samplenum, *py_samples; uint8_t *sample_pos, sample; int byte_offset, bit_offset, i; logic = (srd_logic *)self; if (logic->itercnt >= logic->inbuflen / logic->di->data_unitsize) { /* End iteration loop. */ return NULL; } /* * Convert the bit-packed sample to an array of bytes, with only 0x01 * and 0x00 values, so the PD doesn't need to do any bitshifting. */ sample_pos = logic->inbuf + logic->itercnt * logic->di->data_unitsize; for (i = 0; i < logic->di->dec_num_channels; i++) { /* A channelmap value of -1 means "unused optional channel". */ if (logic->di->dec_channelmap[i] == -1) { /* Value of unused channel is 0xff, instead of 0 or 1. */ logic->di->channel_samples[i] = 0xff; } else { byte_offset = logic->di->dec_channelmap[i] / 8; bit_offset = logic->di->dec_channelmap[i] % 8; sample = *(sample_pos + byte_offset) & (1 << bit_offset) ? 1 : 0; logic->di->channel_samples[i] = sample; } } /* Prepare the next samplenum/sample list in this iteration. */ py_samplenum = PyLong_FromUnsignedLongLong(logic->abs_start_samplenum + logic->itercnt); PyList_SetItem(logic->sample, 0, py_samplenum); py_samples = PyBytes_FromStringAndSize((const char *)logic->di->channel_samples, logic->di->dec_num_channels); PyList_SetItem(logic->sample, 1, py_samples); Py_INCREF(logic->sample); logic->itercnt++; return logic->sample; } /** Create the srd_logic type. * @return The new type object. * @private */ SRD_PRIV PyObject *srd_logic_type_new(void) { PyType_Spec spec; PyType_Slot slots[] = { { Py_tp_doc, "sigrokdecode logic sample object" }, { Py_tp_iter, (void *)&srd_logic_iter }, { Py_tp_iternext, (void *)&srd_logic_iternext }, { Py_tp_new, (void *)&PyType_GenericNew }, { 0, NULL } }; spec.name = "srd_logic"; spec.basicsize = sizeof(srd_logic); spec.itemsize = 0; spec.flags = Py_TPFLAGS_DEFAULT; spec.slots = slots; return PyType_FromSpec(&spec); } libsigrokdecode-0.5.0/decoders/0000755000175000017500000000000013117367246013450 500000000000000libsigrokdecode-0.5.0/decoders/xfp/0000755000175000017500000000000013117367246014245 500000000000000libsigrokdecode-0.5.0/decoders/xfp/pd.py0000644000175000017500000004025713117367246015152 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from common.plugtrx import (MODULE_ID, ALARM_THRESHOLDS, AD_READOUTS, GCS_BITS, CONNECTOR, TRANSCEIVER, SERIAL_ENCODING, XMIT_TECH, CDR, DEVICE_TECH, ENHANCED_OPTS, AUX_TYPES) class Decoder(srd.Decoder): api_version = 2 id = 'xfp' name = 'XFP' longname = '10 Gigabit Small Form Factor Pluggable Module (XFP)' desc = 'Data structure describing display device capabilities.' license = 'gplv3+' inputs = ['i2c'] outputs = ['xfp'] annotations = ( ('fieldnames-and-values', 'XFP structure field names and values'), ('fields', 'XFP structure fields'), ) def __init__(self): # Received data items, used as an index into samplenum/data self.cnt = -1 # Start/end sample numbers per data item self.sn = [] # Multi-byte structure buffer self.buf = [] # Filled in by address 0x7f in low memory self.cur_highmem_page = 0 # Filled in by extended ID value in table 2 self.have_clei = False # Handlers for each field in the structure, keyed by the end # index of that field. Each handler is fed all unhandled bytes # up until that point, so mark unused space with the dummy # handler self.ignore(). self.MAP_LOWER_MEMORY = { 0: self.module_id, 1: self.signal_cc, 57: self.alarm_warnings, 59: self.vps, 69: self.ignore, 71: self.ber, 75: self.wavelength_cr, 79: self.fec_cr, 95: self.int_ctrl, 109: self.ad_readout, 111: self.gcs, 117: self.ignore, 118: self.ignore, 122: self.ignore, 126: self.ignore, 127: self.page_select, } self.MAP_HIGH_TABLE_1 = { 128: self.module_id, 129: self.ext_module_id, 130: self.connector, 138: self.transceiver, 139: self.serial_encoding, 140: self.br_min, 141: self.br_max, 142: self.link_length_smf, 143: self.link_length_e50, 144: self.link_length_50um, 145: self.link_length_625um, 146: self.link_length_copper, 147: self.device_tech, 163: self.vendor, 164: self.cdr, 167: self.vendor_oui, 183: self.vendor_pn, 185: self.vendor_rev, 187: self.wavelength, 189: self.wavelength_tolerance, 190: self.max_case_temp, 191: self.ignore, 195: self.power_supply, 211: self.vendor_sn, 219: self.manuf_date, 220: self.diag_mon, 221: self.enhanced_opts, 222: self.aux_mon, 223: self.ignore, 255: self.maybe_ascii, } def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def decode(self, ss, es, data): cmd, data = data # We only care about actual data bytes that are read (for now). if cmd != 'DATA READ': return self.cnt += 1 self.sn.append([ss, es]) self.buf.append(data) if self.cnt < 0x80: if self.cnt in self.MAP_LOWER_MEMORY: self.MAP_LOWER_MEMORY[self.cnt](self.buf) self.buf.clear() elif self.cnt < 0x0100 and self.cur_highmem_page == 0x01: # Serial ID memory map if self.cnt in self.MAP_HIGH_TABLE_1: self.MAP_HIGH_TABLE_1[self.cnt](self.buf) self.buf.clear() # Annotation helper def annotate(self, key, value, start_cnt=None, end_cnt=None): if start_cnt is None: start_cnt = self.cnt - len(self.buf) + 1 if end_cnt is None: end_cnt = self.cnt self.put(self.sn[start_cnt][0], self.sn[end_cnt][1], self.out_ann, [0, [key + ": " + value]]) self.put(self.sn[start_cnt][0], self.sn[end_cnt][1], self.out_ann, [1, [value]]) # Placeholder handler, needed to advance the buffer past unused or # reserved space in the structures. def ignore(self, data): pass # Show as ASCII if possible def maybe_ascii(self, data): for i in range(len(data)): if data[i] >= 0x20 and data[i] < 0x7f: cnt = self.cnt - len(data) + 1 self.annotate("Vendor ID", chr(data[i]), cnt, cnt) # Convert 16-bit two's complement values, with each increment # representing 1/256C, to degrees Celsius. def to_temp(self, value): if value & 0x8000: value = -((value ^ 0xffff) + 1) temp = value / 256.0 return "%.1f C" % temp # TX bias current in uA. Each increment represents 0.2uA def to_current(self, value): current = value / 500000.0 return "%.1f mA" % current # Power in mW, with each increment representing 0.1uW def to_power(self, value): power = value / 10000.0 return "%.2f mW" % power # Wavelength in increments of 0.05nm def to_wavelength(self, value): wl = value / 20 return "%d nm" % wl # Wavelength in increments of 0.005nm def to_wavelength_tolerance(self, value): wl = value / 200.0 return "%.1f nm" % wl def module_id(self, data): self.annotate("Module identifier", MODULE_ID.get(data[0], "Unknown")) def signal_cc(self, data): # No good data available. if (data[0] != 0x00): self.annotate("Signal Conditioner Control", "%.2x" % data[0]) def alarm_warnings(self, data): cnt_idx = self.cnt - len(data) idx = 0 while idx < 56: if idx == 8: # Skip over reserved A/D flag thresholds idx += 8 value = (data[idx] << 8) | data[idx + 1] if value != 0: name = ALARM_THRESHOLDS.get(idx, "...") if idx in (0, 2, 4, 6): self.annotate(name, self.to_temp(value), cnt_idx + idx, cnt_idx + idx + 1) elif idx in (16, 18, 20, 22): self.annotate(name, self.to_current(value), cnt_idx + idx, cnt_idx + idx + 1) elif idx in (24, 26, 28, 30, 32, 34, 36, 38): self.annotate(name, self.to_power(value), cnt_idx + idx, cnt_idx + idx + 1) else: self.annotate(name, "%d" % name, value, cnt_idx + idx, cnt_idx + idx + 1) idx += 2 def vps(self, data): # No good data available. if (data != [0, 0]): self.annotate("VPS", "%.2x%.2x" % (data[0], data[1])) def ber(self, data): # No good data available. if (data != [0, 0]): self.annotate("BER", str(data)) def wavelength_cr(self, data): # No good data available. if (data != [0, 0, 0, 0]): self.annotate("WCR", str(data)) def fec_cr(self, data): if (data != [0, 0, 0, 0]): self.annotate("FEC", str(data)) def int_ctrl(self, data): # No good data available. Also boring. out = [] for d in data: out.append("%.2x" % d) self.annotate("Interrupt bits", ' '.join(out)) def ad_readout(self, data): cnt_idx = self.cnt - len(data) + 1 idx = 0 while idx < 14: if idx == 2: # Skip over reserved field idx += 2 value = (data[idx] << 8) | data[idx + 1] name = AD_READOUTS.get(idx, "...") if value != 0: if idx == 0: self.annotate(name, self.to_temp(value), cnt_idx + idx, cnt_idx + idx + 1) elif idx == 4: self.annotate(name, self.to_current(value), cnt_idx + idx, cnt_idx + idx + 1) elif idx in (6, 8): self.annotate(name, self.to_power(value), cnt_idx + idx, cnt_idx + idx + 1) else: self.annotate(name, str(value), cnt_idx + idx, cnt_idx + idx + 1) idx += 2 def gcs(self, data): allbits = (data[0] << 8) | data[1] out = [] for b in range(13): if allbits & 0x8000: out.append(GCS_BITS[b]) allbits <<= 1 self.annotate("General Control/Status", ', '.join(out)) def page_select(self, data): self.cur_highmem_page = data[0] def ext_module_id(self, data): out = ["Power level %d module" % ((data[0] >> 6) + 1)] if data[0] & 0x20 == 0: out.append("CDR") if data[0] & 0x10 == 0: out.append("TX ref clock input required") if data[0] & 0x08 == 0: self.have_clei = True self.annotate("Extended id", ', '.join(out)) def connector(self, data): if data[0] in CONNECTOR: self.annotate("Connector", CONNECTOR[data[0]]) def transceiver(self, data): out = [] for t in range(8): if data[t] == 0: continue value = data[t] for b in range(8): if value & 0x80: if len(TRANSCEIVER[t]) < b + 1: out.append("(unknown)") else: out.append(TRANSCEIVER[t][b]) value <<= 1 self.annotate("Transceiver compliance", ', '.join(out)) def serial_encoding(self, data): out = [] value = data[0] for b in range(8): if value & 0x80: if len(SERIAL_ENCODING) < b + 1: out.append("(unknown)") else: out.append(SERIAL_ENCODING[b]) value <<= 1 self.annotate("Serial encoding support", ', '.join(out)) def br_min(self, data): # Increments represent 100Mb/s rate = data[0] / 10.0 self.annotate("Minimum bit rate", "%.3f GB/s" % rate) def br_max(self, data): # Increments represent 100Mb/s rate = data[0] / 10.0 self.annotate("Maximum bit rate", "%.3f GB/s" % rate) def link_length_smf(self, data): if data[0] == 0: length = "(standard)" elif data[0] == 255: length = "> 254 km" else: length = "%d km" % data[0] self.annotate("Link length (SMF)", length) def link_length_e50(self, data): if data[0] == 0: length = "(standard)" elif data[0] == 255: length = "> 508 m" else: length = "%d m" % (data[0] * 2) self.annotate("Link length (extended, 50μm MMF)", length) def link_length_50um(self, data): if data[0] == 0: length = "(standard)" elif data[0] == 255: length = "> 254 m" else: length = "%d m" % data[0] self.annotate("Link length (50μm MMF)", length) def link_length_625um(self, data): if data[0] == 0: length = "(standard)" elif data[0] == 255: length = "> 254 m" else: length = "%d m" % (data[0]) self.annotate("Link length (62.5μm MMF)", length) def link_length_copper(self, data): if data[0] == 0: length = "(unknown)" elif data[0] == 255: length = "> 254 m" else: length = "%d m" % (data[0] * 2) self.annotate("Link length (copper)", length) def device_tech(self, data): out = [] xmit = data[0] >> 4 if xmit <= len(XMIT_TECH) - 1: out.append("%s transmitter" % XMIT_TECH[xmit]) dev = data[0] & 0x0f for b in range(4): out.append(DEVICE_TECH[b][(dev >> (3 - b)) & 0x01]) self.annotate("Device technology", ', '.join(out)) def vendor(self, data): name = bytes(data).strip().decode('ascii').strip('\x00') if name: self.annotate("Vendor", name) def cdr(self, data): out = [] value = data[0] for b in range(8): if value & 0x80: out.append(CDR[b]) value <<= 1 self.annotate("CDR support", ', '.join(out)) def vendor_oui(self, data): if data != [0, 0, 0]: self.annotate("Vendor OUI", "%.2X-%.2X-%.2X" % tuple(data)) def vendor_pn(self, data): name = bytes(data).strip().decode('ascii').strip('\x00') if name: self.annotate("Vendor part number", name) def vendor_rev(self, data): name = bytes(data).strip().decode('ascii').strip('\x00') if name: self.annotate("Vendor revision", name) def wavelength(self, data): value = (data[0] << 8) | data[1] self.annotate("Wavelength", self.to_wavelength(value)) def wavelength_tolerance(self, data): value = (data[0] << 8) | data[1] self.annotate("Wavelength tolerance", self.to_wavelength_tolerance(value)) def max_case_temp(self, data): self.annotate("Maximum case temperature", "%d C" % data[0]) def power_supply(self, data): out = [] self.annotate("Max power dissipation", "%.3f W" % (data[0] * 0.02), self.cnt - 3, self.cnt - 3) self.annotate("Max power dissipation (powered down)", "%.3f W" % (data[1] * 0.01), self.cnt - 2, self.cnt - 2) value = (data[2] >> 4) * 0.050 self.annotate("Max current required (5V supply)", "%.3f A" % value, self.cnt - 1, self.cnt - 1) value = (data[2] & 0x0f) * 0.100 self.annotate("Max current required (3.3V supply)", "%.3f A" % value, self.cnt - 1, self.cnt - 1) value = (data[3] >> 4) * 0.100 self.annotate("Max current required (1.8V supply)", "%.3f A" % value, self.cnt, self.cnt) value = (data[3] & 0x0f) * 0.050 self.annotate("Max current required (-5.2V supply)", "%.3f A" % value, self.cnt, self.cnt) def vendor_sn(self, data): name = bytes(data).strip().decode('ascii').strip('\x00') if name: self.annotate("Vendor serial number", name) def manuf_date(self, data): y = int(bytes(data[0:2])) + 2000 m = int(bytes(data[2:4])) d = int(bytes(data[4:6])) mnf = "%.4d-%.2d-%.2d" % (y, m, d) lot = bytes(data[6:]).strip().decode('ascii').strip('\x00') if lot: mnf += " lot " + lot self.annotate("Manufacturing date", mnf) def diag_mon(self, data): out = [] if data[0] & 0x10: out.append("BER support") else: out.append("no BER support") if data[0] & 0x08: out.append("average power measurement") else: out.append("OMA power measurement") self.annotate("Diagnostic monitoring", ', '.join(out)) def enhanced_opts(self, data): out = [] value = data[0] for b in range(8): if value & 0x80: out.append(ENHANCED_OPTS[b]) value <<= 1 self.annotate("Enhanced option support", ', '.join(out)) def aux_mon(self, data): aux = AUX_TYPES[data[0] >> 4] self.annotate("AUX1 monitoring", aux) aux = AUX_TYPES[data[0] & 0x0f] self.annotate("AUX2 monitoring", aux) libsigrokdecode-0.5.0/decoders/xfp/__init__.py0000644000175000017500000000304313117367246016276 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This PD decodes the XFP I²C management interface structures/protocol. XFP modules include an I²C interface, used to monitor and control various aspects of the module. The specification defines an I²C slave at address 0x50 (0xa0) which returns 128 bytes of a standard structure ("lower memory"), and, after setting a table number in lower memory, a set of 256 "higher memory" tables, which can be mapped to different subdevices on the XFP. Only one table is defined in the specification: table 0x01, the default on module startup. Other table are either reserved for future expansion, or available for vendor-specific extensions. This decoder supports both lower memory and table 0x01. The XFP specification is available here: ftp://ftp.seagate.com/sff/INF-8077.PDF ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/can/0000755000175000017500000000000013117367246014211 500000000000000libsigrokdecode-0.5.0/decoders/can/pd.py0000644000175000017500000003644613117367246015123 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'can' name = 'CAN' longname = 'Controller Area Network' desc = 'Field bus protocol for distributed realtime control.' license = 'gplv2+' inputs = ['logic'] outputs = ['can'] channels = ( {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'}, ) options = ( {'id': 'bitrate', 'desc': 'Bitrate (bits/s)', 'default': 1000000}, {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0}, ) annotations = ( ('data', 'CAN payload data'), ('sof', 'Start of frame'), ('eof', 'End of frame'), ('id', 'Identifier'), ('ext-id', 'Extended identifier'), ('full-id', 'Full identifier'), ('ide', 'Identifier extension bit'), ('reserved-bit', 'Reserved bit 0 and 1'), ('rtr', 'Remote transmission request'), ('srr', 'Substitute remote request'), ('dlc', 'Data length count'), ('crc-sequence', 'CRC sequence'), ('crc-delimiter', 'CRC delimiter'), ('ack-slot', 'ACK slot'), ('ack-delimiter', 'ACK delimiter'), ('stuff-bit', 'Stuff bit'), ('warnings', 'Human-readable warnings'), ('bit', 'Bit'), ) annotation_rows = ( ('bits', 'Bits', (15, 17)), ('fields', 'Fields', tuple(range(15))), ('warnings', 'Warnings', (16,)), ) def __init__(self): self.samplerate = None self.reset_variables() def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.bit_width = float(self.samplerate) / float(self.options['bitrate']) self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] # Generic helper for CAN bit annotations. def putg(self, ss, es, data): left, right = int(self.bitpos), int(self.bit_width - self.bitpos) self.put(ss - left, es + right, self.out_ann, data) # Single-CAN-bit annotation using the current samplenum. def putx(self, data): self.putg(self.samplenum, self.samplenum, data) # Single-CAN-bit annotation using the samplenum of CAN bit 12. def put12(self, data): self.putg(self.ss_bit12, self.ss_bit12, data) # Multi-CAN-bit annotation from self.ss_block to current samplenum. def putb(self, data): self.putg(self.ss_block, self.samplenum, data) def reset_variables(self): self.state = 'IDLE' self.sof = self.frame_type = self.dlc = None self.rawbits = [] # All bits, including stuff bits self.bits = [] # Only actual CAN frame bits (no stuff bits) self.curbit = 0 # Current bit of CAN frame (bit 0 == SOF) self.last_databit = 999 # Positive value that bitnum+x will never match self.ss_block = None self.ss_bit12 = None self.ss_databytebits = [] # Determine the position of the next desired bit's sample point. def get_sample_point(self, bitnum): bitpos = int(self.sof + (self.bit_width * bitnum) + self.bitpos) return bitpos def is_stuff_bit(self): # CAN uses NRZ encoding and bit stuffing. # After 5 identical bits, a stuff bit of opposite value is added. # But not in the CRC delimiter, ACK, and end of frame fields. if len(self.bits) > self.last_databit + 16: return False last_6_bits = self.rawbits[-6:] if last_6_bits not in ([0, 0, 0, 0, 0, 1], [1, 1, 1, 1, 1, 0]): return False # Stuff bit. Keep it in self.rawbits, but drop it from self.bits. self.bits.pop() # Drop last bit. return True def is_valid_crc(self, crc_bits): return True # TODO def decode_error_frame(self, bits): pass # TODO def decode_overload_frame(self, bits): pass # TODO # Both standard and extended frames end with CRC, CRC delimiter, ACK, # ACK delimiter, and EOF fields. Handle them in a common function. # Returns True if the frame ended (EOF), False otherwise. def decode_frame_end(self, can_rx, bitnum): # Remember start of CRC sequence (see below). if bitnum == (self.last_databit + 1): self.ss_block = self.samplenum # CRC sequence (15 bits) elif bitnum == (self.last_databit + 15): x = self.last_databit + 1 crc_bits = self.bits[x:x + 15 + 1] self.crc = int(''.join(str(d) for d in crc_bits), 2) self.putb([11, ['CRC sequence: 0x%04x' % self.crc, 'CRC: 0x%04x' % self.crc, 'CRC']]) if not self.is_valid_crc(crc_bits): self.putb([16, ['CRC is invalid']]) # CRC delimiter bit (recessive) elif bitnum == (self.last_databit + 16): self.putx([12, ['CRC delimiter: %d' % can_rx, 'CRC d: %d' % can_rx, 'CRC d']]) if can_rx != 1: self.putx([16, ['CRC delimiter must be a recessive bit']]) # ACK slot bit (dominant: ACK, recessive: NACK) elif bitnum == (self.last_databit + 17): ack = 'ACK' if can_rx == 0 else 'NACK' self.putx([13, ['ACK slot: %s' % ack, 'ACK s: %s' % ack, 'ACK s']]) # ACK delimiter bit (recessive) elif bitnum == (self.last_databit + 18): self.putx([14, ['ACK delimiter: %d' % can_rx, 'ACK d: %d' % can_rx, 'ACK d']]) if can_rx != 1: self.putx([16, ['ACK delimiter must be a recessive bit']]) # Remember start of EOF (see below). elif bitnum == (self.last_databit + 19): self.ss_block = self.samplenum # End of frame (EOF), 7 recessive bits elif bitnum == (self.last_databit + 25): self.putb([2, ['End of frame', 'EOF', 'E']]) if self.rawbits[-7:] != [1, 1, 1, 1, 1, 1, 1]: self.putb([16, ['End of frame (EOF) must be 7 recessive bits']]) self.reset_variables() return True return False # Returns True if the frame ended (EOF), False otherwise. def decode_standard_frame(self, can_rx, bitnum): # Bit 14: RB0 (reserved bit) # Has to be sent dominant, but receivers should accept recessive too. if bitnum == 14: self.putx([7, ['Reserved bit 0: %d' % can_rx, 'RB0: %d' % can_rx, 'RB0']]) # Bit 12: Remote transmission request (RTR) bit # Data frame: dominant, remote frame: recessive # Remote frames do not contain a data field. rtr = 'remote' if self.bits[12] == 1 else 'data' self.put12([8, ['Remote transmission request: %s frame' % rtr, 'RTR: %s frame' % rtr, 'RTR']]) # Remember start of DLC (see below). elif bitnum == 15: self.ss_block = self.samplenum # Bits 15-18: Data length code (DLC), in number of bytes (0-8). elif bitnum == 18: self.dlc = int(''.join(str(d) for d in self.bits[15:18 + 1]), 2) self.putb([10, ['Data length code: %d' % self.dlc, 'DLC: %d' % self.dlc, 'DLC']]) self.last_databit = 18 + (self.dlc * 8) if self.dlc > 8: self.putb([16, ['Data length code (DLC) > 8 is not allowed']]) # Remember all databyte bits, except the very last one. elif bitnum in range(19, self.last_databit): self.ss_databytebits.append(self.samplenum) # Bits 19-X: Data field (0-8 bytes, depending on DLC) # The bits within a data byte are transferred MSB-first. elif bitnum == self.last_databit: self.ss_databytebits.append(self.samplenum) # Last databyte bit. for i in range(self.dlc): x = 18 + (8 * i) + 1 b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) ss = self.ss_databytebits[i * 8] es = self.ss_databytebits[((i + 1) * 8) - 1] self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), 'DB %d: 0x%02x' % (i, b), 'DB']]) self.ss_databytebits = [] elif bitnum > self.last_databit: return self.decode_frame_end(can_rx, bitnum) return False # Returns True if the frame ended (EOF), False otherwise. def decode_extended_frame(self, can_rx, bitnum): # Remember start of EID (see below). if bitnum == 14: self.ss_block = self.samplenum # Bits 14-31: Extended identifier (EID[17..0]) elif bitnum == 31: self.eid = int(''.join(str(d) for d in self.bits[14:]), 2) s = '%d (0x%x)' % (self.eid, self.eid) self.putb([4, ['Extended Identifier: %s' % s, 'Extended ID: %s' % s, 'Extended ID', 'EID']]) self.fullid = self.id << 18 | self.eid s = '%d (0x%x)' % (self.fullid, self.fullid) self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s, 'Full ID', 'FID']]) # Bit 12: Substitute remote request (SRR) bit self.put12([9, ['Substitute remote request: %d' % self.bits[12], 'SRR: %d' % self.bits[12], 'SRR']]) # Bit 32: Remote transmission request (RTR) bit # Data frame: dominant, remote frame: recessive # Remote frames do not contain a data field. if bitnum == 32: rtr = 'remote' if can_rx == 1 else 'data' self.putx([8, ['Remote transmission request: %s frame' % rtr, 'RTR: %s frame' % rtr, 'RTR']]) # Bit 33: RB1 (reserved bit) elif bitnum == 33: self.putx([7, ['Reserved bit 1: %d' % can_rx, 'RB1: %d' % can_rx, 'RB1']]) # Bit 34: RB0 (reserved bit) elif bitnum == 34: self.putx([7, ['Reserved bit 0: %d' % can_rx, 'RB0: %d' % can_rx, 'RB0']]) # Remember start of DLC (see below). elif bitnum == 35: self.ss_block = self.samplenum # Bits 35-38: Data length code (DLC), in number of bytes (0-8). elif bitnum == 38: self.dlc = int(''.join(str(d) for d in self.bits[35:38 + 1]), 2) self.putb([10, ['Data length code: %d' % self.dlc, 'DLC: %d' % self.dlc, 'DLC']]) self.last_databit = 38 + (self.dlc * 8) # Remember all databyte bits, except the very last one. elif bitnum in range(39, self.last_databit): self.ss_databytebits.append(self.samplenum) # Bits 39-X: Data field (0-8 bytes, depending on DLC) # The bits within a data byte are transferred MSB-first. elif bitnum == self.last_databit: self.ss_databytebits.append(self.samplenum) # Last databyte bit. for i in range(self.dlc): x = 38 + (8 * i) + 1 b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) ss = self.ss_databytebits[i * 8] es = self.ss_databytebits[((i + 1) * 8) - 1] self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), 'DB %d: 0x%02x' % (i, b), 'DB']]) self.ss_databytebits = [] elif bitnum > self.last_databit: return self.decode_frame_end(can_rx, bitnum) return False def handle_bit(self, can_rx): self.rawbits.append(can_rx) self.bits.append(can_rx) # Get the index of the current CAN frame bit (without stuff bits). bitnum = len(self.bits) - 1 # If this is a stuff bit, remove it from self.bits and ignore it. if self.is_stuff_bit(): self.putx([15, [str(can_rx)]]) self.curbit += 1 # Increase self.curbit (bitnum is not affected). return else: self.putx([17, [str(can_rx)]]) # Bit 0: Start of frame (SOF) bit if bitnum == 0: self.putx([1, ['Start of frame', 'SOF', 'S']]) if can_rx != 0: self.putx([16, ['Start of frame (SOF) must be a dominant bit']]) # Remember start of ID (see below). elif bitnum == 1: self.ss_block = self.samplenum # Bits 1-11: Identifier (ID[10..0]) # The bits ID[10..4] must NOT be all recessive. elif bitnum == 11: self.id = int(''.join(str(d) for d in self.bits[1:]), 2) s = '%d (0x%x)' % (self.id, self.id), self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']]) if (self.id & 0x7f0) == 0x7f0: self.putb([16, ['Identifier bits 10..4 must not be all recessive']]) # RTR or SRR bit, depending on frame type (gets handled later). elif bitnum == 12: # self.putx([0, ['RTR/SRR: %d' % can_rx]]) # Debug only. self.ss_bit12 = self.samplenum # Bit 13: Identifier extension (IDE) bit # Standard frame: dominant, extended frame: recessive elif bitnum == 13: ide = self.frame_type = 'standard' if can_rx == 0 else 'extended' self.putx([6, ['Identifier extension bit: %s frame' % ide, 'IDE: %s frame' % ide, 'IDE']]) # Bits 14-X: Frame-type dependent, passed to the resp. handlers. elif bitnum >= 14: if self.frame_type == 'standard': done = self.decode_standard_frame(can_rx, bitnum) else: done = self.decode_extended_frame(can_rx, bitnum) # The handlers return True if a frame ended (EOF). if done: return # After a frame there are 3 intermission bits (recessive). # After these bits, the bus is considered free. self.curbit += 1 def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: # State machine. if self.state == 'IDLE': # Wait for a dominant state (logic 0) on the bus. (can_rx,) = self.wait({0: 'l'}) self.sof = self.samplenum self.state = 'GET BITS' elif self.state == 'GET BITS': # Wait until we're in the correct bit/sampling position. pos = self.get_sample_point(self.curbit) (can_rx,) = self.wait({'skip': pos - self.samplenum}) self.handle_bit(can_rx) libsigrokdecode-0.5.0/decoders/can/__init__.py0000644000175000017500000000202213117367246016236 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' CAN (Controller Area Network) is a field bus protocol for distributed real-time control. This decoder assumes that a single CAN_RX line is sampled (e.g. on the digital output side of a CAN transceiver IC such as the Microchip MCP-2515DM-BM). ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/rgb_led_ws281x/0000755000175000017500000000000013117367246016202 500000000000000libsigrokdecode-0.5.0/decoders/rgb_led_ws281x/pd.py0000644000175000017500000001014513117367246017100 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Vladimir Ermakov ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from functools import reduce class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 2 id = 'rgb_led_ws281x' name = 'RGB LED (WS281x)' longname = 'RGB LED string decoder (WS281x)' desc = 'RGB LED string protocol (WS281x).' license = 'gplv3+' inputs = ['logic'] outputs = ['rgb_led_ws281x'] channels = ( {'id': 'din', 'name': 'DIN', 'desc': 'DIN data line'}, ) annotations = ( ('bit', 'Bit'), ('reset', 'RESET'), ('rgb', 'RGB'), ) annotation_rows = ( ('bit', 'Bits', (0, 1)), ('rgb', 'RGB', (2,)), ) def __init__(self): self.samplerate = None self.oldpin = None self.ss_packet = None self.ss = None self.es = None self.bits = [] self.inreset = False def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def handle_bits(self, samplenum): if len(self.bits) == 24: grb = reduce(lambda a, b: (a << 1) | b, self.bits) rgb = (grb & 0xff0000) >> 8 | (grb & 0x00ff00) << 8 | (grb & 0x0000ff) self.put(self.ss_packet, samplenum, self.out_ann, [2, ['#%06x' % rgb]]) self.bits = [] self.ss_packet = None def decode(self, ss, es, data): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') for (self.samplenum, (pin, )) in data: if self.oldpin is None: self.oldpin = pin continue # Check RESET condition (manufacturer recommends 50 usec minimal, # but real minimum is ~10 usec). if not self.inreset and not pin and self.es is not None and \ (self.samplenum - self.es) / self.samplerate > 50e-6: # Decode last bit value. tH = (self.es - self.ss) / self.samplerate bit_ = True if tH >= 625e-9 else False self.bits.append(bit_) self.handle_bits(self.es) self.put(self.ss, self.es, self.out_ann, [0, ['%d' % bit_]]) self.put(self.es, self.samplenum, self.out_ann, [1, ['RESET', 'RST', 'R']]) self.inreset = True self.bits = [] self.ss_packet = None self.ss = None if not self.oldpin and pin: # Rising edge. if self.ss and self.es: period = self.samplenum - self.ss duty = self.es - self.ss # Ideal duty for T0H: 33%, T1H: 66%. bit_ = (duty / period) > 0.5 self.put(self.ss, self.samplenum, self.out_ann, [0, ['%d' % bit_]]) self.bits.append(bit_) self.handle_bits(self.samplenum) if self.ss_packet is None: self.ss_packet = self.samplenum self.ss = self.samplenum elif self.oldpin and not pin: # Falling edge. self.inreset = False self.es = self.samplenum self.oldpin = pin libsigrokdecode-0.5.0/decoders/rgb_led_ws281x/__init__.py0000644000175000017500000000166313117367246020241 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Vladimir Ermakov ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' WS281x RGB LED protocol decoder. Details: https://cpldcpu.wordpress.com/2014/01/14/light_ws2812-library-v2-0-part-i-understanding-the-ws2812/ ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/uart/0000755000175000017500000000000013117367246014423 500000000000000libsigrokdecode-0.5.0/decoders/uart/pd.py0000644000175000017500000003671213117367246015331 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2011-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from math import floor, ceil ''' OUTPUT_PYTHON format: Packet: [, , ] This is the list of s and their respective values: - 'STARTBIT': The data is the (integer) value of the start bit (0/1). - 'DATA': This is always a tuple containing two items: - 1st item: the (integer) value of the UART data. Valid values range from 0 to 511 (as the data can be up to 9 bits in size). - 2nd item: the list of individual data bits and their ss/es numbers. - 'PARITYBIT': The data is the (integer) value of the parity bit (0/1). - 'STOPBIT': The data is the (integer) value of the stop bit (0 or 1). - 'INVALID STARTBIT': The data is the (integer) value of the start bit (0/1). - 'INVALID STOPBIT': The data is the (integer) value of the stop bit (0/1). - 'PARITY ERROR': The data is a tuple with two entries. The first one is the expected parity value, the second is the actual parity value. - TODO: Frame error? The field is 0 for RX packets, 1 for TX packets. ''' # Used for differentiating between the two data directions. RX = 0 TX = 1 # Given a parity type to check (odd, even, zero, one), the value of the # parity bit, the value of the data, and the length of the data (5-9 bits, # usually 8 bits) return True if the parity is correct, False otherwise. # 'none' is _not_ allowed as value for 'parity_type'. def parity_ok(parity_type, parity_bit, data, num_data_bits): # Handle easy cases first (parity bit is always 1 or 0). if parity_type == 'zero': return parity_bit == 0 elif parity_type == 'one': return parity_bit == 1 # Count number of 1 (high) bits in the data (and the parity bit itself!). ones = bin(data).count('1') + parity_bit # Check for odd/even parity. if parity_type == 'odd': return (ones % 2) == 1 elif parity_type == 'even': return (ones % 2) == 0 class SamplerateError(Exception): pass class ChannelError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'uart' name = 'UART' longname = 'Universal Asynchronous Receiver/Transmitter' desc = 'Asynchronous, serial bus.' license = 'gplv2+' inputs = ['logic'] outputs = ['uart'] optional_channels = ( # Allow specifying only one of the signals, e.g. if only one data # direction exists (or is relevant). {'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'}, {'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'}, ) options = ( {'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200}, {'id': 'num_data_bits', 'desc': 'Data bits', 'default': 8, 'values': (5, 6, 7, 8, 9)}, {'id': 'parity_type', 'desc': 'Parity type', 'default': 'none', 'values': ('none', 'odd', 'even', 'zero', 'one')}, {'id': 'parity_check', 'desc': 'Check parity?', 'default': 'yes', 'values': ('yes', 'no')}, {'id': 'num_stop_bits', 'desc': 'Stop bits', 'default': 1.0, 'values': (0.0, 0.5, 1.0, 1.5)}, {'id': 'bit_order', 'desc': 'Bit order', 'default': 'lsb-first', 'values': ('lsb-first', 'msb-first')}, {'id': 'format', 'desc': 'Data format', 'default': 'hex', 'values': ('ascii', 'dec', 'hex', 'oct', 'bin')}, {'id': 'invert_rx', 'desc': 'Invert RX?', 'default': 'no', 'values': ('yes', 'no')}, {'id': 'invert_tx', 'desc': 'Invert TX?', 'default': 'no', 'values': ('yes', 'no')}, ) annotations = ( ('rx-data', 'RX data'), ('tx-data', 'TX data'), ('rx-start', 'RX start bits'), ('tx-start', 'TX start bits'), ('rx-parity-ok', 'RX parity OK bits'), ('tx-parity-ok', 'TX parity OK bits'), ('rx-parity-err', 'RX parity error bits'), ('tx-parity-err', 'TX parity error bits'), ('rx-stop', 'RX stop bits'), ('tx-stop', 'TX stop bits'), ('rx-warnings', 'RX warnings'), ('tx-warnings', 'TX warnings'), ('rx-data-bits', 'RX data bits'), ('tx-data-bits', 'TX data bits'), ) annotation_rows = ( ('rx-data', 'RX', (0, 2, 4, 6, 8)), ('rx-data-bits', 'RX bits', (12,)), ('rx-warnings', 'RX warnings', (10,)), ('tx-data', 'TX', (1, 3, 5, 7, 9)), ('tx-data-bits', 'TX bits', (13,)), ('tx-warnings', 'TX warnings', (11,)), ) binary = ( ('rx', 'RX dump'), ('tx', 'TX dump'), ('rxtx', 'RX/TX dump'), ) idle_state = ['WAIT FOR START BIT', 'WAIT FOR START BIT'] def putx(self, rxtx, data): s, halfbit = self.startsample[rxtx], self.bit_width / 2.0 self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_ann, data) def putpx(self, rxtx, data): s, halfbit = self.startsample[rxtx], self.bit_width / 2.0 self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_python, data) def putg(self, data): s, halfbit = self.samplenum, self.bit_width / 2.0 self.put(s - floor(halfbit), s + ceil(halfbit), self.out_ann, data) def putp(self, data): s, halfbit = self.samplenum, self.bit_width / 2.0 self.put(s - floor(halfbit), s + ceil(halfbit), self.out_python, data) def putbin(self, rxtx, data): s, halfbit = self.startsample[rxtx], self.bit_width / 2.0 self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_binary, data) def __init__(self): self.samplerate = None self.samplenum = 0 self.frame_start = [-1, -1] self.startbit = [-1, -1] self.cur_data_bit = [0, 0] self.datavalue = [0, 0] self.paritybit = [-1, -1] self.stopbit1 = [-1, -1] self.startsample = [-1, -1] self.state = ['WAIT FOR START BIT', 'WAIT FOR START BIT'] self.databits = [[], []] def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_ann = self.register(srd.OUTPUT_ANN) self.bw = (self.options['num_data_bits'] + 7) // 8 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value # The width of one UART bit in number of samples. self.bit_width = float(self.samplerate) / float(self.options['baudrate']) def get_sample_point(self, rxtx, bitnum): # Determine absolute sample number of a bit slot's sample point. # bitpos is the samplenumber which is in the middle of the # specified UART bit (0 = start bit, 1..x = data, x+1 = parity bit # (if used) or the first stop bit, and so on). # The samples within bit are 0, 1, ..., (bit_width - 1), therefore # index of the middle sample within bit window is (bit_width - 1) / 2. bitpos = self.frame_start[rxtx] + (self.bit_width - 1) / 2.0 bitpos += bitnum * self.bit_width return bitpos def wait_for_start_bit(self, rxtx, signal): # Save the sample number where the start bit begins. self.frame_start[rxtx] = self.samplenum self.state[rxtx] = 'GET START BIT' def get_start_bit(self, rxtx, signal): self.startbit[rxtx] = signal # The startbit must be 0. If not, we report an error and wait # for the next start bit (assuming this one was spurious). if self.startbit[rxtx] != 0: self.putp(['INVALID STARTBIT', rxtx, self.startbit[rxtx]]) self.putg([rxtx + 10, ['Frame error', 'Frame err', 'FE']]) self.state[rxtx] = 'WAIT FOR START BIT' return self.cur_data_bit[rxtx] = 0 self.datavalue[rxtx] = 0 self.startsample[rxtx] = -1 self.putp(['STARTBIT', rxtx, self.startbit[rxtx]]) self.putg([rxtx + 2, ['Start bit', 'Start', 'S']]) self.state[rxtx] = 'GET DATA BITS' def get_data_bits(self, rxtx, signal): # Save the sample number of the middle of the first data bit. if self.startsample[rxtx] == -1: self.startsample[rxtx] = self.samplenum # Get the next data bit in LSB-first or MSB-first fashion. if self.options['bit_order'] == 'lsb-first': self.datavalue[rxtx] >>= 1 self.datavalue[rxtx] |= \ (signal << (self.options['num_data_bits'] - 1)) else: self.datavalue[rxtx] <<= 1 self.datavalue[rxtx] |= (signal << 0) self.putg([rxtx + 12, ['%d' % signal]]) # Store individual data bits and their start/end samplenumbers. s, halfbit = self.samplenum, int(self.bit_width / 2) self.databits[rxtx].append([signal, s - halfbit, s + halfbit]) # Return here, unless we already received all data bits. self.cur_data_bit[rxtx] += 1 if self.cur_data_bit[rxtx] < self.options['num_data_bits']: return self.putpx(rxtx, ['DATA', rxtx, (self.datavalue[rxtx], self.databits[rxtx])]) b = self.datavalue[rxtx] formatted = self.format_value(b) if formatted is not None: self.putx(rxtx, [rxtx, [formatted]]) bdata = b.to_bytes(self.bw, byteorder='big') self.putbin(rxtx, [rxtx, bdata]) self.putbin(rxtx, [2, bdata]) self.databits[rxtx] = [] # Advance to either reception of the parity bit, or reception of # the STOP bits if parity is not applicable. self.state[rxtx] = 'GET PARITY BIT' if self.options['parity_type'] == 'none': self.state[rxtx] = 'GET STOP BITS' def format_value(self, v): # Format value 'v' according to configured options. # Reflects the user selected kind of representation, as well as # the number of data bits in the UART frames. fmt, bits = self.options['format'], self.options['num_data_bits'] # Assume "is printable" for values from 32 to including 126, # below 32 is "control" and thus not printable, above 127 is # "not ASCII" in its strict sense, 127 (DEL) is not printable, # fall back to hex representation for non-printables. if fmt == 'ascii': if v in range(32, 126 + 1): return chr(v) hexfmt = "[{:02X}]" if bits <= 8 else "[{:03X}]" return hexfmt.format(v) # Mere number to text conversion without prefix and padding # for the "decimal" output format. if fmt == 'dec': return "{:d}".format(v) # Padding with leading zeroes for hex/oct/bin formats, but # without a prefix for density -- since the format is user # specified, there is no ambiguity. if fmt == 'hex': digits = (bits + 4 - 1) // 4 fmtchar = "X" elif fmt == 'oct': digits = (bits + 3 - 1) // 3 fmtchar = "o" elif fmt == 'bin': digits = bits fmtchar = "b" else: fmtchar = None if fmtchar is not None: fmt = "{{:0{:d}{:s}}}".format(digits, fmtchar) return fmt.format(v) return None def get_parity_bit(self, rxtx, signal): self.paritybit[rxtx] = signal if parity_ok(self.options['parity_type'], self.paritybit[rxtx], self.datavalue[rxtx], self.options['num_data_bits']): self.putp(['PARITYBIT', rxtx, self.paritybit[rxtx]]) self.putg([rxtx + 4, ['Parity bit', 'Parity', 'P']]) else: # TODO: Return expected/actual parity values. self.putp(['PARITY ERROR', rxtx, (0, 1)]) # FIXME: Dummy tuple... self.putg([rxtx + 6, ['Parity error', 'Parity err', 'PE']]) self.state[rxtx] = 'GET STOP BITS' # TODO: Currently only supports 1 stop bit. def get_stop_bits(self, rxtx, signal): self.stopbit1[rxtx] = signal # Stop bits must be 1. If not, we report an error. if self.stopbit1[rxtx] != 1: self.putp(['INVALID STOPBIT', rxtx, self.stopbit1[rxtx]]) self.putg([rxtx + 10, ['Frame error', 'Frame err', 'FE']]) # TODO: Abort? Ignore the frame? Other? self.putp(['STOPBIT', rxtx, self.stopbit1[rxtx]]) self.putg([rxtx + 4, ['Stop bit', 'Stop', 'T']]) self.state[rxtx] = 'WAIT FOR START BIT' def get_wait_cond(self, rxtx, inv): # Return condititions that are suitable for Decoder.wait(). Those # conditions either match the falling edge of the START bit, or # the sample point of the next bit time. state = self.state[rxtx] if state == 'WAIT FOR START BIT': return {rxtx: 'r' if inv else 'f'} if state == 'GET START BIT': bitnum = 0 elif state == 'GET DATA BITS': bitnum = 1 + self.cur_data_bit[rxtx] elif state == 'GET PARITY BIT': bitnum = 1 + self.options['num_data_bits'] elif state == 'GET STOP BITS': bitnum = 1 + self.options['num_data_bits'] bitnum += 0 if self.options['parity_type'] == 'none' else 1 want_num = ceil(self.get_sample_point(rxtx, bitnum)) return {'skip': want_num - self.samplenum} def inspect_sample(self, rxtx, signal, inv): # Inspect a sample returned by .wait() for the specified UART line. if inv: signal = not signal state = self.state[rxtx] if state == 'WAIT FOR START BIT': self.wait_for_start_bit(rxtx, signal) elif state == 'GET START BIT': self.get_start_bit(rxtx, signal) elif state == 'GET DATA BITS': self.get_data_bits(rxtx, signal) elif state == 'GET PARITY BIT': self.get_parity_bit(rxtx, signal) elif state == 'GET STOP BITS': self.get_stop_bits(rxtx, signal) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') has_pin = [self.has_channel(ch) for ch in (RX, TX)] if has_pin == [False, False]: raise ChannelError('Either TX or RX (or both) pins required.') opt = self.options inv = [opt['invert_rx'] == 'yes', opt['invert_tx'] == 'yes'] cond_idx = [None] * len(has_pin) while True: conds = [] if has_pin[RX]: cond_idx[RX] = len(conds) conds.append(self.get_wait_cond(RX, inv[RX])) if has_pin[TX]: cond_idx[TX] = len(conds) conds.append(self.get_wait_cond(TX, inv[TX])) (rx, tx) = self.wait(conds) if cond_idx[RX] is not None and self.matched[cond_idx[RX]]: self.inspect_sample(RX, rx, inv[RX]) if cond_idx[TX] is not None and self.matched[cond_idx[TX]]: self.inspect_sample(TX, tx, inv[TX]) libsigrokdecode-0.5.0/decoders/uart/__init__.py0000644000175000017500000000326213117367246016457 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' UART (Universal Asynchronous Receiver Transmitter) is a simple serial communication protocol which allows two devices to talk to each other. This decoder should work on all "UART-like" async protocols with one start bit (0), 5-9 databits, an (optional) parity bit, and one or more stop bits (1), in this order. It can be run on one signal line (RX or TX) only, or on two lines (RX + TX). There are various standards for the physical layer specification of the signals, including RS232, (TTL) UART, RS485, and others. However, the logic level of the respective pins is only relevant when acquiring the data via a logic analyzer (you have to select the correct logic analyzer and/or the correct place where to probe). Once the data is in digital form and matches the "UART" description above, this protocol decoder can work with it though, no matter whether the source was on TTL UART levels, or RS232, or others. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/arm_tpiu/0000755000175000017500000000000013117367246015270 500000000000000libsigrokdecode-0.5.0/decoders/arm_tpiu/pd.py0000644000175000017500000001055513117367246016173 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'arm_tpiu' name = 'ARM TPIU' longname = 'ARM Trace Port Interface Unit' desc = 'Filter TPIU formatted trace data into separate streams.' license = 'gplv2+' inputs = ['uart'] outputs = ['uart'] # Emulate uart output so that arm_itm/arm_etm can stack. options = ( {'id': 'stream', 'desc': 'Stream index', 'default': 1}, {'id': 'sync_offset', 'desc': 'Initial sync offset', 'default': 0}, ) annotations = ( ('stream', 'Current stream'), ('data', 'Stream data'), ) annotation_rows = ( ('stream', 'Current stream', (0,)), ('data', 'Stream data', (1,)), ) def __init__(self): self.buf = [] self.syncbuf = [] self.prevsample = 0 self.stream = 0 self.ss_stream = None self.bytenum = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.out_python = self.register(srd.OUTPUT_PYTHON) def stream_changed(self, ss, stream): if self.stream != stream: if self.stream != 0: self.put(self.ss_stream, ss, self.out_ann, [0, ['Stream %d' % self.stream, 'S%d' % self.stream]]) self.stream = stream self.ss_stream = ss def emit_byte(self, ss, es, byte): if self.stream == self.options['stream']: self.put(ss, es, self.out_ann, [1, ['0x%02x' % byte]]) self.put(ss, es, self.out_python, ['DATA', 0, (byte, [])]) def process_frame(self, buf): # Byte 15 contains the lowest bits of bytes 0, 2, ... 14. lowbits = buf[15][2] for i in range(0, 15, 2): # Odd bytes can be stream ID or data. delayed_stream_change = None lowbit = (lowbits >> (i // 2)) & 0x01 if buf[i][2] & 0x01 != 0: if lowbit: delayed_stream_change = buf[i][2] >> 1 else: self.stream_changed(buf[i][0], buf[i][2] >> 1) else: byte = buf[i][2] | lowbit self.emit_byte(buf[i][0], buf[i][1], byte) # Even bytes are always data. if i < 14: self.emit_byte(buf[i+1][0], buf[i+1][1], buf[i+1][2]) # The stream change can be delayed to occur after the data byte. if delayed_stream_change is not None: self.stream_changed(buf[i+1][1], delayed_stream_change) def decode(self, ss, es, data): ptype, rxtx, pdata = data if ptype != 'DATA': return # Reset packet if there is a long pause between bytes. self.byte_len = es - ss if ss - self.prevsample > self.byte_len: self.buf = [] self.prevsample = es self.buf.append((ss, es, pdata[0])) self.bytenum += 1 # Allow skipping N first bytes of the data. By adjusting the sync # value, one can get initial synchronization as soon as the trace # starts. if self.bytenum < self.options['sync_offset']: self.buf = [] return # Keep separate buffer for detection of sync packets. # Sync packets override everything else, so that we can regain sync # even if some packets are corrupted. self.syncbuf = self.syncbuf[-3:] + [pdata[0]] if self.syncbuf == [0xFF, 0xFF, 0xFF, 0x7F]: self.buf = [] self.syncbuf = [] return if len(self.buf) == 16: self.process_frame(self.buf) self.buf = [] libsigrokdecode-0.5.0/decoders/arm_tpiu/__init__.py0000644000175000017500000000206613117367246017325 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'uart' decoder and decodes the frame format of ARMv7m Trace Port Interface Unit. It filters the data coming from various trace sources (such as ARMv7m ITM and ETM blocks) into separate streams that can be further decoded by other PDs. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/pan1321/0000755000175000017500000000000013117367246014535 500000000000000libsigrokdecode-0.5.0/decoders/pan1321/pd.py0000644000175000017500000001467113117367246015443 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # ... RX = 0 TX = 1 class Decoder(srd.Decoder): api_version = 2 id = 'pan1321' name = 'PAN1321' longname = 'Panasonic PAN1321' desc = 'Bluetooth RF module with Serial Port Profile (SPP).' license = 'gplv2+' inputs = ['uart'] outputs = ['pan1321'] annotations = ( ('text-verbose', 'Human-readable text (verbose)'), ('text', 'Human-readable text'), ('warnings', 'Human-readable warnings'), ) def __init__(self): self.cmd = ['', ''] self.ss_block = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_block, self.es_block, self.out_ann, data) def handle_host_command(self, rxtx, s): if s.startswith('AT+JAAC'): # AT+JAAC= (0 or 1) p = s[s.find('=') + 1:] if p not in ('0', '1'): self.putx([2, ['Warning: Invalid JAAC parameter "%s"' % p]]) return x = 'Auto' if (p == '1') else 'Don\'t auto' self.putx([0, ['%s-accept new connections' % x]]) self.putx([1, ['%s-accept connections' % x]]) elif s.startswith('AT+JPRO'): # AT+JPRO= (0 or 1) p = s[s.find('=') + 1:] if p not in ('0', '1'): self.putx([2, ['Warning: Invalid JPRO parameter "%s"' % p]]) return onoff = 'off' if (p == '0') else 'on' x = 'Leaving' if (p == '0') else 'Entering' self.putx([0, ['%s production mode' % x]]) self.putx([1, ['Production mode = %s' % onoff]]) elif s.startswith('AT+JRES'): # AT+JRES if s != 'AT+JRES': # JRES has no params. self.putx([2, ['Warning: Invalid JRES usage.']]) return self.putx([0, ['Triggering a software reset']]) self.putx([1, ['Reset']]) elif s.startswith('AT+JSDA'): # AT+JSDA=, (l: length in bytes, d: data) # l is (max?) 3 decimal digits and ranges from 1 to MTU size. # Data can be ASCII or binary values (l bytes total). l, d = s[s.find('=') + 1:].split(',') if not l.isnumeric(): self.putx([2, ['Warning: Invalid data length "%s".' % l]]) if int(l) != len(d): self.putx([2, ['Warning: Data length mismatch (%d != %d).' % \ (int(l), len(d))]]) # TODO: Warn if length > MTU size (which is firmware-dependent # and is negotiated by both Bluetooth devices upon connection). b = ''.join(['%02x ' % ord(c) for c in d])[:-1] self.putx([0, ['Sending %d data bytes: %s' % (int(l), b)]]) self.putx([1, ['Send %d = %s' % (int(l), b)]]) elif s.startswith('AT+JSEC'): # AT+JSEC=,,,, # secmode: Security mode 1 or 3 (default). # linkkey_info: Must be 1 or 2. Has no function according to docs. # pintype: 1: variable pin (default), 2: fixed pin. # pinlen: PIN length (2 decimal digits). Max. PIN length is 16. # pin: The Bluetooth PIN ('pinlen' chars). Used if pintype=2. # Note: AT+JSEC (if used) must be the first command after reset. # TODO: Parse all the other parameters. pin = s[-4:] self.putx([0, ['Host set the Bluetooth PIN to "' + pin + '"']]) self.putx([1, ['PIN = ' + pin]]) elif s.startswith('AT+JSLN'): # AT+JSLN=, # namelen: Friendly name length (2 decimal digits). Max. len is 18. # name: The Bluetooth "friendly name" ('namelen' ASCII characters). name = s[s.find(',') + 1:] self.putx([0, ['Host set the Bluetooth name to "' + name + '"']]) self.putx([1, ['BT name = ' + name]]) else: self.putx([0, ['Host sent unsupported command: %s' % s]]) self.putx([1, ['Unsupported command: %s' % s]]) def handle_device_reply(self, rxtx, s): if s == 'ROK': self.putx([0, ['Device initialized correctly']]) self.putx([1, ['Init']]) elif s == 'OK': self.putx([0, ['Device acknowledged last command']]) self.putx([1, ['ACK']]) elif s.startswith('ERR'): error = s[s.find('=') + 1:] self.putx([0, ['Device sent error code ' + error]]) self.putx([1, ['ERR = ' + error]]) else: self.putx([0, ['Device sent an unknown reply: %s' % s]]) self.putx([1, ['Unknown reply: %s' % s]]) def decode(self, ss, es, data): ptype, rxtx, pdata = data # For now, ignore all UART packets except the actual data packets. if ptype != 'DATA': return # We're only interested in the byte value (not individual bits). pdata = pdata[0] # If this is the start of a command/reply, remember the start sample. if self.cmd[rxtx] == '': self.ss_block = ss # Append a new (ASCII) byte to the currently built/parsed command. self.cmd[rxtx] += chr(pdata) # Get packets/bytes until an \r\n sequence is found (end of command). if self.cmd[rxtx][-2:] != '\r\n': return # Handle host commands and device replies. # We remove trailing \r\n from the strings before handling them. self.es_block = es if rxtx == RX: self.handle_device_reply(rxtx, self.cmd[rxtx][:-2]) elif rxtx == TX: self.handle_host_command(rxtx, self.cmd[rxtx][:-2]) self.cmd[rxtx] = '' libsigrokdecode-0.5.0/decoders/pan1321/__init__.py0000644000175000017500000000164213117367246016571 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'uart' PD and decodes the Panasonic PAN1321 Bluetooth module Serial Port Profile (SPP) protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/edid/0000755000175000017500000000000013117367246014355 500000000000000libsigrokdecode-0.5.0/decoders/edid/pnpids.txt0000644000175000017500000014610513117367246016342 00000000000000AAE;Anatek Electronics Inc. AAT;Ann Arbor Technologies ABA;ABBAHOME INC. ABC;AboCom System Inc ABD;Allen Bradley Company ABE;Alcatel Bell ABO;Alcatel Bell ABT;Anchor Bay Technologies, Inc. ABV;Advanced Research Technology ACA;Ariel Corporation ACB;Aculab Ltd ACC;Accton Technology Corporation ACD;AWETA BV ACE;Actek Engineering Pty Ltd ACG;A&R Cambridge Ltd ACH;Archtek Telecom Corporation ACI;Ancor Communications Inc ACK;Acksys ACL;Apricot Computers ACM;Acroloop Motion Control Systems Inc ACO;Allion Computer Inc. ACP;Aspen Tech Inc ACR;Acer Technologies ACS;Altos Computer Systems ACT;Applied Creative Technology ACU;Acculogic ACV;ActivCard S.A ADA;Addi-Data GmbH ADB;Aldebbaron ADC;Acnhor Datacomm ADD;Advanced Peripheral Devices Inc ADE;Arithmos, Inc. ADH;Aerodata Holdings Ltd ADI;ADI Systems Inc ADK;Adtek System Science Company Ltd ADL;ASTRA Security Products Ltd ADM;Ad Lib MultiMedia Inc ADN;Analog & Digital Devices Tel. Inc ADP;Adaptec Inc ADR;Nasa Ames Research Center ADS;Analog Devices Inc ADT;Adtek ADT;Aved Display Technologies ADV;Advanced Micro Devices Inc ADX;Adax Inc AEC;Antex Electronics Corporation AED;Advanced Electronic Designs, Inc. AEI;Actiontec Electric Inc AEJ;Alpha Electronics Company AEM;ASEM S.p.A. AEP;Aetas Peripheral International AET;Aethra Telecomunicazioni S.r.l. AFA;Alfa Inc AGC;Beijing Aerospace Golden Card Electronic Engineering Co.,Ltd. AGI;Artish Graphics Inc AGL;Argolis AGM;Advan Int'l Corporation AGT;Agilent Technologies AHC;Advantech Co., Ltd. AIC;Arnos Insturments & Computer Systems AIE;Altmann Industrieelektronik AII;Amptron International Inc. AIL;Altos India Ltd AIM;AIMS Lab Inc AIR;Advanced Integ. Research Inc AIS;Alien Internet Services AIW;Aiwa Company Ltd AIX;ALTINEX, INC. AJA;AJA Video Systems, Inc. AKB;Akebia Ltd AKE;AKAMI Electric Co.,Ltd AKI;AKIA Corporation AKL;AMiT Ltd AKM;Asahi Kasei Microsystems Company Ltd AKP;Atom Komplex Prylad AKY;Askey Computer Corporation ALA;Alacron Inc ALC;Altec Corporation ALD;In4S Inc ALG;Realtek Semiconductor Corp. ALH;AL Systems ALI;Acer Labs ALJ;Altec Lansing ALK;Acrolink Inc ALL;Alliance Semiconductor Corporation ALM;Acutec Ltd. ALN;Alana Technologies ALO;Algolith Inc. ALP;Alps Electric Company Ltd ALR;Advanced Logic ALS;Avance Logic Inc ALS;Texas Advanced optoelectronics Solutions, Inc ALT;Altra ALV;AlphaView LCD ALX;ALEXON Co.,Ltd. AMA;Asia Microelectronic Development Inc AMB;Ambient Technologies, Inc. AMC;Attachmate Corporation AMD;Amdek Corporation AMI;American Megatrends Inc AML;Anderson Multimedia Communications (HK) Limited AMN;Amimon LTD. AMP;AMP Inc AMT;AMT International Industry AMX;AMX LLC ANA;Anakron ANC;Ancot AND;Adtran Inc ANI;Anigma Inc ANK;Anko Electronic Company Ltd ANL;Analogix Semiconductor, Inc ANO;Anorad Corporation ANP;Andrew Network Production ANR;ANR Ltd ANS;Ansel Communication Company ANT;Ace CAD Enterprise Company Ltd ANX;Acer Netxus Inc AOA;AOpen Inc. AOE;Advanced Optics Electronics, Inc. AOL;America OnLine AOT;Alcatel APC;American Power Conversion APD;AppliAdata APG;Horner Electric Inc API;A Plus Info Corporation APL;Aplicom Oy APM;Applied Memory Tech APN;Appian Tech Inc APP;Apple Computer Inc APR;Aprilia s.p.a. APS;Autologic Inc APT;Audio Processing Technology Ltd APV;A+V Link APX;AP Designs Ltd ARC;Alta Research Corporation ARE;ICET S.p.A. ARG;Argus Electronics Co., LTD ARI;Argosy Research Inc ARK;Ark Logic Inc ARL;Arlotto Comnet Inc ARM;Arima ARO;Poso International B.V. ARS;Arescom Inc ART;Corion Industrial Corporation ASC;Ascom Strategic Technology Unit ASD;USC Information Sciences Institute ASE;AseV Display Labs ASI;Ahead Systems ASK;Ask A/S ASL;AccuScene Corporation Ltd ASM;ASEM S.p.A. ASN;Asante Tech Inc ASP;ASP Microelectronics Ltd AST;AST Research Inc ASU;Asuscom Network Inc ASX;AudioScience ASY;Rockwell Collins / Airshow Systems ATA;Allied Telesyn International (Asia) Pte Ltd ATC;Ably-Tech Corporation ATD;Alpha Telecom Inc ATE;Innovate Ltd ATH;Athena Informatica S.R.L. ATI;Allied Telesis KK ATK;Allied Telesyn Int'l ATL;Arcus Technology Ltd ATM;ATM Ltd ATN;Athena Smartcard Solutions Ltd. ATO;ASTRO DESIGN, INC. ATP;Alpha-Top Corporation ATT;AT&T ATV;Office Depot, Inc. ATX;Athenix Corporation AUI;Alps Electric Inc AUO;DO NOT USE - AUO AUR;Aureal Semiconductor AUT;Autotime Corporation AVA;Avaya Communication AVC;Auravision Corporation AVD;Avid Electronics Corporation AVE;Add Value Enterpises (Asia) Pte Ltd AVI;Nippon Avionics Co.,Ltd AVM;AVM GmbH AVN ;Advance Computer Corporation AVO;Avocent Corporation AVR;AVerMedia Information, Inc. AVT;Avtek (Electronics) Pty Ltd AVV;SBS Technologies (Canada), Inc. (was Avvida Systems, Inc.) AWC;Access Works Comm Inc AWL;Aironet Wireless Communications, Inc AWS;Wave Systems AXB;Adrienne Electronics Corporation AXC;AXIOMTEK CO., LTD. AXE;D-Link Systems Inc (used as 2nd pnpid) AXI;American Magnetics AXL;Axel AXP;American Express AXT;Axtend Technologies Inc AXX;Axxon Computer Corporation AXY;AXYZ Automation Services, Inc AYD;Aydin Displays AYR;Airlib, Inc AZM;AZ Middelheim - Radiotherapy AZT;Aztech Systems Ltd BAC;Biometric Access Corporation BAN;Banyan BBB;an-najah university BBH;B&Bh BBL;Brain Boxes Limited BCC;Beaver Computer Corporaton BCD;Dr. Seufert GmbH BCM;Broadcom BCQ;Deutsche Telekom Berkom GmbH BCS;Booria CAD/CAM systems BDO;Brahler ICS BDR;Blonder Tongue Labs, Inc. BDS;Barco Display Systems BEC;Elektro Beckhoff GmbH BEI;Beckworth Enterprises Inc BEK;Beko Elektronik A.S. BEL;Beltronic Industrieelektronik GmbH BEO;Baug & Olufsen BFE;B.F. Engineering Corporation BGB;Barco Graphics N.V BGT;Budzetron Inc BHZ;BitHeadz, Inc. BIC;Big Island Communications BII;Boeckeler Instruments Inc BIL;Billion Electric Company Ltd BIO;BioLink Technologies International, Inc. BIT;Bit 3 Computer BLI;Busicom BLN;BioLink Technologies BLP;Bloomberg L.P. BMI;Benson Medical Instruments Company BML;BIOMED Lab BMS;BIOMEDISYS BNE;Bull AB BNK;Banksia Tech Pty Ltd BNO;Bang & Olufsen BNS;Boulder Nonlinear Systems BOB;Rainy Orchard BOE;BOE BOI;NINGBO BOIGLE DIGITAL TECHNOLOGY CO.,LTD BOS;BOS BPD;Micro Solutions, Inc. BPU;Best Power BRA;Braemac Pty Ltd BRC;BARC BRG;Bridge Information Co., Ltd BRI;Boca Research Inc BRM;Braemar Inc BRO;BROTHER INDUSTRIES,LTD. BSE;Bose Corporation BSL;Biomedical Systems Laboratory BST;BodySound Technologies, Inc. BTC;Bit 3 Computer BTE;Brilliant Technology BTF;Bitfield Oy BTI;BusTech Inc BUF;Yasuhiko Shirai Melco Inc BUJ;ATI Tech Inc BUL;Bull BUR;Bernecker & Rainer Ind-Eletronik GmbH BUS;BusTek BUT;21ST CENTURY ENTERTAINMENT BWK;Bitworks Inc. BXE;Buxco Electronics BYD;byd:sign corporation CAA;Castles Automation Co., Ltd CAC;CA & F Elettronica CAG;CalComp CAI;Canon Inc. CAL;Acon CAM;Cambridge Audio CAN;Canopus Company Ltd CAN;Carrera Computer Inc CAN;CORNEA CAR;Cardinal Company Ltd CAS;CASIO COMPUTER CO.,LTD CAT;Consultancy in Advanced Technology CBI;ComputerBoards Inc CBR;Cebra Tech A/S CBT;Cabletime Ltd CBX;Cybex Computer Products Corporation CCC;C-Cube Microsystems CCI;Cache CCJ;CONTEC CO.,LTD. CCL;CCL/ITRI CCP;Capetronic USA Inc CDC;Core Dynamics Corporation CDD;Convergent Data Devices CDE;Colin.de CDG;Christie Digital Systems Inc CDI;Concept Development Inc CDK;Cray Communications CDN;Codenoll Technical Corporation CDP;CalComp CDS;Computer Diagnostic Systems CDT;IBM Corporation CDV;Convergent Design Inc. CEA;Consumer Electronics Association CEC;Chicony Electronics Company Ltd CED;Cambridge Electronic Design Ltd CEF;Cefar Digital Vision CEI;Crestron Electronics, Inc. CEM;MEC Electronics GmbH CEN;Centurion Technologies P/L CEP;C-DAC CER;Ceronix CET;TEC CORPORATION CFG;Atlantis CGA;Chunghwa Picture Tubes, LTD CGS;Chyron Corp CHA;Chase Research PLC CHC;Chic Technology Corp. CHD;ChangHong Electric Co.,Ltd CHE;Acer Inc CHG;Sichuan Changhong Electric CO, LTD. CHI;Chrontel Inc CHL;Chloride-R&D CHM;CHIC TECHNOLOGY CORP. CHO;Sichuang Changhong Corporation CHP;CH Products CHS;Agentur Chairos CHT;Chunghwa Picture Tubes,LTD. CHY;Cherry GmbH CIC;Comm. Intelligence Corporation CII;Cromack Industries Inc CIL;Citicom Infotech Private Limited CIN;Citron GmbH CIP;Ciprico Inc CIR;Cirrus Logic Inc CIS;Cisco Systems Inc CIT;Citifax Limited CKC;The Concept Keyboard Company Ltd CKJ;Carina System Co., Ltd. CLA;Clarion Company Ltd CLD;COMMAT L.t.d. CLE;Classe Audio CLG;CoreLogic CLI;Cirrus Logic Inc CLM;CrystaLake Multimedia CLO;Clone Computers CLT;automated computer control systems CLV;Clevo Company CLX;CardLogix CMC;CMC Ltd CMD;Colorado MicroDisplay, Inc. CMG;Chenming Mold Ind. Corp. CMI;C-Media Electronics CMM;Comtime GmbH CMN;Chimei Innolux Corporation CMO;Chi Mei Optoelectronics corp. CMR;Cambridge Research Systems Ltd CMS;CompuMaster Srl CMX;Comex Electronics AB CNB;American Power Conversion CNC;Alvedon Computers Ltd CNE;Cine-tal CNI;Connect Int'l A/S CNN;Canon Inc CNT;COINT Multimedia Systems COB;COBY Electronics Co., Ltd COD;CODAN Pty. Ltd. COI;Codec Inc. COL;Rockwell Collins, Inc. COM;Comtrol Corporation CON;Contec Company Ltd COO;coolux GmbH COR;Corollary Inc COS;CoStar Corporation COT;Core Technology Inc COW;Polycow Productions CPC;Ciprico Inc CPD;CompuAdd CPI;Computer Peripherals Inc CPL;Compal Electronics Inc CPQ;Compaq Computer Company CPT;cPATH CPX;Powermatic Data Systems CRC;CONRAC GmbH CRD;Cardinal Technical Inc CRE;Creative Labs Inc CRI;Crio Inc. CRL;Creative Logic   CRN;Cornerstone Imaging CRO;Extraordinary Technologies PTY Limited CRQ;Cirque Corporation CRS;Crescendo Communication Inc CRV;Cerevo Inc. CRX;Cyrix Corporation CSB;Transtex SA CSC;Crystal Semiconductor CSD;Cresta Systems Inc CSE;Concept Solutions & Engineering CSI;Cabletron System Inc CSO;California Institute of Technology CSS;CSS Laboratories CST;CSTI Inc CTA;CoSystems Inc CTC;CTC Communication Development Company Ltd CTE;Chunghwa Telecom Co., Ltd. CTL;Creative Technology Ltd CTM;Computerm Corporation CTN;Computone Products CTP;Computer Technology Corporation CTS;Comtec Systems Co., Ltd. CTX;Creatix Polymedia GmbH CUB;Cubix Corporation CUK;Calibre UK Ltd CVA;Covia Inc. CVS;Clarity Visual Systems CWR;Connectware Inc CXT;Conexant Systems CYB;CyberVision CYC;Cylink Corporation CYD;Cyclades Corporation CYL;Cyberlabs CYT;Cytechinfo Inc CYV;Cyviz AS CYW;Cyberware CYX;Cyrix Corporation CZE;Carl Zeiss AG DAC;Digital Acoustics Corporation DAE;Digatron Industrie Elektronik GmbH DAI;DAIS SET Ltd. DAK;Daktronics DAL;Digital Audio Labs Inc DAN;Danelec Marine A/S DAS;DAVIS AS DAT;Datel Inc DAU;Daou Tech Inc DAV;Davicom Semiconductor Inc DAW;DA2 Technologies Inc DAX;Data Apex Ltd DBD;Diebold Inc. DBI;DigiBoard Inc DBK;Databook Inc DBL;Doble Engineering Company DBN;DB Networks Inc DCA;Digital Communications Association DCC;Dale Computer Corporation DCD;Datacast LLC DCE;dSPACE GmbH DCI;Concepts Inc DCL;Dynamic Controls Ltd DCM;DCM Data Products DCO;Dialogue Technology Corporation DCR;Decros Ltd DCS;Diamond Computer Systems Inc DCT;Dancall Telecom A/S DCV;Datatronics Technology Inc DDA;DA2 Technologies Corporation DDD;Danka Data Devices DDI;Data Display AG DDS;Barco, n.v. DDT;Datadesk Technologies Inc DEC;Digital Equipment Corporation DEI;Deico Electronics DEL;Dell Inc. DEN;Densitron Computers Ltd DEX;idex displays DFI;DFI DFK;SharkTec A/S DGA;Digiital Arts Inc DGC;Data General Corporation DGI;DIGI International DGK;DugoTech Co., LTD DGP;Digicorp European sales S.A. DGS;Diagsoft Inc DGT;The Dearborn Group DGT;Dearborn Group Technology DHP;DH Print DHQ;Quadram DHT;Projectavision Inc DIA;Diadem DIG;Digicom S.p.A. DII;Dataq Instruments Inc DIM;dPict Imaging, Inc. DIN;Daintelecom Co., Ltd DIS;Diseda S.A. DIT;Dragon Information Technology DJE;Capstone Visua lProduct Development DJP;Maygay Machines, Ltd DKY;Datakey Inc DLB;Dolby Laboratories Inc. DLC;Diamond Lane Comm. Corporation DLG;Digital-Logic GmbH DLK;D-Link Systems Inc DLL;Dell Inc DLT;Digitelec Informatique Park Cadera DMB;Digicom Systems Inc DMC;Dune Microsystems Corporation DMM;Dimond Multimedia Systems Inc DMP;D&M Holdings Inc, Professional Business Company DMS;DOME imaging systems DMT;Distributed Management Task Force, Inc. (DMTF) DMV;NDS Ltd DNA;DNA Enterprises, Inc. DNG;Apache Micro Peripherals Inc DNI;Deterministic Networks Inc. DNT;Dr. Neuhous Telekommunikation GmbH DNV;DiCon DOL;Dolman Technologies Group Inc DOM;Dome Imaging Systems DON;DENON, Ltd. DOT;Dotronic Mikroelektronik GmbH DPA;DigiTalk Pro AV DPC;Delta Electronics Inc DPI;DocuPoint DPL;Digital Projection Limited DPM;ADPM Synthesis sas DPS;Digital Processing Systems DPT;DPT DPX;DpiX, Inc. DQB;Datacube Inc DRB;Dr. Bott KG DRC;Data Ray Corp. DRD;DIGITAL REFLECTION INC. DRI;Data Race Inc DSD;DS Multimedia Pte Ltd DSI;Digitan Systems Inc DSM;DSM Digital Services GmbH DSP;Domain Technology Inc DTA;DELTATEC DTC;DTC Tech Corporation DTE;Dimension Technologies, Inc. DTI;Diversified Technology, Inc. DTK;Dynax Electronics (HK) Ltd DTL;e-Net Inc DTN;Datang Telephone Co DTO;Deutsche Thomson OHG DTT;Design & Test Technology, Inc. DTX;Data Translation DUA;Dosch & Amand GmbH & Company KG DUN;NCR Corporation DVD;Dictaphone Corporation DVL;Devolo AG DVS;Digital Video System DVT;Data Video DWE;Daewoo Electronics Company Ltd DXC;Digipronix Control Systems DXL;Dextera Labs Inc DXP;Data Expert Corporation DXS;Signet DYC;Dycam Inc DYM;Dymo-CoStar Corporation DYN;Askey Computer Corporation DYX;Dynax Electronics (HK) Ltd EAS;Evans and Sutherland Computer EBH;Data Price Informatica EBT;HUALONG TECHNOLOGY CO., LTD ECA;Electro Cam Corp. ECC;ESSential Comm. Corporation ECI;Enciris Technologies ECK;Eugene Chukhlomin Sole Proprietorship, d.b.a. ECL;Excel Company Ltd ECM;E-Cmos Tech Corporation ECO;Echo Speech Corporation ECP;Elecom Company Ltd ECS;Elitegroup Computer Systems Company Ltd ECT;Enciris Technologies EDC;e.Digital Corporation EDG;Electronic-Design GmbH EDI;Edimax Tech. Company Ltd EDM;EDMI EDT;Emerging Display Technologies Corp EEE;ET&T Technology Company Ltd EEH;EEH Datalink GmbH EEP;E.E.P.D. GmbH EES;EE Solutions, Inc. EGD;EIZO GmbH Display Technologies EGL;Eagle Technology EGN;Egenera, Inc. EGO;Ergo Electronics EHJ;Epson Research EHN;Enhansoft EIC;Eicon Technology Corporation EKA;MagTek Inc. EKC;Eastman Kodak Company EKS;EKSEN YAZILIM ELA;ELAD srl ELC;Electro Scientific Ind ELE;Elecom Company Ltd ELG;Elmeg GmbH Kommunikationstechnik ELI;Edsun Laboratories ELL;Electrosonic Ltd ELM;Elmic Systems Inc ELO;Elo TouchSystems Inc ELO;Tyco Electronics ELS;ELSA GmbH ELT;Element Labs, Inc. ELX;Elonex PLC EMB;Embedded computing inc ltd EMC;eMicro Corporation EME;EMiNE TECHNOLOGY COMPANY, LTD. EMG;EMG Consultants Inc EMI;Ex Machina Inc EMU;Emulex Corporation ENC;Eizo Nanao Corporation END;ENIDAN Technologies Ltd ENE;ENE Technology Inc. ENI;Efficient Networks ENS;Ensoniq Corporation ENT;Enterprise Comm. & Computing Inc EPC;Empac EPI;Envision Peripherals, Inc EPN;EPiCON Inc. EPS;KEPS EQP;Equipe Electronics Ltd. EQX;Equinox Systems Inc ERG;Ergo System ERI;Ericsson Mobile Communications AB ERN;Ericsson, Inc. ERP;Euraplan GmbH ERT;Escort Insturments Corporation ESA;Elbit Systems of America ESC;Eden Sistemas de Computacao S/A ESD;Ensemble Designs, Inc ESG;ELCON Systemtechnik GmbH ESI;Extended Systems, Inc. ESK;ES&S ESS;ESS Technology Inc EST;Embedded Solution Technology ESY;E-Systems Inc ETC;Everton Technology Company Ltd ETD;ELAN MICROELECTRONICS CORPORATION ETH;Etherboot Project ETI;Eclipse Tech Inc ETK;eTEK Labs Inc. ETL;Evertz Microsystems Ltd. ETS;Electronic Trade Solutions Ltd ETT;E-Tech Inc EUT;Ericsson Mobile Networks B.V. EVI;eviateg GmbH EVX;Everex EXA;Exabyte EXC;Excession Audio EXI;Exide Electronics EXN;RGB Systems, Inc. dba Extron Electronics EXP;Data Export Corporation EXT;Exatech Computadores & Servicos Ltda EXX;Exxact GmbH EXY;Exterity Ltd EZE;EzE Technologies EZP;Storm Technology FAR;Farallon Computing FBI;Interface Corporation FCB;Furukawa Electric Company Ltd FCG;First International Computer Ltd FCS;Focus Enhancements, Inc. FDC;Future Domain FDT;Fujitsu Display Technologies Corp. FEC;FURUNO ELECTRIC CO., LTD. FEL;Fellowes & Questec FEN;Fen Systems Ltd. FER;Ferranti Int'L FFI;Fairfield Industries FGD;Lisa Draexlmaier GmbH FGL;Fujitsu General Limited. FHL;FHLP FIC;Formosa Industrial Computing Inc FIL;Forefront Int'l Ltd FIN;Finecom Co., Ltd. FIR;Chaplet Systems Inc FIS;FLY-IT Simulators FIT;Feature Integration Technology Inc. FJC;Fujitsu Takamisawa Component Limited FJS;Fujitsu Spain FJT;F.J. Tieman BV FLE;ADTI Media, Inc FLI;Faroudja Laboratories FLY;Butterfly Communications FMA;Fast Multimedia AG FMC;Ford Microelectronics Inc FMI;Fujitsu Microelect Inc FMI;Fellowes, Inc. FML;Fujitsu Microelect Ltd FMZ;Formoza-Altair FNC;Fanuc LTD FNI;Funai Electric Co., Ltd. FOA;FOR-A Company Limited FOS;Foss Tecator FOX;HON HAI PRECISON IND.CO.,LTD. FPE;Fujitsu Peripherals Ltd FPS;Deltec Corporation FPX;Cirel Systemes FRC;Force Computers FRD;Freedom Scientific BLV FRE;Forvus Research Inc FRI;Fibernet Research Inc FRS;South Mountain Technologies, LTD FSC;Future Systems Consulting KK FSI;Fore Systems Inc FST;Modesto PC Inc FTC;Futuretouch Corporation FTE;Frontline Test Equipment Inc. FTG;FTG Data Systems FTI;FastPoint Technologies, Inc. FTN;Fountain Technologies Inc FTR;Mediasonic FUJ;Fujitsu Ltd FUN;sisel muhendislik FUS;Fujitsu Siemens Computers GmbH FVC;First Virtual Corporation FVX;C-C-C Group Plc FWA;Attero Tech, LLC FWR;Flat Connections Inc FXX;Fuji Xerox FZC;Founder Group Shenzhen Co. FZI;FZI Forschungszentrum Informatik GAG;Gage Applied Sciences Inc GAL;Galil Motion Control GAU;Gaudi Co., Ltd. GCC;GCC Technologies Inc GCI;Gateway Comm. Inc GCS;Grey Cell Systems Ltd GDC;General Datacom GDI;G. Diehl ISDN GmbH GDS;GDS GDT;Vortex Computersysteme GmbH GEF;GE Fanuc Embedded Systems GEH;GE Intelligent Platforms - Huntsville GEM;Gem Plus GEN;Genesys ATE Inc GEO;GEO Sense GES;GES Singapore Pte Ltd GET;Getac Technology Corporation GFM;GFMesstechnik GmbH GFN;Gefen Inc. GGL;Google Inc. GIC;General Inst. Corporation GIM;Guillemont International GIS;AT&T Global Info Solutions GJN;Grand Junction Networks GLE;AD electronics GLM;Genesys Logic GLS;Gadget Labs LLC GMK;GMK Electronic Design GmbH GML;General Information Systems GMM;GMM Research Inc GMN;GEMINI 2000 Ltd GMX;GMX Inc GND;Gennum Corporation GNN;GN Nettest Inc GNZ;Gunze Ltd GRA;Graphica Computer GRE;GOLD RAIN ENTERPRISES CORP. GRH;Granch Ltd GRV;Advanced Gravis GRY;Robert Gray Company GSB;NIPPONDENCHI CO,.LTD GSC;General Standards Corporation GSM;Goldstar Company Ltd GST;Graphic SystemTechnology GSY;Grossenbacher Systeme AG GTC;Graphtec Corporation GTI;Goldtouch GTK;G-Tech Corporation GTM;Garnet System Company Ltd GTS;Geotest Marvin Test Systems Inc GTT;General Touch Technology Co., Ltd. GUD;Guntermann & Drunck GmbH GUZ;Guzik Technical Enterprises GVC;GVC Corporation GVL;Global Village Communication GWI;GW Instruments GWY;Gateway 2000 GZE;GUNZE Limited HAE;Haider electronics HAI;Haivision Systems Inc. HAL;Halberthal HAN;Hanchang System Corporation HAY;Hayes Microcomputer Products Inc HCA;DAT HCE;Hitachi Consumer Electronics Co., Ltd HCL;HCL America Inc HCM;HCL Peripherals HCP;Hitachi Computer Products Inc HCW;Hauppauge Computer Works Inc HDC;HardCom Elektronik & Datateknik HDI;HD-INFO d.o.o. HDV;Holografika kft. HEC;Hitachi Engineering Company Ltd HEC;Hisense Electric Co., Ltd. HEL;Hitachi Micro Systems Europe Ltd HER;Ascom Business Systems HET;HETEC Datensysteme GmbH HHC;HIRAKAWA HEWTECH CORP. HIB;Hibino Corporation HIC;Hitachi Information Technology Co., Ltd. HIK;Hikom Co., Ltd. HIL;Hilevel Technology HIT;Hitachi America Ltd HJI;Harris & Jeffries Inc HKA;HONKO MFG. CO., LTD. HKG;Josef Heim KG HMC;Hualon Microelectric Corporation HMK;hmk Daten-System-Technik BmbH HMX;HUMAX Co., Ltd. HNS;Hughes Network Systems HOB;HOB Electronic GmbH HOE;Hosiden Corporation HOL;Holoeye Photonics AG HPA;Zytor Communications HPC;Hewlett Packard Co. HPD;Hewlett Packard HPI;Headplay, Inc. HPK;HAMAMATSU PHOTONICS K.K. HPQ;HP HPR;H.P.R. Electronics GmbH HRC;Hercules HRE;Qingdao Haier Electronics Co., Ltd. HRL;Herolab GmbH HRS;Harris Semiconductor HRT;HERCULES HSC;Hagiwara Sys-Com Company Ltd HSD;HannStar Display Corp HSM;AT&T Microelectronics HSP;HannStar Display Corp HTC;Hitachi Ltd HTI;Hampshire Company, Inc. HTK;Holtek Microelectronics Inc HTX;Hitex Systementwicklung GmbH HUB;GAI-Tronics, A Hubbell Company HUM;IMP Electronics Ltd. HWA;Harris Canada Inc HWC;DBA Hans Wedemeyer HWD;Highwater Designs Ltd HWP;Hewlett Packard HXM;Hexium Ltd. HYC;Hypercope Gmbh Aachen HYD;Hydis Technologies.Co.,LTD HYO;HYC CO., LTD. HYP;Hyphen Ltd HYR;Hypertec Pty Ltd HYT;Heng Yu Technology (HK) Limited HYV;Hynix Semiconductor IAF;Institut f r angewandte Funksystemtechnik GmbH IAI;Integration Associates, Inc. IAT;IAT Germany GmbH IBC;Integrated Business Systems IBI;INBINE.CO.LTD IBM;IBM Brasil IBM;IBM France IBP;IBP Instruments GmbH IBR;IBR GmbH ICA;ICA Inc ICC;BICC Data Networks Ltd ICD;ICD Inc ICE;IC Ensemble ICI;Infotek Communication Inc ICM;Intracom SA ICN;Sanyo Icon ICO;Intel Corp ICS;Integrated Circuit Systems ICV;Inside Contactless ICX;ICCC A/S IDC;International Datacasting Corporation IDE;IDE Associates IDK;IDK Corporation IDO;IDEO Product Development IDP;Integrated Device Technology, Inc. IDS;Interdigital Sistemas de Informacao IDT;International Display Technology IDX;IDEXX Labs IEC;Interlace Engineering Corporation IEE;IEE IEI;Interlink Electronics IFS;In Focus Systems Inc IFT;Informtech IFX;Infineon Technologies AG IGC;Intergate Pty Ltd IGM;IGM Communi IHE;InHand Electronics IIC;ISIC Innoscan Industrial Computers A/S III;Intelligent Instrumentation IIN;IINFRA Co., Ltd IKS;Ikos Systems Inc ILC;Image Logic Corporation ILS;Innotech Corporation IMA;Imagraph IMC;IMC Networks IMD;ImasDe Canarias S.A. IME;Imagraph IMG;IMAGENICS Co., Ltd. IMI;International Microsystems Inc IMM;Immersion Corporation IMN;Impossible Production IMP;Impression Products Incorporated IMT;Inmax Technology Corporation INC;Home Row Inc IND;ILC INE;Inventec Electronics (M) Sdn. Bhd. INF;Inframetrics Inc ING;Integraph Corporation INI;Initio Corporation INK;Indtek Co., Ltd. INL;InnoLux Display Corporation INM;InnoMedia Inc INN;Innovent Systems, Inc. INO;Innolab Pte Ltd INP;Interphase Corporation INS;Ines GmbH INT;Interphase Corporation inu;Inovatec S.p.A. INV;Inviso, Inc. INZ;Best Buy IOA;CRE Technology Corporation IOD;I-O Data Device Inc IOM;Iomega ION;Inside Out Networks IOS;i-O Display System IOT;I/OTech Inc IPC;IPC Corporation IPD;Industrial Products Design, Inc. IPI;Intelligent Platform Management Interface (IPMI) forum (Intel, HP, NEC, Dell) IPM;IPM Industria Politecnica Meridionale SpA IPN;Performance Technologies IPR;Ithaca Peripherals IPS;IPS, Inc. (Intellectual Property Solutions, Inc.) IPT;International Power Technologies IPW;IPWireless, Inc IQT;IMAGEQUEST Co., Ltd IRD;IRdata ISA;Symbol Technologies ISC;Id3 Semiconductors ISG;Insignia Solutions Inc ISI;Interface Solutions ISL;Isolation Systems ISM;Image Stream Medical ISP;IntreSource Systems Pte Ltd ISR;INSIS Co., LTD. ISS;ISS Inc IST;Intersolve Technologies ISY;International Integrated Systems,Inc.(IISI) ITA;Itausa Export North America ITC;Intercom Inc ITD;Internet Technology Corporation ITE;Integrated Tech Express Inc ITK;ITK Telekommunikation AG ITL;Inter-Tel ITM;ITM inc. ITN;The NTI Group ITP;IT-PRO Consulting und Systemhaus GmbH ITR;Infotronic America, Inc. ITS;IDTECH ITT;I&T Telecom. ITX;integrated Technology Express Inc IUC;ICSL IVI;Intervoice Inc IVM;Liyama North America IWR;Icuiti Corporation IWX;Intelliworxx, Inc. IXD;Intertex Data AB JAC;Astec Inc JAE;Japan Aviation Electronics Industry, Limited JAS;Janz Automationssysteme AG JAT;Jaton Corporation JAZ;Carrera Computer Inc (used as second pnpid) JCE;Jace Tech Inc JDL;Japan Digital Laboratory Co.,Ltd. JEN;N-Vision JET;JET POWER TECHNOLOGY CO., LTD. JFX;Jones Futurex Inc JGD;University College JIC;Jaeik Information & Communication Co., Ltd. JMT;Micro Technical Company Ltd JPC;JPC Technology Limited JPW;Wallis Hamilton Industries JQE;CNet Technical Inc JSD;JS DigiTech, Inc JSI;Jupiter Systems, Inc. JSK;SANKEN ELECTRIC CO., LTD JTS;JS Motorsports JTY;jetway security micro,inc JUK;Janich & Klass Computertechnik GmbH JUP;Jupiter Systems JVC;JVC JWD;Video International Inc. JWL;Jewell Instruments, LLC JWS;JWSpencer & Co. JWY;Jetway Information Co., Ltd KAR;Karna KBI;Kidboard Inc KBL;Kobil Systems GmbH KCL;Keycorp Ltd KDE;KDE KDK;Kodiak Tech KDM;Korea Data Systems Co., Ltd. KDS;KDS USA KEC;Kyushu Electronics Systems Inc KEM;Kontron Embedded Modules GmbH KES;Kesa Corporation KEY;Key Tech Inc KFC;SCD Tech KFE ;Komatsu Forest KFX;Kofax Image Products KIS;KiSS Technology A/S KMC;Mitsumi Company Ltd KML;Kensington Microware Ltd KNC;Konica corporation KNX;Nutech Marketing PTL KOB;Kobil Systems GmbH KOD;Eastman Kodak Company KOE;KOLTER ELECTRONIC KOL;Kollmorgen Motion Technologies Group KOW;KOWA Company,LTD. KPC;King Phoenix Company KRL;Krell Industries Inc. KRM;Kroma Telecom KRY;Kroy LLC KSC;Kinetic Systems Corporation KSL;Karn Solutions Ltd. KSX;King Tester Corporation KTC;Kingston Tech Corporation KTD;Takahata Electronics Co.,Ltd. KTE;K-Tech KTG;Kayser-Threde GmbH KTI;Konica Technical Inc KTK;Key Tronic Corporation KTN;Katron Tech Inc KUR;Kurta Corporation KVA;Kvaser AB KWD;Kenwood Corporation KYC;Kyocera Corporation KYE;KYE Syst Corporation KYK;Samsung Electronics America Inc KZI;K-Zone International co. Ltd. KZN;K-Zone International LAB;ACT Labs Ltd LAC;LaCie LAF;Microline LAG;Laguna Systems LAN;Sodeman Lancom Inc LAS;LASAT Comm. A/S LAV;Lava Computer MFG Inc LBO;Lubosoft LCC;LCI LCD;Toshiba Matsushita Display Technology Co., Ltd LCE;La Commande Electronique LCI;Lite-On Communication Inc LCM;Latitude Comm. LCN;LEXICON LCS;Longshine Electronics Company LCT;Labcal Technologies LDT;LogiDataTech Electronic GmbH LEC;Lectron Company Ltd LED;Long Engineering Design Inc LEG;Legerity, Inc LEN;Lenovo Group Limited LEO;First International Computer Inc LEX;Lexical Ltd LGC;Logic Ltd LGI;Logitech Inc LGS;LG Semicom Company Ltd LGX;Lasergraphics, Inc. LHA;Lars Haagh ApS LHE;Lung Hwa Electronics Company Ltd LHT;Lighthouse Technologies Limited LIP;Linked IP GmbH LIT;Lithics Silicon Technology LJX;Datalogic Corporation LKM;Likom Technology Sdn. Bhd. LLL;L-3 Communications LMG;Lucent Technologies LMI;Lexmark Int'l Inc LMP;Leda Media Products LMT;Laser Master LND;Land Computer Company Ltd LNK;Link Tech Inc LNR;Linear Systems Ltd. LNT;LANETCO International LNV;Lenovo LOC;Locamation B.V. LOE;Loewe Opta GmbH LOG;Logicode Technology Inc LPE;El-PUSK Co., Ltd. LPI;Design Technology LPL;DO NOT USE - LPL LSC;LifeSize Communications LSI;Loughborough Sound Images LSJ;LSI Japan Company Ltd LSL;Logical Solutions LSY;LSI Systems Inc LTC;Labtec Inc LTI;Jongshine Tech Inc LTK;Lucidity Technology Company Ltd LTN;Litronic Inc LTS;LTS Scale LLC LTV;Leitch Technology International Inc. LTW;Lightware, Inc LUC;Lucent Technologies LUM;Lumagen, Inc. LUX;Luxxell Research Inc LWC;Labway Corporation LWR;Lightware Visual Engineering LWW;Lanier Worldwide LXN;Luxeon LXS;ELEA CardWare LZX;Lightwell Company Ltd MAC;MAC System Company Ltd MAD;Xedia Corporation MAE;Maestro Pty Ltd MAG;MAG InnoVision MAI;Mutoh America Inc MAL;Meridian Audio Ltd MAN;LGIC MAS;Mass Inc. MAT;Matsushita Electric Ind. Company Ltd MAX;Rogen Tech Distribution Inc MAY;Maynard Electronics MAZ;MAZeT GmbH MBC;MBC MBD;Microbus PLC MBM;Marshall Electronics MBV;Moreton Bay MCA;American Nuclear Systems Inc MCC;Micro Industries MCD;McDATA Corporation MCE;Metz-Werke GmbH & Co KG MCG;Motorola Computer Group MCI;Micronics Computers MCL;Motorola Communications Israel MCM;Metricom Inc MCN;Micron Electronics Inc MCO;Motion Computing Inc. MCP;Magni Systems Inc MCQ;Mat's Computers MCR;Marina Communicaitons MCS;Micro Computer Systems MCT;Microtec MDA;Media4 Inc MDC;Midori Electronics MDD;MODIS MDG;Madge Networks MDI;Micro Design Inc MDK;Mediatek Corporation MDO;Panasonic MDR;Medar Inc MDS;Micro Display Systems Inc MDT;Magus Data Tech MDV;MET Development Inc MDX;MicroDatec GmbH MDY;Microdyne Inc MEC;Mega System Technologies Inc MED;Messeltronik Dresden GmbH MEE;Mitsubishi Electric Engineering Co., Ltd. MEG;Abeam Tech Ltd MEI;Panasonic Industry Company MEL;Mitsubishi Electric Corporation MEN;MEN Mikroelectronik Nueruberg GmbH MEQ;Matelect Ltd. MET;Metheus Corporation MFG;MicroField Graphics Inc MFI;Micro Firmware MFR;MediaFire Corp. MGA;Mega System Technologies, Inc. MGC;Mentor Graphics Corporation MGE;Schneider Electric S.A. MGL;M-G Technology Ltd MGT;Megatech R & D Company MIC;Micom Communications Inc MID;miro Displays MII;Mitec Inc MIL;Marconi Instruments Ltd MIN;Minicom Digital Signage MIP;micronpc.com MIR;Miro Computer Prod. MIS;Modular Industrial Solutions Inc MIT;MCM Industrial Technology GmbH MJI;MARANTZ JAPAN, INC. MJS;MJS Designs MKC;Media Tek Inc. MKT;MICROTEK Inc. MKV;Trtheim Technology MLD;Deep Video Imaging Ltd MLG;Micrologica AG MLI;McIntosh Laboratory Inc. MLM;Millennium Engineering Inc MLN;Mark Levinson MLS;Milestone EPE MLX;Mylex Corporation MMA;Micromedia AG MMD;Micromed Biotecnologia Ltd MMF;Minnesota Mining and Manufacturing MMI;Multimax MMM;Electronic Measurements MMN;MiniMan Inc MMS;MMS Electronics MNC;Mini Micro Methods Ltd MNL;Monorail Inc MNP;Microcom MOD;Modular Technology MOM;Momentum Data Systems MOS;Moses Corporation MOT;Motorola UDS MPC;M-Pact Inc MPI;Mediatrix Peripherals Inc MPJ;Microlab MPL;Maple Research Inst. Company Ltd MPN;Mainpine Limited MPS;mps Software GmbH MPX;Micropix Technologies, Ltd. MQP;MultiQ Products AB MRA;Miranda Technologies Inc MRC;Marconi Simulation & Ty-Coch Way Training MRD;MicroDisplay Corporation MRK;Maruko & Company Ltd MRL;Miratel MRO;Medikro Oy MRT;Merging Technologies MSA;Micro Systemation AB MSC;Mouse Systems Corporation MSD;Datenerfassungs- und Informationssysteme MSF;M-Systems Flash Disk Pioneers MSG;MSI GmbH MSH;Microsoft MSI;Microstep MSK;Megasoft Inc MSL;MicroSlate Inc. MSM;Advanced Digital Systems MSP;Mistral Solutions [P] Ltd. MST;MS Telematica MSU;motorola MSV;Mosgi Corporation MSX;Micomsoft Co., Ltd. MSY;MicroTouch Systems Inc MTB;Media Technologies Ltd. MTC;Mars-Tech Corporation MTD;MindTech Display Co. Ltd MTE;MediaTec GmbH MTH;Micro-Tech Hearing Instruments MTI;MaxCom Technical Inc MTI;Motorola Inc. MTK;Microtek International Inc. MTL;Mitel Corporation MTN;Mtron Storage Technology Co., Ltd. MTR;Mitron computer Inc MTS;Multi-Tech Systems MTU;Mark of the Unicorn Inc MTX;Matrox MUD;Multi-Dimension Institute MUK;mainpine limited MVD;Microvitec PLC MVI;Media Vision Inc MVM;SOBO VISION MVS;Microvision MVX;COM 1 MWI;Multiwave Innovation Pte Ltd MWR;mware MWY;Microway Inc MXD;MaxData Computer GmbH & Co.KG MXI;Macronix Inc MXL;Hitachi Maxell, Ltd. MXP;Maxpeed Corporation MXT;Maxtech Corporation MXV;MaxVision Corporation MYA;Monydata MYR;Myriad Solutions Ltd MYX;Micronyx Inc NAC;Ncast Corporation NAD;NAD Electronics NAK;Nakano Engineering Co.,Ltd. NAL;Network Alchemy NAT;NaturalPoint Inc. NAV;Navigation Corporation NAX;Naxos Tecnologia NBL;N*Able Technologies Inc NBS;National Key Lab. on ISN NBT;NingBo Bestwinning Technology CO., Ltd NCA;Nixdorf Company NCC;NCR Corporation NCE;Norcent Technology, Inc. NCI;NewCom Inc NCL;NetComm Ltd NCR;NCR Electronics NCS;Northgate Computer Systems NCT;NEC CustomTechnica, Ltd. NDC;National DataComm Corporaiton NDI;National Display Systems NDK;Naitoh Densei CO., LTD. NDL;Network Designers NDS;Nokia Data NEC;NEC Corporation NEO;NEO TELECOM CO.,LTD. NET;Mettler Toledo NEU;NEUROTEC - EMPRESA DE PESQUISA E DESENVOLVIMENTO EM BIOMEDICINA NEX;Nexgen Mediatech Inc., NFC;BTC Korea Co., Ltd NFS;Number Five Software NGC;Network General NGS;A D S Exports NHT;Vinci Labs NIC;National Instruments Corporation NIS;Nissei Electric Company NIT;Network Info Technology NIX;Seanix Technology Inc NLC;Next Level Communications NMP;Nokia Mobile Phones NMS;Natural Micro System NMV;NEC-Mitsubishi Electric Visual Systems Corporation NMX;Neomagic NNC;NNC NOE;NordicEye AB NOI;North Invent A/S NOK;Nokia Display Products NOR;Norand Corporation NOT;Not Limited Inc NPI;Network Peripherals Inc NRL;U.S. Naval Research Lab NRT;Beijing Northern Radiantelecom Co. NRV;Taugagreining hf NSC;National Semiconductor Corporation NSI;NISSEI ELECTRIC CO.,LTD NSP;Nspire System Inc. NSS;Newport Systems Solutions NST;Network Security Technology Co NTC;NeoTech S.R.L NTI;New Tech Int'l Company NTL;National Transcomm. Ltd NTN;Nuvoton Technology Corporation NTR;N-trig Innovative Technologies, Inc. NTS;Nits Technology Inc. NTT;NTT Advanced Technology Corporation NTW;Networth Inc NTX;Netaccess Inc NUG;NU Technology, Inc. NUI;NU Inc. NVC;NetVision Corporation NVD;Nvidia NVI;NuVision US, Inc. NVL;Novell Inc NVT;Navatek Engineering Corporation NWC;NW Computer Engineering NWP;NovaWeb Technologies Inc NWS;Newisys, Inc. NXC;NextCom K.K. NXG;Nexgen NXP;NXP Semiconductors bv. NXQ;Nexiq Technologies, Inc. NXS;Technology Nexus Secure Open Systems AB NYC;nakayo telecommunications,inc. OAK;Oak Tech Inc OAS;Oasys Technology Company OBS;Optibase Technologies OCD;Macraigor Systems Inc OCN;Olfan OCS;Open Connect Solutions ODM;ODME Inc. ODR;Odrac OEC;ORION ELECTRIC CO.,LTD OEI;Optum Engineering Inc. OIC;Option Industrial Computers OIM;Option International OIN;Option International OKI;OKI Electric Industrial Company Ltd OLC;Olicom A/S OLD;Olidata S.p.A. OLI;Olivetti OLT;Olitec S.A. OLV;Olitec S.A. OLY;OLYMPUS CORPORATION OMC;OBJIX Multimedia Corporation OMN;Omnitel OMR;Omron Corporation ONE;Oneac Corporation ONK;ONKYO Corporation ONL;OnLive, Inc ONS;On Systems Inc ONW;OPEN Networks Ltd ONX;SOMELEC Z.I. Du Vert Galanta OOS;OSRAM OPC;Opcode Inc OPI;D.N.S. Corporation OPT;OPTi Inc OPV;Optivision Inc OQI;Oksori Company Ltd ORG;ORGA Kartensysteme GmbH ORI;OSR Open Systems Resources, Inc. ORN;ORION ELECTRIC CO., LTD. OSA;OSAKA Micro Computer, Inc. OSP;OPTI-UPS Corporation OSR;Oksori Company Ltd OTB;outsidetheboxstuff.com OTI;Orchid Technology OTM;Optoma Corporation           OTT;OPTO22, Inc. OUK;OUK Company Ltd OWL;Mediacom Technologies Pte Ltd OXU;Oxus Research S.A. OYO;Shadow Systems OZO;Tribe Computer Works Inc PAC;Pacific Avionics Corporation PAD;Promotion and Display Technology Ltd. PAK;Many CNC System Co., Ltd. PAM;Peter Antesberger Messtechnik PAN;The Panda Project PAR;Parallan Comp Inc PBI;Pitney Bowes PBL;Packard Bell Electronics PBN;Packard Bell NEC PBV;Pitney Bowes PCA;Philips BU Add On Card PCB;OCTAL S.A. PCC;PowerCom Technology Company Ltd PCG;First Industrial Computer Inc PCI;Pioneer Computer Inc PCK;PCBANK21 PCL;pentel.co.,ltd PCM;PCM Systems Corporation PCO;Performance Concepts Inc., PCP;Procomp USA Inc PCS;TOSHIBA PERSONAL COMPUTER SYSTEM CORPRATION PCT;PC-Tel Inc PCW;Pacific CommWare Inc PCX;PC Xperten PDM;Psion Dacom Plc. PDN;AT&T Paradyne PDR;Pure Data Inc PDS;PD Systems International Ltd PDT;PDTS - Prozessdatentechnik und Systeme PDV;Prodrive B.V. PEC;POTRANS Electrical Corp. PEI;PEI Electronics Inc PEL;Primax Electric Ltd PEN;Interactive Computer Products Inc PEP;Peppercon AG PER;Perceptive Signal Technologies PET;Practical Electronic Tools PFT;Telia ProSoft AB PGM;Paradigm Advanced Research Centre PGP;propagamma kommunikation PGS;Princeton Graphic Systems PHC;Pijnenburg Beheer N.V. PHE;Philips Medical Systems Boeblingen GmbH PHI;DO NOT USE - PHI PHL;Philips Consumer Electronics Company PHO;Photonics Systems Inc. PHS;Philips Communication Systems PHY;Phylon Communications PIE;Pacific Image Electronics Company Ltd PIM;Prism, LLC PIO;Pioneer Electronic Corporation PIX;Pixie Tech Inc PJA;Projecta PJD;Projectiondesign AS PJT;Pan Jit International Inc. PKA;Acco UK ltd. PLC;Pro-Log Corporation PLF;Panasonic Avionics Corporation PLM;PROLINK Microsystems Corp. PLT;PT Hartono Istana Teknologi PLV;PLUS Vision Corp. PLX;Parallax Graphics PLY;Polycom Inc. PMC;PMC Consumer Electronics Ltd PMD;TDK USA Corporation PMM;Point Multimedia System PMT;Promate Electronic Co., Ltd. PMX;Photomatrix PNG;Microsoft PNG;P.I. Engineering Inc PNL;Panelview, Inc. PNP;Microsoft PNR;Planar Systems, Inc. PNS;PanaScope PNX;Phoenix Technologies, Ltd. POL;PolyComp (PTY) Ltd. PON;Perpetual Technologies, LLC POR;Portalis LC PPC;Phoenixtec Power Company Ltd PPD;MEPhI PPI;Practical Peripherals PPM;Clinton Electronics Corp. PPP;Purup Prepress AS PPR;PicPro PPX;Perceptive Pixel Inc. PQI;Pixel Qi PRA;PRO/AUTOMATION PRC;PerComm PRD;Praim S.R.L. PRF;Digital Electronics Corporation PRG;The Phoenix Research Group Inc PRI;Priva Hortimation BV PRM;Prometheus PRO;Proteon PRS;Leutron Vision PRX;Proxima Corporation PSA;Advanced Signal Processing Technologies PSC;Philips Semiconductors PSD;Peus-Systems GmbH PSE;Practical Solutions Pte., Ltd. PSI;PSI-Perceptive Solutions Inc PSL;Perle Systems Limited PSM;Prosum PST;Global Data SA PTC;PS Technology Corporation PTG;Cipher Systems Inc PTH;Pathlight Technology Inc PTI;Promise Technology Inc PTL;Pantel Inc PTS;Plain Tree Systems Inc PTW;DO NOT USE PVC;DO NOT USE PVG;Proview Global Co., Ltd PVI;Prime view international Co., Ltd PVM;Penta Studiotechnik GmbH PVN;Pixel Vision PVP;Klos Technologies, Inc. PXC;Phoenix Contact PXE;PIXELA CORPORATION PXL;The Moving Pixel Company PXM;Proxim Inc QCC;QuakeCom Company Ltd QCH;Metronics Inc QCI;Quanta Computer Inc QCK;Quick Corporation QCL;Quadrant Components Inc QCP;Qualcomm Inc QDI;Quantum Data Incorporated QDM;Quadram QDS;Quanta Display Inc. QFF;Padix Co., Inc. QFI;Quickflex, Inc QLC;Q-Logic QQQ;Chuomusen Co., Ltd. QSI;Quantum Solutions, Inc. QTD;Quantum 3D Inc QTH;Questech Ltd QTI;Quicknet Technologies Inc QTM;Quantum QTR;Qtronix Corporation QUA;Quatographic AG QUE;Questra Consulting QVU;Quartics RAC;Racore Computer Products Inc RAD;Radisys Corporation RAI;Rockwell Automation/Intecolor RAN;Rancho Tech Inc RAR;Raritan, Inc. RAS;RAScom Inc RAT;Rent-A-Tech RAY;Raylar Design, Inc. RCE;Parc d'Activite des Bellevues RCH;Reach Technology Inc RCI;RC International RCN;Radio Consult SRL RCO;Rockwell Collins RDI;Rainbow Displays, Inc. RDM;Tremon Enterprises Company Ltd RDS;Radius Inc REA;Real D REC;ReCom RED;Research Electronics Development Inc REF;Reflectivity, Inc. REL;Reliance Electric Ind Corporation REM;SCI Systems Inc. REN;Renesas Technology Corp. RES;ResMed Pty Ltd RGL;Robertson Geologging Ltd RHM;Rohm Company Ltd RIC;RICOH COMPANY, LTD. RII;Racal Interlan Inc RIO;Rios Systems Company Ltd RIT;Ritech Inc RIV;Rivulet Communications RJA;Roland Corporation RJS;Advanced Engineering RKC;Reakin Technolohy Corporation RLD;MEPCO RLN;RadioLAN Inc RMC;Raritan Computer, Inc RMP;Research Machines RMT;Roper Mobile RNB;Rainbow Technologies ROB;Robust Electronics GmbH ROH;Rohm Co., Ltd. ROK;Rockwell International ROP;Roper International Ltd RPI;RoomPro Technologies RPT;R.P.T.Intergroups RRI;Radicom Research Inc RSC;PhotoTelesis RSH;ADC-Centre RSI;Rampage Systems Inc RSN;Radiospire Networks, Inc. RSQ;R Squared RSS;Rockwell Semiconductor Systems RSX;Rapid Tech Corporation RTC;Relia Technologies RTI;Rancho Tech Inc RTK;DO NOT USE RTL;Realtek Semiconductor Company Ltd RTS;Raintree Systems RUN;RUNCO International RUP;Ups Manufactoring s.r.l. RVC;RSI Systems Inc RVI;Realvision Inc RVL;Reveal Computer Prod RWC;Red Wing Corporation RXT;Tectona SoftSolutions (P) Ltd., SAA;Sanritz Automation Co.,Ltd. SAE;Saab Aerotech SAG;Sedlbauer SAI;Sage Inc SAK;Saitek Ltd SAM;Samsung Electric Company SAN;Sanyo Electric Co.,Ltd. SAS;Stores Automated Systems Inc SAT;Shuttle Tech SBC;Shanghai Bell Telephone Equip Mfg Co SBD;Softbed - Consulting & Development Ltd SBI;SMART Technologies Inc. SBS;SBS-or Industrial Computers GmbH SBT;Senseboard Technologies AB SCC;SORD Computer Corporation SCD;Sanyo Electric Company Ltd SCE;Sun Corporation SCH;Schlumberger Cards SCI;System Craft SCL;Sigmacom Co., Ltd. SCM;SCM Microsystems Inc SCN;Scanport, Inc. SCO;SORCUS Computer GmbH SCP;Scriptel Corporation SCR;Systran Corporation SCS;Nanomach Anstalt SCT;Smart Card Technology SDA;SAT (Societe Anonyme) SDD;Intrada-SDD Ltd SDE;Sherwood Digital Electronics Corporation SDF;SODIFF E&T CO., Ltd. SDH;Communications Specialies, Inc. SDI;Samtron Displays Inc SDK;SAIT-Devlonics SDR;SDR Systems SDS;SunRiver Data System SDT;Siemens AG SDX;SDX Business Systems Ltd SEA;Seanix Technology Inc. SEB;system elektronik GmbH SEC;Seiko Epson Corporation SEE;SeeColor Corporation SEG;DO NOT USE SEI;Seitz & Associates Inc SEL;Way2Call Communications SEM;Samsung Electronics Company Ltd SEN;Sencore SEO;SEOS Ltd SEP;SEP Eletronica Ltda. SER;Sony Ericsson Mobile Communications Inc. SES;Session Control LLC SET;SendTek Corporation SFM;TORNADO Company SFT;Mikroforum Ring 3 SGC;Spectragraphics Corporation SGD;Sigma Designs, Inc. SGE;Kansai Electric Company Ltd SGI;Scan Group Ltd SGL;Super Gate Technology Company Ltd SGM;SAGEM SGO;Logos Design A/S SGT;Stargate Technology SGX;Silicon Graphics Inc SGZ;Systec Computer GmbH SHC;ShibaSoku Co., Ltd. SHG;Soft & Hardware development Goldammer GmbH SHI;Jiangsu Shinco Electronic Group Co., Ltd SHP;Sharp Corporation SHR;Digital Discovery SHT;Shin Ho Tech SIA;SIEMENS AG SIB;Sanyo Electric Company Ltd SIC;Sysmate Corporation SID;Seiko Instruments Information Devices Inc SIE;Siemens SIG;Sigma Designs Inc SII;Silicon Image, Inc. SIL;Silicon Laboratories, Inc SIM;S3 Inc SIN;Singular Technology Co., Ltd. SIR;Sirius Technologies Pty Ltd SIS;Silicon Integrated Systems Corporation SIT;Sitintel SIU;Seiko Instruments USA Inc SIX;Zuniq Data Corporation SJE;Sejin Electron Inc SKD;Schneider & Koch SKT;Samsung Electro-Mechanics Company Ltd SKY;SKYDATA S.P.A. SLA;Systeme Lauer GmbH&Co KG SLB;Shlumberger Ltd SLC;Syslogic Datentechnik AG SLF;StarLeaf SLH;Silicon Library Inc. SLI;Symbios Logic Inc SLK;Silitek Corporation SLM;Solomon Technology Corporation SLR;Schlumberger Technology Corporate SLS;Schnick-Schnack-Systems GmbH SLT;Salt Internatioinal Corp. SLX;Specialix SMA;SMART Modular Technologies SMB;Schlumberger SMC;Standard Microsystems Corporation SME;Sysmate Company SMI;SpaceLabs Medical Inc SMK;SMK CORPORATION SML;Sumitomo Metal Industries, Ltd. SMM;Shark Multimedia Inc SMO;STMicroelectronics SMP;Simple Computing SMR;B.& V. s.r.l. SMS;Silicom Multimedia Systems Inc SMT;Silcom Manufacturing Tech Inc SNC;Sentronic International Corp. SNI;Siemens Microdesign GmbH SNK;S&K Electronics SNO;SINOSUN TECHNOLOGY CO., LTD SNP;Siemens Nixdorf Info Systems SNS;Cirtech (UK) Ltd SNT;SuperNet Inc SNW;Snell & Wilcox SNX;Sonix Comm. Ltd SNY;Sony SOI;Silicon Optix Corporation SOL;Solitron Technologies Inc SON;Sony SOR;Sorcus Computer GmbH SOT;Sotec Company Ltd SOY;SOYO Group, Inc SPC;SpinCore Technologies, Inc SPE;SPEA Software AG SPH;G&W Instruments GmbH SPI;SPACE-I Co., Ltd. SPK;SpeakerCraft SPL;Smart Silicon Systems Pty Ltd SPN;Sapience Corporation SPR;pmns GmbH SPS;Synopsys Inc SPT;Sceptre Tech Inc SPU;SIM2 Multimedia S.P.A. SPX;Simplex Time Recorder Co. SQT;Sequent Computer Systems Inc SRC;Integrated Tech Express Inc SRD;Setred SRF;Surf Communication Solutions Ltd SRG;Intuitive Surgical, Inc. SRT;SeeReal Technologies GmbH SSC;Sierra Semiconductor Inc SSD;FlightSafety International SSE;Samsung Electronic Co. SSI;S-S Technology Inc SSJ;Sankyo Seiki Mfg.co., Ltd SSP;Spectrum Signal Proecessing Inc SSS;S3 Inc SST;SystemSoft Corporation STA;ST Electronics Systems Assembly Pte Ltd STB;STB Systems Inc STC;STAC Electronics STD;STD Computer Inc STE;SII Ido-Tsushin Inc STF;Starflight Electronics STG;StereoGraphics Corp. STH;Semtech Corporation STI;Smart Tech Inc STK;SANTAK CORP. STL;SigmaTel Inc STM;SGS Thomson Microelectronics STN;Samsung Electronics America STO;Stollmann E+V GmbH STP;StreamPlay Ltd STR;Starlight Networks Inc STS;SITECSYSTEM CO., LTD. STT;Star Paging Telecom Tech (Shenzhen) Co. Ltd. STW;Starwin Inc. STY;SDS Technologies SUB;Subspace Comm. Inc SUM;Summagraphics Corporation SUN;Sun Electronics Corporation SUP;Supra Corporation SUR;Surenam Computer Corporation SVA;SGEG SVC;Intellix Corp. SVD;SVD Computer SVI;Sun Microsystems SVS;SVSI SVT;SEVIT Co., Ltd. SWC;Software Café SWI;Sierra Wireless Inc. SWL;Sharedware Ltd SWS;Static SWT;Software Technologies Group,Inc. SXB;Syntax-Brillian SXD;Silex technology, Inc. SXL;SolutionInside SXT;SHARP TAKAYA ELECTRONIC INDUSTRY CO.,LTD. SYC;Sysmic SYE;SY Electronics Ltd SYK;Stryker Communications SYL;Sylvania Computer Products SYM;Symicron Computer Communications Ltd. SYN;Synaptics Inc SYP;SYPRO Co Ltd SYS;Sysgration Ltd SYT;Seyeon Tech Company Ltd SYV;SYVAX Inc SYX;Prime Systems, Inc. TAA;Tandberg TAB;Todos Data System AB TAG;Teles AG TAI;Toshiba America Info Systems Inc TAM;Tamura Seisakusyo Ltd TAS;Taskit Rechnertechnik GmbH TAT;Teleliaison Inc TAX;Taxan (Europe) Ltd TBB;Triple S Engineering Inc TBC;Turbo Communication, Inc TBS;Turtle Beach System TCC;Tandon Corporation TCD;Taicom Data Systems Co., Ltd. TCE;Century Corporation TCH;Interaction Systems, Inc TCI;Tulip Computers Int'l B.V. TCJ;TEAC America Inc TCL;Technical Concepts Ltd TCM;3Com Corporation TCN;Tecnetics (PTY) Ltd TCO;Thomas-Conrad Corporation TCR;Thomson Consumer Electronics TCS;Tatung Company of America Inc TCT;Telecom Technology Centre Co. Ltd. TCX;FREEMARS Heavy Industries TDC;Teradici TDD;Tandberg Data Display AS TDK;TDK USA Corporation TDM;Tandem Computer Europe Inc TDP;3D Perception TDS;Tri-Data Systems Inc TDT;TDT TDV;TDVision Systems, Inc. TDY;Tandy Electronics TEA;TEAC System Corporation TEC;Tecmar Inc TEK;Tektronix Inc TEL;Promotion and Display Technology Ltd. TER;TerraTec Electronic GmbH TGI;TriGem Computer Inc TGM;TriGem Computer,Inc. TGS;Torus Systems Ltd TGV;Grass Valley Germany GmbH THN;Thundercom Holdings Sdn. Bhd. TIC;Trigem KinfoComm TIP;TIPTEL AG TIV;OOO Technoinvest TIX;Tixi.Com GmbH TKC;Taiko Electric Works.LTD TKN;Teknor Microsystem Inc TKO;TouchKo, Inc. TKS;TimeKeeping Systems, Inc. TLA;Ferrari Electronic GmbH TLD;Telindus TLI;TOSHIBA TELI CORPORATION TLK;Telelink AG TLS;Teleste Educational OY TLT;Dai Telecom S.p.A. TLV;S3 Inc TLX;Telxon Corporation TMC;Techmedia Computer Systems Corporation TME;AT&T Microelectronics TMI;Texas Microsystem TMM;Time Management, Inc. TMR;Taicom International Inc TMS;Trident Microsystems Ltd TMT;T-Metrics Inc. TMX;Thermotrex Corporation TNC;TNC Industrial Company Ltd TNJ;DO NOT USE TNM;TECNIMAGEN SA TNY;Tennyson Tech Pty Ltd TOE;TOEI Electronics Co., Ltd. TOG;The OPEN Group TOP;Orion Communications Co., Ltd. TOS;Toshiba Corporation TOU;Touchstone Technology TPC;Touch Panel Systems Corporation TPE;Technology Power Enterprises Inc TPJ;(none) TPK;TOPRE CORPORATION TPR;Topro Technology Inc TPS;Teleprocessing Systeme GmbH TPT;Thruput Ltd TPV;Top Victory Electronics ( Fujian ) Company Ltd TPZ;Ypoaz Systems Inc TRA;TriTech Microelectronics International TRC;Trioc AB TRD;Trident Microsystem Inc TRE;Tremetrics TRI;Tricord Systems TRL;Royal Information TRM;Tekram Technology Company Ltd TRN;Datacommunicatie Tron B.V. TRS;Torus Systems Ltd TRU;Aashima Technology B.V. TRX;Trex Enterprises TSB;Toshiba America Info Systems Inc TSC;Sanyo Electric Company Ltd TSD;TechniSat Digital GmbH TSE;Tottori Sanyo Electric TSF;Racal-Airtech Software Forge Ltd TSG;The Software Group Ltd TSI;TeleVideo Systems TSL;Tottori SANYO Electric Co., Ltd. TSP;U.S. Navy TST;Transtream Inc TSV;TRANSVIDEO TSY;TouchSystems TTA;Topson Technology Co., Ltd. TTB;National Semiconductor Japan Ltd TTC;Telecommunications Techniques Corporation TTE;TTE, Inc. TTI;Trenton Terminals Inc TTK;Totoku Electric Company Ltd TTL;2-Tel B.V. TTS;TechnoTrend Systemtechnik GmbH TTY;TRIDELITY Display Solutions GmbH TUT;Tut Systems TVD;Tecnovision TVI;Truevision TVM;Taiwan Video & Monitor Corporation TVO;TV One Ltd TVR;TV Interactive Corporation TVS;TVS Electronics Limited TWA;Tidewater Association TWE;Kontron Electronik TWH;Twinhead International Corporation TWI;Easytel oy TWK;TOWITOKO electronics GmbH TWX;TEKWorx Limited TXL;Trixel Ltd TXN;Texas Insturments TXT;Textron Defense System TYN;Tyan Computer Corporation UAS;Ultima Associates Pte Ltd UBI;Ungermann-Bass Inc UBL;Ubinetics Ltd. UDN;Uniden Corporation UEC;Ultima Electronics Corporation UEG;Elitegroup Computer Systems Company Ltd UEI;Universal Electronics Inc UET;Universal Empowering Technologies UFG;UNIGRAF-USA UFO;UFO Systems Inc UHB;XOCECO UIC;Uniform Industrial Corporation UJR;Ueda Japan Radio Co., Ltd. ULT;Ultra Network Tech UMC;United Microelectr Corporation UMG;Umezawa Giken Co.,Ltd UMM;Universal Multimedia UNA;Unisys DSD UNB;Unisys Corporation UNC;Unisys Corporation UND;DO NOT USE - UND UNE;DO NOT USE - UNE UNF;DO NOT USE - UNF UNI;Unisys Corporation UNI;Uniform Industry Corp. UNM;Unisys Corporation UNO;Unisys Corporation UNP;Unitop UNS;Unisys Corporation UNT;Unisys Corporation UNY;Unicate UPP;UPPI UPS;Systems Enhancement URD;Video Computer S.p.A. USA;Utimaco Safeware AG USD;U.S. Digital Corporation USI;Universal Scientific Industrial Co., Ltd. USR;U.S. Robotics Inc UTD;Up to Date Tech UWC;Uniwill Computer Corp. VAL;Valence Computing Corporation VAR;Varian Australia Pty Ltd VBT;Valley Board Ltda VCC;Virtual Computer Corporation VCI;VistaCom Inc VCJ;Victor Company of Japan, Limited VCM;Vector Magnetics, LLC VCX;VCONEX VDA;Victor Data Systems VDC;VDC Display Systems VDM;Vadem VDO;Video & Display Oriented Corporation VDS;Vidisys GmbH & Company VDT;Viditec, Inc. VEC;Vector Informatik GmbH VEK;Vektrex VES;Vestel Elektronik Sanayi ve Ticaret A. S. VFI;VeriFone Inc VHI;Macrocad Development Inc. VIA;VIA Tech Inc VIB;Tatung UK Ltd VIC;Victron B.V. VID;Ingram Macrotron Germany VIK;Viking Connectors VIN;Vine Micros Ltd VIR;Visual Interface, Inc VIS;Visioneer VIT;Visitech AS VLB;ValleyBoard Ltda. VLT;VideoLan Technologies VMI;Vermont Microsystems VML;Vine Micros Limited VNC;Vinca Corporation VOB;MaxData Computer AG VPI;Video Products Inc VPR;Best Buy VQ@;Vision Quest VRC;Virtual Resources Corporation VSC;ViewSonic Corporation VSD;3M VSI;VideoServer VSN;Ingram Macrotron VSP;Vision Systems GmbH VSR;V-Star Electronics Inc. VTC;VTel Corporation VTG;Voice Technologies Group Inc VTI;VLSI Tech Inc VTK;Viewteck Co., Ltd. VTL;Vivid Technology Pte Ltd VTM;Miltope Corporation VTN;VIDEOTRON CORP. VTS;VTech Computers Ltd VTV;VATIV Technologies VUT;Vutrix (UK) Ltd VWB;Vweb Corp. WAC;Wacom Tech WAL;Wave Access WAN;DO NOT USE WAV;Wavephore WBN;MicroSoftWare WBS;WB Systemtechnik GmbH WCI;Wisecom Inc WCS;Woodwind Communications Systems Inc WDC;Western Digital WDE;Westinghouse Digital Electronics WEB;WebGear Inc WEC;Winbond Electronics Corporation WEL ; W-DEV WEY;WEY Design AG WHI;Whistle Communications WII;Innoware Inc WIL;WIPRO Information Technology Ltd WIN;Wintop Technology Inc WIP;Wipro Infotech WKH;Uni-Take Int'l Inc. WLD;Wildfire Communications Inc WML;Wolfson Microelectronics Ltd WMO;Westermo Teleindustri AB WMT;Winmate Communication Inc WNI;WillNet Inc. WNV;Winnov L.P. WNX;Wincor Nixdorf International GmbH WPA;Matsushita Communication Industrial Co., Ltd. WPI;Wearnes Peripherals International (Pte) Ltd WRC;WiNRADiO Communications WSC;CIS Technology Inc WSP;Wireless And Smart Products Inc. WST;Wistron Corporation WTC;ACC Microelectronics WTI;WorkStation Tech WTK;Wearnes Thakral Pte WTS;Restek Electric Company Ltd WVM;Wave Systems Corporation WWV;World Wide Video, Inc. WXT;Woxter Technology Co. Ltd WYS;Myse Technology WYT;Wooyoung Image & Information Co.,Ltd. XAC;XAC Automation Corp XAD;Alpha Data XDM;XDM Ltd. XER;DO NOT USE XFG;Jan Strapko - FOTO XFO;EXFO Electro Optical Engineering XIN;Xinex Networks Inc XIO;Xiotech Corporation XIR;Xirocm Inc XIT;Xitel Pty ltd XLX;Xilinx, Inc. XMM;C3PO S.L. XNT;XN Technologies, Inc. XOC;DO NOT USE XQU;SHANGHAI SVA-DAV ELECTRONICS CO., LTD XRC;Xircom Inc XRO;XORO ELECTRONICS (CHENGDU) LIMITED XSN;Xscreen AS XST;XS Technologies Inc XSY;XSYS XTD;Icuiti Corporation XTE;X2E GmbH XTL;Crystal Computer XTN;X-10 (USA) Inc XYC;Xycotec Computer GmbH YED;Y-E Data Inc YHQ;Yokogawa Electric Corporation YHW;Exacom SA YMH;Yamaha Corporation YOW;American Biometric Company ZAN;Zandar Technologies plc ZAX;Zefiro Acoustics ZAZ;Zazzle Technologies ZBR;Zebra Technologies International, LLC ZCT;ZeitControl cardsystems GmbH ZDS;Zenith Data Systems ZGT;Zenith Data Systems ZIC;ZTEIC DESIGN CO., LTD. ZMT;Zalman Tech Co., Ltd. ZMZ;Z Microsystems ZNI;Zetinet Inc ZNX;Znyx Adv. Systems ZOW;Zowie Intertainment, Inc ZRN;Zoran Corporation ZSE;Zenith Data Systems ZTC;ZyDAS Technology Corporation ZTE;ZTE Corporation ZTI;Zoom Telephonics Inc ZTM;ZT Group Int'l Inc. ZYD;Zydacron Inc ZYP;Zypcom Inc ZYT;Zytex Computers ZYX;Zyxel ZZZ;Boca Research Inc libsigrokdecode-0.5.0/decoders/edid/pd.py0000644000175000017500000005017013117367246015255 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # TODO: # - EDID < 1.3 # - add short annotations # - Signal level standard field in basic display parameters block # - Additional color point descriptors # - Additional standard timing descriptors # - Extensions import sigrokdecode as srd import os EDID_HEADER = [0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00] OFF_VENDOR = 8 OFF_VERSION = 18 OFF_BASIC = 20 OFF_CHROM = 25 OFF_EST_TIMING = 35 OFF_STD_TIMING = 38 OFF_DET_TIMING = 54 OFF_NUM_EXT = 126 OFF_CHECKSUM = 127 # Pre-EDID established timing modes est_modes = [ '720x400@70Hz', '720x400@88Hz', '640x480@60Hz', '640x480@67Hz', '640x480@72Hz', '640x480@75Hz', '800x600@56Hz', '800x600@60Hz', '800x600@72Hz', '800x600@75Hz', '832x624@75Hz', '1024x768@87Hz(i)', '1024x768@60Hz', '1024x768@70Hz', '1024x768@75Hz', '1280x1024@75Hz', '1152x870@75Hz', ] # X:Y display aspect ratios, as used in standard timing modes xy_ratio = [ (16, 10), (4, 3), (5, 4), (16, 9), ] # Annotation classes ANN_FIELDS = 0 ANN_SECTIONS = 1 class Decoder(srd.Decoder): api_version = 2 id = 'edid' name = 'EDID' longname = 'Extended Display Identification Data' desc = 'Data structure describing display device capabilities.' license = 'gplv3+' inputs = ['i2c'] outputs = ['edid'] annotations = ( ('fields', 'EDID structure fields'), ('sections', 'EDID structure sections'), ) annotation_rows = ( ('sections', 'Sections', (1,)), ('fields', 'Fields', (0,)), ) def __init__(self): self.state = None # Received data items, used as an index into samplenum/data self.cnt = 0 # Start/end sample numbers per data item self.sn = [] # Received data self.cache = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def decode(self, ss, es, data): cmd, data = data # We only care about actual data bytes that are read (for now). if cmd != 'DATA READ': return self.cnt += 1 self.sn.append([ss, es]) self.cache.append(data) # debug if self.state is None: # Wait for the EDID header if self.cnt >= OFF_VENDOR: if self.cache[-8:] == EDID_HEADER: # Throw away any garbage before the header self.sn = self.sn[-8:] self.cache = self.cache[-8:] self.cnt = 8 self.state = 'edid' self.put(self.sn[0][0], es, self.out_ann, [ANN_SECTIONS, ['Header']]) self.put(self.sn[0][0], es, self.out_ann, [ANN_FIELDS, ['Header pattern']]) elif self.state == 'edid': if self.cnt == OFF_VERSION: self.decode_vid(-10) self.decode_pid(-8) self.decode_serial(-6) self.decode_mfrdate(-2) self.put(self.sn[OFF_VENDOR][0], es, self.out_ann, [ANN_SECTIONS, ['Vendor/product']]) elif self.cnt == OFF_BASIC: self.put(self.sn[OFF_VERSION][0], es, self.out_ann, [ANN_SECTIONS, ['EDID Version']]) self.put(self.sn[OFF_VERSION][0], self.sn[OFF_VERSION][1], self.out_ann, [ANN_FIELDS, ['Version %d' % self.cache[-2]]]) self.put(self.sn[OFF_VERSION+1][0], self.sn[OFF_VERSION+1][1], self.out_ann, [ANN_FIELDS, ['Revision %d' % self.cache[-1]]]) elif self.cnt == OFF_CHROM: self.put(self.sn[OFF_BASIC][0], es, self.out_ann, [ANN_SECTIONS, ['Basic display']]) self.decode_basicdisplay(-5) elif self.cnt == OFF_EST_TIMING: self.put(self.sn[OFF_CHROM][0], es, self.out_ann, [ANN_SECTIONS, ['Color characteristics']]) self.decode_chromaticity(-10) elif self.cnt == OFF_STD_TIMING: self.put(self.sn[OFF_EST_TIMING][0], es, self.out_ann, [ANN_SECTIONS, ['Established timings']]) self.decode_est_timing(-3) elif self.cnt == OFF_DET_TIMING: self.put(self.sn[OFF_STD_TIMING][0], es, self.out_ann, [ANN_SECTIONS, ['Standard timings']]) self.decode_std_timing(self.cnt - 16) elif self.cnt == OFF_NUM_EXT: self.decode_descriptors(-72) elif self.cnt == OFF_CHECKSUM: self.put(ss, es, self.out_ann, [0, ['Extensions present: %d' % self.cache[self.cnt-1]]]) elif self.cnt == OFF_CHECKSUM+1: checksum = 0 for i in range(128): checksum += self.cache[i] if checksum % 256 == 0: csstr = 'OK' else: csstr = 'WRONG!' self.put(ss, es, self.out_ann, [0, ['Checksum: %d (%s)' % ( self.cache[self.cnt-1], csstr)]]) self.state = 'extensions' elif self.state == 'extensions': pass def ann_field(self, start, end, annotation): self.put(self.sn[start][0], self.sn[end][1], self.out_ann, [ANN_FIELDS, [annotation]]) def lookup_pnpid(self, pnpid): pnpid_file = os.path.join(os.path.dirname(__file__), 'pnpids.txt') if os.path.exists(pnpid_file): for line in open(pnpid_file).readlines(): if line.find(pnpid + ';') == 0: return line[4:].strip() return '' def decode_vid(self, offset): pnpid = chr(64 + ((self.cache[offset] & 0x7c) >> 2)) pnpid += chr(64 + (((self.cache[offset] & 0x03) << 3) | ((self.cache[offset+1] & 0xe0) >> 5))) pnpid += chr(64 + (self.cache[offset+1] & 0x1f)) vendor = self.lookup_pnpid(pnpid) if vendor: pnpid += ' (%s)' % vendor self.ann_field(offset, offset+1, pnpid) def decode_pid(self, offset): pidstr = 'Product 0x%.2x%.2x' % (self.cache[offset+1], self.cache[offset]) self.ann_field(offset, offset+1, pidstr) def decode_serial(self, offset): serialnum = (self.cache[offset+3] << 24) \ + (self.cache[offset+2] << 16) \ + (self.cache[offset+1] << 8) \ + self.cache[offset] serialstr = '' is_alnum = True for i in range(4): if not chr(self.cache[offset+3-i]).isalnum(): is_alnum = False break serialstr += chr(self.cache[offset+3-i]) serial = serialstr if is_alnum else str(serialnum) self.ann_field(offset, offset+3, 'Serial ' + serial) def decode_mfrdate(self, offset): datestr = '' if self.cache[offset]: datestr += 'week %d, ' % self.cache[offset] datestr += str(1990 + self.cache[offset+1]) if datestr: self.ann_field(offset, offset+1, 'Manufactured ' + datestr) def decode_basicdisplay(self, offset): # Video input definition vid = self.cache[offset] if vid & 0x80: # Digital self.ann_field(offset, offset, 'Video input: VESA DFP 1.') else: # Analog sls = (vid & 60) >> 5 self.ann_field(offset, offset, 'Signal level standard: %.2x' % sls) if vid & 0x10: self.ann_field(offset, offset, 'Blank-to-black setup expected') syncs = '' if vid & 0x08: syncs += 'separate syncs, ' if vid & 0x04: syncs += 'composite syncs, ' if vid & 0x02: syncs += 'sync on green, ' if vid & 0x01: syncs += 'Vsync serration required, ' if syncs: self.ann_field(offset, offset, 'Supported syncs: %s' % syncs[:-2]) # Max horizontal/vertical image size if self.cache[offset+1] != 0 and self.cache[offset+2] != 0: # Projectors have this set to 0 sizestr = '%dx%dcm' % (self.cache[offset+1], self.cache[offset+2]) self.ann_field(offset+1, offset+2, 'Physical size: ' + sizestr) # Display transfer characteristic (gamma) if self.cache[offset+3] != 0xff: gamma = (self.cache[offset+3] + 100) / 100 self.ann_field(offset+3, offset+3, 'Gamma: %1.2f' % gamma) # Feature support fs = self.cache[offset+4] dpms = '' if fs & 0x80: dpms += 'standby, ' if fs & 0x40: dpms += 'suspend, ' if fs & 0x20: dpms += 'active off, ' if dpms: self.ann_field(offset+4, offset+4, 'DPMS support: %s' % dpms[:-2]) dt = (fs & 0x18) >> 3 dtstr = '' if dt == 0: dtstr = 'Monochrome' elif dt == 1: dtstr = 'RGB color' elif dt == 2: dtstr = 'non-RGB multicolor' if dtstr: self.ann_field(offset+4, offset+4, 'Display type: %s' % dtstr) if fs & 0x04: self.ann_field(offset+4, offset+4, 'Color space: standard sRGB') # Save this for when we decode the first detailed timing descriptor self.have_preferred_timing = (fs & 0x02) == 0x02 if fs & 0x01: gft = '' else: gft = 'not ' self.ann_field(offset+4, offset+4, 'Generalized timing formula: %ssupported' % gft) def convert_color(self, value): # Convert from 10-bit packet format to float outval = 0.0 for i in range(10): if value & 0x01: outval += 2 ** -(10-i) value >>= 1 return outval def decode_chromaticity(self, offset): redx = (self.cache[offset+2] << 2) + ((self.cache[offset] & 0xc0) >> 6) redy = (self.cache[offset+3] << 2) + ((self.cache[offset] & 0x30) >> 4) self.ann_field(offset, offset+9, 'Chromacity red: X %1.3f, Y %1.3f' % ( self.convert_color(redx), self.convert_color(redy))) greenx = (self.cache[offset+4] << 2) + ((self.cache[offset] & 0x0c) >> 6) greeny = (self.cache[offset+5] << 2) + ((self.cache[offset] & 0x03) >> 4) self.ann_field(offset, offset+9, 'Chromacity green: X %1.3f, Y %1.3f' % ( self.convert_color(greenx), self.convert_color(greeny))) bluex = (self.cache[offset+6] << 2) + ((self.cache[offset+1] & 0xc0) >> 6) bluey = (self.cache[offset+7] << 2) + ((self.cache[offset+1] & 0x30) >> 4) self.ann_field(offset, offset+9, 'Chromacity blue: X %1.3f, Y %1.3f' % ( self.convert_color(bluex), self.convert_color(bluey))) whitex = (self.cache[offset+8] << 2) + ((self.cache[offset+1] & 0x0c) >> 6) whitey = (self.cache[offset+9] << 2) + ((self.cache[offset+1] & 0x03) >> 4) self.ann_field(offset, offset+9, 'Chromacity white: X %1.3f, Y %1.3f' % ( self.convert_color(whitex), self.convert_color(whitey))) def decode_est_timing(self, offset): # Pre-EDID modes bitmap = (self.cache[offset] << 9) \ + (self.cache[offset+1] << 1) \ + ((self.cache[offset+2] & 0x80) >> 7) modestr = '' for i in range(17): if bitmap & (1 << (16-i)): modestr += est_modes[i] + ', ' if modestr: self.ann_field(offset, offset+2, 'Supported established modes: %s' % modestr[:-2]) def decode_std_timing(self, offset): modestr = '' for i in range(0, 16, 2): if self.cache[offset+i] == 0x01 and self.cache[offset+i+1] == 0x01: # Unused field continue x = (self.cache[offset+i] + 31) * 8 ratio = (self.cache[offset+i+1] & 0xc0) >> 6 ratio_x, ratio_y = xy_ratio[ratio] y = x / ratio_x * ratio_y refresh = (self.cache[offset+i+1] & 0x3f) + 60 modestr += '%dx%d@%dHz, ' % (x, y, refresh) if modestr: self.ann_field(offset, offset + 15, 'Supported standard modes: %s' % modestr[:-2]) def decode_detailed_timing(self, offset): if offset == -72 and self.have_preferred_timing: # Only on first detailed timing descriptor section = 'Preferred' else: section = 'Detailed' section += ' timing descriptor' self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, [section]]) pixclock = float((self.cache[offset+1] << 8) + self.cache[offset]) / 100 self.ann_field(offset, offset+1, 'Pixel clock: %.2f MHz' % pixclock) horiz_active = ((self.cache[offset+4] & 0xf0) << 4) + self.cache[offset+2] self.ann_field(offset+2, offset+4, 'Horizontal active: %d' % horiz_active) horiz_blank = ((self.cache[offset+4] & 0x0f) << 8) + self.cache[offset+3] self.ann_field(offset+2, offset+4, 'Horizontal blanking: %d' % horiz_blank) vert_active = ((self.cache[offset+7] & 0xf0) << 4) + self.cache[offset+5] self.ann_field(offset+5, offset+7, 'Vertical active: %d' % vert_active) vert_blank = ((self.cache[offset+7] & 0x0f) << 8) + self.cache[offset+6] self.ann_field(offset+5, offset+7, 'Vertical blanking: %d' % vert_blank) horiz_sync_off = ((self.cache[offset+11] & 0xc0) << 2) + self.cache[offset+8] self.ann_field(offset+8, offset+11, 'Horizontal sync offset: %d' % horiz_sync_off) horiz_sync_pw = ((self.cache[offset+11] & 0x30) << 4) + self.cache[offset+9] self.ann_field(offset+8, offset+11, 'Horizontal sync pulse width: %d' % horiz_sync_pw) vert_sync_off = ((self.cache[offset+11] & 0x0c) << 2) \ + ((self.cache[offset+10] & 0xf0) >> 4) self.ann_field(offset+8, offset+11, 'Vertical sync offset: %d' % vert_sync_off) vert_sync_pw = ((self.cache[offset+11] & 0x03) << 4) \ + (self.cache[offset+10] & 0x0f) self.ann_field(offset+8, offset+11, 'Vertical sync pulse width: %d' % vert_sync_pw) horiz_size = ((self.cache[offset+14] & 0xf0) << 4) + self.cache[offset+12] vert_size = ((self.cache[offset+14] & 0x0f) << 8) + self.cache[offset+13] self.ann_field(offset+12, offset+14, 'Physical size: %dx%dmm' % (horiz_size, vert_size)) horiz_border = self.cache[offset+15] self.ann_field(offset+15, offset+15, 'Horizontal border: %d pixels' % horiz_border) vert_border = self.cache[offset+16] self.ann_field(offset+16, offset+16, 'Vertical border: %d lines' % vert_border) features = 'Flags: ' if self.cache[offset+17] & 0x80: features += 'interlaced, ' stereo = (self.cache[offset+17] & 0x60) >> 5 if stereo: if self.cache[offset+17] & 0x01: features += '2-way interleaved stereo (' features += ['right image on even lines', 'left image on even lines', 'side-by-side'][stereo-1] features += '), ' else: features += 'field sequential stereo (' features += ['right image on sync=1', 'left image on sync=1', '4-way interleaved'][stereo-1] features += '), ' sync = (self.cache[offset+17] & 0x18) >> 3 sync2 = (self.cache[offset+17] & 0x06) >> 1 posneg = ['negative', 'positive'] features += 'sync type ' if sync == 0x00: features += 'analog composite (serrate on RGB)' elif sync == 0x01: features += 'bipolar analog composite (serrate on RGB)' elif sync == 0x02: features += 'digital composite (serrate on composite polarity ' \ + (posneg[sync2 & 0x01]) + ')' elif sync == 0x03: features += 'digital separate (' features += 'Vsync polarity ' + (posneg[(sync2 & 0x02) >> 1]) features += ', Hsync polarity ' + (posneg[sync2 & 0x01]) features += ')' features += ', ' self.ann_field(offset+17, offset+17, features[:-2]) def decode_descriptor(self, offset): tag = self.cache[offset+3] if tag == 0xff: # Monitor serial number self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Serial number']]) text = bytes(self.cache[offset+5:][:13]).decode(encoding='cp437', errors='replace') self.ann_field(offset, offset+17, text.strip()) elif tag == 0xfe: # Text self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Text']]) text = bytes(self.cache[offset+5:][:13]).decode(encoding='cp437', errors='replace') self.ann_field(offset, offset+17, text.strip()) elif tag == 0xfc: # Monitor name self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Monitor name']]) text = bytes(self.cache[offset+5:][:13]).decode(encoding='cp437', errors='replace') self.ann_field(offset, offset+17, text.strip()) elif tag == 0xfd: # Monitor range limits self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Monitor range limits']]) self.ann_field(offset+5, offset+5, 'Minimum vertical rate: %dHz' % self.cache[offset+5]) self.ann_field(offset+6, offset+6, 'Maximum vertical rate: %dHz' % self.cache[offset+6]) self.ann_field(offset+7, offset+7, 'Minimum horizontal rate: %dkHz' % self.cache[offset+7]) self.ann_field(offset+8, offset+8, 'Maximum horizontal rate: %dkHz' % self.cache[offset+8]) self.ann_field(offset+9, offset+9, 'Maximum pixel clock: %dMHz' % (self.cache[offset+9] * 10)) if self.cache[offset+10] == 0x02: # Secondary GTF curve supported self.ann_field(offset+10, offset+17, 'Secondary timing formula supported') elif tag == 0xfb: # Additional color point data self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Additional color point data']]) elif tag == 0xfa: # Additional standard timing definitions self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Additional standard timing definitions']]) else: self.put(self.sn[offset][0], self.sn[offset+17][1], self.out_ann, [ANN_SECTIONS, ['Unknown descriptor']]) def decode_descriptors(self, offset): # 4 consecutive 18-byte descriptor blocks for i in range(offset, 0, 18): if self.cache[i] != 0 and self.cache[i+1] != 0: self.decode_detailed_timing(i) else: if self.cache[i+2] == 0 or self.cache[i+4] == 0: self.decode_descriptor(i) libsigrokdecode-0.5.0/decoders/edid/__init__.py0000644000175000017500000000252013117367246016405 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' EDID 1.3 structure decoder. The three-character vendor ID as specified in the EDID standard refers to a Plug and Play ID (PNPID). The list of PNPID assignments is done by Microsoft. More information is available on this page: http://msdn.microsoft.com/en-us/windows/hardware/gg463195 The 'pnpids.txt' file included with this protocol decoder is derived from the list of assignments downloadable from that page. It was retrieved in January 2012. More information on EDID is available here: https://en.wikipedia.org/wiki/Extended_display_identification_data ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/gpib/0000755000175000017500000000000013117367246014371 500000000000000libsigrokdecode-0.5.0/decoders/gpib/pd.py0000644000175000017500000001435113117367246015272 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Rudolf Reuter ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 3 id = 'gpib' name = 'GPIB' longname = 'General Purpose Interface Bus' desc = 'IEEE-488 GPIB / HPIB protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['gpib'] channels = ( {'id': 'dio1' , 'name': 'DIO1', 'desc': 'Data I/O bit 1'}, {'id': 'dio2' , 'name': 'DIO2', 'desc': 'Data I/O bit 2'}, {'id': 'dio3' , 'name': 'DIO3', 'desc': 'Data I/O bit 3'}, {'id': 'dio4' , 'name': 'DIO4', 'desc': 'Data I/O bit 4'}, {'id': 'dio5' , 'name': 'DIO5', 'desc': 'Data I/O bit 5'}, {'id': 'dio6' , 'name': 'DIO6', 'desc': 'Data I/O bit 6'}, {'id': 'dio7' , 'name': 'DIO7', 'desc': 'Data I/O bit 7'}, {'id': 'dio8' , 'name': 'DIO8', 'desc': 'Data I/O bit 8'}, {'id': 'eoi', 'name': 'EOI', 'desc': 'End or identify'}, {'id': 'dav', 'name': 'DAV', 'desc': 'Data valid'}, {'id': 'nrfd', 'name': 'NRFD', 'desc': 'Not ready for data'}, {'id': 'ndac', 'name': 'NDAC', 'desc': 'Not data accepted'}, {'id': 'ifc', 'name': 'IFC', 'desc': 'Interface clear'}, {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request'}, {'id': 'atn', 'name': 'ATN', 'desc': 'Attention'}, {'id': 'ren', 'name': 'REN', 'desc': 'Remote enable'}, ) options = ( {'id': 'sample_total', 'desc': 'Total number of samples', 'default': 0}, ) annotations = ( ('items', 'Items'), ('gpib', 'DAT/CMD'), ('eoi', 'EOI'), ) annotation_rows = ( ('bytes', 'Bytes', (0,)), ('gpib', 'DAT/CMD', (1,)), ('eoi', 'EOI', (2,)), ) def __init__(self): self.items = [] self.itemcount = 0 self.saved_item = None self.saved_ATN = False self.saved_EOI = False self.samplenum = 0 self.ss_item = self.es_item = None self.first = True def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putb(self, data): self.put(self.ss_item, self.es_item, self.out_ann, data) def handle_bits(self, datapins): dbyte = 0x20 dATN = False item2 = False dEOI = False item3 = False # If this is the first item in a word, save its sample number. if self.itemcount == 0: self.ss_word = self.samplenum # Get the bits for this item. item = 0 for i in range(8): item |= datapins[i] << i item = item ^ 0xff # Invert data byte. self.items.append(item) self.itemcount += 1 if datapins[14] == 0: item2 = True if datapins[8] == 0: item3 = True if self.first: # Save the start sample and item for later (no output yet). self.ss_item = self.samplenum self.first = False self.saved_item = item self.saved_ATN = item2 self.saved_EOI = item3 else: # Output the saved item. dbyte = self.saved_item dATN = self.saved_ATN dEOI = self.saved_EOI self.es_item = self.samplenum self.putb([0, ['%02X' % self.saved_item]]) # Encode item byte to GPIB convention. self.strgpib = ' ' if dATN: # ATN, decode commands. if dbyte == 0x01: self.strgpib = 'GTL' if dbyte == 0x04: self.strgpib = 'SDC' if dbyte == 0x05: self.strgpib = 'PPC' if dbyte == 0x08: self.strgpib = 'GET' if dbyte == 0x09: self.strgpib = 'TCT' if dbyte == 0x11: self.strgpib = 'LLO' if dbyte == 0x14: self.strgpib = 'DCL' if dbyte == 0x15: self.strgpib = 'PPU' if dbyte == 0x18: self.strgpib = 'SPE' if dbyte == 0x19: self.strgpib = 'SPD' if dbyte == 0x3f: self.strgpib = 'UNL' if dbyte == 0x5f: self.strgpib = 'UNT' if dbyte > 0x1f and dbyte < 0x3f: # Address Listener. self.strgpib = 'L' + chr(dbyte + 0x10) if dbyte > 0x3f and dbyte < 0x5f: # Address Talker self.strgpib = 'T' + chr(dbyte - 0x10) else: if dbyte > 0x1f and dbyte < 0x7f: self.strgpib = chr(dbyte) if dbyte == 0x0a: self.strgpib = 'LF' if dbyte == 0x0d: self.strgpib = 'CR' self.putb([1, [self.strgpib]]) self.strEOI = ' ' if dEOI: self.strEOI = 'EOI' self.putb([2, [self.strEOI]]) self.ss_item = self.samplenum self.saved_item = item self.saved_ATN = item2 self.saved_EOI = item3 if self.itemcount < 16: return self.itemcount, self.items = 0, [] def decode(self): # Inspect samples at falling edge of DAV. But make sure to also # start inspection when the capture happens to start with low # DAV level. Optionally enforce processing when a user specified # sample number was reached. waitcond = [{9: 'l'}] lsn = self.options['sample_total'] if lsn: waitcond.append({'skip': lsn}) while True: if lsn: waitcond[1]['skip'] = lsn - self.samplenum - 1 pins = self.wait(waitcond) self.handle_bits(pins) waitcond[0][9] = 'f' libsigrokdecode-0.5.0/decoders/gpib/__init__.py0000644000175000017500000000153713117367246016430 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Rudolf Reuter ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder can decode the GPIB (IEEE-488) protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/mlx90614/0000755000175000017500000000000013117367246014654 500000000000000libsigrokdecode-0.5.0/decoders/mlx90614/pd.py0000644000175000017500000000476313117367246015563 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'mlx90614' name = 'MLX90614' longname = 'Melexis MLX90614' desc = 'Infrared Thermometer protocol.' license = 'gplv2+' inputs = ['i2c'] outputs = ['mlx90614'] annotations = ( ('celsius', 'Temperature in degrees Celsius'), ('kelvin', 'Temperature in Kelvin'), ) def __init__(self): self.state = 'IGNORE START REPEAT' self.data = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) # Quick hack implementation! This needs to be improved a lot! def decode(self, ss, es, data): cmd, databyte = data # State machine. if self.state == 'IGNORE START REPEAT': if cmd != 'START REPEAT': return self.state = 'IGNORE ADDRESS WRITE' elif self.state == 'IGNORE ADDRESS WRITE': if cmd != 'ADDRESS WRITE': return self.state = 'GET TEMPERATURE' elif self.state == 'GET TEMPERATURE': if cmd != 'DATA WRITE': return if len(self.data) == 0: self.data.append(databyte) self.ss = ss elif len(self.data) == 1: self.data.append(databyte) self.es = es else: kelvin = (self.data[0] | (self.data[1] << 8)) * 0.02 celsius = kelvin - 273.15 self.putx([0, ['Temperature: %3.2f °C' % celsius]]) self.putx([1, ['Temperature: %3.2f K' % kelvin]]) self.state = 'IGNORE START REPEAT' self.data = [] libsigrokdecode-0.5.0/decoders/mlx90614/__init__.py0000644000175000017500000000161213117367246016705 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the Melexis MLX90614 infrared thermometer protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/max7219/0000755000175000017500000000000013117367246014560 500000000000000libsigrokdecode-0.5.0/decoders/max7219/pd.py0000644000175000017500000000710513117367246015460 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Paul Evans ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import re import sigrokdecode as srd def _decode_intensity(val): intensity = val & 0x0f if intensity == 0: return 'min' elif intensity == 15: return 'max' else: return intensity registers = { 0x00: ['No-op', lambda _: ''], 0x09: ['Decode', lambda v: '0b{:08b}'.format(v)], 0x0A: ['Intensity', _decode_intensity], 0x0B: ['Scan limit', lambda v: 1 + v], 0x0C: ['Shutdown', lambda v: 'off' if v else 'on'], 0x0F: ['Display test', lambda v: 'on' if v else 'off'] } ann_reg, ann_digit, ann_warning = range(3) class Decoder(srd.Decoder): api_version = 2 id = 'max7219' name = 'MAX7219' longname = 'Maxim MAX7219/MAX7221' desc = '8-digit LED display driver.' license = 'gplv2+' inputs = ['spi'] outputs = ['max7219'] annotations = ( ('register', 'Registers written to the device'), ('digit', 'Digits displayed on the device'), ('warnings', 'Human-readable warnings'), ) annotation_rows = ( ('commands', 'Commands', (ann_reg, ann_digit)), ('warnings', 'Warnings', (ann_warning,)), ) def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.pos = 0 self.cs_start = 0 def putreg(self, ss, es, reg, value): self.put(ss, es, self.out_ann, [ann_reg, ['%s: %s' % (reg, value)]]) def putdigit(self, ss, es, digit, value): self.put(ss, es, self.out_ann, [ann_digit, ['Digit %d: %02X' % (digit, value)]]) def putwarn(self, ss, es, message): self.put(ss, es, self.out_ann, [ann_warning, [message]]) def decode(self, ss, es, data): ptype, mosi, _ = data if ptype == 'DATA': if not self.cs_asserted: return if self.pos == 0: self.addr = mosi self.addr_start = ss elif self.pos == 1: if self.addr >= 1 and self.addr <= 8: self.putdigit(self.addr_start, es, self.addr, mosi) elif self.addr in registers: name, decoder = registers[self.addr] self.putreg(self.addr_start, es, name, decoder(mosi)) else: self.putwarn(self.addr_start, es, 'Unknown register %02X' % (self.addr)) self.pos += 1 elif ptype == 'CS-CHANGE': self.cs_asserted = mosi if self.cs_asserted: self.pos = 0 self.cs_start = ss else: if self.pos == 1: # Don't warn if pos=0 so that CS# glitches don't appear # as spurious warnings. self.putwarn(self.cs_start, es, 'Short write') elif self.pos > 2: self.putwarn(self.cs_start, es, 'Overlong write') libsigrokdecode-0.5.0/decoders/max7219/__init__.py0000644000175000017500000000162313117367246016613 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Paul Evans ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the Maxim MAX7219 and MAX7221 LED matrix driver protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/mdio/0000755000175000017500000000000013117367246014400 500000000000000libsigrokdecode-0.5.0/decoders/mdio/pd.py0000644000175000017500000003075213117367246015304 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Elias Oenal ## All rights reserved. ## ## Redistribution and use in source and binary forms, with or without ## modification, are permitted provided that the following conditions are met: ## ## 1. Redistributions of source code must retain the above copyright notice, ## this list of conditions and the following disclaimer. ## 2. Redistributions in binary form must reproduce the above copyright notice, ## this list of conditions and the following disclaimer in the documentation ## and/or other materials provided with the distribution. ## ## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ## AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ## ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE ## LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ## CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ## SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ## INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ## ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ## POSSIBILITY OF SUCH DAMAGE. ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 3 id = 'mdio' name = 'MDIO' longname = 'Management Data Input/Output' desc = 'Half-duplex sync serial bus for MII management between MAC and PHY.' license = 'bsd' inputs = ['logic'] outputs = ['mdio'] channels = ( {'id': 'mdc', 'name': 'MDC', 'desc': 'Clock'}, {'id': 'mdio', 'name': 'MDIO', 'desc': 'Data'}, ) options = ( {'id': 'show_debug_bits', 'desc': 'Show debug bits', 'default': 'no', 'values': ('yes', 'no')}, ) annotations = ( ('bit-val', 'Bit value'), ('bit-num', 'Bit number'), ('frame', 'Frame'), ('frame-idle', 'Bus idle state'), ('frame-error', 'Frame error'), ('decode', 'Decode'), ) annotation_rows = ( ('bit-val', 'Bit value', (0,)), ('bit-num', 'Bit number', (1,)), ('frame', 'Frame', (2, 3)), ('frame-error', 'Frame error', (4,)), ('decode', 'Decode', (5,)), ) def __init__(self): self.illegal_bus = 0 self.samplenum = -1 self.clause45_addr = -1 # Clause 45 is context sensitive. self.reset_decoder_state() def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def putbit(self, mdio, ss, es): self.put(ss, es, self.out_ann, [0, ['%d' % mdio]]) if self.options['show_debug_bits'] == 'yes': self.put(ss, es, self.out_ann, [1, ['%d' % (self.bitcount - 1), '%d' % ((self.bitcount - 1) % 10)]]) def putff(self, data): self.put(self.ss_frame_field, self.samplenum, self.out_ann, data) def putdata(self): self.put(self.ss_frame_field, self.mdiobits[0][2], self.out_ann, [2, ['DATA: %04X' % self.data, 'DATA', 'D']]) if self.clause45 and self.opcode == 0: self.clause45_addr = self.data # Decode data. if self.opcode > 0 or not self.clause45: decoded_min = '' if self.clause45 and self.clause45_addr != -1: decoded_min += str.format('ADDR: %04X ' % self.clause45_addr) elif self.clause45: decoded_min += str.format('ADDR: UKWN ' % self.clause45_addr) if self.clause45 and self.opcode > 1 \ or (not self.clause45 and self.opcode): decoded_min += str.format('READ: %04X' % self.data) is_read = 1 else: decoded_min += str.format('WRITE: %04X' % self.data) is_read = 0 decoded_ext = str.format(' %s: %02d' % \ ('PRTAD' if self.clause45 else 'PHYAD', self.portad)) decoded_ext += str.format(' %s: %02d' % \ ('DEVAD' if self.clause45 else 'REGAD', self.devad)) if self.ta_invalid or self.op_invalid: decoded_ext += ' ERROR' self.put(self.ss_frame, self.mdiobits[0][2], self.out_ann, [5, [decoded_min + decoded_ext, decoded_min]]) self.put(self.ss_frame, self.mdiobits[0][2], self.out_python, [(bool(self.clause45), int(self.clause45_addr), \ bool(is_read), int(self.portad), int(self.devad), \ int(self.data))]) # Post read increment address. if self.clause45 and self.opcode == 2 and self.clause45_addr != -1: self.clause45_addr += 1 def reset_decoder_state(self): self.mdiobits = [] self.bitcount = -1 self.opcode = -1 self.clause45 = 0 self.ss_frame = -1 self.ss_frame_field = -1 self.preamble_len = 0 self.ta_invalid = -1 self.op_invalid = '' self.portad = -1 self.portad_bits = 5 self.devad = -1 self.devad_bits = 5 self.data = -1 self.data_bits = 16 self.state = 'PRE' def state_PRE(self, mdio): if self.illegal_bus: if mdio == 0: # Stay in illegal bus state. return else: # Leave and continue parsing. self.illegal_bus = 0 self.put(self.ss_illegal, self.samplenum, self.out_ann, [4, ['ILLEGAL BUS STATE', 'ILL']]) self.ss_frame = self.samplenum if self.ss_frame == -1: self.ss_frame = self.samplenum if mdio == 1: self.preamble_len += 1 # Valid MDIO can't clock more than 16 succeeding ones without being # in either IDLE or PRE. if self.preamble_len > 16: if self.preamble_len >= 10000 + 32: self.put(self.ss_frame, self.mdiobits[32][1], self.out_ann, [3, ['IDLE #%d' % (self.preamble_len - 32), 'IDLE', 'I']]) self.ss_frame = self.mdiobits[32][1] self.preamble_len = 32 # This is getting out of hand, free some memory. del self.mdiobits[33:-1] if mdio == 0: if self.preamble_len < 32: self.ss_frame = self.mdiobits[self.preamble_len][1] self.put(self.ss_frame, self.samplenum, self.out_ann, [4, ['SHORT PREAMBLE', 'SHRT PRE']]) elif self.preamble_len > 32: self.ss_frame = self.mdiobits[32][1] self.put(self.mdiobits[self.preamble_len][1], self.mdiobits[32][1], self.out_ann, [3, ['IDLE #%d' % (self.preamble_len - 32), 'IDLE', 'I']]) self.preamble_len = 32 else: self.ss_frame = self.mdiobits[32][1] self.put(self.ss_frame, self.samplenum, self.out_ann, [2, ['PRE #%d' % self.preamble_len, 'PRE', 'P']]) self.ss_frame_field = self.samplenum self.state = 'ST' elif mdio == 0: self.ss_illegal = self.ss_frame self.illegal_bus = 1 def state_ST(self, mdio): if mdio == 0: self.clause45 = 1 self.state = 'OP' def state_OP(self, mdio): if self.opcode == -1: if self.clause45: st = ['ST (Clause 45)', 'ST 45'] else: st = ['ST (Clause 22)', 'ST 22'] self.putff([2, st + ['ST', 'S']]) self.ss_frame_field = self.samplenum if mdio: self.opcode = 2 else: self.opcode = 0 else: if self.clause45: self.state = 'PRTAD' self.opcode += mdio else: if mdio == self.opcode: self.op_invalid = 'invalid for Clause 22' self.state = 'PRTAD' def state_PRTAD(self, mdio): if self.portad == -1: self.portad = 0 if self.clause45: if self.opcode == 0: op = ['OP: ADDR', 'OP: A'] elif self.opcode == 1: op = ['OP: WRITE', 'OP: W'] elif self.opcode == 2: op = ['OP: READINC', 'OP: RI'] elif self.opcode == 3: op = ['OP: READ', 'OP: R'] else: op = ['OP: READ', 'OP: R'] if self.opcode else ['OP: WRITE', 'OP: W'] self.putff([2, op + ['OP', 'O']]) if self.op_invalid: self.putff([4, ['OP %s' % self.op_invalid, 'OP', 'O']]) self.ss_frame_field = self.samplenum self.portad_bits -= 1 self.portad |= mdio << self.portad_bits if not self.portad_bits: self.state = 'DEVAD' def state_DEVAD(self, mdio): if self.devad == -1: self.devad = 0 if self.clause45: prtad = ['PRTAD: %02d' % self.portad, 'PRT', 'P'] else: prtad = ['PHYAD: %02d' % self.portad, 'PHY', 'P'] self.putff([2, prtad]) self.ss_frame_field = self.samplenum self.devad_bits -= 1 self.devad |= mdio << self.devad_bits if not self.devad_bits: self.state = 'TA' def state_TA(self, mdio): if self.ta_invalid == -1: self.ta_invalid = '' if self.clause45: regad = ['DEVAD: %02d' % self.devad, 'DEV', 'D'] else: regad = ['REGAD: %02d' % self.devad, 'REG', 'R'] self.putff([2, regad]) self.ss_frame_field = self.samplenum if mdio != 1 and ((self.clause45 and self.opcode < 2) or (not self.clause45 and self.opcode == 0)): self.ta_invalid = ' invalid (bit1)' else: if mdio != 0: if self.ta_invalid: self.ta_invalid = ' invalid (bit1 and bit2)' else: self.ta_invalid = ' invalid (bit2)' self.state = 'DATA' def state_DATA(self, mdio): if self.data == -1: self.data = 0 self.putff([2, ['TURNAROUND', 'TA', 'T']]) if self.ta_invalid: self.putff([4, ['TURNAROUND%s' % self.ta_invalid, 'TA%s' % self.ta_invalid, 'TA', 'T']]) self.ss_frame_field = self.samplenum self.data_bits -= 1 self.data |= mdio << self.data_bits if not self.data_bits: # Output final bit. self.mdiobits[0][2] = self.mdiobits[0][1] + self.quartile_cycle_length() self.bitcount += 1 self.putbit(self.mdiobits[0][0], self.mdiobits[0][1], self.mdiobits[0][2]) self.putdata() self.reset_decoder_state() def process_state(self, argument, mdio): method_name = 'state_' + str(argument) method = getattr(self, method_name) return method(mdio) # Returns the first quartile point of the frames cycle lengths. This is a # conservative guess for the end of the last cycle. On average it will be # more likely to fall short, than being too long, which makes for better # readability in GUIs. def quartile_cycle_length(self): # 48 is the minimum number of samples we have to have at the end of a # frame. The last sample only has a leading clock edge and is ignored. bitlen = [] for i in range(1, 49): bitlen.append(self.mdiobits[i][2] - self.mdiobits[i][1]) bitlen = sorted(bitlen) return bitlen[12] def handle_bit(self, mdio): self.bitcount += 1 self.mdiobits.insert(0, [mdio, self.samplenum, -1]) if self.bitcount > 0: self.mdiobits[1][2] = self.samplenum # Note end of last cycle. # Output the last bit we processed. self.putbit(self.mdiobits[1][0], self.mdiobits[1][1], self.mdiobits[1][2]) self.process_state(self.state, mdio) def decode(self): while True: # Process pin state upon rising MDC edge. pins = self.wait({0: 'r'}) self.handle_bit(pins[1]) libsigrokdecode-0.5.0/decoders/mdio/__init__.py0000644000175000017500000000337313117367246016437 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Elias Oenal ## All rights reserved. ## ## Redistribution and use in source and binary forms, with or without ## modification, are permitted provided that the following conditions are met: ## ## 1. Redistributions of source code must retain the above copyright notice, ## this list of conditions and the following disclaimer. ## 2. Redistributions in binary form must reproduce the above copyright notice, ## this list of conditions and the following disclaimer in the documentation ## and/or other materials provided with the distribution. ## ## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ## AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ## ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE ## LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ## CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ## SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ## INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ## ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ## POSSIBILITY OF SUCH DAMAGE. ## ''' The MDIO (Management Data Input/Output) protocol decoder supports the MII Management serial bus (a bidirectional bus between the PHY and the STA), with a clock line (MDC) and a bi-directional data line (MDIO). MDIO is also known as SMI (Serial Management Interface). It's part of the Ethernet standard. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/lpc/0000755000175000017500000000000013117367246014226 500000000000000libsigrokdecode-0.5.0/decoders/lpc/pd.py0000644000175000017500000003144113117367246015126 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # ... fields = { # START field (indicates start or stop of a transaction) 'START': { 0b0000: 'Start of cycle for a target', 0b0001: 'Reserved', 0b0010: 'Grant for bus master 0', 0b0011: 'Grant for bus master 1', 0b0100: 'Reserved', 0b0101: 'Reserved', 0b0110: 'Reserved', 0b0111: 'Reserved', 0b1000: 'Reserved', 0b1001: 'Reserved', 0b1010: 'Reserved', 0b1011: 'Reserved', 0b1100: 'Reserved', 0b1101: 'Start of cycle for a Firmware Memory Read cycle', 0b1110: 'Start of cycle for a Firmware Memory Write cycle', 0b1111: 'Stop/abort (end of a cycle for a target)', }, # Cycle type / direction field # Bit 0 (LAD[0]) is unused, should always be 0. # Neither host nor peripheral are allowed to drive 0b11x0. 'CT_DR': { 0b0000: 'I/O read', 0b0010: 'I/O write', 0b0100: 'Memory read', 0b0110: 'Memory write', 0b1000: 'DMA read', 0b1010: 'DMA write', 0b1100: 'Reserved / not allowed', 0b1110: 'Reserved / not allowed', }, # SIZE field (determines how many bytes are to be transferred) # Bits[3:2] are reserved, must be driven to 0b00. # Neither host nor peripheral are allowed to drive 0b0010. 'SIZE': { 0b0000: '8 bits (1 byte)', 0b0001: '16 bits (2 bytes)', 0b0010: 'Reserved / not allowed', 0b0011: '32 bits (4 bytes)', }, # CHANNEL field (bits[2:0] contain the DMA channel number) 'CHANNEL': { 0b0000: '0', 0b0001: '1', 0b0010: '2', 0b0011: '3', 0b0100: '4', 0b0101: '5', 0b0110: '6', 0b0111: '7', }, # SYNC field (used to add wait states) 'SYNC': { 0b0000: 'Ready', 0b0001: 'Reserved', 0b0010: 'Reserved', 0b0011: 'Reserved', 0b0100: 'Reserved', 0b0101: 'Short wait', 0b0110: 'Long wait', 0b0111: 'Reserved', 0b1000: 'Reserved', 0b1001: 'Ready more (DMA only)', 0b1010: 'Error', 0b1011: 'Reserved', 0b1100: 'Reserved', 0b1101: 'Reserved', 0b1110: 'Reserved', 0b1111: 'Reserved', }, } class Decoder(srd.Decoder): api_version = 2 id = 'lpc' name = 'LPC' longname = 'Low-Pin-Count' desc = 'Protocol for low-bandwidth devices on PC mainboards.' license = 'gplv2+' inputs = ['logic'] outputs = ['lpc'] channels = ( {'id': 'lframe', 'name': 'LFRAME#', 'desc': 'Frame'}, {'id': 'lclk', 'name': 'LCLK', 'desc': 'Clock'}, {'id': 'lad0', 'name': 'LAD[0]', 'desc': 'Addr/control/data 0'}, {'id': 'lad1', 'name': 'LAD[1]', 'desc': 'Addr/control/data 1'}, {'id': 'lad2', 'name': 'LAD[2]', 'desc': 'Addr/control/data 2'}, {'id': 'lad3', 'name': 'LAD[3]', 'desc': 'Addr/control/data 3'}, ) optional_channels = ( {'id': 'lreset', 'name': 'LRESET#', 'desc': 'Reset'}, {'id': 'ldrq', 'name': 'LDRQ#', 'desc': 'Encoded DMA / bus master request'}, {'id': 'serirq', 'name': 'SERIRQ', 'desc': 'Serialized IRQ'}, {'id': 'clkrun', 'name': 'CLKRUN#', 'desc': 'Clock run'}, {'id': 'lpme', 'name': 'LPME#', 'desc': 'LPC power management event'}, {'id': 'lpcpd', 'name': 'LPCPD#', 'desc': 'Power down'}, {'id': 'lsmi', 'name': 'LSMI#', 'desc': 'System Management Interrupt'}, ) annotations = ( ('warnings', 'Warnings'), ('start', 'Start'), ('cycle-type', 'Cycle-type/direction'), ('addr', 'Address'), ('tar1', 'Turn-around cycle 1'), ('sync', 'Sync'), ('data', 'Data'), ('tar2', 'Turn-around cycle 2'), ) annotation_rows = ( ('data', 'Data', (1, 2, 3, 4, 5, 6, 7)), ('warnings', 'Warnings', (0,)), ) def __init__(self): self.state = 'IDLE' self.oldlclk = -1 self.samplenum = 0 self.clocknum = 0 self.lad = -1 self.addr = 0 self.cur_nibble = 0 self.cycle_type = -1 self.databyte = 0 self.tarcount = 0 self.synccount = 0 self.oldpins = None self.ss_block = self.es_block = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putb(self, data): self.put(self.ss_block, self.es_block, self.out_ann, data) def handle_get_start(self, lad, lad_bits, lframe): # LAD[3:0]: START field (1 clock cycle). # The last value of LAD[3:0] before LFRAME# gets de-asserted is what # the peripherals must use. However, the host can keep LFRAME# asserted # multiple clocks, and we output all START fields that occur, even # though the peripherals are supposed to ignore all but the last one. self.es_block = self.samplenum self.putb([1, [fields['START'][lad], 'START', 'St', 'S']]) self.ss_block = self.samplenum # Output a warning if LAD[3:0] changes while LFRAME# is low. # TODO if (self.lad != -1 and self.lad != lad): self.putb([0, ['LAD[3:0] changed while LFRAME# was asserted']]) # LFRAME# is asserted (low). Wait until it gets de-asserted again # (the host is allowed to keep it asserted multiple clocks). if lframe != 1: return self.start_field = self.lad self.state = 'GET CT/DR' def handle_get_ct_dr(self, lad, lad_bits): # LAD[3:0]: Cycle type / direction field (1 clock cycle). self.cycle_type = fields['CT_DR'][lad] # TODO: Warning/error on invalid cycle types. if self.cycle_type == 'Reserved': self.putb([0, ['Invalid cycle type (%s)' % lad_bits]]) self.es_block = self.samplenum self.putb([2, ['Cycle type: %s' % self.cycle_type]]) self.ss_block = self.samplenum self.state = 'GET ADDR' self.addr = 0 self.cur_nibble = 0 def handle_get_addr(self, lad, lad_bits): # LAD[3:0]: ADDR field (4/8/0 clock cycles). # I/O cycles: 4 ADDR clocks. Memory cycles: 8 ADDR clocks. # DMA cycles: no ADDR clocks at all. if self.cycle_type in ('I/O read', 'I/O write'): addr_nibbles = 4 # Address is 16bits. elif self.cycle_type in ('Memory read', 'Memory write'): addr_nibbles = 8 # Address is 32bits. else: addr_nibbles = 0 # TODO: How to handle later on? # Addresses are driven MSN-first. offset = ((addr_nibbles - 1) - self.cur_nibble) * 4 self.addr |= (lad << offset) # Continue if we haven't seen all ADDR cycles, yet. if (self.cur_nibble < addr_nibbles - 1): self.cur_nibble += 1 return self.es_block = self.samplenum s = 'Address: 0x%%0%dx' % addr_nibbles self.putb([3, [s % self.addr]]) self.ss_block = self.samplenum self.state = 'GET TAR' self.tar_count = 0 def handle_get_tar(self, lad, lad_bits): # LAD[3:0]: First TAR (turn-around) field (2 clock cycles). self.es_block = self.samplenum self.putb([4, ['TAR, cycle %d: %s' % (self.tarcount, lad_bits)]]) self.ss_block = self.samplenum # On the first TAR clock cycle LAD[3:0] is driven to 1111 by # either the host or peripheral. On the second clock cycle, # the host or peripheral tri-states LAD[3:0], but its value # should still be 1111, due to pull-ups on the LAD lines. if lad_bits != '1111': self.putb([0, ['TAR, cycle %d: %s (expected 1111)' % \ (self.tarcount, lad_bits)]]) if (self.tarcount != 1): self.tarcount += 1 return self.tarcount = 0 self.state = 'GET SYNC' def handle_get_sync(self, lad, lad_bits): # LAD[3:0]: SYNC field (1-n clock cycles). self.sync_val = lad_bits self.cycle_type = fields['SYNC'][lad] # TODO: Warnings if reserved value are seen? if self.cycle_type == 'Reserved': self.putb([0, ['SYNC, cycle %d: %s (reserved value)' % \ (self.synccount, self.sync_val)]]) self.es_block = self.samplenum self.putb([5, ['SYNC, cycle %d: %s' % (self.synccount, self.sync_val)]]) self.ss_block = self.samplenum # TODO self.cycle_count = 0 self.state = 'GET DATA' def handle_get_data(self, lad, lad_bits): # LAD[3:0]: DATA field (2 clock cycles). # Data is driven LSN-first. if (self.cycle_count == 0): self.databyte = lad elif (self.cycle_count == 1): self.databyte |= (lad << 4) else: raise Exception('Invalid cycle_count: %d' % self.cycle_count) if (self.cycle_count != 1): self.cycle_count += 1 return self.es_block = self.samplenum self.putb([6, ['DATA: 0x%02x' % self.databyte]]) self.ss_block = self.samplenum self.cycle_count = 0 self.state = 'GET TAR2' def handle_get_tar2(self, lad, lad_bits): # LAD[3:0]: Second TAR field (2 clock cycles). self.es_block = self.samplenum self.putb([7, ['TAR, cycle %d: %s' % (self.tarcount, lad_bits)]]) self.ss_block = self.samplenum # On the first TAR clock cycle LAD[3:0] is driven to 1111 by # either the host or peripheral. On the second clock cycle, # the host or peripheral tri-states LAD[3:0], but its value # should still be 1111, due to pull-ups on the LAD lines. if lad_bits != '1111': self.putb([0, ['Warning: TAR, cycle %d: %s (expected 1111)' % (self.tarcount, lad_bits)]]) if (self.tarcount != 1): self.tarcount += 1 return self.tarcount = 0 self.state = 'IDLE' def decode(self, ss, es, data): for (self.samplenum, pins) in data: # If none of the pins changed, there's nothing to do. if self.oldpins == pins: continue # Store current pin values for the next round. self.oldpins = pins # Get individual pin values into local variables. (lframe, lclk, lad0, lad1, lad2, lad3) = pins[:6] (lreset, ldrq, serirq, clkrun, lpme, lpcpd, lsmi) = pins[6:] # Only look at the signals upon rising LCLK edges. The LPC clock # is the same as the PCI clock (which is sampled at rising edges). if not (self.oldlclk == 0 and lclk == 1): self.oldlclk = lclk continue # Store LAD[3:0] bit values (one nibble) in local variables. # Most (but not all) states need this. if self.state != 'IDLE': lad = (lad3 << 3) | (lad2 << 2) | (lad1 << 1) | lad0 lad_bits = bin(lad)[2:].zfill(4) # self.putb([0, ['LAD: %s' % lad_bits]]) # TODO: Only memory read/write is currently supported/tested. # State machine if self.state == 'IDLE': # A valid LPC cycle starts with LFRAME# being asserted (low). if lframe != 0: continue self.ss_block = self.samplenum self.state = 'GET START' self.lad = -1 # self.clocknum = 0 elif self.state == 'GET START': self.handle_get_start(lad, lad_bits, lframe) elif self.state == 'GET CT/DR': self.handle_get_ct_dr(lad, lad_bits) elif self.state == 'GET ADDR': self.handle_get_addr(lad, lad_bits) elif self.state == 'GET TAR': self.handle_get_tar(lad, lad_bits) elif self.state == 'GET SYNC': self.handle_get_sync(lad, lad_bits) elif self.state == 'GET DATA': self.handle_get_data(lad, lad_bits) elif self.state == 'GET TAR2': self.handle_get_tar2(lad, lad_bits) libsigrokdecode-0.5.0/decoders/lpc/__init__.py0000644000175000017500000000165513117367246016266 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' LPC (Low-Pin Count) is a protocol for low-bandwidth devices used on some PC mainboards, such as the "BIOS chip" or the so-called "Super I/O". ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/rfm12/0000755000175000017500000000000013117367246014377 500000000000000libsigrokdecode-0.5.0/decoders/rfm12/pd.py0000644000175000017500000004362313117367246015304 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Sławek Piotrowski ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'rfm12' name = 'RFM12' longname = 'RFM12 control protocol' desc = 'HopeRF RFM12 wireless transceiver control protocol.' license = 'gplv2+' inputs = ['spi'] outputs = ['rfm12'] annotations = ( ('cmd', 'Command'), ('params', 'Command parameters'), ('disabled', 'Disabled bits'), ('return', 'Returned values'), ('disabled_return', 'Disabled returned values'), ('interpretation', 'Interpretation'), ) annotation_rows = ( ('commands', 'Commands', (0, 1, 2)), ('return', 'Return', (3, 4)), ('interpretation', 'Interpretation', (5,)), ) def __init__(self): self.mosi_bytes, self.miso_bytes = [], [] self.mosi_bits, self.miso_bits = [], [] self.row_pos = [0, 0, 0] self.ann_to_row = [0, 0, 0, 1, 1, 2] # Initialize with Power-On-Reset values. self.last_status = [0x00, 0x00] self.last_config = 0x08 self.last_power = 0x08 self.last_freq = 0x680 self.last_data_rate = 0x23 self.last_fifo_and_reset = 0x80 self.last_afc = 0xF7 self.last_transceiver = 0x00 self.last_pll = 0x77 def advance_ann(self, ann, length): row = self.ann_to_row[ann] self.row_pos[row] += length def putx(self, ann, length, description): if not isinstance(description, list): description = [description] row = self.ann_to_row[ann] bit = self.row_pos[row] self.put(self.mosi_bits[bit][1], self.mosi_bits[bit + length - 1][2], self.out_ann, [ann, description]) bit += length self.row_pos[row] = bit def describe_bits(self, data, names): i = 0x01 << len(names) - 1 bit = 0 while i != 0: if names[bit] != '': self.putx(1 if (data & i) else 2, 1, names[bit]) i >>= 1 bit += 1 def describe_return_bits(self, data, names): i = 0x01 << len(names) - 1 bit = 0 while i != 0: if names[bit] != '': self.putx(3 if (data & i) else 4, 1, names[bit]) else: self.advance_ann(3, 1) i >>= 1 bit += 1 def describe_changed_bits(self, data, old_data, names): changes = data ^ old_data i = 0x01 << (len(names) - 1) bit = 0 while i != 0: if names[bit] != '' and changes & i: s = ['+', 'Turning on'] if (data & i) else ['-', 'Turning off'] self.putx(5, 1, s) else: self.advance_ann(5, 1) i >>= 1 bit += 1 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def handle_configuration_cmd(self, cmd, ret): self.putx(0, 8, ['Configuration command', 'Configuration']) NAMES = [['Internal data register', 'el'], ['FIFO mode', 'ef']] bits = (cmd[1] & 0xC0) >> 6 old_bits = (self.last_config & 0xC0) >> 6 self.describe_bits(bits, NAMES) self.describe_changed_bits(bits, old_bits, NAMES) FREQUENCIES = ['315', '433', '868', '915'] f = FREQUENCIES[(cmd[1] & 0x30) >> 4] + 'MHz' self.putx(1, 2, ['Frequency: ' + f, f]) if cmd[1] & 0x30 != self.last_config & 0x30: self.putx(5, 2, ['Changed', '~']) c = '%.1fpF' % (8.5 + (cmd[1] & 0xF) * 0.5) self.putx(1, 4, ['Capacitance: ' + c, c]) if cmd[1] & 0xF != self.last_config & 0xF: self.putx(5, 4, ['Changed', '~']) self.last_config = cmd[1] def handle_power_management_cmd(self, cmd, ret): self.putx(0, 8, ['Power management', 'Power']) NAMES = [['Receiver chain', 'er'], ['Baseband circuit', 'ebb'], ['Transmission', 'et'], ['Synthesizer', 'es'], ['Crystal oscillator', 'ex'], ['Low battery detector', 'eb'], ['Wake-up timer', 'ew'], ['Clock output off switch', 'dc']] self.describe_bits(cmd[1], NAMES) power = cmd[1] # Some bits imply other, even if they are set to 0. if power & 0x80: power |= 0x58 if power & 0x20: power |= 0x18 self.describe_changed_bits(power, self.last_power, NAMES) self.last_power = power def handle_frequency_setting_cmd(self, cmd, ret): self.putx(0, 4, ['Frequency setting', 'Frequency']) f = ((cmd[1] & 0xF) << 8) + cmd[2] self.putx(0, 12, ['F = %3.4f' % f]) self.row_pos[2] -= 4 if self.last_freq != f: self.putx(5, 12, ['Changing', '~']) self.last_freq = f def handle_data_rate_cmd(self, cmd, ret): self.putx(0, 8, ['Data rate command', 'Data rate']) r = cmd[1] & 0x7F cs = (cmd[1] & 0x80) >> 7 rate = 10000 / 29.0 / (r + 1) / (1 + 7 * cs) self.putx(0, 8, ['%3.1fkbps' % rate]) if self.last_data_rate != cmd[1]: self.putx(5, 8, ['Changing', '~']) self.last_data_rate = cmd[1] def handle_receiver_control_cmd(self, cmd, ret): self.putx(0, 5, ['Receiver control command']) s = 'interrupt input' if (cmd[0] & 0x04) else 'VDI output' self.putx(0, 1, ['pin16 = ' + s]) VDI_NAMES = ['Fast', 'Medium', 'Slow', 'Always on'] vdi_speed = VDI_NAMES[cmd[0] & 0x3] self.putx(0, 2, ['VDI: %s' % vdi_speed]) BANDWIDTH_NAMES = ['Reserved', '400kHz', '340kHz', '270kHz', '200kHz', '134kHz', '67kHz', 'Reserved'] bandwidth = BANDWIDTH_NAMES[(cmd[1] & 0xE0) >> 5] self.putx(0, 3, ['Bandwidth: %s' % bandwidth]) LNA_GAIN_NAMES = [0, -6, -14, -20] lna_gain = LNA_GAIN_NAMES[(cmd[1] & 0x18) >> 3] self.putx(0, 2, ['LNA gain: %ddB' % lna_gain]) RSSI_THRESHOLD_NAMES = ['-103', '-97', '-91', '-85', '-79', '-73', 'Reserved', 'Reserved'] rssi_threshold = RSSI_THRESHOLD_NAMES[cmd[1] & 0x7] self.putx(0, 3, ['RSSI threshold: %s' % rssi_threshold]) def handle_data_filter_cmd(self, cmd, ret): self.putx(0, 8, ['Data filter command']) if cmd[1] & 0x80: clock_recovery = 'auto' elif cmd[1] & 0x40: clock_recovery = 'fast' else: clock_recovery = 'slow' self.putx(0, 2, ['Clock recovery: %s mode' % clock_recovery]) self.advance_ann(0, 1) # Should always be 1. s = 'analog' if (cmd[1] & 0x10) else 'digital' self.putx(0, 1, ['Data filter: ' + s]) self.advance_ann(0, 1) # Should always be 1. self.putx(0, 3, ['DQD threshold: %d' % (cmd[1] & 0x7)]) def handle_fifo_and_reset_cmd(self, cmd, ret): self.putx(0, 8, ['FIFO and reset command']) fifo_level = (cmd[1] & 0xF0) >> 4 self.putx(0, 4, ['FIFO trigger level: %d' % fifo_level]) last_fifo_level = (self.last_fifo_and_reset & 0xF0) >> 4 if fifo_level != last_fifo_level: self.putx(5, 4, ['Changing', '~']) else: self.advance_ann(5, 4) s = 'one byte' if (cmd[1] & 0x08) else 'two bytes' self.putx(0, 1, ['Synchron length: ' + s]) if (cmd[1] & 0x08) != (self.last_fifo_and_reset & 0x08): self.putx(5, 1, ['Changing', '~']) else: self.advance_ann(5, 1) if cmd[1] & 0x04: fifo_fill = 'Always' elif cmd[1] & 0x02: fifo_fill = 'After synchron pattern' else: fifo_fill = 'Never' self.putx(0, 2, ['FIFO fill: %s' % fifo_fill]) if (cmd[1] & 0x06) != (self.last_fifo_and_reset & 0x06): self.putx(5, 2, ['Changing', '~']) else: self.advance_ann(5, 2) s = 'non-sensitive' if (cmd[1] & 0x01) else 'sensitive' self.putx(0, 1, ['Reset mode: ' + s]) if (cmd[1] & 0x01) != (self.last_fifo_and_reset & 0x01): self.putx(5, 1, ['Changing', '~']) else: self.advance_ann(5, 1) self.last_fifo_and_reset = cmd[1] def handle_synchron_pattern_cmd(self, cmd, ret): self.putx(0, 8, ['Synchron pattern command']) if self.last_fifo_and_reset & 0x08: self.putx(0, 8, ['Pattern: 0x2D%02X' % pattern]) else: self.putx(0, 8, ['Pattern: %02X' % pattern]) def handle_fifo_read_cmd(self, cmd, ret): self.putx(0, 8, ['FIFO read command', 'FIFO read']) self.putx(3, 8, ['Data: %02X' % ret[1]]) def handle_afc_cmd(self, cmd, ret): self.putx(0, 8, ['AFC command']) MODES = ['Off', 'Once', 'During receiving', 'Always'] mode = (cmd[1] & 0xC0) >> 6 self.putx(0, 2, ['Mode: %s' % MODES[mode]]) if (cmd[1] & 0xC0) != (self.last_afc & 0xC0): self.putx(5, 2, ['Changing', '~']) else: self.advance_ann(5, 2) range_limit = (cmd[1] & 0x30) >> 4 FREQ_TABLE = [0.0, 2.5, 5.0, 7.5] freq_delta = FREQ_TABLE[(self.last_config & 0x30) >> 4] if range_limit == 0: self.putx(0, 2, ['Range: No limit']) elif range_limit == 1: self.putx(0, 2, ['Range: +/-%dkHz' % (15 * freq_delta)]) elif range_limit == 2: self.putx(0, 2, ['Range: +/-%dkHz' % (7 * freq_delta)]) elif range_limit == 3: self.putx(0, 2, ['Range: +/-%dkHz' % (3 * freq_delta)]) if (cmd[1] & 0x30) != (self.last_afc & 0x30): self.putx(5, 2, ['Changing', '~']) else: self.advance_ann(5, 2) NAMES = ['Strobe edge', 'High accuracy mode', 'Enable offset register', 'Enable offset calculation'] self.describe_bits(cmd[1] & 0xF, NAMES) self.describe_changed_bits(cmd[1] & 0xF, self.last_afc & 0xF, NAMES) self.last_afc = cmd[1] def handle_transceiver_control_cmd(self, cmd, ret): self.putx(0, 8, ['Transceiver control command']) self.putx(0, 4, ['FSK frequency delta: %dkHz' % (15 * ((cmd[1] & 0xF0) >> 4))]) if cmd[1] & 0xF0 != self.last_transceiver & 0xF0: self.putx(5, 4, ['Changing', '~']) else: self.advance_ann(5, 4) POWERS = [0, -2.5, -5, -7.5, -10, -12.5, -15, -17.5] self.advance_ann(0, 1) self.advance_ann(5, 1) self.putx(0,3, ['Relative power: %dB' % (cmd[1] & 0x07)]) if (cmd[1] & 0x07) != (self.last_transceiver & 0x07): self.putx(5, 3, ['Changing', '~']) else: self.advance_ann(5, 3) self.last_transceiver = cmd[1] def handle_pll_setting_cmd(self, cmd, ret): self.putx(0, 8, ['PLL setting command']) self.advance_ann(0, 1) self.putx(0, 2, ['Clock buffer rise and fall time']) self.advance_ann(0, 1) self.advance_ann(5, 4) NAMES = [['Delay in phase detector', 'dly'], ['Disable dithering', 'ddit']] self.describe_bits((cmd[1] & 0xC) >> 2, NAMES) self.describe_changed_bits((cmd[1] & 0xC) >> 2, (self.last_pll & 0xC) >> 2, NAMES) s = '256kbps, high' if (cmd[1] & 0x01) else '86.2kbps, low' self.putx(0, 1, ['Max bit rate: %s noise' % s]) self.advance_ann(5, 1) if (cmd[1] & 0x01) != (self.last_pll & 0x01): self.putx(5, 1, ['Changing', '~']) self.last_pll = cmd[1] def handle_transmitter_register_cmd(self, cmd, ret): self.putx(0, 8, ['Transmitter register command', 'Transmit']) self.putx(0, 8, ['Data: %s' % cmd[1], '%s' % cmd[1]]) def handle_software_reset_cmd(self, cmd, ret): self.putx(0, 16, ['Software reset command']) def handle_wake_up_timer_cmd(self, cmd, ret): self.putx(0, 3, ['Wake-up timer command', 'Timer']) r = cmd[0] & 0x1F m = cmd[1] time = 1.03 * m * pow(2, r) + 0.5 self.putx(0, 13, ['Time: %7.2f' % time]) def handle_low_duty_cycle_cmd(self, cmd, ret): self.putx(0, 16, ['Low duty cycle command']) def handle_low_battery_detector_cmd(self, cmd, ret): self.putx(0, 8, ['Low battery detector command']) NAMES = ['1', '1.25', '1.66', '2', '2.5', '3.33', '5', '10'] clock = NAMES[(cmd[1] & 0xE0) >> 5] self.putx(0, 3, ['Clock output: %sMHz' % clock, '%sMHz' % clock]) self.advance_ann(0, 1) v = 2.25 + (cmd[1] & 0x0F) * 0.1 self.putx(0, 4, ['Low battery voltage: %1.2fV' % v, '%1.2fV' % v]) def handle_status_read_cmd(self, cmd, ret): self.putx(0, 8, ['Status read command', 'Status']) NAMES = ['RGIT/FFIT', 'POR', 'RGUR/FFOV', 'WKUP', 'EXT', 'LBD', 'FFEM', 'RSSI/ATS', 'DQD', 'CRL', 'ATGL'] status = (ret[0] << 3) + (ret[1] >> 5) self.row_pos[1] -= 8 self.row_pos[2] -= 8 self.describe_return_bits(status, NAMES) receiver_enabled = (self.last_power & 0x80) >> 7 if ret[0] & 0x80: if receiver_enabled: s = 'Received data in FIFO' else: s = 'Transmit register ready' self.putx(5, 1, s) else: self.advance_ann(5, 1) if ret[0] & 0x40: self.putx(5, 1, 'Power on Reset') else: self.advance_ann(5, 1) if ret[0] & 0x20: if receiver_enabled: s = 'RX FIFO overflow' else: s = 'Transmit register under run' self.putx(5, 1, s) else: self.advance_ann(5, 1) if ret[0] & 0x10: self.putx(5, 1, 'Wake-up timer') else: self.advance_ann(5, 1) if ret[0] & 0x08: self.putx(5, 1, 'External interrupt') else: self.advance_ann(5, 1) if ret[0] & 0x04: self.putx(5, 1, 'Low battery') else: self.advance_ann(5, 1) if ret[0] & 0x02: self.putx(5, 1, 'FIFO is empty') else: self.advance_ann(5, 1) if ret[0] & 0x01: if receiver_enabled: s = 'Incoming signal above limit' else: s = 'Antenna detected RF signal' self.putx(5, 1, s) else: self.advance_ann(5, 1) if ret[1] & 0x80: self.putx(5, 1, 'Data quality detector') else: self.advance_ann(5, 1) if ret[1] & 0x40: self.putx(5, 1, 'Clock recovery locked') else: self.advance_ann(5, 1) self.advance_ann(5, 1) self.putx(3, 5, ['AFC offset']) if (self.last_status[1] & 0x1F) != (ret[1] & 0x1F): self.putx(5, 5, ['Changed', '~']) self.last_status = ret def handle_cmd(self, cmd, ret): if cmd[0] == 0x80: self.handle_configuration_cmd(cmd, ret) elif cmd[0] == 0x82: self.handle_power_management_cmd(cmd, ret) elif cmd[0] & 0xF0 == 0xA0: self.handle_frequency_setting_cmd(cmd, ret) elif cmd[0] == 0xC6: self.handle_data_rate_cmd(cmd, ret) elif cmd[0] & 0xF8 == 0x90: self.handle_receiver_control_cmd(cmd, ret) elif cmd[0] == 0xC2: self.handle_data_filter_cmd(cmd, ret) elif cmd[0] == 0xCA: self.handle_fifo_and_reset_cmd(cmd, ret) elif cmd[0] == 0xCE: self.handle_synchron_pattern_cmd(cmd, ret) elif cmd[0] == 0xB0: self.handle_fifo_read_cmd(cmd, ret) elif cmd[0] == 0xC4: self.handle_afc_cmd(cmd, ret) elif cmd[0] & 0xFE == 0x98: self.handle_transceiver_control_cmd(cmd, ret) elif cmd[0] == 0xCC: self.handle_pll_setting_cmd(cmd, ret) elif cmd[0] == 0xB8: self.handle_transmitter_register_cmd(cmd, ret) elif cmd[0] == 0xFE: self.handle_software_reset_cmd(cmd, ret) elif cmd[0] & 0xE0 == 0xE0: self.handle_wake_up_timer_cmd(cmd, ret) elif cmd[0] == 0xC8: self.handle_low_duty_cycle_cmd(cmd, ret) elif cmd[0] == 0xC0: self.handle_low_battery_detector_cmd(cmd, ret) elif cmd[0] == 0x00: self.handle_status_read_cmd(cmd, ret) else: c = '%02x %02x' % tuple(cmd) r = '%02x %02x' % tuple(ret) self.putx(0, 16, ['Unknown command: %s (reply: %s)!' % (c, r)]) def decode(self, ss, es, data): ptype, mosi, miso = data # For now, only use DATA and BITS packets. if ptype not in ('DATA', 'BITS'): return # Store the individual bit values and ss/es numbers. The next packet # is guaranteed to be a 'DATA' packet belonging to this 'BITS' one. if ptype == 'BITS': if mosi is not None: self.mosi_bits.extend(reversed(mosi)) if miso is not None: self.miso_bits.extend(reversed(miso)) return # Append new bytes. self.mosi_bytes.append(mosi) self.miso_bytes.append(miso) # All commands consist of 2 bytes. if len(self.mosi_bytes) < 2: return self.row_pos = [0, 8, 8] self.handle_cmd(self.mosi_bytes, self.miso_bytes) self.mosi_bytes, self.miso_bytes = [], [] self.mosi_bits, self.miso_bits = [], [] libsigrokdecode-0.5.0/decoders/rfm12/__init__.py0000644000175000017500000000162513117367246016434 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Sławek Piotrowski ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the HopeRF RFM12 wireless transceiver control protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/dmx512/0000755000175000017500000000000013117367246014470 500000000000000libsigrokdecode-0.5.0/decoders/dmx512/pd.py0000644000175000017500000001543213117367246015372 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Fabian J. Stumpf ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'dmx512' name = 'DMX512' longname = 'Digital MultipleX 512' desc = 'Professional lighting control protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['dmx512'] channels = ( {'id': 'dmx', 'name': 'DMX data', 'desc': 'Any DMX data line'}, ) annotations = ( ('bit', 'Bit'), ('break', 'Break'), ('mab', 'Mark after break'), ('startbit', 'Start bit'), ('stopbits', 'Stop bit'), ('startcode', 'Start code'), ('channel', 'Channel'), ('interframe', 'Interframe'), ('interpacket', 'Interpacket'), ('data', 'Data'), ('error', 'Error'), ) annotation_rows = ( ('name', 'Logical', (1, 2, 5, 6, 7, 8)), ('data', 'Data', (9,)), ('bits', 'Bits', (0, 3, 4)), ('errors', 'Errors', (10,)), ) def __init__(self): self.samplerate = None self.sample_usec = None self.samplenum = -1 self.run_start = -1 self.run_bit = 0 self.state = 'FIND BREAK' def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.sample_usec = 1 / value * 1000000 self.skip_per_bit = int(4 / self.sample_usec) def putr(self, data): self.put(self.run_start, self.samplenum, self.out_ann, data) def decode(self, ss, es, data): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') for (self.samplenum, pins) in data: # Seek for an interval with no state change with a length between # 88 and 1000000 us (BREAK). if self.state == 'FIND BREAK': if self.run_bit == pins[0]: continue runlen = (self.samplenum - self.run_start) * self.sample_usec if runlen > 88 and runlen < 1000000: self.putr([1, ['Break']]) self.bit_break = self.run_bit self.state = 'MARK MAB' self.channel = 0 elif runlen >= 1000000: # Error condition. self.putr([10, ['Invalid break length']]) self.run_bit = pins[0] self.run_start = self.samplenum # Directly following the BREAK is the MARK AFTER BREAK. elif self.state == 'MARK MAB': if self.run_bit == pins[0]: continue self.putr([2, ['MAB']]) self.state = 'READ BYTE' self.channel = 0 self.bit = 0 self.aggreg = pins[0] self.run_start = self.samplenum # Mark and read a single transmitted byte # (start bit, 8 data bits, 2 stop bits). elif self.state == 'READ BYTE': self.next_sample = self.run_start + (self.bit + 1) * self.skip_per_bit self.aggreg += pins[0] if self.samplenum != self.next_sample: continue bit_value = 0 if round(self.aggreg/self.skip_per_bit) == self.bit_break else 1 if self.bit == 0: self.byte = 0 self.putr([3, ['Start bit']]) if bit_value != 0: # (Possibly) invalid start bit, mark but don't fail. self.put(self.samplenum, self.samplenum, self.out_ann, [10, ['Invalid start bit']]) elif self.bit >= 9: self.put(self.samplenum - self.skip_per_bit, self.samplenum, self.out_ann, [4, ['Stop bit']]) if bit_value != 1: # Invalid stop bit, mark. self.put(self.samplenum, self.samplenum, self.out_ann, [10, ['Invalid stop bit']]) if self.bit == 10: # On invalid 2nd stop bit, search for new break. self.run_bit = pins[0] self.state = 'FIND BREAK' else: # Label and process one bit. self.put(self.samplenum - self.skip_per_bit, self.samplenum, self.out_ann, [0, [str(bit_value)]]) self.byte |= bit_value << (self.bit - 1) # Label a complete byte. if self.bit == 10: if self.channel == 0: d = [5, ['Start code']] else: d = [6, ['Channel ' + str(self.channel)]] self.put(self.run_start, self.next_sample, self.out_ann, d) self.put(self.run_start + self.skip_per_bit, self.next_sample - 2 * self.skip_per_bit, self.out_ann, [9, [str(self.byte) + ' / ' + \ str(hex(self.byte))]]) # Continue by scanning the IFT. self.channel += 1 self.run_start = self.samplenum self.run_bit = pins[0] self.state = 'MARK IFT' self.aggreg = pins[0] self.bit += 1 # Mark the INTERFRAME-TIME between bytes / INTERPACKET-TIME between packets. elif self.state == 'MARK IFT': if self.run_bit == pins[0]: continue if self.channel > 512: self.putr([8, ['Interpacket']]) self.state = 'FIND BREAK' self.run_bit = pins[0] self.run_start = self.samplenum else: self.putr([7, ['Interframe']]) self.state = 'READ BYTE' self.bit = 0 self.run_start = self.samplenum libsigrokdecode-0.5.0/decoders/dmx512/__init__.py0000644000175000017500000000162513117367246016525 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Fabian J. Stumpf ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' DMX512 (Digital MultipleX 512) is a protocol based on RS485, used to control professional lighting fixtures. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/parallel/0000755000175000017500000000000013117367246015244 500000000000000libsigrokdecode-0.5.0/decoders/parallel/pd.py0000644000175000017500000001375513117367246016154 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013-2016 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd ''' OUTPUT_PYTHON format: Packet: [, ] , - 'ITEM', [, ] - 'WORD', [, , ] : - A single item (a number). It can be of arbitrary size. The max. number of bits in this item is specified in . : - The size of an item (in bits). For a 4-bit parallel bus this is 4, for a 16-bit parallel bus this is 16, and so on. : - A single word (a number). It can be of arbitrary size. The max. number of bits in this word is specified in . The (exact) number of items in this word is specified in . : - The size of a word (in bits). For a 2-item word with 8-bit items is 16, for a 3-item word with 4-bit items is 12, and so on. : - The size of a word (in number of items). For a 4-item word (no matter how many bits each item consists of) is 4, for a 7-item word is 7, and so on. ''' def channel_list(num_channels): l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}] for i in range(num_channels): d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i} l.append(d) return tuple(l) class ChannelError(Exception): pass NUM_CHANNELS = 8 class Decoder(srd.Decoder): api_version = 3 id = 'parallel' name = 'Parallel' longname = 'Parallel sync bus' desc = 'Generic parallel synchronous bus.' license = 'gplv2+' inputs = ['logic'] outputs = ['parallel'] optional_channels = channel_list(NUM_CHANNELS) options = ( {'id': 'clock_edge', 'desc': 'Clock edge to sample on', 'default': 'rising', 'values': ('rising', 'falling')}, {'id': 'wordsize', 'desc': 'Data wordsize', 'default': 1}, {'id': 'endianness', 'desc': 'Data endianness', 'default': 'little', 'values': ('little', 'big')}, ) annotations = ( ('items', 'Items'), ('words', 'Words'), ) def __init__(self): self.items = [] self.itemcount = 0 self.saved_item = None self.ss_item = self.es_item = None self.first = True self.num_channels = 0 def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def putpb(self, data): self.put(self.ss_item, self.es_item, self.out_python, data) def putb(self, data): self.put(self.ss_item, self.es_item, self.out_ann, data) def putpw(self, data): self.put(self.ss_word, self.es_word, self.out_python, data) def putw(self, data): self.put(self.ss_word, self.es_word, self.out_ann, data) def handle_bits(self, datapins): # If this is the first item in a word, save its sample number. if self.itemcount == 0: self.ss_word = self.samplenum # Get the bits for this item. item, used_pins = 0, datapins.count(1) + datapins.count(0) for i in range(used_pins): item |= datapins[i] << i self.items.append(item) self.itemcount += 1 if self.first: # Save the start sample and item for later (no output yet). self.ss_item = self.samplenum self.first = False self.saved_item = item else: # Output the saved item (from the last CLK edge to the current). self.es_item = self.samplenum self.putpb(['ITEM', self.saved_item]) self.putb([0, ['%X' % self.saved_item]]) self.ss_item = self.samplenum self.saved_item = item endian, ws = self.options['endianness'], self.options['wordsize'] # Get as many items as the configured wordsize says. if self.itemcount < ws: return # Output annotations/python for a word (a collection of items). word = 0 for i in range(ws): if endian == 'little': word |= self.items[i] << ((ws - 1 - i) * used_pins) elif endian == 'big': word |= self.items[i] << (i * used_pins) self.es_word = self.samplenum # self.putpw(['WORD', word]) # self.putw([1, ['%X' % word]]) self.ss_word = self.samplenum self.itemcount, self.items = 0, [] def decode(self): for i in range(len(self.optional_channels)): if self.has_channel(i): self.num_channels += 1 if self.num_channels == 0: raise ChannelError('At least one channel has to be supplied.') if not self.has_channel(0): # CLK was not supplied, sample on ANY edge of ANY of the pins # (but only of those pins that were actually supplied). conds = [] for i in range(1, len(self.optional_channels)): if self.has_channel(i): conds.append({i: 'e'}) while True: self.handle_bits(self.wait(conds)[1:]) else: # Sample on the rising or falling CLK edge (depends on config). while True: pins = self.wait({0: self.options['clock_edge'][0]}) self.handle_bits(pins[1:]) libsigrokdecode-0.5.0/decoders/parallel/__init__.py0000644000175000017500000000261213117367246017276 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder can decode synchronous parallel buses with various number of data bits/channels and one (optional) clock line. If no clock line is supplied, the decoder works slightly differently in that it interprets every transition on any of the supplied data channels like there had been a clock transition. It is required to use the lowest data channels, and use consecutive ones. For example, for a 4-bit sync parallel bus, channels D0/D1/D2/D3 (and CLK) should be used. Using combinations like D7/D12/D3/D15 is not supported. For an 8-bit bus you should use D0-D7, for a 16-bit bus use D0-D15 and so on. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/rgb_led_spi/0000755000175000017500000000000013117367246015721 500000000000000libsigrokdecode-0.5.0/decoders/rgb_led_spi/pd.py0000644000175000017500000000371313117367246016622 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Matt Ranostay ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'rgb_led_spi' name = 'RGB LED (SPI)' longname = 'RGB LED string decoder (SPI)' desc = 'RGB LED string protocol (RGB values clocked over SPI).' license = 'gplv2+' inputs = ['spi'] outputs = ['rgb_led_spi'] annotations = ( ('rgb', 'RGB values'), ) def __init__(self): self.ss_cmd, self.es_cmd = 0, 0 self.mosi_bytes = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def decode(self, ss, es, data): ptype, mosi, miso = data # Only care about data packets. if ptype != 'DATA': return self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: self.ss_cmd = ss self.mosi_bytes.append(mosi) # RGB value == 3 bytes if len(self.mosi_bytes) != 3: return red, green, blue = self.mosi_bytes rgb_value = int(red) << 16 | int(green) << 8 | int(blue) self.es_cmd = es self.putx([0, ['#%.6x' % rgb_value]]) self.mosi_bytes = [] libsigrokdecode-0.5.0/decoders/rgb_led_spi/__init__.py0000644000175000017500000000164013117367246017753 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Matt Ranostay ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes generic RGB LED string values that are clocked over SPI in RGB values. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ade77xx/0000755000175000017500000000000013117367246014737 500000000000000libsigrokdecode-0.5.0/decoders/ade77xx/pd.py0000644000175000017500000001110713117367246015634 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Karl Palsson ## ## Permission is hereby granted, free of charge, to any person obtaining a copy ## of this software and associated documentation files (the "Software"), to deal ## in the Software without restriction, including without limitation the rights ## to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ## copies of the Software, and to permit persons to whom the Software is ## furnished to do so, subject to the following conditions: ## ## The above copyright notice and this permission notice shall be included in all ## copies or substantial portions of the Software. ## ## THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ## IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ## FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ## AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ## LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ## SOFTWARE. import math import sigrokdecode as srd from .lists import * class Decoder(srd.Decoder): api_version = 2 id = 'ade77xx' name = 'ADE77xx' longname = 'Analog Devices ADE77xx' desc = 'Poly phase multifunction energy metering IC protocol.' license = 'mit' inputs = ['spi'] outputs = ['ade77xx'] annotations = ( ('read', 'Register read commands'), ('write', 'Register write commands'), ('warning', 'Warnings'), ) annotation_rows = ( ('read', 'Read', (0,)), ('write', 'Write', (1,)), ('warnings', 'Warnings', (2,)), ) def reset(self): self.expected = 0 self.mosi_bytes, self.miso_bytes = [], [] def __init__(self): self.ss_cmd, self.es_cmd = 0, 0 self.reset() def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def put_warn(self, pos, msg): self.put(pos[0], pos[1], self.out_ann, [2, [msg]]) def decode(self, ss, es, data): ptype = data[0] if ptype == 'CS-CHANGE': # Bear in mind, that CS is optional according to the datasheet. # If we transition high mid-stream, toss out our data and restart. cs_old, cs_new = data[1:] if cs_old is not None and cs_old == 0 and cs_new == 1: if len(self.mosi_bytes) > 0 and len(self.mosi_bytes[1:]) < self.expected: # Mark short read/write for reg at least! self.es_cmd = es write, reg = self.cmd & 0x80, self.cmd & 0x7f rblob = regs.get(reg) idx = 1 if write else 0 self.putx([idx, ['%s: %s' % (rblob[0], "SHORT")]]) self.put_warn([self.ss_cmd, es], "Short transfer!") self.reset() return # Don't care about anything else. if ptype != 'DATA': return mosi, miso = data[1:] if len(self.mosi_bytes) == 0: self.ss_cmd = ss self.mosi_bytes.append(mosi) self.miso_bytes.append(miso) # A transfer is 2-4 bytes, (command + 1..3 byte reg). if len(self.mosi_bytes) < 2: return self.cmd = self.mosi_bytes[0] write, reg = self.cmd & 0x80, self.cmd & 0x7f rblob = regs.get(reg) if not rblob: # If you don't have CS, this will _destroy_ comms! self.put_warn([self.ss_cmd, es], 'Unknown register!') return self.expected = math.ceil(rblob[3] / 8) if len(self.mosi_bytes[1:]) != self.expected: return valo, vali = None, None self.es_cmd = es if self.expected == 3: valo = self.mosi_bytes[1] << 16 | self.mosi_bytes[2] << 8 | \ self.mosi_bytes[3] vali = self.miso_bytes[1] << 16 | self.miso_bytes[2] << 8 | \ self.miso_bytes[3] elif self.expected == 2: valo = self.mosi_bytes[1] << 8 | self.mosi_bytes[2] vali = self.miso_bytes[1] << 8 | self.miso_bytes[2] elif self.expected == 1: valo = self.mosi_bytes[1] vali = self.miso_bytes[1] if write: self.putx([1, ['%s: %#x' % (rblob[0], valo)]]) else: self.putx([0, ['%s: %#x' % (rblob[0], vali)]]) self.reset() libsigrokdecode-0.5.0/decoders/ade77xx/__init__.py0000644000175000017500000000224013117367246016766 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Karl Palsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## ''' This decoder stacks on top of the 'spi' PD and decodes Analog Devices ADE77xx command/responses. The ADE77xx is a "Poly Phase Multifunction Energy Metering IC with Per Phase Information". This PD has been tested with an ADE7758 so far, support for other devices from the ADE77xx series can be added in the future. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ade77xx/lists.py0000644000175000017500000003154413117367246016376 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Karl Palsson ## ## Permission is hereby granted, free of charge, to any person obtaining a copy ## of this software and associated documentation files (the "Software"), to deal ## in the Software without restriction, including without limitation the rights ## to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ## copies of the Software, and to permit persons to whom the Software is ## furnished to do so, subject to the following conditions: ## ## The above copyright notice and this permission notice shall be included in all ## copies or substantial portions of the Software. ## ## THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ## IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ## FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ## AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ## LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ## SOFTWARE. from collections import OrderedDict # Generated from datasheet rev E, using tabula. regs = OrderedDict([ (0x1, ('AWATTHR', 'Watt-Hour Accumulation Register for Phase A. Active power is accumulated over time in this read-only register. The AWATTHR register can hold a maximum of 0.52 seconds of active energy information with full-scale analog inputs before it overflows (see the Active Energy Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine how the active energy is processed from the six analog inputs.', 'R', 16, 'S', 0x0)), (0x2, ('BWATTHR', 'Watt-Hour Accumulation Register for Phase B.', 'R', 16, 'S', 0x0)), (0x3, ('CWATTHR', 'Watt-Hour Accumulation Register for Phase C.', 'R', 16, 'S', 0x0)), (0x4, ('AVARHR', 'VAR-Hour Accumulation Register for Phase A. Reactive power is accumulated over time in this read-only register. The AVARHR register can hold a maximum of 0.52 seconds of reactive energy information with full-scale analog inputs before it overflows (see the Reactive Energy Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine how the reactive energy is processed from the six analog inputs.', 'R', 16, 'S', 0x0)), (0x5, ('BVARHR', 'VAR-Hour Accumulation Register for Phase B.', 'R', 16, 'S', 0x0)), (0x6, ('CVARHR', 'VAR-Hour Accumulation Register for Phase C.', 'R', 16, 'S', 0x0)), (0x7, ('AVAHR', 'VA-Hour Accumulation Register for Phase A. Apparent power is accumulated over time in this read-only register. The AVAHR register can hold a maximum of 1.15 seconds of apparent energy information with full-scale analog inputs before it overflows (see the Apparent Energy Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine how the apparent energy is processed from the six analog inputs.', 'R', 16, 'S', 0x0)), (0x8, ('BVAHR', 'VA-Hour Accumulation Register for Phase B.', 'R', 16, 'S', 0x0)), (0x9, ('CVAHR', 'VA-Hour Accumulation Register for Phase C.', 'R', 16, 'S', 0x0)), (0xa, ('AIRMS', 'Phase A Current Channel RMS Register. The register contains the rms component of the Phase A input of the current channel. The source is selected by data bits in the mode register.', 'R', 24, 'S', 0x0)), (0xb, ('BIRMS', 'Phase B Current Channel RMS Register.', 'R', 24, 'S', 0x0)), (0xc, ('CIRMS', 'Phase C Current Channel RMS Register.', 'R', 24, 'S', 0x0)), (0xd, ('AVRMS', 'Phase A Voltage Channel RMS Register.', 'R', 24, 'S', 0x0)), (0xe, ('BVRMS', 'Phase B Voltage Channel RMS Register.', 'R', 24, 'S', 0x0)), (0xf, ('CVRMS', 'Phase C Voltage Channel RMS Register.', 'R', 24, 'S', 0x0)), (0x10, ('FREQ', 'Frequency of the Line Input Estimated by the Zero-Crossing Processing. It can also display the period of the line input. Bit 7 of the LCYCMODE register determines if the reading is frequency or period. Default is frequency. Data Bit 0 and Bit 1 of the MMODE register determine the voltage channel used for the frequency or period calculation.', 'R', 12, 'U', 0x0)), (0x11, ('TEMP', 'Temperature Register. This register contains the result of the latest temperature conversion. Refer to the Temperature Measurement section for details on how to interpret the content of this register.', 'R', 8, 'S', 0x0)), (0x12, ('WFORM', 'Waveform Register. This register contains the digitized waveform of one of the six analog inputs or the digitized power waveform. The source is selected by Data Bit 0 to Bit 4 in the WAVMODE register.', 'R', 24, 'S', 0x0)), (0x13, ('OPMODE', 'Operational Mode Register. This register defines the general configuration of the ADE7758 (see Table 18).', 'R/W', 8, 'U', 0x4)), (0x14, ('MMODE', 'Measurement Mode Register. This register defines the channel used for period and peak detection measurements (see Table 19).', 'R/W', 8, 'U', 0xfc)), (0x15, ('WAVMODE', 'Waveform Mode Register. This register defines the channel and sampling frequency used in the waveform sampling mode (see Table 20).', 'R/W', 8, 'U', 0x0)), (0x16, ('COMPMODE', 'Computation Mode Register. This register configures the formula applied for the energy and line active energy measurements (see Table 22).', 'R/W', 8, 'U', 0x1c)), (0x17, ('LCYCMODE', 'Line Cycle Mode Register. This register configures the line cycle accumulation mode for WATT-HR', 'R/W', 8, 'U', 0x78)), (0x18, ('Mask', 'IRQ Mask Register. It determines if an interrupt event generates an active-low output at the IRQ pin (see the Interrupts section).', 'R/W', 24, 'U', 0x0)), (0x19, ('Status', 'IRQ Status Register. This register contains information regarding the source of the ADE7758 interrupts (see the Interrupts section).', 'R', 24, 'U', 0x0)), (0x1a, ('RSTATUS', 'IRQ Reset Status Register. Same as the STATUS register, except that its contents are reset to 0 (all flags cleared) after a read operation.', 'R', 24, 'U', 0x0)), (0x1b, ('ZXTOUT', 'Zero-Cross Timeout Register. If no zero crossing is detected within the time period specified by this register', 'R/W', 16, 'U', 0xffff)), (0x1c, ('LINECYC', 'Line Cycle Register. The content of this register sets the number of half-line cycles that the active', 'R/W', 16, 'U', 0xffff)), (0x1d, ('SAGCYC', 'SAG Line Cycle Register. This register specifies the number of consecutive half-line cycles where voltage channel input may fall below a threshold level. This register is common to the three line voltage SAG detection. The detection threshold is specified by the SAGLVL register (see the Line Voltage SAG Detection section).', 'R/W', 8, 'U', 0xff)), (0x1e, ('SAGLVL', 'SAG Voltage Level. This register specifies the detection threshold for the SAG event. This register is common to all three phases’ line voltage SAG detections. See the description of the SAGCYC register for details.', 'R/W', 8, 'U', 0x0)), (0x1f, ('VPINTLVL', 'Voltage Peak Level Interrupt Threshold Register. This register sets the level of the voltage peak detection. Bit 5 to Bit 7 of the MMODE register determine which phases are to be monitored. If the selected voltage phase exceeds this level', 'R/W', 8, 'U', 0xff)), (0x20, ('IPINTLVL', 'Current Peak Level Interrupt Threshold Register. This register sets the level of the current peak detection. Bit 5 to Bit 7 of the MMODE register determine which phases are to be monitored. If the selected current phase exceeds this level', 'R/W', 8, 'U', 0xff)), (0x21, ('VPEAK', 'Voltage Peak Register. This register contains the value of the peak voltage waveform that has occurred within a fixed number of half-line cycles. The number of half-line cycles is set by the LINECYC register.', 'R', 8, 'U', 0x0)), (0x22, ('IPEAK', 'Current Peak Register. This register holds the value of the peak current waveform that has occurred within a fixed number of half-line cycles. The number of half-line cycles is set by the LINECYC register.', 'R', 8, 'U', 0x0)), (0x23, ('Gain', 'PGA Gain Register. This register is used to adjust the gain selection for the PGA in the current and voltage channels (see the Analog Inputs section).', 'R/W', 8, 'U', 0x0)), (0x24, ('AVRMSGAIN', 'Phase A VRMS Gain Register. The range of the voltage rms calculation can be adjusted by writing to this register. It has an adjustment range of ±50% with a resolution of 0.0244%/LSB.', 'R/W', 12, 'S', 0x0)), (0x25, ('BVRMSGAIN', 'Phase B VRMS Gain Register.', 'R/W', 12, 'S', 0x0)), (0x26, ('CVRMSGAIN', 'Phase C VRMS Gain Register.', 'R/W', 12, 'S', 0x0)), (0x27, ('AIGAIN', 'Phase A Current Gain Register. This register is not recommended to be used and it should be kept at 0', 'R/W', 12, 'S', 0x0)), (0x28, ('BIGAIN', 'Phase B Current Gain Register. This register is not recommended to be used and it should be kept at 0', 'R/W', 12, 'S', 0x0)), (0x29, ('CIGAIN', 'Phase C Current Gain Register. This register is not recommended to be used and it should be kept at 0', 'R/W', 12, 'S', 0x0)), (0x2a, ('AWG', 'Phase A Watt Gain Register. The range of the watt calculation can be adjusted by writing to this register. It has an adjustment range of ±50% with a resolution of 0.0244%/LSB.', 'R/W', 12, 'S', 0x0)), (0x2b, ('BWG', 'Phase B Watt Gain Register.', 'R/W', 12, 'S', 0x0)), (0x2c, ('CWG', 'Phase C Watt Gain Register.', 'R/W', 12, 'S', 0x0)), (0x2d, ('AVARG', 'Phase A VAR Gain Register. The range of the VAR calculation can be adjusted by writing to this register. It has an adjustment range of ±50% with a resolution of 0.0244%/LSB.', 'R/W', 12, 'S', 0x0)), (0x2e, ('BVARG', 'Phase B VAR Gain Register.', 'R/W', 12, 'S', 0x0)), (0x2f, ('CVARG', 'Phase C VAR Gain Register.', 'R/W', 12, 'S', 0x0)), (0x30, ('AVAG', 'Phase A VA Gain Register. The range of the VA calculation can be adjusted by writing to this register. It has an adjustment range of ±50% with a resolution of 0.0244%/LSB.', 'R/W', 12, 'S', 0x0)), (0x31, ('BVAG', 'Phase B VA Gain Register.', 'R/W', 12, 'S', 0x0)), (0x32, ('CVAG', 'Phase C VA Gain Register.', 'R/W', 12, 'S', 0x0)), (0x33, ('AVRMSOS', 'Phase A Voltage RMS Offset Correction Register.', 'R/W', 12, 'S', 0x0)), (0x34, ('BVRMSOS', 'Phase B Voltage RMS Offset Correction Register.', 'R/W', 12, 'S', 0x0)), (0x35, ('CVRMSOS', 'Phase C Voltage RMS Offset Correction Register.', 'R/W', 12, 'S', 0x0)), (0x36, ('AIRMSOS', 'Phase A Current RMS Offset Correction Register.', 'R/W', 12, 'S', 0x0)), (0x37, ('BIRMSOS', 'Phase B Current RMS Offset Correction Register.', 'R/W', 12, 'S', 0x0)), (0x38, ('CIRMSOS', 'Phase C Current RMS Offset Correction Register.', 'R/W', 12, 'S', 0x0)), (0x39, ('AWATTOS', 'Phase A Watt Offset Calibration Register.', 'R/W', 12, 'S', 0x0)), (0x3a, ('BWATTOS', 'Phase B Watt Offset Calibration Register.', 'R/W', 12, 'S', 0x0)), (0x3b, ('CWATTOS', 'Phase C Watt Offset Calibration Register.', 'R/W', 12, 'S', 0x0)), (0x3c, ('AVAROS', 'Phase A VAR Offset Calibration Register.', 'R/W', 12, 'S', 0x0)), (0x3d, ('BVAROS', 'Phase B VAR Offset Calibration Register.', 'R/W', 12, 'S', 0x0)), (0x3e, ('CVAROS', 'Phase C VAR Offset Calibration Register.', 'R/W', 12, 'S', 0x0)), (0x3f, ('APHCAL', 'Phase A Phase Calibration Register. The phase relationship between the current and voltage channel can be adjusted by writing to this signed 7-bit register (see the Phase Compensation section).', 'R/W', 7, 'S', 0x0)), (0x40, ('BPHCAL', 'Phase B Phase Calibration Register.', 'R/W', 7, 'S', 0x0)), (0x41, ('CPHCAL', 'Phase C Phase Calibration Register.', 'R/W', 7, 'S', 0x0)), (0x42, ('WDIV', 'Active Energy Register Divider.', 'R/W', 8, 'U', 0x0)), (0x43, ('VARDIV', 'Reactive Energy Register Divider.', 'R/W', 8, 'U', 0x0)), (0x44, ('VADIV', 'Apparent Energy Register Divider.', 'R/W', 8, 'U', 0x0)), (0x45, ('APCFNUM', 'Active Power CF Scaling Numerator Register. The content of this register is used in the numerator of the APCF output scaling calculation. Bits [15:13] indicate reverse polarity active power measurement for Phase A', 'R/W', 16, 'U', 0x0)), (0x46, ('APCFDEN', 'Active Power CF Scaling Denominator Register. The content of this register is used in the denominator of the APCF output scaling.', 'R/W', 12, 'U', 0x3f)), (0x47, ('VARCFNUM', 'Reactive Power CF Scaling Numerator Register. The content of this register is used in the numerator of the VARCF output scaling. Bits [15:13] indicate reverse polarity reactive power measurement for Phase A', 'R/W', 16, 'U', 0x0)), (0x48, ('VARCFDEN', 'Reactive Power CF Scaling Denominator Register. The content of this register is used in the denominator of the VARCF output scaling.', 'R/W', 12, 'U', 0x3f)), (0x7e, ('CHKSUM', 'Checksum Register. The content of this register represents the sum of all the ones in the last register read from the SPI port.', 'R', 8, 'U', None)), (0x7f, ('Version', 'Version of the Die.', 'R', 8, 'U', None)), ]) libsigrokdecode-0.5.0/decoders/mxc6225xu/0000755000175000017500000000000013117367246015133 500000000000000libsigrokdecode-0.5.0/decoders/mxc6225xu/pd.py0000644000175000017500000001553113117367246016035 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # Definitions of various bits in MXC6225XU registers. status = { # SH[1:0] 'sh': { 0b00: 'none', 0b01: 'shake left', 0b10: 'shake right', 0b11: 'undefined', }, # ORI[1:0] and OR[1:0] (same format) 'ori': { 0b00: 'vertical in upright orientation', 0b01: 'rotated 90 degrees clockwise', 0b10: 'vertical in inverted orientation', 0b11: 'rotated 90 degrees counterclockwise', }, # SHTH[1:0] 'shth': { 0b00: '0.5g', 0b01: '1.0g', 0b10: '1.5g', 0b11: '2.0g', }, # SHC[1:0] 'shc': { 0b00: '16', 0b01: '32', 0b10: '64', 0b11: '128', }, # ORC[1:0] 'orc': { 0b00: '16', 0b01: '32', 0b10: '64', 0b11: '128', }, } class Decoder(srd.Decoder): api_version = 2 id = 'mxc6225xu' name = 'MXC6225XU' longname = 'MEMSIC MXC6225XU' desc = 'Digital Thermal Orientation Sensor (DTOS) protocol.' license = 'gplv2+' inputs = ['i2c'] outputs = ['mxc6225xu'] annotations = ( ('text', 'Human-readable text'), ) def __init__(self): self.state = 'IDLE' def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def handle_reg_0x00(self, b): # XOUT: 8-bit x-axis acceleration output. # Data is in 2's complement, values range from -128 to 127. self.putx([0, ['XOUT: %d' % b]]) def handle_reg_0x01(self, b): # YOUT: 8-bit y-axis acceleration output. # Data is in 2's complement, values range from -128 to 127. self.putx([0, ['YOUT: %d' % b]]) def handle_reg_0x02(self, b): # STATUS: Orientation and shake status. # Bits[7:7]: INT int_val = (b >> 7) & 1 s = 'unchanged and no' if (int_val == 0) else 'changed or' ann = 'INT = %d: Orientation %s shake event occurred\n' % (int_val, s) # Bits[6:5]: SH[1:0] sh = (((b >> 6) & 1) << 1) | ((b >> 5) & 1) ann += 'SH[1:0] = %s: Shake event: %s\n' % \ (bin(sh)[2:], status['sh'][sh]) # Bits[4:4]: TILT tilt = (b >> 4) & 1 s = '' if (tilt == 0) else 'not ' ann += 'TILT = %d: Orientation measurement is %svalid\n' % (tilt, s) # Bits[3:2]: ORI[1:0] ori = (((b >> 3) & 1) << 1) | ((b >> 2) & 1) ann += 'ORI[1:0] = %s: %s\n' % (bin(ori)[2:], status['ori'][ori]) # Bits[1:0]: OR[1:0] or_val = (((b >> 1) & 1) << 1) | ((b >> 0) & 1) ann += 'OR[1:0] = %s: %s\n' % (bin(or_val)[2:], status['ori'][or_val]) # ann += 'b = %s\n' % (bin(b)) self.putx([0, [ann]]) def handle_reg_0x03(self, b): # DETECTION: Powerdown, orientation and shake detection parameters. # Note: This is a write-only register. # Bits[7:7]: PD pd = (b >> 7) & 1 s = 'Do not power down' if (pd == 0) else 'Power down' ann = 'PD = %d: %s the device (into a low-power state)\n' % (pd, s) # Bits[6:6]: SHM shm = (b >> 6) & 1 ann = 'SHM = %d: Set shake mode to %d\n' % (shm, shm) # Bits[5:4]: SHTH[1:0] shth = (((b >> 5) & 1) << 1) | ((b >> 4) & 1) ann += 'SHTH[1:0] = %s: Set shake threshold to %s\n' \ % (bin(shth)[2:], status['shth'][shth]) # Bits[3:2]: SHC[1:0] shc = (((b >> 3) & 1) << 1) | ((b >> 2) & 1) ann += 'SHC[1:0] = %s: Set shake count to %s readings\n' \ % (bin(shc)[2:], status['shc'][shc]) # Bits[1:0]: ORC[1:0] orc = (((b >> 1) & 1) << 1) | ((b >> 0) & 1) ann += 'ORC[1:0] = %s: Set orientation count to %s readings\n' \ % (bin(orc)[2:], status['orc'][orc]) self.putx([0, [ann]]) # TODO: Fixup, this is copy-pasted from another PD. # TODO: Handle/check the ACKs/NACKs. def decode(self, ss, es, data): cmd, databyte = data # Store the start/end samples of this I²C packet. self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Wait for an I²C START condition. if cmd != 'START': return self.state = 'GET SLAVE ADDR' elif self.state == 'GET SLAVE ADDR': # Wait for an address write operation. # TODO: We should only handle packets to the slave(?) if cmd != 'ADDRESS WRITE': return self.state = 'GET REG ADDR' elif self.state == 'GET REG ADDR': # Wait for a data write (master selects the slave register). if cmd != 'DATA WRITE': return self.reg = databyte self.state = 'WRITE REGS' elif self.state == 'WRITE REGS': # If we see a Repeated Start here, it's a multi-byte read. if cmd == 'START REPEAT': self.state = 'READ REGS' return # Otherwise: Get data bytes until a STOP condition occurs. if cmd == 'DATA WRITE': handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) self.reg += 1 # TODO: Check for NACK! elif cmd == 'STOP': # TODO self.state = 'IDLE' else: pass # TODO elif self.state == 'READ REGS': # Wait for an address read operation. # TODO: We should only handle packets to the slave(?) if cmd == 'ADDRESS READ': self.state = 'READ REGS2' return else: pass # TODO elif self.state == 'READ REGS2': if cmd == 'DATA READ': handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) self.reg += 1 # TODO: Check for NACK! elif cmd == 'STOP': # TODO self.state = 'IDLE' else: pass # TODO? libsigrokdecode-0.5.0/decoders/mxc6225xu/__init__.py0000644000175000017500000000201613117367246017163 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the MEMSIC MXC6225XU digital thermal orientation sensor (DTOS) protocol. The chip's I²C interface supports standard mode and fast mode (max. 400kHz). Its I²C slave address is 0x2a. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/i2cfilter/0000755000175000017500000000000013117367246015333 500000000000000libsigrokdecode-0.5.0/decoders/i2cfilter/pd.py0000644000175000017500000000653213117367246016236 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Bert Vermeulen ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # TODO: Support for filtering out multiple slave/direction pairs? import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'i2cfilter' name = 'I²C filter' longname = 'I²C filter' desc = 'Filter out addresses/directions in an I²C stream.' license = 'gplv3+' inputs = ['i2c'] outputs = ['i2c'] options = ( {'id': 'address', 'desc': 'Address to filter out of the I²C stream', 'default': 0}, {'id': 'direction', 'desc': 'Direction to filter', 'default': 'both', 'values': ('read', 'write', 'both')} ) def __init__(self): self.curslave = -1 self.curdirection = None self.packets = [] # Local cache of I²C packets def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON, proto_id='i2c') if self.options['address'] not in range(0, 127 + 1): raise Exception('Invalid slave (must be 0..127).') # Grab I²C packets into a local cache, until an I²C STOP condition # packet comes along. At some point before that STOP condition, there # will have been an ADDRESS READ or ADDRESS WRITE which contains the # I²C address of the slave that the master wants to talk to. # If that slave shall be filtered, output the cache (all packets from # START to STOP) as proto 'i2c', otherwise drop it. def decode(self, ss, es, data): cmd, databyte = data # Add the I²C packet to our local cache. self.packets.append([ss, es, data]) if cmd in ('ADDRESS READ', 'ADDRESS WRITE'): self.curslave = databyte self.curdirection = cmd[8:].lower() elif cmd in ('STOP', 'START REPEAT'): # If this chunk was not for the correct slave, drop it. if self.options['address'] == 0: pass elif self.curslave != self.options['address']: self.packets = [] return # If this chunk was not in the right direction, drop it. if self.options['direction'] == 'both': pass elif self.options['direction'] != self.curdirection: self.packets = [] return # TODO: START->STOP chunks with both read and write (Repeat START) # Otherwise, send out the whole chunk of I²C packets. for p in self.packets: self.put(p[0], p[1], self.out_python, p[2]) self.packets = [] else: pass # Do nothing, only add the I²C packet to our cache. libsigrokdecode-0.5.0/decoders/i2cfilter/__init__.py0000644000175000017500000000266013117367246017370 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This is a generic I²C filtering protocol decoder. It takes input from the I²C protocol decoder and removes all traffic except that from/to the specified slave address and/or direction. It then outputs the filtered data again as OUTPUT_PROTO of type/format 'i2c' (up the protocol decoder stack). No annotations are output. The I²C slave address to filter out should be passed in as an option 'address', as an integer. A specific read or write operation can be selected with the 'direction' option, which should be 'read', 'write', or 'both'. Both of these are optional; if no options are specified the entire payload of the I²C session will be output. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/adns5020/0000755000175000017500000000000013117367246014704 500000000000000libsigrokdecode-0.5.0/decoders/adns5020/pd.py0000644000175000017500000000633713117367246015612 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Karl Palsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd regs = { 0: 'Product_ID', 1: 'Revision_ID', 2: 'Motion', 3: 'Delta_X', 4: 'Delta_Y', 5: 'SQUAL', 6: 'Shutter_Upper', 7: 'Shutter_Lower', 8: 'Maximum_Pixel', 9: 'Pixel_Sum', 0xa: 'Minimum_Pixel', 0xb: 'Pixel_Grab', 0xd: 'Mouse_Control', 0x3a: 'Chip_Reset', 0x3f: 'Inv_Rev_ID', 0x63: 'Motion_Burst', } class Decoder(srd.Decoder): api_version = 2 id = 'adns5020' name = 'ADNS-5020' longname = 'Avago ADNS-5020 optical mouse sensor' desc = 'Bidirectional command and data over an SPI-like protocol.' license = 'gplv2+' inputs = ['spi'] outputs = ['adns5020'] annotations = ( ('read', 'Register read commands'), ('write', 'Register write commands'), ('warning', 'Warnings'), ) annotation_rows = ( ('read', 'Read', (0,)), ('write', 'Write', (1,)), ('warnings', 'Warnings', (2,)), ) def __init__(self): self.ss_cmd, self.es_cmd = 0, 0 self.mosi_bytes = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def put_warn(self, pos, msg): self.put(pos[0], pos[1], self.out_ann, [2, [msg]]) def decode(self, ss, es, data): ptype = data[0] if ptype == 'CS-CHANGE': # If we transition high mid-stream, toss out our data and restart. cs_old, cs_new = data[1:] if cs_old is not None and cs_old == 0 and cs_new == 1: if len(self.mosi_bytes) not in [0, 2]: self.put_warn([self.ss_cmd, es], 'Misplaced CS#!') self.mosi_bytes = [] return # Don't care about anything else. if ptype != 'DATA': return mosi, miso = data[1:] self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: self.ss_cmd = ss self.mosi_bytes.append(mosi) # Writes/reads are mostly two transfers (burst mode is different). if len(self.mosi_bytes) != 2: return self.es_cmd = es cmd, arg = self.mosi_bytes write = cmd & 0x80 reg = cmd & 0x7f reg_desc = regs.get(reg, 'Reserved %#x' % reg) if reg > 0x63: reg_desc = 'Unknown' if write: self.putx([1, ['%s: %#x' % (reg_desc, arg)]]) else: self.putx([0, ['%s: %d' % (reg_desc, arg)]]) self.mosi_bytes = [] libsigrokdecode-0.5.0/decoders/adns5020/__init__.py0000644000175000017500000000165413117367246016743 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Karl Palsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes ADNS-5020 optical mouse sensor commands and data. Use MOSI for the SDIO shared line. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/eeprom93xx/0000755000175000017500000000000013117367246015473 500000000000000libsigrokdecode-0.5.0/decoders/eeprom93xx/pd.py0000644000175000017500000001310113117367246016364 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Kevin Redon ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'eeprom93xx' name = '93xx EEPROM' longname = '93xx Microwire EEPROM' desc = '93xx series Microwire EEPROM protocol.' license = 'gplv2+' inputs = ['microwire'] outputs = ['eeprom93xx'] options = ( {'id': 'addresssize', 'desc': 'Address size', 'default': 8}, {'id': 'wordsize', 'desc': 'Word size', 'default': 16}, ) annotations = ( ('si-data', 'SI data'), ('so-data', 'SO data'), ('warning', 'Warning'), ) annotation_rows = ( ('data', 'Data', (0, 1)), ('warnings', 'Warnings', (2,)), ) def __init__(self): self.frame = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.addresssize = self.options['addresssize'] self.wordsize = self.options['wordsize'] def put_address(self, data): # Get address (MSb first). a = 0 for b in range(len(data)): a += (data[b].si << (len(data) - b - 1)) self.put(data[0].ss, data[-1].es, self.out_ann, [0, ['Address: 0x%x' % a, 'Addr: 0x%x' % a, '0x%x' % a]]) def put_word(self, si, data): # Decode word (MSb first). word = 0 for b in range(len(data)): d = data[b].si if si else data[b].so word += (d << (len(data) - b - 1)) idx = 0 if si else 1 self.put(data[0].ss, data[-1].es, self.out_ann, [idx, ['Data: 0x%x' % word, '0x%x' % word]]) def decode(self, ss, es, data): if len(data) < (2 + self.addresssize): self.put(ss, es, self.out_ann, [2, ['Not enough packet bits']]) return opcode = (data[0].si << 1) + (data[1].si << 0) if opcode == 2: # READ instruction. self.put(data[0].ss, data[1].es, self.out_ann, [0, ['Read word', 'READ']]) self.put_address(data[2:2 + self.addresssize]) # Get all words. word_start = 2 + self.addresssize while len(data) - word_start > 0: # Check if there are enough bits for a word. if len(data) - word_start < self.wordsize: self.put(data[word_start].ss, data[len(data) - 1].es, self.out_ann, [2, ['Not enough word bits']]) break self.put_word(False, data[word_start:word_start + self.wordsize]) # Go to next word. word_start += self.wordsize elif opcode == 1: # WRITE instruction. self.put(data[0].ss, data[1].es, self.out_ann, [0, ['Write word', 'WRITE']]) self.put_address(data[2:2 + self.addresssize]) # Get word. if len(data) < 2 + self.addresssize + self.wordsize: self.put(data[2 + self.addresssize].ss, data[len(data) - 1].ss, self.out_ann, [2, ['Not enough word bits']]) else: self.put_word(True, data[2 + self.addresssize:2 + self.addresssize + self.wordsize]) elif opcode == 3: # ERASE instruction. self.put(data[0].ss, data[1].es, self.out_ann, [0, ['Erase word', 'ERASE']]) self.put_address(data[2:2 + self.addresssize]) elif opcode == 0: if data[2].si == 1 and data[3].si == 1: # WEN instruction. self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Write enable', 'WEN']]) elif data[2].si == 0 and data[3].si == 0: # WDS instruction. self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Write disable', 'WDS']]) elif data[2].si == 1 and data[3].si == 0: # ERAL instruction. self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Erase all memory', 'Erase all', 'ERAL']]) elif data[2].si == 0 and data[3].si == 1: # WRAL instruction. self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Write all memory', 'Write all', 'WRAL']]) # Get word. if len(data) < 2 + self.addresssize + self.wordsize: self.put(data[2 + self.addresssize].ss, data[len(data) - 1].ss, self.out_ann, [2, ['Not enough word bits']]) else: self.put_word(True, data[2 + self.addresssize:2 + self.addresssize + self.wordsize]) libsigrokdecode-0.5.0/decoders/eeprom93xx/__init__.py0000644000175000017500000000222013117367246017520 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Kevin Redon ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'microwire' PD and decodes the 93xx EEPROM specific instructions. The implemented instructions come from the STMicroelectronics M93Cx6 EEPROM datasheet. They are compatible with the Atmel AT93Cxx EEPROM with slightly different names. Warning: Other EEPROMs using Microwire might have different operation codes and instructions. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/common/0000755000175000017500000000000013117367246014740 500000000000000libsigrokdecode-0.5.0/decoders/common/srdhelper/0000755000175000017500000000000013117367246016730 500000000000000libsigrokdecode-0.5.0/decoders/common/srdhelper/mod.py0000644000175000017500000000156713117367246020012 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Return the specified BCD number (max. 8 bits) as integer. def bcd2int(b): return (b & 0x0f) + ((b >> 4) * 10) libsigrokdecode-0.5.0/decoders/common/srdhelper/__init__.py0000644000175000017500000000142613117367246020764 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## from .mod import * libsigrokdecode-0.5.0/decoders/common/__init__.py0000644000175000017500000000137613117367246017000 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## libsigrokdecode-0.5.0/decoders/common/sdcard/0000755000175000017500000000000013117367246016200 500000000000000libsigrokdecode-0.5.0/decoders/common/sdcard/mod.py0000644000175000017500000001372413117367246017260 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Normal commands (CMD) # Unlisted items are 'Reserved' as per SD spec. The 'Unknown' items don't # seem to be mentioned in the spec, but aren't marked as reserved either. cmd_names = { 0: 'GO_IDLE_STATE', 1: 'SEND_OP_COND', # Reserved in SD mode 2: 'ALL_SEND_CID', 3: 'SEND_RELATIVE_ADDR', 4: 'SET_DSR', 5: 'IO_SEND_OP_COND', # SDIO-only 6: 'SWITCH_FUNC', # New since spec 1.10 7: 'SELECT/DESELECT_CARD', 8: 'SEND_IF_COND', 9: 'SEND_CSD', 10: 'SEND_CID', 11: 'VOLTAGE_SWITCH', 12: 'STOP_TRANSMISSION', 13: 'SEND_STATUS', # 14: Reserved 15: 'GO_INACTIVE_STATE', 16: 'SET_BLOCKLEN', 17: 'READ_SINGLE_BLOCK', 18: 'READ_MULTIPLE_BLOCK', 19: 'SEND_TUNING_BLOCK', 20: 'SPEED_CLASS_CONTROL', # 21-22: Reserved 23: 'SET_BLOCK_COUNT', 24: 'WRITE_BLOCK', 25: 'WRITE_MULTIPLE_BLOCK', 26: 'Reserved for manufacturer', 27: 'PROGRAM_CSD', 28: 'SET_WRITE_PROT', 29: 'CLR_WRITE_PROT', 30: 'SEND_WRITE_PROT', # 31: Reserved 32: 'ERASE_WR_BLK_START', # SPI mode: ERASE_WR_BLK_START_ADDR 33: 'ERASE_WR_BLK_END', # SPI mode: ERASE_WR_BLK_END_ADDR 34: 'Reserved for CMD6', # New since spec 1.10 35: 'Reserved for CMD6', # New since spec 1.10 36: 'Reserved for CMD6', # New since spec 1.10 37: 'Reserved for CMD6', # New since spec 1.10 38: 'ERASE', # 39: Reserved 40: 'Reserved for security specification', # 41: Reserved 42: 'LOCK_UNLOCK', # 43-49: Reserved 50: 'Reserved for CMD6', # New since spec 1.10 # 51: Reserved 52: 'IO_RW_DIRECT', # SDIO-only 53: 'IO_RW_EXTENDED', # SDIO-only 54: 'Unknown', 55: 'APP_CMD', 56: 'GEN_CMD', 57: 'Reserved for CMD6', # New since spec 1.10 58: 'READ_OCR', # Reserved in SD mode 59: 'CRC_ON_OFF', # Reserved in SD mode 60: 'Reserved for manufacturer', 61: 'Reserved for manufacturer', 62: 'Reserved for manufacturer', 63: 'Reserved for manufacturer', } # Application-specific commands (ACMD) # Unlisted items are 'Reserved' as per SD spec. The 'Unknown' items don't # seem to be mentioned in the spec, but aren't marked as reserved either. acmd_names = { # 1-5: Reserved 6: 'SET_BUS_WIDTH', # 7-12: Reserved 13: 'SD_STATUS', 14: 'Reserved for Security Application', 15: 'Reserved for Security Application', 16: 'Reserved for Security Application', # 17: Reserved 18: 'Reserved for SD security applications', # 19-21: Reserved 22: 'SEND_NUM_WR_BLOCKS', 23: 'SET_WR_BLK_ERASE_COUNT', # 24: Reserved 25: 'Reserved for SD security applications', 26: 'Reserved for SD security applications', 27: 'Reserved for security specification', 28: 'Reserved for security specification', # 29: Reserved 30: 'Reserved for security specification', 31: 'Reserved for security specification', 32: 'Reserved for security specification', 33: 'Reserved for security specification', 34: 'Reserved for security specification', 35: 'Reserved for security specification', # 36-37: Reserved 38: 'Reserved for SD security applications', # 39-40: Reserved 41: 'SD_SEND_OP_COND', 42: 'SET_CLR_CARD_DETECT', 43: 'Reserved for SD security applications', 44: 'Reserved for SD security applications', 45: 'Reserved for SD security applications', 46: 'Reserved for SD security applications', 47: 'Reserved for SD security applications', 48: 'Reserved for SD security applications', 49: 'Reserved for SD security applications', 50: 'Unknown', 51: 'SEND_SCR', 52: 'Reserved for security specification', 53: 'Reserved for security specification', 54: 'Reserved for security specification', 55: 'Non-existant', # Doesn't exist (equivalent to CMD55) 56: 'Reserved for security specification', 57: 'Reserved for security specification', 58: 'Reserved for security specification', 59: 'Reserved for security specification', 60: 'Unknown', 61: 'Unknown', 62: 'Unknown', 63: 'Unknown', } accepted_voltages = { 0b0001: '2.7-3.6V', 0b0010: 'reserved for low voltage range', 0b0100: 'reserved', 0b1000: 'reserved', # All other values: "not defined". } card_status = { 0: 'Reserved for manufacturer test mode', 1: 'Reserved for manufacturer test mode', 2: 'Reserved for application specific commands', 3: 'AKE_SEQ_ERROR', 4: 'Reserved for SDIO card', 5: 'APP_CMD', 6: 'Unknown', 7: 'Unknown', 8: 'READY_FOR_DATA', 9: 'CURRENT_STATE', # CURRENT_STATE is a 4-bit value (decimal: 0..15). 10: 'CURRENT_STATE', 11: 'CURRENT_STATE', 12: 'CURRENT_STATE', 13: 'ERASE_RESET', 14: 'CARD_ECC_DISABLED', 15: 'WP_ERASE_SKIP', 16: 'CSD_OVERWRITE', 17: 'Reserved for DEFERRED_RESPONSE', # See eSD addendum 18: 'Reserved', 19: 'ERROR', 20: 'CC_ERROR', 21: 'CARD_ECC_FAILED', 22: 'ILLEGAL_COMMAND', 23: 'COM_CRC_ERROR', 24: 'LOCK_UNLOCK_FAILED', 25: 'CARD_IS_LOCKED', 26: 'WP_VIOLATION', 27: 'ERASE_PARAM', 28: 'ERASE_SEQ_ERROR', 29: 'BLOCK_LEN_ERROR', 30: 'ADDRESS_ERROR', 31: 'OUT_OF_RANGE', } sd_status = { # 311:0: Reserved for manufacturer # 391:312: Reserved } libsigrokdecode-0.5.0/decoders/common/sdcard/__init__.py0000644000175000017500000000142613117367246020234 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## from .mod import * libsigrokdecode-0.5.0/decoders/common/plugtrx/0000755000175000017500000000000013117367246016445 500000000000000libsigrokdecode-0.5.0/decoders/common/plugtrx/mod.py0000644000175000017500000001123113117367246017514 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # This module contains definitions for use by pluggable network adapters, # such as SFP, XFP etc. MODULE_ID = { 0x01: 'GBIC', 0x02: 'Integrated module/connector', 0x03: 'SFP', 0x04: '300-pin XBI', 0x05: 'XENPAK', 0x06: 'XFP', 0x07: 'XFF', 0x08: 'XFP-E', 0x09: 'XPAK', 0x0a: 'X2', } ALARM_THRESHOLDS = { 0: 'Temp high alarm', 2: 'Temp low alarm', 4: 'Temp high warning', 6: 'Temp low warning', 16: 'Bias high alarm', 18: 'Bias low alarm', 20: 'Bias high warning', 22: 'Bias low warning', 24: 'TX power high alarm', 26: 'TX power low alarm', 28: 'TX power high warning', 30: 'TX power low warning', 32: 'RX power high alarm', 34: 'RX power low alarm', 36: 'RX power high warning', 38: 'RX power low warning', 40: 'AUX 1 high alarm', 42: 'AUX 1 low alarm', 44: 'AUX 1 high warning', 46: 'AUX 1 low warning', 48: 'AUX 2 high alarm', 50: 'AUX 2 low alarm', 52: 'AUX 2 high warning', 54: 'AUX 2 low warning', } AD_READOUTS = { 0: 'Module temperature', 4: 'TX bias current', 6: 'Measured TX output power', 8: 'Measured RX input power', 10: 'AUX 1 measurement', 12: 'AUX 2 measurement', } GCS_BITS = [ 'TX disable', 'Soft TX disable', 'MOD_NR', 'P_Down', 'Soft P_Down', 'Interrupt', 'RX_LOS', 'Data_Not_Ready', 'TX_NR', 'TX_Fault', 'TX_CDR not locked', 'RX_NR', 'RX_CDR not locked', ] CONNECTOR = { 0x01: 'SC', 0x02: 'Fibre Channel style 1 copper', 0x03: 'Fibre Channel style 2 copper', 0x04: 'BNC/TNC', 0x05: 'Fibre Channel coax', 0x06: 'FiberJack', 0x07: 'LC', 0x08: 'MT-RJ', 0x09: 'MU', 0x0a: 'SG', 0x0b: 'Optical pigtail', 0x20: 'HSSDC II', 0x21: 'Copper pigtail', } TRANSCEIVER = [ # 10GB Ethernet ['10GBASE-SR', '10GBASE-LR', '10GBASE-ER', '10GBASE-LRM', '10GBASE-SW', '10GBASE-LW', '10GBASE-EW'], # 10GB Fibre Channel ['1200-MX-SN-I', '1200-SM-LL-L', 'Extended Reach 1550 nm', 'Intermediate reach 1300 nm FP'], # 10GB Copper [], # 10GB low speed ['1000BASE-SX / 1xFC MMF', '1000BASE-LX / 1xFC SMF', '2xFC MMF', '2xFC SMF', 'OC48-SR', 'OC48-IR', 'OC48-LR'], # 10GB SONET/SDH interconnect ['I-64.1r', 'I-64.1', 'I-64.2r', 'I-64.2', 'I-64.3', 'I-64.5'], # 10GB SONET/SDH short haul ['S-64.1', 'S-64.2a', 'S-64.2b', 'S-64.3a', 'S-64.3b', 'S-64.5a', 'S-64.5b'], # 10GB SONET/SDH long haul ['L-64.1', 'L-64.2a', 'L-64.2b', 'L-64.2c', 'L-64.3', 'G.959.1 P1L1-2D2'], # 10GB SONET/SDH very long haul ['V-64.2a', 'V-64.2b', 'V-64.3'], ] SERIAL_ENCODING = [ '64B/66B', '8B/10B', 'SONET scrambled', 'NRZ', 'RZ', ] XMIT_TECH = [ '850 nm VCSEL', '1310 nm VCSEL', '1550 nm VCSEL', '1310 nm FP', '1310 nm DFB', '1550 nm DFB', '1310 nm EML' '1550 nm EML' 'copper', ] CDR = [ '9.95Gb/s', '10.3Gb/s', '10.5Gb/s', '10.7Gb/s', '11.1Gb/s', '(unknown)', 'lineside loopback mode', 'XFI loopback mode', ] DEVICE_TECH = [ ['no wavelength control', 'sctive wavelength control'], ['uncooled transmitter device', 'cooled transmitter'], ['PIN detector', 'APD detector'], ['transmitter not tunable', 'transmitter tunable'], ] ENHANCED_OPTS = [ 'VPS', 'soft TX_DISABLE', 'soft P_Down', 'VPS LV regulator mode', 'VPS bypassed regulator mode', 'active FEC control', 'wavelength tunability', 'CMU', ] AUX_TYPES = [ 'not implemented', 'APD bias voltage', '(unknown)', 'TEC current', 'laser temperature', 'laser wavelength', '5V supply voltage', '3.3V supply voltage', '1.8V supply voltage', '-5.2V supply voltage', '5V supply current', '(unknown)', '(unknown)', '3.3V supply current', '1.8V supply current', '-5.2V supply current', ] libsigrokdecode-0.5.0/decoders/common/plugtrx/__init__.py0000644000175000017500000000141713117367246020501 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Bert Vermeulen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## from .mod import * libsigrokdecode-0.5.0/decoders/jitter/0000755000175000017500000000000013117367246014751 500000000000000libsigrokdecode-0.5.0/decoders/jitter/pd.py0000644000175000017500000001646413117367246015661 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Sebastien Bourdelin ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # Helper dictionary for edge detection. edge_detector = { 'rising': lambda x, y: bool(not x and y), 'falling': lambda x, y: bool(x and not y), 'both': lambda x, y: bool(x ^ y), } class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'jitter' name = 'Jitter' longname = 'Timing jitter calculation' desc = 'Retrieves the timing jitter between two digital signals.' license = 'gplv2+' inputs = ['logic'] outputs = ['jitter'] channels = ( {'id': 'clk', 'name': 'Clock', 'desc': 'Clock reference channel'}, {'id': 'sig', 'name': 'Resulting signal', 'desc': 'Resulting signal controlled by the clock'}, ) options = ( {'id': 'clk_polarity', 'desc': 'Clock edge polarity', 'default': 'rising', 'values': ('rising', 'falling', 'both')}, {'id': 'sig_polarity', 'desc': 'Resulting signal edge polarity', 'default': 'rising', 'values': ('rising', 'falling', 'both')}, ) annotations = ( ('jitter', 'Jitter value'), ('clk_missed', 'Clock missed'), ('sig_missed', 'Signal missed'), ) annotation_rows = ( ('jitter', 'Jitter values', (0,)), ('clk_missed', 'Clock missed', (1,)), ('sig_missed', 'Signal missed', (2,)), ) binary = ( ('ascii-float', 'Jitter values as newline-separated ASCII floats'), ) def __init__(self): self.state = 'CLK' self.samplerate = None self.oldclk, self.oldsig = 0, 0 self.clk_start = None self.sig_start = None self.clk_missed = 0 self.sig_missed = 0 def start(self): self.clk_edge = edge_detector[self.options['clk_polarity']] self.sig_edge = edge_detector[self.options['sig_polarity']] self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_clk_missed = self.register(srd.OUTPUT_META, meta=(int, 'Clock missed', 'Clock transition missed')) self.out_sig_missed = self.register(srd.OUTPUT_META, meta=(int, 'Signal missed', 'Resulting signal transition missed')) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value # Helper function for jitter time annotations. def putx(self, delta): # Adjust granularity. if delta == 0 or delta >= 1: delta_s = '%.1fs' % (delta) elif delta <= 1e-12: delta_s = '%.1ffs' % (delta * 1e15) elif delta <= 1e-9: delta_s = '%.1fps' % (delta * 1e12) elif delta <= 1e-6: delta_s = '%.1fns' % (delta * 1e9) elif delta <= 1e-3: delta_s = '%.1fμs' % (delta * 1e6) else: delta_s = '%.1fms' % (delta * 1e3) self.put(self.clk_start, self.sig_start, self.out_ann, [0, [delta_s]]) # Helper function for ASCII float jitter values (one value per line). def putb(self, delta): if delta is None: return # Format the delta to an ASCII float value terminated by a newline. x = str(delta) + '\n' self.put(self.clk_start, self.sig_start, self.out_binary, [0, x.encode('UTF-8')]) # Helper function for missed clock and signal annotations. def putm(self, data): self.put(self.samplenum, self.samplenum, self.out_ann, data) def handle_clk(self, clk, sig): if self.clk_start == self.samplenum: # Clock transition already treated. # We have done everything we can with this sample. return True if self.clk_edge(self.oldclk, clk): # Clock edge found. # We note the sample and move to the next state. self.clk_start = self.samplenum self.state = 'SIG' return False else: if self.sig_start is not None \ and self.sig_start != self.samplenum \ and self.sig_edge(self.oldsig, sig): # If any transition in the resulting signal # occurs while we are waiting for a clock, # we increase the missed signal counter. self.sig_missed += 1 self.put(self.samplenum, self.samplenum, self.out_sig_missed, self.sig_missed) self.putm([2, ['Missed signal', 'MS']]) # No clock edge found, we have done everything we # can with this sample. return True def handle_sig(self, clk, sig): if self.sig_start == self.samplenum: # Signal transition already treated. # We have done everything we can with this sample. return True if self.sig_edge(self.oldsig, sig): # Signal edge found. # We note the sample, calculate the jitter # and move to the next state. self.sig_start = self.samplenum self.state = 'CLK' # Calculate and report the timing jitter. delta = (self.sig_start - self.clk_start) / self.samplerate self.putx(delta) self.putb(delta) return False else: if self.clk_start != self.samplenum \ and self.clk_edge(self.oldclk, clk): # If any transition in the clock signal # occurs while we are waiting for a resulting # signal, we increase the missed clock counter. self.clk_missed += 1 self.put(self.samplenum, self.samplenum, self.out_clk_missed, self.clk_missed) self.putm([1, ['Missed clock', 'MC']]) # No resulting signal edge found, we have done # everything we can with this sample. return True def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: # Wait for a transition on CLK and/or SIG. clk, sig = self.wait([{0: 'e'}, {1: 'e'}]) # State machine: # For each sample we can move 2 steps forward in the state machine. while True: # Clock state has the lead. if self.state == 'CLK': if self.handle_clk(clk, sig): break if self.state == 'SIG': if self.handle_sig(clk, sig): break # Save current CLK/SIG values for the next round. self.oldclk, self.oldsig = clk, sig libsigrokdecode-0.5.0/decoders/jitter/__init__.py0000644000175000017500000000216613117367246017007 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Sebastien Bourdelin ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder retrieves the timing jitter between two digital signals. It allows to define a clock source channel and a resulting signal channel. Each time a significant edge is detected in the clock source, we calculate the elapsed time before the resulting signal answers and report the timing jitter. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ds28ea00/0000755000175000017500000000000013117367246014676 500000000000000libsigrokdecode-0.5.0/decoders/ds28ea00/pd.py0000644000175000017500000000573213117367246015602 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Iztok Jeras ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # Dictionary of FUNCTION commands and their names. command = { # Scratchpad 0x4e: 'Write scratchpad', 0xbe: 'Read scratchpad', 0x48: 'Copy scratchpad', # Thermometer 0x44: 'Convert temperature', 0xb4: 'Read power mode', 0xb8: 'Recall EEPROM', 0xf5: 'PIO access read', 0xA5: 'PIO access write', 0x99: 'Chain', } class Decoder(srd.Decoder): api_version = 2 id = 'ds28ea00' name = 'DS28EA00' longname = 'Maxim DS28EA00 1-Wire digital thermometer' desc = '1-Wire digital thermometer with Sequence Detect and PIO.' license = 'gplv2+' inputs = ['onewire_network'] outputs = ['ds28ea00'] annotations = ( ('text', 'Human-readable text'), ) def __init__(self): self.trn_beg = 0 self.trn_end = 0 self.state = 'ROM' self.rom = 0x0000000000000000 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def decode(self, ss, es, data): code, val = data self.ss, self.es = ss, es # State machine. if code == 'RESET/PRESENCE': self.putx([0, ['Reset/presence: %s' % ('true' if val else 'false')]]) self.state = 'ROM' elif code == 'ROM': self.rom = val self.putx([0, ['ROM: 0x%016x' % (val)]]) self.state = 'COMMAND' elif code == 'DATA': if self.state == 'COMMAND': if val not in command: self.putx([0, ['Unrecognized command: 0x%02x' % val]]) return self.putx([0, ['Function command: 0x%02x \'%s\'' % (val, command[val])]]) self.state = command[val].upper() elif self.state == 'READ SCRATCHPAD': self.putx([0, ['Scratchpad data: 0x%02x' % val]]) elif self.state == 'CONVERT TEMPERATURE': self.putx([0, ['Temperature conversion status: 0x%02x' % val]]) elif self.state in [s.upper() for s in command.values()]: self.putx([0, ['TODO \'%s\': 0x%02x' % (self.state, val)]]) libsigrokdecode-0.5.0/decoders/ds28ea00/__init__.py0000644000175000017500000000163213117367246016731 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'onewire_network' PD and decodes the Maxim DS28EA00 1-Wire digital thermometer protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/pwm/0000755000175000017500000000000013117367246014253 500000000000000libsigrokdecode-0.5.0/decoders/pwm/pd.py0000644000175000017500000001154113117367246015152 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Torsten Duwe ## Copyright (C) 2014 Sebastien Bourdelin ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 3 id = 'pwm' name = 'PWM' longname = 'Pulse-width modulation' desc = 'Analog level encoded in duty cycle percentage.' license = 'gplv2+' inputs = ['logic'] outputs = ['pwm'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high', 'values': ('active-low', 'active-high')}, ) annotations = ( ('duty-cycle', 'Duty cycle'), ('period', 'Period'), ) annotation_rows = ( ('duty-cycle', 'Duty cycle', (0,)), ('period', 'Period', (1,)), ) binary = ( ('raw', 'RAW file'), ) def __init__(self): self.ss_block = self.es_block = None self.first_samplenum = None self.start_samplenum = None self.end_samplenum = None self.num_cycles = 0 self.average = 0 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def start(self): self.startedge = 0 if self.options['polarity'] == 'active-low' else 1 self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_average = \ self.register(srd.OUTPUT_META, meta=(float, 'Average', 'PWM base (cycle) frequency')) def putx(self, data): self.put(self.ss_block, self.es_block, self.out_ann, data) def putp(self, period_t): # Adjust granularity. if period_t == 0 or period_t >= 1: period_s = '%.1f s' % (period_t) elif period_t <= 1e-12: period_s = '%.1f fs' % (period_t * 1e15) elif period_t <= 1e-9: period_s = '%.1f ps' % (period_t * 1e12) elif period_t <= 1e-6: period_s = '%.1f ns' % (period_t * 1e9) elif period_t <= 1e-3: period_s = '%.1f μs' % (period_t * 1e6) else: period_s = '%.1f ms' % (period_t * 1e3) self.put(self.ss_block, self.es_block, self.out_ann, [1, [period_s]]) def putb(self, data): self.put(self.num_cycles, self.num_cycles, self.out_binary, data) def decode(self): # Get the first rising edge. pin, = self.wait({0: 'e'}) if pin != self.startedge: pin, = self.wait({0: 'e'}) self.first_samplenum = self.samplenum self.start_samplenum = self.samplenum # Handle all next edges. while True: pin, = self.wait({0: 'e'}) if pin == self.startedge: # Rising edge # We are on a full cycle we can calculate # the period, the duty cycle and its ratio. period = self.samplenum - self.start_samplenum duty = self.end_samplenum - self.start_samplenum ratio = float(duty / period) # This interval starts at this edge. self.ss_block = self.start_samplenum # Store the new rising edge position and the ending # edge interval. self.start_samplenum = self.es_block = self.samplenum # Report the duty cycle in percent. percent = float(ratio * 100) self.putx([0, ['%f%%' % percent]]) # Report the duty cycle in the binary output. self.putb([0, bytes([int(ratio * 256)])]) # Report the period in units of time. period_t = float(period / self.samplerate) self.putp(period_t) # Update and report the new duty cycle average. self.num_cycles += 1 self.average += percent self.put(self.first_samplenum, self.es_block, self.out_average, float(self.average / self.num_cycles)) else: # Falling edge self.end_samplenum = self.ss_block = self.samplenum libsigrokdecode-0.5.0/decoders/pwm/__init__.py0000644000175000017500000000154113117367246016305 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Torsten Duwe ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' Pulse-width modulation (a.k.a pulse-duration modulation, PDM) decoder. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/spdif/0000755000175000017500000000000013117367246014555 500000000000000libsigrokdecode-0.5.0/decoders/spdif/pd.py0000644000175000017500000002130613117367246015454 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Guenther Wenninger ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'spdif' name = 'S/PDIF' longname = 'Sony/Philips Digital Interface Format' desc = 'Serial bus for connecting digital audio devices.' license = 'gplv2+' inputs = ['logic'] outputs = ['spdif'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) annotations = ( ('bitrate', 'Bitrate / baudrate'), ('preamble', 'Preamble'), ('bits', 'Bits'), ('aux', 'Auxillary-audio-databits'), ('samples', 'Audio Samples'), ('validity', 'Data Valid'), ('subcode', 'Subcode data'), ('chan_stat', 'Channnel Status'), ('parity', 'Parity Bit'), ) annotation_rows = ( ('info', 'Info', (0, 1, 3, 5, 6, 7, 8)), ('bits', 'Bits', (2,)), ('samples', 'Samples', (4,)), ) def putx(self, ss, es, data): self.put(ss, es, self.out_ann, data) def puty(self, data): self.put(self.ss_edge, self.samplenum, self.out_ann, data) def __init__(self): self.state = 'GET FIRST PULSE WIDTH' self.ss_edge = None self.first_edge = True self.samplenum_prev_edge = 0 self.pulse_width = 0 self.clocks = [] self.range1 = 0 self.range2 = 0 self.preamble_state = 0 self.preamble = [] self.seen_preamble = False self.last_preamble = 0 self.first_one = True self.subframe = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def get_pulse_type(self): if self.range1 == 0 or self.range2 == 0: return -1 if self.pulse_width >= self.range2: return 2 elif self.pulse_width >= self.range1: return 0 else: return 1 def find_first_pulse_width(self): if self.pulse_width != 0: self.clocks.append(self.pulse_width) self.state = 'GET SECOND PULSE WIDTH' def find_second_pulse_width(self): if self.pulse_width > (self.clocks[0] * 1.3) or \ self.pulse_width < (self.clocks[0] * 0.7): self.clocks.append(self.pulse_width) self.state = 'GET THIRD PULSE WIDTH' def find_third_pulse_width(self): if not ((self.pulse_width > (self.clocks[0] * 1.3) or \ self.pulse_width < (self.clocks[0] * 0.7)) \ and (self.pulse_width > (self.clocks[1] * 1.3) or \ self.pulse_width < (self.clocks[1] * 0.7))): return self.clocks.append(self.pulse_width) self.clocks.sort() self.range1 = (self.clocks[0] + self.clocks[1]) / 2 self.range2 = (self.clocks[1] + self.clocks[2]) / 2 spdif_bitrate = int(self.samplerate / (self.clocks[2] / 1.5)) self.ss_edge = 0 self.puty([0, ['Signal Bitrate: %d Mbit/s (=> %d kHz)' % \ (spdif_bitrate, (spdif_bitrate/ (2 * 32)))]]) clock_period_nsec = 1000000000 / spdif_bitrate self.last_preamble = self.samplenum # We are done recovering the clock, now let's decode the data stream. self.state = 'DECODE STREAM' def decode_stream(self): pulse = self.get_pulse_type() if not self.seen_preamble: # This is probably the start of a preamble, decode it. if pulse == 2: self.preamble.append(self.get_pulse_type()) self.state = 'DECODE PREAMBLE' self.ss_edge = self.samplenum - self.pulse_width - 1 return # We've seen a preamble. if pulse == 1 and self.first_one: self.first_one = False self.subframe.append([pulse, self.samplenum - \ self.pulse_width - 1, self.samplenum]) elif pulse == 1 and not self.first_one: self.subframe[-1][2] = self.samplenum self.putx(self.subframe[-1][1], self.samplenum, [2, ['1']]) self.bitcount += 1 self.first_one = True else: self.subframe.append([pulse, self.samplenum - \ self.pulse_width - 1, self.samplenum]) self.putx(self.samplenum - self.pulse_width - 1, self.samplenum, [2, ['0']]) self.bitcount += 1 if self.bitcount == 28: aux_audio_data = self.subframe[0:4] sam, sam_rot = '', '' for a in aux_audio_data: sam = sam + str(a[0]) sam_rot = str(a[0]) + sam_rot sample = self.subframe[4:24] for s in sample: sam = sam + str(s[0]) sam_rot = str(s[0]) + sam_rot validity = self.subframe[24:25] subcode_data = self.subframe[25:26] channel_status = self.subframe[26:27] parity = self.subframe[27:28] self.putx(aux_audio_data[0][1], aux_audio_data[3][2], \ [3, ['Aux 0x%x' % int(sam, 2), '0x%x' % int(sam, 2)]]) self.putx(sample[0][1], sample[19][2], \ [3, ['Sample 0x%x' % int(sam, 2), '0x%x' % int(sam, 2)]]) self.putx(aux_audio_data[0][1], sample[19][2], \ [4, ['Audio 0x%x' % int(sam_rot, 2), '0x%x' % int(sam_rot, 2)]]) if validity[0][0] == 0: self.putx(validity[0][1], validity[0][2], [5, ['V']]) else: self.putx(validity[0][1], validity[0][2], [5, ['E']]) self.putx(subcode_data[0][1], subcode_data[0][2], [6, ['S: %d' % subcode_data[0][0]]]) self.putx(channel_status[0][1], channel_status[0][2], [7, ['C: %d' % channel_status[0][0]]]) self.putx(parity[0][1], parity[0][2], [8, ['P: %d' % parity[0][0]]]) self.subframe = [] self.seen_preamble = False self.bitcount = 0 def decode_preamble(self): if self.preamble_state == 0: self.preamble.append(self.get_pulse_type()) self.preamble_state = 1 elif self.preamble_state == 1: self.preamble.append(self.get_pulse_type()) self.preamble_state = 2 elif self.preamble_state == 2: self.preamble.append(self.get_pulse_type()) self.preamble_state = 0 self.state = 'DECODE STREAM' if self.preamble == [2, 0, 1, 0]: self.puty([1, ['Preamble W', 'W']]) elif self.preamble == [2, 2, 1, 1]: self.puty([1, ['Preamble M', 'M']]) elif self.preamble == [2, 1, 1, 2]: self.puty([1, ['Preamble B', 'B']]) else: self.puty([1, ['Unknown Preamble', 'Unknown Prea.', 'U']]) self.preamble = [] self.seen_preamble = True self.bitcount = 0 self.first_one = True self.last_preamble = self.samplenum def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') # Throw away first detected edge as it might be mangled data. self.wait({0: 'e'}) while True: # Wait for any edge (rising or falling). (data,) = self.wait({0: 'e'}) self.pulse_width = self.samplenum - self.samplenum_prev_edge - 1 self.samplenum_prev_edge = self.samplenum if self.state == 'GET FIRST PULSE WIDTH': self.find_first_pulse_width() elif self.state == 'GET SECOND PULSE WIDTH': self.find_second_pulse_width() elif self.state == 'GET THIRD PULSE WIDTH': self.find_third_pulse_width() elif self.state == 'DECODE STREAM': self.decode_stream() elif self.state == 'DECODE PREAMBLE': self.decode_preamble() libsigrokdecode-0.5.0/decoders/spdif/__init__.py0000644000175000017500000000160613117367246016611 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Guenther Wenninger ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' S/PDIF (Sony/Philips Digital Interface Format) is a serial bus for transmitting audio data. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/tca6408a/0000755000175000017500000000000013117367246014702 500000000000000libsigrokdecode-0.5.0/decoders/tca6408a/pd.py0000644000175000017500000001067513117367246015610 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## Copyright (C) 2013 Matt Ranostay ## Copyright (C) 2014 alberink ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'tca6408a' name = 'TI TCA6408A' longname = 'Texas Instruments TCA6408A' desc = 'Texas Instruments TCA6408A 8-bit I²C I/O expander.' license = 'gplv2+' inputs = ['i2c'] outputs = ['tca6408a'] annotations = ( ('register', 'Register type'), ('value', 'Register value'), ('warnings', 'Warning messages'), ) annotation_rows = ( ('regs', 'Registers', (0, 1)), ('warnings', 'Warnings', (2,)), ) def __init__(self): self.state = 'IDLE' self.chip = -1 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def handle_reg_0x00(self, b): self.putx([1, ['State of inputs: %02X' % b]]) def handle_reg_0x01(self, b): self.putx([1, ['Outputs set: %02X' % b ]]) def handle_reg_0x02(self, b): self.putx([1, ['Polarity inverted: %02X' % b]]) def handle_reg_0x03(self, b): self.putx([1, ['Configuration: %02X' % b]]) def handle_write_reg(self, b): if b == 0: self.putx([0, ['Input port', 'In', 'I']]) elif b == 1: self.putx([0, ['Output port', 'Out', 'O']]) elif b == 2: self.putx([0, ['Polarity inversion register', 'Pol', 'P']]) elif b == 3: self.putx([0, ['Configuration register', 'Conf', 'C']]) def check_correct_chip(self, addr): if addr not in (0x20, 0x21): self.putx([2, ['Warning: I²C slave 0x%02X not a TCA6408A ' 'compatible chip.' % addr]]) self.state = 'IDLE' def decode(self, ss, es, data): cmd, databyte = data # Store the start/end samples of this I²C packet. self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Wait for an I²C START condition. if cmd != 'START': return self.state = 'GET SLAVE ADDR' elif self.state == 'GET SLAVE ADDR': self.chip = databyte self.state = 'GET REG ADDR' elif self.state == 'GET REG ADDR': # Wait for a data write (master selects the slave register). if cmd in ('ADDRESS READ', 'ADDRESS WRITE'): self.check_correct_chip(databyte) if cmd != 'DATA WRITE': return self.reg = databyte self.handle_write_reg(self.reg) self.state = 'WRITE IO REGS' elif self.state == 'WRITE IO REGS': # If we see a Repeated Start here, the master wants to read. if cmd == 'START REPEAT': self.state = 'READ IO REGS' return # Otherwise: Get data bytes until a STOP condition occurs. if cmd == 'DATA WRITE': handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) elif cmd == 'STOP': self.state = 'IDLE' self.chip = -1 elif self.state == 'READ IO REGS': # Wait for an address read operation. if cmd == 'ADDRESS READ': self.state = 'READ IO REGS2' self.chip = databyte return elif self.state == 'READ IO REGS2': if cmd == 'DATA READ': handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) elif cmd == 'STOP': self.state = 'IDLE' libsigrokdecode-0.5.0/decoders/tca6408a/__init__.py0000644000175000017500000000163013117367246016733 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 alberink ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the Texas Instruments TCA6408A 8-bit I²C I/O expander protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ds1307/0000755000175000017500000000000013117367246014371 500000000000000libsigrokdecode-0.5.0/decoders/ds1307/pd.py0000644000175000017500000002245113117367246015272 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## Copyright (C) 2013 Matt Ranostay ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import re import sigrokdecode as srd from common.srdhelper import bcd2int days_of_week = ( 'Sunday', 'Monday', 'Tuesday', 'Wednesday', 'Thursday', 'Friday', 'Saturday', ) regs = ( 'Seconds', 'Minutes', 'Hours', 'Day', 'Date', 'Month', 'Year', 'Control', 'RAM', ) bits = ( 'Clock halt', 'Seconds', 'Reserved', 'Minutes', '12/24 hours', 'AM/PM', 'Hours', 'Day', 'Date', 'Month', 'Year', 'OUT', 'SQWE', 'RS', 'RAM', ) rates = { 0b00: '1Hz', 0b01: '4096kHz', 0b10: '8192kHz', 0b11: '32768kHz', } DS1307_I2C_ADDRESS = 0x68 def regs_and_bits(): l = [('reg-' + r.lower(), r + ' register') for r in regs] l += [('bit-' + re.sub('\/| ', '-', b).lower(), b + ' bit') for b in bits] return tuple(l) class Decoder(srd.Decoder): api_version = 2 id = 'ds1307' name = 'DS1307' longname = 'Dallas DS1307' desc = 'Realtime clock module protocol.' license = 'gplv2+' inputs = ['i2c'] outputs = ['ds1307'] annotations = regs_and_bits() + ( ('read-datetime', 'Read date/time'), ('write-datetime', 'Write date/time'), ('reg-read', 'Register read'), ('reg-write', 'Register write'), ('warnings', 'Warnings'), ) annotation_rows = ( ('bits', 'Bits', tuple(range(9, 24))), ('regs', 'Registers', tuple(range(9))), ('date-time', 'Date/time', (24, 25, 26, 27)), ('warnings', 'Warnings', (28,)), ) def __init__(self): self.state = 'IDLE' self.hours = -1 self.minutes = -1 self.seconds = -1 self.days = -1 self.date = -1 self.months = -1 self.years = -1 self.bits = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def putd(self, bit1, bit2, data): self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data) def putr(self, bit): self.put(self.bits[bit][1], self.bits[bit][2], self.out_ann, [11, ['Reserved bit', 'Reserved', 'Rsvd', 'R']]) def handle_reg_0x00(self, b): # Seconds (0-59) / Clock halt bit self.putd(7, 0, [0, ['Seconds', 'Sec', 'S']]) ch = 1 if (b & (1 << 7)) else 0 self.putd(7, 7, [9, ['Clock halt: %d' % ch, 'Clk hlt: %d' % ch, 'CH: %d' % ch, 'CH']]) s = self.seconds = bcd2int(b & 0x7f) self.putd(6, 0, [10, ['Second: %d' % s, 'Sec: %d' % s, 'S: %d' % s, 'S']]) def handle_reg_0x01(self, b): # Minutes (0-59) self.putd(7, 0, [1, ['Minutes', 'Min', 'M']]) self.putr(7) m = self.minutes = bcd2int(b & 0x7f) self.putd(6, 0, [12, ['Minute: %d' % m, 'Min: %d' % m, 'M: %d' % m, 'M']]) def handle_reg_0x02(self, b): # Hours (1-12+AM/PM or 0-23) self.putd(7, 0, [2, ['Hours', 'H']]) self.putr(7) ampm_mode = True if (b & (1 << 6)) else False if ampm_mode: self.putd(6, 6, [13, ['12-hour mode', '12h mode', '12h']]) a = 'AM' if (b & (1 << 6)) else 'PM' self.putd(5, 5, [14, [a, a[0]]]) h = self.hours = bcd2int(b & 0x1f) self.putd(4, 0, [15, ['Hour: %d' % h, 'H: %d' % h, 'H']]) else: self.putd(6, 6, [13, ['24-hour mode', '24h mode', '24h']]) h = self.hours = bcd2int(b & 0x3f) self.putd(5, 0, [15, ['Hour: %d' % h, 'H: %d' % h, 'H']]) def handle_reg_0x03(self, b): # Day / day of week (1-7) self.putd(7, 0, [3, ['Day of week', 'Day', 'D']]) for i in (7, 6, 5, 4, 3): self.putr(i) w = self.days = bcd2int(b & 0x07) ws = days_of_week[self.days - 1] self.putd(2, 0, [16, ['Weekday: %s' % ws, 'WD: %s' % ws, 'WD', 'W']]) def handle_reg_0x04(self, b): # Date (1-31) self.putd(7, 0, [4, ['Date', 'D']]) for i in (7, 6): self.putr(i) d = self.date = bcd2int(b & 0x3f) self.putd(5, 0, [17, ['Date: %d' % d, 'D: %d' % d, 'D']]) def handle_reg_0x05(self, b): # Month (1-12) self.putd(7, 0, [5, ['Month', 'Mon', 'M']]) for i in (7, 6, 5): self.putr(i) m = self.months = bcd2int(b & 0x1f) self.putd(4, 0, [18, ['Month: %d' % m, 'Mon: %d' % m, 'M: %d' % m, 'M']]) def handle_reg_0x06(self, b): # Year (0-99) self.putd(7, 0, [6, ['Year', 'Y']]) y = self.years = bcd2int(b & 0xff) self.years += 2000 self.putd(7, 0, [19, ['Year: %d' % y, 'Y: %d' % y, 'Y']]) def handle_reg_0x07(self, b): # Control Register self.putd(7, 0, [7, ['Control', 'Ctrl', 'C']]) for i in (6, 5, 3, 2): self.putr(i) o = 1 if (b & (1 << 7)) else 0 s = 1 if (b & (1 << 4)) else 0 s2 = 'en' if (b & (1 << 4)) else 'dis' r = rates[b & 0x03] self.putd(7, 7, [20, ['Output control: %d' % o, 'OUT: %d' % o, 'O: %d' % o, 'O']]) self.putd(4, 4, [21, ['Square wave output: %sabled' % s2, 'SQWE: %sabled' % s2, 'SQWE: %d' % s, 'S: %d' % s, 'S']]) self.putd(1, 0, [22, ['Square wave output rate: %s' % r, 'Square wave rate: %s' % r, 'SQW rate: %s' % r, 'Rate: %s' % r, 'RS: %s' % s, 'RS', 'R']]) def handle_reg_0x3f(self, b): # RAM (bytes 0x08-0x3f) self.putd(7, 0, [8, ['RAM', 'R']]) self.putd(7, 0, [23, ['SRAM: 0x%02X' % b, '0x%02X' % b]]) def output_datetime(self, cls, rw): # TODO: Handle read/write of only parts of these items. d = '%s, %02d.%02d.%4d %02d:%02d:%02d' % ( days_of_week[self.days - 1], self.date, self.months, self.years, self.hours, self.minutes, self.seconds) self.put(self.ss_block, self.es, self.out_ann, [cls, ['%s date/time: %s' % (rw, d)]]) def handle_reg(self, b): r = self.reg if self.reg < 8 else 0x3f fn = getattr(self, 'handle_reg_0x%02x' % r) fn(b) # Honor address auto-increment feature of the DS1307. When the # address reaches 0x3f, it will wrap around to address 0. self.reg += 1 if self.reg > 0x3f: self.reg = 0 def is_correct_chip(self, addr): if addr == DS1307_I2C_ADDRESS: return True self.put(self.ss_block, self.es, self.out_ann, [28, ['Ignoring non-DS1307 data (slave 0x%02X)' % addr]]) return False def decode(self, ss, es, data): cmd, databyte = data # Collect the 'BITS' packet, then return. The next packet is # guaranteed to belong to these bits we just stored. if cmd == 'BITS': self.bits = databyte return # Store the start/end samples of this I²C packet. self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Wait for an I²C START condition. if cmd != 'START': return self.state = 'GET SLAVE ADDR' self.ss_block = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address write operation. if cmd != 'ADDRESS WRITE': return if not self.is_correct_chip(databyte): self.state = 'IDLE' return self.state = 'GET REG ADDR' elif self.state == 'GET REG ADDR': # Wait for a data write (master selects the slave register). if cmd != 'DATA WRITE': return self.reg = databyte self.state = 'WRITE RTC REGS' elif self.state == 'WRITE RTC REGS': # If we see a Repeated Start here, it's an RTC read. if cmd == 'START REPEAT': self.state = 'READ RTC REGS' return # Otherwise: Get data bytes until a STOP condition occurs. if cmd == 'DATA WRITE': self.handle_reg(databyte) elif cmd == 'STOP': self.output_datetime(25, 'Written') self.state = 'IDLE' elif self.state == 'READ RTC REGS': # Wait for an address read operation. if cmd != 'ADDRESS READ': return if not self.is_correct_chip(databyte): self.state = 'IDLE' return self.state = 'READ RTC REGS2' elif self.state == 'READ RTC REGS2': if cmd == 'DATA READ': self.handle_reg(databyte) elif cmd == 'STOP': self.output_datetime(24, 'Read') self.state = 'IDLE' libsigrokdecode-0.5.0/decoders/ds1307/__init__.py0000644000175000017500000000164213117367246016425 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013 Matt Ranostay ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the Dallas DS1307 real-time clock (RTC) specific registers and commands. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/am230x/0000755000175000017500000000000013117367246014462 500000000000000libsigrokdecode-0.5.0/decoders/am230x/pd.py0000644000175000017500000001747713117367246015377 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Johannes Roemer ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # Define valid timing values (in microseconds). timing = { 'START LOW' : {'min': 750, 'max': 25000}, 'START HIGH' : {'min': 10, 'max': 10000}, 'RESPONSE LOW' : {'min': 50, 'max': 90}, 'RESPONSE HIGH' : {'min': 50, 'max': 90}, 'BIT LOW' : {'min': 45, 'max': 90}, 'BIT 0 HIGH' : {'min': 20, 'max': 35}, 'BIT 1 HIGH' : {'min': 65, 'max': 80}, } class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'am230x' name = 'AM230x/DHTxx/RHTxx' longname = 'Aosong AM230x/DHTxx/RHTxx' desc = 'Aosong AM230x/DHTxx/RHTxx humidity/temperature sensor protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['am230x'] channels = ( {'id': 'sda', 'name': 'SDA', 'desc': 'Single wire serial data line'}, ) options = ( {'id': 'device', 'desc': 'Device type', 'default': 'am230x', 'values': ('am230x/rht', 'dht11')}, ) annotations = ( ('start', 'Start'), ('response', 'Response'), ('bit', 'Bit'), ('end', 'End'), ('byte', 'Byte'), ('humidity', 'Relative humidity in percent'), ('temperature', 'Temperature in degrees Celsius'), ('checksum', 'Checksum'), ) annotation_rows = ( ('bits', 'Bits', (0, 1, 2, 3)), ('bytes', 'Bytes', (4,)), ('results', 'Results', (5, 6, 7)), ) def putfs(self, data): self.put(self.fall, self.samplenum, self.out_ann, data) def putb(self, data): self.put(self.bytepos[-1], self.samplenum, self.out_ann, data) def putv(self, data): self.put(self.bytepos[-2], self.samplenum, self.out_ann, data) def reset(self): self.state = 'WAIT FOR START LOW' self.fall = 0 self.rise = 0 self.bits = [] self.bytepos = [] def is_valid(self, name): dt = 0 if name.endswith('LOW'): dt = self.samplenum - self.fall elif name.endswith('HIGH'): dt = self.samplenum - self.rise if dt >= self.cnt[name]['min'] and dt <= self.cnt[name]['max']: return True return False def bits2num(self, bitlist): number = 0 for i in range(len(bitlist)): number += bitlist[-1 - i] * 2**i return number def calculate_humidity(self, bitlist): h = 0 if self.options['device'] == 'dht11': h = self.bits2num(bitlist[0:8]) else: h = self.bits2num(bitlist) / 10 return h def calculate_temperature(self, bitlist): t = 0 if self.options['device'] == 'dht11': t = self.bits2num(bitlist[0:8]) else: t = self.bits2num(bitlist[1:]) / 10 if bitlist[0] == 1: t = -t return t def calculate_checksum(self, bitlist): checksum = 0 for i in range(8, len(bitlist) + 1, 8): checksum += self.bits2num(bitlist[i-8:i]) return checksum % 256 def __init__(self): self.samplerate = None self.reset() def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key != srd.SRD_CONF_SAMPLERATE: return self.samplerate = value # Convert microseconds to sample counts. self.cnt = {} for e in timing: self.cnt[e] = {} for t in timing[e]: self.cnt[e][t] = timing[e][t] * self.samplerate / 1000000 def handle_byte(self, bit): self.bits.append(bit) self.putfs([2, ['Bit: %d' % bit, '%d' % bit]]) self.fall = self.samplenum self.state = 'WAIT FOR BIT HIGH' if len(self.bits) % 8 == 0: byte = self.bits2num(self.bits[-8:]) self.putb([4, ['Byte: %#04x' % byte, '%#04x' % byte]]) if len(self.bits) == 16: h = self.calculate_humidity(self.bits[-16:]) self.putv([5, ['Humidity: %.1f %%' % h, 'RH = %.1f %%' % h]]) elif len(self.bits) == 32: t = self.calculate_temperature(self.bits[-16:]) self.putv([6, ['Temperature: %.1f °C' % t, 'T = %.1f °C' % t]]) elif len(self.bits) == 40: parity = self.bits2num(self.bits[-8:]) if parity == self.calculate_checksum(self.bits[0:32]): self.putb([7, ['Checksum: OK', 'OK']]) else: self.putb([7, ['Checksum: not OK', 'NOK']]) self.state = 'WAIT FOR END' self.bytepos.append(self.samplenum) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: # State machine. if self.state == 'WAIT FOR START LOW': self.wait({0: 'f'}) self.fall = self.samplenum self.state = 'WAIT FOR START HIGH' elif self.state == 'WAIT FOR START HIGH': self.wait({0: 'r'}) if self.is_valid('START LOW'): self.rise = self.samplenum self.state = 'WAIT FOR RESPONSE LOW' else: self.reset() elif self.state == 'WAIT FOR RESPONSE LOW': self.wait({0: 'f'}) if self.is_valid('START HIGH'): self.putfs([0, ['Start', 'S']]) self.fall = self.samplenum self.state = 'WAIT FOR RESPONSE HIGH' else: self.reset() elif self.state == 'WAIT FOR RESPONSE HIGH': self.wait({0: 'r'}) if self.is_valid('RESPONSE LOW'): self.rise = self.samplenum self.state = 'WAIT FOR FIRST BIT' else: self.reset() elif self.state == 'WAIT FOR FIRST BIT': self.wait({0: 'f'}) if self.is_valid('RESPONSE HIGH'): self.putfs([1, ['Response', 'R']]) self.fall = self.samplenum self.bytepos.append(self.samplenum) self.state = 'WAIT FOR BIT HIGH' else: self.reset() elif self.state == 'WAIT FOR BIT HIGH': self.wait({0: 'r'}) if self.is_valid('BIT LOW'): self.rise = self.samplenum self.state = 'WAIT FOR BIT LOW' else: self.reset() elif self.state == 'WAIT FOR BIT LOW': self.wait({0: 'f'}) if self.is_valid('BIT 0 HIGH'): bit = 0 elif self.is_valid('BIT 1 HIGH'): bit = 1 else: self.reset() continue self.handle_byte(bit) elif self.state == 'WAIT FOR END': self.wait({0: 'r'}) self.putfs([3, ['End', 'E']]) self.reset() libsigrokdecode-0.5.0/decoders/am230x/__init__.py0000644000175000017500000000251713117367246016520 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Johannes Roemer ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder handles the proprietary single wire communication protocol used by the Aosong AM230x/DHTxx/RHTxx series of digital humidity and temperature sensors. Sample rate: A sample rate of at least 200kHz is recommended to properly detect all the elements of the protocol. Options: The AM230x and DHTxx/RHTxx digital humidity and temperature sensors use the same single-wire protocol with different encoding of the measured values. Therefore the option 'device' must be used to properly decode the communication of the respective sensor. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/lm75/0000755000175000017500000000000013117367246014234 500000000000000libsigrokdecode-0.5.0/decoders/lm75/pd.py0000644000175000017500000001463013117367246015135 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # TODO: Better support for various LM75 compatible devices. import sigrokdecode as srd # LM75 only supports 9 bit resolution, compatible devices usually 9-12 bits. resolution = { # CONFIG[6:5]: 0x00: 9, 0x01: 10, 0x02: 11, 0x03: 12, } ft = { # CONFIG[4:3]: 0x00: 1, 0x01: 2, 0x02: 4, 0x03: 6, } class Decoder(srd.Decoder): api_version = 2 id = 'lm75' name = 'LM75' longname = 'National LM75' desc = 'National LM75 (and compatibles) temperature sensor.' license = 'gplv2+' inputs = ['i2c'] outputs = ['lm75'] options = ( {'id': 'sensor', 'desc': 'Sensor type', 'default': 'lm75', 'values': ('lm75',)}, {'id': 'resolution', 'desc': 'Resolution (bits)', 'default': 9, 'values': (9, 10, 11, 12)}, ) annotations = ( ('celsius', 'Temperature in degrees Celsius'), ('kelvin', 'Temperature in Kelvin'), ('text-verbose', 'Human-readable text (verbose)'), ('text', 'Human-readable text'), ('warnings', 'Human-readable warnings'), ) def __init__(self): self.state = 'IDLE' self.reg = 0x00 # Currently selected register self.databytes = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): # Helper for annotations which span exactly one I²C packet. self.put(self.ss, self.es, self.out_ann, data) def putb(self, data): # Helper for annotations which span a block of I²C packets. self.put(self.ss_block, self.es_block, self.out_ann, data) def warn_upon_invalid_slave(self, addr): # LM75 and compatible devices have a 7-bit I²C slave address where # the 4 MSBs are fixed to 1001, and the 3 LSBs are configurable. # Thus, valid slave addresses (1001xxx) range from 0x48 to 0x4f. if addr not in range(0x48, 0x4f + 1): s = 'Warning: I²C slave 0x%02x not an LM75 compatible sensor.' self.putx([4, [s % addr]]) def output_temperature(self, s, rw): # TODO: Support for resolutions other than 9 bit. before, after = self.databytes[0], (self.databytes[1] >> 7) * 5 celsius = float('%d.%d' % (before, after)) kelvin = celsius + 273.15 self.putb([0, ['%s: %.1f °C' % (s, celsius)]]) self.putb([1, ['%s: %.1f K' % (s, kelvin)]]) # Warn about the temperature register (0x00) being read-only. if s == 'Temperature' and rw == 'WRITE': s = 'Warning: The temperature register is read-only!' self.putb([4, [s]]) def handle_temperature_reg(self, b, s, rw): # Common helper for the temperature/T_HYST/T_OS registers. if len(self.databytes) == 0: self.ss_block = self.ss self.databytes.append(b) return self.databytes.append(b) self.es_block = self.es self.output_temperature(s, rw) self.databytes = [] def handle_reg_0x00(self, b, rw): # Temperature register (16bits, read-only). self.handle_temperature_reg(b, 'Temperature', rw) def handle_reg_0x01(self, b, rw): # Configuration register (8 bits, read/write). # TODO: Bit-exact annotation ranges. sd = b & (1 << 0) tmp = 'normal operation' if (sd == 0) else 'shutdown mode' s = 'SD = %d: %s\n' % (sd, tmp) s2 = 'SD = %s, ' % tmp cmp_int = b & (1 << 1) tmp = 'comparator' if (cmp_int == 0) else 'interrupt' s += 'CMP/INT = %d: %s mode\n' % (cmp_int, tmp) s2 += 'CMP/INT = %s, ' % tmp pol = b & (1 << 2) tmp = 'low' if (pol == 0) else 'high' s += 'POL = %d: OS polarity is active-%s\n' % (pol, tmp) s2 += 'POL = active-%s, ' % tmp bits = (b & ((1 << 4) | (1 << 3))) >> 3 s += 'Fault tolerance setting: %d bit(s)\n' % ft[bits] s2 += 'FT = %d' % ft[bits] # Not supported by LM75, but by various compatible devices. if self.options['sensor'] != 'lm75': # TODO bits = (b & ((1 << 6) | (1 << 5))) >> 5 s += 'Resolution: %d bits\n' % resolution[bits] s2 += ', resolution = %d' % resolution[bits] self.putx([2, [s]]) self.putx([3, [s2]]) def handle_reg_0x02(self, b, rw): # T_HYST register (16 bits, read/write). self.handle_temperature_reg(b, 'T_HYST trip temperature', rw) def handle_reg_0x03(self, b, rw): # T_OS register (16 bits, read/write). self.handle_temperature_reg(b, 'T_OS trip temperature', rw) def decode(self, ss, es, data): cmd, databyte = data # Store the start/end samples of this I²C packet. self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Wait for an I²C START condition. if cmd != 'START': return self.state = 'GET SLAVE ADDR' elif self.state == 'GET SLAVE ADDR': # Wait for an address read/write operation. if cmd in ('ADDRESS READ', 'ADDRESS WRITE'): self.warn_upon_invalid_slave(databyte) self.state = cmd[8:] + ' REGS' # READ REGS / WRITE REGS elif self.state in ('READ REGS', 'WRITE REGS'): if cmd in ('DATA READ', 'DATA WRITE'): handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte, cmd[5:]) # READ / WRITE elif cmd == 'STOP': # TODO: Any output? self.state = 'IDLE' else: # self.putx([0, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) pass libsigrokdecode-0.5.0/decoders/lm75/__init__.py0000644000175000017500000000162713117367246016273 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the National LM75 (and compatibles) temperature sensor protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/usb_signalling/0000755000175000017500000000000013117367246016450 500000000000000libsigrokdecode-0.5.0/decoders/usb_signalling/pd.py0000644000175000017500000002647413117367246017362 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2011 Gareth McMullin ## Copyright (C) 2012-2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd ''' OUTPUT_PYTHON format: Packet: [, ] , : - 'SOP', None - 'SYM', - 'BIT', - 'STUFF BIT', None - 'EOP', None - 'ERR', None - 'KEEP ALIVE', None - 'RESET', None : - 'J', 'K', 'SE0', or 'SE1' : - '0' or '1' - Note: Symbols like SE0, SE1, and the J that's part of EOP don't yield 'BIT'. ''' # Low-/full-speed symbols. # Note: Low-speed J and K are inverted compared to the full-speed J and K! symbols = { 'low-speed': { # (, ): (0, 0): 'SE0', (1, 0): 'K', (0, 1): 'J', (1, 1): 'SE1', }, 'full-speed': { # (, ): (0, 0): 'SE0', (1, 0): 'J', (0, 1): 'K', (1, 1): 'SE1', }, 'automatic': { # (, ): (0, 0): 'SE0', (1, 0): 'FS_J', (0, 1): 'LS_J', (1, 1): 'SE1', }, # After a PREamble PID, the bus segment between Host and Hub uses LS # signalling rate and FS signalling polarity (USB 2.0 spec, 11.8.4: "For # both upstream and downstream low-speed data, the hub is responsible for # inverting the polarity of the data before transmitting to/from a # low-speed port."). 'low-speed-rp': { # (, ): (0, 0): 'SE0', (1, 0): 'J', (0, 1): 'K', (1, 1): 'SE1', }, } bitrates = { 'low-speed': 1500000, # 1.5Mb/s (+/- 1.5%) 'low-speed-rp': 1500000, # 1.5Mb/s (+/- 1.5%) 'full-speed': 12000000, # 12Mb/s (+/- 0.25%) 'automatic': None } sym_annotation = { 'J': [0, ['J']], 'K': [1, ['K']], 'SE0': [2, ['SE0', '0']], 'SE1': [3, ['SE1', '1']], } class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 2 id = 'usb_signalling' name = 'USB signalling' longname = 'Universal Serial Bus (LS/FS) signalling' desc = 'USB (low-speed and full-speed) signalling protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['usb_signalling'] channels = ( {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'}, {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'}, ) options = ( {'id': 'signalling', 'desc': 'Signalling', 'default': 'automatic', 'values': ('automatic', 'full-speed', 'low-speed')}, ) annotations = ( ('sym-j', 'J symbol'), ('sym-k', 'K symbol'), ('sym-se0', 'SE0 symbol'), ('sym-se1', 'SE1 symbol'), ('sop', 'Start of packet (SOP)'), ('eop', 'End of packet (EOP)'), ('bit', 'Bit'), ('stuffbit', 'Stuff bit'), ('error', 'Error'), ('keep-alive', 'Low-speed keep-alive'), ('reset', 'Reset'), ) annotation_rows = ( ('bits', 'Bits', (4, 5, 6, 7, 8, 9, 10)), ('symbols', 'Symbols', (0, 1, 2, 3)), ) def __init__(self): self.samplerate = None self.oldsym = 'J' # The "idle" state is J. self.ss_block = None self.samplenum = 0 self.bitrate = None self.bitwidth = None self.samplepos = None self.samplenum_target = None self.samplenum_edge = None self.samplenum_lastedge = 0 self.oldpins = None self.edgepins = None self.consecutive_ones = 0 self.bits = None self.state = 'INIT' def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.signalling = self.options['signalling'] if self.signalling != 'automatic': self.update_bitrate() def update_bitrate(self): self.bitrate = bitrates[self.signalling] self.bitwidth = float(self.samplerate) / float(self.bitrate) def putpx(self, data): s = self.samplenum_edge self.put(s, s, self.out_python, data) def putx(self, data): s = self.samplenum_edge self.put(s, s, self.out_ann, data) def putpm(self, data): e = self.samplenum_edge self.put(self.ss_block, e, self.out_python, data) def putm(self, data): e = self.samplenum_edge self.put(self.ss_block, e, self.out_ann, data) def putpb(self, data): s, e = self.samplenum_lastedge, self.samplenum_edge self.put(s, e, self.out_python, data) def putb(self, data): s, e = self.samplenum_lastedge, self.samplenum_edge self.put(s, e, self.out_ann, data) def set_new_target_samplenum(self): self.samplepos += self.bitwidth; self.samplenum_target = int(self.samplepos) self.samplenum_lastedge = self.samplenum_edge self.samplenum_edge = int(self.samplepos - (self.bitwidth / 2)) def wait_for_sop(self, sym): # Wait for a Start of Packet (SOP), i.e. a J->K symbol change. if sym != 'K' or self.oldsym != 'J': return self.consecutive_ones = 0 self.bits = '' self.update_bitrate() self.samplepos = self.samplenum - (self.bitwidth / 2) + 0.5 self.set_new_target_samplenum() self.putpx(['SOP', None]) self.putx([4, ['SOP', 'S']]) self.state = 'GET BIT' def handle_bit(self, b): if self.consecutive_ones == 6: if b == '0': # Stuff bit. self.putpb(['STUFF BIT', None]) self.putb([7, ['Stuff bit: 0', 'SB: 0', '0']]) self.consecutive_ones = 0 else: self.putpb(['ERR', None]) self.putb([8, ['Bit stuff error', 'BS ERR', 'B']]) self.state = 'IDLE' else: # Normal bit (not a stuff bit). self.putpb(['BIT', b]) self.putb([6, ['%s' % b]]) if b == '1': self.consecutive_ones += 1 else: self.consecutive_ones = 0 def get_eop(self, sym): # EOP: SE0 for >= 1 bittime (usually 2 bittimes), then J. self.set_new_target_samplenum() self.putpb(['SYM', sym]) self.putb(sym_annotation[sym]) self.oldsym = sym if sym == 'SE0': pass elif sym == 'J': # Got an EOP. self.putpm(['EOP', None]) self.putm([5, ['EOP', 'E']]) self.state = 'WAIT IDLE' else: self.putpm(['ERR', None]) self.putm([8, ['EOP Error', 'EErr', 'E']]) self.state = 'IDLE' def get_bit(self, sym): self.set_new_target_samplenum() b = '0' if self.oldsym != sym else '1' self.oldsym = sym if sym == 'SE0': # Start of an EOP. Change state, save edge self.state = 'GET EOP' self.ss_block = self.samplenum_lastedge else: self.handle_bit(b) self.putpb(['SYM', sym]) self.putb(sym_annotation[sym]) if len(self.bits) <= 16: self.bits += b if len(self.bits) == 16 and self.bits == '0000000100111100': # Sync and low-speed PREamble seen self.putpx(['EOP', None]) self.state = 'IDLE' self.signalling = 'low-speed-rp' self.update_bitrate() self.oldsym = 'J' if b == '0': edgesym = symbols[self.signalling][tuple(self.edgepins)] if edgesym not in ('SE0', 'SE1'): if edgesym == sym: self.bitwidth = self.bitwidth - (0.001 * self.bitwidth) self.samplepos = self.samplepos - (0.01 * self.bitwidth) else: self.bitwidth = self.bitwidth + (0.001 * self.bitwidth) self.samplepos = self.samplepos + (0.01 * self.bitwidth) def handle_idle(self, sym): self.samplenum_edge = self.samplenum se0_length = float(self.samplenum - self.samplenum_lastedge) / self.samplerate if se0_length > 2.5e-6: # 2.5us self.putpb(['RESET', None]) self.putb([10, ['Reset', 'Res', 'R']]) self.signalling = self.options['signalling'] elif se0_length > 1.2e-6 and self.signalling == 'low-speed': self.putpb(['KEEP ALIVE', None]) self.putb([9, ['Keep-alive', 'KA', 'A']]) if sym == 'FS_J': self.signalling = 'full-speed' self.update_bitrate() elif sym == 'LS_J': self.signalling = 'low-speed' self.update_bitrate() self.oldsym = 'J' self.state = 'IDLE' def decode(self, ss, es, data): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') for (self.samplenum, pins) in data: # State machine. if self.state == 'IDLE': # Ignore identical samples early on (for performance reasons). if self.oldpins == pins: continue self.oldpins = pins sym = symbols[self.signalling][tuple(pins)] if sym == 'SE0': self.samplenum_lastedge = self.samplenum self.state = 'WAIT IDLE' else: self.wait_for_sop(sym) self.edgepins = pins elif self.state in ('GET BIT', 'GET EOP'): # Wait until we're in the middle of the desired bit. if self.samplenum == self.samplenum_edge: self.edgepins = pins if self.samplenum < self.samplenum_target: continue sym = symbols[self.signalling][tuple(pins)] if self.state == 'GET BIT': self.get_bit(sym) elif self.state == 'GET EOP': self.get_eop(sym) self.oldpins = pins elif self.state == 'WAIT IDLE': if tuple(pins) == (0, 0): continue if self.samplenum - self.samplenum_lastedge > 1: sym = symbols[self.options['signalling']][tuple(pins)] self.handle_idle(sym) else: sym = symbols[self.signalling][tuple(pins)] self.wait_for_sop(sym) self.oldpins = pins self.edgepins = pins elif self.state == 'INIT': sym = symbols[self.options['signalling']][tuple(pins)] self.handle_idle(sym) self.oldpins = pins libsigrokdecode-0.5.0/decoders/usb_signalling/__init__.py0000644000175000017500000000361413117367246020505 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This PD decodes the USB (low-speed and full-speed) signalling protocol. Electrical/signalling layer (USB spec, chapter 7): USB signalling consists of two signal lines, both driven at 3.3V logic levels. The signals are DP (D+) and DM (D-), and normally operate in differential mode. Low-speed: The state where DP=1,DM=0 is K, the state DP=0,DM=1 is J. Full-speed: The state where DP=1,DM=0 is J, the state DP=0,DM=1 is K. A state SE0 is defined where DP=DM=0. This common mode signal is used to signal a reset or end of packet (EOP). A state SE1 is defined where DP=DM=1. Data transmitted on the USB is encoded with NRZI. A transition from J to K or vice-versa indicates a logic 0, while no transition indicates a logic 1. If 6 ones are transmitted consecutively, a zero is inserted to force a transition. This is known as bit stuffing. Data is transferred at a rate of 1.5Mbit/s (low-speed) / 12Mbit/s (full-speed). The SE0 transmitted to signal an end-of-packet is two bit intervals long (low-speed: 1.25uS - 1.50uS, full-speed: 160ns - 175ns). Details: https://en.wikipedia.org/wiki/USB http://www.usb.org/developers/docs/ ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/eeprom24xx/0000755000175000017500000000000013117367246015465 500000000000000libsigrokdecode-0.5.0/decoders/eeprom24xx/pd.py0000644000175000017500000003750413117367246016373 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .lists import * class Decoder(srd.Decoder): api_version = 2 id = 'eeprom24xx' name = '24xx EEPROM' longname = '24xx I²C EEPROM' desc = '24xx series I²C EEPROM protocol.' license = 'gplv2+' inputs = ['i2c'] outputs = ['eeprom24xx'] options = ( {'id': 'chip', 'desc': 'Chip', 'default': 'generic', 'values': tuple(chips.keys())}, {'id': 'addr_counter', 'desc': 'Initial address counter value', 'default': 0}, ) annotations = ( # Warnings ('warnings', 'Warnings'), # Bits/bytes ('control-code', 'Control code'), ('address-pin', 'Address pin (A0/A1/A2)'), ('rw-bit', 'Read/write bit'), ('word-addr-byte', 'Word address byte'), ('data-byte', 'Data byte'), # Fields ('control-word', 'Control word'), ('word-addr', 'Word address'), ('data', 'Data'), # Operations ('byte-write', 'Byte write'), ('page-write', 'Page write'), ('cur-addr-read', 'Current address read'), ('random-read', 'Random read'), ('seq-random-read', 'Sequential random read'), ('seq-cur-addr-read', 'Sequential current address read'), ('ack-polling', 'Acknowledge polling'), ('set-bank-addr', 'Set bank address'), # SBA. Only 34AA04. ('read-bank-addr', 'Read bank address'), # RBA. Only 34AA04. ('set-wp', 'Set write protection'), # SWP ('clear-all-wp', 'Clear all write protection'), # CWP ('read-wp', 'Read write protection status'), # RPS ) annotation_rows = ( ('bits-bytes', 'Bits/bytes', (1, 2, 3, 4, 5)), ('fields', 'Fields', (6, 7, 8)), ('ops', 'Operations', tuple(range(9, 21))), ('warnings', 'Warnings', (0,)), ) binary = ( ('binary', 'Binary'), ) def __init__(self): self.reset() def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) self.chip = chips[self.options['chip']] self.addr_counter = self.options['addr_counter'] def putb(self, data): self.put(self.ss_block, self.es_block, self.out_ann, data) def putbin(self, data): self.put(self.ss_block, self.es_block, self.out_binary, data) def putbits(self, bit1, bit2, bits, data): self.put(bits[bit1][1], bits[bit2][2], self.out_ann, data) def reset(self): self.state = 'WAIT FOR START' self.packets = [] self.bytebuf = [] self.is_cur_addr_read = False self.is_random_access_read = False self.is_seq_random_read = False self.is_byte_write = False self.is_page_write = False def packet_append(self): self.packets.append([self.ss, self.es, self.cmd, self.databyte, self.bits]) if self.cmd in ('DATA READ', 'DATA WRITE'): self.bytebuf.append(self.databyte) def hexbytes(self, idx): return ' '.join(['%02X' % b for b in self.bytebuf[idx:]]) def put_control_word(self, bits): s = ''.join(['%d' % b[0] for b in reversed(bits[4:])]) self.putbits(7, 4, bits, [1, ['Control code bits: ' + s, 'Control code: ' + s, 'Ctrl code: ' + s, 'Ctrl code', 'Ctrl', 'C']]) for i in reversed(range(self.chip['addr_pins'])): self.putbits(i + 1, i + 1, bits, [2, ['Address bit %d: %d' % (i, bits[i + 1][0]), 'Addr bit %d' % i, 'A%d' % i, 'A']]) s1 = 'read' if bits[0][0] == 1 else 'write' s2 = 'R' if bits[0][0] == 1 else 'W' self.putbits(0, 0, bits, [3, ['R/W bit: ' + s1, 'R/W', 'RW', s2]]) self.putbits(7, 0, bits, [6, ['Control word', 'Control', 'CW', 'C']]) def put_word_addr(self, p): if self.chip['addr_bytes'] == 1: a = p[1][3] self.put(p[1][0], p[1][1], self.out_ann, [4, ['Word address byte: %02X' % a, 'Word addr byte: %02X' % a, 'Addr: %02X' % a, 'A: %02X' % a, '%02X' % a]]) self.put(p[1][0], p[1][1], self.out_ann, [7, ['Word address', 'Word addr', 'Addr', 'A']]) self.addr_counter = a else: a = p[1][3] self.put(p[1][0], p[1][1], self.out_ann, [4, ['Word address high byte: %02X' % a, 'Word addr high byte: %02X' % a, 'Addr high: %02X' % a, 'AH: %02X' % a, '%02X' % a]]) a = p[2][3] self.put(p[2][0], p[2][1], self.out_ann, [4, ['Word address low byte: %02X' % a, 'Word addr low byte: %02X' % a, 'Addr low: %02X' % a, 'AL: %02X' % a, '%02X' % a]]) self.put(p[1][0], p[2][1], self.out_ann, [7, ['Word address', 'Word addr', 'Addr', 'A']]) self.addr_counter = (p[1][3] << 8) | p[2][3] def put_data_byte(self, p): if self.chip['addr_bytes'] == 1: s = '%02X' % self.addr_counter else: s = '%04X' % self.addr_counter self.put(p[0], p[1], self.out_ann, [5, ['Data byte %s: %02X' % \ (s, p[3]), 'Data byte: %02X' % p[3], \ 'Byte: %02X' % p[3], 'DB: %02X' % p[3], '%02X' % p[3]]]) def put_data_bytes(self, idx, cls, s): for p in self.packets[idx:]: self.put_data_byte(p) self.addr_counter += 1 self.put(self.packets[idx][0], self.packets[-1][1], self.out_ann, [8, ['Data', 'D']]) a = ''.join(['%s' % c[0] for c in s.split()]).upper() self.putb([cls, ['%s (%s): %s' % (s, self.addr_and_len(), \ self.hexbytes(self.chip['addr_bytes'])), '%s (%s)' % (s, self.addr_and_len()), s, a, s[0]]]) self.putbin([0, bytes(self.bytebuf[self.chip['addr_bytes']:])]) def addr_and_len(self): if self.chip['addr_bytes'] == 1: a = '%02X' % self.bytebuf[0] else: a = '%02X%02X' % tuple(self.bytebuf[:2]) num_data_bytes = len(self.bytebuf) - self.chip['addr_bytes'] d = '%d bytes' % num_data_bytes if num_data_bytes <= 1: d = d[:-1] return 'addr=%s, %s' % (a, d) def decide_on_seq_or_rnd_read(self): if len(self.bytebuf) < 2: self.reset() return if len(self.bytebuf) == 2: self.is_random_access_read = True else: self.is_seq_random_read = True def put_operation(self): idx = 1 + self.chip['addr_bytes'] if self.is_byte_write: # Byte write: word address, one data byte. self.put_word_addr(self.packets) self.put_data_bytes(idx, 9, 'Byte write') elif self.is_page_write: # Page write: word address, two or more data bytes. self.put_word_addr(self.packets) intitial_addr = self.addr_counter self.put_data_bytes(idx, 10, 'Page write') num_bytes_to_write = len(self.packets[idx:]) if num_bytes_to_write > self.chip['page_size']: self.putb([0, ['Warning: Wrote %d bytes but page size is ' 'only %d bytes!' % (num_bytes_to_write, self.chip['page_size'])]]) page1 = int(intitial_addr / self.chip['page_size']) page2 = int((self.addr_counter - 1) / self.chip['page_size']) if page1 != page2: self.putb([0, ['Warning: Page write crossed page boundary ' 'from page %d to %d!' % (page1, page2)]]) elif self.is_cur_addr_read: # Current address read: no word address, one data byte. self.put_data_byte(self.packets[1]) self.put(self.packets[1][0], self.packets[-1][1], self.out_ann, [8, ['Data', 'D']]) self.putb([11, ['Current address read: %02X' % self.bytebuf[0], 'Current address read', 'Cur addr read', 'CAR', 'C']]) self.putbin([0, bytes([self.bytebuf[0]])]) self.addr_counter += 1 elif self.is_random_access_read: # Random access read: word address, one data byte. self.put_control_word(self.packets[idx][4]) self.put_word_addr(self.packets) self.put_data_bytes(idx + 1, 12, 'Random access read') elif self.is_seq_random_read: # Sequential random read: word address, two or more data bytes. self.put_control_word(self.packets[idx][4]) self.put_word_addr(self.packets) self.put_data_bytes(idx + 1, 13, 'Sequential random read') def handle_wait_for_start(self): # Wait for an I²C START condition. if self.cmd not in ('START', 'START REPEAT'): return self.ss_block = self.ss self.state = 'GET CONTROL WORD' def handle_get_control_word(self): # The packet after START must be an ADDRESS READ or ADDRESS WRITE. if self.cmd not in ('ADDRESS READ', 'ADDRESS WRITE'): self.reset() return self.packet_append() self.put_control_word(self.bits) self.state = '%s GET ACK NACK AFTER CONTROL WORD' % self.cmd[8] def handle_r_get_ack_nack_after_control_word(self): if self.cmd == 'ACK': self.state = 'R GET WORD ADDR OR BYTE' elif self.cmd == 'NACK': self.es_block = self.es self.putb([0, ['Warning: No reply from slave!']]) self.reset() else: self.reset() def handle_r_get_word_addr_or_byte(self): if self.cmd == 'STOP': self.es_block = self.es self.putb([0, ['Warning: Slave replied, but master aborted!']]) self.reset() return elif self.cmd != 'DATA READ': self.reset() return self.packet_append() self.state = 'R GET ACK NACK AFTER WORD ADDR OR BYTE' def handle_r_get_ack_nack_after_word_addr_or_byte(self): if self.cmd == 'ACK': self.state = 'R GET RESTART' elif self.cmd == 'NACK': self.is_cur_addr_read = True self.state = 'GET STOP AFTER LAST BYTE' else: self.reset() def handle_r_get_restart(self): if self.cmd == 'RESTART': self.state = 'R READ BYTE' else: self.reset() def handle_r_read_byte(self): if self.cmd == 'DATA READ': self.packet_append() self.state = 'R GET ACK NACK AFTER BYTE WAS READ' else: self.reset() def handle_r_get_ack_nack_after_byte_was_read(self): if self.cmd == 'ACK': self.state = 'R READ BYTE' elif self.cmd == 'NACK': # It's either a RANDOM READ or a SEQUENTIAL READ. self.state = 'GET STOP AFTER LAST BYTE' else: self.reset() def handle_w_get_ack_nack_after_control_word(self): if self.cmd == 'ACK': self.state = 'W GET WORD ADDR' elif self.cmd == 'NACK': self.es_block = self.es self.putb([0, ['Warning: No reply from slave!']]) self.reset() else: self.reset() def handle_w_get_word_addr(self): if self.cmd == 'STOP': self.es_block = self.es self.putb([0, ['Warning: Slave replied, but master aborted!']]) self.reset() return elif self.cmd != 'DATA WRITE': self.reset() return self.packet_append() self.state = 'W GET ACK AFTER WORD ADDR' def handle_w_get_ack_after_word_addr(self): if self.cmd == 'ACK': self.state = 'W DETERMINE EEPROM READ OR WRITE' else: self.reset() def handle_w_determine_eeprom_read_or_write(self): if self.cmd == 'START REPEAT': # It's either a RANDOM ACCESS READ or SEQUENTIAL RANDOM READ. self.state = 'R2 GET CONTROL WORD' elif self.cmd == 'DATA WRITE': self.packet_append() self.state = 'W GET ACK NACK AFTER BYTE WAS WRITTEN' else: self.reset() def handle_w_write_byte(self): if self.cmd == 'DATA WRITE': self.packet_append() self.state = 'W GET ACK NACK AFTER BYTE WAS WRITTEN' elif self.cmd == 'STOP': if len(self.bytebuf) < 2: self.reset() return self.es_block = self.es if len(self.bytebuf) == 2: self.is_byte_write = True else: self.is_page_write = True self.put_operation() self.reset() elif self.cmd == 'START REPEAT': # It's either a RANDOM ACCESS READ or SEQUENTIAL RANDOM READ. self.state = 'R2 GET CONTROL WORD' else: self.reset() def handle_w_get_ack_nack_after_byte_was_written(self): if self.cmd == 'ACK': self.state = 'W WRITE BYTE' else: self.reset() def handle_r2_get_control_word(self): if self.cmd == 'ADDRESS READ': self.packet_append() self.state = 'R2 GET ACK AFTER ADDR READ' else: self.reset() def handle_r2_get_ack_after_addr_read(self): if self.cmd == 'ACK': self.state = 'R2 READ BYTE' else: self.reset() def handle_r2_read_byte(self): if self.cmd == 'DATA READ': self.packet_append() self.state = 'R2 GET ACK NACK AFTER BYTE WAS READ' elif self.cmd == 'STOP': self.decide_on_seq_or_rnd_read() self.es_block = self.es self.putb([0, ['Warning: STOP expected after a NACK (not ACK)']]) self.put_operation() self.reset() else: self.reset() def handle_r2_get_ack_nack_after_byte_was_read(self): if self.cmd == 'ACK': self.state = 'R2 READ BYTE' elif self.cmd == 'NACK': self.decide_on_seq_or_rnd_read() self.state = 'GET STOP AFTER LAST BYTE' else: self.reset() def handle_get_stop_after_last_byte(self): if self.cmd == 'STOP': self.es_block = self.es self.put_operation() self.reset() elif self.cmd == 'START REPEAT': self.es_block = self.es self.putb([0, ['Warning: STOP expected (not RESTART)']]) self.put_operation() self.reset() self.ss_block = self.ss self.state = 'GET CONTROL WORD' else: self.reset() def decode(self, ss, es, data): self.cmd, self.databyte = data # Collect the 'BITS' packet, then return. The next packet is # guaranteed to belong to these bits we just stored. if self.cmd == 'BITS': self.bits = self.databyte return # Store the start/end samples of this I²C packet. self.ss, self.es = ss, es # State machine. s = 'handle_%s' % self.state.lower().replace(' ', '_') handle_state = getattr(self, s) handle_state() libsigrokdecode-0.5.0/decoders/eeprom24xx/__init__.py0000644000175000017500000000162013117367246017515 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the industry standard 24xx series serial EEPROM protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/eeprom24xx/lists.py0000644000175000017500000001200313117367246017111 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # # Chip specific properties: # # - vendor: chip manufacturer # - model: chip model # - size: total EEPROM size (in number of bytes) # - page_size: page size (in number of bytes) # - page_wraparound: Whether writes wrap-around at page boundaries # - addr_bytes: number of EEPROM address bytes used # - addr_pins: number of address pins (A0/A1/A2) on this chip # - max_speed: max. supported I²C speed (in kHz) # chips = { # Generic chip (128 bytes, 8 bytes page size) 'generic': { 'vendor': '', 'model': 'Generic', 'size': 128, 'page_size': 8, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 3, 'max_speed': 400, }, # Microchip 'microchip_24aa65': { 'vendor': 'Microchip', 'model': '24AA65', 'size': 8 * 1024, 'page_size': 64, # Actually 8, but there are 8 pages of "input cache" 'page_wraparound': True, 'addr_bytes': 2, 'addr_pins': 3, 'max_speed': 400, }, 'microchip_24lc65': { 'vendor': 'Microchip', 'model': '24LC65', 'size': 8 * 1024, 'page_size': 64, # Actually 8, but there are 8 pages of "input cache" 'page_wraparound': True, 'addr_bytes': 2, 'addr_pins': 3, 'max_speed': 400, }, 'microchip_24c65': { 'vendor': 'Microchip', 'model': '24C65', 'size': 8 * 1024, 'page_size': 64, # Actually 8, but there are 8 pages of "input cache" 'page_wraparound': True, 'addr_bytes': 2, 'addr_pins': 3, 'max_speed': 400, }, 'microchip_24aa64': { 'vendor': 'Microchip', 'model': '24AA64', 'size': 8 * 1024, 'page_size': 32, 'page_wraparound': True, 'addr_bytes': 2, 'addr_pins': 3, 'max_speed': 400, # 100 for VCC < 2.5V }, 'microchip_24lc64': { 'vendor': 'Microchip', 'model': '24LC64', 'size': 8 * 1024, 'page_size': 32, 'page_wraparound': True, 'addr_bytes': 2, 'addr_pins': 3, 'max_speed': 400, }, 'microchip_24aa02uid': { 'vendor': 'Microchip', 'model': '24AA02UID', 'size': 256, 'page_size': 8, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 0, # Pins A0, A1, A2 not used 'max_speed': 400, }, 'microchip_24aa025uid': { 'vendor': 'Microchip', 'model': '24AA025UID', 'size': 256, 'page_size': 16, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 3, 'max_speed': 400, }, 'microchip_24aa025uid_sot23': { 'vendor': 'Microchip', 'model': '24AA025UID (SOT-23)', 'size': 256, 'page_size': 16, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 2, # SOT-23 package: A2 not available 'max_speed': 400, }, # Siemens 'siemens_slx_24c01': { 'vendor': 'Siemens', 'model': 'SLx 24C01', 'size': 128, 'page_size': 8, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 0, # Pins A0, A1, A2 are not connected (NC) 'max_speed': 400, }, 'siemens_slx_24c02': { 'vendor': 'Siemens', 'model': 'SLx 24C02', 'size': 256, 'page_size': 8, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 0, # Pins A0, A1, A2 are not connected (NC) 'max_speed': 400, }, # ST 'st_m24c01': { 'vendor': 'ST', 'model': 'M24C01', 'size': 128, 'page_size': 16, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 3, # Called E0, E1, E2 on this chip. 'max_speed': 400, }, 'st_m24c02': { 'vendor': 'ST', 'model': 'M24C02', 'size': 256, 'page_size': 16, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 3, # Called E0, E1, E2 on this chip. 'max_speed': 400, }, # Xicor 'xicor_x24c02': { 'vendor': 'Xicor', 'model': 'X24C02', 'size': 256, 'page_size': 4, 'page_wraparound': True, 'addr_bytes': 1, 'addr_pins': 3, 'max_speed': 100, }, } libsigrokdecode-0.5.0/decoders/modbus/0000755000175000017500000000000013117367246014741 500000000000000libsigrokdecode-0.5.0/decoders/modbus/pd.py0000644000175000017500000010772213117367246015647 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Bart de Waal ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from math import ceil RX = 0 TX = 1 class No_more_data(Exception): '''This exception is a signal that we should stop parsing an ADU as there is no more data to parse.''' pass class Data: '''The Data class is used to hold the bytes from the serial decode.''' def __init__(self, start, end, data): self.start = start self.end = end self.data = data class Modbus_ADU: '''An Application Data Unit is what Modbus calls one message. Protocol decoders are supposed to keep track of state and then provide decoded data to the backend as it reads it. In Modbus' case, the state is the ADU up to that point. This class represents the state and writes the messages to the backend. This class is for the common infrastructure between CS and SC. It should not be used directly, only inhereted from.''' def __init__(self, parent, start, write_channel, annotation_prefix): self.data = [] # List of all the data received up to now self.parent = parent # Reference to the decoder object self.start = start self.last_read = start # The last moment parsed by this ADU object self.write_channel = write_channel self.last_byte_put = -1 self.annotation_prefix = annotation_prefix # Any Modbus message needs to be at least 4 bytes long. The Modbus # function may make this longer. self.minimum_length = 4 # This variable is used by an external function to determine when the # next frame should be started. self.startNewFrame = False # If there is an error in a frame, we'd like to highlight it. Keep # track of errors. self.hasError = False def add_data(self, start, end, data): '''Let the frame handle another piece of data. start: start of this data end: end of this data data: data as received from the UART decoder''' ptype, rxtx, pdata = data self.last_read = end if ptype == 'DATA': self.data.append(Data(start, end, pdata[0])) self.parse() # parse() is defined in the specific type of ADU. def puti(self, byte_to_put, annotation, message): '''This class keeps track of how much of the data has already been annotated. This function tells the parent class to write message, but only if it hasn't written about this bit before. byte_to_put: Only write if it hasn't yet written byte_to_put. It will write from the start of self.last_byte_put+1 to the end of byte_to_put. annotation: Annotation to write to, without annotation_prefix. message: Message to write.''' if byte_to_put > len(self.data) - 1: # If the byte_to_put hasn't been read yet. raise No_more_data if annotation == 'error': self.hasError = True if byte_to_put > self.last_byte_put: self.parent.puta( self.data[self.last_byte_put + 1].start, self.data[byte_to_put].end, self.annotation_prefix + annotation, message) self.last_byte_put = byte_to_put raise No_more_data def putl(self, annotation, message, maximum=None): '''Puts the last byte on the stack with message. The contents of the last byte will be applied to message using format.''' last_byte_address = len(self.data) - 1 if maximum is not None and last_byte_address > maximum: return self.puti(last_byte_address, annotation, message.format(self.data[-1].data)) def close(self, message_overflow): '''Function to be called when next message is started. As there is always space between one message and the next, we can use that space for errors at the end.''' # TODO: Figure out how to make this happen for last message. data = self.data if len(data) < self.minimum_length: if len(data) == 0: # Sometimes happens with noise, safe to ignore. return self.parent.puta( data[self.last_byte_put].end, message_overflow, self.annotation_prefix + 'error', 'Message too short or not finished') self.hasError = True if self.hasError and self.parent.options['channel'] == 'RX': # If we are on RX mode (so client->server and server->client # messages can be seperated) we like to mark blocks containing # errors. We don't do this in TX mode, because then we interpret # each frame as both a client->server and server->client frame, and # one of those is bound to contain an error, making highlighting # frames useless. self.parent.puta(data[0].start, data[-1].end, 'error-indication', 'Frame contains error') if len(data) > 256: try: self.puti(len(data) - 1, self.annotation_prefix + 'error', 'Modbus data frames are limited to 256 bytes') except No_more_data: pass def check_crc(self, byte_to_put): '''Check the CRC code, data[byte_to_put] is the 2nd byte of the CRC.''' crc_byte1, crc_byte2 = self.calc_crc(byte_to_put) data = self.data if data[-2].data == crc_byte1 and data[-1].data == crc_byte2: self.puti(byte_to_put, 'crc', 'CRC correct') else: self.puti(byte_to_put, 'error', 'CRC should be {} {}'.format(crc_byte1, crc_byte2)) def half_word(self, start): '''Return the half word (16 bit) value starting at start bytes in. If it goes out of range it raises the usual errors.''' if (start + 1) > (len(self.data) - 1): # If there isn't enough length to access data[start + 1]. raise No_more_data return self.data[start].data * 0x100 + self.data[start + 1].data def calc_crc(self, last_byte): '''Calculate the CRC, as described in the spec. The last byte of the CRC should be data[last_byte].''' if last_byte < 3: # Every Modbus ADU should be as least 4 long, so we should never # have to calculate a CRC on something shorter. raise Exception('Could not calculate CRC: message too short') result = 0xFFFF magic_number = 0xA001 # As defined in the modbus specification. for byte in self.data[:last_byte - 1]: result = result ^ byte.data for i in range(8): LSB = result & 1 result = result >> 1 if (LSB): # If the LSB is true. result = result ^ magic_number byte1 = result & 0xFF byte2 = (result & 0xFF00) >> 8 return (byte1, byte2) def parse_write_single_coil(self): '''Parse function 5, write single coil.''' self.minimum_length = 8 self.puti(1, 'function', 'Function 5: Write Single Coil') address = self.half_word(2) self.puti(3, 'address', 'Address 0x{:X} / {:d}'.format(address, address + 10000)) raw_value = self.half_word(4) value = 'Invalid Coil Value' if raw_value == 0x0000: value = 'Coil Value OFF' elif raw_value == 0xFF00: value = 'Coil Value ON' self.puti(5, 'data', value) self.check_crc(7) def parse_write_single_register(self): '''Parse function 6, write single register.''' self.minimum_length = 8 self.puti(1, 'function', 'Function 6: Write Single Register') address = self.half_word(2) self.puti(3, 'address', 'Address 0x{:X} / {:d}'.format(address, address + 30000)) value = self.half_word(4) value_formatted = 'Register Value 0x{0:X} / {0:d}'.format(value) self.puti(5, 'data', value_formatted) self.check_crc(7) def parse_diagnostics(self): '''Parse function 8, diagnostics. This function has many subfunctions, but they are all more or less the same.''' self.minimum_length = 8 self.puti(1, 'function', 'Function 8: Diagnostics') diag_subfunction = { 0: 'Return Query data', 1: 'Restart Communications Option', 2: 'Return Diagnostics Register', 3: 'Change ASCII Input Delimiter', 4: 'Force Listen Only Mode', 10: 'Clear Counters and Diagnostic Register', 11: 'Return Bus Message Count', 12: 'Return Bus Communication Error Count', 13: 'Return Bus Exception Error Count', 14: 'Return Slave Message Count', 15: 'Return Slave No Response Count', 16: 'Return Slave NAK Count', 17: 'Return Slave Busy Count', 18: 'Return Bus Character Overrun Count', 20: 'Return Overrun Counter and Flag', } subfunction = self.half_word(2) subfunction_name = diag_subfunction.get(subfunction, 'Reserved subfunction') self.puti(3, 'data', 'Subfunction {}: {}'.format(subfunction, subfunction_name)) diagnostic_data = self.half_word(4) self.puti(5, 'data', 'Data Field: {0} / 0x{0:04X}'.format(diagnostic_data)) self.check_crc(7) def parse_mask_write_register(self): '''Parse function 22, Mask Write Register.''' self.minimum_length = 10 data = self.data self.puti(1, 'function', 'Function 22: Mask Write Register') address = self.half_word(2) self.puti(3, 'address', 'Address 0x{:X} / {:d}'.format(address, address + 30001)) self.half_word(4) # To make sure we don't oveflow data. and_mask_1 = data[4].data and_mask_2 = data[5].data self.puti(5, 'data', 'AND mask: {:08b} {:08b}'.format(and_mask_1, and_mask_2)) self.half_word(6) # To make sure we don't oveflow data. or_mask_1 = data[6].data or_mask_2 = data[7].data self.puti(7, 'data', 'OR mask: {:08b} {:08b}'.format(or_mask_1, or_mask_2)) self.check_crc(9) def parse_not_implemented(self): '''Explicitly mark certain functions as legal functions, but not implemented in this parser. This is due to the author not being able to find anything (hardware or software) that supports these functions.''' # TODO: Implement these functions. # Mentioning what function it is is no problem. function = self.data[1].data functionname = { 20: 'Read File Record', 21: 'Write File Record', 24: 'Read FIFO Queue', 43: 'Read Device Identification/Encapsulated Interface Transport', }[function] self.puti(1, 'function', 'Function {}: {} (not supported)'.format(function, functionname)) # From there on out we can keep marking it unsupported. self.putl('data', 'This function is not currently supported') class Modbus_ADU_SC(Modbus_ADU): '''SC stands for Server -> Client.''' def parse(self): '''Select which specific Modbus function we should parse.''' data = self.data # This try-catch is being used as flow control. try: server_id = data[0].data if 1 <= server_id <= 247: message = 'Slave ID: {}'.format(server_id) else: message = 'Slave ID {} is invalid' self.puti(0, 'server-id', message) function = data[1].data if function == 1 or function == 2: self.parse_read_bits() elif function == 3 or function == 4 or function == 23: self.parse_read_registers() elif function == 5: self.parse_write_single_coil() elif function == 6: self.parse_write_single_register() elif function == 7: self.parse_read_exception_status() elif function == 8: self.parse_diagnostics() elif function == 11: self.parse_get_comm_event_counter() elif function == 12: self.parse_get_comm_event_log() elif function == 15 or function == 16: self.parse_write_multiple() elif function == 17: self.parse_report_server_id() elif function == 22: self.parse_mask_write_register() elif function in {21, 21, 24, 43}: self.parse_not_implemented() elif function > 0x80: self.parse_error() else: self.puti(1, 'error', 'Unknown function: {}'.format(data[1].data)) self.putl('error', 'Unknown function') # If the message gets here without raising an exception, the # message goes on longer than it should. self.putl('error', 'Message too long') except No_more_data: # Just a message saying we don't need to parse anymore this round. pass def parse_read_bits(self): self.mimumum_length = 5 data = self.data function = data[1].data if function == 1: self.puti(1, 'function', 'Function 1: Read Coils') else: self.puti(1, 'function', 'Function 2: Read Discrete Inputs') bytecount = self.data[2].data self.minimum_length = 5 + bytecount # 3 before data, 2 CRC. self.puti(2, 'length', 'Byte count: {}'.format(bytecount)) # From here on out, we expect registers on 3 and 4, 5 and 6 etc. # So registers never start when the length is even. self.putl('data', '{:08b}', bytecount + 2) self.check_crc(bytecount + 4) def parse_read_registers(self): self.mimumum_length = 5 data = self.data function = data[1].data if function == 3: self.puti(1, 'function', 'Function 3: Read Holding Registers') elif function == 4: self.puti(1, 'function', 'Function 4: Read Input Registers') elif function == 23: self.puti(1, 'function', 'Function 23: Read/Write Multiple Registers') bytecount = self.data[2].data self.minimum_length = 5 + bytecount # 3 before data, 2 CRC. if bytecount % 2 == 0: self.puti(2, 'length', 'Byte count: {}'.format(bytecount)) else: self.puti(2, 'error', 'Error: Odd byte count ({})'.format(bytecount)) # From here on out, we expect registers on 3 and 4, 5 and 6 etc. # So registers never start when the length is even. if len(data) % 2 == 1: register_value = self.half_word(-2) self.putl('data', '0x{0:04X} / {0}'.format(register_value), bytecount + 2) else: raise No_more_data self.check_crc(bytecount + 4) def parse_read_exception_status(self): self.mimumum_length = 5 self.puti(1, 'function', 'Function 7: Read Exception Status') exception_status = self.data[2].data self.puti(2, 'data', 'Exception status: {:08b}'.format(exception_status)) self.check_crc(4) def parse_get_comm_event_counter(self): self.mimumum_length = 8 self.puti(1, 'function', 'Function 11: Get Comm Event Counter') status = self.half_word(2) if status == 0x0000: self.puti(3, 'data', 'Status: not busy') elif status == 0xFFFF: self.puti(3, 'data', 'Status: busy') else: self.puti(3, 'error', 'Bad status: 0x{:04X}'.format(status)) count = self.half_word(4) self.puti(5, 'data', 'Event Count: {}'.format(count)) self.check_crc(7) def parse_get_comm_event_log(self): self.mimumum_length = 11 self.puti(1, 'function', 'Function 12: Get Comm Event Log') data = self.data bytecount = data[2].data self.puti(2, 'length', 'Bytecount: {}'.format(bytecount)) # The bytecount is the length of everything except the slaveID, # function code, bytecount and CRC. self.mimumum_length = 5 + bytecount status = self.half_word(3) if status == 0x0000: self.puti(4, 'data', 'Status: not busy') elif status == 0xFFFF: self.puti(4, 'data', 'Status: busy') else: self.puti(4, 'error', 'Bad status: 0x{:04X}'.format(status)) event_count = self.half_word(5) self.puti(6, 'data', 'Event Count: {}'.format(event_count)) message_count = self.half_word(7) self.puti(8, 'data', 'Message Count: {}'.format(message_count)) self.putl('data', 'Event: 0x{:02X}'.format(data[-1].data), bytecount + 2) self.check_crc(bytecount + 4) def parse_write_multiple(self): '''Function 15 and 16 are almost the same, so we can parse them both using one function.''' self.mimumum_length = 8 function = self.data[1].data if function == 15: data_unit = 'Coils' max_outputs = 0x07B0 long_address_offset = 10001 elif function == 16: data_unit = 'Registers' max_outputs = 0x007B long_address_offset = 30001 self.puti(1, 'function', 'Function {}: Write Multiple {}'.format(function, data_unit)) starting_address = self.half_word(2) # Some instruction manuals use a long form name for addresses, this is # listed here for convienience. address_name = long_address_offset + starting_address self.puti(3, 'address', 'Start at address 0x{:X} / {:d}'.format(starting_address, address_name)) quantity_of_outputs = self.half_word(4) if quantity_of_outputs <= max_outputs: self.puti(5, 'data', 'Write {} {}'.format(quantity_of_outputs, data_unit)) else: self.puti(5, 'error', 'Bad value: {} {}. Max is {}'.format(quantity_of_outputs, data_unit, max_outputs)) self.check_crc(7) def parse_report_server_id(self): # Buildup of this function: # 1 byte serverID # 1 byte function (17) # 1 byte bytecount # 1 byte serverID (counts for bytecount) # 1 byte Run Indicator Status (counts for bytecount) # bytecount - 2 bytes of device specific data (counts for bytecount) # 2 bytes of CRC self.mimumum_length = 7 data = self.data self.puti(1, 'function', 'Function 17: Report Server ID') bytecount = data[2].data self.puti(2, 'length', 'Data is {} bytes long'.format(bytecount)) self.puti(3, 'data', 'serverID: {}'.format(data[3].data)) run_indicator_status = data[4].data if run_indicator_status == 0x00: self.puti(4, 'data', 'Run Indicator status: Off') elif run_indicator_status == 0xFF: self.puti(4, 'data', 'Run Indicator status: On') else: self.puti(4, 'error', 'Bad Run Indicator status: 0x{:X}'.format(run_indicator_status)) self.putl('data', 'Device specific data: {}, "{}"'.format(data[-1].data, chr(data[-1].data)), 2 + bytecount) self.check_crc(4 + bytecount) def parse_error(self): '''Parse a Modbus error message.''' self.mimumum_length = 5 # The function code of an error is always 0x80 above the function call # that caused it. functioncode = self.data[1].data - 0x80 functions = { 1: 'Read Coils', 2: 'Read Discrete Inputs', 3: 'Read Holding Registers', 4: 'Read Input Registers', 5: 'Write Single Coil', 6: 'Write Single Register', 7: 'Read Exception Status', 8: 'Diagnostic', 11: 'Get Com Event Counter', 12: 'Get Com Event Log', 15: 'Write Multiple Coils', 16: 'Write Multiple Registers', 17: 'Report Slave ID', 20: 'Read File Record', 21: 'Write File Record', 22: 'Mask Write Register', 23: 'Read/Write Multiple Registers', 24: 'Read FIFO Queue', 43: 'Read Device Identification/Encapsulated Interface Transport', } functionname = '{}: {}'.format(functioncode, functions.get(functioncode, 'Unknown function')) self.puti(1, 'function', 'Error for function {}'.format(functionname)) error = self.data[2].data errorcodes = { 1: 'Illegal Function', 2: 'Illegal Data Address', 3: 'Illegal Data Value', 4: 'Slave Device Failure', 5: 'Acknowledge', 6: 'Slave Device Busy', 8: 'Memory Parity Error', 10: 'Gateway Path Unavailable', 11: 'Gateway Target Device failed to respond', } errorname = '{}: {}'.format(error, errorcodes.get(error, 'Unknown')) self.puti(2, 'data', 'Error {}'.format(errorname)) self.check_crc(4) class Modbus_ADU_CS(Modbus_ADU): '''CS stands for Client -> Server.''' def parse(self): '''Select which specific Modbus function we should parse.''' data = self.data # This try-catch is being used as flow control. try: server_id = data[0].data message = '' if server_id == 0: message = 'Broadcast message' elif 1 <= server_id <= 247: message = 'Slave ID: {}'.format(server_id) elif 248 <= server_id <= 255: message = 'Slave ID: {} (reserved address)'.format(server_id) self.puti(0, 'server-id', message) function = data[1].data if function >= 1 and function <= 4: self.parse_read_data_command() if function == 5: self.parse_write_single_coil() if function == 6: self.parse_write_single_register() if function in {7, 11, 12, 17}: self.parse_single_byte_request() elif function == 8: self.parse_diagnostics() if function in {15, 16}: self.parse_write_multiple() elif function == 22: self.parse_mask_write_register() elif function == 23: self.parse_read_write_registers() elif function in {21, 21, 24, 43}: self.parse_not_implemented() else: self.puti(1, 'error', 'Unknown function: {}'.format(data[1].data)) self.putl('error', 'Unknown function') # If the message gets here without raising an exception, the # message goes on longer than it should. self.putl('error', 'Message too long') except No_more_data: # Just a message saying we don't need to parse anymore this round. pass def parse_read_data_command(self): '''Interpret a command to read x units of data starting at address, ie functions 1, 2, 3 and 4, and write the result to the annotations.''' data = self.data self.minimum_length = 8 function = data[1].data functionname = {1: 'Read Coils', 2: 'Read Discrete Inputs', 3: 'Read Holding Registers', 4: 'Read Input Registers', }[function] self.puti(1, 'function', 'Function {}: {}'.format(function, functionname)) starting_address = self.half_word(2) # Some instruction manuals use a long form name for addresses, this is # listed here for convienience. # Example: holding register 60 becomes 30061. address_name = 10000 * function + 1 + starting_address self.puti(3, 'address', 'Start at address 0x{:X} / {:d}'.format(starting_address, address_name)) self.puti(5, 'length', 'Read {:d} units of data'.format(self.half_word(4))) self.check_crc(7) def parse_single_byte_request(self): '''Some Modbus functions have no arguments, this parses those.''' function = self.data[1].data function_name = {7: 'Read Exception Status', 11: 'Get Comm Event Counter', 12: 'Get Comm Event Log', 17: 'Report Slave ID', }[function] self.puti(1, 'function', 'Function {}: {}'.format(function, function_name)) self.check_crc(3) def parse_write_multiple(self): '''Function 15 and 16 are almost the same, so we can parse them both using one function.''' self.mimumum_length = 9 function = self.data[1].data if function == 15: data_unit = 'Coils' max_outputs = 0x07B0 ratio_bytes_data = 1/8 long_address_offset = 10001 elif function == 16: data_unit = 'Registers' max_outputs = 0x007B ratio_bytes_data = 2 long_address_offset = 30001 self.puti(1, 'function', 'Function {}: Write Multiple {}'.format(function, data_unit)) starting_address = self.half_word(2) # Some instruction manuals use a long form name for addresses, this is # listed here for convienience. address_name = long_address_offset + starting_address self.puti(3, 'address', 'Start at address 0x{:X} / {:d}'.format(starting_address, address_name)) quantity_of_outputs = self.half_word(4) if quantity_of_outputs <= max_outputs: self.puti(5, 'length', 'Write {} {}'.format(quantity_of_outputs, data_unit)) else: self.puti(5, 'error', 'Bad value: {} {}. Max is {}'.format(quantity_of_outputs, data_unit, max_outputs)) proper_bytecount = ceil(quantity_of_outputs * ratio_bytes_data) bytecount = self.data[6].data if bytecount == proper_bytecount: self.puti(6, 'length', 'Byte count: {}'.format(bytecount)) else: self.puti(6, 'error', 'Bad byte count, is {}, should be {}'.format(bytecount, proper_bytecount)) self.mimumum_length = bytecount + 9 self.putl('data', 'Value 0x{:X}', 6 + bytecount) self.check_crc(bytecount + 8) def parse_read_file_record(self): self.puti(1, 'function', 'Function 20: Read file records') data = self.data bytecount = data[2].data self.minimum_length = 5 + bytecount # 1 for serverID, 1 for function, 1 for bytecount, 2 for CRC. if 0x07 <= bytecount <= 0xF5: self.puti(2, 'length', 'Request is {} bytes long'.format(bytecount)) else: self.puti(2, 'error', 'Request claims to be {} bytes long, legal values are between' ' 7 and 247'.format(bytecount)) current_byte = len(data) - 1 # Function 20 is a number of sub-requests, the first starting at 3, # the total length of the sub-requests is bytecount. if current_byte <= bytecount + 2: step = (current_byte - 3) % 7 if step == 0: if data[current_byte].data == 6: self.puti(current_byte, 'data', 'Start sub-request') else: self.puti(current_byte, 'error', 'First byte of subrequest should be 0x06') elif step == 1: raise No_more_data elif step == 2: file_number = self.half_word(current_byte - 1) self.puti(current_byte, 'data', 'Read File number {}'.format(file_number)) elif step == 3: raise No_more_data elif step == 4: record_number = self.half_word(current_byte - 1) self.puti(current_byte, 'address', 'Read from record number {}'.format(record_number)) # TODO: Check if within range. elif step == 5: raise No_more_data elif step == 6: records_to_read = self.half_word(current_byte - 1) self.puti(current_byte, 'length', 'Read {} records'.format(records_to_read)) self.check_crc(4 + bytecount) def parse_read_write_registers(self): '''Parse function 23: Read/Write multiple registers.''' self.minimum_length = 13 self.puti(1, 'function', 'Function 23: Read/Write Multiple Registers') starting_address = self.half_word(2) # Some instruction manuals use a long form name for addresses, this is # listed here for convienience. # Example: holding register 60 becomes 30061. address_name = 30001 + starting_address self.puti(3, 'address', 'Read starting at address 0x{:X} / {:d}'.format(starting_address, address_name)) self.puti(5, 'length', 'Read {:d} units of data'.format(self.half_word(4))) starting_address = self.half_word(6) self.puti(7, 'address', 'Write starting at address 0x{:X} / {:d}'.format(starting_address, address_name)) quantity_of_outputs = self.half_word(8) self.puti(9, 'length', 'Write {} registers'.format(quantity_of_outputs)) proper_bytecount = quantity_of_outputs * 2 bytecount = self.data[10].data if bytecount == proper_bytecount: self.puti(10, 'length', 'Byte count: {}'.format(bytecount)) else: self.puti(10, 'error', 'Bad byte count, is {}, should be {}'.format(bytecount, proper_bytecount)) self.mimumum_length = bytecount + 13 self.putl('data', 'Data, value 0x{:02X}', 10 + bytecount) self.check_crc(bytecount + 12) class Decoder(srd.Decoder): api_version = 2 id = 'modbus' name = 'Modbus' longname = 'Modbus RTU over RS232/RS485' desc = 'Modbus RTU protocol for industrial applications.' license = 'gplv3+' inputs = ['uart'] outputs = ['modbus'] annotations = ( ('sc-server-id', ''), ('sc-function', ''), ('sc-crc', ''), ('sc-address', ''), ('sc-data', ''), ('sc-length', ''), ('sc-error', ''), ('cs-server-id', ''), ('cs-function', ''), ('cs-crc', ''), ('cs-address', ''), ('cs-data', ''), ('cs-length', ''), ('cs-error', ''), ('error-indication', ''), ) annotation_rows = ( ('sc', 'Server->client', (0, 1, 2, 3, 4, 5, 6)), ('cs', 'Client->server', (7, 8, 9, 10, 11, 12, 13)), ('error-indicator', 'Errors in frame', (14,)), ) options = ( {'id': 'channel', 'desc': 'Server -> client channel', 'default': 'RX', 'values': ('RX', 'TX')}, ) def __init__(self): self.ADUSc = None # Start off with empty slave -> client ADU. self.ADUCs = None # Start off with empty client -> slave ADU. # The reason we have both (despite not supporting full duplex comms) is # because we want to be able to decode the message as both client -> # server and server -> client, and let the user see which of the two # the ADU was. self.bitlength = None # We will later test how long a bit is. def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def puta(self, start, end, ann_str, message): '''Put an annotation from start to end, with ann as a string. This means you don't have to know the ann's number to write annotations to it.''' ann = [s[0] for s in self.annotations].index(ann_str) self.put(start, end, self.out_ann, [ann, [message]]) def decode_adu(self, ss, es, data, direction): '''Decode the next byte or bit (depending on type) in the ADU. ss: Start time of the data es: End time of the data data: Data as passed from the UART decoder direction: Is this data for the Cs (client -> server) or Sc (server -> client) being decoded right now?''' ptype, rxtx, pdata = data # We don't have a nice way to get the baud rate from UART, so we have # to figure out how long a bit lasts. We do this by looking at the # length of (probably) the startbit. if self.bitlength is None: if ptype == 'STARTBIT' or ptype == 'STOPBIT': self.bitlength = es - ss else: # If we don't know the bitlength yet, we can't start decoding. return # Select the ADU, create the ADU if needed. # We set ADU.startNewFrame = True when we know the old one is over. if direction == 'Sc': if (self.ADUSc is None) or self.ADUSc.startNewFrame: self.ADUSc = Modbus_ADU_SC(self, ss, TX, 'sc-') ADU = self.ADUSc if direction == 'Cs': if self.ADUCs is None or self.ADUCs.startNewFrame: self.ADUCs = Modbus_ADU_CS(self, ss, TX, 'cs-') ADU = self.ADUCs # We need to determine if the last ADU is over. # According to the Modbus spec, there should be 3.5 characters worth of # space between each message. But if within a message there is a length # of more than 1.5 character, that's an error. For our purposes # somewhere between seems fine. # A character is 11 bits long, so (3.5 + 1.5)/2 * 11 ~= 28 # TODO: Display error for too short or too long. if (ss - ADU.last_read) <= self.bitlength * 28: ADU.add_data(ss, es, data) else: # It's been too long since the last part of the ADU! # If there is any data in the ADU we need to show it to the user if len(ADU.data) > 0: # Extend errors for 3 bits after last byte, we can guarantee # space. ADU.close(ADU.data[-1].end + self.bitlength * 3) ADU.startNewFrame = True # Restart this function, it will make a new ADU for us. self.decode_adu(ss, es, data, direction) def decode(self, ss, es, data): ptype, rxtx, pdata = data # Decide what ADU(s) we need this packet to go to. # Note that it's possible to go to both ADUs. if rxtx == TX: self.decode_adu(ss, es, data, 'Cs') if rxtx == TX and self.options['channel'] == 'TX': self.decode_adu(ss, es, data, 'Sc') if rxtx == RX and self.options['channel'] == 'RX': self.decode_adu(ss, es, data, 'Sc') libsigrokdecode-0.5.0/decoders/modbus/__init__.py0000644000175000017500000000203713117367246016774 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Bart de Waal ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'uart' PD and decodes Modbus RTU, a protocol with a single a client and one or more servers. The RX channel will be checked for both client->server and server->client communication, the TX channel only for client->server. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/midi/0000755000175000017500000000000013117367246014372 500000000000000libsigrokdecode-0.5.0/decoders/midi/pd.py0000644000175000017500000006453313117367246015302 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013-2016 Uwe Hermann ## Copyright (C) 2016 Chris Dreher ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .lists import * RX = 0 TX = 1 class Decoder(srd.Decoder): api_version = 2 id = 'midi' name = 'MIDI' longname = 'Musical Instrument Digital Interface' desc = 'Musical Instrument Digital Interface (MIDI) protocol.' license = 'gplv2+' inputs = ['uart'] outputs = ['midi'] annotations = ( ('text-verbose', 'Human-readable text (verbose)'), ('text-sysreal-verbose', 'Human-readable SysReal text (verbose)'), ('text-error', 'Human-readable Error text'), ) annotation_rows = ( ('normal', 'Normal', (0, 2)), ('sys-real', 'SysReal', (1,)), ) def __init__(self): self.state = 'IDLE' self.status_byte = 0 self.explicit_status_byte = False self.cmd = [] self.ss = None self.es = None self.ss_block = None self.es_block = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_block, self.es_block, self.out_ann, data) def get_note_name(self, channel, note): if channel != 10: return chromatic_notes[note] else: return 'assuming ' + percussion_notes.get(note, 'undefined') def check_for_garbage_flush(self, is_flushed): if is_flushed: if self.explicit_status_byte: self.cmd.insert(0, self.status_byte) self.handle_garbage_msg(None) def soft_clear_status_byte(self): self.explicit_status_byte = False def hard_clear_status_byte(self): self.status_byte = 0 self.explicit_status_byte = False def set_status_byte(self, newbyte): self.status_byte = newbyte self.explicit_status_byte = True def handle_channel_msg_0x80(self, is_flushed): # Note off: 8n kk vv # n = channel, kk = note, vv = velocity c = self.cmd if len(c) < 2: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 note, velocity = c[0], c[1] note_name = self.get_note_name(chan, note) self.putx([0, ['Channel %d: %s (note = %d \'%s\', velocity = %d)' % \ (chan, status_bytes[msg][0], note, note_name, velocity), 'ch %d: %s %d, velocity = %d' % \ (chan, status_bytes[msg][1], note, velocity), '%d: %s %d, vel %d' % \ (chan, status_bytes[msg][2], note, velocity)]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_0x90(self, is_flushed): # Note on: 9n kk vv # n = channel, kk = note, vv = velocity # If velocity == 0 that actually means 'note off', though. c = self.cmd if len(c) < 2: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 note, velocity = c[0], c[1] s = status_bytes[0x80] if (velocity == 0) else status_bytes[msg] note_name = self.get_note_name(chan, note) self.putx([0, ['Channel %d: %s (note = %d \'%s\', velocity = %d)' % \ (chan, s[0], note, note_name, velocity), 'ch %d: %s %d, velocity = %d' % \ (chan, s[1], note, velocity), '%d: %s %d, vel %d' % \ (chan, s[2], note, velocity)]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_0xa0(self, is_flushed): # Polyphonic key pressure / aftertouch: An kk vv # n = channel, kk = polyphonic key pressure, vv = pressure value c = self.cmd if len(c) < 2: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 note, pressure = c[0], c[1] note_name = self.get_note_name(chan, note) self.putx([0, ['Channel %d: %s of %d for note = %d \'%s\'' % \ (chan, status_bytes[msg][0], pressure, note, note_name), 'ch %d: %s %d for note %d' % \ (chan, status_bytes[msg][1], pressure, note), '%d: %s %d, N %d' % \ (chan, status_bytes[msg][2], pressure, note)]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_controller_0x44(self): # Legato footswitch: Bn 44 vv # n = channel, vv = value (<= 0x3f: normal, > 0x3f: legato) c = self.cmd msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 vv = c[1] t = ('normal', 'no') if vv <= 0x3f else ('legato', 'yes') self.putx([0, ['Channel %d: %s \'%s\' = %s' % \ (chan, status_bytes[msg][0], control_functions[0x44][0], t[0]), 'ch %d: %s \'%s\' = %s' % \ (chan, status_bytes[msg][1], control_functions[0x44][1], t[0]), '%d: %s \'%s\' = %s' % \ (chan, status_bytes[msg][2], control_functions[0x44][2], t[1])]]) def handle_controller_0x54(self): # Portamento control (PTC): Bn 54 kk # n = channel, kk = source note for pitch reference c = self.cmd msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 kk = c[1] kk_name = self.get_note_name(chan, kk) self.putx([0, ['Channel %d: %s \'%s\' (source note = %d / %s)' % \ (chan, status_bytes[msg][0], control_functions[0x54][0], kk, kk_name), 'ch %d: %s \'%s\' (source note = %d)' % \ (chan, status_bytes[msg][1], control_functions[0x54][1], kk), '%d: %s \'%s\' (src N %d)' % \ (chan, status_bytes[msg][2], control_functions[0x54][2], kk)]]) def handle_controller_generic(self): c = self.cmd msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 fn, param = c[0], c[1] default_name = 'undefined' ctrl_fn = control_functions.get(fn, default_name) if ctrl_fn == default_name: ctrl_fn = ('undefined 0x%02x' % fn, 'undef 0x%02x' % fn, '0x%02x' % fn) self.putx([0, ['Channel %d: %s \'%s\' (param = 0x%02x)' % \ (chan, status_bytes[msg][0], ctrl_fn[0], param), 'ch %d: %s \'%s\' (param = 0x%02x)' % \ (chan, status_bytes[msg][1], ctrl_fn[1], param), '%d: %s \'%s\' is 0x%02x' % \ (chan, status_bytes[msg][2], ctrl_fn[2], param)]]) def handle_channel_mode(self): # Channel Mode: Bn mm vv # n = channel, mm = mode number (120 - 127), vv = value c = self.cmd msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 mm, vv = c[0], c[1] mode_fn = control_functions.get(mm, ('undefined', 'undef', 'undef')) # Decode the value based on the mode number. vv_string = ('', '') if mm == 122: # mode = local control? if vv == 0: vv_string = ('off', 'off') elif vv == 127: # mode = poly mode on? vv_string = ('on', 'on') else: vv_string = ('(non-standard param value of 0x%02x)' % vv, '0x%02x' % vv) elif mm == 126: # mode = mono mode on? if vv != 0: vv_string = ('(%d channels)' % vv, '(%d ch)' % vv) else: vv_string = ('(channels \'basic\' through 16)', '(ch \'basic\' thru 16)') elif vv != 0: # All other channel mode messages expect vv == 0. vv_string = ('(non-standard param value of 0x%02x)' % vv, '0x%02x' % vv) self.putx([0, ['Channel %d: %s \'%s\' %s' % \ (chan, status_bytes[msg][0], mode_fn[0], vv_string[0]), 'ch %d: %s \'%s\' %s' % \ (chan, status_bytes[msg][1], mode_fn[1], vv_string[1]), '%d: %s \'%s\' %s' % \ (chan, status_bytes[msg][2], mode_fn[2], vv_string[1])]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_0xb0(self, is_flushed): # Control change (or channel mode messages): Bn cc vv # n = channel, cc = control number (0 - 119), vv = control value c = self.cmd if len(c) < 2: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es if c[0] in range(0x78, 0x7f + 1): self.handle_channel_mode() return handle_ctrl = getattr(self, 'handle_controller_0x%02x' % c[0], self.handle_controller_generic) handle_ctrl() self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_0xc0(self, is_flushed): # Program change: Cn pp # n = channel, pp = program number (0 - 127) c = self.cmd if len(c) < 1: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 pp = self.cmd[0] + 1 change_type = 'instrument' name = '' if chan != 10: # channel != percussion name = gm_instruments.get(pp, 'undefined') else: change_type = 'drum kit' name = drum_kit.get(pp, 'undefined') self.putx([0, ['Channel %d: %s to %s %d (assuming %s)' % \ (chan, status_bytes[msg][0], change_type, pp, name), 'ch %d: %s to %s %d' % \ (chan, status_bytes[msg][1], change_type, pp), '%d: %s %d' % \ (chan, status_bytes[msg][2], pp)]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_0xd0(self, is_flushed): # Channel pressure / aftertouch: Dn vv # n = channel, vv = pressure value c = self.cmd if len(c) < 1: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 vv = self.cmd[0] self.putx([0, ['Channel %d: %s %d' % (chan, status_bytes[msg][0], vv), 'ch %d: %s %d' % (chan, status_bytes[msg][1], vv), '%d: %s %d' % (chan, status_bytes[msg][2], vv)]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_0xe0(self, is_flushed): # Pitch bend change: En ll mm # n = channel, ll = pitch bend change LSB, mm = pitch bend change MSB c = self.cmd if len(c) < 2: self.check_for_garbage_flush(is_flushed) return self.es_block = self.es msg, chan = self.status_byte & 0xf0, (self.status_byte & 0x0f) + 1 ll, mm = self.cmd[0], self.cmd[1] decimal = (mm << 7) + ll self.putx([0, ['Channel %d: %s 0x%02x 0x%02x (%d)' % \ (chan, status_bytes[msg][0], ll, mm, decimal), 'ch %d: %s 0x%02x 0x%02x (%d)' % \ (chan, status_bytes[msg][1], ll, mm, decimal), '%d: %s (%d)' % \ (chan, status_bytes[msg][2], decimal)]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg_generic(self, is_flushed): # TODO: It should not be possible to hit this code. # It currently can not be unit tested. msg_type = self.status_byte & 0xf0 self.es_block = self.es self.putx([2, ['Unknown channel message type: 0x%02x' % msg_type]]) self.cmd, self.state = [], 'IDLE' self.soft_clear_status_byte() def handle_channel_msg(self, newbyte): if newbyte is not None: if newbyte >= 0x80: self.set_status_byte(newbyte) else: self.cmd.append(newbyte) msg_type = self.status_byte & 0xf0 handle_msg = getattr(self, 'handle_channel_msg_0x%02x' % msg_type, self.handle_channel_msg_generic) handle_msg(newbyte is None) def handle_sysex_msg(self, newbyte): # SysEx message: 1 status byte, 1-3 manuf. bytes, x data bytes, EOX byte # # SysEx messages are variable length, can be terminated by EOX or # by any non-SysReal status byte, and it clears self.status_byte. # # Note: All System message codes don't utilize self.status_byte. self.hard_clear_status_byte() if newbyte != 0xf7 and newbyte is not None: # EOX self.cmd.append(newbyte) return self.es_block = self.es # Note: Unlike other methods, this code pops bytes out of self.cmd # to isolate the data. msg = self.cmd.pop(0) if len(self.cmd) < 1: self.putx([2, ['%s: truncated manufacturer code (<1 bytes)' % \ status_bytes[msg][0], '%s: truncated manufacturer (<1 bytes)' % \ status_bytes[msg][1], '%s: trunc. manu.' % status_bytes[msg][2]]]) self.cmd, self.state = [], 'IDLE' return # Extract the manufacturer name (or SysEx realtime or non-realtime). m1 = self.cmd.pop(0) manu = (m1,) if m1 == 0x00: # If byte == 0, then 2 more manufacturer bytes follow. if len(self.cmd) < 2: self.putx([2, ['%s: truncated manufacturer code (<3 bytes)' % \ status_bytes[msg][0], '%s: truncated manufacturer (<3 bytes)' % \ status_bytes[msg][1], '%s: trunc. manu.' % status_bytes[msg][2]]]) self.cmd, self.state = [], 'IDLE' return manu = (m1, self.cmd.pop(0), self.cmd.pop(0)) default_name = 'undefined' manu_name = sysex_manufacturer_ids.get(manu, default_name) if manu_name == default_name: if len(manu) == 3: manu_name = ('%s (0x%02x 0x%02x 0x%02x)' % \ (default_name, manu[0], manu[1], manu[2]), default_name) else: manu_name = ('%s (0x%02x)' % (default_name, manu[0]), default_name) else: manu_name = (manu_name, manu_name) # Extract the payload, display in 1 of 2 formats # TODO: Write methods to decode SysEx realtime & non-realtime payloads. payload0 = '' payload1 = '' while len(self.cmd) > 0: byte = self.cmd.pop(0) payload0 += '0x%02x ' % (byte) payload1 += '%02x ' % (byte) if payload0 == '': payload0 = '' payload1 = '<>' payload = (payload0, payload1) self.putx([0, ['%s: for \'%s\' with payload %s' % \ (status_bytes[msg][0], manu_name[0], payload[0]), '%s: \'%s\', payload %s' % \ (status_bytes[msg][1], manu_name[1], payload[1]), '%s: \'%s\', payload %s' % \ (status_bytes[msg][2], manu_name[1], payload[1])]]) self.cmd, self.state = [], 'IDLE' def handle_syscommon_midi_time_code_quarter_frame_msg(self, newbyte): # MIDI time code quarter frame: F1 nd # n = message type # d = values # # Note: All System message codes don't utilize self.status_byte, # and System Exclusive and System Common clear it. c = self.cmd if len(c) < 2: if newbyte is None: self.handle_garbage_msg(None) return msg = c[0] nn, dd = (c[1] & 0x70) >> 4, c[1] & 0x0f group = ('System Common', 'SysCom', 'SC') self.es_block = self.es if nn != 7: # If message type does not contain SMPTE type. self.putx([0, ['%s: %s of %s, value 0x%01x' % \ (group[0], status_bytes[msg][0], quarter_frame_type[nn][0], dd), '%s: %s of %s, value 0x%01x' % \ (group[1], status_bytes[msg][1], quarter_frame_type[nn][1], dd), '%s: %s of %s, value 0x%01x' % \ (group[2], status_bytes[msg][2], quarter_frame_type[nn][1], dd)]]) self.cmd, self.state = [], 'IDLE' return tt = (dd & 0x6) >> 1 self.putx([0, ['%s: %s of %s, value 0x%01x for %s' % \ (group[0], status_bytes[msg][0], \ quarter_frame_type[nn][0], dd, smpte_type[tt]), '%s: %s of %s, value 0x%01x for %s' % \ (group[1], status_bytes[msg][1], \ quarter_frame_type[nn][1], dd, smpte_type[tt]), '%s: %s of %s, value 0x%01x for %s' % \ (group[2], status_bytes[msg][2], \ quarter_frame_type[nn][1], dd, smpte_type[tt])]]) self.cmd, self.state = [], 'IDLE' def handle_syscommon_msg(self, newbyte): # System common messages # # There are 5 simple formats (which are directly handled here) and # 1 complex one called MIDI time code quarter frame. # # Note: While the MIDI lists 0xf7 as a "system common" message, it # is actually only used with SysEx messages so it is processed there. # # Note: All System message codes don't utilize self.status_byte. self.hard_clear_status_byte() if newbyte is not None: self.cmd.append(newbyte) c = self.cmd msg = c[0] group = ('System Common', 'SysCom', 'SC') if msg == 0xf1: # MIDI time code quarter frame self.handle_syscommon_midi_time_code_quarter_frame_msg(newbyte) return elif msg == 0xf2: # Song position pointer: F2 ll mm # ll = LSB position, mm = MSB position if len(c) < 3: if newbyte is None: self.handle_garbage_msg(None) return ll, mm = c[1], c[2] decimal = (mm << 7) + ll self.es_block = self.es self.putx([0, ['%s: %s 0x%02x 0x%02x (%d)' % \ (group[0], status_bytes[msg][0], ll, mm, decimal), '%s: %s 0x%02x 0x%02x (%d)' % \ (group[1], status_bytes[msg][1], ll, mm, decimal), '%s: %s (%d)' % \ (group[2], status_bytes[msg][2], decimal)]]) elif msg == 0xf3: # Song select: F3 ss # ss = song selection number if len(c) < 2: if newbyte is None: self.handle_garbage_msg(None) return ss = c[1] self.es_block = self.es self.putx([0, ['%s: %s number %d' % \ (group[0], status_bytes[msg][0], ss), '%s: %s number %d' % \ (group[1], status_bytes[msg][1], ss), '%s: %s # %d' % \ (group[2], status_bytes[msg][2], ss)]]) elif msg == 0xf4 or msg == 0xf5 or msg == 0xf6: # Undefined 0xf4, Undefined 0xf5, and Tune Request (respectively). # All are only 1 byte long with no data bytes. self.es_block = self.es self.putx([0, ['%s: %s' % (group[0], status_bytes[msg][0]), '%s: %s' % (group[1], status_bytes[msg][1]), '%s: %s' % (group[2], status_bytes[msg][2])]]) self.cmd, self.state = [], 'IDLE' def handle_sysrealtime_msg(self, newbyte): # System realtime message: 0b11111ttt (t = message type) # # Important: These messages are handled differently from all others # because they are allowed to temporarily interrupt other messages. # The interrupted messages resume after the realtime message is done. # Thus, they mostly leave 'self' the way it was found. # # Note: All System message codes don't utilize self.status_byte. old_ss_block, old_es_block = self.ss_block, self.es_block self.ss_block, self.es_block = self.ss, self.es group = ('System Realtime', 'SysReal', 'SR') self.putx([1, ['%s: %s' % (group[0], status_bytes[newbyte][0]), '%s: %s' % (group[1], status_bytes[newbyte][1]), '%s: %s' % (group[2], status_bytes[newbyte][2])]]) self.ss_block, self.es_block = old_ss_block, old_es_block # Deliberately not resetting self.cmd or self.state. def handle_garbage_msg(self, newbyte): # Handle messages that are either not handled or are corrupt. self.es_block = self.es if newbyte is not None: self.cmd.append(newbyte) return payload = '' max_bytes = 16 # Put a limit on the length on the hex dump. for index in range(len(self.cmd)): if index == max_bytes: payload += ' ...' break if index == 0: payload = '0x%02x' % self.cmd[index] else: payload += ' 0x%02x' % self.cmd[index] self.putx([2, ['UNHANDLED DATA: %s' % payload, 'UNHANDLED', '???', '?']]) self.cmd, self.state = [], 'IDLE' self.hard_clear_status_byte() def handle_state(self, state, newbyte): # 'newbyte' can either be: # 1. Value between 0x00-0xff, deal with the byte normally. # 2. Value of 'None' which means "flush any buffered data". if state == 'HANDLE CHANNEL MSG': self.handle_channel_msg(newbyte) elif state == 'HANDLE SYSEX MSG': self.handle_sysex_msg(newbyte) elif state == 'HANDLE SYSCOMMON MSG': self.handle_syscommon_msg(newbyte) elif state == 'HANDLE SYSREALTIME MSG': self.handle_sysrealtime_msg(newbyte) elif state == 'BUFFER GARBAGE MSG': self.handle_garbage_msg(newbyte) def get_next_state(self, newbyte): # 'newbyte' must be a valid byte between 0x00 and 0xff. # # Try to determine the state based off of the 'newbyte' parameter. if newbyte in range(0x80, 0xef + 1): return 'HANDLE CHANNEL MSG' if newbyte == 0xf0: return 'HANDLE SYSEX MSG' if newbyte in range(0xf1, 0xf7): return'HANDLE SYSCOMMON MSG' if newbyte in range(0xf8, 0xff + 1): return 'HANDLE SYSREALTIME MSG' # Passing 0xf7 is an error; messages don't start with 0xf7. if newbyte == 0xf7: return 'BUFFER GARBAGE MSG' # Next, base the state off of self.status_byte. if self.status_byte < 0x80: return 'BUFFER GARBAGE MSG' return self.get_next_state(self.status_byte) def decode(self, ss, es, data): ptype, rxtx, pdata = data state = 'IDLE' # For now, ignore all UART packets except the actual data packets. if ptype != 'DATA': return # We're only interested in the byte value (not individual bits). pdata = pdata[0] # Short MIDI overview: # - Status bytes are 0x80-0xff, data bytes are 0x00-0x7f. # - Most messages: 1 status byte, 1-2 data bytes. # - Real-time system messages: always 1 byte. # - SysEx messages: 1 status byte, n data bytes, EOX byte. # # Aspects of the MIDI protocol that complicate decoding: # - MIDI System Realtime messages can briefly interrupt other # messages already in progress. # - "Running Status" allows for omitting the status byte in most # scenarios if sequential messages have the same status byte. # - System Exclusive (SysEx) messages can be terminated by ANY # status byte (not limited to EOX byte). # State machine. if pdata >= 0x80 and pdata != 0xf7: state = self.get_next_state(pdata) if state != 'HANDLE SYSREALTIME MSG' and self.state != 'IDLE': # Flush the previous data since a new message is starting. self.handle_state(self.state, None) # Cache ss and es -after- flushing previous data. self.ss, self.es = ss, es # This is a status byte, remember the start sample. if state != 'HANDLE SYSREALTIME MSG': self.ss_block = ss elif self.state == 'IDLE' or self.state == 'BUFFER GARBAGE MSG': # Deal with "running status" or that we're buffering garbage. self.ss, self.es = ss, es if self.state == 'IDLE': self.ss_block = ss state = self.get_next_state(pdata) else: self.ss, self.es = ss, es state = self.state # Yes, this is intentionally _not_ an 'elif' here. if state != 'HANDLE SYSREALTIME MSG': self.state = state if state == 'BUFFER GARBAGE MSG': self.status_byte = 0 self.handle_state(state, pdata) libsigrokdecode-0.5.0/decoders/midi/__init__.py0000644000175000017500000000205013117367246016420 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'uart' PD and decodes the MIDI (Musical Instrument Digital Interface) protocol. MIDI is layered on top of the UART (async serial) protocol, with a fixed baud rate of 31250 baud (+/- 1%) and 8n1 settings. Bytes are sent LSB-first. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/midi/lists.py0000644000175000017500000006475213117367246016040 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013-2016 Uwe Hermann ## Copyright (C) 2016 Chris Dreher ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Each status byte has 3 string names, each shorter than the previous status_bytes = { # Channel voice messages 0x80: ['note off', 'note off', 'N off'], 0x90: ['note on', 'note on', 'N on'], # However, velocity = 0 means "note off". 0xa0: ['polyphonic key pressure / aftertouch', 'key pressure', 'KP' ], 0xb0: ['control change', 'ctrl chg', 'CC'], 0xc0: ['program change', 'prgm chg', 'PC'], 0xd0: ['channel pressure / aftertouch', 'channel pressure', 'CP'], 0xe0: ['pitch bend change', 'pitch bend', 'PB'], # Channel mode messages # 0xb0: 'select channel mode', # Note: Same as 'control change'. # System exclusive messages 0xf0: ['system exclusive', 'SysEx', 'SE'], # System common messages 0xf1: ['MIDI time code quarter frame', 'MIDI time code', 'MIDI time'], 0xf2: ['song position pointer', 'song position', 'song pos'], 0xf3: ['song select', 'song select', 'song sel'], 0xf4: ['undefined 0xf4', 'undef 0xf4', 'undef'], 0xf5: ['undefined 0xf5', 'undef 0xf5', 'undef'], 0xf6: ['tune request', 'tune request', 'tune req'], 0xf7: ['end of system exclusive (EOX)', 'end of SysEx', 'EOX'], # System real time messages 0xf8: ['timing clock', 'timing clock', 'clock'], 0xf9: ['undefined 0xf9', 'undef 0xf9', 'undef'], 0xfa: ['start', 'start', 's'], 0xfb: ['continue', 'continue', 'cont'], 0xfc: ['stop', 'stop', 'st'], 0xfd: ['undefined 0xfd', 'undef 0xfd', 'undef'], 0xfe: ['active sensing', 'active sensing', 'sensing'], 0xff: ['system reset', 'reset', 'rst'], } # Universal system exclusive (SysEx) messages, non-realtime (0x7e) universal_sysex_nonrealtime = { (0x00, None): 'unused', (0x01, None): 'sample dump header', (0x02, None): 'sample data packet', (0x03, None): 'sample dump request', (0x04, None): 'MIDI time code', (0x04, 0x00): 'special', (0x04, 0x01): 'punch in points', (0x04, 0x02): 'punch out points', (0x04, 0x03): 'delete punch in point', (0x04, 0x04): 'delete punch out point', (0x04, 0x05): 'event start point', (0x04, 0x06): 'event stop point', (0x04, 0x07): 'event start points with additional info', (0x04, 0x08): 'event stop points with additional info', (0x04, 0x09): 'delete event start point', (0x04, 0x0a): 'delete event stop point', (0x04, 0x0b): 'cue points', (0x04, 0x0c): 'cue points with additional info', (0x04, 0x0d): 'delete cue point', (0x04, 0x0e): 'event name in additional info', (0x05, None): 'sample dump extensions', (0x05, 0x01): 'multiple loop points', (0x05, 0x02): 'loop points request', (0x06, None): 'general information', (0x06, 0x01): 'identity request', (0x06, 0x02): 'identity reply', (0x07, None): 'file dump', (0x07, 0x01): 'header', (0x07, 0x02): 'data packet', (0x07, 0x03): 'request', (0x08, None): 'MIDI tuning standard', (0x08, 0x00): 'bulk dump request', (0x08, 0x01): 'bulk dump reply', (0x09, None): 'general MIDI', (0x09, 0x01): 'general MIDI system on', (0x09, 0x02): 'general MIDI system off', (0x7b, None): 'end of file', (0x7c, None): 'wait', (0x7d, None): 'cancel', (0x7e, None): 'nak', (0x7f, None): 'ack', } # Universal system exclusive (SysEx) messages, realtime (0x7f) universal_sysex_realtime = { (0x00, None): 'unused', (0x01, None): 'MIDI time code', (0x01, 0x01): 'full message', (0x01, 0x02): 'user bits', (0x02, None): 'MIDI show control', (0x02, 0x00): 'MSC extensions', # (0x02, TODO): 'TODO', # 0x01 - 0x7f: MSC commands. (0x03, None): 'notation information', (0x03, 0x01): 'bar number', (0x03, 0x02): 'time signature (immediate)', (0x03, 0x42): 'time signature (delayed)', (0x04, None): 'device control', (0x04, 0x01): 'master volume', (0x04, 0x02): 'master balance', (0x05, None): 'real time MTC cueing', (0x05, 0x00): 'special', (0x05, 0x01): 'punch in points', (0x05, 0x02): 'punch out points', (0x05, 0x03): 'reserved', (0x05, 0x04): 'reserved', (0x05, 0x05): 'event start points', (0x05, 0x06): 'event stop points', (0x05, 0x07): 'event start points with additional info', (0x05, 0x08): 'event stop points with additional info', (0x05, 0x09): 'reserved', (0x05, 0x0a): 'reserved', (0x05, 0x0b): 'cue points', (0x05, 0x0c): 'cue points with additional info', (0x05, 0x0d): 'reserved', (0x05, 0x0e): 'event name in additional info', (0x06, None): 'MIDI machine control commands', # (0x06, TODO): 'TODO', # 0x00 - 0x7f: MMC commands. (0x07, None): 'MIDI machine control responses', # (0x07, TODO): 'TODO', # 0x00 - 0x7f: MMC commands. (0x08, None): 'MIDI tuning standard', (0x85, 0x02): 'note change', } # Note: Not all IDs are used/listed, i.e. there are some "holes". sysex_manufacturer_ids = { # American group (range 01-1f, 000001-001f7f) (0x01,): 'Sequential', (0x02,): 'IDP', (0x03,): 'Voyetra/Octave-Plateau', (0x04,): 'Moog', (0x05,): 'Passport Designs', (0x06,): 'Lexicon', (0x07,): 'Kurzweil', (0x08,): 'Fender', (0x09,): 'Gulbransen', (0x0a,): 'AKG Acoustics', (0x0b,): 'Voyce Music', (0x0c,): 'Waveframe Corp', (0x0d,): 'ADA Signal Processors', (0x0e,): 'Garfield Electronics', (0x0f,): 'Ensoniq', (0x10,): 'Oberheim', (0x11,): 'Apple Computer', (0x12,): 'Grey Matter Response', (0x13,): 'Digidesign', (0x14,): 'Palm Tree Instruments', (0x15,): 'JLCooper Electronics', (0x16,): 'Lowrey', (0x17,): 'Adams-Smith', (0x18,): 'Emu Systems', (0x19,): 'Harmony Systems', (0x1a,): 'ART', (0x1b,): 'Baldwin', (0x1c,): 'Eventide', (0x1d,): 'Inventronics', (0x1f,): 'Clarity', (0x00, 0x00, 0x01): 'Time Warner Interactive', (0x00, 0x00, 0x07): 'Digital Music Corp.', (0x00, 0x00, 0x08): 'IOTA Systems', (0x00, 0x00, 0x09): 'New England Digital', (0x00, 0x00, 0x0a): 'Artisyn', (0x00, 0x00, 0x0b): 'IVL Technologies', (0x00, 0x00, 0x0c): 'Southern Music Systems', (0x00, 0x00, 0x0d): 'Lake Butler Sound Company', (0x00, 0x00, 0x0e): 'Alesis', (0x00, 0x00, 0x10): 'DOD Electronics', (0x00, 0x00, 0x11): 'Studer-Editech', (0x00, 0x00, 0x14): 'Perfect Fretworks', (0x00, 0x00, 0x15): 'KAT', (0x00, 0x00, 0x16): 'Opcode', (0x00, 0x00, 0x17): 'Rane Corp.', (0x00, 0x00, 0x18): 'Anadi Inc.', (0x00, 0x00, 0x19): 'KMX', (0x00, 0x00, 0x1a): 'Allen & Heath Brenell', (0x00, 0x00, 0x1b): 'Peavy Electronics', (0x00, 0x00, 0x1c): '360 Systems', (0x00, 0x00, 0x1d): 'Spectrum Design and Development', (0x00, 0x00, 0x1e): 'Marquis Music', (0x00, 0x00, 0x1f): 'Zeta Systems', (0x00, 0x00, 0x20): 'Axxes', (0x00, 0x00, 0x21): 'Orban', (0x00, 0x00, 0x24): 'KTI', (0x00, 0x00, 0x25): 'Breakaway Technologies', (0x00, 0x00, 0x26): 'CAE', (0x00, 0x00, 0x29): 'Rocktron Corp.', (0x00, 0x00, 0x2a): 'PianoDisc', (0x00, 0x00, 0x2b): 'Cannon Research Group', (0x00, 0x00, 0x2d): 'Rogers Instrument Corp.', (0x00, 0x00, 0x2e): 'Blue Sky Logic', (0x00, 0x00, 0x2f): 'Encore Electronics', (0x00, 0x00, 0x30): 'Uptown', (0x00, 0x00, 0x31): 'Voce', (0x00, 0x00, 0x32): 'CTI Audio, Inc. (Music. Intel Dev.)', (0x00, 0x00, 0x33): 'S&S Research', (0x00, 0x00, 0x34): 'Broderbund Software, Inc.', (0x00, 0x00, 0x35): 'Allen Organ Co.', (0x00, 0x00, 0x37): 'Music Quest', (0x00, 0x00, 0x38): 'APHEX', (0x00, 0x00, 0x39): 'Gallien Krueger', (0x00, 0x00, 0x3a): 'IBM', (0x00, 0x00, 0x3c): 'Hotz Instruments Technologies', (0x00, 0x00, 0x3d): 'ETA Lighting', (0x00, 0x00, 0x3e): 'NSI Corporation', (0x00, 0x00, 0x3f): 'Ad Lib, Inc.', (0x00, 0x00, 0x40): 'Richmond Sound Design', (0x00, 0x00, 0x41): 'Microsoft', (0x00, 0x00, 0x42): 'The Software Toolworks', (0x00, 0x00, 0x43): 'Niche/RJMG', (0x00, 0x00, 0x44): 'Intone', (0x00, 0x00, 0x47): 'GT Electronics / Groove Tubes', (0x00, 0x00, 0x49): 'Timeline Vista', (0x00, 0x00, 0x4a): 'Mesa Boogie', (0x00, 0x00, 0x4c): 'Sequoia Development', (0x00, 0x00, 0x4d): 'Studio Electronics', (0x00, 0x00, 0x4e): 'Euphonix', (0x00, 0x00, 0x4f): 'InterMIDI, Inc.', (0x00, 0x00, 0x50): 'MIDI Solutions', (0x00, 0x00, 0x51): '3DO Company', (0x00, 0x00, 0x52): 'Lightwave Research', (0x00, 0x00, 0x53): 'Micro-W', (0x00, 0x00, 0x54): 'Spectral Synthesis', (0x00, 0x00, 0x55): 'Lone Wolf', (0x00, 0x00, 0x56): 'Studio Technologies', (0x00, 0x00, 0x57): 'Peterson EMP', (0x00, 0x00, 0x58): 'Atari', (0x00, 0x00, 0x59): 'Marion Systems', (0x00, 0x00, 0x5a): 'Design Event', (0x00, 0x00, 0x5b): 'Winjammer Software', (0x00, 0x00, 0x5c): 'AT&T Bell Labs', (0x00, 0x00, 0x5e): 'Symetrix', (0x00, 0x00, 0x5f): 'MIDI the World', (0x00, 0x00, 0x60): 'Desper Products', (0x00, 0x00, 0x61): 'Micros\'N MIDI', (0x00, 0x00, 0x62): 'Accordians Intl', (0x00, 0x00, 0x63): 'EuPhonics', (0x00, 0x00, 0x64): 'Musonix', (0x00, 0x00, 0x65): 'Turtle Beach Systems', (0x00, 0x00, 0x66): 'Mackie Designs', (0x00, 0x00, 0x67): 'Compuserve', (0x00, 0x00, 0x68): 'BES Technologies', (0x00, 0x00, 0x69): 'QRS Music Rolls', (0x00, 0x00, 0x6a): 'P G Music', (0x00, 0x00, 0x6b): 'Sierra Semiconductor', (0x00, 0x00, 0x6c): 'EpiGraf Audio Visual', (0x00, 0x00, 0x6d): 'Electronics Deiversified', (0x00, 0x00, 0x6e): 'Tune 1000', (0x00, 0x00, 0x6f): 'Advanced Micro Devices', (0x00, 0x00, 0x70): 'Mediamation', (0x00, 0x00, 0x71): 'Sabine Music', (0x00, 0x00, 0x72): 'Woog Labs', (0x00, 0x00, 0x73): 'Micropolis', (0x00, 0x00, 0x74): 'Ta Horng Musical Inst.', (0x00, 0x00, 0x75): 'eTek (formerly Forte)', (0x00, 0x00, 0x76): 'Electrovoice', (0x00, 0x00, 0x77): 'Midisoft', (0x00, 0x00, 0x78): 'Q-Sound Labs', (0x00, 0x00, 0x79): 'Westrex', (0x00, 0x00, 0x7a): 'NVidia', (0x00, 0x00, 0x7b): 'ESS Technology', (0x00, 0x00, 0x7c): 'MediaTrix Peripherals', (0x00, 0x00, 0x7d): 'Brooktree', (0x00, 0x00, 0x7e): 'Otari', (0x00, 0x00, 0x7f): 'Key Electronics', (0x00, 0x01, 0x01): 'Crystalake Multimedia', (0x00, 0x01, 0x02): 'Crystal Semiconductor', (0x00, 0x01, 0x03): 'Rockwell Semiconductor', # European group (range 20-3f, 002000-003f7f) (0x20,): 'Passac', (0x21,): 'SIEL', (0x22,): 'Synthaxe', (0x24,): 'Hohner', (0x25,): 'Twister', (0x26,): 'Solton', (0x27,): 'Jellinghaus MS', (0x28,): 'Southworth Music Systems', (0x29,): 'PPG', (0x2a,): 'JEN', (0x2b,): 'SSL Limited', (0x2c,): 'Audio Veritrieb', (0x2f,): 'Elka', (0x30,): 'Dynacord', (0x31,): 'Viscount', (0x33,): 'Clavia Digital Instruments', (0x34,): 'Audio Architecture', (0x35,): 'GeneralMusic Corp.', (0x39,): 'Soundcraft Electronics', (0x3b,): 'Wersi', (0x3c,): 'Avab Elektronik Ab', (0x3d,): 'Digigram', (0x3e,): 'Waldorf Electronics', (0x3f,): 'Quasimidi', (0x00, 0x20, 0x00): 'Dream', (0x00, 0x20, 0x01): 'Strand Lighting', (0x00, 0x20, 0x02): 'Amek Systems', (0x00, 0x20, 0x04): 'Böhm Electronic', (0x00, 0x20, 0x06): 'Trident Audio', (0x00, 0x20, 0x07): 'Real World Studio', (0x00, 0x20, 0x09): 'Yes Technology', (0x00, 0x20, 0x0a): 'Audiomatica', (0x00, 0x20, 0x0b): 'Bontempi/Farfisa', (0x00, 0x20, 0x0c): 'F.B.T. Elettronica', (0x00, 0x20, 0x0d): 'MidiTemp', (0x00, 0x20, 0x0e): 'LA Audio (Larking Audio)', (0x00, 0x20, 0x0f): 'Zero 88 Lighting Limited', (0x00, 0x20, 0x10): 'Micon Audio Electronics GmbH', (0x00, 0x20, 0x11): 'Forefront Technology', (0x00, 0x20, 0x13): 'Kenton Electronics', (0x00, 0x20, 0x15): 'ADB', (0x00, 0x20, 0x16): 'Marshall Products', (0x00, 0x20, 0x17): 'DDA', (0x00, 0x20, 0x18): 'BSS', (0x00, 0x20, 0x19): 'MA Lighting Technology', (0x00, 0x20, 0x1a): 'Fatar', (0x00, 0x20, 0x1b): 'QSC Audio', (0x00, 0x20, 0x1c): 'Artisan Classic Organ', (0x00, 0x20, 0x1d): 'Orla Spa', (0x00, 0x20, 0x1e): 'Pinnacle Audio', (0x00, 0x20, 0x1f): 'TC Electronics', (0x00, 0x20, 0x20): 'Doepfer Musikelektronik', (0x00, 0x20, 0x21): 'Creative Technology Pte', (0x00, 0x20, 0x22): 'Minami/Seiyddo', (0x00, 0x20, 0x23): 'Goldstar', (0x00, 0x20, 0x24): 'Midisoft s.a.s di M. Cima', (0x00, 0x20, 0x25): 'Samick', (0x00, 0x20, 0x26): 'Penny and Giles', (0x00, 0x20, 0x27): 'Acorn Computer', (0x00, 0x20, 0x28): 'LSC Electronics', (0x00, 0x20, 0x29): 'Novation EMS', (0x00, 0x20, 0x2a): 'Samkyung Mechatronics', (0x00, 0x20, 0x2b): 'Medeli Electronics', (0x00, 0x20, 0x2c): 'Charlie Lab', (0x00, 0x20, 0x2d): 'Blue Chip Music Tech', (0x00, 0x20, 0x2e): 'BEE OH Corp', # Japanese group (range 40-5f, 004000-005f7f) (0x40,): 'Kawai', (0x41,): 'Roland', (0x42,): 'Korg', (0x43,): 'Yamaha', (0x44,): 'Casio', (0x46,): 'Kamiya Studio', (0x47,): 'Akai', (0x48,): 'Japan Victor', (0x49,): 'Mesosha', (0x4a,): 'Hoshino Gakki', (0x4b,): 'Fujitsu Elect', (0x4c,): 'Sony', (0x4d,): 'Nisshin Onpa', (0x4e,): 'TEAC', (0x50,): 'Matsushita Electric', (0x51,): 'Fostex', (0x52,): 'Zoom', (0x53,): 'Midori Electronics', (0x54,): 'Matsushita Communication Industrial', (0x55,): 'Suzuki Musical Inst. Mfg.', # Other (range 60-7c, 006000-007f7f) # Special (7d-7f) (0x7d,): 'Non-Commercial', (0x7e,): 'Universal Non-Realtime', (0x7f,): 'Universal Realtime', } control_functions = { 0x00: ['bank select MSB', 'bank MSB', 'bank-M'], 0x01: ['modulation wheel/lever MSB', 'modulation MSB', 'mod-M'], 0x02: ['breath controller MSB', 'breath MSB', 'breath-M'], # 0x03: undefined MSB 0x04: ['foot controller MSB', 'foot MSB', 'foot-M'], 0x05: ['portamento time MSB', 'portamento MSB', 'porta-M'], 0x06: ['data entry MSB', 'data entry MSB', 'data-M'], 0x07: ['channel volume MSB (formerly main volume)', 'channel volume MSB', 'ch vol-M'], 0x08: ['balance MSB', 'bal MSB', 'bal-M'], # 0x09: undefined MSB 0x0a: ['pan MSB', 'pan MSB', 'pan-M'], 0x0b: ['expression controller MSB', 'expression MSB', 'expr-M'], 0x0c: ['effect control 1 MSB', 'effect 1 MSB', 'eff-1-M'], 0x0d: ['effect control 2 MSB', 'effect 2 MSB', 'eff-2-M'], # 0x0e-0x0f: undefined MSB 0x10: ['general purpose controller 1 MSB', 'GP ctrl 1 MSB', 'GPC-1-M'], 0x11: ['general purpose controller 2 MSB', 'GP ctrl 2 MSB', 'GPC-2-M'], 0x12: ['general purpose controller 3 MSB', 'GP ctrl 3 MSB', 'GPC-3-M'], 0x13: ['general purpose controller 4 MSB', 'GP ctrl 4 MSB', 'GPC-4-M'], # 0x14-0x1f: undefined MSB 0x20: ['bank select LSB', 'bank LSB', 'bank-L'], 0x21: ['modulation wheel/lever LSB', 'modulation LSB', 'mod-L'], 0x22: ['breath controller LSB', 'breath LSB', 'breath-L'], # 0x23: undefined LSB 0x24: ['foot controller LSB', 'foot LSB', 'foot-L'], 0x25: ['portamento time LSB', 'portamento LSB', 'porta-L'], 0x26: ['data entry LSB', 'data entry LSB', 'data-L'], 0x27: ['channel volume LSB (formerly main volume)', 'channel volume LSB', 'ch vol-L'], 0x28: ['balance LSB', 'bal LSB', 'bal-L'], # 0x29: undefined LSB 0x2a: ['pan LSB', 'pan LSB', 'pan-L'], 0x2b: ['expression controller LSB', 'expression LSB', 'expr-L'], 0x2c: ['effect control 1 LSB', 'effect 1 LSB', 'eff-1-L'], 0x2d: ['effect control 2 LSB', 'effect 2 LSB', 'eff-2-L'], # 0x2e-0x2f: undefined LSB 0x30: ['general purpose controller 1 LSB', 'GP ctrl 1 LSB', 'GPC-1-L'], 0x31: ['general purpose controller 2 LSB', 'GP ctrl 2 LSB', 'GPC-2-L'], 0x32: ['general purpose controller 3 LSB', 'GP ctrl 3 LSB', 'GPC-3-L'], 0x33: ['general purpose controller 4 LSB', 'GP ctrl 4 LSB', 'GPC-4-L'], # 0x34-0x3f: undefined LSB 0x40: ['damper pedal (sustain)', 'sustain', 'sust'], 0x41: ['portamento on/off', 'porta on/off', 'porta on/off'], 0x42: ['sostenuto', 'sostenuto', 'sostenuto'], 0x43: ['soft pedal', 'soft pedal', 'soft pedal'], 0x44: ['legato footswitch', 'legato switch', 'legato'], # vv: 00-3f = normal, 40-7f = legato 0x45: ['hold 2', 'hold 2', 'hold 2'], 0x46: ['sound controller 1 (default: sound variation)', 'sound ctrl 1', 'snd ctrl 1'], 0x47: ['sound controller 2 (default: timbre / harmonic intensity)', 'sound ctrl 2', 'snd ctrl 2'], 0x48: ['sound controller 3 (default: release time)', 'sound ctrl 3', 'snd ctrl 3'], 0x49: ['sound controller 4 (default: attack time)', 'sound ctrl 4', 'snd ctrl 4'], 0x4a: ['sound controller 5 (default: brightness)', 'sound ctrl 5', 'snd ctrl 5'], 0x4b: ['sound controller 6 (GM2 default: decay time)', 'sound ctrl 6', 'snd ctrl 6'], 0x4c: ['sound controller 7 (GM2 default: vibrato rate)', 'sound ctrl 7', 'snd ctrl 7'], 0x4d: ['sound controller 8 (GM2 default: vibrato depth)', 'sound ctrl 8', 'snd ctrl 8'], 0x4e: ['sound controller 9 (GM2 default: vibrato delay)', 'sound ctrl 9', 'snd ctrl 9'], 0x4f: ['sound controller 10', 'sound ctrl 10', 'snd ctrl 10'], 0x50: ['general purpose controller 5', 'GP controller 5', 'GPC-5'], 0x51: ['general purpose controller 6', 'GP controller 6', 'GPC-6'], 0x52: ['general purpose controller 7', 'GP controller 7', 'GPC-7'], 0x53: ['general purpose controller 8', 'GP controller 8', 'GPC-8'], 0x54: ['portamento control', 'portamento ctrl', 'porta ctrl'], # 0x55-0x5a: undefined 0x5b: ['effects 1 depth (formerly external effects depth)', 'effects 1 depth', 'eff 1 depth'], 0x5c: ['effects 2 depth (formerly tremolo depth)', 'effects 2 depth', 'eff 2 depth'], 0x5d: ['effects 3 depth (formerly chorus depth)', 'effects 3 depth', 'eff 3 depth'], 0x5e: ['effects 4 depth (formerly celeste/detune depth)', 'effects 4 depth', 'eff 4 depth'], 0x5f: ['effects 5 depth (formerly phaser depth)', 'effects 5 depth', 'eff 5 depth'], 0x60: ['data increment', 'data inc', 'data++'], 0x61: ['data decrement', 'data dec', 'data--'], 0x62: ['Non-Registered Parameter Number LSB', 'NRPN LSB', 'NRPN-L'], 0x63: ['Non-Registered Parameter Number MSB', 'NRPN MSB', 'NRPN-M'], 0x64: ['Registered Parameter Number LSB', 'RPN LSB', 'RPN-L'], 0x65: ['Registered Parameter Number MSB', 'RPN MSB', 'RPN-M'], # 0x66-0x77: undefined # 0x78-0x7f: reserved for channel mode messages 0x78: ['all sound off', 'all snd off', 'snd off'], 0x79: ['reset all controllers', 'reset all ctrls', 'reset ctrls'], 0x7a: ['local control', 'local ctrl', 'local ctrl'], 0x7b: ['all notes off', 'notes off', 'notes off'], 0x7c: ['omni mode off', 'omni off', 'omni off'], # all notes off 0x7d: ['omni mode on', 'omni on', 'omni on'], # all notes off 0x7e: ['mono mode on', 'mono on', 'mono'], # mono mode on, all notes off 0x7f: ['poly mode on', 'poly on', 'poly'], # mono mode off, all notes off } gm_instruments = { 1: 'Acoustic Grand Piano', 2: 'Bright Acoustic Piano', 3: 'Electric Grand Piano', 4: 'Honky-tonk Piano', 5: 'Electric Piano 1', 6: 'Electric Piano 2', 7: 'Harpsichord', 8: 'Clavi', 9: 'Celesta', 10: 'Glockenspiel', 11: 'Music Box', 12: 'Vibraphone', 13: 'Marimba', 14: 'Xylophone', 15: 'Tubular Bells', 16: 'Dulcimer', 17: 'Drawbar Organ', 18: 'Percussive Organ', 19: 'Rock Organ', 20: 'Church Organ', 21: 'Reed Organ', 22: 'Accordion', 23: 'Harmonica', 24: 'Tango Accordion', 25: 'Acoustic Guitar (nylon)', 26: 'Acoustic Guitar (steel)', 27: 'Electric Guitar (jazz)', 28: 'Electric Guitar (clean)', 29: 'Electric Guitar (muted)', 30: 'Overdriven Guitar', 31: 'Distortion Guitar', 32: 'Guitar harmonics', 33: 'Acoustic Bass', 34: 'Electric Bass (finger)', 35: 'Electric Bass (pick)', 36: 'Fretless Bass', 37: 'Slap Bass 1', 38: 'Slap Bass 2', 39: 'Synth Bass 1', 40: 'Synth Bass 2', 41: 'Violin', 42: 'Viola', 43: 'Cello', 44: 'Contrabass', 45: 'Tremolo Strings', 46: 'Pizzicato Strings', 47: 'Orchestral Harp', 48: 'Timpani', 49: 'String Ensemble 1', 50: 'String Ensemble 2', 51: 'SynthStrings 1', 52: 'SynthStrings 2', 53: 'Choir Aahs', 54: 'Voice Oohs', 55: 'Synth Voice', 56: 'Orchestra Hit', 57: 'Trumpet', 58: 'Trombone', 59: 'Tuba', 60: 'Muted Trumpet', 61: 'French Horn', 62: 'Brass Section', 63: 'SynthBrass 1', 64: 'SynthBrass 2', 65: 'Soprano Sax', 66: 'Alto Sax', 67: 'Tenor Sax', 68: 'Baritone Sax', 69: 'Oboe', 70: 'English Horn', 71: 'Bassoon', 72: 'Clarinet', 73: 'Piccolo', 74: 'Flute', 75: 'Recorder', 76: 'Pan Flute', 77: 'Blown Bottle', 78: 'Shakuhachi', 79: 'Whistle', 80: 'Ocarina', 81: 'Lead 1 (square)', 82: 'Lead 2 (sawtooth)', 83: 'Lead 3 (calliope)', 84: 'Lead 4 (chiff)', 85: 'Lead 5 (charang)', 86: 'Lead 6 (voice)', 87: 'Lead 7 (fifths)', 88: 'Lead 8 (bass + lead)', 89: 'Pad 1 (new age)', 90: 'Pad 2 (warm)', 91: 'Pad 3 (polysynth)', 92: 'Pad 4 (choir)', 93: 'Pad 5 (bowed)', 94: 'Pad 6 (metallic)', 95: 'Pad 7 (halo)', 96: 'Pad 8 (sweep)', 97: 'FX 1 (rain)', 98: 'FX 2 (soundtrack)', 99: 'FX 3 (crystal)', 100: 'FX 4 (atmosphere)', 101: 'FX 5 (brightness)', 102: 'FX 6 (goblins)', 103: 'FX 7 (echoes)', 104: 'FX 8 (sci-fi)', 105: 'Sitar', 106: 'Banjo', 107: 'Shamisen', 108: 'Koto', 109: 'Kalimba', 110: 'Bag pipe', 111: 'Fiddle', 112: 'Shanai', 113: 'Tinkle Bell', 114: 'Agogo', 115: 'Steel Drums', 116: 'Woodblock', 117: 'Taiko Drum', 118: 'Melodic Tom', 119: 'Synth Drum', 120: 'Reverse Cymbal', 121: 'Guitar Fret Noise', 122: 'Breath Noise', 123: 'Seashore', 124: 'Bird Tweet', 125: 'Telephone Ring', 126: 'Helicopter', 127: 'Applause', 128: 'Gunshot', } drum_kit = { 1: 'GM Standard Kit', 9: 'GS Room Kit', 17: 'GS Power Kit', 25: 'GS Power Kit', 26: 'GS TR-808 Kit', 33: 'GS Jazz Kit', 41: 'GS Brush Kit', 49: 'GS Orchestra Kit', 57: 'GS Sound FX Kit', 128: 'GS CM-64/CM-32 Kit', } # Each quarter frame type has 2 string names, each shorter than the previous quarter_frame_type = { 0: ['frame count LS nibble', 'frame LSN'], 1: ['frame count MS nibble', 'frame MSN'], 2: ['seconds LS nibble', 'sec LSN'], 3: ['seconds MS nibble', 'sec MSN'], 4: ['minutes LS nibble', 'min LSN'], 5: ['minutes MS nibble', 'min MSN'], 6: ['hours LS nibble', 'hrs LSN'], 7: ['hours MS nibble and SMPTE type', 'hrs MSN'], } smpte_type = { 0: '24 fps', 1: '25 fps', 2: '30 fps (drop-frame)', 3: '30 fps (non-drop)', } chromatic_notes = { 0: 'C-1', 1: 'C#-1', 2: 'D-1', 3: 'D#-1', 4: 'E-1', 5: 'F-1', 6: 'F#-1', 7: 'G-1', 8: 'G#-1', 9: 'A-1', 10: 'A#-1', 11: 'B-1', 12: 'C0', 13: 'C#0', 14: 'D0', 15: 'D#0', 16: 'E0', 17: 'F0', 18: 'F#0', 19: 'G0', 20: 'G#0', 21: 'A0', 22: 'A#0', 23: 'B0', 24: 'C1', 25: 'C#1', 26: 'D1', 27: 'D#1', 28: 'E1', 29: 'F1', 30: 'F#1', 31: 'G1', 32: 'G#1', 33: 'A1', 34: 'A#1', 35: 'B1', 36: 'C2', 37: 'C#2', 38: 'D2', 39: 'D#2', 40: 'E2', 41: 'F2', 42: 'F#2', 43: 'G2', 44: 'G#2', 45: 'A2', 46: 'A#2', 47: 'B2', 48: 'C3', 49: 'C#3', 50: 'D3', 51: 'D#3', 52: 'E3', 53: 'F3', 54: 'F#3', 55: 'G3', 56: 'G#3', 57: 'A3', 58: 'A#3', 59: 'B3', 60: 'C4', 61: 'C#4', 62: 'D4', 63: 'D#4', 64: 'E4', 65: 'F4', 66: 'F#4', 67: 'G4', 68: 'G#4', 69: 'A4', 70: 'A#4', 71: 'B4', 72: 'C5', 73: 'C#5', 74: 'D5', 75: 'D#5', 76: 'E5', 77: 'F5', 78: 'F#5', 79: 'G5', 80: 'G#5', 81: 'A5', 82: 'A#5', 83: 'B5', 84: 'C6', 85: 'C#6', 86: 'D6', 87: 'D#6', 88: 'E6', 89: 'F6', 90: 'F#6', 91: 'G6', 92: 'G#6', 93: 'A6', 94: 'A#6', 95: 'B6', 96: 'C7', 97: 'C#7', 98: 'D7', 99: 'D#7', 100: 'E7', 101: 'F7', 102: 'F#7', 103: 'G7', 104: 'G#7', 105: 'A7', 106: 'A#7', 107: 'B7', 108: 'C8', 109: 'C#8', 110: 'D8', 111: 'D#8', 112: 'E8', 113: 'F8', 114: 'F#8', 115: 'G8', 116: 'G#8', 117: 'A8', 118: 'A#8', 119: 'B8', 120: 'C9', 121: 'C#9', 122: 'D9', 123: 'D#9', 124: 'E9', 125: 'F9', 126: 'F#9', 127: 'G9', } percussion_notes = { 35: 'Acoustic Bass Drum', 36: 'Bass Drum 1', 37: 'Side Stick', 38: 'Acoustic Snare', 39: 'Hand Clap', 40: 'Electric Snare', 41: 'Low Floor Tom', 42: 'Closed Hi Hat', 43: 'High Floor Tom', 44: 'Pedal Hi-Hat', 45: 'Low Tom', 46: 'Open Hi-Hat', 47: 'Low-Mid Tom', 48: 'Hi Mid Tom', 49: 'Crash Cymbal 1', 50: 'High Tom', 51: 'Ride Cymbal 1', 52: 'Chinese Cymbal', 53: 'Ride Bell', 54: 'Tambourine', 55: 'Splash Cymbal', 56: 'Cowbell', 57: 'Crash Cymbal 2', 58: 'Vibraslap', 59: 'Ride Cymbal 2', 60: 'Hi Bongo', 61: 'Low Bongo', 62: 'Mute Hi Conga', 63: 'Open Hi Conga', 64: 'Low Conga', 65: 'High Timbale', 66: 'Low Timbale', 67: 'High Agogo', 68: 'Low Agogo', 69: 'Cabasa', 70: 'Maracas', 71: 'Short Whistle', 72: 'Long Whistle', 73: 'Short Guiro', 74: 'Long Guiro', 75: 'Claves', 76: 'Hi Wood Block', 77: 'Low Wood Block', 78: 'Mute Cuica', 79: 'Open Cuica', 80: 'Mute Triangle', 81: 'Open Triangle', } libsigrokdecode-0.5.0/decoders/z80/0000755000175000017500000000000013117367246014071 500000000000000libsigrokdecode-0.5.0/decoders/z80/pd.py0000644000175000017500000003062713117367246014776 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Daniel Elstner ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from functools import reduce from .tables import instr_table_by_prefix import string class Ann: ADDR, MEMRD, MEMWR, IORD, IOWR, INSTR, ROP, WOP, WARN = range(9) class Row: ADDRBUS, DATABUS, INSTRUCTIONS, OPERANDS, WARNINGS = range(5) class Pin: D0, D7 = 0, 7 M1, RD, WR, MREQ, IORQ = range(8, 13) A0, A15 = 13, 28 class Cycle: NONE, MEMRD, MEMWR, IORD, IOWR, FETCH, INTACK = range(7) # Provide custom format type 'H' for hexadecimal output # with leading decimal digit (assembler syntax). class AsmFormatter(string.Formatter): def format_field(self, value, format_spec): if format_spec.endswith('H'): result = format(value, format_spec[:-1] + 'X') return result if result[0] in string.digits else '0' + result else: return format(value, format_spec) formatter = AsmFormatter() ann_data_cycle_map = { Cycle.MEMRD: Ann.MEMRD, Cycle.MEMWR: Ann.MEMWR, Cycle.IORD: Ann.IORD, Cycle.IOWR: Ann.IOWR, Cycle.FETCH: Ann.MEMRD, Cycle.INTACK: Ann.IORD, } def reduce_bus(bus): if 0xFF in bus: return None # unassigned bus channels else: return reduce(lambda a, b: (a << 1) | b, reversed(bus)) def signed_byte(byte): return byte if byte < 128 else byte - 256 class Decoder(srd.Decoder): api_version = 3 id = 'z80' name = 'Z80' longname = 'Zilog Z80 CPU' desc = 'Zilog Z80 microprocessor disassembly.' license = 'gplv3+' inputs = ['logic'] outputs = ['z80'] channels = tuple({ 'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data bus line %d' % i } for i in range(8) ) + ( {'id': 'm1', 'name': '/M1', 'desc': 'Machine cycle 1'}, {'id': 'rd', 'name': '/RD', 'desc': 'Memory or I/O read'}, {'id': 'wr', 'name': '/WR', 'desc': 'Memory or I/O write'}, ) optional_channels = ( {'id': 'mreq', 'name': '/MREQ', 'desc': 'Memory request'}, {'id': 'iorq', 'name': '/IORQ', 'desc': 'I/O request'}, ) + tuple({ 'id': 'a%d' % i, 'name': 'A%d' % i, 'desc': 'Address bus line %d' % i } for i in range(16) ) annotations = ( ('addr', 'Memory or I/O address'), ('memrd', 'Byte read from memory'), ('memwr', 'Byte written to memory'), ('iord', 'Byte read from I/O port'), ('iowr', 'Byte written to I/O port'), ('instr', 'Z80 CPU instruction'), ('rop', 'Value of input operand'), ('wop', 'Value of output operand'), ('warn', 'Warning message'), ) annotation_rows = ( ('addrbus', 'Address bus', (Ann.ADDR,)), ('databus', 'Data bus', (Ann.MEMRD, Ann.MEMWR, Ann.IORD, Ann.IOWR)), ('instructions', 'Instructions', (Ann.INSTR,)), ('operands', 'Operands', (Ann.ROP, Ann.WOP)), ('warnings', 'Warnings', (Ann.WARN,)) ) def __init__(self): self.prev_cycle = Cycle.NONE self.op_state = self.state_IDLE def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.bus_data = None self.samplenum = None self.addr_start = None self.data_start = None self.dasm_start = None self.pend_addr = None self.pend_data = None self.ann_data = None self.ann_dasm = None self.prev_cycle = Cycle.NONE self.op_state = self.state_IDLE self.instr_len = 0 def decode(self): while True: # TODO: Come up with more appropriate self.wait() conditions. pins = self.wait({'skip': 1}) cycle = Cycle.NONE if pins[Pin.MREQ] != 1: # default to asserted if pins[Pin.RD] == 0: cycle = Cycle.FETCH if pins[Pin.M1] == 0 else Cycle.MEMRD elif pins[Pin.WR] == 0: cycle = Cycle.MEMWR elif pins[Pin.IORQ] == 0: # default to not asserted if pins[Pin.M1] == 0: cycle = Cycle.INTACK elif pins[Pin.RD] == 0: cycle = Cycle.IORD elif pins[Pin.WR] == 0: cycle = Cycle.IOWR if cycle != Cycle.NONE: self.bus_data = reduce_bus(pins[Pin.D0:Pin.D7+1]) if cycle != self.prev_cycle: if self.prev_cycle == Cycle.NONE: self.on_cycle_begin(reduce_bus(pins[Pin.A0:Pin.A15+1])) elif cycle == Cycle.NONE: self.on_cycle_end() else: self.on_cycle_trans() self.prev_cycle = cycle def on_cycle_begin(self, bus_addr): if self.pend_addr is not None: self.put_text(self.addr_start, Ann.ADDR, '{:04X}'.format(self.pend_addr)) self.addr_start = self.samplenum self.pend_addr = bus_addr def on_cycle_end(self): self.instr_len += 1 self.op_state = self.op_state() if self.ann_dasm is not None: self.put_disasm() if self.op_state == self.state_RESTART: self.op_state = self.state_IDLE() if self.ann_data is not None: self.put_text(self.data_start, self.ann_data, '{:02X}'.format(self.pend_data)) self.data_start = self.samplenum self.pend_data = self.bus_data self.ann_data = ann_data_cycle_map[self.prev_cycle] def on_cycle_trans(self): self.put_text(self.samplenum - 1, Ann.WARN, 'Illegal transition between control states') self.pend_addr = None self.ann_data = None self.ann_dasm = None def put_disasm(self): text = formatter.format(self.mnemonic, r=self.arg_reg, d=self.arg_dis, j=self.arg_dis+self.instr_len, i=self.arg_imm, ro=self.arg_read, wo=self.arg_write) self.put_text(self.dasm_start, self.ann_dasm, text) self.ann_dasm = None self.dasm_start = self.samplenum def put_text(self, ss, ann_idx, ann_text): self.put(ss, self.samplenum, self.out_ann, [ann_idx, [ann_text]]) def state_RESTART(self): return self.state_IDLE def state_IDLE(self): if self.prev_cycle != Cycle.FETCH: return self.state_IDLE self.want_dis = 0 self.want_imm = 0 self.want_read = 0 self.want_write = 0 self.want_wr_be = False self.op_repeat = False self.arg_dis = 0 self.arg_imm = 0 self.arg_read = 0 self.arg_write = 0 self.arg_reg = '' self.mnemonic = '' self.instr_pend = False self.read_pend = False self.write_pend = False self.dasm_start = self.samplenum self.op_prefix = 0 self.instr_len = 0 if self.bus_data in (0xCB, 0xED, 0xDD, 0xFD): return self.state_PRE1 else: return self.state_OPCODE def state_PRE1(self): if self.prev_cycle != Cycle.FETCH: self.mnemonic = 'Prefix not followed by fetch' self.ann_dasm = Ann.WARN return self.state_RESTART self.op_prefix = self.pend_data if self.op_prefix in (0xDD, 0xFD): if self.bus_data == 0xCB: return self.state_PRE2 if self.bus_data in (0xDD, 0xED, 0xFD): return self.state_PRE1 return self.state_OPCODE def state_PRE2(self): if self.prev_cycle != Cycle.MEMRD: self.mnemonic = 'Missing displacement' self.ann_dasm = Ann.WARN return self.state_RESTART self.op_prefix = (self.op_prefix << 8) | self.pend_data return self.state_PREDIS def state_PREDIS(self): if self.prev_cycle != Cycle.MEMRD: self.mnemonic = 'Missing opcode' self.ann_dasm = Ann.WARN return self.state_RESTART self.arg_dis = signed_byte(self.pend_data) return self.state_OPCODE def state_OPCODE(self): (table, self.arg_reg) = instr_table_by_prefix[self.op_prefix] self.op_prefix = 0 instruction = table.get(self.pend_data, None) if instruction is None: self.mnemonic = 'Invalid instruction' self.ann_dasm = Ann.WARN return self.state_RESTART (self.want_dis, self.want_imm, self.want_read, want_write, self.op_repeat, self.mnemonic) = instruction self.want_write = abs(want_write) self.want_wr_be = (want_write < 0) if self.want_dis > 0: return self.state_POSTDIS if self.want_imm > 0: return self.state_IMM1 self.ann_dasm = Ann.INSTR if self.want_read > 0 and self.prev_cycle in (Cycle.MEMRD, Cycle.IORD): return self.state_ROP1 if self.want_write > 0 and self.prev_cycle in (Cycle.MEMWR, Cycle.IOWR): return self.state_WOP1 return self.state_RESTART def state_POSTDIS(self): self.arg_dis = signed_byte(self.pend_data) if self.want_imm > 0: return self.state_IMM1 self.ann_dasm = Ann.INSTR if self.want_read > 0 and self.prev_cycle in (Cycle.MEMRD, Cycle.IORD): return self.state_ROP1 if self.want_write > 0 and self.prev_cycle in (Cycle.MEMWR, Cycle.IOWR): return self.state_WOP1 return self.state_RESTART def state_IMM1(self): self.arg_imm = self.pend_data if self.want_imm > 1: return self.state_IMM2 self.ann_dasm = Ann.INSTR if self.want_read > 0 and self.prev_cycle in (Cycle.MEMRD, Cycle.IORD): return self.state_ROP1 if self.want_write > 0 and self.prev_cycle in (Cycle.MEMWR, Cycle.IOWR): return self.state_WOP1 return self.state_RESTART def state_IMM2(self): self.arg_imm |= self.pend_data << 8 self.ann_dasm = Ann.INSTR if self.want_read > 0 and self.prev_cycle in (Cycle.MEMRD, Cycle.IORD): return self.state_ROP1 if self.want_write > 0 and self.prev_cycle in (Cycle.MEMWR, Cycle.IOWR): return self.state_WOP1 return self.state_RESTART def state_ROP1(self): self.arg_read = self.pend_data if self.want_read < 2: self.mnemonic = '{ro:02X}' self.ann_dasm = Ann.ROP if self.want_write > 0: return self.state_WOP1 if self.want_read > 1: return self.state_ROP2 if self.op_repeat and self.prev_cycle in (Cycle.MEMRD, Cycle.IORD): return self.state_ROP1 return self.state_RESTART def state_ROP2(self): self.arg_read |= self.pend_data << 8 self.mnemonic = '{ro:04X}' self.ann_dasm = Ann.ROP if self.want_write > 0 and self.prev_cycle in (Cycle.MEMWR, Cycle.IOWR): return self.state_WOP1 return self.state_RESTART def state_WOP1(self): self.arg_write = self.pend_data if self.want_read > 1: return self.state_ROP2 if self.want_write > 1: return self.state_WOP2 self.mnemonic = '{wo:02X}' self.ann_dasm = Ann.WOP if self.want_read > 0 and self.op_repeat and \ self.prev_cycle in (Cycle.MEMRD, Cycle.IORD): return self.state_ROP1 return self.state_RESTART def state_WOP2(self): if self.want_wr_be: self.arg_write = (self.arg_write << 8) | self.pend_data else: self.arg_write |= self.pend_data << 8 self.mnemonic = '{wo:04X}' self.ann_dasm = Ann.WOP return self.state_RESTART libsigrokdecode-0.5.0/decoders/z80/tables.py0000644000175000017500000012764313117367246015652 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Daniel Elstner ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' Instruction tuple: (d, i, ro, wo, rep, format string) The placeholders d and i are the number of bytes in the instruction used for the displacement and the immediate operand, respectively. An operand consisting of more than one byte is assembled in little endian order. The placeholders ro and wo are the number of bytes the instruction is expected to read or write, respectively. These counts are used for both memory and I/O access, but not for immediate operands. A negative value indicates that the operand byte order is big endian rather than the usual little endian. The placeholder rep is a boolean used to mark repeating instructions. The format string should refer to the {d} and {i} operands by name. Displacements are interpreted as signed integers, whereas immediate operands are always read as unsigned. The tables for instructions operating on the IX/IY index registers additionally use {r} in the format string as a placeholder for the register name. Relative jump instructions may specify {j} instead of {d} to output the displacement relative to the start of the instruction. ''' # Instructions without a prefix main_instructions = { 0x00: (0, 0, 0, 0, False, 'NOP'), 0x01: (0, 2, 0, 0, False, 'LD BC,{i:04H}h'), 0x02: (0, 0, 0, 1, False, 'LD (BC),A'), 0x03: (0, 0, 0, 0, False, 'INC BC'), 0x04: (0, 0, 0, 0, False, 'INC B'), 0x05: (0, 0, 0, 0, False, 'DEC B'), 0x06: (0, 1, 0, 0, False, 'LD B,{i:02H}h'), 0x07: (0, 0, 0, 0, False, 'RLCA'), 0x08: (0, 0, 0, 0, False, 'EX AF,AF\''), 0x09: (0, 0, 0, 0, False, 'ADD HL,BC'), 0x0A: (0, 0, 1, 0, False, 'LD A,(BC)'), 0x0B: (0, 0, 0, 0, False, 'DEC BC'), 0x0C: (0, 0, 0, 0, False, 'INC C'), 0x0D: (0, 0, 0, 0, False, 'DEC C'), 0x0E: (0, 1, 0, 0, False, 'LD C,{i:02H}h'), 0x0F: (0, 0, 0, 0, False, 'RRCA'), 0x10: (1, 0, 0, 0, False, 'DJNZ ${j:+d}'), 0x11: (0, 2, 0, 0, False, 'LD DE,{i:04H}h'), 0x12: (0, 0, 0, 1, False, 'LD (DE),A'), 0x13: (0, 0, 0, 0, False, 'INC DE'), 0x14: (0, 0, 0, 0, False, 'INC D'), 0x15: (0, 0, 0, 0, False, 'DEC D'), 0x16: (0, 1, 0, 0, False, 'LD D,{i:02H}h'), 0x17: (0, 0, 0, 0, False, 'RLA'), 0x18: (1, 0, 0, 0, False, 'JR ${j:+d}'), 0x19: (0, 0, 0, 0, False, 'ADD HL,DE'), 0x1A: (0, 0, 1, 0, False, 'LD A,(DE)'), 0x1B: (0, 0, 0, 0, False, 'DEC DE'), 0x1C: (0, 0, 0, 0, False, 'INC E'), 0x1D: (0, 0, 0, 0, False, 'DEC E'), 0x1E: (0, 1, 0, 0, False, 'LD E,{i:02H}h'), 0x1F: (0, 0, 0, 0, False, 'RRA'), 0x20: (1, 0, 0, 0, False, 'JR NZ,${j:+d}'), 0x21: (0, 2, 0, 0, False, 'LD HL,{i:04H}h'), 0x22: (0, 2, 0, 2, False, 'LD ({i:04H}h),HL'), 0x23: (0, 0, 0, 0, False, 'INC HL'), 0x24: (0, 0, 0, 0, False, 'INC H'), 0x25: (0, 0, 0, 0, False, 'DEC H'), 0x26: (0, 1, 0, 0, False, 'LD H,{i:02H}h'), 0x27: (0, 0, 0, 0, False, 'DAA'), 0x28: (1, 0, 0, 0, False, 'JR Z,${j:+d}'), 0x29: (0, 0, 0, 0, False, 'ADD HL,HL'), 0x2A: (0, 2, 2, 0, False, 'LD HL,({i:04H}h)'), 0x2B: (0, 0, 0, 0, False, 'DEC HL'), 0x2C: (0, 0, 0, 0, False, 'INC L'), 0x2D: (0, 0, 0, 0, False, 'DEC L'), 0x2E: (0, 1, 0, 0, False, 'LD L,{i:02H}h'), 0x2F: (0, 0, 0, 0, False, 'CPL'), 0x30: (1, 0, 0, 0, False, 'JR NC,${j:+d}'), 0x31: (0, 2, 0, 0, False, 'LD SP,{i:04H}h'), 0x32: (0, 2, 0, 1, False, 'LD ({i:04H}h),A'), 0x33: (0, 0, 0, 0, False, 'INC SP'), 0x34: (0, 0, 1, 1, False, 'INC (HL)'), 0x35: (0, 0, 1, 1, False, 'DEC (HL)'), 0x36: (0, 1, 0, 1, False, 'LD (HL),{i:02H}h'), 0x37: (0, 0, 0, 0, False, 'SCF'), 0x38: (1, 0, 0, 0, False, 'JR C,${j:+d}'), 0x39: (0, 0, 0, 0, False, 'ADD HL,SP'), 0x3A: (0, 2, 1, 0, False, 'LD A,({i:04H}h)'), 0x3B: (0, 0, 0, 0, False, 'DEC SP'), 0x3C: (0, 0, 0, 0, False, 'INC A'), 0x3D: (0, 0, 0, 0, False, 'DEC A'), 0x3E: (0, 1, 0, 0, False, 'LD A,{i:02H}h'), 0x3F: (0, 0, 0, 0, False, 'CCF'), 0x40: (0, 0, 0, 0, False, 'LD B,B'), 0x41: (0, 0, 0, 0, False, 'LD B,C'), 0x42: (0, 0, 0, 0, False, 'LD B,D'), 0x43: (0, 0, 0, 0, False, 'LD B,E'), 0x44: (0, 0, 0, 0, False, 'LD B,H'), 0x45: (0, 0, 0, 0, False, 'LD B,L'), 0x46: (0, 0, 1, 0, False, 'LD B,(HL)'), 0x47: (0, 0, 0, 0, False, 'LD B,A'), 0x48: (0, 0, 0, 0, False, 'LD C,B'), 0x49: (0, 0, 0, 0, False, 'LD C,C'), 0x4A: (0, 0, 0, 0, False, 'LD C,D'), 0x4B: (0, 0, 0, 0, False, 'LD C,E'), 0x4C: (0, 0, 0, 0, False, 'LD C,H'), 0x4D: (0, 0, 0, 0, False, 'LD C,L'), 0x4E: (0, 0, 1, 0, False, 'LD C,(HL)'), 0x4F: (0, 0, 0, 0, False, 'LD C,A'), 0x50: (0, 0, 0, 0, False, 'LD D,B'), 0x51: (0, 0, 0, 0, False, 'LD D,C'), 0x52: (0, 0, 0, 0, False, 'LD D,D'), 0x53: (0, 0, 0, 0, False, 'LD D,E'), 0x54: (0, 0, 0, 0, False, 'LD D,H'), 0x55: (0, 0, 0, 0, False, 'LD D,L'), 0x56: (0, 0, 1, 0, False, 'LD D,(HL)'), 0x57: (0, 0, 0, 0, False, 'LD D,A'), 0x58: (0, 0, 0, 0, False, 'LD E,B'), 0x59: (0, 0, 0, 0, False, 'LD E,C'), 0x5A: (0, 0, 0, 0, False, 'LD E,D'), 0x5B: (0, 0, 0, 0, False, 'LD E,E'), 0x5C: (0, 0, 0, 0, False, 'LD E,H'), 0x5D: (0, 0, 0, 0, False, 'LD E,L'), 0x5E: (0, 0, 1, 0, False, 'LD E,(HL)'), 0x5F: (0, 0, 0, 0, False, 'LD E,A'), 0x60: (0, 0, 0, 0, False, 'LD H,B'), 0x61: (0, 0, 0, 0, False, 'LD H,C'), 0x62: (0, 0, 0, 0, False, 'LD H,D'), 0x63: (0, 0, 0, 0, False, 'LD H,E'), 0x64: (0, 0, 0, 0, False, 'LD H,H'), 0x65: (0, 0, 0, 0, False, 'LD H,L'), 0x66: (0, 0, 1, 0, False, 'LD H,(HL)'), 0x67: (0, 0, 0, 0, False, 'LD H,A'), 0x68: (0, 0, 0, 0, False, 'LD L,B'), 0x69: (0, 0, 0, 0, False, 'LD L,C'), 0x6A: (0, 0, 0, 0, False, 'LD L,D'), 0x6B: (0, 0, 0, 0, False, 'LD L,E'), 0x6C: (0, 0, 0, 0, False, 'LD L,H'), 0x6D: (0, 0, 0, 0, False, 'LD L,L'), 0x6E: (0, 0, 1, 0, False, 'LD L,(HL)'), 0x6F: (0, 0, 0, 0, False, 'LD L,A'), 0x70: (0, 0, 0, 1, False, 'LD (HL),B'), 0x71: (0, 0, 0, 1, False, 'LD (HL),C'), 0x72: (0, 0, 0, 1, False, 'LD (HL),D'), 0x73: (0, 0, 0, 1, False, 'LD (HL),E'), 0x74: (0, 0, 0, 1, False, 'LD (HL),H'), 0x75: (0, 0, 0, 1, False, 'LD (HL),L'), 0x76: (0, 0, 0, 0, False, 'HALT'), 0x77: (0, 0, 0, 1, False, 'LD (HL),A'), 0x78: (0, 0, 0, 0, False, 'LD A,B'), 0x79: (0, 0, 0, 0, False, 'LD A,C'), 0x7A: (0, 0, 0, 0, False, 'LD A,D'), 0x7B: (0, 0, 0, 0, False, 'LD A,E'), 0x7C: (0, 0, 0, 0, False, 'LD A,H'), 0x7D: (0, 0, 0, 0, False, 'LD A,L'), 0x7E: (0, 0, 1, 0, False, 'LD A,(HL)'), 0x7F: (0, 0, 0, 0, False, 'LD A,A'), 0x80: (0, 0, 0, 0, False, 'ADD A,B'), 0x81: (0, 0, 0, 0, False, 'ADD A,C'), 0x82: (0, 0, 0, 0, False, 'ADD A,D'), 0x83: (0, 0, 0, 0, False, 'ADD A,E'), 0x84: (0, 0, 0, 0, False, 'ADD A,H'), 0x85: (0, 0, 0, 0, False, 'ADD A,L'), 0x86: (0, 0, 1, 0, False, 'ADD A,(HL)'), 0x87: (0, 0, 0, 0, False, 'ADD A,A'), 0x88: (0, 0, 0, 0, False, 'ADC A,B'), 0x89: (0, 0, 0, 0, False, 'ADC A,C'), 0x8A: (0, 0, 0, 0, False, 'ADC A,D'), 0x8B: (0, 0, 0, 0, False, 'ADC A,E'), 0x8C: (0, 0, 0, 0, False, 'ADC A,H'), 0x8D: (0, 0, 0, 0, False, 'ADC A,L'), 0x8E: (0, 0, 1, 0, False, 'ADC A,(HL)'), 0x8F: (0, 0, 0, 0, False, 'ADC A,A'), 0x90: (0, 0, 0, 0, False, 'SUB B'), 0x91: (0, 0, 0, 0, False, 'SUB C'), 0x92: (0, 0, 0, 0, False, 'SUB D'), 0x93: (0, 0, 0, 0, False, 'SUB E'), 0x94: (0, 0, 0, 0, False, 'SUB H'), 0x95: (0, 0, 0, 0, False, 'SUB L'), 0x96: (0, 0, 1, 0, False, 'SUB (HL)'), 0x97: (0, 0, 0, 0, False, 'SUB A'), 0x98: (0, 0, 0, 0, False, 'SBC A,B'), 0x99: (0, 0, 0, 0, False, 'SBC A,C'), 0x9A: (0, 0, 0, 0, False, 'SBC A,D'), 0x9B: (0, 0, 0, 0, False, 'SBC A,E'), 0x9C: (0, 0, 0, 0, False, 'SBC A,H'), 0x9D: (0, 0, 0, 0, False, 'SBC A,L'), 0x9E: (0, 0, 1, 0, False, 'SBC A,(HL)'), 0x9F: (0, 0, 0, 0, False, 'SBC A,A'), 0xA0: (0, 0, 0, 0, False, 'AND B'), 0xA1: (0, 0, 0, 0, False, 'AND C'), 0xA2: (0, 0, 0, 0, False, 'AND D'), 0xA3: (0, 0, 0, 0, False, 'AND E'), 0xA4: (0, 0, 0, 0, False, 'AND H'), 0xA5: (0, 0, 0, 0, False, 'AND L'), 0xA6: (0, 0, 1, 0, False, 'AND (HL)'), 0xA7: (0, 0, 0, 0, False, 'AND A'), 0xA8: (0, 0, 0, 0, False, 'XOR B'), 0xA9: (0, 0, 0, 0, False, 'XOR C'), 0xAA: (0, 0, 0, 0, False, 'XOR D'), 0xAB: (0, 0, 0, 0, False, 'XOR E'), 0xAC: (0, 0, 0, 0, False, 'XOR H'), 0xAD: (0, 0, 0, 0, False, 'XOR L'), 0xAE: (0, 0, 1, 0, False, 'XOR (HL)'), 0xAF: (0, 0, 0, 0, False, 'XOR A'), 0xB0: (0, 0, 0, 0, False, 'OR B'), 0xB1: (0, 0, 0, 0, False, 'OR C'), 0xB2: (0, 0, 0, 0, False, 'OR D'), 0xB3: (0, 0, 0, 0, False, 'OR E'), 0xB4: (0, 0, 0, 0, False, 'OR H'), 0xB5: (0, 0, 0, 0, False, 'OR L'), 0xB6: (0, 0, 1, 0, False, 'OR (HL)'), 0xB7: (0, 0, 0, 0, False, 'OR A'), 0xB8: (0, 0, 0, 0, False, 'CP B'), 0xB9: (0, 0, 0, 0, False, 'CP C'), 0xBA: (0, 0, 0, 0, False, 'CP D'), 0xBB: (0, 0, 0, 0, False, 'CP E'), 0xBC: (0, 0, 0, 0, False, 'CP H'), 0xBD: (0, 0, 0, 0, False, 'CP L'), 0xBE: (0, 0, 1, 0, False, 'CP (HL)'), 0xBF: (0, 0, 0, 0, False, 'CP A'), 0xC0: (0, 0, 2, 0, False, 'RET NZ'), 0xC1: (0, 0, 2, 0, False, 'POP BC'), 0xC2: (0, 2, 0, 0, False, 'JP NZ,{i:04H}h'), 0xC3: (0, 2, 0, 0, False, 'JP {i:04H}h'), 0xC4: (0, 2, 0,-2, False, 'CALL NZ,{i:04H}h'), 0xC5: (0, 0, 0,-2, False, 'PUSH BC'), 0xC6: (0, 1, 0, 0, False, 'ADD A,{i:02H}h'), 0xC7: (0, 0, 0,-2, False, 'RST 00h'), 0xC8: (0, 0, 2, 0, False, 'RET Z'), 0xC9: (0, 0, 2, 0, False, 'RET'), 0xCA: (0, 2, 0, 0, False, 'JP Z,{i:04H}h'), 0xCC: (0, 2, 0,-2, False, 'CALL Z,{i:04H}h'), 0xCD: (0, 2, 0,-2, False, 'CALL {i:04H}h'), 0xCE: (0, 1, 0, 0, False, 'ADC A,{i:02H}h'), 0xCF: (0, 0, 0,-2, False, 'RST 08h'), 0xD0: (0, 0, 2, 0, False, 'RET NC'), 0xD1: (0, 0, 2, 0, False, 'POP DE'), 0xD2: (0, 2, 0, 0, False, 'JP NC,{i:04H}h'), 0xD3: (0, 1, 0, 1, False, 'OUT ({i:02H}h),A'), 0xD4: (0, 2, 0,-2, False, 'CALL NC,{i:04H}h'), 0xD5: (0, 0, 0,-2, False, 'PUSH DE'), 0xD6: (0, 1, 0, 0, False, 'SUB {i:02H}h'), 0xD7: (0, 0, 0,-2, False, 'RST 10h'), 0xD8: (0, 0, 2, 0, False, 'RET C'), 0xD9: (0, 0, 0, 0, False, 'EXX'), 0xDA: (0, 2, 0, 0, False, 'JP C,{i:04H}h'), 0xDB: (0, 1, 1, 0, False, 'IN A,({i:02H}h)'), 0xDC: (0, 2, 0,-2, False, 'CALL C,{i:04H}h'), 0xDE: (0, 1, 0, 0, False, 'SBC A,{i:02H}h'), 0xDF: (0, 0, 0,-2, False, 'RST 18h'), 0xE0: (0, 0, 2, 0, False, 'RET PO'), 0xE1: (0, 0, 2, 0, False, 'POP HL'), 0xE2: (0, 2, 0, 0, False, 'JP PO,{i:04H}h'), 0xE3: (0, 0, 2, 2, False, 'EX (SP),HL'), 0xE4: (0, 2, 0,-2, False, 'CALL PO,{i:04H}h'), 0xE5: (0, 0, 0,-2, False, 'PUSH HL'), 0xE6: (0, 1, 0, 0, False, 'AND {i:02H}h'), 0xE7: (0, 0, 0,-2, False, 'RST 20h'), 0xE8: (0, 0, 2, 0, False, 'RET PE'), 0xE9: (0, 0, 0, 0, False, 'JP (HL)'), 0xEA: (0, 2, 0, 0, False, 'JP PE,{i:04H}h'), 0xEB: (0, 0, 0, 0, False, 'EX DE,HL'), 0xEC: (0, 2, 0,-2, False, 'CALL PE,{i:04H}h'), 0xEE: (0, 1, 0, 0, False, 'XOR {i:02H}h'), 0xEF: (0, 0, 0,-2, False, 'RST 28h'), 0xF0: (0, 0, 2, 0, False, 'RET P'), 0xF1: (0, 0, 2, 0, False, 'POP AF'), 0xF2: (0, 2, 0, 0, False, 'JP P,{i:04H}h'), 0xF3: (0, 0, 0, 0, False, 'DI'), 0xF4: (0, 2, 0,-2, False, 'CALL P,{i:04H}h'), 0xF5: (0, 0, 0,-2, False, 'PUSH AF'), 0xF6: (0, 1, 0, 0, False, 'OR {i:02H}h'), 0xF7: (0, 0, 0,-2, False, 'RST 30h'), 0xF8: (0, 0, 2, 0, False, 'RET M'), 0xF9: (0, 0, 0, 0, False, 'LD SP,HL'), 0xFA: (0, 2, 0, 0, False, 'JP M,{i:04H}h'), 0xFB: (0, 0, 0, 0, False, 'EI'), 0xFC: (0, 2, 0,-2, False, 'CALL M,{i:04H}h'), 0xFE: (0, 1, 0, 0, False, 'CP {i:02H}h'), 0xFF: (0, 0, 0,-2, False, 'RST 38h') } # Instructions with ED prefix extended_instructions = { 0x40: (0, 0, 1, 0, False, 'IN B,(C)'), 0x41: (0, 0, 0, 1, False, 'OUT (C),B'), 0x42: (0, 0, 0, 0, False, 'SBC HL,BC'), 0x43: (0, 2, 0, 2, False, 'LD ({i:04H}h),BC'), 0x44: (0, 0, 0, 0, False, 'NEG'), 0x45: (0, 0, 2, 0, False, 'RETN'), 0x46: (0, 0, 0, 0, False, 'IM 0'), 0x47: (0, 0, 0, 0, False, 'LD I,A'), 0x48: (0, 0, 1, 0, False, 'IN C,(C)'), 0x49: (0, 0, 0, 1, False, 'OUT (C),C'), 0x4A: (0, 0, 0, 0, False, 'ADC HL,BC'), 0x4B: (0, 2, 2, 0, False, 'LD BC,({i:04H}h)'), 0x4C: (0, 0, 0, 0, False, 'NEG'), 0x4D: (0, 0, 2, 0, False, 'RETI'), 0x4E: (0, 0, 0, 0, False, 'IM 0/1'), 0x4F: (0, 0, 0, 0, False, 'LD R,A'), 0x50: (0, 0, 1, 0, False, 'IN D,(C)'), 0x51: (0, 0, 0, 1, False, 'OUT (C),D'), 0x52: (0, 0, 0, 0, False, 'SBC HL,DE'), 0x53: (0, 2, 0, 2, False, 'LD ({i:04H}h),DE'), 0x54: (0, 0, 0, 0, False, 'NEG'), 0x55: (0, 0, 2, 0, False, 'RETN'), 0x56: (0, 0, 0, 0, False, 'IM 1'), 0x57: (0, 0, 0, 0, False, 'LD A,I'), 0x58: (0, 0, 1, 0, False, 'IN E,(C)'), 0x59: (0, 0, 0, 1, False, 'OUT (C),E'), 0x5A: (0, 0, 0, 0, False, 'ADC HL,DE'), 0x5B: (0, 2, 2, 0, False, 'LD DE,({i:04H}h)'), 0x5C: (0, 0, 0, 0, False, 'NEG'), 0x5D: (0, 0, 2, 0, False, 'RETN'), 0x5E: (0, 0, 0, 0, False, 'IM 2'), 0x5F: (0, 0, 0, 0, False, 'LD A,R'), 0x60: (0, 0, 1, 0, False, 'IN H,(C)'), 0x61: (0, 0, 0, 1, False, 'OUT (C),H'), 0x62: (0, 0, 0, 0, False, 'SBC HL,HL'), 0x63: (0, 2, 0, 2, False, 'LD ({i:04H}h),HL'), 0x64: (0, 0, 0, 0, False, 'NEG'), 0x65: (0, 0, 2, 0, False, 'RETN'), 0x66: (0, 0, 0, 0, False, 'IM 0'), 0x67: (0, 0, 1, 1, False, 'RRD'), 0x68: (0, 0, 1, 0, False, 'IN L,(C)'), 0x69: (0, 0, 0, 1, False, 'OUT (C),L'), 0x6A: (0, 0, 0, 0, False, 'ADC HL,HL'), 0x6B: (0, 2, 2, 0, False, 'LD HL,({i:04H}h)'), 0x6C: (0, 0, 0, 0, False, 'NEG'), 0x6D: (0, 0, 2, 0, False, 'RETN'), 0x6E: (0, 0, 0, 0, False, 'IM 0/1'), 0x6F: (0, 0, 1, 1, False, 'RLD'), 0x70: (0, 0, 1, 0, False, 'IN (C)'), 0x71: (0, 0, 0, 1, False, 'OUT (C),0'), 0x72: (0, 0, 0, 0, False, 'SBC HL,SP'), 0x73: (0, 2, 0, 2, False, 'LD ({i:04H}h),SP'), 0x74: (0, 0, 0, 0, False, 'NEG'), 0x75: (0, 0, 2, 0, False, 'RETN'), 0x76: (0, 0, 0, 0, False, 'IM 1'), 0x78: (0, 0, 1, 0, False, 'IN A,(C)'), 0x79: (0, 0, 0, 1, False, 'OUT (C),A'), 0x7A: (0, 0, 0, 0, False, 'ADC HL,SP'), 0x7B: (0, 2, 2, 0, False, 'LD SP,({i:04H}h)'), 0x7C: (0, 0, 0, 0, False, 'NEG'), 0x7D: (0, 0, 2, 0, False, 'RETN'), 0x7E: (0, 0, 0, 0, False, 'IM 2'), 0xA0: (0, 0, 1, 1, False, 'LDI'), 0xA1: (0, 0, 1, 0, False, 'CPI'), 0xA2: (0, 0, 1, 1, False, 'INI'), 0xA3: (0, 0, 1, 1, False, 'OUTI'), 0xA8: (0, 0, 1, 1, False, 'LDD'), 0xA9: (0, 0, 1, 0, False, 'CPD'), 0xAA: (0, 0, 1, 1, False, 'IND'), 0xAB: (0, 0, 1, 1, False, 'OUTD'), 0xB0: (0, 0, 1, 1, True, 'LDIR'), 0xB1: (0, 0, 1, 0, True, 'CPIR'), 0xB2: (0, 0, 1, 1, True, 'INIR'), 0xB3: (0, 0, 1, 1, True, 'OTIR'), 0xB8: (0, 0, 1, 1, True, 'LDDR'), 0xB9: (0, 0, 1, 0, True, 'CPDR'), 0xBA: (0, 0, 1, 1, True, 'INDR'), 0xBB: (0, 0, 1, 1, True, 'OTDR') } # Instructions with CB prefix bit_instructions = { 0x00: (0, 0, 0, 0, False, 'RLC B'), 0x01: (0, 0, 0, 0, False, 'RLC C'), 0x02: (0, 0, 0, 0, False, 'RLC D'), 0x03: (0, 0, 0, 0, False, 'RLC E'), 0x04: (0, 0, 0, 0, False, 'RLC H'), 0x05: (0, 0, 0, 0, False, 'RLC L'), 0x06: (0, 0, 1, 1, False, 'RLC (HL)'), 0x07: (0, 0, 0, 0, False, 'RLC A'), 0x08: (0, 0, 0, 0, False, 'RRC B'), 0x09: (0, 0, 0, 0, False, 'RRC C'), 0x0A: (0, 0, 0, 0, False, 'RRC D'), 0x0B: (0, 0, 0, 0, False, 'RRC E'), 0x0C: (0, 0, 0, 0, False, 'RRC H'), 0x0D: (0, 0, 0, 0, False, 'RRC L'), 0x0E: (0, 0, 1, 1, False, 'RRC (HL)'), 0x0F: (0, 0, 0, 0, False, 'RRC A'), 0x10: (0, 0, 0, 0, False, 'RL B'), 0x11: (0, 0, 0, 0, False, 'RL C'), 0x12: (0, 0, 0, 0, False, 'RL D'), 0x13: (0, 0, 0, 0, False, 'RL E'), 0x14: (0, 0, 0, 0, False, 'RL H'), 0x15: (0, 0, 0, 0, False, 'RL L'), 0x16: (0, 0, 1, 1, False, 'RL (HL)'), 0x17: (0, 0, 0, 0, False, 'RL A'), 0x18: (0, 0, 0, 0, False, 'RR B'), 0x19: (0, 0, 0, 0, False, 'RR C'), 0x1A: (0, 0, 0, 0, False, 'RR D'), 0x1B: (0, 0, 0, 0, False, 'RR E'), 0x1C: (0, 0, 0, 0, False, 'RR H'), 0x1D: (0, 0, 0, 0, False, 'RR L'), 0x1E: (0, 0, 1, 1, False, 'RR (HL)'), 0x1F: (0, 0, 0, 0, False, 'RR A'), 0x20: (0, 0, 0, 0, False, 'SLA B'), 0x21: (0, 0, 0, 0, False, 'SLA C'), 0x22: (0, 0, 0, 0, False, 'SLA D'), 0x23: (0, 0, 0, 0, False, 'SLA E'), 0x24: (0, 0, 0, 0, False, 'SLA H'), 0x25: (0, 0, 0, 0, False, 'SLA L'), 0x26: (0, 0, 1, 1, False, 'SLA (HL)'), 0x27: (0, 0, 0, 0, False, 'SLA A'), 0x28: (0, 0, 0, 0, False, 'SRA B'), 0x29: (0, 0, 0, 0, False, 'SRA C'), 0x2A: (0, 0, 0, 0, False, 'SRA D'), 0x2B: (0, 0, 0, 0, False, 'SRA E'), 0x2C: (0, 0, 0, 0, False, 'SRA H'), 0x2D: (0, 0, 0, 0, False, 'SRA L'), 0x2E: (0, 0, 1, 1, False, 'SRA (HL)'), 0x2F: (0, 0, 0, 0, False, 'SRA A'), 0x30: (0, 0, 0, 0, False, 'SLL B'), 0x31: (0, 0, 0, 0, False, 'SLL C'), 0x32: (0, 0, 0, 0, False, 'SLL D'), 0x33: (0, 0, 0, 0, False, 'SLL E'), 0x34: (0, 0, 0, 0, False, 'SLL H'), 0x35: (0, 0, 0, 0, False, 'SLL L'), 0x36: (0, 0, 1, 1, False, 'SLL (HL)'), 0x37: (0, 0, 0, 0, False, 'SLL A'), 0x38: (0, 0, 0, 0, False, 'SRL B'), 0x39: (0, 0, 0, 0, False, 'SRL C'), 0x3A: (0, 0, 0, 0, False, 'SRL D'), 0x3B: (0, 0, 0, 0, False, 'SRL E'), 0x3C: (0, 0, 0, 0, False, 'SRL H'), 0x3D: (0, 0, 0, 0, False, 'SRL L'), 0x3E: (0, 0, 1, 1, False, 'SRL (HL)'), 0x3F: (0, 0, 0, 0, False, 'SRL A'), 0x40: (0, 0, 0, 0, False, 'BIT 0,B'), 0x41: (0, 0, 0, 0, False, 'BIT 0,C'), 0x42: (0, 0, 0, 0, False, 'BIT 0,D'), 0x43: (0, 0, 0, 0, False, 'BIT 0,E'), 0x44: (0, 0, 0, 0, False, 'BIT 0,H'), 0x45: (0, 0, 0, 0, False, 'BIT 0,L'), 0x46: (0, 0, 1, 0, False, 'BIT 0,(HL)'), 0x47: (0, 0, 0, 0, False, 'BIT 0,A'), 0x48: (0, 0, 0, 0, False, 'BIT 1,B'), 0x49: (0, 0, 0, 0, False, 'BIT 1,C'), 0x4A: (0, 0, 0, 0, False, 'BIT 1,D'), 0x4B: (0, 0, 0, 0, False, 'BIT 1,E'), 0x4C: (0, 0, 0, 0, False, 'BIT 1,H'), 0x4D: (0, 0, 0, 0, False, 'BIT 1,L'), 0x4E: (0, 0, 1, 0, False, 'BIT 1,(HL)'), 0x4F: (0, 0, 0, 0, False, 'BIT 1,A'), 0x50: (0, 0, 0, 0, False, 'BIT 2,B'), 0x51: (0, 0, 0, 0, False, 'BIT 2,C'), 0x52: (0, 0, 0, 0, False, 'BIT 2,D'), 0x53: (0, 0, 0, 0, False, 'BIT 2,E'), 0x54: (0, 0, 0, 0, False, 'BIT 2,H'), 0x55: (0, 0, 0, 0, False, 'BIT 2,L'), 0x56: (0, 0, 1, 0, False, 'BIT 2,(HL)'), 0x57: (0, 0, 0, 0, False, 'BIT 2,A'), 0x58: (0, 0, 0, 0, False, 'BIT 3,B'), 0x59: (0, 0, 0, 0, False, 'BIT 3,C'), 0x5A: (0, 0, 0, 0, False, 'BIT 3,D'), 0x5B: (0, 0, 0, 0, False, 'BIT 3,E'), 0x5C: (0, 0, 0, 0, False, 'BIT 3,H'), 0x5D: (0, 0, 0, 0, False, 'BIT 3,L'), 0x5E: (0, 0, 1, 0, False, 'BIT 3,(HL)'), 0x5F: (0, 0, 0, 0, False, 'BIT 3,A'), 0x60: (0, 0, 0, 0, False, 'BIT 4,B'), 0x61: (0, 0, 0, 0, False, 'BIT 4,C'), 0x62: (0, 0, 0, 0, False, 'BIT 4,D'), 0x63: (0, 0, 0, 0, False, 'BIT 4,E'), 0x64: (0, 0, 0, 0, False, 'BIT 4,H'), 0x65: (0, 0, 0, 0, False, 'BIT 4,L'), 0x66: (0, 0, 1, 0, False, 'BIT 4,(HL)'), 0x67: (0, 0, 0, 0, False, 'BIT 4,A'), 0x68: (0, 0, 0, 0, False, 'BIT 5,B'), 0x69: (0, 0, 0, 0, False, 'BIT 5,C'), 0x6A: (0, 0, 0, 0, False, 'BIT 5,D'), 0x6B: (0, 0, 0, 0, False, 'BIT 5,E'), 0x6C: (0, 0, 0, 0, False, 'BIT 5,H'), 0x6D: (0, 0, 0, 0, False, 'BIT 5,L'), 0x6E: (0, 0, 1, 0, False, 'BIT 5,(HL)'), 0x6F: (0, 0, 0, 0, False, 'BIT 5,A'), 0x70: (0, 0, 0, 0, False, 'BIT 6,B'), 0x71: (0, 0, 0, 0, False, 'BIT 6,C'), 0x72: (0, 0, 0, 0, False, 'BIT 6,D'), 0x73: (0, 0, 0, 0, False, 'BIT 6,E'), 0x74: (0, 0, 0, 0, False, 'BIT 6,H'), 0x75: (0, 0, 0, 0, False, 'BIT 6,L'), 0x76: (0, 0, 1, 0, False, 'BIT 6,(HL)'), 0x77: (0, 0, 0, 0, False, 'BIT 6,A'), 0x78: (0, 0, 0, 0, False, 'BIT 7,B'), 0x79: (0, 0, 0, 0, False, 'BIT 7,C'), 0x7A: (0, 0, 0, 0, False, 'BIT 7,D'), 0x7B: (0, 0, 0, 0, False, 'BIT 7,E'), 0x7C: (0, 0, 0, 0, False, 'BIT 7,H'), 0x7D: (0, 0, 0, 0, False, 'BIT 7,L'), 0x7E: (0, 0, 1, 0, False, 'BIT 7,(HL)'), 0x7F: (0, 0, 0, 0, False, 'BIT 7,A'), 0x80: (0, 0, 0, 0, False, 'RES 0,B'), 0x81: (0, 0, 0, 0, False, 'RES 0,C'), 0x82: (0, 0, 0, 0, False, 'RES 0,D'), 0x83: (0, 0, 0, 0, False, 'RES 0,E'), 0x84: (0, 0, 0, 0, False, 'RES 0,H'), 0x85: (0, 0, 0, 0, False, 'RES 0,L'), 0x86: (0, 0, 1, 1, False, 'RES 0,(HL)'), 0x87: (0, 0, 0, 0, False, 'RES 0,A'), 0x88: (0, 0, 0, 0, False, 'RES 1,B'), 0x89: (0, 0, 0, 0, False, 'RES 1,C'), 0x8A: (0, 0, 0, 0, False, 'RES 1,D'), 0x8B: (0, 0, 0, 0, False, 'RES 1,E'), 0x8C: (0, 0, 0, 0, False, 'RES 1,H'), 0x8D: (0, 0, 0, 0, False, 'RES 1,L'), 0x8E: (0, 0, 1, 1, False, 'RES 1,(HL)'), 0x8F: (0, 0, 0, 0, False, 'RES 1,A'), 0x90: (0, 0, 0, 0, False, 'RES 2,B'), 0x91: (0, 0, 0, 0, False, 'RES 2,C'), 0x92: (0, 0, 0, 0, False, 'RES 2,D'), 0x93: (0, 0, 0, 0, False, 'RES 2,E'), 0x94: (0, 0, 0, 0, False, 'RES 2,H'), 0x95: (0, 0, 0, 0, False, 'RES 2,L'), 0x96: (0, 0, 1, 1, False, 'RES 2,(HL)'), 0x97: (0, 0, 0, 0, False, 'RES 2,A'), 0x98: (0, 0, 0, 0, False, 'RES 3,B'), 0x99: (0, 0, 0, 0, False, 'RES 3,C'), 0x9A: (0, 0, 0, 0, False, 'RES 3,D'), 0x9B: (0, 0, 0, 0, False, 'RES 3,E'), 0x9C: (0, 0, 0, 0, False, 'RES 3,H'), 0x9D: (0, 0, 0, 0, False, 'RES 3,L'), 0x9E: (0, 0, 1, 1, False, 'RES 3,(HL)'), 0x9F: (0, 0, 0, 0, False, 'RES 3,A'), 0xA0: (0, 0, 0, 0, False, 'RES 4,B'), 0xA1: (0, 0, 0, 0, False, 'RES 4,C'), 0xA2: (0, 0, 0, 0, False, 'RES 4,D'), 0xA3: (0, 0, 0, 0, False, 'RES 4,E'), 0xA4: (0, 0, 0, 0, False, 'RES 4,H'), 0xA5: (0, 0, 0, 0, False, 'RES 4,L'), 0xA6: (0, 0, 1, 1, False, 'RES 4,(HL)'), 0xA7: (0, 0, 0, 0, False, 'RES 4,A'), 0xA8: (0, 0, 0, 0, False, 'RES 5,B'), 0xA9: (0, 0, 0, 0, False, 'RES 5,C'), 0xAA: (0, 0, 0, 0, False, 'RES 5,D'), 0xAB: (0, 0, 0, 0, False, 'RES 5,E'), 0xAC: (0, 0, 0, 0, False, 'RES 5,H'), 0xAD: (0, 0, 0, 0, False, 'RES 5,L'), 0xAE: (0, 0, 1, 1, False, 'RES 5,(HL)'), 0xAF: (0, 0, 0, 0, False, 'RES 5,A'), 0xB0: (0, 0, 0, 0, False, 'RES 6,B'), 0xB1: (0, 0, 0, 0, False, 'RES 6,C'), 0xB2: (0, 0, 0, 0, False, 'RES 6,D'), 0xB3: (0, 0, 0, 0, False, 'RES 6,E'), 0xB4: (0, 0, 0, 0, False, 'RES 6,H'), 0xB5: (0, 0, 0, 0, False, 'RES 6,L'), 0xB6: (0, 0, 1, 1, False, 'RES 6,(HL)'), 0xB7: (0, 0, 0, 0, False, 'RES 6,A'), 0xB8: (0, 0, 0, 0, False, 'RES 7,B'), 0xB9: (0, 0, 0, 0, False, 'RES 7,C'), 0xBA: (0, 0, 0, 0, False, 'RES 7,D'), 0xBB: (0, 0, 0, 0, False, 'RES 7,E'), 0xBC: (0, 0, 0, 0, False, 'RES 7,H'), 0xBD: (0, 0, 0, 0, False, 'RES 7,L'), 0xBE: (0, 0, 1, 1, False, 'RES 7,(HL)'), 0xBF: (0, 0, 0, 0, False, 'RES 7,A'), 0xC0: (0, 0, 0, 0, False, 'SET 0,B'), 0xC1: (0, 0, 0, 0, False, 'SET 0,C'), 0xC2: (0, 0, 0, 0, False, 'SET 0,D'), 0xC3: (0, 0, 0, 0, False, 'SET 0,E'), 0xC4: (0, 0, 0, 0, False, 'SET 0,H'), 0xC5: (0, 0, 0, 0, False, 'SET 0,L'), 0xC6: (0, 0, 1, 1, False, 'SET 0,(HL)'), 0xC7: (0, 0, 0, 0, False, 'SET 0,A'), 0xC8: (0, 0, 0, 0, False, 'SET 1,B'), 0xC9: (0, 0, 0, 0, False, 'SET 1,C'), 0xCA: (0, 0, 0, 0, False, 'SET 1,D'), 0xCB: (0, 0, 0, 0, False, 'SET 1,E'), 0xCC: (0, 0, 0, 0, False, 'SET 1,H'), 0xCD: (0, 0, 0, 0, False, 'SET 1,L'), 0xCE: (0, 0, 1, 1, False, 'SET 1,(HL)'), 0xCF: (0, 0, 0, 0, False, 'SET 1,A'), 0xD0: (0, 0, 0, 0, False, 'SET 2,B'), 0xD1: (0, 0, 0, 0, False, 'SET 2,C'), 0xD2: (0, 0, 0, 0, False, 'SET 2,D'), 0xD3: (0, 0, 0, 0, False, 'SET 2,E'), 0xD4: (0, 0, 0, 0, False, 'SET 2,H'), 0xD5: (0, 0, 0, 0, False, 'SET 2,L'), 0xD6: (0, 0, 1, 1, False, 'SET 2,(HL)'), 0xD7: (0, 0, 0, 0, False, 'SET 2,A'), 0xD8: (0, 0, 0, 0, False, 'SET 3,B'), 0xD9: (0, 0, 0, 0, False, 'SET 3,C'), 0xDA: (0, 0, 0, 0, False, 'SET 3,D'), 0xDB: (0, 0, 0, 0, False, 'SET 3,E'), 0xDC: (0, 0, 0, 0, False, 'SET 3,H'), 0xDD: (0, 0, 0, 0, False, 'SET 3,L'), 0xDE: (0, 0, 1, 1, False, 'SET 3,(HL)'), 0xDF: (0, 0, 0, 0, False, 'SET 3,A'), 0xE0: (0, 0, 0, 0, False, 'SET 4,B'), 0xE1: (0, 0, 0, 0, False, 'SET 4,C'), 0xE2: (0, 0, 0, 0, False, 'SET 4,D'), 0xE3: (0, 0, 0, 0, False, 'SET 4,E'), 0xE4: (0, 0, 0, 0, False, 'SET 4,H'), 0xE5: (0, 0, 0, 0, False, 'SET 4,L'), 0xE6: (0, 0, 1, 1, False, 'SET 4,(HL)'), 0xE7: (0, 0, 0, 0, False, 'SET 4,A'), 0xE8: (0, 0, 0, 0, False, 'SET 5,B'), 0xE9: (0, 0, 0, 0, False, 'SET 5,C'), 0xEA: (0, 0, 0, 0, False, 'SET 5,D'), 0xEB: (0, 0, 0, 0, False, 'SET 5,E'), 0xEC: (0, 0, 0, 0, False, 'SET 5,H'), 0xED: (0, 0, 0, 0, False, 'SET 5,L'), 0xEE: (0, 0, 1, 1, False, 'SET 5,(HL)'), 0xEF: (0, 0, 0, 0, False, 'SET 5,A'), 0xF0: (0, 0, 0, 0, False, 'SET 6,B'), 0xF1: (0, 0, 0, 0, False, 'SET 6,C'), 0xF2: (0, 0, 0, 0, False, 'SET 6,D'), 0xF3: (0, 0, 0, 0, False, 'SET 6,E'), 0xF4: (0, 0, 0, 0, False, 'SET 6,H'), 0xF5: (0, 0, 0, 0, False, 'SET 6,L'), 0xF6: (0, 0, 1, 1, False, 'SET 6,(HL)'), 0xF7: (0, 0, 0, 0, False, 'SET 6,A'), 0xF8: (0, 0, 0, 0, False, 'SET 7,B'), 0xF9: (0, 0, 0, 0, False, 'SET 7,C'), 0xFA: (0, 0, 0, 0, False, 'SET 7,D'), 0xFB: (0, 0, 0, 0, False, 'SET 7,E'), 0xFC: (0, 0, 0, 0, False, 'SET 7,H'), 0xFD: (0, 0, 0, 0, False, 'SET 7,L'), 0xFE: (0, 0, 1, 1, False, 'SET 7,(HL)'), 0xFF: (0, 0, 0, 0, False, 'SET 7,A') } # Instructions with DD or FD prefix index_instructions = { 0x09: (0, 0, 0, 0, False, 'ADD {r},BC'), 0x19: (0, 0, 0, 0, False, 'ADD {r},DE'), 0x21: (0, 2, 0, 0, False, 'LD {r},{i:04H}h'), 0x22: (0, 2, 0, 2, False, 'LD ({i:04H}h),{r}'), 0x23: (0, 0, 0, 0, False, 'INC {r}'), 0x24: (0, 0, 0, 0, False, 'INC {r}h'), 0x25: (0, 0, 0, 0, False, 'DEC {r}h'), 0x26: (0, 1, 0, 0, False, 'LD {r}h,{i:02H}h'), 0x29: (0, 0, 0, 0, False, 'ADD {r},{r}'), 0x2A: (0, 2, 2, 0, False, 'LD {r},({i:04H}h)'), 0x2B: (0, 0, 0, 0, False, 'DEC {r}'), 0x2C: (0, 0, 0, 0, False, 'INC {r}l'), 0x2D: (0, 0, 0, 0, False, 'DEC {r}l'), 0x2E: (0, 1, 0, 0, False, 'LD {r}l,{i:02H}h'), 0x34: (1, 0, 1, 1, False, 'INC ({r}{d:+d})'), 0x35: (1, 0, 1, 1, False, 'DEC ({r}{d:+d})'), 0x36: (1, 1, 0, 1, False, 'LD ({r}{d:+d}),{i:02H}h'), 0x39: (0, 0, 0, 0, False, 'ADD {r},SP'), 0x44: (0, 0, 0, 0, False, 'LD B,{r}h'), 0x45: (0, 0, 0, 0, False, 'LD B,{r}l'), 0x46: (1, 0, 1, 0, False, 'LD B,({r}{d:+d})'), 0x4C: (0, 0, 0, 0, False, 'LD C,{r}h'), 0x4D: (0, 0, 0, 0, False, 'LD C,{r}l'), 0x4E: (1, 0, 1, 0, False, 'LD C,({r}{d:+d})'), 0x54: (0, 0, 0, 0, False, 'LD D,{r}h'), 0x55: (0, 0, 0, 0, False, 'LD D,{r}l'), 0x56: (1, 0, 1, 0, False, 'LD D,({r}{d:+d})'), 0x5C: (0, 0, 0, 0, False, 'LD E,{r}h'), 0x5D: (0, 0, 0, 0, False, 'LD E,{r}l'), 0x5E: (1, 0, 1, 0, False, 'LD E,({r}{d:+d})'), 0x60: (0, 0, 0, 0, False, 'LD {r}h,B'), 0x61: (0, 0, 0, 0, False, 'LD {r}h,C'), 0x62: (0, 0, 0, 0, False, 'LD {r}h,D'), 0x63: (0, 0, 0, 0, False, 'LD {r}h,E'), 0x64: (0, 0, 0, 0, False, 'LD {r}h,{r}h'), 0x65: (0, 0, 0, 0, False, 'LD {r}h,{r}l'), 0x66: (1, 0, 1, 0, False, 'LD H,({r}{d:+d})'), 0x67: (0, 0, 0, 0, False, 'LD {r}h,A'), 0x68: (0, 0, 0, 0, False, 'LD {r}l,B'), 0x69: (0, 0, 0, 0, False, 'LD {r}l,C'), 0x6A: (0, 0, 0, 0, False, 'LD {r}l,D'), 0x6B: (0, 0, 0, 0, False, 'LD {r}l,E'), 0x6C: (0, 0, 0, 0, False, 'LD {r}l,{r}h'), 0x6D: (0, 0, 0, 0, False, 'LD {r}l,{r}l'), 0x6E: (1, 0, 1, 0, False, 'LD L,({r}{d:+d})'), 0x6F: (0, 0, 0, 0, False, 'LD {r}l,A'), 0x70: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),B'), 0x71: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),C'), 0x72: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),D'), 0x73: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),E'), 0x74: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),H'), 0x75: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),L'), 0x77: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),A'), 0x7C: (0, 0, 0, 0, False, 'LD A,{r}h'), 0x7D: (0, 0, 0, 0, False, 'LD A,{r}l'), 0x7E: (1, 0, 1, 0, False, 'LD A,({r}{d:+d})'), 0x84: (0, 0, 0, 0, False, 'ADD A,{r}h'), 0x85: (0, 0, 0, 0, False, 'ADD A,{r}l'), 0x86: (1, 0, 1, 0, False, 'ADD A,({r}{d:+d})'), 0x8C: (0, 0, 0, 0, False, 'ADC A,{r}h'), 0x8D: (0, 0, 0, 0, False, 'ADC A,{r}l'), 0x8E: (1, 0, 1, 0, False, 'ADC A,({r}{d:+d})'), 0x94: (0, 0, 0, 0, False, 'SUB {r}h'), 0x95: (0, 0, 0, 0, False, 'SUB {r}l'), 0x96: (1, 0, 1, 0, False, 'SUB ({r}{d:+d})'), 0x9C: (0, 0, 0, 0, False, 'SBC A,{r}h'), 0x9D: (0, 0, 0, 0, False, 'SBC A,{r}l'), 0x9E: (1, 0, 1, 0, False, 'SBC A,({r}{d:+d})'), 0xA4: (0, 0, 0, 0, False, 'AND {r}h'), 0xA5: (0, 0, 0, 0, False, 'AND {r}l'), 0xA6: (1, 0, 1, 0, False, 'AND ({r}{d:+d})'), 0xAC: (0, 0, 0, 0, False, 'XOR {r}h'), 0xAD: (0, 0, 0, 0, False, 'XOR {r}l'), 0xAE: (1, 0, 1, 0, False, 'XOR ({r}{d:+d})'), 0xB4: (0, 0, 0, 0, False, 'OR {r}h'), 0xB5: (0, 0, 0, 0, False, 'OR {r}l'), 0xB6: (1, 0, 1, 0, False, 'OR ({r}{d:+d})'), 0xBC: (0, 0, 0, 0, False, 'CP {r}h'), 0xBD: (0, 0, 0, 0, False, 'CP {r}l'), 0xBE: (1, 0, 1, 0, False, 'CP ({r}{d:+d})'), 0xE1: (0, 0, 2, 0, False, 'POP {r}'), 0xE3: (0, 0, 2, 2, False, 'EX (SP),{r}'), 0xE5: (0, 0, 0,-2, False, 'PUSH {r}'), 0xE9: (0, 0, 0, 0, False, 'JP ({r})'), 0xF9: (0, 0, 0, 0, False, 'LD SP,{r}') } # Instructions with DD CB or FD CB prefix. # For these instructions, the displacement precedes the opcode byte. # This is handled as a special case in the code, and thus the entries # in this table specify 0 for the displacement length. index_bit_instructions = { 0x00: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),B'), 0x01: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),C'), 0x02: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),D'), 0x03: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),E'), 0x04: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),H'), 0x05: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),L'), 0x06: (0, 0, 1, 1, False, 'RLC ({r}{d:+d})'), 0x07: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),A'), 0x08: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),B'), 0x09: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),C'), 0x0A: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),D'), 0x0B: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),E'), 0x0C: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),H'), 0x0D: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),L'), 0x0E: (0, 0, 1, 1, False, 'RRC ({r}{d:+d})'), 0x0F: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),A'), 0x10: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),B'), 0x11: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),C'), 0x12: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),D'), 0x13: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),E'), 0x14: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),H'), 0x15: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),L'), 0x16: (0, 0, 1, 1, False, 'RL ({r}{d:+d})'), 0x17: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),A'), 0x18: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),B'), 0x19: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),C'), 0x1A: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),D'), 0x1B: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),E'), 0x1C: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),H'), 0x1D: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),L'), 0x1E: (0, 0, 1, 1, False, 'RR ({r}{d:+d})'), 0x1F: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),A'), 0x20: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),B'), 0x21: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),C'), 0x22: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),D'), 0x23: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),E'), 0x24: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),H'), 0x25: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),L'), 0x26: (0, 0, 1, 1, False, 'SLA ({r}{d:+d})'), 0x27: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),A'), 0x28: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),B'), 0x29: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),C'), 0x2A: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),D'), 0x2B: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),E'), 0x2C: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),H'), 0x2D: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),L'), 0x2E: (0, 0, 1, 1, False, 'SRA ({r}{d:+d})'), 0x2F: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),A'), 0x30: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),B'), 0x31: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),C'), 0x32: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),D'), 0x33: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),E'), 0x34: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),H'), 0x35: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),L'), 0x36: (0, 0, 1, 1, False, 'SLL ({r}{d:+d})'), 0x37: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),A'), 0x38: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),B'), 0x39: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),C'), 0x3A: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),D'), 0x3B: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),E'), 0x3C: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),H'), 0x3D: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),L'), 0x3E: (0, 0, 1, 1, False, 'SRL ({r}{d:+d})'), 0x3F: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),A'), 0x40: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x41: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x42: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x43: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x44: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x45: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x46: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x47: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), 0x48: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x49: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x4A: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x4B: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x4C: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x4D: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x4E: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x4F: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), 0x50: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x51: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x52: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x53: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x54: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x55: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x56: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x57: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), 0x58: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x59: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x5A: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x5B: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x5C: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x5D: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x5E: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x5F: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), 0x60: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x61: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x62: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x63: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x64: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x65: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x66: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x67: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), 0x68: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x69: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x6A: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x6B: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x6C: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x6D: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x6E: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x6F: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), 0x70: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x71: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x72: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x73: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x74: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x75: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x76: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x77: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), 0x78: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x79: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x7A: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x7B: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x7C: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x7D: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x7E: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x7F: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), 0x80: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),B'), 0x81: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),C'), 0x82: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),D'), 0x83: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),E'), 0x84: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),H'), 0x85: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),L'), 0x86: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d})'), 0x87: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),A'), 0x88: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),B'), 0x89: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),C'), 0x8A: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),D'), 0x8B: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),E'), 0x8C: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),H'), 0x8D: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),L'), 0x8E: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d})'), 0x8F: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),A'), 0x90: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),B'), 0x91: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),C'), 0x92: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),D'), 0x93: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),E'), 0x94: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),H'), 0x95: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),L'), 0x96: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d})'), 0x97: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),A'), 0x98: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),B'), 0x99: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),C'), 0x9A: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),D'), 0x9B: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),E'), 0x9C: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),H'), 0x9D: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),L'), 0x9E: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d})'), 0x9F: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),A'), 0xA0: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),B'), 0xA1: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),C'), 0xA2: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),D'), 0xA3: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),E'), 0xA4: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),H'), 0xA5: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),L'), 0xA6: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d})'), 0xA7: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),A'), 0xA8: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),B'), 0xA9: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),C'), 0xAA: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),D'), 0xAB: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),E'), 0xAC: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),H'), 0xAD: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),L'), 0xAE: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d})'), 0xAF: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),A'), 0xB0: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),B'), 0xB1: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),C'), 0xB2: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),D'), 0xB3: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),E'), 0xB4: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),H'), 0xB5: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),L'), 0xB6: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d})'), 0xB7: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),A'), 0xB8: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),B'), 0xB9: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),C'), 0xBA: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),D'), 0xBB: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),E'), 0xBC: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),H'), 0xBD: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),L'), 0xBE: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d})'), 0xBF: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),A'), 0xC0: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),B'), 0xC1: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),C'), 0xC2: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),D'), 0xC3: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),E'), 0xC4: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),H'), 0xC5: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),L'), 0xC6: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d})'), 0xC7: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),A'), 0xC8: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),B'), 0xC9: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),C'), 0xCA: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),D'), 0xCB: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),E'), 0xCC: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),H'), 0xCD: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),L'), 0xCE: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d})'), 0xCF: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),A'), 0xD0: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),B'), 0xD1: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),C'), 0xD2: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),D'), 0xD3: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),E'), 0xD4: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),H'), 0xD5: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),L'), 0xD6: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d})'), 0xD7: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),A'), 0xD8: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),B'), 0xD9: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),C'), 0xDA: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),D'), 0xDB: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),E'), 0xDC: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),H'), 0xDD: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),L'), 0xDE: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d})'), 0xDF: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),A'), 0xE0: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),B'), 0xE1: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),C'), 0xE2: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),D'), 0xE3: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),E'), 0xE4: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),H'), 0xE5: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),L'), 0xE6: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d})'), 0xE7: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),A'), 0xE8: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),B'), 0xE9: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),C'), 0xEA: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),D'), 0xEB: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),E'), 0xEC: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),H'), 0xED: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),L'), 0xEE: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d})'), 0xEF: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),A'), 0xF0: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),B'), 0xF1: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),C'), 0xF2: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),D'), 0xF3: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),E'), 0xF4: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),H'), 0xF5: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),L'), 0xF6: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d})'), 0xF7: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),A'), 0xF8: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),B'), 0xF9: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),C'), 0xFA: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),D'), 0xFB: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),E'), 0xFC: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),H'), 0xFD: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),L'), 0xFE: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d})'), 0xFF: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),A') } instr_table_by_prefix = { 0: (main_instructions, ''), 0xED: (extended_instructions, ''), 0xCB: (bit_instructions, ''), 0xDD: (index_instructions, 'IX'), 0xFD: (index_instructions, 'IY'), 0xDDCB: (index_bit_instructions, 'IX'), 0xFDCB: (index_bit_instructions, 'IY') } libsigrokdecode-0.5.0/decoders/z80/__init__.py0000644000175000017500000000244113117367246016123 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Daniel Elstner ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' The Zilog Z80 is an 8-bit microprocessor compatible with the Intel 8080. In addition to the 8-bit data bus, this decoder requires the input signals /M1 (machine cycle), /RD (read) and /WR (write) to do its work. An explicit clock signal is not required. However, the Z80 CPU clock may be used as sampling clock, if applicable. Notes on the Z80 opcode format and descriptions of both documented and "undocumented" opcodes are available here: http://www.z80.info/decoding.htm http://clrhome.org/table/ ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/nrf24l01/0000755000175000017500000000000013117367246014720 500000000000000libsigrokdecode-0.5.0/decoders/nrf24l01/pd.py0000644000175000017500000002651113117367246015622 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Jens Steinhauser ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class ChannelError(Exception): pass regs = { # addr: ('name', size) 0x00: ('CONFIG', 1), 0x01: ('EN_AA', 1), 0x02: ('EN_RXADDR', 1), 0x03: ('SETUP_AW', 1), 0x04: ('SETUP_RETR', 1), 0x05: ('RF_CH', 1), 0x06: ('RF_SETUP', 1), 0x07: ('STATUS', 1), 0x08: ('OBSERVE_TX', 1), 0x09: ('RPD', 1), 0x0a: ('RX_ADDR_P0', 5), 0x0b: ('RX_ADDR_P1', 5), 0x0c: ('RX_ADDR_P2', 1), 0x0d: ('RX_ADDR_P3', 1), 0x0e: ('RX_ADDR_P4', 1), 0x0f: ('RX_ADDR_P5', 1), 0x10: ('TX_ADDR', 5), 0x11: ('RX_PW_P0', 1), 0x12: ('RX_PW_P1', 1), 0x13: ('RX_PW_P2', 1), 0x14: ('RX_PW_P3', 1), 0x15: ('RX_PW_P4', 1), 0x16: ('RX_PW_P5', 1), 0x17: ('FIFO_STATUS', 1), 0x1c: ('DYNPD', 1), 0x1d: ('FEATURE', 1), } xn297_regs = { 0x19: ('DEMOD_CAL', 5), 0x1e: ('RF_CAL', 7), 0x1f: ('BB_CAL', 5), } class Decoder(srd.Decoder): api_version = 2 id = 'nrf24l01' name = 'nRF24L01(+)' longname = 'Nordic Semiconductor nRF24L01/nRF24L01+' desc = '2.4GHz transceiver chip.' license = 'gplv2+' inputs = ['spi'] outputs = ['nrf24l01'] options = ( {'id': 'chip', 'desc': 'Chip type', 'default': 'nrf24l01', 'values': ('nrf24l01', 'xn297')}, ) annotations = ( # Sent from the host to the chip. ('cmd', 'Commands sent to the device'), ('tx-data', 'Payload sent to the device'), # Returned by the chip. ('register', 'Registers read from the device'), ('rx-data', 'Payload read from the device'), ('warning', 'Warnings'), ) ann_cmd = 0 ann_tx = 1 ann_reg = 2 ann_rx = 3 ann_warn = 4 annotation_rows = ( ('commands', 'Commands', (ann_cmd, ann_tx)), ('responses', 'Responses', (ann_reg, ann_rx)), ('warnings', 'Warnings', (ann_warn,)), ) def __init__(self): self.next() self.requirements_met = True self.cs_was_released = False def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) if self.options['chip'] == 'xn297': regs.update(xn297_regs) def warn(self, pos, msg): '''Put a warning message 'msg' at 'pos'.''' self.put(pos[0], pos[1], self.out_ann, [self.ann_warn, [msg]]) def putp(self, pos, ann, msg): '''Put an annotation message 'msg' at 'pos'.''' self.put(pos[0], pos[1], self.out_ann, [ann, [msg]]) def next(self): '''Resets the decoder after a complete command was decoded.''' # 'True' for the first byte after CS went low. self.first = True # The current command, and the minimum and maximum number # of data bytes to follow. self.cmd = None self.min = 0 self.max = 0 # Used to collect the bytes after the command byte # (and the start/end sample number). self.mb = [] self.mb_s = -1 self.mb_e = -1 def mosi_bytes(self): '''Returns the collected MOSI bytes of a multi byte command.''' return [b[0] for b in self.mb] def miso_bytes(self): '''Returns the collected MISO bytes of a multi byte command.''' return [b[1] for b in self.mb] def decode_command(self, pos, b): '''Decodes the command byte 'b' at position 'pos' and prepares the decoding of the following data bytes.''' c = self.parse_command(b) if c is None: self.warn(pos, 'unknown command') return self.cmd, self.dat, self.min, self.max = c if self.cmd in ('W_REGISTER', 'ACTIVATE'): # Don't output anything now, the command is merged with # the data bytes following it. self.mb_s = pos[0] else: self.putp(pos, self.ann_cmd, self.format_command()) def format_command(self): '''Returns the label for the current command.''' if self.cmd == 'R_REGISTER': reg = regs[self.dat][0] if self.dat in regs else 'unknown register' return 'Cmd R_REGISTER "{}"'.format(reg) else: return 'Cmd {}'.format(self.cmd) def parse_command(self, b): '''Parses the command byte. Returns a tuple consisting of: - the name of the command - additional data needed to dissect the following bytes - minimum number of following bytes - maximum number of following bytes ''' if (b & 0xe0) in (0b00000000, 0b00100000): c = 'R_REGISTER' if not (b & 0xe0) else 'W_REGISTER' d = b & 0x1f m = regs[d][1] if d in regs else 1 return (c, d, 1, m) if b == 0b01010000: # nRF24L01 only return ('ACTIVATE', None, 1, 1) if b == 0b01100001: return ('R_RX_PAYLOAD', None, 1, 32) if b == 0b01100000: return ('R_RX_PL_WID', None, 1, 1) if b == 0b10100000: return ('W_TX_PAYLOAD', None, 1, 32) if b == 0b10110000: return ('W_TX_PAYLOAD_NOACK', None, 1, 32) if (b & 0xf8) == 0b10101000: return ('W_ACK_PAYLOAD', b & 0x07, 1, 32) if b == 0b11100001: return ('FLUSH_TX', None, 0, 0) if b == 0b11100010: return ('FLUSH_RX', None, 0, 0) if b == 0b11100011: return ('REUSE_TX_PL', None, 0, 0) if b == 0b11111111: return ('NOP', None, 0, 0) def decode_register(self, pos, ann, regid, data): '''Decodes a register. pos -- start and end sample numbers of the register ann -- is the annotation number that is used to output the register. regid -- may be either an integer used as a key for the 'regs' dictionary, or a string directly containing a register name.' data -- is the register content. ''' if type(regid) == int: # Get the name of the register. if regid not in regs: self.warn(pos, 'unknown register') return name = regs[regid][0] else: name = regid # Multi byte register come LSByte first. data = reversed(data) if self.cmd == 'W_REGISTER' and ann == self.ann_cmd: # The 'W_REGISTER' command is merged with the following byte(s). label = '{}: {}'.format(self.format_command(), name) else: label = 'Reg {}'.format(name) self.decode_mb_data(pos, ann, data, label, True) def decode_mb_data(self, pos, ann, data, label, always_hex): '''Decodes the data bytes 'data' of a multibyte command at position 'pos'. The decoded data is prefixed with 'label'. If 'always_hex' is True, all bytes are decoded as hex codes, otherwise only non printable characters are escaped.''' if always_hex: def escape(b): return '{:02X}'.format(b) else: def escape(b): c = chr(b) if not str.isprintable(c): return '\\x{:02X}'.format(b) return c data = ''.join([escape(b) for b in data]) text = '{} = "{}"'.format(label, data) self.putp(pos, ann, text) def finish_command(self, pos): '''Decodes the remaining data bytes at position 'pos'.''' if self.cmd == 'R_REGISTER': self.decode_register(pos, self.ann_reg, self.dat, self.miso_bytes()) elif self.cmd == 'W_REGISTER': self.decode_register(pos, self.ann_cmd, self.dat, self.mosi_bytes()) elif self.cmd == 'R_RX_PAYLOAD': self.decode_mb_data(pos, self.ann_rx, self.miso_bytes(), 'RX payload', False) elif (self.cmd == 'W_TX_PAYLOAD' or self.cmd == 'W_TX_PAYLOAD_NOACK'): self.decode_mb_data(pos, self.ann_tx, self.mosi_bytes(), 'TX payload', False) elif self.cmd == 'W_ACK_PAYLOAD': lbl = 'ACK payload for pipe {}'.format(self.dat) self.decode_mb_data(pos, self.ann_tx, self.mosi_bytes(), lbl, False) elif self.cmd == 'R_RX_PL_WID': msg = 'Payload width = {}'.format(self.mb[0][1]) self.putp(pos, self.ann_reg, msg) elif self.cmd == 'ACTIVATE': self.putp(pos, self.ann_cmd, self.format_command()) if self.mosi_bytes()[0] != 0x73: self.warn(pos, 'wrong data for "ACTIVATE" command') def decode(self, ss, es, data): if not self.requirements_met: return ptype, data1, data2 = data if ptype == 'CS-CHANGE': if data1 is None: if data2 is None: self.requirements_met = False raise ChannelError('CS# pin required.') elif data2 == 1: self.cs_was_released = True if data1 == 0 and data2 == 1: # Rising edge, the complete command is transmitted, process # the bytes that were send after the command byte. if self.cmd: # Check if we got the minimum number of data bytes # after the command byte. if len(self.mb) < self.min: self.warn((ss, ss), 'missing data bytes') elif self.mb: self.finish_command((self.mb_s, self.mb_e)) self.next() self.cs_was_released = True elif ptype == 'DATA' and self.cs_was_released: mosi, miso = data1, data2 pos = (ss, es) if miso is None or mosi is None: self.requirements_met = False raise ChannelError('Both MISO and MOSI pins required.') if self.first: self.first = False # First MOSI byte is always the command. self.decode_command(pos, mosi) # First MISO byte is always the status register. self.decode_register(pos, self.ann_reg, 'STATUS', [miso]) else: if not self.cmd or len(self.mb) >= self.max: self.warn(pos, 'excess byte') else: # Collect the bytes after the command byte. if self.mb_s == -1: self.mb_s = ss self.mb_e = es self.mb.append((mosi, miso)) libsigrokdecode-0.5.0/decoders/nrf24l01/__init__.py0000644000175000017500000000210313117367246016745 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Jens Steinhauser ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the protocol spoken by the Nordic Semiconductor nRF24L01 and nRF24L01+ 2.4GHz transceiver chips. Details: http://www.nordicsemi.com/eng/Products/2.4GHz-RF/nRF24L01 http://www.nordicsemi.com/eng/Products/2.4GHz-RF/nRF24L01P ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/onewire_link/0000755000175000017500000000000013117367246016135 500000000000000libsigrokdecode-0.5.0/decoders/onewire_link/pd.py0000644000175000017500000003332613117367246017041 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Kevin Redon ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass # Timing values in us for the signal at regular and overdrive speed. timing = { 'RSTL': { 'min': { False: 480.0, True: 48.0, }, 'max': { False: 960.0, True: 80.0, }, }, 'RSTH': { 'min': { False: 480.0, True: 48.0, }, }, 'PDH': { 'min': { False: 15.0, True: 2.0, }, 'max': { False: 60.0, True: 6.0, }, }, 'PDL': { 'min': { False: 60.0, True: 8.0, }, 'max': { False: 240.0, True: 24.0, }, }, 'SLOT': { 'min': { False: 60.0, True: 6.0, }, 'max': { False: 120.0, True: 16.0, }, }, 'REC': { 'min': { False: 1.0, True: 1.0, }, }, 'LOWR': { 'min': { False: 1.0, True: 1.0, }, 'max': { False: 15.0, True: 2.0, }, }, } class Decoder(srd.Decoder): api_version = 3 id = 'onewire_link' name = '1-Wire link layer' longname = '1-Wire serial communication bus (link layer)' desc = 'Bidirectional, half-duplex, asynchronous serial bus.' license = 'gplv2+' inputs = ['logic'] outputs = ['onewire_link'] channels = ( {'id': 'owr', 'name': 'OWR', 'desc': '1-Wire signal line'}, ) options = ( {'id': 'overdrive', 'desc': 'Start in overdrive speed', 'default': 'no', 'values': ('yes', 'no')}, ) annotations = ( ('bit', 'Bit'), ('warnings', 'Warnings'), ('reset', 'Reset'), ('presence', 'Presence'), ('overdrive', 'Overdrive speed notifications'), ) annotation_rows = ( ('bits', 'Bits', (0, 2, 3)), ('info', 'Info', (4,)), ('warnings', 'Warnings', (1,)), ) def __init__(self): self.samplerate = None self.state = 'INITIAL' self.present = 0 self.bit = 0 self.bit_count = -1 self.command = 0 self.overdrive = False self.fall = 0 self.rise = 0 def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) self.overdrive = (self.options['overdrive'] == 'yes') self.fall = 0 self.rise = 0 self.bit_count = -1 def putm(self, data): self.put(0, 0, self.out_ann, data) def putpfs(self, data): self.put(self.fall, self.samplenum, self.out_python, data) def putfs(self, data): self.put(self.fall, self.samplenum, self.out_ann, data) def putfr(self, data): self.put(self.fall, self.rise, self.out_ann, data) def putprs(self, data): self.put(self.rise, self.samplenum, self.out_python, data) def putrs(self, data): self.put(self.rise, self.samplenum, self.out_ann, data) def checks(self): # Check if samplerate is appropriate. if self.options['overdrive'] == 'yes': if self.samplerate < 2000000: self.putm([1, ['Sampling rate is too low. Must be above ' + '2MHz for proper overdrive mode decoding.']]) elif self.samplerate < 5000000: self.putm([1, ['Sampling rate is suggested to be above 5MHz ' + 'for proper overdrive mode decoding.']]) else: if self.samplerate < 400000: self.putm([1, ['Sampling rate is too low. Must be above ' + '400kHz for proper normal mode decoding.']]) elif self.samplerate < 1000000: self.putm([1, ['Sampling rate is suggested to be above ' + '1MHz for proper normal mode decoding.']]) def metadata(self, key, value): if key != srd.SRD_CONF_SAMPLERATE: return self.samplerate = value def wait_falling_timeout(self, start, t): # Wait until either a falling edge is seen, and/or the specified # number of samples have been skipped (i.e. time has passed). cnt = int((t[self.overdrive] / 1000000.0) * self.samplerate) samples_to_skip = (start + cnt) - self.samplenum samples_to_skip = samples_to_skip if (samples_to_skip > 0) else 0 return self.wait([{0: 'f'}, {'skip': samples_to_skip}]) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') self.checks() while True: # State machine. if self.state == 'INITIAL': # Unknown initial state. # Wait until we reach the idle high state. self.wait({0: 'h'}) self.rise = self.samplenum self.state = 'IDLE' elif self.state == 'IDLE': # Idle high state. # Wait for falling edge. self.wait({0: 'f'}) self.fall = self.samplenum # Get time since last rising edge. time = ((self.fall - self.rise) / self.samplerate) * 1000000.0 if self.rise > 0 and \ time < timing['REC']['min'][self.overdrive]: self.putfr([1, ['Recovery time not long enough' 'Recovery too short', 'REC < ' + str(timing['REC']['min'][self.overdrive])]]) # A reset pulse or slot can start on a falling edge. self.state = 'LOW' # TODO: Check minimum recovery time. elif self.state == 'LOW': # Reset pulse or slot. # Wait for rising edge. self.wait({0: 'r'}) self.rise = self.samplenum # Detect reset or slot base on timing. time = ((self.rise - self.fall) / self.samplerate) * 1000000.0 if time >= timing['RSTL']['min'][False]: # Normal reset pulse. if time > timing['RSTL']['max'][False]: self.putfr([1, ['Too long reset pulse might mask interrupt ' + 'signalling by other devices', 'Reset pulse too long', 'RST > ' + str(timing['RSTL']['max'][False])]]) # Regular reset pulse clears overdrive speed. if self.overdrive: self.putfr([4, ['Exiting overdrive mode', 'Overdrive off']]) self.overdrive = False self.putfr([2, ['Reset', 'Rst', 'R']]) self.state = 'PRESENCE DETECT HIGH' elif self.overdrive == True and \ time >= timing['RSTL']['min'][self.overdrive] and \ time < timing['RSTL']['max'][self.overdrive]: # Overdrive reset pulse. self.putfr([2, ['Reset', 'Rst', 'R']]) self.state = 'PRESENCE DETECT HIGH' elif time < timing['SLOT']['max'][self.overdrive]: # Read/write time slot. if time < timing['LOWR']['min'][self.overdrive]: self.putfr([1, ['Low signal not long enough', 'Low too short', 'LOW < ' + str(timing['LOWR']['min'][self.overdrive])]]) if time < timing['LOWR']['max'][self.overdrive]: self.bit = 1 # Short pulse is a 1 bit. else: self.bit = 0 # Long pulse is a 0 bit. # Wait for end of slot. self.state = 'SLOT' else: # Timing outside of known states. self.putfr([1, ['Erroneous signal', 'Error', 'Err', 'E']]) self.state = 'IDLE' elif self.state == 'PRESENCE DETECT HIGH': # Wait for slave presence signal. # Wait for a falling edge and/or presence detect signal. self.wait_falling_timeout(self.rise, timing['PDH']['max']) # Calculate time since rising edge. time = ((self.samplenum - self.rise) / self.samplerate) * 1000000.0 if self.matched[0] and not self.matched[1]: # Presence detected. if time < timing['PDH']['min'][self.overdrive]: self.putrs([1, ['Presence detect signal is too early', 'Presence detect too early', 'PDH < ' + str(timing['PDH']['min'][self.overdrive])]]) self.fall = self.samplenum self.state = 'PRESENCE DETECT LOW' else: # No presence detected. self.putrs([3, ['Presence: false', 'Presence', 'Pres', 'P']]) self.putprs(['RESET/PRESENCE', False]) self.state = 'IDLE' elif self.state == 'PRESENCE DETECT LOW': # Slave presence signalled. # Wait for end of presence signal (on rising edge). self.wait({0: 'r'}) # Calculate time since start of presence signal. time = ((self.samplenum - self.fall) / self.samplerate) * 1000000.0 if time < timing['PDL']['min'][self.overdrive]: self.putfs([1, ['Presence detect signal is too short', 'Presence detect too short', 'PDL < ' + str(timing['PDL']['min'][self.overdrive])]]) elif time > timing['PDL']['max'][self.overdrive]: self.putfs([1, ['Presence detect signal is too long', 'Presence detect too long', 'PDL > ' + str(timing['PDL']['max'][self.overdrive])]]) if time > timing['RSTH']['min'][self.overdrive]: self.rise = self.samplenum # Wait for end of presence detect. self.state = 'PRESENCE DETECT' # End states (for additional checks). if self.state == 'SLOT': # Wait for end of time slot. # Wait for a falling edge and/or end of timeslot. self.wait_falling_timeout(self.fall, timing['SLOT']['min']) if self.matched[0] and not self.matched[1]: # Low detected before end of slot. self.putfs([1, ['Time slot not long enough', 'Slot too short', 'SLOT < ' + str(timing['SLOT']['min'][self.overdrive])]]) # Don't output invalid bit. self.fall = self.samplenum self.state = 'LOW' else: # End of time slot. # Output bit. self.putfs([0, ['Bit: %d' % self.bit, '%d' % self.bit]]) self.putpfs(['BIT', self.bit]) # Save command bits. if self.bit_count >= 0: self.command += (self.bit << self.bit_count) self.bit_count += 1 # Check for overdrive ROM command. if self.bit_count >= 8: if self.command == 0x3c or self.command == 0x69: self.overdrive = True self.put(self.samplenum, self.samplenum, self.out_ann, [4, ['Entering overdrive mode', 'Overdrive on']]) self.bit_count = -1 self.state = 'IDLE' if self.state == 'PRESENCE DETECT': # Wait for a falling edge and/or end of presence detect. self.wait_falling_timeout(self.rise, timing['RSTH']['min']) if self.matched[0] and not self.matched[1]: # Low detected before end of presence detect. self.putfs([1, ['Presence detect not long enough', 'Presence detect too short', 'RTSH < ' + str(timing['RSTH']['min'][self.overdrive])]]) # Inform about presence detected. self.putrs([3, ['Slave presence detected', 'Slave present', 'Present', 'P']]) self.putprs(['RESET/PRESENCE', True]) self.fall = self.samplenum self.state = 'LOW' else: # End of time slot. # Inform about presence detected. self.putrs([3, ['Presence: true', 'Presence', 'Pres', 'P']]) self.putprs(['RESET/PRESENCE', True]) self.rise = self.samplenum # Start counting the first 8 bits to get the ROM command. self.bit_count = 0 self.command = 0 self.state = 'IDLE' libsigrokdecode-0.5.0/decoders/onewire_link/__init__.py0000644000175000017500000000416113117367246020170 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## Copyright (C) 2017 Kevin Redon ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder handles the 1-Wire link layer. The 1-Wire protocol enables bidirectional communication over a single wire (and ground) between a single master and one or multiple slaves. The protocol is layered: - Link layer (reset, presence detection, reading/writing bits) - Network layer (skip/search/match device ROM addresses) - Transport layer (transport data between 1-Wire master and device) Sample rate: A sufficiently high samplerate is required to properly detect all the elements of the protocol. A lower samplerate can be used if the master does not use overdrive communication speed. The following minimal values should be used: - overdrive available: 2MHz minimum, 5MHz suggested - overdrive not available: 400kHz minimum, 1MHz suggested Channels: 1-Wire requires a single signal, but some master implementations might have a separate signal used to deliver power to the bus during temperature conversion as an example. - owr (1-Wire signal line) Options: 1-Wire is an asynchronous protocol with fixed timing values, so the decoder must know the samplerate. Two speeds are available: normal and overdrive. The decoder detects when switching from one to another but the user can set which to start decoding with: - overdrive (to decode starting with overdrive speed) ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/adf435x/0000755000175000017500000000000013117367246014626 500000000000000libsigrokdecode-0.5.0/decoders/adf435x/pd.py0000644000175000017500000001360513117367246015530 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Joel Holdsworth ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 3 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd def disabled_enabled(v): return ['Disabled', 'Enabled'][v] def output_power(v): return '%+ddBm' % [-4, -1, 2, 5][v] regs = { # reg: name offset width parser 0: [ ('FRAC', 3, 12, None), ('INT', 15, 16, lambda v: 'Not Allowed' if v < 32 else v) ], 1: [ ('MOD', 3, 12, None), ('Phase', 15, 12, None), ('Prescalar', 27, 1, lambda v: ['4/5', '8/9'][v]), ('Phase Adjust', 28, 1, lambda v: ['Off', 'On'][v]), ], 2: [ ('Counter Reset', 3, 1, disabled_enabled), ('Charge Pump Three-State', 4, 1, disabled_enabled), ('Power-Down', 5, 1, disabled_enabled), ('PD Polarity', 6, 1, lambda v: ['Negative', 'Positive'][v]), ('LDP', 7, 1, lambda v: ['10ns', '6ns'][v]), ('LDF', 8, 1, lambda v: ['FRAC-N', 'INT-N'][v]), ('Charge Pump Current Setting', 9, 4, lambda v: '%0.2fmA @ 5.1kΩ' % [0.31, 0.63, 0.94, 1.25, 1.56, 1.88, 2.19, 2.50, 2.81, 3.13, 3.44, 3.75, 4.06, 4.38, 4.69, 5.00][v]), ('Double Buffer', 13, 1, disabled_enabled), ('R Counter', 14, 10, None), ('RDIV2', 24, 1, disabled_enabled), ('Reference Doubler', 25, 1, disabled_enabled), ('MUXOUT', 26, 3, lambda v: ['Three-State Output', 'DVdd', 'DGND', 'R Counter Output', 'N Divider Output', 'Analog Lock Detect', 'Digital Lock Detect', 'Reserved'][v]), ('Low Noise and Low Spur Modes', 29, 2, lambda v: ['Low Noise Mode', 'Reserved', 'Reserved', 'Low Spur Mode'][v]) ], 3: [ ('Clock Divider', 3, 12, None), ('Clock Divider Mode', 15, 2, lambda v: ['Clock Divider Off', 'Fast Lock Enable', 'Resync Enable', 'Reserved'][v]), ('CSR Enable', 18, 1, disabled_enabled), ('Charge Cancellation', 21, 1, disabled_enabled), ('ABP', 22, 1, lambda v: ['6ns (FRAC-N)', '3ns (INT-N)'][v]), ('Band Select Clock Mode', 23, 1, lambda v: ['Low', 'High'][v]) ], 4: [ ('Output Power', 3, 2, output_power), ('Output Enable', 5, 1, disabled_enabled), ('AUX Output Power', 6, 2, output_power), ('AUX Output Select', 8, 1, lambda v: ['Divided Output', 'Fundamental'][v]), ('AUX Output Enable', 9, 1, disabled_enabled), ('MTLD', 10, 1, disabled_enabled), ('VCO Power-Down', 11, 1, lambda v: 'VCO Powered ' + ('Down' if v == 1 else 'Up')), ('Band Select Clock Divider', 12, 8, None), ('RF Divider Select', 20, 3, lambda v: '÷' + str(2**v)), ('Feedback Select', 23, 1, lambda v: ['Divided', 'Fundamental'][v]), ], 5: [ ('LD Pin Mode', 22, 2, lambda v: ['Low', 'Digital Lock Detect', 'Low', 'High'][v]) ] } ANN_REG = 0 class Decoder(srd.Decoder): api_version = 2 id = 'adf435x' name = 'ADF435x' longname = 'Analog Devices ADF4350/1' desc = 'Wideband synthesizer with integrated VCO.' license = 'gplv3+' inputs = ['spi'] outputs = ['adf435x'] annotations = ( # Sent from the host to the chip. ('register', 'Register written to the device'), ) annotation_rows = ( ('registers', 'Register writes', (ANN_REG,)), ) def __init__(self): self.bits = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def decode_bits(self, offset, width): return (sum([(1 << i) if self.bits[offset + i][0] else 0 for i in range(width)]), (self.bits[offset + width - 1][1], self.bits[offset][2])) def decode_field(self, name, offset, width, parser): val, pos = self.decode_bits(offset, width) self.put(pos[0], pos[1], self.out_ann, [ANN_REG, ['%s: %s' % (name, parser(val) if parser else str(val))]]) return val def decode(self, ss, es, data): ptype, data1, data2 = data if ptype == 'CS-CHANGE': if data1 == 1: if len(self.bits) == 32: reg_value, reg_pos = self.decode_bits(0, 3) self.put(reg_pos[0], reg_pos[1], self.out_ann, [ANN_REG, ['Register: %d' % reg_value, 'Reg: %d' % reg_value, '[%d]' % reg_value]]) if reg_value < len(regs): field_descs = regs[reg_value] for field_desc in field_descs: field = self.decode_field(*field_desc) self.bits = [] if ptype == 'BITS': self.bits = data1 + self.bits libsigrokdecode-0.5.0/decoders/adf435x/__init__.py0000644000175000017500000000213413117367246016657 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Joel Holdsworth ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the protocol spoken by the Analog Devices ADF4350 and ADF4351 RF synthesizer chips. Details: http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4350.pdf http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4351.pdf ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ps2/0000755000175000017500000000000013117367246014154 500000000000000libsigrokdecode-0.5.0/decoders/ps2/pd.py0000644000175000017500000000760613117367246015062 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Daniel Schulte ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from collections import namedtuple class Ann: BIT, START, STOP, PARITY_OK, PARITY_ERR, DATA, WORD = range(7) Bit = namedtuple('Bit', 'val ss es') class Decoder(srd.Decoder): api_version = 3 id = 'ps2' name = 'PS/2' longname = 'PS/2' desc = 'PS/2 keyboard/mouse interface.' license = 'gplv2+' inputs = ['logic'] outputs = ['ps2'] channels = ( {'id': 'clk', 'name': 'Clock', 'desc': 'Clock line'}, {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) annotations = ( ('bit', 'Bit'), ('start-bit', 'Start bit'), ('stop-bit', 'Stop bit'), ('parity-ok', 'Parity OK bit'), ('parity-err', 'Parity error bit'), ('data-bit', 'Data bit'), ('word', 'Word'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('fields', 'Fields', (1, 2, 3, 4, 5, 6)), ) def __init__(self): self.bits = [] self.samplenum = 0 self.bitcount = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putb(self, bit, ann_idx): b = self.bits[bit] self.put(b.ss, b.es, self.out_ann, [ann_idx, [str(b.val)]]) def putx(self, bit, ann): self.put(self.bits[bit].ss, self.bits[bit].es, self.out_ann, ann) def handle_bits(self, datapin): # Ignore non start condition bits (useful during keyboard init). if self.bitcount == 0 and datapin == 1: return # Store individual bits and their start/end samplenumbers. self.bits.append(Bit(datapin, self.samplenum, self.samplenum)) # Fix up end sample numbers of the bits. if self.bitcount > 0: b = self.bits[self.bitcount - 1] self.bits[self.bitcount - 1] = Bit(b.val, b.ss, self.samplenum) if self.bitcount == 11: self.bitwidth = self.bits[1].es - self.bits[2].es b = self.bits[-1] self.bits[-1] = Bit(b.val, b.ss, b.es + self.bitwidth) # Find all 11 bits. Start + 8 data + odd parity + stop. if self.bitcount < 11: self.bitcount += 1 return # Extract data word. word = 0 for i in range(8): word |= (self.bits[i + 1].val << i) # Calculate parity. parity_ok = (bin(word).count('1') + self.bits[9].val) % 2 == 1 # Emit annotations. for i in range(11): self.putb(i, Ann.BIT) self.putx(0, [Ann.START, ['Start bit', 'Start', 'S']]) self.put(self.bits[1].ss, self.bits[8].es, self.out_ann, [Ann.WORD, ['Data: %02x' % word, 'D: %02x' % word, '%02x' % word]]) if parity_ok: self.putx(9, [Ann.PARITY_OK, ['Parity OK', 'Par OK', 'P']]) else: self.putx(9, [Ann.PARITY_ERR, ['Parity error', 'Par err', 'PE']]) self.putx(10, [Ann.STOP, ['Stop bit', 'Stop', 'St', 'T']]) self.bits, self.bitcount = [], 0 def decode(self): while True: # Sample data bits on falling clock edge. clock_pin, data_pin = self.wait({0: 'f'}) self.handle_bits(data_pin) libsigrokdecode-0.5.0/decoders/ps2/__init__.py0000644000175000017500000000165513117367246016214 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Daniel Schulte ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## ''' This protocol decoder can decode PS/2 device -> host communication. Host -> device communication is currently not supported. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/dali/0000755000175000017500000000000013117367246014361 500000000000000libsigrokdecode-0.5.0/decoders/dali/pd.py0000644000175000017500000002344413117367246015265 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Jeremy Swanson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## import sigrokdecode as srd from .lists import * class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 2 id = 'dali' name = 'DALI' longname = 'Digital Addressable Lighting Interface' desc = 'DALI lighting control protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['dali'] channels = ( {'id': 'dali', 'name': 'DALI', 'desc': 'DALI data line'}, ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low', 'values': ('active-low', 'active-high')}, ) annotations = ( ('bit', 'Bit'), ('startbit', 'Startbit'), ('sbit', 'Select bit'), ('ybit', 'Individual or group'), ('address', 'Address'), ('command', 'Command'), ('reply', 'Reply data'), ('raw', 'Raw data'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('raw', 'Raw data', (7,)), ('fields', 'Fields', (1, 2, 3, 4, 5, 6,)), ) def __init__(self): self.samplerate = None self.samplenum = None self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' self.nextSamplePoint = None self.nextSample = None self.devType = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.old_dali = 1 if self.options['polarity'] == 'active-low' else 0 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value # One bit: 833.33us (one half low, one half high). # This is how may samples are in 1TE. self.halfbit = int((self.samplerate * 0.0008333) / 2.0) def putb(self, bit1, bit2, data): ss, es = self.ss_es_bits[bit1][0], self.ss_es_bits[bit2][1] self.put(ss, es, self.out_ann, data) def handle_bits(self, length): a, c, f, g, b = 0, 0, 0, 0, self.bits # Individual raw bits. for i in range(length): if i == 0: ss = max(0, self.bits[0][0]) else: ss = self.ss_es_bits[i - 1][1] es = self.bits[i][0] + (self.halfbit * 2) self.ss_es_bits.append([ss, es]) self.putb(i, i, [0, ['%d' % self.bits[i][1]]]) # Bits[0:0]: Startbit s = ['Startbit: %d' % b[0][1], 'ST: %d' % b[0][1], 'ST', 'S', 'S'] self.putb(0, 0, [1, s]) self.putb(0, 0, [7, s]) # Bits[1:8] for i in range(8): f |= (b[1 + i][1] << (7 - i)) if length == 9: # BACKWARD Frame s = ['Reply: %02X' % f, 'Rply: %02X' % f, 'Rep: %02X' % f, 'R: %02X' % f, 'R'] self.putb(1, 8, [7, s]) s = ['Reply: %d' % f, 'Rply: %d' % f, 'Rep: %d' % f, 'R: %d' % f, 'R'] self.putb(1, 8, [6, s]) return # FORWARD FRAME # Bits[9:16]: Command/data (MSB-first) for i in range(8): c |= (b[9 + i][1] << (7 - i)) # Raw output s = ['Raw data: %02X' % f, 'Raw: %02X' % f, 'Raw: %02X' % f, 'R: %02X' % f, 'R'] self.putb(1, 8, [7, s]) s = ['Raw data: %02X' % c, 'Raw: %02X' % c, 'Raw: %02X' % c, 'R: %02X' % c, 'R'] self.putb(9, 16, [7, s]) # Bits[8:8]: Select bit # s = ['Selectbit: %d' % b[8][1], 'SEL: %d' % b[8][1], 'SEL', 'SE', 'S'] if b[8][1] == 1: s = ['Command', 'Comd', 'COM', 'CO', 'C'] else: s = ['Arc Power Level', 'Arc Pwr', 'ARC', 'AC', 'A'] self.putb(8, 8, [1, s]) # f &= 254 # Clear the select bit. if f >= 254: # BROADCAST s = ['BROADCAST', 'Brdcast', 'BC', 'B', 'B'] self.putb(1, 7, [5, s]) elif f >= 160: # Extended command 0b10100000 if f == 0xC1: # DALI_ENABLE_DEVICE_TYPE_X self.devType = -1 x = extendedCommands.get(f, ['Unknown', 'Unk']) s = ['Extended Command: %02X (%s)' % (f, x[0]), 'XC: %02X (%s)' % (f, x[1]), 'XC: %02X' % f, 'X: %02X' % f, 'X'] self.putb(1, 8, [5, s]) elif f >= 128: # Group # Bits[1:1]: Ybit s = ['YBit: %d' % b[1][1], 'YB: %d' % b[1][1], 'YB', 'Y', 'Y'] self.putb(1, 1, [3, s]) g = (f & 127) >> 1 s = ['Group address: %d' % g, 'Group: %d' % g, 'GP: %d' % g, 'G: %d' % g, 'G'] self.putb(2,7, [4, s]) else: # Short address # Bits[1:1]: Ybit s = ['YBit: %d' % b[1][1], 'YB: %d' % b[1][1], 'YB', 'Y', 'Y'] self.putb(1, 1, [3, s]) a = f >> 1 # x = system.get(a, ['Unknown', 'Unk']) s = ['Short address: %d' % a, 'Addr: %d' % a, 'Addr: %d' % a, 'A: %d' % a, 'A'] self.putb(2, 7, [4, s]) # Bits[9:16]: Command/data (MSB-first) if f >= 160 and f < 254: if self.devType == -1: self.devType = c s = ['Type: %d' % c, 'Typ: %d' % c, 'Typ: %d' % c, 'T: %d' % c, 'D'] else: self.devType = None s = ['Data: %d' % c, 'Dat: %d' % c, 'Dat: %d' % c, 'D: %d' % c, 'D'] elif b[8][1] == 1: un = c & 0xF0 ln = c & 0x0F if un == 0x10: # Set scene command x = ['Recall Scene %d' % ln, 'SC %d' % ln] elif un == 0x40: x = ['Store DTR as Scene %d' % ln, 'SC %d = DTR' % ln] elif un == 0x50: x = ['Delete Scene %d' % ln, 'DEL SC %d' % ln] elif un == 0x60: x = ['Add to Group %d' % ln, 'Grp %d Add' % ln] elif un == 0x70: x = ['Remove from Group %d' % ln, 'Grp %d Del' % ln] elif un == 0xB0: x = ['Query Scene %d Level' % ln, 'Sc %d Level' % ln] elif c >= 224: # Application specific commands if self.devType == 8: x = DALIDeviceType8.get(c, ['Unknown App', 'Unk']) else: x = ['Application Specific Command %d' % c, 'App Cmd %d' % c] else: x = DALICommands.get(c, ['Unknown', 'Unk']) s = ['Command: %d (%s)' % (c, x[0]), 'Com: %d (%s)' % (c, x[1]), 'Com: %d' % c, 'C: %d' % c, 'C'] else: s = ['Arc Power Level: %d' % c, 'Level: %d' % c, 'Lev: %d' % c, 'L: %d' % c, 'L'] self.putb(9, 16, [5, s]) def reset_decoder_state(self): self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' # self.devType = None def decode(self, ss, es, data): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') bit = 0; for (self.samplenum, pins) in data: self.dali = pins[0] # data.itercnt += 1 # data.logic_mask = 1 # data.cur_pos = self.samplenum # data.edge_index = -1 if self.options['polarity'] == 'active-high': self.dali ^= 1 # Invert. # State machine. if self.state == 'IDLE': # Wait for any edge (rising or falling). if self.old_dali == self.dali: # data.exp_logic = self.exp_logic # data.logic_mask = 1 # logic.cur_pos = self.samplenum continue self.edges.append(self.samplenum) self.state = 'PHASE0' self.old_dali = self.dali # Get the next sample point. # self.nextSamplePoint = self.samplenum + int(self.halfbit / 2) self.old_dali = self.dali # bit = self.dali # data.itercnt += int((self.halfbit - 1) * 0.5) continue # if(self.samplenum == self.nextSamplePoint): # bit = self.dali # continue if (self.old_dali != self.dali): self.edges.append(self.samplenum) elif (self.samplenum == (self.edges[-1] + int(self.halfbit * 1.5))): self.edges.append(self.samplenum - int(self.halfbit * 0.5)) else: continue bit = self.old_dali if self.state == 'PHASE0': self.phase0 = bit self.state = 'PHASE1' elif self.state == 'PHASE1': if (bit == 1) and (self.phase0 == 1): # Stop bit if len(self.bits) == 17 or len(self.bits) == 9: # Forward or Backward self.handle_bits(len(self.bits)) self.reset_decoder_state() # Reset upon errors. continue else: self.bits.append([self.edges[-3], bit]) self.state = 'PHASE0' # self.nextSamplePoint = self.edges[-1] + int(self.halfbit / 2) self.old_dali = self.dali libsigrokdecode-0.5.0/decoders/dali/__init__.py0000644000175000017500000000154613117367246016420 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Jeremy Swanson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## ''' DALI is a biphase/manchester based lighting control protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/dali/lists.py0000644000175000017500000000732213117367246016015 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Jeremy Swanson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## # DALI Extended commands extendedCommands = { 0xA1: ['Terminate special processes', 'Terminate'], 0xA3: ['DTR = DATA', 'DTR'], 0xA5: ['INITIALISE', 'INIT'], 0xA7: ['RANDOMISE', 'RAND'], 0xA9: ['COMPARE', 'COMP'], 0xAB: ['WITHDRAW', 'WDRAW'], 0xB1: ['SET SEARCH H', 'SAH'], 0xB3: ['SET SEARCH M', 'SAM'], 0xB5: ['SET SEARCH L', 'SAL'], 0xB7: ['Program Short Address', 'ProgSA'], 0xB9: ['Verify Short Address', 'VfySA'], 0xBB: ['Query Short Address', 'QryShort'], 0xBD: ['Physical Selection', 'PysSel'], 0xC1: ['Enable Device Type X', 'EnTyp'], 0xC3: ['DTR1 = DATA', 'DTR1'], 0xC5: ['DTR2 = DATA', 'DTR2'], 0xC7: ['Write Memory Location', 'WRI'], } # List of commands DALICommands = { 0x00: ['Immediate Off', 'IOFF'], 0x01: ['Up 200ms', 'Up'], 0x02: ['Down 200ms', 'Down'], 0x03: ['Step Up', 'Step+'], 0x04: ['Step Down', 'Step-'], 0x05: ['Recall Maximum Level', 'Recall Max'], 0x06: ['Recall Minimum Level', 'Recall Min'], 0x07: ['Step down and off', 'Down Off'], 0x08: ['Step ON and UP', 'On Up'], 0x20: ['Reset', 'Rst'], 0x21: ['Store Dim Level in DTR', 'Level -> DTR'], 0x2A: ['Store DTR as Max Level', 'DTR->Max'], 0x2B: ['Store DTR as Min Level', 'DTR->Min'], 0x2C: ['Store DTR as Fail Level', 'DTR->Fail'], 0x2D: ['Store DTR as Power On Level', 'DTR->Poweron'], 0x2E: ['Store DTR as Fade Time', 'DTR->Fade'], 0x2F: ['Store DTR as Fade Rate', 'DTR->Rate'], 0x80: ['Store DTR as Short Address', 'DTR->Add'], 0x81: ['Enable Memory Write', 'WEn'], 0x90: ['Query Status', 'Status'], 0x91: ['Query Ballast', 'Ballast'], 0x92: ['Query Lamp Failure', 'LmpFail'], 0x93: ['Query Power On', 'Power On'], 0x94: ['Query Limit Error', 'Limit Err'], 0x95: ['Query Reset', 'Reset State'], 0x96: ['Query Missing Short Address', 'NoSrt'], 0x97: ['Query Version', 'Ver'], 0x98: ['Query DTR', 'GetDTR'], 0x99: ['Query Device Type', 'Type'], 0x9A: ['Query Physical Minimum', 'PhysMin'], 0x9B: ['Query Power Fail', 'PowerFailed'], 0x9C: ['Query DTR1', 'GetDTR1'], 0x9D: ['Query DTR2', 'GetDTR2'], 0xA0: ['Query Level', 'GetLevel'], 0xA1: ['Query Max Level', 'GetMax'], 0xA2: ['Query Min Level', 'GetMin'], 0xA3: ['Query Power On', 'GetPwrOn'], 0xA4: ['Query Fail Level', 'GetFail'], 0xA5: ['Query Fade Rate', 'GetRate'], 0xA6: ['Query Power Fail', 'PwrFail'], 0xC0: ['Query Groups 0-7', 'GetGrpsL'], 0xC1: ['Query Groups 7-15', 'GetGrpsH'], 0xC2: ['Query BRNH', 'BRNH'], 0xC3: ['Query BRNM', 'BRNM'], 0xC4: ['Query BRNL', 'BRNL'], 0xC5: ['Query Memory', 'GetMem'], } # DALI device type 8 DALIDeviceType8 = { 0xE0: ['Set Temp X-Y Coordinate', 'Set X-Y'], 0xE2: ['Activate Colour Set point', 'Activate SetPoint'], 0xE7: ['Set Colour Temperature Tc', 'DTRs->ColTemp'], 0xF9: ['Query Features', 'QryFeats'], 0xFA: ['Query Current Setpoint Colour', 'GetSetPoint'], } libsigrokdecode-0.5.0/decoders/arm_itm/0000755000175000017500000000000013117367246015100 500000000000000libsigrokdecode-0.5.0/decoders/arm_itm/pd.py0000644000175000017500000003114413117367246016000 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import string import subprocess import re ARM_EXCEPTIONS = { 0: 'Thread', 1: 'Reset', 2: 'NMI', 3: 'HardFault', 4: 'MemManage', 5: 'BusFault', 6: 'UsageFault', 11: 'SVCall', 12: 'Debug Monitor', 14: 'PendSV', 15: 'SysTick', } class Decoder(srd.Decoder): api_version = 2 id = 'arm_itm' name = 'ARM ITM' longname = 'ARM Instrumentation Trace Macroblock' desc = 'Trace data from Cortex-M / ARMv7m ITM module.' license = 'gplv2+' inputs = ['uart'] outputs = ['arm_itm'] options = ( {'id': 'objdump', 'desc': 'objdump path', 'default': 'arm-none-eabi-objdump'}, {'id': 'objdump_opts', 'desc': 'objdump options', 'default': '-lSC'}, {'id': 'elffile', 'desc': '.elf path', 'default': ''}, ) annotations = ( ('trace', 'Trace information'), ('timestamp', 'Timestamp'), ('software', 'Software message'), ('dwt_event', 'DWT event'), ('dwt_watchpoint', 'DWT watchpoint'), ('dwt_exc', 'Exception trace'), ('dwt_pc', 'Program counter'), ('mode_thread', 'Current mode: thread'), ('mode_irq', 'Current mode: IRQ'), ('mode_exc', 'Current mode: Exception'), ('location', 'Current location'), ('function', 'Current function'), ) annotation_rows = ( ('trace', 'Trace information', (0, 1)), ('software', 'Software trace', (2,)), ('dwt_event', 'DWT event', (3,)), ('dwt_watchpoint', 'DWT watchpoint', (4,)), ('dwt_exc', 'Exception trace', (5,)), ('dwt_pc', 'Program counter', (6,)), ('mode', 'Current mode', (7, 8, 9)), ('location', 'Current location', (10,)), ('function', 'Current function', (11,)), ) def __init__(self): self.buf = [] self.syncbuf = [] self.swpackets = {} self.prevsample = 0 self.dwt_timestamp = 0 self.current_mode = None self.file_lookup = {} self.func_lookup = {} def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.load_objdump() def load_objdump(self): '''Parse disassembly obtained from objdump into a lookup tables''' if not (self.options['objdump'] and self.options['elffile']): return opts = [self.options['objdump']] opts += self.options['objdump_opts'].split() opts += [self.options['elffile']] try: disasm = subprocess.check_output(opts) except subprocess.CalledProcessError: return disasm = disasm.decode('utf-8', 'replace') instpat = re.compile('\s*([0-9a-fA-F]+):\t+([0-9a-fA-F ]+)\t+([a-zA-Z][^;]+)\s*;?.*') filepat = re.compile('[^\s]+[/\\\\]([a-zA-Z0-9._-]+:[0-9]+)(?:\s.*)?') funcpat = re.compile('[0-9a-fA-F]+\s*<([^>]+)>:.*') prev_file = '' prev_func = '' for line in disasm.split('\n'): m = instpat.match(line) if m: addr = int(m.group(1), 16) self.file_lookup[addr] = prev_file self.func_lookup[addr] = prev_func else: m = funcpat.match(line) if m: prev_func = m.group(1) else: m = filepat.match(line) if m: prev_file = m.group(1) def get_packet_type(self, byte): '''Identify packet type based on its first byte. See ARMv7-M_ARM.pdf section "Debug ITM and DWT" "Packet Types" ''' if byte & 0x7F == 0: return 'sync' elif byte == 0x70: return 'overflow' elif byte & 0x0F == 0 and byte & 0xF0 != 0: return 'timestamp' elif byte & 0x0F == 0x08: return 'sw_extension' elif byte & 0x0F == 0x0C: return 'hw_extension' elif byte & 0x0F == 0x04: return 'reserved' elif byte & 0x04 == 0x00: return 'software' else: return 'hardware' def mode_change(self, new_mode): if self.current_mode is not None: start, mode = self.current_mode if mode.startswith('Thread'): ann_idx = 7 elif mode.startswith('IRQ'): ann_idx = 8 else: ann_idx = 9 self.put(start, self.startsample, self.out_ann, [ann_idx, [mode]]) if new_mode is None: self.current_mode = None else: self.current_mode = (self.startsample, new_mode) def location_change(self, pc): new_loc = self.file_lookup.get(pc) new_func = self.func_lookup.get(pc) ss = self.startsample es = self.prevsample if new_loc is not None: self.put(ss, es, self.out_ann, [10, [new_loc]]) if new_func is not None: self.put(ss, es, self.out_ann, [11, [new_func]]) def fallback(self, buf): ptype = self.get_packet_type(buf[0]) return [0, [('Unhandled %s: ' % ptype) + ' '.join(['%02x' % b for b in buf])]] def handle_overflow(self, buf): return [0, ['Overflow']] def handle_hardware(self, buf): '''Handle packets from hardware source, i.e. DWT block.''' plen = (0, 1, 2, 4)[buf[0] & 0x03] pid = buf[0] >> 3 if len(buf) != plen + 1: return None # Not complete yet. if pid == 0: text = 'DWT events:' if buf[1] & 0x20: text += ' Cyc' if buf[1] & 0x10: text += ' Fold' if buf[1] & 0x08: text += ' LSU' if buf[1] & 0x04: text += ' Sleep' if buf[1] & 0x02: text += ' Exc' if buf[1] & 0x01: text += ' CPI' return [3, [text]] elif pid == 1: excnum = ((buf[2] & 1) << 8) | buf[1] event = (buf[2] >> 4) excstr = ARM_EXCEPTIONS.get(excnum, 'IRQ %d' % (excnum - 16)) if event == 1: self.mode_change(excstr) return [5, ['Enter: ' + excstr, 'E ' + excstr]] elif event == 2: self.mode_change(None) return [5, ['Exit: ' + excstr, 'X ' + excstr]] elif event == 3: self.mode_change(excstr) return [5, ['Resume: ' + excstr, 'R ' + excstr]] elif pid == 2: pc = buf[1] | (buf[2] << 8) | (buf[3] << 16) | (buf[4] << 24) self.location_change(pc) return [6, ['PC: 0x%08x' % pc]] elif (buf[0] & 0xC4) == 0x84: comp = (buf[0] & 0x30) >> 4 what = 'Read' if (buf[0] & 0x08) == 0 else 'Write' if plen == 1: data = '0x%02x' % (buf[1]) elif plen == 2: data = '0x%04x' % (buf[1] | (buf[2] << 8)) else: data = '0x%08x' % (buf[1] | (buf[2] << 8) | (buf[3] << 16) | (buf[4] << 24)) return [4, ['Watchpoint %d: %s data %s' % (comp, what, data), 'WP%d: %s %s' % (comp, what[0], data)]] elif (buf[0] & 0xCF) == 0x47: comp = (buf[0] & 0x30) >> 4 addr = buf[1] | (buf[2] << 8) | (buf[3] << 16) | (buf[4] << 24) self.location_change(addr) return [4, ['Watchpoint %d: PC 0x%08x' % (comp, addr), 'WP%d: PC 0x%08x' % (comp, addr)]] elif (buf[0] & 0xCF) == 0x4E: comp = (buf[0] & 0x30) >> 4 offset = buf[1] | (buf[2] << 8) return [4, ['Watchpoint %d: address 0x????%04x' % (comp, offset), 'WP%d: A 0x%04x' % (comp, offset)]] return self.fallback(buf) def handle_software(self, buf): '''Handle packets generated by software running on the CPU.''' plen = (0, 1, 2, 4)[buf[0] & 0x03] pid = buf[0] >> 3 if len(buf) != plen + 1: return None # Not complete yet. if plen == 1 and chr(buf[1]) in string.printable: self.add_delayed_sw(pid, chr(buf[1])) return [] # Handled but no data to output. self.push_delayed_sw() if plen == 1: return [2, ['%d: 0x%02x' % (pid, buf[1])]] elif plen == 2: return [2, ['%d: 0x%02x%02x' % (pid, buf[2], buf[1])]] elif plen == 4: return [2, ['%d: 0x%02x%02x%02x%02x' % (pid, buf[4], buf[3], buf[2], buf[1])]] def handle_timestamp(self, buf): '''Handle timestamp packets, which indicate the time of some DWT event packet.''' if buf[-1] & 0x80 != 0: return None # Not complete yet. if buf[0] & 0x80 == 0: tc = 0 ts = buf[0] >> 4 else: tc = (buf[0] & 0x30) >> 4 ts = buf[1] & 0x7F if len(buf) > 2: ts |= (buf[2] & 0x7F) << 7 if len(buf) > 3: ts |= (buf[3] & 0x7F) << 14 if len(buf) > 4: ts |= (buf[4] & 0x7F) << 21 self.dwt_timestamp += ts if tc == 0: msg = '(exact)' elif tc == 1: msg = '(timestamp delayed)' elif tc == 2: msg = '(event delayed)' elif tc == 3: msg = '(event and timestamp delayed)' return [1, ['Timestamp: %d %s' % (self.dwt_timestamp, msg)]] def add_delayed_sw(self, pid, c): '''We join printable characters from software source so that printed strings are easy to read. Joining is done by PID so that different sources do not get confused with each other.''' if self.swpackets.get(pid) is not None: self.swpackets[pid][1] = self.prevsample self.swpackets[pid][2] += c else: self.swpackets[pid] = [self.startsample, self.prevsample, c] def push_delayed_sw(self): for pid, packet in self.swpackets.items(): if packet is None: continue ss, prevtime, text = packet # Heuristic criterion: Text has ended if at least 16 byte # durations after previous received byte. Actual delay depends # on printf implementation on target. if self.prevsample - prevtime > 16 * self.byte_len: self.put(ss, prevtime, self.out_ann, [2, ['%d: "%s"' % (pid, text)]]) self.swpackets[pid] = None def decode(self, ss, es, data): ptype, rxtx, pdata = data # For now, ignore all UART packets except the actual data packets. if ptype != 'DATA': return self.byte_len = es - ss # Reset packet if there is a long pause between bytes. # TPIU framing can introduce small pauses, but more than 1 frame # should reset packet. if ss - self.prevsample > 16 * self.byte_len: self.push_delayed_sw() self.buf = [] self.prevsample = es # Build up the current packet byte by byte. self.buf.append(pdata[0]) # Store the start time of the packet. if len(self.buf) == 1: self.startsample = ss # Keep separate buffer for detection of sync packets. # Sync packets override everything else, so that we can regain sync # even if some packets are corrupted. self.syncbuf = self.syncbuf[-5:] + [pdata[0]] if self.syncbuf == [0, 0, 0, 0, 0, 0x80]: self.buf = self.syncbuf # See if it is ready to be decoded. ptype = self.get_packet_type(self.buf[0]) if hasattr(self, 'handle_' + ptype): func = getattr(self, 'handle_' + ptype) data = func(self.buf) else: data = self.fallback(self.buf) if data is not None: if data: self.put(self.startsample, es, self.out_ann, data) self.buf = [] libsigrokdecode-0.5.0/decoders/arm_itm/__init__.py0000644000175000017500000000167413117367246017141 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'uart' or 'arm_tpiu' PD and decodes the ARM Cortex-M processor trace data from Instrumentation Trace Macroblock. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/stepper_motor/0000755000175000017500000000000013117367246016352 500000000000000libsigrokdecode-0.5.0/decoders/stepper_motor/pd.py0000644000175000017500000000612313117367246017251 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'stepper_motor' name = 'Stepper motor' longname = 'Stepper motor position / speed' desc = 'Absolute position and movement speed from step/dir.' license = 'gplv2+' inputs = ['logic'] outputs = ['stepper_motor'] channels = ( {'id': 'step', 'name': 'Step', 'desc': 'Step pulse'}, {'id': 'dir', 'name': 'Direction', 'desc': 'Direction select'}, ) options = ( {'id': 'unit', 'desc': 'Unit', 'default': 'steps', 'values': ('steps', 'mm')}, {'id': 'steps_per_mm', 'desc': 'Steps per mm', 'default': 100.0}, ) annotations = ( ('speed', 'Speed'), ('position', 'Position') ) annotation_rows = ( ('speed', 'Speed', (0,)), ('position', 'Position', (1,)), ) def __init__(self): self.oldstep = None self.ss_prev_step = None self.pos = 0 self.prev_speed = None self.prev_pos = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) if self.options['unit'] == 'steps': self.scale = 1 self.format = '%0.0f' self.unit = 'steps' else: self.scale = self.options['steps_per_mm'] self.format = '%0.2f' self.unit = 'mm' def step(self, ss, direction): if self.ss_prev_step is not None: delta = ss - self.ss_prev_step speed = self.samplerate / delta / self.scale speed_txt = self.format % speed pos_txt = self.format % (self.pos / self.scale) self.put(self.ss_prev_step, ss, self.out_ann, [0, [speed_txt + ' ' + self.unit + '/s', speed_txt]]) self.put(self.ss_prev_step, ss, self.out_ann, [1, [pos_txt + ' ' + self.unit, pos_txt]]) self.pos += (1 if direction else -1) self.ss_prev_step = ss def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: step, direction = self.wait({0: 'r'}) self.step(self.samplenum, direction) libsigrokdecode-0.5.0/decoders/stepper_motor/__init__.py0000644000175000017500000000166013117367246020406 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This PD decodes the stepper motor controller signals (step / dir) and shows the step speed and absolute position of the stepper motor. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/aud/0000755000175000017500000000000013117367246014221 500000000000000libsigrokdecode-0.5.0/decoders/aud/pd.py0000644000175000017500000000672213117367246015125 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 fenugrec ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # TODO: # - Annotations are very crude and could be improved. # - Annotate every nibble? Would give insight on interrupted shifts. # - Annotate invalid "command" nibbles while SYNC==1? import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 3 id = 'aud' name = 'AUD' longname = 'Advanced User Debugger' desc = 'Renesas/Hitachi Advanced User Debugger (AUD) protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['aud'] channels = ( {'id': 'audck', 'name': 'AUDCK', 'desc': 'AUD clock'}, {'id': 'naudsync', 'name': 'nAUDSYNC', 'desc': 'AUD sync'}, {'id': 'audata3', 'name': 'AUDATA3', 'desc': 'AUD data line 3'}, {'id': 'audata2', 'name': 'AUDATA2', 'desc': 'AUD data line 2'}, {'id': 'audata1', 'name': 'AUDATA1', 'desc': 'AUD data line 1'}, {'id': 'audata0', 'name': 'AUDATA0', 'desc': 'AUD data line 0'}, ) annotations = ( ('dest', 'Destination address'), ) def __init__(self): self.ncnt = 0 self.nmax = 0 self.addr = 0 self.lastaddr = 0 self.ss = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.samplenum, self.out_ann, data) def handle_clk_edge(self, clk, sync, datapins): # Reconstruct nibble. nib = 0 for i in range(4): nib |= datapins[3-i] << i # sync == 1: annotate if finished; update cmd. # TODO: Annotate idle level (nibble = 0x03 && SYNC=1). if sync == 1: if (self.ncnt == self.nmax) and (self.nmax != 0): # Done shifting an address: annotate. self.putx([0, ['0x%08X' % self.addr]]) self.lastaddr = self.addr self.ncnt = 0 self.addr = self.lastaddr self.ss = self.samplenum if nib == 0x08: self.nmax = 1 elif nib == 0x09: self.nmax = 2 elif nib == 0x0a: self.nmax = 4 elif nib == 0x0b: self.nmax = 8 else: # Undefined or idle. self.nmax = 0 else: # sync == 0, valid cmd: start or continue shifting in nibbles. if (self.nmax > 0): # Clear tgt nibble. self.addr &= ~(0x0F << (self.ncnt * 4)) # Set nibble. self.addr |= nib << (self.ncnt * 4) self.ncnt += 1 def decode(self): while True: pins = self.wait({0: 'r'}) clk = pins[0] sync = pins[1] d = pins[2:] self.handle_clk_edge(clk, sync, d) libsigrokdecode-0.5.0/decoders/aud/__init__.py0000644000175000017500000000220713117367246016253 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 fenugrec ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder decodes the AUD (Advanced User Debugger) interface of certain Renesas / Hitachi microcontrollers, when set in Branch Trace mode. AUD has two modes, this PD currently only supports "Branch Trace" mode. Details: http://www.renesas.eu/products/mpumcu/superh/sh7050/sh7058/Documentation.jsp ("rej09b0046 - SH7058 Hardware manual") ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/spiflash/0000755000175000017500000000000013117367246015261 500000000000000libsigrokdecode-0.5.0/decoders/spiflash/pd.py0000644000175000017500000004521213117367246016162 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2011-2016 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .lists import * L = len(cmds) # Don't forget to keep this in sync with 'cmds' is lists.py. class Ann: WRSR, PP, READ, WRDI, RDSR, WREN, FAST_READ, SE, RDSCUR, WRSCUR, \ RDSR2, CE, ESRY, DSRY, REMS, RDID, RDP_RES, CP, ENSO, DP, READ2X, \ EXSO, CE2, BE, REMS2, \ BIT, FIELD, WARN = range(L + 3) def cmd_annotation_classes(): return tuple([tuple([cmd[0].lower(), cmd[1]]) for cmd in cmds.values()]) def decode_dual_bytes(sio0, sio1): # Given a byte in SIO0 (MOSI) of even bits and a byte in # SIO1 (MISO) of odd bits, return a tuple of two bytes. def combine_byte(even, odd): result = 0 for bit in range(4): if even & (1 << bit): result |= 1 << (bit*2) if odd & (1 << bit): result |= 1 << ((bit*2) + 1) return result return (combine_byte(sio0 >> 4, sio1 >> 4), combine_byte(sio0, sio1)) def decode_status_reg(data): # TODO: Additional per-bit(s) self.put() calls with correct start/end. # Bits[0:0]: WIP (write in progress) s = 'W' if (data & (1 << 0)) else 'No w' ret = '%srite operation in progress.\n' % s # Bits[1:1]: WEL (write enable latch) s = '' if (data & (1 << 1)) else 'not ' ret += 'Internal write enable latch is %sset.\n' % s # Bits[5:2]: Block protect bits # TODO: More detailed decoding (chip-dependent). ret += 'Block protection bits (BP3-BP0): 0x%x.\n' % ((data & 0x3c) >> 2) # Bits[6:6]: Continuously program mode (CP mode) s = '' if (data & (1 << 6)) else 'not ' ret += 'Device is %sin continuously program mode (CP mode).\n' % s # Bits[7:7]: SRWD (status register write disable) s = 'not ' if (data & (1 << 7)) else '' ret += 'Status register writes are %sallowed.\n' % s return ret class Decoder(srd.Decoder): api_version = 2 id = 'spiflash' name = 'SPI flash' longname = 'SPI flash chips' desc = 'xx25 series SPI (NOR) flash chip protocol.' license = 'gplv2+' inputs = ['spi'] outputs = ['spiflash'] annotations = cmd_annotation_classes() + ( ('bit', 'Bit'), ('field', 'Field'), ('warning', 'Warning'), ) annotation_rows = ( ('bits', 'Bits', (L + 0,)), ('fields', 'Fields', (L + 1,)), ('commands', 'Commands', tuple(range(len(cmds)))), ('warnings', 'Warnings', (L + 2,)), ) options = ( {'id': 'chip', 'desc': 'Chip', 'default': tuple(chips.keys())[0], 'values': tuple(chips.keys())}, {'id': 'format', 'desc': 'Data format', 'default': 'hex', 'values': ('hex', 'ascii')}, ) def __init__(self): self.device_id = -1 self.on_end_transaction = None self.end_current_transaction() # Build dict mapping command keys to handler functions. Each # command in 'cmds' (defined in lists.py) has a matching # handler self.handle_. def get_handler(cmd): s = 'handle_%s' % cmds[cmd][0].lower().replace('/', '_') return getattr(self, s) self.cmd_handlers = dict((cmd, get_handler(cmd)) for cmd in cmds.keys()) def end_current_transaction(self): if self.on_end_transaction is not None: # Callback for CS# transition. self.on_end_transaction() self.on_end_transaction = None self.state = None self.cmdstate = 1 self.addr = 0 self.data = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.chip = chips[self.options['chip']] self.vendor = self.options['chip'].split('_')[0] def putx(self, data): # Simplification, most annotations span exactly one SPI byte/packet. self.put(self.ss, self.es, self.out_ann, data) def putf(self, data): self.put(self.ss_field, self.es_field, self.out_ann, data) def putc(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def device(self): return device_name[self.vendor].get(self.device_id, 'Unknown') def vendor_device(self): return '%s %s' % (self.chip['vendor'], self.device()) def cmd_ann_list(self): x, s = cmds[self.state][0], cmds[self.state][1] return ['Command: %s (%s)' % (s, x), 'Command: %s' % s, 'Cmd: %s' % s, 'Cmd: %s' % x, x] def cmd_vendor_dev_list(self): c, d = cmds[self.state], 'Device = %s' % self.vendor_device() return ['%s (%s): %s' % (c[1], c[0], d), '%s: %s' % (c[1], d), '%s: %s' % (c[0], d), d, self.vendor_device()] def emit_cmd_byte(self): self.ss_cmd = self.ss self.putx([Ann.FIELD, self.cmd_ann_list()]) self.addr = 0 def emit_addr_bytes(self, mosi): self.addr |= (mosi << ((4 - self.cmdstate) * 8)) b = ((3 - (self.cmdstate - 2)) * 8) - 1 self.putx([Ann.BIT, ['Address bits %d..%d: 0x%02x' % (b, b - 7, mosi), 'Addr bits %d..%d: 0x%02x' % (b, b - 7, mosi), 'Addr bits %d..%d' % (b, b - 7), 'A%d..A%d' % (b, b - 7)]]) if self.cmdstate == 2: self.ss_field = self.ss if self.cmdstate == 4: self.es_field = self.es self.putf([Ann.FIELD, ['Address: 0x%06x' % self.addr, 'Addr: 0x%06x' % self.addr, '0x%06x' % self.addr]]) def handle_wren(self, mosi, miso): self.putx([Ann.WREN, self.cmd_ann_list()]) self.state = None def handle_wrdi(self, mosi, miso): pass # TODO def handle_rdid(self, mosi, miso): if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate == 2: # Byte 2: Slave sends the JEDEC manufacturer ID. self.putx([Ann.FIELD, ['Manufacturer ID: 0x%02x' % miso]]) elif self.cmdstate == 3: # Byte 3: Slave sends the memory type. self.putx([Ann.FIELD, ['Memory type: 0x%02x' % miso]]) elif self.cmdstate == 4: # Byte 4: Slave sends the device ID. self.device_id = miso self.putx([Ann.FIELD, ['Device ID: 0x%02x' % miso]]) if self.cmdstate == 4: self.es_cmd = self.es self.putc([Ann.RDID, self.cmd_vendor_dev_list()]) self.state = None else: self.cmdstate += 1 def handle_rdsr(self, mosi, miso): # Read status register: Master asserts CS#, sends RDSR command, # reads status register byte. If CS# is kept asserted, the status # register can be read continuously / multiple times in a row. # When done, the master de-asserts CS# again. if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate >= 2: # Bytes 2-x: Slave sends status register as long as master clocks. self.es_cmd = self.es self.putx([Ann.BIT, [decode_status_reg(miso)]]) self.putx([Ann.FIELD, ['Status register']]) self.putc([Ann.RDSR, self.cmd_ann_list()]) self.cmdstate += 1 def handle_rdsr2(self, mosi, miso): # Read status register 2: Master asserts CS#, sends RDSR2 command, # reads status register 2 byte. If CS# is kept asserted, the status # register 2 can be read continuously / multiple times in a row. # When done, the master de-asserts CS# again. if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate >= 2: # Bytes 2-x: Slave sends status register 2 as long as master clocks. self.es_cmd = self.es # TODO: Decode status register 2 correctly. self.putx([Ann.BIT, [decode_status_reg(miso)]]) self.putx([Ann.FIELD, ['Status register 2']]) self.putc([Ann.RDSR2, self.cmd_ann_list()]) self.cmdstate += 1 def handle_wrsr(self, mosi, miso): # Write status register: Master asserts CS#, sends WRSR command, # writes 1 or 2 status register byte(s). # When done, the master de-asserts CS# again. If this doesn't happen # the WRSR command will not be executed. if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate == 2: # Byte 2: Master sends status register 1. self.putx([Ann.BIT, [decode_status_reg(miso)]]) self.putx([Ann.FIELD, ['Status register 1']]) elif self.cmdstate == 3: # Byte 3: Master sends status register 2. # TODO: Decode status register 2 correctly. self.putx([Ann.BIT, [decode_status_reg(miso)]]) self.putx([Ann.FIELD, ['Status register 2']]) self.es_cmd = self.es self.putc([Ann.WRSR, self.cmd_ann_list()]) self.cmdstate += 1 def handle_read(self, mosi, miso): # Read data bytes: Master asserts CS#, sends READ command, sends # 3-byte address, reads >= 1 data bytes, de-asserts CS#. if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate in (2, 3, 4): # Bytes 2/3/4: Master sends read address (24bits, MSB-first). self.emit_addr_bytes(mosi) elif self.cmdstate >= 5: # Bytes 5-x: Master reads data bytes (until CS# de-asserted). self.es_field = self.es # Will be overwritten for each byte. if self.cmdstate == 5: self.ss_field = self.ss self.on_end_transaction = lambda: self.output_data_block('Data', Ann.READ) self.data.append(miso) self.cmdstate += 1 def handle_fast_read(self, mosi, miso): # Fast read: Master asserts CS#, sends FAST READ command, sends # 3-byte address + 1 dummy byte, reads >= 1 data bytes, de-asserts CS#. if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate in (2, 3, 4): # Bytes 2/3/4: Master sends read address (24bits, MSB-first). self.emit_addr_bytes(mosi) elif self.cmdstate == 5: self.putx([Ann.BIT, ['Dummy byte: 0x%02x' % mosi]]) elif self.cmdstate >= 6: # Bytes 6-x: Master reads data bytes (until CS# de-asserted). self.es_field = self.es # Will be overwritten for each byte. if self.cmdstate == 6: self.ss_field = self.ss self.on_end_transaction = lambda: self.output_data_block('Data', Ann.FAST_READ) self.data.append(miso) self.cmdstate += 1 def handle_2read(self, mosi, miso): # 2x I/O read (fast read dual I/O): Master asserts CS#, sends 2READ # command, sends 3-byte address + 1 dummy byte, reads >= 1 data bytes, # de-asserts CS#. All data after the command is sent via two I/O pins. # MOSI = SIO0 = even bits, MISO = SIO1 = odd bits. if self.cmdstate != 1: b1, b2 = decode_dual_bytes(mosi, miso) if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate == 2: # Bytes 2/3(/4): Master sends read address (24bits, MSB-first). # Handle bytes 2 and 3 here. self.emit_addr_bytes(b1) self.cmdstate = 3 self.emit_addr_bytes(b2) elif self.cmdstate == 4: # Byte 5: Dummy byte. Also handle byte 4 (address LSB) here. self.emit_addr_bytes(b1) self.cmdstate = 5 self.putx([Ann.BIT, ['Dummy byte: 0x%02x' % b2]]) elif self.cmdstate >= 6: # Bytes 6-x: Master reads data bytes (until CS# de-asserted). self.es_field = self.es # Will be overwritten for each byte. if self.cmdstate == 6: self.ss_field = self.ss self.on_end_transaction = lambda: self.output_data_block('Data', Ann.READ2X) self.data.append(b1) self.data.append(b2) self.cmdstate += 1 # TODO: Warn/abort if we don't see the necessary amount of bytes. # TODO: Warn if WREN was not seen before. def handle_se(self, mosi, miso): if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate in (2, 3, 4): # Bytes 2/3/4: Master sends sector address (24bits, MSB-first). self.emit_addr_bytes(mosi) if self.cmdstate == 4: self.es_cmd = self.es d = 'Erase sector %d (0x%06x)' % (self.addr, self.addr) self.putc([Ann.SE, [d]]) # TODO: Max. size depends on chip, check that too if possible. if self.addr % 4096 != 0: # Sector addresses must be 4K-aligned (same for all 3 chips). self.putc([Ann.WARN, ['Warning: Invalid sector address!']]) self.state = None else: self.cmdstate += 1 def handle_be(self, mosi, miso): pass # TODO def handle_ce(self, mosi, miso): pass # TODO def handle_ce2(self, mosi, miso): pass # TODO def handle_pp(self, mosi, miso): # Page program: Master asserts CS#, sends PP command, sends 3-byte # page address, sends >= 1 data bytes, de-asserts CS#. if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate in (2, 3, 4): # Bytes 2/3/4: Master sends page address (24bits, MSB-first). self.emit_addr_bytes(mosi) elif self.cmdstate >= 5: # Bytes 5-x: Master sends data bytes (until CS# de-asserted). self.es_field = self.es # Will be overwritten for each byte. if self.cmdstate == 5: self.ss_field = self.ss self.on_end_transaction = lambda: self.output_data_block('Data', Ann.PP) self.data.append(mosi) self.cmdstate += 1 def handle_cp(self, mosi, miso): pass # TODO def handle_dp(self, mosi, miso): pass # TODO def handle_rdp_res(self, mosi, miso): if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate in (2, 3, 4): # Bytes 2/3/4: Master sends three dummy bytes. self.putx([Ann.FIELD, ['Dummy byte: %02x' % mosi]]) elif self.cmdstate == 5: # Byte 5: Slave sends device ID. self.es_cmd = self.es self.device_id = miso self.putx([Ann.FIELD, ['Device ID: %s' % self.device()]]) d = 'Device = %s' % self.vendor_device() self.putc([Ann.RDP_RES, self.cmd_vendor_dev_list()]) self.state = None self.cmdstate += 1 def handle_rems(self, mosi, miso): if self.cmdstate == 1: # Byte 1: Master sends command ID. self.emit_cmd_byte() elif self.cmdstate in (2, 3): # Bytes 2/3: Master sends two dummy bytes. self.putx([Ann.FIELD, ['Dummy byte: 0x%02x' % mosi]]) elif self.cmdstate == 4: # Byte 4: Master sends 0x00 or 0x01. # 0x00: Master wants manufacturer ID as first reply byte. # 0x01: Master wants device ID as first reply byte. self.manufacturer_id_first = True if (mosi == 0x00) else False d = 'manufacturer' if (mosi == 0x00) else 'device' self.putx([Ann.FIELD, ['Master wants %s ID first' % d]]) elif self.cmdstate == 5: # Byte 5: Slave sends manufacturer ID (or device ID). self.ids = [miso] d = 'Manufacturer' if self.manufacturer_id_first else 'Device' self.putx([Ann.FIELD, ['%s ID: 0x%02x' % (d, miso)]]) elif self.cmdstate == 6: # Byte 6: Slave sends device ID (or manufacturer ID). self.ids.append(miso) d = 'Device' if self.manufacturer_id_first else 'Manufacturer' self.putx([Ann.FIELD, ['%s ID: 0x%02x' % (d, miso)]]) if self.cmdstate == 6: id = self.ids[1] if self.manufacturer_id_first else self.ids[0] self.device_id = id self.es_cmd = self.es self.putc([Ann.REMS, self.cmd_vendor_dev_list()]) self.state = None else: self.cmdstate += 1 def handle_rems2(self, mosi, miso): pass # TODO def handle_enso(self, mosi, miso): pass # TODO def handle_exso(self, mosi, miso): pass # TODO def handle_rdscur(self, mosi, miso): pass # TODO def handle_wrscur(self, mosi, miso): pass # TODO def handle_esry(self, mosi, miso): pass # TODO def handle_dsry(self, mosi, miso): pass # TODO def output_data_block(self, label, idx): # Print accumulated block of data # (called on CS# de-assert via self.on_end_transaction callback). self.es_cmd = self.es # End on the CS# de-assert sample. if self.options['format'] == 'hex': s = ' '.join([('%02x' % b) for b in self.data]) else: s = ''.join(map(chr, self.data)) self.putf([Ann.FIELD, ['%s (%d bytes)' % (label, len(self.data))]]) self.putc([idx, ['%s (addr 0x%06x, %d bytes): %s' % \ (cmds[self.state][1], self.addr, len(self.data), s)]]) def decode(self, ss, es, data): ptype, mosi, miso = data self.ss, self.es = ss, es if ptype == 'CS-CHANGE': self.end_current_transaction() if ptype != 'DATA': return # If we encountered a known chip command, enter the resp. state. if self.state is None: self.state = mosi self.cmdstate = 1 # Handle commands. try: self.cmd_handlers[self.state](mosi, miso) except KeyError: self.putx([Ann.BIT, ['Unknown command: 0x%02x' % mosi]]) self.state = None libsigrokdecode-0.5.0/decoders/spiflash/__init__.py0000644000175000017500000000214513117367246017314 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the xx25 series SPI (NOR) flash chip protocol. It currently supports the MX25L1605D/MX25L3205D/MX25L6405D. Details: http://www.macronix.com/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/3F21BAC2E121E17848257639003A3146/$File/MX25L1605D-3205D-6405D-1.5.pdf ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/spiflash/lists.py0000644000175000017500000000701113117367246016710 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## from collections import OrderedDict # OrderedDict which maps command IDs to their names and descriptions. # Please keep this sorted by command ID. # Don't forget to update 'Ann' in pd.py if you add/remove items here. cmds = OrderedDict([ (0x01, ('WRSR', 'Write status register')), (0x02, ('PP', 'Page program')), (0x03, ('READ', 'Read data')), (0x04, ('WRDI', 'Write disable')), (0x05, ('RDSR', 'Read status register')), (0x06, ('WREN', 'Write enable')), (0x0b, ('FAST/READ', 'Fast read data')), (0x20, ('SE', 'Sector erase')), (0x2b, ('RDSCUR', 'Read security register')), (0x2f, ('WRSCUR', 'Write security register')), (0x35, ('RDSR2', 'Read status register 2')), (0x60, ('CE', 'Chip erase')), (0x70, ('ESRY', 'Enable SO to output RY/BY#')), (0x80, ('DSRY', 'Disable SO to output RY/BY#')), (0x90, ('REMS', 'Read electronic manufacturer & device ID')), (0x9f, ('RDID', 'Read identification')), (0xab, ('RDP/RES', 'Release from deep powerdown / Read electronic ID')), (0xad, ('CP', 'Continuously program mode')), (0xb1, ('ENSO', 'Enter secured OTP')), (0xb9, ('DP', 'Deep power down')), (0xbb, ('2READ', '2x I/O read')), # a.k.a. "Fast read dual I/O". (0xc1, ('EXSO', 'Exit secured OTP')), (0xc7, ('CE2', 'Chip erase')), # Alternative command ID (0xd8, ('BE', 'Block erase')), (0xef, ('REMS2', 'Read ID for 2x I/O mode')), ]) device_name = { 'fidelix': { 0x15: 'FM25Q32', }, 'macronix': { 0x14: 'MX25L1605D', 0x15: 'MX25L3205D', 0x16: 'MX25L6405D', }, } chips = { # FIDELIX 'fidelix_fm25q32': { 'vendor': 'FIDELIX', 'model': 'FM25Q32', 'res_id': 0x15, 'rems_id': 0xa115, 'rems2_id': 0xa115, 'rdid_id': 0xa14016, 'page_size': 256, 'sector_size': 4 * 1024, 'block_size': 64 * 1024, }, # Macronix 'macronix_mx25l1605d': { 'vendor': 'Macronix', 'model': 'MX25L1605D', 'res_id': 0x14, 'rems_id': 0xc214, 'rems2_id': 0xc214, 'rdid_id': 0xc22015, 'page_size': 256, 'sector_size': 4 * 1024, 'block_size': 64 * 1024, }, 'macronix_mx25l3205d': { 'vendor': 'Macronix', 'model': 'MX25L3205D', 'res_id': 0x15, 'rems_id': 0xc215, 'rems2_id': 0xc215, 'rdid_id': 0xc22016, 'page_size': 256, 'sector_size': 4 * 1024, 'block_size': 64 * 1024, }, 'macronix_mx25l6405d': { 'vendor': 'Macronix', 'model': 'MX25L6405D', 'res_id': 0x16, 'rems_id': 0xc216, 'rems2_id': 0xc216, 'rdid_id': 0xc22017, 'page_size': 256, 'sector_size': 4 * 1024, 'block_size': 64 * 1024, }, } libsigrokdecode-0.5.0/decoders/sdcard_spi/0000755000175000017500000000000013117367246015563 500000000000000libsigrokdecode-0.5.0/decoders/sdcard_spi/pd.py0000644000175000017500000003170113117367246016462 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from common.sdcard import (cmd_names, acmd_names) class Decoder(srd.Decoder): api_version = 2 id = 'sdcard_spi' name = 'SD card (SPI mode)' longname = 'Secure Digital card (SPI mode)' desc = 'Secure Digital card (SPI mode) low-level protocol.' license = 'gplv2+' inputs = ['spi'] outputs = ['sdcard_spi'] annotations = \ tuple(('cmd%d' % i, 'CMD%d' % i) for i in range(64)) + \ tuple(('acmd%d' % i, 'ACMD%d' % i) for i in range(64)) + ( \ ('r1', 'R1 reply'), ('r1b', 'R1B reply'), ('r2', 'R2 reply'), ('r3', 'R3 reply'), ('r7', 'R7 reply'), ('bits', 'Bits'), ('bit-warnings', 'Bit warnings'), ) annotation_rows = ( ('bits', 'Bits', (134, 135)), ('cmd-reply', 'Commands/replies', tuple(range(134))), ) def __init__(self): self.state = 'IDLE' self.ss, self.es = 0, 0 self.ss_bit, self.es_bit = 0, 0 self.ss_cmd, self.es_cmd = 0, 0 self.cmd_token = [] self.cmd_token_bits = [] self.is_acmd = False # Indicates CMD vs. ACMD self.blocklen = 0 self.read_buf = [] self.cmd_str = '' def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def putc(self, cmd, desc): self.putx([cmd, ['%s: %s' % (self.cmd_str, desc)]]) def putb(self, data): self.put(self.ss_bit, self.es_bit, self.out_ann, data) def cmd_name(self, cmd): c = acmd_names if self.is_acmd else cmd_names s = c.get(cmd, 'Unknown') # SD mode names for CMD32/33: ERASE_WR_BLK_{START,END}. # SPI mode names for CMD32/33: ERASE_WR_BLK_{START,END}_ADDR. if cmd in (32, 33): s += '_ADDR' return s def handle_command_token(self, mosi, miso): # Command tokens (6 bytes) are sent (MSB-first) by the host. # # Format: # - CMD[47:47]: Start bit (always 0) # - CMD[46:46]: Transmitter bit (1 == host) # - CMD[45:40]: Command index (BCD; valid: 0-63) # - CMD[39:08]: Argument # - CMD[07:01]: CRC7 # - CMD[00:00]: End bit (always 1) if len(self.cmd_token) == 0: self.ss_cmd = self.ss self.cmd_token.append(mosi) self.cmd_token_bits.append(self.mosi_bits) # All command tokens are 6 bytes long. if len(self.cmd_token) < 6: return self.es_cmd = self.es t = self.cmd_token # CMD or ACMD? s = 'ACMD' if self.is_acmd else 'CMD' def tb(byte, bit): return self.cmd_token_bits[5 - byte][bit] # Bits[47:47]: Start bit (always 0) bit, self.ss_bit, self.es_bit = tb(5, 7)[0], tb(5, 7)[1], tb(5, 7)[2] if bit == 0: self.putb([134, ['Start bit: %d' % bit]]) else: self.putb([135, ['Start bit: %s (Warning: Must be 0!)' % bit]]) # Bits[46:46]: Transmitter bit (1 == host) bit, self.ss_bit, self.es_bit = tb(5, 6)[0], tb(5, 6)[1], tb(5, 6)[2] if bit == 1: self.putb([134, ['Transmitter bit: %d' % bit]]) else: self.putb([135, ['Transmitter bit: %d (Warning: Must be 1!)' % bit]]) # Bits[45:40]: Command index (BCD; valid: 0-63) cmd = self.cmd_index = t[0] & 0x3f self.ss_bit, self.es_bit = tb(5, 5)[1], tb(5, 0)[2] self.putb([134, ['Command: %s%d (%s)' % (s, cmd, self.cmd_name(cmd))]]) # Bits[39:8]: Argument self.arg = (t[1] << 24) | (t[2] << 16) | (t[3] << 8) | t[4] self.ss_bit, self.es_bit = tb(4, 7)[1], tb(1, 0)[2] self.putb([134, ['Argument: 0x%04x' % self.arg]]) # Bits[7:1]: CRC7 # TODO: Check CRC7. crc = t[5] >> 1 self.ss_bit, self.es_bit = tb(0, 7)[1], tb(0, 1)[2] self.putb([134, ['CRC7: 0x%01x' % crc]]) # Bits[0:0]: End bit (always 1) bit, self.ss_bit, self.es_bit = tb(0, 0)[0], tb(0, 0)[1], tb(0, 0)[2] self.putb([134, ['End bit: %d' % bit]]) if bit == 1: self.putb([134, ['End bit: %d' % bit]]) else: self.putb([135, ['End bit: %d (Warning: Must be 1!)' % bit]]) # Handle command. if cmd in (0, 1, 9, 16, 17, 41, 49, 55, 59): self.state = 'HANDLE CMD%d' % cmd self.cmd_str = '%s%d (%s)' % (s, cmd, self.cmd_name(cmd)) else: self.state = 'HANDLE CMD999' a = '%s%d: %02x %02x %02x %02x %02x %02x' % ((s, cmd) + tuple(t)) self.putx([cmd, [a]]) def handle_cmd0(self): # CMD0: GO_IDLE_STATE self.putc(0, 'Reset the SD card') self.state = 'GET RESPONSE R1' def handle_cmd1(self): # CMD1: SEND_OP_COND self.putc(1, 'Send HCS info and activate the card init process') hcs = (self.arg & (1 << 30)) >> 30 self.ss_bit = self.cmd_token_bits[5 - 4][6][1] self.es_bit = self.cmd_token_bits[5 - 4][6][2] self.putb([134, ['HCS: %d' % hcs]]) self.state = 'GET RESPONSE R1' def handle_cmd9(self): # CMD9: SEND_CSD (128 bits / 16 bytes) self.putc(9, 'Ask card to send its card specific data (CSD)') if len(self.read_buf) == 0: self.ss_cmd = self.ss self.read_buf.append(self.miso) # FIXME ### if len(self.read_buf) < 16: if len(self.read_buf) < 16 + 4: return self.es_cmd = self.es self.read_buf = self.read_buf[4:] # TODO: Document or redo. self.putx([9, ['CSD: %s' % self.read_buf]]) # TODO: Decode all bits. self.read_buf = [] ### self.state = 'GET RESPONSE R1' self.state = 'IDLE' def handle_cmd10(self): # CMD10: SEND_CID (128 bits / 16 bytes) self.putc(10, 'Ask card to send its card identification (CID)') self.read_buf.append(self.miso) if len(self.read_buf) < 16: return self.putx([10, ['CID: %s' % self.read_buf]]) # TODO: Decode all bits. self.read_buf = [] self.state = 'GET RESPONSE R1' def handle_cmd16(self): # CMD16: SET_BLOCKLEN self.blocklen = self.arg # TODO: Sanity check on block length. self.putc(16, 'Set the block length to %d bytes' % self.blocklen) self.state = 'GET RESPONSE R1' def handle_cmd17(self): # CMD17: READ_SINGLE_BLOCK self.putc(17, 'Read a block from address 0x%04x' % self.arg) if len(self.read_buf) == 0: self.ss_cmd = self.ss self.read_buf.append(self.miso) if len(self.read_buf) < self.blocklen + 2: # FIXME return self.es_cmd = self.es self.read_buf = self.read_buf[2:] # FIXME self.putx([17, ['Block data: %s' % self.read_buf]]) self.read_buf = [] self.state = 'GET RESPONSE R1' def handle_cmd49(self): self.state = 'GET RESPONSE R1' def handle_cmd55(self): # CMD55: APP_CMD self.putc(55, 'Next command is an application-specific command') self.is_acmd = True self.state = 'GET RESPONSE R1' def handle_cmd59(self): # CMD59: CRC_ON_OFF crc_on_off = self.arg & (1 << 0) s = 'on' if crc_on_off == 1 else 'off' self.putc(59, 'Turn the SD card CRC option %s' % s) self.state = 'GET RESPONSE R1' def handle_acmd41(self): # ACMD41: SD_SEND_OP_COND self.putc(64 + 41, 'Send HCS info and activate the card init process') self.state = 'GET RESPONSE R1' def handle_cmd999(self): self.state = 'GET RESPONSE R1' def handle_cid_register(self): # Card Identification (CID) register, 128bits cid = self.cid # Manufacturer ID: CID[127:120] (8 bits) mid = cid[15] # OEM/Application ID: CID[119:104] (16 bits) oid = (cid[14] << 8) | cid[13] # Product name: CID[103:64] (40 bits) pnm = 0 for i in range(12, 8 - 1, -1): pnm <<= 8 pnm |= cid[i] # Product revision: CID[63:56] (8 bits) prv = cid[7] # Product serial number: CID[55:24] (32 bits) psn = 0 for i in range(6, 3 - 1, -1): psn <<= 8 psn |= cid[i] # RESERVED: CID[23:20] (4 bits) # Manufacturing date: CID[19:8] (12 bits) # TODO # CRC7 checksum: CID[7:1] (7 bits) # TODO # Not used, always 1: CID[0:0] (1 bit) # TODO def handle_response_r1(self, res): # The R1 response token format (1 byte). # Sent by the card after every command except for SEND_STATUS. self.ss_cmd, self.es_cmd = self.miso_bits[7][1], self.miso_bits[0][2] self.putx([65, ['R1: 0x%02x' % res]]) def putbit(bit, data): b = self.miso_bits[bit] self.ss_bit, self.es_bit = b[1], b[2] self.putb([134, data]) # Bit 0: 'In idle state' bit s = '' if (res & (1 << 0)) else 'not ' putbit(0, ['Card is %sin idle state' % s]) # Bit 1: 'Erase reset' bit s = '' if (res & (1 << 1)) else 'not ' putbit(1, ['Erase sequence %scleared' % s]) # Bit 2: 'Illegal command' bit s = 'I' if (res & (1 << 2)) else 'No i' putbit(2, ['%sllegal command detected' % s]) # Bit 3: 'Communication CRC error' bit s = 'failed' if (res & (1 << 3)) else 'was successful' putbit(3, ['CRC check of last command %s' % s]) # Bit 4: 'Erase sequence error' bit s = 'E' if (res & (1 << 4)) else 'No e' putbit(4, ['%srror in the sequence of erase commands' % s]) # Bit 5: 'Address error' bit s = 'M' if (res & (1 << 4)) else 'No m' putbit(5, ['%sisaligned address used in command' % s]) # Bit 6: 'Parameter error' bit s = '' if (res & (1 << 4)) else 'not ' putbit(6, ['Command argument %soutside allowed range' % s]) # Bit 7: Always set to 0 putbit(7, ['Bit 7 (always 0)']) self.state = 'IDLE' def handle_response_r1b(self, res): # TODO pass def handle_response_r2(self, res): # TODO pass def handle_response_r3(self, res): # TODO pass # Note: Response token formats R4 and R5 are reserved for SDIO. # TODO: R6? def handle_response_r7(self, res): # TODO pass def decode(self, ss, es, data): ptype, mosi, miso = data # For now, only use DATA and BITS packets. if ptype not in ('DATA', 'BITS'): return # Store the individual bit values and ss/es numbers. The next packet # is guaranteed to be a 'DATA' packet belonging to this 'BITS' one. if ptype == 'BITS': self.miso_bits, self.mosi_bits = miso, mosi return self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Ignore stray 0xff bytes, some devices seem to send those!? if mosi == 0xff: # TODO? return self.state = 'GET COMMAND TOKEN' self.handle_command_token(mosi, miso) elif self.state == 'GET COMMAND TOKEN': self.handle_command_token(mosi, miso) elif self.state.startswith('HANDLE CMD'): self.miso, self.mosi = miso, mosi # Call the respective handler method for the command. a, cmdstr = 'a' if self.is_acmd else '', self.state[10:].lower() handle_cmd = getattr(self, 'handle_%scmd%s' % (a, cmdstr)) handle_cmd() self.cmd_token = [] self.cmd_token_bits = [] # Leave ACMD mode again after the first command after CMD55. if self.is_acmd and cmdstr != '55': self.is_acmd = False elif self.state.startswith('GET RESPONSE'): # Ignore stray 0xff bytes, some devices seem to send those!? if miso == 0xff: # TODO? return # Call the respective handler method for the response. s = 'handle_response_%s' % self.state[13:].lower() handle_response = getattr(self, s) handle_response(miso) self.state = 'IDLE' libsigrokdecode-0.5.0/decoders/sdcard_spi/__init__.py0000644000175000017500000000657313117367246017627 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the SD card (SPI mode) low-level protocol. Most SD cards can be accessed via two different protocols/modes: SD mode or SPI mode. All SD cards are in SD mode upon powerup. They can be switched to SPI mode using a special method involving CMD0 (see spec). Once in SPI mode, the mode can no longer be changed without a power-cycle of the card. SPI mode properties (differences to SD mode): * The 'sdcard_spi' PD stacks on top of the 'spi' PD. This is not possible for the 'sdcard_sd' PD, as that protocol is not SPI related at all. Hence 'sdcard_spi' and 'sdcard_sd' are two separate PDs. * The state machines for SPI mode and SD mode are different. * In SPI mode, data transfers are byte-oriented (commands/data are multiples of 8 bits, with the CS# pin asserted respectively), unlike SD mode where commands/data are bit-oriented with parallel transmission of 1 or 4 bits. * While the SPI mode command set has some commands in common with the SD mode command set, they are not the same and also not a subset/superset. Some commands are only available in SD mode (e.g. CMD2), some only in SPI mode (e.g. CMD1). * Response types of commands also differ between SD mode and SPI mode. E.g. CMD9 has an R2 response in SD mode, but R1 in SPI mode. * The commands and functions in SD mode defined after version 2.00 of the spec are NOT supported in SPI mode. * SPI mode: The selected SD card ALWAYS responds to commands (unlike SD mode). * Upon data retrieval problems (read operations) the card will respond with an error response (and no data), as opposed to a timeout in SD mode. * SPI mode: For every data block sent to the card (write operations) the host gets a data response token from the card. * SDSC: A data block can be max. one card write block, min. 1 byte. * SDHC/SDXC: Block length is fixed to 512. The block length set by CMD16 is only used for CDM42 (not for memory data transfers). Thus, partial read/write operations are disabled in SPI mode. * SPI mode: Write protected commands (CMD28, CMD29, CMD30) are not supported. * The SD mode state machine is NOT used. All commands that are supported in SPI mode are always available. * Per default the card is in CRC OFF mode. Exception: CMD0 (which is used to switch to SPI mode) needs a valid CRC. * The APP_CMD status bit is not available in SPI mode. * TODO: Switch function command differences. * In SPI mode cards cannot guarantee their speed class (the host should assume class 0, no matter what the card indicates). * The RCA register is not accessible in SPI mode. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/usb_packet/0000755000175000017500000000000013117367246015570 500000000000000libsigrokdecode-0.5.0/decoders/usb_packet/pd.py0000644000175000017500000003445113117367246016474 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2011 Gareth McMullin ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd ''' OUTPUT_PYTHON format: Packet: [, ] , : - 'SYNC', - 'PID', - 'ADDR', - 'EP', - 'CRC5', - 'CRC5 ERROR', - 'CRC16', - 'CRC16 ERROR', - 'EOP', - 'FRAMENUM', - 'DATABYTE', - 'HUBADDR', - 'SC', - 'PORT', - 'S', - 'E/U', - 'ET', - 'PACKET', [, , ] , , : - 'TOKEN', 'OUT', [, , , , , ] - 'TOKEN', 'IN', [, , , , , ] - 'TOKEN', 'SOF', [, , , , ] - 'TOKEN', 'SETUP', [, , , , , ] - 'DATA', 'DATA0', [, , , , ] - 'DATA', 'DATA1', [, , , , ] - 'DATA', 'DATA2', [, , , , ] - 'DATA', 'MDATA', [, , , , ] - 'HANDSHAKE', 'ACK', [, , ] - 'HANDSHAKE', 'NAK', [, , ] - 'HANDSHAKE', 'STALL', [, , ] - 'HANDSHAKE', 'NYET', [, , ] - 'SPECIAL', 'PRE', [, , , , , ] - 'SPECIAL', 'ERR', [, , ] - 'SPECIAL', 'SPLIT', [, , , , , , , , , ] - 'SPECIAL', 'PING', [, , , , , ] - 'SPECIAL', 'Reserved', None : SYNC field bitstring, normally '00000001' (8 chars). : Packet ID bitstring, e.g. '11000011' for DATA0 (8 chars). : Address field number, 0-127 (7 bits). : Endpoint number, 0-15 (4 bits). : CRC-5 number (5 bits). : CRC-16 number (16 bits). : End of packet marker. List of symbols, usually ['SE0', 'SE0', 'J']. : USB (micro)frame number, 0-2047 (11 bits). : A single data byte, e.g. 0x55. : List of data bytes, e.g. [0x55, 0xaa, 0x99] (0 - 1024 bytes). : TODO : TODO : TODO : TODO : TODO : TODO ''' # Packet IDs (PIDs). # The first 4 bits are the 'packet type' field, the last 4 bits are the # 'check field' (each bit in the check field must be the inverse of the resp. # bit in the 'packet type' field; if not, that's a 'PID error'). # For the 4-bit strings, the left-most '1' or '0' is the LSB, i.e. it's sent # to the bus first. pids = { # Tokens '10000111': ['OUT', 'Address & EP number in host-to-function transaction'], '10010110': ['IN', 'Address & EP number in function-to-host transaction'], '10100101': ['SOF', 'Start-Of-Frame marker & frame number'], '10110100': ['SETUP', 'Address & EP number in host-to-function transaction for SETUP to a control pipe'], # Data # Note: DATA2 and MDATA are HS-only. '11000011': ['DATA0', 'Data packet PID even'], '11010010': ['DATA1', 'Data packet PID odd'], '11100001': ['DATA2', 'Data packet PID HS, high bandwidth isosynchronous transaction in a microframe'], '11110000': ['MDATA', 'Data packet PID HS for split and high-bandwidth isosynchronous transactions'], # Handshake '01001011': ['ACK', 'Receiver accepts error-free packet'], '01011010': ['NAK', 'Receiver cannot accept or transmitter cannot send'], '01111000': ['STALL', 'EP halted or control pipe request unsupported'], '01101001': ['NYET', 'No response yet from receiver'], # Special '00111100': ['PRE', 'Host-issued preamble; enables downstream bus traffic to low-speed devices'], #'00111100': ['ERR', 'Split transaction error handshake'], '00011110': ['SPLIT', 'HS split transaction token'], '00101101': ['PING', 'HS flow control probe for a bulk/control EP'], '00001111': ['Reserved', 'Reserved PID'], } def get_category(pidname): if pidname in ('OUT', 'IN', 'SOF', 'SETUP'): return 'TOKEN' elif pidname in ('DATA0', 'DATA1', 'DATA2', 'MDATA'): return 'DATA' elif pidname in ('ACK', 'NAK', 'STALL', 'NYET'): return 'HANDSHAKE' else: return 'SPECIAL' def ann_index(pidname): l = ['OUT', 'IN', 'SOF', 'SETUP', 'DATA0', 'DATA1', 'DATA2', 'MDATA', 'ACK', 'NAK', 'STALL', 'NYET', 'PRE', 'ERR', 'SPLIT', 'PING', 'Reserved'] if pidname not in l: return 28 return l.index(pidname) + 11 def bitstr_to_num(bitstr): if not bitstr: return 0 l = list(bitstr) l.reverse() return int(''.join(l), 2) def reverse_number(num, count): out = list(count * '0') for i in range(0, count): if num >> i & 1: out[i] = '1'; return int(''.join(out), 2) def calc_crc5(bitstr): poly5 = 0x25 crc5 = 0x1f for bit in bitstr: crc5 <<= 1 if int(bit) != (crc5 >> 5): crc5 ^= poly5 crc5 &= 0x1f crc5 ^= 0x1f return reverse_number(crc5, 5) def calc_crc16(bitstr): poly16 = 0x18005 crc16 = 0xffff for bit in bitstr: crc16 <<= 1 if int(bit) != (crc16 >> 16): crc16 ^= poly16 crc16 &= 0xffff crc16 ^= 0xffff return reverse_number(crc16, 16) class Decoder(srd.Decoder): api_version = 2 id = 'usb_packet' name = 'USB packet' longname = 'Universal Serial Bus (LS/FS) packet' desc = 'USB (low-speed and full-speed) packet protocol.' license = 'gplv2+' inputs = ['usb_signalling'] outputs = ['usb_packet'] options = ( {'id': 'signalling', 'desc': 'Signalling', 'default': 'full-speed', 'values': ('full-speed', 'low-speed')}, ) annotations = ( ('sync-ok', 'SYNC'), ('sync-err', 'SYNC (error)'), ('pid', 'PID'), ('framenum', 'FRAMENUM'), ('addr', 'ADDR'), ('ep', 'EP'), ('crc5-ok', 'CRC5'), ('crc5-err', 'CRC5 (error)'), ('data', 'DATA'), ('crc16-ok', 'CRC16'), ('crc16-err', 'CRC16 (error)'), ('packet-out', 'Packet: OUT'), ('packet-in', 'Packet: IN'), ('packet-sof', 'Packet: SOF'), ('packet-setup', 'Packet: SETUP'), ('packet-data0', 'Packet: DATA0'), ('packet-data1', 'Packet: DATA1'), ('packet-data2', 'Packet: DATA2'), ('packet-mdata', 'Packet: MDATA'), ('packet-ack', 'Packet: ACK'), ('packet-nak', 'Packet: NAK'), ('packet-stall', 'Packet: STALL'), ('packet-nyet', 'Packet: NYET'), ('packet-pre', 'Packet: PRE'), ('packet-err', 'Packet: ERR'), ('packet-split', 'Packet: SPLIT'), ('packet-ping', 'Packet: PING'), ('packet-reserved', 'Packet: Reserved'), ('packet-invalid', 'Packet: Invalid'), ) annotation_rows = ( ('fields', 'Packet fields', tuple(range(10 + 1))), ('packet', 'Packets', tuple(range(11, 28 + 1))), ) def __init__(self): self.bits = [] self.packet = [] self.packet_summary = '' self.ss = self.es = None self.ss_packet = self.es_packet = None self.state = 'WAIT FOR SOP' def putpb(self, data): self.put(self.ss, self.es, self.out_python, data) def putb(self, data): self.put(self.ss, self.es, self.out_ann, data) def putpp(self, data): self.put(self.ss_packet, self.es_packet, self.out_python, data) def putp(self, data): self.put(self.ss_packet, self.es_packet, self.out_ann, data) def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def handle_packet(self): packet = '' for (bit, ss, es) in self.bits: packet += bit if len(packet) < 8: self.putp([28, ['Invalid packet (shorter than 8 bits)']]) return # Bits[0:7]: SYNC sync = packet[:7 + 1] self.ss, self.es = self.bits[0][1], self.bits[7][2] # The SYNC pattern for low-speed/full-speed is KJKJKJKK (00000001). if sync != '00000001': self.putpb(['SYNC ERROR', sync]) self.putb([1, ['SYNC ERROR: %s' % sync, 'SYNC ERR: %s' % sync, 'SYNC ERR', 'SE', 'S']]) else: self.putpb(['SYNC', sync]) self.putb([0, ['SYNC: %s' % sync, 'SYNC', 'S']]) self.packet.append(sync) if len(packet) < 16: self.putp([28, ['Invalid packet (shorter than 16 bits)']]) return # Bits[8:15]: PID pid = packet[8:15 + 1] pidname = pids.get(pid, ('UNKNOWN', 'Unknown PID'))[0] self.ss, self.es = self.bits[8][1], self.bits[15][2] self.putpb(['PID', pidname]) self.putb([2, ['PID: %s' % pidname, pidname, pidname[0]]]) self.packet.append(pid) self.packet_summary += pidname if pidname in ('OUT', 'IN', 'SOF', 'SETUP', 'PING'): if len(packet) < 32: self.putp([28, ['Invalid packet (shorter than 32 bits)']]) return if pidname == 'SOF': # Bits[16:26]: Framenum framenum = bitstr_to_num(packet[16:26 + 1]) self.ss, self.es = self.bits[16][1], self.bits[26][2] self.putpb(['FRAMENUM', framenum]) self.putb([3, ['Frame: %d' % framenum, 'Frame', 'Fr', 'F']]) self.packet.append(framenum) self.packet_summary += ' %d' % framenum else: # Bits[16:22]: Addr addr = bitstr_to_num(packet[16:22 + 1]) self.ss, self.es = self.bits[16][1], self.bits[22][2] self.putpb(['ADDR', addr]) self.putb([4, ['Address: %d' % addr, 'Addr: %d' % addr, 'Addr', 'A']]) self.packet.append(addr) self.packet_summary += ' ADDR %d' % addr # Bits[23:26]: EP ep = bitstr_to_num(packet[23:26 + 1]) self.ss, self.es = self.bits[23][1], self.bits[26][2] self.putpb(['EP', ep]) self.putb([5, ['Endpoint: %d' % ep, 'EP: %d' % ep, 'EP', 'E']]) self.packet.append(ep) self.packet_summary += ' EP %d' % ep # Bits[27:31]: CRC5 crc5 = bitstr_to_num(packet[27:31 + 1]) crc5_calc = calc_crc5(packet[16:27]) self.ss, self.es = self.bits[27][1], self.bits[31][2] if crc5 == crc5_calc: self.putpb(['CRC5', crc5]) self.putb([6, ['CRC5: 0x%02X' % crc5, 'CRC5', 'C']]) else: self.putpb(['CRC5 ERROR', crc5]) self.putb([7, ['CRC5 ERROR: 0x%02X' % crc5, 'CRC5 ERR', 'CE', 'C']]) self.packet.append(crc5) elif pidname in ('DATA0', 'DATA1', 'DATA2', 'MDATA'): # Bits[16:packetlen-16]: Data data = packet[16:-16] # TODO: len(data) must be a multiple of 8. databytes = [] self.packet_summary += ' [' for i in range(0, len(data), 8): db = bitstr_to_num(data[i:i + 8]) self.ss, self.es = self.bits[16 + i][1], self.bits[23 + i][2] self.putpb(['DATABYTE', db]) self.putb([8, ['Databyte: %02X' % db, 'Data: %02X' % db, 'DB: %02X' % db, '%02X' % db]]) databytes.append(db) self.packet_summary += ' %02X' % db self.packet_summary += ' ]' # Convenience Python output (no annotation) for all bytes together. self.ss, self.es = self.bits[16][1], self.bits[-16][2] self.putpb(['DATABYTES', databytes]) self.packet.append(databytes) # Bits[packetlen-16:packetlen]: CRC16 crc16 = bitstr_to_num(packet[-16:]) crc16_calc = calc_crc16(packet[16:-16]) self.ss, self.es = self.bits[-16][1], self.bits[-1][2] if crc16 == crc16_calc: self.putpb(['CRC16', crc16]) self.putb([9, ['CRC16: 0x%04X' % crc16, 'CRC16', 'C']]) else: self.putpb(['CRC16 ERROR', crc16]) self.putb([10, ['CRC16 ERROR: 0x%04X' % crc16, 'CRC16 ERR', 'CE', 'C']]) self.packet.append(crc16) elif pidname in ('ACK', 'NAK', 'STALL', 'NYET', 'ERR'): pass # Nothing to do, these only have SYNC+PID+EOP fields. elif pidname in ('PRE'): pass # Nothing to do, PRE only has SYNC+PID fields. else: pass # TODO: Handle 'SPLIT' and possibly 'Reserved' packets. # Output a (summary of) the whole packet. pcategory, pname, pinfo = get_category(pidname), pidname, self.packet self.putpp(['PACKET', [pcategory, pname, pinfo]]) self.putp([ann_index(pidname), ['%s' % self.packet_summary]]) self.packet, self.packet_summary = [], '' def decode(self, ss, es, data): (ptype, pdata) = data # We only care about certain packet types for now. if ptype not in ('SOP', 'BIT', 'EOP', 'ERR'): return # State machine. if self.state == 'WAIT FOR SOP': if ptype != 'SOP': return self.ss_packet = ss self.state = 'GET BIT' elif self.state == 'GET BIT': if ptype == 'BIT': self.bits.append([pdata, ss, es]) elif ptype == 'EOP' or ptype == 'ERR': self.es_packet = es self.handle_packet() self.packet, self.packet_summary = [], '' self.bits, self.state = [], 'WAIT FOR SOP' else: pass # TODO: Error libsigrokdecode-0.5.0/decoders/usb_packet/__init__.py0000644000175000017500000000305613117367246017625 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'usb_signalling' PD and decodes the USB (low-speed and full-speed) packet protocol. Protocol layer (USB spec, chapter 8): Bit/byte ordering: Bits are sent onto the bus LSB-first. Multibyte fields are transmitted in little-endian order (i.e., LSB to MSB). SYNC field: All packets begin with a SYNC field (8 bits). Packet field format: Packets start with an SOP (Start Of Packet) delimiter that is part of the SYNC field, and end with an EOP (End Of Packet). PID: A PID (packet identifier) follows the SYNC field of every packet. A PID consists of a 4-bit packet type field, and a 4 bit check field. The check field is the one's complement of the packet type field. Details: https://en.wikipedia.org/wiki/USB http://www.usb.org/developers/docs/ ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/spi/0000755000175000017500000000000013117367246014243 500000000000000libsigrokdecode-0.5.0/decoders/spi/pd.py0000644000175000017500000003132013117367246015137 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2011 Gareth McMullin ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from collections import namedtuple Data = namedtuple('Data', ['ss', 'es', 'val']) ''' OUTPUT_PYTHON format: Packet: [, , ] : - 'DATA': contains the MOSI data, contains the MISO data. The data is _usually_ 8 bits (but can also be fewer or more bits). Both data items are Python numbers (not strings), or None if the respective channel was not supplied. - 'BITS': / contain a list of bit values in this MOSI/MISO data item, and for each of those also their respective start-/endsample numbers. - 'CS-CHANGE': is the old CS# pin value, is the new value. Both data items are Python numbers (0/1), not strings. At the beginning of the decoding a packet is generated with = None and being the initial state of the CS# pin or None if the chip select pin is not supplied. - 'TRANSFER': / contain a list of Data() namedtuples for each byte transferred during this block of CS# asserted time. Each Data() has fields ss, es, and val. Examples: ['CS-CHANGE', None, 1] ['CS-CHANGE', 1, 0] ['DATA', 0xff, 0x3a] ['BITS', [[1, 80, 82], [1, 83, 84], [1, 85, 86], [1, 87, 88], [1, 89, 90], [1, 91, 92], [1, 93, 94], [1, 95, 96]], [[0, 80, 82], [1, 83, 84], [0, 85, 86], [1, 87, 88], [1, 89, 90], [1, 91, 92], [0, 93, 94], [0, 95, 96]]] ['DATA', 0x65, 0x00] ['DATA', 0xa8, None] ['DATA', None, 0x55] ['CS-CHANGE', 0, 1] ['TRANSFER', [Data(ss=80, es=96, val=0xff), ...], [Data(ss=80, es=96, val=0x3a), ...]] ''' # Key: (CPOL, CPHA). Value: SPI mode. # Clock polarity (CPOL) = 0/1: Clock is low/high when inactive. # Clock phase (CPHA) = 0/1: Data is valid on the leading/trailing clock edge. spi_mode = { (0, 0): 0, # Mode 0 (0, 1): 1, # Mode 1 (1, 0): 2, # Mode 2 (1, 1): 3, # Mode 3 } class ChannelError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'spi' name = 'SPI' longname = 'Serial Peripheral Interface' desc = 'Full-duplex, synchronous, serial bus.' license = 'gplv2+' inputs = ['logic'] outputs = ['spi'] channels = ( {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'}, ) optional_channels = ( {'id': 'miso', 'name': 'MISO', 'desc': 'Master in, slave out'}, {'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'}, {'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'}, ) options = ( {'id': 'cs_polarity', 'desc': 'CS# polarity', 'default': 'active-low', 'values': ('active-low', 'active-high')}, {'id': 'cpol', 'desc': 'Clock polarity', 'default': 0, 'values': (0, 1)}, {'id': 'cpha', 'desc': 'Clock phase', 'default': 0, 'values': (0, 1)}, {'id': 'bitorder', 'desc': 'Bit order', 'default': 'msb-first', 'values': ('msb-first', 'lsb-first')}, {'id': 'wordsize', 'desc': 'Word size', 'default': 8}, ) annotations = ( ('miso-data', 'MISO data'), ('mosi-data', 'MOSI data'), ('miso-bits', 'MISO bits'), ('mosi-bits', 'MOSI bits'), ('warnings', 'Human-readable warnings'), ) annotation_rows = ( ('miso-data', 'MISO data', (0,)), ('miso-bits', 'MISO bits', (2,)), ('mosi-data', 'MOSI data', (1,)), ('mosi-bits', 'MOSI bits', (3,)), ('other', 'Other', (4,)), ) binary = ( ('miso', 'MISO'), ('mosi', 'MOSI'), ) def __init__(self): self.samplerate = None self.bitcount = 0 self.misodata = self.mosidata = 0 self.misobits = [] self.mosibits = [] self.misobytes = [] self.mosibytes = [] self.ss_block = -1 self.samplenum = -1 self.ss_transfer = -1 self.cs_was_deasserted = False self.have_cs = self.have_miso = self.have_mosi = None def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) if self.samplerate is not None: self.out_bitrate = self.register(srd.OUTPUT_META, meta=(int, 'Bitrate', 'Bitrate during transfers')) self.bw = (self.options['wordsize'] + 7) // 8 def putw(self, data): self.put(self.ss_block, self.samplenum, self.out_ann, data) def putdata(self): # Pass MISO and MOSI bits and then data to the next PD up the stack. so = self.misodata if self.have_miso else None si = self.mosidata if self.have_mosi else None so_bits = self.misobits if self.have_miso else None si_bits = self.mosibits if self.have_mosi else None if self.have_miso: ss, es = self.misobits[-1][1], self.misobits[0][2] bdata = so.to_bytes(self.bw, byteorder='big') self.put(ss, es, self.out_binary, [0, bdata]) if self.have_mosi: ss, es = self.mosibits[-1][1], self.mosibits[0][2] bdata = si.to_bytes(self.bw, byteorder='big') self.put(ss, es, self.out_binary, [1, bdata]) self.put(ss, es, self.out_python, ['BITS', si_bits, so_bits]) self.put(ss, es, self.out_python, ['DATA', si, so]) if self.have_miso: self.misobytes.append(Data(ss=ss, es=es, val=so)) if self.have_mosi: self.mosibytes.append(Data(ss=ss, es=es, val=si)) # Bit annotations. if self.have_miso: for bit in self.misobits: self.put(bit[1], bit[2], self.out_ann, [2, ['%d' % bit[0]]]) if self.have_mosi: for bit in self.mosibits: self.put(bit[1], bit[2], self.out_ann, [3, ['%d' % bit[0]]]) # Dataword annotations. if self.have_miso: self.put(ss, es, self.out_ann, [0, ['%02X' % self.misodata]]) if self.have_mosi: self.put(ss, es, self.out_ann, [1, ['%02X' % self.mosidata]]) def reset_decoder_state(self): self.misodata = 0 if self.have_miso else None self.mosidata = 0 if self.have_mosi else None self.misobits = [] if self.have_miso else None self.mosibits = [] if self.have_mosi else None self.bitcount = 0 def cs_asserted(self, cs): active_low = (self.options['cs_polarity'] == 'active-low') return (cs == 0) if active_low else (cs == 1) def handle_bit(self, miso, mosi, clk, cs): # If this is the first bit of a dataword, save its sample number. if self.bitcount == 0: self.ss_block = self.samplenum self.cs_was_deasserted = \ not self.cs_asserted(cs) if self.have_cs else False ws = self.options['wordsize'] # Receive MISO bit into our shift register. if self.have_miso: if self.options['bitorder'] == 'msb-first': self.misodata |= miso << (ws - 1 - self.bitcount) else: self.misodata |= miso << self.bitcount # Receive MOSI bit into our shift register. if self.have_mosi: if self.options['bitorder'] == 'msb-first': self.mosidata |= mosi << (ws - 1 - self.bitcount) else: self.mosidata |= mosi << self.bitcount # Guesstimate the endsample for this bit (can be overridden below). es = self.samplenum if self.bitcount > 0: if self.have_miso: es += self.samplenum - self.misobits[0][1] elif self.have_mosi: es += self.samplenum - self.mosibits[0][1] if self.have_miso: self.misobits.insert(0, [miso, self.samplenum, es]) if self.have_mosi: self.mosibits.insert(0, [mosi, self.samplenum, es]) if self.bitcount > 0 and self.have_miso: self.misobits[1][2] = self.samplenum if self.bitcount > 0 and self.have_mosi: self.mosibits[1][2] = self.samplenum self.bitcount += 1 # Continue to receive if not enough bits were received, yet. if self.bitcount != ws: return self.putdata() # Meta bitrate. if self.samplerate is not None: elapsed = 1 / float(self.samplerate) elapsed *= (self.samplenum - self.ss_block + 1) bitrate = int(1 / elapsed * self.options['wordsize']) self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate) if self.have_cs and self.cs_was_deasserted: self.putw([4, ['CS# was deasserted during this data word!']]) self.reset_decoder_state() def find_clk_edge(self, miso, mosi, clk, cs, first): if self.have_cs and (first or self.matched[self.have_cs]): # Send all CS# pin value changes. oldcs = None if first else 1 - cs self.put(self.samplenum, self.samplenum, self.out_python, ['CS-CHANGE', oldcs, cs]) if self.cs_asserted(cs): self.ss_transfer = self.samplenum self.misobytes = [] self.mosibytes = [] else: self.put(self.ss_transfer, self.samplenum, self.out_python, ['TRANSFER', self.mosibytes, self.misobytes]) # Reset decoder state when CS# changes (and the CS# pin is used). self.reset_decoder_state() # We only care about samples if CS# is asserted. if self.have_cs and not self.cs_asserted(cs): return # Ignore sample if the clock pin hasn't changed. if first or not self.matched[0]: return # Sample data on rising/falling clock edge (depends on mode). mode = spi_mode[self.options['cpol'], self.options['cpha']] if mode == 0 and clk == 0: # Sample on rising clock edge return elif mode == 1 and clk == 1: # Sample on falling clock edge return elif mode == 2 and clk == 1: # Sample on falling clock edge return elif mode == 3 and clk == 0: # Sample on rising clock edge return # Found the correct clock edge, now get the SPI bit(s). self.handle_bit(miso, mosi, clk, cs) def decode(self): # The CLK input is mandatory. Other signals are (individually) # optional. Yet either MISO or MOSI (or both) must be provided. # Tell stacked decoders when we don't have a CS# signal. if not self.has_channel(0): raise ChannelError('Either MISO or MOSI (or both) pins required.') self.have_miso = self.has_channel(1) self.have_mosi = self.has_channel(2) if not self.have_miso and not self.have_mosi: raise ChannelError('Either MISO or MOSI (or both) pins required.') self.have_cs = self.has_channel(3) if not self.have_cs: self.put(0, 0, self.out_python, ['CS-CHANGE', None, None]) # We want all CLK changes. We want all CS changes if CS is used. # Map 'have_cs' from boolean to an integer index. This simplifies # evaluation in other locations. wait_cond = [{0: 'e'}] if self.have_cs: self.have_cs = len(wait_cond) wait_cond.append({3: 'e'}) # "Pixel compatibility" with the v2 implementation. Grab and # process the very first sample before checking for edges. The # previous implementation did this by seeding old values with # None, which led to an immediate "change" in comparison. pins = self.wait({}) (clk, miso, mosi, cs) = pins self.find_clk_edge(miso, mosi, clk, cs, True) while True: # Ignore identical samples early on (for performance reasons). pins = self.wait(wait_cond) (clk, miso, mosi, cs) = pins self.find_clk_edge(miso, mosi, clk, cs, False) libsigrokdecode-0.5.0/decoders/spi/__init__.py0000644000175000017500000000235713117367246016303 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' The SPI (Serial Peripheral Interface) protocol decoder supports synchronous SPI(-like) protocols with a clock line, a MISO and MOSI line for data transfer in two directions, and an optional CS# pin. Either MISO or MOSI (but not both) can be optional. If CS# is supplied, data is only decoded when CS# is asserted (clock transitions where CS# is not asserted are ignored). If CS# is not supplied, data is decoded on every clock transition (depending on SPI mode). ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/em4100/0000755000175000017500000000000013117367246014356 500000000000000libsigrokdecode-0.5.0/decoders/em4100/pd.py0000644000175000017500000002113713117367246015257 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Benjamin Larsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'em4100' name = 'EM4100' longname = 'RFID EM4100' desc = 'EM4100 100-150kHz RFID protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['em4100'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high', 'values': ('active-low', 'active-high')}, {'id': 'datarate' , 'desc': 'Data rate', 'default': 64, 'values': (64, 32, 16)}, # {'id': 'coding', 'desc': 'Bit coding', 'default': 'biphase', # 'values': ('biphase', 'manchester', 'psk')}, {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000}, ) annotations = ( ('bit', 'Bit'), ('header', 'Header'), ('version-customer', 'Version/customer'), ('data', 'Data'), ('rowparity-ok', 'Row parity OK'), ('rowparity-err', 'Row parity error'), ('colparity-ok', 'Column parity OK'), ('colparity-err', 'Column parity error'), ('stopbit', 'Stop bit'), ('tag', 'Tag'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('fields', 'Fields', (1, 2, 3, 4, 5, 6, 7, 8)), ('tags', 'Tags', (9,)), ) def __init__(self): self.samplerate = None self.oldpin = None self.last_samplenum = None self.lastlast_samplenum = None self.last_edge = 0 self.bit_width = 0 self.halfbit_limit = 0 self.oldpp = 0 self.oldpl = 0 self.oldsamplenum = 0 self.last_bit_pos = 0 self.ss_first = 0 self.first_one = 0 self.state = 'HEADER' self.data = 0 self.data_bits = 0 self.ss_data = 0 self.data_parity = 0 self.payload_cnt = 0 self.data_col_parity = [0, 0, 0, 0, 0, 0] self.col_parity = [0, 0, 0, 0, 0, 0] self.tag = 0 self.all_row_parity_ok = True self.col_parity_pos = [] def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.bit_width = (self.samplerate / self.options['coilfreq']) * self.options['datarate'] self.halfbit_limit = self.bit_width/2 + self.bit_width/4 self.polarity = 0 if self.options['polarity'] == 'active-low' else 1 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putbit(self, bit, ss, es): self.put(ss, es, self.out_ann, [0, [str(bit)]]) if self.state == 'HEADER': if bit == 1: if self.first_one > 0: self.first_one += 1 if self.first_one == 9: self.put(self.ss_first, es, self.out_ann, [1, ['Header', 'Head', 'He', 'H']]) self.first_one = 0 self.state = 'PAYLOAD' return if self.first_one == 0: self.first_one = 1 self.ss_first = ss if bit == 0: self.first_one = 0 return if self.state == 'PAYLOAD': self.payload_cnt += 1 if self.data_bits == 0: self.ss_data = ss self.data = 0 self.data_parity = 0 self.data_bits += 1 if self.data_bits == 5: s = 'Version/customer' if self.payload_cnt <= 10 else 'Data' c = 2 if self.payload_cnt <= 10 else 3 self.put(self.ss_data, ss, self.out_ann, [c, [s + ': %X' % self.data, '%X' % self.data]]) s = 'OK' if self.data_parity == bit else 'ERROR' c = 4 if s == 'OK' else 5 if s == 'ERROR': self.all_row_parity_ok = False self.put(ss, es, self.out_ann, [c, ['Row parity: ' + s, 'RP: ' + s, 'RP', 'R']]) self.tag = (self.tag << 4) | self.data self.data_bits = 0 if self.payload_cnt == 50: self.state = 'TRAILER' self.payload_cnt = 0 self.data_parity ^= bit self.data_col_parity[self.data_bits] ^= bit self.data = (self.data << 1) | bit return if self.state == 'TRAILER': self.payload_cnt += 1 if self.data_bits == 0: self.ss_data = ss self.data = 0 self.data_parity = 0 self.data_bits += 1 self.col_parity[self.data_bits] = bit self.col_parity_pos.append([ss, es]) if self.data_bits == 5: self.put(ss, es, self.out_ann, [8, ['Stop bit', 'SB', 'S']]) for i in range(1, 5): s = 'OK' if self.data_col_parity[i] == \ self.col_parity[i] else 'ERROR' c = 6 if s == 'OK' else 7 self.put(self.col_parity_pos[i - 1][0], self.col_parity_pos[i - 1][1], self.out_ann, [c, ['Column parity %d: %s' % (i, s), 'CP%d: %s' % (i, s), 'CP%d' % i, 'C']]) # Emit an annotation for valid-looking tags. all_col_parity_ok = (self.data_col_parity[1:5] == self.col_parity[1:5]) if all_col_parity_ok and self.all_row_parity_ok: self.put(self.ss_first, es, self.out_ann, [9, ['Tag: %010X' % self.tag, 'Tag', 'T']]) self.tag = 0 self.data_bits = 0 if self.payload_cnt == 5: self.state = 'HEADER' self.payload_cnt = 0 self.data_col_parity = [0, 0, 0, 0, 0, 0] self.col_parity = [0, 0, 0, 0, 0, 0] self.col_parity_pos = [] self.all_row_parity_ok = True def manchester_decode(self, pl, pp, pin): bit = self.oldpin ^ self.polarity if pl > self.halfbit_limit: es = int(self.samplenum - pl/2) if self.oldpl > self.halfbit_limit: ss = int(self.oldsamplenum - self.oldpl/2) else: ss = int(self.oldsamplenum - self.oldpl) self.putbit(bit, ss, es) self.last_bit_pos = int(self.samplenum - pl/2) else: es = int(self.samplenum) if self.oldpl > self.halfbit_limit: ss = int(self.oldsamplenum - self.oldpl/2) self.putbit(bit, ss, es) self.last_bit_pos = int(self.samplenum) else: if self.last_bit_pos <= self.oldsamplenum - self.oldpl: ss = int(self.oldsamplenum - self.oldpl) self.putbit(bit, ss, es) self.last_bit_pos = int(self.samplenum) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') # Initialize internal state from the very first sample. (pin,) = self.wait({'skip': 1}) self.oldpin = pin self.last_samplenum = self.samplenum self.lastlast_samplenum = self.samplenum self.last_edge = self.samplenum self.oldpl = 0 self.oldpp = 0 self.oldsamplenum = 0 self.last_bit_pos = 0 while True: # Ignore identical samples, only process edges. (pin,) = self.wait({0: 'e'}) pl = self.samplenum - self.oldsamplenum pp = pin self.manchester_decode(pl, pp, pin) self.oldpl = pl self.oldpp = pp self.oldsamplenum = self.samplenum self.oldpin = pin libsigrokdecode-0.5.0/decoders/em4100/__init__.py0000644000175000017500000000155213117367246016412 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Benjamin Larsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' EM4100 is a biphase/manchester/PSK based 100-150kHz RFID protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/avr_pdi/0000755000175000017500000000000013117367246015074 500000000000000libsigrokdecode-0.5.0/decoders/avr_pdi/pd.py0000644000175000017500000005753013117367246016003 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2011-2014 Uwe Hermann ## Copyright (C) 2016 Gerhard Sittig ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Note the implementation details: # # Although the Atmel literature suggests (does not explicitly mandate, # but shows in diagrams) that two stop bits are used in the protocol, # the decoder loses synchronization with ATxmega generated responses # when it expects more than one stop bit. Since the chip's hardware is # fixed, this is not an implementation error in some programmer software. # Since this is a protocol decoder which does not participate in the # communication (does not actively send data), we can read the data # stream with one stop bit, and transparently keep working when two # are used. # # Annotations in the UART fields level differ from Atmel literature. # Wrong parity bits are referred to as "parity error". Low stop bits are # referred to as "frame error". # # The PDI component in the device starts disabled. Enabling PDI # communication is done by raising DATA and clocking RESET with a # minimum frequency. PDI communication automatically gets disabled when # RESET "is inactive" for a certain period of time. The specific timing # conditions are rather fuzzy in the literature (phrased weakly), and # are device dependent (refer to the minumum RESET pulse width). This # protocol decoder implementation internally prepares for but currently # does not support these enable and disable phases. On the one hand it # avoids excess external dependencies or wrong results for legal input # data. On the other hand the decoder works when input streams start in # the middle of an established connection. # # Communication peers detect physical collisions. The decoder can't. # Upon collisions, a peer will cease any subsequent transmission, until # a BREAK is seen. Synchronization can get enforced by sending two BREAK # conditions. The first will cause a collision, the second will re-enable # the peer. The decoder has no concept of physical collisions. It stops # the interpretation of instructions when BREAK is seen, and assumes # that a new instruction will start after BREAK. # # This protocol decoder only supports PDI communication over UART frames. # It lacks support for PDI over JTAG. This would require separation into # multiple protocol decoder layers (UART physical, JTAG physical, PDI # instructions, optionally device support on top of PDI. There is some # more potential for future extensions: # - The JTAG physical has dedicated TX and RX directions. This decoder # only picks up communicated bytes but does not check which "line" # they are communicated on (not applicable to half duplex UART). # - PDI over JTAG uses "special frame error" conditions to communicate # additional symbols: BREAK (0xBB with parity 1), DELAY (0xDB with # parity 1), and EMPTY (0xEB with parity 1). # - Another "device support" layer might interpret device specific # timings, and might map addresses used in memory access operations # to component names, or even register names and bit fields(?). It's # quite deep a rabbithole though... import sigrokdecode as srd from collections import namedtuple class Ann: '''Annotation and binary output classes.''' ( BIT, START, DATA, PARITY_OK, PARITY_ERR, STOP_OK, STOP_ERR, BREAK, OPCODE, DATA_PROG, DATA_DEV, PDI_BREAK, ENABLE, DISABLE, COMMAND, ) = range(15) ( BIN_BYTES, ) = range(1) Bit = namedtuple('Bit', 'val ss es') class PDI: '''PDI protocol instruction opcodes, and operand formats.''' ( OP_LDS, OP_LD, OP_STS, OP_ST, OP_LDCS, OP_REPEAT, OP_STCS, OP_KEY, ) = range(8) pointer_format_nice = [ '*(ptr)', '*(ptr++)', 'ptr', 'ptr++ (rsv)', ] pointer_format_terse = [ '*p', '*p++', 'p', '(rsv)', ] ctrl_reg_name = { 0: 'status', 1: 'reset', 2: 'ctrl', } class Decoder(srd.Decoder): api_version = 3 id = 'avr_pdi' name = 'AVR PDI' longname = 'Atmel Program and Debug Interface' desc = 'Atmel proprietary interface for the ATxmega MCU.' license = 'gplv2+' inputs = ['logic'] outputs = ['pdi'] channels = ( {'id': 'reset', 'name': 'RESET', 'desc': 'RESET / PDI_CLK'}, {'id': 'data', 'name': 'DATA', 'desc': 'PDI_DATA'}, ) annotations = ( ('uart-bit', 'UART bit'), ('start-bit', 'Start bit'), ('data-bit', 'Data bit'), ('parity-ok', 'Parity OK bit'), ('parity-err', 'Parity error bit'), ('stop-ok', 'Stop OK bit'), ('stop-err', 'Stop error bit'), ('break', 'BREAK condition'), ('opcode', 'Instruction opcode'), ('data-prog', 'Programmer data'), ('data-dev', 'Device data'), ('pdi-break', 'BREAK at PDI level'), ('enable', 'Enable PDI'), ('disable', 'Disable PDI'), ('cmd-data', 'PDI command with data'), ) annotation_rows = ( ('uart_bits', 'UART bits', (Ann.BIT,)), ('uart_fields', 'UART fields', (Ann.START, Ann.DATA, Ann.PARITY_OK, Ann.PARITY_ERR, Ann.STOP_OK, Ann.STOP_ERR, Ann.BREAK)), ('pdi_fields', 'PDI fields', (Ann.OPCODE, Ann.DATA_PROG, Ann.DATA_DEV, Ann.PDI_BREAK)), ('pdi_cmds', 'PDI Cmds', (Ann.ENABLE, Ann.DISABLE, Ann.COMMAND)), ) binary = ( ('bytes', 'PDI protocol bytes'), ) def __init__(self): self.samplerate = None self.clear_state() def clear_state(self): # Track bit times and bit values. self.ss_last_fall = None self.data_sample = None self.ss_curr_fall = None # Collect UART frame bits into byte values. self.bits = [] self.zero_count = 0 self.zero_ss = None self.break_ss = None self.break_es = None self.clear_insn() def clear_insn(self): # Collect instructions and their arguments, # properties of the current instructions. self.insn_rep_count = 0 self.insn_opcode = None self.insn_wr_counts = [] self.insn_rd_counts = [] # Accumulation of data items as bytes pass by. self.insn_dat_bytes = [] self.insn_dat_count = 0 self.insn_ss_data = None # Next layer "commands", instructions plus operands. self.cmd_ss = None self.cmd_insn_parts_nice = [] self.cmd_insn_parts_terse = [] def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) def put_ann_bit(self, bit_nr, ann_idx): b = self.bits[bit_nr] self.put(b.ss, b.es, self.out_ann, [ann_idx, [str(b.val)]]) def put_ann_data(self, bit_nr, ann_data): b = self.bits[bit_nr] self.put(b.ss, b.es, self.out_ann, ann_data) def put_ann_row_val(self, ss, es, row, value): self.put(ss, es, self.out_ann, [row, value]) def put_bin_bytes(self, ss, es, row, value): self.put(ss, es, self.out_binary, [row, value]) def handle_byte(self, ss, es, byteval): '''Handle a byte at the PDI protocol layer.''' # Handle BREAK conditions, which will abort any # potentially currently executing instruction. is_break = byteval is None if is_break: self.cmd_insn_parts_nice.append('BREAK') self.cmd_insn_parts_terse.append('BRK') self.insn_rep_count = 0 # Will FALLTHROUGH to "end of instruction" below. # Decode instruction opcodes and argument sizes # from the first byte of a transaction. if self.insn_opcode is None and not is_break: opcode = (byteval & 0xe0) >> 5 arg30 = byteval & 0x0f arg32 = (byteval & 0x0c) >> 2 arg10 = byteval & 0x03 self.insn_opcode = opcode self.cmd_ss = ss mnemonics = None if opcode == PDI.OP_LDS: # LDS: load data, direct addressing. # Writes an address, reads a data item. width_addr = arg32 + 1 width_data = arg10 + 1 self.insn_wr_counts = [width_addr] self.insn_rd_counts = [width_data] mnemonics = [ 'Insn: LDS a{:d}, m{:d}'.format(width_addr, width_data), 'LDS a{:d}, m{:d}'.format(width_addr, width_data), 'LDS', ] self.cmd_insn_parts_nice = ['LDS'] self.cmd_insn_parts_terse = ['LDS'] elif opcode == PDI.OP_LD: # LD: load data, indirect addressing. # Reads a data item, with optional repeat. ptr_txt = PDI.pointer_format_nice[arg32] ptr_txt_terse = PDI.pointer_format_terse[arg32] width_data = arg10 + 1 self.insn_wr_counts = [] self.insn_rd_counts = [width_data] if self.insn_rep_count: self.insn_rd_counts.extend(self.insn_rep_count * [width_data]) self.insn_rep_count = 0 mnemonics = [ 'Insn: LD {:s} m{:d}'.format(ptr_txt, width_data), 'LD {:s} m{:d}'.format(ptr_txt, width_data), 'LD', ] self.cmd_insn_parts_nice = ['LD', ptr_txt] self.cmd_insn_parts_terse = ['LD', ptr_txt_terse] elif opcode == PDI.OP_STS: # STS: store data, direct addressing. # Writes an address, writes a data item. width_addr = arg32 + 1 width_data = arg10 + 1 self.insn_wr_counts = [width_addr, width_data] self.insn_rd_counts = [] mnemonics = [ 'Insn: STS a{:d}, i{:d}'.format(width_addr, width_data), 'STS a{:d}, i{:d}'.format(width_addr, width_data), 'STS', ] self.cmd_insn_parts_nice = ['STS'] self.cmd_insn_parts_terse = ['STS'] elif opcode == PDI.OP_ST: # ST: store data, indirect addressing. # Writes a data item, with optional repeat. ptr_txt = PDI.pointer_format_nice[arg32] ptr_txt_terse = PDI.pointer_format_terse[arg32] width_data = arg10 + 1 self.insn_wr_counts = [width_data] self.insn_rd_counts = [] if self.insn_rep_count: self.insn_wr_counts.extend(self.insn_rep_count * [width_data]) self.insn_rep_count = 0 mnemonics = [ 'Insn: ST {:s} i{:d}'.format(ptr_txt, width_data), 'ST {:s} i{:d}'.format(ptr_txt, width_data), 'ST', ] self.cmd_insn_parts_nice = ['ST', ptr_txt] self.cmd_insn_parts_terse = ['ST', ptr_txt_terse] elif opcode == PDI.OP_LDCS: # LDCS: load control/status. # Loads exactly one byte. reg_num = arg30 reg_txt = PDI.ctrl_reg_name.get(reg_num, 'r{:d}'.format(reg_num)) reg_txt_terse = '{:d}'.format(reg_num) self.insn_wr_counts = [] self.insn_rd_counts = [1] mnemonics = [ 'Insn: LDCS {:s}, m1'.format(reg_txt), 'LDCS {:s}, m1'.format(reg_txt), 'LDCS', ] self.cmd_insn_parts_nice = ['LDCS', reg_txt] self.cmd_insn_parts_terse = ['LDCS', reg_txt_terse] elif opcode == PDI.OP_STCS: # STCS: store control/status. # Writes exactly one byte. reg_num = arg30 reg_txt = PDI.ctrl_reg_name.get(reg_num, 'r{:d}'.format(reg_num)) reg_txt_terse = '{:d}'.format(reg_num) self.insn_wr_counts = [1] self.insn_rd_counts = [] mnemonics = [ 'Insn: STCS {:s}, i1'.format(reg_txt), 'STCS {:s}, i1'.format(reg_txt), 'STCS', ] self.cmd_insn_parts_nice = ['STCS', reg_txt] self.cmd_insn_parts_terse = ['STCS', reg_txt_terse] elif opcode == PDI.OP_REPEAT: # REPEAT: sets repeat count for the next instruction. # Reads repeat count from following bytes. width_data = arg10 + 1 self.insn_wr_counts = [width_data] self.insn_rd_counts = [] mnemonics = [ 'Insn: REPEAT i{:d}'.format(width_data), 'REPEAT i{:d}'.format(width_data), 'REP', ] self.cmd_insn_parts_nice = ['REPEAT'] self.cmd_insn_parts_terse = ['REP'] elif opcode == PDI.OP_KEY: # KEY: set activation key (enables PDIBUS mmap access). # Writes a sequence of 8 bytes, fixed length. width_data = 8 self.insn_wr_counts = [width_data] self.insn_rd_counts = [] mnemonics = [ 'Insn: KEY i{:d}'.format(width_data), 'KEY i{:d}'.format(width_data), 'KEY', ] self.cmd_insn_parts_nice = ['KEY'] self.cmd_insn_parts_terse = ['KEY'] # Emit an annotation for the instruction opcode. self.put_ann_row_val(ss, es, Ann.OPCODE, mnemonics) # Prepare to write/read operands/data bytes. self.insn_dat_bytes = [] if self.insn_wr_counts: self.insn_dat_count = self.insn_wr_counts[0] return if self.insn_rd_counts: self.insn_dat_count = self.insn_rd_counts[0] return # FALLTHROUGH. # When there are no operands or data bytes to read, # then fall through to the end of the instruction # handling below (which emits annotations). # Read bytes which carry operands (addresses, immediates) # or data values for memory access. if self.insn_dat_count and not is_break: # Accumulate received bytes until another multi byte # data item is complete. if not self.insn_dat_bytes: self.insn_ss_data = ss self.insn_dat_bytes.append(byteval) self.insn_dat_count -= 1 if self.insn_dat_count: return # Determine the data item's duration and direction, # "consume" its length spec (to simplify later steps). data_ss = self.insn_ss_data data_es = es if self.insn_wr_counts: data_ann = Ann.DATA_PROG data_width = self.insn_wr_counts.pop(0) elif self.insn_rd_counts: data_ann = Ann.DATA_DEV data_width = self.insn_rd_counts.pop(0) # PDI communicates multi-byte data items in little endian # order. Get a nice textual representation of the number, # wide and narrow for several zoom levels. self.insn_dat_bytes.reverse() data_txt_digits = ''.join(['{:02x}'.format(b) for b in self.insn_dat_bytes]) data_txt_hex = '0x' + data_txt_digits data_txt_prefix = 'Data: ' + data_txt_hex data_txts = [data_txt_prefix, data_txt_hex, data_txt_digits] self.insn_dat_bytes = [] # Emit an annotation for the data value. self.put_ann_row_val(data_ss, data_es, data_ann, data_txts) # Collect detailled information which describes the whole # command when combined (for a next layer annotation, # spanning the complete command). self.cmd_insn_parts_nice.append(data_txt_hex) self.cmd_insn_parts_terse.append(data_txt_digits) # Send out write data first until exhausted, # then drain expected read data. if self.insn_wr_counts: self.insn_dat_count = self.insn_wr_counts[0] return if self.insn_rd_counts: self.insn_dat_count = self.insn_rd_counts[0] return # FALLTHROUGH. # When all operands and data bytes were seen, # terminate the inspection of the instruction. # Postprocess the instruction after its operands were seen. cmd_es = es cmd_txt_nice = ' '.join(self.cmd_insn_parts_nice) cmd_txt_terse = ' '.join(self.cmd_insn_parts_terse) cmd_txts = [cmd_txt_nice, cmd_txt_terse] self.put_ann_row_val(self.cmd_ss, cmd_es, Ann.COMMAND, cmd_txts) if self.insn_opcode == PDI.OP_REPEAT and not is_break: # The last communicated data item is the repeat # count for the next instruction (i.e. it will # execute N+1 times when "REPEAT N" is specified). count = int(self.cmd_insn_parts_nice[-1], 0) self.insn_rep_count = count # Have the state for instruction decoding cleared, but make sure # to carry over REPEAT count specs between instructions. They # start out as zero, will be setup by REPEAT instructions, need # to get passed to the instruction which follows REPEAT. The # instruction which sees a non-zero repeat count which will # consume the counter and drop it to zero, then the counter # remains at zero until the next REPEAT instruction. save_rep_count = self.insn_rep_count self.clear_insn() self.insn_rep_count = save_rep_count def handle_bits(self, ss, es, bitval): '''Handle a bit at the UART layer.''' # Concentrate annotation literals here for easier maintenance. ann_class_text = { Ann.START: ['Start bit', 'Start', 'S'], Ann.PARITY_OK: ['Parity OK', 'Par OK', 'P'], Ann.PARITY_ERR: ['Parity error', 'Par ERR', 'PE'], Ann.STOP_OK: ['Stop bit', 'Stop', 'T'], Ann.STOP_ERR: ['Stop bit error', 'Stop ERR', 'TE'], Ann.BREAK: ['Break condition', 'BREAK', 'BRK'], } def put_uart_field(bitpos, annclass): self.put_ann_data(bitpos, [annclass, ann_class_text[annclass]]) # The number of bits which form one UART frame. Note that # the decoder operates with only one stop bit. frame_bitcount = 1 + 8 + 1 + 1 # Detect adjacent runs of all-zero bits. This is meant # to cope when BREAK conditions appear at any arbitrary # position, it need not be "aligned" to an UART frame. if bitval == 1: self.zero_count = 0 elif bitval == 0: if not self.zero_count: self.zero_ss = ss self.zero_count += 1 if self.zero_count == frame_bitcount: self.break_ss = self.zero_ss # BREAK conditions are _at_minimum_ the length of a UART frame, but # can span an arbitrary number of bit times. Track the "end sample" # value of the last low bit we have seen, and emit the annotation only # after the line went idle (high) again. Pass BREAK to the upper layer # as well. When the line is low, BREAK still is pending. When the line # is high, the current bit cannot be START, thus return from here. if self.break_ss is not None: if bitval == '0': self.break_es = es return self.put(self.break_ss, self.break_es, self.out_ann, [Ann.BREAK, ann_class_text[Ann.BREAK]]) self.handle_byte(self.break_ss, self.break_es, None) self.break_ss = None self.break_es = None self.bits = [] return # Ignore high bits when waiting for START. if not self.bits and bitval == 1: return # Store individual bits and their start/end sample numbers, # until a complete frame was received. self.bits.append(Bit(bitval, ss, es)) if len(self.bits) < frame_bitcount: return # Get individual fields of the UART frame. bits_num = sum([b.val << pos for pos, b in enumerate(self.bits)]) if False: # This logic could detect BREAK conditions which are aligned to # UART frames. Which was obsoleted by the above detection at # arbitrary positions. The code still can be useful to detect # "other kinds of frame errors" which carry valid symbols for # upper layers (the Atmel literature suggests "break", "delay", # and "empty" symbols when PDI is communicated over different # physical layers). if bits_num == 0: # BREAK self.break_ss = self.bits[0].ss self.break_es = es self.bits = [] return start_bit = bits_num & 0x01; bits_num >>= 1 data_val = bits_num & 0xff; bits_num >>= 8 data_text = '{:02x}'.format(data_val) parity_bit = bits_num & 0x01; bits_num >>= 1 stop_bit = bits_num & 0x01; bits_num >>= 1 # Check for frame errors. START _must_ have been low # according to the above accumulation logic. parity_ok = (bin(data_val).count('1') + parity_bit) % 2 == 0 stop_ok = stop_bit == 1 valid_frame = parity_ok and stop_ok # Emit annotations. for idx in range(frame_bitcount): self.put_ann_bit(idx, Ann.BIT) put_uart_field(0, Ann.START) self.put(self.bits[1].ss, self.bits[8].es, self.out_ann, [Ann.DATA, ['Data: ' + data_text, 'D: ' + data_text, data_text]]) put_uart_field(9, Ann.PARITY_OK if parity_ok else Ann.PARITY_ERR) put_uart_field(10, Ann.STOP_OK if stop_ok else Ann.STOP_ERR) # Emit binary data stream. Have bytes interpreted at higher layers. if valid_frame: byte_ss, byte_es = self.bits[0].ss, self.bits[-1].es self.put_bin_bytes(byte_ss, byte_es, Ann.BIN_BYTES, bytes([data_val])) self.handle_byte(byte_ss, byte_es, data_val) # Reset internal state for the next frame. self.bits = [] def handle_clk_edge(self, clock_pin, data_pin): # Sample the data line on rising clock edges. Always, for TX and for # RX bytes alike. if clock_pin == 1: self.data_sample = data_pin return # Falling clock edges are boundaries for bit slots. Inspect previously # sampled bits on falling clock edges, when the start and end sample # numbers were determined. Only inspect bit slots of known clock # periods (avoid interpreting the DATA line when the "enabled" state # has not yet been determined). self.ss_last_fall = self.ss_curr_fall self.ss_curr_fall = self.samplenum if self.ss_last_fall is None: return # Have the past bit slot processed. bit_ss, bit_es = self.ss_last_fall, self.ss_curr_fall bit_val = self.data_sample self.handle_bits(bit_ss, bit_es, bit_val) def decode(self): while True: self.handle_clk_edge(*self.wait({0: 'e'})) libsigrokdecode-0.5.0/decoders/avr_pdi/__init__.py0000644000175000017500000000352413117367246017131 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Gerhard Sittig ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' PDI (Program and Debug Interface) is an Atmel proprietary interface for external programming and on-chip debugging of the device. See the Atmel Application Note AVR1612 "PDI programming driver" and the "Program and Debug Interface" section in the Xmega A manual for details. The protocol uses two pins: the RESET pin and one dedicated DATA pin. The RESET pin provides a clock, the DATA pin communicates serial frames with a start bit, eight data bits, an even parity bit, and two stop bits. Data communication is bidirectional and half duplex, the device will provide response data after reception of a respective request. Protocol frames communicate opcodes and their arguments, which provides random and sequential access to the device's address space. By accessing the registers of internal peripherals, especially the NVM controller, it's possible to identify the device, read from and write to several kinds of memory (signature rows, fuses and lock bits, internal flash and EEPROM, memory mapped peripherals), and to control execution of software on the device. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ir_rc5/0000755000175000017500000000000013117367246014633 500000000000000libsigrokdecode-0.5.0/decoders/ir_rc5/pd.py0000644000175000017500000001511713117367246015535 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .lists import * class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 2 id = 'ir_rc5' name = 'IR RC-5' longname = 'IR RC-5' desc = 'RC-5 infrared remote control protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['ir_rc5'] channels = ( {'id': 'ir', 'name': 'IR', 'desc': 'IR data line'}, ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low', 'values': ('active-low', 'active-high')}, {'id': 'protocol', 'desc': 'Protocol type', 'default': 'standard', 'values': ('standard', 'extended')}, ) annotations = ( ('bit', 'Bit'), ('startbit1', 'Startbit 1'), ('startbit2', 'Startbit 2'), ('togglebit-0', 'Toggle bit 0'), ('togglebit-1', 'Toggle bit 1'), ('address', 'Address'), ('command', 'Command'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('fields', 'Fields', (1, 2, 3, 4, 5, 6)), ) def __init__(self): self.samplerate = None self.samplenum = None self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.old_ir = 1 if self.options['polarity'] == 'active-low' else 0 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value # One bit: 1.78ms (one half low, one half high). self.halfbit = int((self.samplerate * 0.00178) / 2.0) def putb(self, bit1, bit2, data): ss, es = self.ss_es_bits[bit1][0], self.ss_es_bits[bit2][1] self.put(ss, es, self.out_ann, data) def handle_bits(self): a, c, b = 0, 0, self.bits # Individual raw bits. for i in range(14): if i == 0: ss = max(0, self.bits[0][0] - self.halfbit) else: ss = self.ss_es_bits[i - 1][1] es = self.bits[i][0] + self.halfbit self.ss_es_bits.append([ss, es]) self.putb(i, i, [0, ['%d' % self.bits[i][1]]]) # Bits[0:0]: Startbit 1 s = ['Startbit1: %d' % b[0][1], 'SB1: %d' % b[0][1], 'SB1', 'S1', 'S'] self.putb(0, 0, [1, s]) # Bits[1:1]: Startbit 2 ann_idx = 2 s = ['Startbit2: %d' % b[1][1], 'SB2: %d' % b[1][1], 'SB2', 'S2', 'S'] if self.options['protocol'] == 'extended': s = ['CMD[6]#: %d' % b[1][1], 'C6#: %d' % b[1][1], 'C6#', 'C#', 'C'] ann_idx = 6 self.putb(1, 1, [ann_idx, s]) # Bits[2:2]: Toggle bit s = ['Togglebit: %d' % b[2][1], 'Toggle: %d' % b[2][1], 'TB: %d' % b[2][1], 'TB', 'T'] self.putb(2, 2, [3 if b[2][1] == 0 else 4, s]) # Bits[3:7]: Address (MSB-first) for i in range(5): a |= (b[3 + i][1] << (4 - i)) x = system.get(a, ['Unknown', 'Unk']) s = ['Address: %d (%s)' % (a, x[0]), 'Addr: %d (%s)' % (a, x[1]), 'Addr: %d' % a, 'A: %d' % a, 'A'] self.putb(3, 7, [5, s]) # Bits[8:13]: Command (MSB-first) for i in range(6): c |= (b[8 + i][1] << (5 - i)) if self.options['protocol'] == 'extended': inverted_bit6 = 1 if b[1][1] == 0 else 0 c |= (inverted_bit6 << 6) cmd_type = 'VCR' if x[1] in ('VCR1', 'VCR2') else 'TV' x = command[cmd_type].get(c, ['Unknown', 'Unk']) s = ['Command: %d (%s)' % (c, x[0]), 'Cmd: %d (%s)' % (c, x[1]), 'Cmd: %d' % c, 'C: %d' % c, 'C'] self.putb(8, 13, [6, s]) def edge_type(self): # Categorize according to distance from last edge (short/long). distance = self.samplenum - self.edges[-1] s, l, margin = self.halfbit, self.halfbit * 2, int(self.halfbit / 2) if distance in range(l - margin, l + margin + 1): return 'l' elif distance in range(s - margin, s + margin + 1): return 's' else: return 'e' # Error, invalid edge distance. def reset_decoder_state(self): self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' def decode(self, ss, es, data): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') for (self.samplenum, pins) in data: self.ir = pins[0] # Wait for any edge (rising or falling). if self.old_ir == self.ir: continue # State machine. if self.state == 'IDLE': self.edges.append(self.samplenum) self.bits.append([self.samplenum, 1]) self.state = 'MID1' self.old_ir = self.ir continue edge = self.edge_type() if edge == 'e': self.reset_decoder_state() # Reset state machine upon errors. continue if self.state == 'MID1': self.state = 'START1' if edge == 's' else 'MID0' bit = None if edge == 's' else 0 elif self.state == 'MID0': self.state = 'START0' if edge == 's' else 'MID1' bit = None if edge == 's' else 1 elif self.state == 'START1': if edge == 's': self.state = 'MID1' bit = 1 if edge == 's' else None elif self.state == 'START0': if edge == 's': self.state = 'MID0' bit = 0 if edge == 's' else None self.edges.append(self.samplenum) if bit is not None: self.bits.append([self.samplenum, bit]) if len(self.bits) == 14: self.handle_bits() self.reset_decoder_state() self.old_ir = self.ir libsigrokdecode-0.5.0/decoders/ir_rc5/__init__.py0000644000175000017500000000154413117367246016670 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' RC-5 is a biphase/manchester based infrared remote control protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ir_rc5/lists.py0000644000175000017500000000615713117367246016274 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Systems/addresses (0..31). Items that are not listed are reserved/unknown. system = { 0: ['TV receiver 1', 'TV1'], 1: ['TV receiver 2', 'TV2'], 2: ['Teletext', 'Txt'], 3: ['Extension to TV1 and TV2', 'Ext TV1/TV2'], 4: ['LaserVision player', 'LV'], 5: ['Video cassette recorder 1', 'VCR1'], 6: ['Video cassette recorder 2', 'VCR2'], 7: ['Experimental', 'Exp'], 8: ['Satellite TV receiver 1', 'Sat1'], 9: ['Extension to VCR1 and VCR2', 'Ext VCR1/VCR2'], 10: ['Satellite TV receiver 2', 'Sat2'], 12: ['Compact disc video player', 'CD-Video'], 13: ['Camcorder', 'Cam'], 14: ['Photo on compact disc player', 'CD-Photo'], 16: ['Audio preamplifier 1', 'Preamp1'], 17: ['Radio tuner', 'Tuner'], 18: ['Analog cassette recoder 1', 'Rec1'], 19: ['Audio preamplifier 2', 'Preamp2'], 20: ['Compact disc player', 'CD'], 21: ['Audio stack or record player', 'Combi'], 22: ['Audio satellite', 'Sat'], 23: ['Analog cassette recoder 2', 'Rec2'], 26: ['Compact disc recorder', 'CD-R'], 29: ['Lighting 1', 'Light1'], 30: ['Lighting 2', 'Light2'], 31: ['Telephone', 'Phone'], } digits = { 0: ['0', '0'], 1: ['1', '1'], 2: ['2', '2'], 3: ['3', '3'], 4: ['4', '4'], 5: ['5', '5'], 6: ['6', '6'], 7: ['7', '7'], 8: ['8', '8'], 9: ['9', '9'], } # Commands (0..63 for RC-5, and 0..127 for Extended RC-5). # Items that are not listed are reserved/unknown. command = { 'TV': dict(list(digits.items()) + list({ 10: ['-/--', '-/--'], 11: ['Channel/program', 'Ch/P'], 12: ['Standby', 'StBy'], 13: ['Mute', 'M'], 14: ['Personal preferences', 'PP'], 14: ['Display', 'Disp'], 16: ['Volume up', 'Vol+'], 17: ['Volume down', 'Vol-'], 18: ['Brightness up', 'Br+'], 19: ['Brightness down', 'Br-'], 20: ['Saturation up', 'S+'], 21: ['Saturation down', 'S-'], 32: ['Program up', 'P+'], 33: ['Program down', 'P-'], }.items())), 'VCR': dict(list(digits.items()) + list({ 10: ['-/--', '-/--'], 12: ['Standby', 'StBy'], 32: ['Program up', 'P+'], 33: ['Program down', 'P-'], 50: ['Fast rewind', 'FRW'], 52: ['Fast forward', 'FFW'], 53: ['Play', 'Pl'], 54: ['Stop', 'St'], 55: ['Recording', 'Rec'], }.items())), } libsigrokdecode-0.5.0/decoders/ssi32/0000755000175000017500000000000013117367246014413 500000000000000libsigrokdecode-0.5.0/decoders/ssi32/pd.py0000644000175000017500000000760713117367246015322 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Robert Bosch Car Multimedia GmbH ## Authors: Oleksij Rempel ## ## ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'ssi32' name = 'SSI32' longname = 'Synchronous Serial Interface (32bit)' desc = 'Synchronous Serial Interface (32bit) protocol.' license = 'gplv2+' inputs = ['spi'] outputs = ['ssi32'] options = ( {'id': 'msgsize', 'desc': 'Message size', 'default': 64}, ) annotations = ( ('ctrl-tx', 'CTRL TX'), ('ack-tx', 'ACK TX'), ('ctrl-rx', 'CTRL RX'), ('ack-rx', 'ACK RX'), ) annotation_rows = ( ('tx', 'TX', (0, 1)), ('rx', 'RX', (2, 3)), ) def __init__(self): self.ss_cmd, self.es_cmd = 0, 0 self.mosi_bytes = [] self.miso_bytes = [] self.es_array = [] self.rx_size = 0 self.tx_size = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def reset(self): self.mosi_bytes = [] self.miso_bytes = [] self.es_array = [] def handle_ack(self): # Only first byte should have ACK data, other 3 bytes are reserved. self.es_cmd = self.es_array[0] self.putx([1, ['> ACK:0x%02x' % (self.mosi_bytes[0])]]) self.putx([3, ['< ACK:0x%02x' % (self.miso_bytes[0])]]) def handle_ctrl(self): mosi = miso = '' self.tx_size = self.mosi_bytes[2] self.rx_size = self.miso_bytes[2] if self.tx_size > 0: mosi = ', DATA:0x' + ''.join(format(x, '02x') for x in self.mosi_bytes[4:self.tx_size + 4]) if self.rx_size > 0: miso = ', DATA:0x' + ''.join(format(x, '02x') for x in self.miso_bytes[4:self.rx_size + 4]) self.es_cmd = self.es_array[self.tx_size + 3] self.putx([0, ['> CTRL:0x%02x, LUN:0x%02x, SIZE:0x%02x, CRC:0x%02x%s' % (self.mosi_bytes[0], self.mosi_bytes[1], self.mosi_bytes[2], self.mosi_bytes[3], mosi)]]) self.es_cmd = self.es_array[self.rx_size + 3] self.putx([2, ['< CTRL:0x%02x, LUN:0x%02x, SIZE:0x%02x, CRC:0x%02x%s' % (self.miso_bytes[0], self.miso_bytes[1], self.miso_bytes[2], self.miso_bytes[3], miso)]]) def decode(self, ss, es, data): ptype = data[0] if ptype == 'CS-CHANGE': self.reset() return # Don't care about anything else. if ptype != 'DATA': return mosi, miso = data[1:] self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: self.ss_cmd = ss self.mosi_bytes.append(mosi) self.miso_bytes.append(miso) self.es_array.append(es) if self.mosi_bytes[0] & 0x80: if len(self.mosi_bytes) < 4: return self.handle_ack() self.reset() else: if len(self.mosi_bytes) < self.options['msgsize']: return self.handle_ctrl() self.reset() libsigrokdecode-0.5.0/decoders/ssi32/__init__.py0000644000175000017500000000175513117367246016454 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Robert Bosch Car Multimedia GmbH ## Authors: Oleksij Rempel ## ## ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the Bosch SSI32 protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/timing/0000755000175000017500000000000013117367246014737 500000000000000libsigrokdecode-0.5.0/decoders/timing/pd.py0000644000175000017500000001056213117367246015640 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Torsten Duwe ## Copyright (C) 2014 Sebastien Bourdelin ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from collections import deque class SamplerateError(Exception): pass def normalize_time(t): if abs(t) >= 1.0: return '%.3f s (%.3f Hz)' % (t, (1/t)) elif abs(t) >= 0.001: if 1/t/1000 < 1: return '%.3f ms (%.3f Hz)' % (t * 1000.0, (1/t)) else: return '%.3f ms (%.3f kHz)' % (t * 1000.0, (1/t)/1000) elif abs(t) >= 0.000001: if 1/t/1000/1000 < 1: return '%.3f μs (%.3f kHz)' % (t * 1000.0 * 1000.0, (1/t)/1000) else: return '%.3f μs (%.3f MHz)' % (t * 1000.0 * 1000.0, (1/t)/1000/1000) elif abs(t) >= 0.000000001: if 1/t/1000/1000/1000: return '%.3f ns (%.3f MHz)' % (t * 1000.0 * 1000.0 * 1000.0, (1/t)/1000/1000) else: return '%.3f ns (%.3f GHz)' % (t * 1000.0 * 1000.0 * 1000.0, (1/t)/1000/1000/1000) else: return '%f' % t class Decoder(srd.Decoder): api_version = 3 id = 'timing' name = 'Timing' longname = 'Timing calculation with frequency and averaging' desc = 'Calculate time between edges.' license = 'gplv2+' inputs = ['logic'] outputs = ['timing'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) annotations = ( ('time', 'Time'), ('average', 'Average'), ('delta', 'Delta'), ) annotation_rows = ( ('time', 'Time', (0,)), ('average', 'Average', (1,)), ('delta', 'Delta', (2,)), ) options = ( { 'id': 'avg_period', 'desc': 'Averaging period', 'default': 100 }, { 'id': 'edge', 'desc': 'Edges to check', 'default': 'any', 'values': ('any', 'rising', 'falling') }, { 'id': 'delta', 'desc': 'Show delta from last', 'default': 'no', 'values': ('yes', 'no') }, ) def __init__(self): self.samplerate = None self.last_samplenum = None self.last_n = deque() self.chunks = 0 self.level_changed = False self.last_t = None def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.edge = self.options['edge'] def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: if self.edge == 'rising': pin = self.wait({0: 'r'}) elif self.edge == 'falling': pin = self.wait({0: 'f'}) else: pin = self.wait({0: 'e'}) if not self.last_samplenum: self.last_samplenum = self.samplenum continue samples = self.samplenum - self.last_samplenum t = samples / self.samplerate if t > 0: self.last_n.append(t) if len(self.last_n) > self.options['avg_period']: self.last_n.popleft() self.put(self.last_samplenum, self.samplenum, self.out_ann, [0, [normalize_time(t)]]) if self.options['avg_period'] > 0: self.put(self.last_samplenum, self.samplenum, self.out_ann, [1, [normalize_time(sum(self.last_n) / len(self.last_n))]]) if self.last_t and self.options['delta'] == 'yes': self.put(self.last_samplenum, self.samplenum, self.out_ann, [2, [normalize_time(t - self.last_t)]]) self.last_t = t self.last_samplenum = self.samplenum libsigrokdecode-0.5.0/decoders/timing/__init__.py0000644000175000017500000000150713117367246016773 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Torsten Duwe ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' Timing decoder, find the time between edges. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/dcf77/0000755000175000017500000000000013117367246014362 500000000000000libsigrokdecode-0.5.0/decoders/dcf77/pd.py0000644000175000017500000002765413117367246015275 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2016 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import calendar from common.srdhelper import bcd2int class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'dcf77' name = 'DCF77' longname = 'DCF77 time protocol' desc = 'European longwave time signal (77.5kHz carrier signal).' license = 'gplv2+' inputs = ['logic'] outputs = ['dcf77'] channels = ( {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'}, ) annotations = ( ('start-of-minute', 'Start of minute'), ('special-bits', 'Special bits (civil warnings, weather forecast)'), ('call-bit', 'Call bit'), ('summer-time', 'Summer time announcement'), ('cest', 'CEST bit'), ('cet', 'CET bit'), ('leap-second', 'Leap second bit'), ('start-of-time', 'Start of encoded time'), ('minute', 'Minute'), ('minute-parity', 'Minute parity bit'), ('hour', 'Hour'), ('hour-parity', 'Hour parity bit'), ('day', 'Day of month'), ('day-of-week', 'Day of week'), ('month', 'Month'), ('year', 'Year'), ('date-parity', 'Date parity bit'), ('raw-bits', 'Raw bits'), ('unknown-bits', 'Unknown bits'), ('warnings', 'Human-readable warnings'), ) annotation_rows = ( ('bits', 'Bits', (17, 18)), ('fields', 'Fields', tuple(range(0, 16 + 1))), ('warnings', 'Warnings', (19,)), ) def __init__(self): self.samplerate = None self.state = 'WAIT FOR RISING EDGE' self.ss_bit = self.ss_bit_old = self.es_bit = self.ss_block = 0 self.datebits = [] self.bitcount = 0 # Counter for the DCF77 bits (0..58) self.dcf77_bitnumber_is_known = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def putx(self, data): # Annotation for a single DCF77 bit. self.put(self.ss_bit, self.es_bit, self.out_ann, data) def putb(self, data): # Annotation for a multi-bit DCF77 field. self.put(self.ss_block, self.samplenum, self.out_ann, data) # TODO: Which range to use? Only the 100ms/200ms or full second? def handle_dcf77_bit(self, bit): c = self.bitcount # Create one annotation for each DCF77 bit (containing the 0/1 value). # Use 'Unknown DCF77 bit x: val' if we're not sure yet which of the # 0..58 bits it is (because we haven't seen a 'new minute' marker yet). # Otherwise, use 'DCF77 bit x: val'. s = 'B' if self.dcf77_bitnumber_is_known else 'Unknown b' ann = 17 if self.dcf77_bitnumber_is_known else 18 self.putx([ann, ['%sit %d: %d' % (s, c, bit), '%d' % bit]]) # If we're not sure yet which of the 0..58 DCF77 bits we have, return. # We don't want to decode bogus data. if not self.dcf77_bitnumber_is_known: return # Collect bits 36-58, we'll need them for a parity check later. if c in range(36, 58 + 1): self.datebits.append(bit) # Output specific "decoded" annotations for the respective DCF77 bits. if c == 0: # Start of minute: DCF bit 0. if bit == 0: self.putx([0, ['Start of minute (always 0)', 'Start of minute', 'SoM']]) else: self.putx([19, ['Start of minute != 0', 'SoM != 0']]) elif c in range(1, 14 + 1): # Special bits (civil warnings, weather forecast): DCF77 bits 1-14. if c == 1: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 1)) if c == 14: s = bin(self.tmp)[2:].zfill(14) self.putb([1, ['Special bits: %s' % s, 'SB: %s' % s]]) elif c == 15: s = '' if (bit == 1) else 'not ' self.putx([2, ['Call bit: %sset' % s, 'CB: %sset' % s]]) # TODO: Previously this bit indicated use of the backup antenna. elif c == 16: s = '' if (bit == 1) else 'not ' x = 'yes' if (bit == 1) else 'no' self.putx([3, ['Summer time announcement: %sactive' % s, 'Summer time: %sactive' % s, 'Summer time: %s' % x, 'ST: %s' % x]]) elif c == 17: s = '' if (bit == 1) else 'not ' x = 'yes' if (bit == 1) else 'no' self.putx([4, ['CEST: %sin effect' % s, 'CEST: %s' % x]]) elif c == 18: s = '' if (bit == 1) else 'not ' x = 'yes' if (bit == 1) else 'no' self.putx([5, ['CET: %sin effect' % s, 'CET: %s' % x]]) elif c == 19: s = '' if (bit == 1) else 'not ' x = 'yes' if (bit == 1) else 'no' self.putx([6, ['Leap second announcement: %sactive' % s, 'Leap second: %sactive' % s, 'Leap second: %s' % x, 'LS: %s' % x]]) elif c == 20: # Start of encoded time: DCF bit 20. if bit == 1: self.putx([7, ['Start of encoded time (always 1)', 'Start of encoded time', 'SoeT']]) else: self.putx([19, ['Start of encoded time != 1', 'SoeT != 1']]) elif c in range(21, 27 + 1): # Minutes (0-59): DCF77 bits 21-27 (BCD format). if c == 21: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 21)) if c == 27: m = bcd2int(self.tmp) self.putb([8, ['Minutes: %d' % m, 'Min: %d' % m]]) elif c == 28: # Even parity over minute bits (21-28): DCF77 bit 28. self.tmp |= (bit << (c - 21)) parity = bin(self.tmp).count('1') s = 'OK' if ((parity % 2) == 0) else 'INVALID!' self.putx([9, ['Minute parity: %s' % s, 'Min parity: %s' % s]]) elif c in range(29, 34 + 1): # Hours (0-23): DCF77 bits 29-34 (BCD format). if c == 29: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 29)) if c == 34: self.putb([10, ['Hours: %d' % bcd2int(self.tmp)]]) elif c == 35: # Even parity over hour bits (29-35): DCF77 bit 35. self.tmp |= (bit << (c - 29)) parity = bin(self.tmp).count('1') s = 'OK' if ((parity % 2) == 0) else 'INVALID!' self.putx([11, ['Hour parity: %s' % s]]) elif c in range(36, 41 + 1): # Day of month (1-31): DCF77 bits 36-41 (BCD format). if c == 36: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 36)) if c == 41: self.putb([12, ['Day: %d' % bcd2int(self.tmp)]]) elif c in range(42, 44 + 1): # Day of week (1-7): DCF77 bits 42-44 (BCD format). # A value of 1 means Monday, 7 means Sunday. if c == 42: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 42)) if c == 44: d = bcd2int(self.tmp) dn = calendar.day_name[d - 1] # day_name[0] == Monday self.putb([13, ['Day of week: %d (%s)' % (d, dn), 'DoW: %d (%s)' % (d, dn)]]) elif c in range(45, 49 + 1): # Month (1-12): DCF77 bits 45-49 (BCD format). if c == 45: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 45)) if c == 49: m = bcd2int(self.tmp) mn = calendar.month_name[m] # month_name[1] == January self.putb([14, ['Month: %d (%s)' % (m, mn), 'Mon: %d (%s)' % (m, mn)]]) elif c in range(50, 57 + 1): # Year (0-99): DCF77 bits 50-57 (BCD format). if c == 50: self.tmp = bit self.ss_block = self.ss_bit else: self.tmp |= (bit << (c - 50)) if c == 57: self.putb([15, ['Year: %d' % bcd2int(self.tmp)]]) elif c == 58: # Even parity over date bits (36-58): DCF77 bit 58. parity = self.datebits.count(1) s = 'OK' if ((parity % 2) == 0) else 'INVALID!' self.putx([16, ['Date parity: %s' % s, 'DP: %s' % s]]) self.datebits = [] else: raise Exception('Invalid DCF77 bit: %d' % c) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: if self.state == 'WAIT FOR RISING EDGE': # Wait until the next rising edge occurs. self.wait({0: 'r'}) # Save the sample number where the DCF77 bit begins. self.ss_bit = self.samplenum # Calculate the length (in ms) between two rising edges. len_edges = self.ss_bit - self.ss_bit_old len_edges_ms = int((len_edges / self.samplerate) * 1000) # The time between two rising edges is usually around 1000ms. # For DCF77 bit 59, there is no rising edge at all, i.e. the # time between DCF77 bit 59 and DCF77 bit 0 (of the next # minute) is around 2000ms. Thus, if we see an edge with a # 2000ms distance to the last one, this edge marks the # beginning of a new minute (and DCF77 bit 0 of that minute). if len_edges_ms in range(1600, 2400 + 1): self.bitcount = 0 self.ss_bit_old = self.ss_bit self.dcf77_bitnumber_is_known = 1 self.ss_bit_old = self.ss_bit self.state = 'GET BIT' elif self.state == 'GET BIT': # Wait until the next falling edge occurs. self.wait({0: 'f'}) # Save the sample number where the DCF77 bit ends. self.es_bit = self.samplenum # Calculate the length (in ms) of the current high period. len_high = self.samplenum - self.ss_bit len_high_ms = int((len_high / self.samplerate) * 1000) # If the high signal was 100ms long, that encodes a 0 bit. # If it was 200ms long, that encodes a 1 bit. if len_high_ms in range(40, 160 + 1): bit = 0 elif len_high_ms in range(161, 260 + 1): bit = 1 else: bit = -1 # TODO: Error? # There's no bit 59, make sure none is decoded. if bit in (0, 1) and self.bitcount in range(0, 58 + 1): self.handle_dcf77_bit(bit) self.bitcount += 1 self.state = 'WAIT FOR RISING EDGE' libsigrokdecode-0.5.0/decoders/dcf77/__init__.py0000644000175000017500000000167113117367246016420 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This PD decodes the DCF77 protocol (a European long-wave time signal that uses a 77.5kHz carrier frequency). Details: http://en.wikipedia.org/wiki/DCF77 ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/wiegand/0000755000175000017500000000000013117367246015066 500000000000000libsigrokdecode-0.5.0/decoders/wiegand/pd.py0000644000175000017500000001163313117367246015767 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Sean Burford ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'wiegand' name = 'Wiegand' longname = 'Wiegand interface' desc = 'Wiegand interface for electronic entry systems.' license = 'gplv2+' inputs = ['logic'] outputs = ['wiegand'] channels = ( {'id': 'd0', 'name': 'D0', 'desc': 'Data 0 line'}, {'id': 'd1', 'name': 'D1', 'desc': 'Data 1 line'}, ) options = ( {'id': 'active', 'desc': 'Data lines active level', 'default': 'low', 'values': ('low', 'high')}, {'id': 'bitwidth_ms', 'desc': 'Single bit width in milliseconds', 'default': 4, 'values': (1, 2, 4, 8, 16, 32)}, ) annotations = ( ('bits', 'Bits'), ('state', 'State'), ) annotation_rows = ( ('bits', 'Binary value', (0,)), ('state', 'Stream state', (1,)), ) def __init__(self): self._samples_per_bit = 10 self._d0_prev = None self._d1_prev = None self._state = None self.ss_state = None self.ss_bit = None self.es_bit = None self._bit = None self._bits = [] def start(self): 'Register output types and verify user supplied decoder values.' self.out_ann = self.register(srd.OUTPUT_ANN) self._active = self.options['active'] == 'high' and 1 or 0 self._inactive = 1 - self._active def metadata(self, key, value): 'Receive decoder metadata about the data stream.' if key == srd.SRD_CONF_SAMPLERATE: ms_per_sample = 1000 * (1.0 / value) ms_per_bit = float(self.options['bitwidth_ms']) self._samples_per_bit = int(max(1, int(ms_per_bit / ms_per_sample))) def _update_state(self, state, bit=None): 'Update state and bit values when they change.' if self._bit is not None: self._bits.append(self._bit) self.put(self.ss_bit, self.samplenum, self.out_ann, [0, [str(self._bit)]]) self._bit = bit self.ss_bit = self.samplenum if bit is not None: # Set a timeout so that the final bit ends. self.es_bit = self.samplenum + self._samples_per_bit else: self.es_bit = None if state != self._state: ann = None if self._state == 'data': accum_bits = ''.join(str(x) for x in self._bits) ann = [1, ['%d bits %s' % (len(self._bits), accum_bits), '%d bits' % len(self._bits)]] elif self._state == 'invalid': ann = [1, [self._state]] if ann: self.put(self.ss_state, self.samplenum, self.out_ann, ann) self.ss_state = self.samplenum self._state = state self._bits = [] def decode(self, ss, es, data): for self.samplenum, (d0, d1) in data: if d0 == self._d0_prev and d1 == self._d1_prev: if self.es_bit and self.samplenum >= self.es_bit: if (d0, d1) == (self._inactive, self._inactive): self._update_state('idle') else: self._update_state('invalid') continue if self._state in (None, 'idle', 'data'): if (d0, d1) == (self._active, self._inactive): self._update_state('data', 0) elif (d0, d1) == (self._inactive, self._active): self._update_state('data', 1) elif (d0, d1) == (self._active, self._active): self._update_state('invalid') elif self._state == 'invalid': # Wait until we see an idle state before leaving invalid. # This prevents inverted lines from being misread. if (d0, d1) == (self._inactive, self._inactive): self._update_state('idle') self._d0_prev, self._d1_prev = d0, d1 def report(self): return '%s: %s D0 %d D1 %d (active on %d), %d samples per bit' % ( self.name, self._state, self._d0_prev, self._d1_prev, self._active, self._samples_per_bit) libsigrokdecode-0.5.0/decoders/wiegand/__init__.py0000644000175000017500000000175213117367246017124 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Sean Burford ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' The Wiegand interface is a de facto wiring standard commonly used to connect a card swipe mechanism to the rest of an electronic entry system. Details: https://en.wikipedia.org/wiki/Wiegand_interface ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/i2s/0000755000175000017500000000000013117367246014145 500000000000000libsigrokdecode-0.5.0/decoders/i2s/pd.py0000644000175000017500000001346513117367246015053 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Joel Holdsworth ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd ''' OUTPUT_PYTHON format: Packet: [, ] , : - 'DATA', [, ] : 'L' or 'R' : integer ''' class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'i2s' name = 'I²S' longname = 'Integrated Interchip Sound' desc = 'Serial bus for connecting digital audio devices.' license = 'gplv2+' inputs = ['logic'] outputs = ['i2s'] channels = ( {'id': 'sck', 'name': 'SCK', 'desc': 'Bit clock line'}, {'id': 'ws', 'name': 'WS', 'desc': 'Word select line'}, {'id': 'sd', 'name': 'SD', 'desc': 'Serial data line'}, ) annotations = ( ('left', 'Left channel'), ('right', 'Right channel'), ('warnings', 'Warnings'), ) binary = ( ('wav', 'WAV file'), ) def __init__(self): self.samplerate = None self.oldws = 1 self.bitcount = 0 self.data = 0 self.samplesreceived = 0 self.first_sample = None self.ss_block = None self.wordlength = -1 self.wrote_wav_header = False def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def putpb(self, data): self.put(self.ss_block, self.samplenum, self.out_python, data) def putbin(self, data): self.put(self.ss_block, self.samplenum, self.out_binary, data) def putb(self, data): self.put(self.ss_block, self.samplenum, self.out_ann, data) def report(self): # Calculate the sample rate. samplerate = '?' if self.ss_block is not None and \ self.first_sample is not None and \ self.ss_block > self.first_sample: samplerate = '%d' % (self.samplesreceived * self.samplerate / (self.ss_block - self.first_sample)) return 'I²S: %d %d-bit samples received at %sHz' % \ (self.samplesreceived, self.wordlength, samplerate) def wav_header(self): # Chunk descriptor h = b'RIFF' h += b'\x24\x80\x00\x00' # Chunk size (2084) h += b'WAVE' # Fmt subchunk h += b'fmt ' h += b'\x10\x00\x00\x00' # Subchunk size (16 bytes) h += b'\x01\x00' # Audio format (0x0001 == PCM) h += b'\x02\x00' # Number of channels (2) h += b'\x80\x3e\x00\x00' # Samplerate (16000) h += b'\x00\x7d\x00\x00' # Byterate (32000) h += b'\x04\x00' # Blockalign (4) h += b'\x10\x00' # Bits per sample (16) # Data subchunk h += b'data' h += b'\xff\xff\x00\x00' # Subchunk size (65535 bytes) TODO return h def wav_sample(self, sample): # TODO: This currently assumes U32 samples, and converts to S16. s = sample >> 16 if s >= 0x8000: s -= 0x10000 lo, hi = s & 0xff, (s >> 8) & 0xff return bytes([lo, hi]) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: # Wait for a rising edge on the SCK pin. sck, ws, sd = self.wait({0: 'r'}) self.data = (self.data << 1) | sd self.bitcount += 1 # This was not the LSB unless WS has flipped. if ws == self.oldws: continue # Only submit the sample, if we received the beginning of it. if self.ss_block is not None: if not self.wrote_wav_header: self.put(0, 0, self.out_binary, [0, self.wav_header()]) self.wrote_wav_header = True self.samplesreceived += 1 idx = 0 if self.oldws else 1 c1 = 'Left channel' if self.oldws else 'Right channel' c2 = 'Left' if self.oldws else 'Right' c3 = 'L' if self.oldws else 'R' v = '%08x' % self.data self.putpb(['DATA', [c3, self.data]]) self.putb([idx, ['%s: %s' % (c1, v), '%s: %s' % (c2, v), '%s: %s' % (c3, v), c3]]) self.putbin([0, self.wav_sample(self.data)]) # Check that the data word was the correct length. if self.wordlength != -1 and self.wordlength != self.bitcount: self.putb([2, ['Received %d-bit word, expected %d-bit ' 'word' % (self.bitcount, self.wordlength)]]) self.wordlength = self.bitcount # Reset decoder state. self.data = 0 self.bitcount = 0 self.ss_block = self.samplenum # Save the first sample position. if self.first_sample is None: self.first_sample = self.samplenum self.oldws = ws libsigrokdecode-0.5.0/decoders/i2s/__init__.py0000644000175000017500000000200013117367246016166 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Joel Holdsworth ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' I²S (Integrated Interchip Sound) is a serial bus for connecting digital audio devices (usually on the same device/board). Details: http://www.nxp.com/acrobat_download/various/I2SBUS.pdf http://en.wikipedia.org/wiki/I2s ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/tlc5620/0000755000175000017500000000000013117367246014547 500000000000000libsigrokdecode-0.5.0/decoders/tlc5620/pd.py0000644000175000017500000001770613117367246015457 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd dacs = { 0: 'DACA', 1: 'DACB', 2: 'DACC', 3: 'DACD', } class Decoder(srd.Decoder): api_version = 3 id = 'tlc5620' name = 'TI TLC5620' longname = 'Texas Instruments TLC5620' desc = 'Texas Instruments TLC5620 8-bit quad DAC.' license = 'gplv2+' inputs = ['logic'] outputs = ['tlc5620'] channels = ( {'id': 'clk', 'name': 'CLK', 'desc': 'Serial interface clock'}, {'id': 'data', 'name': 'DATA', 'desc': 'Serial interface data'}, ) optional_channels = ( {'id': 'load', 'name': 'LOAD', 'desc': 'Serial interface load control'}, {'id': 'ldac', 'name': 'LDAC', 'desc': 'Load DAC'}, ) options = ( {'id': 'vref_a', 'desc': 'Reference voltage DACA (V)', 'default': 3.3}, {'id': 'vref_b', 'desc': 'Reference voltage DACB (V)', 'default': 3.3}, {'id': 'vref_c', 'desc': 'Reference voltage DACC (V)', 'default': 3.3}, {'id': 'vref_d', 'desc': 'Reference voltage DACD (V)', 'default': 3.3}, ) annotations = ( ('dac-select', 'DAC select'), ('gain', 'Gain'), ('value', 'DAC value'), ('data-latch', 'Data latch point'), ('ldac-fall', 'LDAC falling edge'), ('bit', 'Bit'), ('reg-write', 'Register write'), ('voltage-update', 'Voltage update'), ('voltage-update-all', 'Voltage update (all DACs)'), ('invalid-cmd', 'Invalid command'), ) annotation_rows = ( ('bits', 'Bits', (5,)), ('fields', 'Fields', (0, 1, 2)), ('registers', 'Registers', (6, 7)), ('voltage-updates', 'Voltage updates', (8,)), ('events', 'Events', (3, 4)), ('errors', 'Errors', (9,)), ) def __init__(self): self.bits = [] self.ss_dac_first = None self.ss_dac = self.es_dac = 0 self.ss_gain = self.es_gain = 0 self.ss_value = self.es_value = 0 self.dac_select = self.gain = self.dac_value = None self.dacval = {'A': '?', 'B': '?', 'C': '?', 'D': '?'} self.gains = {'A': '?', 'B': '?', 'C': '?', 'D': '?'} def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def handle_11bits(self): # Only look at the last 11 bits, the rest is ignored by the TLC5620. if len(self.bits) > 11: self.bits = self.bits[-11:] # If there are less than 11 bits, something is probably wrong. if len(self.bits) < 11: ss, es = self.samplenum, self.samplenum if len(self.bits) >= 2: ss = self.bits[0][1] es = self.bits[-1][1] + (self.bits[1][1] - self.bits[0][1]) self.put(ss, es, self.out_ann, [9, ['Command too short']]) self.bits = [] return False self.ss_dac = self.bits[0][1] self.es_dac = self.ss_gain = self.bits[2][1] self.es_gain = self.ss_value = self.bits[3][1] self.clock_width = self.es_gain - self.ss_gain self.es_value = self.bits[10][1] + self.clock_width # Guessed. if self.ss_dac_first is None: self.ss_dac_first = self.ss_dac s = ''.join(str(i[0]) for i in self.bits[:2]) self.dac_select = s = dacs[int(s, 2)] self.put(self.ss_dac, self.es_dac, self.out_ann, [0, ['DAC select: %s' % s, 'DAC sel: %s' % s, 'DAC: %s' % s, 'D: %s' % s, s, s[3]]]) self.gain = g = 1 + self.bits[2][0] self.put(self.ss_gain, self.es_gain, self.out_ann, [1, ['Gain: x%d' % g, 'G: x%d' % g, 'x%d' % g]]) s = ''.join(str(i[0]) for i in self.bits[3:]) self.dac_value = v = int(s, 2) self.put(self.ss_value, self.es_value, self.out_ann, [2, ['DAC value: %d' % v, 'Value: %d' % v, 'Val: %d' % v, 'V: %d' % v, '%d' % v]]) # Emit an annotation for each bit. for i in range(1, 11): self.put(self.bits[i - 1][1], self.bits[i][1], self.out_ann, [5, [str(self.bits[i - 1][0])]]) self.put(self.bits[10][1], self.bits[10][1] + self.clock_width, self.out_ann, [5, [str(self.bits[10][0])]]) self.bits = [] return True def handle_falling_edge_load(self): if not self.handle_11bits(): return s, v, g = self.dac_select, self.dac_value, self.gain self.put(self.samplenum, self.samplenum, self.out_ann, [3, ['Falling edge on LOAD', 'LOAD fall', 'F']]) vref = self.options['vref_%s' % self.dac_select[3].lower()] v = '%.2fV' % (vref * (v / 256) * self.gain) if self.ldac == 0: # If LDAC is low, the voltage is set immediately. self.put(self.ss_dac, self.es_value, self.out_ann, [7, ['Setting %s voltage to %s' % (s, v), '%s=%s' % (s, v)]]) else: # If LDAC is high, the voltage is not set immediately, but rather # stored in a register. When LDAC goes low all four DAC voltages # (DAC A/B/C/D) will be set at the same time. self.put(self.ss_dac, self.es_value, self.out_ann, [6, ['Setting %s register value to %s' % \ (s, v), '%s=%s' % (s, v)]]) # Save the last value the respective DAC was set to. self.dacval[self.dac_select[-1]] = str(self.dac_value) self.gains[self.dac_select[-1]] = self.gain def handle_falling_edge_ldac(self): self.put(self.samplenum, self.samplenum, self.out_ann, [4, ['Falling edge on LDAC', 'LDAC fall', 'LDAC', 'L']]) # Don't emit any annotations if we didn't see any register writes. if self.ss_dac_first is None: return # Calculate voltages based on Vref and the per-DAC gain. dacval = {} for key, val in self.dacval.items(): if val == '?': dacval[key] = '?' else: vref = self.options['vref_%s' % key.lower()] v = vref * (int(val) / 256) * self.gains[key] dacval[key] = '%.2fV' % v s = ''.join(['DAC%s=%s ' % (d, dacval[d]) for d in 'ABCD']).strip() self.put(self.ss_dac_first, self.samplenum, self.out_ann, [8, ['Updating voltages: %s' % s, s, s.replace('DAC', '')]]) self.ss_dac_first = None def handle_new_dac_bit(self, datapin): self.bits.append([datapin, self.samplenum]) def decode(self): while True: # DATA is shifted in the DAC on the falling CLK edge (MSB-first). # A falling edge of LOAD will latch the data. # Wait for one (or multiple) of the following conditions: # a) Falling edge on CLK, and/or # b) Falling edge on LOAD, and/or # b) Falling edge on LDAC pins = self.wait([{0: 'f'}, {2: 'f'}, {3: 'f'}]) self.ldac = pins[3] # Handle those conditions (one or more) that matched this time. if self.matched[0]: self.handle_new_dac_bit(pins[1]) if self.matched[1]: self.handle_falling_edge_load() if self.matched[2]: self.handle_falling_edge_ldac() libsigrokdecode-0.5.0/decoders/tlc5620/__init__.py0000644000175000017500000000152313117367246016601 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' The Texas Instruments TLC5620 is an 8-bit quad DAC. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/microwire/0000755000175000017500000000000013117367246015450 500000000000000libsigrokdecode-0.5.0/decoders/microwire/pd.py0000644000175000017500000002107613117367246016353 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Kevin Redon ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from collections import namedtuple ''' OUTPUT_PYTHON format: Packet: [namedtuple('ss': bit start sample number, 'es': bit end sample number, 'si': SI bit, 'so': SO bit, ), ...] Since address and word size are variable, a list of all bits in each packet need to be output. Since Microwire is a synchronous protocol with separate input and output lines (SI and SO) they are provided together, but because Microwire is half-duplex only the SI or SO bits will be considered at once. To be able to annotate correctly the instructions formed by the bit, the start and end sample number of each bit (pair of SI/SO bit) are provided. ''' PyPacket = namedtuple('PyPacket', 'ss es si so') Packet = namedtuple('Packet', 'samplenum matched cs sk si so') class Decoder(srd.Decoder): api_version = 3 id = 'microwire' name = 'Microwire' longname = 'Microwire' desc = '3-wire, half-duplex, synchronous serial bus.' license = 'gplv2+' inputs = ['logic'] outputs = ['microwire'] channels = ( {'id': 'cs', 'name': 'CS', 'desc': 'Chip select'}, {'id': 'sk', 'name': 'SK', 'desc': 'Clock'}, {'id': 'si', 'name': 'SI', 'desc': 'Slave in'}, {'id': 'so', 'name': 'SO', 'desc': 'Slave out'}, ) annotations = ( ('start-bit', 'Start bit'), ('si-bit', 'SI bit'), ('so-bit', 'SO bit'), ('status-check-ready', 'Status check ready'), ('status-check-busy', 'Status check busy'), ('warning', 'Warning'), ) annotation_rows = ( ('si-bits', 'SI bits', (0, 1)), ('so-bits', 'SO bits', (2,)), ('status', 'Status', (3, 4)), ('warnings', 'Warnings', (5,)), ) def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def decode(self): while True: # Wait for slave to be selected on rising CS. cs, sk, si, so = self.wait({0: 'r'}) if sk: self.put(self.samplenum, self.samplenum, self.out_ann, [5, ['Clock should be low on start', 'Clock high on start', 'Clock high', 'SK high']]) sk = 0 # Enforce correct state for correct clock handling. # Because we don't know if this is bit communication or a # status check we have to collect the SI and SO values on SK # edges while the chip is selected and figure out afterwards. packet = [] while cs: # Save change. packet.append(Packet(self.samplenum, self.matched, cs, sk, si, so)) edge = 'r' if sk == 0 else 'f' cs, sk, si, so = self.wait([{0: 'l'}, {1: edge}, {3: 'e'}]) # Save last change. packet.append(Packet(self.samplenum, self.matched, cs, sk, si, so)) # Figure out if this is a status check. # Either there is no clock or no start bit (on first rising edge). status_check = True for change in packet: # Get first clock rising edge. if len(change.matched) > 1 and change.matched[1] and change.sk: if change.si: status_check = False break # The packet is for a status check. # SO low = busy, SO high = ready. # The SO signal might be noisy in the beginning because it starts # in high impedance. if status_check: start_samplenum = packet[0].samplenum bit_so = packet[0].so # Check for SO edges. for change in packet: if len(change.matched) > 2 and change.matched[2]: if bit_so == 0 and change.so: # Rising edge Busy -> Ready. self.put(start_samplenum, change.samplenum, self.out_ann, [4, ['Busy', 'B']]) start_samplenum = change.samplenum bit_so = change.so # Put last state. if bit_so == 0: self.put(start_samplenum, packet[-1].samplenum, self.out_ann, [4, ['Busy', 'B']]) else: self.put(start_samplenum, packet[-1].samplenum, self.out_ann, [3, ['Ready', 'R']]) else: # Bit communication. # Since the slave samples SI on clock rising edge we do the # same. Because the slave changes SO on clock rising edge we # sample on the falling edge. bit_start = 0 # Rising clock sample of bit start. bit_si = 0 # SI value at rising clock edge. bit_so = 0 # SO value at falling clock edge. start_bit = True # Start bit incoming (first bit). pydata = [] # Python output data. for change in packet: if len(change.matched) > 1 and change.matched[1]: # Clock edge. if change.sk: # Rising clock edge. if bit_start > 0: # Bit completed. if start_bit: if bit_si == 0: # Start bit missing. self.put(bit_start, change.samplenum, self.out_ann, [5, ['Start bit not high', 'Start bit low']]) else: self.put(bit_start, change.samplenum, self.out_ann, [0, ['Start bit', 'S']]) start_bit = False else: self.put(bit_start, change.samplenum, self.out_ann, [1, ['SI bit: %d' % bit_si, 'SI: %d' % bit_si, '%d' % bit_si]]) self.put(bit_start, change.samplenum, self.out_ann, [2, ['SO bit: %d' % bit_so, 'SO: %d' % bit_so, '%d' % bit_so]]) pydata.append(PyPacket(bit_start, change.samplenum, bit_si, bit_so)) bit_start = change.samplenum bit_si = change.si else: # Falling clock edge. bit_so = change.so elif change.matched[0] and \ change.cs == 0 and change.sk == 0: # End of packet. self.put(bit_start, change.samplenum, self.out_ann, [1, ['SI bit: %d' % bit_si, 'SI: %d' % bit_si, '%d' % bit_si]]) self.put(bit_start, change.samplenum, self.out_ann, [2, ['SO bit: %d' % bit_so, 'SO: %d' % bit_so, '%d' % bit_so]]) pydata.append(PyPacket(bit_start, change.samplenum, bit_si, bit_so)) self.put(packet[0].samplenum, packet[len(packet) - 1].samplenum, self.out_python, pydata) libsigrokdecode-0.5.0/decoders/microwire/__init__.py0000644000175000017500000000276213117367246017510 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Kevin Redon ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' Microwire is a 3-wire half-duplex synchronous serial communication protocol. Originally from National Semiconductor, it is often used in EEPROM chips with device specific commands on top of the bit stream. Channels: - CS: chip select, active high - SK: clock line, for the synchronous communication (idle low) - SI: slave data input, output by the master and parsed by the selected slave on rising edge of clock line (idle low) - SO: slave data output, output by the selected slave and changed on rising edge of clock line, or goes from low to high when ready during status check (idle high impedance) The channel names might vary from chip to chip but the underlying function is the same. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/rtc8564/0000755000175000017500000000000013117367246014567 500000000000000libsigrokdecode-0.5.0/decoders/rtc8564/pd.py0000644000175000017500000002201613117367246015465 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from common.srdhelper import bcd2int def reg_list(): l = [] for i in range(8 + 1): l.append(('reg-0x%02x' % i, 'Register 0x%02x' % i)) return tuple(l) class Decoder(srd.Decoder): api_version = 2 id = 'rtc8564' name = 'RTC-8564' longname = 'Epson RTC-8564 JE/NB' desc = 'Realtime clock module protocol.' license = 'gplv2+' inputs = ['i2c'] outputs = ['rtc8564'] annotations = reg_list() + ( ('read', 'Read date/time'), ('write', 'Write date/time'), ('bit-reserved', 'Reserved bit'), ('bit-vl', 'VL bit'), ('bit-century', 'Century bit'), ('reg-read', 'Register read'), ('reg-write', 'Register write'), ) annotation_rows = ( ('bits', 'Bits', tuple(range(0, 8 + 1)) + (11, 12, 13)), ('regs', 'Register access', (14, 15)), ('date-time', 'Date/time', (9, 10)), ) def __init__(self): self.state = 'IDLE' self.hours = -1 self.minutes = -1 self.seconds = -1 self.days = -1 self.weekdays = -1 self.months = -1 self.years = -1 self.bits = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def putd(self, bit1, bit2, data): self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data) def putr(self, bit): self.put(self.bits[bit][1], self.bits[bit][2], self.out_ann, [11, ['Reserved bit', 'Reserved', 'Rsvd', 'R']]) def handle_reg_0x00(self, b): # Control register 1 pass def handle_reg_0x01(self, b): # Control register 2 ti_tp = 1 if (b & (1 << 4)) else 0 af = 1 if (b & (1 << 3)) else 0 tf = 1 if (b & (1 << 2)) else 0 aie = 1 if (b & (1 << 1)) else 0 tie = 1 if (b & (1 << 0)) else 0 ann = '' s = 'repeated' if ti_tp else 'single-shot' ann += 'TI/TP = %d: %s operation upon fixed-cycle timer interrupt '\ 'events\n' % (ti_tp, s) s = '' if af else 'no ' ann += 'AF = %d: %salarm interrupt detected\n' % (af, s) s = '' if tf else 'no ' ann += 'TF = %d: %sfixed-cycle timer interrupt detected\n' % (tf, s) s = 'enabled' if aie else 'prohibited' ann += 'AIE = %d: INT# pin output %s when an alarm interrupt '\ 'occurs\n' % (aie, s) s = 'enabled' if tie else 'prohibited' ann += 'TIE = %d: INT# pin output %s when a fixed-cycle interrupt '\ 'event occurs\n' % (tie, s) self.putx([1, [ann]]) def handle_reg_0x02(self, b): # Seconds / Voltage-low bit vl = 1 if (b & (1 << 7)) else 0 self.putd(7, 7, [12, ['Voltage low: %d' % vl, 'Volt. low: %d' % vl, 'VL: %d' % vl, 'VL']]) s = self.seconds = bcd2int(b & 0x7f) self.putd(6, 0, [2, ['Second: %d' % s, 'Sec: %d' % s, 'S: %d' % s, 'S']]) def handle_reg_0x03(self, b): # Minutes self.putr(7) m = self.minutes = bcd2int(b & 0x7f) self.putd(6, 0, [3, ['Minute: %d' % m, 'Min: %d' % m, 'M: %d' % m, 'M']]) def handle_reg_0x04(self, b): # Hours self.putr(7) self.putr(6) h = self.hours = bcd2int(b & 0x3f) self.putd(5, 0, [4, ['Hour: %d' % h, 'H: %d' % h, 'H']]) def handle_reg_0x05(self, b): # Days self.putr(7) self.putr(6) d = self.days = bcd2int(b & 0x3f) self.putd(5, 0, [5, ['Day: %d' % d, 'D: %d' % d, 'D']]) def handle_reg_0x06(self, b): # Weekdays for i in (7, 6, 5, 4, 3): self.putr(i) w = self.weekdays = bcd2int(b & 0x07) self.putd(2, 0, [6, ['Weekday: %d' % w, 'WD: %d' % w, 'WD', 'W']]) def handle_reg_0x07(self, b): # Months / century bit c = 1 if (b & (1 << 7)) else 0 self.putd(7, 7, [13, ['Century bit: %d' % c, 'Century: %d' % c, 'Cent: %d' % c, 'C: %d' % c, 'C']]) self.putr(6) self.putr(5) m = self.months = bcd2int(b & 0x1f) self.putd(4, 0, [7, ['Month: %d' % m, 'Mon: %d' % m, 'M: %d' % m, 'M']]) def handle_reg_0x08(self, b): # Years y = self.years = bcd2int(b & 0xff) self.putx([8, ['Year: %d' % y, 'Y: %d' % y, 'Y']]) def handle_reg_0x09(self, b): # Alarm, minute pass def handle_reg_0x0a(self, b): # Alarm, hour pass def handle_reg_0x0b(self, b): # Alarm, day pass def handle_reg_0x0c(self, b): # Alarm, weekday pass def handle_reg_0x0d(self, b): # CLKOUT output pass def handle_reg_0x0e(self, b): # Timer setting pass def handle_reg_0x0f(self, b): # Down counter for fixed-cycle timer pass def decode(self, ss, es, data): cmd, databyte = data # Collect the 'BITS' packet, then return. The next packet is # guaranteed to belong to these bits we just stored. if cmd == 'BITS': self.bits = databyte return # Store the start/end samples of this I²C packet. self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Wait for an I²C START condition. if cmd != 'START': return self.state = 'GET SLAVE ADDR' self.ss_block = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address write operation. # TODO: We should only handle packets to the RTC slave (0xa2/0xa3). if cmd != 'ADDRESS WRITE': return self.state = 'GET REG ADDR' elif self.state == 'GET REG ADDR': # Wait for a data write (master selects the slave register). if cmd != 'DATA WRITE': return self.reg = databyte self.state = 'WRITE RTC REGS' elif self.state == 'WRITE RTC REGS': # If we see a Repeated Start here, it's probably an RTC read. if cmd == 'START REPEAT': self.state = 'READ RTC REGS' return # Otherwise: Get data bytes until a STOP condition occurs. if cmd == 'DATA WRITE': r, s = self.reg, '%02X: %02X' % (self.reg, databyte) self.putx([15, ['Write register %s' % s, 'Write reg %s' % s, 'WR %s' % s, 'WR', 'W']]) handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) self.reg += 1 # TODO: Check for NACK! elif cmd == 'STOP': # TODO: Handle read/write of only parts of these items. d = '%02d.%02d.%02d %02d:%02d:%02d' % (self.days, self.months, self.years, self.hours, self.minutes, self.seconds) self.put(self.ss_block, es, self.out_ann, [9, ['Write date/time: %s' % d, 'Write: %s' % d, 'W: %s' % d]]) self.state = 'IDLE' else: pass # TODO elif self.state == 'READ RTC REGS': # Wait for an address read operation. # TODO: We should only handle packets to the RTC slave (0xa2/0xa3). if cmd == 'ADDRESS READ': self.state = 'READ RTC REGS2' return else: pass # TODO elif self.state == 'READ RTC REGS2': if cmd == 'DATA READ': r, s = self.reg, '%02X: %02X' % (self.reg, databyte) self.putx([15, ['Read register %s' % s, 'Read reg %s' % s, 'RR %s' % s, 'RR', 'R']]) handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) self.reg += 1 # TODO: Check for NACK! elif cmd == 'STOP': d = '%02d.%02d.%02d %02d:%02d:%02d' % (self.days, self.months, self.years, self.hours, self.minutes, self.seconds) self.put(self.ss_block, es, self.out_ann, [10, ['Read date/time: %s' % d, 'Read: %s' % d, 'R: %s' % d]]) self.state = 'IDLE' else: pass # TODO? libsigrokdecode-0.5.0/decoders/rtc8564/__init__.py0000644000175000017500000000161713117367246016625 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the Epson RTC-8564 JE/NB real-time clock (RTC) protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/swd/0000755000175000017500000000000013117367246014245 500000000000000libsigrokdecode-0.5.0/decoders/swd/pd.py0000644000175000017500000002735213117367246015153 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Angus Gratton ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import re ''' OUTPUT_PYTHON format: Packet: [, ] : - 'AP_READ' (AP read) - 'DP_READ' (DP read) - 'AP_WRITE' (AP write) - 'DP_WRITE' (DP write) - 'LINE_RESET' (line reset sequence) : - tuple of address, ack state, data for the given sequence ''' swd_states = [ 'IDLE', # Idle/unknown 'REQUEST', # Request phase (first 8 bits) 'ACK', # Ack phase (next 3 bits) 'READ', # Reading phase (next 32 bits for reads) 'WRITE', # Writing phase (next 32 bits for write) 'DPARITY', # Data parity phase ] # Regexes for matching SWD data out of bitstring ('1' / '0' characters) format RE_SWDSWITCH = re.compile(bin(0xE79E)[:1:-1] + '$') RE_SWDREQ = re.compile(r'1(?P.)(?P.)(?P..)(?P.)01$') RE_IDLE = re.compile('0' * 50 + '$') # Sample edges RISING = 1 FALLING = 0 ADDR_DP_SELECT = 0x8 ADDR_DP_CTRLSTAT = 0x4 BIT_SELECT_CTRLSEL = 1 BIT_CTRLSTAT_ORUNDETECT = 1 ANNOTATIONS = ['reset', 'enable', 'read', 'write', 'ack', 'data', 'parity'] class Decoder(srd.Decoder): api_version = 3 id = 'swd' name = 'SWD' longname = 'Serial Wire Debug' desc = 'Two-wire protocol for debug access to ARM CPUs.' license = 'gplv2+' inputs = ['logic'] outputs = ['swd'] channels = ( {'id': 'swclk', 'name': 'SWCLK', 'desc': 'Master clock'}, {'id': 'swdio', 'name': 'SWDIO', 'desc': 'Data input/output'}, ) options = ( {'id': 'strict_start', 'desc': 'Wait for a line reset before starting to decode', 'default': 'no', 'values': ('yes', 'no')}, ) annotations = ( ('reset', 'RESET'), ('enable', 'ENABLE'), ('read', 'READ'), ('write', 'WRITE'), ('ack', 'ACK'), ('data', 'DATA'), ('parity', 'PARITY'), ) def __init__(self): # SWD data/clock state self.state = 'UNKNOWN' self.sample_edge = RISING self.ack = None # Ack state of the current phase self.ss_req = 0 # Start sample of current req self.turnaround = 0 # Number of turnaround edges to ignore before continuing self.bits = '' # Bits from SWDIO are accumulated here, matched against expected sequences self.samplenums = [] # Sample numbers that correspond to the samples in self.bits self.linereset_count = 0 # SWD debug port state self.data = None self.addr = None self.rw = None # Are we inside an SWD read or a write? self.ctrlsel = 0 # 'ctrlsel' is bit 0 in the SELECT register. self.orundetect = 0 # 'orundetect' is bit 0 in the CTRLSTAT register. def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.out_python = self.register(srd.OUTPUT_PYTHON) if self.options['strict_start'] == 'no': self.state = 'REQ' # No need to wait for a LINE RESET. def putx(self, ann, length, data): '''Output annotated data.''' ann = ANNOTATIONS.index(ann) try: ss = self.samplenums[-length] except IndexError: ss = self.samplenums[0] if self.state == 'REQ': self.ss_req = ss es = self.samplenum self.put(ss, es, self.out_ann, [ann, [data]]) def putp(self, ptype, pdata): self.put(self.ss_req, self.samplenum, self.out_python, [ptype, pdata]) def put_python_data(self): '''Emit Python data item based on current SWD packet contents.''' ptype = { ('AP', 'R'): 'AP_READ', ('AP', 'W'): 'AP_WRITE', ('DP', 'R'): 'DP_READ', ('DP', 'W'): 'DP_WRITE', }[(self.apdp, self.rw)] self.putp(ptype, (self.addr, self.data, self.ack)) def decode(self): while True: # Wait for any clock edge. clk, dio = self.wait({0: 'e'}) # Count rising edges with DIO held high, # as a line reset (50+ high edges) can happen from any state. if clk == RISING: if dio == 1: self.linereset_count += 1 else: if self.linereset_count >= 50: self.putx('reset', self.linereset_count, 'LINERESET') self.putp('LINE_RESET', None) self.reset_state() self.linereset_count = 0 # Otherwise, we only care about either rising or falling edges # (depending on sample_edge, set according to current state). if clk != self.sample_edge: continue # Turnaround bits get skipped. if self.turnaround > 0: self.turnaround -= 1 continue self.bits += str(dio) self.samplenums.append(self.samplenum) { 'UNKNOWN': self.handle_unknown_edge, 'REQ': self.handle_req_edge, 'ACK': self.handle_ack_edge, 'DATA': self.handle_data_edge, 'DPARITY': self.handle_dparity_edge, }[self.state]() def next_state(self): '''Step to the next SWD state, reset internal counters accordingly.''' self.bits = '' self.samplenums = [] self.linereset_count = 0 if self.state == 'UNKNOWN': self.state = 'REQ' self.sample_edge = RISING self.turnaround = 0 elif self.state == 'REQ': self.state = 'ACK' self.sample_edge = FALLING self.turnaround = 1 elif self.state == 'ACK': self.state = 'DATA' self.sample_edge = RISING if self.rw == 'W' else FALLING self.turnaround = 0 if self.rw == 'R' else 2 elif self.state == 'DATA': self.state = 'DPARITY' elif self.state == 'DPARITY': self.put_python_data() self.state = 'REQ' self.sample_edge = RISING self.turnaround = 1 if self.rw == 'R' else 0 def reset_state(self): '''Line reset (or equivalent), wait for a new pending SWD request.''' if self.state != 'REQ': # Emit a Python data item. self.put_python_data() # Clear state. self.bits = '' self.samplenums = [] self.linereset_count = 0 self.turnaround = 0 self.sample_edge = RISING self.data = '' self.ack = None self.state = 'REQ' def handle_unknown_edge(self): ''' Clock edge in the UNKNOWN state. In the unknown state, clock edges get ignored until we see a line reset (which is detected in the decode method, not here.) ''' pass def handle_req_edge(self): '''Clock edge in the REQ state (waiting for SWD r/w request).''' # Check for a JTAG->SWD enable sequence. m = re.search(RE_SWDSWITCH, self.bits) if m is not None: self.putx('enable', 16, 'JTAG->SWD') self.reset_state() return # Or a valid SWD Request packet. m = re.search(RE_SWDREQ, self.bits) if m is not None: calc_parity = sum([int(x) for x in m.group('rw') + m.group('apdp') + m.group('addr')]) % 2 parity = '' if str(calc_parity) == m.group('parity') else 'E' self.rw = 'R' if m.group('rw') == '1' else 'W' self.apdp = 'AP' if m.group('apdp') == '1' else 'DP' self.addr = int(m.group('addr')[::-1], 2) << 2 self.putx('read' if self.rw == 'R' else 'write', 8, self.get_address_description()) self.next_state() return def handle_ack_edge(self): '''Clock edge in the ACK state (waiting for complete ACK sequence).''' if len(self.bits) < 3: return if self.bits == '100': self.putx('ack', 3, 'OK') self.ack = 'OK' self.next_state() elif self.bits == '001': self.putx('ack', 3, 'FAULT') self.ack = 'FAULT' if self.orundetect == 1: self.next_state() else: self.reset_state() self.turnaround = 1 elif self.bits == '010': self.putx('ack', 3, 'WAIT') self.ack = 'WAIT' if self.orundetect == 1: self.next_state() else: self.reset_state() self.turnaround = 1 elif self.bits == '111': self.putx('ack', 3, 'NOREPLY') self.ack = 'NOREPLY' self.reset_state() else: self.putx('ack', 3, 'ERROR') self.ack = 'ERROR' self.reset_state() def handle_data_edge(self): '''Clock edge in the DATA state (waiting for 32 bits to clock past).''' if len(self.bits) < 32: return self.data = 0 self.dparity = 0 for x in range(32): if self.bits[x] == '1': self.data += (1 << x) self.dparity += 1 self.dparity = self.dparity % 2 self.putx('data', 32, '0x%08x' % self.data) self.next_state() def handle_dparity_edge(self): '''Clock edge in the DPARITY state (clocking in parity bit).''' if str(self.dparity) != self.bits: self.putx('parity', 1, str(self.dparity) + self.bits) # PARITY ERROR elif self.rw == 'W': self.handle_completed_write() self.next_state() def handle_completed_write(self): ''' Update internal state of the debug port based on a completed write operation. ''' if self.apdp != 'DP': return elif self.addr == ADDR_DP_SELECT: self.ctrlsel = self.data & BIT_SELECT_CTRLSEL elif self.addr == ADDR_DP_CTRLSTAT and self.ctrlsel == 0: self.orundetect = self.data & BIT_CTRLSTAT_ORUNDETECT def get_address_description(self): ''' Return a human-readable description of the currently selected address, for annotated results. ''' if self.apdp == 'DP': if self.rw == 'R': # Tables 2-4 & 2-5 in ADIv5.2 spec ARM document IHI 0031C return { 0: 'IDCODE', 0x4: 'R CTRL/STAT' if self.ctrlsel == 0 else 'R DLCR', 0x8: 'RESEND', 0xC: 'RDBUFF' }[self.addr] elif self.rw == 'W': # Tables 2-4 & 2-5 in ADIv5.2 spec ARM document IHI 0031C return { 0: 'W ABORT', 0x4: 'W CTRL/STAT' if self.ctrlsel == 0 else 'W DLCR', 0x8: 'W SELECT', 0xC: 'W RESERVED' }[self.addr] elif self.apdp == 'AP': if self.rw == 'R': return 'R AP%x' % self.addr elif self.rw == 'W': return 'W AP%x' % self.addr # Any legitimate operations shouldn't fall through to here, probably # a decoder bug. return '? %s%s%x' % (self.rw, self.apdp, self.addr) libsigrokdecode-0.5.0/decoders/swd/__init__.py0000644000175000017500000000227413117367246016303 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Angus Gratton ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This PD decodes the ARM SWD (version 1) protocol, as described in the "ARM Debug Interface v5.2" Architecture Specification. Details: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0031c/index.html (Registration required) Not supported: * Turnaround periods other than the default 1, as set in DLCR.TURNROUND (should be trivial to add) * SWD protocol version 2 (multi-drop support, etc.) ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/jtag_stm32/0000755000175000017500000000000013117367246015425 500000000000000libsigrokdecode-0.5.0/decoders/jtag_stm32/pd.py0000644000175000017500000002345313117367246016331 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # JTAG debug port data registers (in IR[3:0]) and their sizes (in bits) # Note: The ARM DAP-DP is not IEEE 1149.1 (JTAG) compliant (as per ARM docs), # as it does not implement the EXTEST, SAMPLE, and PRELOAD instructions. # Instead, BYPASS is decoded for any of these instructions. ir = { '1111': ['BYPASS', 1], # Bypass register '1110': ['IDCODE', 32], # ID code register '1010': ['DPACC', 35], # Debug port access register '1011': ['APACC', 35], # Access port access register '1000': ['ABORT', 35], # Abort register # TODO: 32 bits? Datasheet typo? } # ARM Cortex-M3 r1p1-01rel0 ID code cm3_idcode = 0x3ba00477 # http://infocenter.arm.com/help/topic/com.arm.doc.ddi0413c/Chdjibcg.html cm3_idcode_ver = { 0x3: 'JTAG-DP', 0x2: 'SW-DP', } cm3_idcode_part = { 0xba00: 'JTAG-DP', 0xba10: 'SW-DP', } # http://infocenter.arm.com/help/topic/com.arm.doc.faqs/ka14408.html jedec_id = { 5: { 0x3b: 'ARM Ltd.', }, } # JTAG ID code in the STM32F10xxx BSC (boundary scan) TAP jtag_idcode = { 0x06412041: 'Low-density device, rev. A', 0x06410041: 'Medium-density device, rev. A', 0x16410041: 'Medium-density device, rev. B/Z/Y', 0x06414041: 'High-density device, rev. A/Z/Y', 0x06430041: 'XL-density device, rev. A', 0x06418041: 'Connectivity-line device, rev. A/Z', } # ACK[2:0] in the DPACC/APACC registers (unlisted values are reserved) ack_val = { '001': 'WAIT', '010': 'OK/FAULT', } # 32bit debug port registers (addressed via A[3:2]) dp_reg = { '00': 'Reserved', # Must be kept at reset value '01': 'DP CTRL/STAT', '10': 'DP SELECT', '11': 'DP RDBUFF', } # APB-AP registers (each of them 32 bits wide) apb_ap_reg = { 0x00: ['CSW', 'Control/status word'], 0x04: ['TAR', 'Transfer address'], # 0x08: Reserved SBZ 0x0c: ['DRW', 'Data read/write'], 0x10: ['BD0', 'Banked data 0'], 0x14: ['BD1', 'Banked data 1'], 0x18: ['BD2', 'Banked data 2'], 0x1c: ['BD3', 'Banked data 3'], # 0x20-0xf4: Reserved SBZ 0x800000000: ['ROM', 'Debug ROM address'], 0xfc: ['IDR', 'Identification register'], } # TODO: Split off generic ARM/Cortex-M3 parts into another protocol decoder? # Bits[31:28]: Version (here: 0x3) # JTAG-DP: 0x3, SW-DP: 0x2 # Bits[27:12]: Part number (here: 0xba00) # JTAG-DP: 0xba00, SW-DP: 0xba10 # Bits[11:1]: JEDEC (JEP-106) manufacturer ID (here: 0x23b) # Bits[11:8]: Continuation code ('ARM Ltd.': 0x04) # Bits[7:1]: Identity code ('ARM Ltd.': 0x3b) # Bits[0:0]: Reserved (here: 0x1) def decode_device_id_code(bits): id_hex = '0x%x' % int('0b' + bits, 2) ver = cm3_idcode_ver.get(int('0b' + bits[-32:-28], 2), 'UNKNOWN') part = cm3_idcode_part.get(int('0b' + bits[-28:-12], 2), 'UNKNOWN') ids = jedec_id.get(int('0b' + bits[-12:-8], 2) + 1, {}) manuf = ids.get(int('0b' + bits[-7:-1], 2), 'UNKNOWN') return (id_hex, manuf, ver, part) # DPACC is used to access debug port registers (CTRL/STAT, SELECT, RDBUFF). # APACC is used to access all Access Port (AHB-AP) registers. # APACC/DPACC, when transferring data IN: # Bits[34:3] = DATA[31:0]: 32bit data to transfer (write request) # Bits[2:1] = A[3:2]: 2-bit address (debug/access port register) # Bits[0:0] = RnW: Read request (1) or write request (0) def data_in(instruction, bits): data, a, rnw = bits[:-3], bits[-3:-1], bits[-1] data_hex = '0x%x' % int('0b' + data, 2) r = 'Read request' if (rnw == '1') else 'Write request' # reg = dp_reg[a] if (instruction == 'DPACC') else apb_ap_reg[a] reg = dp_reg[a] if (instruction == 'DPACC') else a # TODO return 'New transaction: DATA: %s, A: %s, RnW: %s' % (data_hex, reg, r) # APACC/DPACC, when transferring data OUT: # Bits[34:3] = DATA[31:0]: 32bit data which is read (read request) # Bits[2:0] = ACK[2:0]: 3-bit acknowledge def data_out(bits): data, ack = bits[:-3], bits[-3:] data_hex = '0x%x' % int('0b' + data, 2) ack_meaning = ack_val.get(ack, 'Reserved') return 'Previous transaction result: DATA: %s, ACK: %s' \ % (data_hex, ack_meaning) class Decoder(srd.Decoder): api_version = 2 id = 'jtag_stm32' name = 'JTAG / STM32' longname = 'Joint Test Action Group / ST STM32' desc = 'ST STM32-specific JTAG protocol.' license = 'gplv2+' inputs = ['jtag'] outputs = ['jtag_stm32'] annotations = ( ('item', 'Item'), ('field', 'Field'), ('command', 'Command'), ('warning', 'Warning'), ) annotation_rows = ( ('items', 'Items', (0,)), ('fields', 'Fields', (1,)), ('commands', 'Commands', (2,)), ('warnings', 'Warnings', (3,)), ) def __init__(self): self.state = 'IDLE' self.samplenums = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def putf(self, s, e, data): self.put(self.samplenums[s][0], self.samplenums[e][1], self.out_ann, data) def handle_reg_bypass(self, cmd, bits): self.putx([0, ['BYPASS: ' + bits]]) def handle_reg_idcode(self, cmd, bits): # IDCODE is a read-only register which is always accessible. # IR == IDCODE: The 32bit device ID code is shifted out via DR next. id_hex, manuf, ver, part = decode_device_id_code(bits[:-1]) cc = '0x%x' % int('0b' + bits[:-1][-12:-8], 2) ic = '0x%x' % int('0b' + bits[:-1][-7:-1], 2) self.putf(0, 0, [1, ['Reserved (BS TAP)', 'BS', 'B']]) self.putf(1, 1, [1, ['Reserved', 'Res', 'R']]) self.putf(9, 12, [0, ['Continuation code: %s' % cc, 'CC', 'C']]) self.putf(2, 8, [0, ['Identity code: %s' % ic, 'IC', 'I']]) self.putf(2, 12, [1, ['Manufacturer: %s' % manuf, 'Manuf', 'M']]) self.putf(13, 28, [1, ['Part: %s' % part, 'Part', 'P']]) self.putf(29, 32, [1, ['Version: %s' % ver, 'Version', 'V']]) self.ss = self.samplenums[1][0] self.putx([2, ['IDCODE: %s (%s: %s/%s)' % \ decode_device_id_code(bits[:-1])]]) def handle_reg_dpacc(self, cmd, bits): bits = bits[:-1] s = data_in('DPACC', bits) if (cmd == 'DR TDI') else data_out(bits) self.putx([2, [s]]) def handle_reg_apacc(self, cmd, bits): bits = bits[:-1] s = data_in('APACC', bits) if (cmd == 'DR TDI') else data_out(bits) self.putx([2, [s]]) def handle_reg_abort(self, cmd, bits): bits = bits[:-1] # Bits[31:1]: reserved. Bit[0]: DAPABORT. a = '' if (bits[0] == '1') else 'No ' s = 'DAPABORT = %s: %sDAP abort generated' % (bits[0], a) self.putx([2, [s]]) # Warn if DAPABORT[31:1] contains non-zero bits. if (bits[:-1] != ('0' * 31)): self.putx([3, ['WARNING: DAPABORT[31:1] reserved!']]) def handle_reg_unknown(self, cmd, bits): bits = bits[:-1] self.putx([2, ['Unknown instruction: %s' % bits]]) def decode(self, ss, es, data): cmd, val = data self.ss, self.es = ss, es if cmd != 'NEW STATE': # The right-most char in the 'val' bitstring is the LSB. val, self.samplenums = val self.samplenums.reverse() # State machine if self.state == 'IDLE': # Wait until a new instruction is shifted into the IR register. if cmd != 'IR TDI': return # Switch to the state named after the instruction, or 'UNKNOWN'. # The STM32F10xxx has two serially connected JTAG TAPs, the # boundary scan tap (5 bits) and the Cortex-M3 TAP (4 bits). # See UM 31.5 "STM32F10xxx JTAG TAP connection" for details. self.state = ir.get(val[:-1][-4:], ['UNKNOWN', 0])[0] bstap_ir = ir.get(val[:-1][:4], ['UNKNOWN', 0])[0] self.putf(5, 8, [1, ['IR (BS TAP): ' + bstap_ir]]) self.putf(1, 4, [1, ['IR (M3 TAP): ' + self.state]]) self.putf(0, 0, [1, ['Reserved (BS TAP)', 'BS', 'B']]) self.putx([2, ['IR: %s' % self.state]]) elif self.state == 'BYPASS': # Here we're interested in incoming bits (TDI). if cmd != 'DR TDI': return handle_reg = getattr(self, 'handle_reg_%s' % self.state.lower()) handle_reg(cmd, val) self.state = 'IDLE' elif self.state in ('IDCODE', 'ABORT', 'UNKNOWN'): # Here we're interested in outgoing bits (TDO). if cmd != 'DR TDO': return handle_reg = getattr(self, 'handle_reg_%s' % self.state.lower()) handle_reg(cmd, val) self.state = 'IDLE' elif self.state in ('DPACC', 'APACC'): # Here we're interested in incoming and outgoing bits (TDI/TDO). if cmd not in ('DR TDI', 'DR TDO'): return handle_reg = getattr(self, 'handle_reg_%s' % self.state.lower()) handle_reg(cmd, val) if cmd == 'DR TDO': # Assumes 'DR TDI' comes before 'DR TDO'. self.state = 'IDLE' libsigrokdecode-0.5.0/decoders/jtag_stm32/__init__.py0000644000175000017500000000211413117367246017454 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'jtag' PD and decodes JTAG data specific to the STM32 microcontroller series. Details: https://en.wikipedia.org/wiki/STM32 http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/CD00171190.pdf (e.g. chapter 31.7: "JTAG debug port") ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/mrf24j40/0000755000175000017500000000000013117367246014720 500000000000000libsigrokdecode-0.5.0/decoders/mrf24j40/pd.py0000644000175000017500000001030213117367246015611 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Karl Palsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .lists import * class Decoder(srd.Decoder): api_version = 2 id = 'mrf24j40' name = 'MRF24J40' longname = 'Microchip MRF24J40' desc = 'IEEE 802.15.4 2.4 GHz RF tranceiver chip.' license = 'gplv2+' inputs = ['spi'] outputs = ['mrf24j40'] annotations = ( ('sread', 'Short register read commands'), ('swrite', 'Short register write commands'), ('lread', 'Long register read commands'), ('lwrite', 'Long register write commands'), ('warning', 'Warnings'), ) annotation_rows = ( ('read', 'Read', (0, 2)), ('write', 'Write', (1, 3)), ('warnings', 'Warnings', (4,)), ) def __init__(self): self.ss_cmd, self.es_cmd = 0, 0 self.mosi_bytes = [] self.miso_bytes = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def putw(self, pos, msg): self.put(pos[0], pos[1], self.out_ann, [4, [msg]]) def reset(self): self.mosi_bytes = [] self.miso_bytes = [] def handle_short(self): write = self.mosi_bytes[0] & 0x1 reg = (self.mosi_bytes[0] >> 1) & 0x3f reg_desc = sregs.get(reg, 'illegal') if write: self.putx([1, ['%s: %#x' % (reg_desc, self.mosi_bytes[1])]]) else: self.putx([0, ['%s: %#x' % (reg_desc, self.miso_bytes[1])]]) def handle_long(self): dword = self.mosi_bytes[0] << 8 | self.mosi_bytes[1] write = dword & (0x1 << 4) reg = dword >> 5 & 0x3ff if reg >= 0x0: reg_desc = 'TX:%#x' % reg if reg >= 0x80: reg_desc = 'TX beacon:%#x' % reg if reg >= 0x100: reg_desc = 'TX GTS1:%#x' % reg if reg >= 0x180: reg_desc = 'TX GTS2:%#x' % reg if reg >= 0x200: reg_desc = lregs.get(reg, 'illegal') if reg >= 0x280: reg_desc = 'Security keys:%#x' % reg if reg >= 0x2c0: reg_desc = 'Reserved:%#x' % reg if reg >= 0x300: reg_desc = 'RX:%#x' % reg if write: self.putx([3, ['%s: %#x' % (reg_desc, self.mosi_bytes[2])]]) else: self.putx([2, ['%s: %#x' % (reg_desc, self.miso_bytes[2])]]) def decode(self, ss, es, data): ptype = data[0] if ptype == 'CS-CHANGE': # If we transition high mid-stream, toss out our data and restart. cs_old, cs_new = data[1:] if cs_old is not None and cs_old == 0 and cs_new == 1: if len(self.mosi_bytes) not in (0, 2, 3): self.putw([self.ss_cmd, es], 'Misplaced CS!') self.reset() return # Don't care about anything else. if ptype != 'DATA': return mosi, miso = data[1:] self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: self.ss_cmd = ss self.mosi_bytes.append(mosi) self.miso_bytes.append(miso) # Everything is either 2 bytes or 3 bytes. if len(self.mosi_bytes) < 2: return if self.mosi_bytes[0] & 0x80: if len(self.mosi_bytes) == 3: self.es_cmd = es self.handle_long() self.reset() else: self.es_cmd = es self.handle_short() self.reset() libsigrokdecode-0.5.0/decoders/mrf24j40/__init__.py0000644000175000017500000000164113117367246016753 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Karl Palsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes Microchip MRF24J40 IEEE 802.15.4 2.4 GHz RF tranceiver commands and data. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/mrf24j40/lists.py0000644000175000017500000000740313117367246016354 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Karl Palsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## sregs = { 0: 'RXMCR', 1: 'PANIDL', 2: 'PANIDH', 3: 'SADRL', 4: 'SADRH', 5: 'EADR0', 6: 'EADR1', 7: 'EADR2', 8: 'EADR3', 9: 'EADR4', 0xa: 'EADR5', 0xb: 'EADR6', 0xc: 'EADR7', 0xd: 'RXFLUSH', 0xe: 'Reserved', 0xf: 'Reserved', 0x10: 'ORDER', 0x11: 'TXMCR', 0x12: 'ACKTMOUT', 0x13: 'ESLOTG1', 0x14: 'SYMTICKL', 0x15: 'SYMTICKH', 0x16: 'PACON0', 0x17: 'PACON1', 0x18: 'PACON2', 0x19: 'Reserved', 0x1a: 'TXBCON0', 0x1b: 'TXNCON', 0x1c: 'TXG1CON', 0x1d: 'TXG2CON', 0x1e: 'ESLOTG23', 0x1f: 'ESLOTG45', 0x20: 'ESLOTG67', 0x21: 'TXPEND', 0x22: 'WAKECON', 0x23: 'FRMOFFSET', 0x24: 'TXSTAT', 0x25: 'TXBCON1', 0x26: 'GATECLK', 0x27: 'TXTIME', 0x28: 'HSYMTIMRL', 0x29: 'HSYMTIMRH', 0x2a: 'SOFTRST', 0x2b: 'Reserved', 0x2c: 'SECCON0', 0x2d: 'SECCON1', 0x2e: 'TXSTBL', 0x2f: 'Reserved', 0x30: 'RXSR', 0x31: 'INTSTAT', 0x32: 'INTCON', 0x33: 'GPIO', 0x34: 'TRISGPIO', 0x35: 'SLPACK', 0x36: 'RFCTL', 0x37: 'SECCR2', 0x38: 'BBREG0', 0x39: 'BBREG1', 0x3a: 'BBREG2', 0x3b: 'BBREG3', 0x3c: 'BBREG4', 0x3d: 'Reserved', 0x3e: 'BBREG6', 0x3f: 'CCAEDTH', } lregs = { 0x200: 'RFCON0', 0x201: 'RFCON1', 0x202: 'RFCON2', 0x203: 'RFCON3', 0x204: 'Reserved', 0x205: 'RFCON5', 0x206: 'RFCON6', 0x207: 'RFCON7', 0x208: 'RFCON8', 0x209: 'SLPCAL0', 0x20A: 'SLPCAL1', 0x20B: 'SLPCAL2', 0x20C: 'Reserved', 0x20D: 'Reserved', 0x20E: 'Reserved', 0x20F: 'RFSTATE', 0x210: 'RSSI', 0x211: 'SLPCON0', 0x212: 'Reserved', 0x213: 'Reserved', 0x214: 'Reserved', 0x215: 'Reserved', 0x216: 'Reserved', 0x217: 'Reserved', 0x218: 'Reserved', 0x219: 'Reserved', 0x21A: 'Reserved', 0x21B: 'Reserved', 0x21C: 'Reserved', 0x21D: 'Reserved', 0x21E: 'Reserved', 0x21F: 'Reserved', 0x220: 'SLPCON1', 0x221: 'Reserved', 0x222: 'WAKETIMEL', 0x223: 'WAKETIMEH', 0x224: 'REMCNTL', 0x225: 'REMCNTH', 0x226: 'MAINCNT0', 0x227: 'MAINCNT1', 0x228: 'MAINCNT2', 0x229: 'MAINCNT3', 0x22A: 'Reserved', 0x22B: 'Reserved', 0x22C: 'Reserved', 0x22D: 'Reserved', 0x22E: 'Reserved', 0x22F: 'TESTMODE', 0x230: 'ASSOEADR0', 0x231: 'ASSOEADR1', 0x232: 'ASSOEADR2', 0x233: 'ASSOEADR3', 0x234: 'ASSOEADR4', 0x235: 'ASSOEADR5', 0x236: 'ASSOEADR6', 0x237: 'ASSOEADR7', 0x238: 'ASSOSADR0', 0x239: 'ASSOSADR1', 0x23A: 'Reserved', 0x23B: 'Reserved', 0x23C: 'Unimplemented', 0x23D: 'Unimplemented', 0x23E: 'Unimplemented', 0x23F: 'Unimplemented', 0x240: 'UPNONCE0', 0x241: 'UPNONCE1', 0x242: 'UPNONCE2', 0x243: 'UPNONCE3', 0x244: 'UPNONCE4', 0x245: 'UPNONCE5', 0x246: 'UPNONCE6', 0x247: 'UPNONCE7', 0x248: 'UPNONCE8', 0x249: 'UPNONCE9', 0x24A: 'UPNONCE10', 0x24B: 'UPNONCE11', 0x24C: 'UPNONCE12' } libsigrokdecode-0.5.0/decoders/onewire_network/0000755000175000017500000000000013117367246016671 500000000000000libsigrokdecode-0.5.0/decoders/onewire_network/pd.py0000644000175000017500000001544013117367246017572 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Iztok Jeras ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd # Dictionary of ROM commands and their names, next state. command = { 0x33: ['Read ROM' , 'GET ROM' ], 0x0f: ['Conditional read ROM' , 'GET ROM' ], 0xcc: ['Skip ROM' , 'TRANSPORT' ], 0x55: ['Match ROM' , 'GET ROM' ], 0xf0: ['Search ROM' , 'SEARCH ROM'], 0xec: ['Conditional search ROM', 'SEARCH ROM'], 0x3c: ['Overdrive skip ROM' , 'TRANSPORT' ], 0x69: ['Overdrive match ROM' , 'GET ROM' ], } class Decoder(srd.Decoder): api_version = 2 id = 'onewire_network' name = '1-Wire network layer' longname = '1-Wire serial communication bus (network layer)' desc = 'Bidirectional, half-duplex, asynchronous serial bus.' license = 'gplv2+' inputs = ['onewire_link'] outputs = ['onewire_network'] annotations = ( ('text', 'Human-readable text'), ) def __init__(self): self.ss_block = 0 self.es_block = 0 self.state = 'COMMAND' self.bit_cnt = 0 self.search = 'P' self.data_p = 0x0 self.data_n = 0x0 self.data = 0x0 self.rom = 0x0000000000000000 def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): # Helper function for most annotations. self.put(self.ss_block, self.es_block, self.out_ann, data) def puty(self, data): # Helper function for most protocol packets. self.put(self.ss_block, self.es_block, self.out_python, data) def decode(self, ss, es, data): code, val = data # State machine. if code == 'RESET/PRESENCE': self.search = 'P' self.bit_cnt = 0 self.put(ss, es, self.out_ann, [0, ['Reset/presence: %s' % ('true' if val else 'false')]]) self.put(ss, es, self.out_python, ['RESET/PRESENCE', val]) self.state = 'COMMAND' return # For now we're only interested in 'RESET/PRESENCE' and 'BIT' packets. if code != 'BIT': return if self.state == 'COMMAND': # Receiving and decoding a ROM command. if self.onewire_collect(8, val, ss, es) == 0: return if self.data in command: self.putx([0, ['ROM command: 0x%02x \'%s\'' % (self.data, command[self.data][0])]]) self.state = command[self.data][1] else: self.putx([0, ['ROM command: 0x%02x \'%s\'' % (self.data, 'unrecognized')]]) self.state = 'COMMAND ERROR' elif self.state == 'GET ROM': # A 64 bit device address is selected. # Family code (1 byte) + serial number (6 bytes) + CRC (1 byte) if self.onewire_collect(64, val, ss, es) == 0: return self.rom = self.data & 0xffffffffffffffff self.putx([0, ['ROM: 0x%016x' % self.rom]]) self.puty(['ROM', self.rom]) self.state = 'TRANSPORT' elif self.state == 'SEARCH ROM': # A 64 bit device address is searched for. # Family code (1 byte) + serial number (6 bytes) + CRC (1 byte) if self.onewire_search(64, val, ss, es) == 0: return self.rom = self.data & 0xffffffffffffffff self.putx([0, ['ROM: 0x%016x' % self.rom]]) self.puty(['ROM', self.rom]) self.state = 'TRANSPORT' elif self.state == 'TRANSPORT': # The transport layer is handled in byte sized units. if self.onewire_collect(8, val, ss, es) == 0: return self.putx([0, ['Data: 0x%02x' % self.data]]) self.puty(['DATA', self.data]) elif self.state == 'COMMAND ERROR': # Since the command is not recognized, print raw data. if self.onewire_collect(8, val, ss, es) == 0: return self.putx([0, ['ROM error data: 0x%02x' % self.data]]) # Data collector. def onewire_collect(self, length, val, ss, es): # Storing the sample this sequence begins with. if self.bit_cnt == 1: self.ss_block = ss self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt) self.bit_cnt += 1 # Storing the sample this sequence ends with. # In case the full length of the sequence is received, return 1. if self.bit_cnt == length: self.es_block = es self.data = self.data & ((1 << length) - 1) self.bit_cnt = 0 return 1 else: return 0 # Search collector. def onewire_search(self, length, val, ss, es): # Storing the sample this sequence begins with. if (self.bit_cnt == 0) and (self.search == 'P'): self.ss_block = ss if self.search == 'P': # Master receives an original address bit. self.data_p = self.data_p & ~(1 << self.bit_cnt) | \ (val << self.bit_cnt) self.search = 'N' elif self.search == 'N': # Master receives a complemented address bit. self.data_n = self.data_n & ~(1 << self.bit_cnt) | \ (val << self.bit_cnt) self.search = 'D' elif self.search == 'D': # Master transmits an address bit. self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt) self.search = 'P' self.bit_cnt += 1 # Storing the sample this sequence ends with. # In case the full length of the sequence is received, return 1. if self.bit_cnt == length: self.es_block = es self.data_p = self.data_p & ((1 << length) - 1) self.data_n = self.data_n & ((1 << length) - 1) self.data = self.data & ((1 << length) - 1) self.search = 'P' self.bit_cnt = 0 return 1 else: return 0 libsigrokdecode-0.5.0/decoders/onewire_network/__init__.py0000644000175000017500000000401113117367246020716 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'onewire_link' PD and decodes the 1-Wire protocol (network layer). The 1-Wire protocol enables bidirectional communication over a single wire (and ground) between a single master and one or multiple slaves. The protocol is layered: - Link layer (reset, presence detection, reading/writing bits) - Network layer (skip/search/match device ROM addresses) - Transport layer (transport data between 1-Wire master and device) Network layer: The following link layer annotations are shown: - RESET/PRESENCE True/False The event is marked from the signal negative edge to the end of the reset high period. It is also reported if there are any devices attached to the bus. The following network layer annotations are shown: - ROM command The requested ROM command is displayed as an 8bit hex value and by name. - ROM The 64bit value of the addressed device is displayed: Family code (1 byte) + serial number (6 bytes) + CRC (1 byte) - Data Data intended for the transport layer is displayed as an 8bit hex value. TODO: - Add CRC checks, to see if there were communication errors on the wire. - Add reporting original/complement address values from the search algorithm. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/em4305/0000755000175000017500000000000013117367246014365 500000000000000libsigrokdecode-0.5.0/decoders/em4305/pd.py0000644000175000017500000004330613117367246015270 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2016 Benjamin Larsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'em4305' name = 'EM4305' longname = 'RFID EM4205/EM4305' desc = 'EM4205/EM4305 100-150kHz RFID protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['em4305'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) options = ( {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000}, {'id': 'first_field_stop', 'desc': 'First field stop min', 'default': 40}, {'id': 'w_gap', 'desc': 'Write gap min', 'default': 12}, {'id': 'w_one_max', 'desc': 'Write one max', 'default': 32}, {'id': 'w_zero_on_min', 'desc': 'Write zero on min', 'default': 15}, {'id': 'w_zero_off_max', 'desc': 'Write zero off max', 'default': 27}, {'id': 'em4100_decode', 'desc': 'EM4100 decode', 'default': 'on', 'values': ('on', 'off')}, ) annotations = ( ('bit_value', 'Bit value'), ('first_field_stop', 'First field stop'), ('write_gap', 'Write gap'), ('write_mode_exit', 'Write mode exit'), ('bit', 'Bit'), ('opcode', 'Opcode'), ('lock', 'Lock'), ('data', 'Data'), ('password', 'Password'), ('address', 'Address'), ('bitrate', 'Bitrate'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('structure', 'Structure', (1, 2, 3, 4)), ('fields', 'Fields', (5, 6, 7, 8, 9)), ('decode', 'Decode', (10,)), ) def __init__(self): self.samplerate = None self.last_samplenum = None self.state = 'FFS_SEARCH' self.bits_pos = [[0 for col in range(3)] for row in range(70)] self.br_string = ['RF/8', 'RF/16', 'Unused', 'RF/32', 'RF/40', 'Unused', 'Unused', 'RF/64',] self.encoder = ['not used', 'Manchester', 'Bi-phase', 'not used'] self.delayed_on = ['No delay', 'Delayed on - BP/8', 'Delayed on - BP/4', 'No delay'] self.em4100_decode1_partial = 0 self.cmds = ['Invalid', 'Login', 'Write word', 'Invalid', 'Read word', 'Disable', 'Protect', 'Invalid'] def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.field_clock = self.samplerate / self.options['coilfreq'] self.wzmax = self.options['w_zero_off_max'] * self.field_clock self.wzmin = self.options['w_zero_on_min'] * self.field_clock self.womax = self.options['w_one_max'] * self.field_clock self.ffs = self.options['first_field_stop'] * self.field_clock self.writegap = self.options['w_gap'] * self.field_clock self.nogap = 300 * self.field_clock def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def decode_config(self, idx): bitrate = self.get_3_bits(idx+2) self.put(self.bits_pos[idx][1], self.bits_pos[idx+5][2], self.out_ann, [10, ['Data rate: ' + \ self.br_string[bitrate], self.br_string[bitrate]]]) encoding = self.bits_pos[idx+6][0]<<0 | self.bits_pos[idx+7][0]<<1 self.put(self.bits_pos[idx+6][1], self.bits_pos[idx+10][2], self.out_ann, [10, ['Encoder: ' + \ self.encoder[encoding], self.encoder[encoding]]]) self.put(self.bits_pos[idx+11][1], self.bits_pos[idx+12][2], self.out_ann, [10, ['Zero bits', 'ZB']]) delay_on = self.bits_pos[idx+13][0]<<0 | self.bits_pos[idx+14][0]<<1 self.put(self.bits_pos[idx+13][1], self.bits_pos[idx+14][2], self.out_ann, [10, ['Delayed on: ' + \ self.delayed_on[delay_on], self.delayed_on[delay_on]]]) lwr = self.bits_pos[idx+15][0]<<3 | self.bits_pos[idx+16][0]<<2 | \ self.bits_pos[idx+18][0]<<1 | self.bits_pos[idx+19][0]<<0 self.put(self.bits_pos[idx+15][1], self.bits_pos[idx+19][2], self.out_ann, [10, ['Last default read word: %d' % lwr, 'LWR: %d' % lwr, '%d' % lwr]]) self.put(self.bits_pos[idx+20][1], self.bits_pos[idx+20][2], self.out_ann, [10, ['Read login: %d' % self.bits_pos[idx+20][0], '%d' % self.bits_pos[idx+20][0]]]) self.put(self.bits_pos[idx+21][1], self.bits_pos[idx+21][2], self.out_ann, [10, ['Zero bits', 'ZB']]) self.put(self.bits_pos[idx+22][1], self.bits_pos[idx+22][2], self.out_ann, [10, ['Write login: %d' % self.bits_pos[idx+22][0], '%d' % self.bits_pos[idx+22][0]]]) self.put(self.bits_pos[idx+23][1], self.bits_pos[idx+24][2], self.out_ann, [10, ['Zero bits', 'ZB']]) self.put(self.bits_pos[idx+25][1], self.bits_pos[idx+25][2], self.out_ann, [10, ['Disable: %d' % self.bits_pos[idx+25][0], '%d' % self.bits_pos[idx+25][0]]]) self.put(self.bits_pos[idx+27][1], self.bits_pos[idx+27][2], self.out_ann, [10, ['Reader talk first: %d' % self.bits_pos[idx+27][0], 'RTF: %d' % self.bits_pos[idx+27][0]]]) self.put(self.bits_pos[idx+28][1], self.bits_pos[idx+28][2], self.out_ann, [10, ['Zero bits', 'ZB']]) self.put(self.bits_pos[idx+29][1], self.bits_pos[idx+29][2], self.out_ann, [10, ['Pigeon mode: %d' % self.bits_pos[idx+29][0], '%d' % self.bits_pos[idx+29][0]]]) self.put(self.bits_pos[idx+30][1], self.bits_pos[idx+34][2], self.out_ann, [10, ['Reserved', 'Res', 'R']]) def put4bits(self, idx): bits = self.bits_pos[idx][0]<<3 | self.bits_pos[idx+1][0]<<2 | \ self.bits_pos[idx+2][0]<<1 | self.bits_pos[idx+3][0] self.put(self.bits_pos[idx][1], self.bits_pos[idx+3][2], self.out_ann, [10, ['%X' % bits]]) def em4100_decode1(self, idx): self.put(self.bits_pos[idx][1], self.bits_pos[idx+9][2], self.out_ann, [10, ['EM4100 header', 'EM header', 'Header', 'H']]) self.put4bits(idx+10) bits = self.bits_pos[idx+15][0]<<3 | self.bits_pos[idx+16][0]<<2 | \ self.bits_pos[idx+18][0]<<1 | self.bits_pos[idx+19][0]<<0 self.put(self.bits_pos[idx+15][1], self.bits_pos[idx+19][2], self.out_ann, [10, ['%X' % bits]]) self.put4bits(idx+21) self.put4bits(idx+27) self.em4100_decode1_partial = self.bits_pos[idx+32][0]<<3 | \ self.bits_pos[idx+33][0]<<2 | self.bits_pos[idx+34][0]<<1 self.put(self.bits_pos[idx+32][1], self.bits_pos[idx+34][2], self.out_ann, [10, ['Partial nibble']]) def em4100_decode2(self, idx): if self.em4100_decode1_partial != 0: bits = self.em4100_decode1_partial + self.bits_pos[idx][0] self.put(self.bits_pos[idx][1], self.bits_pos[idx][2], self.out_ann, [10, ['%X' % bits]]) self.em4100_decode1_partial = 0 else: self.put(self.bits_pos[idx][1], self.bits_pos[idx][2], self.out_ann, [10, ['Partial nibble']]) self.put4bits(idx+2) bits = self.bits_pos[idx+7][0]<<3 | self.bits_pos[idx+9][0]<<2 | \ self.bits_pos[idx+10][0]<<1 | self.bits_pos[idx+11][0]<<0 self.put(self.bits_pos[idx+7][1], self.bits_pos[idx+11][2], self.out_ann, [10, ['%X' % bits]]) self.put4bits(idx+13) self.put4bits(idx+19) bits = self.bits_pos[idx+24][0]<<3 | self.bits_pos[idx+25][0]<<2 | \ self.bits_pos[idx+27][0]<<1 | self.bits_pos[idx+28][0]<<0 self.put(self.bits_pos[idx+24][1], self.bits_pos[idx+28][2], self.out_ann, [10, ['%X' % bits]]) self.put(self.bits_pos[idx+30][1], self.bits_pos[idx+34][2], self.out_ann, [10, ['EM4100 trailer']]) def get_32_bits(self, idx): return self.get_8_bits(idx+27)<<24 | self.get_8_bits(idx+18)<<16 | \ self.get_8_bits(idx+9)<<8 | self.get_8_bits(idx) def get_8_bits(self, idx): retval = 0 for i in range(0, 8): retval <<= 1 retval |= self.bits_pos[i+idx][0] return retval def get_3_bits(self, idx): return self.bits_pos[idx][0]<<2 | self.bits_pos[idx+1][0]<<1 | \ self.bits_pos[idx+2][0] def get_4_bits(self, idx): return self.bits_pos[idx][0]<<0 | self.bits_pos[idx+1][0]<<1 | \ self.bits_pos[idx+2][0]<<2 | self.bits_pos[idx+3][0]<<3 def print_row_parity(self, idx, length): parity = 0 for i in range(0, length): parity += self.bits_pos[i+idx][0] parity = parity & 0x1 if parity == self.bits_pos[idx+length][0]: self.put(self.bits_pos[idx+length][1], self.bits_pos[idx+length][2], self.out_ann, [5, ['Row parity OK', 'Parity OK', 'OK']]) else: self.put(self.bits_pos[idx+length][1], self.bits_pos[idx+length][2], self.out_ann, [5, ['Row parity failed', 'Parity failed', 'Fail']]) def print_col_parity(self, idx): data_1 = self.get_8_bits(idx) data_2 = self.get_8_bits(idx+9) data_3 = self.get_8_bits(idx+9+9) data_4 = self.get_8_bits(idx+9+9+9) col_par = self.get_8_bits(idx+9+9+9+9) col_par_calc = data_1^data_2^data_3^data_4 if col_par == col_par_calc: self.put(self.bits_pos[idx+9+9+9+9][1], self.bits_pos[idx+9+9+9+9+7][2], self.out_ann, [5, ['Column parity OK', 'Parity OK', 'OK']]) else: self.put(self.bits_pos[idx+9+9+9+9][1], self.bits_pos[idx+9+9+9+9+7][2], self.out_ann, [5, ['Column parity failed', 'Parity failed', 'Fail']]) def print_8bit_data(self, idx): data = self.get_8_bits(idx) self.put(self.bits_pos[idx][1], self.bits_pos[idx+7][2], self.out_ann, [9, ['Data' + ': %X' % data, '%X' % data]]) def put_fields(self): if self.bit_nr == 50: self.put(self.bits_pos[0][1], self.bits_pos[0][2], self.out_ann, [4, ['Logic zero']]) self.put(self.bits_pos[1][1], self.bits_pos[4][2], self.out_ann, [4, ['Command', 'Cmd', 'C']]) self.put(self.bits_pos[5][1], self.bits_pos[49][2], self.out_ann, [4, ['Password', 'Passwd', 'Pass', 'P']]) # Get command. cmd = self.get_3_bits(1) self.put(self.bits_pos[1][1], self.bits_pos[3][2], self.out_ann, [5, [self.cmds[cmd]]]) self.print_row_parity(1, 3) # Print data. self.print_8bit_data(5) self.print_row_parity(5, 8) self.print_8bit_data(14) self.print_row_parity(14, 8) self.print_8bit_data(23) self.print_row_parity(23, 8) self.print_8bit_data(32) self.print_row_parity(32, 8) self.print_col_parity(5) if self.bits_pos[49][0] == 0: self.put(self.bits_pos[49][1], self.bits_pos[49][2], self.out_ann, [5, ['Stop bit', 'Stop', 'SB']]) else: self.put(self.bits_pos[49][1], self.bits_pos[49][2], self.out_ann, [5, ['Stop bit error', 'Error']]) if cmd == 1: password = self.get_32_bits(5) self.put(self.bits_pos[12][1], self.bits_pos[46][2], self.out_ann, [10, ['Login password: %X' % password]]) if self.bit_nr == 57: self.put(self.bits_pos[0][1], self.bits_pos[0][2], self.out_ann, [4, ['Logic zero', 'LZ']]) self.put(self.bits_pos[1][1], self.bits_pos[4][2], self.out_ann, [4, ['Command', 'Cmd', 'C']]) self.put(self.bits_pos[5][1], self.bits_pos[11][2], self.out_ann, [4, ['Address', 'Addr', 'A']]) self.put(self.bits_pos[12][1], self.bits_pos[56][2], self.out_ann, [4, ['Data', 'Da', 'D']]) # Get command. cmd = self.get_3_bits(1) self.put(self.bits_pos[1][1], self.bits_pos[3][2], self.out_ann, [5, [self.cmds[cmd]]]) self.print_row_parity(1, 3) # Get address. addr = self.get_4_bits(5) self.put(self.bits_pos[5][1], self.bits_pos[8][2], self.out_ann, [9, ['Addr' + ': %d' % addr, '%d' % addr]]) self.put(self.bits_pos[9][1], self.bits_pos[10][2], self.out_ann, [5, ['Zero bits', 'ZB']]) self.print_row_parity(5, 6) # Print data. self.print_8bit_data(12) self.print_row_parity(12, 8) self.print_8bit_data(21) self.print_row_parity(21, 8) self.print_8bit_data(30) self.print_row_parity(30, 8) self.print_8bit_data(39) self.print_row_parity(39, 8) self.print_col_parity(12) if self.bits_pos[56][0] == 0: self.put(self.bits_pos[56][1], self.bits_pos[56][2], self.out_ann, [5, ['Stop bit', 'Stop', 'SB']]) else: self.put(self.bits_pos[56][1], self.bits_pos[56][2], self.out_ann, [5, ['Stop bit error', 'Error']]) if addr == 4: self.decode_config(12) if addr == 2: password = self.get_32_bits(12) self.put(self.bits_pos[12][1], self.bits_pos[46][2], self.out_ann, [10, ['Write password: %X' % password]]) # If we are programming EM4100 data we can decode it halfway. if addr == 5 and self.options['em4100_decode'] == 'on': self.em4100_decode1(12) if addr == 6 and self.options['em4100_decode'] == 'on': self.em4100_decode2(12) self.bit_nr = 0 def add_bits_pos(self, bit, ss_bit, es_bit): if self.bit_nr < 70: self.bits_pos[self.bit_nr][0] = bit self.bits_pos[self.bit_nr][1] = ss_bit self.bits_pos[self.bit_nr][2] = es_bit self.bit_nr += 1 def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') # Initialize internal state. self.last_samplenum = self.samplenum self.oldsamplenum = 0 self.old_gap_end = 0 self.gap_detected = 0 self.bit_nr = 0 while True: # Ignore identical samples, only process edges. (pin,) = self.wait({0: 'e'}) pl = self.samplenum - self.oldsamplenum pp = pin samples = self.samplenum - self.last_samplenum if self.state == 'FFS_DETECTED': if pl > self.writegap: self.gap_detected = 1 if (self.last_samplenum - self.old_gap_end) > self.nogap: self.gap_detected = 0 self.state = 'FFS_SEARCH' self.put(self.old_gap_end, self.last_samplenum, self.out_ann, [3, ['Write mode exit']]) self.put_fields() if self.state == 'FFS_SEARCH': if pl > self.ffs: self.gap_detected = 1 self.put(self.last_samplenum, self.samplenum, self.out_ann, [1, ['First field stop', 'Field stop', 'FFS']]) self.state = 'FFS_DETECTED' if self.gap_detected == 1: self.gap_detected = 0 if (self.last_samplenum - self.old_gap_end) > self.wzmin \ and (self.last_samplenum - self.old_gap_end) < self.wzmax: self.put(self.old_gap_end, self.samplenum, self.out_ann, [0, ['0']]) self.add_bits_pos(0, self.old_gap_end, self.samplenum) if (self.last_samplenum - self.old_gap_end) > self.womax \ and (self.last_samplenum-self.old_gap_end) < self.nogap: # One or more 1 bits one_bits = (int)((self.last_samplenum - self.old_gap_end) / self.womax) for ox in range(0, one_bits): bs = (int)(self.old_gap_end+ox*self.womax) be = (int)(self.old_gap_end+ox*self.womax + self.womax) self.put(bs, be, self.out_ann, [0, ['1']]) self.add_bits_pos(1, bs, be) if (self.samplenum - self.last_samplenum) > self.wzmin \ and (self.samplenum - self.last_samplenum) < self.wzmax: bs = (int)(self.old_gap_end+one_bits*self.womax) self.put(bs, self.samplenum, self.out_ann, [0, ['0']]) self.add_bits_pos(0, bs, self.samplenum) self.old_gap_end = self.samplenum if self.state == 'SKIP': self.state = 'FFS_SEARCH' self.oldsamplenum = self.samplenum self.last_samplenum = self.samplenum libsigrokdecode-0.5.0/decoders/em4305/__init__.py0000644000175000017500000000151513117367246016420 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Benjamin Larsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' EM4305 is a 100-150kHz RFID protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/avr_isp/0000755000175000017500000000000013117367246015113 500000000000000libsigrokdecode-0.5.0/decoders/avr_isp/parts.py0000644000175000017500000000253413117367246016542 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Device code addresses: # 0x00: vendor code, 0x01: part family + flash size, 0x02: part number # Vendor code vendor_code = { 0x1e: 'Atmel', 0x00: 'Device locked', } # (Part family + flash size, part number) part = { (0x90, 0x01): 'AT90S1200', (0x91, 0x01): 'AT90S2313', (0x92, 0x01): 'AT90S4414', (0x92, 0x05): 'ATmega48', # 4kB flash (0x93, 0x01): 'AT90S8515', (0x93, 0x0a): 'ATmega88', # 8kB flash (0x94, 0x06): 'ATmega168', # 16kB flash (0xff, 0xff): 'Device code erased, or target missing', (0x01, 0x02): 'Device locked', # TODO: Lots more entries. } libsigrokdecode-0.5.0/decoders/avr_isp/pd.py0000644000175000017500000001635313117367246016020 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .parts import * VENDOR_CODE_ATMEL = 0x1e class Decoder(srd.Decoder): api_version = 2 id = 'avr_isp' name = 'AVR ISP' longname = 'AVR In-System Programming' desc = 'Protocol for in-system programming Atmel AVR MCUs.' license = 'gplv2+' inputs = ['spi'] outputs = ['avr_isp'] annotations = ( ('pe', 'Programming enable'), ('rsb0', 'Read signature byte 0'), ('rsb1', 'Read signature byte 1'), ('rsb2', 'Read signature byte 2'), ('ce', 'Chip erase'), ('rfb', 'Read fuse bits'), ('rhfb', 'Read high fuse bits'), ('refb', 'Read extended fuse bits'), ('warnings', 'Warnings'), ('dev', 'Device'), ) annotation_rows = ( ('bits', 'Bits', ()), ('commands', 'Commands', tuple(range(7 + 1))), ('warnings', 'Warnings', (8,)), ('dev', 'Device', (9,)), ) def __init__(self): self.state = 'IDLE' self.mosi_bytes, self.miso_bytes = [], [] self.ss_cmd, self.es_cmd = 0, 0 self.xx, self.yy, self.zz, self.mm = 0, 0, 0, 0 self.ss_device = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def handle_cmd_programming_enable(self, cmd, ret): # Programming enable. # Note: The chip doesn't send any ACK for 'Programming enable'. self.putx([0, ['Programming enable']]) # Sanity check on reply. if ret[1:4] != [0xac, 0x53, cmd[2]]: self.putx([8, ['Warning: Unexpected bytes in reply!']]) def handle_cmd_read_signature_byte_0x00(self, cmd, ret): # Signature byte 0x00: vendor code. self.vendor_code = ret[3] v = vendor_code[self.vendor_code] self.putx([1, ['Vendor code: 0x%02x (%s)' % (ret[3], v)]]) # Store for later. self.xx = cmd[1] # Same as ret[2]. self.yy = cmd[3] self.zz = ret[0] # Sanity check on reply. if ret[1] != 0x30 or ret[2] != cmd[1]: self.putx([8, ['Warning: Unexpected bytes in reply!']]) # Sanity check for the vendor code. if self.vendor_code != VENDOR_CODE_ATMEL: self.putx([8, ['Warning: Vendor code was not 0x1e (Atmel)!']]) def handle_cmd_read_signature_byte_0x01(self, cmd, ret): # Signature byte 0x01: part family and memory size. self.part_fam_flash_size = ret[3] self.putx([2, ['Part family / memory size: 0x%02x' % ret[3]]]) # Store for later. self.mm = cmd[3] self.ss_device = self.ss_cmd # Sanity check on reply. if ret[1] != 0x30 or ret[2] != cmd[1] or ret[0] != self.yy: self.putx([8, ['Warning: Unexpected bytes in reply!']]) def handle_cmd_read_signature_byte_0x02(self, cmd, ret): # Signature byte 0x02: part number. self.part_number = ret[3] self.putx([3, ['Part number: 0x%02x' % ret[3]]]) p = part[(self.part_fam_flash_size, self.part_number)] data = [9, ['Device: Atmel %s' % p]] self.put(self.ss_device, self.es_cmd, self.out_ann, data) # Sanity check on reply. if ret[1] != 0x30 or ret[2] != self.xx or ret[0] != self.mm: self.putx([8, ['Warning: Unexpected bytes in reply!']]) self.xx, self.yy, self.zz, self.mm = 0, 0, 0, 0 def handle_cmd_chip_erase(self, cmd, ret): # Chip erase (erases both flash an EEPROM). # Upon successful chip erase, the lock bits will also be erased. # The only way to end a Chip Erase cycle is to release RESET#. self.putx([4, ['Chip erase']]) # TODO: Check/handle RESET#. # Sanity check on reply. bit = (ret[2] & (1 << 7)) >> 7 if ret[1] != 0xac or bit != 1 or ret[3] != cmd[2]: self.putx([8, ['Warning: Unexpected bytes in reply!']]) def handle_cmd_read_fuse_bits(self, cmd, ret): # Read fuse bits. self.putx([5, ['Read fuse bits: 0x%02x' % ret[3]]]) # TODO: Decode fuse bits. # TODO: Sanity check on reply. def handle_cmd_read_fuse_high_bits(self, cmd, ret): # Read fuse high bits. self.putx([6, ['Read fuse high bits: 0x%02x' % ret[3]]]) # TODO: Decode fuse bits. # TODO: Sanity check on reply. def handle_cmd_read_extended_fuse_bits(self, cmd, ret): # Read extended fuse bits. self.putx([7, ['Read extended fuse bits: 0x%02x' % ret[3]]]) # TODO: Decode fuse bits. # TODO: Sanity check on reply. def handle_command(self, cmd, ret): if cmd[:2] == [0xac, 0x53]: self.handle_cmd_programming_enable(cmd, ret) elif cmd[0] == 0xac and (cmd[1] & (1 << 7)) == (1 << 7): self.handle_cmd_chip_erase(cmd, ret) elif cmd[:3] == [0x50, 0x00, 0x00]: self.handle_cmd_read_fuse_bits(cmd, ret) elif cmd[:3] == [0x58, 0x08, 0x00]: self.handle_cmd_read_fuse_high_bits(cmd, ret) elif cmd[:3] == [0x50, 0x08, 0x00]: self.handle_cmd_read_extended_fuse_bits(cmd, ret) elif cmd[0] == 0x30 and cmd[2] == 0x00: self.handle_cmd_read_signature_byte_0x00(cmd, ret) elif cmd[0] == 0x30 and cmd[2] == 0x01: self.handle_cmd_read_signature_byte_0x01(cmd, ret) elif cmd[0] == 0x30 and cmd[2] == 0x02: self.handle_cmd_read_signature_byte_0x02(cmd, ret) else: c = '%02x %02x %02x %02x' % tuple(cmd) r = '%02x %02x %02x %02x' % tuple(ret) self.putx([0, ['Unknown command: %s (reply: %s)!' % (c, r)]]) def decode(self, ss, es, data): ptype, mosi, miso = data # For now, only use DATA and BITS packets. if ptype not in ('DATA', 'BITS'): return # Store the individual bit values and ss/es numbers. The next packet # is guaranteed to be a 'DATA' packet belonging to this 'BITS' one. if ptype == 'BITS': self.miso_bits, self.mosi_bits = miso, mosi return self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: self.ss_cmd = ss # Append new bytes. self.mosi_bytes.append(mosi) self.miso_bytes.append(miso) # All commands consist of 4 bytes. if len(self.mosi_bytes) < 4: return self.es_cmd = es self.handle_command(self.mosi_bytes, self.miso_bytes) self.mosi_bytes = [] self.miso_bytes = [] libsigrokdecode-0.5.0/decoders/avr_isp/__init__.py0000644000175000017500000000165113117367246017147 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'spi' PD and decodes the In-System Programming (ISP) protocol of some Atmel AVR 8-bit microcontrollers. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/nunchuk/0000755000175000017500000000000013117367246015123 500000000000000libsigrokdecode-0.5.0/decoders/nunchuk/pd.py0000644000175000017500000001651013117367246016023 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2010-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'nunchuk' name = 'Nunchuk' longname = 'Nintendo Wii Nunchuk' desc = 'Nintendo Wii Nunchuk controller protocol.' license = 'gplv2+' inputs = ['i2c'] outputs = ['nunchuck'] annotations = \ tuple(('reg-0x%02X' % i, 'Register 0x%02X' % i) for i in range(6)) + ( ('bit-bz', 'BZ bit'), ('bit-bc', 'BC bit'), ('bit-ax', 'AX bits'), ('bit-ay', 'AY bits'), ('bit-az', 'AZ bits'), ('nunchuk-write', 'Nunchuk write'), ('cmd-init', 'Init command'), ('summary', 'Summary'), ('warnings', 'Warnings'), ) annotation_rows = ( ('regs', 'Registers', tuple(range(13))), ('summary', 'Summary', (13,)), ('warnings', 'Warnings', (14,)), ) def __init__(self): self.state = 'IDLE' self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = -1 self.databytecount = 0 self.reg = 0x00 self.ss = self.es = self.ss_block = self.es_block = 0 self.init_seq = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def putb(self, data): self.put(self.ss_block, self.es_block, self.out_ann, data) def putd(self, bit1, bit2, data): self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data) def handle_reg_0x00(self, databyte): self.ss_block = self.ss self.sx = databyte self.putx([0, ['Analog stick X position: 0x%02X' % self.sx, 'SX: 0x%02X' % self.sx]]) def handle_reg_0x01(self, databyte): self.sy = databyte self.putx([1, ['Analog stick Y position: 0x%02X' % self.sy, 'SY: 0x%02X' % self.sy]]) def handle_reg_0x02(self, databyte): self.ax = databyte << 2 self.putx([2, ['Accelerometer X value bits[9:2]: 0x%03X' % self.ax, 'AX[9:2]: 0x%03X' % self.ax]]) def handle_reg_0x03(self, databyte): self.ay = databyte << 2 self.putx([3, ['Accelerometer Y value bits[9:2]: 0x%03X' % self.ay, 'AY[9:2]: 0x%03X' % self.ay]]) def handle_reg_0x04(self, databyte): self.az = databyte << 2 self.putx([4, ['Accelerometer Z value bits[9:2]: 0x%03X' % self.az, 'AZ[9:2]: 0x%03X' % self.az]]) def handle_reg_0x05(self, databyte): self.es_block = self.es self.bz = (databyte & (1 << 0)) >> 0 # Bits[0:0] self.bc = (databyte & (1 << 1)) >> 1 # Bits[1:1] ax_rest = (databyte & (3 << 2)) >> 2 # Bits[3:2] ay_rest = (databyte & (3 << 4)) >> 4 # Bits[5:4] az_rest = (databyte & (3 << 6)) >> 6 # Bits[7:6] self.ax |= ax_rest self.ay |= ay_rest self.az |= az_rest # self.putx([5, ['Register 5', 'Reg 5', 'R5']]) s = '' if (self.bz == 0) else 'not ' self.putd(0, 0, [6, ['Z: %spressed' % s, 'BZ: %d' % self.bz]]) s = '' if (self.bc == 0) else 'not ' self.putd(1, 1, [7, ['C: %spressed' % s, 'BC: %d' % self.bc]]) self.putd(3, 2, [8, ['Accelerometer X value bits[1:0]: 0x%X' % ax_rest, 'AX[1:0]: 0x%X' % ax_rest]]) self.putd(5, 4, [9, ['Accelerometer Y value bits[1:0]: 0x%X' % ay_rest, 'AY[1:0]: 0x%X' % ay_rest]]) self.putd(7, 6, [10, ['Accelerometer Z value bits[1:0]: 0x%X' % az_rest, 'AZ[1:0]: 0x%X' % az_rest]]) self.reg = 0x00 def output_full_block_if_possible(self): # For now, only output summary annotations if all values are available. t = (self.sx, self.sy, self.ax, self.ay, self.az, self.bz, self.bc) if -1 in t: return bz = 'pressed' if self.bz == 0 else 'not pressed' bc = 'pressed' if self.bc == 0 else 'not pressed' s = 'Analog stick: %d/%d, accelerometer: %d/%d/%d, Z: %s, C: %s' % \ (self.sx, self.sy, self.ax, self.ay, self.az, bz, bc) self.putb([13, [s]]) def handle_reg_write(self, databyte): self.putx([11, ['Nunchuk write: 0x%02X' % databyte]]) if len(self.init_seq) < 2: self.init_seq.append(databyte) def output_init_seq(self): if len(self.init_seq) != 2: self.putb([14, ['Init sequence was %d bytes long (2 expected)' % \ len(self.init_seq)]]) return if self.init_seq != [0x40, 0x00]: self.putb([14, ['Unknown init sequence (expected: 0x40 0x00)']]) return # TODO: Detect Nunchuk clones (they have different init sequences). self.putb([12, ['Initialize Nunchuk', 'Init Nunchuk', 'Init', 'I']]) def decode(self, ss, es, data): cmd, databyte = data # Collect the 'BITS' packet, then return. The next packet is # guaranteed to belong to these bits we just stored. if cmd == 'BITS': self.bits = databyte return self.ss, self.es = ss, es # State machine. if self.state == 'IDLE': # Wait for an I²C START condition. if cmd != 'START': return self.state = 'GET SLAVE ADDR' self.ss_block = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address read/write operation. if cmd == 'ADDRESS READ': self.state = 'READ REGS' elif cmd == 'ADDRESS WRITE': self.state = 'WRITE REGS' elif self.state == 'READ REGS': if cmd == 'DATA READ': handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) handle_reg(databyte) self.reg += 1 elif cmd == 'STOP': self.es_block = es self.output_full_block_if_possible() self.sx = self.sy = self.ax = self.ay = self.az = -1 self.bz = self.bc = -1 self.state = 'IDLE' else: # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) pass elif self.state == 'WRITE REGS': if cmd == 'DATA WRITE': self.handle_reg_write(databyte) elif cmd == 'STOP': self.es_block = es self.output_init_seq() self.init_seq = [] self.state = 'IDLE' else: # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) pass libsigrokdecode-0.5.0/decoders/nunchuk/__init__.py0000644000175000017500000000207713117367246017162 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'i2c' PD and decodes the Nintendo Wii Nunchuk controller protocol. Details: http://wiibrew.org/wiki/Wiimote/Extension_Controllers/Nunchuck http://todbot.com/blog/2008/02/18/wiichuck-wii-nunchuck-adapter-available/ https://www.sparkfun.com/products/9281 ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/guess_bitrate/0000755000175000017500000000000013117367246016310 500000000000000libsigrokdecode-0.5.0/decoders/guess_bitrate/pd.py0000644000175000017500000000473313117367246017214 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013-2016 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'guess_bitrate' name = 'Guess bitrate' longname = 'Guess bitrate/baudrate' desc = 'Guess the bitrate/baudrate of a UART (or other) protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['guess_bitrate'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) annotations = ( ('bitrate', 'Bitrate / baudrate'), ) def putx(self, data): self.put(self.ss_edge, self.samplenum, self.out_ann, data) def __init__(self): self.ss_edge = None self.first_transition = True self.bitwidth = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: # Wait for any transition/edge on the data line. self.wait({0: 'e'}) # Get the smallest distance between two transitions # and use that to calculate the bitrate/baudrate. if self.first_transition: self.ss_edge = self.samplenum self.first_transition = False else: b = self.samplenum - self.ss_edge if self.bitwidth is None or b < self.bitwidth: self.bitwidth = b bitrate = int(float(self.samplerate) / float(b)) self.putx([0, ['%d' % bitrate]]) self.ss_edge = self.samplenum libsigrokdecode-0.5.0/decoders/guess_bitrate/__init__.py0000644000175000017500000000306313117367246020343 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2013 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder tries to guess the bitrate / baudrate of the communication on the specified channel. Typically this will be used to guess / detect the baudrate used in a UART communication snippet, but it could also be used to guess bitrates of certain other protocols or buses. It should be noted that this is nothing more than a simple guess / heuristic, and that there are various cases in practice where the detection of the bitrate or baudrate will not necessarily have the expected result. The precision of the estimated bitrate / baudrate will also depend on the samplerate used to sample the respective channel. For good results it is recommended to use a logic analyzer samplerate that is much higher than the expected bitrate/baudrate that might be used on the channel. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/sdcard_sd/0000755000175000017500000000000013117367246015376 500000000000000libsigrokdecode-0.5.0/decoders/sdcard_sd/pd.py0000644000175000017500000004233713117367246016304 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from common.sdcard import (cmd_names, acmd_names, accepted_voltages, card_status, sd_status) class Decoder(srd.Decoder): api_version = 3 id = 'sdcard_sd' name = 'SD card (SD mode)' longname = 'Secure Digital card (SD mode)' desc = 'Secure Digital card (SD mode) low-level protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['sdcard_sd'] channels = ( {'id': 'cmd', 'name': 'CMD', 'desc': 'Command'}, {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'}, ) optional_channels = ( {'id': 'dat0', 'name': 'DAT0', 'desc': 'Data pin 0'}, {'id': 'dat1', 'name': 'DAT1', 'desc': 'Data pin 1'}, {'id': 'dat2', 'name': 'DAT2', 'desc': 'Data pin 2'}, {'id': 'dat3', 'name': 'DAT3', 'desc': 'Data pin 3'}, ) annotations = \ tuple(('cmd%d' % i, 'CMD%d' % i) for i in range(64)) + \ tuple(('acmd%d' % i, 'ACMD%d' % i) for i in range(64)) + ( \ ('bits', 'Bits'), ('field-start', 'Start bit'), ('field-transmission', 'Transmission bit'), ('field-cmd', 'Command'), ('field-arg', 'Argument'), ('field-crc', 'CRC'), ('field-end', 'End bit'), ('decoded-bits', 'Decoded bits'), ('decoded-fields', 'Decoded fields'), ) annotation_rows = ( ('raw-bits', 'Raw bits', (128,)), ('decoded-bits', 'Decoded bits', (135,)), ('decoded-fields', 'Decoded fields', (136,)), ('fields', 'Fields', tuple(range(129, 135))), ('cmd', 'Commands', tuple(range(128))), ) def __init__(self): self.state = 'GET COMMAND TOKEN' self.token = [] self.is_acmd = False # Indicates CMD vs. ACMD self.cmd = None self.last_cmd = None self.arg = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putbit(self, b, data): self.put(self.token[b][0], self.token[b][1], self.out_ann, [135, data]) def putt(self, data): self.put(self.token[0][0], self.token[47][1], self.out_ann, data) def putf(self, s, e, data): self.put(self.token[s][0], self.token[e][1], self.out_ann, data) def puta(self, s, e, data): self.put(self.token[47 - 8 - e][0], self.token[47 - 8 - s][1], self.out_ann, data) def putc(self, cmd, desc): self.last_cmd = cmd self.putt([cmd, ['%s: %s' % (self.cmd_str, desc), self.cmd_str, self.cmd_str.split(' ')[0]]]) def putr(self, desc): self.putt([self.last_cmd, ['Reply: %s' % desc]]) def reset(self): self.cmd, self.arg = None, None self.token, self.state = [], 'GET COMMAND TOKEN' def cmd_name(self, cmd): c = acmd_names if self.is_acmd else cmd_names return c.get(cmd, 'Unknown') def get_token_bits(self, cmd, n): # Get a bit, return True if we already got 'n' bits, False otherwise. self.token.append([self.samplenum, self.samplenum, cmd]) if len(self.token) > 0: self.token[len(self.token) - 2][1] = self.samplenum if len(self.token) < n: return False self.token[n - 1][1] += self.token[n - 1][0] - self.token[n - 2][0] return True def handle_common_token_fields(self): s = self.token # Annotations for each individual bit. for bit in range(len(self.token)): self.putf(bit, bit, [128, ['%d' % s[bit][2]]]) # CMD[47:47]: Start bit (always 0) self.putf(0, 0, [129, ['Start bit', 'Start', 'S']]) # CMD[46:46]: Transmission bit (1 == host) t = 'host' if s[1][2] == 1 else 'card' self.putf(1, 1, [130, ['Transmission: ' + t, 'T: ' + t, 'T']]) # CMD[45:40]: Command index (BCD; valid: 0-63) self.cmd = int('0b' + ''.join([str(s[i][2]) for i in range(2, 8)]), 2) c = '%s (%d)' % (self.cmd_name(self.cmd), self.cmd) self.putf(2, 7, [131, ['Command: ' + c, 'Cmd: ' + c, 'CMD%d' % self.cmd, 'Cmd', 'C']]) # CMD[39:08]: Argument self.arg = int('0b' + ''.join([str(s[i][2]) for i in range(8, 40)]), 2) self.putf(8, 39, [132, ['Argument: 0x%08x' % self.arg, 'Arg', 'A']]) # CMD[07:01]: CRC7 self.crc = int('0b' + ''.join([str(s[i][2]) for i in range(40, 47)]), 2) self.putf(40, 46, [133, ['CRC: 0x%x' % self.crc, 'CRC', 'C']]) # CMD[00:00]: End bit (always 1) self.putf(47, 47, [134, ['End bit', 'End', 'E']]) def get_command_token(self, cmd): # Command tokens (48 bits) are sent serially (MSB-first) by the host # (over the CMD line), either to one SD card or to multiple ones. # # Format: # - Bits[47:47]: Start bit (always 0) # - Bits[46:46]: Transmission bit (1 == host) # - Bits[45:40]: Command index (BCD; valid: 0-63) # - Bits[39:08]: Argument # - Bits[07:01]: CRC7 # - Bits[00:00]: End bit (always 1) if not self.get_token_bits(cmd, 48): return self.handle_common_token_fields() # Handle command. s = 'ACMD' if self.is_acmd else 'CMD' self.cmd_str = '%s%d (%s)' % (s, self.cmd, self.cmd_name(self.cmd)) if self.cmd in (0, 2, 3, 6, 7, 8, 9, 10, 13, 41, 51, 55): self.state = 'HANDLE CMD%d' % self.cmd else: self.state = 'HANDLE CMD999' self.putc(self.cmd, '%s%d' % (s, self.cmd)) def handle_cmd0(self): # CMD0 (GO_IDLE_STATE) -> no response self.puta(0, 31, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(0, 'Reset all SD cards') self.token, self.state = [], 'GET COMMAND TOKEN' def handle_cmd2(self): # CMD2 (ALL_SEND_CID) -> R2 self.puta(0, 31, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(2, 'Ask card for CID number') self.token, self.state = [], 'GET RESPONSE R2' def handle_cmd3(self): # CMD3 (SEND_RELATIVE_ADDR) -> R6 self.puta(0, 31, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(3, 'Ask card for new relative card address (RCA)') self.token, self.state = [], 'GET RESPONSE R6' def handle_cmd6(self): # CMD6 (SWITCH_FUNC) -> R1 self.putc(6, 'Switch/check card function') self.token, self.state = [], 'GET RESPONSE R1' def handle_cmd7(self): # CMD7 (SELECT/DESELECT_CARD) -> R1b self.putc(7, 'Select / deselect card') self.token, self.state = [], 'GET RESPONSE R6' def handle_cmd8(self): # CMD8 (SEND_IF_COND) -> R7 self.puta(12, 31, [136, ['Reserved', 'Res', 'R']]) self.puta(8, 11, [136, ['Supply voltage', 'Voltage', 'VHS', 'V']]) self.puta(0, 7, [136, ['Check pattern', 'Check pat', 'Check', 'C']]) self.putc(8, 'Send interface condition to card') self.token, self.state = [], 'GET RESPONSE R7' # TODO: Handle case when card doesn't reply with R7 (no reply at all). def handle_cmd9(self): # CMD9 (SEND_CSD) -> R2 self.puta(16, 31, [136, ['RCA', 'R']]) self.puta(0, 15, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(9, 'Send card-specific data (CSD)') self.token, self.state = [], 'GET RESPONSE R2' def handle_cmd10(self): # CMD10 (SEND_CID) -> R2 self.puta(16, 31, [136, ['RCA', 'R']]) self.puta(0, 15, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(9, 'Send card identification data (CID)') self.token, self.state = [], 'GET RESPONSE R2' def handle_cmd13(self): # CMD13 (SEND_STATUS) -> R1 self.puta(16, 31, [136, ['RCA', 'R']]) self.puta(0, 15, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(13, 'Send card status register') self.token, self.state = [], 'GET RESPONSE R1' def handle_cmd16(self): # CMD16 (SET_BLOCKLEN) -> R1 self.puta(0, 31, [136, ['Block length', 'Blocklen', 'BL', 'B']]) self.putc(16, 'Set the block length to %d bytes' % self.arg) self.token, self.state = [], 'GET RESPONSE R1' def handle_cmd55(self): # CMD55 (APP_CMD) -> R1 self.puta(16, 31, [136, ['RCA', 'R']]) self.puta(0, 15, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(55, 'Next command is an application-specific command') self.is_acmd = True self.token, self.state = [], 'GET RESPONSE R1' def handle_acmd6(self): # ACMD6 (SET_BUS_WIDTH) -> R1 self.putc(64 + 6, 'Read SD config register (SCR)') self.token, self.state = [], 'GET RESPONSE R1' def handle_acmd13(self): # ACMD13 (SD_STATUS) -> R1 self.puta(0, 31, [136, ['Stuff bits', 'Stuff', 'SB', 'S']]) self.putc(64 + 13, 'Set SD status') self.token, self.state = [], 'GET RESPONSE R1' def handle_acmd41(self): # ACMD41 (SD_SEND_OP_COND) -> R3 self.puta(0, 23, [136, ['VDD voltage window', 'VDD volt', 'VDD', 'V']]) self.puta(24, 24, [136, ['S18R']]) self.puta(25, 27, [136, ['Reserved', 'Res', 'R']]) self.puta(28, 28, [136, ['XPC']]) self.puta(29, 29, [136, ['Reserved for eSD', 'Reserved', 'Res', 'R']]) self.puta(30, 30, [136, ['Host capacity support info', 'Host capacity', 'HCS', 'H']]) self.puta(31, 31, [136, ['Reserved', 'Res', 'R']]) self.putc(64 + 41, 'Send HCS info and activate the card init process') self.token, self.state = [], 'GET RESPONSE R3' def handle_acmd51(self): # ACMD51 (SEND_SCR) -> R1 self.putc(64 + 51, 'Read SD config register (SCR)') self.token, self.state = [], 'GET RESPONSE R1' def handle_cmd999(self): self.token, self.state = [], 'GET RESPONSE R1' def handle_acmd999(self): self.token, self.state = [], 'GET RESPONSE R1' # Response tokens can have one of four formats (depends on content). # They can have a total length of 48 or 136 bits. # They're sent serially (MSB-first) by the card that the host # addressed previously, or (synchronously) by all connected cards. def handle_response_r1(self, cmd): # R1: Normal response command # - Bits[47:47]: Start bit (always 0) # - Bits[46:46]: Transmission bit (0 == card) # - Bits[45:40]: Command index (BCD; valid: 0-63) # - Bits[39:08]: Card status # - Bits[07:01]: CRC7 # - Bits[00:00]: End bit (always 1) if not self.get_token_bits(cmd, 48): return self.handle_common_token_fields() self.putr('R1') self.puta(0, 31, [136, ['Card status', 'Status', 'S']]) for i in range(32): self.putbit(8 + i, [card_status[31 - i]]) self.token, self.state = [], 'GET COMMAND TOKEN' def handle_response_r1b(self, cmd): # R1b: Same as R1 with an optional busy signal (on the data line) if not self.get_token_bits(cmd, 48): return self.handle_common_token_fields() self.puta(0, 31, [136, ['Card status', 'Status', 'S']]) self.putr('R1b') self.token, self.state = [], 'GET COMMAND TOKEN' def handle_response_r2(self, cmd): # R2: CID/CSD register # - Bits[135:135]: Start bit (always 0) # - Bits[134:134]: Transmission bit (0 == card) # - Bits[133:128]: Reserved (always 0b111111) # - Bits[127:001]: CID or CSD register including internal CRC7 # - Bits[000:000]: End bit (always 1) if not self.get_token_bits(cmd, 136): return # Annotations for each individual bit. for bit in range(len(self.token)): self.putf(bit, bit, [128, ['%d' % self.token[bit][2]]]) self.putf(0, 0, [129, ['Start bit', 'Start', 'S']]) t = 'host' if self.token[1][2] == 1 else 'card' self.putf(1, 1, [130, ['Transmission: ' + t, 'T: ' + t, 'T']]) self.putf(2, 7, [131, ['Reserved', 'Res', 'R']]) self.putf(8, 134, [132, ['Argument', 'Arg', 'A']]) self.putf(135, 135, [134, ['End bit', 'End', 'E']]) self.putf(8, 134, [136, ['CID/CSD register', 'CID/CSD', 'C']]) self.putf(0, 135, [55, ['R2']]) self.token, self.state = [], 'GET COMMAND TOKEN' def handle_response_r3(self, cmd): # R3: OCR register # - Bits[47:47]: Start bit (always 0) # - Bits[46:46]: Transmission bit (0 == card) # - Bits[45:40]: Reserved (always 0b111111) # - Bits[39:08]: OCR register # - Bits[07:01]: Reserved (always 0b111111) # - Bits[00:00]: End bit (always 1) if not self.get_token_bits(cmd, 48): return self.putr('R3') # Annotations for each individual bit. for bit in range(len(self.token)): self.putf(bit, bit, [128, ['%d' % self.token[bit][2]]]) self.putf(0, 0, [129, ['Start bit', 'Start', 'S']]) t = 'host' if self.token[1][2] == 1 else 'card' self.putf(1, 1, [130, ['Transmission: ' + t, 'T: ' + t, 'T']]) self.putf(2, 7, [131, ['Reserved', 'Res', 'R']]) self.putf(8, 39, [132, ['Argument', 'Arg', 'A']]) self.putf(40, 46, [133, ['Reserved', 'Res', 'R']]) self.putf(47, 47, [134, ['End bit', 'End', 'E']]) self.puta(0, 31, [136, ['OCR register', 'OCR reg', 'OCR', 'O']]) self.token, self.state = [], 'GET COMMAND TOKEN' def handle_response_r6(self, cmd): # R6: Published RCA response # - Bits[47:47]: Start bit (always 0) # - Bits[46:46]: Transmission bit (0 == card) # - Bits[45:40]: Command index (always 0b000011) # - Bits[39:24]: Argument[31:16]: New published RCA of the card # - Bits[23:08]: Argument[15:0]: Card status bits # - Bits[07:01]: CRC7 # - Bits[00:00]: End bit (always 1) if not self.get_token_bits(cmd, 48): return self.handle_common_token_fields() self.puta(0, 15, [136, ['Card status bits', 'Status', 'S']]) self.puta(16, 31, [136, ['Relative card address', 'RCA', 'R']]) self.putr('R6') self.token, self.state = [], 'GET COMMAND TOKEN' def handle_response_r7(self, cmd): # R7: Card interface condition # - Bits[47:47]: Start bit (always 0) # - Bits[46:46]: Transmission bit (0 == card) # - Bits[45:40]: Command index (always 0b001000) # - Bits[39:20]: Reserved bits (all-zero) # - Bits[19:16]: Voltage accepted # - Bits[15:08]: Echo-back of check pattern # - Bits[07:01]: CRC7 # - Bits[00:00]: End bit (always 1) if not self.get_token_bits(cmd, 48): return self.handle_common_token_fields() self.putr('R7') # Arg[31:12]: Reserved bits (all-zero) self.puta(12, 31, [136, ['Reserved', 'Res', 'R']]) # Arg[11:08]: Voltage accepted v = ''.join(str(i[2]) for i in self.token[28:32]) av = accepted_voltages.get(int('0b' + v, 2), 'Unknown') self.puta(8, 11, [136, ['Voltage accepted: ' + av, 'Voltage', 'Volt', 'V']]) # Arg[07:00]: Echo-back of check pattern self.puta(0, 7, [136, ['Echo-back of check pattern', 'Echo', 'E']]) self.token, self.state = [], 'GET COMMAND TOKEN' def decode(self): while True: # Wait for a rising CLK edge. (cmd, clk, dat0, dat1, dat2, dat3) = self.wait({1: 'r'}) # State machine. if self.state == 'GET COMMAND TOKEN': if len(self.token) == 0: # Wait for start bit (CMD = 0). if cmd != 0: continue self.get_command_token(cmd) elif self.state.startswith('HANDLE CMD'): # Call the respective handler method for the command. a, cmdstr = 'a' if self.is_acmd else '', self.state[10:].lower() handle_cmd = getattr(self, 'handle_%scmd%s' % (a, cmdstr)) handle_cmd() # Leave ACMD mode again after the first command after CMD55. if self.is_acmd and cmdstr not in ('55', '63'): self.is_acmd = False elif self.state.startswith('GET RESPONSE'): if len(self.token) == 0: # Wait for start bit (CMD = 0). if cmd != 0: continue # Call the respective handler method for the response. s = 'handle_response_%s' % self.state[13:].lower() handle_response = getattr(self, s) handle_response(cmd) libsigrokdecode-0.5.0/decoders/sdcard_sd/__init__.py0000644000175000017500000000151513117367246017431 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' SD card (SD mode) low-level protocol decoder. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/t55xx/0000755000175000017500000000000013117367246014445 500000000000000libsigrokdecode-0.5.0/decoders/t55xx/pd.py0000644000175000017500000003464013117367246015351 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Benjamin Larsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 't55xx' name = 'T55xx' longname = 'RFID T55xx' desc = 'T55xx 100-150kHz RFID protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['t55xx'] channels = ( {'id': 'data', 'name': 'Data', 'desc': 'Data line'}, ) options = ( {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000}, {'id': 'start_gap', 'desc': 'Start gap min', 'default': 20}, {'id': 'w_gap', 'desc': 'Write gap min', 'default': 20}, {'id': 'w_one_min', 'desc': 'Write one min', 'default': 48}, {'id': 'w_one_max', 'desc': 'Write one max', 'default': 63}, {'id': 'w_zero_min', 'desc': 'Write zero min', 'default': 16}, {'id': 'w_zero_max', 'desc': 'Write zero max', 'default': 31}, {'id': 'em4100_decode', 'desc': 'EM4100 decode', 'default': 'on', 'values': ('on', 'off')}, ) annotations = ( ('bit_value', 'Bit value'), ('start_gap', 'Start gap'), ('write_gap', 'Write gap'), ('write_mode_exit', 'Write mode exit'), ('bit', 'Bit'), ('opcode', 'Opcode'), ('lock', 'Lock'), ('data', 'Data'), ('password', 'Password'), ('address', 'Address'), ('bitrate', 'Bitrate'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('structure', 'Structure', (1, 2, 3, 4)), ('fields', 'Fields', (5, 6, 7, 8, 9)), ('decode', 'Decode', (10,)), ) def __init__(self): self.samplerate = None self.last_samplenum = None self.lastlast_samplenum = None self.state = 'START_GAP' self.bits_pos = [[0 for col in range(3)] for row in range(70)] self.br_string = ['RF/8', 'RF/16', 'RF/32', 'RF/40', 'RF/50', 'RF/64', 'RF/100', 'RF/128'] self.mod_str1 = ['Direct', 'Manchester', 'Biphase', 'Reserved'] self.mod_str2 = ['Direct', 'PSK1', 'PSK2', 'PSK3', 'FSK1', 'FSK2', 'FSK1a', 'FSK2a'] self.pskcf_str = ['RF/2', 'RF/4', 'RF/8', 'Reserved'] self.em4100_decode1_partial = 0 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.field_clock = self.samplerate / self.options['coilfreq'] self.wzmax = self.options['w_zero_max'] * self.field_clock self.wzmin = self.options['w_zero_min'] * self.field_clock self.womax = self.options['w_one_max'] * self.field_clock self.womin = self.options['w_one_min'] * self.field_clock self.startgap = self.options['start_gap'] * self.field_clock self.writegap = self.options['w_gap'] * self.field_clock self.nogap = 64 * self.field_clock def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def decode_config(self, idx): safer_key = self.bits_pos[idx][0]<<3 | self.bits_pos[idx+1][0]<<2 | \ self.bits_pos[idx+2][0]<<1 | self.bits_pos[idx+3][0] self.put(self.bits_pos[idx][1], self.bits_pos[idx+3][2], self.out_ann, [10, ['Safer Key' + ': %X' % safer_key,'%X' % safer_key]]) bitrate = self.bits_pos[idx+11][0]<<2 | self.bits_pos[idx+12][0]<<1 | \ self.bits_pos[idx+13][0] self.put(self.bits_pos[idx+11][1], self.bits_pos[idx+13][2], self.out_ann, [10, ['Data Bit Rate: ' + \ self.br_string[bitrate], self.br_string[bitrate]]]) modulation1 = self.bits_pos[idx+15][0]<<1 | self.bits_pos[idx+16][0] modulation2 = self.bits_pos[idx+17][0]<<2 | \ self.bits_pos[idx+18][0]<<1 | self.bits_pos[idx+19][0] if modulation1 == 0: mod_string = self.mod_str2[modulation2] else: mod_string = self.mod_str1[modulation1] self.put(self.bits_pos[idx+15][1], self.bits_pos[idx+19][2], self.out_ann, [10, ['Modulation: ' + mod_string, mod_string]]) psk_cf = self.bits_pos[idx+20][0]<<1 | self.bits_pos[idx+21][0] self.put(self.bits_pos[idx+20][1], self.bits_pos[idx+21][2], self.out_ann, [10, ['PSK-CF: ' + self.pskcf_str[psk_cf], self.pskcf_str[psk_cf]]]) self.put(self.bits_pos[idx+22][1], self.bits_pos[idx+22][2], self.out_ann, [10, ['AOR' + ': %d' % \ (self.bits_pos[idx+22][0]),'%d' % (self.bits_pos[idx+22][0])]]) maxblock = self.bits_pos[idx+24][0]<<2 | self.bits_pos[idx+25][0]<<1 | \ self.bits_pos[idx+26][0] self.put(self.bits_pos[idx+24][1], self.bits_pos[idx+26][2], self.out_ann, [10, ['Max-Block' + ': %d' % maxblock, '%d' % maxblock]]) self.put(self.bits_pos[idx+27][1], self.bits_pos[idx+27][2], self.out_ann, [10, ['PWD' + ': %d' % \ (self.bits_pos[idx+27][0]),'%d' % (self.bits_pos[idx+27][0])]]) self.put(self.bits_pos[idx+28][1], self.bits_pos[idx+28][2], self.out_ann, [10, ['ST-sequence terminator' + ': %d' % \ (self.bits_pos[idx+28][0]),'%d' % (self.bits_pos[idx+28][0])]]) self.put(self.bits_pos[idx+31][1], self.bits_pos[idx+31][2], self.out_ann, [10, ['POR delay' + ': %d' % \ (self.bits_pos[idx+31][0]),'%d' % (self.bits_pos[idx+31][0])]]) def put4bits(self, idx): bits = self.bits_pos[idx][0]<<3 | self.bits_pos[idx+1][0]<<2 | \ self.bits_pos[idx+2][0]<<1 | self.bits_pos[idx+3][0] self.put(self.bits_pos[idx][1], self.bits_pos[idx+3][2], self.out_ann, [10, ['%X' % bits]]) def em4100_decode1(self, idx): self.put(self.bits_pos[idx][1], self.bits_pos[idx+8][2], self.out_ann, [10, ['EM4100 header', 'EM header', 'Header', 'H']]) self.put4bits(idx+9) self.put4bits(idx+14) self.put4bits(idx+19) self.put4bits(idx+24) self.em4100_decode1_partial = self.bits_pos[idx+29][0]<<3 | \ self.bits_pos[idx+30][0]<<2 | self.bits_pos[idx+31][0]<<1 self.put(self.bits_pos[idx+29][1], self.bits_pos[idx+31][2], self.out_ann, [10, ['Partial nibble']]) def em4100_decode2(self, idx): if self.em4100_decode1_partial != 0: bits = self.em4100_decode1_partial + self.bits_pos[idx][0] self.put(self.bits_pos[idx][1], self.bits_pos[idx][2], self.out_ann, [10, ['%X' % bits]]) self.em4100_decode1_partial = 0 else: self.put(self.bits_pos[idx][1], self.bits_pos[idx][2], self.out_ann, [10, ['Partial nibble']]) self.put4bits(idx+2) self.put4bits(idx+7) self.put4bits(idx+12) self.put4bits(idx+17) self.put4bits(idx+22) self.put(self.bits_pos[idx+27][1], self.bits_pos[idx+31][2], self.out_ann, [10, ['EM4100 trailer']]) def get_32_bits(self, idx): retval = 0 for i in range(0, 32): retval <<= 1 retval |= self.bits_pos[i+idx][0] return retval def get_3_bits(self, idx): retval = self.bits_pos[idx][0]<<2 | self.bits_pos[idx+1][0]<<1 | \ self.bits_pos[idx+2][0] return retval def put_fields(self): if (self.bit_nr == 70): self.put(self.bits_pos[0][1], self.bits_pos[1][2], self.out_ann, [5, ['Opcode' + ': %d%d' % (self.bits_pos[0][0], self.bits_pos[1][0]), '%d%d' % (self.bits_pos[0][0], self.bits_pos[1][0])]]) password = self.get_32_bits(2) self.put(self.bits_pos[2][1], self.bits_pos[33][2], self.out_ann, [8, ['Password' + ': %X' % password, '%X' % password]]) self.put(self.bits_pos[34][1], self.bits_pos[34][2], self.out_ann, [6, ['Lock' + ': %X' % self.bits_pos[34][0], '%X' % self.bits_pos[34][0]]]) data = self.get_32_bits(35) self.put(self.bits_pos[35][1], self.bits_pos[66][2], self.out_ann, [7, ['Data' + ': %X' % data, '%X' % data]]) addr = self.get_3_bits(67) self.put(self.bits_pos[67][1], self.bits_pos[69][2], self.out_ann, [9, ['Addr' + ': %X' % addr, '%X' % addr]]) if addr == 0: self.decode_config(35) if addr == 7: self.put(self.bits_pos[35][1], self.bits_pos[66][2], self.out_ann, [10, ['Password' + ': %X' % data, '%X' % data]]) # If we are programming EM4100 data we can decode it halfway. if addr == 1 and self.options['em4100_decode'] == 'on': self.em4100_decode1(35) if addr == 2 and self.options['em4100_decode'] == 'on': self.em4100_decode2(35) if (self.bit_nr == 38): self.put(self.bits_pos[0][1], self.bits_pos[1][2], self.out_ann, [5, ['Opcode' + ': %d%d' % (self.bits_pos[0][0], self.bits_pos[1][0]), '%d%d' % (self.bits_pos[0][0], self.bits_pos[1][0])]]) self.put(self.bits_pos[2][1], self.bits_pos[2][2], self.out_ann, [6, ['Lock' + ': %X' % self.bits_pos[2][0], '%X' % self.bits_pos[2][0]]]) data = self.get_32_bits(3) self.put(self.bits_pos[3][1], self.bits_pos[34][2], self.out_ann, [7, ['Data' + ': %X' % data, '%X' % data]]) addr = self.get_3_bits(35) self.put(self.bits_pos[35][1], self.bits_pos[37][2], self.out_ann, [9, ['Addr' + ': %X' % addr, '%X' % addr]]) if addr == 0: self.decode_config(3) if addr == 7: self.put(self.bits_pos[3][1], self.bits_pos[34][2], self.out_ann, [10, ['Password' + ': %X' % data, '%X' % data]]) # If we are programming EM4100 data we can decode it halfway. if addr == 1 and self.options['em4100_decode'] == 'on': self.em4100_decode1(3) if addr == 2 and self.options['em4100_decode'] == 'on': self.em4100_decode2(3) if (self.bit_nr == 2): self.put(self.bits_pos[0][1], self.bits_pos[1][2], self.out_ann, [5, ['Opcode' + ': %d%d' % (self.bits_pos[0][0], self.bits_pos[1][0]), '%d%d' % (self.bits_pos[0][0], self.bits_pos[1][0])]]) self.bit_nr = 0 def add_bits_pos(self, bit, bit_start, bit_end): if self.bit_nr < 70: self.bits_pos[self.bit_nr][0] = bit self.bits_pos[self.bit_nr][1] = bit_start self.bits_pos[self.bit_nr][2] = bit_end self.bit_nr += 1 def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') self.last_samplenum = 0 self.lastlast_samplenum = 0 self.last_edge = 0 self.oldpl = 0 self.oldpp = 0 self.oldsamplenum = 0 self.last_bit_pos = 0 self.old_gap_start = 0 self.old_gap_end = 0 self.gap_detected = 0 self.bit_nr = 0 while True: (pin,) = self.wait({0: 'e'}) pl = self.samplenum - self.oldsamplenum pp = pin samples = self.samplenum - self.last_samplenum if self.state == 'WRITE_GAP': if pl > self.writegap: self.gap_detected = 1 self.put(self.last_samplenum, self.samplenum, self.out_ann, [2, ['Write gap']]) if (self.last_samplenum-self.old_gap_end) > self.nogap: self.gap_detected = 0 self.state = 'START_GAP' self.put(self.old_gap_end, self.last_samplenum, self.out_ann, [3, ['Write mode exit']]) self.put_fields() if self.state == 'START_GAP': if pl > self.startgap: self.gap_detected = 1 self.put(self.last_samplenum, self.samplenum, self.out_ann, [1, ['Start gap']]) self.state = 'WRITE_GAP' if self.gap_detected == 1: self.gap_detected = 0 if (self.last_samplenum - self.old_gap_end) > self.wzmin \ and (self.last_samplenum - self.old_gap_end) < self.wzmax: self.put(self.old_gap_end, self.last_samplenum, self.out_ann, [0, ['0']]) self.put(self.old_gap_end, self.last_samplenum, self.out_ann, [4, ['Bit']]) self.add_bits_pos(0, self.old_gap_end, self.last_samplenum) if (self.last_samplenum - self.old_gap_end) > self.womin \ and (self.last_samplenum - self.old_gap_end) < self.womax: self.put(self.old_gap_end, self.last_samplenum, self.out_ann, [0, ['1']]) self.put(self.old_gap_end, self.last_samplenum, self.out_ann, [4, ['Bit']]) self.add_bits_pos(1, self.old_gap_end, self.last_samplenum) self.old_gap_start = self.last_samplenum self.old_gap_end = self.samplenum self.oldpl = pl self.oldpp = pp self.oldsamplenum = self.samplenum self.last_samplenum = self.samplenum libsigrokdecode-0.5.0/decoders/t55xx/__init__.py0000644000175000017500000000163113117367246016477 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Benjamin Larsson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' T55xx is a 100-150kHz RFID protocol according to the Atmel e555x downlink/write protocol (pulse interval coding). ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/jtag/0000755000175000017500000000000013117367246014375 500000000000000libsigrokdecode-0.5.0/decoders/jtag/pd.py0000644000175000017500000002207313117367246015276 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012-2015 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd ''' OUTPUT_PYTHON format: Packet: [, ] : - 'NEW STATE': is the new state of the JTAG state machine. Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN', 'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR', 'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR', 'EXIT2-IR', 'UPDATE-IR'. - 'IR TDI': Bitstring that was clocked into the IR register. - 'IR TDO': Bitstring that was clocked out of the IR register. - 'DR TDI': Bitstring that was clocked into the DR register. - 'DR TDO': Bitstring that was clocked out of the DR register. All bitstrings are a list consisting of two items. The first is a sequence of '1' and '0' characters (the right-most character is the LSB. Example: '01110001', where 1 is the LSB). The second item is a list of ss/es values for each bit that is in the bitstring. ''' jtag_states = [ # Intro "tree" 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', # DR "tree" 'SELECT-DR-SCAN', 'CAPTURE-DR', 'UPDATE-DR', 'PAUSE-DR', 'SHIFT-DR', 'EXIT1-DR', 'EXIT2-DR', # IR "tree" 'SELECT-IR-SCAN', 'CAPTURE-IR', 'UPDATE-IR', 'PAUSE-IR', 'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR', ] class Decoder(srd.Decoder): api_version = 3 id = 'jtag' name = 'JTAG' longname = 'Joint Test Action Group (IEEE 1149.1)' desc = 'Protocol for testing, debugging, and flashing ICs.' license = 'gplv2+' inputs = ['logic'] outputs = ['jtag'] channels = ( {'id': 'tdi', 'name': 'TDI', 'desc': 'Test data input'}, {'id': 'tdo', 'name': 'TDO', 'desc': 'Test data output'}, {'id': 'tck', 'name': 'TCK', 'desc': 'Test clock'}, {'id': 'tms', 'name': 'TMS', 'desc': 'Test mode select'}, ) optional_channels = ( {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'}, {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'}, {'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'}, ) annotations = tuple([tuple([s.lower(), s]) for s in jtag_states]) + ( \ ('bit-tdi', 'Bit (TDI)'), ('bit-tdo', 'Bit (TDO)'), ('bitstring-tdi', 'Bitstring (TDI)'), ('bitstring-tdo', 'Bitstring (TDO)'), ) annotation_rows = ( ('bits-tdi', 'Bits (TDI)', (16,)), ('bits-tdo', 'Bits (TDO)', (17,)), ('bitstrings-tdi', 'Bitstring (TDI)', (18,)), ('bitstrings-tdo', 'Bitstring (TDO)', (19,)), ('states', 'States', tuple(range(15 + 1))), ) def __init__(self): # self.state = 'TEST-LOGIC-RESET' self.state = 'RUN-TEST/IDLE' self.oldstate = None self.bits_tdi = [] self.bits_tdo = [] self.bits_samplenums_tdi = [] self.bits_samplenums_tdo = [] self.ss_item = self.es_item = None self.ss_bitstring = self.es_bitstring = None self.saved_item = None self.first = True self.first_bit = True def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): self.put(self.ss_item, self.es_item, self.out_ann, data) def putp(self, data): self.put(self.ss_item, self.es_item, self.out_python, data) def putx_bs(self, data): self.put(self.ss_bitstring, self.es_bitstring, self.out_ann, data) def putp_bs(self, data): self.put(self.ss_bitstring, self.es_bitstring, self.out_python, data) def advance_state_machine(self, tms): self.oldstate = self.state # Intro "tree" if self.state == 'TEST-LOGIC-RESET': self.state = 'TEST-LOGIC-RESET' if (tms) else 'RUN-TEST/IDLE' elif self.state == 'RUN-TEST/IDLE': self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' # DR "tree" elif self.state == 'SELECT-DR-SCAN': self.state = 'SELECT-IR-SCAN' if (tms) else 'CAPTURE-DR' elif self.state == 'CAPTURE-DR': self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' elif self.state == 'SHIFT-DR': self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' elif self.state == 'EXIT1-DR': self.state = 'UPDATE-DR' if (tms) else 'PAUSE-DR' elif self.state == 'PAUSE-DR': self.state = 'EXIT2-DR' if (tms) else 'PAUSE-DR' elif self.state == 'EXIT2-DR': self.state = 'UPDATE-DR' if (tms) else 'SHIFT-DR' elif self.state == 'UPDATE-DR': self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' # IR "tree" elif self.state == 'SELECT-IR-SCAN': self.state = 'TEST-LOGIC-RESET' if (tms) else 'CAPTURE-IR' elif self.state == 'CAPTURE-IR': self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' elif self.state == 'SHIFT-IR': self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' elif self.state == 'EXIT1-IR': self.state = 'UPDATE-IR' if (tms) else 'PAUSE-IR' elif self.state == 'PAUSE-IR': self.state = 'EXIT2-IR' if (tms) else 'PAUSE-IR' elif self.state == 'EXIT2-IR': self.state = 'UPDATE-IR' if (tms) else 'SHIFT-IR' elif self.state == 'UPDATE-IR': self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' def handle_rising_tck_edge(self, pins): (tdi, tdo, tck, tms, trst, srst, rtck) = pins # Rising TCK edges always advance the state machine. self.advance_state_machine(tms) if self.first: # Save the start sample and item for later (no output yet). self.ss_item = self.samplenum self.first = False else: # Output the saved item (from the last CLK edge to the current). self.es_item = self.samplenum # Output the old state (from last rising TCK edge to current one). self.putx([jtag_states.index(self.oldstate), [self.oldstate]]) self.putp(['NEW STATE', self.state]) # Upon SHIFT-IR/SHIFT-DR collect the current TDI/TDO values. if self.state.startswith('SHIFT-'): if self.first_bit: self.ss_bitstring = self.samplenum self.first_bit = False else: self.putx([16, [str(self.bits_tdi[0])]]) self.putx([17, [str(self.bits_tdo[0])]]) # Use self.samplenum as ES of the previous bit. self.bits_samplenums_tdi[0][1] = self.samplenum self.bits_samplenums_tdo[0][1] = self.samplenum self.bits_tdi.insert(0, tdi) self.bits_tdo.insert(0, tdo) # Use self.samplenum as SS of the current bit. self.bits_samplenums_tdi.insert(0, [self.samplenum, -1]) self.bits_samplenums_tdo.insert(0, [self.samplenum, -1]) # Output all TDI/TDO bits if we just switched from SHIFT-* to EXIT1-*. if self.oldstate.startswith('SHIFT-') and \ self.state.startswith('EXIT1-'): self.es_bitstring = self.samplenum t = self.state[-2:] + ' TDI' b = ''.join(map(str, self.bits_tdi)) h = ' (0x%x' % int('0b' + b, 2) + ')' s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi)) + ' bits' self.putx_bs([18, [s]]) self.bits_samplenums_tdi[0][1] = self.samplenum # ES of last bit. self.putp_bs([t, [b, self.bits_samplenums_tdi]]) self.putx([16, [str(self.bits_tdi[0])]]) # Last bit. self.bits_tdi = [] self.bits_samplenums_tdi = [] t = self.state[-2:] + ' TDO' b = ''.join(map(str, self.bits_tdo)) h = ' (0x%x' % int('0b' + b, 2) + ')' s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo)) + ' bits' self.putx_bs([19, [s]]) self.bits_samplenums_tdo[0][1] = self.samplenum # ES of last bit. self.putp_bs([t, [b, self.bits_samplenums_tdo]]) self.putx([17, [str(self.bits_tdo[0])]]) # Last bit. self.bits_tdo = [] self.bits_samplenums_tdo = [] self.first_bit = True self.ss_bitstring = self.samplenum self.ss_item = self.samplenum def decode(self): while True: # Wait for a rising edge on TCK. self.handle_rising_tck_edge(self.wait({2: 'r'})) libsigrokdecode-0.5.0/decoders/jtag/__init__.py0000644000175000017500000000211513117367246016425 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' JTAG (Joint Test Action Group), a.k.a. "IEEE 1149.1: Standard Test Access Port and Boundary-Scan Architecture", is a protocol used for testing, debugging, and flashing various digital ICs. Details: https://en.wikipedia.org/wiki/Joint_Test_Action_Group http://focus.ti.com/lit/an/ssya002c/ssya002c.pdf ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/usb_power_delivery/0000755000175000017500000000000013117367246017360 500000000000000libsigrokdecode-0.5.0/decoders/usb_power_delivery/pd.py0000644000175000017500000004341113117367246020260 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Google, Inc ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import struct import zlib # for crc32 # BMC encoding with a 600kHz datarate UI_US = 1000000/600000.0 # Threshold to discriminate half-1 from 0 in Binary Mark Conding THRESHOLD_US = (UI_US + 2 * UI_US) / 2 # Control Message type CTRL_TYPES = { 0: 'reserved', 1: 'GOOD CRC', 2: 'GOTO MIN', 3: 'ACCEPT', 4: 'REJECT', 5: 'PING', 6: 'PS RDY', 7: 'GET SOURCE CAP', 8: 'GET SINK CAP', 9: 'DR SWAP', 10: 'PR SWAP', 11: 'VCONN SWAP', 12: 'WAIT', 13: 'SOFT RESET', 14: 'reserved', 15: 'reserved' } # Data message type DATA_TYPES = { 1: 'SOURCE CAP', 2: 'REQUEST', 3: 'BIST', 4: 'SINK CAP', 15: 'VDM' } # 4b5b encoding of the symbols DEC4B5B = [ 0x10, # Error 00000 0x10, # Error 00001 0x10, # Error 00010 0x10, # Error 00011 0x10, # Error 00100 0x10, # Error 00101 0x13, # Sync-3 00110 0x14, # RST-1 00111 0x10, # Error 01000 0x01, # 1 = 0001 01001 0x04, # 4 = 0100 01010 0x05, # 5 = 0101 01011 0x10, # Error 01100 0x16, # EOP 01101 0x06, # 6 = 0110 01110 0x07, # 7 = 0111 01111 0x10, # Error 10000 0x12, # Sync-2 10001 0x08, # 8 = 1000 10010 0x09, # 9 = 1001 10011 0x02, # 2 = 0010 10100 0x03, # 3 = 0011 10101 0x0A, # A = 1010 10110 0x0B, # B = 1011 10111 0x11, # Sync-1 11000 0x15, # RST-2 11001 0x0C, # C = 1100 11010 0x0D, # D = 1101 11011 0x0E, # E = 1110 11100 0x0F, # F = 1111 11101 0x00, # 0 = 0000 11110 0x10, # Error 11111 ] SYM_ERR = 0x10 SYNC1 = 0x11 SYNC2 = 0x12 SYNC3 = 0x13 RST1 = 0x14 RST2 = 0x15 EOP = 0x16 SYNC_CODES = [SYNC1, SYNC2, SYNC3] HRST_CODES = [RST1, RST1, RST1, RST2] START_OF_PACKETS = { (SYNC1, SYNC1, SYNC1, SYNC2): 'SOP', (SYNC1, SYNC1, SYNC3, SYNC3): "SOP'", (SYNC1, SYNC3, SYNC1, SYNC3): 'SOP"', (SYNC1, RST2, RST2, SYNC3): "SOP' Debug", (SYNC1, RST2, SYNC3, SYNC2): 'SOP" Debug', (RST1, SYNC1, RST1, SYNC3): 'Cable Reset', (RST1, RST1, RST1, RST2): 'Hard Reset', } SYM_NAME = [ ['0x0', '0'], ['0x1', '1'], ['0x2', '2'], ['0x3', '3'], ['0x4', '4'], ['0x5', '5'], ['0x6', '6'], ['0x7', '7'], ['0x8', '8'], ['0x9', '9'], ['0xA', 'A'], ['0xB', 'B'], ['0xC', 'C'], ['0xD', 'D'], ['0xE', 'E'], ['0xF', 'F'], ['ERROR', 'X'], ['SYNC-1', 'S1'], ['SYNC-2', 'S2'], ['SYNC-3', 'S3'], ['RST-1', 'R1'], ['RST-2', 'R2'], ['EOP', '#'], ] RDO_FLAGS = { (1 << 24): 'no_suspend', (1 << 25): 'comm_cap', (1 << 26): 'cap_mismatch', (1 << 27): 'give_back' } PDO_TYPE = ['', 'BATT:', 'VAR:', ''] PDO_FLAGS = { (1 << 29): 'dual_role_power', (1 << 28): 'suspend', (1 << 27): 'ext', (1 << 26): 'comm_cap', (1 << 25): 'dual_role_data' } BIST_MODES = { 0: 'Receiver', 1: 'Transmit', 2: 'Counters', 3: 'Carrier 0', 4: 'Carrier 1', 5: 'Carrier 2', 6: 'Carrier 3', 7: 'Eye', } VDM_CMDS = { 1: 'Disc Ident', 2: 'Disc SVID', 3: 'Disc Mode', 4: 'Enter Mode', 5: 'Exit Mode', 6: 'Attention', # 16..31: SVID Specific Commands # DisplayPort Commands 16: 'DP Status', 17: 'DP Configure', } VDM_ACK = ['REQ', 'ACK', 'NAK', 'BSY'] class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'usb_power_delivery' name = 'USB PD' longname = 'USB Power Delivery' desc = 'USB Power Delivery protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['usb_pd'] channels = ( {'id': 'cc', 'name': 'CC', 'desc': 'Control channel'}, ) options = ( {'id': 'fulltext', 'desc': 'full text decoding of the packet', 'default': 'no', 'values': ('yes', 'no')}, ) annotations = ( ('type', 'Packet Type'), ('Preamble', 'Preamble'), ('SOP', 'Start of Packet'), ('Head', 'Header'), ('Data', 'Data'), ('CRC', 'Checksum'), ('EOP', 'End Of Packet'), ('Sym', '4b5b symbols'), ('warnings', 'Warnings'), ('src', 'Source Message'), ('snk', 'Sink Message'), ('payload', 'Payload'), ('text', 'Plain text'), ) annotation_rows = ( ('4B5B', 'symbols', (7, )), ('Phase', 'parts', (1, 2, 3, 4, 5, 6, )), ('payload', 'Payload', (11, )), ('type', 'Type', (0, 9, 10, )), ('warnings', 'Warnings', (8, )), ('text', 'Full text', (12, )), ) binary = ( ('raw-data', 'RAW binary data'), ) def get_request(self, rdo): pos = (rdo >> 28) & 7 op_ma = ((rdo >> 10) & 0x3ff) * 10 max_ma = (rdo & 0x3ff) * 10 flags = '' for f in RDO_FLAGS.keys(): if rdo & f: flags += ' ' + RDO_FLAGS[f] return '[%d]%d/%d mA%s' % (pos, op_ma, max_ma, flags) def get_source_cap(self, pdo): t = (pdo >> 30) & 3 if t == 0: mv = ((pdo >> 10) & 0x3ff) * 50 ma = ((pdo >> 0) & 0x3ff) * 10 p = '%.1fV %.1fA' % (mv/1000.0, ma/1000.0) elif t == 1: minv = ((pdo >> 10) & 0x3ff) * 50 maxv = ((pdo >> 20) & 0x3ff) * 50 mw = ((pdo >> 0) & 0x3ff) * 250 p = '%.1f/%.1fV %.1fW' % (minv/1000.0, maxv/1000.0, mw/1000.0) elif t == 2: minv = ((pdo >> 10) & 0x3ff) * 50 maxv = ((pdo >> 20) & 0x3ff) * 50 ma = ((pdo >> 0) & 0x3ff) * 10 p = '%.1f/%.1fV %.1fA' % (minv/1000.0, maxv/1000.0, ma/1000.0) else: p = '' flags = '' for f in PDO_FLAGS.keys(): if pdo & f: flags += ' ' + PDO_FLAGS[f] return '%s%s%s' % (PDO_TYPE[t], p, flags) def get_sink_cap(self, pdo): t = (pdo >> 30) & 3 if t == 0: mv = ((pdo >> 10) & 0x3ff) * 50 ma = ((pdo >> 0) & 0x3ff) * 10 p = '%.1fV %.1fA' % (mv/1000.0, ma/1000.0) elif t == 1: minv = ((pdo >> 10) & 0x3ff) * 50 maxv = ((pdo >> 20) & 0x3ff) * 50 mw = ((pdo >> 0) & 0x3ff) * 250 p = '%.1f/%.1fV %.1fW' % (minv/1000.0, maxv/1000.0, mw/1000.0) elif t == 2: minv = ((pdo >> 10) & 0x3ff) * 50 maxv = ((pdo >> 20) & 0x3ff) * 50 ma = ((pdo >> 0) & 0x3ff) * 10 p = '%.1f/%.1fV %.1fA' % (minv/1000.0, maxv/1000.0, ma/1000.0) else: p = '' flags = '' for f in PDO_FLAGS.keys(): if pdo & f: flags += ' ' + PDO_FLAGS[f] return '%s%s%s' % (PDO_TYPE[t], p, flags) def get_vdm(self, idx, data): if idx == 0: # VDM header vid = data >> 16 struct = data & (1 << 15) txt = 'VDM' if struct: # Structured VDM cmd = data & 0x1f src = data & (1 << 5) ack = (data >> 6) & 3 pos = (data >> 8) & 7 ver = (data >> 13) & 3 txt = VDM_ACK[ack] + ' ' txt += VDM_CMDS[cmd] if cmd in VDM_CMDS else 'cmd?' txt += ' pos %d' % (pos) if pos else ' ' else: # Unstructured VDM txt = 'unstruct [%04x]' % (data & 0x7fff) txt += ' SVID:%04x' % (vid) else: # VDM payload txt = 'VDO:%08x' % (data) return txt def get_bist(self, idx, data): mode = data >> 28 counter = data & 0xffff mode_name = BIST_MODES[mode] if mode in BIST_MODES else 'INVALID' if mode == 2: mode_name = 'Counter[= %d]' % (counter) # TODO check all 0 bits are 0 / emit warnings return 'mode %s' % (mode_name) if idx == 0 else 'invalid BRO' def putpayload(self, s0, s1, idx): t = self.head_type() txt = '???' if t == 2: txt = self.get_request(self.data[idx]) elif t == 1: txt = self.get_source_cap(self.data[idx]) elif t == 4: txt = self.get_sink_cap(self.data[idx]) elif t == 15: txt = self.get_vdm(idx, self.data[idx]) elif t == 3: txt = self.get_bist(idx, self.data[idx]) self.putx(s0, s1, [11, [txt, txt]]) self.text += ' - ' + txt def puthead(self): ann_type = 9 if self.head_power_role() else 10 role = 'SRC' if self.head_power_role() else 'SNK' if self.head_data_role() != self.head_power_role(): role += '/DFP' if self.head_data_role() else '/UFP' t = self.head_type() if self.head_count() == 0: shortm = CTRL_TYPES[t] else: shortm = DATA_TYPES[t] if t in DATA_TYPES else 'DAT???' longm = '{:s}[{:d}]:{:s}'.format(role, self.head_id(), shortm) self.putx(0, -1, [ann_type, [longm, shortm]]) self.text += longm def head_id(self): return (self.head >> 9) & 7 def head_power_role(self): return (self.head >> 8) & 1 def head_data_role(self): return (self.head >> 5) & 1 def head_rev(self): return ((self.head >> 6) & 3) + 1 def head_type(self): return self.head & 0xF def head_count(self): return (self.head >> 12) & 7 def putx(self, s0, s1, data): self.put(self.edges[s0], self.edges[s1], self.out_ann, data) def putwarn(self, longm, shortm): self.putx(0, -1, [8, [longm, shortm]]) def compute_crc32(self): bdata = struct.pack('= 3: return START_OF_PACKETS[seq] return None def scan_eop(self): for i in range(len(self.bits) - 19): k = (self.get_sym(i, rec=False), self.get_sym(i+5, rec=False), self.get_sym(i+10, rec=False), self.get_sym(i+15, rec=False)) sym = START_OF_PACKETS[k] if k in START_OF_PACKETS else None if not sym: sym = self.find_corrupted_sop(k) # We have an interesting symbol sequence if sym: # annotate the preamble self.putx(0, i, [1, ['Preamble', '...']]) # annotate each symbol self.rec_sym(i, k[0]) self.rec_sym(i+5, k[1]) self.rec_sym(i+10, k[2]) self.rec_sym(i+15, k[3]) if sym == 'Hard Reset': self.text += 'HRST' return -1 # Hard reset elif sym == 'Cable Reset': self.text += 'CRST' return -1 # Cable reset else: self.putx(i, i+20, [2, [sym, 'S']]) return i+20 self.putx(0, len(self.bits), [1, ['Junk???', 'XXX']]) self.text += 'Junk???' self.putwarn('No start of packet found', 'XXX') return -1 # No Start Of Packet def __init__(self): self.samplerate = None self.idx = 0 self.packet_seq = 0 self.previous = 0 self.startsample = None self.bits = [] self.edges = [] self.bad = [] self.half_one = False self.start_one = 0 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value # 0 is 2 UI, space larger than 1.5x 0 is definitely wrong self.maxbit = self.us2samples(3 * UI_US) # duration threshold between half 1 and 0 self.threshold = self.us2samples(THRESHOLD_US) def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_bitrate = self.register( srd.OUTPUT_META, meta=(int, 'Bitrate', 'Bitrate during the packet') ) def us2samples(self, us): return int(us * self.samplerate / 1000000) def decode_packet(self): self.data = [] self.idx = 0 self.text = '' if len(self.edges) < 50: return # Not a real PD packet self.packet_seq += 1 tstamp = float(self.startsample) / self.samplerate self.text += '#%-4d (%8.6fms): ' % (self.packet_seq, tstamp*1000) self.idx = self.scan_eop() if self.idx < 0: # Full text trace of the issue self.putx(0, self.idx, [12, [self.text, '...']]) return # No real packet: ABORT # Packet header self.head = self.get_short() self.putx(self.idx-20, self.idx, [3, ['H:%04x' % (self.head), 'HD']]) self.puthead() # Decode data payload for i in range(self.head_count()): self.data.append(self.get_word()) self.putx(self.idx-40, self.idx, [4, ['[%d]%08x' % (i, self.data[i]), 'D%d' % (i)]]) self.putpayload(self.idx-40, self.idx, i) # CRC check self.crc = self.get_word() ccrc = self.compute_crc32() if self.crc != ccrc: self.putwarn('Bad CRC %08x != %08x' % (self.crc, ccrc), 'CRC!') self.putx(self.idx-40, self.idx, [5, ['CRC:%08x' % (self.crc), 'CRC']]) # End of Packet if len(self.bits) >= self.idx + 5 and self.get_sym(self.idx) == EOP: self.putx(self.idx, self.idx + 5, [6, ['EOP', 'E']]) self.idx += 5 else: self.putwarn('No EOP', 'EOP!') # Full text trace if self.options['fulltext'] == 'yes': self.putx(0, self.idx, [12, [self.text, '...']]) # Meta data for bitrate ss, es = self.edges[0], self.edges[-1] bitrate = self.samplerate*len(self.bits) / float(es - ss) self.put(es, ss, self.out_bitrate, int(bitrate)) # Raw binary data (BMC decoded) self.put(es, ss, self.out_binary, [0, bytes(self.bits)]) def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: self.wait({0: 'e'}) # First sample of the packet, just record the start date if not self.startsample: self.startsample = self.samplenum self.previous = self.samplenum continue diff = self.samplenum - self.previous # Large idle: use it as the end of packet if diff > self.maxbit: # the last edge of the packet self.edges.append(self.previous) # Export the packet self.decode_packet() # Reset for next packet self.startsample = self.samplenum self.bits = [] self.edges = [] self.bad = [] self.half_one = False self.start_one = 0 else: # add the bit to the packet is_zero = diff > self.threshold if is_zero and not self.half_one: self.bits.append(0) self.edges.append(self.previous) elif not is_zero and self.half_one: self.bits.append(1) self.edges.append(self.start_one) self.half_one = False elif not is_zero and not self.half_one: self.half_one = True self.start_one = self.previous else: # Invalid BMC sequence self.bad.append((self.start_one, self.previous)) # TODO try to recover self.bits.append(0) self.edges.append(self.previous) self.half_one = False self.previous = self.samplenum libsigrokdecode-0.5.0/decoders/usb_power_delivery/__init__.py0000644000175000017500000000147613117367246021421 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Google, Inc ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' USB Power Delivery - baseband protocol decoder / checker. ''' from .pd import * libsigrokdecode-0.5.0/decoders/dsi/0000755000175000017500000000000013117367246014227 500000000000000libsigrokdecode-0.5.0/decoders/dsi/pd.py0000644000175000017500000001342413117367246015130 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Jeremy Swanson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## import sigrokdecode as srd class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 2 id = 'dsi' name = 'DSI' longname = 'Digital Serial Interface' desc = 'DSI lighting control protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['dsi'] channels = ( {'id': 'dsi', 'name': 'DSI', 'desc': 'DSI data line'}, ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high', 'values': ('active-low', 'active-high')}, ) annotations = ( ('bit', 'Bit'), ('startbit', 'Startbit'), ('Level', 'Dimmer level'), ('raw', 'Raw data'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('raw', 'Raw Data',(3,)), ('fields', 'Fields', (1, 2,)), ) def __init__(self): self.samplerate = None self.samplenum = None self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' self.nextSamplePoint = None self.nextSample = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.old_dsi = 1 if self.options['polarity'] == 'active-low' else 0 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value # One bit: 1666.7us (one half low, one half high). # This is how many samples are in 1TE. self.halfbit = int((self.samplerate * 0.0016667) / 2.0) def putb(self, bit1, bit2, data): ss, es = self.ss_es_bits[bit1][0], self.ss_es_bits[bit2][1] self.put(ss, es, self.out_ann, data) def handle_bits(self, length): a, c, f, g, b = 0, 0, 0, 0, self.bits # Individual raw bits. for i in range(length): if i == 0: ss = max(0, self.bits[0][0]) else: ss = self.ss_es_bits[i - 1][1] es = self.bits[i][0] + (self.halfbit * 2) self.ss_es_bits.append([ss, es]) self.putb(i, i, [0, ['%d' % self.bits[i][1]]]) # Bits[0:0]: Startbit s = ['Startbit: %d' % b[0][1], 'ST: %d' % b[0][1], 'ST', 'S', 'S'] self.putb(0, 0, [1, s]) self.putb(0, 0, [3, s]) # Bits[1:8] for i in range(8): f |= (b[1 + i][1] << (7 - i)) g = f / 2.55 if length == 9: # BACKWARD Frame s = ['Data: %02X' % f, 'Dat: %02X' % f, 'Dat: %02X' % f, 'D: %02X' % f, 'D'] self.putb(1, 8, [3, s]) s = ['Level: %d%%' % g, 'Lev: %d%%' % g, 'Lev: %d%%' % g, 'L: %d' % g, 'D'] self.putb(1, 8, [2, s]) return def reset_decoder_state(self): self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' def decode(self, ss, es, data): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') bit = 0; for (self.samplenum, pins) in data: self.dsi = pins[0] # data.itercnt += 1 if self.options['polarity'] == 'active-high': self.dsi ^= 1 # Invert. # State machine. if self.state == 'IDLE': # Wait for any edge (rising or falling). if self.old_dsi == self.dsi: continue # Add in the first half of the start bit. self.edges.append(self.samplenum - int(self.halfbit)) self.edges.append(self.samplenum) # Start bit is 0->1. self.phase0 = self.dsi ^ 1 self.state = 'PHASE1' self.old_dsi = self.dsi # Get the next sample point. # self.nextSamplePoint = self.samplenum + int(self.halfbit / 2) self.old_dsi = self.dsi # bit = self.dsi continue # if(self.samplenum == self.nextSamplePoint): # bit = self.dsi # continue if self.old_dsi != self.dsi: self.edges.append(self.samplenum) elif self.samplenum == (self.edges[-1] + int(self.halfbit * 1.5)): self.edges.append(self.samplenum - int(self.halfbit * 0.5)) else: continue bit = self.old_dsi if self.state == 'PHASE0': self.phase0 = bit self.state = 'PHASE1' elif self.state == 'PHASE1': if (bit == 1) and (self.phase0 == 1): # Stop bit if len(self.bits) == 17 or len(self.bits) == 9: # Forward or Backward self.handle_bits(len(self.bits)) self.reset_decoder_state() # Reset upon errors. continue else: self.bits.append([self.edges[-3], bit]) self.state = 'PHASE0' # self.nextSamplePoint = self.edges[-1] + int(self.halfbit / 2) self.old_dsi = self.dsi libsigrokdecode-0.5.0/decoders/dsi/__init__.py0000644000175000017500000000154513117367246016265 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Jeremy Swanson ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## ''' DSI is a biphase/manchester based lighting control protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/arm_etmv3/0000755000175000017500000000000013117367246015345 500000000000000libsigrokdecode-0.5.0/decoders/arm_etmv3/pd.py0000644000175000017500000004560113117367246016250 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import subprocess import re # See ETMv3 Signal Protocol table 7-11: 'Encoding of Exception[8:0]'. exc_names = [ 'No exception', 'IRQ1', 'IRQ2', 'IRQ3', 'IRQ4', 'IRQ5', 'IRQ6', 'IRQ7', 'IRQ0', 'UsageFault', 'NMI', 'SVC', 'DebugMon', 'MemManage', 'PendSV', 'SysTick', 'Reserved', 'Reset', 'BusFault', 'Reserved', 'Reserved' ] for i in range(8, 496): exc_names.append('IRQ%d' % i) def parse_varint(bytes): '''Parse an integer where the top bit is the continuation bit. Returns value and number of parsed bytes.''' v = 0 for i, b in enumerate(bytes): v |= (b & 0x7F) << (i * 7) if b & 0x80 == 0: return v, i+1 return v, len(bytes) def parse_uint(bytes): '''Parse little-endian integer.''' v = 0 for i, b in enumerate(bytes): v |= b << (i * 8) return v def parse_exc_info(bytes): '''Parse exception information bytes from a branch packet.''' if len(bytes) < 1: return None excv, exclen = parse_varint(bytes) if bytes[exclen - 1] & 0x80 != 0x00: return None # Exception info not complete. if exclen == 2 and excv & (1 << 13): # Exception byte 1 was skipped, fix up the decoding. excv = (excv & 0x7F) | ((excv & 0x3F80) << 7) ns = excv & 1 exc = ((excv >> 1) & 0x0F) | ((excv >> 7) & 0x1F0) cancel = (excv >> 5) & 1 altisa = (excv >> 6) & 1 hyp = (excv >> 12) & 1 resume = (excv >> 14) & 0x0F return (ns, exc, cancel, altisa, hyp, resume) def parse_branch_addr(bytes, ref_addr, cpu_state, branch_enc): '''Parse encoded branch address. Returns addr, addrlen, cpu_state, exc_info. Returns None if packet is not yet complete''' addr, addrlen = parse_varint(bytes) if bytes[addrlen-1] & 0x80 != 0x00: return None # Branch address not complete. addr_bits = 7 * addrlen have_exc_info = False if branch_enc == 'original': if addrlen == 5 and bytes[4] & 0x40: have_exc_info = True elif branch_enc == 'alternative': addr_bits -= 1 # Top bit of address indicates exc_info. if addrlen >= 2 and addr & (1 << addr_bits): have_exc_info = True addr &= ~(1 << addr_bits) exc_info = None if have_exc_info: exc_info = parse_exc_info(bytes[addrlen:]) if exc_info is None: return None # Exception info not complete. if addrlen == 5: # Possible change in CPU state. if bytes[4] & 0xB8 == 0x08: cpu_state = 'arm' elif bytes[4] & 0xB0 == 0x10: cpu_state = 'thumb' elif bytes[4] & 0xA0 == 0x20: cpu_state = 'jazelle' else: raise NotImplementedError('Unhandled branch byte 4: 0x%02x' % bytes[4]) # Shift the address according to current CPU state. if cpu_state == 'arm': addr = (addr & 0xFFFFFFFE) << 1 addr_bits += 1 elif cpu_state == 'thumb': addr = addr & 0xFFFFFFFE elif cpu_state == 'jazelle': addr = (addr & 0xFFFFFFFFE) >> 1 addr_bits -= 1 else: raise NotImplementedError('Unhandled state: ' + cpu_state) # If the address wasn't full, fill in with the previous address. if addrlen < 5: addr |= ref_addr & (0xFFFFFFFF << addr_bits) return addr, addrlen, cpu_state, exc_info class Decoder(srd.Decoder): api_version = 2 id = 'arm_etmv3' name = 'ARM ETMv3' longname = 'ARM Embedded Trace Macroblock' desc = 'Decode ETM instruction trace packets.' license = 'gplv2+' inputs = ['uart'] outputs = ['arm_etmv3'] annotations = ( ('trace', 'Trace info'), ('branch', 'Branches'), ('exception', 'Exceptions'), ('execution', 'Instruction execution'), ('data', 'Data access'), ('pc', 'Program counter'), ('instr_e', 'Executed instructions'), ('instr_n', 'Not executed instructions'), ('source', 'Source code'), ('location', 'Current location'), ('function', 'Current function'), ) annotation_rows = ( ('trace', 'Trace info', (0,)), ('flow', 'Code flow', (1, 2, 3,)), ('data', 'Data access', (4,)), ('pc', 'Program counter', (5,)), ('instruction', 'Instructions', (6, 7,)), ('source', 'Source code', (8,)), ('location', 'Current location', (9,)), ('function', 'Current function', (10,)), ) options = ( {'id': 'objdump', 'desc': 'objdump path', 'default': 'arm-none-eabi-objdump'}, {'id': 'objdump_opts', 'desc': 'objdump options', 'default': '-lSC'}, {'id': 'elffile', 'desc': '.elf path', 'default': ''}, {'id': 'branch_enc', 'desc': 'Branch encoding', 'default': 'alternative', 'values': ('alternative', 'original')}, ) def __init__(self): self.buf = [] self.syncbuf = [] self.prevsample = 0 self.last_branch = 0 self.cpu_state = 'arm' self.current_pc = 0 self.current_loc = None self.current_func = None self.next_instr_lookup = {} self.file_lookup = {} self.func_lookup = {} self.disasm_lookup = {} self.source_lookup = {} def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.load_objdump() def load_objdump(self): '''Parse disassembly obtained from objdump into two tables: next_instr_lookup: Find the next PC addr from current PC. disasm_lookup: Find the instruction text from current PC. source_lookup: Find the source code line from current PC. ''' if not (self.options['objdump'] and self.options['elffile']): return opts = [self.options['objdump']] opts += self.options['objdump_opts'].split() opts += [self.options['elffile']] try: disasm = subprocess.check_output(opts) except subprocess.CalledProcessError: return disasm = disasm.decode('utf-8', 'replace') instpat = re.compile('\s*([0-9a-fA-F]+):\t+([0-9a-fA-F ]+)\t+([a-zA-Z][^;]+)\s*;?.*') branchpat = re.compile('(b|bl|b..|bl..|cbnz|cbz)(?:\.[wn])?\s+(?:r[0-9]+,\s*)?([0-9a-fA-F]+)') filepat = re.compile('[^\s]+[/\\\\]([a-zA-Z0-9._-]+:[0-9]+)(?:\s.*)?') funcpat = re.compile('[0-9a-fA-F]+\s*<([^>]+)>:.*') prev_src = '' prev_file = '' prev_func = '' for line in disasm.split('\n'): m = instpat.match(line) if m: addr = int(m.group(1), 16) raw = m.group(2) disas = m.group(3).strip().replace('\t', ' ') self.disasm_lookup[addr] = disas self.source_lookup[addr] = prev_src self.file_lookup[addr] = prev_file self.func_lookup[addr] = prev_func # Next address in direct sequence. ilen = len(raw.replace(' ', '')) // 2 next_n = addr + ilen # Next address if branch is taken. bm = branchpat.match(disas) if bm: next_e = int(bm.group(2), 16) else: next_e = next_n self.next_instr_lookup[addr] = (next_n, next_e) else: m = funcpat.match(line) if m: prev_func = m.group(1) prev_src = None else: m = filepat.match(line) if m: prev_file = m.group(1) prev_src = None else: prev_src = line.strip() def flush_current_loc(self): if self.current_loc is not None: ss, es, loc, src = self.current_loc if loc: self.put(ss, es, self.out_ann, [9, [loc]]) if src: self.put(ss, es, self.out_ann, [8, [src]]) self.current_loc = None def flush_current_func(self): if self.current_func is not None: ss, es, func = self.current_func if func: self.put(ss, es, self.out_ann, [10, [func]]) self.current_func = None def instructions_executed(self, exec_status): '''Advance program counter based on executed instructions. Argument is a list of False for not executed and True for executed instructions. ''' if len(exec_status) == 0: return tdelta = max(1, (self.prevsample - self.startsample) / len(exec_status)) for i, exec_status in enumerate(exec_status): pc = self.current_pc default_next = pc + 2 if self.cpu_state == 'thumb' else pc + 4 target_n, target_e = self.next_instr_lookup.get(pc, (default_next, default_next)) ss = self.startsample + round(tdelta * i) es = self.startsample + round(tdelta * (i+1)) self.put(ss, es, self.out_ann, [5, ['PC 0x%08x' % pc, '0x%08x' % pc, '%08x' % pc]]) new_loc = self.file_lookup.get(pc) new_src = self.source_lookup.get(pc) new_dis = self.disasm_lookup.get(pc) new_func = self.func_lookup.get(pc) # Report source line only when it changes. if self.current_loc is not None: if new_loc != self.current_loc[2] or new_src != self.current_loc[3]: self.flush_current_loc() if self.current_loc is None: self.current_loc = [ss, es, new_loc, new_src] else: self.current_loc[1] = es # Report function name only when it changes. if self.current_func is not None: if new_func != self.current_func[2]: self.flush_current_func() if self.current_func is None: self.current_func = [ss, es, new_func] else: self.current_func[1] = es # Report instruction every time. if new_dis: if exec_status: a = [6, ['Executed: ' + new_dis, new_dis, new_dis.split()[0]]] else: a = [7, ['Not executed: ' + new_dis, new_dis, new_dis.split()[0]]] self.put(ss, es, self.out_ann, a) if exec_status: self.current_pc = target_e else: self.current_pc = target_n def get_packet_type(self, byte): '''Identify packet type based on its first byte. See ARM IHI0014Q section "ETMv3 Signal Protocol" "Packet Types" ''' if byte & 0x01 == 0x01: return 'branch' elif byte == 0x00: return 'a_sync' elif byte == 0x04: return 'cyclecount' elif byte == 0x08: return 'i_sync' elif byte == 0x0C: return 'trigger' elif byte & 0xF3 in (0x20, 0x40, 0x60): return 'ooo_data' elif byte == 0x50: return 'store_failed' elif byte == 0x70: return 'i_sync' elif byte & 0xDF in (0x54, 0x58, 0x5C): return 'ooo_place' elif byte == 0x3C: return 'vmid' elif byte & 0xD3 == 0x02: return 'data' elif byte & 0xFB == 0x42: return 'timestamp' elif byte == 0x62: return 'data_suppressed' elif byte == 0x66: return 'ignore' elif byte & 0xEF == 0x6A: return 'value_not_traced' elif byte == 0x6E: return 'context_id' elif byte == 0x76: return 'exception_exit' elif byte == 0x7E: return 'exception_entry' elif byte & 0x81 == 0x80: return 'p_header' else: return 'unknown' def fallback(self, buf): ptype = self.get_packet_type(buf[0]) return [0, ['Unhandled ' + ptype + ': ' + ' '.join(['%02x' % b for b in buf])]] def handle_a_sync(self, buf): if buf[-1] == 0x80: return [0, ['Synchronization']] def handle_exception_exit(self, buf): return [2, ['Exception exit']] def handle_exception_entry(self, buf): return [2, ['Exception entry']] def handle_i_sync(self, buf): contextid_bytes = 0 # This is the default ETM config. if len(buf) < 6: return None # Packet definitely not full yet. if buf[0] == 0x08: # No cycle count. cyclecount = None idx = 1 + contextid_bytes # Index to info byte. elif buf[0] == 0x70: # With cycle count. cyclecount, cyclen = parse_varint(buf[1:6]) idx = 1 + cyclen + contextid_bytes if len(buf) <= idx + 4: return None infobyte = buf[idx] addr = parse_uint(buf[idx+1:idx+5]) reasoncode = (infobyte >> 5) & 3 reason = ('Periodic', 'Tracing enabled', 'After overflow', 'Exit from debug')[reasoncode] jazelle = (infobyte >> 4) & 1 nonsec = (infobyte >> 3) & 1 altisa = (infobyte >> 2) & 1 hypervisor = (infobyte >> 1) & 1 thumb = addr & 1 addr &= 0xFFFFFFFE if reasoncode == 0 and self.current_pc != addr: self.put(self.startsample, self.prevsample, self.out_ann, [0, ['WARN: Unexpected PC change 0x%08x -> 0x%08x' % \ (self.current_pc, addr)]]) elif reasoncode != 0: # Reset location when the trace has been interrupted. self.flush_current_loc() self.flush_current_func() self.last_branch = addr self.current_pc = addr if jazelle: self.cpu_state = 'jazelle' elif thumb: self.cpu_state = 'thumb' else: self.cpu_state = 'arm' cycstr = '' if cyclecount is not None: cycstr = ', cyclecount %d' % cyclecount if infobyte & 0x80: # LSIP packet self.put(self.startsample, self.prevsample, self.out_ann, [0, ['WARN: LSIP I-Sync packet not implemented']]) return [0, ['I-Sync: %s, PC 0x%08x, %s state%s' % \ (reason, addr, self.cpu_state, cycstr), \ 'I-Sync: %s 0x%08x' % (reason, addr)]] def handle_trigger(self, buf): return [0, ['Trigger event', 'Trigger']] def handle_p_header(self, buf): # Only non cycle-accurate mode supported. if buf[0] & 0x83 == 0x80: n = (buf[0] >> 6) & 1 e = (buf[0] >> 2) & 15 self.instructions_executed([1] * e + [0] * n) if n: return [3, ['%d instructions executed, %d skipped due to ' \ 'condition codes' % (e, n), '%d ins exec, %d skipped' % (e, n), '%dE,%dN' % (e, n)]] else: return [3, ['%d instructions executed' % e, '%d ins exec' % e, '%dE' % e]] elif buf[0] & 0xF3 == 0x82: i1 = (buf[0] >> 3) & 1 i2 = (buf[0] >> 2) & 1 self.instructions_executed([not i1, not i2]) txt1 = ('executed', 'skipped') txt2 = ('E', 'S') return [3, ['Instruction 1 %s, instruction 2 %s' % (txt1[i1], txt1[i2]), 'I1 %s, I2 %s' % (txt2[i1], txt2[i2]), '%s,%s' % (txt2[i1], txt2[i2])]] else: return self.fallback(buf) def handle_branch(self, buf): if buf[-1] & 0x80 != 0x00: return None # Not complete yet. brinfo = parse_branch_addr(buf, self.last_branch, self.cpu_state, self.options['branch_enc']) if brinfo is None: return None # Not complete yet. addr, addrlen, cpu_state, exc_info = brinfo self.last_branch = addr self.current_pc = addr txt = '' if cpu_state != self.cpu_state: txt += ', to %s state' % cpu_state self.cpu_state = cpu_state annidx = 1 if exc_info: annidx = 2 ns, exc, cancel, altisa, hyp, resume = exc_info if ns: txt += ', to non-secure state' if exc: if exc < len(exc_names): txt += ', exception %s' % exc_names[exc] else: txt += ', exception 0x%02x' % exc if cancel: txt += ', instr cancelled' if altisa: txt += ', to AltISA' if hyp: txt += ', to hypervisor' if resume: txt += ', instr resume 0x%02x' % resume return [annidx, ['Branch to 0x%08x%s' % (addr, txt), 'B 0x%08x%s' % (addr, txt)]] def decode(self, ss, es, data): ptype, rxtx, pdata = data if ptype != 'DATA': return # Reset packet if there is a long pause between bytes. # This helps getting the initial synchronization. self.byte_len = es - ss if ss - self.prevsample > 16 * self.byte_len: self.flush_current_loc() self.flush_current_func() self.buf = [] self.prevsample = es self.buf.append(pdata[0]) # Store the start time of the packet. if len(self.buf) == 1: self.startsample = ss # Keep separate buffer for detection of sync packets. # Sync packets override everything else, so that we can regain sync # even if some packets are corrupted. self.syncbuf = self.syncbuf[-4:] + [pdata[0]] if self.syncbuf == [0x00, 0x00, 0x00, 0x00, 0x80]: self.buf = self.syncbuf self.syncbuf = [] # See if it is ready to be decoded. ptype = self.get_packet_type(self.buf[0]) if hasattr(self, 'handle_' + ptype): func = getattr(self, 'handle_' + ptype) data = func(self.buf) else: data = self.fallback(self.buf) if data is not None: if data: self.put(self.startsample, es, self.out_ann, data) self.buf = [] libsigrokdecode-0.5.0/decoders/arm_etmv3/__init__.py0000644000175000017500000000163413117367246017402 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Petteri Aimonen ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'uart' decoder and decodes packets of the ARMv7m Embedded Trace Macroblock v3.x. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/iec/0000755000175000017500000000000013117367246014210 500000000000000libsigrokdecode-0.5.0/decoders/iec/pd.py0000644000175000017500000001340613117367246015111 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Marcus Comstedt ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd step_wait_conds = ( [{2: 'f'}, {0: 'l', 1: 'h'}], [{2: 'f'}, {0: 'h', 1: 'h'}, {1: 'l'}], [{2: 'f'}, {0: 'f'}, {1: 'l'}], [{2: 'f'}, {1: 'e'}], ) class Decoder(srd.Decoder): api_version = 3 id = 'iec' name = 'IEC' longname = 'Commodore bus' desc = 'Commodore serial IEEE-488 (IEC) bus protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['gpib'] channels = ( {'id': 'data', 'name': 'DATA', 'desc': 'Data I/O'}, {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'}, {'id': 'atn', 'name': 'ATN', 'desc': 'Attention'}, ) optional_channels = ( {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request'}, ) annotations = ( ('items', 'Items'), ('gpib', 'DAT/CMD'), ('eoi', 'EOI'), ) annotation_rows = ( ('bytes', 'Bytes', (0,)), ('gpib', 'DAT/CMD', (1,)), ('eoi', 'EOI', (2,)), ) def __init__(self): self.saved_ATN = False self.saved_EOI = False self.ss_item = self.es_item = None self.step = 0 self.bits = 0 self.numbits = 0 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putb(self, data): self.put(self.ss_item, self.es_item, self.out_ann, data) def handle_bits(self): # Output the saved item. dbyte = self.bits dATN = self.saved_ATN dEOI = self.saved_EOI self.es_item = self.samplenum self.putb([0, ['%02X' % dbyte]]) # Encode item byte to GPIB convention. self.strgpib = ' ' if dATN: # ATN, decode commands. # Note: Commands < 0x20 are not used on IEC bus. if dbyte == 0x01: self.strgpib = 'GTL' if dbyte == 0x04: self.strgpib = 'SDC' if dbyte == 0x05: self.strgpib = 'PPC' if dbyte == 0x08: self.strgpib = 'GET' if dbyte == 0x09: self.strgpib = 'TCT' if dbyte == 0x11: self.strgpib = 'LLO' if dbyte == 0x14: self.strgpib = 'DCL' if dbyte == 0x15: self.strgpib = 'PPU' if dbyte == 0x18: self.strgpib = 'SPE' if dbyte == 0x19: self.strgpib = 'SPD' if dbyte == 0x3f: self.strgpib = 'UNL' if dbyte == 0x5f: self.strgpib = 'UNT' if dbyte > 0x1f and dbyte < 0x3f: # Address listener. self.strgpib = 'L' + chr(dbyte + 0x10) if dbyte > 0x3f and dbyte < 0x5f: # Address talker. self.strgpib = 'T' + chr(dbyte - 0x10) if dbyte > 0x5f and dbyte < 0x70: # Channel reopen. self.strgpib = 'R' + chr(dbyte - 0x30) if dbyte > 0xdf and dbyte < 0xf0: # Channel close. self.strgpib = 'C' + chr(dbyte - 0xb0) if dbyte > 0xef: # Channel open. self.strgpib = 'O' + chr(dbyte - 0xc0) else: if dbyte > 0x1f and dbyte < 0x7f: self.strgpib = chr(dbyte) if dbyte == 0x0a: self.strgpib = 'LF' if dbyte == 0x0d: self.strgpib = 'CR' self.putb([1, [self.strgpib]]) self.strEOI = ' ' if dEOI: self.strEOI = 'EOI' self.putb([2, [self.strEOI]]) def decode(self): while True: data, clk, atn, srq = self.wait(step_wait_conds[self.step]) if self.matched[0]: # Falling edge on ATN, reset step. self.step = 0 if self.step == 0: # Don't use self.matched[1] here since we might come from # a step with different conds due to the code above. if data == 0 and clk == 1: # Rising edge on CLK while DATA is low: Ready to send. self.step = 1 elif self.step == 1: if data == 1 and clk == 1: # Rising edge on DATA while CLK is high: Ready for data. self.ss_item = self.samplenum self.saved_ATN = not atn self.saved_EOI = False self.bits = 0 self.numbits = 0 self.step = 2 elif clk == 0: # CLK low again, transfer aborted. self.step = 0 elif self.step == 2: if data == 0 and clk == 1: # DATA goes low while CLK is still high, EOI confirmed. self.saved_EOI = True elif clk == 0: self.step = 3 elif self.step == 3: if self.matched[1]: if clk == 1: # Rising edge on CLK; latch DATA. self.bits |= data << self.numbits elif clk == 0: # Falling edge on CLK; end of bit. self.numbits += 1 if self.numbits == 8: self.handle_bits() self.step = 0 libsigrokdecode-0.5.0/decoders/iec/__init__.py0000644000175000017500000000155713117367246016251 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2017 Marcus Comstedt ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This protocol decoder can decode the Commodore serial IEEE-488 (IEC) protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/i2c/0000755000175000017500000000000013117367246014125 500000000000000libsigrokdecode-0.5.0/decoders/i2c/pd.py0000644000175000017500000002400013117367246015016 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2010-2016 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # TODO: Look into arbitration, collision detection, clock synchronisation, etc. # TODO: Implement support for 10bit slave addresses. # TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0). # TODO: Implement support for detecting various bus errors. import sigrokdecode as srd ''' OUTPUT_PYTHON format: Packet: [, ] : - 'START' (START condition) - 'START REPEAT' (Repeated START condition) - 'ADDRESS READ' (Slave address, read) - 'ADDRESS WRITE' (Slave address, write) - 'DATA READ' (Data, read) - 'DATA WRITE' (Data, write) - 'STOP' (STOP condition) - 'ACK' (ACK bit) - 'NACK' (NACK bit) - 'BITS' (: list of data/address bits and their ss/es numbers) is the data or address byte associated with the 'ADDRESS*' and 'DATA*' command. Slave addresses do not include bit 0 (the READ/WRITE indication bit). For example, a slave address field could be 0x51 (instead of 0xa2). For 'START', 'START REPEAT', 'STOP', 'ACK', and 'NACK' is None. ''' # CMD: [annotation-type-index, long annotation, short annotation] proto = { 'START': [0, 'Start', 'S'], 'START REPEAT': [1, 'Start repeat', 'Sr'], 'STOP': [2, 'Stop', 'P'], 'ACK': [3, 'ACK', 'A'], 'NACK': [4, 'NACK', 'N'], 'BIT': [5, 'Bit', 'B'], 'ADDRESS READ': [6, 'Address read', 'AR'], 'ADDRESS WRITE': [7, 'Address write', 'AW'], 'DATA READ': [8, 'Data read', 'DR'], 'DATA WRITE': [9, 'Data write', 'DW'], } class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'i2c' name = 'I²C' longname = 'Inter-Integrated Circuit' desc = 'Two-wire, multi-master, serial bus.' license = 'gplv2+' inputs = ['logic'] outputs = ['i2c'] channels = ( {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'}, {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'}, ) options = ( {'id': 'address_format', 'desc': 'Displayed slave address format', 'default': 'shifted', 'values': ('shifted', 'unshifted')}, ) annotations = ( ('start', 'Start condition'), ('repeat-start', 'Repeat start condition'), ('stop', 'Stop condition'), ('ack', 'ACK'), ('nack', 'NACK'), ('bit', 'Data/address bit'), ('address-read', 'Address read'), ('address-write', 'Address write'), ('data-read', 'Data read'), ('data-write', 'Data write'), ('warnings', 'Human-readable warnings'), ) annotation_rows = ( ('bits', 'Bits', (5,)), ('addr-data', 'Address/Data', (0, 1, 2, 3, 4, 6, 7, 8, 9)), ('warnings', 'Warnings', (10,)), ) binary = ( ('address-read', 'Address read'), ('address-write', 'Address write'), ('data-read', 'Data read'), ('data-write', 'Data write'), ) def __init__(self): self.samplerate = None self.ss = self.es = self.ss_byte = -1 self.bitcount = 0 self.databyte = 0 self.wr = -1 self.is_repeat_start = 0 self.state = 'FIND START' self.pdu_start = None self.pdu_bits = 0 self.bits = [] def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_bitrate = self.register(srd.OUTPUT_META, meta=(int, 'Bitrate', 'Bitrate from Start bit to Stop bit')) def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) def putp(self, data): self.put(self.ss, self.es, self.out_python, data) def putb(self, data): self.put(self.ss, self.es, self.out_binary, data) def handle_start(self, pins): self.ss, self.es = self.samplenum, self.samplenum self.pdu_start = self.samplenum self.pdu_bits = 0 cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START' self.putp([cmd, None]) self.putx([proto[cmd][0], proto[cmd][1:]]) self.state = 'FIND ADDRESS' self.bitcount = self.databyte = 0 self.is_repeat_start = 1 self.wr = -1 self.bits = [] # Gather 8 bits of data plus the ACK/NACK bit. def handle_address_or_data(self, pins): scl, sda = pins self.pdu_bits += 1 # Address and data are transmitted MSB-first. self.databyte <<= 1 self.databyte |= sda # Remember the start of the first data/address bit. if self.bitcount == 0: self.ss_byte = self.samplenum # Store individual bits and their start/end samplenumbers. # In the list, index 0 represents the LSB (I²C transmits MSB-first). self.bits.insert(0, [sda, self.samplenum, self.samplenum]) if self.bitcount > 0: self.bits[1][2] = self.samplenum if self.bitcount == 7: self.bitwidth = self.bits[1][2] - self.bits[2][2] self.bits[0][2] += self.bitwidth # Return if we haven't collected all 8 + 1 bits, yet. if self.bitcount < 7: self.bitcount += 1 return d = self.databyte if self.state == 'FIND ADDRESS': # The READ/WRITE bit is only in address bytes, not data bytes. self.wr = 0 if (self.databyte & 1) else 1 if self.options['address_format'] == 'shifted': d = d >> 1 bin_class = -1 if self.state == 'FIND ADDRESS' and self.wr == 1: cmd = 'ADDRESS WRITE' bin_class = 1 elif self.state == 'FIND ADDRESS' and self.wr == 0: cmd = 'ADDRESS READ' bin_class = 0 elif self.state == 'FIND DATA' and self.wr == 1: cmd = 'DATA WRITE' bin_class = 3 elif self.state == 'FIND DATA' and self.wr == 0: cmd = 'DATA READ' bin_class = 2 self.ss, self.es = self.ss_byte, self.samplenum + self.bitwidth self.putp(['BITS', self.bits]) self.putp([cmd, d]) self.putb([bin_class, bytes([d])]) for bit in self.bits: self.put(bit[1], bit[2], self.out_ann, [5, ['%d' % bit[0]]]) if cmd.startswith('ADDRESS'): self.ss, self.es = self.samplenum, self.samplenum + self.bitwidth w = ['Write', 'Wr', 'W'] if self.wr else ['Read', 'Rd', 'R'] self.putx([proto[cmd][0], w]) self.ss, self.es = self.ss_byte, self.samplenum self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d), '%s: %02X' % (proto[cmd][2], d), '%02X' % d]]) # Done with this packet. self.bitcount = self.databyte = 0 self.bits = [] self.state = 'FIND ACK' def get_ack(self, pins): scl, sda = pins self.ss, self.es = self.samplenum, self.samplenum + self.bitwidth cmd = 'NACK' if (sda == 1) else 'ACK' self.putp([cmd, None]) self.putx([proto[cmd][0], proto[cmd][1:]]) # There could be multiple data bytes in a row, so either find # another data byte or a STOP condition next. self.state = 'FIND DATA' def handle_stop(self, pins): # Meta bitrate elapsed = 1 / float(self.samplerate) * (self.samplenum - self.pdu_start + 1) bitrate = int(1 / elapsed * self.pdu_bits) self.put(self.ss_byte, self.samplenum, self.out_bitrate, bitrate) cmd = 'STOP' self.ss, self.es = self.samplenum, self.samplenum self.putp([cmd, None]) self.putx([proto[cmd][0], proto[cmd][1:]]) self.state = 'FIND START' self.is_repeat_start = 0 self.wr = -1 self.bits = [] def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') self.wait({}) while True: # State machine. if self.state == 'FIND START': # Wait for a START condition (S): SCL = high, SDA = falling. self.handle_start(self.wait({0: 'h', 1: 'f'})) elif self.state == 'FIND ADDRESS': # Wait for a data bit: SCL = rising. self.handle_address_or_data(self.wait({0: 'r'})) elif self.state == 'FIND DATA': # Wait for any of the following conditions (or combinations): # a) Data sampling of receiver: SCL = rising, and/or # b) START condition (S): SCL = high, SDA = falling, and/or # c) STOP condition (P): SCL = high, SDA = rising pins = self.wait([{0: 'r'}, {0: 'h', 1: 'f'}, {0: 'h', 1: 'r'}]) # Check which of the condition(s) matched and handle them. if self.matched[0]: self.handle_address_or_data(pins) elif self.matched[1]: self.handle_start(pins) elif self.matched[2]: self.handle_stop(pins) elif self.state == 'FIND ACK': # Wait for a data/ack bit: SCL = rising. self.get_ack(self.wait({0: 'r'})) libsigrokdecode-0.5.0/decoders/i2c/__init__.py0000644000175000017500000000165113117367246016161 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' I²C (Inter-Integrated Circuit) is a bidirectional, multi-master bus using two signals (SCL = serial clock line, SDA = serial data line). ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/qi/0000755000175000017500000000000013117367246014061 500000000000000libsigrokdecode-0.5.0/decoders/qi/pd.py0000644000175000017500000002243113117367246014760 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Josef Gajdusek ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import operator import collections from functools import reduce end_codes = ( 'Unknown', 'Charge Complete', 'Internal Fault', 'Over Temperature', 'Over Voltage', 'Over Current', 'Battery Failure', 'Reconfigure', 'No Response', ) class SamplerateError(Exception): pass def calc_checksum(packet): return reduce(operator.xor, packet[:-1]) def bits_to_uint(bits): # LSB first return reduce(lambda i, v: (i >> 1) | (v << (len(bits) - 1)), bits, 0) class Decoder(srd.Decoder): api_version = 3 id = 'qi' name = 'Qi' longname = 'Qi charger protocol' desc = 'Protocol used by Qi receiver' license = 'gplv2+' inputs = ['logic'] outputs = ['qi'] channels = ( {'id': 'qi', 'name': 'Qi', 'desc': 'Demodulated Qi data line'}, ) annotations = ( ('bits', 'Bits'), ('bytes-errors', 'Bit errors'), ('bytes-start', 'Start bits'), ('bytes-info', 'Info bits'), ('bytes-data', 'Data bytes'), ('packets-data', 'Packet data'), ('packets-checksum-ok', 'Packet checksum'), ('packets-checksum-err', 'Packet checksum'), ) annotation_rows = ( ('bits', 'Bits', (0,)), ('bytes', 'Bytes', (1, 2, 3, 4)), ('packets', 'Packets', (5, 6, 7)), ) def __init__(self): self.samplerate = None self.reset_variables() def reset_variables(self): self.counter = 0 self.prev = None self.state = 'IDLE' self.lastbit = 0 self.bytestart = 0 self.deq = collections.deque(maxlen = 2) self.bits = [] self.bitsi = [0] self.bytesi = [] self.packet = [] def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.bit_width = float(self.samplerate) / 2e3 def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.reset_variables() def packet_len(self, byte): if 0x00 <= byte <= 0x1f: return int(1 + (byte - 0) / 32) if 0x20 <= byte <= 0x7f: return int(2 + (byte - 32) / 16) if 0x80 <= byte <= 0xdf: return int(8 + (byte - 128) / 8) if 0xe0 <= byte <= 0xff: return int(20 + (byte - 224) / 4) def in_tolerance(self, l): return (0.75 * self.bit_width) < l < (1.25 * self.bit_width) def putp(self, data): self.put(self.bytesi[0], self.bytesi[-1], self.out_ann, [5, data]) def process_packet(self): if self.packet[0] == 0x01: # Signal Strength self.putp(['Signal Strength: %d' % self.packet[1], 'SS: %d' % self.packet[1], 'SS']) elif self.packet[0] == 0x02: # End Power Transfer reason = end_codes[self.packet[1]] if self.packet[1] < len(end_codes) else 'Reserved' self.putp(['End Power Transfer: %s' % reason, 'EPT: %s' % reason, 'EPT']) elif self.packet[0] == 0x03: # Control Error val = self.packet[1] if self.packet[1] < 128 else (self.packet[1] & 0x7f) - 128 self.putp(['Control Error: %d' % val, 'CE: %d' % val, 'CE']) elif self.packet[0] == 0x04: # Received Power self.putp(['Received Power: %d' % self.packet[1], 'RP: %d' % self.packet[1], 'RP']) elif self.packet[0] == 0x05: # Charge Status self.putp(['Charge Status: %d' % self.packet[1], 'CS: %d' % self.packet[1], 'CS']) elif self.packet[0] == 0x06: # Power Control Hold-off self.putp(['Power Control Hold-off: %dms' % self.packet[1], 'PCH: %d' % self.packet[1]], 'PCH') elif self.packet[0] == 0x51: # Configuration powerclass = (self.packet[1] & 0xc0) >> 7 maxpower = self.packet[1] & 0x3f prop = (self.packet[3] & 0x80) >> 7 count = self.packet[3] & 0x07 winsize = (self.packet[4] & 0xf8) >> 3 winoff = self.packet[4] & 0x07 self.putp(['Configuration: Power Class = %d, Maximum Power = %d, Prop = %d,' 'Count = %d, Window Size = %d, Window Offset = %d' % (powerclass, maxpower, prop, count, winsize, winoff), 'C: PC = %d MP = %d P = %d C = %d WS = %d WO = %d' % (powerclass, maxpower, prop, count, winsize, winoff), 'Configuration', 'C']) elif self.packet[0] == 0x71: # Identification version = '%d.%d' % ((self.packet[1] & 0xf0) >> 4, self.packet[1] & 0x0f) mancode = '%02x%02x' % (self.packet[2], self.packet[3]) devid = '%02x%02x%02x%02x' % (self.packet[4] & ~0x80, self.packet[5], self.packet[6], self.packet[7]) self.putp(['Identification: Version = %s, Manufacturer = %s, ' \ 'Device = %s' % (version, mancode, devid), 'ID: %s %s %s' % (version, mancode, devid), 'ID']) elif self.packet[0] == 0x81: # Extended Identification edevid = '%02x%02x%02x%02x%02x%02x%02x%02x' % self.packet[1:-1] self.putp(['Extended Identification: %s' % edevid, 'EI: %s' % edevid, 'EI']) elif self.packet[0] in (0x18, 0x19, 0x28, 0x29, 0x38, 0x48, 0x58, 0x68, 0x78, 0x85, 0xa4, 0xc4, 0xe2): # Proprietary self.putp(['Proprietary', 'P']) else: # Unknown self.putp(['Unknown', '?']) self.put(self.bytesi[-1], self.samplenum, self.out_ann, [6, ['Checksum OK', 'OK']] if \ calc_checksum(self.packet) == self.packet[-1] else [6, ['Checksum error', 'ERR']]) def process_byte(self): self.put(self.bytestart, self.bitsi[0], self.out_ann, ([2, ['Start bit', 'Start', 'S']]) if self.bits[0] == 0 else ([1, ['Start error', 'Start err', 'SE']])) databits = self.bits[1:9] data = bits_to_uint(databits) parity = reduce(lambda i, v: (i + v) % 2, databits, 1) self.put(self.bitsi[0], self.bitsi[8], self.out_ann, [4, ['%02x' % data]]) self.put(self.bitsi[8], self.bitsi[9], self.out_ann, ([3, ['Parity bit', 'Parity', 'P']]) if self.bits[9] == parity else ([1, ['Parity error', 'Parity err', 'PE']])) self.put(self.bitsi[9], self.bitsi[10], self.out_ann, ([3, ['Stop bit', 'Stop', 'S']]) if self.bits[10] == 1 else ([1, ['Stop error', 'Stop err', 'SE']])) self.bytesi.append(self.bytestart) self.packet.append(data) if self.packet_len(self.packet[0]) + 2 == len(self.packet): self.process_packet() self.bytesi.clear() self.packet.clear() def add_bit(self, bit): self.bits.append(bit) self.bitsi.append(self.samplenum) if self.state == 'IDLE' and len(self.bits) >= 5 and \ self.bits[-5:] == [1, 1, 1, 1, 0]: self.state = 'DATA' self.bytestart = self.bitsi[-2] self.bits = [0] self.bitsi = [self.samplenum] self.packet.clear() elif self.state == 'DATA' and len(self.bits) == 11: self.process_byte() self.bytestart = self.samplenum self.bits.clear() self.bitsi.clear() if self.state != 'IDLE': self.put(self.lastbit, self.samplenum, self.out_ann, [0, ['%d' % bit]]) self.lastbit = self.samplenum def handle_transition(self, l, htl): self.deq.append(l) if len(self.deq) >= 2 and \ (self.in_tolerance(self.deq[-1] + self.deq[-2]) or \ htl and self.in_tolerance(l * 2) and \ self.deq[-2] > 1.25 * self.bit_width): self.add_bit(1) self.deq.clear() elif self.in_tolerance(l): self.add_bit(0) self.deq.clear() elif l > (1.25 * self.bit_width): self.state = 'IDLE' self.bytesi.clear() self.packet.clear() self.bits.clear() self.bitsi.clear() def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') (qi,) = self.wait({'skip': 1}) self.handle_transition(self.samplenum, qi == 0) while True: prev = self.samplenum (qi,) = self.wait({0: 'e'}) self.handle_transition(self.samplenum - prev, qi == 0) libsigrokdecode-0.5.0/decoders/qi/__init__.py0000644000175000017500000000163713117367246016121 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Josef Gajdusek ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder decodes demodulated data streams used by the Qi standard for communication from the receiver to the charging station. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/i2cdemux/0000755000175000017500000000000013117367246015170 500000000000000libsigrokdecode-0.5.0/decoders/i2cdemux/pd.py0000644000175000017500000000553013117367246016070 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): api_version = 2 id = 'i2cdemux' name = 'I²C demux' longname = 'I²C demultiplexer' desc = 'Demux I²C packets into per-slave-address streams.' license = 'gplv2+' inputs = ['i2c'] outputs = [] # TODO: Only known at run-time. def __init__(self): self.packets = [] # Local cache of I²C packets self.slaves = [] # List of known slave addresses self.stream = -1 # Current output stream self.streamcount = 0 # Number of created output streams def start(self): self.out_python = [] # Grab I²C packets into a local cache, until an I²C STOP condition # packet comes along. At some point before that STOP condition, there # will have been an ADDRESS READ or ADDRESS WRITE which contains the # I²C address of the slave that the master wants to talk to. # We use this slave address to figure out which output stream should # get the whole chunk of packets (from START to STOP). def decode(self, ss, es, data): cmd, databyte = data # Add the I²C packet to our local cache. self.packets.append([ss, es, data]) if cmd in ('ADDRESS READ', 'ADDRESS WRITE'): if databyte in self.slaves: self.stream = self.slaves.index(databyte) return # We're never seen this slave, add a new stream. self.slaves.append(databyte) self.out_python.append(self.register(srd.OUTPUT_PYTHON, proto_id='i2c-%s' % hex(databyte))) self.stream = self.streamcount self.streamcount += 1 elif cmd == 'STOP': if self.stream == -1: raise Exception('Invalid stream!') # FIXME? # Send the whole chunk of I²C packets to the correct stream. for p in self.packets: self.put(p[0], p[1], self.out_python[self.stream], p[2]) self.packets = [] self.stream = -1 else: pass # Do nothing, only add the I²C packet to our cache. libsigrokdecode-0.5.0/decoders/i2cdemux/__init__.py0000644000175000017500000000174213117367246017225 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This is a generic I²C demultiplexing protocol decoder. It takes an I²C stream as input and outputs multiple I²C streams, each stream containing only I²C packets for one specific I²C slave. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/usb_request/0000755000175000017500000000000013117367246016011 500000000000000libsigrokdecode-0.5.0/decoders/usb_request/pd.py0000644000175000017500000003224313117367246016712 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Stefan Brüns ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd import struct class SamplerateError(Exception): pass class pcap_usb_pkt(): # Linux usbmon format, see Documentation/usb/usbmon.txt h = b'\x00\x00\x00\x00' # ID part 1 h += b'\x00\x00\x00\x00' # ID part 2 h += b'C' # 'S'ubmit / 'C'omplete / 'E'rror h += b'\x03' # ISO (0), Intr, Control, Bulk (3) h += b'\x00' # Endpoint h += b'\x00' # Device address h += b'\x00\x00' # Bus number h += b'-' # Setup tag - 0: Setup present, '-' otherwise h += b'<' # Data tag - '<' no data, 0 otherwise # Timestamp h += b'\x00\x00\x00\x00' # TS seconds part 1 h += b'\x00\x00\x00\x00' # TS seconds part 2 h += b'\x00\x00\x00\x00' # TS useconds # h += b'\x00\x00\x00\x00' # Status 0: OK h += b'\x00\x00\x00\x00' # URB length h += b'\x00\x00\x00\x00' # Data length # Setup packet data, valid if setup tag == 0 h += b'\x00' # bmRequestType h += b'\x00' # bRequest h += b'\x00\x00' # wValue h += b'\x00\x00' # wIndex h += b'\x00\x00' # wLength # h += b'\x00\x00\x00\x00' # ISO/interrupt interval h += b'\x00\x00\x00\x00' # ISO start frame h += b'\x00\x00\x00\x00' # URB flags h += b'\x00\x00\x00\x00' # Number of ISO descriptors def __init__(self, req, ts, is_submit): self.header = bytearray(pcap_usb_pkt.h) self.data = b'' self.set_urbid(req['id']) self.set_urbtype('S' if is_submit else 'C') self.set_timestamp(ts) self.set_addr_ep(req['addr'], req['ep']) if req['type'] in ('SETUP IN', 'SETUP OUT'): self.set_transfertype(2) # Control self.set_setup(req['setup_data']) if req['type'] in ('BULK IN'): self.set_addr_ep(req['addr'], 0x80 | req['ep']) self.set_data(req['data']) def set_urbid(self, urbid): self.header[4:8] = struct.pack('>I', urbid) def set_urbtype(self, urbtype): self.header[8] = ord(urbtype) def set_transfertype(self, transfertype): self.header[9] = transfertype def set_addr_ep(self, addr, ep): self.header[11] = addr self.header[10] = ep def set_timestamp(self, ts): self.timestamp = ts self.header[20:24] = struct.pack('>I', ts[0]) # seconds self.header[24:28] = struct.pack('>I', ts[1]) # microseconds def set_data(self, data): self.data = data self.header[15] = 0 self.header[36:40] = struct.pack('>I', len(data)) def set_setup(self, data): self.header[14] = 0 self.header[40:48] = data def packet(self): return bytes(self.header) + bytes(self.data) def record_header(self): # See https://wiki.wireshark.org/Development/LibpcapFileFormat. (secs, usecs) = self.timestamp h = struct.pack('>I', secs) # TS seconds h += struct.pack('>I', usecs) # TS microseconds # No truncation, so both lengths are the same. h += struct.pack('>I', len(self)) # Captured len (usb hdr + data) h += struct.pack('>I', len(self)) # Original len return h def __len__(self): return 64 + len(self.data) class Decoder(srd.Decoder): api_version = 2 id = 'usb_request' name = 'USB request' longname = 'Universal Serial Bus (LS/FS) transaction/request' desc = 'USB (low-speed and full-speed) transaction/request protocol.' license = 'gplv2+' inputs = ['usb_packet'] outputs = ['usb_request'] annotations = ( ('request-setup-read', 'Setup: Device-to-host'), ('request-setup-write', 'Setup: Host-to-device'), ('request-bulk-read', 'Bulk: Device-to-host'), ('request-bulk-write', 'Bulk: Host-to-device'), ('errors', 'Unexpected packets'), ) annotation_rows = ( ('request', 'USB requests', tuple(range(4))), ('errors', 'Errors', (4,)), ) binary = ( ('pcap', 'PCAP format'), ) def __init__(self): self.samplerate = None self.request = {} self.request_id = 0 self.transaction_state = 'IDLE' self.ss_transaction = None self.es_transaction = None self.transaction_ep = None self.transaction_addr = None self.wrote_pcap_header = False def putr(self, ss, es, data): self.put(ss, es, self.out_ann, data) def putb(self, ts, data): self.put(ts, ts, self.out_binary, data) def pcap_global_header(self): # See https://wiki.wireshark.org/Development/LibpcapFileFormat. h = b'\xa1\xb2\xc3\xd4' # Magic, indicate microsecond ts resolution h += b'\x00\x02' # Major version 2 h += b'\x00\x04' # Minor version 4 h += b'\x00\x00\x00\x00' # Correction vs. UTC, seconds h += b'\x00\x00\x00\x00' # Timestamp accuracy h += b'\xff\xff\xff\xff' # Max packet len # LINKTYPE_USB_LINUX_MMAPPED 220 # Linux usbmon format, see Documentation/usb/usbmon.txt. h += b'\x00\x00\x00\xdc' # Link layer return h def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.secs_per_sample = float(1) / float(self.samplerate) def start(self): self.out_binary = self.register(srd.OUTPUT_BINARY) self.out_ann = self.register(srd.OUTPUT_ANN) def handle_transfer(self): request_started = 0 request_end = self.handshake in ('ACK', 'STALL', 'timeout') ep = self.transaction_ep addr = self.transaction_addr if not (addr, ep) in self.request: self.request[(addr, ep)] = {'setup_data': [], 'data': [], 'type': None, 'ss': self.ss_transaction, 'es': None, 'id': self.request_id, 'addr': addr, 'ep': ep} self.request_id += 1 request_started = 1 request = self.request[(addr,ep)] # BULK or INTERRUPT transfer if request['type'] in (None, 'BULK IN') and self.transaction_type == 'IN': request['type'] = 'BULK IN' request['data'] += self.transaction_data request['es'] = self.es_transaction self.handle_request(request_started, request_end) elif request['type'] in (None, 'BULK OUT') and self.transaction_type == 'OUT': request['type'] = 'BULK OUT' request['data'] += self.transaction_data request['es'] = self.es_transaction self.handle_request(request_started, request_end) # CONTROL, SETUP stage elif request['type'] is None and self.transaction_type == 'SETUP': request['setup_data'] = self.transaction_data request['wLength'] = struct.unpack(' transaction_timeout: self.es_transaction = transaction_timeout self.handshake = 'timeout' self.handle_transfer() self.transaction_state = 'IDLE' if self.transaction_state != 'IDLE': self.putr(ss, es, [4, ['ERR: received %s token in state %s' % (pname, self.transaction_state)]]) return sync, pid, addr, ep, crc5 = pinfo self.transaction_data = [] self.ss_transaction = ss self.es_transaction = es self.transaction_state = 'TOKEN RECEIVED' self.transaction_ep = ep self.transaction_addr = addr self.transaction_type = pname # IN OUT SETUP elif pcategory == 'DATA': if self.transaction_state != 'TOKEN RECEIVED': self.putr(ss, es, [4, ['ERR: received %s token in state %s' % (pname, self.transaction_state)]]) return self.transaction_data = pinfo[2] self.transaction_state = 'DATA RECEIVED' elif pcategory == 'HANDSHAKE': if self.transaction_state not in ('TOKEN RECEIVED', 'DATA RECEIVED'): self.putr(ss, es, [4, ['ERR: received %s token in state %s' % (pname, self.transaction_state)]]) return self.handshake = pname self.transaction_state = 'IDLE' self.es_transaction = es self.handle_transfer() elif pname == 'PRE': return else: self.putr(ss, es, [4, ['ERR: received unhandled %s token in state %s' % (pname, self.transaction_state)]]) return libsigrokdecode-0.5.0/decoders/usb_request/__init__.py0000644000175000017500000000360713117367246020050 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2015 Stefan Brüns ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' This decoder stacks on top of the 'usb_packet' PD and decodes the USB (low-speed and full-speed) transactions. Transactions and requests are tracked per device address and endpoint. Tracking of CONTROL requests is quite accurate, as these always start with a SETUP token and are completed by an IN or OUT transaction, the status packet. All transactions during the DATA stage are combined. For BULK and INTERRUPT requests, each transaction starts with an IN or OUT request, and is considered completed after the first transaction containing data has been ACKed. Normally a request is only completed after a short or zero length packet, but this would require knowledge about the max packet size of an endpoint. All INTERRUPT requests are treated as BULK requests, as on the link layer both are identical. The PCAP binary output contains 'SUBMIT' and 'COMPLETE' records. For CONTROL request, the SUBMIT contains the SETUP request, the data is either contained in the SUBMIT (Host-to-Device) or the COMPLETE (Device-to-Host) record. Details: https://en.wikipedia.org/wiki/USB http://www.usb.org/developers/docs/ ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ir_nec/0000755000175000017500000000000013117367246014707 500000000000000libsigrokdecode-0.5.0/decoders/ir_nec/pd.py0000644000175000017500000001711013117367246015604 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Gump Yang ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## import sigrokdecode as srd from .lists import * class SamplerateError(Exception): pass class Decoder(srd.Decoder): api_version = 3 id = 'ir_nec' name = 'IR NEC' longname = 'IR NEC' desc = 'NEC infrared remote control protocol.' license = 'gplv2+' inputs = ['logic'] outputs = ['ir_nec'] channels = ( {'id': 'ir', 'name': 'IR', 'desc': 'Data line'}, ) options = ( {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low', 'values': ('active-low', 'active-high')}, ) annotations = ( ('bit', 'Bit'), ('agc-pulse', 'AGC pulse'), ('longpause', 'Long pause'), ('shortpause', 'Short pause'), ('stop-bit', 'Stop bit'), ('leader-code', 'Leader code'), ('addr', 'Address'), ('addr-inv', 'Address#'), ('cmd', 'Command'), ('cmd-inv', 'Command#'), ('repeat-code', 'Repeat code'), ('remote', 'Remote'), ('warnings', 'Warnings'), ) annotation_rows = ( ('bits', 'Bits', (0, 1, 2, 3, 4)), ('fields', 'Fields', (5, 6, 7, 8, 9, 10)), ('remote', 'Remote', (11,)), ('warnings', 'Warnings', (12,)), ) def putx(self, data): self.put(self.ss_start, self.samplenum, self.out_ann, data) def putb(self, data): self.put(self.ss_bit, self.samplenum, self.out_ann, data) def putd(self, data): name = self.state.title() d = {'ADDRESS': 6, 'ADDRESS#': 7, 'COMMAND': 8, 'COMMAND#': 9} s = {'ADDRESS': ['ADDR', 'A'], 'ADDRESS#': ['ADDR#', 'A#'], 'COMMAND': ['CMD', 'C'], 'COMMAND#': ['CMD#', 'C#']} self.putx([d[self.state], ['%s: 0x%02X' % (name, data), '%s: 0x%02X' % (s[self.state][0], data), '%s: 0x%02X' % (s[self.state][1], data), s[self.state][1]]]) def putstop(self, ss): self.put(ss, ss + self.stop, self.out_ann, [4, ['Stop bit', 'Stop', 'St', 'S']]) def putpause(self, p): self.put(self.ss_start, self.ss_other_edge, self.out_ann, [1, ['AGC pulse', 'AGC', 'A']]) idx = 2 if p == 'Long' else 3 self.put(self.ss_other_edge, self.samplenum, self.out_ann, [idx, [p + ' pause', '%s-pause' % p[0], '%sP' % p[0], 'P']]) def putremote(self): dev = address.get(self.addr, 'Unknown device') buttons = command.get(self.addr, None) if buttons is None: btn = ['Unknown', 'Unk'] else: btn = buttons.get(self.cmd, ['Unknown', 'Unk']) self.put(self.ss_remote, self.ss_bit + self.stop, self.out_ann, [11, ['%s: %s' % (dev, btn[0]), '%s: %s' % (dev, btn[1]), '%s' % btn[1]]]) def __init__(self): self.state = 'IDLE' self.ss_bit = self.ss_start = self.ss_other_edge = self.ss_remote = 0 self.data = self.count = self.active = None self.addr = self.cmd = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) self.active = 0 if self.options['polarity'] == 'active-low' else 1 def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value self.margin = int(self.samplerate * 0.0001) - 1 # 0.1ms self.lc = int(self.samplerate * 0.0135) - 1 # 13.5ms self.rc = int(self.samplerate * 0.01125) - 1 # 11.25ms self.dazero = int(self.samplerate * 0.001125) - 1 # 1.125ms self.daone = int(self.samplerate * 0.00225) - 1 # 2.25ms self.stop = int(self.samplerate * 0.000652) - 1 # 0.652ms def handle_bit(self, tick): ret = None if tick in range(self.dazero - self.margin, self.dazero + self.margin): ret = 0 elif tick in range(self.daone - self.margin, self.daone + self.margin): ret = 1 if ret in (0, 1): self.putb([0, ['%d' % ret]]) self.data |= (ret << self.count) # LSB-first self.count = self.count + 1 self.ss_bit = self.samplenum def data_ok(self): ret, name = (self.data >> 8) & (self.data & 0xff), self.state.title() if self.count == 8: if self.state == 'ADDRESS': self.addr = self.data if self.state == 'COMMAND': self.cmd = self.data self.putd(self.data) self.ss_start = self.samplenum return True if ret == 0: self.putd(self.data >> 8) else: self.putx([12, ['%s error: 0x%04X' % (name, self.data)]]) self.data = self.count = 0 self.ss_bit = self.ss_start = self.samplenum return ret == 0 def decode(self): if not self.samplerate: raise SamplerateError('Cannot decode without samplerate.') while True: # Wait for any edge (rising or falling). (self.ir,) = self.wait({0: 'e'}) if self.ir != self.active: # Save the non-active edge, then wait for the next edge. self.ss_other_edge = self.samplenum continue b = self.samplenum - self.ss_bit # State machine. if self.state == 'IDLE': if b in range(self.lc - self.margin, self.lc + self.margin): self.putpause('Long') self.putx([5, ['Leader code', 'Leader', 'LC', 'L']]) self.ss_remote = self.ss_start self.data = self.count = 0 self.state = 'ADDRESS' elif b in range(self.rc - self.margin, self.rc + self.margin): self.putpause('Short') self.putstop(self.samplenum) self.samplenum += self.stop self.putx([10, ['Repeat code', 'Repeat', 'RC', 'R']]) self.data = self.count = 0 self.ss_bit = self.ss_start = self.samplenum elif self.state == 'ADDRESS': self.handle_bit(b) if self.count == 8: self.state = 'ADDRESS#' if self.data_ok() else 'IDLE' elif self.state == 'ADDRESS#': self.handle_bit(b) if self.count == 16: self.state = 'COMMAND' if self.data_ok() else 'IDLE' elif self.state == 'COMMAND': self.handle_bit(b) if self.count == 8: self.state = 'COMMAND#' if self.data_ok() else 'IDLE' elif self.state == 'COMMAND#': self.handle_bit(b) if self.count == 16: self.state = 'STOP' if self.data_ok() else 'IDLE' elif self.state == 'STOP': self.putstop(self.ss_bit) self.putremote() self.ss_bit = self.ss_start = self.samplenum self.state = 'IDLE' libsigrokdecode-0.5.0/decoders/ir_nec/__init__.py0000644000175000017500000000153613117367246016745 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Gump Yang ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ''' NEC is a pulse-distance based infrared remote control protocol. ''' from .pd import Decoder libsigrokdecode-0.5.0/decoders/ir_nec/lists.py0000644000175000017500000000267713117367246016353 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## # Addresses/devices. Items that are not listed are reserved/unknown. address = { 0x40: 'Matsui TV', } digits = { 0: ['0', '0'], 1: ['1', '1'], 2: ['2', '2'], 3: ['3', '3'], 4: ['4', '4'], 5: ['5', '5'], 6: ['6', '6'], 7: ['7', '7'], 8: ['8', '8'], 9: ['9', '9'], } # Commands. Items that are not listed are reserved/unknown. command = { 0x40: dict(list(digits.items()) + list({ 11: ['-/--', '-/--'], 16: ['Mute', 'M'], 18: ['Standby', 'StBy'], 26: ['Volume up', 'Vol+'], 27: ['Program up', 'P+'], 30: ['Volume down', 'Vol-'], 31: ['Program down', 'P-'], 68: ['AV', 'AV'], }.items())), } libsigrokdecode-0.5.0/m4/0000755000175000017500000000000013117367246012200 500000000000000libsigrokdecode-0.5.0/m4/ltversion.m40000644000175000017500000000127313117366270014406 00000000000000# ltversion.m4 -- version numbers -*- Autoconf -*- # # Copyright (C) 2004, 2011-2015 Free Software Foundation, Inc. # Written by Scott James Remnant, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # @configure_input@ # serial 4179 ltversion.m4 # This file is part of GNU Libtool m4_define([LT_PACKAGE_VERSION], [2.4.6]) m4_define([LT_PACKAGE_REVISION], [2.4.6]) AC_DEFUN([LTVERSION_VERSION], [macro_version='2.4.6' macro_revision='2.4.6' _LT_DECL(, macro_version, 0, [Which release of libtool.m4 was used?]) _LT_DECL(, macro_revision, 0) ]) libsigrokdecode-0.5.0/m4/libtool.m40000644000175000017500000112617113117366270014033 00000000000000# libtool.m4 - Configure libtool for the host system. -*-Autoconf-*- # # Copyright (C) 1996-2001, 2003-2015 Free Software Foundation, Inc. # Written by Gordon Matzigkeit, 1996 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. m4_define([_LT_COPYING], [dnl # Copyright (C) 2014 Free Software Foundation, Inc. # This is free software; see the source for copying conditions. There is NO # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. # GNU Libtool is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of of the License, or # (at your option) any later version. # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program or library that is built # using GNU Libtool, you may include this file under the same # distribution terms that you use for the rest of that program. # # GNU Libtool is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . ]) # serial 58 LT_INIT # LT_PREREQ(VERSION) # ------------------ # Complain and exit if this libtool version is less that VERSION. m4_defun([LT_PREREQ], [m4_if(m4_version_compare(m4_defn([LT_PACKAGE_VERSION]), [$1]), -1, [m4_default([$3], [m4_fatal([Libtool version $1 or higher is required], 63)])], [$2])]) # _LT_CHECK_BUILDDIR # ------------------ # Complain if the absolute build directory name contains unusual characters m4_defun([_LT_CHECK_BUILDDIR], [case `pwd` in *\ * | *\ *) AC_MSG_WARN([Libtool does not cope well with whitespace in `pwd`]) ;; esac ]) # LT_INIT([OPTIONS]) # ------------------ AC_DEFUN([LT_INIT], [AC_PREREQ([2.62])dnl We use AC_PATH_PROGS_FEATURE_CHECK AC_REQUIRE([AC_CONFIG_AUX_DIR_DEFAULT])dnl AC_BEFORE([$0], [LT_LANG])dnl AC_BEFORE([$0], [LT_OUTPUT])dnl AC_BEFORE([$0], [LTDL_INIT])dnl m4_require([_LT_CHECK_BUILDDIR])dnl dnl Autoconf doesn't catch unexpanded LT_ macros by default: m4_pattern_forbid([^_?LT_[A-Z_]+$])dnl m4_pattern_allow([^(_LT_EOF|LT_DLGLOBAL|LT_DLLAZY_OR_NOW|LT_MULTI_MODULE)$])dnl dnl aclocal doesn't pull ltoptions.m4, ltsugar.m4, or ltversion.m4 dnl unless we require an AC_DEFUNed macro: AC_REQUIRE([LTOPTIONS_VERSION])dnl AC_REQUIRE([LTSUGAR_VERSION])dnl AC_REQUIRE([LTVERSION_VERSION])dnl AC_REQUIRE([LTOBSOLETE_VERSION])dnl m4_require([_LT_PROG_LTMAIN])dnl _LT_SHELL_INIT([SHELL=${CONFIG_SHELL-/bin/sh}]) dnl Parse OPTIONS _LT_SET_OPTIONS([$0], [$1]) # This can be used to rebuild libtool when needed LIBTOOL_DEPS=$ltmain # Always use our own libtool. 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cat conftest.err >&AS_MESSAGE_LOG_FD echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then $2=yes fi fi $RM conftest* ]) if test yes = "[$]$2"; then m4_if([$5], , :, [$5]) else m4_if([$6], , :, [$6]) fi ])# _LT_COMPILER_OPTION # Old name: AU_ALIAS([AC_LIBTOOL_COMPILER_OPTION], [_LT_COMPILER_OPTION]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_COMPILER_OPTION], []) # _LT_LINKER_OPTION(MESSAGE, VARIABLE-NAME, FLAGS, # [ACTION-SUCCESS], [ACTION-FAILURE]) # ---------------------------------------------------- # Check whether the given linker option works AC_DEFUN([_LT_LINKER_OPTION], [m4_require([_LT_FILEUTILS_DEFAULTS])dnl m4_require([_LT_DECL_SED])dnl AC_CACHE_CHECK([$1], [$2], [$2=no save_LDFLAGS=$LDFLAGS LDFLAGS="$LDFLAGS $3" echo "$lt_simple_link_test_code" > conftest.$ac_ext if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then # The linker can only warn and ignore the option if not recognized # So say no if there are warnings if test -s conftest.err; then # Append any errors to the config.log. cat conftest.err 1>&AS_MESSAGE_LOG_FD $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 if diff conftest.exp conftest.er2 >/dev/null; then $2=yes fi else $2=yes fi fi $RM -r conftest* LDFLAGS=$save_LDFLAGS ]) if test yes = "[$]$2"; then m4_if([$4], , :, [$4]) else m4_if([$5], , :, [$5]) fi ])# _LT_LINKER_OPTION # Old name: AU_ALIAS([AC_LIBTOOL_LINKER_OPTION], [_LT_LINKER_OPTION]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_LINKER_OPTION], []) # LT_CMD_MAX_LEN #--------------- AC_DEFUN([LT_CMD_MAX_LEN], [AC_REQUIRE([AC_CANONICAL_HOST])dnl # find the maximum length of command line arguments AC_MSG_CHECKING([the maximum length of command line arguments]) AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [dnl i=0 teststring=ABCD case $build_os in msdosdjgpp*) # On DJGPP, this test can blow up pretty badly due to problems in libc # (any single argument exceeding 2000 bytes causes a buffer overrun # during glob expansion). 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It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[[ ]]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test X`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test 17 != "$i" # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac ]) if test -n "$lt_cv_sys_max_cmd_len"; then AC_MSG_RESULT($lt_cv_sys_max_cmd_len) else AC_MSG_RESULT(none) fi max_cmd_len=$lt_cv_sys_max_cmd_len _LT_DECL([], [max_cmd_len], [0], [What is the maximum length of a command?]) ])# LT_CMD_MAX_LEN # Old name: AU_ALIAS([AC_LIBTOOL_SYS_MAX_CMD_LEN], [LT_CMD_MAX_LEN]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_SYS_MAX_CMD_LEN], []) # _LT_HEADER_DLFCN # ---------------- m4_defun([_LT_HEADER_DLFCN], [AC_CHECK_HEADERS([dlfcn.h], [], [], [AC_INCLUDES_DEFAULT])dnl ])# _LT_HEADER_DLFCN # _LT_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, # ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) # ---------------------------------------------------------------- m4_defun([_LT_TRY_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test yes = "$cross_compiling"; then : [$4] else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF [#line $LINENO "configure" #include "confdefs.h" #if HAVE_DLFCN_H #include #endif #include #ifdef RTLD_GLOBAL # define LT_DLGLOBAL RTLD_GLOBAL #else # ifdef DL_GLOBAL # define LT_DLGLOBAL DL_GLOBAL # else # define LT_DLGLOBAL 0 # endif #endif /* We may have to define LT_DLLAZY_OR_NOW in the command line if we find out it does not work in some platform. */ #ifndef LT_DLLAZY_OR_NOW # ifdef RTLD_LAZY # define LT_DLLAZY_OR_NOW RTLD_LAZY # else # ifdef DL_LAZY # define LT_DLLAZY_OR_NOW DL_LAZY # else # ifdef RTLD_NOW # define LT_DLLAZY_OR_NOW RTLD_NOW # else # ifdef DL_NOW # define LT_DLLAZY_OR_NOW DL_NOW # else # define LT_DLLAZY_OR_NOW 0 # endif # endif # endif # endif #endif /* When -fvisibility=hidden is used, assume the code has been annotated correspondingly for the symbols needed. */ #if defined __GNUC__ && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) int fnord () __attribute__((visibility("default"))); #endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; }] _LT_EOF if AC_TRY_EVAL(ac_link) && test -s "conftest$ac_exeext" 2>/dev/null; then (./conftest; exit; ) >&AS_MESSAGE_LOG_FD 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) $1 ;; x$lt_dlneed_uscore) $2 ;; x$lt_dlunknown|x*) $3 ;; esac else : # compilation failed $3 fi fi rm -fr conftest* ])# _LT_TRY_DLOPEN_SELF # LT_SYS_DLOPEN_SELF # ------------------ AC_DEFUN([LT_SYS_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test yes != "$enable_dlopen"; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen=load_add_on lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; mingw* | pw32* | cegcc*) lt_cv_dlopen=LoadLibrary lt_cv_dlopen_libs= ;; cygwin*) lt_cv_dlopen=dlopen lt_cv_dlopen_libs= ;; darwin*) # if libdl is installed we need to link against it AC_CHECK_LIB([dl], [dlopen], [lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl],[ lt_cv_dlopen=dyld lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ]) ;; tpf*) # Don't try to run any link tests for TPF. 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then # We can hardcode non-existent directories. if test no != "$_LT_TAGVAR(hardcode_direct, $1)" && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library # when we should be linking with a yet-to-be-installed one ## test no != "$_LT_TAGVAR(hardcode_shlibpath_var, $1)" && test no != "$_LT_TAGVAR(hardcode_minus_L, $1)"; then # Linking always hardcodes the temporary library directory. _LT_TAGVAR(hardcode_action, $1)=relink else # We can link without hardcoding, and we can hardcode nonexisting dirs. _LT_TAGVAR(hardcode_action, $1)=immediate fi else # We cannot hardcode anything, or else we can only hardcode existing # directories. _LT_TAGVAR(hardcode_action, $1)=unsupported fi AC_MSG_RESULT([$_LT_TAGVAR(hardcode_action, $1)]) if test relink = "$_LT_TAGVAR(hardcode_action, $1)" || test yes = "$_LT_TAGVAR(inherit_rpath, $1)"; then # Fast installation is not supported enable_fast_install=no elif test yes = "$shlibpath_overrides_runpath" || test no = "$enable_shared"; then # Fast installation is not necessary enable_fast_install=needless fi _LT_TAGDECL([], [hardcode_action], [0], [How to hardcode a shared library path into an executable]) ])# _LT_LINKER_HARDCODE_LIBPATH # _LT_CMD_STRIPLIB # ---------------- m4_defun([_LT_CMD_STRIPLIB], [m4_require([_LT_DECL_EGREP]) striplib= old_striplib= AC_MSG_CHECKING([whether stripping libraries is possible]) if test -n "$STRIP" && $STRIP -V 2>&1 | $GREP "GNU strip" >/dev/null; then test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" test -z "$striplib" && striplib="$STRIP --strip-unneeded" AC_MSG_RESULT([yes]) else # FIXME - insert some real tests, host_os isn't really good enough case $host_os in darwin*) if test -n "$STRIP"; then striplib="$STRIP -x" old_striplib="$STRIP -S" AC_MSG_RESULT([yes]) else AC_MSG_RESULT([no]) fi ;; *) AC_MSG_RESULT([no]) ;; esac fi _LT_DECL([], [old_striplib], [1], [Commands to strip libraries]) _LT_DECL([], [striplib], [1]) ])# _LT_CMD_STRIPLIB # _LT_PREPARE_MUNGE_PATH_LIST # --------------------------- # Make sure func_munge_path_list() is defined correctly. m4_defun([_LT_PREPARE_MUNGE_PATH_LIST], [[# func_munge_path_list VARIABLE PATH # ----------------------------------- # VARIABLE is name of variable containing _space_ separated list of # directories to be munged by the contents of PATH, which is string # having a format: # "DIR[:DIR]:" # string "DIR[ DIR]" will be prepended to VARIABLE # ":DIR[:DIR]" # string "DIR[ DIR]" will be appended to VARIABLE # "DIRP[:DIRP]::[DIRA:]DIRA" # string "DIRP[ DIRP]" will be prepended to VARIABLE and string # "DIRA[ DIRA]" will be appended to VARIABLE # "DIR[:DIR]" # VARIABLE will be replaced by "DIR[ DIR]" func_munge_path_list () { case x@S|@2 in x) ;; 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esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[[3-9]]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test yes = "$lt_cv_prog_gnu_ld"; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$release$shared_ext $libname$shared_ext' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib$libsuff /lib$libsuff /usr/local/lib$libsuff" sys_lib_dlsearch_path_spec="/usr/lib$libsuff /lib$libsuff" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; linux*android*) version_type=none # Android doesn't support versioned libraries. need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext' soname_spec='$libname$release$shared_ext' finish_cmds= shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes dynamic_linker='Android linker' # Don't embed -rpath directories since the linker doesn't support them. _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' ;; 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then case $cc_basename in nvcc*) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -Xcompiler -fno-builtin' ;; *) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' ;; esac _LT_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions], lt_cv_prog_compiler_rtti_exceptions, [-fno-rtti -fno-exceptions], [], [_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)="$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) -fno-rtti -fno-exceptions"]) fi _LT_TAGDECL([no_builtin_flag], [lt_prog_compiler_no_builtin_flag], [1], [Compiler flag to turn off builtin functions]) ])# _LT_COMPILER_NO_RTTI # _LT_CMD_GLOBAL_SYMBOLS # ---------------------- m4_defun([_LT_CMD_GLOBAL_SYMBOLS], [AC_REQUIRE([AC_CANONICAL_HOST])dnl AC_REQUIRE([AC_PROG_CC])dnl AC_REQUIRE([AC_PROG_AWK])dnl AC_REQUIRE([LT_PATH_NM])dnl AC_REQUIRE([LT_PATH_LD])dnl m4_require([_LT_DECL_SED])dnl m4_require([_LT_DECL_EGREP])dnl m4_require([_LT_TAG_COMPILER])dnl # Check for command to grab the raw symbol name followed by C symbol from nm. AC_MSG_CHECKING([command to parse $NM output from $compiler object]) AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [ # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[[BCDEGRST]]' # Regexp to match symbols that can be accessed directly from C. sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[[BCDT]]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[[ABCDGISTW]]' ;; hpux*) if test ia64 = "$host_cpu"; then symcode='[[ABCDEGRST]]' fi ;; irix* | nonstopux*) symcode='[[BCDEGRST]]' ;; osf*) symcode='[[BCDEGQRST]]' ;; solaris*) symcode='[[BDRT]]' ;; sco3.2v5*) symcode='[[DT]]' ;; sysv4.2uw2*) symcode='[[DT]]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[[ABDT]]' ;; sysv4) symcode='[[DFNSTU]]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[[ABCDGIRSTW]]' ;; esac if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Gets list of data symbols to import. lt_cv_sys_global_symbol_to_import="sed -n -e 's/^I .* \(.*\)$/\1/p'" # Adjust the below global symbol transforms to fixup imported variables. lt_cdecl_hook=" -e 's/^I .* \(.*\)$/extern __declspec(dllimport) char \1;/p'" lt_c_name_hook=" -e 's/^I .* \(.*\)$/ {\"\1\", (void *) 0},/p'" lt_c_name_lib_hook="\ -e 's/^I .* \(lib.*\)$/ {\"\1\", (void *) 0},/p'\ -e 's/^I .* \(.*\)$/ {\"lib\1\", (void *) 0},/p'" else # Disable hooks by default. lt_cv_sys_global_symbol_to_import= lt_cdecl_hook= lt_c_name_hook= lt_c_name_lib_hook= fi # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n"\ $lt_cdecl_hook\ " -e 's/^T .* \(.*\)$/extern int \1();/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n"\ $lt_c_name_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/p'" # Transform an extracted symbol line into symbol name with lib prefix and # symbol address. lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n"\ $lt_c_name_lib_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(lib.*\)$/ {\"\1\", (void *) \&\1},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"lib\1\", (void *) \&\1},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function, # D for any global variable and I for any imported variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK ['"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " /^ *Symbol name *: /{split(\$ 0,sn,\":\"); si=substr(sn[2],2)};"\ " /^ *Type *: code/{print \"T\",si,substr(si,length(prfx))};"\ " /^ *Type *: data/{print \"I\",si,substr(si,length(prfx))};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=\"D\"}; \$ 0~/\(\).*\|/{f=\"T\"};"\ " {split(\$ 0,a,/\||\r/); split(a[2],s)};"\ " s[1]~/^[@?]/{print f,s[1],s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print f,t[1],substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx]" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if AC_TRY_EVAL(ac_compile); then # Now try to grab the symbols. nlist=conftest.nm if AC_TRY_EVAL(NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT@&t@_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT@&t@_DLSYM_CONST #else # define LT@&t@_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT@&t@_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[[]] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS=conftstm.$ac_objext CFLAGS="$CFLAGS$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)" if AC_TRY_EVAL(ac_link) && test -s conftest$ac_exeext; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot find nm_test_var in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AS_MESSAGE_LOG_FD fi else echo "$progname: failed program was:" >&AS_MESSAGE_LOG_FD cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test yes = "$pipe_works"; then break else lt_cv_sys_global_symbol_pipe= fi done ]) if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then AC_MSG_RESULT(failed) else AC_MSG_RESULT(ok) fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[[@]]FILE' >/dev/null; then nm_file_list_spec='@' fi _LT_DECL([global_symbol_pipe], [lt_cv_sys_global_symbol_pipe], [1], [Take the output of nm and produce a listing of raw symbols and C names]) _LT_DECL([global_symbol_to_cdecl], [lt_cv_sys_global_symbol_to_cdecl], [1], [Transform the output of nm in a proper C declaration]) _LT_DECL([global_symbol_to_import], [lt_cv_sys_global_symbol_to_import], [1], [Transform the output of nm into a list of symbols to manually relocate]) _LT_DECL([global_symbol_to_c_name_address], [lt_cv_sys_global_symbol_to_c_name_address], [1], [Transform the output of nm in a C name address pair]) _LT_DECL([global_symbol_to_c_name_address_lib_prefix], [lt_cv_sys_global_symbol_to_c_name_address_lib_prefix], [1], [Transform the output of nm in a C name address pair when lib prefix is needed]) _LT_DECL([nm_interface], [lt_cv_nm_interface], [1], [The name lister interface]) _LT_DECL([], [nm_file_list_spec], [1], [Specify filename containing input files for $NM]) ]) # _LT_CMD_GLOBAL_SYMBOLS # _LT_COMPILER_PIC([TAGNAME]) # --------------------------- m4_defun([_LT_COMPILER_PIC], [m4_require([_LT_TAG_COMPILER])dnl _LT_TAGVAR(lt_prog_compiler_wl, $1)= _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)= m4_if([$1], [CXX], [ # C++ specific cases for pic, static, wl, etc. if test yes = "$GXX"; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the '-m68020' flag to GCC prevents building anything better, # like '-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; *djgpp*) # DJGPP does not support shared libraries at all _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac else case $host_os in aix[[4-9]]*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; chorus*) case $cc_basename in cxch68*) # Green Hills C++ Compiler # _LT_TAGVAR(lt_prog_compiler_static, $1)="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a" ;; esac ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; dgux*) case $cc_basename in ec++*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; ghcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; freebsd* | dragonfly*) # FreeBSD uses GNU C++ ;; hpux9* | hpux10* | hpux11*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' if test ia64 != "$host_cpu"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' fi ;; aCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac ;; *) ;; esac ;; interix*) # This is c89, which is MS Visual C++ (no shared libs) # Anyone wants to do a port? ;; irix5* | irix6* | nonstopux*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' # CC pic flag -KPIC is the default. ;; *) ;; esac ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in KCC*) # KAI C++ Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; ecpc* ) # old Intel C++ for x86_64, which still supported -KPIC. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; icpc* ) # Intel C++, used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgCC* | pgcpp*) # Portland Group C++ compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; cxx*) # Compaq C++ # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xlc* | xlC* | bgxl[[cC]]* | mpixl[[cC]]*) # IBM XL 8.0, 9.0 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; esac ;; esac ;; lynxos*) ;; m88k*) ;; mvs*) case $cc_basename in cxx*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-W c,exportall' ;; *) ;; esac ;; netbsd* | netbsdelf*-gnu) ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) case $cc_basename in KCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' ;; RCC*) # Rational C++ 2.4.1 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; cxx*) # Digital/Compaq C++ _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; *) ;; esac ;; psos*) ;; solaris*) case $cc_basename in CC* | sunCC*) # Sun C++ 4.2, 5.x and Centerline C++ _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; gcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' ;; *) ;; esac ;; sunos4*) case $cc_basename in CC*) # Sun C++ 4.x _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; lcc*) # Lucid _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; tandem*) case $cc_basename in NCC*) # NonStop-UX NCC 3.20 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; *) ;; esac ;; vxworks*) ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ], [ if test yes = "$GCC"; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the '-m68020' flag to GCC prevents building anything better, # like '-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; msdosdjgpp*) # Just because we use GCC doesn't mean we suddenly get shared libraries # on systems that don't support them. _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no enable_shared=no ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac case $cc_basename in nvcc*) # Cuda Compiler Driver 2.2 _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Xlinker ' if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)="-Xcompiler $_LT_TAGVAR(lt_prog_compiler_pic, $1)" fi ;; esac else # PORTME Check for flag to pass linker flags through the system compiler. case $host_os in aix*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' case $cc_basename in nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; hpux9* | hpux10* | hpux11*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but # not for PA HP-UX. case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac # Is there a better lt_prog_compiler_static that works with the bundled CC? _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' ;; irix5* | irix6* | nonstopux*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC (with -KPIC) is the default. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in # old Intel for x86_64, which still supported -KPIC. ecc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # icc used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. icc* | ifort*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # Lahey Fortran 8.1. lf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='--shared' _LT_TAGVAR(lt_prog_compiler_static, $1)='--static' ;; nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; tcc*) # Fabrice Bellard et al's Tiny C Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*) # Portland Group compilers (*not* the Pentium gcc compiler, # which looks to be a dead project) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; ccc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All Alpha code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xl* | bgxl* | bgf* | mpixl*) # IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ Ceres\ Fortran* | *Sun*Fortran*\ [[1-7]].* | *Sun*Fortran*\ 8.[[0-3]]*) # Sun Fortran 8.3 passes all unrecognized flags to the linker _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='' ;; *Sun\ F* | *Sun*Fortran*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; *Sun\ C*) # Sun C 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' ;; *Intel*\ [[CF]]*Compiler*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; *Portland\ Group*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; esac ;; newsos6) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All OSF/1 code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; rdos*) _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; solaris*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' case $cc_basename in f77* | f90* | f95* | sunf77* | sunf90* | sunf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ';; *) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,';; esac ;; sunos4*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; sysv4 | sysv4.2uw2* | sysv4.3*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)='-Kconform_pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; unicos*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; uts4*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ]) case $host_os in # For platforms that do not support PIC, -DPIC is meaningless: *djgpp*) _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])" ;; esac AC_CACHE_CHECK([for $compiler option to produce PIC], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_prog_compiler_pic, $1)]) _LT_TAGVAR(lt_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_cv_prog_compiler_pic, $1) # # Check to make sure the PIC flag actually works. # if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; 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solaris*) _LT_TAGVAR(no_undefined_flag, $1)=' -z defs' if test yes = "$GCC"; then wlarc='$wl' _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $wl-z ${wl}text $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -shared $pic_flag $wl-z ${wl}text $wl-M $wl$lib.exp $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' else case `$CC -V 2>&1` in *"Compilers 5.0"*) wlarc='' _LT_TAGVAR(archive_cmds, $1)='$LD -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $linker_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $LD -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' ;; *) wlarc='$wl' _LT_TAGVAR(archive_cmds, $1)='$CC -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' ;; esac fi _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' _LT_TAGVAR(hardcode_shlibpath_var, $1)=no case $host_os in solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; *) # The compiler driver will combine and reorder linker options, # but understands '-z linker_flag'. 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(KAI) C++ Compiler # KCC will only create a shared library if the output file # ends with ".so" (or ".sl" for HP-UX), so rename the library # to its proper name (with version) after linking. _LT_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\$tempext\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\$tempext\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib $wl-retain-symbols-file,$export_symbols; mv \$templib $lib' # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list= ; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' # Archives containing C++ object files must be created using # "CC -Bstatic", where "CC" is the KAI C++ compiler. _LT_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs' ;; icpc* | ecpc* ) # Intel C++ with_gnu_ld=yes # version 8.0 and above of icpc choke on multiply defined symbols # if we add $predep_objects and $postdep_objects, however 7.1 and # earlier do not add the objects themselves. case `$CC -V 2>&1` in *"Version 7."*) _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 8.0 or newer tmp_idyn= case $host_cpu in ia64*) tmp_idyn=' -i_dynamic';; esac _LT_TAGVAR(archive_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(archive_cmds_need_lc, $1)=no _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive$convenience $wl--no-whole-archive' ;; pgCC* | pgcpp*) # Portland Group C++ compiler case `$CC -V` in *pgCC\ [[1-5]].* | *pgcpp\ [[1-5]].*) _LT_TAGVAR(prelink_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $objs $libobjs $compile_deplibs~ compile_command="$compile_command `find $tpldir -name \*.o | sort | $NL2SP`"' _LT_TAGVAR(old_archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $oldobjs$old_deplibs~ $AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | sort | $NL2SP`~ $RANLIB $oldlib' _LT_TAGVAR(archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 6 and above use weak symbols _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl--rpath $wl$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' ;; cxx*) # Compaq C++ _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib $wl-retain-symbols-file $wl$export_symbols' runpath_var=LD_RUN_PATH _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' _LT_TAGVAR(hardcode_libdir_separator, $1)=: # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; 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See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . ## #serial 20150910 ## SR_APPEND(var-name, [list-sep,] element) ## ## Append the shell word to the shell variable named , ## prefixed by unless the list was empty before appending. If ## only two arguments are supplied, defaults to a single space ## character. ## AC_DEFUN([SR_APPEND], [dnl m4_assert([$# >= 2])[]dnl $1=[$]{$1[}]m4_if([$#], [2], [[$]{$1:+' '}$2], [[$]{$1:+$2}$3])[]dnl ]) ## SR_PREPEND(var-name, [list-sep,] element) ## ## Prepend the shell word to the shell variable named , ## suffixed by unless the list was empty before prepending. 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AS_IF([test -n "$sr_git_deps"], [SR_APPEND([CONFIG_STATUS_DEPENDENCIES], ["\$(wildcard$sr_git_deps)"])]) AC_SUBST([CONFIG_STATUS_DEPENDENCIES])[]dnl AC_SUBST([$1])[]dnl dnl AC_DEFINE([$1_MAJOR], [$5], [Major version number of $2.])[]dnl AC_DEFINE([$1_MINOR], [$6], [Minor version number of $2.])[]dnl m4_ifval([$7], [AC_DEFINE([$1_MICRO], [$7], [Micro version number of $2.])])[]dnl AC_DEFINE_UNQUOTED([$1_STRING], ["[$]$1"], [Version of $2.])[]dnl ]) ## SR_PKG_VERSION_SET(var-prefix, version-triple) ## ## Set up substitution variables and macro definitions for the package ## version components. Derive the version suffix from the repository ## revision if possible. ## ## Substitutions: ## Macro defines: _{MAJOR,MINOR,MICRO,STRING} ## AC_DEFUN([SR_PKG_VERSION_SET], [dnl m4_assert([$# >= 2])[]dnl _SR_PKG_VERSION_SET([$1], m4_defn([AC_PACKAGE_NAME]), m4_defn([AC_PACKAGE_TARNAME])[-], m4_expand([$2]), m4_unquote(m4_split(m4_expand([$2]), [\.]))) ]) ## _SR_LIB_VERSION_SET(var-prefix, pkg-name, abi-triple, current, revision, age) ## m4_define([_SR_LIB_VERSION_SET], [dnl m4_assert([$# >= 6])[]dnl $1=$3 AC_SUBST([$1])[]dnl AC_DEFINE([$1_CURRENT], [$4], [Binary version of $2.])[]dnl AC_DEFINE([$1_REVISION], [$5], [Binary revision of $2.])[]dnl AC_DEFINE([$1_AGE], [$6], [Binary age of $2.])[]dnl AC_DEFINE([$1_STRING], ["$3"], [Binary version triple of $2.])[]dnl ]) ## SR_LIB_VERSION_SET(var-prefix, abi-triple) ## ## Set up substitution variables and macro definitions for a library ## binary version. ## ## Substitutions: ## Macro defines: _{CURRENT,REVISION,AGE,STRING} ## AC_DEFUN([SR_LIB_VERSION_SET], [dnl m4_assert([$# >= 1])[]dnl _SR_LIB_VERSION_SET([$1], m4_defn([AC_PACKAGE_NAME]), [$2], m4_unquote(m4_split([$2], [:]))) ]) ## SR_SEARCH_LIBS(libs-var, function, search-libs, ## [action-if-found], [action-if-not-found], [other-libs]) ## ## Same as AC_SEARCH_LIBS, except that the result is prepended ## to instead of LIBS. Calls AC_SUBST on . ## AC_DEFUN([SR_SEARCH_LIBS], [dnl m4_assert([$# >= 3])[]dnl sr_sl_save_LIBS=$LIBS AC_SEARCH_LIBS([$2], [$3],,, m4_join([$6], [[$]$1])) LIBS=$sr_sl_save_LIBS AS_CASE([$ac_cv_search_$2], [no*],, [SR_PREPEND([$1], [$ac_cv_search_$2])]) m4_ifvaln([$4$5], [AS_IF([test "x$ac_cv_search_$2" = xno], [$5], [$4])])[]dnl AC_SUBST([$1])[]dnl ]) ## _SR_VAR_SUMMARY(tag, var-name, line-leader, align-columns, align-char) ## m4_define([_SR_VAR_SUMMARY], [dnl $2= $1_append() { sr_aligned=`printf '%.$4s' "[$][1]m4_for([i], [1], [$4],, [$5])"` $2="[$]{$2}$3$sr_aligned [$]2"' ' } ]) ## SR_VAR_SUMMARY(tag, [var-name = ], ## [line-leader = [ - ]], [align-columns = 32], [align-char = .]) ## ## Define a shell function _append() to be used for aggregating ## a summary of test results in the shell variable . ## AC_DEFUN([SR_VAR_SUMMARY], [dnl m4_assert([$# >= 1])[]dnl _SR_VAR_SUMMARY([$1], m4_default_quoted([$2], [$1]), m4_default_quoted([$3], [ - ]), m4_default_quoted([$4], [32]), m4_default_quoted([$5], [.]))[]dnl ]) ## SR_PKG_CHECK_SUMMARY([var-name = sr_pkg_check_summary], ## [line-leader = [ - ]], [align-columns = 32], [align-char = .]) ## ## Prepare for the aggregation of package check results ## in the shell variable . ## AC_DEFUN([SR_PKG_CHECK_SUMMARY], [SR_VAR_SUMMARY([sr_pkg_check_summary], $@)]) ## SR_PKG_CHECK(tag, [collect-var], module...) ## ## Check for each pkg-config in the argument list. may ## include a version constraint. ## ## Output variables: sr_have_, sr__version ## AC_DEFUN([SR_PKG_CHECK], [dnl m4_assert([$# >= 3])[]dnl AC_REQUIRE([PKG_PROG_PKG_CONFIG])[]dnl AC_REQUIRE([SR_PKG_CHECK_SUMMARY])[]dnl dnl PKG_CHECK_EXISTS([$3], [dnl sr_have_$1=yes m4_ifval([$2], [SR_APPEND([$2], ["$3"]) ])sr_$1_version=`$PKG_CONFIG --modversion "$3" 2>&AS_MESSAGE_LOG_FD` sr_pkg_check_summary_append "$3" "$sr_$1_version"[]dnl ], [dnl sr_pkg_check_summary_append "$3" no m4_ifval([$4], [SR_PKG_CHECK([$1], [$2], m4_shift3($@))], [sr_have_$1=no sr_$1_version=])[]dnl ]) ]) ## SR_VAR_OPT_PKG([modules-var], [features-var]) ## ## Enable the collection of SR_ARG_OPT_PKG results into the shell variables ## and . ## AC_DEFUN([SR_VAR_OPT_PKG], [dnl m4_define([_SR_VAR_OPT_PKG_MODULES], [$1])[]dnl m4_define([_SR_VAR_OPT_PKG_FEATURES], [$2])[]dnl m4_ifvaln([$1], [$1=])[]dnl m4_ifvaln([$2], [$2=])[]dnl ]) ## _SR_ARG_OPT_IMPL(sh-name, [features-var], opt-name, ## [cpp-name], [cond-name], check-commands) ## m4_define([_SR_ARG_OPT_IMPL], [dnl AC_ARG_WITH([$3], [AS_HELP_STRING([--without-$3], [disable $3 support [default=detect]])]) AS_IF([test "x$with_$1" = xno], [sr_have_$1=no], [test "x$sr_have_$1" != xyes], [dnl AC_MSG_CHECKING([for $3]) $6 AC_MSG_RESULT([$sr_have_$1])[]dnl ]) AS_IF([test "x$with_$1$sr_have_$1" = xyesno], [AC_MSG_ERROR([$3 support requested, but it was not found.])]) AS_IF([test "x$sr_have_$1" = xyes], [m4_ifval([$2], [ SR_APPEND([$2], ["$3"])])[]m4_ifval([$4], [ AC_DEFINE([HAVE_$4], [1], [Whether $3 is available.])])[]dnl ]) m4_ifvaln([$5], [AM_CONDITIONAL([$5], [test "x$sr_have_$1" = xyes])])[]dnl ]) ## _SR_ARG_OPT_CHECK(sh-name, [features-var], opt-name, [cpp-name], ## [cond-name], check-commands, [summary-result]) ## m4_define([_SR_ARG_OPT_CHECK], [dnl _SR_ARG_OPT_IMPL($@) sr_pkg_check_summary_append "$3" m4_default([$7], ["$sr_have_$1"]) ]) ## SR_ARG_OPT_CHECK(opt-name, [cpp-name], [cond-name], check-commands, ## [summary-result = $sr_have_]) ## ## Provide a --without- configure option for explicit disabling ## of an optional dependency. If not disabled, the availability of the ## optional dependency is auto-detected by running . ## ## The should set the shell variable sr_have_ ## to "yes" if the dependency is available, otherwise to "no". Optionally, ## the argument may be used to generate a line in the ## configuration summary. If supplied, it should be a shell word which ## expands to the result to be displayed for the dependency. ## ## Use SR_VAR_OPT_PKG to generate lists of available modules and features. ## AC_DEFUN([SR_ARG_OPT_CHECK], [dnl m4_assert([$# >= 4])[]dnl AC_REQUIRE([SR_PKG_CHECK_SUMMARY])[]dnl AC_REQUIRE([SR_VAR_OPT_PKG])[]dnl dnl _SR_ARG_OPT_CHECK(m4_expand([AS_TR_SH([$1])]), m4_defn([_SR_VAR_OPT_PKG_FEATURES]), $@)[]dnl ]) ## _SR_ARG_OPT_PKG([features-var], [cond-name], opt-name, ## [cpp-name], sh-name, [modules-var], module...) ## m4_define([_SR_ARG_OPT_PKG], [dnl _SR_ARG_OPT_IMPL([$5], [$1], [$3], [$4], [$2], [SR_PKG_CHECK(m4_shiftn([4], $@))]) m4_ifvaln([$4], [AS_IF([test "x$sr_have_$5" = xyes], [AC_DEFINE_UNQUOTED([CONF_$4_VERSION], ["$sr_$5_version"], [Build-time version of $3.])])])[]dnl ]) ## SR_ARG_OPT_PKG(opt-name, [cpp-name], [cond-name], module...) ## ## Provide a --without- configure option for explicit disabling ## of an optional dependency. If not disabled, the availability of the ## optional dependency is auto-detected. ## ## Each pkg-config argument is checked in turn, and the first one ## found is selected. On success, the shell variable sr_have_ ## is set to "yes", otherwise to "no". Optionally, a preprocessor macro ## HAVE_ and an Automake conditional are generated. ## ## Use SR_VAR_OPT_PKG to generate lists of available modules and features. ## AC_DEFUN([SR_ARG_OPT_PKG], [dnl m4_assert([$# >= 4])[]dnl AC_REQUIRE([PKG_PROG_PKG_CONFIG])[]dnl AC_REQUIRE([SR_PKG_CHECK_SUMMARY])[]dnl AC_REQUIRE([SR_VAR_OPT_PKG])[]dnl dnl _SR_ARG_OPT_PKG(m4_defn([_SR_VAR_OPT_PKG_FEATURES]), [$3], [$1], [$2], m4_expand([AS_TR_SH([$1])]), m4_defn([_SR_VAR_OPT_PKG_MODULES]), m4_shift3($@))[]dnl ]) ## SR_PROG_VERSION(program, sh-var) ## ## Obtain the version of and store it in . ## AC_DEFUN([SR_PROG_VERSION], [dnl m4_assert([$# >= 2])[]dnl sr_prog_ver=`$1 --version 2>&AS_MESSAGE_LOG_FD | sed 1q 2>&AS_MESSAGE_LOG_FD` AS_CASE([[$]?:$sr_prog_ver], [[0:*[0-9].[0-9]*]], [$2=$sr_prog_ver], [$2=unknown])[]dnl ]) ## SR_PROG_MAKE_ORDER_ONLY ## ## Check whether the make program supports order-only prerequisites. ## If so, set the substitution variable ORDER to '|', or to the empty ## string otherwise. ## AC_DEFUN([SR_PROG_MAKE_ORDER_ONLY], [dnl AC_CACHE_CHECK([whether [$]{MAKE:-make} supports order-only prerequisites], [sr_cv_prog_make_order_only], [ cat >conftest.mk <<'_SREOF' a: b | c a b c: ; @: .PHONY: a b c _SREOF AS_IF([[$]{MAKE:-make} -f conftest.mk >&AS_MESSAGE_LOG_FD 2>&AS_MESSAGE_LOG_FD], [sr_cv_prog_make_order_only=yes], [sr_cv_prog_make_order_only=no]) rm -f conftest.mk ]) AS_IF([test "x$sr_cv_prog_make_order_only" = xyes], [ORDER='|'], [ORDER=]) AC_SUBST([ORDER]) AM_SUBST_NOTMAKE([ORDER])[]dnl ]) ## SR_CHECK_COMPILE_FLAGS(flags-var, description, flags) ## ## Find a compiler flag for . For each flag in , check ## if the compiler for the current language accepts it. On success, stop the ## search and append the last tested flag to . Calls AC_SUBST ## on . ## AC_DEFUN([SR_CHECK_COMPILE_FLAGS], [dnl m4_assert([$# >= 3])[]dnl AC_MSG_CHECKING([compiler flag for $2]) sr_ccf_result=no sr_ccf_save_CPPFLAGS=$CPPFLAGS for sr_flag in $3 do CPPFLAGS="$sr_ccf_save_CPPFLAGS $sr_flag" AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [])], [sr_ccf_result=$sr_flag]) test "x$sr_ccf_result" = xno || break done CPPFLAGS=$sr_ccf_save_CPPFLAGS AS_IF([test "x$sr_ccf_result" != xno], [SR_APPEND([$1], [$sr_ccf_result])]) AC_MSG_RESULT([$sr_ccf_result]) AC_SUBST([$1]) ]) ## _SR_ARG_ENABLE_WARNINGS_ONCE ## ## Implementation helper macro of SR_ARG_ENABLE_WARNINGS. Pulled in ## through AC_REQUIRE so that it is only expanded once. ## m4_define([_SR_ARG_ENABLE_WARNINGS_ONCE], [dnl AC_PROVIDE([$0])[]dnl AC_ARG_ENABLE([warnings], [AS_HELP_STRING([[--enable-warnings[=min|max|fatal|no]]], [set compile pedantry level [default=max]])], [sr_enable_warnings=$enableval], [sr_enable_warnings=max])[]dnl dnl # Test whether the compiler accepts each flag. Look at standard output, # since GCC only shows a warning message if an option is not supported. sr_check_compile_warning_flags() { for sr_flag do sr_cc_out=`$sr_cc $sr_warning_flags $sr_flag -c "$sr_conftest" 2>&1 || echo failed` AS_IF([test "$?$sr_cc_out" = 0], [SR_APPEND([sr_warning_flags], [$sr_flag])], [AS_ECHO(["$sr_cc: $sr_cc_out"]) >&AS_MESSAGE_LOG_FD]) rm -f "conftest.[$]{OBJEXT:-o}" done } ]) ## SR_ARG_ENABLE_WARNINGS(variable, min-flags, max-flags) ## ## Provide the --enable-warnings configure argument, set to "min" by default. ## and should be space-separated lists of compiler ## warning flags to use with --enable-warnings=min or --enable-warnings=max, ## respectively. Warning level "fatal" is the same as "max" but in addition ## enables -Werror mode. ## ## In order to determine the warning options to use with the C++ compiler, ## call AC_LANG([C++]) first to change the current language. If different ## output variables are used, it is also fine to call SR_ARG_ENABLE_WARNINGS ## repeatedly, once for each language setting. ## AC_DEFUN([SR_ARG_ENABLE_WARNINGS], [dnl m4_assert([$# >= 3])[]dnl AC_REQUIRE([_SR_ARG_ENABLE_WARNINGS_ONCE])[]dnl dnl AS_CASE([$ac_compile], [[*'$CXXFLAGS '*]], [sr_lang='C++' sr_cc=$CXX sr_conftest="conftest.[$]{ac_ext:-cc}"], [[*'$CFLAGS '*]], [sr_lang=C sr_cc=$CC sr_conftest="conftest.[$]{ac_ext:-c}"], [AC_MSG_ERROR([[current language is neither C nor C++]])]) dnl AC_MSG_CHECKING([which $sr_lang compiler warning flags to use]) sr_warning_flags= AC_LANG_CONFTEST([AC_LANG_SOURCE([[ int main(int argc, char** argv) { return (argv != 0) ? argc : 0; } ]])]) AS_CASE([$sr_enable_warnings], [no], [], [min], [sr_check_compile_warning_flags $2], [fatal], [sr_check_compile_warning_flags $3 -Werror], [sr_check_compile_warning_flags $3]) rm -f "$sr_conftest" AC_SUBST([$1], [$sr_warning_flags]) AC_MSG_RESULT([[$]{sr_warning_flags:-none}])[]dnl ]) libsigrokdecode-0.5.0/m4/lt~obsolete.m40000644000175000017500000001377413117366270014744 00000000000000# lt~obsolete.m4 -- aclocal satisfying obsolete definitions. -*-Autoconf-*- # # Copyright (C) 2004-2005, 2007, 2009, 2011-2015 Free Software # Foundation, Inc. # Written by Scott James Remnant, 2004. # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 5 lt~obsolete.m4 # These exist entirely to fool aclocal when bootstrapping libtool. # # In the past libtool.m4 has provided macros via AC_DEFUN (or AU_DEFUN), # which have later been changed to m4_define as they aren't part of the # exported API, or moved to Autoconf or Automake where they belong. # # The trouble is, aclocal is a bit thick. It'll see the old AC_DEFUN # in /usr/share/aclocal/libtool.m4 and remember it, then when it sees us # using a macro with the same name in our local m4/libtool.m4 it'll # pull the old libtool.m4 in (it doesn't see our shiny new m4_define # and doesn't know about Autoconf macros at all.) # # So we provide this file, which has a silly filename so it's always # included after everything else. This provides aclocal with the # AC_DEFUNs it wants, but when m4 processes it, it doesn't do anything # because those macros already exist, or will be overwritten later. # We use AC_DEFUN over AU_DEFUN for compatibility with aclocal-1.6. # # Anytime we withdraw an AC_DEFUN or AU_DEFUN, remember to add it here. # Yes, that means every name once taken will need to remain here until # we give up compatibility with versions before 1.7, at which point # we need to keep only those names which we still refer to. # This is to help aclocal find these macros, as it can't see m4_define. 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Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 8 ltoptions.m4 # This is to help aclocal find these macros, as it can't see m4_define. AC_DEFUN([LTOPTIONS_VERSION], [m4_if([1])]) # _LT_MANGLE_OPTION(MACRO-NAME, OPTION-NAME) # ------------------------------------------ m4_define([_LT_MANGLE_OPTION], [[_LT_OPTION_]m4_bpatsubst($1__$2, [[^a-zA-Z0-9_]], [_])]) # _LT_SET_OPTION(MACRO-NAME, OPTION-NAME) # --------------------------------------- # Set option OPTION-NAME for macro MACRO-NAME, and if there is a # matching handler defined, dispatch to it. Other OPTION-NAMEs are # saved as a flag. m4_define([_LT_SET_OPTION], [m4_define(_LT_MANGLE_OPTION([$1], [$2]))dnl m4_ifdef(_LT_MANGLE_DEFUN([$1], [$2]), _LT_MANGLE_DEFUN([$1], [$2]), [m4_warning([Unknown $1 option '$2'])])[]dnl ]) # _LT_IF_OPTION(MACRO-NAME, OPTION-NAME, IF-SET, [IF-NOT-SET]) # ------------------------------------------------------------ # Execute IF-SET if OPTION is set, IF-NOT-SET otherwise. m4_define([_LT_IF_OPTION], [m4_ifdef(_LT_MANGLE_OPTION([$1], [$2]), [$3], [$4])]) # _LT_UNLESS_OPTIONS(MACRO-NAME, OPTION-LIST, IF-NOT-SET) # ------------------------------------------------------- # Execute IF-NOT-SET unless all options in OPTION-LIST for MACRO-NAME # are set. m4_define([_LT_UNLESS_OPTIONS], [m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [m4_ifdef(_LT_MANGLE_OPTION([$1], _LT_Option), [m4_define([$0_found])])])[]dnl m4_ifdef([$0_found], [m4_undefine([$0_found])], [$3 ])[]dnl ]) # _LT_SET_OPTIONS(MACRO-NAME, OPTION-LIST) # ---------------------------------------- # OPTION-LIST is a space-separated list of Libtool options associated # with MACRO-NAME. If any OPTION has a matching handler declared with # LT_OPTION_DEFINE, dispatch to that macro; otherwise complain about # the unknown option and exit. m4_defun([_LT_SET_OPTIONS], [# Set options m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [_LT_SET_OPTION([$1], _LT_Option)]) m4_if([$1],[LT_INIT],[ dnl dnl Simply set some default values (i.e off) if boolean options were not dnl specified: _LT_UNLESS_OPTIONS([LT_INIT], [dlopen], [enable_dlopen=no ]) _LT_UNLESS_OPTIONS([LT_INIT], [win32-dll], [enable_win32_dll=no ]) dnl dnl If no reference was made to various pairs of opposing options, then dnl we run the default mode handler for the pair. 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Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 6 ltsugar.m4 # This is to help aclocal find these macros, as it can't see m4_define. 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See the GNU dnl General Public License for more details. dnl dnl You should have received a copy of the GNU General Public License dnl along with this program; if not, write to the Free Software dnl Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA dnl 02111-1307, USA. dnl dnl As a special exception to the GNU General Public License, if you dnl distribute this file as part of a program that contains a dnl configuration script generated by Autoconf, you may include it under dnl the same distribution terms that you use for the rest of that dnl program. dnl PKG_PREREQ(MIN-VERSION) dnl ----------------------- dnl Since: 0.29 dnl dnl Verify that the version of the pkg-config macros are at least dnl MIN-VERSION. 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We just wanted to have am__tar # and am__untar set. test -n "${am_cv_prog_tar_$1}" && break # tar/untar a dummy directory, and stop if the command works. rm -rf conftest.dir mkdir conftest.dir echo GrepMe > conftest.dir/file AM_RUN_LOG([tardir=conftest.dir && eval $am__tar_ >conftest.tar]) rm -rf conftest.dir if test -s conftest.tar; then AM_RUN_LOG([$am__untar /dev/null 2>&1 && break fi done rm -rf conftest.dir AC_CACHE_VAL([am_cv_prog_tar_$1], [am_cv_prog_tar_$1=$_am_tool]) AC_MSG_RESULT([$am_cv_prog_tar_$1])]) AC_SUBST([am__tar]) AC_SUBST([am__untar]) ]) # _AM_PROG_TAR m4_include([m4/libtool.m4]) m4_include([m4/ltoptions.m4]) m4_include([m4/ltsugar.m4]) m4_include([m4/ltversion.m4]) m4_include([m4/lt~obsolete.m4]) m4_include([m4/sigrok.m4]) libsigrokdecode-0.5.0/Makefile.am0000644000175000017500000000523713117366227013641 00000000000000## ## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2010 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, see . ## ACLOCAL_AMFLAGS = -I m4 AM_LIBTOOLFLAGS = --silent GNUMAKEFLAGS = --no-print-directory DECODERS_DIR = $(pkgdatadir)/decoders # Do not hard-code the decoders location on Windows. if WIN32 AM_CPPFLAGS = else AM_CPPFLAGS = -DDECODERS_DIR='"$(DECODERS_DIR)"' endif # The tests CFLAGS are a superset of the libsigrokdecode CFLAGS. AM_CFLAGS = $(SRD_EXTRA_CFLAGS) $(SRD_WFLAGS) $(TESTS_CFLAGS) lib_LTLIBRARIES = libsigrokdecode.la libsigrokdecode_la_SOURCES = \ srd.c \ session.c \ decoder.c \ instance.c \ log.c \ util.c \ exception.c \ module_sigrokdecode.c \ type_decoder.c \ type_logic.c \ error.c \ version.c libsigrokdecode_la_LIBADD = $(SRD_EXTRA_LIBS) $(LIBSIGROKDECODE_LIBS) libsigrokdecode_la_LDFLAGS = -version-info $(SRD_LIB_VERSION) -no-undefined pkginclude_HEADERS = libsigrokdecode.h nodist_pkginclude_HEADERS = version.h noinst_HEADERS = libsigrokdecode-internal.h pkgconfigdir = $(libdir)/pkgconfig pkgconfig_DATA = libsigrokdecode.pc EXTRA_DIST = Doxyfile HACKING contrib/sigrok-logo-notext.png if HAVE_CHECK TESTS = tests/main check_PROGRAMS = ${TESTS} endif tests_main_SOURCES = \ libsigrokdecode.h \ tests/lib.h \ tests/main.c \ tests/core.c \ tests/decoder.c \ tests/inst.c \ tests/session.c tests_main_CPPFLAGS = -DDECODERS_TESTDIR='"$(abs_top_srcdir)/decoders"' tests_main_LDADD = libsigrokdecode.la $(SRD_EXTRA_LIBS) $(TESTS_LIBS) MAINTAINERCLEANFILES = ChangeLog .PHONY: ChangeLog install-decoders ChangeLog: git --git-dir '$(top_srcdir)/.git' log >$@ || touch $@ dist-hook: ChangeLog $(MKDIR_P) $(distdir)/tools cp ${top_srcdir}/tools/install-decoders $(distdir)/tools $(MKDIR_P) $(distdir)/decoders ${top_srcdir}/tools/install-decoders -i ${top_srcdir}/decoders \ -o $(distdir)/decoders install-decoders: $(MKDIR_P) $(DESTDIR)$(DECODERS_DIR) $(PYTHON3) ${top_srcdir}/tools/install-decoders \ -i ${top_srcdir}/decoders -o $(DESTDIR)$(DECODERS_DIR) install-data-hook: install-decoders libsigrokdecode-0.5.0/HACKING0000644000175000017500000001702513117366227012572 00000000000000------------------------------------------------------------------------------- HACKING ------------------------------------------------------------------------------- Coding style ------------ This project is programmed using the Linux kernel coding style: https://www.kernel.org/doc/html/latest/process/coding-style.html Please use the same style for any code contributions, thanks! The Python decoders should follow the usual Python conventions and use Python idioms as far as it makes sense. The coding style should mostly follow the Python PEP-8, which includes the convention of 4 spaces for indentation: http://www.python.org/dev/peps/pep-0008/ Contributions ------------- - Patches should be sent to the development mailinglist at sigrok-devel@lists.sourceforge.net (please subscribe to the list first). https://lists.sourceforge.net/lists/listinfo/sigrok-devel - Alternatively, you can also clone the git repository and let us know from where to pull/review your changes. You can use gitorious.org, github.com, or any other public git hosting site. Random notes ------------ - Don't do variable declarations in compound statements, only at the beginning of a function. - Generally avoid assigning values to variables at declaration time, especially so for complex and/or run-time dependent values. - Consistently use g_*malloc() / g_*malloc0(). Do not use standard malloc()/calloc() if it can be avoided (sometimes other libs such as libftdi can return malloc()'d memory, for example). - Always properly match allocations with the proper *free() functions. If glib's g_*malloc()/g_*malloc0() was used, use g_free() to free the memory. Otherwise use standard free(). Never use the wrong function! - We assume that "small" memory allocations (< 1MB) will always succeed. Thus, it's fine to use g_malloc() or g_malloc0() for allocations of simple/small structs and such (instead of using g_try_malloc()), and there's no need to check the return value. Do use g_try_malloc() or g_try_malloc0() for large (>= 1MB) allocations and check the return value. - You should never print any messages (neither to stdout nor stderr nor elsewhere) "manually" via e.g. printf() or g_log() or similar functions. Only srd_err()/srd_warn()/srd_info()/srd_dbg()/srd_spew() should be used. - Use glib's gboolean / TRUE / FALSE for boolean types consistently. Do not use and its true / false, and do not invent private definitions for this either. - Consistently use the same naming convention for #include guards in headers: __ This ensures that all #include guards are always unique and consistent. Example: LIBSIGROKDECODE_LIBSIGROKDECODE_INTERNAL_H - Consistently use the same naming convention for API functions: __(). Examples: srd_log_loglevel_set(), srd_log_loglevel_get(), srd_log_handler_set(), srd_log_handler_set_default(), and so on. Getter/setter function names should usually end with "_get" or "_set". Functions creating new "objects" should end with "_new". Functions destroying "objects" should end with "_destroy". Functions adding or removing items (e.g. from lists) should end with either "_add" or "_remove". Functions operating on all items from a list (not on only one of them), should end with "_all", e.g. "_remove_all", "_get_all", and so on. Use "_remove_all" in favor of "_clear" for consistency. - All enums should generally use an explicit start number of 10000. If there are multiple "categories" in the enum entries, each category should be 10000 entries apart from the next one. The start of categories are thus 10000, 20000, 30000, and so on. Adding items to an enum MUST always append to a "category", never add items in the middle of a category. The order of items MUST NOT be changed. Any of the above would break the ABI. The enum item 0 is special and is used as terminator in some lists, thus enums should not use this for "valid" entries (and start at 10000 instead). Doxygen ------- - In Doxygen comments, put an empty line between the block of @param lines and the final @return line. The @param lines themselves (if there is more than one) are not separated by empty lines. - Mark private functions (SRD_PRIV) with /** @private */, so that Doxygen doesn't include them in the output. Functions that are "static" anyway don't need to be marked like this. - Mark private variables/#defines with /** @cond PRIVATE */ and /** @endcond */, so that Doxygen doesn't include them in the output. Variables that are "static" don't need to be marked like this. - Mark all public API functions (SRD_API) with a @since tag which indicates in which release the respective function was added (e.g. "@since 0.1.0"). If the function has existed before, but its API changed later, the @since tag should mention only the release when the API last changed. Example: The srd_foo() call was added in 0.1.0, but the API changed in the later 0.2.0 release. The docs should read "@since 0.2.0" in that case. Non-public functions (static ones, and those marked SRD_PRIV) don't need to have @since markers. The @since tag should be the last one, i.e. it should come after @param, @return, @see, and so on. Protocol decoder guidelines --------------------------- - The 'desc' metadata field for a protocol decoder, which contains a short, one-line description of the protocol/bus, should be at most 55 characters long, and end with a full stop. This short description can be displayed on the command-line using "sigrok-cli -V -l 3", or in various different places in GUIs. - Longer, multi-line descriptions should be placed in the protocol decoder's __init__.py file as docstring. It can be viewed (for a specific protocol decoder, e.g., UART) via "sigrok-cli -a uart", or in various other places in GUIs. - Generally use strings for states (of the PD state machine), not integers. This avoids having to keep a list of state definitions at the top of file. The performance overhead for this is negligible in practice. Recommended: self.state = 'IDLE' self.state = 'GET STOP BIT' Not recommended: self.state = IDLE self.state = GET_STOP_BIT (where IDLE = 0 and GET_STOP_BIT = 1, for example) - Generally use strings for commands/IDs in generated protocol packets. This avoids having to know magic numbers of the PD in higher-level PDs. The performance overhead for this is negligible in practice. Recommended: self.put(x, y, p, ['STOPBIT', 0, 0]) self.put(x, y, p, ['ADDRESS READ', 0x51]) Not recommended: self.put(x, y, p, [STOPBIT, 0, 0]) self.put(x, y, p, [ADDRESS_READ, 0x51]) (with STOPBIT = 3 and ADDRESS_READ = 7, for example) - Use ALL-CAPS names for PD states and protocol packet commands/ID. Words should be separated by spaces (not underscores or the like). Recommended: 'FIND ADDRESS', 'GET TEMPERATURE', 'START' Not recommended: 'FIND_ADDRESS', 'Get Temperature', 'start' Testsuite --------- You can run the libsigrokdecode testsuite using: $ make check Protocol decoder test framework ------------------------------- Please see the sigrok-test repository for a protocol decoder test suite that checks the decoded data of various PDs against known-good reference data. Release engineering ------------------- See http://sigrok.org/wiki/Developers/Release_process for a list of items that need to be done when releasing a new tarball. libsigrokdecode-0.5.0/Doxyfile0000644000175000017500000030567113117366237013321 00000000000000# Doxyfile 1.8.6 # This file describes the settings to be used by the documentation system # doxygen (www.doxygen.org) for a project. # # All text after a double hash (##) is considered a comment and is placed in # front of the TAG it is preceding. # # All text after a single hash (#) is considered a comment and will be ignored. # The format is: # TAG = value [value, ...] # For lists, items can also be appended using: # TAG += value [value, ...] # Values that contain spaces should be placed between quotes (\" \"). #--------------------------------------------------------------------------- # Project related configuration options #--------------------------------------------------------------------------- # This tag specifies the encoding used for all characters in the config file # that follow. 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LOOKUP_CACHE_SIZE = 0 #--------------------------------------------------------------------------- # Build related configuration options #--------------------------------------------------------------------------- # If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in # documentation are documented, even if no documentation was available. Private # class members and static file members will be hidden unless the # EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. # Note: This will also disable the warnings about undocumented members that are # normally produced when WARNINGS is set to YES. # The default value is: NO. EXTRACT_ALL = YES # If the EXTRACT_PRIVATE tag is set to YES all private members of a class will # be included in the documentation. # The default value is: NO. EXTRACT_PRIVATE = NO # If the EXTRACT_PACKAGE tag is set to YES all members with package or internal # scope will be included in the documentation. # The default value is: NO. EXTRACT_PACKAGE = NO # If the EXTRACT_STATIC tag is set to YES all static members of a file will be # included in the documentation. # The default value is: NO. EXTRACT_STATIC = NO # If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) defined # locally in source files will be included in the documentation. If set to NO # only classes defined in header files are included. Does not have any effect # for Java sources. # The default value is: YES. EXTRACT_LOCAL_CLASSES = NO # This flag is only useful for Objective-C code. When set to YES local methods, # which are defined in the implementation section but not in the interface are # included in the documentation. If set to NO only methods in the interface are # included. # The default value is: NO. EXTRACT_LOCAL_METHODS = NO # If this flag is set to YES, the members of anonymous namespaces will be # extracted and appear in the documentation as a namespace called # 'anonymous_namespace{file}', where file will be replaced with the base name of # the file that contains the anonymous namespace. By default anonymous namespace # are hidden. # The default value is: NO. EXTRACT_ANON_NSPACES = NO # If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all # undocumented members inside documented classes or files. If set to NO these # members will be included in the various overviews, but no documentation # section is generated. This option has no effect if EXTRACT_ALL is enabled. # The default value is: NO. HIDE_UNDOC_MEMBERS = NO # If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all # undocumented classes that are normally visible in the class hierarchy. If set # to NO these classes will be included in the various overviews. This option has # no effect if EXTRACT_ALL is enabled. # The default value is: NO. HIDE_UNDOC_CLASSES = NO # If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend # (class|struct|union) declarations. If set to NO these declarations will be # included in the documentation. # The default value is: NO. HIDE_FRIEND_COMPOUNDS = NO # If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any # documentation blocks found inside the body of a function. If set to NO these # blocks will be appended to the function's detailed documentation block. # The default value is: NO. HIDE_IN_BODY_DOCS = NO # The INTERNAL_DOCS tag determines if documentation that is typed after a # \internal command is included. If the tag is set to NO then the documentation # will be excluded. Set it to YES to include the internal documentation. # The default value is: NO. INTERNAL_DOCS = NO # If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file # names in lower-case letters. If set to YES upper-case letters are also # allowed. This is useful if you have classes or files whose names only differ # in case and if your file system supports case sensitive file names. Windows # and Mac users are advised to set this option to NO. # The default value is: system dependent. CASE_SENSE_NAMES = NO # If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with # their full class and namespace scopes in the documentation. If set to YES the # scope will be hidden. # The default value is: NO. HIDE_SCOPE_NAMES = NO # If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of # the files that are included by a file in the documentation of that file. # The default value is: YES. SHOW_INCLUDE_FILES = YES # If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each # grouped member an include statement to the documentation, telling the reader # which file to include in order to use the member. # The default value is: NO. SHOW_GROUPED_MEMB_INC = NO # If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include # files with double quotes in the documentation rather than with sharp brackets. # The default value is: NO. FORCE_LOCAL_INCLUDES = NO # If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the # documentation for inline members. # The default value is: YES. INLINE_INFO = YES # If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the # (detailed) documentation of file and class members alphabetically by member # name. If set to NO the members will appear in declaration order. # The default value is: YES. SORT_MEMBER_DOCS = YES # If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief # descriptions of file, namespace and class members alphabetically by member # name. If set to NO the members will appear in declaration order. Note that # this will also influence the order of the classes in the class list. # The default value is: NO. SORT_BRIEF_DOCS = NO # If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the # (brief and detailed) documentation of class members so that constructors and # destructors are listed first. If set to NO the constructors will appear in the # respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. # Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief # member documentation. # Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting # detailed member documentation. # The default value is: NO. SORT_MEMBERS_CTORS_1ST = NO # If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy # of group names into alphabetical order. If set to NO the group names will # appear in their defined order. # The default value is: NO. SORT_GROUP_NAMES = NO # If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by # fully-qualified names, including namespaces. If set to NO, the class list will # be sorted only by class name, not including the namespace part. # Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. # Note: This option applies only to the class list, not to the alphabetical # list. # The default value is: NO. SORT_BY_SCOPE_NAME = NO # If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper # type resolution of all parameters of a function it will reject a match between # the prototype and the implementation of a member function even if there is # only one candidate or it is obvious which candidate to choose by doing a # simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still # accept a match between prototype and implementation in such cases. # The default value is: NO. STRICT_PROTO_MATCHING = NO # The GENERATE_TODOLIST tag can be used to enable ( YES) or disable ( NO) the # todo list. This list is created by putting \todo commands in the # documentation. # The default value is: YES. GENERATE_TODOLIST = YES # The GENERATE_TESTLIST tag can be used to enable ( YES) or disable ( NO) the # test list. This list is created by putting \test commands in the # documentation. # The default value is: YES. GENERATE_TESTLIST = YES # The GENERATE_BUGLIST tag can be used to enable ( YES) or disable ( NO) the bug # list. This list is created by putting \bug commands in the documentation. # The default value is: YES. GENERATE_BUGLIST = YES # The GENERATE_DEPRECATEDLIST tag can be used to enable ( YES) or disable ( NO) # the deprecated list. This list is created by putting \deprecated commands in # the documentation. # The default value is: YES. GENERATE_DEPRECATEDLIST= YES # The ENABLED_SECTIONS tag can be used to enable conditional documentation # sections, marked by \if ... \endif and \cond # ... \endcond blocks. ENABLED_SECTIONS = # The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the # initial value of a variable or macro / define can have for it to appear in the # documentation. If the initializer consists of more lines than specified here # it will be hidden. Use a value of 0 to hide initializers completely. The # appearance of the value of individual variables and macros / defines can be # controlled using \showinitializer or \hideinitializer command in the # documentation regardless of this setting. # Minimum value: 0, maximum value: 10000, default value: 30. MAX_INITIALIZER_LINES = 30 # Set the SHOW_USED_FILES tag to NO to disable the list of files generated at # the bottom of the documentation of classes and structs. If set to YES the list # will mention the files that were used to generate the documentation. # The default value is: YES. SHOW_USED_FILES = YES # Set the SHOW_FILES tag to NO to disable the generation of the Files page. This # will remove the Files entry from the Quick Index and from the Folder Tree View # (if specified). # The default value is: YES. SHOW_FILES = YES # Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces # page. This will remove the Namespaces entry from the Quick Index and from the # Folder Tree View (if specified). # The default value is: YES. SHOW_NAMESPACES = YES # The FILE_VERSION_FILTER tag can be used to specify a program or script that # doxygen should invoke to get the current version for each file (typically from # the version control system). Doxygen will invoke the program by executing (via # popen()) the command command input-file, where command is the value of the # FILE_VERSION_FILTER tag, and input-file is the name of an input file provided # by doxygen. Whatever the program writes to standard output is used as the file # version. For an example see the documentation. FILE_VERSION_FILTER = # The LAYOUT_FILE tag can be used to specify a layout file which will be parsed # by doxygen. The layout file controls the global structure of the generated # output files in an output format independent way. To create the layout file # that represents doxygen's defaults, run doxygen with the -l option. You can # optionally specify a file name after the option, if omitted DoxygenLayout.xml # will be used as the name of the layout file. # # Note that if you run doxygen from a directory containing a file called # DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE # tag is left empty. LAYOUT_FILE = # The CITE_BIB_FILES tag can be used to specify one or more bib files containing # the reference definitions. This must be a list of .bib files. The .bib # extension is automatically appended if omitted. This requires the bibtex tool # to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info. # For LaTeX the style of the bibliography can be controlled using # LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the # search path. Do not use file names with spaces, bibtex cannot handle them. See # also \cite for info how to create references. CITE_BIB_FILES = #--------------------------------------------------------------------------- # Configuration options related to warning and progress messages #--------------------------------------------------------------------------- # The QUIET tag can be used to turn on/off the messages that are generated to # standard output by doxygen. If QUIET is set to YES this implies that the # messages are off. # The default value is: NO. QUIET = NO # The WARNINGS tag can be used to turn on/off the warning messages that are # generated to standard error ( stderr) by doxygen. If WARNINGS is set to YES # this implies that the warnings are on. # # Tip: Turn warnings on while writing the documentation. # The default value is: YES. WARNINGS = YES # If the WARN_IF_UNDOCUMENTED tag is set to YES, then doxygen will generate # warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag # will automatically be disabled. # The default value is: YES. WARN_IF_UNDOCUMENTED = YES # If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for # potential errors in the documentation, such as not documenting some parameters # in a documented function, or documenting parameters that don't exist or using # markup commands wrongly. # The default value is: YES. WARN_IF_DOC_ERROR = YES # This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that # are documented, but have no documentation for their parameters or return # value. If set to NO doxygen will only warn about wrong or incomplete parameter # documentation, but not about the absence of documentation. # The default value is: NO. WARN_NO_PARAMDOC = YES # The WARN_FORMAT tag determines the format of the warning messages that doxygen # can produce. The string should contain the $file, $line, and $text tags, which # will be replaced by the file and line number from which the warning originated # and the warning text. Optionally the format may contain $version, which will # be replaced by the version of the file (if it could be obtained via # FILE_VERSION_FILTER) # The default value is: $file:$line: $text. WARN_FORMAT = "$file:$line: $text" # The WARN_LOGFILE tag can be used to specify a file to which warning and error # messages should be written. If left blank the output is written to standard # error (stderr). WARN_LOGFILE = #--------------------------------------------------------------------------- # Configuration options related to the input files #--------------------------------------------------------------------------- # The INPUT tag is used to specify the files and/or directories that contain # documented source files. You may enter file names like myfile.cpp or # directories like /usr/src/myproject. Separate the files or directories with # spaces. # Note: If this tag is empty the current directory is searched. INPUT = . # This tag can be used to specify the character encoding of the source files # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses # libiconv (or the iconv built into libc) for the transcoding. See the libiconv # documentation (see: http://www.gnu.org/software/libiconv) for the list of # possible encodings. # The default value is: UTF-8. INPUT_ENCODING = UTF-8 # If the value of the INPUT tag contains directories, you can use the # FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and # *.h) to filter out the source-files in the directories. If left blank the # following patterns are tested:*.c, *.cc, *.cxx, *.cpp, *.c++, *.java, *.ii, # *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp, # *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown, # *.md, *.mm, *.dox, *.py, *.f90, *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf, # *.qsf, *.as and *.js. FILE_PATTERNS = # The RECURSIVE tag can be used to specify whether or not subdirectories should # be searched for input files as well. # The default value is: NO. RECURSIVE = YES # The EXCLUDE tag can be used to specify files and/or directories that should be # excluded from the INPUT source files. This way you can easily exclude a # subdirectory from a directory tree whose root is specified with the INPUT tag. # # Note that relative paths are relative to the directory from which doxygen is # run. EXCLUDE = config.h libsigrokdecode-internal.h exception.c \ module_sigrokdecode.c type_decoder.c type_logic.c \ util.c # The EXCLUDE_SYMLINKS tag can be used to select whether or not files or # directories that are symbolic links (a Unix file system feature) are excluded # from the input. # The default value is: NO. EXCLUDE_SYMLINKS = NO # If the value of the INPUT tag contains directories, you can use the # EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude # certain files from those directories. # # Note that the wildcards are matched against the file with absolute path, so to # exclude all test directories for example use the pattern */test/* # Ignore the following files and directories (see also EXCLUDE above): # - config.h: Non-public stuff, the file doesn't get installed. # - libsigrokdecode-internal.h: Non-public stuff, the file isn't installed. # - decoders/*: The decoders themselves don't contain public API. # - exception.c: No public API stuff in there currently. # - module_sigrokdecode.c: No public API stuff in there currently. # - type_decoder.c: No public API stuff in there currently. # - tyoe_logic.c: No public API stuff in there currently. # - util.c: No public API stuff in there currently. # - tests/*: Unit tests, no public API stuff in there. # - doxy/*: Potentially already generated docs, should not be scanned. # EXCLUDE_PATTERNS = */decoders/* */tests/* */doxy/* # The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names # (namespaces, classes, functions, etc.) that should be excluded from the # output. The symbol name can be a fully qualified name, a word, or if the # wildcard * is used, a substring. Examples: ANamespace, AClass, # AClass::ANamespace, ANamespace::*Test # # Note that the wildcards are matched against the file with absolute path, so to # exclude all test directories use the pattern */test/* EXCLUDE_SYMBOLS = # The EXAMPLE_PATH tag can be used to specify one or more files or directories # that contain example code fragments that are included (see the \include # command). EXAMPLE_PATH = # If the value of the EXAMPLE_PATH tag contains directories, you can use the # EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and # *.h) to filter out the source-files in the directories. If left blank all # files are included. EXAMPLE_PATTERNS = # If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be # searched for input files to be used with the \include or \dontinclude commands # irrespective of the value of the RECURSIVE tag. # The default value is: NO. EXAMPLE_RECURSIVE = NO # The IMAGE_PATH tag can be used to specify one or more files or directories # that contain images that are to be included in the documentation (see the # \image command). IMAGE_PATH = # The INPUT_FILTER tag can be used to specify a program that doxygen should # invoke to filter for each input file. Doxygen will invoke the filter program # by executing (via popen()) the command: # # # # where is the value of the INPUT_FILTER tag, and is the # name of an input file. Doxygen will then use the output that the filter # program writes to standard output. If FILTER_PATTERNS is specified, this tag # will be ignored. # # Note that the filter must not add or remove lines; it is applied before the # code is scanned, but not when the output code is generated. If lines are added # or removed, the anchors will not be placed correctly. INPUT_FILTER = # The FILTER_PATTERNS tag can be used to specify filters on a per file pattern # basis. Doxygen will compare the file name with each pattern and apply the # filter if there is a match. The filters are a list of the form: pattern=filter # (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how # filters are used. If the FILTER_PATTERNS tag is empty or if none of the # patterns match the file name, INPUT_FILTER is applied. FILTER_PATTERNS = # If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using # INPUT_FILTER ) will also be used to filter the input files that are used for # producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). # The default value is: NO. FILTER_SOURCE_FILES = NO # The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file # pattern. A pattern will override the setting for FILTER_PATTERN (if any) and # it is also possible to disable source filtering for a specific pattern using # *.ext= (so without naming a filter). # This tag requires that the tag FILTER_SOURCE_FILES is set to YES. FILTER_SOURCE_PATTERNS = # If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that # is part of the input, its contents will be placed on the main page # (index.html). This can be useful if you have a project on for instance GitHub # and want to reuse the introduction page also for the doxygen output. USE_MDFILE_AS_MAINPAGE = #--------------------------------------------------------------------------- # Configuration options related to source browsing #--------------------------------------------------------------------------- # If the SOURCE_BROWSER tag is set to YES then a list of source files will be # generated. Documented entities will be cross-referenced with these sources. # # Note: To get rid of all source code in the generated output, make sure that # also VERBATIM_HEADERS is set to NO. # The default value is: NO. SOURCE_BROWSER = YES # Setting the INLINE_SOURCES tag to YES will include the body of functions, # classes and enums directly into the documentation. # The default value is: NO. INLINE_SOURCES = NO # Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any # special comment blocks from generated source code fragments. Normal C, C++ and # Fortran comments will always remain visible. # The default value is: YES. STRIP_CODE_COMMENTS = NO # If the REFERENCED_BY_RELATION tag is set to YES then for each documented # function all documented functions referencing it will be listed. # The default value is: NO. REFERENCED_BY_RELATION = YES # If the REFERENCES_RELATION tag is set to YES then for each documented function # all documented entities called/used by that function will be listed. # The default value is: NO. REFERENCES_RELATION = YES # If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set # to YES, then the hyperlinks from functions in REFERENCES_RELATION and # REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will # link to the documentation. # The default value is: YES. REFERENCES_LINK_SOURCE = YES # If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the # source code will show a tooltip with additional information such as prototype, # brief description and links to the definition and documentation. Since this # will make the HTML file larger and loading of large files a bit slower, you # can opt to disable this feature. # The default value is: YES. # This tag requires that the tag SOURCE_BROWSER is set to YES. SOURCE_TOOLTIPS = YES # If the USE_HTAGS tag is set to YES then the references to source code will # point to the HTML generated by the htags(1) tool instead of doxygen built-in # source browser. The htags tool is part of GNU's global source tagging system # (see http://www.gnu.org/software/global/global.html). You will need version # 4.8.6 or higher. # # To use it do the following: # - Install the latest version of global # - Enable SOURCE_BROWSER and USE_HTAGS in the config file # - Make sure the INPUT points to the root of the source tree # - Run doxygen as normal # # Doxygen will invoke htags (and that will in turn invoke gtags), so these # tools must be available from the command line (i.e. in the search path). # # The result: instead of the source browser generated by doxygen, the links to # source code will now point to the output of htags. # The default value is: NO. # This tag requires that the tag SOURCE_BROWSER is set to YES. USE_HTAGS = NO # If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a # verbatim copy of the header file for each class for which an include is # specified. Set to NO to disable this. # See also: Section \class. # The default value is: YES. VERBATIM_HEADERS = YES #--------------------------------------------------------------------------- # Configuration options related to the alphabetical class index #--------------------------------------------------------------------------- # If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all # compounds will be generated. Enable this if the project contains a lot of # classes, structs, unions or interfaces. # The default value is: YES. ALPHABETICAL_INDEX = YES # The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in # which the alphabetical index list will be split. # Minimum value: 1, maximum value: 20, default value: 5. # This tag requires that the tag ALPHABETICAL_INDEX is set to YES. COLS_IN_ALPHA_INDEX = 5 # In case all classes in a project start with a common prefix, all classes will # be put under the same header in the alphabetical index. The IGNORE_PREFIX tag # can be used to specify a prefix (or a list of prefixes) that should be ignored # while generating the index headers. # This tag requires that the tag ALPHABETICAL_INDEX is set to YES. IGNORE_PREFIX = #--------------------------------------------------------------------------- # Configuration options related to the HTML output #--------------------------------------------------------------------------- # If the GENERATE_HTML tag is set to YES doxygen will generate HTML output # The default value is: YES. GENERATE_HTML = YES # The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a # relative path is entered the value of OUTPUT_DIRECTORY will be put in front of # it. # The default directory is: html. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_OUTPUT = html-api # The HTML_FILE_EXTENSION tag can be used to specify the file extension for each # generated HTML page (for example: .htm, .php, .asp). # The default value is: .html. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_FILE_EXTENSION = .html # The HTML_HEADER tag can be used to specify a user-defined HTML header file for # each generated HTML page. If the tag is left blank doxygen will generate a # standard header. # # To get valid HTML the header file that includes any scripts and style sheets # that doxygen needs, which is dependent on the configuration options used (e.g. # the setting GENERATE_TREEVIEW). It is highly recommended to start with a # default header using # doxygen -w html new_header.html new_footer.html new_stylesheet.css # YourConfigFile # and then modify the file new_header.html. See also section "Doxygen usage" # for information on how to generate the default header that doxygen normally # uses. # Note: The header is subject to change so you typically have to regenerate the # default header when upgrading to a newer version of doxygen. For a description # of the possible markers and block names see the documentation. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_HEADER = # The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each # generated HTML page. If the tag is left blank doxygen will generate a standard # footer. See HTML_HEADER for more information on how to generate a default # footer and what special commands can be used inside the footer. See also # section "Doxygen usage" for information on how to generate the default footer # that doxygen normally uses. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_FOOTER = # The HTML_STYLESHEET tag can be used to specify a user-defined cascading style # sheet that is used by each HTML page. It can be used to fine-tune the look of # the HTML output. If left blank doxygen will generate a default style sheet. # See also section "Doxygen usage" for information on how to generate the style # sheet that doxygen normally uses. # Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as # it is more robust and this tag (HTML_STYLESHEET) will in the future become # obsolete. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_STYLESHEET = # The HTML_EXTRA_STYLESHEET tag can be used to specify an additional user- # defined cascading style sheet that is included after the standard style sheets # created by doxygen. Using this option one can overrule certain style aspects. # This is preferred over using HTML_STYLESHEET since it does not replace the # standard style sheet and is therefor more robust against future updates. # Doxygen will copy the style sheet file to the output directory. For an example # see the documentation. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_EXTRA_STYLESHEET = # The HTML_EXTRA_FILES tag can be used to specify one or more extra images or # other source files which should be copied to the HTML output directory. Note # that these files will be copied to the base HTML output directory. Use the # $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these # files. In the HTML_STYLESHEET file, use the file name only. Also note that the # files will be copied as-is; there are no commands or markers available. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_EXTRA_FILES = # The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen # will adjust the colors in the stylesheet and background images according to # this color. Hue is specified as an angle on a colorwheel, see # http://en.wikipedia.org/wiki/Hue for more information. For instance the value # 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 # purple, and 360 is red again. # Minimum value: 0, maximum value: 359, default value: 220. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_COLORSTYLE_HUE = 220 # The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors # in the HTML output. For a value of 0 the output will use grayscales only. A # value of 255 will produce the most vivid colors. # Minimum value: 0, maximum value: 255, default value: 100. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_COLORSTYLE_SAT = 100 # The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the # luminance component of the colors in the HTML output. Values below 100 # gradually make the output lighter, whereas values above 100 make the output # darker. The value divided by 100 is the actual gamma applied, so 80 represents # a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not # change the gamma. # Minimum value: 40, maximum value: 240, default value: 80. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_COLORSTYLE_GAMMA = 80 # If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML # page will contain the date and time when the page was generated. Setting this # to NO can help when comparing the output of multiple runs. # The default value is: YES. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_TIMESTAMP = YES # If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML # documentation will contain sections that can be hidden and shown after the # page has loaded. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_DYNAMIC_SECTIONS = YES # With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries # shown in the various tree structured indices initially; the user can expand # and collapse entries dynamically later on. Doxygen will expand the tree to # such a level that at most the specified number of entries are visible (unless # a fully collapsed tree already exceeds this amount). So setting the number of # entries 1 will produce a full collapsed tree by default. 0 is a special value # representing an infinite number of entries and will result in a full expanded # tree by default. # Minimum value: 0, maximum value: 9999, default value: 100. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_INDEX_NUM_ENTRIES = 100 # If the GENERATE_DOCSET tag is set to YES, additional index files will be # generated that can be used as input for Apple's Xcode 3 integrated development # environment (see: http://developer.apple.com/tools/xcode/), introduced with # OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a # Makefile in the HTML output directory. Running make will produce the docset in # that directory and running make install will install the docset in # ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at # startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html # for more information. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. GENERATE_DOCSET = NO # This tag determines the name of the docset feed. A documentation feed provides # an umbrella under which multiple documentation sets from a single provider # (such as a company or product suite) can be grouped. # The default value is: Doxygen generated docs. # This tag requires that the tag GENERATE_DOCSET is set to YES. DOCSET_FEEDNAME = "Doxygen generated docs" # This tag specifies a string that should uniquely identify the documentation # set bundle. This should be a reverse domain-name style string, e.g. # com.mycompany.MyDocSet. Doxygen will append .docset to the name. # The default value is: org.doxygen.Project. # This tag requires that the tag GENERATE_DOCSET is set to YES. DOCSET_BUNDLE_ID = org.doxygen.Project # The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify # the documentation publisher. This should be a reverse domain-name style # string, e.g. com.mycompany.MyDocSet.documentation. # The default value is: org.doxygen.Publisher. # This tag requires that the tag GENERATE_DOCSET is set to YES. DOCSET_PUBLISHER_ID = org.doxygen.Publisher # The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. # The default value is: Publisher. # This tag requires that the tag GENERATE_DOCSET is set to YES. DOCSET_PUBLISHER_NAME = Publisher # If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three # additional HTML index files: index.hhp, index.hhc, and index.hhk. The # index.hhp is a project file that can be read by Microsoft's HTML Help Workshop # (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on # Windows. # # The HTML Help Workshop contains a compiler that can convert all HTML output # generated by doxygen into a single compiled HTML file (.chm). Compiled HTML # files are now used as the Windows 98 help format, and will replace the old # Windows help format (.hlp) on all Windows platforms in the future. Compressed # HTML files also contain an index, a table of contents, and you can search for # words in the documentation. The HTML workshop also contains a viewer for # compressed HTML files. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. GENERATE_HTMLHELP = NO # The CHM_FILE tag can be used to specify the file name of the resulting .chm # file. You can add a path in front of the file if the result should not be # written to the html output directory. # This tag requires that the tag GENERATE_HTMLHELP is set to YES. CHM_FILE = # The HHC_LOCATION tag can be used to specify the location (absolute path # including file name) of the HTML help compiler ( hhc.exe). If non-empty # doxygen will try to run the HTML help compiler on the generated index.hhp. # The file has to be specified with full path. # This tag requires that the tag GENERATE_HTMLHELP is set to YES. HHC_LOCATION = # The GENERATE_CHI flag controls if a separate .chi index file is generated ( # YES) or that it should be included in the master .chm file ( NO). # The default value is: NO. # This tag requires that the tag GENERATE_HTMLHELP is set to YES. GENERATE_CHI = NO # The CHM_INDEX_ENCODING is used to encode HtmlHelp index ( hhk), content ( hhc) # and project file content. # This tag requires that the tag GENERATE_HTMLHELP is set to YES. CHM_INDEX_ENCODING = # The BINARY_TOC flag controls whether a binary table of contents is generated ( # YES) or a normal table of contents ( NO) in the .chm file. # The default value is: NO. # This tag requires that the tag GENERATE_HTMLHELP is set to YES. BINARY_TOC = NO # The TOC_EXPAND flag can be set to YES to add extra items for group members to # the table of contents of the HTML help documentation and to the tree view. # The default value is: NO. # This tag requires that the tag GENERATE_HTMLHELP is set to YES. TOC_EXPAND = NO # If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and # QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that # can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help # (.qch) of the generated HTML documentation. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. GENERATE_QHP = NO # If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify # the file name of the resulting .qch file. The path specified is relative to # the HTML output folder. # This tag requires that the tag GENERATE_QHP is set to YES. QCH_FILE = # The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help # Project output. For more information please see Qt Help Project / Namespace # (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace). # The default value is: org.doxygen.Project. # This tag requires that the tag GENERATE_QHP is set to YES. QHP_NAMESPACE = org.doxygen.Project # The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt # Help Project output. For more information please see Qt Help Project / Virtual # Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual- # folders). # The default value is: doc. # This tag requires that the tag GENERATE_QHP is set to YES. QHP_VIRTUAL_FOLDER = doc # If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom # filter to add. For more information please see Qt Help Project / Custom # Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom- # filters). # This tag requires that the tag GENERATE_QHP is set to YES. QHP_CUST_FILTER_NAME = # The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the # custom filter to add. For more information please see Qt Help Project / Custom # Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom- # filters). # This tag requires that the tag GENERATE_QHP is set to YES. QHP_CUST_FILTER_ATTRS = # The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this # project's filter section matches. Qt Help Project / Filter Attributes (see: # http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes). # This tag requires that the tag GENERATE_QHP is set to YES. QHP_SECT_FILTER_ATTRS = # The QHG_LOCATION tag can be used to specify the location of Qt's # qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the # generated .qhp file. # This tag requires that the tag GENERATE_QHP is set to YES. QHG_LOCATION = # If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be # generated, together with the HTML files, they form an Eclipse help plugin. To # install this plugin and make it available under the help contents menu in # Eclipse, the contents of the directory containing the HTML and XML files needs # to be copied into the plugins directory of eclipse. The name of the directory # within the plugins directory should be the same as the ECLIPSE_DOC_ID value. # After copying Eclipse needs to be restarted before the help appears. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. GENERATE_ECLIPSEHELP = NO # A unique identifier for the Eclipse help plugin. When installing the plugin # the directory name containing the HTML and XML files should also have this # name. Each documentation set should have its own identifier. # The default value is: org.doxygen.Project. # This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. ECLIPSE_DOC_ID = org.doxygen.Project # If you want full control over the layout of the generated HTML pages it might # be necessary to disable the index and replace it with your own. The # DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top # of each HTML page. A value of NO enables the index and the value YES disables # it. Since the tabs in the index contain the same information as the navigation # tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. DISABLE_INDEX = NO # The GENERATE_TREEVIEW tag is used to specify whether a tree-like index # structure should be generated to display hierarchical information. If the tag # value is set to YES, a side panel will be generated containing a tree-like # index structure (just like the one that is generated for HTML Help). For this # to work a browser that supports JavaScript, DHTML, CSS and frames is required # (i.e. any modern browser). Windows users are probably better off using the # HTML help feature. Via custom stylesheets (see HTML_EXTRA_STYLESHEET) one can # further fine-tune the look of the index. As an example, the default style # sheet generated by doxygen has an example that shows how to put an image at # the root of the tree instead of the PROJECT_NAME. Since the tree basically has # the same information as the tab index, you could consider setting # DISABLE_INDEX to YES when enabling this option. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. GENERATE_TREEVIEW = NO # The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that # doxygen will group on one line in the generated HTML documentation. # # Note that a value of 0 will completely suppress the enum values from appearing # in the overview section. # Minimum value: 0, maximum value: 20, default value: 4. # This tag requires that the tag GENERATE_HTML is set to YES. ENUM_VALUES_PER_LINE = 1 # If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used # to set the initial width (in pixels) of the frame in which the tree is shown. # Minimum value: 0, maximum value: 1500, default value: 250. # This tag requires that the tag GENERATE_HTML is set to YES. TREEVIEW_WIDTH = 250 # When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open links to # external symbols imported via tag files in a separate window. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. EXT_LINKS_IN_WINDOW = NO # Use this tag to change the font size of LaTeX formulas included as images in # the HTML documentation. When you change the font size after a successful # doxygen run you need to manually remove any form_*.png images from the HTML # output directory to force them to be regenerated. # Minimum value: 8, maximum value: 50, default value: 10. # This tag requires that the tag GENERATE_HTML is set to YES. FORMULA_FONTSIZE = 10 # Use the FORMULA_TRANPARENT tag to determine whether or not the images # generated for formulas are transparent PNGs. Transparent PNGs are not # supported properly for IE 6.0, but are supported on all modern browsers. # # Note that when changing this option you need to delete any form_*.png files in # the HTML output directory before the changes have effect. # The default value is: YES. # This tag requires that the tag GENERATE_HTML is set to YES. FORMULA_TRANSPARENT = YES # Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see # http://www.mathjax.org) which uses client side Javascript for the rendering # instead of using prerendered bitmaps. Use this if you do not have LaTeX # installed or if you want to formulas look prettier in the HTML output. When # enabled you may also need to install MathJax separately and configure the path # to it using the MATHJAX_RELPATH option. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. USE_MATHJAX = NO # When MathJax is enabled you can set the default output format to be used for # the MathJax output. See the MathJax site (see: # http://docs.mathjax.org/en/latest/output.html) for more details. # Possible values are: HTML-CSS (which is slower, but has the best # compatibility), NativeMML (i.e. MathML) and SVG. # The default value is: HTML-CSS. # This tag requires that the tag USE_MATHJAX is set to YES. MATHJAX_FORMAT = HTML-CSS # When MathJax is enabled you need to specify the location relative to the HTML # output directory using the MATHJAX_RELPATH option. The destination directory # should contain the MathJax.js script. For instance, if the mathjax directory # is located at the same level as the HTML output directory, then # MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax # Content Delivery Network so you can quickly see the result without installing # MathJax. However, it is strongly recommended to install a local copy of # MathJax from http://www.mathjax.org before deployment. # The default value is: http://cdn.mathjax.org/mathjax/latest. # This tag requires that the tag USE_MATHJAX is set to YES. MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax # extension names that should be enabled during MathJax rendering. For example # MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols # This tag requires that the tag USE_MATHJAX is set to YES. MATHJAX_EXTENSIONS = # The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces # of code that will be used on startup of the MathJax code. See the MathJax site # (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an # example see the documentation. # This tag requires that the tag USE_MATHJAX is set to YES. MATHJAX_CODEFILE = # When the SEARCHENGINE tag is enabled doxygen will generate a search box for # the HTML output. The underlying search engine uses javascript and DHTML and # should work on any modern browser. Note that when using HTML help # (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) # there is already a search function so this one should typically be disabled. # For large projects the javascript based search engine can be slow, then # enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to # search using the keyboard; to jump to the search box use + S # (what the is depends on the OS and browser, but it is typically # , /