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All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include #include #include #include #include #include "tools_res_mgmt.h" #ifdef __WIN__ #include #define getpid() _getpid() #endif #define VSEC_SEM_NUM 10 #define HW_SEM_NUM VSEC_SEM_NUM /* * Macros: */ /* * VSEC semaphore space macros */ #define SET_SPACE_FOR_SEMAPHORE_ACCESS(mf) \ if (mget_vsec_supp(mf)) { \ mset_addr_space(mf, AS_SEMAPHORE); \ } #define RESTORE_SPACE(mf) mset_addr_space(mf, AS_CR_SPACE) #define MWRITE4_SEMAPHORE(mf, offset, value, action_on_fail)\ do {\ SET_SPACE_FOR_SEMAPHORE_ACCESS(mf);\ if (mwrite4(mf, offset, value) != 4) {\ RESTORE_SPACE(mf);\ action_on_fail;\ }\ RESTORE_SPACE(mf);\ }while(0) #define MREAD4_SEMAPHORE(mf, offset, ptr, action_on_fail)\ do {\ SET_SPACE_FOR_SEMAPHORE_ACCESS(mf);\ if (mread4(mf, offset, ptr) != 4) {\ RESTORE_SPACE(mf);\ action_on_fail;\ }\ RESTORE_SPACE(mf);\ }while(0) /***********************/ static const char* status_to_str[] = { "Ok", "Resource is busy", "Tools resource management interface not available", "Device not supported", "Resource not supported", "CR-Space access error" }; struct device_sem_info { dm_dev_id_t dev_id; u_int32_t hw_sem_addr[HW_SEM_NUM]; // if semaphore entry supported: value != 0 , main semaphore is at [0] int vsec_sem_supported; }; static u_int32_t g_vsec_sem_addr[VSEC_SEM_NUM] = {0x0, 0x10}; #define HW_SEM_ADDR_MASK 0xf static struct device_sem_info g_dev_sem_info_db[] = { { DeviceConnectX, // dev_id {0xf03bc}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX2, // dev_id {0xf03bc}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX3, // dev_id {0xf03bc, 0xf03a0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX3Pro, // dev_id {0xf03bc, 0xf03a0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceInfiniScaleIV, // dev_id {0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceSwitchX, // dev_id {0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectIB, // dev_id {0xe27f8}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceConnectX4, // dev_id {0xe250c}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceSwitchIB, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceSpectrum, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX4LX, // dev_id {0xe250c}, // hw_sem_addr 1, // vsec_sem_supported }, }; /************************************ * Function: lock_hw_semaphore ************************************/ static trm_sts lock_hw_semaphore(mfile* mf, u_int32_t addr, unsigned int max_retries) { u_int32_t val; unsigned int cnt = 0; int rc; while (((rc = mread4(mf, addr, &val)) == 4) && val == 1 && cnt < max_retries) { cnt ++; msleep(((rand() % 5) + 1)); } if (rc != 4) { return TRM_STS_CR_ACCESS_ERR; } else if (val == 0) { return TRM_STS_OK; } else { return TRM_STS_RES_BUSY; } } /************************************ * Function: unlock_hw_semaphore ************************************/ static trm_sts unlock_hw_semaphore(mfile* mf, u_int32_t addr) { int rc = mwrite4(mf, addr, 0) == 4 ? TRM_STS_OK : TRM_STS_CR_ACCESS_ERR; // give up the rest of the time slice msleep(0); return rc; } /************************************ * Function: lock_vsec_semaphore() ************************************/ static trm_sts lock_vsec_semaphore(mfile* mf, u_int32_t addr, unsigned int max_retries) { static u_int32_t pid = 0; u_int32_t read_val; unsigned cnt = 0; if (!pid) { pid = getpid(); } do { // loop while the semaphore is taken by someone else if (cnt++ > max_retries) { return TRM_STS_RES_BUSY; } //write pid to semaphore MWRITE4_SEMAPHORE(mf, addr, pid, return TRM_STS_CR_ACCESS_ERR); // Read back MREAD4_SEMAPHORE(mf, addr, &read_val, return TRM_STS_CR_ACCESS_ERR); if (read_val == pid) break; msleep(((rand() % 5) + 1)); } while (read_val != pid); return TRM_STS_OK; } /************************************ * Function: unlock_vsec_semaphore() ************************************/ static trm_sts unlock_vsec_semaphore(mfile* mf, u_int32_t addr) { MWRITE4_SEMAPHORE(mf, addr, 0, return TRM_STS_CR_ACCESS_ERR); return TRM_STS_OK; } /************************************ * Function: get_device_sem_info ************************************/ static struct device_sem_info* get_device_sem_info(dm_dev_id_t dev_id) { size_t i; for (i = 0; i < sizeof(g_dev_sem_info_db)/sizeof(g_dev_sem_info_db[0]); i++) { if (g_dev_sem_info_db[i].dev_id == dev_id) { return &g_dev_sem_info_db[i]; } } return NULL; } /************************************ * Function: trm_lock ************************************/ trm_sts trm_lock(mfile* mf, trm_resourse res, unsigned int max_retries) { dm_dev_id_t dev_id; u_int32_t hw_dev_id; u_int32_t chip_rev; struct device_sem_info* dev_sem_info; if (dm_get_device_id(mf, &dev_id, &hw_dev_id, &chip_rev)) { return TRM_STS_CR_ACCESS_ERR; } dev_sem_info = get_device_sem_info(dev_id); // Not supported device if (!dev_sem_info) { return TRM_STS_DEV_NOT_SUPPORTED; } // lock resource on appropriate ifc if supported switch ((int)res) { case TRM_RES_ICMD: if (dev_sem_info->vsec_sem_supported && mget_vsec_supp(mf)) { return lock_vsec_semaphore(mf, g_vsec_sem_addr[TRM_RES_ICMD], max_retries); } else if (dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK]){ // lock hw semaphore return lock_hw_semaphore(mf, dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK], max_retries); } break; case TRM_RES_FLASH_PROGRAMING: if (dev_sem_info->vsec_sem_supported && mget_vsec_supp(mf)) { return lock_vsec_semaphore(mf, g_vsec_sem_addr[TRM_RES_FLASH_PROGRAMING], max_retries); } break; case TRM_RES_HCR_FLASH_PROGRAMING: if (dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK]){ // lock hw semaphore return lock_hw_semaphore(mf, dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK], max_retries); } break; case TRM_RES_HW_TRACER: if (dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK]){ // lock hw semaphore return lock_hw_semaphore(mf, dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK], max_retries); } break; default: break; } return TRM_STS_RES_NOT_SUPPORTED; } /************************************ * Function: trm_try_lock ************************************/ trm_sts trm_try_lock(mfile* mf, trm_resourse res) { return trm_lock(mf, res, 1); } /************************************ * Function: trm_unlock ************************************/ trm_sts trm_unlock(mfile* mf, trm_resourse res) { dm_dev_id_t dev_id; u_int32_t hw_dev_id; u_int32_t chip_rev; struct device_sem_info* dev_sem_info; if (dm_get_device_id(mf, &dev_id, &hw_dev_id, &chip_rev)) { return TRM_STS_CR_ACCESS_ERR; } dev_sem_info = get_device_sem_info(dev_id); // Not supported device if (!dev_sem_info) { return TRM_STS_DEV_NOT_SUPPORTED; } // lock resource on appropriate ifc if supported switch ((int)res) { case TRM_RES_ICMD: if (dev_sem_info->vsec_sem_supported && mget_vsec_supp(mf)) { return unlock_vsec_semaphore(mf, g_vsec_sem_addr[TRM_RES_ICMD]); } else if (dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK]){ // lock hw semaphore return unlock_hw_semaphore(mf, dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK]); } break; case TRM_RES_FLASH_PROGRAMING: if (dev_sem_info->vsec_sem_supported && mget_vsec_supp(mf)) { return unlock_vsec_semaphore(mf, g_vsec_sem_addr[TRM_RES_FLASH_PROGRAMING]); } break; case TRM_RES_HCR_FLASH_PROGRAMING: if (dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK]){ // lock hw semaphore return unlock_hw_semaphore(mf, dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK]); } break; case TRM_RES_HW_TRACER: if (dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK]){ // lock hw semaphore return unlock_hw_semaphore(mf, dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK]); } break; default: break; } return TRM_STS_RES_NOT_SUPPORTED; } /************************************ * Function: trm_sts2str ************************************/ const char* trm_sts2str(trm_sts status) { size_t num_of_sts = sizeof(status_to_str)/sizeof(status_to_str[0]); if ((size_t)status >= num_of_sts) { return "Unknown status code"; } return status_to_str[status]; } mstflint-4.1.0/tools_res_mgmt/Makefile.am0000644000175000017500000000334312572762670017424 0ustar mehdimehdi# Copyright (c) 2004-2010 Mellanox Technologies LTD. All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS # BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN # ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. #-- # Makefile.am -- Process this file with automake to produce Makefile.in USER_DIR = $(top_srcdir) MTCR_DIR = $(USER_DIR)/include/mtcr_ul INCLUDES = -I. -I../common -I$(MTCR_DIR) -I.. -I$(USER_DIR)/mtcr_ul AM_CFLAGS = -W -Wall -Werror -g -MP -MD $(COMPILER_FPIC) noinst_LIBRARIES = libtools_res_mgmt.a libtools_res_mgmt_a_SOURCES = tools_res_mgmt.c mstflint-4.1.0/tools_res_mgmt/tools_res_mgmt.h0000644000175000017500000000636412572762670020604 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef TOOLS_RESOURCE_MGMT_H #define TOOLS_RESOURCE_MGMT_H #include #ifdef __cplusplus extern "C" { #endif typedef enum { TRM_STS_OK = 0, TRM_STS_RES_BUSY, TRM_STS_IFC_NA, TRM_STS_DEV_NOT_SUPPORTED, TRM_STS_RES_NOT_SUPPORTED, TRM_STS_CR_ACCESS_ERR } trm_sts; typedef enum { // vsec semaphores TRM_RES_ICMD = 0x0, TRM_RES_FLASH_PROGRAMING = 0x1, // hw semaphores TRM_RES_MAIN_SEM = 0x10, TRM_RES_HW_TRACER = TRM_RES_MAIN_SEM, TRM_RES_TOOLS_HCR = TRM_RES_MAIN_SEM, TRM_RES_HCR_FLASH_PROGRAMING = 0x11, TRM_RES_ALL = 0xffff, } trm_resourse; /* * Lock tools resource * Parameter (mf) - an opened mst device handler * Parameter (res) - resource to acquire. * Parameter (max_retry) - max retry count before declaring resource busy. * Return TOOLS_STS_OK on success of locking all the desired resources, otherwise any other error code. */ trm_sts trm_lock(mfile* mf, trm_resourse res, unsigned int max_retry); /* * Try to lock tools resource (returns immediately if resource busy) * Parameter (mf) - an opened mst device handler * Parameter (res) - resource to acquire. * Return TOOLS_STS_OK on success of locking all the desired resources, otherwise any other error code. */ trm_sts trm_try_lock(mfile* mf, trm_resourse res); /* * Unlock tools resource * Parameter (mf) - an opened mst device handler * Parameter (res) - resource to release. * Return TOOLS_STS_OK if all given resources were unlocked successfully. */ trm_sts trm_unlock(mfile* mf, trm_resourse res); /* * Translate tools_sem_mgmt_sts status code to a human readable string. * Parameter (status) - status code to translate. * Return descriptive string. */ const char* trm_sts2str(trm_sts status); #ifdef __cplusplus } #endif #endif // TOOLS_RESOURCE_MGMT_H mstflint-4.1.0/gitversion.sh0000755000175000017500000000023512572762670015060 0ustar mehdimehdi#!/bin/sh if git rev-parse --short HEAD > gitversion.tmp then echo "#define TOOLS_GIT_SHA \"`tr -d '\n' < gitversion.tmp`\"" > $1 fi rm gitversion.tmp mstflint-4.1.0/include/0000755000175000017500000000000012572762670013753 5ustar mehdimehdimstflint-4.1.0/include/mtcr_ul/0000755000175000017500000000000012572762670015420 5ustar mehdimehdimstflint-4.1.0/include/mtcr_ul/mtcr.h0000644000175000017500000002240612572762670016542 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #ifndef MTCR_H #define MTCR_H #ifdef __cplusplus extern "C" { #endif #include typedef enum MError { ME_OK = 0, ME_ERROR, ME_BAD_PARAMS, ME_CR_ERROR, ME_NOT_IMPLEMENTED, ME_SEM_LOCKED, ME_MEM_ERROR, ME_MAD_SEND_FAILED, ME_UNKOWN_ACCESS_TYPE, ME_UNSUPPORTED_DEVICE, ME_REG_NOT_SUPPORTED, ME_PCI_READ_ERROR, ME_PCI_WRITE_ERROR, ME_PCI_SPACE_NOT_SUPPORTED, ME_PCI_IFC_TOUT, // errors regarding REG_ACCESS ME_REG_ACCESS_OK = 0, ME_REG_ACCESS_BAD_STATUS_ERR = 0x100, ME_REG_ACCESS_BAD_METHOD, ME_REG_ACCESS_NOT_SUPPORTED, ME_REG_ACCESS_DEV_BUSY, ME_REG_ACCESS_VER_NOT_SUPP, ME_REG_ACCESS_UNKNOWN_TLV, ME_REG_ACCESS_REG_NOT_SUPP, ME_REG_ACCESS_CLASS_NOT_SUPP, ME_REG_ACCESS_METHOD_NOT_SUPP, ME_REG_ACCESS_BAD_PARAM, ME_REG_ACCESS_RES_NOT_AVLBL, ME_REG_ACCESS_MSG_RECPT_ACK, ME_REG_ACCESS_UNKNOWN_ERR, ME_REG_ACCESS_SIZE_EXCCEEDS_LIMIT, ME_REG_ACCESS_CONF_CORRUPT, ME_REG_ACCESS_LEN_TOO_SMALL, ME_REG_ACCESS_BAD_CONFIG, ME_REG_ACCESS_ERASE_EXEEDED, ME_REG_ACCESS_INTERNAL_ERROR, // errors regarding ICMD ME_ICMD_STATUS_CR_FAIL = 0x200, // cr-space access failure ME_ICMD_INVALID_OPCODE, ME_ICMD_INVALID_CMD, ME_ICMD_OPERATIONAL_ERROR, ME_ICMD_BAD_PARAM, ME_ICMD_BUSY, ME_ICMD_INIT_FAILED, ME_ICMD_NOT_SUPPORTED, ME_ICMD_STATUS_SEMAPHORE_TO, // timed out while trying to take semaphore ME_ICMD_STATUS_EXECUTE_TO, // timed out while waiting for command to execute ME_ICMD_STATUS_IFC_BUSY, ME_ICMD_STATUS_ICMD_NOT_READY, ME_ICMD_UNSUPPORTED_ICMD_VERSION, ME_ICMD_UNKNOWN_STATUS, ME_ICMD_ICM_NOT_AVAIL, ME_ICMD_WRITE_PROTECT, ME_ICMD_SIZE_EXCEEDS_LIMIT, //errors regarding Tools CMDIF ME_CMDIF_BUSY = 0x300, ME_CMDIF_TOUT, ME_CMDIF_BAD_STATUS, ME_CMDIF_BAD_OP, ME_CMDIF_NOT_SUPP, ME_CMDIF_BAD_SYS, ME_CMDIF_UNKN_TLV, ME_CMDIF_RES_STATE, ME_CMDIF_UNKN_STATUS, //errors regarding MAD IF ME_MAD_BUSY = 0x400, ME_MAD_REDIRECT, ME_MAD_BAD_VER, ME_MAD_METHOD_NOT_SUPP, ME_MAD_METHOD_ATTR_COMB_NOT_SUPP, ME_MAD_BAD_DATA, ME_MAD_GENERAL_ERR, ME_LAST } MError; typedef enum Mdevs_t { MDEVS_GAMLA = 0x01, /* Each device that actually is a Gamla */ MDEVS_I2CM = 0x02, /* Each device that can work as I2C master */ MDEVS_MEM = 0x04, /* Each device that is a memory driver (vtop) */ MDEVS_TAVOR_DDR = 0x08, /* Each device that maps to DDR */ MDEVS_TAVOR_UAR = 0x10, /* Each device that maps to UAR */ MDEVS_TAVOR_CR = 0x20, /* Each device that maps to CR */ MDEVS_IF = 0x40, /* Standard device interface */ MDEVS_REM = 0x80, /* Remote devices */ MDEVS_PPC = 0x100, /* PPC devices */ MDEVS_DEV_I2C = 0x200, /* Generic linux kernel i2c device */ MDEVS_IB = 0x400, /* Cr access over IB Mads */ MDEVS_MLNX_OS = 0x800, /* access by CmdIf in MlnxOS */ MDEVS_FWCTX = 0x900, /*access by UEFI func/context */ MDEVS_TAVOR = (MDEVS_TAVOR_DDR|MDEVS_TAVOR_UAR|MDEVS_TAVOR_CR), MDEVS_ALL = 0xffffffff } Mdevs; typedef struct mfile_t mfile; typedef enum { MACCESS_REG_METHOD_GET = 1, MACCESS_REG_METHOD_SET = 2 } maccess_reg_method_t; typedef enum { AS_ICMD = 3, AS_CR_SPACE = 2, AS_SEMAPHORE = 0xa } address_space_t; typedef struct dev_info_t { Mdevs type; char dev_name[512]; union { struct { u_int16_t domain; u_int8_t bus; u_int8_t dev; u_int8_t func; u_int16_t dev_id; u_int16_t vend_id; u_int32_t class_id; u_int16_t subsys_id; u_int16_t subsys_vend_id; char cr_dev[512]; char conf_dev[512]; char** net_devs; // Null terminated array char** ib_devs; // Null terminated array } pci; struct { u_int32_t TBD; } usb; struct { u_int32_t TBD; } ib; struct { u_int32_t TBD; } remote; }; } dev_info; typedef enum { RA_MFPA=0x9010, RA_MFBA=0x9011, RA_MFBE=0x9012, } reg_access_t; typedef enum mtcr_access_method { MTCR_ACCESS_ERROR = 0x0, MTCR_ACCESS_MEMORY = 0x1, MTCR_ACCESS_CONFIG = 0x2, MTCR_ACCESS_INBAND = 0x3 } mtcr_access_method_t; /* * Read 4 bytes, return number of succ. read bytes or -1 on failure */ int mread4(mfile *mf, unsigned int offset, u_int32_t *value); /* * Write 4 bytes, return number of succ. written bytes or -1 on failure */ int mwrite4(mfile *mf, unsigned int offset, u_int32_t value); int mread4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len); int mwrite4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len); int msw_reset(mfile *mf); int mhca_reset(mfile *mf); /* * Get list of MST (Mellanox Software Tools) devices. * Put all device names as null-terminated strings to buf. * * Return number of devices found or -1 if buf overflow */ int mdevices(char *buf, int len, int mask); /* * Get list of MST (Mellanox Software Tools) devices info records. * Return a dynamic allocated array of dev_info records. * len will be updated to hold the array length * */ dev_info* mdevices_info(int mask, int* len); void mdevice_info_destroy(dev_info* dev_info, int len); void mdevices_info_destroy(dev_info* dev_info, int len); int mget_mdevs_type(mfile *mf, u_int32_t *mtype); /* * Open Mellanox Software tools (mst) driver. Device type==INFINIHOST * Return valid mfile ptr or 0 on failure */ mfile *mopen(const char *name); mfile *mopend(const char *name, int type); mfile *mopen_fw_ctx(void* fw_cmd_context, void* fw_cmd_func, void* extra_data); /* * Close Mellanox driver * req. descriptor */ int mclose(mfile *mf); unsigned char mset_i2c_slave(mfile *mf, unsigned char new_i2c_slave); int mget_mdevs_flags(mfile *mf, u_int32_t *devs_flags); int maccess_reg_mad(mfile *mf, u_int8_t *data); int mos_reg_access(mfile *mf, int reg_access, void *reg_data, u_int32_t cmd_type); int maccess_reg_cmdif(mfile *mf, reg_access_t reg_access, void *reg_data, u_int32_t cmd_type); int maccess_reg(mfile *mf, u_int16_t reg_id, maccess_reg_method_t reg_method, void* reg_data, u_int32_t reg_size, u_int32_t r_size_reg, // used when sending via icmd interface (how much data should be read back to the user) u_int32_t w_size_reg, // used when sending via icmd interface (how much data should be written to the scratchpad) // if you dont know what you are doing then r_size_reg = w_size_reg = your_register_size int *reg_status); int icmd_send_command(mfile *mf, int opcode, void* data, int data_size, int skip_write); int icmd_clear_semaphore(mfile *mf); int tools_cmdif_send_inline_cmd(mfile* mf, u_int64_t in_param, u_int64_t* out_param, u_int32_t input_modifier, u_int16_t opcode, u_int8_t opcode_modifier); int tools_cmdif_send_mbox_command(mfile* mf, u_int32_t input_modifier, u_int16_t opcode, u_int8_t opcode_modifier, int data_offs_in_mbox, void* data, int data_size, int skip_write); int tools_cmdif_unlock_semaphore(mfile *mf); int mget_max_reg_size(mfile *mf); const char* m_err2str(MError status); int mread_buffer(mfile *mf, unsigned int offset, u_int8_t* data, int byte_len); int mwrite_buffer(mfile *mf, unsigned int offset, u_int8_t* data, int byte_len); int mget_vsec_supp(mfile* mf); int mget_addr_space(mfile* mf); int mset_addr_space(mfile* mf, int space); #ifdef __cplusplus } #endif #define DEV_MST_EXAMPLE1 "mlx4_0" #define DEV_MST_EXAMPLE2 "03:00.0" #endif mstflint-4.1.0/mlxconfig/0000755000175000017500000000000012572763040014306 5ustar mehdimehdimstflint-4.1.0/mlxconfig/mlxcfg_param_lib.h0000644000175000017500000006003412572762670017760 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #ifndef MLXCFG_PARAM_LIB_H_ #define MLXCFG_PARAM_LIB_H_ #include #include #include #include #include #define MLXCFG_UNKNOWN 0xffffffff #define WOL_TYPE 0x10 #define SRIOV_TYPE 0x11 #define VPI_TYPE 0x12 #define BAR_SIZE_TYPE 0x13 #define PCI_SETTINGS_TYPE 0x80 #define PCI_CAPABILITES_TYPE 0x81 #define TPT_SETTINGS_TYPE 0x82 #define TPT_CAPABILITES_TYPE 0x83 #define PREBOOT_BOOT_SETTINGS_TYPE 0x2021 #define INFINIBAND_BOOT_SETTINGS_TYPE 0x2022 #define INFINIBAND_DC_SETTINGS_TYPE 0x190 #define INFINIBAND_DC_CAPABILITIES_TYPE 0x191 #define PORT_BOOT_STATE_TYPE 0x84 #define ROCE_NEXT_PROTOCOL_TYPE 0x10 #define ROCE_CC_TYPE 0x107 #define ROCE_CC_ECN_TYPE 0x108 #define LLDP_NB_SETTINGS_TYPE 0x10a #define LLDP_NB_CAPABILITIES_TYPE 0x10b typedef enum { // SRIOV Mct_Sriov = 0, // Wake on LAN (4th gen) Mct_Wol_P1, Mct_Wol_P2, // Wake on LAN (5th gen) Mct_Wol, // VPI settings Mct_Vpi_P1, Mct_Vpi_P2, // BAR size (4th gen) Mct_Bar_Size, // PCI settings (5th gen) Mct_Pci, // TPT settings (5th gen) Mct_Tpt, // IB boot settings (4th gen) Mct_Boot_Settings_P1, Mct_Boot_Settings_P2, // IB dynamically connected (5th gen) Mct_Dc, // Port Boot State (5th gen) Mct_Boot_State_P1, Mct_Boot_State_P2, // RoCE v1.5 next protocol (5th gen) Mct_RoCE_Next_Protocol, // RoCE congestion control (5th gen) Mct_RoCE_CC_P1, Mct_RoCE_CC_P2, // RoCE congestion control ECN (5th gen) Mct_RoCE_CC_Ecn_P1, Mct_RoCE_CC_Ecn_P2, // Preboot Boot Settings (4th Gen) Mct_Preboot_Boot_Settings_P1, Mct_Preboot_Boot_Settings_P2, Mct_Last } mlxCfgType; typedef enum { // PCI settings Mcp_Sriov_En = 0, Mcp_Num_Of_Vfs, Mcp_Fpp_En, // Wake On LAN 4th Gen Port 1 Mcp_Wol_Magic_En_P1, // Wake On LAN 4th Gen Port 2 Mcp_Wol_Magic_En_P2, // Wake On LAN 5th Gen Mcp_Wol_Magic_En, // VPI settings Port 1 Mcp_Link_Type_P1, // VPI settings Port 2 Mcp_Link_Type_P2, // BAR size Mcp_Log_Bar_Size, // TPT settings Mcp_Log_Tpt_Size, // Boot Pkey Port 1 Mcp_Boot_Pkey_P1, // Boot Pkey Port 2 Mcp_Boot_Pkey_P2, // IB Dynamically connected Mcp_Log_Dcr_Hash_Table_Size, Mcp_Dcr_Lifo_Size, // Port Boot state Port 1 Mcp_Boot_State_P1, // Port Boot state Port 2 Mcp_Boot_State_P2, // RoCE v1.5 Next protocol Mcp_RoCE_Next_Protocol, // RoCE Congestion Control Parameters Port 1 Mcp_RoCE_CC_Algorithm_P1, Mcp_RoCE_CC_Prio_Mask_P1, // RoCE Congestion Control Parameters Port 2 Mcp_RoCE_CC_Algorithm_P2, Mcp_RoCE_CC_Prio_Mask_P2, // RoCE Congestion Control ECN Port 1 Mcp_Clamp_Tgt_Rate_P1, Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1, Mcp_Rpg_Time_Reset_P1, Mcp_Rpg_Byte_Reset_P1, Mcp_Rpg_Threshold_P1, Mcp_Rpg_Max_Rate_P1, Mcp_Rpg_Ai_Rate_P1, Mcp_Rpg_Hai_Rate_P1, Mcp_Rpg_Gd_P1, Mcp_Rpg_Min_Dec_Fac_P1, Mcp_Rpg_Min_Rate_P1, Mcp_Rate_To_Set_On_First_Cnp_P1, Mcp_Dce_Tcp_G_P1, Mcp_Dce_Tcp_Rtt_P1, Mcp_Rate_Reduce_Monitor_Period_P1, Mcp_Initial_Alpha_Value_P1, Mcp_Min_Time_Between_Cnps_P1, Mcp_Cnp_Dscp_P1, Mcp_Cnp_802p_Prio_P1, // RoCE Congestion Control ECN Port 2 Mcp_Clamp_Tgt_Rate_P2, Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2, Mcp_Rpg_Time_Reset_P2, Mcp_Rpg_Byte_Reset_P2, Mcp_Rpg_Threshold_P2, Mcp_Rpg_Max_Rate_P2, Mcp_Rpg_Ai_Rate_P2, Mcp_Rpg_Hai_Rate_P2, Mcp_Rpg_Gd_P2, Mcp_Rpg_Min_Dec_Fac_P2, Mcp_Rpg_Min_Rate_P2, Mcp_Rate_To_Set_On_First_Cnp_P2, Mcp_Dce_Tcp_G_P2, Mcp_Dce_Tcp_Rtt_P2, Mcp_Rate_Reduce_Monitor_Period_P2, Mcp_Initial_Alpha_Value_P2, Mcp_Min_Time_Between_Cnps_P2, Mcp_Cnp_Dscp_P2, Mcp_Cnp_802p_Prio_P2, // Preboot Boot Settings Port 1 Mcp_Boot_Option_Rom_En_P1, Mcp_Boot_Vlan_En_P1, Mcp_Boot_Retry_Cnt_P1, Mcp_Legacy_Boot_Protocol_P1, Mcp_Boot_Vlan_P1, // Preboot Boot Settings Port 2 Mcp_Boot_Option_Rom_En_P2, Mcp_Boot_Vlan_En_P2, Mcp_Boot_Retry_Cnt_P2, Mcp_Legacy_Boot_Protocol_P2, Mcp_Boot_Vlan_P2, Mcp_Last } mlxCfgParam; typedef std::pair cfgInfo; /* * Basic Param Class */ /* Adrianc: add Initialize/Open pure method that will contain all needed initializations (configuration supported defaults capabilities etc...) */ class RawCfgParams5thGen : public ErrMsg { public: RawCfgParams5thGen(){} ~RawCfgParams5thGen() {} int setRawData(const std::vector& tlvBuff); int setOnDev(mfile* mf); std::string dumpTlv(); private: int verifyTlv(); std::vector _tlvBuff; struct tools_open_nvda _nvdaTlv; }; class CfgParams : public ErrMsg { public: CfgParams(mlxCfgType t=Mct_Last, u_int32_t tlvT=0); virtual ~CfgParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; void setDevCapVec(u_int64_t v) {_devCapVec = v;} virtual void setParam(mlxCfgParam paramType, u_int32_t val) = 0; virtual u_int32_t getParam(mlxCfgParam paramType) = 0; virtual int getDefaultAndFromDev(mfile* mf); virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; void setIgnoreSoftLimits(bool val); void setIgnoreHardLimits(bool val); mlxCfgType type; u_int32_t tlvTypeIdx; protected: // param validadion methods, only checkCfg shuold be called virtual bool checkCfg(mfile* mf=NULL); virtual bool hardLimitCheck() = 0; virtual bool softLimitCheck(mfile* mf=NULL); // get default parameters for configuration (4th gen) int getDefaultParams4thGen(mfile* mf, struct tools_open_query_def_params_global* global_params); int getDefaultParams4thGen(mfile* mf, int port, struct tools_open_query_def_params_per_port* port_params); virtual void updateTlvFromClassAttr(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");} virtual void updateClassAttrFromTlv(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");} u_int64_t _devCapVec; // relevant for 4th gen devices bool _updated; // set true on get and false on set bool _ignoreSoftLimits; // soft limits checks will not be performed for configuration bool _ignoreHardLimits; // hard limits checks will not be performed }; /* * SRIOV param classes: */ class SriovParams : public CfgParams { public: SriovParams() : CfgParams(Mct_Sriov, SRIOV_TYPE) , _sriovEn(MLXCFG_UNKNOWN), _numOfVfs(MLXCFG_UNKNOWN), _maxVfs(1) {} ~SriovParams() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); protected: virtual bool hardLimitCheck(); virtual bool softLimitCheck(mfile* mf=NULL) = 0; u_int32_t _sriovEn; u_int32_t _numOfVfs; u_int32_t _maxVfs; }; class SriovParams4thGen : public SriovParams { public: SriovParams4thGen() : SriovParams() {} ~SriovParams4thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual int updateMaxVfs(mfile* mf); virtual bool softLimitCheck(mfile* mf=NULL); }; /* * WOL param classes: */ class WolParams : public CfgParams { public: WolParams() : CfgParams(Mct_Last, WOL_TYPE), _wolMagicEn(MLXCFG_UNKNOWN) {} virtual ~WolParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual void setParam(mlxCfgParam paramType, u_int32_t val) = 0; virtual u_int32_t getParam(mlxCfgParam paramType) = 0; virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; protected: virtual bool hardLimitCheck(); // Wake on magic packet (atm this is the only mode which is supported) u_int32_t _wolMagicEn; }; class WolParams4thGen : public WolParams { public: WolParams4thGen(int port) : WolParams(), _port(port) {type = _port == 1 ? Mct_Wol_P1 : Mct_Wol_P2;} ~WolParams4thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); private: int _port; }; class WolParams5thGen : public WolParams { public: WolParams5thGen() : WolParams() {type = Mct_Wol;} ~WolParams5thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: u_int32_t getTlvTypeBe(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); }; /* * VPI param classes: */ class VpiParams : public CfgParams { public: VpiParams(int port) : CfgParams(port == 1 ? Mct_Vpi_P1 : Mct_Vpi_P2, VPI_TYPE), _port(port), _linkType(MLXCFG_UNKNOWN), _defaultLinkType(MLXCFG_UNKNOWN){} ~VpiParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; protected: int getFromDevComPre(); int getFromDevComPost(MError mnvaComRC); int setOnDevComPre(bool ignoreCheck); int setOnDevComPost(MError mnvaComRC); int _port; u_int32_t _linkType; u_int32_t _defaultLinkType; // FW TLV (used when actually setting/getting the TLV from FW) std::vector _tlvBuff; struct tools_open_vpi_settings _vpiTlv; }; class VpiParams4thGen : public VpiParams { public: VpiParams4thGen(int port) : VpiParams(port){} ~VpiParams4thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual bool hardLimitCheck(); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); }; class VpiParams5thGen : public VpiParams { public: VpiParams5thGen(int port) : VpiParams(port){} ~VpiParams5thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual bool hardLimitCheck(); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: u_int32_t getTlvTypeBe(); }; /* * BAR size param classes: */ class BarSzParams : public CfgParams { public: BarSzParams() : CfgParams(Mct_Bar_Size, BAR_SIZE_TYPE) ,_maxLogBarSz(1), _logBarSz(MLXCFG_UNKNOWN) {} ~BarSzParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; protected: virtual bool hardLimitCheck(); virtual bool softLimitCheck(mfile* mf=NULL) = 0; virtual int getDefaultBarSz(mfile* mf) = 0; u_int32_t _maxLogBarSz; u_int32_t _logBarSz; }; class BarSzParams4thGen : public BarSzParams { public: BarSzParams4thGen() : BarSzParams() {} ~BarSzParams4thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool softLimitCheck(mfile* mf=NULL); virtual int getDefaultBarSz(mfile* mf); }; /* * PCI parameters Class (5thGen devices only) */ class PciParams5thGen : public CfgParams { public: PciParams5thGen() : CfgParams(Mct_Pci, PCI_SETTINGS_TYPE) , _sriovEn(MLXCFG_UNKNOWN), _numOfVfs(MLXCFG_UNKNOWN),\ _fppEn(MLXCFG_UNKNOWN), _sriovSupported(false), _maxVfsPerPf(0), _fppSupported(false),\ _userSpecifiedSRIOV(false), _userSpecifiedFPP(false){} ~PciParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); int getDefaultsAndCapabilities(mfile* mf); u_int32_t getPciSettingsTlvTypeBe(); u_int32_t getPciCapabilitiesTlvTypeBe(); u_int32_t _sriovEn; u_int32_t _numOfVfs; u_int32_t _fppEn; // defaults and capabilities bool _sriovSupported; u_int32_t _maxVfsPerPf; bool _fppSupported; // class members used for indication bool _userSpecifiedSRIOV; bool _userSpecifiedFPP; }; /* * TPT parameters Class (5thGen devices only) */ class TptParams5thGen : public CfgParams { public: TptParams5thGen() : CfgParams(Mct_Tpt, TPT_SETTINGS_TYPE) , _logMaxPayloadSize(MLXCFG_UNKNOWN), _logMaxPayloadSizeSupported(false) {} ~TptParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); int getDefaultsAndCapabilities(mfile* mf); u_int32_t getTptSettingsTlvTypeBe(); u_int32_t getTptCapabilitiesTlvTypeBe(); u_int32_t _logMaxPayloadSize; // defaults and capabilities bool _logMaxPayloadSizeSupported; }; /* * Infiniband boot settings parameter Class (4thGen devices only) */ class InfinibandBootSettingsParams4thGen : public CfgParams { public: InfinibandBootSettingsParams4thGen(int port) : CfgParams((port == 1 ? Mct_Boot_Settings_P1 : Mct_Boot_Settings_P2), INFINIBAND_BOOT_SETTINGS_TYPE) , _port(port), _bootPkey(MLXCFG_UNKNOWN) {} ~InfinibandBootSettingsParams4thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); int _port; u_int32_t _bootPkey; }; /* * Infiniband DC (Dynamically Connected) parameters Class (5thGen devices only) */ class IBDCParams5thGen : public CfgParams { public: IBDCParams5thGen() : CfgParams(Mct_Dc, INFINIBAND_DC_SETTINGS_TYPE) , _logDcrHashTableSize(MLXCFG_UNKNOWN), _dcrLifoSize(MLXCFG_UNKNOWN), _minLogDcrHashTableSize(0), _maxLogDcrHashTableSize(0), _minDcrLifoSize(0), _maxDcrLifoSize(0){} ~IBDCParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); int getDefaultsAndCapabilities(mfile* mf); u_int32_t getTlvTypeBe(); u_int32_t getDcCapabilitiesTlvTypeBe(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); u_int32_t _logDcrHashTableSize; u_int32_t _dcrLifoSize; // defaults and capabilities u_int32_t _minLogDcrHashTableSize; u_int32_t _maxLogDcrHashTableSize; u_int32_t _minDcrLifoSize; u_int32_t _maxDcrLifoSize; }; /* * Port boot state Class (5thGen devices only) */ class PortBootStateParams5thGen : public CfgParams { public: PortBootStateParams5thGen(int port) : CfgParams((port == 1 ? Mct_Boot_State_P1 : Mct_Boot_State_P2), PORT_BOOT_STATE_TYPE) , _portBootState(MLXCFG_UNKNOWN), _port(port) {} ~PortBootStateParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); u_int32_t getTlvTypeBe(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); u_int32_t _portBootState; int _port; }; /* * RoCE v1.5 next protocol Class (5thGen devices only) */ class RoCENextProtocolParams5thGen : public CfgParams { public: RoCENextProtocolParams5thGen() : CfgParams(Mct_RoCE_Next_Protocol, ROCE_NEXT_PROTOCOL_TYPE) , _nextProtocol(MLXCFG_UNKNOWN) {} ~RoCENextProtocolParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); u_int32_t getTlvTypeBe(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); u_int32_t _nextProtocol; }; /* * RoCE CC parameters Class (5thGen devices only) */ class RoCECCParams5thGen : public CfgParams { public: RoCECCParams5thGen(int port) : CfgParams((port == 1 ? Mct_RoCE_CC_P1 : Mct_RoCE_CC_P2), ROCE_CC_TYPE), _port(port), _roceCcAlgorithm(MLXCFG_UNKNOWN), _roceCcPrioMask(MLXCFG_UNKNOWN) {} ~RoCECCParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); u_int32_t getTlvTypeBe(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); int _port; u_int32_t _roceCcAlgorithm; u_int32_t _roceCcPrioMask; }; /* * RoCE CC ECN parameters Class (5thGen devices only) */ class RoCECCEcnParams5thGen : public CfgParams { public: RoCECCEcnParams5thGen(int port) : CfgParams((port == 1 ? Mct_RoCE_CC_Ecn_P1 : Mct_RoCE_CC_Ecn_P2), ROCE_CC_ECN_TYPE), _port(port), _clampTgtRate(MLXCFG_UNKNOWN), _clampTgtRateAfterTimeInc(MLXCFG_UNKNOWN), _rpgTimeReset(MLXCFG_UNKNOWN), _rpgByteReset(MLXCFG_UNKNOWN), _rpgThreshold(MLXCFG_UNKNOWN), _rpgMaxRate(MLXCFG_UNKNOWN), _rpgAiRate(MLXCFG_UNKNOWN), _rpgHaiRate(MLXCFG_UNKNOWN), _rpgGd(MLXCFG_UNKNOWN), _rpgMinDecFac(MLXCFG_UNKNOWN), _rpgMinRate(MLXCFG_UNKNOWN), _rateToSetOnFirstCnp(MLXCFG_UNKNOWN), _dceTcpG(MLXCFG_UNKNOWN), _dceTcpRtt(MLXCFG_UNKNOWN), _rateReduceMonitorPeriod(MLXCFG_UNKNOWN), _initialAlphaValue(MLXCFG_UNKNOWN), _minTimeBetweenCnps(MLXCFG_UNKNOWN), _cnpDscp(MLXCFG_UNKNOWN), _cnp802pPrio(MLXCFG_UNKNOWN){}; ~RoCECCEcnParams5thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); u_int32_t getTlvTypeBe(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); int _port; u_int32_t _clampTgtRate; u_int32_t _clampTgtRateAfterTimeInc; u_int32_t _rpgTimeReset; u_int32_t _rpgByteReset; u_int32_t _rpgThreshold; u_int32_t _rpgMaxRate; u_int32_t _rpgAiRate; u_int32_t _rpgHaiRate; u_int32_t _rpgGd; u_int32_t _rpgMinDecFac; u_int32_t _rpgMinRate; u_int32_t _rateToSetOnFirstCnp; u_int32_t _dceTcpG; u_int32_t _dceTcpRtt; u_int32_t _rateReduceMonitorPeriod; u_int32_t _initialAlphaValue; u_int32_t _minTimeBetweenCnps; u_int32_t _cnpDscp; u_int32_t _cnp802pPrio; }; /* * Preboot Boot Settings Class (4thGen devices only) */ class PrebootBootSettingsParams4thGen : public CfgParams { public: PrebootBootSettingsParams4thGen(int port) : CfgParams((port == 1 ? Mct_Preboot_Boot_Settings_P1 : Mct_Preboot_Boot_Settings_P2), PREBOOT_BOOT_SETTINGS_TYPE), _bootOptionRomEn(MLXCFG_UNKNOWN), _bootVlanEn(MLXCFG_UNKNOWN), _bootRetryCnt(MLXCFG_UNKNOWN), _legacyBootProtocol(MLXCFG_UNKNOWN), _bootVlan(MLXCFG_UNKNOWN), _port(port) {} ~PrebootBootSettingsParams4thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); u_int32_t _bootOptionRomEn; u_int32_t _bootVlanEn; u_int32_t _bootRetryCnt; u_int32_t _legacyBootProtocol; u_int32_t _bootVlan; int _port; }; #endif /* MLXCFG_PARAM_LIB_H_ */ mstflint-4.1.0/mlxconfig/mlxcfg_param_lib.cpp0000644000175000017500000023350712572762670020322 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #include #include #include #include #include #include #include #include #include #include #include "mlxcfg_param_lib.h" #include "mlxcfg_status.h" enum { SRIOV_MASK = 0x1, WOL_P1_MASK = 0x2, WOL_P2_MASK = 0x4 , VPI_P1_MASK = 0x8, VPI_P2_MASK = 0x10, BAR_SZ_MASK = 0x20 }; // tlv classes: enum { CLASS_GLOBAL = 0x0, CLASS_PHYS_PORT = 0x1, CLASS_BMC = 0x2, CLASS_PER_HOST = 0x3, CLASS_ESWITCH = 0x4 }; #define MAX_VFS_ADDR 0x38 #define MAX_BAR_SZ_ADDR 0xc8 #define DEFAULT_BAR_SZ_ADDR 0x48 /* * Debug print MACRO of the NV Tlvs: */ //#define _ENABLE_DEBUG_ #ifdef _ENABLE_DEBUG_ # define DEBUG_PRINT_SEND(data_struct, struct_name)\ printf("-I- Data Sent:\n");\ tools_open_##struct_name##_print(data_struct, stdout, 1) # define DEBUG_PRINT_RECIEVE(data_struct, struct_name)\ printf("-I- Data Recieved:\n");\ tools_open_##struct_name##_print(data_struct, stdout, 1) #else # define DEBUG_PRINT_SEND(data_struct, struct_name) # define DEBUG_PRINT_RECIEVE(data_struct, struct_name) #endif #define CHECK_RC(rc)\ if (rc) return rc; /* * Macros for getting and settings a TLV */ // TODO: adrianc: add macro for nvqc tlv and use it in cfgSupported for 5th gen Tlvs /* * Macros Below rely on the fact that the user has implemented within the parameter class: * void updateClassAttrFromTlv(void*); * void updateTLVFromClassAttr(void*); * * those method do what they imply: update the class internal memeber from TLV and via versa. */ #define SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tlvStructName, tlvNameStr) \ MError __mRc;\ if (!(ignoreCheck) && !checkCfg()) {\ return MCE_BAD_PARAMS;\ }\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ __mRc = mnvaCom5thGen(mf, __tlvBuff, __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET);\ if (__mRc && __mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, __tlvBuff);\ updateTlvFromClassAttr((void*)&__tlvStruct);\ tlvStructName##_pack(&__tlvStruct, __tlvBuff);\ __mRc = mnvaCom5thGen(mf, __tlvBuff, __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_SET);\ if (__mRc) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ _updated = false;\ return MCE_SUCCESS #define GET_FROM_DEV_5TH_GEN(mf, tlvStructName, tlvNameStr) \ MError __mRc;\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ if (_updated) {\ return MCE_SUCCESS;\ }\ __mRc = mnvaCom5thGen(mf, &__tlvBuff[0], __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET);\ if (__mRc) {\ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\ return MCE_SUCCESS;\ }\ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\ updateClassAttrFromTlv((void*)&__tlvStruct);\ _updated = true;\ return MCE_SUCCESS #define SET_ON_DEV_4TH_GEN(mf, ignoreCheck, tlvStructName, tlvNameStr, typeMod) \ MError __mRc;\ if (!(ignoreCheck) && !checkCfg()) {\ return MCE_BAD_PARAMS;\ }\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ __mRc = mnvaCom4thGen(mf, __tlvBuff, __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_GET, typeMod);\ if (__mRc && __mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, __tlvBuff);\ updateTlvFromClassAttr((void*)&__tlvStruct);\ tlvStructName##_pack(&__tlvStruct, __tlvBuff);\ __mRc = mnvaCom4thGen(mf, __tlvBuff, __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_SET, typeMod);\ if (__mRc) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ _updated = false;\ return MCE_SUCCESS #define GET_FROM_DEV_4TH_GEN(mf, tlvStructName, tlvNameStr, typeMod) \ MError __mRc;\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ if (_updated) {\ return MCE_SUCCESS;\ }\ __mRc = mnvaCom4thGen(mf, &__tlvBuff[0], __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_GET, typeMod);\ if (__mRc) {\ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\ return MCE_SUCCESS;\ }\ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\ updateClassAttrFromTlv((void*)&__tlvStruct);\ _updated = true;\ return MCE_SUCCESS static void dealWithSignal() { int sig; sig = mft_signal_is_fired(); if (sig) { // reset recieved signal mft_signal_set_fired(0); // retore prev handler mft_signal_set_handling(0); //raise signal to let the previous handle deal with it. raise(sig); } mft_signal_set_handling(0); return; } /* * Adrianc: TODO: create a SetTlv class and two child classess , for 4th/5th gen. * each param class will have an instance of SetTlv class */ MError mnvaCom4thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int16_t tlvTypeIdx, reg_access_method_t method, u_int16_t typeMod) { struct tools_open_mnva mnvaTlv; memset(&mnvaTlv, 0, sizeof(struct tools_open_mnva)); mnvaTlv.nv_hdr.length = len >> 2; // length is in dwords mnvaTlv.nv_hdr.type = tlvTypeIdx; mnvaTlv.nv_hdr.type_mod = typeMod; memcpy(mnvaTlv.data, buff, len); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_mnva(mf, method, &mnvaTlv); dealWithSignal(); if (rc) { return rc; } memcpy(buff, mnvaTlv.data, len); return ME_OK; } MError mnvaCom5thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int32_t tlvType, reg_access_method_t method) { struct tools_open_nvda mnvaTlv; memset(&mnvaTlv, 0, sizeof(struct tools_open_nvda)); mnvaTlv.nv_hdr.length = len; mnvaTlv.nv_hdr.rd_en = 0; mnvaTlv.nv_hdr.over_en = 1; // tlvType should be in the correct endianess mnvaTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); memcpy(mnvaTlv.data, buff, len); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); DEBUG_PRINT_SEND(&mnvaTlv, nvda); rc = reg_access_nvda(mf, method, &mnvaTlv); DEBUG_PRINT_RECIEVE(&mnvaTlv, nvda); dealWithSignal(); if (rc) { return rc; } memcpy(buff, mnvaTlv.data, len); return ME_OK; } MError nvqcCom5thGen(mfile* mf, u_int32_t tlvType, bool& suppRead, bool& suppWrite) { struct tools_open_nvqc nvqcTlv; memset(&nvqcTlv, 0, sizeof(struct tools_open_nvqc)); // tlvType should be in the correct endianess nvqcTlv.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_nvqc(mf, REG_ACCESS_METHOD_GET, &nvqcTlv); dealWithSignal(); if (rc) { return rc; } suppRead = nvqcTlv.support_rd; suppWrite = nvqcTlv.support_wr; return ME_OK; } /*************************** * Class implementations : ***************************/ /* * RawCfgParams5thGen Class implementation */ int RawCfgParams5thGen::setRawData(const std::vector& tlvBuff) { _tlvBuff = tlvBuff; memset(&_nvdaTlv, 0, sizeof(struct tools_open_nvda)); std::vector tlvBuffBe = _tlvBuff; for (std::vector::iterator it = tlvBuffBe.begin(); it != tlvBuffBe.end(); it++ ) { *it = __cpu_to_be32(*it); } tools_open_nvda_unpack(&_nvdaTlv, ((u_int8_t*)(&tlvBuffBe[0]))); return verifyTlv(); } int RawCfgParams5thGen::setOnDev(mfile* mf) { int rc; mft_signal_set_handling(1); DEBUG_PRINT_SEND(&_nvdaTlv, nvda); rc = reg_access_nvda(mf, REG_ACCESS_METHOD_SET, &_nvdaTlv); DEBUG_PRINT_RECIEVE(&_nvdaTlv, nvda); dealWithSignal(); if (rc) { return errmsg("Failed to set raw TLV: %s", m_err2str((MError)rc)); } return MCE_SUCCESS; } std::string RawCfgParams5thGen::dumpTlv() { char str[1024] = {0}; snprintf(str, 1024, "Length: 0x%x\nVersion: %d\nOverrideEn: %d\nType: 0x%08x\nData: ", _nvdaTlv.nv_hdr.length,\ _nvdaTlv.nv_hdr.version, _nvdaTlv.nv_hdr.over_en, _nvdaTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw); for (size_t i=3; i < _tlvBuff.size(); i++) { char numStr[64] = {0}; snprintf(numStr, 64, "0x%08x ", _tlvBuff[i]); strcat(str, numStr); } strcat(str, "\n"); return str; } int RawCfgParams5thGen::verifyTlv() { // check TLV length int tlvLength = (_tlvBuff.size() - 3) << 2; if (tlvLength != _nvdaTlv.nv_hdr.length) { return errmsg(MCE_BAD_PARAM_VAL, "TLV size mismatch. reported length in TLV header: 0x%x. actual length: 0x%x", _nvdaTlv.nv_hdr.length, tlvLength); } return MCE_SUCCESS; } /* * CfgParams Class implementation : */ CfgParams::CfgParams(mlxCfgType t, u_int32_t tlvT) { // init the ErrMsg Class std::map errmap; errmap[MCE_SUCCESS] = "Success"; errmap[MCE_FAILED] = "General Failure"; errmap[MCE_BAD_PARAMS] = "Bad parameters"; errmap[MCE_BAD_PARAM_VAL] = "Bad parameter value"; errmap[MCE_BAD_STATUS] = "General Failure"; errmap[MCE_GET_DEFAULT_PARAMS] = "Failed to get default params"; updateErrCodes(errmap); type = t; tlvTypeIdx = tlvT; _updated = false; _ignoreHardLimits = false; _ignoreSoftLimits = false; _devCapVec = 0; } int CfgParams::getDefaultParams4thGen(mfile* mf, struct tools_open_query_def_params_global* global_params) { MError rc = tcif_query_global_def_params(mf, global_params); if (rc) { return errmsg(MCE_BAD_STATUS, "Failed to get default parameters: %s", tcif_err2str(rc)); } return MCE_SUCCESS; } int CfgParams::getDefaultParams4thGen(mfile* mf, int port, struct tools_open_query_def_params_per_port* port_params) { MError rc = tcif_query_per_port_def_params(mf, port, port_params); if (rc) { return errmsg(MCE_BAD_STATUS, "Failed to get default parameters: %s", tcif_err2str(rc)); } return MCE_SUCCESS; } int CfgParams::getDefaultAndFromDev(mfile* mf) { int rc; rc = getDefaultParams(mf); CHECK_RC(rc); rc = getFromDev(mf); CHECK_RC(rc); return MCE_SUCCESS; } bool CfgParams::checkCfg(mfile* mf) { if (!_ignoreHardLimits && !hardLimitCheck()) { return false; } if (!_ignoreSoftLimits && !softLimitCheck(mf)) { return false; } return true; } bool CfgParams::softLimitCheck(mfile* mf) { // by default not implemented (void)mf; return true; } void CfgParams::setIgnoreSoftLimits(bool val) { _ignoreSoftLimits = val; } void CfgParams::setIgnoreHardLimits(bool val) { _ignoreHardLimits = val; } /* * SriovParam Class implementation: */ void SriovParams::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Sriov_En) { _sriovEn = val; } else if (paramType == Mcp_Num_Of_Vfs) { _numOfVfs = val; } } u_int32_t SriovParams::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Sriov_En) { return _sriovEn; } else if (paramType == Mcp_Num_Of_Vfs) { return _numOfVfs; } return MLXCFG_UNKNOWN; } bool SriovParams::hardLimitCheck() { if ((_numOfVfs > _maxVfs)) { errmsg("Number of VFs exceeds limit (%d).", _maxVfs); return false; } if (_sriovEn != 0 && _sriovEn != 1) { errmsg("illegal SRIOV_EN parameter value. (should be 0 or 1)"); return false; } return true; } /* * SriovParam4thGen Class implementation */ bool SriovParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return _devCapVec & SRIOV_MASK; } int SriovParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_global global_params; int rc; rc = updateMaxVfs(mf); CHECK_RC(rc); rc = getDefaultParams4thGen(mf, &global_params); if (rc == MCE_SUCCESS) { _sriovEn = global_params.sriov_en; _numOfVfs = global_params.num_vfs; } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } int SriovParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_sriov_size()]; struct tools_open_sriov sriovTlv; memset(buff, 0, tools_open_sriov_size()); memset(&sriovTlv, 0, sizeof(struct tools_open_sriov)); // pack it tools_open_sriov_pack(&sriovTlv, buff); // send it DEBUG_PRINT_SEND(&sriovTlv, sriov); rc = mnvaCom4thGen(mf, buff, tools_open_sriov_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, 0); // check rc DEBUG_PRINT_RECIEVE(&sriovTlv, sriov); if (rc) {// when attempting to get a nv_cfg tlv from device ME_REG_ACCESS_RES_NOT_AVLBL means - no valid // tlv found. i.e default configuration are on. if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg(MCE_BAD_STATUS, "Failed to get SRIOV configuration: %s", m_err2str(rc)); } // unpack and update tools_open_sriov_unpack(&sriovTlv, buff); _sriovEn = sriovTlv.sriov_en; _numOfVfs = sriovTlv.total_vfs; _updated = true; return MCE_SUCCESS; } int SriovParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_sriovEn == MLXCFG_UNKNOWN || _numOfVfs == MLXCFG_UNKNOWN) { return errmsg("%s please specify all parameters for SRIOV.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg(mf)) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_sriov_size()]; struct tools_open_sriov sriovTlv; memset(buff, 0, tools_open_sriov_size()); memset(&sriovTlv, 0, sizeof(struct tools_open_sriov)); sriovTlv.sriov_en = _sriovEn; sriovTlv.total_vfs = _numOfVfs; // pack it tools_open_sriov_pack(&sriovTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_sriov_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, 0); // check rc if (ret) { return errmsg("failed to set SRIOV params: %s",m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } int SriovParams4thGen::updateMaxVfs(mfile* mf) { u_int64_t data = 0; int rc = tcif_query_dev_cap(mf, MAX_VFS_ADDR, &data); if (rc) { return errmsg("failed to query device capabilities: %s", m_err2str((MError)rc)); } _maxVfs = (u_int32_t)(data & 0xff); if (_maxVfs == 0) { // defined in CX PRM , if max_func_idx=0 then all functions(128) are operational _maxVfs = 128; } _maxVfs--; // remove 1 physical function return MCE_SUCCESS; } bool SriovParams4thGen::softLimitCheck(mfile* mf) { u_int32_t barSz = 0; BarSzParams4thGen barParams; if (!mf) { return false; } if (barParams.getDefaultAndFromDev(mf)) { return false; } if (_sriovEn == 0) { return true; } barSz = barParams.getParam(Mcp_Log_Bar_Size); if (barSz == MLXCFG_UNKNOWN) { return errmsg("Failed to get the bar size from device"); } // this is the default log2 bar size , we require (numOfVfs+1)*(2^log_uar_bar) <= 512 or else the node might not boot double TotalMem = (_numOfVfs + 1)*(1 << barSz); // 1 for physical func if ((TotalMem > 512)){ unsigned int maxAlowedVfs =static_cast(512/(1 << barSz)) - 1; errmsg("illegal SRIOV parameter value. Maximal number of VFs: %d", maxAlowedVfs < _maxVfs ? maxAlowedVfs : _maxVfs); return false; } return true; } /* * WolParams Class implementation : */ bool WolParams::hardLimitCheck() { if (_wolMagicEn == 0 || _wolMagicEn == 1 ) { return true; } errmsg("illegal WOL parameter value. can be either 0 or 1."); return false; } /* * WolParams4thGen Class implementation : */ void WolParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2) ) { _wolMagicEn = val; } } u_int32_t WolParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2)) { return _wolMagicEn; } return MLXCFG_UNKNOWN; } bool WolParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return ((_devCapVec & WOL_P1_MASK) && _port == 1) || ((_devCapVec & WOL_P2_MASK) && _port == 2 ); } int WolParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port port_params; int rc = getDefaultParams4thGen(mf, _port , &port_params); if (rc == MCE_SUCCESS) { _wolMagicEn = port_params.default_en_wol_magic; } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } int WolParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_wol_size()]; struct tools_open_wol wolTlv; memset(buff, 0, tools_open_wol_size()); memset(&wolTlv, 0, sizeof(struct tools_open_wol)); // pack it tools_open_wol_pack(&wolTlv, buff); // send it rc = mnvaCom4thGen(mf, buff, tools_open_wol_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); // check rc if (rc) { if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get WOL port%d configuration: %s", _port, m_err2str(rc)); } // unpack and update tools_open_wol_unpack(&wolTlv, buff); _wolMagicEn = wolTlv.en_wol_magic; _updated = true; return MCE_SUCCESS; } int WolParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_wolMagicEn == MLXCFG_UNKNOWN) { return errmsg("%s please specify all the parameters for WOL.", err()? err() : ""); } if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_wol_size()]; struct tools_open_wol wolTlv; memset(buff, 0, tools_open_wol_size()); memset(&wolTlv, 0, sizeof(struct tools_open_wol)); wolTlv.en_wol_magic= _wolMagicEn; // pack it tools_open_wol_pack(&wolTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_wol_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); // check rc if (ret) { return errmsg("failed to set WOL params for port%d: %s", _port, m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } /* * WolParams5thGen Class implementation : */ void WolParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Wol_Magic_En ) { _wolMagicEn = val; } } u_int32_t WolParams5thGen::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Wol_Magic_En) { return _wolMagicEn; } return MLXCFG_UNKNOWN; } bool WolParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get Wake On LAN parameter capabilities. %s", m_err2str(rc)); return false; } return (suppRead && suppWrite); } int WolParams5thGen::getDefaultParams(mfile* mf) { return getFromDev(mf); } int WolParams5thGen::getFromDev(mfile* mf) { GET_FROM_DEV_5TH_GEN(mf, tools_open_wol, "Wake On LAN"); } int WolParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_wol, "Wake On LAN"); } u_int32_t WolParams5thGen::getTlvTypeBe() { struct tools_open_per_host_type type; u_int32_t tlvType = 0; type.param_class = CLASS_PER_HOST; type.param_idx = tlvTypeIdx; type.function = 0; // currently support only host 0 (FW should fill this field with correct func) type.host = 0; // currently support only host 0 (FW should fill this field with correct host) tools_open_per_host_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } void WolParams5thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_wol* wolTlv = (struct tools_open_wol*)tlv; wolTlv->en_wol_magic = _wolMagicEn; return; } void WolParams5thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_wol* wolTlv = (struct tools_open_wol*)tlv; _wolMagicEn = wolTlv->en_wol_magic; return; } /* * BarSzParams Class implementation : */ void BarSzParams::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Log_Bar_Size) { _logBarSz = val; } } u_int32_t BarSzParams::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Log_Bar_Size) { return _logBarSz; } return MLXCFG_UNKNOWN; } bool BarSzParams::hardLimitCheck() { if (_logBarSz > _maxLogBarSz ) { errmsg("given bar size is too large, max allowed log2 bar size: 0x%x", _maxLogBarSz); return false; } return true; } /* * BarSzParams4thGen Class implementation : */ bool BarSzParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return _devCapVec & BAR_SZ_MASK ; } int BarSzParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_global global_params; int rc = getDefaultParams4thGen(mf, &global_params); if ((rc == MCE_SUCCESS) & 0) { //TODO: adrianc: remove the & 0 when FW displays thesee parameters correctly in QUERY_DEF_PARAMS command _logBarSz = global_params.uar_bar_size; _maxLogBarSz = global_params.max_uar_bar_size; } else { // attempt to take from query_dev_cap rc = getDefaultBarSz(mf); } return rc; } int BarSzParams4thGen::getDefaultBarSz(mfile* mf) { u_int64_t data = 0; MError rc = tcif_query_dev_cap(mf, MAX_BAR_SZ_ADDR, &data); if (rc) { return errmsg(MCE_BAD_STATUS,"Failed to query device capabilities. %s", tcif_err2str(rc)); } _maxLogBarSz = EXTRACT64(data, 3, 6); rc = tcif_query_dev_cap(mf, DEFAULT_BAR_SZ_ADDR, &data); if (rc) { return errmsg(MCE_BAD_STATUS,"Failed to query device capabilities. %s", tcif_err2str(rc)); } _logBarSz = EXTRACT64(data, 16, 6) + 1; //adrianc: this field reports only half of the bar size (i.e without the blue flame) return MCE_SUCCESS; } int BarSzParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_bar_size_size()]; struct tools_open_bar_size barSzTlv; memset(buff, 0, tools_open_bar_size_size()); memset(&barSzTlv, 0, sizeof(struct tools_open_bar_size)); // pack it tools_open_bar_size_pack(&barSzTlv, buff); // send it rc = mnvaCom4thGen(mf, buff, tools_open_bar_size_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, 0); // check rc if (rc) { if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get BAR size configuration: %s", m_err2str(rc)); } // unpack and update tools_open_bar_size_unpack(&barSzTlv, buff); _logBarSz = barSzTlv.log_uar_bar_size; _updated = true; return MCE_SUCCESS; } int BarSzParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_logBarSz == MLXCFG_UNKNOWN) { return errmsg("%s please specify all the parameters for BAR size.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg(mf)) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_bar_size_size()]; struct tools_open_bar_size barSzTlv; memset(buff, 0, tools_open_bar_size_size()); memset(&barSzTlv, 0, sizeof(struct tools_open_bar_size)); barSzTlv.log_uar_bar_size= _logBarSz; // pack it tools_open_bar_size_pack(&barSzTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_bar_size_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, 0); // check rc if (ret) { return errmsg("failed to set BAR size params: %s",m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } bool BarSzParams4thGen::softLimitCheck(mfile* mf) { u_int32_t numOfVfs = 0; int sriovEn; SriovParams4thGen sriovParams; if (!mf) { return false; } if (sriovParams.getDefaultAndFromDev(mf)) { errmsg("Failed to get SRIOV parameters from device: %s", sriovParams.err()); return false; } numOfVfs = sriovParams.getParam(Mcp_Num_Of_Vfs); sriovEn = sriovParams.getParam(Mcp_Sriov_En); if (numOfVfs== MLXCFG_UNKNOWN || numOfVfs == MLXCFG_UNKNOWN) { errmsg("Illegal SRIOV parameters values"); return false; } if (sriovEn == 0) { return true; } // this is the default log2 bar size , we require numOfVfs*(2^log_uar_bar) <= 512 or else the node might not boot double TotalMem = (numOfVfs+1)*(1 << _logBarSz); //printf("-D- num_of_vfs*2^(bar_sz+1) = %d*2^%ld = %d\n", _numOfVfs, data, (int)(_numOfVfs*(std::pow((double)2, (int)data)))); //printf("-D- maxVfs(default set by fw) : %d\n", _maxVfs); if (TotalMem > 512){ unsigned int maxAlowedLogBarSz =static_cast(log2((512/(numOfVfs + 1 )))); errmsg("illegal Bar Size parameter value. Maximal allowed bar size: %d", maxAlowedLogBarSz < _maxLogBarSz ? maxAlowedLogBarSz : _maxLogBarSz); return false; } return true; } /* * VpiParams Class implementation : */ int VpiParams::getFromDevComPre() { // prep tlv _tlvBuff.resize(TOOLS_OPEN_VPI_SETTINGS_SIZE); memset(&_tlvBuff[0], 0, TOOLS_OPEN_VPI_SETTINGS_SIZE); memset(&_vpiTlv, 0, sizeof(struct tools_open_vpi_settings)); // pack it tools_open_vpi_settings_pack(&_vpiTlv, &_tlvBuff[0]); return MCE_SUCCESS; } int VpiParams::getFromDevComPost(MError mnvaComRC) { if (mnvaComRC) { if (mnvaComRC == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get VPI port%d configuration: %s", _port, m_err2str(mnvaComRC)); } // unpack and update tools_open_vpi_settings_unpack(&_vpiTlv, &_tlvBuff[0]); _linkType = _vpiTlv.network_link_type; _defaultLinkType = _vpiTlv.default_link_type; _updated = true; return MCE_SUCCESS; } int VpiParams::setOnDevComPre(bool ignoreCheck) { if (_linkType == MLXCFG_UNKNOWN || _defaultLinkType == MLXCFG_UNKNOWN) { return errmsg("%s please specify all the parameters for VPI settings.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } _tlvBuff.resize(TOOLS_OPEN_VPI_SETTINGS_SIZE); memset(&_tlvBuff[0], 0, _tlvBuff.size()); memset(&_vpiTlv, 0, sizeof(struct tools_open_vpi_settings)); _vpiTlv.network_link_type = _linkType; _vpiTlv.default_link_type = _defaultLinkType; // pack it tools_open_vpi_settings_pack(&_vpiTlv, &_tlvBuff[0]); return MCE_SUCCESS; } int VpiParams::setOnDevComPost(MError mnvaComRC) { if (mnvaComRC) { return errmsg("failed to set VPI port%d params: %s", _port, m_err2str(mnvaComRC)); } _updated = false; return MCE_SUCCESS; } /* * VpiParams4thGen Class implementation : */ void VpiParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2) ) { _linkType = val; } } u_int32_t VpiParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2) ) { return _linkType; } return MLXCFG_UNKNOWN; } bool VpiParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return ((_devCapVec & VPI_P1_MASK) && _port == 1) || ((_devCapVec & VPI_P2_MASK) && _port == 2); } int VpiParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port port_params; _defaultLinkType = 0; // not used for 4th gen devices , we give it a default value int rc = getDefaultParams4thGen(mf, _port , &port_params); if (rc) { return MCE_GET_DEFAULT_PARAMS; } if (port_params.default_network_link_type) { _linkType = port_params.default_network_link_type; } return MCE_SUCCESS; } int VpiParams4thGen::getFromDev(mfile* mf) { MError mRc; int rc; if (_updated) { return MCE_SUCCESS; } if((rc = getFromDevComPre())) { return rc; } mRc = mnvaCom4thGen(mf, &_tlvBuff[0], TOOLS_OPEN_VPI_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); return getFromDevComPost(mRc); } int VpiParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; int rc; if ((rc = setOnDevComPre(ignoreCheck))) { return rc; } mRc = mnvaCom4thGen(mf, &_tlvBuff[0], TOOLS_OPEN_VPI_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); return setOnDevComPost(mRc); } bool VpiParams4thGen::hardLimitCheck() { if (_linkType == 1 || _linkType == 2 || _linkType == 3 ) { return true; } errmsg("illegal VPI link type (should be 1|2|3)."); return false; } /* * VpiParams5thGen Class implementation : */ void VpiParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2) ) { _defaultLinkType = val; } } u_int32_t VpiParams5thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2) ) { return _defaultLinkType; } return MLXCFG_UNKNOWN; } u_int32_t VpiParams5thGen::getTlvTypeBe() { struct tools_open_per_port_type type; u_int32_t tlvType = 0; type.param_class = CLASS_PHYS_PORT; type.param_idx = tlvTypeIdx; type.port = _port; tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } bool VpiParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { // get mtcr functions for this device (physical) // compare with port // send nvqc and check (void)param; MError rc; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get VPI params capabilites. %s", m_err2str(rc)); return false; } return suppRead && suppWrite; } int VpiParams5thGen::getDefaultParams(mfile* mf) { // if configuration is supported then network link type must be 3 _linkType = 3; return getFromDev(mf); } int VpiParams5thGen::getFromDev(mfile* mf) { MError mRc; int rc; if (_updated) { return MCE_SUCCESS; } if((rc = getFromDevComPre())) { return rc; } mRc = mnvaCom5thGen(mf, &_tlvBuff[0], TOOLS_OPEN_VPI_SETTINGS_SIZE, getTlvTypeBe(), REG_ACCESS_METHOD_GET); return getFromDevComPost(mRc); } int VpiParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; int rc; if ((rc = setOnDevComPre(ignoreCheck))) { return rc; } mRc = mnvaCom5thGen(mf, &_tlvBuff[0], TOOLS_OPEN_VPI_SETTINGS_SIZE, getTlvTypeBe(), REG_ACCESS_METHOD_SET); return setOnDevComPost(mRc); } bool VpiParams5thGen::hardLimitCheck() { if (_defaultLinkType == 1 || _defaultLinkType == 2 ) { return true; } errmsg("illegal VPI link type (should be 1|2)."); return false; } /* * PciParams5thGen Class implementation: */ bool PciParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getPciCapabilitiesTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get PCI capabilities parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead) { return false; } if (getDefaultsAndCapabilities(mf) != MCE_SUCCESS) { return false; } rc = nvqcCom5thGen(mf, getPciSettingsTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get PCI settings parameter capabilities. %s", m_err2str(rc)); return false; } if (!(suppRead && suppWrite)) { return false; } switch(param) { case Mcp_Sriov_En: case Mcp_Num_Of_Vfs: return _sriovSupported; case Mcp_Fpp_En: return _fppSupported; case Mcp_Last: return (_sriovSupported && _fppSupported); default: return false; } } void PciParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Sriov_En) { _sriovEn = val; _userSpecifiedSRIOV = true; } else if (paramType == Mcp_Num_Of_Vfs) { _numOfVfs = val; _userSpecifiedSRIOV = true; } else if (paramType == Mcp_Fpp_En) { _fppEn = val; _userSpecifiedFPP = true; } } u_int32_t PciParams5thGen::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Sriov_En) { return _sriovEn; } else if (paramType == Mcp_Num_Of_Vfs) { return _numOfVfs; } else if (paramType == Mcp_Fpp_En) { return _fppEn; } return MLXCFG_UNKNOWN; } int PciParams5thGen::getFromDev(mfile* mf) { MError mRc; u_int8_t tlvBuff[TOOLS_OPEN_PCI_CONFIGURATION_SIZE] = {0}; struct tools_open_pci_configuration pciSettingsTlv; memset(&pciSettingsTlv, 0, sizeof(pciSettingsTlv)); if (_updated) { return MCE_SUCCESS; } mRc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_PCI_CONFIGURATION_SIZE, getPciSettingsTlvTypeBe(), REG_ACCESS_METHOD_GET); if (mRc) { if (mRc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get PCI configuration: %s", m_err2str(mRc)); } // unpack and update tools_open_pci_configuration_unpack(&pciSettingsTlv, &tlvBuff[0]); if (pciSettingsTlv.sriov_valid) { _sriovEn = pciSettingsTlv.sriov_en; _numOfVfs = pciSettingsTlv.total_vfs; } if (pciSettingsTlv.fpp_valid) { _fppEn = pciSettingsTlv.fpp_en; } _updated = true; return MCE_SUCCESS; } int PciParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } // get Tlv modify it and set it u_int8_t tlvBuff[TOOLS_OPEN_PCI_CONFIGURATION_SIZE] = {0}; struct tools_open_pci_configuration pciSettingsTlv; memset(&pciSettingsTlv, 0, sizeof(pciSettingsTlv)); mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_PCI_CONFIGURATION_SIZE, getPciSettingsTlvTypeBe(), REG_ACCESS_METHOD_GET); if (mRc && mRc != ME_REG_ACCESS_RES_NOT_AVLBL) { return errmsg("failed to set PCI settings: %s", m_err2str(mRc)); } tools_open_pci_configuration_unpack(&pciSettingsTlv, tlvBuff); if (_sriovSupported && _userSpecifiedSRIOV) { if (_sriovEn == MLXCFG_UNKNOWN || _numOfVfs == MLXCFG_UNKNOWN) { return errmsg("please specify all parameters for SRIOV."); } pciSettingsTlv.sriov_valid = 1; pciSettingsTlv.sriov_en = _sriovEn; pciSettingsTlv.total_vfs = _numOfVfs; } if (_fppSupported && _userSpecifiedFPP) { pciSettingsTlv.fpp_en = _fppEn; pciSettingsTlv.fpp_valid = 1; } if (pciSettingsTlv.sriov_en && !pciSettingsTlv.fpp_en) { return errmsg("FPP should be enabled while SRIOV is enabled"); } // pack it tools_open_pci_configuration_pack(&pciSettingsTlv, tlvBuff); mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_PCI_CONFIGURATION_SIZE, getPciSettingsTlvTypeBe(), REG_ACCESS_METHOD_SET); if (mRc) { return errmsg("failed to set PCI settings: %s", m_err2str(mRc)); } _updated = false; return MCE_SUCCESS; } int PciParams5thGen::getDefaultParams(mfile* mf) { return getDefaultsAndCapabilities(mf); } int PciParams5thGen::getDefaultsAndCapabilities(mfile* mf) { MError rc; u_int8_t tlvBuff[TOOLS_OPEN_PCI_CAPABILITIES_SIZE] = {0}; struct tools_open_pci_capabilities pciCapabilitesTlv; memset(&pciCapabilitesTlv, 0, sizeof(pciCapabilitesTlv)); rc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_PCI_CAPABILITIES_SIZE, getPciCapabilitiesTlvTypeBe(), REG_ACCESS_METHOD_GET); if (rc) { return errmsg("Failed to get PCI capabilities parameter. %s", m_err2str(rc)); } tools_open_pci_capabilities_unpack(&pciCapabilitesTlv, tlvBuff); _sriovSupported = pciCapabilitesTlv.sriov_support; _maxVfsPerPf = pciCapabilitesTlv.max_vfs_per_pf_valid ? pciCapabilitesTlv.max_vfs_per_pf : 0; _fppSupported = pciCapabilitesTlv.fpp_support; return MCE_SUCCESS; } u_int32_t PciParams5thGen::getPciSettingsTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = tlvTypeIdx; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } u_int32_t PciParams5thGen::getPciCapabilitiesTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = PCI_CAPABILITES_TYPE; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } bool PciParams5thGen::hardLimitCheck() { if (_sriovSupported && _userSpecifiedSRIOV) { if ((_numOfVfs > _maxVfsPerPf)) { errmsg("Number of VFs exceeds limit (%d).", _maxVfsPerPf); return false; } if (_sriovEn != 0 && _sriovEn != 1) { errmsg("Illegal SRIOV_EN parameter value. (should be 0 or 1)"); return false; } } if (_fppSupported && _userSpecifiedFPP) { if (_fppEn != 0 && _fppEn != 1) { errmsg("Illegal FPP_EN parameter value. (should be 0 or 1)"); return false; } } return true; } /* * TptParams5thGen Class implementation: */ bool TptParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTptCapabilitiesTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get TPT capabilities parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead) { return false; } if (getDefaultsAndCapabilities(mf) != MCE_SUCCESS) { return false; } rc = nvqcCom5thGen(mf, getTptSettingsTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get TPT settings parameter capabilities. %s", m_err2str(rc)); return false; } if (!(suppRead && suppWrite && _logMaxPayloadSizeSupported)) { return false; } return true; } void TptParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Log_Tpt_Size) { _logMaxPayloadSize = val; } } u_int32_t TptParams5thGen::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Log_Tpt_Size) { return _logMaxPayloadSize; } return MLXCFG_UNKNOWN; } int TptParams5thGen::getFromDev(mfile* mf) { MError mRc; u_int8_t tlvBuff[TOOLS_OPEN_TPT_CONFIGURATION_SIZE] = {0}; struct tools_open_tpt_configuration tptSettingsTlv; memset(&tptSettingsTlv, 0, sizeof(tptSettingsTlv)); if (_updated) { return MCE_SUCCESS; } mRc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_TPT_CONFIGURATION_SIZE, getTptSettingsTlvTypeBe(), REG_ACCESS_METHOD_GET); if (mRc) { if (mRc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get TPT configuration: %s", m_err2str(mRc)); } // unpack and update tools_open_tpt_configuration_unpack(&tptSettingsTlv, &tlvBuff[0]); _logMaxPayloadSize = tptSettingsTlv.log_max_payload_size; _updated = true; return MCE_SUCCESS; } int TptParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } // get Tlv modify it and set it u_int8_t tlvBuff[TOOLS_OPEN_TPT_CONFIGURATION_SIZE] = {0}; struct tools_open_tpt_configuration tptSettingsTlv; memset(&tptSettingsTlv, 0, sizeof(tptSettingsTlv)); mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_TPT_CONFIGURATION_SIZE, getTptSettingsTlvTypeBe(), REG_ACCESS_METHOD_GET); if (mRc && mRc != ME_REG_ACCESS_RES_NOT_AVLBL) { return errmsg("failed to set TPT settings: %s", m_err2str(mRc)); } tools_open_tpt_configuration_unpack(&tptSettingsTlv, tlvBuff); tptSettingsTlv.log_max_payload_size = _logMaxPayloadSize; // pack it tools_open_tpt_configuration_pack(&tptSettingsTlv, tlvBuff); mRc = mnvaCom5thGen(mf, tlvBuff, TOOLS_OPEN_TPT_CONFIGURATION_SIZE, getTptSettingsTlvTypeBe(), REG_ACCESS_METHOD_SET); if (mRc) { return errmsg("failed to set TPT settings: %s", m_err2str(mRc)); } _updated = false; return MCE_SUCCESS; } int TptParams5thGen::getDefaultParams(mfile* mf) { return getDefaultsAndCapabilities(mf); } int TptParams5thGen::getDefaultsAndCapabilities(mfile* mf) { MError rc; u_int8_t tlvBuff[TOOLS_OPEN_TPT_CAPABILITIES_SIZE] = {0}; struct tools_open_tpt_capabilities tptCapabilitesTlv; memset(&tptCapabilitesTlv, 0, sizeof(tptCapabilitesTlv)); rc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_TPT_CAPABILITIES_SIZE, getTptCapabilitiesTlvTypeBe(), REG_ACCESS_METHOD_GET); if (rc) { return errmsg("Failed to get TPT capabilities parameter. %s", m_err2str(rc)); } tools_open_tpt_capabilities_unpack(&tptCapabilitesTlv, tlvBuff); _logMaxPayloadSizeSupported = tptCapabilitesTlv.log_max_payload_size_supported; return MCE_SUCCESS; } u_int32_t TptParams5thGen::getTptSettingsTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = tlvTypeIdx; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } u_int32_t TptParams5thGen::getTptCapabilitiesTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = TPT_CAPABILITES_TYPE; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } bool TptParams5thGen::hardLimitCheck() { if (_logMaxPayloadSize != 0 && _logMaxPayloadSize != 12) { errmsg("Illegal LOG_MAX_TPT_PAYLOAD_SIZE parameter value. (should be 0(auto) or 12(4KB))"); return false; } return true; } /* * InfinibandBootSettingsParams4thGen Class implementation: */ bool InfinibandBootSettingsParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)param; struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc) { return false; } return portParams.nv_config_infiniband_boot_settings; } void InfinibandBootSettingsParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) { _bootPkey = val; } } u_int32_t InfinibandBootSettingsParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) { return _bootPkey; } return MLXCFG_UNKNOWN; } int InfinibandBootSettingsParams4thGen::getFromDev(mfile* mf) { MError mRc; u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE] = {0}; struct tools_open_infiniband_boot_settings bootSettingsTlv; memset(&bootSettingsTlv, 0, sizeof(bootSettingsTlv)); if (_updated) { return MCE_SUCCESS; } mRc = mnvaCom4thGen(mf, &tlvBuff[0], TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); if (mRc) { if (mRc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get Infiniband Boot Settings: %s", m_err2str(mRc)); } // unpack and update tools_open_infiniband_boot_settings_unpack(&bootSettingsTlv, &tlvBuff[0]); _bootPkey = bootSettingsTlv.boot_pkey; _updated = true; return MCE_SUCCESS; } int InfinibandBootSettingsParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } // get Tlv modify it and set it u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE] = {0}; struct tools_open_infiniband_boot_settings bootSettingsTlv; memset(&bootSettingsTlv, 0, sizeof(bootSettingsTlv)); bootSettingsTlv.boot_pkey = _bootPkey; // pack it tools_open_infiniband_boot_settings_pack(&bootSettingsTlv, tlvBuff); mRc = mnvaCom4thGen(mf, tlvBuff, TOOLS_OPEN_TPT_CONFIGURATION_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); if (mRc) { return errmsg("failed to set Infiniband Boot Settings: %s", m_err2str(mRc)); } _updated = false; return MCE_SUCCESS; } int InfinibandBootSettingsParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc == MCE_SUCCESS) { _bootPkey = portParams.default_boot_pkey; } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } bool InfinibandBootSettingsParams4thGen::hardLimitCheck() { if (_bootPkey >= (1 << 16)) { errmsg("Illegal BOOT_PKEY_P%d parameter value, valid values: [0..65535]", ((_port == 1) ? 1 : 2)); return false; } return true; } /* * IBDCParams5thGen Class implementation: */ bool IBDCParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getDcCapabilitiesTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get Infiniband DC capabilities parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead) { return false; } rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get Infiniband DC Settings parameter capabilities. %s", m_err2str(rc)); return false; } if (!(suppRead && suppWrite)) { return false; } return true; } void IBDCParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Log_Dcr_Hash_Table_Size) { _logDcrHashTableSize = val; } if (paramType == Mcp_Dcr_Lifo_Size) { _dcrLifoSize = val; } } u_int32_t IBDCParams5thGen::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Log_Dcr_Hash_Table_Size) { return _logDcrHashTableSize; } if (paramType == Mcp_Dcr_Lifo_Size) { return _dcrLifoSize; } return MLXCFG_UNKNOWN; } int IBDCParams5thGen::getFromDev(mfile* mf) { GET_FROM_DEV_5TH_GEN(mf, tools_open_infiniband_dc_settings, "IB Dynamically Connected"); } int IBDCParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_infiniband_dc_settings, "IB Dynamically Connected"); } int IBDCParams5thGen::getDefaultParams(mfile* mf) { return getDefaultsAndCapabilities(mf); } int IBDCParams5thGen::getDefaultsAndCapabilities(mfile* mf) { MError rc; u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_DC_CAPABILITIES_SIZE] = {0}; struct tools_open_infiniband_dc_capabilities dcCapabilitesTlv; memset(&dcCapabilitesTlv, 0, sizeof(dcCapabilitesTlv)); rc = mnvaCom5thGen(mf, &tlvBuff[0], TOOLS_OPEN_INFINIBAND_DC_CAPABILITIES_SIZE, getDcCapabilitiesTlvTypeBe(), REG_ACCESS_METHOD_GET); if (rc) { return errmsg("Failed to get Infiniband DC capabilities parameter. %s", m_err2str(rc)); } tools_open_infiniband_dc_capabilities_unpack(&dcCapabilitesTlv, tlvBuff); _minLogDcrHashTableSize = dcCapabilitesTlv.min_log_dcr_hash_table_size; _maxLogDcrHashTableSize = dcCapabilitesTlv.max_log_dcr_hash_table_size; _minDcrLifoSize = dcCapabilitesTlv.min_dcr_lifo_size; _maxDcrLifoSize = dcCapabilitesTlv.max_dcr_lifo_size; return MCE_SUCCESS; } u_int32_t IBDCParams5thGen::getTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = tlvTypeIdx; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } u_int32_t IBDCParams5thGen::getDcCapabilitiesTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = INFINIBAND_DC_CAPABILITIES_TYPE; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } bool IBDCParams5thGen::hardLimitCheck() { if (_logDcrHashTableSize < _minLogDcrHashTableSize || _logDcrHashTableSize > _maxLogDcrHashTableSize) { errmsg("Illegal LOG_DCR_HASH_TABLE_SIZE parameter value. (should be within the range [%d..%d])", _minLogDcrHashTableSize, _maxLogDcrHashTableSize); return false; } if (_dcrLifoSize < _minDcrLifoSize || _dcrLifoSize > _maxDcrLifoSize) { errmsg("Illegal DCR_LIFO_SIZE parameter value. (should be within the range [%d..%d])", _minDcrLifoSize, _maxDcrLifoSize); return false; } return true; } void IBDCParams5thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_infiniband_dc_settings* ibDcTlv = (struct tools_open_infiniband_dc_settings*)tlv; ibDcTlv->dcr_lifo_size = _dcrLifoSize; ibDcTlv->log_dcr_hash_table_size = _logDcrHashTableSize; return; } void IBDCParams5thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_infiniband_dc_settings* ibDcTlv = (struct tools_open_infiniband_dc_settings*)tlv; _dcrLifoSize = ibDcTlv->dcr_lifo_size; _logDcrHashTableSize = ibDcTlv->log_dcr_hash_table_size; return; } /* * PortBootStateParams5thGen Class implementation */ bool PortBootStateParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get port boot state parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead || !suppWrite) { return false; } return true; } void PortBootStateParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Boot_State_P1 && _port == 1) || (paramType == Mcp_Boot_State_P2 && _port == 2)) { _portBootState = val; } return; } u_int32_t PortBootStateParams5thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_State_P1 && _port == 1) || (paramType == Mcp_Boot_State_P2 && _port == 2)) { return _portBootState; } return MLXCFG_UNKNOWN; } int PortBootStateParams5thGen::getFromDev(mfile* mf) { GET_FROM_DEV_5TH_GEN(mf, tools_open_port_boot_state, "Port Boot State"); } int PortBootStateParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_port_boot_state, "Port Boot State"); } int PortBootStateParams5thGen::getDefaultParams(mfile* mf) { return getFromDev(mf); } bool PortBootStateParams5thGen::hardLimitCheck() { if (_portBootState > 3) { errmsg("Illegal BOOT_STATE_P%d parameter value (0=Normal Operation, 1=SFP power off, 2=SERDES power off, 3=Admin linkdown)", _port); return false; } return true; } u_int32_t PortBootStateParams5thGen::getTlvTypeBe() { struct tools_open_per_port_type type; u_int32_t tlvType = 0; type.param_class = CLASS_PHYS_PORT; type.param_idx = tlvTypeIdx; type.port = _port; tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } void PortBootStateParams5thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_port_boot_state* portBootStateTlv = (struct tools_open_port_boot_state*)tlv; portBootStateTlv->port_boot_state = _portBootState; return; } void PortBootStateParams5thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_port_boot_state* portBootStateTlv = (struct tools_open_port_boot_state*)tlv; _portBootState = portBootStateTlv->port_boot_state; return; } /* * RoCENextProtocolParams5thGen Class implementation */ bool RoCENextProtocolParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get RoCE next protocol parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead || !suppWrite) { return false; } return true; } void RoCENextProtocolParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ( paramType == Mcp_RoCE_Next_Protocol) { _nextProtocol = val; } return; } u_int32_t RoCENextProtocolParams5thGen::getParam(mlxCfgParam paramType) { if ( paramType == Mcp_RoCE_Next_Protocol) { return _nextProtocol; } return MLXCFG_UNKNOWN; } int RoCENextProtocolParams5thGen::getFromDev(mfile* mf) { GET_FROM_DEV_5TH_GEN(mf, tools_open_roce_v_1_5_next_protocol, "RoCE Next Protocol"); } int RoCENextProtocolParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_roce_v_1_5_next_protocol, "RoCE Next Protocol"); } int RoCENextProtocolParams5thGen::getDefaultParams(mfile* mf) { return getFromDev(mf); } bool RoCENextProtocolParams5thGen::hardLimitCheck() { if (_nextProtocol > 255) { errmsg("Illegal ROCE_NEXT_PROTOCOL parameter value(0x%x), value should be in range [0..0xff]", _nextProtocol); return false; } return true; } u_int32_t RoCENextProtocolParams5thGen::getTlvTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = CLASS_GLOBAL; type.param_idx = tlvTypeIdx; tools_open_global_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } void RoCENextProtocolParams5thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_roce_v_1_5_next_protocol* roceNpTlv = (struct tools_open_roce_v_1_5_next_protocol*)tlv; roceNpTlv->roce_over_ip_next_protocol = _nextProtocol; return; } void RoCENextProtocolParams5thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_roce_v_1_5_next_protocol* roceNpTlv = (struct tools_open_roce_v_1_5_next_protocol*)tlv; _nextProtocol = roceNpTlv->roce_over_ip_next_protocol; return; } /* * RoCECCParams5thGen Class implementation */ bool RoCECCParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get RoCE CC parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead || !suppWrite) { return false; } return true; } void RoCECCParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ( (paramType == Mcp_RoCE_CC_Algorithm_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Algorithm_P2 && _port == 2)) { _roceCcAlgorithm = val; } if ( (paramType == Mcp_RoCE_CC_Prio_Mask_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Prio_Mask_P2 && _port == 2)) { _roceCcPrioMask = val; } return; } u_int32_t RoCECCParams5thGen::getParam(mlxCfgParam paramType) { if ( (paramType == Mcp_RoCE_CC_Algorithm_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Algorithm_P2 && _port == 2)) { return _roceCcAlgorithm; } if ( (paramType == Mcp_RoCE_CC_Prio_Mask_P1 && _port == 1) || (paramType == Mcp_RoCE_CC_Prio_Mask_P2 && _port == 2)) { return _roceCcPrioMask; } return MLXCFG_UNKNOWN; } int RoCECCParams5thGen::getFromDev(mfile* mf) { GET_FROM_DEV_5TH_GEN(mf, tools_open_roce_cc, "RoCE CC"); } int RoCECCParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_roce_cc, "RoCE CC"); } int RoCECCParams5thGen::getDefaultParams(mfile* mf) { return getFromDev(mf); } bool RoCECCParams5thGen::hardLimitCheck() { if (_roceCcAlgorithm > 1) { errmsg("Illegal ROCE_CC_ALGORITHM_P%d parameter value(%d), value should be 0 for ECN or 1 for QCN", _port, _roceCcAlgorithm); return false; } if (_roceCcPrioMask > 255) { errmsg("Illegal ROCE_CC_PRIO_MASK_P%d parameter value(%#x), value should be within the range [0..0xff]", _port, _roceCcPrioMask); return false; } return true; } u_int32_t RoCECCParams5thGen::getTlvTypeBe() { struct tools_open_per_port_type type; u_int32_t tlvType = 0; type.param_class = CLASS_PHYS_PORT; type.param_idx = tlvTypeIdx; type.port = _port; tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } void RoCECCParams5thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_roce_cc* roceCcTlv = (struct tools_open_roce_cc*)tlv; roceCcTlv->roce_cc_algorithm = _roceCcAlgorithm; roceCcTlv->roce_cc_enable_priority = _roceCcPrioMask; return; } void RoCECCParams5thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_roce_cc* roceCcTlv = (struct tools_open_roce_cc*)tlv; _roceCcAlgorithm = roceCcTlv->roce_cc_algorithm; _roceCcPrioMask = roceCcTlv->roce_cc_enable_priority; return; } /* * RoCECCEcnParams5thGen Class implementation */ bool RoCECCEcnParams5thGen::cfgSupported(mfile* mf, mlxCfgParam param) { MError rc; (void)param; bool suppRead, suppWrite; rc = nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite); if (rc) { errmsg("Failed to get RoCE CC ECN parameter capabilities. %s", m_err2str(rc)); return false; } if (!suppRead || !suppWrite) { return false; } return true; } void RoCECCEcnParams5thGen::setParam(mlxCfgParam paramType, u_int32_t val) { // TODO: adrianc move to MAP on large scale TLVs std::map for easier access, init in constructor according to port if (_port == 1) { switch (paramType) { case Mcp_Clamp_Tgt_Rate_P1: _clampTgtRate = val; break; case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1: _clampTgtRateAfterTimeInc = val; break; case Mcp_Rpg_Time_Reset_P1: _rpgTimeReset = val; break; case Mcp_Rpg_Byte_Reset_P1: _rpgByteReset = val; break; case Mcp_Rpg_Threshold_P1: _rpgThreshold = val; break; case Mcp_Rpg_Max_Rate_P1: _rpgMaxRate = val; break; case Mcp_Rpg_Ai_Rate_P1: _rpgAiRate = val; break; case Mcp_Rpg_Hai_Rate_P1: _rpgHaiRate = val; break; case Mcp_Rpg_Gd_P1: _rpgGd = val; break; case Mcp_Rpg_Min_Dec_Fac_P1: _rpgMinDecFac = val; break; case Mcp_Rpg_Min_Rate_P1: _rpgMinRate = val; break; case Mcp_Rate_To_Set_On_First_Cnp_P1: _rateToSetOnFirstCnp = val; break; case Mcp_Dce_Tcp_G_P1: _dceTcpG = val; break; case Mcp_Dce_Tcp_Rtt_P1: _dceTcpRtt = val; break; case Mcp_Rate_Reduce_Monitor_Period_P1: _rateReduceMonitorPeriod = val; break; case Mcp_Initial_Alpha_Value_P1: _initialAlphaValue = val; break; case Mcp_Min_Time_Between_Cnps_P1: _minTimeBetweenCnps = val; break; case Mcp_Cnp_Dscp_P1: _cnpDscp = val; break; case Mcp_Cnp_802p_Prio_P1: _cnp802pPrio = val; break; default: break; } } else if (_port == 2) { switch (paramType) { case Mcp_Clamp_Tgt_Rate_P2: _clampTgtRate = val; break; case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2: _clampTgtRateAfterTimeInc = val; break; case Mcp_Rpg_Time_Reset_P2: _rpgTimeReset = val; break; case Mcp_Rpg_Byte_Reset_P2: _rpgByteReset = val; break; case Mcp_Rpg_Threshold_P2: _rpgThreshold = val; break; case Mcp_Rpg_Max_Rate_P2: _rpgMaxRate = val; break; case Mcp_Rpg_Ai_Rate_P2: _rpgAiRate = val; break; case Mcp_Rpg_Hai_Rate_P2: _rpgHaiRate = val; break; case Mcp_Rpg_Gd_P2: _rpgGd = val; break; case Mcp_Rpg_Min_Dec_Fac_P2: _rpgMinDecFac = val; break; case Mcp_Rpg_Min_Rate_P2: _rpgMinRate = val; break; case Mcp_Rate_To_Set_On_First_Cnp_P2: _rateToSetOnFirstCnp = val; break; case Mcp_Dce_Tcp_G_P2: _dceTcpG = val; break; case Mcp_Dce_Tcp_Rtt_P2: _dceTcpRtt = val; break; case Mcp_Rate_Reduce_Monitor_Period_P2: _rateReduceMonitorPeriod = val; break; case Mcp_Initial_Alpha_Value_P2: _initialAlphaValue = val; break; case Mcp_Min_Time_Between_Cnps_P2: _minTimeBetweenCnps = val; break; case Mcp_Cnp_Dscp_P2: _cnpDscp = val; break; case Mcp_Cnp_802p_Prio_P2: _cnp802pPrio = val; break; default: break; } } return; } u_int32_t RoCECCEcnParams5thGen::getParam(mlxCfgParam paramType) { // adrianc: consider moving to MAP on large scale TLVs if (_port == 1) { switch (paramType) { case Mcp_Clamp_Tgt_Rate_P1: return _clampTgtRate; case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1: return _clampTgtRateAfterTimeInc; case Mcp_Rpg_Time_Reset_P1: return _rpgTimeReset; case Mcp_Rpg_Byte_Reset_P1: return _rpgByteReset; case Mcp_Rpg_Threshold_P1: return _rpgThreshold; case Mcp_Rpg_Max_Rate_P1: return _rpgMaxRate; case Mcp_Rpg_Ai_Rate_P1: return _rpgAiRate; case Mcp_Rpg_Hai_Rate_P1: return _rpgHaiRate; case Mcp_Rpg_Gd_P1: return _rpgGd; case Mcp_Rpg_Min_Dec_Fac_P1: return _rpgMinDecFac; case Mcp_Rpg_Min_Rate_P1: return _rpgMinRate; case Mcp_Rate_To_Set_On_First_Cnp_P1: return _rateToSetOnFirstCnp; case Mcp_Dce_Tcp_G_P1: return _dceTcpG; case Mcp_Dce_Tcp_Rtt_P1: return _dceTcpRtt; case Mcp_Rate_Reduce_Monitor_Period_P1: return _rateReduceMonitorPeriod; case Mcp_Initial_Alpha_Value_P1: return _initialAlphaValue; case Mcp_Min_Time_Between_Cnps_P1: return _minTimeBetweenCnps; case Mcp_Cnp_Dscp_P1: return _cnpDscp; case Mcp_Cnp_802p_Prio_P1: return _cnp802pPrio; default: break; } } else if (_port == 2) { switch (paramType) { case Mcp_Clamp_Tgt_Rate_P2: return _clampTgtRate; case Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2: return _clampTgtRateAfterTimeInc; case Mcp_Rpg_Time_Reset_P2: return _rpgTimeReset; case Mcp_Rpg_Byte_Reset_P2: return _rpgByteReset; case Mcp_Rpg_Threshold_P2: return _rpgThreshold; case Mcp_Rpg_Max_Rate_P2: return _rpgMaxRate; case Mcp_Rpg_Ai_Rate_P2: return _rpgAiRate; case Mcp_Rpg_Hai_Rate_P2: return _rpgHaiRate; case Mcp_Rpg_Gd_P2: return _rpgGd; case Mcp_Rpg_Min_Dec_Fac_P2: return _rpgMinDecFac; case Mcp_Rpg_Min_Rate_P2: return _rpgMinRate; case Mcp_Rate_To_Set_On_First_Cnp_P2: return _rateToSetOnFirstCnp; case Mcp_Dce_Tcp_G_P2: return _dceTcpG; case Mcp_Dce_Tcp_Rtt_P2: return _dceTcpRtt; case Mcp_Rate_Reduce_Monitor_Period_P2: return _rateReduceMonitorPeriod; case Mcp_Initial_Alpha_Value_P2: return _initialAlphaValue; case Mcp_Min_Time_Between_Cnps_P2: return _minTimeBetweenCnps; case Mcp_Cnp_Dscp_P2: return _cnpDscp; case Mcp_Cnp_802p_Prio_P2: return _cnp802pPrio; default: break; } } return MLXCFG_UNKNOWN; } int RoCECCEcnParams5thGen::getFromDev(mfile* mf) { GET_FROM_DEV_5TH_GEN(mf, tools_open_roce_cc_ecn, "RoCE CC ECN"); } int RoCECCEcnParams5thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tools_open_roce_cc_ecn, "RoCE CC ECN"); } int RoCECCEcnParams5thGen::getDefaultParams(mfile* mf) { return getFromDev(mf); } u_int32_t _dceTcpG; u_int32_t _dceTcpRtt; u_int32_t _rateReduceMonitorPeriod; u_int32_t _initialAlphaValue; u_int32_t _minTimeBetweenCnps; u_int32_t _cnpDscp; u_int32_t _cnp802pPrio; bool RoCECCEcnParams5thGen::hardLimitCheck() { if (_clampTgtRate > 1) { errmsg("Illegal CLAMP_TGT_RATE_P%d parameter value(%d), value should be 0 or 1", _port, _clampTgtRate); return false; } if (_clampTgtRateAfterTimeInc > 1) { errmsg("Illegal CLAMP_TGT_RATE_AFTER_TIME_INC_P%d parameter value(%d), value should be 0 or 1", _port, _clampTgtRateAfterTimeInc); return false; } if ( _rpgTimeReset >= (1 << 16)) { errmsg("Illegal RPG_TIME_RESET_P%d parameter value(%d), value should be [0..%d]", _port, _rpgTimeReset, (1 << 16) - 1); return false; } if (_rpgByteReset >= (1 << 14)) { errmsg("Illegal RPG_BYTE_RESET_P%d parameter value(%d), value should be [0..%d]", _port, _rpgByteReset, (1 << 14) - 1); return false; } if (_rpgThreshold >= (1 << 4)) { errmsg("Illegal RPG_THRESHOLD_P%d parameter value(%d), value should be [0..%d]", _port, _rpgThreshold, (1 << 4) - 1); return false; } if ( _rpgAiRate >= (1 << 16)) { errmsg("Illegal RPG_AI_RATE_P%d parameter value(%d), value should be [0..%d]", _port, _rpgAiRate, (1 << 16) - 1); return false; } if ( _rpgHaiRate >= (1 << 16)) { errmsg("Illegal RPG_HAI_RATE_P%d parameter value(%d), value should be [0..%d]", _port, _rpgHaiRate, (1 << 16) - 1); return false; } if (_rpgGd > 15) { errmsg("Illegal RPG_GD_P%d parameters value(%d), value should be [0..%d]", _port, _rpgGd, 15); return false; } if (_rpgMinDecFac == 0 || _rpgMinDecFac > 100) { errmsg("Illegal RPG_MIN_DEC_FAC_P%d parameters value(%d), value should be [1..100]", _port, _rpgMinDecFac); return false; } if (_rpgMinRate >= (1 << 16)) { errmsg("Illegal RPG_MIN_RATE_P%d parameters value(%d), value should be [1..%d]", _port, _rpgMinRate, (1 << 16) - 1); return false; } if (_rateToSetOnFirstCnp >= (1 << 16)) { errmsg("Illegal RATE_TO_SET_ON_FIRST_CNP_P%d parameters value(%d), value should be [1..%d]", _port, _rateToSetOnFirstCnp, (1 << 16) - 1); return false; } if (_dceTcpG >= (1 << 9)) { errmsg("Illegal DCE_TCP_G_P%d parameters value(%d), value should be [1..%d]", _port, _dceTcpG, (1 << 9) - 1); return false; } if (_dceTcpRtt >= (1 << 16)) { errmsg("Illegal DCE_TCP_RTT_P%d parameters value(%d), value should be [1..%d]", _port, _dceTcpRtt, (1 << 16) - 1); return false; } if (_rateReduceMonitorPeriod >= (1 << 16)) { errmsg("Illegal RATE_REDUCE_MONITOR_PERIOD_P%d parameters value(%d), value should be [1..%d]", _port, _rateReduceMonitorPeriod, (1 << 16) - 1); return false; } if (_initialAlphaValue >= (1 << 9)) { errmsg("Illegal INITIAL_ALPHA_VALUE_P%d parameters value(%d), value should be [1..%d]", _port, _initialAlphaValue, (1 << 9) - 1); return false; } if (_minTimeBetweenCnps >= (1 << 16)) { errmsg("Illegal MIN_TIME_BETWEEN_CNPS_P%d parameters value(%d), value should be [1..%d]", _port, _minTimeBetweenCnps, (1 << 16) - 1); return false; } if (_cnpDscp > 7) { errmsg("Illegal CNP_DSCP_P%d parameters value(%d), value should be [0..7]", _port, _cnpDscp); return false; } if (_cnp802pPrio >= (1 << 6)) { errmsg("Illegal CNP_802P_PRIO_P%d parameters value(%d), value should be [1..%d]", _port, _cnp802pPrio, (1 << 6) - 1); return false; } return true; } u_int32_t RoCECCEcnParams5thGen::getTlvTypeBe() { struct tools_open_per_port_type type; u_int32_t tlvType = 0; type.param_class = CLASS_PHYS_PORT; type.param_idx = tlvTypeIdx; type.port = _port; tools_open_per_port_type_pack(&type, (u_int8_t*)&tlvType); return tlvType; } void RoCECCEcnParams5thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_roce_cc_ecn* roceCcEcnTlv = (struct tools_open_roce_cc_ecn*)tlv; roceCcEcnTlv->clamp_tgt_rate = _clampTgtRate; roceCcEcnTlv->clamp_tgt_rate_after_time_inc = _clampTgtRateAfterTimeInc; roceCcEcnTlv->cnp_802p_prio = _cnp802pPrio; roceCcEcnTlv->cnp_dscp = _cnpDscp; roceCcEcnTlv->dce_tcp_g = _dceTcpG; roceCcEcnTlv->dce_tcp_rtt = _dceTcpRtt; roceCcEcnTlv->initial_alpha_value = _initialAlphaValue; roceCcEcnTlv->min_time_between_cnps = _minTimeBetweenCnps; roceCcEcnTlv->rate_reduce_monitor_period = _rateReduceMonitorPeriod; roceCcEcnTlv->rate_to_set_on_first_cnp = _rateToSetOnFirstCnp; roceCcEcnTlv->rpg_ai_rate = _rpgAiRate; roceCcEcnTlv->rpg_byte_reset = _rpgByteReset; roceCcEcnTlv->rpg_gd = _rpgGd; roceCcEcnTlv->rpg_hai_rate = _rpgHaiRate; roceCcEcnTlv->rpg_max_rate = _rpgMaxRate; roceCcEcnTlv->rpg_min_dec_fac = _rpgMinDecFac; roceCcEcnTlv->rpg_min_rate = _rpgMinRate; roceCcEcnTlv->rpg_threshold = _rpgThreshold; roceCcEcnTlv->rpg_time_reset = _rpgTimeReset; return; } void RoCECCEcnParams5thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_roce_cc_ecn* roceCcEcnTlv = (struct tools_open_roce_cc_ecn*)tlv; _clampTgtRate = roceCcEcnTlv->clamp_tgt_rate; _clampTgtRateAfterTimeInc = roceCcEcnTlv->clamp_tgt_rate_after_time_inc; _cnp802pPrio = roceCcEcnTlv->cnp_802p_prio; _cnpDscp = roceCcEcnTlv->cnp_dscp; _dceTcpG = roceCcEcnTlv->dce_tcp_g; _dceTcpRtt = roceCcEcnTlv->dce_tcp_rtt; _initialAlphaValue = roceCcEcnTlv->initial_alpha_value; _minTimeBetweenCnps = roceCcEcnTlv->min_time_between_cnps; _rateReduceMonitorPeriod = roceCcEcnTlv->rate_reduce_monitor_period; _rateToSetOnFirstCnp = roceCcEcnTlv->rate_to_set_on_first_cnp; _rpgAiRate = roceCcEcnTlv->rpg_ai_rate; _rpgByteReset = roceCcEcnTlv->rpg_byte_reset; _rpgGd = roceCcEcnTlv->rpg_gd; _rpgHaiRate = roceCcEcnTlv->rpg_hai_rate; _rpgMaxRate = roceCcEcnTlv->rpg_max_rate; _rpgMinDecFac = roceCcEcnTlv->rpg_min_dec_fac; _rpgMinRate = roceCcEcnTlv->rpg_min_rate; _rpgThreshold = roceCcEcnTlv->rpg_threshold; _rpgTimeReset = roceCcEcnTlv->rpg_time_reset; return; } /* * PrebootBootSettingsParams4thGen Class implementation: */ bool PrebootBootSettingsParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)param; struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc) { return false; } return true; //portParams.nv_config_boot_parameters; <--BUG fw is not updating this bit, assume supported if query_def_params command passess } void PrebootBootSettingsParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) { _bootOptionRomEn = val; } if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) { _bootVlanEn = val; } if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) { _bootRetryCnt = val; } if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) { _legacyBootProtocol = val; } if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) { _bootVlan = val; } } u_int32_t PrebootBootSettingsParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) { return _bootOptionRomEn; } if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) { return _bootVlanEn; } if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) { return _bootRetryCnt; } if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) { return _legacyBootProtocol; } if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) { return _bootVlan; } return MLXCFG_UNKNOWN; } int PrebootBootSettingsParams4thGen::getFromDev(mfile* mf) { GET_FROM_DEV_4TH_GEN(mf, tools_open_preboot_boot_settings, "Preboot Boot Settings", _port); } int PrebootBootSettingsParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_4TH_GEN(mf, ignoreCheck, tools_open_preboot_boot_settings, "Preboot Boot Settings", _port); } void PrebootBootSettingsParams4thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv; prebootTlv->boot_option_rom_en = _bootOptionRomEn; prebootTlv->boot_vlan_en = _bootVlanEn; prebootTlv->boot_retry_count = _bootRetryCnt; prebootTlv->legacy_boot_protocol = _legacyBootProtocol; prebootTlv->boot_vlan = _bootVlan; } void PrebootBootSettingsParams4thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv; _bootOptionRomEn = prebootTlv->boot_option_rom_en; _bootVlanEn = prebootTlv->boot_vlan_en; _bootRetryCnt = prebootTlv->boot_retry_count; _legacyBootProtocol = prebootTlv->legacy_boot_protocol; _bootVlan = prebootTlv->boot_vlan; } int PrebootBootSettingsParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc == MCE_SUCCESS) { _bootOptionRomEn = portParams.default_boot_option_rom_en; _bootVlanEn = portParams.default_boot_vlan_en; _bootRetryCnt = portParams.default_boot_retry_cnt; _legacyBootProtocol = portParams.default_boot_protocol; _bootVlan = portParams.default_boot_vlan; } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } bool PrebootBootSettingsParams4thGen::hardLimitCheck() { if (_bootOptionRomEn > 1) { errmsg("Illegal BOOT_OPTION_ROM_EN_P%d parameter value, valid values: 0 or 1", ((_port == 1) ? 1 : 2)); return false; } if (_bootVlanEn > 1) { errmsg("Illegal BOOT_VLAN_EN_P%d parameter value, valid values: 0 or 1", ((_port == 1) ? 1 : 2)); return false; } if (_bootRetryCnt > 7) { errmsg("Illegal BOOT_RETRY_CNT_P%d parameter value, valid values: [0..7]", ((_port == 1) ? 1 : 2)); return false; } if (_legacyBootProtocol > 3) { errmsg("Illegal LEGACY_BOOT_PROTOCOL_P%d parameter value, valid values: [0..3]", ((_port == 1) ? 1 : 2)); return false; } if (_bootVlan >= (1 << 12)) { errmsg("Illegal BOOT_VLAN_P%d parameter value, valid values: [0..4095]", ((_port == 1) ? 1 : 2)); return false; } return true; } mstflint-4.1.0/mlxconfig/mlxcfg_lib.h0000644000175000017500000000622012572762670016575 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #ifndef MLXCFG_LIB_H_ #define MLXCFG_LIB_H_ #include #include #include #include #include #include "mlxcfg_status.h" #include "mlxcfg_param_lib.h" class MlxCfgOps : public ErrMsg { public: MlxCfgOps(); ~MlxCfgOps(); int open(const char* devStr, bool forceClearSem=false); int opend(mfile* mf, bool forceClearSem=false); // no need to close , this is done in destructor bool supportsCfg(mlxCfgType cfg); bool supportsParam(mlxCfgParam param); int getCfg(mlxCfgParam cfgParam, u_int32_t& val); int getCfg(std::vector& infoVec); int setCfg(mlxCfgParam cfgParam, u_int32_t val); int setCfg(const std::vector& infoVec); int setRawCfg(std::vector rawTlvVec); int dumpRawCfg(std::vector rawTlvVec, std::string& tlvDump); int invalidateCfgs(); // Set/Un-Set ignore limits for all configurations void setIgnoreSoftLimits(bool val); void setIgnoreHardLimits(bool val); // Set/Un-Set Ignore limits per configuration // Adrianc: TBD const char* loadConfigurationGetStr(); private: int openComChk(); int supportsToolsHCR(); int supportsNVData(); bool isLegal(mlxCfgType cfg); bool isLegal(mlxCfgParam cfg); int invalidateCfgs4thGen(); int invalidateCfgs5thGen(); mlxCfgType cfgParam2Type(mlxCfgParam param); std::map _cfgList; // needs to be initialized in constructor and freed in destructor, will contain all the tools supported cfgs std::map _param2TypeMap; dm_dev_id_t _deviceId; mfile* _mf; u_int64_t _suppVec; bool _isFifthGen; }; #endif /* MLXCFG_LIB_H_ */ mstflint-4.1.0/mlxconfig/Makefile.in0000644000175000017500000005444512572763040016367 0ustar mehdimehdi# Makefile.in generated by automake 1.13.4 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ #-- # Copyright (c) 2004-2010 Mellanox Technologies LTD. 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All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #ifndef MLXCFG_STATUS_H_ #define MLXCFG_STATUS_H_ /* * Enum for handling error messages */ typedef enum { MCE_SUCCESS = 0, MCE_FAILED, MCE_TLV_NOT_FOUND, MCE_TLV_NOT_SUPP, MCE_NVCFG_NOT_SUPP, MCE_TOOLS_HCR_NOT_SUPP, MCE_DRIVER_DOWN, MCE_UNSUPPORTED_DEVICE, MCE_UNSUPPORTED_CFG, MCE_BAD_PARAMS, MCE_BAD_PARAM_VAL, MCE_DEV_BUSY, MCE_UNKNOWN_TLV, MCE_REG_NOT_SUPP, MCE_METHOD_NOT_SUPP, MCE_RES_NOT_AVAIL, MCE_CONF_CORRUPT, MCE_TLV_LEN_TOO_SMALL, MCE_BAD_CONFIG, MCE_ERASE_EXEEDED, MCE_BAD_OP, MCE_BAD_STATUS, MCE_CR_ERROR, MCE_NOT_IMPLEMENTED, MCE_INCOMPLETE_PARAMS, MCE_OPEN_DEVICE, MCE_PCI, MCE_GET_DEFAULT_PARAMS, MCE_UNKNOWN_ERR }McStatus; #endif /* MLXCFG_STATUS_H_ */ mstflint-4.1.0/mlxconfig/mlxcfg_lib.cpp0000644000175000017500000005152212572762670017135 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #include #include #include #include #include #include #include #include "mlxcfg_lib.h" using namespace std; /* * Mask and offsets for working with the capability vector * retrieved via query_dev_cap command. */ #define TOOL_CAP_BITS_ADDR 0xc0 #define CHECK_RC(rc)\ if (rc) return rc; /* * MlxCfgOps implementation */ MlxCfgOps::MlxCfgOps() { // init the ErrMsg Class std::map errmap; errmap[MCE_SUCCESS] = "Success"; errmap[MCE_FAILED] = "General Failure"; errmap[MCE_TLV_NOT_FOUND] = "Configuration not found"; errmap[MCE_TLV_NOT_SUPP] = "Configuration TLV not supported"; errmap[MCE_NVCFG_NOT_SUPP] = "Fw does not support NV access registers"; errmap[MCE_TOOLS_HCR_NOT_SUPP] = "Unsupported FW (version 2.31.5000 or above required for CX3/PRO)"; errmap[MCE_DRIVER_DOWN] = "Cannot perform operation, Driver might be down."; errmap[MCE_UNSUPPORTED_DEVICE] = "Device not supported."; errmap[MCE_UNSUPPORTED_CFG] = "Fw does not support configuration"; errmap[MCE_BAD_PARAMS] = "Bad parameters"; errmap[MCE_BAD_PARAM_VAL] = "Bad parameter value"; errmap[MCE_DEV_BUSY] = "Device busy"; errmap[MCE_UNKNOWN_TLV] = "Unknown TLV"; errmap[MCE_REG_NOT_SUPP] = "Fw does not support NV access registers"; errmap[MCE_METHOD_NOT_SUPP] = "Method not supported"; errmap[MCE_RES_NOT_AVAIL] = "Resource not available"; errmap[MCE_CONF_CORRUPT] = "Configuration is corrupted"; errmap[MCE_TLV_LEN_TOO_SMALL] = "TLV length too small"; errmap[MCE_BAD_CONFIG] = "Bad Configuration"; errmap[MCE_ERASE_EXEEDED] = "Erase exceeded flash spec"; errmap[MCE_BAD_OP] = "Bad Operation"; errmap[MCE_BAD_STATUS] = "General Failure"; errmap[MCE_CR_ERROR] = "CR-Error"; errmap[MCE_NOT_IMPLEMENTED] = "Not implemented"; errmap[MCE_INCOMPLETE_PARAMS] = "Failed to get missing configuration from device, please specify all the needed parameters"; errmap[MCE_OPEN_DEVICE] = "Failed to open device"; errmap[MCE_PCI] = "Access to device should be through PCI interface only"; errmap[MCE_GET_DEFAULT_PARAMS] = "Failed to get default params"; errmap[MCE_UNKNOWN_ERR] = "General Error"; updateErrCodes(errmap); _mf = NULL; _deviceId = DeviceEndMarker; _suppVec = 0; _isFifthGen = false; return; } MlxCfgOps::~MlxCfgOps() { if (_mf) { mclose(_mf); } for(map::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) { delete it->second; } return; } #define HW_ID_ADDR 0xf0014 #define CX3_HW_ID 501 #define CX3_PRO_HW_ID 503 int MlxCfgOps::supportsToolsHCR() { // we also update the support vector u_int32_t devId; u_int32_t type = 0; int rc; if (mread4(_mf, HW_ID_ADDR, &devId) != 4) { return MCE_CR_ERROR; } switch (devId & 0xffff) { // check hw device id case CX3_HW_ID : //Cx3 case CX3_PRO_HW_ID : // Cx3-pro // check if device is accessed via pci (thats the only supported method atm) rc = mget_mdevs_type(_mf, &type); #ifndef MST_UL if (type != MST_PCICONF && type != MST_PCI) { return errmsg(MCE_PCI); } #else if (type != MTCR_ACCESS_CONFIG && type != MTCR_ACCESS_MEMORY) { return errmsg(MCE_PCI); } #endif // check if we support tools_hcr rc = tcif_query_dev_cap(_mf, TOOL_CAP_BITS_ADDR, &_suppVec); switch (rc) { case ME_OK: return MCE_SUCCESS; case ME_CMDIF_BAD_SYS: return errmsg(MCE_DRIVER_DOWN); case ME_CMDIF_BAD_OP: case ME_CMDIF_TOUT: case ME_CMDIF_BUSY: return errmsg(MCE_TOOLS_HCR_NOT_SUPP); default: return errmsg("general Error, %s", m_err2str((MError)rc)); } break; default: break; } return errmsg(MCE_UNSUPPORTED_DEVICE); } static void dealWithSignal() { int sig; sig = mft_signal_is_fired(); if (sig) { // reset recieved signal mft_signal_set_fired(0); // retore prev handler mft_signal_set_handling(0); //raise signal to let the previous handle deal with it. raise(sig); } mft_signal_set_handling(0); return; } int MlxCfgOps::supportsNVData() { struct tools_open_nvqc nvqcTlv; memset(&nvqcTlv, 0, sizeof(struct tools_open_nvqc)); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_nvqc(_mf, REG_ACCESS_METHOD_GET, &nvqcTlv); dealWithSignal(); if (rc == ME_REG_ACCESS_BAD_PARAM || rc == ME_REG_ACCESS_INTERNAL_ERROR) { return errmsg(MCE_NVCFG_NOT_SUPP); } return MCE_SUCCESS; } int MlxCfgOps::openComChk() { bool rc; int ret; // check if we support Tools HCR and update _suppVec if (_isFifthGen) { rc = supportsNVData(); CHECK_RC(rc); } else { rc = supportsToolsHCR(); CHECK_RC(rc); } // update cfg specific info. // TODO: adrianc: when getting defaults for 4th gen , perform queryDefParams only once and pass struct to classes to avoid calling multiple times for (std::map::iterator paramIt = _cfgList.begin(); paramIt != _cfgList.end(); paramIt++) { paramIt->second->setDevCapVec(_suppVec); if (paramIt->second->cfgSupported(_mf)) { ret = paramIt->second->getDefaultParams(_mf); if (ret && ret!= MCE_GET_DEFAULT_PARAMS && ret != MCE_NOT_IMPLEMENTED) { return ret; } } } return MCE_SUCCESS; } int MlxCfgOps::open(const char* devStr, bool forceClearSem) { _mf = mopen(devStr); if (_mf == NULL) { return errmsg(MCE_OPEN_DEVICE); } return opend(_mf , forceClearSem); } int MlxCfgOps::opend(mfile* mf, bool forceClearSem) { u_int32_t hwDevId, hwRevId; if (!mf) { return errmsg(MCE_BAD_PARAMS); } _mf = mf; if( dm_get_device_id(mf, &_deviceId, &hwDevId, &hwRevId) ) { return errmsg("Failed to identify device."); } // check if device is supported: switch(_deviceId) { case DeviceConnectX3: case DeviceConnectX3Pro: _isFifthGen = false; break; case DeviceConnectIB: case DeviceConnectX4: case DeviceConnectX4LX: _isFifthGen = true; break; default: return errmsg(MCE_UNSUPPORTED_DEVICE); } // init _cfgList, _param2TypeMap if (_isFifthGen) { // Wake On LAN _cfgList[Mct_Wol] = new WolParams5thGen(); _param2TypeMap[Mcp_Wol_Magic_En] = Mct_Wol; // Vpi Settings _cfgList[Mct_Vpi_P1] = new VpiParams5thGen(1); _cfgList[Mct_Vpi_P2] = new VpiParams5thGen(2); _param2TypeMap[Mcp_Link_Type_P1] = Mct_Vpi_P1; _param2TypeMap[Mcp_Link_Type_P2] = Mct_Vpi_P2; // PCI settings _cfgList[Mct_Pci] = new PciParams5thGen(); _param2TypeMap[Mcp_Sriov_En] = Mct_Pci; _param2TypeMap[Mcp_Num_Of_Vfs] = Mct_Pci; _param2TypeMap[Mcp_Fpp_En] = Mct_Pci; // TPT settings _cfgList[Mct_Tpt] = new TptParams5thGen(); _param2TypeMap[Mcp_Log_Tpt_Size] = Mct_Tpt; // Infiniband DC settings _cfgList[Mct_Dc] = new IBDCParams5thGen(); _param2TypeMap[Mcp_Log_Dcr_Hash_Table_Size] = Mct_Dc; _param2TypeMap[Mcp_Dcr_Lifo_Size] = Mct_Dc; // Port Boot State /*_cfgList[Mct_Boot_State_P1] = new PortBootStateParams5thGen(1); _cfgList[Mct_Boot_State_P2] = new PortBootStateParams5thGen(2); _param2TypeMap[Mcp_Boot_State_P1] = Mct_Boot_State_P1; _param2TypeMap[Mcp_Boot_State_P2] = Mct_Boot_State_P2; */ // RoCE v1.5 next protocol _cfgList[Mct_RoCE_Next_Protocol] = new RoCENextProtocolParams5thGen(); _param2TypeMap[Mcp_RoCE_Next_Protocol] = Mct_RoCE_Next_Protocol; // RoCE CC parameters _cfgList[Mct_RoCE_CC_P1] = new RoCECCParams5thGen(1); _cfgList[Mct_RoCE_CC_P2] = new RoCECCParams5thGen(2); _param2TypeMap[Mcp_RoCE_CC_Algorithm_P1] = Mct_RoCE_CC_P1; _param2TypeMap[Mcp_RoCE_CC_Prio_Mask_P1] = Mct_RoCE_CC_P1; _param2TypeMap[Mcp_RoCE_CC_Algorithm_P2] = Mct_RoCE_CC_P2; _param2TypeMap[Mcp_RoCE_CC_Prio_Mask_P2] = Mct_RoCE_CC_P2; // RoCE CC ECN parameters _cfgList[Mct_RoCE_CC_Ecn_P1] = new RoCECCEcnParams5thGen(1); _cfgList[Mct_RoCE_CC_Ecn_P2] = new RoCECCEcnParams5thGen(2); _param2TypeMap[Mcp_Clamp_Tgt_Rate_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Time_Reset_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Byte_Reset_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Threshold_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Max_Rate_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Ai_Rate_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Hai_Rate_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Gd_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Min_Dec_Fac_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rpg_Min_Rate_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rate_To_Set_On_First_Cnp_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Dce_Tcp_G_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Dce_Tcp_Rtt_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Rate_Reduce_Monitor_Period_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Initial_Alpha_Value_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Min_Time_Between_Cnps_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Cnp_Dscp_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Cnp_802p_Prio_P1] = Mct_RoCE_CC_Ecn_P1; _param2TypeMap[Mcp_Clamp_Tgt_Rate_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Time_Reset_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Byte_Reset_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Threshold_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Max_Rate_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Ai_Rate_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Hai_Rate_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Gd_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Min_Dec_Fac_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rpg_Min_Rate_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rate_To_Set_On_First_Cnp_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Dce_Tcp_G_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Dce_Tcp_Rtt_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Rate_Reduce_Monitor_Period_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Initial_Alpha_Value_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Min_Time_Between_Cnps_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Cnp_Dscp_P2] = Mct_RoCE_CC_Ecn_P2; _param2TypeMap[Mcp_Cnp_802p_Prio_P2] = Mct_RoCE_CC_Ecn_P2; } else { // SR-IOV _cfgList[Mct_Sriov] = new SriovParams4thGen(); _param2TypeMap[Mcp_Sriov_En] = Mct_Sriov; _param2TypeMap[Mcp_Num_Of_Vfs] = Mct_Sriov; // Wake on LAN _cfgList[Mct_Wol_P1] = new WolParams4thGen(1); _cfgList[Mct_Wol_P2] = new WolParams4thGen(2); _param2TypeMap[Mcp_Wol_Magic_En_P1] = Mct_Wol_P1; _param2TypeMap[Mcp_Wol_Magic_En_P2] = Mct_Wol_P2; // Vpi Settings _cfgList[Mct_Vpi_P1] = new VpiParams4thGen(1); _cfgList[Mct_Vpi_P2] = new VpiParams4thGen(2); _param2TypeMap[Mcp_Link_Type_P1] = Mct_Vpi_P1; _param2TypeMap[Mcp_Link_Type_P2] = Mct_Vpi_P2; // BAR size _cfgList[Mct_Bar_Size] = new BarSzParams4thGen(); _param2TypeMap[Mcp_Log_Bar_Size] = Mct_Bar_Size; // Infiniband Boot Settings _cfgList[Mct_Boot_Settings_P1] = new InfinibandBootSettingsParams4thGen(1); _cfgList[Mct_Boot_Settings_P2] = new InfinibandBootSettingsParams4thGen(2); _param2TypeMap[Mcp_Boot_Pkey_P1] = Mct_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Pkey_P2] = Mct_Boot_Settings_P2; // Preboot Boot Settings _cfgList[Mct_Preboot_Boot_Settings_P1] = new PrebootBootSettingsParams4thGen(1); _cfgList[Mct_Preboot_Boot_Settings_P2] = new PrebootBootSettingsParams4thGen(2); _param2TypeMap[Mcp_Boot_Option_Rom_En_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Vlan_En_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Retry_Cnt_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Legacy_Boot_Protocol_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Vlan_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Option_Rom_En_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Boot_Vlan_En_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Boot_Retry_Cnt_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Legacy_Boot_Protocol_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Boot_Vlan_P2] = Mct_Preboot_Boot_Settings_P2; } if (forceClearSem) { int rc; rc = _isFifthGen ? icmd_clear_semaphore(mf) : tools_cmdif_unlock_semaphore(_mf); if (rc) { return errmsg("Failed to unlock semaphore, %s.", m_err2str((MError)rc)); } } return openComChk(); } bool MlxCfgOps::supportsCfg(mlxCfgType cfg) { if (!isLegal(cfg)) { return false; } return _cfgList[cfg]->cfgSupported(_mf); } bool MlxCfgOps::supportsParam(mlxCfgParam param) { if (!isLegal(param)) { return false; } if (!isLegal(cfgParam2Type(param))) { return false; } return _cfgList[cfgParam2Type(param)]->cfgSupported(_mf, param); } int MlxCfgOps::getCfg(mlxCfgParam cfgParam, u_int32_t& val) { if (!isLegal(cfgParam)) { return MCE_BAD_PARAMS; } if (!supportsParam(cfgParam)) { return errmsg(MCE_UNSUPPORTED_CFG); } int rc = _cfgList[cfgParam2Type(cfgParam)]->getFromDev(_mf); if (rc) { return errmsgConcatMsg(rc,*_cfgList[cfgParam2Type(cfgParam)]); } val = (_cfgList[cfgParam2Type(cfgParam)])->getParam(cfgParam); return MCE_SUCCESS; } int MlxCfgOps::getCfg(std::vector& infoVec) { for (std::vector::iterator it = infoVec.begin() ; it != infoVec.end(); it++) { int rc = getCfg(it->first,it->second); if (rc) { return rc; } } return MCE_SUCCESS; } int MlxCfgOps::setCfg(mlxCfgParam cfgParam, u_int32_t val) { if (!isLegal(cfgParam)) { return MCE_BAD_PARAMS; } if (!supportsParam(cfgParam)) { return errmsg(MCE_UNSUPPORTED_CFG); } // get parameters from device if present int rc = _cfgList[cfgParam2Type(cfgParam)]->getFromDev(_mf); if (rc) { return errmsgConcatMsg(rc, *_cfgList[cfgParam2Type(cfgParam)]); } _cfgList[cfgParam2Type(cfgParam)]->setParam(cfgParam, val); rc = _cfgList[cfgParam2Type(cfgParam)]->setOnDev(_mf); if (rc) { return errmsgConcatMsg(rc, *_cfgList[cfgParam2Type(cfgParam)]); } return MCE_SUCCESS; } int MlxCfgOps::setCfg(const std::vector& infoVec) { // set params std::set CfgToSet; int rc; for (std::vector::const_iterator it = infoVec.begin() ; it != infoVec.end(); it++) { if (!isLegal(it->first)) { return MCE_BAD_PARAMS; } if (!supportsParam(it->first)) { return errmsg(MCE_UNSUPPORTED_CFG); } // get configuration from device first (if preset) in case of multiple params per type rc = _cfgList[cfgParam2Type(it->first)]->getFromDev(_mf); if (rc) { return errmsgConcatMsg(rc, *_cfgList[cfgParam2Type(it->first)]); } _cfgList[cfgParam2Type(it->first)]->setParam(it->first, it->second); CfgToSet.insert(_cfgList[cfgParam2Type(it->first)]); } //set on device exit on first failure for (std::set::iterator it = CfgToSet.begin() ; it != CfgToSet.end(); it++) { rc = (*it)->setOnDev(_mf); if (rc) { return errmsgConcatMsg(rc, (**it)); } } return MCE_SUCCESS; } void MlxCfgOps::setIgnoreSoftLimits(bool val) { for(std::map::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) { it->second->setIgnoreSoftLimits(val); } return; } void MlxCfgOps::setIgnoreHardLimits(bool val) { for(std::map::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) { it->second->setIgnoreHardLimits(val); } return; } int MlxCfgOps::invalidateCfgs4thGen() { struct tools_open_mnvia mnviaTlv; u_int8_t buffer[TOOLS_OPEN_MNVIA_SIZE] = {0}; memset(&mnviaTlv, 0, sizeof(struct tools_open_mnvia)); tools_open_mnvia_pack(&mnviaTlv, buffer); return reg_access_mnvia(_mf, REG_ACCESS_METHOD_SET, &mnviaTlv); } int MlxCfgOps::invalidateCfgs5thGen() { struct tools_open_nvia nviaTlv; u_int8_t buffer[TOOLS_OPEN_NVIA_SIZE] = {0}; memset(&nviaTlv, 0, sizeof(struct tools_open_nvia)); tools_open_nvia_pack(&nviaTlv, buffer); return reg_access_nvia(_mf, REG_ACCESS_METHOD_SET, &nviaTlv); } int MlxCfgOps::invalidateCfgs() { int rc; if (_isFifthGen) { rc = invalidateCfgs5thGen(); } else { rc = invalidateCfgs4thGen(); } if (rc) { return errmsg("failed to invalidate configurations, %s.", m_err2str((MError)rc)); } return MCE_SUCCESS; } bool MlxCfgOps::isLegal(mlxCfgType cfg) { if (_cfgList.find(cfg) != _cfgList.end()) { return true; } errmsg("illegal configuration"); return false; } bool MlxCfgOps::isLegal(mlxCfgParam cfg) { if (cfg >= Mcp_Sriov_En && cfg < Mcp_Last) { return true; } errmsg("illegal configuration parameter"); return false; } const char* MlxCfgOps::loadConfigurationGetStr() { int rc; struct cibfw_register_mfrl mfrl; memset(&mfrl, 0, sizeof(mfrl)); if (_isFifthGen && (_deviceId == DeviceConnectX4 || _deviceId == DeviceConnectX4LX)) { // send warm boot (bit 6) mfrl.reset_level = 1 << 6; rc = reg_access_mfrl(_mf,REG_ACCESS_METHOD_SET, &mfrl); if (rc) { return "Please power cycle machine to load new configurations."; } } return "Please reboot machine to load new configurations."; } mlxCfgType MlxCfgOps::cfgParam2Type(mlxCfgParam param) { if (_param2TypeMap.find(param) == _param2TypeMap.end()) { return Mct_Last; } return _param2TypeMap[param]; } int MlxCfgOps::setRawCfg(std::vector rawTlvVec) { if (!_isFifthGen) { return errmsg("Setting Raw Configuration is supported for 5th Generation devices only."); } RawCfgParams5thGen rawTlv; if (rawTlv.setRawData(rawTlvVec)) { return errmsg("%s", rawTlv.err()); } if (rawTlv.setOnDev(_mf)) { return errmsg("%s", rawTlv.err()); } return MCE_SUCCESS; } int MlxCfgOps::dumpRawCfg(std::vector rawTlvVec, std::string& tlvDump) { RawCfgParams5thGen rawTlv; if (rawTlv.setRawData(rawTlvVec)) { return errmsg("%s", rawTlv.err()); } tlvDump = rawTlv.dumpTlv(); return MCE_SUCCESS; } mstflint-4.1.0/mlxconfig/mlxcfg_ui.h0000644000175000017500000000676112572762670016456 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #ifndef MLXCFG_UI_H_ #define MLXCFG_UI_H_ #include #include #include #include "mlxcfg_lib.h" typedef enum { Mc_Set, Mc_Query, Mc_Reset, Mc_Clr_Sem, Mc_Set_Raw, Mc_UnknownCmd } mlxCfgCmd; typedef enum { MLX_CFG_OK, MLX_CFG_OK_EXIT, MLX_CFG_ABORTED, MLX_CFG_ERROR, MLX_CFG_ERROR_EXIT } mlxCfgStatus; class MlxCfgParams { public: MlxCfgParams() : device(), rawTlvFile(), cmd(Mc_UnknownCmd), yes(false), force(false) {} ~MlxCfgParams() {} std::string device; std::string rawTlvFile; mlxCfgCmd cmd; bool yes; std::vector params; static std::string param2str[Mcp_Last]; bool force;// ignore parameter checks u_int32_t getParamVal(mlxCfgParam p); }; class MlxCfg { public: MlxCfg() : _mlxParams(), _errStr(){} ~MlxCfg() {}; mlxCfgStatus execute(int argc, char* argv[]); private: // User interface and parsing methods void printHelp(); void printVersion(); void printUsage(); mlxCfgStatus parseArgs(int argc, char* argv[]); //Helper functions for parse args mlxCfgStatus processArg(std::string tag, u_int32_t val); mlxCfgStatus extractCfgArgs(int argc, char* argv[]); bool tagExsists(mlxCfgParam tag); const char* getDeviceName(const char* dev); // Query cmd mlxCfgStatus queryDevsCfg(); mlxCfgStatus queryDevCfg(const char* dev, const char* pci=(const char*)NULL, int devIndex=1, bool printNewCfg=false); // Set cmd mlxCfgStatus setDevCfg(); // reset Cmd mlxCfgStatus resetDevsCfg(); mlxCfgStatus resetDevCfg(const char* dev); // Set Raw TLV file mlxCfgStatus setDevRawCfg(); mlxCfgStatus tlvLine2DwVec(const std::string& tlvStringLine, std::vector& tlvVec); mlxCfgStatus clrDevSem(); // mlxCfgStatus test(const char* dev); bool askUser(const char* question); mlxCfgStatus err(bool report, const char* errMsg, ...); void printErr(); // data members MlxCfgParams _mlxParams; std::string _errStr; }; #endif /* MLXCFG_UI_H_ */ mstflint-4.1.0/mlxconfig/mlxcfg_parser.cpp0000644000175000017500000004467612572762670017677 0ustar mehdimehdi/* Copyright (c) 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Version: $Id$ * */ #include #include #include #include #include #include #include "mlxcfg_ui.h" using namespace std; #define IDENT " " #define IDENT2 IDENT IDENT #define IDENT3 "\t\t" #define IDENT4 IDENT2 IDENT static void printFlagLine(string flag_s, string flag_l, string param, string desc) { printf(IDENT2"-%s|--%s", flag_s.c_str(), flag_l.c_str()); if (param.length()) { printf(" <%s>", param.c_str()); } else { printf("\t"); } printf(IDENT3": %s\n", desc.c_str()); } static void printConfigurationHeader(string confName, string extraInfo="") { printf(IDENT2"%s: %s\n", confName.c_str(), extraInfo.c_str()); } static void printConfigurationParameter(string param, string extraInfo) { printf(IDENT4"%-36s : %s\n", param.c_str(), extraInfo.c_str()); } static void printConfigurationParameter(string param) { printf(IDENT4"%-36s\n", param.c_str()); } #ifdef MTCR_UL #define DEVICE_NAME "device" #else #define DEVICE_NAME "mst device" #endif void MlxCfg::printHelp() { // print opening printf(IDENT"NAME:\n" IDENT2 MLXCFG_NAME"\n" IDENT"SYNOPSIS:\n" IDENT2 MLXCFG_NAME " [-d <%s> ] [-y] |q[uery]|r[eset]>\n", DEVICE_NAME); // print options printf("\n"); printf(IDENT"OPTIONS:\n"); printFlagLine("d", "dev", "device", "Perform operation for a specified mst device."); printFlagLine("f", "file", "conf_file", "raw configuration file."); printFlagLine("h", "help", "", "Display help message."); printFlagLine("v", "version", "", "Display version info."); printFlagLine("y", "yes", "", "Answer yes in prompt."); //print commands printf("\n"); printf(IDENT"COMMANDS:\n"); printf(IDENT2"%-24s : %s\n","clear_semaphore", "clear the tool semaphore."); printf(IDENT2"%-24s : %s\n","q[uery]", "query current supported configurations."); printf(IDENT2"%-24s : %s\n","r[eset]", "reset all configurations to their default value."); printf(IDENT2"%-24s : %s\n","s[et]", "set configurations to a specific device."); printf(IDENT2"%-24s : %s\n","set_raw", "set raw configuration file.(5th generation devices only.)"); // print supported commands printf("\n"); printf(IDENT"Supported Configurations:\n"); printf("\n"); printConfigurationHeader("PCI Settings"); printConfigurationParameter("FPP_EN=<1|0>", "enable function per port."); printConfigurationParameter("LOG_BAR_SIZE=", "example: for 8Mb bar size set LOG_BAR_SIZE=3."); printConfigurationParameter("NUM_OF_VFS=", "desired amount of virtual functions."); printConfigurationParameter("SRIOV_EN=<0|1>", "enable SR-IOV."); printf("\n"); printConfigurationHeader("IB Dynamically Connect"); printConfigurationParameter("DCR_LIFO_SIZE=", "The amount of total DCRs available to join linked-lists after hash DCRs."); printConfigurationParameter("LOG_DCR_HASH_TABLE_SIZE=", "log2 of the hash table size minus 1."); printf("\n"); printConfigurationHeader("Infiniband Boot Settings"); printConfigurationParameter("BOOT_PKEY_P1=", "partition key to be used by PXE boot (ConnectX3, ConnectX3-Pro Only)."); printConfigurationParameter("BOOT_PKEY_P2=", "set 0 for default."); printf("\n"); printConfigurationHeader("Internal Settings"); printConfigurationParameter("INT_LOG_MAX_PAYLOAD_SIZE=<0|12>", "0=Auto 12=4KB Burst length."); printf("\n"); /* printConfigurationHeader("Port Boot State", "Port power settings on boot"); printConfigurationParameter("BOOT_STATE_P1=<0..3>", "0=Normal operation, 1=SFP power off, 2=SERDES power off, 3=Admin linkDown"); printConfigurationParameter("BOOT_STATE_P2=<0..3>"); printf("\n"); */ printConfigurationHeader("Preboot Boot Settings", "Settings that control the legacy option ROM."); printConfigurationParameter("BOOT_OPTION_ROM_EN_P1=<0|1>", "Disable/Enable boot option ROM."); printConfigurationParameter("BOOT_OPTION_ROM_EN_P2=<0|1>"); printConfigurationParameter("BOOT_VLAN_EN_P1=<0|1>", "Disable/Enable VLAN mode for network boot."); printConfigurationParameter("BOOT_VLAN_EN_P2=<0|1>"); printConfigurationParameter("BOOT_RETRY_CNT_P1=<0..7>", "Number of retries to attempt in case of boot failure."); printConfigurationParameter("BOOT_RETRY_CNT_P2=<0..7>", "7 indicates infinite retries."); printConfigurationParameter("LEGACY_BOOT_PROTOCOL_P1=<0..3>", "0=None(disable legacy boot), 1=PXE(DHCP/TFTP boot), 2=iSCSI, 3=PXE + iSCSI."); printConfigurationParameter("LEGACY_BOOT_PROTOCOL_P2=<0..3>"); printConfigurationParameter("BOOT_VLAN_P1=", "VLAN ID for the network boot."); printConfigurationParameter("BOOT_VLAN_P2="); printf("\n"); printConfigurationHeader("RoCE Congestion Control ECN"); printConfigurationParameter("CLAMP_TGT_RATE_AFTER_TIME_INC_P1=<0|1>", "When receiving an CNP, the target rate should be updated if the transmission rate was increased"); printConfigurationParameter("CLAMP_TGT_RATE_AFTER_TIME_INC_P2=<0|1>", "due to the timer, and not only due to the byte counter. Default=1."); printConfigurationParameter("CLAMP_TGT_RATE_P1=<0|1>", "If set, whenever a CNP is processed, the target rate is updated to be the current rate."); printConfigurationParameter("CLAMP_TGT_RATE_P2=<0|1>", "Default=1"); printConfigurationParameter("CNP_DSCP_P1=<0..7>", "The DiffServ Code Point of the generated CNP for this port."); printConfigurationParameter("CNP_DSCP_P2=<0..7>", "Default=0."); printConfigurationParameter("CNP_802P_PRIO_P1=", "The 802.1p priority value of the generated CNP for this port."); printConfigurationParameter("CNP_802P_PRIO_P2=", "Default=7."); printConfigurationParameter("DCE_TCP_G_P1=", "Used to update the congestion estimator (alpha) once every dce_tcp_rtt microseconds."); printConfigurationParameter("DCE_TCP_G_P2=", "Default=64."); printConfigurationParameter("DCE_TCP_RTT_P1=", "The time between updates of the alpha value, in microseconds."); printConfigurationParameter("DCE_TCP_RTT_P2=", "Default=2."); printConfigurationParameter("INITIAL_ALPHA_VALUE_P1=", "The initial value of alpha to use when receiving the first CNP for a flow."); printConfigurationParameter("INITIAL_ALPHA_VALUE_P2=", "Expressed in a fixed point fraction of 2^10."); printConfigurationParameter("MIN_TIME_BETWEEN_CNPS_P1=", "Minimum time between sending cnps from the port, in microseconds."); printConfigurationParameter("MIN_TIME_BETWEEN_CNPS_P2=", "Default=0."); printConfigurationParameter("RATE_TO_SET_ON_FIRST_CNP_P1=", "The rate that is set for the flow when a rate limiter is allocated to it upon first CNP received, in Mbps."); printConfigurationParameter("RATE_TO_SET_ON_FIRST_CNP_P2=", "Default=0."); printConfigurationParameter("RATE_REDUCE_MONITOR_PERIOD_P1=", "The minimum time between 2 consecutive rate reductions for a single flow."); printConfigurationParameter("RATE_REDUCE_MONITOR_PERIOD_P2=", "Rate reduction will occur only if a CNP is received during the relevant time interval. Default=2."); printConfigurationParameter("RPG_AI_RATE_P1=", "The rate, in Mbits per second, used to increase rpTargetRate in the RPR_ACTIVE_INCREASE state."); printConfigurationParameter("RPG_AI_RATE_P2=", "Default=10."); printConfigurationParameter("RPG_BYTE_RESET_P1=", "Transmitted data between rate increases if no CNPs are received. Given in Bytes."); printConfigurationParameter("RPG_BYTE_RESET_P2=", "Disabled=0, Default=150."); printConfigurationParameter("RPG_GD_P1=<0..15>", "If a CNP is received, the flow rate is reduced at the beginning of the next rate_reduce_monitor_period interval to,"); printConfigurationParameter("RPG_GD_P2=<0..15>", "(1-Alpha/Gd)*CurrentRate. RPG_GD is given as log2(Gd), where Gd may only be powers of 2. Default=7."); printConfigurationParameter("RPG_HAI_RATE_P1=", "The rate, in Mbits per second, used to increase rpTargetRate in the RPR_HYPER_INCREASE state."); printConfigurationParameter("RPG_HAI_RATE_P2=", "Default=50."); printConfigurationParameter("RPG_MAX_RATE_P1=", "The maximum rate, in Mbits per second, at which an RP can transmit."); printConfigurationParameter("RPG_MAX_RATE_P2=", "Once this limit is reached, the RP rate limited is released and"); printConfigurationParameter(" ", "the flow is not rate limited any more. Default=0 (Full port speed)."); printConfigurationParameter("RPG_MIN_DEC_FAC_P1=<1..100>", "The minimum factor by which the current transmit rate can be changed when processing a CNP."); printConfigurationParameter("RPG_MIN_DEC_FAC_P2=<1..100>", "Value is given as a percentage (1-100). Default=50."); printConfigurationParameter("RPG_MIN_RATE_P1=", "The minimum value, in Mb per second, for rate to limit."); printConfigurationParameter("RPG_MIN_RATE_P2=", "Default=2000."); printConfigurationParameter("RPG_THRESHOLD_P1=<0..31>", "The number of times rpByteStage or rpTimeStage can count before the RP rate control state machine advances states."); printConfigurationParameter("RPG_THRESHOLD_P2=<0..31>", "Default=5."); printConfigurationParameter("RPG_TIME_RESET_P1=", "Time between rate increases if no CNPs are received. Given in u-seconds"); printConfigurationParameter("RPG_TIME_RESET_P2=", "Default=2."); printf("\n"); printConfigurationHeader("RoCE Congestion Control Parameters"); printConfigurationParameter("ROCE_CC_ALGORITHM_P1=<0|1>", "Congestion control algorithm. 0=ECN, 1=QCN."); printConfigurationParameter("ROCE_CC_ALGORITHM_P2=<0|1>"); printConfigurationParameter("ROCE_CC_PRIO_MASK_P1=<0..255>", "Per priority enable disable bitmask. default 0."); printConfigurationParameter("ROCE_CC_PRIO_MASK_P2=<0..255>"); printf("\n"); printConfigurationHeader("RoCE V1.5 next protocol"); printConfigurationParameter("ROCE_NEXT_PROTOCOL=<0..255>", "The next protocol value set in the IPv4/IPv6 packets for RoCE v1.5. The default is 0xFE."); printf("\n"); printConfigurationHeader("VPI Settings", "Control network link type"); printConfigurationParameter("LINK_TYPE_P1=<1|2|3>", "1=Infiniband 2=Ethernet 3=VPI(auto-sense)."); printConfigurationParameter("LINK_TYPE_P2=<1|2|3>"); printf("\n"); printConfigurationHeader("Wake On LAN"); printConfigurationParameter("WOL_MAGIC_EN=<0|1>", "5th generation devices only (per physical function)."); printConfigurationParameter("WOL_MAGIC_EN_P1=<0|1>", "enable wake on magic packet(per port.)"); printConfigurationParameter("WOL_MAGIC_EN_P2=<0|1>", "4th generation devices only."); printf("\n"); // print usage examples printf(IDENT"Examples:\n"); printf(IDENT2"%-35s: %s\n", "To query current configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" query"); printf(IDENT2"%-35s: %s\n", "To set configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" set SRIOV_EN=1 NUM_OF_VFS=16 WOL_MAGIC_EN_P1=1"); printf(IDENT2"%-35s: %s\n", "To set raw configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE2" -f conf_file set_raw"); printf(IDENT2"%-35s: %s\n", "To reset configuration", MLXCFG_NAME" -d "MST_DEV_EXAMPLE" reset"); printf("\n"); printf(IDENT"Supported devices:\n"); printf(IDENT2"4th Generation devices: ConnectX3, ConnectX3-Pro (FW 2.31.5000 and above).\n"); printf(IDENT2"5th Generation devices: ConnectIB, ConnectX4, ConnectX4-LX.\n"); printf("\n"); printf(IDENT"Note: query device to view supported configurations.\n"); printf("\n"); } void MlxCfg::printVersion() { print_version_string(MLXCFG_NAME, ""); } void MlxCfg::printUsage() { printf("\n"IDENT"Usage:\n" IDENT2 MLXCFG_NAME " [-d <%s> ] [-y] |q[uery]|r[eset]>\n\n", DEVICE_NAME); } bool MlxCfg::tagExsists(mlxCfgParam tag) { for (std::vector::iterator it = _mlxParams.params.begin() ; it != _mlxParams.params.end(); it++) { if (it->first == tag) { return true; } } return false; } mlxCfgStatus MlxCfg::processArg(string tag, u_int32_t val) { int i; std::vector::iterator it; for ( i = (int)Mcp_Sriov_En ; i < (int)Mcp_Last ; i++) { if (tag == MlxCfgParams::param2str[i]) { if (tagExsists((mlxCfgParam)i)) { return err(true, "Duplicate parameter, %s.", tag.c_str()); } _mlxParams.params.push_back(cfgInfo((mlxCfgParam)i, val)); break; } } if (i == Mcp_Last) { return err(true, "Unknown Parameter: %s", tag.c_str()); } return MLX_CFG_OK; } static bool strToNum(string str, u_int32_t& num, int base=0) { char *endp; char* numStr = strcpy(new char[str.size()],str.c_str()); num = strtoul(numStr, &endp, base); if (*endp) { delete[] numStr; return false; } delete[] numStr; // check errno if (errno == ERANGE) { return false; } return true; } mlxCfgStatus MlxCfg::extractCfgArgs(int argc, char* argv[]) { int i = 0; string tag; string valstr; u_int32_t val = 0; for (;i < argc;i++) { char* ptr; // get the tag ptr = strtok(argv[i], "="); if (!ptr) { return err(true, "invalid Configuration argument %s", argv[i]); } tag = ptr; // hopefully its calling copy function. // get the val ptr = strtok(NULL, "="); if (!ptr) { return err(true, "invalid Configuration argument %s", argv[i]); } valstr = ptr; if (strtok(NULL, "=")) { return err(true, "Invalid Configuration argument %s", argv[i]); } //printf("-D- %s %s\n", tag.c_str(), valstr.c_str()); if (!strToNum(valstr, val, 0)) { return err(true, "Failed to parse %s=%s", tag.c_str(), valstr.c_str()); } // store val in the correct place in mlxconfig Params if (processArg(tag, val)) { return MLX_CFG_ERROR; } } return MLX_CFG_OK; } mlxCfgStatus MlxCfg::parseArgs(int argc, char* argv[]) { int i = 1; for (; i