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All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef __cplusplus extern "C" { #endif #include typedef struct tt_ctx { time_t now; } tt_ctx_t; // update context with the current time void tt_get_time(tt_ctx_t* tt); // get diff in ms between the time t1 was created and t2 double tt_diff_in_ms(tt_ctx_t t1, tt_ctx_t t2); #ifdef __cplusplus } #endif mstflint-4.8.0/tools_res_mgmt/tools_res_mgmt.c0000644000175000017500000004446413201023206020560 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #include #include #include #include #include #include #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) #include #endif #ifdef __WIN__ #include #define getpid() _getpid() #endif #include "tools_res_mgmt.h" #include "tools_time.h" #define VSEC_SEM_NUM 10 #define HW_SEM_NUM VSEC_SEM_NUM /* * Macros: */ /* * VSEC semaphore space macros */ #define SET_SPACE_FOR_SEMAPHORE_ACCESS(mf) \ if (mget_vsec_supp(mf)) { \ mset_addr_space(mf, AS_SEMAPHORE); \ } #define RESTORE_SPACE(mf) mset_addr_space(mf, AS_CR_SPACE) #define MWRITE4_SEMAPHORE(mf, offset, value, action_on_fail)\ do {\ SET_SPACE_FOR_SEMAPHORE_ACCESS(mf);\ if (mwrite4(mf, offset, value) != 4) {\ RESTORE_SPACE(mf);\ action_on_fail;\ }\ RESTORE_SPACE(mf);\ }while(0) #define MREAD4_SEMAPHORE(mf, offset, ptr, action_on_fail)\ do {\ SET_SPACE_FOR_SEMAPHORE_ACCESS(mf);\ if (mread4(mf, offset, ptr) != 4) {\ RESTORE_SPACE(mf);\ action_on_fail;\ }\ RESTORE_SPACE(mf);\ }while(0) /***********************/ static const char* status_to_str[] = { "Ok", "Resource is busy", "Tools resource management interface not available", "Device not supported", "Resource not supported", "CR-Space access error", "Memory allocation failed" }; struct device_sem_info { dm_dev_id_t dev_id; u_int32_t hw_sem_addr[HW_SEM_NUM]; // if semaphore entry supported: value != 0 , main semaphore is at [0] int vsec_sem_supported; }; static u_int32_t g_vsec_sem_addr[VSEC_SEM_NUM] = {0x0, 0x10}; #define HW_SEM_ADDR_MASK 0xf static struct device_sem_info g_dev_sem_info_db[] = { { DeviceConnectX2, // dev_id {0xf03bc}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX3, // dev_id {0xf03bc, 0xf03a0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX3Pro, // dev_id {0xf03bc, 0xf03a0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceInfiniScaleIV, // dev_id {0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceSwitchX, // dev_id {0}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectIB, // dev_id {0xe27f8}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceConnectX4, // dev_id {0xe250c}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceSwitchIB, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceSpectrum, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX4LX, // dev_id {0xe250c}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceSwitchIB2, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceConnectX5, // dev_id {0xe250c}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceBlueField, // dev_id {0xe250c}, // hw_sem_addr 1, // vsec_sem_supported }, { DeviceQuantum, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, { DeviceSpectrum2, // dev_id {0xa24f8}, // hw_sem_addr 0, // vsec_sem_supported }, }; #define MAX_SEMAPHORE_ADDRES 8 struct mad_lock_info { u_int32_t lock_key; u_int32_t lease_time_ms; tt_ctx_t start_time; }; struct trm_t { mfile* mf; const struct device_sem_info* dev_sem_info; struct mad_lock_info mad_lock[MAX_SEMAPHORE_ADDRES]; int ib_semaphore_lock_is_supported; }; /************************************ * Function: lock_hw_semaphore ************************************/ static trm_sts lock_hw_semaphore(mfile* mf, u_int32_t addr, unsigned int max_retries) { u_int32_t val = 0; unsigned int cnt = 0; int rc; while (((rc = mread4(mf, addr, &val)) == 4) && val == 1 && cnt < max_retries) { cnt ++; msleep(((rand() % 5) + 1)); } if (rc != 4) { return TRM_STS_CR_ACCESS_ERR; } else if (val == 0) { return TRM_STS_OK; } else { return TRM_STS_RES_BUSY; } } /************************************ * Function: unlock_hw_semaphore ************************************/ static trm_sts unlock_hw_semaphore(mfile* mf, u_int32_t addr) { int rc = mwrite4(mf, addr, 0) == 4 ? TRM_STS_OK : TRM_STS_CR_ACCESS_ERR; // give up the rest of the time slice msleep(0); return rc; } /************************************ * Function: lock_vsec_semaphore() ************************************/ static trm_sts lock_vsec_semaphore(mfile* mf, u_int32_t addr, unsigned int max_retries) { static u_int32_t pid = 0; u_int32_t read_val = 0; unsigned cnt = 0; if (!pid) { pid = getpid(); } do { // loop while the semaphore is taken by someone else if (cnt++ > max_retries) { return TRM_STS_RES_BUSY; } //write pid to semaphore MWRITE4_SEMAPHORE(mf, addr, pid, return TRM_STS_CR_ACCESS_ERR); // Read back MREAD4_SEMAPHORE(mf, addr, &read_val, return TRM_STS_CR_ACCESS_ERR); if (read_val == pid) break; msleep(((rand() % 5) + 1)); } while (read_val != pid); return TRM_STS_OK; } /************************************ * Function: unlock_vsec_semaphore() ************************************/ static trm_sts unlock_vsec_semaphore(mfile* mf, u_int32_t addr) { MWRITE4_SEMAPHORE(mf, addr, 0, return TRM_STS_CR_ACCESS_ERR); return TRM_STS_OK; } #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) /************************************ * Function: release_vs_mad_semaphore() ************************************/ #define GET_LEASE_TIME_MS(is_leaseable, lease_time_exp) ((is_leaseable) ? (50 * (1 << (lease_time_exp))) : 0) static trm_sts release_vs_mad_semaphore(trm_ctx trm, trm_resourse resource) { u_int32_t lock_key = 0; u_int8_t new_lease_exponent = 0; int is_leaseable = 0; int rc = TRM_STS_OK; if (!trm->mad_lock[resource].lock_key) { return TRM_STS_OK; } if (trm->ib_semaphore_lock_is_supported == 0) { return TRM_STS_RES_NOT_SUPPORTED; } rc = mib_semaphore_lock_vs_mad(trm->mf, SMP_SEM_RELEASE, g_vsec_sem_addr[resource], trm->mad_lock[resource].lock_key, &lock_key, &is_leaseable, &new_lease_exponent, SEM_LOCK_SET); if (rc == ME_MAD_BUSY) { return TRM_STS_RES_BUSY; } else if (rc) { return TRM_STS_RES_NOT_SUPPORTED; } else if (lock_key != 0) { return TRM_STS_CR_ACCESS_ERR; } trm->mad_lock[resource].lock_key = 0; trm->mad_lock[resource].lease_time_ms = 0; return TRM_STS_OK; } /************************************ * Function: lock_vs_mad_semaphore() ************************************/ static trm_sts lock_vs_mad_semaphore(trm_ctx trm, trm_resourse resource, unsigned int max_retries) { u_int32_t new_lock_key = 0; u_int8_t new_lease_exponent = 0; int is_leaseable = 0; tt_ctx_t curr_time; int rc = TRM_STS_OK; unsigned int cnt = 0; if (trm->ib_semaphore_lock_is_supported == 0) { return TRM_STS_RES_NOT_SUPPORTED; } // check if we got lock_key if (trm->mad_lock[resource].lock_key) { // TODO: use threads to extend lock every ~20 seconds untill releasing the lock // check if extension is needed if (trm->mad_lock[resource].lease_time_ms == 0) { // no need to extend lease is untill device reboot return TRM_STS_OK; } tt_get_time(&curr_time); double diff = tt_diff_in_ms(trm->mad_lock[resource].start_time, curr_time); if ( diff <= trm->mad_lock[resource].lease_time_ms * 0.6) { return TRM_STS_OK; } // extension needed try to extend rc = mib_semaphore_lock_vs_mad(trm->mf, SMP_SEM_EXTEND, g_vsec_sem_addr[resource], trm->mad_lock[resource].lock_key, &new_lock_key, &is_leaseable, &new_lease_exponent, SEM_LOCK_SET); if (rc == ME_OK && new_lock_key == trm->mad_lock[resource].lock_key) { // extend OK trm->mad_lock[resource].lease_time_ms = GET_LEASE_TIME_MS(is_leaseable, new_lease_exponent); trm->mad_lock[resource].start_time = curr_time; return TRM_STS_OK; } else { // extend failed try to re-lock the semaphore trm->mad_lock[resource].lock_key = 0; trm->mad_lock[resource].lease_time_ms = 0; new_lock_key = 0; } } // if not or extend failed try to lock do { if (cnt++ > max_retries) { return TRM_STS_RES_BUSY; } rc = mib_semaphore_lock_vs_mad(trm->mf, SMP_SEM_LOCK, g_vsec_sem_addr[resource], 0, &new_lock_key, &is_leaseable, &new_lease_exponent, SEM_LOCK_SET); if (rc == ME_MAD_BUSY || new_lock_key == 0) { msleep(((rand() % 5) + 1)); } } while (rc == ME_MAD_BUSY || new_lock_key == 0) ; if (rc) { return TRM_STS_RES_NOT_SUPPORTED; } trm->mad_lock[resource].lock_key = new_lock_key; trm->mad_lock[resource].lease_time_ms = GET_LEASE_TIME_MS(is_leaseable, new_lease_exponent); tt_get_time(&(trm->mad_lock[resource].start_time)); return TRM_STS_OK; } #endif /************************************ * Function: get_device_sem_info ************************************/ static struct device_sem_info* get_device_sem_info(dm_dev_id_t dev_id) { size_t i; for (i = 0; i < sizeof(g_dev_sem_info_db)/sizeof(g_dev_sem_info_db[0]); i++) { if (g_dev_sem_info_db[i].dev_id == dev_id) { return &g_dev_sem_info_db[i]; } } return NULL; } /************************************ * Function: trm_create ************************************/ trm_sts trm_create(trm_ctx* trm_p, mfile* mf) { dm_dev_id_t dev_id = DeviceStartMarker; u_int32_t hw_dev_id; u_int32_t chip_rev; *trm_p = (trm_ctx) malloc (sizeof(struct trm_t)); if (! (*trm_p)) { return TRM_STS_MEM_ERROR; } memset((*trm_p), 0, sizeof(struct trm_t)); (*trm_p)->mf = mf; #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) u_int32_t dev_flags = 0; if (!mget_mdevs_flags(mf, &dev_flags)) { if ((dev_flags & MDEVS_IB) && mib_semaphore_lock_is_supported(mf) == 1) { (*trm_p)->ib_semaphore_lock_is_supported = 1; } } #endif if (dm_get_device_id((*trm_p)->mf, &dev_id, &hw_dev_id, &chip_rev)) { free(*trm_p); *trm_p = (trm_ctx)NULL; return dev_id == DeviceUnknown ? TRM_STS_DEV_NOT_SUPPORTED : TRM_STS_CR_ACCESS_ERR; } (*trm_p)->dev_sem_info = get_device_sem_info(dev_id); // Not supported device if (!((*trm_p)->dev_sem_info)) { free(*trm_p); *trm_p = (trm_ctx)NULL; return TRM_STS_DEV_NOT_SUPPORTED; } return TRM_STS_OK; } /************************************ * Function: trm_destroy ************************************/ trm_sts trm_destroy(trm_ctx trm) { if (trm) { free(trm); } return TRM_STS_OK; } /************************************ * Function: trm_lock ************************************/ trm_sts trm_lock(trm_ctx trm, trm_resourse res, unsigned int max_retries) { u_int32_t dev_type = 0; mget_mdevs_flags(trm->mf, &dev_type); // lock resource on appropriate ifc if supported switch ((int)res) { case TRM_RES_ICMD: if (trm->dev_sem_info->vsec_sem_supported && mget_vsec_supp(trm->mf)) { return lock_vsec_semaphore(trm->mf, g_vsec_sem_addr[TRM_RES_ICMD], max_retries); #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) } else if (trm->dev_sem_info->vsec_sem_supported && (dev_type & MDEVS_IB)) { return lock_vs_mad_semaphore(trm, TRM_RES_ICMD, max_retries); #endif } else if (trm->dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK]) { // lock hw semaphore return lock_hw_semaphore(trm->mf, trm->dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK], max_retries); } break; case TRM_RES_FLASH_PROGRAMING: if (trm->dev_sem_info->vsec_sem_supported && mget_vsec_supp(trm->mf)) { return lock_vsec_semaphore(trm->mf, g_vsec_sem_addr[TRM_RES_FLASH_PROGRAMING], max_retries); #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) } else if (trm->dev_sem_info->vsec_sem_supported && (dev_type & MDEVS_IB)) { return lock_vs_mad_semaphore(trm, TRM_RES_FLASH_PROGRAMING, max_retries); #endif } break; case TRM_RES_HCR_FLASH_PROGRAMING: if (trm->dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK]){ // lock hw semaphore return lock_hw_semaphore(trm->mf, trm->dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK], max_retries); } break; case TRM_RES_HW_TRACER: if (trm->dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK]){ // lock hw semaphore return lock_hw_semaphore(trm->mf, trm->dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK], max_retries); } break; default: break; } return TRM_STS_RES_NOT_SUPPORTED; } /************************************ * Function: trm_try_lock ************************************/ trm_sts trm_try_lock(trm_ctx trm, trm_resourse res) { return trm_lock(trm, res, 1); } /************************************ * Function: trm_unlock ************************************/ trm_sts trm_unlock(trm_ctx trm, trm_resourse res) { u_int32_t dev_type = 0; mget_mdevs_flags(trm->mf, &dev_type); // lock resource on appropriate ifc if supported switch ((int)res) { case TRM_RES_ICMD: if (trm->dev_sem_info->vsec_sem_supported && mget_vsec_supp(trm->mf)) { return unlock_vsec_semaphore(trm->mf, g_vsec_sem_addr[TRM_RES_ICMD]); #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) } else if (trm->dev_sem_info->vsec_sem_supported && (dev_type & MDEVS_IB)) { return release_vs_mad_semaphore(trm, TRM_RES_ICMD); #endif } else if (trm->dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK]){ // lock hw semaphore return unlock_hw_semaphore(trm->mf, trm->dev_sem_info->hw_sem_addr[TRM_RES_MAIN_SEM & HW_SEM_ADDR_MASK]); } break; case TRM_RES_FLASH_PROGRAMING: if (trm->dev_sem_info->vsec_sem_supported && mget_vsec_supp(trm->mf)) { return unlock_vsec_semaphore(trm->mf, g_vsec_sem_addr[TRM_RES_FLASH_PROGRAMING]); #if !defined(__FreeBSD__) && !defined(UEFI_BUILD) } else if (trm->dev_sem_info->vsec_sem_supported && (dev_type & MDEVS_IB)) { return release_vs_mad_semaphore(trm, TRM_RES_FLASH_PROGRAMING); #endif } break; case TRM_RES_HCR_FLASH_PROGRAMING: if (trm->dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK]){ // lock hw semaphore return unlock_hw_semaphore(trm->mf, trm->dev_sem_info->hw_sem_addr[TRM_RES_HCR_FLASH_PROGRAMING & HW_SEM_ADDR_MASK]); } break; case TRM_RES_HW_TRACER: if (trm->dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK]){ // lock hw semaphore return unlock_hw_semaphore(trm->mf, trm->dev_sem_info->hw_sem_addr[TRM_RES_HW_TRACER & HW_SEM_ADDR_MASK]); } break; default: break; } return TRM_STS_RES_NOT_SUPPORTED; } /************************************ * Function: trm_sts2str ************************************/ const char* trm_sts2str(trm_sts status) { size_t num_of_sts = sizeof(status_to_str)/sizeof(status_to_str[0]); if ((size_t)status >= num_of_sts) { return "Unknown status code"; } return status_to_str[status]; } mstflint-4.8.0/tools_res_mgmt/tools_time.c0000644000175000017500000000330713201023206017670 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #include #include #include #include "tools_time.h" void tt_get_time(tt_ctx_t* tt) { if (!tt) { return; } time(&(tt->now)); return; } double tt_diff_in_ms(tt_ctx_t t1, tt_ctx_t t2) { return difftime(t2.now, t1.now) * 1000; } mstflint-4.8.0/tools_res_mgmt/Makefile.am0000644000175000017500000000345013201023206017401 0ustar mehdimehdi# Copyright (c) 2004-2010 Mellanox Technologies LTD. All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS # BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN # ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. #-- # Makefile.am -- Process this file with automake to produce Makefile.in USER_DIR = $(top_srcdir) MTCR_DIR = $(USER_DIR)/include/mtcr_ul AM_CPPFLAGS = -I. -I../common -I$(MTCR_DIR) -I.. -I$(USER_DIR)/mtcr_ul AM_CFLAGS = -W -Wall -Werror -g -MP -MD $(COMPILER_FPIC) noinst_LIBRARIES = libtools_res_mgmt.a libtools_res_mgmt_a_SOURCES = tools_res_mgmt.c tools_time.c if ENABLE_INBAND else AM_CFLAGS += -DNO_INBAND endif mstflint-4.8.0/tools_res_mgmt/tools_res_mgmt.h0000644000175000017500000000740313201023206020555 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifndef TOOLS_RESOURCE_MGMT_H #define TOOLS_RESOURCE_MGMT_H #include #ifdef __cplusplus extern "C" { #endif typedef enum { TRM_STS_OK = 0, TRM_STS_RES_BUSY, TRM_STS_IFC_NA, TRM_STS_DEV_NOT_SUPPORTED, TRM_STS_RES_NOT_SUPPORTED, TRM_STS_CR_ACCESS_ERR, TRM_STS_MEM_ERROR } trm_sts; typedef enum { // vsec semaphores TRM_RES_ICMD = 0x0, TRM_RES_FLASH_PROGRAMING = 0x1, // hw semaphores TRM_RES_MAIN_SEM = 0x10, TRM_RES_HW_TRACER = TRM_RES_MAIN_SEM, TRM_RES_TOOLS_HCR = TRM_RES_MAIN_SEM, TRM_RES_HCR_FLASH_PROGRAMING = 0x11, TRM_RES_ALL = 0xffff, } trm_resourse; typedef struct trm_t* trm_ctx; /* * Create tools resource context * trm_p: trm_ctx pointer to be allocated * Parameter (mf) - an opened mst device handler * Return TOOLS_STS_OK on success of creating the context, otherwise any other error code. */ trm_sts trm_create(trm_ctx* trm_p, mfile* mf); /* * Destroy the context * trm: trm_ctx to be destroyed * Return TOOLS_STS_OK on success of destroying the context, otherwise any other error code. */ trm_sts trm_destroy(trm_ctx trm); /* * Lock tools resource * Parameter (mf) - an opened mst device handler * Parameter (res) - resource to acquire. * Parameter (max_retry) - max retry count before declaring resource busy. * Return TOOLS_STS_OK on success of locking all the desired resources, otherwise any other error code. */ trm_sts trm_lock(trm_ctx trm, trm_resourse res, unsigned int max_retry); /* * Try to lock tools resource (returns immediately if resource busy) * Parameter (mf) - an opened mst device handler * Parameter (res) - resource to acquire. * Return TOOLS_STS_OK on success of locking all the desired resources, otherwise any other error code. */ trm_sts trm_try_lock(trm_ctx trm, trm_resourse res); /* * Unlock tools resource * Parameter (mf) - an opened mst device handler * Parameter (res) - resource to release. * Return TOOLS_STS_OK if all given resources were unlocked successfully. */ trm_sts trm_unlock(trm_ctx trm, trm_resourse res); /* * Translate tools_sem_mgmt_sts status code to a human readable string. * Parameter (status) - status code to translate. * Return descriptive string. */ const char* trm_sts2str(trm_sts status); #ifdef __cplusplus } #endif #endif // TOOLS_RESOURCE_MGMT_H mstflint-4.8.0/mtcr_py/0000755000175000017500000000000013201023227013766 5ustar mehdimehdimstflint-4.8.0/mtcr_py/Makefile.in0000644000175000017500000004152713201023227016044 0ustar mehdimehdi# Makefile.in generated by automake 1.13.4 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright (c) 2004-2010 Mellanox Technologies LTD. All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. 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All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS # BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN # ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. #-- import mtcr device = "/dev/mst/l-apps08:23108,@dev@mst@mt26448_pci_cr0" device = "/dev/mst/mt26448_pciconf0" device = "mlx4_core0@pci0:0:5:0" mf = mtcr.MstDevice(device) print "0x%x" % mf.read4(0xf0014) for d in mf.read4Block(0xf0014, 8): print "[0x%08x]" % d mf.write4Block(0xf0014, [0, 0, 0, 0, 0, 0, 0, 0]) mstflint-4.8.0/mtcr_py/Makefile.am0000644000175000017500000000337313201023206016025 0ustar mehdimehdi# Copyright (c) 2004-2010 Mellanox Technologies LTD. All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS # BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN # ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. #-- # Makefile.am -- Process this file with automake to produce Makefile.in MTCR_CONFIG_DIR = mtcr_ul mtcr_pylibdir = $(libdir)/mstflint/python_tools/ USER_DIR = .. MTCR_DIR = $(USER_DIR)/${MTCR_CONFIG_DIR} mtcr_pylib_DATA = cmtcr.so mtcr.py dist_mtcr_pylib_DATA = mtcr.py cmtcr.so: $(CC) -g -Wall -pthread -shared ${CFLAGS} $(MTCR_DIR)/*.o -o cmtcr.so CLEANFILES = cmtcr.so mstflint-4.8.0/mtcr_py/mtcr.py0000755000175000017500000001710713201023206015313 0ustar mehdimehdi # Copyright (c) 2004-2010 Mellanox Technologies LTD. All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS # BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN # ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. #-- import os import sys import platform import ctypes def ones(n): return (1 << n) - 1 def extractField(val, start, size): return (val & (ones(size)<> start def insertField(val1, start1, val2, start2, size): return val1 & ~(ones(size)< #include #include #include #define CMTCR_UNUSED(var) ((void)(var)) static PyObject* mtcrModule = 0; static PyObject* mtcrExceptionType = 0; /********************************************** * mtcr_init * @return *********************************************/ PyObject* mtcr_init(PyObject* self, PyObject* args) { PyObject* mfileObj; const char* dev; mfile* mf; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "Os", &mfileObj, &dev)) return NULL; mf = mopen(dev); if (!mf) { PyErr_SetString(mtcrExceptionType, strerror(errno)); return NULL; } PyObject* mfLong = PyLong_FromVoidPtr(mf); PyObject_SetAttrString(mfileObj, "mf", mfLong); Py_DecRef(mfLong); return Py_None; } /********************************************** * mtcr_close *********************************************/ PyObject* mtcr_close(PyObject* self, PyObject* args) { PyObject* mfileObj; const char* dev; mfile* mf; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "Os", &mfileObj, &dev)) return NULL; PyObject* mfLong = PyObject_GetAttrString(mfileObj, "mf"); mf = (mfile*) PyLong_AsVoidPtr(mfLong); if (mf) mclose(mf); Py_DecRef(mfLong); return Py_None; } /********************************************** * mtcr_del *********************************************/ PyObject* mtcr_del(PyObject* self, PyObject* args) { PyObject* mfileObj; const char* dev; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "Os", &mfileObj, &dev)) return NULL; mtcr_close(self, args); PyObject* mfLong = PyLong_FromLong(0); PyObject_SetAttrString(mfLong, "mf", mfLong); Py_DecRef(mfLong); return Py_None; } /********************************************** * mtcr_read4 *********************************************/ PyObject* mtcr_read4(PyObject* self, PyObject* args) { PyObject* mfileObj; int addr; mfile* mf; u_int32_t value; PyObject* valueObj; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "Oi", &mfileObj, &addr)) return NULL; PyObject* mfLong = PyObject_GetAttrString(mfileObj, "mf"); mf = (mfile*) PyLong_AsVoidPtr(mfLong); Py_DecRef(mfLong); if (mread4(mf, addr, &value) != 4) { PyErr_SetString(mtcrExceptionType, strerror(errno)); return NULL; } valueObj = PyLong_FromLong(value); return valueObj; } /********************************************** * mtcr_read4 *********************************************/ PyObject* mtcr_read4block(PyObject* self, PyObject* args) { PyObject* mfileObj; int addr; int i; mfile* mf; int dword_len; PyObject* data_list; u_int32_t* data_buf; PyObject* mfLong; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "Oii", &mfileObj, &addr, &dword_len)) return NULL; mfLong = PyObject_GetAttrString(mfileObj, "mf"); mf = (mfile*) PyLong_AsVoidPtr(mfLong); Py_DecRef(mfLong); data_buf = malloc(sizeof(u_int32_t)*dword_len); if (!data_buf) { PyErr_SetString(mtcrExceptionType, "Out read of memory"); return NULL; } if (mread4_block(mf, addr, data_buf, dword_len*4) != (dword_len*4)) { PyErr_SetString(mtcrExceptionType, strerror(errno)); return NULL; } data_list = PyList_New(dword_len); for (i = 0; i < dword_len; i++) { PyList_SET_ITEM(data_list, i, PyInt_FromLong((long)data_buf[i])); } return data_list; } /********************************************** * mtcr_write4 *********************************************/ PyObject* mtcr_write4(PyObject* self, PyObject* args) { PyObject* mfileObj; int addr; mfile* mf; u_int32_t value; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "Oii", &mfileObj, &addr, &value)) return NULL; PyObject* mfLong = PyObject_GetAttrString(mfileObj, "mf"); mf = (mfile*) PyLong_AsVoidPtr(mfLong); Py_DecRef(mfLong); if (mwrite4(mf, addr, value) != 4) { PyErr_SetString(mtcrExceptionType, strerror(errno)); return NULL; } return Py_None; } /********************************************** * mtcr_write4block *********************************************/ PyObject* mtcr_write4block(PyObject* self, PyObject* args) { PyObject* mfileObj; int addr; int i; mfile* mf; int dword_len; PyObject* data_list; u_int32_t* data_buf; PyObject* mfLong; CMTCR_UNUSED(self); // Parse args if (!PyArg_ParseTuple(args, "OiO", &mfileObj, &addr, &data_list)) return NULL; mfLong = PyObject_GetAttrString(mfileObj, "mf"); mf = (mfile*) PyLong_AsVoidPtr(mfLong); Py_DecRef(mfLong); dword_len = PyList_Size(data_list); data_buf = malloc(sizeof(u_int32_t)*dword_len); if (!data_buf) { PyErr_SetString(mtcrExceptionType, "Write Out of memory"); return NULL; } for (i = 0; i < dword_len; i++) { data_buf[i] = PyLong_AsUnsignedLong(PyList_GET_ITEM(data_list, i)); } if (mwrite4_block(mf, addr, data_buf, dword_len*4) != (dword_len*4)) { PyErr_SetString(mtcrExceptionType, strerror(errno)); return NULL; } return Py_None; } /********************************************** * mtcr_funcs static db *********************************************/ static PyMethodDef mtcr_funcs [] ={ {"mtcr_init", (PyCFunction)mtcr_init, METH_VARARGS, "Init mfile object"}, {"mtcr_close", (PyCFunction)mtcr_close, METH_VARARGS, "Close internal mfile"}, {"mtcr_del", (PyCFunction)mtcr_del, METH_VARARGS, "Free resources"}, {"mtcr_read4", (PyCFunction)mtcr_read4, METH_VARARGS, "Read dword"}, {"mtcr_write4", (PyCFunction)mtcr_write4, METH_VARARGS, "Write dword"}, {"mtcr_read4block", (PyCFunction)mtcr_read4block, METH_VARARGS, "Read block of dwords"}, {"mtcr_write4block", (PyCFunction)mtcr_write4block, METH_VARARGS, "Write block of dwords"}, {NULL, NULL, 0, NULL} }; #define STR_EXPAND(tok) #tok #define STR(tok) STR_EXPAND(tok) #define TOK_PASTE(x, y) x ## y #define TOK_PASTE2(x, y) TOK_PASTE(x, y) #define MODULE_NAME "cmtcr" STR(PY_VER) #define INIT_FUNC TOK_PASTE2(initcmtcr, PY_VER) /********************************************** * initcmtcr * @return *********************************************/ #ifndef PyMODINIT_FUNC /* declarations for DLL import/export */ #define PyMODINIT_FUNC void #endif PyMODINIT_FUNC INIT_FUNC() { Py_InitModule(MODULE_NAME, mtcr_funcs); mtcrModule = PyImport_ImportModule("mtcr"); if (!mtcrModule) { PyErr_SetString(mtcrExceptionType, "Failed to import module"); return; } mtcrExceptionType = PyObject_GetAttrString(mtcrModule, "MtcrException"); if (!mtcrExceptionType) { PyErr_SetString(PyExc_ImportError, "Failed to import MtcrException class"); return; } } mstflint-4.8.0/gitversion.sh0000755000175000017500000000023513201023206015036 0ustar mehdimehdi#!/bin/sh if git rev-parse --short HEAD > gitversion.tmp then echo "#define TOOLS_GIT_SHA \"`tr -d '\n' < gitversion.tmp`\"" > $1 fi rm gitversion.tmp mstflint-4.8.0/include/0000755000175000017500000000000013201023206013731 5ustar mehdimehdimstflint-4.8.0/include/mtcr_ul/0000755000175000017500000000000013201023206015376 5ustar mehdimehdimstflint-4.8.0/include/mtcr_ul/mtcr.h0000644000175000017500000001346513201023206016525 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MTCR_H #define MTCR_H #ifdef __cplusplus extern "C" { #endif #include #include "mtcr_com_defs.h" #include "mtcr_mf.h" typedef enum mtcr_access_method { MTCR_ACCESS_ERROR = MST_ERROR, MTCR_ACCESS_MEMORY = MST_PCI, MTCR_ACCESS_CONFIG = MST_PCICONF, MTCR_ACCESS_INBAND = MST_IB } mtcr_access_method_t; /* * Read 4 bytes, return number of succ. read bytes or -1 on failure */ int mread4(mfile *mf, unsigned int offset, u_int32_t *value); /* * Write 4 bytes, return number of succ. written bytes or -1 on failure */ int mwrite4(mfile *mf, unsigned int offset, u_int32_t value); int mread4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len); int mwrite4_block (mfile *mf, unsigned int offset, u_int32_t* data, int byte_len); int msw_reset(mfile *mf); int mhca_reset(mfile *mf); /* * Get list of MST (Mellanox Software Tools) devices. * Put all device names as null-terminated strings to buf. * * Return number of devices found or -1 if buf overflow */ int mdevices(char *buf, int len, int mask); /* * Get list of MST (Mellanox Software Tools) devices info records. * Return a dynamic allocated array of dev_info records. * len will be updated to hold the array length * */ dev_info* mdevices_info(int mask, int* len); /* * * Get list of MST (Mellanox Software Tools) devices info records. * * Return a dynamic allocated array of dev_info records. * * len will be updated to hold the array length * * Verbosity will decide whether to get all the Physical functions or not. */ dev_info* mdevices_info_v(int mask, int* len, int verbosity); void mdevice_info_destroy(dev_info* dev_info, int len); void mdevices_info_destroy(dev_info* dev_info, int len); int mget_mdevs_type(mfile *mf, u_int32_t *mtype); /* * Open Mellanox Software tools (mst) driver. Device type==INFINIHOST * Return valid mfile ptr or 0 on failure */ mfile *mopen(const char *name); mfile *mopend(const char *name, int type); mfile *mopen_fw_ctx(void* fw_cmd_context, void* fw_cmd_func, void* extra_data); mfile *mopen_adv(const char *name, MType mtype); /* * Close Mellanox driver * req. descriptor */ int mclose(mfile *mf); unsigned char mset_i2c_slave(mfile *mf, unsigned char new_i2c_slave); int mget_mdevs_flags(mfile *mf, u_int32_t *devs_flags); int maccess_reg_mad(mfile *mf, u_int8_t *data); int mos_reg_access(mfile *mf, int reg_access, void *reg_data, u_int32_t cmd_type); int maccess_reg_cmdif(mfile *mf, reg_access_t reg_access, void *reg_data, u_int32_t cmd_type); int maccess_reg(mfile *mf, u_int16_t reg_id, maccess_reg_method_t reg_method, void* reg_data, u_int32_t reg_size, u_int32_t r_size_reg, // used when sending via icmd interface (how much data should be read back to the user) u_int32_t w_size_reg, // used when sending via icmd interface (how much data should be written to the scratchpad) // if you dont know what you are doing then r_size_reg = w_size_reg = your_register_size int *reg_status); int icmd_send_command(mfile *mf, int opcode, void* data, int data_size, int skip_write); int icmd_clear_semaphore(mfile *mf); int tools_cmdif_send_inline_cmd(mfile* mf, u_int64_t in_param, u_int64_t* out_param, u_int32_t input_modifier, u_int16_t opcode, u_int8_t opcode_modifier); int tools_cmdif_send_mbox_command(mfile* mf, u_int32_t input_modifier, u_int16_t opcode, u_int8_t opcode_modifier, int data_offs_in_mbox, void* data, int data_size, int skip_write); int tools_cmdif_unlock_semaphore(mfile *mf); int mget_max_reg_size(mfile *mf); const char* m_err2str(MError status); int mread_buffer(mfile *mf, unsigned int offset, u_int8_t* data, int byte_len); int mwrite_buffer(mfile *mf, unsigned int offset, u_int8_t* data, int byte_len); int mget_vsec_supp(mfile* mf); int mget_addr_space(mfile* mf); int mset_addr_space(mfile* mf, int space); int mclear_pci_semaphore(const char* name); int mvpd_read4(mfile *mf, unsigned int offset, u_int8_t value[4]); #ifndef NO_INBAND int mib_smp_set(mfile* mf, u_int8_t* data, u_int16_t attr_id, u_int32_t attr_mod); int mib_smp_get(mfile* mf, u_int8_t* data, u_int16_t attr_id, u_int32_t attr_mod); #endif #ifdef __cplusplus } #endif #define DEV_MST_EXAMPLE1 "mlx4_0" #define DEV_MST_EXAMPLE2 "03:00.0" #endif mstflint-4.8.0/include/mtcr_ul/mtcr_mf.h0000644000175000017500000001127013201023206017177 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef __MTCR_MF__ #define __MTCR_MF__ typedef struct icmd_params_t { int icmd_opened; int took_semaphore; int ctrl_addr; int cmd_addr; u_int32_t max_cmd_size; int semaphore_addr; int static_cfg_not_done_addr; int static_cfg_not_done_offs; u_int32_t lock_key; int ib_semaphore_lock_supported; } icmd_params; typedef struct ctx_params_t { void *fw_cmd_context; void *fw_cmd_func; } ctx_params; typedef struct io_region_t { unsigned int start; unsigned int end; } io_region; typedef struct tools_hcr_params_t { int supp_cr_mbox; // 1: mbox supported , -1: mbox not supported } tools_hcr_params; typedef struct access_reg_params_t { int max_reg_size; } access_reg_params; typedef void (*f_mpci_change) (mfile *mf); /* All fields in follow structure are not supposed to be used */ /* or modified by user programs. Except i2c_slave that may be */ /* modified before each access to target I2C slave address */ struct mfile_t { MType tp; /* type of driver */ MType res_tp; /* Will be used with HCR if need */ DType dtype; /* target device to access to */ DType itype; /* interface device to access via */ int is_i2cm; /* use device as I2C master */ int is_vm; /* if the machine is VM */ int cr_access; /* If cr access is allowed in MLNXOS devices */ unsigned char i2c_slave; int gpio_en; io_region* iorw_regions; /* For LPC devices */ int regions_num; char* dev_name; int fd; int res_fd; /* Will be used with HCR if need*/ int sock; /* in not -1 - remote interface */ void *ptr; unsigned int map_size; unsigned long long start_idx; /************************ FPGA DDR3 *********************************/ void *ddr3_ptr; unsigned long long ddr3_start_idx; unsigned int ddr3_map_size; /********************************************************************/ MIB_Private mib; /* Data for IB interface (if relevant) */ void *ctx; unsigned int i2c_RESERVED; /* Reserved for internal usage (i2c internal) */ int i2c_smbus; enum Mdevs_t flags; u_int32_t connectx_wa_slot; /* apply connectx cr write workaround */ int connectx_wa_last_op_write; u_int32_t connectx_wa_stat; u_int64_t connectx_wa_max_retries; u_int64_t connectx_wa_num_of_writes; u_int64_t connectx_wa_num_of_retry_writes; int server_ver_major; int server_ver_minor; unsigned int proto_type; dev_info* dinfo; //for ICMD access icmd_params icmd; // for UEFI ctx_params context; // for new pci capability int old_mst; int vsec_supp; unsigned int vsec_addr; int address_space; int multifunction; // for tools HCR access tools_hcr_params hcr_params; // for sending access registers access_reg_params acc_reg_params; // UL void* ul_ctx; // Dynamic libs Ctx void* dl_context; // Cables CTX int is_cable; void* cable_ctx; f_mpci_change mpci_change; }; #endif mstflint-4.8.0/include/mtcr_ul/mtcr_com_defs.h0000644000175000017500000002111713201023206020355 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifndef _MTCR_COM_DEFS_H #define _MTCR_COM_DEFS_H #ifdef __WIN__ #include #include #ifdef MTCR_EXPORTS #define MTCR_API __declspec(dllexport) #else #define MTCR_API __declspec(dllimport) #endif #if defined(_MSC_VER) #include #else typedef __int8 int8_t; typedef __int16 int16_t; typedef __int32 int32_t; typedef __int64 int64_t; #endif // !_MSC_VER typedef unsigned __int8 u_int8_t; typedef unsigned __int16 u_int16_t; typedef unsigned __int32 u_int32_t; typedef unsigned __int64 u_int64_t; #if defined(_WIN64) typedef __int64 MT_long_ptr_t; typedef unsigned __int64 MT_ulong_ptr_t; #else typedef _W64 long MT_long_ptr_t; typedef _W64 unsigned long MT_ulong_ptr_t; #endif #elif defined(__DJGPP__) typedef unsigned char u_int8_t; typedef char int8_t; typedef unsigned short u_int16_t; typedef short int16_t; typedef unsigned int u_int32_t; typedef long int32_t; typedef unsigned long long u_int64_t; typedef long long int64_t; #define MTCR_API #else /* UNIX */ #include #define MTCR_API #endif //#ifndef USE_IB_MGT typedef struct mib_private_t { int dummy; } MIB_Private; //#else //#include "mtcr_ib_private.h" //#endif typedef enum MError { ME_OK = 0, ME_ERROR, ME_BAD_PARAMS, ME_CR_ERROR, ME_NOT_IMPLEMENTED, ME_SEM_LOCKED, ME_MEM_ERROR, ME_MAD_SEND_FAILED, ME_UNKOWN_ACCESS_TYPE, ME_UNSUPPORTED_DEVICE, ME_REG_NOT_SUPPORTED, ME_PCI_READ_ERROR, ME_PCI_WRITE_ERROR, ME_PCI_SPACE_NOT_SUPPORTED, ME_PCI_IFC_TOUT, ME_UNSUPPORTED_OPERATION, ME_UNSUPPORTED_ACCESS_TYPE, // errors regarding REG_ACCESS ME_REG_ACCESS_OK = 0, ME_REG_ACCESS_BAD_STATUS_ERR = 0x100, ME_REG_ACCESS_BAD_METHOD, ME_REG_ACCESS_NOT_SUPPORTED, ME_REG_ACCESS_DEV_BUSY, ME_REG_ACCESS_VER_NOT_SUPP, ME_REG_ACCESS_UNKNOWN_TLV, ME_REG_ACCESS_REG_NOT_SUPP, ME_REG_ACCESS_CLASS_NOT_SUPP, ME_REG_ACCESS_METHOD_NOT_SUPP, ME_REG_ACCESS_BAD_PARAM, ME_REG_ACCESS_RES_NOT_AVLBL, ME_REG_ACCESS_MSG_RECPT_ACK, ME_REG_ACCESS_UNKNOWN_ERR, ME_REG_ACCESS_SIZE_EXCCEEDS_LIMIT, ME_REG_ACCESS_CONF_CORRUPT, ME_REG_ACCESS_LEN_TOO_SMALL, ME_REG_ACCESS_BAD_CONFIG, ME_REG_ACCESS_ERASE_EXEEDED, ME_REG_ACCESS_INTERNAL_ERROR, // errors regarding ICMD ME_ICMD_STATUS_CR_FAIL = 0x200, // cr-space access failure ME_ICMD_INVALID_OPCODE, ME_ICMD_INVALID_CMD, ME_ICMD_OPERATIONAL_ERROR, ME_ICMD_BAD_PARAM, ME_ICMD_BUSY, ME_ICMD_INIT_FAILED, ME_ICMD_NOT_SUPPORTED, ME_ICMD_STATUS_SEMAPHORE_TO, // timed out while trying to take semaphore ME_ICMD_STATUS_EXECUTE_TO, // timed out while waiting for command to execute ME_ICMD_STATUS_IFC_BUSY, ME_ICMD_STATUS_ICMD_NOT_READY, ME_ICMD_UNSUPPORTED_ICMD_VERSION, ME_ICMD_UNKNOWN_STATUS, ME_ICMD_ICM_NOT_AVAIL, ME_ICMD_WRITE_PROTECT, ME_ICMD_SIZE_EXCEEDS_LIMIT, //errors regarding Tools CMDIF ME_CMDIF_BUSY = 0x300, ME_CMDIF_TOUT, ME_CMDIF_BAD_STATUS, ME_CMDIF_BAD_OP, ME_CMDIF_NOT_SUPP, ME_CMDIF_BAD_SYS, ME_CMDIF_UNKN_TLV, ME_CMDIF_RES_STATE, ME_CMDIF_UNKN_STATUS, //errors regarding MAD IF ME_MAD_BUSY = 0x400, ME_MAD_REDIRECT, ME_MAD_BAD_VER, ME_MAD_METHOD_NOT_SUPP, ME_MAD_METHOD_ATTR_COMB_NOT_SUPP, ME_MAD_BAD_DATA, ME_MAD_GENERAL_ERR, ME_LAST } MError; // typedefs for UEFI #ifdef UEFI_BUILD #include #endif typedef enum MType_t { MST_ERROR = 0x0, MST_FPGA = 0x1, // Unsupported MST_MLNXOS = 0x2, MST_LPC = 0x4, MST_PCI = 0x8, MST_PCICONF = 0x10, /*MST_CALBR,*/ MST_USB = 0x20, MST_IB = 0x40, MST_IF = 0x80, MST_PPC = 0x100, MST_USB_DIMAX = 0x200, MST_FWCTX = 0x400, MST_REMOTE = 0x800, #ifdef ENABLE_MST_DEV_I2C MST_DEV_I2C = 0x1000, #endif // 0x2000 reserved MST_FPGA_ICMD = 0x4000, MST_CABLE = 0x8000, MST_FPGA_DRIVER = 0x10000, MST_DEFAULT = 0xffffffff & ~MST_CABLE & ~MST_FPGA & ~MST_FPGA_ICMD & ~MST_FPGA_DRIVER } MType; typedef enum DType_t { MST_GAMLA, MST_TAVOR, MST_DIMM, MST_NOADDR } DType; #define MST_ANAFA2 MST_TAVOR #define MST_EEPROM MST_GAMLA typedef enum Mdevs_t { MDEVS_GAMLA = 0x01, /* Each device that actually is a Gamla */ MDEVS_I2CM = 0x02, /* Each device that can work as I2C master */ MDEVS_MEM = 0x04, /* Each device that is a memory driver (vtop) */ MDEVS_TAVOR_DDR = 0x08, /* Each device that maps to DDR */ MDEVS_TAVOR_UAR = 0x10, /* Each device that maps to UAR */ MDEVS_TAVOR_CR = 0x20, /* Each device that maps to CR */ MDEVS_IF = 0x40, /* Standard device interface */ MDEVS_REM = 0x80, /* Remote devices */ MDEVS_PPC = 0x100, /* PPC devices */ MDEVS_DEV_I2C = 0x200, /* Generic linux kernel i2c device */ MDEVS_IB = 0x400, /* Cr access over IB Mads */ MDEVS_MLNX_OS = 0x800, /* access by CmdIf in MlnxOS */ MDEVS_FWCTX = 0x900, /* access by func/context (like UEFI) */ MDEVS_LPC = 0x1000,/* Access LPC region */ MDEVS_FPGA = 0x2000,/* Access LPC region */ MDEVS_FPGA_NEWTON = 0x4000,/* Access LPC region */ MDEVS_CABLE = 0x8000, MDEVS_TAVOR = (MDEVS_TAVOR_DDR | MDEVS_TAVOR_UAR | MDEVS_TAVOR_CR), MDEVS_ALL = 0xffffffff } Mdevs; typedef enum { MACCESS_REG_METHOD_GET = 1, MACCESS_REG_METHOD_SET = 2 } maccess_reg_method_t; typedef enum { AS_ICMD = 3, AS_CR_SPACE = 2, AS_SEMAPHORE = 0xa } address_space_t; typedef struct vf_info_t { char dev_name[512]; u_int16_t domain; u_int8_t bus; u_int8_t dev; u_int8_t func; char** net_devs; // Null terminated array char** ib_devs; // Null terminated array } vf_info; typedef struct dev_info_t { Mdevs type; char dev_name[512]; int ul_mode; union { struct { u_int16_t domain; u_int8_t bus; u_int8_t dev; u_int8_t func; u_int16_t dev_id; u_int16_t vend_id; u_int32_t class_id; u_int16_t subsys_id; u_int16_t subsys_vend_id; char cr_dev[512]; char conf_dev[512]; char** net_devs; // Null terminated array char** ib_devs; // Null terminated array char numa_node[4096]; // vf_info * virtfn_arr; u_int16_t virtfn_count; } pci; struct { u_int32_t mtusb_serial; u_int32_t TBD; } usb; struct { u_int32_t TBD; } ib; struct { u_int32_t TBD; } remote; }; } dev_info; typedef enum { RA_MFPA=0x9010, RA_MFBA=0x9011, RA_MFBE=0x9012, } reg_access_t; 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Supported only when ADVANCED_PCI_SETTINGS is set.IBM_CAPI_EN($nv_pci_cap.ibm_capi_supported!=0)&&($nv_pci_conf.advanced_pci_settings!=0)&&($nv_pci_cap.advanced_pci_settings_supported!=0)¤7#C7i advanced_pci_settingsnv_pci_conf0x0.310x0.1BOOLShow advanced PCI settings.ADVANCED_PCI_SETTINGS$nv_pci_cap.advanced_pci_settings_supported!=0„E!}force_eth_subclass_supportednv_pci_cap0x0.290x0.1BOOLWhen set, the PCI_CONF.force_eth_sub_class is supported.q1!mibm_capi_supportednv_pci_cap0x0.300x0.1BOOLWhen set, the PCI_CONF.ibm_capi_en is supported.“K!advanced_pci_settings_supportednv_pci_cap0x0.310x0.1BOOLWhen set, the PCI_FONF.advanced_pci_settings bit is configu\;rable. ———VVVVVVVVVVVVVVVVVVVVVgääääääääääääääääääää¸n¸o¸p¸q¸r¸s¸t¸u¸v¸w¸x¸y¸z¸{¸|¸}¸~¸¸€„…i†cADVANCED_PCI_SETTINGSƒHBOOT_DBG_LOG_DRIVER_SETTINGS[,BOOT_DBG_LOG_IPYBOOT_DBG_LOG_IPV6Z!BOOT_DBG_LOG_PXE_UNDI]BOOT_DBG_LOG_STATUS\gFORCE_ETH_PCI_SUBCLASSgIBM_CAPI_EN‚™UEFI_DEBUG_LOGSm„UEFI_DEBUG_LOG_BLKIOeÇUEFI_DEBUG_LOG_BMdÇUEFI_DEBUG_LOG_CACHEj™UEFI_DEBUG_LOG_DISPATCHcÿUEFI_DEBUG_LOG_EVENTSh.UEFI_DEBUG_LOG_FS`.UEFI_DEBUG_LOG_GCDi2UEFI_DEBUG_LOG_INIT^UEFI_DEBUG_LOG_LOAD_!UEFI_DEBUG_LOG_MIN_SEVERITYkcUEFI_DEBUG_LOG_PAGEbUEFI_DEBUG_LOG_POOLaUEFI_DEBUG_LOG_SNIfUEFI_DEBUG_LOG_UNDIgUEFI_DEBUG_LOG_VERBOSEl ±÷÷÷÷÷zzzÙÙÙÙÙÙÙÙÙÙÙÙÙâ(advanced_pci_settingsnv_pci_confƒOadvanced_pci_settings_supportednv_pci_cap†auth_typefile_public_keyw$"cs_token_enfile_public_key{ )debug_versionfile_dbg_fw_token_idu %force_eth_subclassnv_pci_conf .force_eth_subclass_supportednv_pci_cap„Wfrc_enfile_public_keyxXfw_enfile_public_key|ibm_capi_ennv_pci_conf‚$ibm_capi_supportednv_pci_cap…åkeyfile_public_keyŸEkeypair_uuidfile_public_key~Ÿ"keypair_uuidfile_signaturerŸ%mac_addressfile_mac_addr_list€amlnx_nvconf_enfile_public_keyy,Cpsidfile_applicable_ton%psid_branchfile_applicable_too,%public_key_expfile_public_key}Ôrunning_versionfile_cs_token_idv†running_versionfile_dbg_fw_token_idt[signaturefile_signatures<signature_uuidfile_signatureqtextfile_commentp'vendor_nvconf_enfile_public_keyz ¢\y\¦ÓŠ“tableparamsparamsCREATE TABLE params( name TEXT NOT NULL CHECK(length(name) <= 45), tlv_name TEXT NOT NULL, offset TEXT NOT NULL, size TEXT NOU NULL, type TEXT CHECK((type IN ("BOOL") and size IN ';indexsqlite_autoindex_tlvs_1tlvs+?indexsqlite_autoindex_params_1params+?indexsqlite_autoindex_params_2params ("0x0.1")) or type IN ("UNSIGNED", "INTEGER", "ENUM", "BINARY", "BYTES", "STRING")), description TEXT, textual_values TEXT CHECK( (type NOT IN ("ENUM") and ((textual_values IS NULL) or (textual_values IN ("")))) or ((textual_values NOT NULL) and (textual_values NOT IN (""))) ), mlxconfig_name TEXT UNIQUE CHECK(length(mlxconfig_name) <= 40), dependency TEXT, valid_bit TEXT, temp_vars TEXT, min_val TEXT, max_val TEXT, rule TEXT, regex TEXT, port INT CHECK(port <= 2), supported_from_version INT DEFAULT 0, array_length INT DEFAULT 0, PRIMARY KEY (name, tlv_name, port)) Çü–*75num_of_allocated_macsnv_base_mac_guid_cap0x4.00x0.16UNSIGNEDThe total number of MAC addresses that can be derived from the base MAC.j5imac_ennv_base_mac_guid_cap0x0.310x0.1BOOLWhen set, the base MAC address if configurabled5[guid_ennv_base_mac_guid_cap0x0.300x0.1BOOLWhen set, the base GUID is configurableH-‚!base_guidnv_base_mac_guid0x8.240x8.0BYTESThe base Infiniband GUID. The Infiniband addresses for the PCI physical functions of all the network ports are derived from the base GUID.‚6-ƒbase_macnv_base_mac_guid0x0.240x8.0BYTESThe base MAC of the device. The MAC addresses for the PCI physical functions of all the network ports are derived from the base MAC.Offset 00h, bits 15..0 hold bits 47..32 of the MAC address.Offset 04h, bits 31..0 hold bits 31..0 of the MAC address. ib y 9%qmax_log_memic_bar_sizenv_memic_cap0x0.00x0.8UNSIGNEDThe maximal value allowed for \;log_memic_bar_size‚U-'‚5c-W Q memic_size_limitnv_memic_conf0x0.80x0.4ENUMThe maximum amount of internal device memory that can be \;consumed by the MEMIC application.\;0x0: DISABLED\;0x1: _256KB\;0x2: _512KB\;0x3: _1024KBDISABLED=0x0,256KB=0x1,512KB=0x2,1024KB=0x3MEMIC_SIZE_LIMIT$nv_memic_cap.max_memic_size_limit!=0$nv_memic_cap.max_memic_size_limit‚1'])W U log_memic_bar_sizenv_memic_conf0x0.00x0.8UNSIGNEDThe amount of BAR size assigned for MEMIC. The size in bytes \;is memic_size_limit*2^log_memic_bar_size.MEMIC_BAR_SIZE$nv_memic_cap.max_memic_size_limit!=0$nv_memic_cap.max_log_memic_bar_size95num_of_allocated_guidsnv_base_mac_guid_cap0x4.160x0.16UNSIGNEDThe total number of GUIDs that can be derived form this base GUID. T#dëTƒ ;1ƒG;{G non_prefetchable_pf_barnv_global_pci_conf0x0.170x0.1BOOLWhen set, the PF BAR prefetchable bit is cleared.\;Note: PCI switches and operation systems have dedicated quotas \;for non-prefetchable memory hence, you may need to decrease \;log_pf_uar_bar_size to enable this feature.NON_PREFETCHABLE_PF_BAR$nv_global_pci_cap.non_prefetchable_pf_bar_supported==1non_prefetchable_pf_bar_validw )host2bmcnv_host_to_bmc0x0.00x0.1UNSIGNEDWhen set, the host can communicate directly with the \;BMC.< A-A1 roce_over_ip_next_protocolnv_roce_1_5_conf0x0.00x0.8UNSIGNEDThe next protocol value set in the IPv4/IPv6 packets for \;RoCE v1.5. The default is 0xFE.ROCE_NEXT_PROTOCOLZ 5%aimax_memic_size_limitnv_memic_cap0x0.80x0.4ENUMThe maximum value allowed for \;memic_size_limit\;.\;0x0: DISABLED\;0x1: _256KB\;0x2: _512KB\;0x3: _1024KBDISABLED=0x0,_256KB=0x1,_512KB=0x2,_1024KB=0x3 }=Ý-}-/1[num_vf_msix_validnv_global_pci_conf0x0.270x0.1BOOLWhen set, the num_vf_msix field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[num_pf_msix_validnv_global_pci_conf0x0.260x0.1BOOLWhen set, the num_pf_msix field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[vf_bar_size_validnv_global_pci_conf0x0.250x0.1BOOLWhen set, the vf_bar_size field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[pf_bar_size_validnv_global_pci_conf0x0.240x0.1BOOLWhen set, the pf_bar_size field is valid. \;When cleared, the device uses the "factory_settings" value.@G1inon_prefetchable_pf_bar_validnv_global_pci_conf0x0.230x0.1BOOLWhen True, non_prefetchable_bar field and \;allow_large_non_prefetchable_pf_bar overrides the default \;value. dX¸d!#1Osriov_validnv_global_pci_conf0x0.310x0.1BOOLWhen set, the sriov field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[full_vf_qos_validnv_global_pci_conf0x0.300x0.1BOOLWhen set, the full_vf_qos field is valid. \;When cleared, the device uses the "factory_settings" value.1Kfpp_validnv_global_pci_conf0x0.290x0.1BOOLWhen set, the fpp field is valid. \;When cleared, the device uses the "factory_settings" value.%'1Snum_pfs_validnv_global_pci_conf0x0.280x0.1BOOLWhen set, the num_pfs field is valid. \;When cleared, the device uses the "factory_settings" value. ee‡1/!S#„Q 1…9 total_vfsnv_global_pci_conf0x4.00x0.16UNSIGNEDThe total number of Virtual Functions (VFs) that can be sup\;ported, for each PF.NUM_OF_VFS$nv_global_pci_cap.sriov_support==1sriov_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))$nv_global_pci_cap.max_vfs_per_pf_valid==1 ? $nv_global_pci_cap.max_vfs_per_pf : 0(($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix)) && (($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar)) èÃ…è#1Afull_vf_qosnv_global_pci_conf0x4.300x0.1BOOLWhen set, Virtual Function has the same number of traffic classes \;as physical functions.‚;1ƒ9Ofpp_ennv_global_pci_conf0x4.290x0.1BOOLWhen this bit is cleared, the device exposes a single PCI function \;for both ports. When set, the device exposes one or more PCI \;functions for each port (this is the only mode supported by Con\;nectX-4 devices).$nv_global_pci_cap.fpp_support==1fpp_valid‚:1‚[['Inum_pfsnv_global_pci_conf0x4.160x0.8UNSIGNEDTotal number of PCIe functions (PFs) exposed by the device. The \;number of PFs must be a multiple of the number of ports, \;num_port_cap\;. Value 0 indicates 256 PFs.$nv_global_pci_cap.num_pfs_supported==1num_pfs_valid1$nv_global_pci_cap.max_num_pfs YŠY²à+Kk‰¬Äæ &JsÌî5X…¹Ü0K!advanced_pci_settings_supportednv_pci_cap†'7#advanced_pci_settingsnv_pci_confƒ-A'advanced_power_settings_ennv_power_conf:-/7allow_rd_countersnv_external_port_ctrl1arpnv_rom_debug_levelK+auth_typefile_public_keyw-base_guidnv_base_mac_guid- base_macnv_base_mac_guid"!/bay_numbernv_enclosure_info„!bofm_ennv_rom_iniI!/!boot_debug_log_ennv_rom_cap]##/boot_ip_vernv_rom_boot_conf2#!boot_ip_vernv_rom_cap^#3boot_pkeynv_rom_ib_boot_conf!(-/boot_retry_countnv_rom_boot_conf1)'7boot_to_shellnv_rom_flexboot_debug.)?boot_to_targetnv_rom_iscsi_general_conf#!/boot_vlannv_rom_boot_conf1$%/boot_vlan_ennv_rom_boot_conf1 !#+ cee_dcbx_ennv_lldp_nb_dcbxô"#+cee_dcbx_ennv_lldp_nb_dcbx÷,%?chap_auth_ennv_rom_iscsi_general_conf'33?chap_mutual_auth_ennv_rom_iscsi_general_conf&"!/chassis_idnv_enclosure_info#)) clamp_tgt_ratenv_roce_cc_ecn¢ ÂÂõ)UxœºÙü Hj›´Ïò5Uv˜¹Ú2G) clamp_tgt_rate_after_time_incnv_roce_cc_ecn¡3G)clamp_tgt_rate_after_time_incnv_roce_cc_ecnµ+/3client_identifiernv_rom_ib_dhcp_conf""') cnp_802p_prionv_roce_cc_ecn²#')cnp_802p_prionv_roce_cc_ecnÆ) cnp_dscpnv_roce_cc_ecn´)cnp_dscpnv_roce_cc_ecnÈ"') cnp_prio_modenv_roce_cc_ecn³#')cnp_prio_modenv_roce_cc_ecnÇ'+1cqe_compressionnv_sw_offload_conf`!#+cs_token_enfile_public_key{01;current_cfg_methodnv_current_configurator…+daynv_file_id_mlnxi/daynv_file_id_vendorq"%+ dcbx_willingnv_lldp_nb_dcbxõ#%+dcbx_willingnv_lldp_nb_dcbxø) dce_tcp_gnv_roce_cc_ecn­)dce_tcp_gnv_roce_cc_ecnÁ #) dce_tcp_rttnv_roce_cc_ecn®!#)dce_tcp_rttnv_roce_cc_ecn ''dcr_cnak_sizenv_ib_dc_confy ''dcr_lifo_sizenv_ib_dc_confx%%1debug_log_ennv_rom_debug_levelF ãã†1iS#„Q …9 sriov_ennv_global_pci_conf0x4.310x0.1BOOLEnable Single-Root I/O Virtualization (SR-IOV)SRIOV_EN$nv_global_pci_cap.sriov_support==1sriov_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))(($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix)) && (($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar)) SS…*31c+c/„Q a‚E log_pf_uar_bar_sizenv_global_pci_conf0x8.00x0.6UNSIGNEDLog 2 of the size of a PF"s UAR BAR in MBs.PF_LOG_BAR_SIZE$nv_global_pci_cap.pf_bar_size_supported==1pf_bar_size_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))$nv_global_pci_cap.max_log_pf_uar_bar_size($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar) SS…*31c+c/„Q a‚E log_vf_uar_bar_sizenv_global_pci_conf0x8.60x0.6UNSIGNEDLog 2 of the size of a VF"s UAR BAR in MBs.VF_LOG_BAR_SIZE$nv_global_pci_cap.vf_bar_size_supported==1vf_bar_size_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))$nv_global_pci_cap.max_log_vf_uar_bar_size($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar) ]vì] O/}non_prefetchable_pf_bar_supportednv_global_pci_cap0x0.230x0.1BOOLTrue when non_prefetchable_pf_bar field is configurable.ƒ#1[#c/ Q‚q num_vf_msixnv_global_pci_conf0x8.220x0.10UNSIGNEDNumber of MSI-X vectors and EQs per VF.NUM_VF_MSIX$nv_global_pci_cap.num_vf_msix_supported==1num_vf_msix_valid$nv_global_pci_cap.max_num_vf_msix($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix)ƒ#1[#c/ Q‚q num_pf_msixnv_global_pci_conf0x8.120x0.10UNSIGNEDNumber of MSI-X vectors and EQs per PF.NUM_PF_MSIX$nv_global_pci_cap.num_pf_msix_supported==1num_pf_msix_valid$nv_global_pci_cap.max_num_pf_msix($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix) µK–ñLµ%//+num_pfs_supportednv_global_pci_cap0x0.280x0.1BOOLWhen set, the \;num_pfs\; field is configurable and \;max_num_pfs\; is \;valid."$7/?num_vf_msix_supportednv_global_pci_cap0x0.270x0.1BOOLWhen set, the num_vf_msix field is configurable and the max\;_num_vf_msix field is valid."#7/?num_pf_msix_supportednv_global_pci_cap0x0.260x0.1BOOLWhen set, the num_pf_msix field is configurable and the max\;_num_pf_msix field is valid.2"7/_vf_bar_size_supportednv_global_pci_cap0x0.250x0.1BOOLWhen set, the log_vf_uar_bar_size field is configurable and the \;max_log_vf_uar_bar_size field is valid.2!7/_pf_bar_size_supportednv_global_pci_cap0x0.240x0.1BOOLWhen set, the log_pf_uar_bar_size field is configurable and the \;max_log_pf_uar_bar_size field is valid. môïm))/)max_vfs_per_pfnv_global_pci_cap0x4.00x0.16UNSIGNEDThe maximum number of VFs that can be set in the total_vfs set\;ting (per PF).h(5/‚Mmax_vfs_per_pf_validnv_global_pci_cap0x0.310x0.1BOOLWhen set, the NIC will only respect NV_GLOBAL_PCI_CONF \;TLV if its total_vfs parameter is lower than or equal to the value \;of the max_vfs_per_pf field below.‚'5/ƒmax_total_msix_validnv_global_pci_cap0x0.300x0.1BOOLWhen set, the NIC will only respect NV_GLOBAL_PCI_CONF \;TLV if the total MSIX required for all PFs and VFs is lower or \;equal to the number specified in the max_total_msix field below.‚ &3/ƒmax_total_bar_validnv_global_pci_cap0x0.290x0.1BOOLWhen set, the NIC will only respect an NV_GLOBAL_PCI_\;CONF TLV if the total bar size required for all PFs and VFs is \;lower or equal to the number specified in the max_total_bar field \;below. x‹Žøtðxv0+/kmax_num_pf_msixnv_global_pci_cap0x8.120x0.10UNSIGNEDMaximum number of MSI-X vectors and EQs per PF./;/umax_log_vf_uar_bar_sizenv_global_pci_cap0x8.60x0.6UNSIGNEDLog 2 of the maximum size (in MBs) of a VF"s UAR BAR.;/umax_log_pf_uar_bar_sizenv_global_pci_cap0x8.00x0.6UNSIGNEDLog 2 of the maximum size (in MBs) of a PF"s UAR BAR-'/1sriov_supportnv_global_pci_cap0x4.310x0.1BOOLWhen set, SR-IOV support is configurable by the NV_\;GLOBAL_PCI_CONF sriov_en bit.,9/vf_qos_control_supportnv_global_pci_cap0x4.300x0.1BOOLWhen set, the device supports controlling the VF QoS setting.q+#/sfpp_supportnv_global_pci_cap0x4.290x0.1BOOLWhen set, function per-port setting is configurables*#/omax_num_pfsnv_global_pci_cap0x4.160x0.8UNSIGNEDMaximum number of PFs. Value 0 indicates 256 PFs. ZZƒ­Ëñ @`Ž½Ý4c‚¬Ø(/- default_link_typenv_vpi_link_type›)/-default_link_typenv_vpi_link_typeœ1dhcpnv_rom_debug_levelI%'/dhcp_iscsi_ennv_rom_iscsi_dhcp6.I!dhcp_pxe_discovery_control_disnv_rom_iniP+!dhcp_user_classnv_rom_iniM1dhcpv6nv_rom_debug_levelJ-;+ do_not_clear_port_statsnv_keep_link_upý.;+do_not_clear_port_statsnv_keep_link_up1drivernv_rom_debug_levelO(+1driver_settingsnv_rom_debug_level[-A% duplicated_mac_action_modenv_mpfs_conf.A%duplicated_mac_action_modenv_mpfs_conf%#en_wol_magicnv_wol_conf)5+erase_lower_prioritynv_file_id_mlnxg+5/erase_lower_prioritynv_file_id_vendoro'--erase_on_powerupnv_virt_net_addr :ˆþt;ä:T8A7 number_of_pci_switch_lanesnv_pci_switch_evb_cap0x0.00x0.8UNSIGNEDR7=9 pci_switch_lanes_mappingnv_pci_switch_evb_conf0x4.240x8.0BYTESU6G9 pci_switch_lanes_remapping_ennv_pci_switch_evb_conf0x0.310x0.1BOOL75' kdnet_ennv_kdnet_data0x0.310x0.1BOOL45#?9= log_max_payload_sizenv_tpt_conf0x0.00x0.4ENUM0x0: AUTOMATIC\;0xC: _4KBAUTOMATIC=0x0,_4KB=0xcINT_LOG_MAX_PAYLOAD_SIZE‚3'/ƒmax_total_barnv_global_pci_cap0x10.00x4.0UNSIGNEDMaximum total of the MMIO space for all PFs and VFs com\;bined, in megabytes.\;Note: if the number of PF or VF per port is not a power of 2, this \;parameter will also not be a power of 22)/ max_total_msixnv_global_pci_cap0xC.00x4.0UNSIGNEDMaximum number of MSI-X for the aggregate of all PFs and \;VFs.v1+/kmax_num_vf_msixnv_global_pci_cap0x8.220x0.10UNSIGNEDMaximum number of MSI-X vectors and EQs per VF. %ž%‚v:A'ƒ];g advanced_power_settings_ennv_power_conf0x0.310x0.1BOOLEnable manual override for the default power settings. \;When Set, additional power settings parameter in NV_POW\;ER_CONF are valid and configurable.\;When cleared, additional power settings parameter in \;NV_POWER_CONF are ignored.ADVANCED_POWER_SETTINGS$nv_power_cap.slot_power_limiter_supported==1„_99'†KAK slot_power_limiter_disnv_power_conf0x0.300x0.1BOOLWhen cleared, the device is not allowed to consume more than \;25W from the PCIe power rails, unless a PCI slot power limit \;message which a new power limit is received.\;When set, the slot power limiter is disabled, and the device is \;allowed to consume more than 25W from the PCIe power rails.\;Note: if the power limiter is active and there is not enough \;power, the device will shut down the network modules.DISABLE_SLOT_POWER_LIMITER($nv_power_conf.advanced_power_settings_en==1)&&($nv_power_cap.slot_power_limiter_supported==1) hxÎh ®gµhKD'!1hii_read_onlynv_rom_ini0x0.130x0.1BOOLHII read only modeMC+!1hii_bdf_decimalnv_rom_ini0x0.120x0.1BOOLHII read only modeaB1!Shii_platform_setupnv_rom_ini0x0.110x0.1BOOLUse decimal values for PCIE addressEA#!)hii_ibm_aimnv_rom_ini0x0.100x0.1BOOLEnable AIM HIIY@;!;hii_iscsi_configurationnv_rom_ini0x0.90x0.1BOOLEnable ISCSI HII config]?E!9static_component_name_stringnv_rom_ini0x0.80x0.1BOOLUse static device named>!mtech_enumnv_rom_ini0x0.30x0.1BOOLAdd technology enumeration to device name stringJ=!!7hii_vpi_ennv_rom_ini0x0.20x0.1BOOLEnable HII VPI config\<-!Oshared_memory_ennv_rom_ini0x0.10x0.1BOOLEnable HP shared memory functions;E%slot_power_limiter_supportednv_power_cap0x0.300x0.1BOOLWhen set, \;DISABLE_SLOT_POWER_LIMITER\; is configu\;rable -¥I¯fºqÎ-N+!Qucm_single_portnv_rom_ini0xC.100x0.1BOOLWhen set, the mriname string will not include the port number.\; (relevant to Lenovo Purely cards) M+!Qdhcp_user_classnv_rom_ini0x4.240x8.0BYTESDHCP user class option (RFC3004) for Flexboot.\;Octet #1 must be equal for 77d.\;octet #2 - lengthGL!5undi_ennv_rom_ini0x0.310x0.1BOOLEnable UNDI protocolEK!3hii_ennv_rom_ini0x0.300x0.1BOOLEnable HII protocolcJ7!Qplatform_to_driver_ennv_rom_ini0x0.290x0.1BOOLEnable Platform to Driver ProtocolGI!5bofm_ennv_rom_ini0x0.280x0.1BOOLEnable BOFM protocolOH!Gfmp_ennv_rom_ini0x0.270x0.1BOOLEnable FW Management protocolGG!3flash_ennv_rom_ini0x0.260x0.1BOOLEnable flash accessZF!Wport_enumnv_rom_ini0x0.250x0.1BOOLAdd port number to device name stringYE!Wmac_enumnv_rom_ini0x0.240x0.1BOOLAdd MAC address to device name string nœÀÙ /FnkŠ­Ïì:Vw˜¹Úþ"D]~žµÛ-E!force_eth_subclass_supportednv_pci_cap„#%/file_versionnv_file_id_vendorp!flash_ennv_rom_iniG3;7flexboot_banner_timeoutnv_rom_banner_timeout!/!flexboot_debug_ennv_rom_cap\!fmp_ennv_rom_iniH$1#force_eth_subclassnv_pci_conf1fpp_ennv_global_pci_conf"#/fpp_supportnv_global_pci_cap+!1fpp_validnv_global_pci_conf+frc_enfile_public_keyx##1full_vf_qosnv_global_pci_conf)/1full_vf_qos_validnv_global_pci_conf+fw_enfile_public_key| %'fw_rev_majornv_vts_bank_a‰ %'fw_rev_majornv_vts_bank_b’ %'fw_rev_minornv_vts_bank_a‹ %'fw_rev_minornv_vts_bank_b”#+'fw_rev_subminornv_vts_bank_aŠ#+'fw_rev_subminornv_vts_bank_b“!5guid_ennv_base_mac_guid_cap!guid_opsnv_rom_iniS -!hii_aim_ucm_ver2nv_rom_iniV+!hii_bdf_decimalnv_rom_iniC!hii_ennv_rom_iniK%7!hii_flexaddr_overridenv_rom_iniQ$5!hii_flexaddr_settingnv_rom_iniR K®«VåKHU%!‚+hii_mriname2nv_rom_ini0xC.200x0.1BOOLExpose MRI_NAME2 field in HII with hard coded value of \;"Mellanox Network Adapter, physical ports $p, Logical ports 1" \;per Lenovo"s HII specLT!cehii_typenv_rom_ini0xC.160x0.4ENUMType of .vfr type with HII configuration selector:\;0x0: \;MLNX_\;DEFAULT\;0x1: HPE\;0x2: LENOVO\;0x3: DELLMLNX_DEFAULT=0x0,HPE=0x1,LENOVO=0x2,DELL=0x3oS!guid_opsnv_rom_ini0xC.150x0.1BOOLguided_ops in CX3 (show specific fields in HII for Lenovo)SR5!3hii_flexaddr_settingnv_rom_ini0xC.140x0.1BOOLFlexaddress settingfQ7!Whii_flexaddr_overridenv_rom_ini0xC.130x0.1BOOLOverride flexaddress displaying logicPI!'dhcp_pxe_discovery_control_disnv_rom_ini0xC.120x0.1BOOLDisable PXE DISCOVERY_CONTROL DHCP option (option \;43 sub option 6) support.PO%!=tivoli_wa_ennv_rom_ini0xC.110x0.1BOOLEnable (Tivoli) Rembo WA Okü¢'¿6ŽO=]/! boot_debug_log_ennv_rom_cap0x0.300x0.1BOOL%\/![flexboot_debug_ennv_rom_cap0x0.290x0.1BOOLWhen set, Flexboot debug is supported (NV_ROM_FLEX\;BOOT_DEBUG and NV_ROM_DEBUG_LEVEL are appli\;cable)[%!'uefi_logs_ennv_rom_cap0x0.280x0.1BOOLWhen set, UEFI logging is supported (NV_ROM_UEFI_DE\;BUG_LEVEL is applicable)fZ-!apromiscuous_vlannv_rom_ini0xC.310x0.1BOOLSet Flexboot to ignore incoming VLAN tags.yY-!option_rom_debugnv_rom_ini0xC.300x0.1BOOLEnable/disable logs per the configured level for each moduleXX)!Auri_boot_retrynv_rom_ini0xC.260x0.4UNSIGNEDNumber of uri boot retriesmW5!_uri_boot_retry_delaynv_rom_ini0xC.220x0.4UNSIGNEDDelay in seconds between uri boot retriesV-!7hii_aim_ucm_ver2nv_rom_ini0xC.210x0.1BOOLExpose AIM ver, and UCM ver HII fields with value equal to 2. \;For Levovo Agentless. FQHFa31‚}one_qp_per_recoverynv_sw_offload_conf0x0.30x0.1BOOLWhen set, a lost doorbell will trigger WQ doorbell record query only for the QP ringing the doorbell.When cleared, a lost doorbell may trigger WQ doorbell record query for multiple QPs‚R`+1ƒWC+ cqe_compressionnv_sw_offload_conf0x0.00x0.3ENUMConfigure which algorithm should be used by the NIC in order\;to decide when to activate CQE compression based on PCIe bus condition.\;Note that the driver can enable compression on a per CQE basis\;0x0: BALANCED\;0x1: AGGRESSIVEBALANCED=0x0,AGGRESSIVE=0x1CQE_COMPRESSION1_!%uimage_banknv_fpga_data0x0.300x0.2UNSIGNEDThis bit is set when flexboot supports configuration of PXE \;boot IP version defined in boot settings ext parameter,^#!uboot_ip_vernv_rom_cap0x0.310x0.1BOOLThis bit is set when flexboot supports configuration of PXE \;boot IP version defined in boot settings ext parameter ˆÚ²ˆ‚'d-1ƒ+- lro_log_timeout2nv_sw_offload_conf0x4.80x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #2, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_time\;out_period_usecs field of the TIR context)LRO_LOG_TIMEOUT2‚%c-1ƒ'- lro_log_timeout1nv_sw_offload_conf0x4.40x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #1, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT1‚#b-1ƒ#- lro_log_timeout0nv_sw_offload_conf0x4.00x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #0, in microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT0 ¦Êò2Pi„¡»×ù¦:^{¤Îì/_•±Ø#1!ibm_capi_supportednv_pci_cap…';!hii_iscsi_configurationnv_rom_ini@%!hii_mriname2nv_rom_iniU"1!hii_platform_setupnv_rom_iniB'!hii_read_onlynv_rom_iniD!hii_typenv_rom_iniT!!hii_vpi_ennv_rom_ini=)host2bmcnv_host_to_bmc +hournv_file_id_mlnxn/hournv_file_id_vendorv!/hp_7kd_ennv_enclosure_info€##ibm_capi_ennv_pci_conf‚"%+ ieee_dcbx_ennv_lldp_nb_dcbxó#%+ieee_dcbx_ennv_lldp_nb_dcbxö!%image_banknv_fpga_data_(3) initial_alpha_valuenv_roce_cc_ecn°)3)initial_alpha_valuenv_roce_cc_ecnÄ1ipv4nv_rom_debug_levelY$%/ipv4_dhcp_ennv_rom_iscsi_dhcp71ipv6nv_rom_debug_levelZ/+?iscsi_drive_numnv_rom_iscsi_general_conf,57?iscsi_keep_san_dev_ennv_rom_iscsi_general_conf('kdnet_ennv_kdnet_data5&-+ keep_eth_link_upnv_keep_link_upù'-+keep_eth_link_upnv_keep_link_upþ G׃óGGi+1daynv_file_id_mlnx0x8.00x0.8BINARYday - 2 packed BCDah%+Ofile_versionnv_file_id_mlnx0x4.00x4.0UNSIGNED32bit version number of the file.ƒ g5+…erase_lower_prioritynv_file_id_mlnx0x0.310x0.1BOOLWhen set, installation of the file will erase all NVCONFIG \;parameters that are at lower priority that is. If the file prior\;ity is MLNX, installation of the file will not copy any TLVs \;from the current NVDAT partition. If the file priority is \;VENDOR_NVCONF, the installation of the file will only \;copy MLNX level TLVs.Rf'-5packet_pacingnv_packet_pacing0x0.00x0.1BOOLEnable packet pacing‚&e-1ƒ'- lro_log_timeout3nv_sw_offload_conf0x4.120x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #3, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT3 ‰559>CHMRW\afkpuz„‰Ž“˜¢§¬±¶»ÀÅÊÏÔÙÞãèíò÷ü $).38=BGLQV[`ejoty~ƒˆ’—œ¡¦«°µº¿ÄÉÎÓØÝâçìñöû #(-27<AFLRX^djpv|‚ˆŽ”š ¦¬²¸¾ÄÊÐÖÜâèîôú     !"#$%&'()*+,-./01235678;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_afghijklmnopqrstuvz{|}~€‚ƒ„…†‡ˆ‰Š‹ŒŽ‘’“”•–—˜™šÉÊËÌ nñ !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ #)/5;AGMSY_ekqw}ƒ‰•›¡§­³¹¿ÅËÑ×Ýãéïõû %+17=CIOUý÷ñ[v’©»Ñ膅„ÎÏÐÑÒÓÔÕÖ×ØÙÚÛßàáåæçèéêëìíîïðñò     "#$%&'()*+,-./0123456789:;<=>?@ABCDELnopqrstuvwxyz{|}~€7ADVANCED_PCI_SETTINGSƒ;ADVANCED_POWER_SETTINGS:/ALLOW_RD_COUNTERS%BOOT_DBG_LOGF-BOOT_DBG_LOG_ARPK/BOOT_DBG_LOG_DHCPI1BOOT_DBG_LOG_DHCP6J >³Åt"Ð>ƒo5/…erase_lower_prioritynv_file_id_vendor0x0.310x0.1BOOLWhen set, installation of the file will erase all NVCONFIG \;parameters that are at lower priority that is. If the file prior\;ity is MLNX, installation of the file will not copy any TLVs \;from the current NVDAT partition. If the file priority is \;VENDOR_NVCONF, the installation of the file will only \;copy MLNX level TLVs.Pn+?hournv_file_id_mlnx0xC.240x0.8BINARYhour - 2 packed BCD (UTC)Pm+9minutesnv_file_id_mlnx0xC.160x0.8BINARYminutes - 2 packed BCDOl+9secondsnv_file_id_mlnx0xC.80x0.8BINARYseconds - 2 packed BCDkk+‚qyearnv_file_id_mlnx0x8.160x0.16BINARYyear - 4 packed BCD. Note: If year is zero, FW may copy \;the signature time to this TLV before copying it to flash so, \;the NVCONFIG component will have a date&time prop\;erty.Kj+5monthnv_file_id_mlnx0x8.80x0.8BINARYmonth - 2 packed BCD 0ИnF굂['árI ÷Å_0- + %nv_file_id_mlnxNIC0FILE ID MLNX/ - 'nv_packet_pacing NIC0PACKET PACING3 1 +nv_sw_offload_conf NIC1SW OFFLOAD CONF0 %% nv_fpga_dataNIC-internal0FPGA DATA' !  nv_rom_capEXP_ROM0ROM CAP' !  nv_rom_iniEXP_ROM0ROM INI' %  nv_power_cap‰NIC0POWER CAP) ' !nv_power_confˆNIC0POWER CONFB 7%  1nv_pci_switch_evb_cap‡NIC-internal0PCI SWITCH EVB CAPD 9% 3nv_pci_switch_evb_conf†NIC-internal0 PCI SWITCH EVB CONF2 '% !nv_kdnet_data…NIC-internal0KDNET DATA% # nv_tpt_conf‚NIC0TPT CONF1 /  )nv_global_pci_capNIC0GLOBAL PCI CAP3 1 +nv_global_pci_conf€NIC0 GLOBAL PCI CONF* ) #nv_host_to_bmcNIC0HOST TO BMC. - 'nv_roce_1_5_confNIC0ROCE 1 5 CONF& %  nv_memic_capNIC0MEMIC CAP( ' !nv_memic_confNIC0MEMIC CONF6 5  /nv_base_mac_guid_capNIC0BASE MAC GUID CAP. - 'nv_base_mac_guidNIC0BASE MAC GUID ?Í¢yFþÉ•a-ý̧T&ùËœl?+( )   # nv_lldp_nb_cap NIC1 LLDP NB CAP.' +  %nv_lldp_nb_conf NIC1 LLDP NB CONF-& +  % nv_lldp_nb_conf NIC1 LLDP NB CONF,% )  #nv_roce_cc_qcn NIC0(ROCE CC QCN+$ )  # nv_roce_cc_qcn NIC0(ROCE CC QCN,# )  #nv_roce_cc_ecnNIC0DROCE CC ECN+" )  # nv_roce_cc_ecnNIC0DROCE CC ECN$! !  nv_roce_ccNIC0ROCE CC# !   nv_roce_ccNIC0ROCE CC/ -  'nv_vpi_link_typeNIC0VPI LINK TYPE. -  ' nv_vpi_link_typeNIC0VPI LINK TYPE2 '% !nv_vts_bank_bNIC-internal0VTS BANK B2 '% !nv_vts_bank_aNIC-internal0VTS BANK A2 '% !nv_debug_modeÿNIC-internal0DEBUG MODE3 - 'nv_rom_ocsd_ocbbEXP_ROM0ROM OCSD OCBBF ;% 5nv_current_configurator”NIC-internal0CURRENT CONFIGURATOR1 / )nv_enclosure_info’NIC0ENCLOSURE INFO' %  nv_ib_dc_cap‘NIC0IB DC CAP) ' !nv_ib_dc_confNIC0 IB DC CONF1 / )nv_file_id_vendorNIC0FILE ID VENDOR ›P¾jRv/?hournv_file_id_vendor0xC.240x0.8BINARYhour - 2 packed BCD (UTC)Ru/9minutesnv_file_id_vendor0xC.160x0.8BINARYminutes - 2 packed BCDQt/9secondsnv_file_id_vendor0xC.80x0.8BINARYseconds - 2 packed BCDms/‚qyearnv_file_id_vendor0x8.160x0.16BINARYyear - 4 packed BCD. Note: If year is zero, FW may copy \;the signature time to this TLV before copying it to flash so, \;the NVCONFIG component will have a date&time prop\;erty.Mr/5monthnv_file_id_vendor0x8.80x0.8BINARYmonth - 2 packed BCDIq/1daynv_file_id_vendor0x8.00x0.8BINARYday - 2 packed BCDcp%/Ofile_versionnv_file_id_vendor0x4.00x4.0UNSIGNED32bit version number of the file. Jëæ˜JL{C% max_log_dcr_hash_table_sizenv_ib_dc_cap0x4.00x4.0UNSIGNEDLzC% min_log_dcr_hash_table_sizenv_ib_dc_cap0x0.00x4.0UNSIGNED‚y''‚7 YY  dcr_cnak_sizenv_ib_dc_conf0x8.00x0.24UNSIGNEDThe maximum number of pending InfiniBand DC \;(Dynamically Connected) CNAKs responses that can be \;supported without drops.DCR_CNACK_BUFFER_SIZE$nv_ib_dc_cap.min_dcr_cnak_buffer_size$nv_ib_dc_cap.max_dcr_cnak_buffer_sizeax''7' KK dcr_lifo_sizenv_ib_dc_conf0x4.00x0.24UNSIGNEDThe total amount of InfiniBand DCRs (Dynamically Con\;nected Responders), minus one.DCR_LIFO_SIZE$nv_ib_dc_cap.min_dcr_lifo_size$nv_ib_dc_cap.max_dcr_lifo_size‚w;'K; __ log_dcr_hash_table_sizenv_ib_dc_conf0x0.00x0.5UNSIGNEDInfiniBand DC (Dynamically Connected) hash table log2 \;size (for example: 7 means 128 entries)LOG_DCR_HASH_TABLE_SIZE$nv_ib_dc_cap.min_log_dcr_hash_table_size$nv_ib_dc_cap.max_log_dcr_hash_table_size m’»mð*Uy©Ú ;i’Áð6V‹Áà$#1mac_addressfile_mac_addr_list€(-1lro_log_timeout3nv_sw_offload_confe45?lun_busy_retry_countnv_rom_iscsi_general_conf* 5mac_ennv_base_mac_guid_cap!mac_enumnv_rom_iniE*=%max_dcr_cnak_buffer_sizenv_ib_dc_cap#/%max_dcr_lifo_sizenv_ib_dc_cap}/A) max_lldp_nb_rx_buffer_sizenv_lldp_nb_capê0A)max_lldp_nb_rx_buffer_sizenv_lldp_nb_capð/A) max_lldp_nb_tx_buffer_sizenv_lldp_nb_capë0A)max_lldp_nb_tx_buffer_sizenv_lldp_nb_capñ-C%max_log_dcr_hash_table_sizenv_ib_dc_cap{(9%max_log_memic_bar_sizenv_memic_cap .;/max_log_pf_uar_bar_sizenv_global_pci_cap..;/max_log_vf_uar_bar_sizenv_global_pci_cap/&5%max_memic_size_limitnv_memic_cap '! max_num_of_tcnv_qos_cap '!max_num_of_tcnv_qos_cap 4K) max_num_of_tx_optional_lldp_tlvnv_lldp_nb_capì5K)max_num_of_tx_optional_lldp_tlvnv_lldp_nb_capò'! max_num_of_vlnv_qos_cap '!max_num_of_vlnv_qos_cap I¼xïb§d$IA!/ bay_numbernv_enclosure_info0x4.240x0.8UNSIGNED'/e[tray_locationnv_enclosure_info0x4.160x0.8ENUM0x0: SINGLE_NODE_TRAY\;0x1: FRONT\;0x2: REARSINGLE_NODE_TRAY=0x0,FRONT=0x1,REAR=0x2=/ tray_idnv_enclosure_info0x4.80x0.8UNSIGNED@!/ chassis_idnv_enclosure_info0x4.00x0.8UNSIGNED7/‚hp_7kd_ennv_enclosure_info0x0.00x0.1BOOLWhen this bit is set to 1, the NIC PHY should apply PHY calibration according to the data specified in the following fields =% max_dcr_cnak_buffer_sizenv_ib_dc_cap0x14.00x4.0UNSIGNEDThe m\;aximum\; configurable value for dcr_cnack_buffer_\;size.~=%min_dcr_cnak_buffer_sizenv_ib_dc_cap0x10.00x4.0UNSIGNEDThe minimum configurable value for dcr_cnack_buffer_\;size.B}/% max_dcr_lifo_sizenv_ib_dc_cap0xC.00x4.0UNSIGNEDB|/% min_dcr_lifo_sizenv_ib_dc_cap0x8.00x4.0UNSIGNEDa Structure Specification v2.8.6.asn"\;0x0: E_NONE - default config\;0x1: OS - O/S making cfg changes in the absences of any other Mgmt Util (command interface)\;0x2: E_VENDOR_SPEC - e.g. Vendor"s Option ROM, NPAR, O/S Cfg Utils (FW writes this TLV when a TLV is written from mlxconfig, that is when NVDA write for any TLV is coming from the ICMD gateway without a UEFI or flexboot "writer-ID").\;0x3: E_HP_OTHER - (when an extern-DCi-mgmt parameter with value e-None is arriving from the BMC ASN.1 API)\;0x4: E_VC_CLP - Driver or F/W detects HPE Classic C-Class SM-CLP\;0x5: E_HP_CNU - Driver or F/W detects HPE"s Converged Network Utility (when an extern-DCi-mgmt parameter with value is arriving from the BMC ASN.1 API)\;0x6: E_HP_ONEVIEW - If manage-via-DCi value equals to HPE-OneView(6) in BaseDev-Cfg-Now is coming from the BMC ASN.1 API\;0x7: E_UEFI_HII - UEFI Option ROM executingE_NONE=0x0,OS=0x1,E_VENDOR_SPEC=0x2,E_HP_OTHER=0x3,E_VC_CLP=0x4,E_HP_CNU=0x5,E_HP_ONEVIEW=0x6,E_UEFI_HII=0x7 X‘é?ûX +'Efw_rev_subminornv_vts_bank_a0x8.00x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A %'Gfw_rev_majornv_vts_bank_a0x4.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A.1'Gnvia_nvlog_on_bootnv_debug_mode0x0.10x0.1BOOLDebug only.When set, firmware erases the NVLOG partition on BOOT and erase this NVCONFIG TLV.&7'Qnvia_nvconfig_on_bootnv_debug_mode0x0.00x0.1BOOLDebug only.When set, firmware invalidates all NVCONFIG parameters on boot including this parameter$-aocsd_ennv_rom_ocsd_ocbb0x0.310x0.1BOOLEnable HP on-chip temperature monitoring (OCSD) and Active Health Systems support via FW (OCBB) reporting.ˆb1;Žaecurrent_cfg_methodnv_current_configurator0x0.00x0.8ENUMParameter from "HP ASN1 Dat/ ·Üù:a†±×)Uy¤Èö!Mj·‰¤ÁÞ$)+mlnx_nvconf_enfile_public_keyy#! max_num_pfcnv_qos_cap #!max_num_pfcnv_qos_cap"#/max_num_pfsnv_global_pci_cap*&+/max_num_vf_msixnv_global_pci_cap1$'/max_total_barnv_global_pci_cap3*3/max_total_bar_validnv_global_pci_cap&%)/max_total_msixnv_global_pci_cap2+5/max_total_msix_validnv_global_pci_cap'%)/max_vfs_per_pfnv_global_pci_cap)+5/max_vfs_per_pf_validnv_global_pci_cap(#-'memic_size_limitnv_memic_conf*=%min_dcr_cnak_buffer_sizenv_ib_dc_cap~#/%min_dcr_lifo_sizenv_ib_dc_cap|-C%min_log_dcr_hash_table_sizenv_ib_dc_capz*7) min_time_between_cnpsnv_roce_cc_ecn±+7)min_time_between_cnpsnv_roce_cc_ecnÅ+minutesnv_file_id_mlnxm/minutesnv_file_id_vendoru+monthnv_file_id_mlnxj/monthnv_file_id_vendorr1ndpnv_rom_debug_levelM!1neighbornv_rom_debug_levelL £^ °WûžE£%'Gfw_rev_majornv_vts_bank_b0x4.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A.V'Gts_hournv_vts_bank_a0x10.240x0.8BINARYTimestamp hour - 2 packed BCDZ'Kts_minutenv_vts_bank_a0x10.160x0.8BINARYTimestamp minute - 2 packed BCDY'Kts_secondnv_vts_bank_a0x10.80x0.8BINARYTimestamp second - 2 packed BCDV'Gts_yearnv_vts_bank_a0xC.160x0.16BINARYTimestamp year - 4 packed BCDV 'Its_monthnv_vts_bank_a0xC.80x0.8BINARYTimestamp month - 2 packed BCDR 'Ets_daynv_vts_bank_a0xC.00x0.8BINARYTimestamp day - 2 packed BCD %'Gfw_rev_minornv_vts_bank_a0x8.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A. ¢]»f ´Xû¢V'Gts_hournv_vts_bank_b0x10.240x0.8BINARYTimestamp hour - 2 packed BCDZ'Kts_minutenv_vts_bank_b0x10.160x0.8BINARYTimestamp minute - 2 packed BCDY'Kts_secondnv_vts_bank_b0x10.80x0.8BINARYTimestamp second - 2 packed BCDV'Gts_yearnv_vts_bank_b0xC.160x0.16BINARYTimestamp year - 4 packed BCDV'Its_monthnv_vts_bank_b0xC.80x0.8BINARYTimestamp month - 2 packed BCDR'Ets_daynv_vts_bank_b0xC.00x0.8BINARYTimestamp day - 2 packed BCD%'Gfw_rev_minornv_vts_bank_b0x8.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A.+'Efw_rev_subminornv_vts_bank_b0x8.00x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A ]:s¿]11!A5 roce_cc_enable_prinv_roce_cc0x0.00x0.8UNSIGNEDEach bit in this mask indicates if the RoCE should be \;enabled on the n-th IEEE priority.ROCE_CC_PRIO_MASK_P2)/!+5 roce_cc_algorithmnv_roce_cc0x0.310x0.1ENUMSelect RDMA over Converged Ethernet (RoCE) algorithm\;0x0: ECN\;0x1: QCNECN=0x0,QCN=0x1ROCE_CC_ALGORITHM_P101!A5 roce_cc_enable_prinv_roce_cc0x0.00x0.8UNSIGNEDEach bit in this mask indicates if the RoCE should be \;enabled on the n-th IEEE priority.ROCE_CC_PRIO_MASK_P1C/-W)% default_link_typenv_vpi_link_type0x0.20x0.2ENUMSelect the link type (Ethernet or Infiniband) for the port\;0x1: IB - Infiniband\;0x2: ETH - EthernetIB=0x1,ETH=0x2LINK_TYPE_P2B/-W)% default_link_typenv_vpi_link_type0x0.20x0.2ENUMSelect the link type (Ethernet or Infiniband) for the port\;0x1: IB - Infiniband\;0x2: ETH - EthernetIB=0x1,ETH=0x2LINK_TYPE_P1 R7ŠÙ@$))e/ rpg_byte_resetnv_roce_cc_ecn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0=DISABLED)\;Default: 150RPG_BYTE_RESET_P1-#))?/ rpg_time_resetnv_roce_cc_ecn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in microseconds.\;Default: 2RPG_TIME_RESET_P1)"))?/ clamp_tgt_ratenv_roce_cc_ecn0x0.310x0.1BOOLIf set, whenever a CNP is processed, the target rate is \;updated to be the current rate.CLAMP_TGT_RATE_P1‚!G)‚_M clamp_tgt_rate_after_time_incnv_roce_cc_ecn0x0.300x0.1BOOLDefault: True\;When receiving an CNP, the target rate should be updated \;if the transmission rate was increased due to the timer, and \;not only due to the byte counterCLAMP_TGT_RATE_AFTER_TIME_INC_P1* /!+5 roce_cc_algorithmnv_roce_cc0x0.310x0.1ENUMSelect RDMA over Converged Ethernet (RoCE) algorithm\;0x0: ECN\;0x1: QCNECN=0x0,QCN=0x1ROCE_CC_ALGORITHM_P2 r)ó6r@(%)k+ rpg_hai_ratenv_roce_cc_ecn0x18.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_HYPER_INCREASE state.\;Default: 50RPG_HAI_RATE_P19'#)a) rpg_ai_ratenv_roce_cc_ecn0x14.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_ACTIVE_INCREASE.\;Default: 10RPG_AI_RATE_P1‚2&%)ƒQ+ rpg_max_ratenv_roce_cc_ecn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed).\;Default: 0 (Full port speed)RPG_MAX_RATE_P1S%')‚- rpg_thresholdnv_roce_cc_ecn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 5RPG_THRESHOLD_P1 AÛéFA‚,=)‚=C rate_to_set_on_first_cnpnv_roce_cc_ecn0x28.00x0.17UNSIGNEDThe rate that is set for the flow when a rate limiter is allo\;cated to it upon first CNP received, in Mbps (=Full Port \;Speed).\;Default: 0 Port speedRATE_TO_SET_ON_FIRST_CNP_P1+%))+ rpg_min_ratenv_roce_cc_ecn0x24.00x0.17UNSIGNEDThe minimum value, in megabits per second, for rate to \;limit.\;Default: 2000RPG_MIN_RATE_P1n*+)‚51  rpg_min_dec_facnv_roce_cc_ecn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50RPG_MIN_DEC_FAC_P11100‚!))ƒG rpg_gdnv_roce_cc_ecn0x1C.00x0.4UNSIGNEDIf a CNP is received, the flow rate is reduced at the begin\;ning of the next rate_reduce_monitor_period interval to \;(1-Alpha/Gd)*CurrentRate. rpg_gd is given as log2(Gd), \;where Gd may only be powers of 2.\;Default: 7RPG_GD_P1 @Š³Ùý*TŠ´Ûú&Gk”É0Z€šÁâe@$)+public_key_expfile_public_key}$#1psid_branchfile_applicable_too(//num_pfs_supportednv_global_pci_cap%%'1num_pfs_validnv_global_pci_conf##1num_vf_msixnv_global_pci_conf,7/num_vf_msix_supportednv_global_pci_cap$)/1num_vf_msix_validnv_global_pci_conf5A7number_of_pci_switch_lanesnv_pci_switch_evb_cap8)7'nvia_nvconfig_on_bootnv_debug_mode‡&1'nvia_nvlog_on_bootnv_debug_modeˆ-ocsd_ennv_rom_ocsd_ocbb†+31one_qp_per_recoverynv_sw_offload_confa -!option_rom_debugnv_rom_iniY#'-packet_pacingnv_packet_pacingf(%7panic_bannernv_rom_flexboot_debug4=9pci_switch_lanes_mappingnv_pci_switch_evb_conf79G9pci_switch_lanes_remapping_ennv_pci_switch_evb_conf6,7/pf_bar_size_supportednv_global_pci_cap!)/1pf_bar_size_validnv_global_pci_conf%7!platform_to_driver_ennv_rom_iniJ!port_enumnv_rom_iniF&!7port_ownernv_external_port_ctrl -!promiscuous_vlannv_rom_iniZ1psidfile_applicable_ton ‘R³‘‚/A)‚mG  rate_reduce_monitor_periodnv_roce_cc_ecn0x34.00x0.17UNSIGNEDThe minimum time between 2 consecutive rate reductions \;for a single flow. Rate reduction will occur only if a CNP \;is received during the relevant time interval.\;Default: 2RATE_REDUCE_MONITOR_PERIOD_P11.#)#)  dce_tcp_rttnv_roce_cc_ecn0x30.00x0.17UNSIGNEDThe time between updates of the alpha value, in microsec\;onds.\;Default: 2DCE_TCP_RTT_P11ƒ*-)…I%  dce_tcp_gnv_roce_cc_ecn0x2C.00x0.10UNSIGNEDUsed to update the congestion estimator (alpha) once \;every dce_tcp_rtt microseconds, according to the equa\;tion:\;Alpha = (cnp_received * dceTcpG) + (1 - dceTcpG) * \;alpha .\;dceTcpG is divided by 2^10.\;cnp_received is set to one if a CNP was received for this \;flow during period since the previous update and the cur\;rent update\;Default: 64DCE_TCP_G_P11 z"kËz4)# cnp_dscpnv_roce_cc_ecn0x40.80x0.6UNSIGNEDThe DiffServ Code Point of the generated CNP for this \;port.CNP_DSCP_P1D3')q5 cnp_prio_modenv_roce_cc_ecn0x40.30x0.1BOOLIf set, CNP packets for this port contain priority from \;received request, if unset, use value from cnp_802p_prioCNP_RES_PRIO_MODE_P12')!- cnp_802p_prionv_roce_cc_ecn0x40.00x0.3UNSIGNEDThe 802.1p priority value of the generated CNP for this \;port\;Default: 7CNP_802P_PRIO_P1317)-= min_time_between_cnpsnv_roce_cc_ecn0x3C.00x0.17UNSIGNEDMinimum time between sending CNPs from the port, in \;microseconds. \;Default: 0MIN_TIME_BETWEEN_CNPS_P1Z03)‚9 initial_alpha_valuenv_roce_cc_ecn0x38.00x0.10UNSIGNEDThe initial value of alpha to use when receiving the first \;CNP for a flow. Expressed in a fixed point fraction of \;2^10.INITIAL_ALPHA_VALUE_P1 %²²ÈÝô !<WsªÆßõ #:Pfu‰˜ªÐö $:ParŒ¦ºËÜî-BOOT_DBG_LOG_DRVO+BOOT_DBG_LOG_IPY/BOOT_DBG_LOG_IPV6Z-BOOT_DBG_LOG_NDPM/BOOT_DBG_LOG_NDRVP7BOOT_DBG_LOG_NDRV_CMDQ7BOOT_DBG_LOG_NDRV_DEVR9BOOT_DBG_LOG_NDRV_PORTS9BOOT_DBG_LOG_NETDEVICET7BOOT_DBG_LOG_PXE_UNDI]9BOOT_DBG_LOG_ROMPREFIXH3BOOT_DBG_LOG_STATUS\-BOOT_DBG_LOG_STPG-BOOT_DBG_LOG_TCPW1BOOT_DBG_LOG_TCPIPX/BOOT_DBG_LOG_TFTPU-BOOT_DBG_LOG_UDPV-BOOT_DBG_LOG_URINBOOT_PKEY!)BOOT_RETRY_CNTBOOT_VLAN%BOOT_VLAN_EN %MCLAMP_TGT_RATE_AFTER_TIME_INC_P1¡%MCLAMP_TGT_RATE_AFTER_TIME_INC_P2µ/CLAMP_TGT_RATE_P1¢/CLAMP_TGT_RATE_P2¶-CNP_802P_PRIO_P1²-CNP_802P_PRIO_P2Æ#CNP_DSCP_P1´#CNP_DSCP_P2È5CNP_RES_PRIO_MODE_P1³5CNP_RES_PRIO_MODE_P2Ç+CQE_COMPRESSION`#DCBX_CEE_P1ô#DCBX_CEE_P2÷%DCBX_IEEE_P1ó%DCBX_IEEE_P2ö ÅÅõ&Tƒ¯Òö?p“´Ö÷=b†«Çä/A) rate_reduce_monitor_periodnv_roce_cc_ecn¯0A)rate_reduce_monitor_periodnv_roce_cc_ecnÃ-=) rate_to_set_on_first_cnpnv_roce_cc_ecn¬.=)rate_to_set_on_first_cnpnv_roce_cc_ecnÀ++7reneg_on_changenv_external_port_ctrl"/! roce_cc_algorithmnv_roce_ccž#/!roce_cc_algorithmnv_roce_cc #1! roce_cc_enable_prinv_roce_cc$1!roce_cc_enable_prinv_roce_ccŸ0A-roce_over_ip_next_protocolnv_roce_1_5_conf "1romprefixnv_rom_debug_levelH #) rpg_ai_ratenv_roce_cc_ecn§!#)rpg_ai_ratenv_roce_cc_ecn» #) rpg_ai_ratenv_roce_cc_qcnÍ!#)rpg_ai_ratenv_roce_cc_qcnÖ#)) rpg_byte_resetnv_roce_cc_ecn¤$))rpg_byte_resetnv_roce_cc_ecn¸#)) rpg_byte_resetnv_roce_cc_qcnÊ$))rpg_byte_resetnv_roce_cc_qcnÓ) rpg_gdnv_roce_cc_ecn©)rpg_gdnv_roce_cc_ecn½) rpg_gdnv_roce_cc_qcnÏ ¿ä6„¿A8))e/ rpg_byte_resetnv_roce_cc_ecn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0=DISABLED)\;Default: 150RPG_BYTE_RESET_P2.7))?/ rpg_time_resetnv_roce_cc_ecn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in microseconds.\;Default: 2RPG_TIME_RESET_P2*6))?/ clamp_tgt_ratenv_roce_cc_ecn0x0.310x0.1BOOLIf set, whenever a CNP is processed, the target rate is \;updated to be the current rate.CLAMP_TGT_RATE_P2‚5G)‚_M clamp_tgt_rate_after_time_incnv_roce_cc_ecn0x0.300x0.1BOOLDefault: True\;When receiving an CNP, the target rate should be updated \;if the transmission rate was increased due to the timer, and \;not only due to the byte counterCLAMP_TGT_RATE_AFTER_TIME_INC_P2 n(ñ3nA<%)k+ rpg_hai_ratenv_roce_cc_ecn0x18.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_HYPER_INCREASE state.\;Default: 50RPG_HAI_RATE_P2:;#)a) rpg_ai_ratenv_roce_cc_ecn0x14.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_ACTIVE_INCREASE.\;Default: 10RPG_AI_RATE_P2‚3:%)ƒQ+ rpg_max_ratenv_roce_cc_ecn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed).\;Default: 0 (Full port speed)RPG_MAX_RATE_P2T9')‚- rpg_thresholdnv_roce_cc_ecn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 5RPG_THRESHOLD_P2 =ÚçC=‚@=)‚=C rate_to_set_on_first_cnpnv_roce_cc_ecn0x28.00x0.17UNSIGNEDThe rate that is set for the flow when a rate limiter is allo\;cated to it upon first CNP received, in Mbps (=Full Port \;Speed).\;Default: 0 Port speedRATE_TO_SET_ON_FIRST_CNP_P2 ?%))+ rpg_min_ratenv_roce_cc_ecn0x24.00x0.17UNSIGNEDThe minimum value, in megabits per second, for rate to \;limit.\;Default: 2000RPG_MIN_RATE_P2o>+)‚51  rpg_min_dec_facnv_roce_cc_ecn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50RPG_MIN_DEC_FAC_P21100‚"=)ƒG rpg_gdnv_roce_cc_ecn0x1C.00x0.4UNSIGNEDIf a CNP is received, the flow rate is reduced at the begin\;ning of the next rate_reduce_monitor_period interval to \;(1-Alpha/Gd)*CurrentRate. rpg_gd is given as log2(Gd), \;where Gd may only be powers of 2.\;Default: 7RPG_GD_P2 ŽQ±Ž‚CA)‚mG  rate_reduce_monitor_periodnv_roce_cc_ecn0x34.00x0.17UNSIGNEDThe minimum time between 2 consecutive rate reductions \;for a single flow. Rate reduction will occur only if a CNP \;is received during the relevant time interval.\;Default: 2RATE_REDUCE_MONITOR_PERIOD_P21B#)#)  dce_tcp_rttnv_roce_cc_ecn0x30.00x0.17UNSIGNEDThe time between updates of the alpha value, in microsec\;onds.\;Default: 2DCE_TCP_RTT_P21ƒ+A)…I%  dce_tcp_gnv_roce_cc_ecn0x2C.00x0.10UNSIGNEDUsed to update the congestion estimator (alpha) once \;every dce_tcp_rtt microseconds, according to the equa\;tion:\;Alpha = (cnp_received * dceTcpG) + (1 - dceTcpG) * \;alpha .\;dceTcpG is divided by 2^10.\;cnp_received is set to one if a CNP was received for this \;flow during period since the previous update and the cur\;rent update\;Default: 64DCE_TCP_G_P21 u!iÈÿuH)# cnp_dscpnv_roce_cc_ecn0x40.80x0.6UNSIGNEDThe DiffServ Code Point of the generated CNP for this \;port.CNP_DSCP_P2EG')q5  cnp_prio_modenv_roce_cc_ecn0x40.30x0.1BOOLIf set, CNP packets for this port contain priority from \;received request, if unset, use value from cnp_802p_prioCNP_RES_PRIO_MODE_P2F')!- cnp_802p_prionv_roce_cc_ecn0x40.00x0.3UNSIGNEDThe 802.1p priority value of the generated CNP for this \;port\;Default: 7CNP_802P_PRIO_P24E7)-= min_time_between_cnpsnv_roce_cc_ecn0x3C.00x0.17UNSIGNEDMinimum time between sending CNPs from the port, in \;microseconds. \;Default: 0MIN_TIME_BETWEEN_CNPS_P2[D3)‚9 initial_alpha_valuenv_roce_cc_ecn0x38.00x0.10UNSIGNEDThe initial value of alpha to use when receiving the first \;CNP for a flow. Expressed in a fixed point fraction of \;2^10.INITIAL_ALPHA_VALUE_P2 ¹_¦ß¹‚"L%)ƒO rpg_max_ratenv_roce_cc_qcn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed)\;Default: 0 (Full port speed)CK')‚ rpg_thresholdnv_roce_cc_qcn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 55J))q rpg_byte_resetnv_roce_cc_qcn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0 = DISABLED).\;Default: 150000I))A rpg_time_resetnv_roce_cc_qcn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in u-seconds.\;Default: 15000 U¤†ª Q%) rpg_min_ratenv_roce_cc_qcn0x24.00x0.17UNSIGNEDThe minimum value, in Mbits per second, for rate to limit.\;Default: \;10XP+)‚5 rpg_min_dec_facnv_roce_cc_qcn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50‚O)ƒK rpg_gdnv_roce_cc_qcn0x1C.00x0.4UNSIGNEDWhen a CNP is received, the flow rate is reduced at the \;beginning of the next rate_reduce_monitor_period inter\;val to (1-Alpha/Gd)*CurrentRate. rpg_gd is given as \;log2(Gd), where Gd may only be powers of 2.\;Default: 7-N%)c rpg_hai_ratenv_roce_cc_qcn0x18.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_HYPER_INCREASE state\;Default: 50'M#)Y rpg_ai_ratenv_roce_cc_qcn0x14.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_ACTIVE_INCREASE.\;Default: 5 µ^¤ܵ‚#U%)ƒOrpg_max_ratenv_roce_cc_qcn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed)\;Default: 0 (Full port speed)DT')‚rpg_thresholdnv_roce_cc_qcn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 56S))qrpg_byte_resetnv_roce_cc_qcn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0 = DISABLED).\;Default: 150000R))Arpg_time_resetnv_roce_cc_qcn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in u-seconds.\;Default: 15000 Z£Æè -Pr•ºà+Mp’µØüCgŒ°ZÕ&+-running_versionfile_cs_token_idv!%) rpg_hai_ratenv_roce_cc_ecn¨"%)rpg_hai_ratenv_roce_cc_ecn¼!%) rpg_hai_ratenv_roce_cc_qcnÎ"%)rpg_hai_ratenv_roce_cc_qcn×!%) rpg_max_ratenv_roce_cc_ecn¦"%)rpg_max_ratenv_roce_cc_ecnº!%) rpg_max_ratenv_roce_cc_qcnÌ"%)rpg_max_ratenv_roce_cc_qcnÕ$+) rpg_min_dec_facnv_roce_cc_ecnª%+)rpg_min_dec_facnv_roce_cc_ecn¾$+) rpg_min_dec_facnv_roce_cc_qcnÐ%+)rpg_min_dec_facnv_roce_cc_qcnÙ!%) rpg_min_ratenv_roce_cc_ecn«"%)rpg_min_ratenv_roce_cc_ecn¿!%) rpg_min_ratenv_roce_cc_qcnÑ"%)rpg_min_ratenv_roce_cc_qcnÚ"') rpg_thresholdnv_roce_cc_ecn¥#')rpg_thresholdnv_roce_cc_ecn¹"') rpg_thresholdnv_roce_cc_qcnË#')rpg_thresholdnv_roce_cc_qcnÔ#)) rpg_time_resetnv_roce_cc_ecn£$))rpg_time_resetnv_roce_cc_ecn·#)) rpg_time_resetnv_roce_cc_qcnÉ$))rpg_time_resetnv_roce_cc_qcnÒ*+5running_versionfile_dbg_fw_token_idt T¢ƒ¦ Z%)rpg_min_ratenv_roce_cc_qcn0x24.00x0.17UNSIGNEDThe minimum value, in Mbits per second, for rate to limit.\;Default: \;10YY+)‚5rpg_min_dec_facnv_roce_cc_qcn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50‚X)ƒKrpg_gdnv_roce_cc_qcn0x1C.00x0.4UNSIGNEDWhen a CNP is received, the flow rate is reduced at the \;beginning of the next rate_reduce_monitor_period inter\;val to (1-Alpha/Gd)*CurrentRate. rpg_gd is given as \;log2(Gd), where Gd may only be powers of 2.\;Default: 7.W%)crpg_hai_ratenv_roce_cc_qcn0x18.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_HYPER_INCREASE state\;Default: 50(V#)Yrpg_ai_ratenv_roce_cc_qcn0x14.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_ACTIVE_INCREASE.\;Default: 5 ˆ ƒo]++… G1O I lldp_nb_rx_modenv_lldp_nb_conf0x0.280x0.2ENUMEnable the internal LLDP client, and define which TLV it \;will process.\;0x0: OFF - Not listen for incoming LLDP BPDU (incom\;ing LLDP frames will be routed to the host)\;0x1: MANDATORY - Listen for incoming LLDP frames, \;store only the mandatory LLDP BPDUs (1..3)\;0x2: ALL - Receive and store all incoming LLDP BPDUsOFF=0x0,MANDATORY=0x1,ALL=0x2LLDP_NB_RX_MODE_P1$nv_lldp_nb_cap.lldp_nb_rx_cap!=0$nv_lldp_nb_cap.lldp_nb_rx_capy\%+#+Q lldp_nb_dcbxnv_lldp_nb_conf0x0.270x0.1BOOLEnable DCBXLLDP_NB_DCBX_P1$nv_lldp_nb_cap.lldp_nb_dcbx_en!=0u[5+e lldp_msg_tx_intervalnv_lldp_nb_conf0x0.00x0.12UNSIGNEDInterval for sending LLDP NB PDUs in seconds yS¹y‚<`9+ƒk lldp_nb_tx_buffer_sizenv_lldp_nb_conf0x8.160x0.16UNSIGNEDThe size in bytes of that the lldp client must reserve for \;transmitted TLVs. The buffer size must be big enough to \;hold all the mandatory TLVs (chassisID, PortID & TTL) \;as well as all the optional TLVs that the client need to \;send._9+! lldp_nb_rx_buffer_sizenv_lldp_nb_conf0x8.00x0.16UNSIGNEDThe size in bytes of that the lldp client must reserve for \;incoming TLVsƒ)^++„G1O I lldp_nb_tx_modenv_lldp_nb_conf0x0.300x0.2ENUMSelect which LLDP TLV will be generated by the NIC\;0x0: OFF - NIC internal LLDP client will not send LLDP \;frames \;0x1: MANDATORY - Transmit only mandatory LLDP \;BPDU (ChassisID, PortID & TTL)\;0x2: ALL - Transmit optional LLDP BPDU if configuredOFF=0x0,MANDATORY=0x1,ALL=0x2LLDP_NB_TX_MODE_P1$nv_lldp_nb_cap.lldp_nb_tx_cap!=0$nv_lldp_nb_cap.lldp_nb_tx_cap ‡ ƒpc++… G1O I lldp_nb_rx_modenv_lldp_nb_conf0x0.280x0.2ENUMEnable the internal LLDP client, and define which TLV it \;will process.\;0x0: OFF - Not listen for incoming LLDP BPDU (incom\;ing LLDP frames will be routed to the host)\;0x1: MANDATORY - Listen for incoming LLDP frames, \;store only the mandatory LLDP BPDUs (1..3)\;0x2: ALL - Receive and store all incoming LLDP BPDUsOFF=0x0,MANDATORY=0x1,ALL=0x2LLDP_NB_RX_MODE_P2$nv_lldp_nb_cap.lldp_nb_rx_cap!=0$nv_lldp_nb_cap.lldp_nb_rx_capzb%+#+Q  lldp_nb_dcbxnv_lldp_nb_conf0x0.270x0.1BOOLEnable DCBXLLDP_NB_DCBX_P2$nv_lldp_nb_cap.lldp_nb_dcbx_en!=0va5+elldp_msg_tx_intervalnv_lldp_nb_conf0x0.00x0.12UNSIGNEDInterval for sending LLDP NB PDUs in seconds vR·v‚=f9+ƒklldp_nb_tx_buffer_sizenv_lldp_nb_conf0x8.160x0.16UNSIGNEDThe size in bytes of that the lldp client must reserve for \;transmitted TLVs. The buffer size must be big enough to \;hold all the mandatory TLVs (chassisID, PortID & TTL) \;as well as all the optional TLVs that the client need to \;send.e9+!lldp_nb_rx_buffer_sizenv_lldp_nb_conf0x8.00x0.16UNSIGNEDThe size in bytes of that the lldp client must reserve for \;incoming TLVsƒ*d++„G1O I lldp_nb_tx_modenv_lldp_nb_conf0x0.300x0.2ENUMSelect which LLDP TLV will be generated by the NIC\;0x0: OFF - NIC internal LLDP client will not send LLDP \;frames \;0x1: MANDATORY - Transmit only mandatory LLDP \;BPDU (ChassisID, PortID & TTL)\;0x2: ALL - Transmit optional LLDP BPDU if configuredOFF=0x0,MANDATORY=0x1,ALL=0x2LLDP_NB_TX_MODE_P2$nv_lldp_nb_cap.lldp_nb_tx_cap!=0$nv_lldp_nb_cap.lldp_nb_tx_cap B•3ÐB jA) max_lldp_nb_rx_buffer_sizenv_lldp_nb_cap0x4.00x0.16UNSIGNEDThe maximum supported buffer size for incoming LLDP \;TLVs‚_i))ƒ{_ lldp_nb_tx_capnv_lldp_nb_cap0x0.300x0.2ENUM0x0: NA - LLDP transmission not supported \;0x1: MANDATORY - The LLDP client only support \;sending of the mandatory LLDP NB TLVs (ChassisID, \;PortID & TTL)\;0x2: ALL - The LLDP client support sending mandatory \;and optional TLVs \;0x3: reservedNA=0x0,MANDATORY=0x1,ALL=0x2,reserved=0x3‚^h))„E lldp_nb_rx_capnv_lldp_nb_cap0x0.280x0.2ENUM0x0: NA - Reception and storing of LLDP frames is not \;supported (incoming frames will be forwarded to the host)\;0x1: MANDATORY - The client can only store received \;the mandatory LLDP-TLVs \;0x2: ALL - The client can receive and store incoming \;LLDP TLVsNA=0x0,MANDATORY=0x1,ALL=0x2hg+)_ lldp_nb_dcbx_ennv_lldp_nb_cap0x0.270x0.1BOOLDCB-X supported\;supported_from_version:1 r^ò‚_n))„Elldp_nb_rx_capnv_lldp_nb_cap0x0.280x0.2ENUM0x0: NA - Reception and storing of LLDP frames is not \;supported (incoming frames will be forwarded to the host)\;0x1: MANDATORY - The client can only store received \;the mandatory LLDP-TLVs \;0x2: ALL - The client can receive and store incoming \;LLDP TLVsNA=0x0,MANDATORY=0x1,ALL=0x2im+)_lldp_nb_dcbx_ennv_lldp_nb_cap0x0.270x0.1BOOLDCB-X supported\;supported_from_version:1‚lK)ƒ max_num_of_tx_optional_lldp_tlvnv_lldp_nb_cap0x8.00x0.7UNSIGNEDThe maximum number of optional LLDP TLVs that are \;supported by the firmware. The firmware is searching of \;LLDP NB TLV to send from type 0x110 to type (0x110 + \;this field)\;Default: 16 kA) max_lldp_nb_tx_buffer_sizenv_lldp_nb_cap0x4.160x0.16UNSIGNEDThe maximum supported buffer size for outgoing LLDP \;TLVs{mcjoTS*) 8 !"#%({+,-.0/2$34v5679:t=>?@EAB<OCDFPGHIJK;LNQ\R1UVWXYZ[]^_`adebfgh~ilnpƒqrsuwx'&yz|}k€‚„…   nv_mpfs_conf–NIC0MPFS CONF(3 %  nv_mpfs_conf–NIC0MPFS CONF%4 # nv_wol_confNIC0WOL CONF05 - 'nv_virt_net_addrNIC0 VIRT NET ADDR:6 7 1nv_external_port_ctrl’NIC0EXTERNAL PORT CTRL67 / )nv_rom_boot_conf2•EXP_ROM2ROM BOOT CONF2>8 7 1nv_rom_flexboot_debugEXP_ROM0ROM FLEXBOOT DEBUG>9 7 1nv_rom_banner_timeoutEXP_ROM0ROM BANNER TIMEOUT6: / )nv_rom_boot_conf1!EXP_ROM1ROM BOOT CONF1:; 3 -nv_rom_ib_boot_conf"EXP_ROM0ROM IB BOOT CONF iœ ~i‚rK)ƒmax_num_of_tx_optional_lldp_tlvnv_lldp_nb_cap0x8.00x0.7UNSIGNEDThe maximum number of optional LLDP TLVs that are \;supported by the firmware. The firmware is searching of \;LLDP NB TLV to send from type 0x110 to type (0x110 + \;this field)\;Default: 16 qA)max_lldp_nb_tx_buffer_sizenv_lldp_nb_cap0x4.160x0.16UNSIGNEDThe maximum supported buffer size for outgoing LLDP \;TLVs pA)max_lldp_nb_rx_buffer_sizenv_lldp_nb_cap0x4.00x0.16UNSIGNEDThe maximum supported buffer size for incoming LLDP \;TLVs‚`o))ƒ{_lldp_nb_tx_capnv_lldp_nb_cap0x0.300x0.2ENUM0x0: NA - LLDP transmission not supported \;0x1: MANDATORY - The LLDP client only support \;sending of the mandatory LLDP NB TLVs (ChassisID, \;PortID & TTL)\;0x2: ALL - The LLDP client support sending mandatory \;and optional TLVs \;0x3: reservedNA=0x0,MANDATORY=0x1,ALL=0x2,reserved=0x3 !ä&8J^rŒž½Ýýõä+Gc€Œ¥¾Öî (Hh‚”¦»Ðè#IBM_CAPI_EN‚9FORCE_ETH_PCI_SUBCLASS+DCBX_WILLING_P2ø%DCE_TCP_G_P1­%DCE_TCP_G_P2Á)DCE_TCP_RTT_P1®)DCE_TCP_RTT_P2Â7DCR_CNACK_BUFFER_SIZEy'DCR_LIFO_SIZExADISABLE_SLOT_POWER_LIMITER9ADO_NOT_CLEAR_PORT_STATS_P1ýADO_NOT_CLEAR_PORT_STATS_P2/DUP_MAC_ACTION_P1/DUP_MAC_ACTION_P29INITIAL_ALPHA_VALUE_P1°9INITIAL_ALPHA_VALUE_P2Ä=INT_LOG_MAX_PAYLOAD_SIZE4 IP_VER3KEEP_ETH_LINK_UP_P1ù3KEEP_ETH_LINK_UP_P2þ1KEEP_IB_LINK_UP_P1ú1KEEP_IB_LINK_UP_P2ÿ;KEEP_LINK_UP_ON_BOOT_P1û;KEEP_LINK_UP_ON_BOOT_P2AKEEP_LINK_UP_ON_STANDBY_P1üAKEEP_LINK_UP_ON_STANDBY_P25LEGACY_BOOT_PROTOCOL%LINK_TYPE_P1›%LINK_TYPE_P2œ+LLDP_NB_DCBX_P1Ü+LLDP_NB_DCBX_P2â1LLDP_NB_RX_MODE_P1Ý1LLDP_NB_RX_MODE_P2ã ˜˜·Ø÷Et•ºÞ 2Olž½×ï *Ll’­Èä/secondsnv_file_id_vendort -!shared_memory_ennv_rom_ini<)signaturefile_signatures#))signature_uuidfile_signatureq)9'slot_power_limiter_disnv_power_conf9.E%slot_power_limiter_supportednv_power_cap; 1sriov_ennv_global_pci_conf$'/sriov_supportnv_global_pci_cap-##1sriov_validnv_global_pci_conf,E!static_component_name_stringnv_rom_ini?&'1status_updatenv_rom_debug_level\1stpnv_rom_debug_levelG1tcpnv_rom_debug_levelW1/?tcp_timestamps_ennv_rom_iscsi_general_conf%1tcpipnv_rom_debug_levelX!tech_enumnv_rom_ini>%textfile_commentp1tftpnv_rom_debug_levelU%!tivoli_wa_ennv_rom_iniO!1total_vfsnv_global_pci_conf/tray_idnv_enclosure_info‚%'/tray_locationnv_enclosure_infoƒ'ts_daynv_vts_bank_aŒ'ts_daynv_vts_bank_b•'ts_hournv_vts_bank_a‘'ts_hournv_vts_bank_bš ˜=«GæS˜7y-+S3 keep_eth_link_upnv_keep_link_up0x0.00x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (Ethernet only).KEEP_ETH_LINK_UP_P1x%++ dcbx_willingnv_lldp_nb_dcbx0x0.20x0.1BOOLAllow the NIC to accept DCBX configuration from the \;remote peer.DCBX_WILLING_P2^w#+;# cee_dcbx_ennv_lldp_nb_dcbx0x0.10x0.1BOOLEnable DCBX in CEE modeDCBX_CEE_P2av%+=% ieee_dcbx_ennv_lldp_nb_dcbx0x0.00x0.1BOOLEnable DCBX in IEEE modeDCBX_IEEE_P2u%++ dcbx_willingnv_lldp_nb_dcbx0x0.20x0.1BOOLAllow the NIC to accept DCBX configuration from the \;remote peer.DCBX_WILLING_P1]t#+;# cee_dcbx_ennv_lldp_nb_dcbx0x0.10x0.1BOOLEnable DCBX in CEE modeDCBX_CEE_P1`s%+=% ieee_dcbx_ennv_lldp_nb_dcbx0x0.00x0.1BOOLEnable DCBX in IEEE modeDCBX_IEEE_P1 IEr=Ip};+‚'A do_not_clear_port_statsnv_keep_link_up0x0.40x0.1BOOLWhen set, the port statistic counters are not cleared on first \;host init. When cleared the port statistics are cleared on first \;host initDO_NOT_CLEAR_PORT_STATS_P1‚1|;+ƒ+A keep_link_up_on_standbynv_keep_link_up0x0.30x0.1BOOLWhen set, the NIC keeps the link up from power-up until \;the server is turned on, and when the server is in standby \;mode (applicable only if the host PCI rails can provide \;enough power in standby mode).KEEP_LINK_UP_ON_STANDBY_P1O{5+s; keep_link_up_on_bootnv_keep_link_up0x0.20x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode and a driver is not initialized.KEEP_LINK_UP_ON_BOOT_P17z++W1 keep_ib_link_upnv_keep_link_up0x0.10x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (InfiniBand only).KEEP_IB_LINK_UP_P1 *„(Ò襽@UoŒŸ¶Ñæý&>RdwŠŸµÉÞó 4FYk~„””¯ËÝð!nv_pci_cap`#nv_pci_conf_1file_mac_addr_list^+file_public_key]-file_cs_token_id\5file_dbg_fw_token_id[)file_signatureZ%file_commentY1file_applicable_toX- nv_base_mac_guid5nv_base_mac_guid_cap;nv_current_configurator'nv_debug_mode/nv_enclosure_info7nv_external_port_ctrl6+nv_file_id_mlnx/nv_file_id_vendor%nv_fpga_data/nv_global_pci_cap1nv_global_pci_conf)nv_host_to_bmc%nv_ib_dc_cap'nv_ib_dc_conf'nv_kdnet_data + nv_keep_link_up,+nv_keep_link_up-) nv_lldp_nb_cap()nv_lldp_nb_cap)+ nv_lldp_nb_conf&+nv_lldp_nb_conf'+ nv_lldp_nb_dcbx*+nv_lldp_nb_dcbx+%nv_memic_cap'nv_memic_conf% nv_mpfs_conf2%nv_mpfs_conf3-nv_packet_pacing7nv_pci_switch_evb_cap 9nv_pci_switch_evb_conf %nv_power_cap'nv_power_conf ! nv_qos_cap0 EVh~ŽŸ³ÈÜñ #:Je€™²Âì'Nv™½á1nv_rom_debug_levelV*Wnv_rom_iscsi_connect_to_second_targetO# nv_qos_conf.#nv_qos_conf/-nv_roce_1_5_conf! nv_roce_cc !nv_roce_cc!) nv_roce_cc_ecn")nv_roce_cc_ecn#) nv_roce_cc_qcn$)nv_roce_cc_qcn%7nv_rom_banner_timeout9/nv_rom_boot_conf1:/nv_rom_boot_conf27!nv_rom_cap7nv_rom_dhcp_vendor_id>7nv_rom_flexboot_debug83nv_rom_ib_boot_conf;3nv_rom_ib_dhcp_conf<!nv_rom_ini)Unv_rom_iscsi_connect_to_first_targetH/nv_rom_iscsi_dhcpG#Inv_rom_iscsi_first_target_addrI&Onv_rom_iscsi_first_target_chap_idM'Qnv_rom_iscsi_first_target_chap_pwdN"Gnv_rom_iscsi_first_target_lunK#Inv_rom_iscsi_first_target_nameL#Inv_rom_iscsi_first_target_portJ?nv_rom_iscsi_general_conf= ~Dˆ´~‚2‚;+ƒ+A  keep_link_up_on_standbynv_keep_link_up0x0.30x0.1BOOLWhen set, the NIC keeps the link up from power-up until \;the server is turned on, and when the server is in standby \;mode (applicable only if the host PCI rails can provide \;enough power in standby mode).KEEP_LINK_UP_ON_STANDBY_P2P‚5+s;  keep_link_up_on_bootnv_keep_link_up0x0.20x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode and a driver is not initialized.KEEP_LINK_UP_ON_BOOT_P28++W1  keep_ib_link_upnv_keep_link_up0x0.10x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (InfiniBand only).KEEP_IB_LINK_UP_P28~-+S3 keep_eth_link_upnv_keep_link_up0x0.00x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (Ethernet only).KEEP_ETH_LINK_UP_P2 ‰ ‰‚~‚#ƒoo% ? num_of_vlnv_qos_conf0x0.00x0.4ENUM\;Number of Infiniband Virtual Lanes for this port, (ssee \;vl_admin in PVLC Register)\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs --VL0, VL14 (VL15 is always present for MADs)1_VL=0x1,2_VLs=0x2,4_VLs=0x3,8_VLs=0x4,15_VLs=0x5NUM_OF_VL_P11$nv_qos_cap.max_num_of_vlq‚;+‚'A do_not_clear_port_statsnv_keep_link_up0x0.40x0.1BOOLWhen set, the port statistic counters are not cleared on first \;host init. When cleared the port statistics are cleared on first \;host initDO_NOT_CLEAR_PORT_STATS_P2 !ø!S‚!#u' ; num_of_pfcnv_qos_conf0x0.80x0.4UNSIGNEDNumber of IEEE priorities that may simultaneously sup\;port flow control. \; (see pfc_cap_admin DCBX_PARAM Register)NUM_OF_PFC_P1$nv_qos_cap.max_num_pfc„‚#„9)% Q num_of_tcnv_qos_conf0x0.40x0.4ENUMNumber of traffic classes, when DCB-X is enabled, this is \;the maximum number of TC that can negotiated with the \;remote peer. (see num_of_tc_admin in DCBX_PARAM \;Register)\;0x0: _8_TCs\;0x1: _1_TC\;0x2: _2_TCs\;0x3: _3_TCs\;0x4: _4_TCs\;0x5: _5_TCs\;0x6: _6_TCs\;0x7: _7_TCs8_TCs=0x0,1_TC=0x1,2_TCs=0x2,3_TCs=0x3,4_TCs=0x4,5_TCs=0x5,6_TCs=0x6,7_TCs=0x7NUM_OF_TC_P1($nv_qos_cap.max_num_of_tc==0)?0:1($nv_qos_cap.max_num_of_tc==0)?7:$nv_qos_cap.max_num_of_tc t}t„‚#„9)% Q num_of_tcnv_qos_conf0x0.40x0.4ENUMNumber of traffic classes, when DCB-X is enabled, this is \;the maximum number of TC that can negotiated with the \;remote peer. (see num_of_tc_admin in DCBX_PARAM \;Register)\;0x0: _8_TCs\;0x1: _1_TC\;0x2: _2_TCs\;0x3: _3_TCs\;0x4: _4_TCs\;0x5: _5_TCs\;0x6: _6_TCs\;0x7: _7_TCs8_TCs=0x0,1_TC=0x1,2_TCs=0x2,3_TCs=0x3,4_TCs=0x4,5_TCs=0x5,6_TCs=0x6,7_TCs=0x7NUM_OF_TC_P2($nv_qos_cap.max_num_of_tc==0)?0:1($nv_qos_cap.max_num_of_tc==0)?7:$nv_qos_cap.max_num_of_tc‚‚#ƒoo% ? num_of_vlnv_qos_conf0x0.00x0.4ENUM\;Number of Infiniband Virtual Lanes for this port, (ssee \;vl_admin in PVLC Register)\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs --VL0, VL14 (VL15 is always present for MADs)1_VL=0x1,2_VLs=0x2,4_VLs=0x3,8_VLs=0x4,15_VLs=0x5NUM_OF_VL_P21$nv_qos_cap.max_num_of_vl é(óié}‚ #! max_num_pfcnv_qos_cap0x0.80x0.4UNSIGNEDMaximum number of priority flow control\;supported_from_version: 1‚ '! max_num_of_tcnv_qos_cap0x0.40x0.4UNSIGNEDMaximum number of traffic classes supported by the NIC, \;where 0 => 8 TC‚1‚ '!ƒo max_num_of_vlnv_qos_cap0x0.00x0.4ENUMMaximum number of VLs supported by the HBA.\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs -- VL0..VL14 (VL15 is always present for MADs)1_VL=0x1,2_VLs=0x2,4_VLs=0x3,8_VLs=0x4,15_VLs=0x5T‚!#u' ;  num_of_pfcnv_qos_conf0x0.80x0.4UNSIGNEDNumber of IEEE priorities that may simultaneously sup\;port flow control. \; (see pfc_cap_admin DCBX_PARAM Register)NUM_OF_PFC_P2$nv_qos_cap.max_num_pfc ¾Ê?¾~‚#!max_num_pfcnv_qos_cap0x0.80x0.4UNSIGNEDMaximum number of priority flow control\;supported_from_version: 1‚ '!max_num_of_tcnv_qos_cap0x0.40x0.4UNSIGNEDMaximum number of traffic classes supported by the NIC, \;where 0 => 8 TC‚2‚ '!ƒomax_num_of_vlnv_qos_cap0x0.00x0.4ENUMMaximum number of VLs supported by the HBA.\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs -- VL0..VL14 (VL15 is always present for MADs)1_VL=0x1,2_VLs=0x2,4_VLs=0x3,8_VLs=0x4,15_VLs=0x5 k6kƒG‚A%…-G/ duplicated_mac_action_modenv_mpfs_conf0x0.00x0.4ENUMDefines the forwarding behavior in MPFS for MACs which are \;duplicated in more than one PF.\;0x0: LAST_CFG - last PF which added the MAC will receive \;the traffic.\;0x1: LOAD_BALANCE - MPFS will load-balance ipv4 traffic \;for packets with destination MAC addresses that belong to \;more than one PF between all PFs that have this MACLAST_CFG=0x0,LOAD_BALANCE=0x1DUP_MAC_ACTION_P2ƒF‚A%…-G/ duplicated_mac_action_modenv_mpfs_conf0x0.00x0.4ENUMDefines the forwarding behavior in MPFS for MACs which are \;duplicated in more than one PF.\;0x0: LAST_CFG - last PF which added the MAC will receive \;the traffic.\;0x1: LOAD_BALANCE - MPFS will load-balance ipv4 traffic \;for packets with destination MAC addresses that belong to \;more than one PF between all PFs that have this MACLAST_CFG=0x0,LOAD_BALANCE=0x1DUP_MAC_ACTION_P1 HHhŒ³ØAw¨Øõ/Lh…©Ö1nodnicnv_rom_debug_levelP#!1nodnic_cmdnv_rom_debug_levelQ&'1nodnic_devicenv_rom_debug_levelR$#1nodnic_portnv_rom_debug_levelS/;1non_prefetchable_pf_barnv_global_pci_conf 8O/non_prefetchable_pf_bar_supportednv_global_pci_cap 5G1non_prefetchable_pf_bar_validnv_global_pci_conf095num_of_allocated_guidsnv_base_mac_guid_cap/75num_of_allocated_macsnv_base_mac_guid_cap!# num_of_pfcnv_qos_conf!#num_of_pfcnv_qos_conf# num_of_tcnv_qos_conf#num_of_tcnv_qos_conf# num_of_vlnv_qos_conf#num_of_vlnv_qos_conf##1num_pf_msixnv_global_pci_conf,7/num_pf_msix_supportednv_global_pci_cap#)/1num_pf_msix_validnv_global_pci_conf axÔha‚‚!7‚}! port_ownernv_external_port_ctrl0x0.00x0.1BOOLIf Set, Indicates this function of this host own the external \;physical port. Default: For Multi-Host should be 0 for \;each host and PF. For Single Host Should be set to 1 for \;PF0.PORT_OWNERi‚#-avirtual_macnv_virt_net_addr0x4.240x8.0BYTESAn alternate MAC for this PCI PF (48bits). ‚)-Kvirtual_mac_ennv_virt_net_addr0x0.310x0.1BOOLWhen set, the PF will use the address defined in the "virtual_mac" instead of the original MAC.‚--9erase_on_powerupnv_virt_net_addr0x0.290x0.1BOOLWhen this bit is set, the MAC is ignored by firmware and the TLV is erased on powerup.g‚%#‚O% en_wol_magicnv_wol_conf0x0.100x0.1BOOLEnable server Wake-on-LAN upon reception of WOL magic packet.\;Support for this feature is indicated by the corresponding bit in the Wake on LAN Capabilities TLVWOL_MAGIC_EN âƒL‚+7…{+  reneg_on_changenv_external_port_ctrl0x0.20x0.1BOOLWhen cleared, a link-down/up sequence from the driver \;(PAOS) triggers re-negotiation of the link speed and \;parameters with the remote peer. When set, a link down/\;up sequence will trigger re-negotiation only if any link \;parameters were changed by a driver since last link nego\;tiation. \;This parameter is applicable when the port_owner param\;eter is set for this PFRENEG_ON_CHANGE‚‚/7ƒ/ allow_rd_countersnv_external_port_ctrl0x0.10x0.1BOOLIf Set, Indicates this function of this host allowed to rd \;counters of external physical port. For Multi-Host should \;be 0 for each host and PF. For Single Host Should be set to \;1 for PF0.ALLOW_RD_COUNTERS "Ô"s‚%7‚)Opanic_bannernv_rom_flexboot_debug0x0.290x0.2ENUMFlexboot behavior on critical failure \;0x0: PRINT -\; \;p\;rint error to screen\;0x1: HALT - freeze system\;0x2: OPEN_SHELL - open ipxe shellPRINT=0x0,HALT=0x1,OPEN_SHELL=0x27‚//iundi_network_waitnv_rom_boot_conf20x0.160x0.8UNSIGNEDThe number of seconds Flexboot waits after issuing a \;UNDI open commands until it starts using the interface.„(‚#/†GgA boot_ip_vernv_rom_boot_conf20x0.80x0.2ENUMSelect which IP protocol version will be used by Flexboot. \;If both are configured, Flexboot will try to boot with the \;2nd protocol only if DHCP parameters for the first proto\;col are not available or if booting with the first protocol \;has failed.\;This field is supported if the "nv_config_boot_ip_ver" field \;in "OPTION ROM capabilities" is set to 1.\;0x0: IPv4\;0x1: IPv6\;0x2: IPv4_IPv6\;0x3: IPv6_IPv4IPv4=0x0,IPv6=0x1,IPv4_IPv6=0x2,IPv6_IPv4=0x3IP_VER$nv_rom_cap.boot_ip_ver!=0 Ôg5ÐÔx‚5/S5 legacy_boot_protocolnv_rom_boot_conf10x0.160x0.8ENUMSelect boot protocol for legacy BIOS expansion ROM \;(Flexboot)\;0x0: NONE\;0x1: PXE\;0x2: ISCSI\;0x3: BOTH - PXE + iSCSINONE=0x0,PXE=0x1,ISCSI=0x2,BOTH=0x3LEGACY_BOOT_PROTOCOLb‚/? boot_vlannv_rom_boot_conf10x0.00x0.12UNSIGNEDVLAN ID for network boot.BOOT_VLAN‚.‚;7ƒEflexboot_banner_timeoutnv_rom_banner_timeout0x0.00x0.4UNSIGNEDNumber of seconds to wait when displaying the timer for \;the boot menu keypress. If set to 0 the boot menu is dis\;abled. The boot menu is only allowed to write values \;between 1 and 15. UEFI and mlxconfig may write 0.‚'7-boot_to_shellnv_rom_flexboot_debug0x0.310x0.1BOOLWhen this bit is set, Flexboot will boot to ipxe shell instead \;of normal boot. '«;Å'ƒ‚"/3„+client_identifiernv_rom_ib_dhcp_conf0x0.240x0.4ENUMSelect if the expansion ROM should add a Client Identi\;fier to DHCP DISCOVER and REQUEST packets over \;Infiniband.\;0x0: ROM_DEFAULT \;0x1: NO_CLIENT_IDENTIFIER\;0x2: SEND_CLIENT_IDENTIFIER\;When set, the UEFI driver modifies the DHCP packet sent \;by the uppr layers.ROM_DEFAULT=0x0,NO_CLIENT_IDENTIFIER=0x1,SEND_CLIENT_IDENTIFIER=0x2s‚!3] boot_pkeynv_rom_ib_boot_conf0x0.00x0.16UNSIGNEDInfinib and P_Key to be used by PXE bootBOOT_PKEYm‚ %/Q% boot_vlan_ennv_rom_boot_conf10x0.300x0.1BOOLEnable VLAN mode for network boot.BOOT_VLAN_EN‚Q‚-/‚-i) boot_retry_countnv_rom_boot_conf10x0.240x0.3ENUMNumber of retries to attempt in case of boot failure (FlexBoot)\;0x0: NONE\;0x1: _1\;0x2: _2\;0x3: _3\;0x4: _4\;0x5: _5\;0x6: _6\;0x7: UNLIMITEDNO_RETRIES=0x0,1_RETRY=0x1,2_RETRIES=0x2,3_RETRIES=0x3,4_RETRIES=0x4,5_RETRIES=0x5,6_RETRIES=0x6,UNLIMITED=0x7BOOT_RETRY_CNT 3OdyŽ£¶Ëé#6I[m|Ž °ÀÔä*Kl›µÏé1LLDP_NB_TX_MODE_P2ä;LOG_DCR_HASH_TABLE_SIZEw-LRO_LOG_TIMEOUT0b-LRO_LOG_TIMEOUT1c-LRO_LOG_TIMEOUT2d-LRO_LOG_TIMEOUT3e)MEMIC_BAR_SIZE-MEMIC_SIZE_LIMIT=MIN_TIME_BETWEEN_CNPS_P1±=MIN_TIME_BETWEEN_CNPS_P2Å;NON_PREFETCHABLE_PF_BAR 'NUM_OF_PFC_P1'NUM_OF_PFC_P2%NUM_OF_TC_P1%NUM_OF_TC_P2!NUM_OF_VFS%NUM_OF_VL_P1%NUM_OF_VL_P2#NUM_PF_MSIX#NUM_VF_MSIX+PF_LOG_BAR_SIZE!PORT_OWNER"GRATE_REDUCE_MONITOR_PERIOD_P1¯"GRATE_REDUCE_MONITOR_PERIOD_P2à CRATE_TO_SET_ON_FIRST_CNP_P1¬ CRATE_TO_SET_ON_FIRST_CNP_P2À+RENEG_ON_CHANGE5ROCE_CC_ALGORITHM_P1ž5ROCE_CC_ALGORITHM_P2 5ROCE_CC_PRIO_MASK_P15ROCE_CC_PRIO_MASK_P2Ÿ1ROCE_NEXT_PROTOCOL EÄ|;é=Ùq$Ñ}E6G / )nv_rom_iscsi_dhcp:EXP_ROM0ROM ISCSI DHCPRF K Env_rom_iscsi_initiator_chap_pwd9EXP_ROM0ROM ISCSI INITIATOR CHAP PWDQE I Cnv_rom_iscsi_initiator_chap_id8EXP_ROM0€ROM ISCSI INITIATOR CHAP IDKD C =nv_rom_iscsi_initiator_name7EXP_ROM0àROM ISCSI INITIATOR NAMEfC _ Ynv_rom_iscsi_initiator_secondary_dns_addr6EXP_ROM0ROM ISCSI INITIATOR SECONDARY DNS ADDRbB [ Unv_rom_iscsi_initiator_primary_dns_addr5EXP_ROM0ROM ISCSI INITIATOR PRIMARY DNS ADDRPA I Cnv_rom_iscsi_initiator_gateway4EXP_ROM0ROM ISCSI INITIATOR GATEWAYX@ Q Knv_rom_iscsi_initiator_subnet_mask3EXP_ROM0ROM ISCSI INITIATOR SUBNET MASKP? I Cnv_rom_iscsi_initiator_ip_addr2EXP_ROM0ROM ISCSI INITIATOR IP ADDR?> 7 1nv_rom_dhcp_vendor_id1EXP_ROM0ROM DHCP VENDOR IDF= ? 9nv_rom_iscsi_general_conf0EXP_ROM2 ROM ISCSI GENERAL CONF:< 3 -nv_rom_ib_dhcp_conf#EXP_ROM0ROM IB DHCP CONF ||¡ÇîIm’¸ß 0V‚®×$))lldp_nb_rx_capnv_lldp_nb_capî%++ lldp_nb_rx_modenv_lldp_nb_confÝ&++lldp_nb_rx_modenv_lldp_nb_confã,9+ lldp_nb_tx_buffer_sizenv_lldp_nb_confà-9+lldp_nb_tx_buffer_sizenv_lldp_nb_confæ#)) lldp_nb_tx_capnv_lldp_nb_capé$))lldp_nb_tx_capnv_lldp_nb_capï%++ lldp_nb_tx_modenv_lldp_nb_confÞ&++lldp_nb_tx_modenv_lldp_nb_confä*;'log_dcr_hash_table_sizenv_ib_dc_confw%5#log_max_payload_sizenv_tpt_conf4%1'log_memic_bar_sizenv_memic_conf+31log_pf_uar_bar_sizenv_global_pci_conf+31log_vf_uar_bar_sizenv_global_pci_conf(-1lro_log_timeout0nv_sw_offload_confb(-1lro_log_timeout1nv_sw_offload_confc „¬ „‚&3?u  chap_mutual_auth_ennv_rom_iscsi_general_conf0x0.280x0.1BOOLAuthenticate the target to the initiator using CHAP.‚%/?/tcp_timestamps_ennv_rom_iscsi_general_conf0x0.270x0.1BOOLEnable the TCP timestamps option for iSCSI TCP con\;nections.\;xuefi: tcpTimestmpX‚$?9  vlan_ennv_rom_iscsi_general_conf0x0.260x0.1BOOLEnable VLANs for iSCSIƒu‚#)?†i boot_to_targetnv_rom_iscsi_general_conf0x0.220x0.2ENUMBoot to iSCSI target after connection\;0x0: ENABLED - Boot from target\;0x1: DISABLED - Don"t boot from target (target will \;hooked if configured and iscsi_keep_san_dev_en is set)\;0x2: ONE_TIME_DISABLED - Used for installing a new \;OS on the ISCSI target. Flexboot will not boot from the \;target once (e.g. DISABLED), and then will automati\;cally change the value to ENABLED.ENABLED=0x0,DISABLED=0x1,ONE_TIME_DISABLED=0x2 ‚èy» q‚,+?‚ [ iscsi_drive_numnv_rom_iscsi_general_conf0x8.160x0.8ENUMThe HDD number for the hooked iSCSI target in legacy \;BIOS int13 drive table.\;0x80: HDD1\;0x81: HDD2\;0x82: HDD3\;0x83: HDD4HDD1=0x80,HDD2=0x81,HDD3=0x82,HDD4=0x83-‚+1?E  link_up_delay_timenv_rom_iscsi_general_conf0x8.80x0.8UNSIGNEDNumber of seconds to wait after the link comes up before \;sending packets over the network.:‚*5?[  lun_busy_retry_countnv_rom_iscsi_general_conf0x8.00x0.8UNSIGNEDNumber of connection attempts to make if the iSCSI tar\;get is busy. Valid values are between 0 and 60.l‚)?_  vlannv_rom_iscsi_general_conf0x4.00x0.12UNSIGNEDVLAN number. Only valid when vlan_en is 1‚(7?iscsi_keep_san_dev_ennv_rom_iscsi_general_conf0x0.300x0.1BOOLKeep the iSCSI device attached for the OS \;supported_from_version: 2{‚'%?u  chap_auth_ennv_rom_iscsi_general_conf0x0.290x0.1BOOLAuthenticate the initiator to the target using CHAP. §‘ß(l§A‚1[ivaluenv_rom_iscsi_initiator_primary_dns_addr0x0.240x10.0STRINGPrimary IPv4 DNS for iSCSI initiator in dotted decimal \;notation (Flexboot)\;xuefi: IscsiInitiatorIpv4PrimDns8‚0Iivaluenv_rom_iscsi_initiator_gateway0x0.240x10.0STRINGIPv4 gateway for the iSCSI initiator in dotted decimal nota\;tion (Flexboot)\;xuefi: IscsiInitiatorIpv4Gateway3‚/QWvaluenv_rom_iscsi_initiator_subnet_mask0x0.240x10.0STRINGiSCSI initiator IPv4 subnet mask in dotted decimal notation \;(Flexboot)\;xuefi: IscsiInitiatorSubnet.‚.IUvaluenv_rom_iscsi_initiator_ip_addr0x0.240x10.0STRINGiSCSI initiator IPv4 address in dotted decimal notation \;(Flexboot) \;xuefi: IscsiInitiatorIpv4Addrl‚-7avaluenv_rom_dhcp_vendor_id0x0.240x100.0STRINGFlexboot DHCP Vendor ID\;xuefi: DhcpVendId [7¡û[‚5K/valuenv_rom_iscsi_initiator_chap_pwd0x0.240x10.0STRINGCHAP secret (password) for the initiator (Flexboot)\;xuefi: IscsiInitiatorChapPwd"‚4I;valuenv_rom_iscsi_initiator_chap_id0x0.240x80.0STRINGCHAP identifier (user name) for iSCSI initiator (Flexboot)\;xuefi: IscsiInitiatorChapId€ƒ‚3C…!valuenv_rom_iscsi_initiator_name0x0.240xe0.0STRINGThis configuration sets the initiator name for iSCSI boot. \;According to the iSCSI RFC (3270) the name has to be \;UTF-8 encoded, with total length no more than 223 bytes. It \;allows international characters, but prohibits the use of \;invisible characters, such as whitespace characters. (Flex\;boot)\;xuefi: IscsiInitiatorNameàE‚2_mvaluenv_rom_iscsi_initiator_secondary_dns_addr0x0.240x10.0STRINGSecondary IPv4 DNS for iSCSI initiator in dotted decimal \;notation. (Flexboot)\;xuefi: IscsiInitiatorIpv4SecDns ‘[«ãG‘2‚:I_valuenv_rom_iscsi_first_target_port0x0.240x8.0STRINGTCP port for the first iSCSI target (Flexboot)\;Decimal integer in ASCII format up to 5 digits (1-65536).‚9I)valuenv_rom_iscsi_first_target_addr0x0.240x10.0STRINGIPv4 address of the first iSCSI target in dotted decimal nota\;tion (Flexboot)D‚8Uwvaluenv_rom_iscsi_connect_to_first_target0x0.240x8.0STRINGWhen the string is "Enabled" Flexboot attempt to connect to \;the first ISCSI target. Other legal value is "Disabled",‚7%/eipv4_dhcp_ennv_rom_iscsi_dhcp0x0.310x0.1BOOLWhen enabled, Flexboot attempt to discover IPv4 configu\;ration for iSCSI through DHCP.\;xuefi: TcpIpViaDhcp!‚6'/Mdhcp_iscsi_ennv_rom_iscsi_dhcp0x0.300x0.1BOOLWhen enabled, Flexboot attempt to discover iSCSI parame\;ters through DHCP.\;xuefi: IscsiViaDhcp N¢Pþ®[¨Hô NPR I Cnv_rom_iscsi_second_target_lunSEXP_ROM0ROM ISCSI SECOND TARGET LUNRQ K Env_rom_iscsi_second_target_portREXP_ROM0ROM ISCSI SECOND TARGET PORTRP K Env_rom_iscsi_second_target_addrQEXP_ROM0ROM ISCSI SECOND TARGET ADDR^O W Qnv_rom_iscsi_connect_to_second_targetPEXP_ROM0ROM ISCSI CONNECT TO SECOND TARGETXN Q Knv_rom_iscsi_first_target_chap_pwdGEXP_ROM0ROM ISCSI FIRST TARGET CHAP PWDWM O Inv_rom_iscsi_first_target_chap_idEEXP_ROM0€ROM ISCSI FIRST TARGET CHAP IDQL I Cnv_rom_iscsi_first_target_nameDEXP_ROM0àROM ISCSI FIRST TARGET NAMENK G Anv_rom_iscsi_first_target_lunCEXP_ROM0ROM ISCSI FIRST TARGET LUNPJ I Cnv_rom_iscsi_first_target_portBEXP_ROM0ROM ISCSI FIRST TARGET PORTPI I Cnv_rom_iscsi_first_target_addrAEXP_ROM0ROM ISCSI FIRST TARGET ADDR\H U Onv_rom_iscsi_connect_to_first_target@EXP_ROM0ROM ISCSI CONNECT TO FIRST TARGET ÇOdzïÐè/Ns•Æø#Q€ªÕ';uefi_logsnv_rom_uefi_debug_levelm//;uefi_logs_verbosenv_rom_uefi_debug_levell//;uefi_log_severitynv_rom_uefi_debug_levelk13;uefi_debug_log_poolnv_rom_uefi_debug_levela13;uefi_debug_log_undinv_rom_uefi_debug_levelg%!uefi_logs_ennv_rom_cap[!undi_ennv_rom_iniL)//undi_network_waitnv_rom_boot_conf21urinv_rom_debug_levelN)!uri_boot_retrynv_rom_iniX$5!uri_boot_retry_delaynv_rom_iniW!7valuenv_rom_dhcp_vendor_id-0Uvaluenv_rom_iscsi_connect_to_first_target81Wvaluenv_rom_iscsi_connect_to_second_target?*Ivaluenv_rom_iscsi_first_target_addr9-Ovaluenv_rom_iscsi_first_target_chap_id=.Qvaluenv_rom_iscsi_first_target_chap_pwd>)Gvaluenv_rom_iscsi_first_target_lun;*Ivaluenv_rom_iscsi_first_target_name<*Ivaluenv_rom_iscsi_first_target_port: ‚^Ø_é ‚‚@K+valuenv_rom_iscsi_second_target_addr0x0.240x10.0STRINGIPv4 address of the second iSCSI target in dotted decimal \;notation (Flexboot)E‚?Wwvaluenv_rom_iscsi_connect_to_second_target0x0.240x8.0STRINGWhen the string is "Enabled" Flexboot attempt to connect to \;the first ISCSI target. Other legal value is "Disabled"s‚>QYvaluenv_rom_iscsi_first_target_chap_pwd0x0.240x10.0STRINGiSCSI first target password (Flexboot)v‚=O_valuenv_rom_iscsi_first_target_chap_id0x0.240x80.0STRINGiSCSI first target username/id (Flexboot)€‚<I}valuenv_rom_iscsi_first_target_name0x0.240xe0.0STRINGFirst iSCSI target name (Flexboot) up to 223 characters.à‚;G7valuenv_rom_iscsi_first_target_lun0x0.240x14.0STRINGISCSI first target boot LUN (Flexboot)\;Decimal integer 1- 18,446,744,073,709,551,615 45Z~¢ÃðzQÇ¢ëG4]u†œ²ÉÜï;nv_rom_uefi_debug_levelW(Snv_rom_iscsi_second_target_chap_pwdU'Qnv_rom_iscsi_second_target_chap_idT$Knv_rom_iscsi_second_target_nameS#Inv_rom_iscsi_second_target_lunR$Knv_rom_iscsi_second_target_portQ$Knv_rom_iscsi_second_target_addrP$Knv_rom_iscsi_initiator_chap_pwdF#Inv_rom_iscsi_initiator_gatewayA#Inv_rom_iscsi_initiator_ip_addr? Cnv_rom_iscsi_initiator_nameD,[nv_rom_iscsi_initiator_primary_dns_addrB._nv_rom_iscsi_initiator_secondary_dns_addrC'Qnv_rom_iscsi_initiator_subnet_mask@-nv_rom_ocsd_ocbb1nv_sw_offload_conf#nv_tpt_conf -nv_virt_net_addr5- nv_vpi_link_type-nv_vpi_link_type'nv_vts_bank_a'nv_vts_bank_b#nv_wol_conf4 )H¤¡)u‚ES[valuenv_rom_iscsi_second_target_chap_pwd0x0.240x10.0STRINGiSCSI second target password (Flexboot)x‚DQavaluenv_rom_iscsi_second_target_chap_id0x0.240x80.0STRINGiSCSI second target username/id (Flexboot)€‚CKvaluenv_rom_iscsi_second_target_name0x0.240xe0.0STRINGSecond iSCSI target name (Flexboot) up to 223 characters.à ‚BI9valuenv_rom_iscsi_second_target_lun0x0.240x14.0STRINGISCSI second target boot LUN (Flexboot)\;Decimal integer 1- 18,446,744,073,709,551,6154‚AKavaluenv_rom_iscsi_second_target_port0x0.240x8.0STRINGTCP port for the second iSCSI target (Flexboot)\;Decimal integer in ASCII format up to 5 digits (1-65536). ®«Pôºv>á¥q5üÔ®$` !  nv_pci_capNIC0PCI CAP&_ # nv_pci_conf€NIC0PCI CONF7^ 1 1file_mac_addr_list NIC0FILE MAC ADDR LIST:] +% +file_public_key NIC-internal0 FILE PUBLIC KEY2\ - -file_cs_token_idNIC0FILE CS TOKEN ID:[ 5 5file_dbg_fw_token_idNIC0FILE DBG FW TOKEN ID/Z ) )file_signatureNIC0@FILE SIGNATURE*Y % %file_commentNIC0FILE COMMENT6X 1 1file_applicable_toNIC0 FILE APPLICABLE TOBW ; 5nv_rom_uefi_debug_levelEXP_ROM0ROM UEFI DEBUG LEVEL8V 1 +nv_rom_debug_levelEXP_ROM0 ROM DEBUG LEVELZU S Mnv_rom_iscsi_second_target_chap_pwdWEXP_ROM0ROM ISCSI SECOND TARGET CHAP PWDYT Q Knv_rom_iscsi_second_target_chap_idUEXP_ROM0€ROM ISCSI SECOND TARGET CHAP IDSS K Env_rom_iscsi_second_target_nameTEXP_ROM0àROM ISCSI SECOND TARGET NAME „Õ²„‚*‚H1Sa9 romprefixnv_rom_debug_level0x4.20x0.2ENUMDebug level for Flexboot"s driver bootstrap code\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_ROMPREFIX($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚G1Ua- stpnv_rom_debug_level0x4.00x0.2ENUMDebug level for Flexboot"s Spanning Tree Protocol\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_STP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚'‚F%1ƒ%M debug_log_ennv_rom_debug_level0x0.00x0.1BOOLWhen this bit is set, Flexboot will generate debug log at the \;levels specified by the following parameters. Logs are \;dumped to the display and to the serial console (if config\;ured).BOOT_DBG_LOG$nv_rom_cap.flexboot_debug_en==1 §íÕ§‚*‚K1ka- arpnv_rom_debug_level0x4.80x0.2ENUMDebug level for Flexboot"s Address resolution Protocol (ARP)\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_ARP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚J15a1 dhcpv6nv_rom_debug_level0x4.60x0.2ENUMDebug level for Flexboot"s DHCPv6\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DHCP6($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚I11a/ dhcpnv_rom_debug_level0x4.40x0.2ENUMDebug level for Flexboot"s DHCP\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DHCP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) €Ìž€‚‚N1Ia- urinv_rom_debug_level0x4.140x0.2ENUMDebug level for Flexboot"s URI parsing code\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_URI($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚*‚M1ia- ndpnv_rom_debug_level0x4.120x0.2ENUMDebug level for Flexboot"s IPv6 Neighbor Discovery Protocol\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚0‚L1‚ aneighbornv_rom_debug_level0x4.100x0.2ENUMDebug level for Flexboot"s Neighbor table (which is filled \;by ARP and NDP)\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) UȆU‚-‚Q!1Wa7 nodnic_cmdnv_rom_debug_level0x4.200x0.2ENUMDebug level for Flexboot"s NODNIC Driver interface\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV_CMD($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚>‚P1‚ a/ nodnicnv_rom_debug_level0x4.180x0.2ENUMDebug level for Flexboot"s NODNIC driver (init, teardown, \;poll CQ etc)\; \;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚4‚O1wa- drivernv_rom_debug_level0x4.160x0.2ENUMDebug level for Flexboot"s driver (init, teardown, poll CQ etc)\; \;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DRV($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) $ÌÍáø-BWl™±ÆÛñ5Ìœ¶BP_8vý¨Á„káÚî+UEFI_DEBUG_LOGSm9UEFI_DEBUG_LOG_VERBOSEl CUEFI_DEBUG_LOG_MIN_SEVERITYk5UEFI_DEBUG_LOG_CACHEj1UEFI_DEBUG_LOG_GCDi7UEFI_DEBUG_LOG_EVENTSh3UEFI_DEBUG_LOG_UNDIg1UEFI_DEBUG_LOG_SNIf5UEFI_DEBUG_LOG_BLKIOe/UEFI_DEBUG_LOG_BMd)RPG_AI_RATE_P2»/RPG_BYTE_RESET_P1¤/RPG_BYTE_RESET_P2¸RPG_GD_P1©RPG_GD_P2½+RPG_HAI_RATE_P1¨+RPG_HAI_RATE_P2¼+RPG_MAX_RATE_P1¦+RPG_MAX_RATE_P2º1RPG_MIN_DEC_FAC_P1ª1RPG_MIN_DEC_FAC_P2¾+RPG_MIN_RATE_P1«+RPG_MIN_RATE_P2¿-RPG_THRESHOLD_P1¥-RPG_THRESHOLD_P2¹/RPG_TIME_RESET_P1£/RPG_TIME_RESET_P2· SRIOV_EN;UEFI_DEBUG_LOG_DISPATCHc/UEFI_DEBUG_LOG_FS`3UEFI_DEBUG_LOG_INIT^3UEFI_DEBUG_LOG_LOAD_3UEFI_DEBUG_LOG_PAGEb3UEFI_DEBUG_LOG_POOLa+VF_LOG_BAR_SIZE%WOL_MAGIC_EN Q°vQ‚!‚T1?a9 netdevicenv_rom_debug_level0x4.260x0.2ENUMNetwork Device Link status and traffic\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NETDEVICE($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚6‚S#1ea9 nodnic_portnv_rom_debug_level0x4.240x0.2ENUMDebug level for Flexboot"s NODNIC Driver port management.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV_PORT($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚L‚R'1‚a7 nodnic_devicenv_rom_debug_level0x4.220x0.2ENUMDebug level for Flexboot"s NODNIC Driver tear-down and \;bring ups operations.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV_DEV($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)  =Zx–²Îî >n¡× :kÏ'ts_minutenv_vts_bank_b™'ts_monthnv_vts_bank_a'ts_monthnv_vts_bank_b–'ts_secondnv_vts_bank_a'ts_secondnv_vts_bank_b˜'ts_yearnv_vts_bank_aŽ'ts_yearnv_vts_bank_b—+!ucm_single_portnv_rom_iniN1udpnv_rom_debug_levelV25;uefi_debug_log_blkionv_rom_uefi_debug_levele//;uefi_debug_log_bmnv_rom_uefi_debug_leveld25;uefi_debug_log_cachenv_rom_uefi_debug_levelj5;;uefi_debug_log_dispatchnv_rom_uefi_debug_levelc25;uefi_debug_log_eventnv_rom_uefi_debug_levelh//;uefi_debug_log_fsnv_rom_uefi_debug_level`01;uefi_debug_log_gcdnv_rom_uefi_debug_leveli13;uefi_debug_log_initnv_rom_uefi_debug_level^13;uefi_debug_log_loadnv_rom_uefi_debug_level_01;uefi_debug_log_netnv_rom_uefi_debug_levelf ¶åͶ‚‚W1=a- tcpnv_rom_debug_level0x8.00x0.2ENUMDebug level for Flexboot"s TCP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_TCP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚V1=a- udpnv_rom_debug_level0x4.300x0.2ENUMDebug level for Flexboot"s UDP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_UDP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚U1?a/ tftpnv_rom_debug_level0x4.280x0.2ENUMDebug level for Flexboot"s TFTP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_TFTP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) °âÊ°‚‚Z1?a/ ipv6nv_rom_debug_level0x8.60x0.2ENUMDebug level for Flexboot"s IPv6 stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_IPV6($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚Y1?a+ ipv4nv_rom_debug_level0x8.40x0.2ENUMDebug level for Flexboot"s IPv4 stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_IP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚X1Ca1 tcpipnv_rom_debug_level0x8.20x0.2ENUMDebug level for Flexboot"s TCP/IP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_TCPIP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) rÀ˜r‚"‚]1Ea7 pxe_undinv_rom_debug_level0x8.120x0.2ENUMDebug level for Flexboot"s UNDI interface\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_PXE_UNDI($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚$‚\'1Ca3 status_updatenv_rom_debug_level0x8.100x0.2ENUMDebug level for status update interface.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_STATUS($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚<‚[+1_aE driver_settingsnv_rom_debug_level0x8.80x0.2ENUMDebug level for non volatile configuration management.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DRIVER_SETTINGS($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) ›,Ww›X‚a3;s3 uefi_debug_log_poolnv_rom_uefi_debug_level0x0.30x0.1BOOLEnable UEFI debug level logs for pool Alloc & Free.UEFI_DEBUG_LOG_POOL($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)\‚`/;/ uefi_debug_log_fsnv_rom_uefi_debug_level0x0.20x0.1BOOLEnable UEFI debug level logs for EFI file system accesses.UEFI_DEBUG_LOG_FS($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)Q‚_3;e3 uefi_debug_log_loadnv_rom_uefi_debug_level0x0.10x0.1BOOLEnable UEFI debug level logs for load eventsUEFI_DEBUG_LOG_LOAD($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)P‚^3;c3 uefi_debug_log_initnv_rom_uefi_debug_level0x0.00x0.1BOOLEnable UEFI debug level initialization log.UEFI_DEBUG_LOG_INIT($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) 0Wƒ0¯Ü4W}¢Êä&-+vendor_nvconf_enfile_public_keyz+Kvaluenv_rom_iscsi_second_target_nameC+Kvaluenv_rom_iscsi_second_target_portA,7/vf_bar_size_supportednv_global_pci_cap")/1vf_bar_size_validnv_global_pci_conf-9/vf_qos_control_supportnv_global_pci_cap,"#-virtual_macnv_virt_net_addr%)-virtual_mac_ennv_virt_net_addr$?vlannv_rom_iscsi_general_conf)'?vlan_ennv_rom_iscsi_general_conf$+yearnv_file_id_mlnxk/yearnv_file_id_vendors ‹$7d‹U‚e5;i5 uefi_debug_log_blkionv_rom_uefi_debug_level0x0.70x0.1BOOLEnable UEFI debug level logs for BlkIo Driver.UEFI_DEBUG_LOG_BLKIO($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)O‚d/;i/ uefi_debug_log_bmnv_rom_uefi_debug_level0x0.60x0.1BOOLEnable UEFI debug level logs for Boot Manager.UEFI_DEBUG_LOG_BM($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)i‚c;;; uefi_debug_log_dispatchnv_rom_uefi_debug_level0x0.50x0.1BOOLEnable UEFI debug level logs for PEI/DXE/SMM Dis\;patchers.UEFI_DEBUG_LOG_DISPATCH($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)X‚b3;s3 uefi_debug_log_pagenv_rom_uefi_debug_level0x0.40x0.1BOOLEnable UEFI debug level logs for page Alloc & Free.UEFI_DEBUG_LOG_PAGE($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) ž1_Œžj‚i1;1 uefi_debug_log_gcdnv_rom_uefi_debug_level0x0.110x0.1BOOLEnable UEFI debug level logs for Global Coherency Data\;base changes.UEFI_DEBUG_LOG_GCD($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)O‚h5;Y7 uefi_debug_log_eventnv_rom_uefi_debug_level0x0.100x0.1BOOLEnable UEFI debug level logs of Event.UEFI_DEBUG_LOG_EVENTS($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)N‚g3;_3 uefi_debug_log_undinv_rom_uefi_debug_level0x0.90x0.1BOOLEnable UEFI debug level logs UNDI Driver.UEFI_DEBUG_LOG_UNDI($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)K‚f1;]1 uefi_debug_log_netnv_rom_uefi_debug_level0x0.80x0.1BOOLEnable UEFI debug level logs SNI Driver.UEFI_DEBUG_LOG_SNI($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) 22^‰´ÜFu¡Ð+Kvaluenv_rom_iscsi_initiator_chap_pwd5*Ivaluenv_rom_iscsi_initiator_gateway0*Ivaluenv_rom_iscsi_initiator_ip_addr.'Cvaluenv_rom_iscsi_initiator_name33[valuenv_rom_iscsi_initiator_primary_dns_addr15_valuenv_rom_iscsi_initiator_secondary_dns_addr2.Qvaluenv_rom_iscsi_initiator_subnet_mask/+Kvaluenv_rom_iscsi_second_target_addr@.Qvaluenv_rom_iscsi_second_target_chap_idD/Svaluenv_rom_iscsi_second_target_chap_pwdE ™°™‚‚l/;c9 uefi_logs_verbosenv_rom_uefi_debug_level0x0.270x0.1BOOLHigh verbosity UEFI expansion ROM debug log. Please \;note that high verbosity may impact boot performance.UEFI_DEBUG_LOG_VERBOSE($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)‚]‚k/;‚]C uefi_log_severitynv_rom_uefi_debug_level0x0.240x0.2ENUMSet the minimal severity of logs that will be generated by \;NIC/HBA UEFI expansion ROM\;0x0: ERROR\;0x1: WARNING\;0x2: INFO\;0x3: DEBUGERROR=0x0,WARNING=0x1,INFO=0x2,DEBUG=0x3UEFI_DEBUG_LOG_MIN_SEVERITY($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)k‚j5;5 uefi_debug_log_cachenv_rom_uefi_debug_level0x0.120x0.1BOOLEnable UEFI debug level logs for Memory range cachebility changes.UEFI_DEBUG_LOG_CACHE($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) :“Ùì:.‚p% textfile_comment0x0.240x0.8STRINGThe PSID of the NIC that this file is applicable for. This ASCII string must be zero terminated if shorter than 16 chars.i‚o#1‚Upsid_branchfile_applicable_to0x10.240x10.0STRINGThe PSID-BRANCH that this file is applicable to. This ASCII string must be zero terminated if shorter than 16 chars. If PSID-Branch not defined the string is empty.6‚n1psidfile_applicable_to0x0.240x10.0STRINGThe PSID of the NIC that this file is applicable for. This ASCII string must be zero terminated if shorter than 16 chars.‚i‚m;ƒ=Q+G uefi_logsnv_rom_uefi_debug_level0x0.280x0.4ENUMSelect the output channel \;device logs generated by the NIC/\;HBA UEFI expansion ROM.\; Note: \;When DISABLED, all \;the parameters in this TLV should be hidden by mlxconfig.\;0x0: DISABLED\;0x1: STDOUT\;0x2: STDERRDISABLED=0x0,STDOUT=0x1,STDERR=0x2UEFI_DEBUG_LOGS($nv_rom_cap.uefi_logs_en==1) 3™Ý‡"©H3‚‚w+‚)auth_typefile_public_key0x0.00x0.8ENUMThe authentication mechanism used with this key\;0x0: INVALID_ENTRY\;0x1: SHA256\;_\;DIGEST\;0x3: _2048BIT_RSASSA_PKCS1_v1_5_WITH_SHA256INVALID_ENTRY=0x0,SHA256_DIGEST=0x1,_2048BIT_RSASSA_PKCS1_v1_5_WITH_SHA256=0x3^‚v+-Erunning_versionfile_cs_token_id0x0.00x4.0BINARYThe current running version.v‚u'5qdebug_versionfile_dbg_fw_token_id0x4.00x4.0BINARYThe debug firmware version approved by this token.b‚t+5Erunning_versionfile_dbg_fw_token_id0x0.00x4.0BINARYThe current running version.S‚s)5signaturefile_signature0x20.240x100.0BYTESThe signature itself8‚r%){keypair_uuidfile_signature0x10.240x10.0BYTESThe UUID of the keypair used for signing this file. An all zero UUID means that the signature is a SHA256 of the image.d‚q))Ssignature_uuidfile_signature0x0.240x10.0BYTEStime based UUID for this signature. yïeæe¾‚~%+Gkeypair_uuidfile_public_key0x10.240x10.0BYTESUUID of this key.The UUID is created by the sign server when it generates a new RSA key-pair.#‚})+Mpublic_key_expfile_public_key0xC.00x4.0UNSIGNEDThe public key exponent.In most cases, the standard exponent (65537) will be used (per RFC4871).~‚|+fw_enfile_public_key0x0.310x0.1BOOLThis key can be used for authenticating firmware, DBG_FW and DBG tokens|‚{#+ cs_token_enfile_public_key0x0.300x0.1BOOLThis key can be used for authenticating CS tokens at OEM level.‚z-+vendor_nvconf_enfile_public_key0x0.290x0.1BOOLThis key can be used for authenticating NVCONFIG files at OEM level.‚y)+mlnx_nvconf_enfile_public_key0x0.280x0.1BOOLThis key can be used for authenticating NVCONFIG files at MLLNX level.‚x+#frc_enfile_public_key0x0.270x0.1BOOLThis key can be used for authenticating Factory Re Configuration responses. ""It Îý:\‰¼ç6Z¥Ò&++keep_ib_link_upnv_keep_link_upÿ*5+ keep_link_up_on_bootnv_keep_link_upû+5+keep_link_up_on_bootnv_keep_link_up-;+ keep_link_up_on_standbynv_keep_link_upü.;+keep_link_up_on_standbynv_keep_link_up+keyfile_public_key"%+keypair_uuidfile_public_key~!%)keypair_uuidfile_signaturer,5/legacy_boot_protocolnv_rom_boot_conf121?link_up_delay_timenv_rom_iscsi_general_conf+*5+ lldp_msg_tx_intervalnv_lldp_nb_confÛ+5+lldp_msg_tx_intervalnv_lldp_nb_confá"%+ lldp_nb_dcbxnv_lldp_nb_confÜ#%+lldp_nb_dcbxnv_lldp_nb_confâ$+) lldp_nb_dcbx_ennv_lldp_nb_capç%+)lldp_nb_dcbx_ennv_lldp_nb_capí,9+ lldp_nb_rx_buffer_sizenv_lldp_nb_confß-9+lldp_nb_rx_buffer_sizenv_lldp_nb_confå #ŸXÇ# ƒ7#C7i advanced_pci_settingsnv_pci_conf0x0.310x0.1BOOLShow advanced PCI settings.ADVANCED_PCI_SETTINGS$nv_pci_cap.advanced_pci_settings_supported!=0‚9ƒ##y#‚ ibm_capi_ennv_pci_conf0x0.300x0.1BOOLEnable IBM's Coherent Accelerator Processor Interface (CAPI) \;mode. Supported only when ADVANCED_PCI_SETTINGS is set.IBM_CAPI_EN($nv_pci_cap.ibm_capi_supported!=0)&&($nv_pci_conf.advanced_pci_settings!=0)&&($nv_pci_cap.advanced_pci_settings_supported!=0)‚Pƒ1#o9‚ force_eth_subclassnv_pci_conf0x0.290x0.1BOOLForce the PCI function identify with Ethernet subclass (00h). \;Supported only when ADVANCED_PCI_SETTINGS is set.FORCE_ETH_PCI_SUBCLASS($nv_pci_cap.force_eth_subclass_supported!=0)&&($nv_pci_conf.advanced_pci_settings!=0)&&($nv_pci_cap.advanced_pci_settings_supported!=0)Dƒ#1 mac_addressfile_mac_addr_list0x0.240x100.0BYTES^‚+Ukeyfile_public_key0x20.240x100.0BYTESA 2048 bit public-key (0x100 bytes) x| xƒK!advanced_pci_settings_supportednv_pci_cap0x0.310x0.1BOOLWhen set, the PCI_FONF.advanced_pci_settings bit is configu\;rable.nƒ1!mibm_capi_supportednv_pci_cap0x0.300x0.1BOOLWhen set, the PCI_CONF.ibm_capi_en is supported.ƒE!}force_eth_subclass_supportednv_pci_cap0x0.290x0.1BOOLWhen set, the PCI_CONF.force_eth_sub_class is supported.mstflint-4.8.0/mlxconfig/mlxconfig_dbs/Makefile.am0000755000175000017500000000274413201023206021160 0ustar mehdimehdi#-- # Copyright (c) 2004-2010 Mellanox Technologies LTD. All rights reserved. # # This software is available to you under a choice of one of two # licenses. You may choose to be licensed under the terms of the GNU # General Public License (GPL) Version 2, available from the file # COPYING in the main directory of this source tree, or the # OpenIB.org BSD license below: # # Redistribution and use in source and binary forms, with or # without modification, are permitted provided that the following # conditions are met: # # - Redistributions of source code must retain the above # copyright notice, this list of conditions and the following # disclaimer. # # - Redistributions in binary form must reproduce the above # copyright notice, this list of conditions and the following # disclaimer in the documentation and/or other materials # provided with the distribution. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS # BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN # ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. #-- docdir = $(pkgdatadir)/mlxconfig_dbs dist_doc_DATA = mlxconfig_host.db mlxconfig_switch.db mstflint-4.8.0/mlxconfig/mlxconfig_dbs/mlxconfig_host.db0000644000175000017500000043400013201023206022445 0ustar mehdimehdiSQLite format 3@ Ž-â)ûûâ‰ûöñìçâvapTgIJ<-',¸tà¸W#Inv_rom_iscsi_initiator_gatewayHV9nv_pci_switch_evb_conf rr‡ ytabletlvstlvsCREATE TABLE tlvs( name TEXT NOT NULL CHECK(length(name) <= 45), id INT CHECK((id >= 0) and ((class = 0 and id <= 16777215) or (class = 1 and id <= 65535) or (class = 3 and id <= 1023) or (class = 6 and id <= 16777215) or (class = 7 and id <= 262144))), target TEXT CHECK(target IN ("NIC", "NIC-internal", "EXP_ROM")), cap INT CHECK(cap IN (0, 1)), version TEXT, description TEXT, size INT NOT NULL CHECK(size > 0), class INT NOT NULL CHECK(class IN (0, 1, 3, 6, 7)), mlxconfig_name TEXT CHECK(length(mlxconfig_name) <= 40), port INT CHECK(port <= 2), PRIMARY KEY (name, port))`ÜûöñìçâÝØÓÎÉÄ¿ºµ°«¦¡œ—’ˆƒ~ytnhb\VPJD>82,& üöðêäÞØÒÌÆÀº´®¨¢œ–Š„~xrlf`ZTNHB<60*$ úôîèâÜŒƒ‹ƒˆƒ‡ƒ†ƒ…ƒ„‚}ƒ‚y‚u‚r~‚o}‚l|‚i{‚fz‚cy‚`w‚]u‚Xs‚Rq‚Mo‚In‚Dm‚>l‚:k‚6i‚2h‚.f‚,e‚+c‚&b‚ a‚`‚_‚^‚]‚\‚[‚ Z‚ X‚U‚S{RwPsNoMlLiKfIcH^FZEUDQCLBIAE@A>=<8;5:18-7)6$5410/~.x*r)n&k%h$b"[!TJ@>6/+&#"!   ©yxµê”¿y©d/RPG_BYTE_RESET_P2Á=#DCBX_CEE_P1ýÛ '£O1LLDP_NB_RX_MODE_P2ì(%BOOT_DBG_LOG^èÀr_B‘Lü'¹$ò¯[y¹Àá€Ðë8G##1sriov_validnv_global_pci_conf)T(-1ip_over_vxlan_ennv_sw_offload_confk‹+daynv_file_id_mlnxu"!/chassis_idnv_enclosure_infoŠëëëŽ#%/file_versionnv_file_id_vendor|€-9+lldp_nb_tx_buffer_sizenv_lldp_nb_confïU+*7) min_time_between_cnpsnv_roce_cc_ecnº–#(9%max_log_memic_bar_sizenv_memic_capÊÊ¡Y!port_enumnv_rom_iniL2#)) rpg_byte_resetnv_roce_cc_qcnÓy?#num_of_vlnv_qos_conf‚+Kvaluenv_rom_iscsi_initiator_chap_pwdMy1dhcpv6nv_rom_debug_levelbj /lacp_disnv_rom_boot_conf17 -hii_ennv_rom_uefi_conf0ààààQ13;uefi_debug_log_poolnv_rom_uefi_debug_levely9#')rpg_thresholdnv_roce_cc_qcnÝŠ'ts_daynv_vts_bank_a• ¢\y\¦ÓŠ“tableparamsparamsCREATE TABLE params( name TEXT NOT NULL CHECK(length(name) <= 45), tlv_name TEXT NOT NULL, offset TEXT NOT NULL, size TEXT NOU NULL, type TEXT CHECK((type IN ("BOOL") and size IN ';indexsqlite_autoindex_tlvs_1tlvs+?indexsqlite_autoindex_params_1params+?indexsqlite_autoindex_params_2params ("0x0.1")) or type IN ("UNSIGNED", "INTEGER", "ENUM", "BINARY", "BYTES", "STRING")), description TEXT, textual_values TEXT CHECK( (type NOT IN ("ENUM") and ((textual_values IS NULL) or (textual_values IN ("")))) or ((textual_values NOT NULL) and (textual_values NOT IN (""))) ), mlxconfig_name TEXT UNIQUE CHECK(length(mlxconfig_name) <= 32), dependency TEXT, valid_bit TEXT, temp_vars TEXT, min_val TEXT, max_val TEXT, rule TEXT, regex TEXT, port INT CHECK(port <= 2), supported_from_version INT DEFAULT 0, array_length INT DEFAULT 0, PRIMARY KEY (name, tlv_name, port)) 0ÇüaÊ0/7'creation_time_daynv_forbidden_versions0x0.00x0.8BINARYThe creation day of this FORBIDDEN_VERSION \;structure in 2 BCD digits. (GMT)95num_of_allocated_guidsnv_base_mac_guid_cap0x4.160x0.16UNSIGNEDThe total number of GUIDs that can be derived form this base GUID.75num_of_allocated_macsnv_base_mac_guid_cap0x4.00x0.16UNSIGNEDThe total number of MAC addresses that can be derived from the base MAC.H-‚!base_guidnv_base_mac_guid0x8.240x8.0BYTESThe base Infiniband GUID. The Infiniband addresses for the PCI physical functions of all the network ports are derived from the base GUID.‚6-ƒbase_macnv_base_mac_guid0x0.240x8.0BYTESThe base MAC of the device. The MAC addresses for the PCI physical functions of all the network ports are derived from the base MAC.Offset 00h, bits 15..0 hold bits 47..32 of the MAC address.Offset 04h, bits 31..0 hold bits 31..0 of the MAC address. òhÐ6›ò& 17Acreation_time_hournv_forbidden_versions0x4.240x0.8BINARYThe creation hour of this FORBIDDEN_VERSION \;structure in 2 BCD digits. (GMT, 24h format) 57!creation_time_minutenv_forbidden_versions0x4.160x0.8BINARYThe creation minute of this FORBIDDEN_VERSION \;structure in 2 BCD digits.57!creation_time_secondnv_forbidden_versions0x4.80x0.8BINARYThe creation second of this FORBIDDEN_VERSION \;structure in 2 BCD digits.17creation_time_yearnv_forbidden_versions0x0.160x0.16BINARYThe creation year of this FORBIDDEN_VERSION \;structure in 4 BCD digits.37creation_time_monthnv_forbidden_versions0x0.80x0.8BINARYThe creation month of this FORBIDDEN_VERSION \;structure in 2 BCD digits. ¸ý¿¸‚ 1'])W U log_memic_bar_sizenv_memic_conf0x0.00x0.8UNSIGNEDThe amount of BAR size assigned for MEMIC. The size in bytes \;is memic_size_limit*2^log_memic_bar_size.MEMIC_BAR_SIZE$nv_memic_cap.max_memic_size_limit!=0$nv_memic_cap.max_log_memic_bar_size‚; 57ƒcforbidden_fw_versionnv_forbidden_versions0x10.00x80.0BINARYA list of FW versions to which the device must refuse \;update. The FW version format is identical to the one \;shown in \;min_allowed_fw_version\; description.\;The list has up to 32 entries and is terminated by an \;entry set to 0x0. ‚ 97‚omin_allowed_fw_versionnv_forbidden_versions0x8.00x4.0BINARYThe minimal (earliest) firmware version priori to which \;the device must refuse update.\;Bits 31..24 - Major version\;bits 23..16: Minor version\;Bits 15..0 - Sub-minor version ¥*MŽw)host2bmcnv_host_to_bmc0x0.00x0.1UNSIGNEDWhen set, the host can communicate directly with the \;BMC.<A-A1 roce_over_ip_next_protocolnv_roce_1_5_conf0x0.00x0.8UNSIGNEDThe next protocol value set in the IPv4/IPv6 packets for \;RoCE v1.5. The default is 0xFE.ROCE_NEXT_PROTOCOLZ5%aimax_memic_size_limitnv_memic_cap0x0.80x0.4ENUMThe maximum value allowed for \;memic_size_limit\;.\;0x0: DISABLED\;0x1: _256KB\;0x2: _512KB\;0x3: _1024KBDISABLED=0x0,_256KB=0x1,_512KB=0x2,_1024KB=0x3y9%qmax_log_memic_bar_sizenv_memic_cap0x0.00x0.8UNSIGNEDThe maximal value allowed for \;log_memic_bar_size‚X-'‚5i-W Q memic_size_limitnv_memic_conf0x0.80x0.4ENUMThe maximum amount of internal device memory that can be \;consumed by the MEMIC application.\;0x0: DISABLED\;0x1: _256KB\;0x2: _512KB\;0x3: _1024KBDISABLED=0x0,_256KB=0x1,_512KB=0x2,_1024KB=0x3MEMIC_SIZE_LIMIT$nv_memic_cap.max_memic_size_limit!=0$nv_memic_cap.max_memic_size_limit Fi¦öF-/1[vf_bar_size_validnv_global_pci_conf0x0.250x0.1BOOLWhen set, the vf_bar_size field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[pf_bar_size_validnv_global_pci_conf0x0.240x0.1BOOLWhen set, the pf_bar_size field is valid. \;When cleared, the device uses the "factory_settings" value.@G1inon_prefetchable_pf_bar_validnv_global_pci_conf0x0.230x0.1BOOLWhen True, non_prefetchable_bar field and \;allow_large_non_prefetchable_pf_bar overrides the default \;value.ƒ;1ƒG;{G non_prefetchable_pf_barnv_global_pci_conf0x0.170x0.1BOOLWhen set, the PF BAR prefetchable bit is cleared.\;Note: PCI switches and operation systems have dedicated quotas \;for non-prefetchable memory hence, you may need to decrease \;log_pf_uar_bar_size to enable this feature.NON_PREFETCHABLE_PF_BAR$nv_global_pci_cap.non_prefetchable_pf_bar_supported==1non_prefetchable_pf_bar_valid   Èù'Ur’²Ðó -Qm‘ºä5Z|ŸÌ'7#advanced_pci_settingsnv_pci_conf›0K!advanced_pci_settings_supportednv_pci_capž-A'advanced_power_settings_ennv_power_conf@-/7allow_rd_countersnv_external_port_ctrl+1arpnv_rom_debug_levelc+auth_typefile_public_key-base_guidnv_base_mac_guid- base_macnv_base_mac_guid"!/bay_numbernv_enclosure_info!bofm_ennv_rom_iniO!/!boot_debug_log_ennv_rom_capf##/boot_ip_vernv_rom_boot_conf2-#!boot_ip_vernv_rom_capg#3boot_pkeynv_rom_ib_boot_conf9(-/boot_retry_countnv_rom_boot_conf16)'7boot_to_shellnv_rom_flexboot_debug2.)?boot_to_targetnv_rom_iscsi_general_conf;!/boot_vlannv_rom_boot_conf14$%/boot_vlan_ennv_rom_boot_conf18!#+ cee_dcbx_ennv_lldp_nb_dcbxý"#+cee_dcbx_ennv_lldp_nb_dcbx,%?chap_auth_ennv_rom_iscsi_general_conf?33?chap_mutual_auth_ennv_rom_iscsi_general_conf> ÆÆêBv¢Åé&Im•Âð O­Ï#)) clamp_tgt_ratenv_roce_cc_ecn«$))clamp_tgt_ratenv_roce_cc_ecn¿2G) clamp_tgt_rate_after_time_incnv_roce_cc_ecnª3G)clamp_tgt_rate_after_time_incnv_roce_cc_ecn¾+/3client_identifiernv_rom_ib_dhcp_conf:"') cnp_802p_prionv_roce_cc_ecn»#')cnp_802p_prionv_roce_cc_ecnÏ) cnp_dscpnv_roce_cc_ecn½)cnp_dscpnv_roce_cc_ecnÑ"') cnp_prio_modenv_roce_cc_ecn¼#')cnp_prio_modenv_roce_cc_ecnÐ'+1cqe_compressionnv_sw_offload_confi,/7creation_time_daynv_forbidden_versions-17creation_time_hournv_forbidden_versions /57creation_time_minutenv_forbidden_versions .37creation_time_monthnv_forbidden_versions/57creation_time_secondnv_forbidden_versions-17creation_time_yearnv_forbidden_versions!#+cs_token_enfile_public_key“01;current_cfg_methodnv_current_configuratorŽ ¨P øX¨-/1[full_vf_qos_validnv_global_pci_conf0x0.300x0.1BOOLWhen set, the full_vf_qos field is valid. \;When cleared, the device uses the "factory_settings" value.1Kfpp_validnv_global_pci_conf0x0.290x0.1BOOLWhen set, the fpp field is valid. \;When cleared, the device uses the "factory_settings" value.%'1Snum_pfs_validnv_global_pci_conf0x0.280x0.1BOOLWhen set, the num_pfs field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[num_vf_msix_validnv_global_pci_conf0x0.270x0.1BOOLWhen set, the num_vf_msix field is valid. \;When cleared, the device uses the "factory_settings" value.-/1[num_pf_msix_validnv_global_pci_conf0x0.260x0.1BOOLWhen set, the num_pf_msix field is valid. \;When cleared, the device uses the "factory_settings" value. \\!#1Osriov_validnv_global_pci_conf0x0.310x0.1BOOLWhen set, the sriov field is valid. \;When cleared, the device uses the "factory_settings" value. ee‡1/!S#„Q 1…9 total_vfsnv_global_pci_conf0x4.00x0.16UNSIGNEDThe total number of Virtual Functions (VFs) that can be sup\;ported, for each PF.NUM_OF_VFS$nv_global_pci_cap.sriov_support==1sriov_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))$nv_global_pci_cap.max_vfs_per_pf_valid==1 ? $nv_global_pci_cap.max_vfs_per_pf : 0(($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix)) && (($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar)) èÃ…è #1Afull_vf_qosnv_global_pci_conf0x4.300x0.1BOOLWhen set, Virtual Function has the same number of traffic classes \;as physical functions.‚;1ƒ9Ofpp_ennv_global_pci_conf0x4.290x0.1BOOLWhen this bit is cleared, the device exposes a single PCI function \;for both ports. When set, the device exposes one or more PCI \;functions for each port (this is the only mode supported by Con\;nectX-4 devices).$nv_global_pci_cap.fpp_support==1fpp_valid‚:1‚[['Inum_pfsnv_global_pci_conf0x4.160x0.8UNSIGNEDTotal number of PCIe functions (PFs) exposed by the device. The \;number of PFs must be a multiple of the number of ports, \;num_port_cap\;. Value 0 indicates 256 PFs.$nv_global_pci_cap.num_pfs_supported==1num_pfs_valid1$nv_global_pci_cap.max_num_pfs ãã†!1iS#„Q …9 sriov_ennv_global_pci_conf0x4.310x0.1BOOLEnable Single-Root I/O Virtualization (SR-IOV)SRIOV_EN$nv_global_pci_cap.sriov_support==1sriov_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))(($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix)) && (($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar)) SS…*"31c+c/„Q a‚E log_pf_uar_bar_sizenv_global_pci_conf0x8.00x0.6UNSIGNEDLog 2 of the size of a PF"s UAR BAR in MBs.PF_LOG_BAR_SIZE$nv_global_pci_cap.pf_bar_size_supported==1pf_bar_size_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))$nv_global_pci_cap.max_log_pf_uar_bar_size($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar) SS…*#31c+c/„Q a‚E log_vf_uar_bar_sizenv_global_pci_conf0x8.60x0.6UNSIGNEDLog 2 of the size of a VF"s UAR BAR in MBs.VF_LOG_BAR_SIZE$nv_global_pci_cap.vf_bar_size_supported==1vf_bar_size_valid$_calculatedTotalBar=($fpp_en==1?(log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar/$num_pfs - ($log_pf_uar_bar_size)^2) / $total_vfs))) : (log2($nv_global_pci_cap.max_total_bar==0?1:(($nv_global_pci_cap.max_total_bar - ($log_pf_uar_bar_size)^2) / $total_vfs))))$nv_global_pci_cap.max_log_vf_uar_bar_size($nv_global_pci_cap.max_total_bar_valid==0)||($nv_global_pci_cap.max_total_bar==0)||($sriov_en==0)||($_calculatedTotalBar<=$nv_global_pci_cap.max_total_bar) ]vì] &O/}non_prefetchable_pf_bar_supportednv_global_pci_cap0x0.230x0.1BOOLTrue when non_prefetchable_pf_bar field is configurable.ƒ%#1[#c/ Q‚q num_vf_msixnv_global_pci_conf0x8.220x0.10UNSIGNEDNumber of MSI-X vectors and EQs per VF.NUM_VF_MSIX$nv_global_pci_cap.num_vf_msix_supported==1num_vf_msix_valid$nv_global_pci_cap.max_num_vf_msix($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix)ƒ$#1[#c/ Q‚q num_pf_msixnv_global_pci_conf0x8.120x0.10UNSIGNEDNumber of MSI-X vectors and EQs per PF.NUM_PF_MSIX$nv_global_pci_cap.num_pf_msix_supported==1num_pf_msix_valid$nv_global_pci_cap.max_num_pf_msix($nv_global_pci_cap.max_total_msix_valid==0)||($nv_global_pci_cap.max_total_msix==0)||(($num_pfs * ($num_pf_msix + $total_vfs * $num_vf_msix))<=$nv_global_pci_cap.max_total_msix) µK–ñLµ+//+num_pfs_supportednv_global_pci_cap0x0.280x0.1BOOLWhen set, the \;num_pfs\; field is configurable and \;max_num_pfs\; is \;valid."*7/?num_vf_msix_supportednv_global_pci_cap0x0.270x0.1BOOLWhen set, the num_vf_msix field is configurable and the max\;_num_vf_msix field is valid.")7/?num_pf_msix_supportednv_global_pci_cap0x0.260x0.1BOOLWhen set, the num_pf_msix field is configurable and the max\;_num_pf_msix field is valid.2(7/_vf_bar_size_supportednv_global_pci_cap0x0.250x0.1BOOLWhen set, the log_vf_uar_bar_size field is configurable and the \;max_log_vf_uar_bar_size field is valid.2'7/_pf_bar_size_supportednv_global_pci_cap0x0.240x0.1BOOLWhen set, the log_pf_uar_bar_size field is configurable and the \;max_log_pf_uar_bar_size field is valid. môïm/)/)max_vfs_per_pfnv_global_pci_cap0x4.00x0.16UNSIGNEDThe maximum number of VFs that can be set in the total_vfs set\;ting (per PF).h.5/‚Mmax_vfs_per_pf_validnv_global_pci_cap0x0.310x0.1BOOLWhen set, the NIC will only respect NV_GLOBAL_PCI_CONF \;TLV if its total_vfs parameter is lower than or equal to the value \;of the max_vfs_per_pf field below.‚-5/ƒmax_total_msix_validnv_global_pci_cap0x0.300x0.1BOOLWhen set, the NIC will only respect NV_GLOBAL_PCI_CONF \;TLV if the total MSIX required for all PFs and VFs is lower or \;equal to the number specified in the max_total_msix field below.‚ ,3/ƒmax_total_bar_validnv_global_pci_cap0x0.290x0.1BOOLWhen set, the NIC will only respect an NV_GLOBAL_PCI_\;CONF TLV if the total bar size required for all PFs and VFs is \;lower or equal to the number specified in the max_total_bar field \;below. RRm´Óó6X~§Ðú3m‹±à/daynv_file_id_vendor}"%+ dcbx_willingnv_lldp_nb_dcbxþ#%+dcbx_willingnv_lldp_nb_dcbx) dce_tcp_gnv_roce_cc_ecn¶)dce_tcp_gnv_roce_cc_ecnÊ #) dce_tcp_rttnv_roce_cc_ecn·!#)dce_tcp_rttnv_roce_cc_ecnË!''dcr_lifo_sizenv_ib_dc_conf„%%1debug_log_ennv_rom_debug_level^('5debug_versionfile_dbg_fw_token_id(/- default_link_typenv_vpi_link_type¤)/-default_link_typenv_vpi_link_type¥8Y# default_mpfs_host_port_state_supportednv_mpfs_cap9Y#default_mpfs_host_port_state_supportednv_mpfs_cap"1dhcpnv_rom_debug_levela%'/dhcp_iscsi_ennv_rom_iscsi_dhcpN.I!dhcp_pxe_discovery_control_disnv_rom_iniV+!dhcp_user_classnv_rom_iniS x‹Žøtðxv6+/kmax_num_pf_msixnv_global_pci_cap0x8.120x0.10UNSIGNEDMaximum number of MSI-X vectors and EQs per PF.5;/umax_log_vf_uar_bar_sizenv_global_pci_cap0x8.60x0.6UNSIGNEDLog 2 of the maximum size (in MBs) of a VF"s UAR BAR4;/umax_log_pf_uar_bar_sizenv_global_pci_cap0x8.00x0.6UNSIGNEDLog 2 of the maximum size (in MBs) of a PF"s UAR BAR3'/1sriov_supportnv_global_pci_cap0x4.310x0.1BOOLWhen set, SR-IOV support is configurable by the NV_\;GLOBAL_PCI_CONF sriov_en bit.29/vf_qos_control_supportnv_global_pci_cap0x4.300x0.1BOOLWhen set, the device supports controlling the VF QoS setting.q1#/sfpp_supportnv_global_pci_cap0x4.290x0.1BOOLWhen set, function per-port setting is configurables0#/omax_num_pfsnv_global_pci_cap0x4.160x0.8UNSIGNEDMaximum number of PFs. Value 0 indicates 256 PFs. :ˆþt;ä:T>A7 number_of_pci_switch_lanesnv_pci_switch_evb_cap0x0.00x0.8UNSIGNEDR==9 pci_switch_lanes_mappingnv_pci_switch_evb_conf0x4.240x8.0BYTESU<G9 pci_switch_lanes_remapping_ennv_pci_switch_evb_conf0x0.310x0.1BOOL7;' kdnet_ennv_kdnet_data0x0.310x0.1BOOL:5#?9= log_max_payload_sizenv_tpt_conf0x0.00x0.4ENUM0x0: AUTOMATIC\;0xC: _4KBAUTOMATIC=0x0,_4KB=0xcINT_LOG_MAX_PAYLOAD_SIZE‚9'/ƒmax_total_barnv_global_pci_cap0x10.00x4.0UNSIGNEDMaximum total of the MMIO space for all PFs and VFs com\;bined, in megabytes.\;Note: if the number of PF or VF per port is not a power of 2, this \;parameter will also not be a power of 28)/ max_total_msixnv_global_pci_cap0xC.00x4.0UNSIGNEDMaximum number of MSI-X for the aggregate of all PFs and \;VFs.v7+/kmax_num_vf_msixnv_global_pci_cap0x8.220x0.10UNSIGNEDMaximum number of MSI-X vectors and EQs per VF. %ž%‚v@A'ƒ];g advanced_power_settings_ennv_power_conf0x0.310x0.1BOOLEnable manual override for the default power settings. \;When Set, additional power settings parameter in NV_POW\;ER_CONF are valid and configurable.\;When cleared, additional power settings parameter in \;NV_POWER_CONF are ignored.ADVANCED_POWER_SETTINGS$nv_power_cap.slot_power_limiter_supported==1„_?9'†KAK slot_power_limiter_disnv_power_conf0x0.300x0.1BOOLWhen cleared, the device is not allowed to consume more than \;25W from the PCIe power rails, unless a PCI slot power limit \;message which a new power limit is received.\;When set, the slot power limiter is disabled, and the device is \;allowed to consume more than 25W from the PCIe power rails.\;Note: if the power limiter is active and there is not enough \;power, the device will shut down the network modules.DISABLE_SLOT_POWER_LIMITER($nv_power_conf.advanced_power_settings_en==1)&&($nv_power_cap.slot_power_limiter_supported==1) hxÎh ®gµhKJ'!1hii_read_onlynv_rom_ini0x0.130x0.1BOOLHII read only modeMI+!1hii_bdf_decimalnv_rom_ini0x0.120x0.1BOOLHII read only modeaH1!Shii_platform_setupnv_rom_ini0x0.110x0.1BOOLUse decimal values for PCIE addressEG#!)hii_ibm_aimnv_rom_ini0x0.100x0.1BOOLEnable AIM HIIYF;!;hii_iscsi_configurationnv_rom_ini0x0.90x0.1BOOLEnable ISCSI HII config]EE!9static_component_name_stringnv_rom_ini0x0.80x0.1BOOLUse static device namedD!mtech_enumnv_rom_ini0x0.30x0.1BOOLAdd technology enumeration to device name stringJC!!7hii_vpi_ennv_rom_ini0x0.20x0.1BOOLEnable HII VPI config\B-!Oshared_memory_ennv_rom_ini0x0.10x0.1BOOLEnable HP shared memory functionsAE%slot_power_limiter_supportednv_power_cap0x0.300x0.1BOOLWhen set, \;DISABLE_SLOT_POWER_LIMITER\; is configu\;rable ±=VŠ¬Ãß±ó5 W{¥Æç)MqŠ«Ëé-E!force_eth_subclass_supportednv_pci_capœ$1#force_eth_subclassnv_pci_conf™+fw_enfile_public_key”+frc_enfile_public_key!flash_ennv_rom_iniM3;7flexboot_banner_timeoutnv_rom_banner_timeout3!/!flexboot_debug_ennv_rom_cape!fmp_ennv_rom_iniN/57forbidden_fw_versionnv_forbidden_versions 1fpp_ennv_global_pci_conf"#/fpp_supportnv_global_pci_cap1!1fpp_validnv_global_pci_conf##1full_vf_qosnv_global_pci_conf )/1full_vf_qos_validnv_global_pci_conf %'fw_rev_majornv_vts_bank_a’ %'fw_rev_majornv_vts_bank_b› %'fw_rev_minornv_vts_bank_a” %'fw_rev_minornv_vts_bank_b#+'fw_rev_subminornv_vts_bank_a“#+'fw_rev_subminornv_vts_bank_bœ!guid_opsnv_rom_iniY -!hii_aim_ucm_ver2nv_rom_ini\+!hii_bdf_decimalnv_rom_iniI'!hii_config_ennv_rom_capb!hii_ennv_rom_iniQ -¥I¯fºqÎ-T+!Qucm_single_portnv_rom_ini0xC.100x0.1BOOLWhen set, the mriname string will not include the port number.\; (relevant to Lenovo Purely cards) S+!Qdhcp_user_classnv_rom_ini0x4.240x8.0BYTESDHCP user class option (RFC3004) for Flexboot.\;Octet #1 must be equal for 77d.\;octet #2 - lengthGR!5undi_ennv_rom_ini0x0.310x0.1BOOLEnable UNDI protocolEQ!3hii_ennv_rom_ini0x0.300x0.1BOOLEnable HII protocolcP7!Qplatform_to_driver_ennv_rom_ini0x0.290x0.1BOOLEnable Platform to Driver ProtocolGO!5bofm_ennv_rom_ini0x0.280x0.1BOOLEnable BOFM protocolON!Gfmp_ennv_rom_ini0x0.270x0.1BOOLEnable FW Management protocolGM!3flash_ennv_rom_ini0x0.260x0.1BOOLEnable flash accessZL!Wport_enumnv_rom_ini0x0.250x0.1BOOLAdd port number to device name stringYK!Wmac_enumnv_rom_ini0x0.240x0.1BOOLAdd MAC address to device name string K®«VåKH[%!‚+hii_mriname2nv_rom_ini0xC.200x0.1BOOLExpose MRI_NAME2 field in HII with hard coded value of \;"Mellanox Network Adapter, physical ports $p, Logical ports 1" \;per Lenovo"s HII specLZ!cehii_typenv_rom_ini0xC.160x0.4ENUMType of .vfr type with HII configuration selector:\;0x0: \;MLNX_\;DEFAULT\;0x1: HPE\;0x2: LENOVO\;0x3: DELLMLNX_DEFAULT=0x0,HPE=0x1,LENOVO=0x2,DELL=0x3oY!guid_opsnv_rom_ini0xC.150x0.1BOOLguided_ops in CX3 (show specific fields in HII for Lenovo)SX5!3hii_flexaddr_settingnv_rom_ini0xC.140x0.1BOOLFlexaddress settingfW7!Whii_flexaddr_overridenv_rom_ini0xC.130x0.1BOOLOverride flexaddress displaying logicVI!'dhcp_pxe_discovery_control_disnv_rom_ini0xC.120x0.1BOOLDisable PXE DISCOVERY_CONTROL DHCP option (option \;43 sub option 6) support.PU%!=tivoli_wa_ennv_rom_ini0xC.110x0.1BOOLEnable (Tivoli) Rembo WA mÇë6]‰¯Õ-V¨’mÑê?p Ñ$#1mac_addressfile_mac_addr_list˜45?lun_busy_retry_countnv_rom_iscsi_general_confB#)) lldp_nb_tx_capnv_lldp_nb_capò$))lldp_nb_tx_capnv_lldp_nb_capø%++ lldp_nb_tx_modenv_lldp_nb_confç&++lldp_nb_tx_modenv_lldp_nb_confí+;'log_dcr_hash_table_sizenv_ib_dc_confƒ%5#log_max_payload_sizenv_tpt_conf:%1'log_memic_bar_sizenv_memic_conf +31log_pf_uar_bar_sizenv_global_pci_conf"+31log_vf_uar_bar_sizenv_global_pci_conf#(-1lro_log_timeout0nv_sw_offload_confm(-1lro_log_timeout1nv_sw_offload_confn(-1lro_log_timeout2nv_sw_offload_confo(-1lro_log_timeout3nv_sw_offload_confp!mac_enumnv_rom_iniK$/%max_dcr_lifo_sizenv_ib_dc_capˆ/A) max_lldp_nb_rx_buffer_sizenv_lldp_nb_capó0A)max_lldp_nb_rx_buffer_sizenv_lldp_nb_capù/A) max_lldp_nb_tx_buffer_sizenv_lldp_nb_capô0A)max_lldp_nb_tx_buffer_sizenv_lldp_nb_capú.C%max_log_dcr_hash_table_sizenv_ib_dc_cap† Škü¢'¿-Š b'!Yhii_config_ennv_rom_cap0x0.260x0.1BOOLWhen set, NV_ROM_UEFI_CONF.\;hii_en\; controls if HII is \;reported (\;overriding\; NV_ROM_INI.hii_en)a3!+uefi_undi_config_ennv_rom_cap0x0.250x0.1BOOLWhen set, NV_ROM_UEFI_CONF.\;uefi_undi_en\; controls if \;UEFI UNDI is reportedf`-!apromiscuous_vlannv_rom_ini0xC.310x0.1BOOLSet Flexboot to ignore incoming VLAN tags.y_-!option_rom_debugnv_rom_ini0xC.300x0.1BOOLEnable/disable logs per the configured level for each moduleX^)!Auri_boot_retrynv_rom_ini0xC.260x0.4UNSIGNEDNumber of uri boot retriesm]5!_uri_boot_retry_delaynv_rom_ini0xC.220x0.4UNSIGNEDDelay in seconds between uri boot retries\-!7hii_aim_ucm_ver2nv_rom_ini0xC.210x0.1BOOLExpose AIM ver, and UCM ver HII fields with value equal to 2. \;For Levovo Agentless. ŸréASŸ1h!%uimage_banknv_fpga_data0x0.300x0.2UNSIGNEDThis bit is set when flexboot supports configuration of PXE \;boot IP version defined in boot settings ext parameter,g#!uboot_ip_vernv_rom_cap0x0.310x0.1BOOLThis bit is set when flexboot supports configuration of PXE \;boot IP version defined in boot settings ext parameter=f/! boot_debug_log_ennv_rom_cap0x0.300x0.1BOOL%e/![flexboot_debug_ennv_rom_cap0x0.290x0.1BOOLWhen set, Flexboot debug is supported (NV_ROM_FLEX\;BOOT_DEBUG and NV_ROM_DEBUG_LEVEL are appli\;cable)d%!'uefi_logs_ennv_rom_cap0x0.280x0.1BOOLWhen set, UEFI logging is supported (NV_ROM_UEFI_DE\;BUG_LEVEL is applicable) c)!-lacp_config_ennv_rom_cap0x0.270x0.1BOOLWhen set, Flexboot supports configuration of LACP (NV_\;BOOT_CONF1.\;lacp_dis\;) °«°\k-1C-g ip_over_vxlan_ennv_sw_offload_conf0x0.40x0.1BOOLThis parameter is only supported if NV_SW_OFF\;LOAD_CAP.\;ip_over_vxlan_supported\; is set.IP_OVER_VXLAN_EN$nv_sw_offload_cap.ip_over_vxlan_supported!=0‚j31ƒ1one_qp_per_recoverynv_sw_offload_conf0x0.30x0.1BOOLWhen set, a lost doorbell will trigger WQ doorbell record query only for the QP ringing the doorbell.When cleared, a lost doorbell may trigger WQ doorbell record query for multiple QPs\;supported_from_version:1‚Ri+1ƒWC+ cqe_compressionnv_sw_offload_conf0x0.00x0.3ENUMConfigure which algorithm should be used by the NIC in order\;to decide when to activate CQE compression based on PCIe bus condition.\;Note that the driver can enable compression on a per CQE basis\;0x0: BALANCED\;0x1: AGGRESSIVEBALANCED=0x0,AGGRESSIVE=0x1CQE_COMPRESSION Œ$$(-27<AFKPUZ_dinsx}‚‡Œ‘–› ¥ª¯´¹¾ÃÈÍÒ×Üáæëðõúÿ "',16;@EJOTY^chmrw|†‹•šŸ¤©®³¸½ÂÇÌÑÖÛàåêïôùþ !&+05:@FLRX^djpv|‚ˆŽ”š ¦¬²¸¾ÄÊÐÖÜâèîôú      &'()*+,-./0123456789;<=>ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghjqrstuvwxyz{|}~€‚…†‡ˆ‰Š‹ŒŽ‘’“”•–—˜™š›œžŸ ¡¢ wúú $*06<BHNTZ`flrx~„Š–œ¢¨®´ºÀÆÌÒØÞäêðöü &,28>DJPV\bhntz€†Œ’˜ž¤ª°¶¼ÂÈÎÔÚàæìòøþ "(.4:@FLRX^djpv|‚ˆŽ”š ¦¬²ÍéÒÓÔÕÖ×ØÙÚÛÜÝÞßàáâãäèéêîïðñòóôõö÷øùúû !"#%&')./123:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]d†‡ˆ‰Š‹ŒŽ‘’“”•–—˜œž7ADVANCED_PCI_SETTINGS›;ADVANCED_POWER_SETTINGS@/ALLOW_RD_COUNTERS+ ™éÁ™‚%n-1ƒ'- lro_log_timeout1nv_sw_offload_conf0x4.40x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #1, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT1‚%m-1ƒ'- lro_log_timeout0nv_sw_offload_conf0x4.00x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #0, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT0‚l11C1A ip_over_vxlan_portnv_sw_offload_conf0x0.160x0.16UNSIGNEDThis parameter is only supported if NV_SW_OFF\;LOAD_CAP.\;ip_over_vxlan_supported\; is set.IP_OVER_VXLAN_PORT($nv_sw_offload_cap.ip_over_vxlan_supported!=0)&&($nv_sw_offload_conf.ip_over_vxlan_en!=0) ¢Ø¯ö¢Rr'-5packet_pacingnv_packet_pacing0x0.00x0.1BOOLEnable packet pacing6q;/cip_over_vxlan_supportednv_sw_offload_cap0x0.310x0.1BOOLWhen set, both \;ip_over_vxlan_en\; and \;ip_over_vx\;lan_port\; in NVSW_OFFLOAD_CONFIG are configu\;rable.‚&p-1ƒ'- lro_log_timeout3nv_sw_offload_conf0x4.120x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #3, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT3‚%o-1ƒ'- lro_log_timeout2nv_sw_offload_conf0x4.80x0.4UNSIGNEDLog2 of Large Receive Offload (LRO) timeout #2, in \;microseconds. Driver can select one of the 4 configured \;LRO timeouts on a per Qp basis in run-time (lro_timeout_period_usecs field of the TIR context)LRO_LOG_TIMEOUT2 HHw¦Íì Aw–¶Ýú;b‡²Ø*Vz¬Ñ.;/max_log_pf_uar_bar_sizenv_global_pci_cap4.;/max_log_vf_uar_bar_sizenv_global_pci_cap5&5%max_memic_size_limitnv_memic_cap'! max_num_of_tcnv_qos_cap'!max_num_of_tcnv_qos_cap4K) max_num_of_tx_optional_lldp_tlvnv_lldp_nb_capõ5K)max_num_of_tx_optional_lldp_tlvnv_lldp_nb_capû'! max_num_of_vlnv_qos_cap'!max_num_of_vlnv_qos_cap&+/max_num_pf_msixnv_global_pci_cap6#! max_num_pfcnv_qos_cap#!max_num_pfcnv_qos_cap"#/max_num_pfsnv_global_pci_cap0&+/max_num_vf_msixnv_global_pci_cap7$'/max_total_barnv_global_pci_cap9*3/max_total_bar_validnv_global_pci_cap,%)/max_total_msixnv_global_pci_cap8+5/max_total_msix_validnv_global_pci_cap-%)/max_vfs_per_pfnv_global_pci_cap/+5/max_vfs_per_pf_validnv_global_pci_cap.#-'memic_size_limitnv_memic_conf197min_allowed_fw_versionnv_forbidden_versions $/%min_dcr_lifo_sizenv_ib_dc_cap‡.C%min_log_dcr_hash_table_sizenv_ib_dc_cap… UИ]3 Û¯zG ì¦b7弊U3 1 +nv_sw_offload_conf NIC1SW OFFLOAD CONF0 %% nv_fpga_dataNIC-internal0FPGA DATA' !  nv_rom_capEXP_ROM0ROM CAP' !  nv_rom_iniEXP_ROM0ROM INI' %  nv_power_cap‰NIC0POWER CAP) ' !nv_power_confˆNIC0POWER CONFB 7%  1nv_pci_switch_evb_cap‡NIC-internal0PCI SWITCH EVB CAPD 9% 3nv_pci_switch_evb_conf†NIC-internal0 PCI SWITCH EVB CONF2 '% !nv_kdnet_data…NIC-internal0KDNET DATA% # nv_tpt_conf‚NIC0TPT CONF1 /  )nv_global_pci_capNIC0GLOBAL PCI CAP3 1 +nv_global_pci_conf€NIC0 GLOBAL PCI CONF* ) #nv_host_to_bmcNIC0HOST TO BMC. - 'nv_roce_1_5_confNIC0ROCE 1 5 CONF& %  nv_memic_capNIC0MEMIC CAP( ' !nv_memic_confNIC0MEMIC CONF9 7 1nv_forbidden_versionsNIC0FORBIDDEN VERSIONS6 5  /nv_base_mac_guid_capNIC0BASE MAC GUID CAP. - 'nv_base_mac_guidNIC0BASE MAC GUID 8Íœm:æ³k6Κj9îÁ“f8,' )  #nv_roce_cc_qcn NIC0(ROCE CC QCN+& )  # nv_roce_cc_qcn NIC0(ROCE CC QCN,% )  #nv_roce_cc_ecnNIC0DROCE CC ECN+$ )  # nv_roce_cc_ecnNIC0DROCE CC ECN$# !  nv_roce_ccNIC0ROCE CC#" !   nv_roce_ccNIC0ROCE CC/! -  'nv_vpi_link_typeNIC0VPI LINK TYPE. -  ' nv_vpi_link_typeNIC0VPI LINK TYPE2 '% !nv_vts_bank_bNIC-internal0VTS BANK B2 '% !nv_vts_bank_aNIC-internal0VTS BANK A2 '% !nv_debug_modeÿNIC-internal0DEBUG MODE3 - 'nv_rom_ocsd_ocbbEXP_ROM0ROM OCSD OCBBF ;% 5nv_current_configurator”NIC-internal0CURRENT CONFIGURATOR1 / )nv_enclosure_info’NIC0ENCLOSURE INFO' %  nv_ib_dc_cap‘NIC0IB DC CAP) ' !nv_ib_dc_confNIC0IB DC CONF1 / )nv_file_id_vendorNIC0FILE ID VENDOR- + %nv_file_id_mlnxNIC0FILE ID MLNX/ - 'nv_packet_pacing NIC0PACKET PACING1 /  )nv_sw_offload_cap NIC0SW OFFLOAD CAP 8p Äw‰8Ox+9secondsnv_file_id_mlnx0xC.80x0.8BINARYseconds - 2 packed BCDkw+‚qyearnv_file_id_mlnx0x8.160x0.16BINARYyear - 4 packed BCD. Note: If year is zero, FW may copy \;the signature time to this TLV before copying it to flash so, \;the NVCONFIG component will have a date&time prop\;erty.Kv+5monthnv_file_id_mlnx0x8.80x0.8BINARYmonth - 2 packed BCDGu+1daynv_file_id_mlnx0x8.00x0.8BINARYday - 2 packed BCDat%+Ofile_versionnv_file_id_mlnx0x4.00x4.0UNSIGNED32bit version number of the file.ƒ s5+…erase_lower_prioritynv_file_id_mlnx0x0.310x0.1BOOLWhen set, installation of the file will erase all NVCONFIG \;parameters that are at lower priority that is. If the file prior\;ity is MLNX, installation of the file will not copy any TLVs \;from the current NVDAT partition. If the file priority is \;VENDOR_NVCONF, the installation of the file will only \;copy MLNX level TLVs. Ë®\ÊeËM~/5monthnv_file_id_vendor0x8.80x0.8BINARYmonth - 2 packed BCDI}/1daynv_file_id_vendor0x8.00x0.8BINARYday - 2 packed BCDc|%/Ofile_versionnv_file_id_vendor0x4.00x4.0UNSIGNED32bit version number of the file.ƒ{5/…erase_lower_prioritynv_file_id_vendor0x0.310x0.1BOOLWhen set, installation of the file will erase all NVCONFIG \;parameters that are at lower priority that is. If the file prior\;ity is MLNX, installation of the file will not copy any TLVs \;from the current NVDAT partition. If the file priority is \;VENDOR_NVCONF, the installation of the file will only \;copy MLNX level TLVs.Pz+?hournv_file_id_mlnx0xC.240x0.8BINARYhour - 2 packed BCD (UTC)Py+9minutesnv_file_id_mlnx0xC.160x0.8BINARYminutes - 2 packed BCD ¼güa''7' KK dcr_lifo_sizenv_ib_dc_conf0x4.00x0.24UNSIGNEDThe total amount of InfiniBand DCRs (Dynamically Con\;nected Responders), minus one.DCR_LIFO_SIZE$nv_ib_dc_cap.min_dcr_lifo_size$nv_ib_dc_cap.max_dcr_lifo_size‚;'K; __ log_dcr_hash_table_sizenv_ib_dc_conf0x0.00x0.5UNSIGNEDInfiniBand DC (Dynamically Connected) hash table log2 \;size (for example: 7 means 128 entries)LOG_DCR_HASH_TABLE_SIZE$nv_ib_dc_cap.min_log_dcr_hash_table_size$nv_ib_dc_cap.max_log_dcr_hash_table_sizeR/?hournv_file_id_vendor0xC.240x0.8BINARYhour - 2 packed BCD (UTC)R/9minutesnv_file_id_vendor0xC.160x0.8BINARYminutes - 2 packed BCDQ/9secondsnv_file_id_vendor0xC.80x0.8BINARYseconds - 2 packed BCDm/‚qyearnv_file_id_vendor0x8.160x0.16BINARYyear - 4 packed BCD. Note: If year is zero, FW may copy \;the signature time to this TLV before copying it to flash so, \;the NVCONFIG component will have a date&time prop\;erty. P±bØÚš¿Pˆb1;Žaecurrent_cfg_methodnv_current_configurator0x0.00x0.8ENUMParameter from "HP ASN1 Dat3A !/ bay_numbernv_enclosure_info0x4.240x0.8UNSIGNED '/e[tray_locationnv_enclosure_info0x4.160x0.8ENUM0x0: SINGLE_NODE_TRAY\;0x1: FRONT\;0x2: REARSINGLE_NODE_TRAY=0x0,FRONT=0x1,REAR=0x2= / tray_idnv_enclosure_info0x4.80x0.8UNSIGNED@ !/ chassis_idnv_enclosure_info0x4.00x0.8UNSIGNED7 /‚hp_7kd_ennv_enclosure_info0x0.00x0.1BOOLWhen this bit is set to 1, the NIC PHY should apply PHY calibration according to the data specified in the following fieldsB/% max_dcr_lifo_sizenv_ib_dc_cap0xC.00x4.0UNSIGNEDB/% min_dcr_lifo_sizenv_ib_dc_cap0x8.00x4.0UNSIGNEDLC% max_log_dcr_hash_table_sizenv_ib_dc_cap0x4.00x4.0UNSIGNEDLC% min_log_dcr_hash_table_sizenv_ib_dc_cap0x0.00x4.0UNSIGNED ‘¶Ýþ‘Ac“Äò!Mp”¸Ý1Rt•·Û$)+public_key_expfile_public_key•&!7port_ownernv_external_port_ctrl* -!promiscuous_vlannv_rom_ini`1psidfile_applicable_to†$#1psid_branchfile_applicable_to‡!1pxe_undinv_rom_debug_levelu/A) rate_reduce_monitor_periodnv_roce_cc_ecn¸0A)rate_reduce_monitor_periodnv_roce_cc_ecnÌ-=) rate_to_set_on_first_cnpnv_roce_cc_ecnµ.=)rate_to_set_on_first_cnpnv_roce_cc_ecnÉ++7reneg_on_changenv_external_port_ctrl,"/! roce_cc_algorithmnv_roce_cc§#/!roce_cc_algorithmnv_roce_cc©#1! roce_cc_enable_prinv_roce_cc¦$1!roce_cc_enable_prinv_roce_cc¨0A-roce_over_ip_next_protocolnv_roce_1_5_conf"1romprefixnv_rom_debug_level` #) rpg_ai_ratenv_roce_cc_ecn°!#)rpg_ai_ratenv_roce_cc_ecnÄ #) rpg_ai_ratenv_roce_cc_qcnÖ!#)rpg_ai_ratenv_roce_cc_qcnß#)) rpg_byte_resetnv_roce_cc_ecn­$))rpg_byte_resetnv_roce_cc_ecnÁa Structure Specification v2.8.6.asn"\;0x0: E_NONE - default config\;0x1: OS - O/S making cfg changes in the absences of any other Mgmt Util (command interface)\;0x2: E_VENDOR_SPEC - e.g. Vendor"s Option ROM, NPAR, O/S Cfg Utils (FW writes this TLV when a TLV is written from mlxconfig, that is when NVDA write for any TLV is coming from the ICMD gateway without a UEFI or flexboot "writer-ID").\;0x3: E_HP_OTHER - (when an extern-DCi-mgmt parameter with value e-None is arriving from the BMC ASN.1 API)\;0x4: E_VC_CLP - Driver or F/W detects HPE Classic C-Class SM-CLP\;0x5: E_HP_CNU - Driver or F/W detects HPE"s Converged Network Utility (when an extern-DCi-mgmt parameter with value is arriving from the BMC ASN.1 API)\;0x6: E_HP_ONEVIEW - If manage-via-DCi value equals to HPE-OneView(6) in BaseDev-Cfg-Now is coming from the BMC ASN.1 API\;0x7: E_UEFI_HII - UEFI Option ROM executingE_NONE=0x0,OS=0x1,E_VENDOR_SPEC=0x2,E_HP_OTHER=0x3,E_VC_CLP=0x4,E_HP_CNU=0x5,E_HP_ONEVIEW=0x6,E_UEFI_HII=0x7 %X® jÇ%%'Gfw_rev_minornv_vts_bank_a0x8.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A.+'Efw_rev_subminornv_vts_bank_a0x8.00x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A%'Gfw_rev_majornv_vts_bank_a0x4.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A.1'Gnvia_nvlog_on_bootnv_debug_mode0x0.10x0.1BOOLDebug only.When set, firmware erases the NVLOG partition on BOOT and erase this NVCONFIG TLV.&7'Qnvia_nvconfig_on_bootnv_debug_mode0x0.00x0.1BOOLDebug only.When set, firmware invalidates all NVCONFIG parameters on boot including this parameter$-aocsd_ennv_rom_ocsd_ocbb0x0.310x0.1BOOLEnable HP on-chip temperature monitoring (OCSD) and Active Health Systems support via FW (OCBB) reporting. ¢«Rù@çE¢+'Efw_rev_subminornv_vts_bank_b0x8.00x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A%'Gfw_rev_majornv_vts_bank_b0x4.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A.V'Gts_hournv_vts_bank_a0x10.240x0.8BINARYTimestamp hour - 2 packed BCDZ'Kts_minutenv_vts_bank_a0x10.160x0.8BINARYTimestamp minute - 2 packed BCDY'Kts_secondnv_vts_bank_a0x10.80x0.8BINARYTimestamp second - 2 packed BCDV'Gts_yearnv_vts_bank_a0xC.160x0.16BINARYTimestamp year - 4 packed BCDV'Its_monthnv_vts_bank_a0xC.80x0.8BINARYTimestamp month - 2 packed BCDR'Ets_daynv_vts_bank_a0xC.00x0.8BINARYTimestamp day - 2 packed BCD ^ °WûžEB$/-W)% default_link_typenv_vpi_link_type0x0.20x0.2ENUMSelect the link type (Ethernet or Infiniband) for the port\;0x1: IB - Infiniband\;0x2: ETH - EthernetIB=0x1,ETH=0x2LINK_TYPE_P1V#'Gts_hournv_vts_bank_b0x10.240x0.8BINARYTimestamp hour - 2 packed BCDZ"'Kts_minutenv_vts_bank_b0x10.160x0.8BINARYTimestamp minute - 2 packed BCDY!'Kts_secondnv_vts_bank_b0x10.80x0.8BINARYTimestamp second - 2 packed BCDV 'Gts_yearnv_vts_bank_b0xC.160x0.16BINARYTimestamp year - 4 packed BCDV'Its_monthnv_vts_bank_b0xC.80x0.8BINARYTimestamp month - 2 packed BCDR'Ets_daynv_vts_bank_b0xC.00x0.8BINARYTimestamp day - 2 packed BCD%'Gfw_rev_minornv_vts_bank_b0x8.160x0.16UNSIGNEDThe MVTS command use this parameter to keep the user defined version timestamp for FW bank A. u9…Ø#u*)/!+5 roce_cc_algorithmnv_roce_cc0x0.310x0.1ENUMSelect RDMA over Converged Ethernet (RoCE) algorithm\;0x0: ECN\;0x1: QCNECN=0x0,QCN=0x1ROCE_CC_ALGORITHM_P21(1!A5 roce_cc_enable_prinv_roce_cc0x0.00x0.8UNSIGNEDEach bit in this mask indicates if the RoCE should be \;enabled on the n-th IEEE priority.ROCE_CC_PRIO_MASK_P2)'/!+5 roce_cc_algorithmnv_roce_cc0x0.310x0.1ENUMSelect RDMA over Converged Ethernet (RoCE) algorithm\;0x0: ECN\;0x1: QCNECN=0x0,QCN=0x1ROCE_CC_ALGORITHM_P10&1!A5 roce_cc_enable_prinv_roce_cc0x0.00x0.8UNSIGNEDEach bit in this mask indicates if the RoCE should be \;enabled on the n-th IEEE priority.ROCE_CC_PRIO_MASK_P1C%/-W)% default_link_typenv_vpi_link_type0x0.20x0.2ENUMSelect the link type (Ethernet or Infiniband) for the port\;0x1: IB - Infiniband\;0x2: ETH - EthernetIB=0x1,ETH=0x2LINK_TYPE_P2 Ãå8‡Ã@-))e/ rpg_byte_resetnv_roce_cc_ecn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0=DISABLED)\;Default: 150RPG_BYTE_RESET_P1-,))?/ rpg_time_resetnv_roce_cc_ecn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in microseconds.\;Default: 2RPG_TIME_RESET_P1)+))?/ clamp_tgt_ratenv_roce_cc_ecn0x0.310x0.1BOOLIf set, whenever a CNP is processed, the target rate is \;updated to be the current rate.CLAMP_TGT_RATE_P1‚*G)‚_M clamp_tgt_rate_after_time_incnv_roce_cc_ecn0x0.300x0.1BOOLDefault: True\;When receiving an CNP, the target rate should be updated \;if the transmission rate was increased due to the timer, and \;not only due to the byte counterCLAMP_TGT_RATE_AFTER_TIME_INC_P1 ËËð )Eb„§Éì1Sv›Áæ .Qs–¹Ý$))rpg_byte_resetnv_roce_cc_qcnÜ) rpg_gdnv_roce_cc_ecn²)rpg_gdnv_roce_cc_ecnÆ) rpg_gdnv_roce_cc_qcnØ)rpg_gdnv_roce_cc_qcná!%) rpg_hai_ratenv_roce_cc_ecn±"%)rpg_hai_ratenv_roce_cc_ecnÅ!%) rpg_hai_ratenv_roce_cc_qcn×"%)rpg_hai_ratenv_roce_cc_qcnà!%) rpg_max_ratenv_roce_cc_ecn¯"%)rpg_max_ratenv_roce_cc_ecnÃ!%) rpg_max_ratenv_roce_cc_qcnÕ"%)rpg_max_ratenv_roce_cc_qcnÞ$+) rpg_min_dec_facnv_roce_cc_ecn³%+)rpg_min_dec_facnv_roce_cc_ecnÇ$+) rpg_min_dec_facnv_roce_cc_qcnÙ%+)rpg_min_dec_facnv_roce_cc_qcnâ!%) rpg_min_ratenv_roce_cc_ecn´"%)rpg_min_ratenv_roce_cc_ecnÈ!%) rpg_min_ratenv_roce_cc_qcnÚ"%)rpg_min_ratenv_roce_cc_qcnã"') rpg_thresholdnv_roce_cc_ecn®#')rpg_thresholdnv_roce_cc_ecnÂ"') rpg_thresholdnv_roce_cc_qcnÔ r)ó6r@1%)k+ rpg_hai_ratenv_roce_cc_ecn0x18.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_HYPER_INCREASE state.\;Default: 50RPG_HAI_RATE_P190#)a) rpg_ai_ratenv_roce_cc_ecn0x14.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_ACTIVE_INCREASE.\;Default: 10RPG_AI_RATE_P1‚2/%)ƒQ+ rpg_max_ratenv_roce_cc_ecn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed).\;Default: 0 (Full port speed)RPG_MAX_RATE_P1S.')‚- rpg_thresholdnv_roce_cc_ecn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 5RPG_THRESHOLD_P1 AÛéFA‚5=)‚=C rate_to_set_on_first_cnpnv_roce_cc_ecn0x28.00x0.17UNSIGNEDThe rate that is set for the flow when a rate limiter is allo\;cated to it upon first CNP received, in Mbps (=Full Port \;Speed).\;Default: 0 Port speedRATE_TO_SET_ON_FIRST_CNP_P14%))+ rpg_min_ratenv_roce_cc_ecn0x24.00x0.17UNSIGNEDThe minimum value, in megabits per second, for rate to \;limit.\;Default: 2000RPG_MIN_RATE_P1n3+)‚51  rpg_min_dec_facnv_roce_cc_ecn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50RPG_MIN_DEC_FAC_P11100‚!2)ƒG rpg_gdnv_roce_cc_ecn0x1C.00x0.4UNSIGNEDIf a CNP is received, the flow rate is reduced at the begin\;ning of the next rate_reduce_monitor_period interval to \;(1-Alpha/Gd)*CurrentRate. rpg_gd is given as log2(Gd), \;where Gd may only be powers of 2.\;Default: 7RPG_GD_P1 ‘R³‘‚8A)‚mG  rate_reduce_monitor_periodnv_roce_cc_ecn0x34.00x0.17UNSIGNEDThe minimum time between 2 consecutive rate reductions \;for a single flow. Rate reduction will occur only if a CNP \;is received during the relevant time interval.\;Default: 2RATE_REDUCE_MONITOR_PERIOD_P117#)#)  dce_tcp_rttnv_roce_cc_ecn0x30.00x0.17UNSIGNEDThe time between updates of the alpha value, in microsec\;onds.\;Default: 2DCE_TCP_RTT_P11ƒ*6)…I%  dce_tcp_gnv_roce_cc_ecn0x2C.00x0.10UNSIGNEDUsed to update the congestion estimator (alpha) once \;every dce_tcp_rtt microseconds, according to the equa\;tion:\;Alpha = (cnp_received * dceTcpG) + (1 - dceTcpG) * \;alpha .\;dceTcpG is divided by 2^10.\;cnp_received is set to one if a CNP was received for this \;flow during period since the previous update and the cur\;rent update\;Default: 64DCE_TCP_G_P11 &~~”«Ãåû'=ToŠ¦ÂÝù(>Vmƒ™¬»ÏÞð<Sj€–§¸Òì-BOOT_DBG_LOG_ARPc/BOOT_DBG_LOG_DHCPa1BOOT_DBG_LOG_DHCP6b!EBOOT_DBG_LOG_DRIVER_SETTINGSs-BOOT_DBG_LOG_DRVg+BOOT_DBG_LOG_IPq/BOOT_DBG_LOG_IPV6r-BOOT_DBG_LOG_NDPe/BOOT_DBG_LOG_NDRVh7BOOT_DBG_LOG_NDRV_CMDi7BOOT_DBG_LOG_NDRV_DEVj9BOOT_DBG_LOG_NDRV_PORTk9BOOT_DBG_LOG_NETDEVICEl7BOOT_DBG_LOG_PXE_UNDIu9BOOT_DBG_LOG_ROMPREFIX`3BOOT_DBG_LOG_STATUSt-BOOT_DBG_LOG_STP_-BOOT_DBG_LOG_TCPo1BOOT_DBG_LOG_TCPIPp/BOOT_DBG_LOG_TFTPm-BOOT_DBG_LOG_UDPn-BOOT_DBG_LOG_URIf'BOOT_LACP_DIS7BOOT_PKEY9)BOOT_RETRY_CNT6BOOT_VLAN4%BOOT_VLAN_EN8%MCLAMP_TGT_RATE_AFTER_TIME_INC_P1ª%MCLAMP_TGT_RATE_AFTER_TIME_INC_P2¾/CLAMP_TGT_RATE_P1«/CLAMP_TGT_RATE_P2¿-CNP_802P_PRIO_P1»-CNP_802P_PRIO_P2Ï#CNP_DSCP_P1½#CNP_DSCP_P2Ñ5CNP_RES_PRIO_MODE_P1¼5CNP_RES_PRIO_MODE_P2Ð+CQE_COMPRESSIONi z"kËz=)# cnp_dscpnv_roce_cc_ecn0x40.80x0.6UNSIGNEDThe DiffServ Code Point of the generated CNP for this \;port.CNP_DSCP_P1D<')q5 cnp_prio_modenv_roce_cc_ecn0x40.30x0.1BOOLIf set, CNP packets for this port contain priority from \;received request, if unset, use value from cnp_802p_prioCNP_RES_PRIO_MODE_P1;')!- cnp_802p_prionv_roce_cc_ecn0x40.00x0.3UNSIGNEDThe 802.1p priority value of the generated CNP for this \;port\;Default: 7CNP_802P_PRIO_P13:7)-= min_time_between_cnpsnv_roce_cc_ecn0x3C.00x0.17UNSIGNEDMinimum time between sending CNPs from the port, in \;microseconds. \;Default: 0MIN_TIME_BETWEEN_CNPS_P1Z93)‚9 initial_alpha_valuenv_roce_cc_ecn0x38.00x0.10UNSIGNEDThe initial value of alpha to use when receiving the first \;CNP for a flow. Expressed in a fixed point fraction of \;2^10.INITIAL_ALPHA_VALUE_P1 hh”±Ñö.S~›½à$Kp Ù@p«Çä+7)min_time_between_cnpsnv_roce_cc_ecnÎ+minutesnv_file_id_mlnxy/minutesnv_file_id_vendor$)+mlnx_nvconf_enfile_public_key‘+monthnv_file_id_mlnxv/monthnv_file_id_vendor~$1#multi_port_vhca_ennv_hca_conf(*?!multi_port_vhca_supportednv_hca_cap)1ndpnv_rom_debug_levele!1neighbornv_rom_debug_leveld"1netdevicenv_rom_debug_levell1nodnicnv_rom_debug_levelh#!1nodnic_cmdnv_rom_debug_leveli&'1nodnic_devicenv_rom_debug_levelj$#1nodnic_portnv_rom_debug_levelk/;1non_prefetchable_pf_barnv_global_pci_conf8O/non_prefetchable_pf_bar_supportednv_global_pci_cap&5G1non_prefetchable_pf_bar_validnv_global_pci_conf095num_of_allocated_guidsnv_base_mac_guid_cap/75num_of_allocated_macsnv_base_mac_guid_cap!# num_of_pfcnv_qos_conf!#num_of_pfcnv_qos_conf# num_of_tcnv_qos_conf #num_of_tcnv_qos_conf# num_of_vlnv_qos_conf ¿ä6„¿AA))e/ rpg_byte_resetnv_roce_cc_ecn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0=DISABLED)\;Default: 150RPG_BYTE_RESET_P2.@))?/ rpg_time_resetnv_roce_cc_ecn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in microseconds.\;Default: 2RPG_TIME_RESET_P2*?))?/ clamp_tgt_ratenv_roce_cc_ecn0x0.310x0.1BOOLIf set, whenever a CNP is processed, the target rate is \;updated to be the current rate.CLAMP_TGT_RATE_P2‚>G)‚_M clamp_tgt_rate_after_time_incnv_roce_cc_ecn0x0.300x0.1BOOLDefault: True\;When receiving an CNP, the target rate should be updated \;if the transmission rate was increased due to the timer, and \;not only due to the byte counterCLAMP_TGT_RATE_AFTER_TIME_INC_P2 n(ñ3nAE%)k+ rpg_hai_ratenv_roce_cc_ecn0x18.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_HYPER_INCREASE state.\;Default: 50RPG_HAI_RATE_P2:D#)a) rpg_ai_ratenv_roce_cc_ecn0x14.00x0.17UNSIGNEDThe rate, in megabits per second, used to increase rpTar\;getRate in the RPR_ACTIVE_INCREASE.\;Default: 10RPG_AI_RATE_P2‚3C%)ƒQ+ rpg_max_ratenv_roce_cc_ecn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed).\;Default: 0 (Full port speed)RPG_MAX_RATE_P2TB')‚- rpg_thresholdnv_roce_cc_ecn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 5RPG_THRESHOLD_P2 =ÚçC=‚I=)‚=C rate_to_set_on_first_cnpnv_roce_cc_ecn0x28.00x0.17UNSIGNEDThe rate that is set for the flow when a rate limiter is allo\;cated to it upon first CNP received, in Mbps (=Full Port \;Speed).\;Default: 0 Port speedRATE_TO_SET_ON_FIRST_CNP_P2 H%))+ rpg_min_ratenv_roce_cc_ecn0x24.00x0.17UNSIGNEDThe minimum value, in megabits per second, for rate to \;limit.\;Default: 2000RPG_MIN_RATE_P2oG+)‚51  rpg_min_dec_facnv_roce_cc_ecn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50RPG_MIN_DEC_FAC_P21100‚"F)ƒG rpg_gdnv_roce_cc_ecn0x1C.00x0.4UNSIGNEDIf a CNP is received, the flow rate is reduced at the begin\;ning of the next rate_reduce_monitor_period interval to \;(1-Alpha/Gd)*CurrentRate. rpg_gd is given as log2(Gd), \;where Gd may only be powers of 2.\;Default: 7RPG_GD_P2 ŽQ±Ž‚LA)‚mG  rate_reduce_monitor_periodnv_roce_cc_ecn0x34.00x0.17UNSIGNEDThe minimum time between 2 consecutive rate reductions \;for a single flow. Rate reduction will occur only if a CNP \;is received during the relevant time interval.\;Default: 2RATE_REDUCE_MONITOR_PERIOD_P21K#)#)  dce_tcp_rttnv_roce_cc_ecn0x30.00x0.17UNSIGNEDThe time between updates of the alpha value, in microsec\;onds.\;Default: 2DCE_TCP_RTT_P21ƒ+J)…I%  dce_tcp_gnv_roce_cc_ecn0x2C.00x0.10UNSIGNEDUsed to update the congestion estimator (alpha) once \;every dce_tcp_rtt microseconds, according to the equa\;tion:\;Alpha = (cnp_received * dceTcpG) + (1 - dceTcpG) * \;alpha .\;dceTcpG is divided by 2^10.\;cnp_received is set to one if a CNP was received for this \;flow during period since the previous update and the cur\;rent update\;Default: 64DCE_TCP_G_P21 u!iÈÿuQ)# cnp_dscpnv_roce_cc_ecn0x40.80x0.6UNSIGNEDThe DiffServ Code Point of the generated CNP for this \;port.CNP_DSCP_P2EP')q5  cnp_prio_modenv_roce_cc_ecn0x40.30x0.1BOOLIf set, CNP packets for this port contain priority from \;received request, if unset, use value from cnp_802p_prioCNP_RES_PRIO_MODE_P2O')!- cnp_802p_prionv_roce_cc_ecn0x40.00x0.3UNSIGNEDThe 802.1p priority value of the generated CNP for this \;port\;Default: 7CNP_802P_PRIO_P24N7)-= min_time_between_cnpsnv_roce_cc_ecn0x3C.00x0.17UNSIGNEDMinimum time between sending CNPs from the port, in \;microseconds. \;Default: 0MIN_TIME_BETWEEN_CNPS_P2[M3)‚9 initial_alpha_valuenv_roce_cc_ecn0x38.00x0.10UNSIGNEDThe initial value of alpha to use when receiving the first \;CNP for a flow. Expressed in a fixed point fraction of \;2^10.INITIAL_ALPHA_VALUE_P2 ¹_¦ß¹‚"U%)ƒO rpg_max_ratenv_roce_cc_qcn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed)\;Default: 0 (Full port speed)CT')‚ rpg_thresholdnv_roce_cc_qcn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 55S))q rpg_byte_resetnv_roce_cc_qcn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0 = DISABLED).\;Default: 150000R))A rpg_time_resetnv_roce_cc_qcn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in u-seconds.\;Default: 15000 U¤†ª Z%) rpg_min_ratenv_roce_cc_qcn0x24.00x0.17UNSIGNEDThe minimum value, in Mbits per second, for rate to limit.\;Default: \;10XY+)‚5 rpg_min_dec_facnv_roce_cc_qcn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50‚X)ƒK rpg_gdnv_roce_cc_qcn0x1C.00x0.4UNSIGNEDWhen a CNP is received, the flow rate is reduced at the \;beginning of the next rate_reduce_monitor_period inter\;val to (1-Alpha/Gd)*CurrentRate. rpg_gd is given as \;log2(Gd), where Gd may only be powers of 2.\;Default: 7-W%)c rpg_hai_ratenv_roce_cc_qcn0x18.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_HYPER_INCREASE state\;Default: 50'V#)Y rpg_ai_ratenv_roce_cc_qcn0x14.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_ACTIVE_INCREASE.\;Default: 5 00TyÂé1Qr‘µß/U|«Û#)) rpg_time_resetnv_roce_cc_ecn¬$))rpg_time_resetnv_roce_cc_ecnÀ#)) rpg_time_resetnv_roce_cc_qcnÒ$))rpg_time_resetnv_roce_cc_qcnÛ&+-running_versionfile_cs_token_idŽ*+5running_versionfile_dbg_fw_token_idŒ+secondsnv_file_id_mlnxx/secondsnv_file_id_vendor€ -!shared_memory_ennv_rom_iniB)signaturefile_signature‹#))signature_uuidfile_signature‰)9'slot_power_limiter_disnv_power_conf?.E%slot_power_limiter_supportednv_power_capA 1sriov_ennv_global_pci_conf!%1% sriov_routing_modenv_mpfs_conf&1%sriov_routing_modenv_mpfs_conf.E# sriov_routing_mode_supportednv_mpfs_cap/E#sriov_routing_mode_supportednv_mpfs_cap!$'/sriov_supportnv_global_pci_cap3 µ^¤ܵ‚#^%)ƒOrpg_max_ratenv_roce_cc_qcn0x10.00x4.0UNSIGNEDThe maximum rate, in Mbits per second, at which an RP \;can transmit. Once this limit is reached, the RP rate lim\;ited is released and the flow is not rate limited any more \;(0=Full Port Speed)\;Default: 0 (Full port speed)D]')‚rpg_thresholdnv_roce_cc_qcn0xC.00x0.5UNSIGNEDThe number of times rpByteStage or rpTimeStage can \;count before the RP rate control state machine advances \;states.\;Default: 56\))qrpg_byte_resetnv_roce_cc_qcn0x8.00x0.15UNSIGNEDTransmitted data between rate increases if no CNPs are \;received. Given in Bytes (0 = DISABLED).\;Default: 150000[))Arpg_time_resetnv_roce_cc_qcn0x4.00x0.17UNSIGNEDTime between rate increases if no CNPs are received. \;Given in u-seconds.\;Default: 15000 T¢ƒ¦ c%)rpg_min_ratenv_roce_cc_qcn0x24.00x0.17UNSIGNEDThe minimum value, in Mbits per second, for rate to limit.\;Default: \;10Yb+)‚5rpg_min_dec_facnv_roce_cc_qcn0x20.00x0.8UNSIGNEDThe minimum factor by which the current transmit rate \;can be changed when processing a CNP. Value is given as \;a percentage (1-100).\;Default: 50‚a)ƒKrpg_gdnv_roce_cc_qcn0x1C.00x0.4UNSIGNEDWhen a CNP is received, the flow rate is reduced at the \;beginning of the next rate_reduce_monitor_period inter\;val to (1-Alpha/Gd)*CurrentRate. rpg_gd is given as \;log2(Gd), where Gd may only be powers of 2.\;Default: 7.`%)crpg_hai_ratenv_roce_cc_qcn0x18.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_HYPER_INCREASE state\;Default: 50(_#)Yrpg_ai_ratenv_roce_cc_qcn0x14.00x0.17UNSIGNEDThe rate, in Mbits per second, used to increase rpTarget\;Rate in the RPR_ACTIVE_INCREASE.\;Default: 5 iÑ¡tF縈a9îÅ›tL%óË¥i:< 7 1nv_external_port_ctrl’NIC0EXTERNAL PORT CTRL$; !  nv_hca_capNIC0HCA CAP&: # nv_hca_confNIC0HCA CONF09 - 'nv_virt_net_addrNIC0 VIRT NET ADDR%8 # nv_wol_confNIC0WOL CONF&7 #   nv_mpfs_cap—NIC0MPFS CAP%6 #    nv_mpfs_cap—NIC0MPFS CAP(5 %  nv_mpfs_conf–NIC0MPFS CONF'4 %   nv_mpfs_conf–NIC0MPFS CONF$3 !   nv_qos_cap“NIC0QOS CAP#2 !    nv_qos_cap“NIC0QOS CAP&1 #  nv_qos_conf’NIC0 QOS CONF%0 #   nv_qos_conf’NIC0 QOS CONF./ +  %nv_keep_link_upNIC2KEEP LINK UP-. +  % nv_keep_link_upNIC2KEEP LINK UP.- +  %nv_lldp_nb_dcbxŽNIC0LLDP NB DCBX-, +  % nv_lldp_nb_dcbxŽNIC0LLDP NB DCBX,+ )   #nv_lldp_nb_cap NIC1 LLDP NB CAP+* )   # nv_lldp_nb_cap NIC1 LLDP NB CAP.) +  %nv_lldp_nb_conf NIC1 LLDP NB CONF-( +  % nv_lldp_nb_conf NIC1 LLDP NB CONF ˆ ƒof++… G1O I lldp_nb_rx_modenv_lldp_nb_conf0x0.280x0.2ENUMEnable the internal LLDP client, and define which TLV it \;will process.\;0x0: OFF - Not listen for incoming LLDP BPDU (incom\;ing LLDP frames will be routed to the host)\;0x1: MANDATORY - Listen for incoming LLDP frames, \;store only the mandatory LLDP BPDUs (1..3)\;0x2: ALL - Receive and store all incoming LLDP BPDUsOFF=0x0,MANDATORY=0x1,ALL=0x2LLDP_NB_RX_MODE_P1$nv_lldp_nb_cap.lldp_nb_rx_cap!=0$nv_lldp_nb_cap.lldp_nb_rx_capye%+#+Q lldp_nb_dcbxnv_lldp_nb_conf0x0.270x0.1BOOLEnable DCBXLLDP_NB_DCBX_P1$nv_lldp_nb_cap.lldp_nb_dcbx_en!=0ud5+e lldp_msg_tx_intervalnv_lldp_nb_conf0x0.00x0.12UNSIGNEDInterval for sending LLDP NB PDUs in seconds yS¹y‚Yp‡s—²Íæÿ‹9PÞ¶)t˜·Û1nv_rom_debug_level]*Wnv_rom_iscsi_connect_to_second_targetV'Qnv_rom_iscsi_first_target_chap_pwdU&Onv_rom_iscsi_first_target_chap_idT#Inv_rom_iscsi_first_target_nameS"Gnv_rom_iscsi_first_target_lunR%nv_power_cap'nv_power_conf! nv_qos_cap2!nv_qos_cap3# nv_qos_conf0#nv_qos_conf1-nv_roce_1_5_conf! nv_roce_cc"!nv_roce_cc#) nv_roce_cc_ecn$)nv_roce_cc_ecn%) nv_roce_cc_qcn&)nv_roce_cc_qcn'7nv_rom_banner_timeout@/nv_rom_boot_conf1A/nv_rom_boot_conf2=!nv_rom_cap7nv_rom_dhcp_vendor_idE7nv_rom_flexboot_debug?3nv_rom_ib_boot_confB3nv_rom_ib_dhcp_confC!nv_rom_ini)Unv_rom_iscsi_connect_to_first_targetO/nv_rom_iscsi_dhcpN#Inv_rom_iscsi_first_target_addrP#Inv_rom_iscsi_first_target_portQ?nv_rom_iscsi_general_confD#Inv_rom_iscsi_initiator_chap_idL$Knv_rom_iscsi_initiator_chap_pwdM IEr=Ip‚;+‚'A do_not_clear_port_statsnv_keep_link_up0x0.40x0.1BOOLWhen set, the port statistic counters are not cleared on first \;host init. When cleared the port statistics are cleared on first \;host initDO_NOT_CLEAR_PORT_STATS_P1‚1‚;+ƒ+A keep_link_up_on_standbynv_keep_link_up0x0.30x0.1BOOLWhen set, the NIC keeps the link up from power-up until \;the server is turned on, and when the server is in standby \;mode (applicable only if the host PCI rails can provide \;enough power in standby mode).KEEP_LINK_UP_ON_STANDBY_P1O‚5+s; keep_link_up_on_bootnv_keep_link_up0x0.20x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode and a driver is not initialized.KEEP_LINK_UP_ON_BOOT_P17‚++W1 keep_ib_link_upnv_keep_link_up0x0.10x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (InfiniBand only).KEEP_IB_LINK_UP_P1 oo“Àê 3Y}ªÔ 4[z¦ÇëIƒ°Ú##1num_pf_msixnv_global_pci_conf$,7/num_pf_msix_supportednv_global_pci_cap))/1num_pf_msix_validnv_global_pci_conf1num_pfsnv_global_pci_conf(//num_pfs_supportednv_global_pci_cap+%'1num_pfs_validnv_global_pci_conf##1num_vf_msixnv_global_pci_conf%,7/num_vf_msix_supportednv_global_pci_cap*)/1num_vf_msix_validnv_global_pci_conf5A7number_of_pci_switch_lanesnv_pci_switch_evb_cap>)7'nvia_nvconfig_on_bootnv_debug_mode&1'nvia_nvlog_on_bootnv_debug_mode‘-ocsd_ennv_rom_ocsd_ocbb+31one_qp_per_recoverynv_sw_offload_confj -!option_rom_debugnv_rom_ini_#'-packet_pacingnv_packet_pacingr(%7panic_bannernv_rom_flexboot_debug14=9pci_switch_lanes_mappingnv_pci_switch_evb_conf=9G9pci_switch_lanes_remapping_ennv_pci_switch_evb_conf<,7/pf_bar_size_supportednv_global_pci_cap')/1pf_bar_size_validnv_global_pci_conf%7!platform_to_driver_ennv_rom_iniP ~Dˆ´~‚2‚ ;+ƒ+A  keep_link_up_on_standbynv_keep_link_up0x0.30x0.1BOOLWhen set, the NIC keeps the link up from power-up until \;the server is turned on, and when the server is in standby \;mode (applicable only if the host PCI rails can provide \;enough power in standby mode).KEEP_LINK_UP_ON_STANDBY_P2P‚ 5+s;  keep_link_up_on_bootnv_keep_link_up0x0.20x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode and a driver is not initialized.KEEP_LINK_UP_ON_BOOT_P28‚++W1  keep_ib_link_upnv_keep_link_up0x0.10x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (InfiniBand only).KEEP_IB_LINK_UP_P28‚-+S3 keep_eth_link_upnv_keep_link_up0x0.00x0.1BOOLWhen set, the NIC keeps the link up as long as the server is \;not in standby mode (Ethernet only).KEEP_ETH_LINK_UP_P2 „ „ƒ‚ #ƒoy% ? num_of_vlnv_qos_conf0x0.00x0.4ENUM\;Number of Infiniband Virtual Lanes for this port, (ssee \;vl_admin in PVLC Register)\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs --VL0, VL14 (VL15 is always present for MADs)_1_VL=0x1,_2_VLs=0x2,_4_VLs=0x3,_8_VLs=0x4,_15_VLs=0x5NUM_OF_VL_P11$nv_qos_cap.max_num_of_vlq‚ ;+‚'A do_not_clear_port_statsnv_keep_link_up0x0.40x0.1BOOLWhen set, the port statistic counters are not cleared on first \;host init. When cleared the port statistics are cleared on first \;host initDO_NOT_CLEAR_PORT_STATS_P2 ðS‚!#u' ; num_of_pfcnv_qos_conf0x0.80x0.4UNSIGNEDNumber of IEEE priorities that may simultaneously sup\;port flow control. \; (see pfc_cap_admin DCBX_PARAM Register)NUM_OF_PFC_P1$nv_qos_cap.max_num_pfc„ ‚ #„99% Q num_of_tcnv_qos_conf0x0.40x0.4ENUMNumber of traffic classes, when DCB-X is enabled, this is \;the maximum number of TC that can negotiated with the \;remote peer. (see num_of_tc_admin in DCBX_PARAM \;Register)\;0x0: _8_TCs\;0x1: _1_TC\;0x2: _2_TCs\;0x3: _3_TCs\;0x4: _4_TCs\;0x5: _5_TCs\;0x6: _6_TCs\;0x7: _7_TCs_8_TCs=0x0,_1_TC=0x1,_2_TCs=0x2,_3_TCs=0x3,_4_TCs=0x4,_5_TCs=0x5,_6_TCs=0x6,_7_TCs=0x7NUM_OF_TC_P1($nv_qos_cap.max_num_of_tc==0)?0:1($nv_qos_cap.max_num_of_tc==0)?7:$nv_qos_cap.max_num_of_tc gxg„ ‚#„99% Q num_of_tcnv_qos_conf0x0.40x0.4ENUMNumber of traffic classes, when DCB-X is enabled, this is \;the maximum number of TC that can negotiated with the \;remote peer. (see num_of_tc_admin in DCBX_PARAM \;Register)\;0x0: _8_TCs\;0x1: _1_TC\;0x2: _2_TCs\;0x3: _3_TCs\;0x4: _4_TCs\;0x5: _5_TCs\;0x6: _6_TCs\;0x7: _7_TCs_8_TCs=0x0,_1_TC=0x1,_2_TCs=0x2,_3_TCs=0x3,_4_TCs=0x4,_5_TCs=0x5,_6_TCs=0x6,_7_TCs=0x7NUM_OF_TC_P2($nv_qos_cap.max_num_of_tc==0)?0:1($nv_qos_cap.max_num_of_tc==0)?7:$nv_qos_cap.max_num_of_tcƒ‚#ƒoy% ? num_of_vlnv_qos_conf0x0.00x0.4ENUM\;Number of Infiniband Virtual Lanes for this port, (ssee \;vl_admin in PVLC Register)\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs --VL0, VL14 (VL15 is always present for MADs)_1_VL=0x1,_2_VLs=0x2,_4_VLs=0x3,_8_VLs=0x4,_15_VLs=0x5NUM_OF_VL_P21$nv_qos_cap.max_num_of_vl ä(îdä}‚#! max_num_pfcnv_qos_cap0x0.80x0.4UNSIGNEDMaximum number of priority flow control\;supported_from_version: 1‚'! max_num_of_tcnv_qos_cap0x0.40x0.4UNSIGNEDMaximum number of traffic classes supported by the NIC, \;where 0 => 8 TC‚6‚'!ƒy max_num_of_vlnv_qos_cap0x0.00x0.4ENUMMaximum number of VLs supported by the HBA.\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs -- VL0..VL14 (VL15 is always present for MADs)_1_VL=0x1,_2_VLs=0x2,_4_VLs=0x3,_8_VLs=0x4,_15_VLs=0x5T‚!#u' ;  num_of_pfcnv_qos_conf0x0.80x0.4UNSIGNEDNumber of IEEE priorities that may simultaneously sup\;port flow control. \; (see pfc_cap_admin DCBX_PARAM Register)NUM_OF_PFC_P2$nv_qos_cap.max_num_pfc ¹Å:¹~‚#!max_num_pfcnv_qos_cap0x0.80x0.4UNSIGNEDMaximum number of priority flow control\;supported_from_version: 1‚'!max_num_of_tcnv_qos_cap0x0.40x0.4UNSIGNEDMaximum number of traffic classes supported by the NIC, \;where 0 => 8 TC‚7‚'!ƒymax_num_of_vlnv_qos_cap0x0.00x0.4ENUMMaximum number of VLs supported by the HBA.\;0x1: _1_VL - VL0 only\;0x2: _2_VLs - VL0, VL1\;0x3: _4_VLs - VL0..VL3\;0x4: _8_VLs - VL0..VL7\;0x5: _15_VLs -- VL0..VL14 (VL15 is always present for MADs)_1_VL=0x1,_2_VLs=0x2,_4_VLs=0x3,_8_VLs=0x4,_15_VLs=0x5 "6"‚‚1%‚+=e sriov_routing_modenv_mpfs_conf0x0.300x0.1ENUMSelect the IB routing mode for Virtual Functions\;0x0: GID - Each VF has a unique GID\;0x1: LID\; - Each VF has a unique LIDGID=0x0,LID=0x1SRIOV_IB_ROUTING_MODE_P1$nv_mpfs_cap.sriov_routing_mode_supported!=0ƒF‚A%…-G/ duplicated_mac_action_modenv_mpfs_conf0x0.00x0.4ENUMDefines the forwarding behavior in MPFS for MACs which are \;duplicated in more than one PF.\;0x0: LAST_CFG - last PF which added the MAC will receive \;the traffic.\;0x1: LOAD_BALANCE - MPFS will load-balance ipv4 traffic \;for packets with destination MAC addresses that belong to \;more than one PF between all PFs that have this MACLAST_CFG=0x0,LOAD_BALANCE=0x1DUP_MAC_ACTION_P1 ÙƒG‚A%…-G/ duplicated_mac_action_modenv_mpfs_conf0x0.00x0.4ENUMDefines the forwarding behavior in MPFS for MACs which are \;duplicated in more than one PF.\;0x0: LAST_CFG - last PF which added the MAC will receive \;the traffic.\;0x1: LOAD_BALANCE - MPFS will load-balance ipv4 traffic \;for packets with destination MAC addresses that belong to \;more than one PF between all PFs that have this MACLAST_CFG=0x0,LOAD_BALANCE=0x1DUP_MAC_ACTION_P2‚#‚+%‚C+1_ ib_routing_modenv_mpfs_conf0x0.310x0.1ENUMSelect the routing mode for Infiniband among the PFs (and \;hosts, if applicable)\;0x0: GID - each PF has a unique GID\;0x1: LID - each PF has a unique LIDGID=0x0,LID=0x1IB_ROUTING_MODE_P1$nv_mpfs_cap.ib_routing_mode_supported!=0 8ëÃF¨8m‚ ?#[ ib_routing_mode_supportednv_mpfs_cap0x0.310x0.1BOOLWhen set, IB_ROUTING_MODE is supported.‚Y# default_mpfs_host_port_state_supportednv_mpfs_cap0x0.300x0.1BOOLWhen set, NV_MPFS_CONF.default_mpfs_host_port_state is \;configurable.z‚E#o sriov_routing_mode_supportednv_mpfs_cap0x0.290x0.1BOOLWhen set SRIOV_IB_ROUTING_MODE is \;configurable.‚$‚+%‚C+1_ ib_routing_modenv_mpfs_conf0x0.310x0.1ENUMSelect the routing mode for Infiniband among the PFs (and \;hosts, if applicable)\;0x0: GID - each PF has a unique GID\;0x1: LID - each PF has a unique LIDGID=0x0,LID=0x1IB_ROUTING_MODE_P2$nv_mpfs_cap.ib_routing_mode_supported!=0‚‚1%‚+=e sriov_routing_modenv_mpfs_conf0x0.300x0.1ENUMSelect the IB routing mode for Virtual Functions\;0x0: GID - Each VF has a unique GID\;0x1: LID\; - Each VF has a unique LIDGID=0x0,LID=0x1SRIOV_IB_ROUTING_MODE_P2$nv_mpfs_cap.sriov_routing_mode_supported!=0 F‚ãr‡êF ‚&)-Kvirtual_mac_ennv_virt_net_addr0x0.310x0.1BOOLWhen set, the PF will use the address defined in the "virtual_mac" instead of the original MAC.‚%--9erase_on_powerupnv_virt_net_addr0x0.290x0.1BOOLWhen this bit is set, the MAC is ignored by firmware and the TLV is erased on powerup.g‚$%#‚O% en_wol_magicnv_wol_conf0x0.100x0.1BOOLEnable server Wake-on-LAN upon reception of WOL magic packet.\;Support for this feature is indicated by the corresponding bit in the Wake on LAN Capabilities TLVWOL_MAGIC_ENn‚#?#[ib_routing_mode_supportednv_mpfs_cap0x0.310x0.1BOOLWhen set, IB_ROUTING_MODE is supported.‚"Y#default_mpfs_host_port_state_supportednv_mpfs_cap0x0.300x0.1BOOLWhen set, NV_MPFS_CONF.default_mpfs_host_port_state is \;configurable.{‚!E#osriov_routing_mode_supportednv_mpfs_cap0x0.290x0.1BOOLWhen set SRIOV_IB_ROUTING_MODE is \;configurable. %««ÃÛø "7L_t’°Èä÷ .=Oaq•¥Èë -B\vªÁÕé1LLDP_NB_TX_MODE_P1ç1LLDP_NB_TX_MODE_P2í;LOG_DCR_HASH_TABLE_SIZEƒ-LRO_LOG_TIMEOUT0m-LRO_LOG_TIMEOUT1n-LRO_LOG_TIMEOUT2o-LRO_LOG_TIMEOUT3p)MEMIC_BAR_SIZE -MEMIC_SIZE_LIMIT=MIN_TIME_BETWEEN_CNPS_P1º=MIN_TIME_BETWEEN_CNPS_P2Î1MULTI_PORT_VHCA_EN(;NON_PREFETCHABLE_PF_BAR'NUM_OF_PFC_P1'NUM_OF_PFC_P2%NUM_OF_TC_P1 %NUM_OF_TC_P2!NUM_OF_VFS%NUM_OF_VL_P1 %NUM_OF_VL_P2#NUM_PF_MSIX$#NUM_VF_MSIX%+PF_LOG_BAR_SIZE"!PORT_OWNER*"GRATE_REDUCE_MONITOR_PERIOD_P1¸"GRATE_REDUCE_MONITOR_PERIOD_P2Ì CRATE_TO_SET_ON_FIRST_CNP_P1µ CRATE_TO_SET_ON_FIRST_CNP_P2É+RENEG_ON_CHANGE,5ROCE_CC_ALGORITHM_P1§5ROCE_CC_ALGORITHM_P2©5ROCE_CC_PRIO_MASK_P1¦5ROCE_CC_PRIO_MASK_P2¨1ROCE_NEXT_PROTOCOL)RPG_AI_RATE_P1°)RPG_AI_RATE_P2Ä/RPG_BYTE_RESET_P1­ -”ßRK-‚‚+/7ƒ/ allow_rd_countersnv_external_port_ctrl0x0.10x0.1BOOLIf Set, Indicates this function of this host allowed to rd \;counters of external physical port. For Multi-Host should \;be 0 for each host and PF. For Single Host Should be set to \;1 for PF0.ALLOW_RD_COUNTERS‚‚*!7‚}! port_ownernv_external_port_ctrl0x0.00x0.1BOOLIf Set, Indicates this function of this host own the external \;physical port. Default: For Multi-Host should be 0 for \;each host and PF. For Single Host Should be set to 1 for \;PF0.PORT_OWNER ‚)?!multi_port_vhca_supportednv_hca_cap0x0.310x0.1BOOLWhen\; set NV_HCA_CONF.\;multi_port_vhca_en\; bit is configu\;rable1‚(1#}1] multi_port_vhca_ennv_hca_conf0x0.310x0.1BOOLWhen set, the PF reports the multi-port-vhca capability.MULTI_PORT_VHCA_EN$nv_hca_cap.multi_port_vhca_supported!=0i‚'#-avirtual_macnv_virt_net_addr0x4.240x8.0BYTESAn alternate MAC for this PCI PF (48bits). 00ƒL‚,+7…{+  reneg_on_changenv_external_port_ctrl0x0.20x0.1BOOLWhen cleared, a link-down/up sequence from the driver \;(PAOS) triggers re-negotiation of the link speed and \;parameters with the remote peer. When set, a link down/\;up sequence will trigger re-negotiation only if any link \;parameters were changed by a driver since last link nego\;tiation. \;This parameter is applicable when the port_owner param\;eter is set for this PFRENEG_ON_CHANGE wÈ’RÚžbÙ‡-ÛwbI [ Unv_rom_iscsi_initiator_primary_dns_addr5EXP_ROM0ROM ISCSI INITIATOR PRIMARY DNS ADDRPH I Cnv_rom_iscsi_initiator_gateway4EXP_ROM0ROM ISCSI INITIATOR GATEWAYXG Q Knv_rom_iscsi_initiator_subnet_mask3EXP_ROM0ROM ISCSI INITIATOR SUBNET MASKPF I Cnv_rom_iscsi_initiator_ip_addr2EXP_ROM0ROM ISCSI INITIATOR IP ADDR?E 7 1nv_rom_dhcp_vendor_id1EXP_ROM0ROM DHCP VENDOR IDFD ? 9nv_rom_iscsi_general_conf0EXP_ROM2 ROM ISCSI GENERAL CONF:C 3 -nv_rom_ib_dhcp_conf#EXP_ROM0ROM IB DHCP CONF:B 3 -nv_rom_ib_boot_conf"EXP_ROM0ROM IB BOOT CONF6A / )nv_rom_boot_conf1!EXP_ROM1ROM BOOT CONF1>@ 7 1nv_rom_banner_timeoutEXP_ROM0ROM BANNER TIMEOUT>? 7 1nv_rom_flexboot_debugEXP_ROM0ROM FLEXBOOT DEBUG4> - 'nv_rom_uefi_conf–EXP_ROM0ROM UEFI CONF6= / )nv_rom_boot_conf2•EXP_ROM2ROM BOOT CONF2 Ô7‚.//iundi_network_waitnv_rom_boot_conf20x0.160x0.8UNSIGNEDThe number of seconds Flexboot waits after issuing a \;UNDI open commands until it starts using the interface.„(‚-#/†GgA boot_ip_vernv_rom_boot_conf20x0.80x0.2ENUMSelect which IP protocol version will be used by Flexboot. \;If both are configured, Flexboot will try to boot with the \;2nd protocol only if DHCP parameters for the first proto\;col are not available or if booting with the first protocol \;has failed.\;This field is supported if the "nv_config_boot_ip_ver" field \;in "OPTION ROM capabilities" is set to 1.\;0x0: IPv4\;0x1: IPv6\;0x2: IPv4_IPv6\;0x3: IPv6_IPv4IPv4=0x0,IPv6=0x1,IPv4_IPv6=0x2,IPv6_IPv4=0x3IP_VER$nv_rom_cap.boot_ip_ver!=0 aâñúa‚2'7-boot_to_shellnv_rom_flexboot_debug0x0.310x0.1BOOLWhen this bit is set, Flexboot will boot to ipxe shell instead \;of normal boot.s‚1%7‚)Opanic_bannernv_rom_flexboot_debug0x0.290x0.2ENUMFlexboot behavior on critical failure \;0x0: PRINT -\; \;p\;rint error to screen\;0x1: HALT - freeze system\;0x2: OPEN_SHELL - open ipxe shellPRINT=0x0,HALT=0x1,OPEN_SHELL=0x2m‚0-‚'#E hii_ennv_rom_uefi_conf0x0.310x0.1BOOLDescription:When set, UEFI HII menus are enabled for \;this PCI function.\;This bit is applicable only if NV_ROM_CAP. hii_con\;fig_en is set.UEFI_HII_EN$nv_rom_cap.hii_config_en!=0‚‚/'-ƒAuefi_undi_disnv_rom_uefi_conf0x0.300x0.1BOOLDisable the UEFI expansion ROM support for the UNDI \;driver, which prevents the UEFI BIOS from using this PCI \;function for networking.\;This parameter is supported only if NV_ROM_CAP. \;uefi_undi_config_en\; is set. õõ Om’°à2Y§Îù%S‚œ¿á*11ip_over_vxlan_portnv_sw_offload_confl.;/ip_over_vxlan_supportednv_sw_offload_capq1ipv4nv_rom_debug_levelq$%/ipv4_dhcp_ennv_rom_iscsi_dhcpO1ipv6nv_rom_debug_levelr/+?iscsi_drive_numnv_rom_iscsi_general_confD57?iscsi_keep_san_dev_ennv_rom_iscsi_general_conf@'kdnet_ennv_kdnet_data;&-+ keep_eth_link_upnv_keep_link_up'-+keep_eth_link_upnv_keep_link_up%++ keep_ib_link_upnv_keep_link_up&++keep_ib_link_upnv_keep_link_up*5+ keep_link_up_on_bootnv_keep_link_up+5+keep_link_up_on_bootnv_keep_link_up -;+ keep_link_up_on_standbynv_keep_link_up.;+keep_link_up_on_standbynv_keep_link_up +keyfile_public_key—"%+keypair_uuidfile_public_key–!%)keypair_uuidfile_signatureŠ)!lacp_config_ennv_rom_capc FÎimF‚#‚6-/‚- ) boot_retry_countnv_rom_boot_conf10x0.240x0.3ENUMNumber of retries to attempt in case of boot failure (FlexBoot)\;0x0: NONE\;0x1: _1\;0x2: _2\;0x3: _3\;0x4: _4\;0x5: _5\;0x6: _6\;0x7: UNLIMITEDNONE=0x0,_1=0x1,_2=0x2,_3=0x3,_4=0x4,_5=0x5,_6=0x6,UNLIMITED=0x7BOOT_RETRY_CNTx‚55/S5 legacy_boot_protocolnv_rom_boot_conf10x0.160x0.8ENUMSelect boot protocol for legacy BIOS expansion ROM \;(Flexboot)\;0x0: NONE\;0x1: PXE\;0x2: ISCSI\;0x3: BOTH - PXE + iSCSINONE=0x0,PXE=0x1,ISCSI=0x2,BOTH=0x3LEGACY_BOOT_PROTOCOLb‚4/? boot_vlannv_rom_boot_conf10x0.00x0.12UNSIGNEDVLAN ID for network boot.BOOT_VLAN‚.‚3;7ƒEflexboot_banner_timeoutnv_rom_banner_timeout0x0.00x0.4UNSIGNEDNumber of seconds to wait when displaying the timer for \;the boot menu keypress. If set to 0 the boot menu is dis\;abled. The boot menu is only allowed to write values \;between 1 and 15. UEFI and mlxconfig may write 0. tøˆtƒ‚:/3„+client_identifiernv_rom_ib_dhcp_conf0x0.240x0.4ENUMSelect if the expansion ROM should add a Client Identi\;fier to DHCP DISCOVER and REQUEST packets over \;Infiniband.\;0x0: ROM_DEFAULT \;0x1: NO_CLIENT_IDENTIFIER\;0x2: SEND_CLIENT_IDENTIFIER\;When set, the UEFI driver modifies the DHCP packet sent \;by the uppr layers.ROM_DEFAULT=0x0,NO_CLIENT_IDENTIFIER=0x1,SEND_CLIENT_IDENTIFIER=0x2s‚93] boot_pkeynv_rom_ib_boot_conf0x0.00x0.16UNSIGNEDInfinib and P_Key to be used by PXE bootBOOT_PKEYm‚8%/Q% boot_vlan_ennv_rom_boot_conf10x0.300x0.1BOOLEnable VLAN mode for network boot.BOOT_VLAN_EN‚‚7/‚I'G lacp_disnv_rom_boot_conf10x0.290x0.1BOOLWhen set, flexboot does not respond to LACP configuration \;frames from the switch. This setting is supported when \;NV_ROM_CAP.\;lacp_config_en\; bit is set.BOOT_LACP_DIS$nv_rom_cap.lacp_config_en!=0 „¬ „‚>3?u  chap_mutual_auth_ennv_rom_iscsi_general_conf0x0.280x0.1BOOLAuthenticate the target to the initiator using CHAP.‚=/?/tcp_timestamps_ennv_rom_iscsi_general_conf0x0.270x0.1BOOLEnable the TCP timestamps option for iSCSI TCP con\;nections.\;xuefi: tcpTimestmpX‚<?9  vlan_ennv_rom_iscsi_general_conf0x0.260x0.1BOOLEnable VLANs for iSCSIƒu‚;)?†i boot_to_targetnv_rom_iscsi_general_conf0x0.220x0.2ENUMBoot to iSCSI target after connection\;0x0: ENABLED - Boot from target\;0x1: DISABLED - Don"t boot from target (target will \;hooked if configured and iscsi_keep_san_dev_en is set)\;0x2: ONE_TIME_DISABLED - Used for installing a new \;OS on the ISCSI target. Flexboot will not boot from the \;target once (e.g. DISABLED), and then will automati\;cally change the value to ENABLED.ENABLED=0x0,DISABLED=0x1,ONE_TIME_DISABLED=0x2 ‚èy» q‚D+?‚ [ iscsi_drive_numnv_rom_iscsi_general_conf0x8.160x0.8ENUMThe HDD number for the hooked iSCSI target in legacy \;BIOS int13 drive table.\;0x80: HDD1\;0x81: HDD2\;0x82: HDD3\;0x83: HDD4HDD1=0x80,HDD2=0x81,HDD3=0x82,HDD4=0x83-‚C1?E  link_up_delay_timenv_rom_iscsi_general_conf0x8.80x0.8UNSIGNEDNumber of seconds to wait after the link comes up before \;sending packets over the network.:‚B5?[  lun_busy_retry_countnv_rom_iscsi_general_conf0x8.00x0.8UNSIGNEDNumber of connection attempts to make if the iSCSI tar\;get is busy. Valid values are between 0 and 60.l‚A?_  vlannv_rom_iscsi_general_conf0x4.00x0.12UNSIGNEDVLAN number. Only valid when vlan_en is 1‚@7?iscsi_keep_san_dev_ennv_rom_iscsi_general_conf0x0.300x0.1BOOLKeep the iSCSI device attached for the OS \;supported_from_version: 2{‚?%?u  chap_auth_ennv_rom_iscsi_general_conf0x0.290x0.1BOOLAuthenticate the initiator to the target using CHAP. §‘ß(l§A‚I[ivaluenv_rom_iscsi_initiator_primary_dns_addr0x0.240x10.0STRINGPrimary IPv4 DNS for iSCSI initiator in dotted decimal \;notation (Flexboot)\;xuefi: IscsiInitiatorIpv4PrimDns8‚HIivaluenv_rom_iscsi_initiator_gateway0x0.240x10.0STRINGIPv4 gateway for the iSCSI initiator in dotted decimal nota\;tion (Flexboot)\;xuefi: IscsiInitiatorIpv4Gateway3‚GQWvaluenv_rom_iscsi_initiator_subnet_mask0x0.240x10.0STRINGiSCSI initiator IPv4 subnet mask in dotted decimal notation \;(Flexboot)\;xuefi: IscsiInitiatorSubnet.‚FIUvaluenv_rom_iscsi_initiator_ip_addr0x0.240x10.0STRINGiSCSI initiator IPv4 address in dotted decimal notation \;(Flexboot) \;xuefi: IscsiInitiatorIpv4Addrl‚E7avaluenv_rom_dhcp_vendor_id0x0.240x100.0STRINGFlexboot DHCP Vendor ID\;xuefi: DhcpVendId n˜Kø¤l¼jÇnWT O Inv_rom_iscsi_first_target_chap_idEEXP_ROM0€ROM ISCSI FIRST TARGET CHAP IDQS I Cnv_rom_iscsi_first_target_nameDEXP_ROM0àROM ISCSI FIRST TARGET NAMENR G Anv_rom_iscsi_first_target_lunCEXP_ROM0ROM ISCSI FIRST TARGET LUNPQ I Cnv_rom_iscsi_first_target_portBEXP_ROM0ROM ISCSI FIRST TARGET PORTPP I Cnv_rom_iscsi_first_target_addrAEXP_ROM0ROM ISCSI FIRST TARGET ADDR\O U Onv_rom_iscsi_connect_to_first_target@EXP_ROM0ROM ISCSI CONNECT TO FIRST TARGET6N / )nv_rom_iscsi_dhcp:EXP_ROM0ROM ISCSI DHCPRM K Env_rom_iscsi_initiator_chap_pwd9EXP_ROM0ROM ISCSI INITIATOR CHAP PWDQL I Cnv_rom_iscsi_initiator_chap_id8EXP_ROM0€ROM ISCSI INITIATOR CHAP IDKK C =nv_rom_iscsi_initiator_name7EXP_ROM0àROM ISCSI INITIATOR NAMEfJ _ Ynv_rom_iscsi_initiator_secondary_dns_addr6EXP_ROM0ROM ISCSI INITIATOR SECONDARY DNS ADDR [7¡û[‚MK/valuenv_rom_iscsi_initiator_chap_pwd0x0.240x10.0STRINGCHAP secret (password) for the initiator (Flexboot)\;xuefi: IscsiInitiatorChapPwd"‚LI;valuenv_rom_iscsi_initiator_chap_id0x0.240x80.0STRINGCHAP identifier (user name) for iSCSI initiator (Flexboot)\;xuefi: IscsiInitiatorChapId€ƒ‚KC…!valuenv_rom_iscsi_initiator_name0x0.240xe0.0STRINGThis configuration sets the initiator name for iSCSI boot. \;According to the iSCSI RFC (3270) the name has to be \;UTF-8 encoded, with total length no more than 223 bytes. It \;allows international characters, but prohibits the use of \;invisible characters, such as whitespace characters. (Flex\;boot)\;xuefi: IscsiInitiatorNameàE‚J_mvaluenv_rom_iscsi_initiator_secondary_dns_addr0x0.240x10.0STRINGSecondary IPv4 DNS for iSCSI initiator in dotted decimal \;notation. (Flexboot)\;xuefi: IscsiInitiatorIpv4SecDns cŠµà<r¡Íü,Wƒc¯Ü4W}¢Êä&-+vendor_nvconf_enfile_public_key’*Ivaluenv_rom_iscsi_initiator_gatewayH*Ivaluenv_rom_iscsi_initiator_ip_addrF'Cvaluenv_rom_iscsi_initiator_nameK3[valuenv_rom_iscsi_initiator_primary_dns_addrI5_valuenv_rom_iscsi_initiator_secondary_dns_addrJ.Qvaluenv_rom_iscsi_initiator_subnet_maskG+Kvaluenv_rom_iscsi_second_target_addrX.Qvaluenv_rom_iscsi_second_target_chap_id\/Svaluenv_rom_iscsi_second_target_chap_pwd]*Ivaluenv_rom_iscsi_second_target_lunZ+Kvaluenv_rom_iscsi_second_target_name[+Kvaluenv_rom_iscsi_second_target_portY,7/vf_bar_size_supportednv_global_pci_cap()/1vf_bar_size_validnv_global_pci_conf-9/vf_qos_control_supportnv_global_pci_cap2"#-virtual_macnv_virt_net_addr'%)-virtual_mac_ennv_virt_net_addr&$?vlannv_rom_iscsi_general_confA'?vlan_ennv_rom_iscsi_general_conf<+yearnv_file_id_mlnxw/yearnv_file_id_vendor “]­åI“2‚RI_valuenv_rom_iscsi_first_target_port0x0.240x8.0STRINGTCP port for the first iSCSI target (Flexboot)\;Decimal integer in ASCII format up to 5 digits (1-65536).‚QI)valuenv_rom_iscsi_first_target_addr0x0.240x10.0STRINGIPv4 address of the first iSCSI target in dotted decimal nota\;tion (Flexboot)D‚PUwvaluenv_rom_iscsi_connect_to_first_target0x0.240x8.0STRINGWhen the string is "Enabled" Flexboot attempt to connect to \;the first ISCSI target. Other legal value is "Disabled",‚O%/eipv4_dhcp_ennv_rom_iscsi_dhcp0x0.310x0.1BOOLWhen enabled, Flexboot attempt to discover IPv4 configu\;ration for iSCSI through DHCP.\;xuefi: TcpIpViaDhcp‚N'/Idhcp_iscsi_ennv_rom_iscsi_dhcp0x0.300x0.1BOOLWhen enabled, Flexboot attempt to discover iSCSI parameters through DHCP.\;xuefi: IscsiViaDhcp PQu–Ãò,–mã¾0PF]u†œ²ÉÜï;nv_rom_uefi_debug_level^(Snv_rom_iscsi_second_target_chap_pwd\'Qnv_rom_iscsi_second_target_chap_id[$Knv_rom_iscsi_second_target_nameZ#Inv_rom_iscsi_second_target_lunY$Knv_rom_iscsi_second_target_portX$Knv_rom_iscsi_second_target_addrW#Inv_rom_iscsi_initiator_ip_addrF Cnv_rom_iscsi_initiator_nameK,[nv_rom_iscsi_initiator_primary_dns_addrI._nv_rom_iscsi_initiator_secondary_dns_addrJ'Qnv_rom_iscsi_initiator_subnet_maskG-nv_rom_ocsd_ocbb-nv_rom_uefi_conf>/nv_sw_offload_cap1nv_sw_offload_conf#nv_tpt_conf -nv_virt_net_addr9- nv_vpi_link_type -nv_vpi_link_type!'nv_vts_bank_a'nv_vts_bank_b#nv_wol_conf8 ‚^Ø_é ‚‚XK+valuenv_rom_iscsi_second_target_addr0x0.240x10.0STRINGIPv4 address of the second iSCSI target in dotted decimal \;notation (Flexboot)E‚WWwvaluenv_rom_iscsi_connect_to_second_target0x0.240x8.0STRINGWhen the string is "Enabled" Flexboot attempt to connect to \;the first ISCSI target. Other legal value is "Disabled"s‚VQYvaluenv_rom_iscsi_first_target_chap_pwd0x0.240x10.0STRINGiSCSI first target password (Flexboot)v‚UO_valuenv_rom_iscsi_first_target_chap_id0x0.240x80.0STRINGiSCSI first target username/id (Flexboot)€‚TI}valuenv_rom_iscsi_first_target_name0x0.240xe0.0STRINGFirst iSCSI target name (Flexboot) up to 223 characters.à‚SG7valuenv_rom_iscsi_first_target_lun0x0.240x14.0STRINGISCSI first target boot LUN (Flexboot)\;Decimal integer 1- 18,446,744,073,709,551,615 -¦FòžL÷œ@Š^-/a ) )file_signatureNIC0@FILE SIGNATURE*` % %file_commentNIC0FILE COMMENT6_ 1 1file_applicable_toNIC0 FILE APPLICABLE TOB^ ; 5nv_rom_uefi_debug_levelEXP_ROM0ROM UEFI DEBUG LEVEL8] 1 +nv_rom_debug_levelEXP_ROM0 ROM DEBUG LEVELZ\ S Mnv_rom_iscsi_second_target_chap_pwdWEXP_ROM0ROM ISCSI SECOND TARGET CHAP PWDY[ Q Knv_rom_iscsi_second_target_chap_idUEXP_ROM0€ROM ISCSI SECOND TARGET CHAP IDSZ K Env_rom_iscsi_second_target_nameTEXP_ROM0àROM ISCSI SECOND TARGET NAMEPY I Cnv_rom_iscsi_second_target_lunSEXP_ROM0ROM ISCSI SECOND TARGET LUNRX K Env_rom_iscsi_second_target_portREXP_ROM0ROM ISCSI SECOND TARGET PORTRW K Env_rom_iscsi_second_target_addrQEXP_ROM0ROM ISCSI SECOND TARGET ADDR^V W Qnv_rom_iscsi_connect_to_second_targetPEXP_ROM0ROM ISCSI CONNECT TO SECOND TARGETXU Q Knv_rom_iscsi_first_target_chap_pwdGEXP_ROM0ROM ISCSI FIRST TARGET CHAP PWD )H¤¡)u‚]S[valuenv_rom_iscsi_second_target_chap_pwd0x0.240x10.0STRINGiSCSI second target password (Flexboot)x‚\Qavaluenv_rom_iscsi_second_target_chap_id0x0.240x80.0STRINGiSCSI second target username/id (Flexboot)€‚[Kvaluenv_rom_iscsi_second_target_name0x0.240xe0.0STRINGSecond iSCSI target name (Flexboot) up to 223 characters.à ‚ZI9valuenv_rom_iscsi_second_target_lun0x0.240x14.0STRINGISCSI second target boot LUN (Flexboot)\;Decimal integer 1- 18,446,744,073,709,551,6154‚YKavaluenv_rom_iscsi_second_target_port0x0.240x8.0STRINGTCP port for the second iSCSI target (Flexboot)\;Decimal integer in ASCII format up to 5 digits (1-65536). $Áò%:Od|”©¾Ôê%CÁa{’¬Éäû,Ef˜°ÖÉÚî+UEFI_DEBUG_LOGS…9UEFI_DEBUG_LOG_VERBOSE„RPG_GD_P1²RPG_GD_P2Æ+RPG_HAI_RATE_P1±+RPG_HAI_RATE_P2Å+RPG_MAX_RATE_P1¯+RPG_MAX_RATE_P2Ã1RPG_MIN_DEC_FAC_P1³1RPG_MIN_DEC_FAC_P2Ç+RPG_MIN_RATE_P1´+RPG_MIN_RATE_P2È-RPG_THRESHOLD_P1®-RPG_THRESHOLD_P2Â/RPG_TIME_RESET_P1¬/RPG_TIME_RESET_P2À SRIOV_EN!=SRIOV_IB_ROUTING_MODE_P1=SRIOV_IB_ROUTING_MODE_P25UEFI_DEBUG_LOG_BLKIO}/UEFI_DEBUG_LOG_BM|5UEFI_DEBUG_LOG_CACHE‚;UEFI_DEBUG_LOG_DISPATCH{7UEFI_DEBUG_LOG_EVENTS€/UEFI_DEBUG_LOG_FSx1UEFI_DEBUG_LOG_GCD3UEFI_DEBUG_LOG_INITv3UEFI_DEBUG_LOG_LOADw CUEFI_DEBUG_LOG_MIN_SEVERITYƒ3UEFI_DEBUG_LOG_PAGEz3UEFI_DEBUG_LOG_POOLy1UEFI_DEBUG_LOG_SNI~3UEFI_DEBUG_LOG_UNDI#UEFI_HII_EN0+VF_LOG_BAR_SIZE#%WOL_MAGIC_EN$ „Õ²„‚*‚`1Sa9 romprefixnv_rom_debug_level0x4.20x0.2ENUMDebug level for Flexboot"s driver bootstrap code\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_ROMPREFIX($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚_1Ua- stpnv_rom_debug_level0x4.00x0.2ENUMDebug level for Flexboot"s Spanning Tree Protocol\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_STP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚'‚^%1ƒ%M debug_log_ennv_rom_debug_level0x0.00x0.1BOOLWhen this bit is set, Flexboot will generate debug log at the \;levels specified by the following parameters. Logs are \;dumped to the display and to the serial console (if config\;ured).BOOT_DBG_LOG$nv_rom_cap.flexboot_debug_en==1 §íÕ§‚*‚c1ka- arpnv_rom_debug_level0x4.80x0.2ENUMDebug level for Flexboot"s Address resolution Protocol (ARP)\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_ARP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚b15a1 dhcpv6nv_rom_debug_level0x4.60x0.2ENUMDebug level for Flexboot"s DHCPv6\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DHCP6($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚a11a/ dhcpnv_rom_debug_level0x4.40x0.2ENUMDebug level for Flexboot"s DHCP\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DHCP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) €Ìž€‚‚f1Ia- urinv_rom_debug_level0x4.140x0.2ENUMDebug level for Flexboot"s URI parsing code\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_URI($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚*‚e1ia- ndpnv_rom_debug_level0x4.120x0.2ENUMDebug level for Flexboot"s IPv6 Neighbor Discovery Protocol\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚0‚d1‚ aneighbornv_rom_debug_level0x4.100x0.2ENUMDebug level for Flexboot"s Neighbor table (which is filled \;by ARP and NDP)\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) UȆU‚-‚i!1Wa7 nodnic_cmdnv_rom_debug_level0x4.200x0.2ENUMDebug level for Flexboot"s NODNIC Driver interface\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV_CMD($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚>‚h1‚ a/ nodnicnv_rom_debug_level0x4.180x0.2ENUMDebug level for Flexboot"s NODNIC driver (init, teardown, \;poll CQ etc)\; \;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚4‚g1wa- drivernv_rom_debug_level0x4.160x0.2ENUMDebug level for Flexboot"s driver (init, teardown, poll CQ etc)\; \;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DRV($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) Q°vQ‚!‚l1?a9 netdevicenv_rom_debug_level0x4.260x0.2ENUMNetwork Device Link status and traffic\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NETDEVICE($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚6‚k#1ea9 nodnic_portnv_rom_debug_level0x4.240x0.2ENUMDebug level for Flexboot"s NODNIC Driver port management.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV_PORT($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚L‚j'1‚a7 nodnic_devicenv_rom_debug_level0x4.220x0.2ENUMDebug level for Flexboot"s NODNIC Driver tear-down and \;bring ups operations.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_NDRV_DEV($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) ¶åͶ‚‚o1=a- tcpnv_rom_debug_level0x8.00x0.2ENUMDebug level for Flexboot"s TCP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_TCP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚n1=a- udpnv_rom_debug_level0x4.300x0.2ENUMDebug level for Flexboot"s UDP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_UDP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚m1?a/ tftpnv_rom_debug_level0x4.280x0.2ENUMDebug level for Flexboot"s TFTP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_TFTP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) °âÊ°‚‚r1?a/ ipv6nv_rom_debug_level0x8.60x0.2ENUMDebug level for Flexboot"s IPv6 stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_IPV6($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚q1?a+ ipv4nv_rom_debug_level0x8.40x0.2ENUMDebug level for Flexboot"s IPv4 stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_IP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚‚p1Ca1 tcpipnv_rom_debug_level0x8.20x0.2ENUMDebug level for Flexboot"s TCP/IP stack.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_TCPIP($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) ™™Æù$Ps—¼â=a†¬Ó,5/legacy_boot_protocolnv_rom_boot_conf1521?link_up_delay_timenv_rom_iscsi_general_confC*5+ lldp_msg_tx_intervalnv_lldp_nb_confä+5+lldp_msg_tx_intervalnv_lldp_nb_confê"%+ lldp_nb_dcbxnv_lldp_nb_confå#%+lldp_nb_dcbxnv_lldp_nb_confë$+) lldp_nb_dcbx_ennv_lldp_nb_capð%+)lldp_nb_dcbx_ennv_lldp_nb_capö,9+ lldp_nb_rx_buffer_sizenv_lldp_nb_confè-9+lldp_nb_rx_buffer_sizenv_lldp_nb_confî#)) lldp_nb_rx_capnv_lldp_nb_capñ$))lldp_nb_rx_capnv_lldp_nb_cap÷%++ lldp_nb_rx_modenv_lldp_nb_confæ&++lldp_nb_rx_modenv_lldp_nb_confì,9+ lldp_nb_tx_buffer_sizenv_lldp_nb_confé rÀ˜r‚"‚u1Ea7 pxe_undinv_rom_debug_level0x8.120x0.2ENUMDebug level for Flexboot"s UNDI interface\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_PXE_UNDI($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚$‚t'1Ca3 status_updatenv_rom_debug_level0x8.100x0.2ENUMDebug level for status update interface.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_STATUS($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1)‚<‚s+1_aE driver_settingsnv_rom_debug_level0x8.80x0.2ENUMDebug level for non volatile configuration management.\;0x0: DISABLE\;0x1: BASIC\;0x2: ADVANCED\;0x3: ALLDISABLE=0x0,BASIC=0x1,ADVANCED=0x2,ALL=0x3BOOT_DBG_LOG_DRIVER_SETTINGS($nv_rom_cap.flexboot_debug_en==1)&&($nv_rom_debug_level.debug_log_en==1) … Ý…?­\€¥½ç#Hj›Íø&UªÕ';uefi_logsnv_rom_uefi_debug_level…//;uefi_logs_verbosenv_rom_uefi_debug_level„//;uefi_log_severitynv_rom_uefi_debug_levelƒ13;uefi_debug_log_undinv_rom_uefi_debug_level%!uefi_logs_ennv_rom_capd#3!uefi_undi_config_ennv_rom_capa$'-uefi_undi_disnv_rom_uefi_conf/!undi_ennv_rom_iniR)//undi_network_waitnv_rom_boot_conf2.1urinv_rom_debug_levelf)!uri_boot_retrynv_rom_ini^$5!uri_boot_retry_delaynv_rom_ini]!7valuenv_rom_dhcp_vendor_idE0Uvaluenv_rom_iscsi_connect_to_first_targetP1Wvaluenv_rom_iscsi_connect_to_second_targetW*Ivaluenv_rom_iscsi_first_target_addrQ-Ovaluenv_rom_iscsi_first_target_chap_idU.Qvaluenv_rom_iscsi_first_target_chap_pwdV)Gvaluenv_rom_iscsi_first_target_lunS*Ivaluenv_rom_iscsi_first_target_nameT*Ivaluenv_rom_iscsi_first_target_portR*Ivaluenv_rom_iscsi_initiator_chap_idL ›,Ww›X‚y3;s3 uefi_debug_log_poolnv_rom_uefi_debug_level0x0.30x0.1BOOLEnable UEFI debug level logs for pool Alloc & Free.UEFI_DEBUG_LOG_POOL($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)\‚x/;/ uefi_debug_log_fsnv_rom_uefi_debug_level0x0.20x0.1BOOLEnable UEFI debug level logs for EFI file system accesses.UEFI_DEBUG_LOG_FS($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)Q‚w3;e3 uefi_debug_log_loadnv_rom_uefi_debug_level0x0.10x0.1BOOLEnable UEFI debug level logs for load eventsUEFI_DEBUG_LOG_LOAD($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)P‚v3;c3 uefi_debug_log_initnv_rom_uefi_debug_level0x0.00x0.1BOOLEnable UEFI debug level initialization log.UEFI_DEBUG_LOG_INIT($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) ‹$7d‹U‚}5;i5 uefi_debug_log_blkionv_rom_uefi_debug_level0x0.70x0.1BOOLEnable UEFI debug level logs for BlkIo Driver.UEFI_DEBUG_LOG_BLKIO($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)O‚|/;i/ uefi_debug_log_bmnv_rom_uefi_debug_level0x0.60x0.1BOOLEnable UEFI debug level logs for Boot Manager.UEFI_DEBUG_LOG_BM($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)i‚{;;; uefi_debug_log_dispatchnv_rom_uefi_debug_level0x0.50x0.1BOOLEnable UEFI debug level logs for PEI/DXE/SMM Dis\;patchers.UEFI_DEBUG_LOG_DISPATCH($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)X‚z3;s3 uefi_debug_log_pagenv_rom_uefi_debug_level0x0.40x0.1BOOLEnable UEFI debug level logs for page Alloc & Free.UEFI_DEBUG_LOG_PAGE($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) ž1_Œžjƒ1;1 uefi_debug_log_gcdnv_rom_uefi_debug_level0x0.110x0.1BOOLEnable UEFI debug level logs for Global Coherency Data\;base changes.UEFI_DEBUG_LOG_GCD($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)Oƒ5;Y7 uefi_debug_log_eventnv_rom_uefi_debug_level0x0.100x0.1BOOLEnable UEFI debug level logs of Event.UEFI_DEBUG_LOG_EVENTS($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)N‚3;_3 uefi_debug_log_undinv_rom_uefi_debug_level0x0.90x0.1BOOLEnable UEFI debug level logs UNDI Driver.UEFI_DEBUG_LOG_UNDI($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)K‚~1;]1 uefi_debug_log_netnv_rom_uefi_debug_level0x0.80x0.1BOOLEnable UEFI debug level logs SNI Driver.UEFI_DEBUG_LOG_SNI($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) ™°™‚ƒ/;c9 uefi_logs_verbosenv_rom_uefi_debug_level0x0.270x0.1BOOLHigh verbosity UEFI expansion ROM debug log. Please \;note that high verbosity may impact boot performance.UEFI_DEBUG_LOG_VERBOSE($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)‚]ƒ/;‚]C uefi_log_severitynv_rom_uefi_debug_level0x0.240x0.2ENUMSet the minimal severity of logs that will be generated by \;NIC/HBA UEFI expansion ROM\;0x0: ERROR\;0x1: WARNING\;0x2: INFO\;0x3: DEBUGERROR=0x0,WARNING=0x1,INFO=0x2,DEBUG=0x3UEFI_DEBUG_LOG_MIN_SEVERITY($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1)kƒ5;5 uefi_debug_log_cachenv_rom_uefi_debug_level0x0.120x0.1BOOLEnable UEFI debug level logs for Memory range cachebility changes.UEFI_DEBUG_LOG_CACHE($nv_rom_uefi_debug_level.uefi_logs!=0)&&($nv_rom_cap.uefi_logs_en==1) :“Ùì:.ƒ% textfile_comment0x0.240x0.8STRINGThe PSID of the NIC that this file is applicable for. This ASCII string must be zero terminated if shorter than 16 chars.iƒ#1‚Upsid_branchfile_applicable_to0x10.240x10.0STRINGThe PSID-BRANCH that this file is applicable to. This ASCII string must be zero terminated if shorter than 16 chars. If PSID-Branch not defined the string is empty.6ƒ1psidfile_applicable_to0x0.240x10.0STRINGThe PSID of the NIC that this file is applicable for. This ASCII string must be zero terminated if shorter than 16 chars.‚iƒ;ƒ=Q+G uefi_logsnv_rom_uefi_debug_level0x0.280x0.4ENUMSelect the output channel \;device logs generated by the NIC/\;HBA UEFI expansion ROM.\; Note: \;When DISABLED, all \;the parameters in this TLV should be hidden by mlxconfig.\;0x0: DISABLED\;0x1: STDOUT\;0x2: STDERRDISABLED=0x0,STDOUT=0x1,STDERR=0x2UEFI_DEBUG_LOGS($nv_rom_cap.uefi_logs_en==1) 3™Ý‡"©H3‚ƒ+‚)auth_typefile_public_key0x0.00x0.8ENUMThe authentication mechanism used with this key\;0x0: INVALID_ENTRY\;0x1: SHA256\;_\;DIGEST\;0x3: _2048BIT_RSASSA_PKCS1_v1_5_WITH_SHA256INVALID_ENTRY=0x0,SHA256_DIGEST=0x1,_2048BIT_RSASSA_PKCS1_v1_5_WITH_SHA256=0x3^ƒ+-Erunning_versionfile_cs_token_id0x0.00x4.0BINARYThe current running version.vƒ '5qdebug_versionfile_dbg_fw_token_id0x4.00x4.0BINARYThe debug firmware version approved by this token.bƒ +5Erunning_versionfile_dbg_fw_token_id0x0.00x4.0BINARYThe current running version.Sƒ )5signaturefile_signature0x20.240x100.0BYTESThe signature itself8ƒ %){keypair_uuidfile_signature0x10.240x10.0BYTESThe UUID of the keypair used for signing this file. An all zero UUID means that the signature is a SHA256 of the image.dƒ ))Ssignature_uuidfile_signature0x0.240x10.0BYTEStime based UUID for this signature. ÍÄTóÍ$g !  nv_pci_capNIC0PCI CAP&f # nv_pci_conf€NIC0PCI CONF7e 1 1file_mac_addr_list NIC0FILE MAC ADDR LIST:d +% +file_public_key NIC-internal0 FILE PUBLIC KEY2c - -file_cs_token_idNIC0FILE CS TOKEN ID:b 5 5file_dbg_fw_token_idNIC0FILE DBG FW TOKEN ID LLy ½Ú +E]{˜ºÚ,E!static_component_name_stringnv_rom_iniE&'1status_updatenv_rom_debug_levelt1stpnv_rom_debug_level_1tcpnv_rom_debug_levelo1/?tcp_timestamps_ennv_rom_iscsi_general_conf=1tcpipnv_rom_debug_levelp!tech_enumnv_rom_iniD%textfile_commentˆ1tftpnv_rom_debug_levelm%!tivoli_wa_ennv_rom_iniU!1total_vfsnv_global_pci_conf/tray_idnv_enclosure_info‹%'/tray_locationnv_enclosure_infoŒ yïeæe¾ƒ%+Gkeypair_uuidfile_public_key0x10.240x10.0BYTESUUID of this key.The UUID is created by the sign server when it generates a new RSA key-pair.#ƒ)+Mpublic_key_expfile_public_key0xC.00x4.0UNSIGNEDThe public key exponent.In most cases, the standard exponent (65537) will be used (per RFC4871).~ƒ+fw_enfile_public_key0x0.310x0.1BOOLThis key can be used for authenticating firmware, DBG_FW and DBG tokens|ƒ#+ cs_token_enfile_public_key0x0.300x0.1BOOLThis key can be used for authenticating CS tokens at OEM level.ƒ-+vendor_nvconf_enfile_public_key0x0.290x0.1BOOLThis key can be used for authenticating NVCONFIG files at OEM level.ƒ)+mlnx_nvconf_enfile_public_key0x0.280x0.1BOOLThis key can be used for authenticating NVCONFIG files at MLLNX level.ƒ+#frc_enfile_public_key0x0.270x0.1BOOLThis key can be used for authenticating Factory Re Configuration responses. #ŸXÇ# ƒ7#C7i advanced_pci_settingsnv_pci_conf0x0.310x0.1BOOLShow advanced PCI settings.ADVANCED_PCI_SETTINGS$nv_pci_cap.advanced_pci_settings_supported!=0‚9ƒ##y#‚ ibm_capi_ennv_pci_conf0x0.300x0.1BOOLEnable IBM's Coherent Accelerator Processor Interface (CAPI) \;mode. Supported only when ADVANCED_PCI_SETTINGS is set.IBM_CAPI_EN($nv_pci_cap.ibm_capi_supported!=0)&&($nv_pci_conf.advanced_pci_settings!=0)&&($nv_pci_cap.advanced_pci_settings_supported!=0)‚Pƒ1#o9‚ force_eth_subclassnv_pci_conf0x0.290x0.1BOOLForce the PCI function identify with Ethernet subclass (00h). \;Supported only when ADVANCED_PCI_SETTINGS is set.FORCE_ETH_PCI_SUBCLASS($nv_pci_cap.force_eth_subclass_supported!=0)&&($nv_pci_conf.advanced_pci_settings!=0)&&($nv_pci_cap.advanced_pci_settings_supported!=0)Dƒ#1 mac_addressfile_mac_addr_list0x0.240x100.0BYTES^ƒ+Ukeyfile_public_key0x20.240x100.0BYTESA 2048 bit public-key (0x100 bytes) x| xƒK!advanced_pci_settings_supportednv_pci_cap0x0.310x0.1BOOLWhen set, the PCI_FONF.advanced_pci_settings bit is configu\;rable.nƒ1!mibm_capi_supportednv_pci_cap0x0.300x0.1BOOLWhen set, the PCI_CONF.ibm_capi_en is supported.ƒE!}force_eth_subclass_supportednv_pci_cap0x0.290x0.1BOOLWhen set, the PCI_CONF.force_eth_sub_class is supported. >>l›»äA`Š¶Þ-;+ do_not_clear_port_statsnv_keep_link_up.;+do_not_clear_port_statsnv_keep_link_up 1drivernv_rom_debug_levelg(+1driver_settingsnv_rom_debug_levels-A% duplicated_mac_action_modenv_mpfs_conf.A%duplicated_mac_action_modenv_mpfs_conf%#en_wol_magicnv_wol_conf$)5+erase_lower_prioritynv_file_id_mlnxs+5/erase_lower_prioritynv_file_id_vendor{'--erase_on_powerupnv_virt_net_addr%!%+file_versionnv_file_id_mlnxtmstflint-4.8.0/mlxconfig/mlxcfg_utils.cpp0000755000175000017500000002265013201023206017510 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_utils.cpp * * Created on: Jun 21, 2016 * Author: ahmads */ #include #include #include #include #include #include #include #include #include #include #include "../tools_layouts/tools_open_layouts.h" #include "mlxcfg_utils.h" using namespace std; void dealWithSignal() { int sig; sig = mft_signal_is_fired(); if (sig) { // reset received signal mft_signal_set_fired(0); // retore prev handler mft_signal_set_handling(0); //raise signal to let the previous handle deal with it. raise(sig); } mft_signal_set_handling(0); return; } MError mnvaCom5thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int32_t tlvType, reg_access_method_t method, QueryType qT) { struct tools_open_nvda mnvaTlv; memset(&mnvaTlv, 0, sizeof(struct tools_open_nvda)); if (method == REG_ACCESS_METHOD_GET) { mnvaTlv.nv_hdr.length = sizeof(mnvaTlv.data); } else { mnvaTlv.nv_hdr.length = len; } mnvaTlv.nv_hdr.rd_en = 0; mnvaTlv.nv_hdr.over_en = 1; mnvaTlv.nv_hdr.writer_id = WRITER_ID_ICMD_MLXCONFIG; if (qT == QueryDefault) { mnvaTlv.nv_hdr.default_ = 1; } else if (qT == QueryCurrent) { mnvaTlv.nv_hdr.read_current = 1; } // tlvType should be in the correct endianess mnvaTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); memcpy(mnvaTlv.data, buff, len); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); //DEBUG_PRINT_SEND(&mnvaTlv, nvda); rc = reg_access_nvda(mf, method, &mnvaTlv); //DEBUG_PRINT_RECEIVE(&mnvaTlv, nvda); dealWithSignal(); if (rc) { return rc; } memcpy(buff, mnvaTlv.data, len); return ME_OK; } MError nvqcCom5thGen(mfile* mf, u_int32_t tlvType, bool& suppRead, bool& suppWrite, u_int32_t& version) { struct tools_open_nvqc nvqcTlv; memset(&nvqcTlv, 0, sizeof(struct tools_open_nvqc)); // tlvType should be in the correct endianess nvqcTlv.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_nvqc(mf, REG_ACCESS_METHOD_GET, &nvqcTlv); dealWithSignal(); if (rc) { return rc; } suppRead = nvqcTlv.support_rd; suppWrite = nvqcTlv.support_wr; version = nvqcTlv.version; //printf("-D- nvqcTlv.support_rd=%d nvqcTlv.support_wr=%d\n", nvqcTlv.support_rd, nvqcTlv.support_wr); return ME_OK; } MError nvdiCom5thGen(mfile* mf, u_int32_t tlvType) { struct tools_open_nvdi nvdiTlv; memset(&nvdiTlv, 0, sizeof(struct tools_open_nvdi)); nvdiTlv.nv_hdr.length = 0; nvdiTlv.nv_hdr.rd_en = 0; nvdiTlv.nv_hdr.over_en = 1; // tlvType should be in the correct endianess nvdiTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); // DEBUG_PRINT_SEND(&nvdiTlv, nvdi); rc = reg_access_nvdi(mf, REG_ACCESS_METHOD_SET, &nvdiTlv); // DEBUG_PRINT_RECIEVE(&nvdiTlv, nvdi); dealWithSignal(); if (rc) { return rc; } return ME_OK; } bool strToNum(string str, u_int32_t& num, int base) { char *endp; char* numStr = strcpy(new char[str.size() + 1],str.c_str()); num = strtoul(numStr, &endp, base); if (*endp) { delete[] numStr; return false; } delete[] numStr; // check errno if (errno == ERANGE) { return false; } return true; } string numToStr(u_int32_t num, bool isHex) { stringstream ss; if (isHex) { ss << std::uppercase << std::setfill('0') << std::setw(4) << std::hex; } ss << num; return ss.str(); } vector splitStr(const string s, char d) { vector v; stringstream ss(s); string to; while(std::getline(ss, to, d)){ v.push_back(to); } return v; } string mlxcfg_ltrim(string s) { const char* cs = s.c_str(); while(isspace(*cs)){ cs++; } return string(cs); } string mlxcfg_rtrim(string s) { //todo rewrite it unsigned int i = s.size(); if(i == 0) { return s; } while (--i > 0 && isspace(s[i])) { ; } if(i == 0 && isspace(s[i])) { return ""; } return s.substr(0, i + 1); } string mlxcfg_trim(string s) { return mlxcfg_rtrim(mlxcfg_ltrim(s)); } string writerIdToStr(WriterId writerId) { switch(writerId) { case WRITER_ID_UNSPECIFIED: return "Unspecified"; case WRITER_ID_CHASSIS_BMC: return "Chassis BMC"; case WRITER_ID_MAD: return "MAD"; case WRITER_ID_BMC: return "BMC"; case WRITER_ID_CMD_IF: return "CMD IF"; case WRITER_ID_ICMD: return "ICMD"; case WRITER_ID_ICMD_UEFI_HII: return "ICMD UEFI HII"; case WRITER_ID_ICMD_UEFI_CLP: return "ICMD UEFI CLP"; case WRITER_ID_ICMD_FLEXBOOT: return "ICMD FLEXBOOT"; case WRITER_ID_ICMD_MLXCONFIG: return "ICMD MLXCONFIG"; case WRITER_ID_ICMD_USER1: return "ICMD USER1"; case WRITER_ID_ICMD_USER2: return "ICMD USER2"; case WRITER_ID_ICMD_MLXCONFIG_SET_RAW: return "ICMD MLXCONFIG SET RAW"; case WRITER_ID_OTHER: return "OTHER"; default: return "Unknown"; } }; void copyDwVectorToBytesVector(const vector& dwV, vector& bV) { bV.resize(dwV.size() << 2); memcpy(bV.data(), dwV.data(), bV.size()); } void copyBytesVectorToDwVector(const vector& bV, vector& dwV) { dwV.resize(bV.size() >> 2); memcpy(dwV.data(), bV.data(), bV.size()); } string parseIndexStr(const string& indexedMlxconfigName) { return indexedMlxconfigName.substr(indexedMlxconfigName.find('[') + 1, indexedMlxconfigName.find(']') - indexedMlxconfigName.find('[') - 1); } void parseIndexedMlxconfigName(const string& indexedMlxconfigName, string& mlxconfigName, u_int32_t& index) { string indexStr = parseIndexStr(indexedMlxconfigName); if (!strToNum(indexStr, index)) { throw MlxcfgException("Can not parse the index of %s\n", indexedMlxconfigName.c_str()); } mlxconfigName = indexedMlxconfigName.substr(0, indexedMlxconfigName.find('[')); } void extractIndexes(const string& indexesStr, vector& indexes) { if (indexesStr.find("..") != string::npos) { unsigned int leftIndex = 0, rightIndex = 0; string leftIndexStr = indexesStr.substr(0, indexesStr.find("..")); string rightIndexStr = indexesStr.substr(indexesStr.find("..") + 2); if (!strToNum(leftIndexStr, leftIndex)) { throw MlxcfgException("Can not parse the index %s", leftIndexStr.c_str()); } if (!strToNum(rightIndexStr, rightIndex)) { throw MlxcfgException("Can not parse the index %s", rightIndexStr.c_str()); } if (leftIndex > rightIndex) { throw MlxcfgException("Left index %d can not be greater than right index %d", leftIndex, rightIndex); } while (rightIndex >= leftIndex) { indexes.push_back(leftIndex); leftIndex++; } } else { u_int32_t index = 0; if (!strToNum(indexesStr, index)) { throw MlxcfgException("Can not parse the index %s", indexesStr.c_str()); } indexes.push_back(index); } } bool isIndexedMlxconfigName(const string& mlxconfigName) { return (mlxconfigName.find("[") != string::npos); } MlxcfgException::MlxcfgException(const char* fmt, ...){ char tmp[1024]; va_list args; va_start (args, fmt); vsprintf(tmp, fmt, args); va_end(args); _err = tmp; } mstflint-4.8.0/mlxconfig/mlxcfg_param_lib.h0000644000175000017500000004643513201023206017747 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_param_lib.h * * Created on: Mar 22, 2015 * Author: adrianc */ #ifndef MLXCFG_PARAM_LIB_H_ #define MLXCFG_PARAM_LIB_H_ #include #include #include #include #include #include "mlxcfg_utils.h" #define WOL_TYPE 0x10 #define SRIOV_TYPE 0x11 #define VPI_TYPE 0x12 #define BAR_SIZE_TYPE 0x13 #define CX3_GLOBAL_CONF_TYPE 0x14 #define PCI_SETTINGS_TYPE 0x80 #define PCI_CAPABILITES_TYPE 0x81 #define TPT_SETTINGS_TYPE 0x82 #define TPT_CAPABILITES_TYPE 0x83 #define PREBOOT_BOOT_SETTINGS_TYPE 0x2021 #define INFINIBAND_BOOT_SETTINGS_TYPE 0x2022 #define INFINIBAND_DC_SETTINGS_TYPE 0x190 #define INFINIBAND_DC_CAPABILITIES_TYPE 0x191 #define PORT_BOOT_STATE_TYPE 0x84 #define ROCE_NEXT_PROTOCOL_TYPE 0x10 #define ROCE_CC_TYPE 0x107 #define ROCE_CC_ECN_TYPE 0x108 #define LLDP_CLIENT_SETTINGS_TYPE 0x10a #define LLDP_NB_CAPABILITIES_TYPE 0x10b #define EXTERNAL_PORT 0x192 #define BOOT_SETTINGS_EXTRAS_GEN4 0x2001 #define BOOT_SETTINGS_EXTRAS_GEN5 0x195 #define BOOT_SETTINGS_EXTRAS_GEN5_CAP 0x101 #define QOS 0x192 #define QOS_CAP 0x193 #define LLDP_NB_DCBX 0x18E typedef enum { // SRIOV Mct_Sriov = 0, // Wake on LAN (4th gen) Mct_Wol_P1, Mct_Wol_P2, // VPI settings Mct_Vpi_P1, Mct_Vpi_P2, // BAR size (4th gen) Mct_Bar_Size, // IB boot settings (4th gen) Mct_Boot_Settings_P1, Mct_Boot_Settings_P2, // Preboot Boot Settings (4th Gen) Mct_Preboot_Boot_Settings_P1, Mct_Preboot_Boot_Settings_P2, //TODO: Boot Settings Extras Mct_Boot_Settings_Extras_4thGen_P1, Mct_Boot_Settings_Extras_4thGen_P2, //CX3 Global Conf Mct_CX3_Global_Conf, Mct_Last } mlxCfgType; typedef enum { // PCI settings Mcp_Sriov_En = 0, Mcp_Num_Of_Vfs, // Wake On LAN 4th Gen Port 1 Mcp_Wol_Magic_En_P1, // Wake On LAN 4th Gen Port 2 Mcp_Wol_Magic_En_P2, // VPI settings Port 1 Mcp_Link_Type_P1, Mcp_Phy_Type_P1, Mcp_Xfi_Mode_P1, Mcp_Force_Mode_P1, // VPI settings Port 2 Mcp_Link_Type_P2, Mcp_Phy_Type_P2, Mcp_Xfi_Mode_P2, Mcp_Force_Mode_P2, // BAR size Mcp_Log_Bar_Size, // TPT settings Mcp_Log_Tpt_Size, // Boot Pkey Port 1 Mcp_Boot_Pkey_P1, // Boot Pkey Port 2 Mcp_Boot_Pkey_P2, // IB Dynamically connected Mcp_Log_Dcr_Hash_Table_Size, Mcp_Dcr_Lifo_Size, // RoCE v1.5 Next protocol Mcp_RoCE_Next_Protocol, // RoCE Congestion Control Parameters Port 1 Mcp_RoCE_CC_Algorithm_P1, Mcp_RoCE_CC_Prio_Mask_P1, // RoCE Congestion Control Parameters Port 2 Mcp_RoCE_CC_Algorithm_P2, Mcp_RoCE_CC_Prio_Mask_P2, // RoCE Congestion Control ECN Port 1 Mcp_Clamp_Tgt_Rate_P1, Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1, Mcp_Rpg_Time_Reset_P1, Mcp_Rpg_Byte_Reset_P1, Mcp_Rpg_Threshold_P1, Mcp_Rpg_Max_Rate_P1, Mcp_Rpg_Ai_Rate_P1, Mcp_Rpg_Hai_Rate_P1, Mcp_Rpg_Gd_P1, Mcp_Rpg_Min_Dec_Fac_P1, Mcp_Rpg_Min_Rate_P1, Mcp_Rate_To_Set_On_First_Cnp_P1, Mcp_Dce_Tcp_G_P1, Mcp_Dce_Tcp_Rtt_P1, Mcp_Rate_Reduce_Monitor_Period_P1, Mcp_Initial_Alpha_Value_P1, Mcp_Min_Time_Between_Cnps_P1, Mcp_Cnp_Dscp_P1, Mcp_Cnp_802p_Prio_P1, // RoCE Congestion Control ECN Port 2 Mcp_Clamp_Tgt_Rate_P2, Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2, Mcp_Rpg_Time_Reset_P2, Mcp_Rpg_Byte_Reset_P2, Mcp_Rpg_Threshold_P2, Mcp_Rpg_Max_Rate_P2, Mcp_Rpg_Ai_Rate_P2, Mcp_Rpg_Hai_Rate_P2, Mcp_Rpg_Gd_P2, Mcp_Rpg_Min_Dec_Fac_P2, Mcp_Rpg_Min_Rate_P2, Mcp_Rate_To_Set_On_First_Cnp_P2, Mcp_Dce_Tcp_G_P2, Mcp_Dce_Tcp_Rtt_P2, Mcp_Rate_Reduce_Monitor_Period_P2, Mcp_Initial_Alpha_Value_P2, Mcp_Min_Time_Between_Cnps_P2, Mcp_Cnp_Dscp_P2, Mcp_Cnp_802p_Prio_P2, // Preboot Boot Settings Port 1 Mcp_Boot_Option_Rom_En_P1, Mcp_Boot_Vlan_En_P1, Mcp_Boot_Retry_Cnt_P1, Mcp_Legacy_Boot_Protocol_P1, Mcp_Boot_Vlan_P1, // Preboot Boot Settings Port 2 Mcp_Boot_Option_Rom_En_P2, Mcp_Boot_Vlan_En_P2, Mcp_Boot_Retry_Cnt_P2, Mcp_Legacy_Boot_Protocol_P2, Mcp_Boot_Vlan_P2, //External port Mcp_Port_Owner, Mcp_Allow_Rd_Counters, //Boot Settings Ext Mcp_Boot_Settings_Ext_IP_Ver, Mcp_Boot_Settings_Ext_IP_Ver_P1, Mcp_Boot_Settings_Ext_IP_Ver_P2, //CX3 Global conf Mcp_CQ_Timestamp, Mcp_Last } mlxCfgParam; typedef std::pair cfgInfo; /* * Basic Param Class */ /* Adrianc: add Initialize/Open pure method that will contain all needed initializations (configuration supported defaults capabilities etc...) */ class CfgParams : public ErrMsg { public: CfgParams(mlxCfgType t=Mct_Last, u_int32_t tlvT=0); virtual ~CfgParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; void setDevCapVec(u_int64_t v) {_devCapVec = v;} virtual void setParam(mlxCfgParam paramType, u_int32_t val) = 0; virtual u_int32_t getParam(mlxCfgParam paramType) = 0; virtual u_int32_t getDefaultParam(mlxCfgParam paramType) = 0; virtual int getDefaultAndFromDev(mfile* mf); virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; void setIgnoreSoftLimits(bool val); void setIgnoreHardLimits(bool val); mlxCfgType type; u_int32_t tlvTypeIdx; protected: // param validadion methods, only checkCfg shuold be called virtual bool checkCfg(mfile* mf=NULL); virtual bool hardLimitCheck() = 0; virtual bool softLimitCheck(mfile* mf=NULL); // get default parameters for configuration (4th gen) int getDefaultParams4thGen(mfile* mf, struct tools_open_query_def_params_global* global_params); int getDefaultParams4thGen(mfile* mf, int port, struct tools_open_query_def_params_per_port* port_params); virtual void updateTlvFromClassAttr(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");} virtual void updateClassAttrFromTlv(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");} virtual void updateClassDefaultAttrFromTlv(void* tlv) {(void)tlv; throw std::logic_error("Function Not Implemented");} u_int64_t _devCapVec; // relevant for 4th gen devices bool _updated; // set true on get and false on set bool _ignoreSoftLimits; // soft limits checks will not be performed for configuration bool _ignoreHardLimits; // hard limits checks will not be performed }; /* * SRIOV param classes: */ class SriovParams4thGen : public CfgParams { public: SriovParams4thGen() : CfgParams(Mct_Sriov, SRIOV_TYPE) , _sriovEn(MLXCFG_UNKNOWN), _numOfVfs(MLXCFG_UNKNOWN), _sriovEnDefault(MLXCFG_UNKNOWN), _numOfVfsDefault(MLXCFG_UNKNOWN), _maxVfs(1) {} ~SriovParams4thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual u_int32_t getDefaultParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); virtual int updateMaxVfs(mfile* mf); virtual bool softLimitCheck(mfile* mf=NULL); void setParams(u_int32_t sriovEn, u_int32_t numOfVfs); u_int32_t _sriovEn; u_int32_t _numOfVfs; u_int32_t _sriovEnDefault; u_int32_t _numOfVfsDefault; u_int32_t _maxVfs; }; /* * HW Timestamp params */ class CX3GlobalConfParams : public CfgParams { public: CX3GlobalConfParams() : CfgParams(Mct_CX3_Global_Conf, CX3_GLOBAL_CONF_TYPE), _timestamp(MLXCFG_UNKNOWN), _timestampDefault(MLXCFG_UNKNOWN) {} ~CX3GlobalConfParams() {}; bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); void setParam(mlxCfgParam paramType, u_int32_t val); u_int32_t getParam(mlxCfgParam paramType); u_int32_t getDefaultParam(mlxCfgParam paramType); int getFromDev(mfile* mf); int setOnDev(mfile* mf, bool ignoreCheck=false); int getDefaultParams(mfile* mf); private: bool hardLimitCheck(); void setParams(u_int32_t timestamp); u_int32_t _timestamp; u_int32_t _timestampDefault; }; /* * Boot Settings Extras param classes: */ class BootSettingsExtParams : public CfgParams { public: BootSettingsExtParams(mlxCfgType t, u_int32_t tlvT) : CfgParams(t, tlvT), _ipVer(MLXCFG_UNKNOWN), _ipVerDefault(MLXCFG_UNKNOWN){} virtual ~BootSettingsExtParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual void setParam(mlxCfgParam paramType, u_int32_t val) = 0; virtual u_int32_t getParam(mlxCfgParam paramType) = 0; virtual u_int32_t getDefaultParam(mlxCfgParam paramType) = 0; virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf)=0; protected: bool hardLimitCheck(); void setParams(u_int32_t _ipVer); u_int32_t _ipVer; u_int32_t _ipVerDefault; }; class BootSettingsExtParams4thGen : public BootSettingsExtParams { public: BootSettingsExtParams4thGen(int port) : BootSettingsExtParams((port == 1) ? Mct_Boot_Settings_Extras_4thGen_P1 : Mct_Boot_Settings_Extras_4thGen_P2, BOOT_SETTINGS_EXTRAS_GEN4), _port(port){} ~BootSettingsExtParams4thGen() {} u_int32_t getDefaultParam(mlxCfgParam paramType); void setParam(mlxCfgParam paramType, u_int32_t val); u_int32_t getParam(mlxCfgParam paramType); bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); int getDefaultParams(mfile* mf); int getFromDev(mfile* mf); int setOnDev(mfile* mf, bool ignoreCheck=false); private: int _port; }; /* * WOL param classes: */ class WolParams : public CfgParams { public: WolParams() : CfgParams(Mct_Last, WOL_TYPE), _wolMagicEn(MLXCFG_UNKNOWN), _wolMagicEnDefault(MLXCFG_UNKNOWN) {} virtual ~WolParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual void setParam(mlxCfgParam paramType, u_int32_t val) = 0; virtual u_int32_t getParam(mlxCfgParam paramType) = 0; virtual u_int32_t getDefaultParam(mlxCfgParam paramType) = 0; virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; protected: virtual bool hardLimitCheck(); void setParams(u_int32_t wolMagicEn); // Wake on magic packet (atm this is the only mode which is supported) u_int32_t _wolMagicEn; u_int32_t _wolMagicEnDefault; }; class WolParams4thGen : public WolParams { public: WolParams4thGen(int port) : WolParams(), _port(port) {type = _port == 1 ? Mct_Wol_P1 : Mct_Wol_P2;} ~WolParams4thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual u_int32_t getDefaultParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); private: int _port; }; /* * VPI param classes: */ class VpiParams : public CfgParams { public: VpiParams(int port) : CfgParams(port == 1 ? Mct_Vpi_P1 : Mct_Vpi_P2, VPI_TYPE), _port(port), _linkType(MLXCFG_UNKNOWN), _defaultLinkType(MLXCFG_UNKNOWN) , _linkTypeDefault(MLXCFG_UNKNOWN), _defaultLinkTypeDefault(MLXCFG_UNKNOWN), _isForceModeSupported(false), _isVPISupported(false), _phyType(MLXCFG_UNKNOWN), _phyTypeDefault(MLXCFG_UNKNOWN), _xfiMode(MLXCFG_UNKNOWN), _xfiModeDefault(MLXCFG_UNKNOWN), _forceMode(MLXCFG_UNKNOWN), _forceModeDefault(MLXCFG_UNKNOWN){ memset(&_vpiTlv, 0, sizeof(_vpiTlv)); } ~VpiParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; protected: int getFromDevComPre(); int getFromDevComPost(MError mnvaComRC); int setOnDevComPre(bool ignoreCheck); int setOnDevComPost(MError mnvaComRC); void setParams(u_int32_t linkType, u_int32_t defaultLinkType, u_int32_t phyType, u_int32_t xfiMode, u_int32_t forceMode); int _port; u_int32_t _linkType; u_int32_t _defaultLinkType; u_int32_t _linkTypeDefault; u_int32_t _defaultLinkTypeDefault; bool _isForceModeSupported; bool _isVPISupported; u_int32_t _phyType; u_int32_t _phyTypeDefault; u_int32_t _xfiMode; u_int32_t _xfiModeDefault; u_int32_t _forceMode; u_int32_t _forceModeDefault; // FW TLV (used when actually setting/getting the TLV from FW) std::vector _tlvBuff; struct tools_open_vpi_settings _vpiTlv; }; class VpiParams4thGen : public VpiParams { public: VpiParams4thGen(int port) : VpiParams(port){} ~VpiParams4thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual u_int32_t getDefaultParam(mlxCfgParam paramType); virtual bool hardLimitCheck(); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); int getDefaultParamsAux(mfile* mft); }; /* * BAR size param classes: */ class BarSzParams : public CfgParams { public: BarSzParams() : CfgParams(Mct_Bar_Size, BAR_SIZE_TYPE) ,_maxLogBarSz(1), _logBarSz(MLXCFG_UNKNOWN), _logBarSzDefault(MLXCFG_UNKNOWN) {} ~BarSzParams() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last) = 0; virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual u_int32_t getDefaultParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf) = 0; virtual int setOnDev(mfile* mf, bool ignoreCheck=false) = 0; virtual int getDefaultParams(mfile* mf) = 0; protected: virtual bool hardLimitCheck(); virtual bool softLimitCheck(mfile* mf=NULL) = 0; virtual int getDefaultBarSz(mfile* mf) = 0; void setParams(u_int32_t logBarSz); u_int32_t _maxLogBarSz; u_int32_t _logBarSz; u_int32_t _logBarSzDefault; }; class BarSzParams4thGen : public BarSzParams { public: BarSzParams4thGen() : BarSzParams() {} ~BarSzParams4thGen() {} virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool softLimitCheck(mfile* mf=NULL); virtual int getDefaultBarSz(mfile* mf); }; /* * Infiniband boot settings parameter Class (4thGen devices only) */ class InfinibandBootSettingsParams4thGen : public CfgParams { public: InfinibandBootSettingsParams4thGen(int port) : CfgParams((port == 1 ? Mct_Boot_Settings_P1 : Mct_Boot_Settings_P2), INFINIBAND_BOOT_SETTINGS_TYPE) , _port(port), _bootPkey(MLXCFG_UNKNOWN), _bootPkeyDefault(MLXCFG_UNKNOWN) {} ~InfinibandBootSettingsParams4thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual u_int32_t getDefaultParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); void setParams(u_int32_t bootPkey); int _port; u_int32_t _bootPkey; u_int32_t _bootPkeyDefault; }; /* * Preboot Boot Settings Class (4thGen devices only) */ class PrebootBootSettingsParams4thGen : public CfgParams { public: PrebootBootSettingsParams4thGen(int port) : CfgParams((port == 1 ? Mct_Preboot_Boot_Settings_P1 : Mct_Preboot_Boot_Settings_P2), PREBOOT_BOOT_SETTINGS_TYPE), _bootOptionRomEn(MLXCFG_UNKNOWN), _bootVlanEn(MLXCFG_UNKNOWN), _bootRetryCnt(MLXCFG_UNKNOWN), _legacyBootProtocol(MLXCFG_UNKNOWN), _bootVlan(MLXCFG_UNKNOWN), _bootOptionRomEnDefault(MLXCFG_UNKNOWN), _bootVlanEnDefault(MLXCFG_UNKNOWN), _bootRetryCntDefault(MLXCFG_UNKNOWN), _legacyBootProtocolDefault(MLXCFG_UNKNOWN), _bootVlanDefault(MLXCFG_UNKNOWN), _port(port) {} ~PrebootBootSettingsParams4thGen() {}; virtual bool cfgSupported(mfile* mf, mlxCfgParam param=Mcp_Last); virtual void setParam(mlxCfgParam paramType, u_int32_t val); virtual u_int32_t getParam(mlxCfgParam paramType); virtual u_int32_t getDefaultParam(mlxCfgParam paramType); virtual int getFromDev(mfile* mf); virtual int setOnDev(mfile* mf, bool ignoreCheck=false); virtual int getDefaultParams(mfile* mf); protected: virtual bool hardLimitCheck(); virtual void updateTlvFromClassAttr(void* tlv); virtual void updateClassAttrFromTlv(void* tlv); virtual void updateClassDefaultAttrFromTlv(void* tlv); void updateClassAttrFromDefaultParams(); void setParams(u_int32_t bootOptionRomEn, u_int32_t bootVlanEn, u_int32_t bootRetryCnt, u_int32_t legacyBootProtocol, u_int32_t bootVlan); u_int32_t _bootOptionRomEn; u_int32_t _bootVlanEn; u_int32_t _bootRetryCnt; u_int32_t _legacyBootProtocol; u_int32_t _bootVlan; u_int32_t _bootOptionRomEnDefault; u_int32_t _bootVlanEnDefault; u_int32_t _bootRetryCntDefault; u_int32_t _legacyBootProtocolDefault; u_int32_t _bootVlanDefault; int _port; }; #endif /* MLXCFG_PARAM_LIB_H_ */ mstflint-4.8.0/mlxconfig/mlxcfg_param_lib.cpp0000644000175000017500000014667313201023206020307 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * mlxcfg_param_lib.cpp * * Created on: Mar 22, 2015 * Author: adrianc */ #include #include #include #include #include #include #include #include #include #include #include "mlxcfg_param_lib.h" #include "mlxcfg_status.h" #include "mlxcfg_utils.h" enum { SRIOV_MASK = 0x1, WOL_P1_MASK = 0x2, WOL_P2_MASK = 0x4 , VPI_P1_MASK = 0x8, VPI_P2_MASK = 0x10, BAR_SZ_MASK = 0x20 }; // tlv classes: enum { CLASS_GLOBAL = 0x0, CLASS_PHYS_PORT = 0x1, CLASS_BMC = 0x2, CLASS_PER_HOST = 0x3, CLASS_ESWITCH = 0x4 }; #define MAX_VFS_ADDR 0x38 #define MAX_BAR_SZ_ADDR 0xc8 #define DEFAULT_BAR_SZ_ADDR 0x48 /* * Macros for getting and settings a TLV */ // TODO: adrianc: add macro for nvqc tlv and use it in cfgSupported for 5th gen Tlvs /* * Macros Below rely on the fact that the user has implemented within the parameter class: * void updateClassAttrFromTlv(void*); * void updateTLVFromClassAttr(void*); * * those method do what they imply: update the class internal memeber from TLV and via versa. */ #define SET_ON_DEV_5TH_GEN(mf, ignoreCheck, tlvStructName, tlvNameStr) \ MError __mRc;\ if (!(ignoreCheck) && !checkCfg()) {\ return MCE_BAD_PARAMS;\ }\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ __mRc = mnvaCom5thGen(mf, __tlvBuff, __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET);\ if (__mRc && __mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, __tlvBuff);\ updateTlvFromClassAttr((void*)&__tlvStruct);\ tlvStructName##_pack(&__tlvStruct, __tlvBuff);\ __mRc = mnvaCom5thGen(mf, __tlvBuff, __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_SET);\ if (__mRc) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ _updated = false;\ return MCE_SUCCESS #define GET_DEFAULT_5TH_GEN(mf, tlvStructName, tlvNameStr) \ MError __mRc;\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ __mRc = mnvaCom5thGen(mf, &__tlvBuff[0], __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET, true);\ if (__mRc) {\ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\ return MCE_SUCCESS;\ }\ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\ updateClassDefaultAttrFromTlv((void*)&__tlvStruct);\ updateClassAttrFromDefaultParams();\ return MCE_SUCCESS #define GET_FROM_DEV_5TH_GEN(mf, tlvStructName, tlvNameStr) \ MError __mRc;\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ if (_updated) {\ return MCE_SUCCESS;\ }\ __mRc = mnvaCom5thGen(mf, &__tlvBuff[0], __tlvBuffSize, getTlvTypeBe(), REG_ACCESS_METHOD_GET);\ if (__mRc) {\ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\ return MCE_SUCCESS;\ }\ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\ updateClassAttrFromTlv((void*)&__tlvStruct);\ _updated = true;\ return MCE_SUCCESS #define SET_ON_DEV_4TH_GEN(mf, ignoreCheck, tlvStructName, tlvNameStr, typeMod) \ MError __mRc;\ if (!(ignoreCheck) && !checkCfg()) {\ return MCE_BAD_PARAMS;\ }\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ __mRc = mnvaCom4thGen(mf, __tlvBuff, __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_GET, typeMod);\ if (__mRc && __mRc != ME_REG_ACCESS_RES_NOT_AVLBL) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, __tlvBuff);\ updateTlvFromClassAttr((void*)&__tlvStruct);\ tlvStructName##_pack(&__tlvStruct, __tlvBuff);\ __mRc = mnvaCom4thGen(mf, __tlvBuff, __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_SET, typeMod);\ if (__mRc) {\ return errmsg("failed to set %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ _updated = false;\ return MCE_SUCCESS #define GET_FROM_DEV_4TH_GEN(mf, tlvStructName, tlvNameStr, typeMod) \ MError __mRc;\ int __tlvBuffSize = tlvStructName##_size();\ u_int8_t __tlvBuff[__tlvBuffSize];\ memset(__tlvBuff, 0, __tlvBuffSize);\ struct tlvStructName __tlvStruct;\ memset(&__tlvStruct, 0, sizeof(__tlvStruct));\ if (_updated) {\ return MCE_SUCCESS;\ }\ __mRc = mnvaCom4thGen(mf, &__tlvBuff[0], __tlvBuffSize, tlvTypeIdx, REG_ACCESS_METHOD_GET, typeMod);\ if (__mRc) {\ if (__mRc == ME_REG_ACCESS_RES_NOT_AVLBL) {\ return MCE_SUCCESS;\ }\ return errmsg("Failed to get %s settings: %s", tlvNameStr, m_err2str(__mRc));\ }\ tlvStructName##_unpack(&__tlvStruct, &__tlvBuff[0]);\ updateClassAttrFromTlv((void*)&__tlvStruct);\ _updated = true;\ return MCE_SUCCESS /*static void dealWithSignal() { int sig; sig = mft_signal_is_fired(); if (sig) { // reset received signal mft_signal_set_fired(0); // retore prev handler mft_signal_set_handling(0); //raise signal to let the previous handle deal with it. raise(sig); } mft_signal_set_handling(0); return; }*/ /* * Adrianc: TODO: create a SetTlv class and two child classess , for 4th/5th gen. * each param class will have an instance of SetTlv class */ MError mnvaCom4thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int16_t tlvTypeIdx, reg_access_method_t method, u_int16_t typeMod) { struct tools_open_mnva mnvaTlv; memset(&mnvaTlv, 0, sizeof(struct tools_open_mnva)); mnvaTlv.nv_hdr.length = len >> 2; // length is in dwords mnvaTlv.nv_hdr.type = tlvTypeIdx; mnvaTlv.nv_hdr.type_mod = typeMod; memcpy(mnvaTlv.data, buff, len); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_mnva(mf, method, &mnvaTlv); dealWithSignal(); if (rc) { return rc; } memcpy(buff, mnvaTlv.data, len); return ME_OK; } /*MError mnvaCom5thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int32_t tlvType, reg_access_method_t method, bool getDefault=false) { struct tools_open_nvda mnvaTlv; memset(&mnvaTlv, 0, sizeof(struct tools_open_nvda)); mnvaTlv.nv_hdr.length = len; mnvaTlv.nv_hdr.rd_en = 0; mnvaTlv.nv_hdr.over_en = 1; if (getDefault) { mnvaTlv.nv_hdr.default_ = 1; } // tlvType should be in the correct endianess mnvaTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); memcpy(mnvaTlv.data, buff, len); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); DEBUG_PRINT_SEND(&mnvaTlv, nvda); rc = reg_access_nvda(mf, method, &mnvaTlv); DEBUG_PRINT_RECEIVE(&mnvaTlv, nvda); dealWithSignal(); if (rc) { return rc; } memcpy(buff, mnvaTlv.data, len); return ME_OK; } MError nvqcCom5thGen(mfile* mf, u_int32_t tlvType, bool& suppRead, bool& suppWrite) { struct tools_open_nvqc nvqcTlv; memset(&nvqcTlv, 0, sizeof(struct tools_open_nvqc)); // tlvType should be in the correct endianess nvqcTlv.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(tlvType); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_nvqc(mf, REG_ACCESS_METHOD_GET, &nvqcTlv); dealWithSignal(); if (rc) { return rc; } suppRead = nvqcTlv.support_rd; suppWrite = nvqcTlv.support_wr; return ME_OK; }*/ /*************************** * Class implementations : ***************************/ /* * CfgParams Class implementation : */ CfgParams::CfgParams(mlxCfgType t, u_int32_t tlvT) { // init the ErrMsg Class std::map errmap; errmap[MCE_SUCCESS] = "Success"; errmap[MCE_FAILED] = "General Failure"; errmap[MCE_BAD_PARAMS] = "Bad parameters"; errmap[MCE_BAD_PARAM_VAL] = "Bad parameter value"; errmap[MCE_BAD_STATUS] = "General Failure"; errmap[MCE_GET_DEFAULT_PARAMS] = "Failed to get default params"; updateErrCodes(errmap); type = t; tlvTypeIdx = tlvT; _updated = false; _ignoreHardLimits = false; _ignoreSoftLimits = false; _devCapVec = 0; } int CfgParams::getDefaultParams4thGen(mfile* mf, struct tools_open_query_def_params_global* global_params) { mft_signal_set_handling(1); MError rc = tcif_query_global_def_params(mf, global_params); dealWithSignal(); if (rc) { return errmsg(MCE_BAD_STATUS, "Failed to get default parameters: %s", tcif_err2str(rc)); } return MCE_SUCCESS; } int CfgParams::getDefaultParams4thGen(mfile* mf, int port, struct tools_open_query_def_params_per_port* port_params) { mft_signal_set_handling(1); MError rc = tcif_query_per_port_def_params(mf, port, port_params); dealWithSignal(); if (rc) { return errmsg(MCE_BAD_STATUS, "Failed to get default parameters: %s", tcif_err2str(rc)); } return MCE_SUCCESS; } int CfgParams::getDefaultAndFromDev(mfile* mf) { int rc; rc = getDefaultParams(mf); CHECK_RC(rc); rc = getFromDev(mf); CHECK_RC(rc); return MCE_SUCCESS; } bool CfgParams::checkCfg(mfile* mf) { if (!_ignoreHardLimits && !hardLimitCheck()) { return false; } if (!_ignoreSoftLimits && !softLimitCheck(mf)) { return false; } return true; } bool CfgParams::softLimitCheck(mfile* mf) { // by default not implemented (void)mf; return true; } void CfgParams::setIgnoreSoftLimits(bool val) { _ignoreSoftLimits = val; } void CfgParams::setIgnoreHardLimits(bool val) { _ignoreHardLimits = val; } /* * BootSettingsExtParams Class implementation: */ bool BootSettingsExtParams::hardLimitCheck() { if(_ipVer > 3) { errmsg("illegal IP Ver parameter value. can be 0..3"); return false; } return true; } void BootSettingsExtParams::setParams(u_int32_t ipVer) { _ipVer = ipVer; } /* * BootSettingsExtParams4thGen Class implementation: */ u_int32_t BootSettingsExtParams4thGen::getDefaultParam(mlxCfgParam paramType) { if (paramType == Mcp_Boot_Settings_Ext_IP_Ver_P1 || paramType == Mcp_Boot_Settings_Ext_IP_Ver_P2) { return _ipVerDefault; } return MLXCFG_UNKNOWN; } void BootSettingsExtParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Boot_Settings_Ext_IP_Ver_P1 || paramType == Mcp_Boot_Settings_Ext_IP_Ver_P2) { _ipVer = val; } } u_int32_t BootSettingsExtParams4thGen::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Boot_Settings_Ext_IP_Ver_P1 || paramType == Mcp_Boot_Settings_Ext_IP_Ver_P2) { return _ipVer; } return MLXCFG_UNKNOWN; } bool BootSettingsExtParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)param; struct tools_open_query_def_params_global params; int rc; rc = getDefaultParams4thGen(mf, ¶ms); if (rc) { return false; } return params.boot_ip_ver; } int BootSettingsExtParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port params; int rc; rc = getDefaultParams4thGen(mf, _port, ¶ms); if (rc) { return false; } _ipVerDefault = params.boot_ip_ver; setParams(_ipVerDefault); return MCE_SUCCESS; } int BootSettingsExtParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_sriov_size()]; struct tools_open_boot_settings_ext bootSettingsExtTlv; memset(buff, 0, tools_open_boot_settings_ext_size()); memset(&bootSettingsExtTlv, 0, sizeof(struct tools_open_boot_settings_ext)); // pack it tools_open_boot_settings_ext_pack(&bootSettingsExtTlv, buff); // send it DEBUG_PRINT_SEND(&bootSettingsExtTlv, boot_settings_ext); rc = mnvaCom4thGen(mf, buff, tools_open_boot_settings_ext_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); // check rc DEBUG_PRINT_RECEIVE(&bootSettingsExtTlv, boot_settings_ext); if (rc) {// when attempting to get a nv_cfg tlv from device ME_REG_ACCESS_RES_NOT_AVLBL means - no valid // tlv found. i.e default configuration are on. if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg(MCE_BAD_STATUS, "Failed to get Boot Settings Extras configuration: %s", m_err2str(rc)); } // unpack and update tools_open_boot_settings_ext_unpack(&bootSettingsExtTlv, buff); setParams(bootSettingsExtTlv.ip_ver); _updated = true; return MCE_SUCCESS; } int BootSettingsExtParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_ipVer == MLXCFG_UNKNOWN) { return errmsg("%s please specify all parameters for Boot Settings Extras.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg(mf)) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_boot_settings_ext_size()]; struct tools_open_boot_settings_ext bootSettingsExtTlv; memset(buff, 0, tools_open_boot_settings_ext_size()); memset(&bootSettingsExtTlv, 0, sizeof(struct tools_open_boot_settings_ext)); bootSettingsExtTlv.ip_ver = _ipVer; // pack it tools_open_boot_settings_ext_pack(&bootSettingsExtTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_boot_settings_ext_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); // check rc if (ret) { return errmsg("failed to set Boot Settings Extras params: %s",m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } /* * SriovParams4thGen Class implementation: */ void SriovParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Sriov_En) { _sriovEn = val; } else if (paramType == Mcp_Num_Of_Vfs) { _numOfVfs = val; } } u_int32_t SriovParams4thGen::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Sriov_En) { return _sriovEn; } else if (paramType == Mcp_Num_Of_Vfs) { return _numOfVfs; } return MLXCFG_UNKNOWN; } u_int32_t SriovParams4thGen::getDefaultParam(mlxCfgParam paramType) { if (paramType == Mcp_Sriov_En) { return _sriovEnDefault; } else if (paramType == Mcp_Num_Of_Vfs) { return _numOfVfsDefault; } return MLXCFG_UNKNOWN; } bool SriovParams4thGen::hardLimitCheck() { if ((_numOfVfs > _maxVfs)) { errmsg("Number of VFs exceeds limit (%d).", _maxVfs); return false; } if (_sriovEn != 0 && _sriovEn != 1) { errmsg("illegal SRIOV_EN parameter value. (should be 0 or 1)"); return false; } return true; } /* * SriovParam4thGen Class implementation */ bool SriovParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return _devCapVec & SRIOV_MASK; } int SriovParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_global global_params; int rc; rc = updateMaxVfs(mf); CHECK_RC(rc); rc = getDefaultParams4thGen(mf, &global_params); if (rc == MCE_SUCCESS) { _sriovEnDefault = global_params.sriov_en; _numOfVfsDefault = global_params.num_vfs; setParams(_sriovEnDefault, _numOfVfsDefault); } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } void SriovParams4thGen::setParams(u_int32_t sriovEn, u_int32_t numOfVfs) { _sriovEn = sriovEn; _numOfVfs = numOfVfs; } int SriovParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_sriov_size()]; struct tools_open_sriov sriovTlv; memset(buff, 0, tools_open_sriov_size()); memset(&sriovTlv, 0, sizeof(struct tools_open_sriov)); // pack it tools_open_sriov_pack(&sriovTlv, buff); // send it DEBUG_PRINT_SEND(&sriovTlv, sriov); rc = mnvaCom4thGen(mf, buff, tools_open_sriov_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, 0); // check rc DEBUG_PRINT_RECEIVE(&sriovTlv, sriov); if (rc) {// when attempting to get a nv_cfg tlv from device ME_REG_ACCESS_RES_NOT_AVLBL means - no valid // tlv found. i.e default configuration are on. if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg(MCE_BAD_STATUS, "Failed to get SRIOV configuration: %s", m_err2str(rc)); } // unpack and update tools_open_sriov_unpack(&sriovTlv, buff); setParams(sriovTlv.sriov_en, sriovTlv.total_vfs); _updated = true; return MCE_SUCCESS; } int SriovParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_sriovEn == MLXCFG_UNKNOWN || _numOfVfs == MLXCFG_UNKNOWN) { return errmsg("%s please specify all parameters for SRIOV.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg(mf)) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_sriov_size()]; struct tools_open_sriov sriovTlv; memset(buff, 0, tools_open_sriov_size()); memset(&sriovTlv, 0, sizeof(struct tools_open_sriov)); sriovTlv.sriov_en = _sriovEn; sriovTlv.total_vfs = _numOfVfs; // pack it tools_open_sriov_pack(&sriovTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_sriov_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, 0); // check rc if (ret) { return errmsg("failed to set SRIOV params: %s",m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } int SriovParams4thGen::updateMaxVfs(mfile* mf) { u_int64_t data = 0; int rc = tcif_query_dev_cap(mf, MAX_VFS_ADDR, &data); if (rc) { return errmsg("failed to query device capabilities: %s", m_err2str((MError)rc)); } _maxVfs = (u_int32_t)(data & 0xff); if (_maxVfs == 0) { // defined in CX PRM , if max_func_idx=0 then all functions(128) are operational _maxVfs = 128; } _maxVfs--; // remove 1 physical function return MCE_SUCCESS; } bool SriovParams4thGen::softLimitCheck(mfile* mf) { u_int32_t barSz = 0; BarSzParams4thGen barParams; if (!mf) { return false; } if (barParams.getDefaultAndFromDev(mf)) { return false; } if (_sriovEn == 0) { return true; } barSz = barParams.getParam(Mcp_Log_Bar_Size); if (barSz == MLXCFG_UNKNOWN) { return errmsg("Failed to get the bar size from device"); } // this is the default log2 bar size , we require (numOfVfs+1)*(2^log_uar_bar) <= 512 or else the node might not boot double TotalMem = (_numOfVfs + 1)*(1 << barSz); // 1 for physical func if ((TotalMem > 512)){ unsigned int maxAlowedVfs =static_cast(512/(1 << barSz)) - 1; errmsg("illegal SRIOV parameter value. Maximal number of VFs: %d", maxAlowedVfs < _maxVfs ? maxAlowedVfs : _maxVfs); return false; } return true; } /* * CX3GlobalConfParams Class implementation: */ bool CX3GlobalConfParams::cfgSupported(mfile* mf, mlxCfgParam param) { (void)param; struct tools_open_query_def_params_global params; int rc; rc = getDefaultParams4thGen(mf, ¶ms); if (rc) { return false; } return params.nv_cq_timestamp_supported; } void CX3GlobalConfParams::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_CQ_Timestamp) { _timestamp = val; } } u_int32_t CX3GlobalConfParams::getParam(mlxCfgParam paramType) { if (paramType == Mcp_CQ_Timestamp) { return _timestamp; } return MLXCFG_UNKNOWN; } u_int32_t CX3GlobalConfParams::getDefaultParam(mlxCfgParam paramType) { if (paramType == Mcp_CQ_Timestamp) { return _timestampDefault; } return MLXCFG_UNKNOWN; } int CX3GlobalConfParams::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_nv_cx3_global_conf_size()]; struct tools_open_nv_cx3_global_conf globalConfTlv; memset(buff, 0, tools_open_nv_cx3_global_conf_size()); memset(&globalConfTlv, 0, sizeof(struct tools_open_nv_cx3_global_conf)); // pack it tools_open_nv_cx3_global_conf_pack(&globalConfTlv, buff); // send it DEBUG_PRINT_SEND(&globalConfTlv, nv_cx3_global_conf); rc = mnvaCom4thGen(mf, buff, tools_open_nv_cx3_global_conf_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, 0); // check rc DEBUG_PRINT_RECEIVE(&globalConfTlv, nv_cx3_global_conf); if (rc) {// when attempting to get a nv_cfg tlv from device ME_REG_ACCESS_RES_NOT_AVLBL means - no valid // tlv found. i.e default configuration are on. if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg(MCE_BAD_STATUS, "Failed to get CX3_GLOBAL_CONF configuration: %s", m_err2str(rc)); } // unpack and update tools_open_nv_cx3_global_conf_unpack(&globalConfTlv, buff); setParams(globalConfTlv.cq_timestamp); _updated = true; return MCE_SUCCESS; } int CX3GlobalConfParams::setOnDev(mfile* mf, bool ignoreCheck) { if (_timestamp == MLXCFG_UNKNOWN) { return errmsg("%s please specify all parameters for CX3_GLOBAL_CONF.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg(mf)) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_nv_cx3_global_conf_size()]; struct tools_open_nv_cx3_global_conf globalConfTlv; memset(buff, 0, tools_open_nv_cx3_global_conf_size()); memset(&globalConfTlv, 0, sizeof(struct tools_open_nv_cx3_global_conf)); globalConfTlv.cq_timestamp = _timestamp; // pack it tools_open_nv_cx3_global_conf_pack(&globalConfTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_nv_cx3_global_conf_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, 0); // check rc if (ret) { return errmsg("failed to set CX3_GLOBAL_CONF params: %s",m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } int CX3GlobalConfParams::getDefaultParams(mfile *mf) { struct tools_open_query_def_params_global global_params; int rc; rc = getDefaultParams4thGen(mf, &global_params); if (rc) { return MCE_GET_DEFAULT_PARAMS; } _timestampDefault = global_params.default_cq_timestamp; setParams(_timestampDefault); return MCE_SUCCESS; } bool CX3GlobalConfParams::hardLimitCheck() { if (_timestamp != 0 && _timestamp != 1) { errmsg("illegal CQ_TIMESTAMP parameter value. (should be 0 or 1)"); return false; } return true; } void CX3GlobalConfParams::setParams(u_int32_t timestamp) { _timestamp = timestamp; } /* * WolParams Class implementation : */ bool WolParams::hardLimitCheck() { if (_wolMagicEn == 0 || _wolMagicEn == 1 ) { return true; } errmsg("illegal WOL parameter value. can be either 0 or 1."); return false; } void WolParams::setParams(u_int32_t wolMagicEn) { _wolMagicEn = wolMagicEn; } /* * WolParams4thGen Class implementation : */ void WolParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2) ) { _wolMagicEn = val; } } u_int32_t WolParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2)) { return _wolMagicEn; } return MLXCFG_UNKNOWN; } u_int32_t WolParams4thGen::getDefaultParam(mlxCfgParam paramType) { if ((paramType == Mcp_Wol_Magic_En_P1 && _port == 1) || (paramType == Mcp_Wol_Magic_En_P2 && _port == 2)) { return _wolMagicEnDefault; } return MLXCFG_UNKNOWN; } bool WolParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return ((_devCapVec & WOL_P1_MASK) && _port == 1) || ((_devCapVec & WOL_P2_MASK) && _port == 2 ); } int WolParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port port_params; int rc = getDefaultParams4thGen(mf, _port , &port_params); if (rc == MCE_SUCCESS) { _wolMagicEnDefault = port_params.default_en_wol_magic; setParams(_wolMagicEnDefault); } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } int WolParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_wol_size()]; struct tools_open_wol wolTlv; memset(buff, 0, tools_open_wol_size()); memset(&wolTlv, 0, sizeof(struct tools_open_wol)); // pack it tools_open_wol_pack(&wolTlv, buff); // send it rc = mnvaCom4thGen(mf, buff, tools_open_wol_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); // check rc if (rc) { if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get WOL port%d configuration: %s", _port, m_err2str(rc)); } // unpack and update tools_open_wol_unpack(&wolTlv, buff); setParams(wolTlv.en_wol_magic); _updated = true; return MCE_SUCCESS; } int WolParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_wolMagicEn == MLXCFG_UNKNOWN) { return errmsg("%s please specify all the parameters for WOL.", err()? err() : ""); } if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_wol_size()]; struct tools_open_wol wolTlv; memset(buff, 0, tools_open_wol_size()); memset(&wolTlv, 0, sizeof(struct tools_open_wol)); wolTlv.en_wol_magic= _wolMagicEn; // pack it tools_open_wol_pack(&wolTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_wol_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); // check rc if (ret) { return errmsg("failed to set WOL params for port%d: %s", _port, m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } /* * BarSzParams Class implementation : */ void BarSzParams::setParam(mlxCfgParam paramType, u_int32_t val) { if (paramType == Mcp_Log_Bar_Size) { _logBarSz = val; } } u_int32_t BarSzParams::getParam(mlxCfgParam paramType) { if (paramType == Mcp_Log_Bar_Size) { return _logBarSz; } return MLXCFG_UNKNOWN; } u_int32_t BarSzParams::getDefaultParam(mlxCfgParam paramType) { if (paramType == Mcp_Log_Bar_Size) { return _logBarSzDefault; } return MLXCFG_UNKNOWN; } bool BarSzParams::hardLimitCheck() { if (_logBarSz > _maxLogBarSz ) { errmsg("given bar size is too large, max allowed log2 bar size: 0x%x", _maxLogBarSz); return false; } return true; } void BarSzParams::setParams(u_int32_t logBarSz) { _logBarSz = logBarSz; } /* * BarSzParams4thGen Class implementation : */ bool BarSzParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; return _devCapVec & BAR_SZ_MASK ; } int BarSzParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_global global_params; int rc = getDefaultParams4thGen(mf, &global_params); if ((rc == MCE_SUCCESS) & 0) { //TODO: adrianc: remove the & 0 when FW displays thesee parameters correctly in QUERY_DEF_PARAMS command _logBarSzDefault = global_params.uar_bar_size; _maxLogBarSz = global_params.max_uar_bar_size; setParams(_logBarSzDefault); } else { // attempt to take from query_dev_cap rc = getDefaultBarSz(mf); } return rc; } int BarSzParams4thGen::getDefaultBarSz(mfile* mf) { u_int64_t data = 0; MError rc = tcif_query_dev_cap(mf, MAX_BAR_SZ_ADDR, &data); if (rc) { return errmsg(MCE_BAD_STATUS,"Failed to query device capabilities. %s", tcif_err2str(rc)); } _maxLogBarSz = EXTRACT64(data, 3, 6); rc = tcif_query_dev_cap(mf, DEFAULT_BAR_SZ_ADDR, &data); if (rc) { return errmsg(MCE_BAD_STATUS,"Failed to query device capabilities. %s", tcif_err2str(rc)); } _logBarSzDefault = EXTRACT64(data, 16, 6) + 1; //adrianc: this field reports only half of the bar size (i.e without the blue flame) setParams(_logBarSzDefault); return MCE_SUCCESS; } int BarSzParams4thGen::getFromDev(mfile* mf) { if (_updated) { return MCE_SUCCESS; } MError rc; // prep tlv u_int8_t buff[tools_open_bar_size_size()]; struct tools_open_bar_size barSzTlv; memset(buff, 0, tools_open_bar_size_size()); memset(&barSzTlv, 0, sizeof(struct tools_open_bar_size)); // pack it tools_open_bar_size_pack(&barSzTlv, buff); // send it rc = mnvaCom4thGen(mf, buff, tools_open_bar_size_size(), tlvTypeIdx, REG_ACCESS_METHOD_GET, 0); // check rc if (rc) { if (rc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get BAR size configuration: %s", m_err2str(rc)); } // unpack and update tools_open_bar_size_unpack(&barSzTlv, buff); setParams(barSzTlv.log_uar_bar_size); _updated = true; return MCE_SUCCESS; } int BarSzParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { if (_logBarSz == MLXCFG_UNKNOWN) { return errmsg("%s please specify all the parameters for BAR size.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg(mf)) { return MCE_BAD_PARAMS; } // prep tlv MError ret; u_int8_t buff[tools_open_bar_size_size()]; struct tools_open_bar_size barSzTlv; memset(buff, 0, tools_open_bar_size_size()); memset(&barSzTlv, 0, sizeof(struct tools_open_bar_size)); barSzTlv.log_uar_bar_size= _logBarSz; // pack it tools_open_bar_size_pack(&barSzTlv, buff); // send it ret = mnvaCom4thGen(mf, buff, tools_open_bar_size_size(), tlvTypeIdx, REG_ACCESS_METHOD_SET, 0); // check rc if (ret) { return errmsg("failed to set BAR size params: %s",m_err2str(ret)); } _updated = false; return MCE_SUCCESS; } bool BarSzParams4thGen::softLimitCheck(mfile* mf) { u_int32_t numOfVfs = 0; int sriovEn; SriovParams4thGen sriovParams; if (!mf) { return false; } if (sriovParams.getDefaultAndFromDev(mf)) { errmsg("Failed to get SRIOV parameters from device: %s", sriovParams.err()); return false; } numOfVfs = sriovParams.getParam(Mcp_Num_Of_Vfs); sriovEn = sriovParams.getParam(Mcp_Sriov_En); if (numOfVfs== MLXCFG_UNKNOWN || numOfVfs == MLXCFG_UNKNOWN) { errmsg("Illegal SRIOV parameters values"); return false; } if (sriovEn == 0) { return true; } // this is the default log2 bar size , we require numOfVfs*(2^log_uar_bar) <= 512 or else the node might not boot double TotalMem = (numOfVfs+1)*(1 << _logBarSz); //printf("-D- num_of_vfs*2^(bar_sz+1) = %d*2^%ld = %d\n", _numOfVfs, data, (int)(_numOfVfs*(std::pow((double)2, (int)data)))); //printf("-D- maxVfs(default set by fw) : %d\n", _maxVfs); if (TotalMem > 512){ unsigned int maxAlowedLogBarSz =static_cast(log2((512/(numOfVfs + 1 )))); errmsg("illegal Bar Size parameter value. Maximal allowed bar size: %d", maxAlowedLogBarSz < _maxLogBarSz ? maxAlowedLogBarSz : _maxLogBarSz); return false; } return true; } /* * VpiParams Class implementation : */ int VpiParams::getFromDevComPre() { // prep tlv _tlvBuff.resize(TOOLS_OPEN_VPI_SETTINGS_SIZE); memset(&_tlvBuff[0], 0, TOOLS_OPEN_VPI_SETTINGS_SIZE); memset(&_vpiTlv, 0, sizeof(struct tools_open_vpi_settings)); // pack it tools_open_vpi_settings_pack(&_vpiTlv, &_tlvBuff[0]); return MCE_SUCCESS; } int VpiParams::getFromDevComPost(MError mnvaComRC) { if (mnvaComRC) { if (mnvaComRC == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get VPI port%d configuration: %s", _port, m_err2str(mnvaComRC)); } // unpack and update tools_open_vpi_settings_unpack(&_vpiTlv, &_tlvBuff[0]); setParams(_vpiTlv.network_link_type, _vpiTlv.default_link_type, _vpiTlv.phy_type, _vpiTlv.xfi_mode, _vpiTlv.force_mode); _updated = true; return MCE_SUCCESS; } void VpiParams::setParams(u_int32_t linkType, u_int32_t defaultLinkType, u_int32_t phyType, u_int32_t xfiMode, u_int32_t forceMode){ _linkType = linkType; _defaultLinkType = defaultLinkType; _phyType = phyType; _xfiMode = xfiMode; _forceMode = forceMode; } int VpiParams::setOnDevComPre(bool ignoreCheck) { if (_isVPISupported && (_linkType == MLXCFG_UNKNOWN || _defaultLinkType == MLXCFG_UNKNOWN)) { return errmsg("%s please specify all the parameters for VPI settings.", err() ? err() : ""); } if (_isForceModeSupported && (_phyType == MLXCFG_UNKNOWN || _xfiMode == MLXCFG_UNKNOWN || _forceMode == MLXCFG_UNKNOWN)) { return errmsg("%s please specify all the parameters for VPI Force Mode settings.", err() ? err() : ""); } if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } _tlvBuff.resize(TOOLS_OPEN_VPI_SETTINGS_SIZE); memset(&_tlvBuff[0], 0, _tlvBuff.size()); memset(&_vpiTlv, 0, sizeof(struct tools_open_vpi_settings)); _vpiTlv.network_link_type = _linkType; _vpiTlv.default_link_type = _defaultLinkType; _vpiTlv.phy_type = _phyType; _vpiTlv.xfi_mode = _xfiMode; _vpiTlv.force_mode = _forceMode; // pack it tools_open_vpi_settings_pack(&_vpiTlv, &_tlvBuff[0]); return MCE_SUCCESS; } int VpiParams::setOnDevComPost(MError mnvaComRC) { if (mnvaComRC) { return errmsg("failed to set VPI port%d params: %s", _port, m_err2str(mnvaComRC)); } _updated = false; return MCE_SUCCESS; } /* * VpiParams4thGen Class implementation : */ void VpiParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2)) { _linkType = val; } else if ((paramType == Mcp_Phy_Type_P1 && _port == 1) || (paramType == Mcp_Phy_Type_P2 && _port == 2)) { _phyType = val; } else if ((paramType == Mcp_Xfi_Mode_P1 && _port == 1) || (paramType == Mcp_Xfi_Mode_P2 && _port == 2)) { _xfiMode = val; } else if ((paramType == Mcp_Force_Mode_P1 && _port == 1) || (paramType == Mcp_Force_Mode_P2 && _port == 2)) { _forceMode = val; } } u_int32_t VpiParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2) ) { return _linkType; } else if ((paramType == Mcp_Phy_Type_P1 && _port == 1) || (paramType == Mcp_Phy_Type_P2 && _port == 2)) { return _phyType; } else if ((paramType == Mcp_Xfi_Mode_P1 && _port == 1) || (paramType == Mcp_Xfi_Mode_P2 && _port == 2)) { return _xfiMode; } else if ((paramType == Mcp_Force_Mode_P1 && _port == 1) || (paramType == Mcp_Force_Mode_P2 && _port == 2)) { return _forceMode; } return MLXCFG_UNKNOWN; } u_int32_t VpiParams4thGen::getDefaultParam(mlxCfgParam paramType) { if ((paramType == Mcp_Link_Type_P1 && _port == 1 ) || (paramType == Mcp_Link_Type_P2 && _port == 2) ) { return _linkTypeDefault; } else if ((paramType == Mcp_Phy_Type_P1 && _port == 1) || (paramType == Mcp_Phy_Type_P2 && _port == 2)) { return _phyTypeDefault; } else if ((paramType == Mcp_Xfi_Mode_P1 && _port == 1) || (paramType == Mcp_Xfi_Mode_P2 && _port == 2)) { return _xfiModeDefault; } else if ((paramType == Mcp_Force_Mode_P1 && _port == 1) || (paramType == Mcp_Force_Mode_P2 && _port == 2)) { return _forceModeDefault; } return MLXCFG_UNKNOWN; } int VpiParams4thGen::getDefaultParamsAux(mfile* mf) { struct tools_open_query_def_params_per_port port_params; memset(&port_params, 0, sizeof(port_params)); _defaultLinkTypeDefault = 0; // not used for 4th gen devices , we give it a default value int rc = getDefaultParams4thGen(mf, _port , &port_params); if (rc) { return MCE_GET_DEFAULT_PARAMS; } if (port_params.default_network_link_type) { _linkTypeDefault = port_params.default_network_link_type; } _isForceModeSupported = port_params.nv_config_vpi_force_mode; _phyTypeDefault = port_params.default_vpi_phy_type; _xfiModeDefault = port_params.default_vpi_xfi_mode; _forceModeDefault = port_params.default_vpi_force_mode; return MCE_SUCCESS; } bool VpiParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)mf; (void)param; int rc; if (((param == Mcp_Phy_Type_P1 || param == Mcp_Xfi_Mode_P1 || param == Mcp_Force_Mode_P1) && (_port == 1)) || ((param == Mcp_Phy_Type_P2 || param == Mcp_Xfi_Mode_P2 || param == Mcp_Force_Mode_P2) && (_port == 2))) { rc = getDefaultParamsAux(mf); bool x = ((!rc) && _isForceModeSupported); return x; } _isVPISupported = ((_devCapVec & VPI_P1_MASK) && _port == 1) || ((_devCapVec & VPI_P2_MASK) && _port == 2); if (param == Mcp_Last) { rc = getDefaultParamsAux(mf); bool x = ((!rc) && _isForceModeSupported); return (x || _isVPISupported); } return _isVPISupported; } int VpiParams4thGen::getDefaultParams(mfile* mf) { int rc = getDefaultParamsAux(mf); if (rc) { return rc; } _linkType = _linkTypeDefault; _defaultLinkType = _defaultLinkTypeDefault; _phyType = _phyTypeDefault; _xfiMode = _xfiModeDefault; _forceMode = _forceModeDefault; return MCE_SUCCESS; } int VpiParams4thGen::getFromDev(mfile* mf) { MError mRc; int rc; if (_updated) { return MCE_SUCCESS; } if((rc = getFromDevComPre())) { return rc; } mRc = mnvaCom4thGen(mf, &_tlvBuff[0], TOOLS_OPEN_VPI_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); return getFromDevComPost(mRc); } int VpiParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; int rc; if ((rc = setOnDevComPre(ignoreCheck))) { return rc; } mRc = mnvaCom4thGen(mf, &_tlvBuff[0], TOOLS_OPEN_VPI_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); return setOnDevComPost(mRc); } bool VpiParams4thGen::hardLimitCheck() { if (_isVPISupported) { if (_linkType < 1 || _linkType > 3) { errmsg("illegal VPI link type (should be 1|2|3)."); return false; } } if (_isForceModeSupported) { if (_phyType < 1 || _phyType > 3) { errmsg("illegal Phy Type value (shold be 1|2|3)"); return false; } if (_xfiMode > 2) { errmsg("illegal Xfi Mode value (should be 0|1|2)"); return false; } if (_forceMode > 1) { errmsg("illegal Force Mode value (should be 0|1)"); return false; } } return true; } /* * InfinibandBootSettingsParams4thGen Class implementation: */ bool InfinibandBootSettingsParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)param; struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc) { return false; } return portParams.nv_config_infiniband_boot_settings; } void InfinibandBootSettingsParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) { _bootPkey = val; } } u_int32_t InfinibandBootSettingsParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) { return _bootPkey; } return MLXCFG_UNKNOWN; } u_int32_t InfinibandBootSettingsParams4thGen::getDefaultParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_Pkey_P1 && _port == 1) || (paramType == Mcp_Boot_Pkey_P2 && _port == 2)) { return _bootPkeyDefault; } return MLXCFG_UNKNOWN; } int InfinibandBootSettingsParams4thGen::getFromDev(mfile* mf) { MError mRc; u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE] = {0}; struct tools_open_infiniband_boot_settings bootSettingsTlv; memset(&bootSettingsTlv, 0, sizeof(bootSettingsTlv)); if (_updated) { return MCE_SUCCESS; } mRc = mnvaCom4thGen(mf, &tlvBuff[0], TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_GET, _port); if (mRc) { if (mRc == ME_REG_ACCESS_RES_NOT_AVLBL) { return MCE_SUCCESS; } return errmsg("Failed to get Infiniband Boot Settings: %s", m_err2str(mRc)); } // unpack and update tools_open_infiniband_boot_settings_unpack(&bootSettingsTlv, &tlvBuff[0]); _bootPkey = bootSettingsTlv.boot_pkey; _updated = true; return MCE_SUCCESS; } int InfinibandBootSettingsParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { MError mRc; if (!ignoreCheck && !checkCfg()) { return MCE_BAD_PARAMS; } // get Tlv modify it and set it u_int8_t tlvBuff[TOOLS_OPEN_INFINIBAND_BOOT_SETTINGS_SIZE] = {0}; struct tools_open_infiniband_boot_settings bootSettingsTlv; memset(&bootSettingsTlv, 0, sizeof(bootSettingsTlv)); bootSettingsTlv.boot_pkey = _bootPkey; // pack it tools_open_infiniband_boot_settings_pack(&bootSettingsTlv, tlvBuff); mRc = mnvaCom4thGen(mf, tlvBuff, TOOLS_OPEN_TPT_CONFIGURATION_SIZE, tlvTypeIdx, REG_ACCESS_METHOD_SET, _port); if (mRc) { return errmsg("failed to set Infiniband Boot Settings: %s", m_err2str(mRc)); } _updated = false; return MCE_SUCCESS; } int InfinibandBootSettingsParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc == MCE_SUCCESS) { _bootPkeyDefault = portParams.default_boot_pkey; setParams(_bootPkeyDefault); } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } void InfinibandBootSettingsParams4thGen::setParams(u_int32_t bootPkey) { _bootPkey = bootPkey; } bool InfinibandBootSettingsParams4thGen::hardLimitCheck() { if (_bootPkey >= (1 << 16)) { errmsg("Illegal BOOT_PKEY_P%d parameter value, valid values: [0..65535]", ((_port == 1) ? 1 : 2)); return false; } return true; } /* * PrebootBootSettingsParams4thGen Class implementation: */ bool PrebootBootSettingsParams4thGen::cfgSupported(mfile* mf, mlxCfgParam param) { (void)param; struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc) { return false; } return true; //portParams.nv_config_boot_parameters; <--BUG fw is not updating this bit, assume supported if query_def_params command passess } void PrebootBootSettingsParams4thGen::setParam(mlxCfgParam paramType, u_int32_t val) { if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) { _bootOptionRomEn = val; } if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) { _bootVlanEn = val; } if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) { _bootRetryCnt = val; } if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) { _legacyBootProtocol = val; } if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) { _bootVlan = val; } } u_int32_t PrebootBootSettingsParams4thGen::getParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) { return _bootOptionRomEn; } if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) { return _bootVlanEn; } if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) { return _bootRetryCnt; } if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) { return _legacyBootProtocol; } if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) { return _bootVlan; } return MLXCFG_UNKNOWN; } u_int32_t PrebootBootSettingsParams4thGen::getDefaultParam(mlxCfgParam paramType) { if ((paramType == Mcp_Boot_Option_Rom_En_P1 && _port == 1) || (paramType == Mcp_Boot_Option_Rom_En_P2 && _port == 2)) { return _bootOptionRomEnDefault; } if ((paramType == Mcp_Boot_Vlan_En_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_En_P2 && _port == 2)) { return _bootVlanEnDefault; } if ((paramType == Mcp_Boot_Retry_Cnt_P1 && _port == 1) || (paramType == Mcp_Boot_Retry_Cnt_P2 && _port == 2)) { return _bootRetryCntDefault; } if ((paramType == Mcp_Legacy_Boot_Protocol_P1 && _port == 1) || (paramType == Mcp_Legacy_Boot_Protocol_P2 && _port == 2)) { return _legacyBootProtocolDefault; } if ((paramType == Mcp_Boot_Vlan_P1 && _port == 1) || (paramType == Mcp_Boot_Vlan_P2 && _port == 2)) { return _bootVlanDefault; } return MLXCFG_UNKNOWN; } void PrebootBootSettingsParams4thGen::setParams(u_int32_t bootOptionRomEn, u_int32_t bootVlanEn, u_int32_t bootRetryCnt, u_int32_t legacyBootProtocol, u_int32_t bootVlan) { _bootOptionRomEn = bootOptionRomEn; _bootVlanEn = bootVlanEn; _bootRetryCnt = bootRetryCnt; _legacyBootProtocol = legacyBootProtocol; _bootVlan = bootVlan; } void PrebootBootSettingsParams4thGen::updateClassAttrFromDefaultParams() { setParams(_bootOptionRomEnDefault, _bootVlanEnDefault, _bootRetryCntDefault, _legacyBootProtocolDefault, _bootVlanDefault); } int PrebootBootSettingsParams4thGen::getFromDev(mfile* mf) { GET_FROM_DEV_4TH_GEN(mf, tools_open_preboot_boot_settings, "Preboot Boot Settings", _port); } int PrebootBootSettingsParams4thGen::setOnDev(mfile* mf, bool ignoreCheck) { SET_ON_DEV_4TH_GEN(mf, ignoreCheck, tools_open_preboot_boot_settings, "Preboot Boot Settings", _port); } void PrebootBootSettingsParams4thGen::updateTlvFromClassAttr(void* tlv) { struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv; prebootTlv->boot_option_rom_en = _bootOptionRomEn; prebootTlv->boot_vlan_en = _bootVlanEn; prebootTlv->boot_retry_count = _bootRetryCnt; prebootTlv->legacy_boot_protocol = _legacyBootProtocol; prebootTlv->boot_vlan = _bootVlan; } void PrebootBootSettingsParams4thGen::updateClassAttrFromTlv(void* tlv) { struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv; _bootOptionRomEn = prebootTlv->boot_option_rom_en; _bootVlanEn = prebootTlv->boot_vlan_en; _bootRetryCnt = prebootTlv->boot_retry_count; _legacyBootProtocol = prebootTlv->legacy_boot_protocol; _bootVlan = prebootTlv->boot_vlan; } void PrebootBootSettingsParams4thGen::updateClassDefaultAttrFromTlv(void* tlv) { struct tools_open_preboot_boot_settings* prebootTlv = (struct tools_open_preboot_boot_settings*)tlv; _bootOptionRomEnDefault = prebootTlv->boot_option_rom_en; _bootVlanEnDefault = prebootTlv->boot_vlan_en; _bootRetryCntDefault = prebootTlv->boot_retry_count; _legacyBootProtocolDefault = prebootTlv->legacy_boot_protocol; _bootVlanDefault = prebootTlv->boot_vlan; } int PrebootBootSettingsParams4thGen::getDefaultParams(mfile* mf) { struct tools_open_query_def_params_per_port portParams; int rc; rc = getDefaultParams4thGen(mf, _port, &portParams); if (rc == MCE_SUCCESS) { _bootOptionRomEnDefault = portParams.default_boot_option_rom_en; _bootVlanEnDefault = portParams.default_boot_vlan_en; _bootRetryCntDefault = portParams.default_boot_retry_cnt; _legacyBootProtocolDefault = portParams.default_boot_protocol; _bootVlanDefault = portParams.default_boot_vlan; updateClassAttrFromDefaultParams(); } else { rc = MCE_GET_DEFAULT_PARAMS; } return rc; } bool PrebootBootSettingsParams4thGen::hardLimitCheck() { if (_bootOptionRomEn > 1) { errmsg("Illegal BOOT_OPTION_ROM_EN_P%d parameter value, valid values: 0 or 1", ((_port == 1) ? 1 : 2)); return false; } if (_bootVlanEn > 1) { errmsg("Illegal BOOT_VLAN_EN_P%d parameter value, valid values: 0 or 1", ((_port == 1) ? 1 : 2)); return false; } if (_bootRetryCnt > 7) { errmsg("Illegal BOOT_RETRY_CNT_P%d parameter value, valid values: [0..7]", ((_port == 1) ? 1 : 2)); return false; } if (_legacyBootProtocol > 3) { errmsg("Illegal LEGACY_BOOT_PROTOCOL_P%d parameter value, valid values: [0..3]", ((_port == 1) ? 1 : 2)); return false; } if (_bootVlan >= (1 << 12)) { errmsg("Illegal BOOT_VLAN_P%d parameter value, valid values: [0..4095]", ((_port == 1) ? 1 : 2)); return false; } return true; } mstflint-4.8.0/mlxconfig/Makefile.in0000644000175000017500000007511713201023226016356 0ustar mehdimehdi# Makefile.in generated by automake 1.13.4 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; 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distclean-tags distdir dvi dvi-am html html-am info info-am \ install install-am install-binPROGRAMS install-data \ install-data-am install-dvi install-dvi-am install-exec \ install-exec-am install-html install-html-am install-info \ install-info-am install-man install-pdf install-pdf-am \ install-ps install-ps-am install-strip installcheck \ installcheck-am installdirs installdirs-am maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ tags tags-am uninstall uninstall-am uninstall-binPROGRAMS # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: mstflint-4.8.0/mlxconfig/mlxcfg_status.h0000644000175000017500000000441413201023206017333 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_status.h * * Created on: Mar 23, 2015 * Author: adrianc */ #ifndef MLXCFG_STATUS_H_ #define MLXCFG_STATUS_H_ /* * Enum for handling error messages */ typedef enum { MCE_SUCCESS = 0, MCE_FAILED, MCE_TLV_NOT_FOUND, MCE_TLV_NOT_SUPP, MCE_NVCFG_NOT_SUPP, MCE_TOOLS_HCR_NOT_SUPP, MCE_DRIVER_DOWN, MCE_UNSUPPORTED_DEVICE, MCE_UNSUPPORTED_CFG, MCE_BAD_PARAMS, MCE_BAD_PARAM_VAL, MCE_DEV_BUSY, MCE_UNKNOWN_TLV, MCE_REG_NOT_SUPP, MCE_METHOD_NOT_SUPP, MCE_RES_NOT_AVAIL, MCE_CONF_CORRUPT, MCE_TLV_LEN_TOO_SMALL, MCE_BAD_CONFIG, MCE_ERASE_EXEEDED, MCE_BAD_OP, MCE_BAD_STATUS, MCE_CR_ERROR, MCE_NOT_IMPLEMENTED, MCE_INCOMPLETE_PARAMS, MCE_OPEN_DEVICE, MCE_PCI, MCE_GET_DEFAULT_PARAMS, MCE_UNKNOWN_ERR }McStatus; #endif /* MLXCFG_STATUS_H_ */ mstflint-4.8.0/mlxconfig/mlxcfg_param.h0000755000175000017500000002172313201023206017115 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_param.h * * Created on: May 24, 2016 * Author: ahmads */ #ifndef MLXCFG_PARAM_H_ #define MLXCFG_PARAM_H_ #include #include #include #include "mlxcfg_view.h" using namespace std; class ParamValue { public: ParamValue(string size); ParamValue(u_int32_t size) : _size(size) {} virtual string getVal () = 0; virtual void setVal (string s) = 0; virtual void setVal (u_int32_t); virtual void setVal (vector); virtual void pack (u_int8_t* buff, u_int32_t offset) = 0; virtual void pack (u_int8_t* buff, string offset) = 0; virtual void unpack (u_int8_t* buff, u_int32_t offset) = 0; virtual void unpack (u_int8_t* buff, string offset) = 0; virtual u_int32_t getIntVal (); virtual void parseValue (string, u_int32_t&, string&); virtual ~ParamValue() {}; protected: u_int32_t _size; private: u_int32_t getSizeInBits(string size); }; class UnsignedParamValue : public ParamValue { public: UnsignedParamValue(string size) : ParamValue(size){} UnsignedParamValue(u_int32_t size) : ParamValue(size){} virtual string getVal (); virtual void setVal (string s); virtual void setVal (const u_int32_t); void pack (u_int8_t* buff, u_int32_t offset); void pack (u_int8_t* buff, string offset); void unpack (u_int8_t* buff, string offset); void unpack (u_int8_t* buff, u_int32_t offset); u_int32_t getIntVal (); virtual void parseValue (string, u_int32_t&, string&); u_int32_t _value; protected: void parseValueAux(string, u_int32_t&, string&, int base = 0); }; class EnumParamValue : public UnsignedParamValue { public: EnumParamValue(string size, map textualValues); EnumParamValue(u_int32_t size, map textualValues); string getVal (); void setVal (string strVal); void setVal (u_int32_t val); void parseValue (string, u_int32_t&, string&); map _textualValues; }; class BoolParamValue : public EnumParamValue { public: BoolParamValue(string size); private: static map initBoolTextualValues(); }; class BinaryParamValue : public UnsignedParamValue { public: BinaryParamValue(string size) : UnsignedParamValue(size) {}; BinaryParamValue(u_int32_t size) : UnsignedParamValue(size) {}; string getVal (); void setVal (string val); void parseValue (string, u_int32_t&, string&); static void trimHexString(string& s); }; class StringParamValue : public ParamValue { public: StringParamValue(u_int32_t size) : ParamValue(size) {} string getVal (); void setVal (string s); void pack (u_int8_t* buff, u_int32_t bitOffset); void pack (u_int8_t* buff, string offset); void unpack (u_int8_t* buff, u_int32_t bitOffset); void unpack (u_int8_t* buff, string offset); string _value; }; class BytesParamValue : public ParamValue { public: BytesParamValue(u_int32_t size) : ParamValue(size) {} string getVal (); void setVal (string val); void setVal (const vector& buffVal); void parseValue (string, u_int32_t&, string&); void pack (u_int8_t* buff, u_int32_t offset); void pack (u_int8_t* buff, string offset); void unpack (u_int8_t* buff, u_int32_t offset); void unpack (u_int8_t* buff, string offset); private: vector _bytes; }; class ArrayParamValue : public ParamValue { public: ArrayParamValue(string size, u_int32_t count, enum ParamType paramType); ~ArrayParamValue(); string getVal (); void setVal (string val); void setVal (vector vals); string getVal (u_int32_t index); void setVal (string val, u_int32_t index); u_int32_t getIntVal(); vector getIntVals(); vector getStrVals(); void parseValue (string, u_int32_t&, string&); void pack (u_int8_t* buff, u_int32_t offset); void pack (u_int8_t* buff, string offset); void unpack (u_int8_t* buff, u_int32_t offset); void unpack (u_int8_t* buff, string offset); protected: u_int32_t _elementSizeInBits; vector _values; }; class EnumArrayParamValue : public ArrayParamValue { public: EnumArrayParamValue(string size, u_int32_t count, enum ParamType paramType, map textualValues); }; class Param { private: bool _isNameFound, _isTLVNameFound, _isOffsetFound, _isSizeFound, _isTypeFound, _isDescriptionFound, _isTextualValuesFound, _isMlxconfigNameFound, _isDependencyFound, _isValidBitFound, _isTempVarsFound, _isMinValFound, _isMaxValFound, _isRuleFound, _isRegexFound, _isPortFound; public: string _name; string _tlvName; string _offset; string _size; enum ParamType _type; string _description; map _textualValues; string _mlxconfigName; string _dependency; string _validBit; string _tempVars; string _minVal; string _maxVal; string _rule; string _regex; u_int32_t _port; ParamValue* _value; u_int32_t _supportedFromVersion; u_int32_t _arrayLength; Param(int columnsCount, char **dataRow, char **headerRow); ~Param(); string getDisplayName (); void getView (ParamView& paramView); void helpAux (); void pack (u_int8_t* buff); void unpack (u_int8_t* buff); void setVal (string val); void setVal (string val, u_int32_t index); void setVal (vector vals); string getVal (); string getVal (u_int32_t index); void extractVars (vector& rulesVars, string rule); void getRulesTLV (vector& rulesTlvs); u_int32_t getSizeInBits (); void genXMLTemplate (string& xmlTemplate, bool withVal); void genXMLTemplateAux (string& xmlTemplate, bool withVal, bool isPartOfArray, u_int32_t index); static enum ParamType str2ParamType (const char* s); static string paramType2Str (enum ParamType); static void str2TextualValuesMap(const char* s, map& m); }; #endif mstflint-4.8.0/mlxconfig/mlxcfg_utils.h0000755000175000017500000001157313201023206017157 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_utils.h * * Created on: Jun 20, 2016 * Author: ahmads */ #ifndef MLXCFG_UTILS_H_ #define MLXCFG_UTILS_H_ #define IDENT " " #define IDENT2 IDENT IDENT #define IDENT3 "\t\t" #define IDENT4 IDENT2 IDENT #define FIFTH_GENERATION_LIST "Connect-IB/Connect-X4/LX" #define FOURTH_GENERATION_LIST "ConnectX3/Pro" #include #include #include #include using namespace std; enum QueryType { QueryNext, QueryCurrent, QueryDefault }; #define QUERY_NEXT_MASK (1 << QueryNext) #define QUERY_CURRENT_MASK (1 << QueryCurrent) #define QUERY_DEFAULT_MASK (1 << QueryDefault) enum WriterId { WRITER_ID_UNSPECIFIED=0x0, WRITER_ID_CHASSIS_BMC=0x1, WRITER_ID_MAD=0x2, WRITER_ID_BMC=0x3, WRITER_ID_CMD_IF=0x4, WRITER_ID_ICMD=0x5, WRITER_ID_ICMD_UEFI_HII=0x6, WRITER_ID_ICMD_UEFI_CLP=0x7, WRITER_ID_ICMD_FLEXBOOT=0x8, WRITER_ID_ICMD_MLXCONFIG=0x9, WRITER_ID_ICMD_USER1=0xa, WRITER_ID_ICMD_USER2=0xb, WRITER_ID_ICMD_MLXCONFIG_SET_RAW=0xc, WRITER_ID_OTHER=0x1f, WRITER_ID_LAST=0x20 }; #define VECTOR_ITERATOR(t, v, i) \ for(vector::iterator i = v.begin() ; i != v.end(); ++i) #define CONST_VECTOR_ITERATOR(t, v, i)\ for(vector::const_iterator i = v.begin() ; i != v.end(); ++i) #define SET_ITERATOR(t, v, i) \ for(std::set::iterator i = v.begin() ; i != v.end(); ++i) #define MAP_ITERATOR(t1, t2, m, i) \ for(std::map::iterator i = m.begin() ; i != m.end(); ++i) #define VECTOR_BE32_TO_CPU(buff) \ for (unsigned int i = 0; i < buff.size(); i++) {\ buff[i] = __be32_to_cpu(buff[i]);\ } /* * Debug print MACRO of the NV Tlvs: */ //#define _ENABLE_DEBUG_ #ifdef _ENABLE_DEBUG_ # define DEBUG_PRINT_SEND(data_struct, struct_name)\ printf("-I- Data Sent:\n");\ tools_open_##struct_name##_print(data_struct, stdout, 1) # define DEBUG_PRINT_RECEIVE(data_struct, struct_name)\ printf("-I- Data Received:\n");\ tools_open_##struct_name##_print(data_struct, stdout, 1) #else # define DEBUG_PRINT_SEND(data_struct, struct_name) # define DEBUG_PRINT_RECEIVE(data_struct, struct_name) #endif #define CHECK_RC(rc)\ if (rc) return rc; #define MLXCFG_UNKNOWN 0xffffffff void dealWithSignal(); MError mnvaCom5thGen(mfile* mf, u_int8_t* buff, u_int16_t len, u_int32_t tlvType, reg_access_method_t method, QueryType qT = QueryNext); MError nvqcCom5thGen(mfile* mf, u_int32_t tlvType, bool& suppRead, bool& suppWrite, u_int32_t& version); MError nvdiCom5thGen(mfile* mf, u_int32_t tlvType); bool strToNum(std::string str, u_int32_t& num, int base=0); std::string numToStr(u_int32_t num, bool isHex = false); vector splitStr(const string s, char d); string mlxcfg_rtrim(string s); string mlxcfg_ltrim(string s); string mlxcfg_trim(string s); string writerIdToStr(WriterId writerId); void copyDwVectorToBytesVector(const vector& dwV, vector& bV); void copyBytesVectorToDwVector(const vector& bV, vector& dwV); string parseIndexStr(const string& indexedMlxconfigName); void parseIndexedMlxconfigName(const string& indexedMlxconfigName, string& mlxconfigName, u_int32_t& index); void extractIndexes(const string& indexesStr, vector& indexes); bool isIndexedMlxconfigName(const string& mlxconfigName); class MlxcfgException { public: std::string _err; MlxcfgException(const char* fmt, ...); ~MlxcfgException() {}; }; #endif /* MLXCFG_UTILS_H_ */ mstflint-4.8.0/mlxconfig/mlxcfg_view.h0000755000175000017500000000553013201023206016765 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_view.h * * Created on: Jun 22, 2016 * Author: ahmads */ #ifndef MLXCFG_VIEW_H_ #define MLXCFG_VIEW_H_ #include #include #include #include "mlxcfg_utils.h" enum ParamType { BOOLEAN_TYPE, ENUM, INTEGER, UNSIGNED, STRING, BINARY, BYTES }; enum TLVClass { Global, Physical_Port, BMC, Per_Host_Per_Function, Per_SWID, NVLog, NVFile, Per_Host, Physical_Port_Common = 0x81, Per_Host_All_Functions = 0x43, All_Hosts_Per_Function = 0x83, All_Hosts_All_Functions = 0xC3 }; typedef struct ParamView { ParamView() : mlxconfigName(""), description(""), type(BOOLEAN_TYPE), val(MLXCFG_UNKNOWN), port(0), strVal(""), setVal("") {}; std::string mlxconfigName; std::string description; enum ParamType type; std::map textualVals; u_int32_t val; u_int32_t port; std::string strVal; std::string setVal; std::vector arrayVal; std::vector strArrayVal; } ParamView; typedef struct TLVConfView { std::string name; std::string description; TLVClass tlvClass; std::vector params; } TLVConfView; typedef struct BackupView { u_int32_t type; u_int8_t writerId; u_int8_t writerHostId; std::vector tlvBin; } BackupView; #endif /* MLXCFG_VIEW_H_ */ mstflint-4.8.0/mlxconfig/mlxcfg_4thgen_commander.cpp0000644000175000017500000012745713201023206021576 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_4thgen_commander.cpp * * Created on: Jun 22, 2016 * Author: ahmads */ #include #include #include #include #include #include #include #include #include #include #include "mlxcfg_4thgen_commander.h" #include "mlxcfg_param_lib.h" #include "mlxcfg_utils.h" using namespace std; /* * Mask and offsets for working with the capability vector * retrieved via query_dev_cap command. */ #define TOOL_CAP_BITS_ADDR 0xc0 #define CHECK_RC(rc)\ if (rc) return rc; #define HW_ID_ADDR 0xf0014 #define CX3_HW_ID 501 #define CX3_PRO_HW_ID 503 string FourthGenCommander::param2str[Mcp_Last]= {"SRIOV_EN", "NUM_OF_VFS", "WOL_MAGIC_EN_P1", "WOL_MAGIC_EN_P2", "LINK_TYPE_P1", "PHY_TYPE_P1", "XFI_MODE_P1", "FORCE_MODE_P1", "LINK_TYPE_P2", "PHY_TYPE_P2", "XFI_MODE_P2", "FORCE_MODE_P2", "LOG_BAR_SIZE", "INT_LOG_MAX_PAYLOAD_SIZE", "BOOT_PKEY_P1", "BOOT_PKEY_P2", "LOG_DCR_HASH_TABLE_SIZE", "DCR_LIFO_SIZE", "ROCE_NEXT_PROTOCOL", "ROCE_CC_ALGORITHM_P1", "ROCE_CC_PRIO_MASK_P1", "ROCE_CC_ALGORITHM_P2", "ROCE_CC_PRIO_MASK_P2", "CLAMP_TGT_RATE_P1", "CLAMP_TGT_RATE_AFTER_TIME_INC_P1", "RPG_TIME_RESET_P1", "RPG_BYTE_RESET_P1", "RPG_THRESHOLD_P1", "RPG_MAX_RATE_P1", "RPG_AI_RATE_P1", "RPG_HAI_RATE_P1", "RPG_GD_P1", "RPG_MIN_DEC_FAC_P1", "RPG_MIN_RATE_P1", "RATE_TO_SET_ON_FIRST_CNP_P1", "DCE_TCP_G_P1", "DCE_TCP_RTT_P1", "RATE_REDUCE_MONITOR_PERIOD_P1", "INITIAL_ALPHA_VALUE_P1", "MIN_TIME_BETWEEN_CNPS_P1", "CNP_DSCP_P1", "CNP_802P_PRIO_P1", "CLAMP_TGT_RATE_P2", "CLAMP_TGT_RATE_AFTER_TIME_INC_P2", "RPG_TIME_RESET_P2", "RPG_BYTE_RESET_P2", "RPG_THRESHOLD_P2", "RPG_MAX_RATE_P2", "RPG_AI_RATE_P2", "RPG_HAI_RATE_P2", "RPG_GD_P2", "RPG_MIN_DEC_FAC_P2", "RPG_MIN_RATE_P2", "RATE_TO_SET_ON_FIRST_CNP_P2", "DCE_TCP_G_P2", "DCE_TCP_RTT_P2", "RATE_REDUCE_MONITOR_PERIOD_P2", "INITIAL_ALPHA_VALUE_P2", "MIN_TIME_BETWEEN_CNPS_P2", "CNP_DSCP_P2", "CNP_802P_PRIO_P2", "BOOT_OPTION_ROM_EN_P1", "BOOT_VLAN_EN_P1", "BOOT_RETRY_CNT_P1", "LEGACY_BOOT_PROTOCOL_P1", "BOOT_VLAN_P1", "BOOT_OPTION_ROM_EN_P2", "BOOT_VLAN_EN_P2", "BOOT_RETRY_CNT_P2", "LEGACY_BOOT_PROTOCOL_P2", "BOOT_VLAN_P2", "PORT_OWNER", "ALLOW_RD_COUNTERS", "IP_VER", "IP_VER_P1", "IP_VER_P2", "CQ_TIMESTAMP" }; void FourthGenCommander::freeCfgList() { for(map::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) { delete it->second; } } FourthGenCommander::FourthGenCommander(mfile* mf, string dev) : Commander(mf), _dev(dev), _allInfo() { // init the ErrMsg Class std::map errmap; errmap[MCE_SUCCESS] = "Success"; errmap[MCE_FAILED] = "General Failure"; errmap[MCE_TLV_NOT_FOUND] = "Configuration not found"; errmap[MCE_TLV_NOT_SUPP] = "Configuration TLV not supported"; errmap[MCE_NVCFG_NOT_SUPP] = "Fw does not support NV access registers"; errmap[MCE_TOOLS_HCR_NOT_SUPP] = "Unsupported FW (version 2.31.5000 or above required for CX3/PRO)"; errmap[MCE_DRIVER_DOWN] = "Cannot perform operation, Driver might be down."; errmap[MCE_UNSUPPORTED_DEVICE] = "Device not supported."; errmap[MCE_UNSUPPORTED_CFG] = "Fw does not support configuration"; errmap[MCE_BAD_PARAMS] = "Bad parameters"; errmap[MCE_BAD_PARAM_VAL] = "Bad parameter value"; errmap[MCE_DEV_BUSY] = "Device busy"; errmap[MCE_UNKNOWN_TLV] = "Unknown TLV"; errmap[MCE_REG_NOT_SUPP] = "Fw does not support NV access registers"; errmap[MCE_METHOD_NOT_SUPP] = "Method not supported"; errmap[MCE_RES_NOT_AVAIL] = "Resource not available"; errmap[MCE_CONF_CORRUPT] = "Configuration is corrupted"; errmap[MCE_TLV_LEN_TOO_SMALL] = "TLV length too small"; errmap[MCE_BAD_CONFIG] = "Bad Configuration"; errmap[MCE_ERASE_EXEEDED] = "Erase exceeded flash spec"; errmap[MCE_BAD_OP] = "Bad Operation"; errmap[MCE_BAD_STATUS] = "General Failure"; errmap[MCE_CR_ERROR] = "CR-Error"; errmap[MCE_NOT_IMPLEMENTED] = "Not implemented"; errmap[MCE_INCOMPLETE_PARAMS] = "Failed to get missing configuration from device, please specify all the needed parameters"; errmap[MCE_OPEN_DEVICE] = "Failed to open device"; errmap[MCE_PCI] = "Access to device should be through PCI interface only"; errmap[MCE_GET_DEFAULT_PARAMS] = "Failed to get default params"; errmap[MCE_UNKNOWN_ERR] = "General Error"; updateErrCodes(errmap); _suppVec = 0; // SR-IOV _cfgList[Mct_Sriov] = new SriovParams4thGen(); _param2TypeMap[Mcp_Sriov_En] = Mct_Sriov; _param2TypeMap[Mcp_Num_Of_Vfs] = Mct_Sriov; // Wake on LAN _cfgList[Mct_Wol_P1] = new WolParams4thGen(1); _cfgList[Mct_Wol_P2] = new WolParams4thGen(2); _param2TypeMap[Mcp_Wol_Magic_En_P1] = Mct_Wol_P1; _param2TypeMap[Mcp_Wol_Magic_En_P2] = Mct_Wol_P2; // Vpi Settings _cfgList[Mct_Vpi_P1] = new VpiParams4thGen(1); _cfgList[Mct_Vpi_P2] = new VpiParams4thGen(2); _param2TypeMap[Mcp_Link_Type_P1] = Mct_Vpi_P1; _param2TypeMap[Mcp_Phy_Type_P1] = Mct_Vpi_P1; _param2TypeMap[Mcp_Xfi_Mode_P1] = Mct_Vpi_P1; _param2TypeMap[Mcp_Force_Mode_P1] = Mct_Vpi_P1; _param2TypeMap[Mcp_Link_Type_P2] = Mct_Vpi_P2; _param2TypeMap[Mcp_Phy_Type_P2] = Mct_Vpi_P2; _param2TypeMap[Mcp_Xfi_Mode_P2] = Mct_Vpi_P2; _param2TypeMap[Mcp_Force_Mode_P2] = Mct_Vpi_P2; // BAR size _cfgList[Mct_Bar_Size] = new BarSzParams4thGen(); _param2TypeMap[Mcp_Log_Bar_Size] = Mct_Bar_Size; // Infiniband Boot Settings _cfgList[Mct_Boot_Settings_P1] = new InfinibandBootSettingsParams4thGen(1); _cfgList[Mct_Boot_Settings_P2] = new InfinibandBootSettingsParams4thGen(2); _param2TypeMap[Mcp_Boot_Pkey_P1] = Mct_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Pkey_P2] = Mct_Boot_Settings_P2; // Preboot Boot Settings _cfgList[Mct_Preboot_Boot_Settings_P1] = new PrebootBootSettingsParams4thGen(1); _cfgList[Mct_Preboot_Boot_Settings_P2] = new PrebootBootSettingsParams4thGen(2); _param2TypeMap[Mcp_Boot_Option_Rom_En_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Vlan_En_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Retry_Cnt_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Legacy_Boot_Protocol_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Vlan_P1] = Mct_Preboot_Boot_Settings_P1; _param2TypeMap[Mcp_Boot_Option_Rom_En_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Boot_Vlan_En_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Boot_Retry_Cnt_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Legacy_Boot_Protocol_P2] = Mct_Preboot_Boot_Settings_P2; _param2TypeMap[Mcp_Boot_Vlan_P2] = Mct_Preboot_Boot_Settings_P2; _cfgList[Mct_Boot_Settings_Extras_4thGen_P1] = new BootSettingsExtParams4thGen(1); _cfgList[Mct_Boot_Settings_Extras_4thGen_P2] = new BootSettingsExtParams4thGen(2); _param2TypeMap[Mcp_Boot_Settings_Ext_IP_Ver_P1] = Mct_Boot_Settings_Extras_4thGen_P1; _param2TypeMap[Mcp_Boot_Settings_Ext_IP_Ver_P2] = Mct_Boot_Settings_Extras_4thGen_P2; // CX3 Global Conf _cfgList[Mct_CX3_Global_Conf] = new CX3GlobalConfParams(); _param2TypeMap[Mcp_CQ_Timestamp] = Mct_CX3_Global_Conf; if (openComChk()) { freeCfgList(); throw MlxcfgException("Failed to open device: %s. %s", _dev.c_str(), err()); } } FourthGenCommander::~FourthGenCommander() { freeCfgList(); return; } void FourthGenCommander::clearSemaphore() { int rc = tools_cmdif_unlock_semaphore(_mf); if(rc) { throw MlxcfgException("Failed to unlock semaphore, %s.", m_err2str((MError)rc)); } } int FourthGenCommander::supportsToolsHCR() { // we also update the support vector u_int32_t devId = 0x0; u_int32_t type = 0; int rc; if (mread4(_mf, HW_ID_ADDR, &devId) != 4) { return MCE_CR_ERROR; } switch (devId & 0xffff) { // check hw device id case CX3_HW_ID : //Cx3 case CX3_PRO_HW_ID : // Cx3-pro // check if device is accessed via pci (thats the only supported method atm) rc = mget_mdevs_type(_mf, &type); #ifndef MST_UL if (type != MST_PCICONF && type != MST_PCI) { return errmsg(MCE_PCI); } #else if (type != MTCR_ACCESS_CONFIG && type != MTCR_ACCESS_MEMORY) { return errmsg(MCE_PCI); } #endif // check if we support tools_hcr rc = tcif_query_dev_cap(_mf, TOOL_CAP_BITS_ADDR, &_suppVec); switch (rc) { case ME_OK: return MCE_SUCCESS; case ME_CMDIF_BAD_SYS: return errmsg(MCE_DRIVER_DOWN); case ME_CMDIF_BAD_OP: case ME_CMDIF_TOUT: case ME_CMDIF_BUSY: return errmsg(MCE_TOOLS_HCR_NOT_SUPP); default: return errmsg("general Error, %s", m_err2str((MError)rc)); } break; default: break; } return errmsg(MCE_UNSUPPORTED_DEVICE); } bool FourthGenCommander::supportsCfg(mlxCfgType cfg) { if (!isLegal(cfg)) { return false; } return _cfgList[cfg]->cfgSupported(_mf); } void FourthGenCommander::invalidateCfgs() { struct tools_open_mnvia mnviaTlv; u_int8_t buffer[TOOLS_OPEN_MNVIA_SIZE] = {0}; int rc; memset(&mnviaTlv, 0, sizeof(struct tools_open_mnvia)); tools_open_mnvia_pack(&mnviaTlv, buffer); mft_signal_set_handling(1); rc = reg_access_mnvia(_mf, REG_ACCESS_METHOD_SET, &mnviaTlv); dealWithSignal(); if (rc) { throw MlxcfgException("Failed to invalidate configurations: %s", m_err2str((MError)rc)); } } const char* FourthGenCommander::loadConfigurationGetStr() { return "Please reboot machine to load new configurations."; } bool FourthGenCommander::isLegal(mlxCfgType cfg) { if (_cfgList.find(cfg) != _cfgList.end()) { return true; } errmsg("illegal configuration"); return false; } void FourthGenCommander::setRawCfg(std::vector rawTlvVec) { (void)rawTlvVec; throw MlxcfgException("set_raw command is not supported for this device\n"); } void FourthGenCommander::dumpRawCfg(std::vector rawTlvVec, std::string& tlvDump) { (void)rawTlvVec; (void)tlvDump; throw MlxcfgException("set_raw command is not supported for this device\n"); } void FourthGenCommander::backupCfgs(vector& views) { (void)views; throw MlxcfgException("backup command is not supported for this device\n"); } bool FourthGenCommander::isLegal(mlxCfgParam cfg) { if (cfg >= Mcp_Sriov_En && cfg < Mcp_Last) { return true; } errmsg("illegal configuration parameter"); return false; } int FourthGenCommander::openComChk() { bool rc; int ret; // check if we support Tools HCR and update _suppVec rc = supportsToolsHCR(); CHECK_RC(rc); // update cfg specific info. // TODO: adrianc: when getting defaults for 4th gen , perform queryDefParams only once and pass struct to classes to avoid calling multiple times for (std::map::iterator paramIt = _cfgList.begin(); paramIt != _cfgList.end(); paramIt++) { paramIt->second->setDevCapVec(_suppVec); if (paramIt->second->cfgSupported(_mf)) { ret = paramIt->second->getDefaultParams(_mf); if (ret && ret!= MCE_GET_DEFAULT_PARAMS && ret != MCE_NOT_IMPLEMENTED) { return ret; } } } return MCE_SUCCESS; } mlxCfgType FourthGenCommander::cfgParam2Type(mlxCfgParam param) { if (_param2TypeMap.find(param) == _param2TypeMap.end()) { return Mct_Last; } return _param2TypeMap[param]; } bool FourthGenCommander::supportsParam(mlxCfgParam param) { if (!isLegal(param)) { return false; } if (!isLegal(cfgParam2Type(param))) { return false; } return _cfgList[cfgParam2Type(param)]->cfgSupported(_mf, param); } void FourthGenCommander::getCfg(ParamView& cfgParam, QueryType qt) { for (int p = (int)Mcp_Sriov_En ; p < (int)Mcp_Last; ++p) { if (cfgParam.mlxconfigName == param2str[p].c_str()) { bool isDefault = (qt == QueryDefault); if (!supportsParam((mlxCfgParam)p)) { throw MlxcfgException("Device doesn't support %s configuration", param2str[p].c_str()); } u_int32_t val = MLXCFG_UNKNOWN ; if (getCfgAux((mlxCfgParam)p, val, isDefault)) { throw MlxcfgException("Failed to query device %s configuration", (isDefault ? "default" : "current")); } MlxCfgParamParser paramParser; if(_allInfo.getParamParser((mlxCfgParam)p, paramParser) == MLX_CFG_OK){ string strVal = paramParser.getStrVal(val); cfgParam.mlxconfigName = param2str[p].c_str(); cfgParam.strVal = strVal; cfgParam.val = val; cfgParam.textualVals = paramParser.getStrMap(); } else { throw MlxcfgException("Cannot parse parameter %s", param2str[p].c_str()); } } } throw MlxcfgException("Parameter %s was not found", cfgParam.mlxconfigName.c_str()); } int FourthGenCommander::getCfgAux(mlxCfgParam cfgParam, u_int32_t& val, bool getDefault) { if (!isLegal(cfgParam)) { return MCE_BAD_PARAMS; } if (!supportsParam(cfgParam)) { return errmsg(MCE_UNSUPPORTED_CFG); } if (getDefault) { val = (_cfgList[cfgParam2Type(cfgParam)])->getDefaultParam(cfgParam); } else { int rc; rc = _cfgList[cfgParam2Type(cfgParam)]->getFromDev(_mf); if (rc) { return errmsgConcatMsg(rc,*_cfgList[cfgParam2Type(cfgParam)]); } val = (_cfgList[cfgParam2Type(cfgParam)])->getParam(cfgParam); } return MCE_SUCCESS; } int FourthGenCommander::getCfgAux(std::vector& infoVec) { for (std::vector::iterator it = infoVec.begin() ; it != infoVec.end(); it++) { int rc = getCfgAux(it->first,it->second); if (rc) { return rc; } } return MCE_SUCCESS; } int FourthGenCommander::setCfgAux(mlxCfgParam cfgParam, u_int32_t val) { if (!isLegal(cfgParam)) { return MCE_BAD_PARAMS; } if (!supportsParam(cfgParam)) { return errmsg(MCE_UNSUPPORTED_CFG); } // get parameters from device if present int rc = _cfgList[cfgParam2Type(cfgParam)]->getFromDev(_mf); if (rc) { return errmsgConcatMsg(rc, *_cfgList[cfgParam2Type(cfgParam)]); } _cfgList[cfgParam2Type(cfgParam)]->setParam(cfgParam, val); rc = _cfgList[cfgParam2Type(cfgParam)]->setOnDev(_mf); if (rc) { return errmsgConcatMsg(rc, *_cfgList[cfgParam2Type(cfgParam)]); } return MCE_SUCCESS; } void FourthGenCommander::queryParamViews(std::vector& paramsToQuery, QueryType qt) { VECTOR_ITERATOR(ParamView, paramsToQuery, param) { bool found = false; for (int i = (int)Mcp_Sriov_En ; i < (int)Mcp_Last ; i++) { if (param->mlxconfigName == param2str[i]) { found = true; } } if (!found) { throw MlxcfgException("Unknown Parameter: %s", param->mlxconfigName.c_str()); } } queryAux(paramsToQuery, qt, true); return; } void FourthGenCommander::setCfg(std::vector& params, bool force) { mlxCfgParam failedParam = Mcp_Last; vector infoVec; VECTOR_ITERATOR(ParamView, params, pv) { cfgInfo info; int i; for (i = (int)Mcp_Sriov_En ; i < (int)Mcp_Last ; i++) { if (pv->mlxconfigName == param2str[i]) { infoVec.push_back(cfgInfo((mlxCfgParam)i, pv->val)); break; } } } setIgnoreSoftLimits(force); int rc = setCfgAux(infoVec, failedParam); if(rc) { if(rc == MCE_UNSUPPORTED_CFG && failedParam != Mcp_Last) { throw MlxcfgException("Unsupported Configuration: %s", param2str[failedParam].c_str()); } else { throw MlxcfgException("Failed to set configuration: %s", err()); } } } int FourthGenCommander::setCfgAux(const std::vector& infoVec, mlxCfgParam& failedParam) { // set params std::set CfgToSet; int rc; for (std::vector::const_iterator it = infoVec.begin() ; it != infoVec.end(); it++) { if (!isLegal(it->first)) { return MCE_BAD_PARAMS; } if (!supportsParam(it->first)) { failedParam = it->first; return errmsg(MCE_UNSUPPORTED_CFG); } // get configuration from device first (if preset) in case of multiple params per type rc = _cfgList[cfgParam2Type(it->first)]->getFromDev(_mf); if (rc) { return errmsgConcatMsg(rc, *_cfgList[cfgParam2Type(it->first)]); } _cfgList[cfgParam2Type(it->first)]->setParam(it->first, it->second); CfgToSet.insert(_cfgList[cfgParam2Type(it->first)]); } //set on device exit on first failure for (std::set::iterator it = CfgToSet.begin() ; it != CfgToSet.end(); it++) { rc = (*it)->setOnDev(_mf); if (rc) { return errmsgConcatMsg(rc, (**it)); } } return MCE_SUCCESS; } void FourthGenCommander::setIgnoreSoftLimits(bool val) { for(std::map::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) { it->second->setIgnoreSoftLimits(val); } return; } void FourthGenCommander::setIgnoreHardLimits(bool val) { for(std::map::iterator it = _cfgList.begin(); it != _cfgList.end(); it++) { it->second->setIgnoreHardLimits(val); } return; } void FourthGenCommander::queryAux(vector& params, QueryType qt, bool isSetCmd) { int rc; for (int p = (int)Mcp_Sriov_En ; p < (int)Mcp_Last; ++p) { ParamView pV; ParamView* pVP = &pV; if(isSetCmd) { bool found = false; VECTOR_ITERATOR(ParamView, params, k) { if (k->mlxconfigName == param2str[p].c_str()) { found = true; pVP = &(*k); break; } } if(!found) { continue; } } bool isDefault = (qt == QueryDefault); if (!supportsParam((mlxCfgParam)p)) { if(isSetCmd) { throw MlxcfgException("Device doesn't support %s configuration", param2str[p].c_str()); } continue; } u_int32_t val = MLXCFG_UNKNOWN ; rc = getCfgAux((mlxCfgParam)p, val, isDefault); if (rc) { throw MlxcfgException("Failed to query device %s configuration", (isDefault ? "default" : "current")); } else { MlxCfgParamParser paramParser; if(_allInfo.getParamParser((mlxCfgParam)p, paramParser) == MLX_CFG_OK){ string strVal = paramParser.getStrVal(val); pVP->mlxconfigName = param2str[p].c_str(); pVP->strVal = strVal; pVP->val = val; pVP->textualVals = paramParser.getStrMap(); if (!isSetCmd) { params.push_back(*pVP); } } else { throw MlxcfgException("Cannot parse parameter %s", param2str[p].c_str()); } } } } void FourthGenCommander::queryAll(std::vector& params, QueryType qt) { queryAux(params, qt, false); } void FourthGenCommander::updateParamViewValue(ParamView& p, std::string v) { mlxCfgParam param = Mcp_Last; if(_allInfo.parseParam(p.mlxconfigName, v, p.val, param)) { if(param == Mcp_Last) { throw MlxcfgException("Unknown Parameter: %s", p.mlxconfigName.c_str()); } else { throw MlxcfgException("Failed to parse %s=%s", p.mlxconfigName.c_str(), v.c_str()); } } //find string val MlxCfgParamParser paramParser; if(_allInfo.getParamParser((mlxCfgParam)param, paramParser) == MLX_CFG_OK){ p.strVal = paramParser.getStrVal(p.val); } else { throw MlxcfgException("Cannot parse parameter %s", param2str[param].c_str()); } } mlxCfgStatus MlxCfgParamParser::parseUserInput(string input, u_int32_t& val) { std::map::iterator it; //first check if it is a numeric value if(strToNum(input, val, 0)) { if(val == MLXCFG_UNKNOWN) { return MLX_CFG_ERROR; } return MLX_CFG_OK; } for (it = _strMap.begin(); it != _strMap.end(); it++) { if (strcasecmp(it->first.c_str(), input.c_str()) == 0) { val = it->second; return MLX_CFG_OK; } } return MLX_CFG_ERROR; } string MlxCfgParamParser::getShortDescStrAux() { string s; std::map::iterator it; s = _name + "=<"; if(_strMap.size() == 0) { s += _allowedValues; } else { //printf first str it = _strMap.begin(); s += it->first; it++; for(; it != _strMap.end(); it++) { s += "|"; s += it->first; } } s += ">"; return s; } void MlxCfgParamParser::printShortDesc() { printf(IDENT4"%s\n", getShortDescStrAux().c_str()); } void MlxCfgParamParser::splitAndPrintDesc(FILE* f, string desc) { if(desc.length() > 129) { //find index of last space in first 129 chars and split there int i = desc.substr(0, 129).find_last_of(' '); string desc2 = desc.substr(i, (desc.length() - i)); fprintf(f, IDENT4"%-46s %s\n", "", desc.substr(0, i).c_str()); splitAndPrintDesc(f, desc2); } else { fprintf(f, IDENT4"%-46s %s\n", "", desc.c_str()); } } void MlxCfgParamParser::printLongDesc(FILE* f) { string shortDesc = getShortDescStrAux(); if(_desc.length() > 129) { //find index of last space in first 129 chars and split there int i = _desc.substr(0, 129).find_last_of(' '); string desc2 = _desc.substr(i, (_desc.length() - i)); fprintf(f, IDENT4"%-46s : %s\n", shortDesc.c_str(), _desc.substr(0, i).c_str()); splitAndPrintDesc(f, desc2); } else { fprintf(f, IDENT4"%-46s : %s\n", shortDesc.c_str(), _desc.c_str()); } } string MlxCfgParamParser::getStrVal(u_int32_t val){ std::map::iterator it; if(val == MLXCFG_UNKNOWN) { return "MLXCFG_UNKNOWN"; } if(_strMap.size() == 0) { ostringstream ss; ss << val; return ss.str(); } else { for(it = _strMap.begin(); it != _strMap.end(); it++){ if(val == it->second){ return it->first; } } //not a legal value, print it as it return ""; } } bool mlxCfgParamParserCompare(MlxCfgParamParser a, MlxCfgParamParser b) { return a.getName() < b.getName(); } vector MlxCfgInfo::getParamsMapValues() { vector vals; std::map::iterator it; for(it = _params.begin(); it != _params.end(); it++) { vals.push_back(it->second); } return vals; } void MlxCfgInfo::printShortDesc() { printf("\n"); printf(IDENT2"%s: %s\n",_name.c_str(), _title.c_str()); vector vals = getParamsMapValues(); std::sort(vals.begin(), vals.end(), mlxCfgParamParserCompare); for(unsigned int i = 0; i < vals.size(); i++) { vals[i].printShortDesc(); } } void MlxCfgInfo::printLongDesc(FILE* f) { fprintf(f, "\n"); fprintf(f, IDENT2"%s: %s\n",_name.c_str(), _title.c_str()); vector vals = getParamsMapValues(); std::sort(vals.begin(), vals.end(), mlxCfgParamParserCompare); for(unsigned int i = 0; i < vals.size(); i++) { vals[i].printLongDesc(f); } } mlxCfgStatus MlxCfgInfo::getParamParser(mlxCfgParam p, MlxCfgParamParser& paramParser) { std::map::iterator it = _params.find(p); if(it == _params.end()) { return MLX_CFG_ERROR; } paramParser = it->second; return MLX_CFG_OK; } mlxCfgStatus MlxCfgInfo::getParamParser(string name, MlxCfgParamParser& paramParser) { std::map::iterator it; for(it = _params.begin(); it != _params.end(); it++) { if(name == it->second.getName()) { paramParser = it->second; return MLX_CFG_OK; } } return MLX_CFG_ERROR; } MlxCfgInfo MlxCfgAllInfo::createPciSettings() { map paramMap; map params; paramMap["True"] = 1; paramMap["False"] = 0; params[Mcp_Log_Bar_Size] = MlxCfgParamParser(Mcp_Log_Bar_Size, "LOG_BAR_SIZE", "example: for 8Mb bar size set LOG_BAR_SIZE=3 (only " FOURTH_GENERATION_LIST")", "base_2_log_in_mb"); params[Mcp_Sriov_En] = MlxCfgParamParser(Mcp_Sriov_En, "SRIOV_EN", "Enable SR-IOV", paramMap); params[Mcp_Num_Of_Vfs] = MlxCfgParamParser(Mcp_Num_Of_Vfs, "NUM_OF_VFS", "desired amount of virtual functions", "NUM"); return MlxCfgInfo("PCI Settings", "", params); } MlxCfgInfo MlxCfgAllInfo::createIBDynamicallyConnect() { map params; //IB Dynamically Connect params[Mcp_Dcr_Lifo_Size] = MlxCfgParamParser(Mcp_Dcr_Lifo_Size, "DCR_LIFO_SIZE", "The amount of total DCRs available to join linked-lists after hash DCRs", "SIZE"); params[Mcp_Log_Dcr_Hash_Table_Size] = MlxCfgParamParser(Mcp_Log_Dcr_Hash_Table_Size, "LOG_DCR_HASH_TABLE_SIZE", "log2 of the hash table size minus 1", "SIZE"); return MlxCfgInfo("IB Dynamically Connect", "", params); } MlxCfgInfo MlxCfgAllInfo::createInfinibandBootSettings() { map params; //Infiniband Boot Settings params[Mcp_Boot_Pkey_P1] = MlxCfgParamParser(Mcp_Boot_Pkey_P1, "BOOT_PKEY_P1", "partition key to be used by PXE boot (ConnectX3, ConnectX3-Pro Only)", "PKEY"); params[Mcp_Boot_Pkey_P2] = MlxCfgParamParser(Mcp_Boot_Pkey_P2, "BOOT_PKEY_P2", "set 0 for default", "PKEY"); return MlxCfgInfo("Infiniband Boot Settings", "", params); } MlxCfgInfo MlxCfgAllInfo::createInternalSettings() { map paramMap; map params; //Internal Settings paramMap["Auto"] = 0; paramMap["4KB"] = 12; params[Mcp_Log_Tpt_Size] = MlxCfgParamParser(Mcp_Log_Tpt_Size, "INT_LOG_MAX_PAYLOAD_SIZE", """Burst length", paramMap); return MlxCfgInfo("Internal Settings", "", params); } MlxCfgInfo MlxCfgAllInfo::createPrebootBootSettings() { map paramMap; map params; //Preboot Boot Settings paramMap["True"] = 1; paramMap["False"] = 0; params[Mcp_Boot_Option_Rom_En_P1] = MlxCfgParamParser(Mcp_Boot_Option_Rom_En_P1, "BOOT_OPTION_ROM_EN_P1", "Disable/Enable boot option ROM", paramMap); params[Mcp_Boot_Option_Rom_En_P2] = MlxCfgParamParser(Mcp_Boot_Option_Rom_En_P2, "BOOT_OPTION_ROM_EN_P2", "", paramMap); params[Mcp_Boot_Vlan_En_P1] = MlxCfgParamParser(Mcp_Boot_Vlan_En_P1, "BOOT_VLAN_EN_P1", "Disable/Enable VLAN mode for network boot", paramMap); params[Mcp_Boot_Vlan_En_P2] = MlxCfgParamParser(Mcp_Boot_Vlan_En_P2, "BOOT_VLAN_EN_P2", "", paramMap); params[Mcp_Boot_Retry_Cnt_P1] = MlxCfgParamParser(Mcp_Boot_Retry_Cnt_P1, "BOOT_RETRY_CNT_P1", "Number of retries to attempt in case of boot failure. 7 indicates infinite retries.", "0..7"); params[Mcp_Boot_Retry_Cnt_P2] = MlxCfgParamParser(Mcp_Boot_Retry_Cnt_P2, "BOOT_RETRY_CNT_P2", "", "0..7"); paramMap.clear(); paramMap["None"] = 0; paramMap["PXE"] = 1; paramMap["iSCSI"] = 2; paramMap["Both"] = 3; params[Mcp_Legacy_Boot_Protocol_P1] = MlxCfgParamParser(Mcp_Legacy_Boot_Protocol_P1, "LEGACY_BOOT_PROTOCOL_P1", "None: disable legacy boot. PXE: DHCP/TFTP boot. Both: PXE and iSCSI", paramMap); params[Mcp_Legacy_Boot_Protocol_P2] = MlxCfgParamParser(Mcp_Legacy_Boot_Protocol_P2, "LEGACY_BOOT_PROTOCOL_P2", "", paramMap); params[Mcp_Boot_Vlan_P1] = MlxCfgParamParser(Mcp_Boot_Vlan_P1, "BOOT_VLAN_P1", "VLAN ID for the network boot", "VLAN ID"); params[Mcp_Boot_Vlan_P2] = MlxCfgParamParser(Mcp_Boot_Vlan_P2, "BOOT_VLAN_P2", "", "VLAN ID"); return MlxCfgInfo("Preboot Boot Settings", "Settings that control the legacy option ROM", params); } MlxCfgInfo MlxCfgAllInfo::createRoCECongestionControlECN() { map params; //RoCE Congestion Control ECN params[Mcp_Clamp_Tgt_Rate_P1] = MlxCfgParamParser(Mcp_Clamp_Tgt_Rate_P1, "CLAMP_TGT_RATE_P1","If set, whenever a CNP is processed," " the target rate is updated to be the current rate. Default=1" ,"0|1"); params[Mcp_Clamp_Tgt_Rate_P2] = MlxCfgParamParser(Mcp_Clamp_Tgt_Rate_P2, "CLAMP_TGT_RATE_P2","","0|1"); params[Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1] = MlxCfgParamParser(Mcp_Clamp_Tgt_Rate_After_Time_Inc_P1, "CLAMP_TGT_RATE_AFTER_TIME_INC_P1", "When receiving an CNP, the target rate should" " be updated if the transmission rate was increased" " due to the timer, and not only due to the byte counter"". Default=1" ,"0|1"); params[Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2] = MlxCfgParamParser(Mcp_Clamp_Tgt_Rate_After_Time_Inc_P2, "CLAMP_TGT_RATE_AFTER_TIME_INC_P2","","0|1"); params[Mcp_Rpg_Time_Reset_P1] = MlxCfgParamParser(Mcp_Rpg_Time_Reset_P1, "RPG_TIME_RESET_P1" ,"Time between rate increases if no CNPs are received. Given in u-seconds. Default=2" ,"USEC"); params[Mcp_Rpg_Time_Reset_P2] = MlxCfgParamParser(Mcp_Rpg_Time_Reset_P2, "RPG_TIME_RESET_P2","","USEC"); params[Mcp_Rpg_Byte_Reset_P1] = MlxCfgParamParser(Mcp_Rpg_Byte_Reset_P1, "RPG_BYTE_RESET_P1" ,"Transmitted data between rate increases if no CNPs are received. Given in Bytes. " "Disabled=0, Default=150" ,"BYTE_NUM"); params[Mcp_Rpg_Byte_Reset_P2] = MlxCfgParamParser(Mcp_Rpg_Byte_Reset_P2, "RPG_BYTE_RESET_P2","","BYTE_NUM"); params[Mcp_Rpg_Threshold_P1] = MlxCfgParamParser(Mcp_Rpg_Threshold_P1, "RPG_THRESHOLD_P1" ,"The number of times rpByteStage or rpTimeStage can count before the RP rate control " "state machine advances states. Default=5" ,"0..31"); params[Mcp_Rpg_Threshold_P2] = MlxCfgParamParser(Mcp_Rpg_Threshold_P2, "RPG_THRESHOLD_P2","","0..31"); params[Mcp_Rpg_Max_Rate_P1] = MlxCfgParamParser(Mcp_Rpg_Max_Rate_P1, "RPG_MAX_RATE_P1" ,"The maximum rate, in Mbits per second, at which an RP can transmit. " "Once this limit is reached, the RP rate limited is released and " "the flow is not rate limited any more. Default=0 (Full port speed)." ,"RATE_IN_MBIT"); params[Mcp_Rpg_Max_Rate_P2] = MlxCfgParamParser(Mcp_Rpg_Max_Rate_P2, "RPG_MAX_RATE_P2","","RATE_IN_MBIT"); params[Mcp_Rpg_Ai_Rate_P1] = MlxCfgParamParser(Mcp_Rpg_Ai_Rate_P1, "RPG_AI_RATE_P1","The rate, in Mbits per second," " used to increase rpTargetRate in the RPR_ACTIVE_INCREASE state." " Default=10." ,"RATE_IN_MBIT"); params[Mcp_Rpg_Ai_Rate_P2] = MlxCfgParamParser(Mcp_Rpg_Ai_Rate_P2, "RPG_AI_RATE_P2","","RATE_IN_MBIT"); params[Mcp_Rpg_Hai_Rate_P1] = MlxCfgParamParser(Mcp_Rpg_Hai_Rate_P1, "RPG_HAI_RATE_P1" ,"The rate, in Mbits per second, used to increase rpTargetRate in the RPR_HYPER_INCREASE state." " Default=50" ,"RATE_IN_MBIT"); params[Mcp_Rpg_Hai_Rate_P2] = MlxCfgParamParser(Mcp_Rpg_Hai_Rate_P2, "RPG_HAI_RATE_P2","","RATE_IN_MBIT"); params[Mcp_Rpg_Gd_P1] = MlxCfgParamParser(Mcp_Rpg_Gd_P1, "RPG_GD_P1" ,"If a CNP is received, the flow rate is reduced at the beginning of the next rate_reduce_monitor_period interval to," "(1-Alpha/Gd)*CurrentRate. RPG_GD is given as log2(Gd), where Gd may only be powers of 2. Default=7." ,"0..15"); params[Mcp_Rpg_Gd_P2] = MlxCfgParamParser(Mcp_Rpg_Gd_P2, "RPG_GD_P2","","0..15"); params[Mcp_Rpg_Min_Dec_Fac_P1] = MlxCfgParamParser(Mcp_Rpg_Min_Dec_Fac_P1, "RPG_MIN_DEC_FAC_P1" ,"The minimum factor by which the current transmit rate can be changed when processing a CNP." "Value is given as a percentage (1-100). Default=50." ,"1..100"); params[Mcp_Rpg_Min_Dec_Fac_P2] = MlxCfgParamParser(Mcp_Rpg_Min_Dec_Fac_P2, "RPG_MIN_DEC_FAC_P2","","1..100"); params[Mcp_Rpg_Min_Rate_P1] = MlxCfgParamParser(Mcp_Rpg_Min_Rate_P1, "RPG_MIN_RATE_P1" ,"The minimum value, in Mb per second, for rate to limit. Default=2000" ,"RATE_IN_MBIT"); params[Mcp_Rpg_Min_Rate_P2] = MlxCfgParamParser(Mcp_Rpg_Min_Rate_P2, "RPG_MIN_RATE_P2","","RATE_IN_MBIT"); params[Mcp_Rate_To_Set_On_First_Cnp_P1] = MlxCfgParamParser(Mcp_Rate_To_Set_On_First_Cnp_P1, "RATE_TO_SET_ON_FIRST_CNP_P1" ,"The rate that is set for the flow when a rate limiter is allocated to it upon first CNP received, in Mbps. " "Default=0" ,"RATE_IN_MBIT"); params[Mcp_Rate_To_Set_On_First_Cnp_P2] = MlxCfgParamParser(Mcp_Rate_To_Set_On_First_Cnp_P2, "RATE_TO_SET_ON_FIRST_CNP_P2","","RATE_IN_MBIT"); params[Mcp_Dce_Tcp_G_P1] = MlxCfgParamParser(Mcp_Dce_Tcp_G_P1, "DCE_TCP_G_P1" ,"Used to update the congestion estimator (alpha) once every dce_tcp_rtt microseconds. Default=64" ,"NUM"); params[Mcp_Dce_Tcp_G_P2] = MlxCfgParamParser(Mcp_Dce_Tcp_G_P2, "DCE_TCP_G_P2","","NUM"); params[Mcp_Dce_Tcp_Rtt_P1] = MlxCfgParamParser(Mcp_Dce_Tcp_Rtt_P1, "DCE_TCP_RTT_P1" ,"The time between updates of the alpha value, in microseconds. Default=2" ,"USEC"); params[Mcp_Dce_Tcp_Rtt_P2] = MlxCfgParamParser(Mcp_Dce_Tcp_Rtt_P2, "DCE_TCP_RTT_P2","","USEC"); params[Mcp_Rate_Reduce_Monitor_Period_P1] = MlxCfgParamParser(Mcp_Rate_Reduce_Monitor_Period_P1, "RATE_REDUCE_MONITOR_PERIOD_P1" ,"The minimum time between 2 consecutive rate reductions for a single flow. " "Rate reduction will occur only if a CNP is received during the relevant time interval. Default=2." ,"USEC"); params[Mcp_Rate_Reduce_Monitor_Period_P2] = MlxCfgParamParser(Mcp_Rate_Reduce_Monitor_Period_P2, "RATE_REDUCE_MONITOR_PERIOD_P2","","USEC"); params[Mcp_Initial_Alpha_Value_P1] = MlxCfgParamParser(Mcp_Initial_Alpha_Value_P1, "INITIAL_ALPHA_VALUE_P1" ,"The initial value of alpha to use when receiving the first CNP for a flow. " "Expressed in a fixed point fraction of 2^10." ,"NUM"); params[Mcp_Initial_Alpha_Value_P2] = MlxCfgParamParser(Mcp_Initial_Alpha_Value_P2, "INITIAL_ALPHA_VALUE_P2","","NUM"); params[Mcp_Min_Time_Between_Cnps_P1] = MlxCfgParamParser(Mcp_Min_Time_Between_Cnps_P1, "MIN_TIME_BETWEEN_CNPS_P1" ,"Minimum time between sending cnps from the port, in microseconds. Default=0" ,"USEC"); params[Mcp_Min_Time_Between_Cnps_P2] = MlxCfgParamParser(Mcp_Min_Time_Between_Cnps_P2, "MIN_TIME_BETWEEN_CNPS_P2","","USEC"); params[Mcp_Cnp_Dscp_P1] = MlxCfgParamParser(Mcp_Cnp_Dscp_P1, "CNP_DSCP_P1" ,"The DiffServ Code Point of the generated CNP for this port. Default=0" ,"0..7"); params[Mcp_Cnp_Dscp_P2] = MlxCfgParamParser(Mcp_Cnp_Dscp_P2, "CNP_DSCP_P2","","0..7"); params[Mcp_Cnp_802p_Prio_P1] = MlxCfgParamParser(Mcp_Cnp_802p_Prio_P1, "CNP_802P_PRIO_P1" ,"The 802.1p priority value of the generated CNP for this port. Default=7" ,"NUM"); params[Mcp_Cnp_802p_Prio_P2] = MlxCfgParamParser(Mcp_Cnp_802p_Prio_P2, "CNP_802P_PRIO_P2","","NUM"); return MlxCfgInfo("RoCE Congestion Control ECN", "", params); } MlxCfgInfo MlxCfgAllInfo::createRoCEV1_5NextProtocol() { map params; //RoCE V1.5 next protocol params[Mcp_RoCE_Next_Protocol] = MlxCfgParamParser(Mcp_RoCE_Next_Protocol, "ROCE_NEXT_PROTOCOL", "The next protocol value set in the IPv4/IPv6 packets for RoCE v1.5. The default is 0xFE.", "0..255"); return MlxCfgInfo("RoCE V1.5 next protocol", "", params); } MlxCfgInfo MlxCfgAllInfo::createRoCECongestionControlParameters() { map paramMap; map params; //RoCE Congestion Control Parameters paramMap["ECN"] = 0; paramMap["QCN"] = 1; params[Mcp_RoCE_CC_Algorithm_P1] = MlxCfgParamParser(Mcp_RoCE_CC_Algorithm_P1, "ROCE_CC_ALGORITHM_P1", "Congestion control algorithm.", paramMap); params[Mcp_RoCE_CC_Algorithm_P2] = MlxCfgParamParser(Mcp_RoCE_CC_Algorithm_P2, "ROCE_CC_ALGORITHM_P2", "", paramMap); params[Mcp_RoCE_CC_Prio_Mask_P1] = MlxCfgParamParser(Mcp_RoCE_CC_Prio_Mask_P1, "ROCE_CC_PRIO_MASK_P1", "Per priority enable disable bitmask. default 0", "0..255"); params[Mcp_RoCE_CC_Prio_Mask_P2] = MlxCfgParamParser(Mcp_RoCE_CC_Prio_Mask_P2, "ROCE_CC_PRIO_MASK_P2", "", "0..255"); return MlxCfgInfo("RoCE Congestion Control Parameters", "", params); } MlxCfgInfo MlxCfgAllInfo::createVPISettings() { map paramMap; map params; //VPI Settings paramMap["IB"] = 1; paramMap["ETH"] = 2; paramMap["VPI"] = 3; params[Mcp_Link_Type_P1] = MlxCfgParamParser(Mcp_Link_Type_P1, "LINK_TYPE_P1", "", paramMap); params[Mcp_Link_Type_P2] = MlxCfgParamParser(Mcp_Link_Type_P2, "LINK_TYPE_P2", "", paramMap); paramMap.clear(); paramMap["XAUI"] = 0x1; paramMap["XFI"] = 0x2; paramMap["SGMII"] = 0x3; params[Mcp_Phy_Type_P1] = MlxCfgParamParser(Mcp_Phy_Type_P1, "PHY_TYPE_P1", "", paramMap); params[Mcp_Phy_Type_P2] = MlxCfgParamParser(Mcp_Phy_Type_P2, "PHY_TYPE_P2", "", paramMap); paramMap.clear(); paramMap["_10G"] = 0x0; paramMap["_20G"] = 0x1; paramMap["_40G"] = 0x2; params[Mcp_Xfi_Mode_P1] = MlxCfgParamParser(Mcp_Xfi_Mode_P1, "XFI_MODE_P1", "", paramMap); params[Mcp_Xfi_Mode_P2] = MlxCfgParamParser(Mcp_Xfi_Mode_P2, "XFI_MODE_P2", "", paramMap); paramMap.clear(); paramMap["False"] = 0x0; paramMap["True"] = 0x1; params[Mcp_Force_Mode_P1] = MlxCfgParamParser(Mcp_Force_Mode_P1, "FORCE_MODE_P1", "", paramMap); params[Mcp_Force_Mode_P2] = MlxCfgParamParser(Mcp_Force_Mode_P2, "FORCE_MODE_P2", "", paramMap); return MlxCfgInfo("VPI Settings", "Control network link type", params); } MlxCfgInfo MlxCfgAllInfo::createWakeOnLAN() { map paramMap; map params; //Wake On LAN paramMap["True"] = 1; paramMap["False"] = 0; params[Mcp_Wol_Magic_En_P1] = MlxCfgParamParser(Mcp_Wol_Magic_En_P1, "WOL_MAGIC_EN_P1", "enable wake on magic packet(per port.)", paramMap); params[Mcp_Wol_Magic_En_P2] = MlxCfgParamParser(Mcp_Wol_Magic_En_P2, "WOL_MAGIC_EN_P2", "only " FOURTH_GENERATION_LIST, paramMap); return MlxCfgInfo("Wake On LAN", "", params); } MlxCfgInfo MlxCfgAllInfo::createBootSettingsExt() { map paramMap; map params; //Boot Settings Extras paramMap["IPv4"] = 0; paramMap["IPv6"] = 1; paramMap["IPv4_IPv6"] = 2; paramMap["IPv6_IPv4"] = 3; params[Mcp_Boot_Settings_Ext_IP_Ver_P1] = MlxCfgParamParser(Mcp_Boot_Settings_Ext_IP_Ver_P1, "IP_VER_P1", "Select which IP protocol version will be used by flexboot, only " FOURTH_GENERATION_LIST " (per port).", paramMap); params[Mcp_Boot_Settings_Ext_IP_Ver_P2] = MlxCfgParamParser(Mcp_Boot_Settings_Ext_IP_Ver_P2, "IP_VER_P2", "", paramMap); return MlxCfgInfo("Boot Settings Extras", "These parameters are relevant only for servers using legacy BIOS PXE boot (flexboot).", params); } MlxCfgInfo MlxCfgAllInfo::createCX3GlobalConf() { map paramMap; map params; paramMap["True"] = 1; paramMap["False"] = 0; params[Mcp_CQ_Timestamp] = MlxCfgParamParser(Mcp_CQ_Timestamp, "CQ_TIMESTAMP", "When set, IEE1588 (PTP) HW timestamping capability is" " reported to the device driver.", paramMap); return MlxCfgInfo("CX3 Global", "", params); } bool sortCfg(MlxCfgInfo a, MlxCfgInfo b) { return a.getName() < b.getName(); } MlxCfgAllInfo::MlxCfgAllInfo() { //Initialize all the configurations map paramMap; map params; _allInfo.push_back(createPciSettings()); _allInfo.push_back(createIBDynamicallyConnect()); _allInfo.push_back(createInfinibandBootSettings()); _allInfo.push_back(createInternalSettings()); _allInfo.push_back(createPrebootBootSettings()); _allInfo.push_back(createRoCECongestionControlECN()); _allInfo.push_back(createRoCEV1_5NextProtocol()); _allInfo.push_back(createRoCECongestionControlParameters()); _allInfo.push_back(createVPISettings()); _allInfo.push_back(createWakeOnLAN()); _allInfo.push_back(createBootSettingsExt()); _allInfo.push_back(createCX3GlobalConf()); std::sort(_allInfo.begin(), _allInfo.end(), sortCfg); } void MlxCfgAllInfo::printShortDesc() { for(u_int32_t i = 0; i < _allInfo.size(); i++){ _allInfo[i].printShortDesc(); } } void MlxCfgAllInfo::printLongDesc(FILE* f) { for(u_int32_t i = 0; i < _allInfo.size(); i++){ _allInfo[i].printLongDesc(f); } } mlxCfgStatus MlxCfgAllInfo::getParamParser(mlxCfgParam p, MlxCfgParamParser& paramParser) { for(u_int32_t j = 0; j < _allInfo.size(); j++){ if(_allInfo[j].getParamParser(p, paramParser) == MLX_CFG_OK) { return MLX_CFG_OK; } } return MLX_CFG_ERROR; } mlxCfgStatus MlxCfgAllInfo::parseParam(string tag, string strVal, u_int32_t& val, mlxCfgParam& param) { MlxCfgParamParser paramParser; for(u_int32_t j = 0; j < _allInfo.size(); j++){ if(_allInfo[j].getParamParser(tag, paramParser) == MLX_CFG_OK) { param = paramParser.getParam(); return (paramParser.parseUserInput(strVal, val)) ? MLX_CFG_ERROR : MLX_CFG_OK; } } return MLX_CFG_ERROR; } mstflint-4.8.0/mlxconfig/mlxcfg_db_manager.h0000755000175000017500000000604013201023206020067 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * MlxconfigFactory.h * * Created on: May 24, 2016 * Author: ahmads */ #ifndef MLXCFG_FACTORY_H_ #define MLXCFG_FACTORY_H_ #include #include #include "mlxcfg_tlv.h" #include "mlxcfg_param.h" #include class MlxcfgDBManager { private: std::string _dbName; sqlite3* _db; static int selectAndCreateNewTLVCallBack(void *object, int argc, char **argv, char **azColName); static int selectTLVCallBack(void *, int, char **, char **); static int selectAndCreateParamCallBack(void *object, int argc, char **argv, char **azColName); static int selectParamCallBack(void *, int, char **, char **); static int selectParamByMlxconfigNameCallBack(void *, int, char **, char **); void openDB(); inline bool isDBFileExists(const std::string& name); TLVConf* fetchTLVByName(std::string n, u_int8_t port); TLVConf* fetchTLVByIndexAndClass(u_int32_t id, TLVClass c); public: MlxcfgDBManager(std::string dbName); ~MlxcfgDBManager(); std::string _callBackErr; bool _isAllFetched; Param* _paramSqlResult; std::vector fetchedTLVs; std::vector fetchedParams; void getAllTLVs(); TLVConf* getTLVByNameAux(std::string n, u_int8_t port); TLVConf* getTLVByIndexAndClassAux(u_int32_t id, TLVClass c); TLVConf* getTLVByName(std::string n, u_int8_t port); TLVConf* getAndCreateTLVByName(std::string n, u_int8_t port); TLVConf* getTLVByParamMlxconfigName(std::string n); TLVConf* getTLVByIndexAndClass(u_int32_t id, TLVClass c); void execSQL(sqlite3_callback f, void* obj, const char* stat, ...); }; #endif mstflint-4.8.0/mlxconfig/mlxcfg_generic_commander.cpp0000755000175000017500000013117413201023206022013 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_generic_commander.cpp * * Created on: Jun 22, 2016 * Author: ahmads */ #include #include #include #include #include #include #include "mlxcfg_generic_commander.h" #include "mlxcfg_utils.h" #include "mlxcfg_tlv.h" #include "mlxcfg_status.h" #include "mlxcfg_expression.h" #if ! defined(DISABLE_XML2) #include #include #endif using namespace std; using namespace mlxcfg; #define TLVCLASS_OFFSET 24 #define TLVCLASS_SIZE 8 #define BIN_FILE_FINGERPRINT "MLNX.CONFIG.BIN!" #define BIN_FILE_FINGERPRINT_SIZE 16 //bytes #define RAW_FILE_FINGERPRINT "MLNX_RAW_TLV_FILE" #define XMLNS "http://www.mellanox.com/config" #define XML_ROOT "config" #define XML_DOCUMENT_START "\n"\ "<" XML_ROOT " xmlns=\"" XMLNS "\">" #define XML_DOCUMENT_END "" #define XML_COMMENT_NODE "comment" #define IGNORE_IF_EMPTY_NODE(n) \ if (!n->name) {\ continue;\ } #define IGNORE_IF_TEXT_NODE(n) \ if(xmlNodeIsText(n)) {\ n = n->next;\ continue;\ } #define IGNORE_IF_COMMENT_NODE(n) \ if (xmlStrcasecmp(n->name,\ (const xmlChar*)XML_COMMENT_NODE) == 0) {\ n = n->next;\ continue;\ } #define IGNORE_UNUSEFUL_NODE(n) \ IGNORE_IF_EMPTY_NODE(n)\ IGNORE_IF_TEXT_NODE(n)\ IGNORE_IF_COMMENT_NODE(n) #define XMLFREE_AND_SET_NULL(p) \ if (p) {\ xmlFree(p);\ p = NULL;\ } #define GET_AND_SET_ATTR(attrVal, currTlv, attr) \ attrVal = xmlGetProp(currTlv, (const xmlChar*)attr);\ if (attrVal) {\ tlvConf->setAttr(attr, (const char*)attrVal);\ XMLFREE_AND_SET_NULL(attrVal);\ } #define EQ_STR "==" #define NOT_EQ_STR "!=" enum OP {EQUAL, NOT_EQUAL}; #define PCI_ACCESS_ONLY "Access to device should be through PCI interface only" const u_int8_t debugTokenId = 0x5; const u_int8_t csTokenId = 0x7; const u_int32_t idMlnxId = 0x10e; void GenericCommander::supportsNVData() { struct tools_open_nvqc nvqcTlv; memset(&nvqcTlv, 0, sizeof(struct tools_open_nvqc)); MError rc; // "suspend" signals as we are going to take semaphores mft_signal_set_handling(1); rc = reg_access_nvqc(_mf, REG_ACCESS_METHOD_GET, &nvqcTlv); dealWithSignal(); if (rc == ME_REG_ACCESS_BAD_PARAM || rc == ME_REG_ACCESS_INTERNAL_ERROR) { throw MlxcfgException("FW does not support NV access registers"); } if (rc) { throw MlxcfgException( "Error when trying to check if NV access registers are supported"); } return; } GenericCommander::GenericCommander(mfile* mf, string dbName) : Commander(mf), _dbManager(NULL) { int rc; u_int32_t type = 0; if (_mf != NULL) { rc = mget_mdevs_type(mf, &type); if (rc) { throw MlxcfgException("Failed to get device type"); } #ifndef MST_UL if (type != MST_PCICONF && type != MST_PCI) { throw MlxcfgException(PCI_ACCESS_ONLY); } #else if (type != MTCR_ACCESS_CONFIG && type != MTCR_ACCESS_MEMORY) { throw MlxcfgException(PCI_ACCESS_ONLY); } #endif supportsNVData(); } if (dbName.empty()) { dbName = Commander::getDefaultDBName(false); } _dbManager = new MlxcfgDBManager(dbName); } GenericCommander::~GenericCommander() { delete _dbManager; } bool sortParamView(ParamView a, ParamView b) { return a.mlxconfigName < b.mlxconfigName; } void GenericCommander::excludeDuplicatedTLVs(vector& s, vector& d) { VECTOR_ITERATOR(TLVConfView, s, it) { bool found = false; for(vector::reverse_iterator rIt = d.rbegin(); rIt != d.rend(); rIt++) { if((*it).name == (*rIt).name) { VECTOR_ITERATOR(ParamView, (*it).params, p) { (*rIt).params.push_back(*p); } found = true; break; } } if(!found) { d.push_back(*it); } } } void GenericCommander::getAllConfigurations(vector& confs) { _dbManager->getAllTLVs(); VECTOR_ITERATOR(TLVConf*, _dbManager->fetchedTLVs, it) { TLVConf* tlv = *it; TLVConfView tlvConfView; if(tlv->_cap == 0 && tlv->isMlxconfigSupported() == true) { tlv->getView(tlvConfView); confs.push_back(tlvConfView); } } return; } void GenericCommander::queryConfigViews(std::vector & confs, const std::string & configName, QueryType qt) { bool added=false; bool config_found = false; std::map tlvViewMap; _dbManager->getAllTLVs(); VECTOR_ITERATOR(TLVConf*, _dbManager->fetchedTLVs, it) { TLVConf* tlv = *it; if(tlv->_cap != 0 || tlv->isMlxconfigSupported() == false) continue; if(!configName.empty()){ if (configName != tlv->_mlxconfigName) continue; } vector result; queryTLV(tlv, result, qt); std::map::iterator map_it = \ tlvViewMap.find(tlv->_mlxconfigName); if(map_it != tlvViewMap.end()) { size_t index = (*map_it).second; VECTOR_ITERATOR(ParamView, result, p) { confs[index].params.push_back(*p); } } else { config_found = true; TLVConfView tlvConfView; tlv->getView(tlvConfView); tlvConfView.params.clear(); VECTOR_ITERATOR(ParamView, result, p) { tlvConfView.params.push_back(*p); } if(tlvConfView.params.size() > 0) { confs.push_back(tlvConfView); tlvViewMap[tlv->_mlxconfigName] = confs.size() - 1; added=true; } } } if(!configName.empty()){ const char * msg = NULL; if(!config_found) msg = "The configuration %s was not found"; else if(!added) msg = "The configuration %s is empty"; if(msg != NULL) throw MlxcfgException(msg, configName.c_str()); } } void GenericCommander::getConfigViews(std::vector & confs, const std::string & configName) { std::map tlvViewMap; _dbManager->getAllTLVs(); VECTOR_ITERATOR(TLVConf*, _dbManager->fetchedTLVs, it) { TLVConf* tlv = *it; if(tlv->_cap != 0 || tlv->isMlxconfigSupported() == false) continue; if(!configName.empty()){ if (configName != tlv->_mlxconfigName) continue; } std::map::iterator map_it = \ tlvViewMap.find(tlv->_mlxconfigName); if(map_it != tlvViewMap.end()) { size_t index = (*map_it).second; TLVConfView tlvConfView; tlv->getView(tlvConfView); VECTOR_ITERATOR(ParamView, tlvConfView.params, p) { confs[index].params.push_back(*p); } } else { TLVConfView tlvConfView; tlv->getView(tlvConfView); confs.push_back(tlvConfView); tlvViewMap[tlv->_mlxconfigName] = confs.size() - 1; } } if(tlvViewMap.empty() && !configName.empty()){ throw MlxcfgException( "The configuration %s was not found", configName.c_str()); } } void GenericCommander::printParamViews(FILE* f, vector& v) { VECTOR_ITERATOR(ParamView, v, pIt) { string s = (*pIt).mlxconfigName + "=<"; switch((*pIt).type) { case BOOLEAN_TYPE: s += "False|True>"; break; case UNSIGNED: s += "NUM>"; break; case INTEGER: s += "NUM>";//todo talk with Dan regarding this??? break; case ENUM: printEnums(*pIt, s); break; case STRING: s += "STRING>"; break; case BINARY: s += "BINARY>"; break; case BYTES: s += "BYTES>"; break; } size_t len = (*pIt).mlxconfigName.length(); if ((*pIt).mlxconfigName.rfind("_P2") == len - 3) { fprintf(f, "%20s%-40s\n\n", " ", s.c_str()); continue; } size_t prevPos = 0; size_t pos = (*pIt).description.find("\\;", 0); fprintf(f, "%20s%-40s", " ", s.c_str()); fprintf(f, "%s\n", (*pIt).description.substr(0, pos).c_str()); while(pos != std::string::npos) { prevPos = pos + 2; pos = (*pIt).description.find("\\;", prevPos); fprintf(f, "%60s%s\n", " ", (*pIt).description.substr(prevPos, pos - prevPos).c_str()); } } } void GenericCommander::printTLVConfViews(FILE* f, vector& v) { VECTOR_ITERATOR(TLVConfView, v, it) { TLVConfView tv = (*it); fprintf(f, "\t\t%s:%s\n", tv.name.c_str(), tv.description.c_str()); //sort the params std::sort(tv.params.begin(), tv.params.end(), sortParamView); printParamViews(f, tv.params); } } void GenericCommander::printLongDesc(FILE* f) { vector allConfs, confsForPrint; getAllConfigurations(allConfs); excludeDuplicatedTLVs(allConfs, confsForPrint); printTLVConfViews(f, confsForPrint); } void GenericCommander::printEnums(ParamView p, string& s) { std::map::iterator it; it = p.textualVals.begin(); if(it == p.textualVals.end()) { throw MlxcfgException("The type of the parameter %s is ENUM, but enums were not found", p.mlxconfigName.c_str()); } s += it->first; it++; for(; it != p.textualVals.end(); ++it) { s += "|" + it->first; } s += ">"; } void parseDependency(string d, string& t, string& p, u_int32_t& v, OP& op) { //we assume there is only one tlv size_t opPos, dotPos, opStrLen; opPos = d.find(EQ_STR); opStrLen = strlen(EQ_STR); op = EQUAL; if (opPos == string::npos) { opPos = d.find(NOT_EQ_STR); opStrLen = strlen(NOT_EQ_STR); op = NOT_EQUAL; if (opPos == string::npos) { throw MlxcfgException( "There is no '" EQ_STR "' nor '" NOT_EQ_STR "' in the dependency %s", d.c_str()); } } dotPos = d.find('.'); if (dotPos == string::npos) { //dependency is in the same tlv t = ""; p = d.substr(0, opPos); } else { t = d.substr(0, dotPos); p = d.substr(dotPos + 1, opPos - dotPos - 1); } v = atoi(d.substr(opPos + opStrLen, d.length() - opPos - opStrLen).c_str()); } bool GenericCommander::checkDependency(TLVConf* cTLV, string dStr) { if(dStr.empty()) { return true; } Expression expression(dStr); vector vars; expression.getVars(vars); VECTOR_ITERATOR(string, vars, it) { const size_t dotPos = (*it).find('.'); if (dotPos == string::npos) { //parameter of current tlv expression.setVarVal((*it), cTLV->getParamValueByName((*it).replace(0,1,""))); } else { string dTLVName = (*it).substr(0, dotPos).replace(0,1,""); string dParamName = (*it).substr(dotPos + 1); TLVConf* dTLV = _dbManager->getTLVByName(dTLVName, cTLV->_port); if (dTLV == NULL) { throw MlxcfgException("The TLV configuration %s was not found", dTLVName.c_str()); } if (!dTLV->isFWSupported(_mf, false)) { return false; } dTLV->query(_mf, QueryNext); expression.setVarVal((*it), dTLV->getParamValueByName(dParamName)); } } return (expression.evaluate() != 0); } void GenericCommander::filterByDependency(TLVConf* cTLV, const vector >& dependencyTable, vector& result) { for(size_t i = 0; i < dependencyTable.size(); i++) { if (checkDependency(cTLV, dependencyTable[i].second)) { result.push_back(dependencyTable[i].first); } } } void GenericCommander::queryTLV(TLVConf* tlv, vector& paramsConf, QueryType qt) { if (!tlv->_cap && tlv->isMlxconfigSupported() && tlv->isFWSupported(_mf, true)) { vector > dependencyTable = tlv->query(_mf, qt); filterByDependency(tlv, dependencyTable, paramsConf); } return; } void GenericCommander::queryParamViews(vector& params, QueryType qt) { vector pc; std::set uniqueTLVs; VECTOR_ITERATOR(ParamView, params, p){ string mlxconfigName = (*p).mlxconfigName; if (isIndexedMlxconfigName(mlxconfigName)) { unsigned int index = 0; parseIndexedMlxconfigName(mlxconfigName, mlxconfigName, index); } TLVConf* tlv = _dbManager->getTLVByParamMlxconfigName(mlxconfigName); uniqueTLVs.insert(tlv); } SET_ITERATOR(TLVConf*, uniqueTLVs, it) { queryTLV(*it, pc, qt); } VECTOR_ITERATOR(ParamView, params, i){ bool found = false; VECTOR_ITERATOR(ParamView, pc, j){ bool isIIndexed = false; unsigned int iIndex = 0; string mlxconfigNameI = (*i).mlxconfigName; if (isIndexedMlxconfigName(mlxconfigNameI)) { parseIndexedMlxconfigName(mlxconfigNameI, mlxconfigNameI, iIndex); isIIndexed = true; } string mlxconfigNameJ = (*j).mlxconfigName; if (mlxconfigNameI == mlxconfigNameJ) { if (isIIndexed) { if (iIndex >= j->arrayVal.size()) { throw MlxcfgException("Index %d of the parameter %s is out of range. Maximal index is %zu", iIndex, mlxconfigNameI.c_str(), j->arrayVal.size() - 1); } i->val = j->arrayVal[iIndex]; i->strVal = j->strArrayVal[iIndex]; } else { i->val = j->val; i->strVal = j->strVal; } found = true; break; } } if (!found) { throw MlxcfgException("The Device doesn't support %s parameter", i->mlxconfigName.c_str()); } } } void GenericCommander::queryAll(vector& params, QueryType qt) { _dbManager->getAllTLVs(); VECTOR_ITERATOR(TLVConf*, _dbManager->fetchedTLVs, it) { vector result; queryTLV((*it), result, qt); params.insert(params.end(), result.begin(), result.end()); } } void GenericCommander::getCfg(ParamView& pv, QueryType qt) { vector pc; TLVConf* tlv = _dbManager->getTLVByParamMlxconfigName(pv.mlxconfigName); queryTLV(tlv, pc, qt); VECTOR_ITERATOR(ParamView, pc, j){ //printf("-D- pc[j]=%s\n", j->mlxconfigName.c_str()); if(pv.mlxconfigName == j->mlxconfigName) { pv.val = j->val; pv.strVal = j->strVal; break; } } } void GenericCommander::setCfg(vector& params, bool force) { std::set uniqueTLVs; map tlvMap; VECTOR_ITERATOR(ParamView, params, p){ string mlxconfigName = (*p).mlxconfigName; if (isIndexedMlxconfigName(mlxconfigName)) { unsigned int index = 0; parseIndexedMlxconfigName(mlxconfigName, mlxconfigName, index); } TLVConf* tlv = _dbManager->getTLVByParamMlxconfigName(mlxconfigName); tlvMap[mlxconfigName] = tlv; uniqueTLVs.insert(tlv); } //set user values VECTOR_ITERATOR(ParamView, params, p){ string mlxconfigName = (*p).mlxconfigName; if (isIndexedMlxconfigName(mlxconfigName)) { unsigned int index = 0; parseIndexedMlxconfigName(mlxconfigName, mlxconfigName, index); tlvMap[mlxconfigName]->updateParamByMlxconfigName(mlxconfigName, (*p).strVal, index); } else { tlvMap[(*p).mlxconfigName]->updateParamByMlxconfigName(mlxconfigName, (*p).strVal); } } //prepare ruleTLVs,and check rules if(!force) { //printf("-D- do not force!\n"); SET_ITERATOR(TLVConf*, uniqueTLVs, it) { TLVConf* tlv = *it; std::set strRuleTLVs; tlv->getRuleTLVs(strRuleTLVs); vector ruleTLVs; SET_ITERATOR(string, strRuleTLVs, j){ string strRuleTLV = *j; TLVConf* ruleTLV = _dbManager->getTLVByName(strRuleTLV, tlv->_port); if (!ruleTLV->isFWSupported(_mf, false)) { throw MlxcfgException("The Rule TLV configuration %s is not supported by FW", strRuleTLV.c_str()); break; } ruleTLV->query(_mf, QueryNext); ruleTLVs.push_back(ruleTLV); } tlv->checkRules(ruleTLVs); } } //set the tlv on the device SET_ITERATOR(TLVConf*, uniqueTLVs, it) { //printf("-D- t=%s\n", (*it)->_name.c_str()); (*it)->setOnDevice(_mf); } return; } bool GenericCommander::isDefaultSupported() { struct tools_open_nvqgc nvqgcTlv; memset(&nvqgcTlv, 0, sizeof(struct tools_open_nvqgc)); MError rc; mft_signal_set_handling(1); rc = reg_access_nvqgc(_mf, REG_ACCESS_METHOD_GET, &nvqgcTlv); dealWithSignal(); if (rc == ME_REG_ACCESS_BAD_PARAM || rc == ME_REG_ACCESS_INTERNAL_ERROR) { return false; } else if(rc == ME_OK){ return nvqgcTlv.read_factory_settings_support; } throw MlxcfgException("Error when checked if Firmware supports querying default configurations or not: %s.", m_err2str((MError)rc)); } bool GenericCommander::isCurrentSupported() { struct tools_open_nvqgc nvqgcTlv; memset(&nvqgcTlv, 0, sizeof(struct tools_open_nvqgc)); MError rc; mft_signal_set_handling(1); rc = reg_access_nvqgc(_mf, REG_ACCESS_METHOD_GET, &nvqgcTlv); dealWithSignal(); if (rc == ME_REG_ACCESS_BAD_PARAM || rc == ME_REG_ACCESS_INTERNAL_ERROR) { return false; } else if(rc == ME_OK){ return nvqgcTlv.nvda_read_current_settings; } throw MlxcfgException( "Error when checked if Firmware supports " "querying current configurations or not: %s.", m_err2str((MError)rc)); } void GenericCommander::clearSemaphore() { int rc = icmd_clear_semaphore(_mf); if(rc) { throw MlxcfgException("Failed to unlock semaphore: %s.", m_err2str((MError)rc)); } } void GenericCommander::invalidateCfgs() { int rc; struct tools_open_nvia nviaTlv; u_int8_t buffer[TOOLS_OPEN_NVIA_SIZE] = {0}; memset(&nviaTlv, 0, sizeof(struct tools_open_nvia)); tools_open_nvia_pack(&nviaTlv, buffer); mft_signal_set_handling(1); rc = reg_access_nvia(_mf, REG_ACCESS_METHOD_SET, &nviaTlv); dealWithSignal(); if(rc) { throw MlxcfgException("Failed to invalidate configurations: %s.", m_err2str((MError)rc)); } } void GenericCommander::invalidateCfg(const std::string & configName) { std::vector tlvArr; _dbManager->getAllTLVs(); VECTOR_ITERATOR(TLVConf*, _dbManager->fetchedTLVs, it) { if((*it)->_mlxconfigName == configName) tlvArr.push_back(*it); } if (tlvArr.empty()) throw MlxcfgException("The configuration %s was not found", configName.c_str()); VECTOR_ITERATOR(TLVConf*, tlvArr, it) { (*it)->invalidate(_mf); } } const char* GenericCommander::loadConfigurationGetStr() { int rc; dm_dev_id_t deviceId = DeviceUnknown; u_int32_t hwDevId, hwRevId; struct cibfw_register_mfrl mfrl; if( dm_get_device_id(_mf, &deviceId, &hwDevId, &hwRevId) ) { throw MlxcfgException("Failed to identify the device"); } memset(&mfrl, 0, sizeof(mfrl)); if (deviceId == DeviceConnectX4 || deviceId == DeviceConnectX4LX || deviceId == DeviceConnectX5 || deviceId == DeviceBlueField) { // send warm boot (bit 6) mfrl.reset_level = 1 << 6; mft_signal_set_handling(1); rc = reg_access_mfrl(_mf,REG_ACCESS_METHOD_SET, &mfrl); dealWithSignal(); if (rc) { return "Please power cycle machine to load new configurations."; } } return "Please reboot machine to load new configurations."; } void GenericCommander::setRawCfg(std::vector rawTlvVec) { RawCfgParams5thGen rawTlv; if (rawTlv.setRawData(rawTlvVec)) { throw MlxcfgException(rawTlv.err()); } if (rawTlv.setOnDev(_mf)) { throw MlxcfgException(rawTlv.err()); } } void GenericCommander::dumpRawCfg(std::vector rawTlvVec, std::string& tlvDump) { RawCfgParams5thGen rawTlv; if (rawTlv.setRawData(rawTlvVec)) { throw MlxcfgException(rawTlv.err()); } tlvDump = rawTlv.dumpTlv(); } void GenericCommander::backupCfgs(vector& views) { int rc; int status = 0; u_int32_t ptr = 0; struct tools_open_mnvgn mnvgnTlv; do { memset(&mnvgnTlv, 0, sizeof(struct tools_open_mnvgn)); mnvgnTlv.nv_pointer = ptr; mft_signal_set_handling(1); rc = reg_access_mnvgn(_mf, REG_ACCESS_METHOD_GET, &mnvgnTlv, &status); dealWithSignal(); if (rc) { if(status == ME_NOT_IMPLEMENTED) { throw MlxcfgException("Firmware does not support backup command"); } throw MlxcfgException("Failed to backup configurations: %s.", m_err2str((MError)rc)); } ptr = mnvgnTlv.nv_pointer; if (ptr != 0) { BackupView view; view.type = mnvgnTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw; view.writerId = mnvgnTlv.nv_hdr.writer_id; view.writerHostId = mnvgnTlv.nv_hdr.writer_host_id; vector v; v.resize(TOOLS_OPEN_NV_HDR_FIFTH_GEN_SIZE + mnvgnTlv.nv_hdr.length); //Copy header: tools_open_nv_hdr_fifth_gen_pack(&mnvgnTlv.nv_hdr, v.data()); //Copy data: memcpy(v.data() + TOOLS_OPEN_NV_HDR_FIFTH_GEN_SIZE, &mnvgnTlv.nv_data, mnvgnTlv.nv_hdr.length); view.tlvBin = v; views.push_back(view); } } while (ptr != 0); } void GenericCommander::updateParamViewValue(ParamView& p, string v) { string mlxconfigName = p.mlxconfigName; if (isIndexedMlxconfigName(mlxconfigName)) { unsigned int index = 0; parseIndexedMlxconfigName(mlxconfigName, mlxconfigName, index); } TLVConf* tlv = _dbManager->getTLVByParamMlxconfigName(mlxconfigName); tlv->parseParamValue(mlxconfigName, v, p.val, p.strVal); } void GenericCommander::genTLVsList(vector& tlvs) { _dbManager->getAllTLVs(); VECTOR_ITERATOR(TLVConf*, _dbManager->fetchedTLVs, it) { if (find(tlvs.begin(), tlvs.end(), (*it)->_name) == tlvs.end()) { tlvs.push_back((*it)->_name); } } } void GenericCommander::genXMLTemplateAux(vector tlvs, string& xmlTemplate, bool allAttrs, bool withVal, bool defaultAttrVal) { xmlTemplate = XML_DOCUMENT_START; VECTOR_ITERATOR(string, tlvs, it) { string tlvTemplate; TLVConf* tlv = NULL; try {//user didn't tell us if it is a per port tlv //so try port==0 tlv = _dbManager->getTLVByName(*it, 0); } catch (MlxcfgException&){ //or port==1 tlv = _dbManager->getTLVByName(*it, 1); } tlv->genXMLTemplate(tlvTemplate, allAttrs, withVal, defaultAttrVal); xmlTemplate += "\n" + tlvTemplate + "\n"; } xmlTemplate += XML_DOCUMENT_END; } void GenericCommander::genXMLTemplate(vector tlvs, string& xmlTemplate, bool allAttrs) { genXMLTemplateAux(tlvs, xmlTemplate, allAttrs, false, true); } void GenericCommander::binTLV2TLVConf(const vector& binTLV, TLVConf*& tlv) { u_int32_t id; tools_open_nv_hdr_fifth_gen hdr; tools_open_nv_hdr_fifth_gen_unpack(&hdr, (u_int8_t*)binTLV.data()); //verify TLV length if (hdr.length != (binTLV.size() - 3) * 4) { throw MlxcfgException( "TLV size mismatch. reported length in TLV header: " "0x%x. actual length: 0x%x", hdr.length, (binTLV.size() - 3) * 4); } TLVClass tlvClass = (TLVClass)EXTRACT(hdr.type.tlv_type_dw.tlv_type_dw, TLVCLASS_OFFSET, TLVCLASS_SIZE); TLVClass tlvClassTemp; tools_open_tlv_type type; type.tlv_type_dw.tlv_type_dw = binTLV[1]; TLVConf::unpackTLVType(tlvClass, type, id); if (tlvClass == Physical_Port_Common) { tlvClassTemp = Physical_Port; } else if (tlvClass == Per_Host_All_Functions || tlvClass == All_Hosts_Per_Function || tlvClass == All_Hosts_All_Functions) { tlvClassTemp = Per_Host_Per_Function; } else { tlvClassTemp = tlvClass; } tlv = _dbManager->getTLVByIndexAndClass(id, tlvClassTemp); //set attrs tlv->_attrs[RD_EN_ATTR] = numToStr(hdr.rd_en); tlv->_attrs[OVR_EN_ATTR] = numToStr(hdr.over_en); if (tlvClass == Physical_Port) { tlv->_attrs[PORT_ATTR] = numToStr(type.per_port.port); } else if (tlvClass == Physical_Port_Common) { tlv->_attrs[PORT_ATTR] = ALL_ATTR_VAL; } else if (tlvClass == Per_Host_All_Functions) { tlv->_attrs[HOST_ATTR] = numToStr(type.per_host.host); tlv->_attrs[FUNC_ATTR] = ALL_ATTR_VAL; } else if (tlvClass == Per_Host_Per_Function) { tlv->_attrs[HOST_ATTR] = numToStr(type.per_host.host); tlv->_attrs[FUNC_ATTR] = numToStr(type.per_host.function); } else if (tlvClass == All_Hosts_All_Functions) { tlv->_attrs[HOST_ATTR] = ALL_ATTR_VAL; tlv->_attrs[FUNC_ATTR] = ALL_ATTR_VAL; } else if (tlvClass == All_Hosts_Per_Function) { tlv->_attrs[HOST_ATTR] = ALL_ATTR_VAL; tlv->_attrs[FUNC_ATTR] = numToStr(type.per_host.function); } tlv->unpack((u_int8_t*)(binTLV.data() + 3));//the header size is 3dws } void GenericCommander::binTLV2XML(const vector& binTLV, string& xmlTemplate) { TLVConf* tlv = NULL; binTLV2TLVConf(binTLV, tlv); tlv->genXMLTemplate(xmlTemplate, true, true, false); } void GenericCommander::bin2TLVConfs(const vector& tlvsBin, vector& tlvs) { size_t size = 0; size_t hdrSize = (tools_open_nv_hdr_fifth_gen_size() >> 2); while (hdrSize + size < tlvsBin.size()) { TLVConf* tlv = NULL; vector tmpBuff; tools_open_nv_hdr_fifth_gen hdr; tools_open_nv_hdr_fifth_gen_unpack(&hdr, (u_int8_t*)(tlvsBin.data() + size)); size_t tlvSize = hdrSize + (hdr.length >> 2); if (tlvSize > (tlvsBin.size() - size)) { throw MlxcfgException("Invalid Configuration buffer"); } tmpBuff.insert(tmpBuff.begin(), tlvsBin.begin() + size, tlvsBin.begin() + + size + tlvSize); binTLV2TLVConf(tmpBuff, tlv); tlvs.push_back(tlv); size += tlvSize; } if (size != tlvsBin.size()) { throw MlxcfgException("Invalid Configuration buffer"); } } void GenericCommander::XML2TLVConf(const string& xmlContent, vector& tlvs) { #if ! defined(DISABLE_XML2) xmlDocPtr doc; xmlNodePtr root, currTlv, currParam; xmlChar* portAttr = NULL, *hostAttr = NULL, *funcAttr = NULL, *rdEnAttr = NULL, *ovrEnAttr = NULL, *xmlVal = NULL, *indexAttr = NULL; doc = xmlReadMemory(xmlContent.c_str(), xmlContent.size(), "noname.xml", NULL, 0); if (!doc) { throw MlxcfgException("Failed to parse the XML document\n"); } try { root = xmlDocGetRootElement(doc); if(!root || xmlStrcmp(root->name, (const xmlChar *)XML_ROOT)) { throw MlxcfgException("The XML root node must be "XML_ROOT); } //check fingerprint if(!root->ns || xmlStrcmp(root->ns->href, (const xmlChar*)XMLNS)) { throw MlxcfgException("The XML Fingerprint " XMLNS " is missing or incorrect"); } currTlv = root->xmlChildrenNode; while (currTlv) { IGNORE_UNUSEFUL_NODE(currTlv) u_int32_t port; TLVConf* tlvConf; bool isAllPorts = false; //printf("-D- tlv name=%s\n", (char*)currTlv->name); portAttr = xmlGetProp(currTlv, (const xmlChar*)PORT_ATTR); if (!portAttr) { port = 0; } else if (!xmlStrcasecmp(portAttr, (const xmlChar*)ALL_ATTR_VAL)) { isAllPorts = true; port = 1; } else if (!strToNum((const char*) portAttr, port) || (port != 1 && port != 2)) { throw MlxcfgException("Illegal value of port attribute %s", (const char*) portAttr); } tlvConf = _dbManager->getAndCreateTLVByName((char*)currTlv->name, port); if (isAllPorts) { tlvConf->setAttr(PORT_ATTR, ALL_ATTR_VAL); } GET_AND_SET_ATTR(ovrEnAttr, currTlv, OVR_EN_ATTR) GET_AND_SET_ATTR(rdEnAttr, currTlv, RD_EN_ATTR) GET_AND_SET_ATTR(hostAttr, currTlv, HOST_ATTR) GET_AND_SET_ATTR(funcAttr, currTlv, FUNC_ATTR) //loop over the parameters list currParam = currTlv->xmlChildrenNode; map > arrayValues; while (currParam) { IGNORE_UNUSEFUL_NODE(currParam) xmlVal = xmlNodeListGetString(doc, currParam->xmlChildrenNode, 1); indexAttr = xmlGetProp(currParam, (const xmlChar*)INDEX_ATTR); if (xmlVal) { if (indexAttr) { string indexAttrStr = (const char*)indexAttr; vector indexes; extractIndexes(indexAttrStr, indexes); VECTOR_ITERATOR(u_int32_t, indexes, it) { arrayValues[(char*)currParam->name][*it] = (char*)xmlVal; } } else { tlvConf->updateParamByName((char*)currParam->name, (char*)xmlVal); } } else { if (tlvConf->isAStringParam((char*)currParam->name)) { tlvConf->updateParamByName((char*)currParam->name, ""); } else { throw MlxcfgException( "The Parameter %s of the configuration %s does not have value", (char*)currParam->name, tlvConf->_name.c_str()); } } XMLFREE_AND_SET_NULL(xmlVal); currParam = currParam->next; } //process arrayValues for(map >::iterator p = arrayValues.begin(); p != arrayValues.end(); ++p) { //TODO check validity of indices string paramName = p->first; vector vals(p->second.size()); for (map::iterator v = p->second.begin(); v != p->second.end(); ++v) { vals[v->first] = v->second; } tlvConf->updateParamByName(paramName, vals); } tlvs.push_back(tlvConf); currTlv = currTlv->next; } if (tlvs.size() == 0) { throw MlxcfgException("No TLV configurations were found in the XML"); } } catch (MlxcfgException& e) { XMLFREE_AND_SET_NULL(portAttr) XMLFREE_AND_SET_NULL(ovrEnAttr) XMLFREE_AND_SET_NULL(rdEnAttr) XMLFREE_AND_SET_NULL(hostAttr) XMLFREE_AND_SET_NULL(funcAttr) XMLFREE_AND_SET_NULL(xmlVal) xmlFreeDoc(doc); doc = NULL; throw e; } xmlFreeDoc(doc); #else (void) xmlContent; (void) tlvs; throw MlxcfgException("Can not run the command, the tool was not compiled against libxml2"); #endif } void GenericCommander::XML2Raw(const string& xmlContent, string& raw) { vector tlvs; XML2TLVConf(xmlContent, tlvs); raw = RAW_FILE_FINGERPRINT; VECTOR_ITERATOR(TLVConf*, tlvs, tlvConf) { string rawTLV; (*tlvConf)->genRaw(rawTLV); raw += '\n' + rawTLV + '\n'; } VECTOR_ITERATOR(TLVConf*, tlvs, tlvConf) { VECTOR_ITERATOR(Param*, (*tlvConf)->_params, param) { delete *param; } delete *tlvConf; } } void GenericCommander::TLVConf2Bin(const vector& tlvs, vector& buff, bool withHeader) { CONST_VECTOR_ITERATOR(TLVConf*, tlvs, tlvConf) { vector tmpBuff; (*tlvConf)->genBin(tmpBuff, withHeader); buff.insert(buff.end(), tmpBuff.begin(), tmpBuff.end()); } } void GenericCommander::XML2Bin(const string& xml, vector& buff, bool withHeader) { vector tlvs; XML2TLVConf(xml, tlvs); TLVConf2Bin(tlvs, buff, withHeader); VECTOR_ITERATOR(TLVConf*, tlvs, tlvConf) { VECTOR_ITERATOR(Param*, (*tlvConf)->_params, param) { delete *param; } delete *tlvConf; } } void GenericCommander::sign(vector& buff, string privPemFile, const string& keyPairUUid) { (void)keyPairUUid; #if !defined(UEFI_BUILD) && !defined(NO_OPEN_SSL) MlxSignRSA rsa; MlxSignSHA256 mlxSignSHA256; vector encDigestDW; vector digest, encDigest, bytesBuff; copyDwVectorToBytesVector(buff, bytesBuff); mlxSignSHA256 << bytesBuff; mlxSignSHA256.getDigest(digest); if (privPemFile.empty()) { encDigest.insert(encDigest.begin(), digest.begin(), digest.end()); } else { int rc = rsa.setPrivKeyFromFile(privPemFile); if (rc) { throw MlxcfgException("Failed to set private key from file (rc = 0x%x)\n", rc); } rc = rsa.sign(digest, encDigest); if (rc) { throw MlxcfgException("Failed to encrypt the digest (rc = 0x%x)\n", rc); } } //fetch the signature tlv from the database and fill in the data vector signTlvBin; TLVConf* signTLV = _dbManager->getTLVByName("file_signature", 0); Param* keyPairUUidParam = signTLV->findParamByName("keypair_uuid"); ((BytesParamValue*) keyPairUUidParam->_value)->setVal(keyPairUUid); Param* signatureParam = signTLV->findParamByName("signature"); copyBytesVectorToDwVector(encDigest, encDigestDW); VECTOR_BE32_TO_CPU(encDigestDW) ((BytesParamValue*) signatureParam->_value)->setVal(encDigestDW); signTLV->genBin(signTlvBin); buff.insert(buff.end(), signTlvBin.begin(), signTlvBin.end()); #else (void)buff; (void)privPemFile; throw MlxcfgException("Sign command is not implemented\n"); #endif } void GenericCommander::sign(vector& buff) { string keyPairUUid; sign(buff, "", keyPairUUid); } void GenericCommander::checkConfTlvs(const vector& tlvs, FwComponent::comps_ids_t& compsId) { bool dbgCompFound = false; bool csCompFound = false; bool foundApplicableTLV = false; bool idMlnxCompFound = false; CONST_VECTOR_ITERATOR(TLVConf*, tlvs, it) { const TLVConf* tlv = *it; if (tlv->_tlvClass == NVFile && tlv->_id == debugTokenId) { dbgCompFound = true; compsId = FwComponent::COMPID_DBG_TOKEN; } else if (tlv->_tlvClass == NVFile && tlv->_id == csTokenId) { csCompFound = true; compsId = FwComponent::COMPID_CS_TOKEN; } else if (tlv->_tlvClass == 0x0 && tlv->_id == idMlnxId) { idMlnxCompFound = true; compsId = FwComponent::COMPID_MLNX_NVCONFIG; } else if (tlv->_name == "file_applicable_to") { foundApplicableTLV = true; } } if (!dbgCompFound && !csCompFound && !idMlnxCompFound) { throw MlxcfgException("No debug tokens or CS tokens or MLNX ID Components were found"); } if ((dbgCompFound && csCompFound) || (dbgCompFound && idMlnxCompFound) || (csCompFound && idMlnxCompFound)) { throw MlxcfgException("Only one component is allowed"); } //At least one TLV must be file_applicable_to if (!foundApplicableTLV) { throw MlxcfgException("At least one file_applicable_to tlv must be in the configuration file"); } } void GenericCommander::orderConfTlvs(vector& tlvs) { VECTOR_ITERATOR(TLVConf*, tlvs, it) { TLVConf* tlv = *it; if (((tlv->_tlvClass == NVFile) && (tlv->_id == debugTokenId || tlv->_id == csTokenId)) || (tlv->_tlvClass == Global && tlv->_id == idMlnxId)) { *it = tlvs.front(); tlvs.front() = tlv; break; } } //file_applicable_to must be after the component VECTOR_ITERATOR(TLVConf*, tlvs, it) { TLVConf* tlv = *it; if (tlv->_name == "file_applicable_to") { *it = *(tlvs.begin() + 1); *(tlvs.begin() + 1) = tlv; break; } } } void GenericCommander::createConf(const string& xml, vector& buff) { vector tlvs; vector tlvsBuff; FwComponent::comps_ids_t compsId; //Add the fingerprint for (unsigned int i = 0; i < strlen(BIN_FILE_FINGERPRINT); i += 4) { buff.push_back(*(u_int32_t*)(BIN_FILE_FINGERPRINT + i)); } XML2TLVConf(xml, tlvs); checkConfTlvs(tlvs, compsId); orderConfTlvs(tlvs); TLVConf2Bin(tlvs, tlvsBuff, true); buff.insert(buff.end(), tlvsBuff.begin(), tlvsBuff.end()); } void GenericCommander::apply(const vector& buff) { FwComponent comp; vector tlvs; vector dwBuff; FwCompsMgr fwCompsAccess(_mf); vector compsToBurn; FwComponent::comps_ids_t compsId; size_t fingerPrintLength = strlen(BIN_FILE_FINGERPRINT); //Check if there is a fingerprint: if (buff.size() < fingerPrintLength) { throw MlxcfgException("Invalid Configuration file"); } for (unsigned int i = 0; i < fingerPrintLength; i += 4) { if (buff[i] != BIN_FILE_FINGERPRINT[i]) { throw MlxcfgException("Fingerprint is missing in the Configuration file"); } } dwBuff.resize((buff.size() - fingerPrintLength) >> 2); memcpy(dwBuff.data(), buff.data() + fingerPrintLength, buff.size() - fingerPrintLength); bin2TLVConfs(dwBuff, tlvs); checkConfTlvs(tlvs, compsId); if (!fwCompsAccess.getFwSupport()) { throw MlxcfgException("Firmware does not support applying configurations files"); } comp.init(buff, buff.size(), compsId); compsToBurn.push_back(comp); if (!fwCompsAccess.burnComponents(compsToBurn)) { throw MlxcfgException("Error applying the component: %s", fwCompsAccess.getLastErrMsg()); } } void GenericCommander::raw2XML(const vector& lines, string& xmlTemplate) { bool foundTlv = false; xmlTemplate = XML_DOCUMENT_START; //check fingerprint in first line vector::const_iterator it = lines.begin(); if (it == lines.end() || *it != RAW_FILE_FINGERPRINT) { throw MlxcfgException("Raw Content Fingerprint " RAW_FILE_FINGERPRINT " is missing or incorrect"); } it++; for(; it != lines.end(); it++) { string tlvXMLTemplate; if ((*it)[0] == '%') { //a FILE_COMMENT tlv //TODO } else { //printf("-D- line=%s\n", it->c_str()); char* p = NULL; vector binTLV; vector dws = splitStr(*it, ' '); VECTOR_ITERATOR(string, dws, s) { //printf("s=%s\n", s->c_str()); u_int32_t dw = __cpu_to_be32(strtoul((*s).c_str(), &p, 0)); //printf("-D- s=%s dw=0x%x\n", s->c_str(), dw); if (!p) { throw MlxcfgException("Input is not an unsigned number: %s", (*s).c_str()); } binTLV.push_back(dw); } if (!binTLV.empty()) { binTLV2XML(binTLV, tlvXMLTemplate); xmlTemplate += '\n' + tlvXMLTemplate + '\n'; foundTlv = true; } } } if (!foundTlv) { throw MlxcfgException("No TLV configurations were found in the raw file"); } xmlTemplate += ""; //printf("xmlTemplate=\n%s", xmlTemplate.c_str()); } /* * RawCfgParams5thGen Class implementation */ RawCfgParams5thGen::RawCfgParams5thGen() { memset(&_nvdaTlv, 0, sizeof(struct tools_open_nvda)); } int RawCfgParams5thGen::setRawData(const std::vector& tlvBuff) { if(tlvBuff.size() * 4 > TOOLS_OPEN_NVDA_SIZE){ return errmsg(MCE_BAD_PARAM_VAL, "TLV size exceeds maximal limit. Maximum size is 0x%x bytes, actual length is 0x%x bytes", TOOLS_OPEN_NVDA_SIZE, (u_int32_t)(tlvBuff.size() * 4)); } _tlvBuff = tlvBuff; memset(&_nvdaTlv, 0, sizeof(struct tools_open_nvda)); std::vector tlvBuffBe = _tlvBuff; tlvBuffBe.resize(TOOLS_OPEN_NVDA_SIZE >> 2); memset(&tlvBuffBe[0], 0, TOOLS_OPEN_NVDA_SIZE); tlvBuffBe.insert(tlvBuffBe.begin(), _tlvBuff.begin(), _tlvBuff.end()); for (std::vector::iterator it = tlvBuffBe.begin(); it != tlvBuffBe.end(); it++ ) { *it = __cpu_to_be32(*it); } tools_open_nvda_unpack(&_nvdaTlv, ((u_int8_t*)(&tlvBuffBe[0]))); _nvdaTlv.nv_hdr.writer_id = WRITER_ID_ICMD_MLXCONFIG_SET_RAW; return verifyTlv(); } int RawCfgParams5thGen::setOnDev(mfile* mf) { int rc; mft_signal_set_handling(1); DEBUG_PRINT_SEND(&_nvdaTlv, nvda); rc = reg_access_nvda(mf, REG_ACCESS_METHOD_SET, &_nvdaTlv); DEBUG_PRINT_RECEIVE(&_nvdaTlv, nvda); dealWithSignal(); if (rc) { return errmsg("Failed to set raw TLV: %s", m_err2str((MError)rc)); } return MCE_SUCCESS; } std::string RawCfgParams5thGen::dumpTlv() { char str[1024] = {0}; snprintf(str, 1024, "Length: 0x%x\nVersion: %d\nOverrideEn: %d\nType: 0x%08x\nData: ", _nvdaTlv.nv_hdr.length,\ _nvdaTlv.nv_hdr.version, _nvdaTlv.nv_hdr.over_en, _nvdaTlv.nv_hdr.type.tlv_type_dw.tlv_type_dw); for (size_t i=3; i < _tlvBuff.size(); i++) { char numStr[64] = {0}; snprintf(numStr, 64, "0x%08x ", _tlvBuff[i]); strcat(str, numStr); } strcat(str, "\n"); return str; } int RawCfgParams5thGen::verifyTlv() { // check TLV length int tlvLength = (_tlvBuff.size() - 3) << 2; if (tlvLength != _nvdaTlv.nv_hdr.length) { return errmsg(MCE_BAD_PARAM_VAL, "TLV size mismatch. reported length in TLV header: 0x%x. actual length: 0x%x", _nvdaTlv.nv_hdr.length, tlvLength); } return MCE_SUCCESS; } mstflint-4.8.0/mlxconfig/mlxcfg_db_manager.cpp0000755000175000017500000002544513201023206020434 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * MlxconfigFactory.h * * Created on: May 24, 2016 * Author: ahmads */ #include #include //#define NDEBUG //uncomment in order to enable asserts #include #include #include "mlxcfg_db_manager.h" #include "mlxcfg_utils.h" using namespace std; #define SQL_SELECT_ALL_TLVS \ "SELECT * FROM tlvs" #define SQL_SELECT_ALL_PARAMS \ "SELECT * FROM params" #define SQL_SELECT_TLV_BY_NAME_AND_PORT \ "SELECT * FROM tlvs WHERE name='%s' and port='%d'" #define SQL_SELECT_TLV_BY_INDEX_AND_CLASS\ "SELECT * FROM tlvs WHERE id=%d and class=%d" #define SQL_SELECT_PARAMS_BY_TLV_NAME_AND_PORT \ "SELECT * FROM params WHERE tlv_name='%s' and port='%d'" #define SQL_SELECT_PARAM_BY_MLXCONFIG_NAME \ "SELECT * FROM params WHERE mlxconfig_name='%s'" MlxcfgDBManager::MlxcfgDBManager(string dbName) : _dbName(dbName), _db(NULL), _callBackErr(""), _isAllFetched(false), _paramSqlResult(NULL) { openDB(); } MlxcfgDBManager::~MlxcfgDBManager() { VECTOR_ITERATOR(TLVConf*, fetchedTLVs, it) { delete *it; } VECTOR_ITERATOR(Param*, fetchedParams, it) { delete *it; } if(!_db) { return; } sqlite3_close(_db); } void MlxcfgDBManager::openDB() { if (!isDBFileExists(_dbName)) { throw MlxcfgException("Database file %s does not exist", _dbName.c_str()); } if (sqlite3_open_v2(_dbName.c_str(), &_db, SQLITE_OPEN_READONLY, 0)) { string e = sqlite3_errmsg(_db); sqlite3_close(_db); _db = NULL; throw MlxcfgException("SQL Error when opening DB: %s", e.c_str()); } return; } void MlxcfgDBManager::execSQL(sqlite3_callback f, void* obj, const char* stat, ...) { va_list vl; char sql[1024]; char *zErrMsg = 0; va_start(vl, stat); vsnprintf(sql, sizeof(sql), stat, vl); va_end(vl); if(sqlite3_exec(_db, sql, f, obj, &zErrMsg) != SQLITE_OK) { string e = zErrMsg; sqlite3_free(zErrMsg); if (_callBackErr.empty()) { throw MlxcfgException("Cannot execute %s, %s", sql, e.c_str()); } else { throw MlxcfgException(_callBackErr.c_str()); } } } int MlxcfgDBManager::selectTLVCallBack(void *object, int argc, char **argv, char **azColName) { MlxcfgDBManager* dbManager = reinterpret_cast(object); //TODOO check this casting try { TLVConf* tlv = new TLVConf(argc, argv, azColName); dbManager->fetchedTLVs.push_back(tlv); } catch (MlxcfgException& e) { dbManager->_callBackErr = e._err; return SQLITE_ABORT; } return 0; } int MlxcfgDBManager::selectAndCreateNewTLVCallBack(void *object, int argc, char **argv, char **azColName) { TLVConf* *tlv = reinterpret_cast(object); try { *tlv = new TLVConf(argc, argv, azColName); } catch (MlxcfgException& e) { return SQLITE_ABORT; } return 0; } int MlxcfgDBManager::selectAndCreateParamCallBack(void *object, int argc, char **argv, char **azColName){ TLVConf* tlv = reinterpret_cast(object); try { Param* param = new Param(argc, argv, azColName); tlv->_params.push_back(param); } catch (MlxcfgException& e) { return SQLITE_ABORT; } return 0; } int MlxcfgDBManager::selectParamCallBack(void *object, int argc, char **argv, char **azColName){ MlxcfgDBManager* dbManager = reinterpret_cast(object); //TODOO check this casting try { Param* param = new Param(argc, argv, azColName); dbManager->fetchedParams.push_back(param); } catch (MlxcfgException& e) { dbManager->_callBackErr = e._err; return SQLITE_ABORT; } //printf("-D- Added new Param = %s\n", param->_name.c_str()); return 0; } int MlxcfgDBManager::selectParamByMlxconfigNameCallBack(void *object, int argc, char **argv, char **azColName){ MlxcfgDBManager* dbManager = reinterpret_cast(object); try { dbManager->_paramSqlResult = new Param(argc, argv, azColName); } catch (MlxcfgException& e) { dbManager->_callBackErr = e._err; return SQLITE_ABORT; } return 0; } void MlxcfgDBManager::getAllTLVs() { size_t i = 0, j = 0; if(_isAllFetched) { return; } //fetch from db all tlvs execSQL(selectTLVCallBack, this, SQL_SELECT_ALL_TLVS); //fetch from db all params execSQL(selectParamCallBack, this, SQL_SELECT_ALL_PARAMS); /* Fill in TLV.params vector we assume that params table is grouped by tlv name */ while(j < fetchedTLVs.size() && i < fetchedParams.size()) { Param* p = fetchedParams[i]; if (p->_tlvName == fetchedTLVs[j]->_name && p->_port == fetchedTLVs[j]->_port) { fetchedTLVs[j]->_params.push_back(p); i++;//move to next parameter } else { j++;//move to next tlv } } if (j >= fetchedTLVs.size() && i < fetchedParams.size()) { throw MlxcfgException("A parameter without a TLV configuration: %s", fetchedParams[i]->_name.c_str()); } //TODO check if there is a tlv that does not have params _isAllFetched = true; } TLVConf* MlxcfgDBManager::getTLVByNameAux(string n, u_int8_t port) { VECTOR_ITERATOR(TLVConf*, fetchedTLVs, it) { TLVConf* t = *it; if (t->_name == n && t->_port == port) { return t; } } return NULL; } TLVConf* MlxcfgDBManager::fetchTLVByName(string n, u_int8_t port) { TLVConf* t; const char* nc = n.c_str(); execSQL(selectTLVCallBack, this, SQL_SELECT_TLV_BY_NAME_AND_PORT, nc, port); t = getTLVByNameAux(n, port); if(!t) { throw MlxcfgException("The TLV configuration %s was not found", nc); } //fetch the parameters execSQL(selectParamCallBack, this, SQL_SELECT_PARAMS_BY_TLV_NAME_AND_PORT, nc, port); //fill in params vector of the tlv VECTOR_ITERATOR(Param*, fetchedParams, p) { if((*p)->_tlvName == t->_name && (*p)->_port == port) { t->_params.push_back(*p); } } return t; } TLVConf* MlxcfgDBManager::fetchTLVByIndexAndClass(u_int32_t id, TLVClass c) { TLVConf* t; execSQL(selectTLVCallBack, this, SQL_SELECT_TLV_BY_INDEX_AND_CLASS, id, c); t = getTLVByIndexAndClassAux(id, c); if (!t) { throw MlxcfgException("The TLV configuration with index 0x%x and class 0x%x was not found", id, c); } //fetch the parameters execSQL(selectParamCallBack, this, SQL_SELECT_PARAMS_BY_TLV_NAME_AND_PORT, t->_name.c_str(), t->_port); //fill in params vector of the tlv VECTOR_ITERATOR(Param*, fetchedParams, p) { if((*p)->_tlvName == t->_name && (*p)->_port == t->_port) { t->_params.push_back(*p); } } return t; } TLVConf* MlxcfgDBManager::getAndCreateTLVByName(string n, u_int8_t port) { TLVConf* tlv = NULL; const char* nc = n.c_str(); execSQL(selectAndCreateNewTLVCallBack, &tlv, SQL_SELECT_TLV_BY_NAME_AND_PORT, nc, port); if(!tlv) { throw MlxcfgException("The TLV configuration %s was not found", nc); } //fetch the parameters execSQL(selectAndCreateParamCallBack, tlv, SQL_SELECT_PARAMS_BY_TLV_NAME_AND_PORT, nc, port); return tlv; } TLVConf* MlxcfgDBManager::getTLVByName(string n, u_int8_t port) { TLVConf* t = NULL; t = getTLVByNameAux(n, port); if(!t) { t = fetchTLVByName(n, port); } return t; } TLVConf* MlxcfgDBManager::getTLVByIndexAndClassAux(u_int32_t id, TLVClass c) { VECTOR_ITERATOR(TLVConf*, fetchedTLVs, it) { TLVConf* t = *it; if (t->_id == id && t->_tlvClass == c) { return t; } } return NULL; } TLVConf* MlxcfgDBManager::getTLVByParamMlxconfigName(std::string n) { u_int32_t port; string tlvName; VECTOR_ITERATOR(TLVConf*, fetchedTLVs, it) { if((*it)->findParamByMlxconfigName(n)) { return (*it); } } //printf("-D- Try to find it in DB\n"); //Try to find it in DB: execSQL(selectParamByMlxconfigNameCallBack, this, SQL_SELECT_PARAM_BY_MLXCONFIG_NAME, n.c_str()); if(!_paramSqlResult) { throw MlxcfgException( "Unknown Parameter: %s", n.c_str()); } port = _paramSqlResult->_port; tlvName = _paramSqlResult->_tlvName; delete _paramSqlResult; _paramSqlResult = NULL; return fetchTLVByName(tlvName, port); } TLVConf* MlxcfgDBManager::getTLVByIndexAndClass(u_int32_t id, TLVClass c) { TLVConf* t = NULL; t = getTLVByIndexAndClassAux(id, c); if(!t) { t = fetchTLVByIndexAndClass(id, c); } return t; } inline bool MlxcfgDBManager::isDBFileExists(const std::string& name) { if (FILE *file = fopen(name.c_str(), "r")) { fclose(file); return true; } else { return false; } } /* string MlxcfgDBManagerException::getMessageByCode(ExceptionCode c) const{ switch(c) { case DB_FILE_DOES_NOT_EXIST: return "Database file does not exist"; case SQL_ERROR: return "SQL Error: " + _info; case PARAM_DOES_NOT_BELONG_TO_TLV: return "A parameter does not belong to any TLV Configuration: " + _info; case UNKNOWN: default: return "Unknown"; } }*/ mstflint-4.8.0/mlxconfig/mlxcfg_commander.cpp0000644000175000017500000001240513201023206020307 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_commander.cpp * * Created on: Jun 22, 2016 * Author: ahmads */ #include #include #include "mlxcfg_4thgen_commander.h" #include "mlxcfg_generic_commander.h" #include "mlxcfg_param_lib.h" #include "mlxcfg_utils.h" using namespace std; Commander* Commander::create(std::string device, std::string dbName) { mfile* mf; mf = mopen(device.c_str()); if (mf == NULL) { throw MlxcfgException("Failed to open the device"); } Commander* cmdr = NULL; try { cmdr = create(mf, device, dbName); } catch(MlxcfgException& exp) { mclose(mf); throw exp; } cmdr->setExtResourceType(false); return cmdr; } Commander* Commander::create(mfile* mf, std::string device, std::string dbName) { bool isFifthGen, isSwitch = false; dm_dev_id_t deviceId = DeviceUnknown; u_int32_t hwDevId, hwRevId; Commander* commander = NULL; if( dm_get_device_id(mf, &deviceId, &hwDevId, &hwRevId) ) { throw MlxcfgException("Failed to identify the device"); } // check if device is supported: switch(deviceId) { case DeviceConnectX3: case DeviceConnectX3Pro: isFifthGen = false; break; case DeviceConnectIB: case DeviceConnectX4: case DeviceConnectX4LX: case DeviceConnectX5: case DeviceBlueField: isFifthGen = true; break; case DeviceSwitchIB: case DeviceSpectrum: case DeviceSwitchIB2: case DeviceQuantum: case DeviceSpectrum2: isSwitch = true; isFifthGen = true; break; default: throw MlxcfgException("Unsupported device"); } if (dm_is_livefish_mode(mf)) { throw MlxcfgException("Device in Livefish mode is not supported"); } if (isFifthGen) { if (dbName.empty()) {//take internal db file dbName = getDefaultDBName(isSwitch); } commander = new GenericCommander(mf, dbName); } else { commander = new FourthGenCommander(mf, device); } return commander; } Commander::~Commander() { if (!_extResource && _mf) { mclose(_mf); } } string Commander::getDefaultDBName(bool isSwitch) { const string dbDirName = "mlxconfig_dbs"; const string hostDBName = "mlxconfig_host.db"; const string switchDBName = "mlxconfig_switch.db"; const string dbFileName = isSwitch ? switchDBName : hostDBName; string dbPathName = ""; #ifdef __WIN__ char execFilePathCStr[1024] = {0x0}; GetModuleFileName(GetModuleHandle("libmtcr-1.dll"), execFilePathCStr, 1024); dbPathName = execFilePathCStr; dbPathName = dbPathName.substr(0, dbPathName.rfind("\\") + 1); dbPathName += dbDirName + "\\" + dbFileName; #elif defined MST_UL dbPathName = DATA_PATH "/" + dbDirName + "/" + dbFileName; #else char line[1024] = {0}; string confFile = string(ROOT_PATH) + string("etc/mft/mft.conf"); FILE* fd = fopen(confFile.c_str(), "r"); if (!fd) { throw MlxcfgException("Failed to open conf file : %s\n", confFile.c_str()); } string prefix = "", dataPath = ""; while ((fgets(line, 1024, fd))) { string l = line; if (l.find(dbDirName) != string::npos) { size_t eqPos = l.find("="); if (eqPos != string::npos) { dataPath = l.substr(eqPos + 1); dataPath = mlxcfg_trim(dataPath); } } else if(l.find("mft_prefix_location") != string::npos) { size_t eqPos = l.find("="); if (eqPos != string::npos) { prefix = l.substr(eqPos + 1); prefix = mlxcfg_trim(prefix); } } } if (!prefix.empty() && !dataPath.empty()) { dbPathName = prefix + dataPath + "/" + dbFileName; } fclose(fd); #endif return dbPathName; } mstflint-4.8.0/mlxconfig/mlxcfg_ui.h0000755000175000017500000001204413201023206016426 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifndef MLXCFG_UI_H_ #define MLXCFG_UI_H_ #include #include #include #include "mlxcfg_4thgen_commander.h" //#include "mlxcfg_lib.h" #include "mlxcfg_commander.h" #include "mlxcfg_view.h" #define DB_NAME "" typedef enum { Mc_Set, Mc_Query, Mc_Reset, Mc_Clr_Sem, Mc_Set_Raw, Mc_Backup, Mc_ShowConfs, Mc_GenTLVsFile, Mc_GenXMLTemplate, Mc_Raw2XML, Mc_XML2Raw, Mc_XML2Bin, Mc_CreateConf, Mc_Apply, Mc_UnknownCmd } mlxCfgCmd; using namespace std; class MlxCfgParams { public: MlxCfgParams() : device(), rawTlvFile(), NVInputFile(), NVOutputFile(), dbName(DB_NAME), privPemFile(), keyPairUUID(), allAttrs(false), cmd(Mc_UnknownCmd), yes(false), force(false), enableVerbosity(false) {} ~MlxCfgParams() {} std::string device; std::string rawTlvFile; std::string NVInputFile; std::string NVOutputFile; std::string dbName; std::string privPemFile; std::string keyPairUUID; bool allAttrs; mlxCfgCmd cmd; bool yes; std::vector setParams; bool force;// ignore parameter checks bool enableVerbosity; }; class MlxCfg { public: MlxCfg() : _mlxParams(), _errStr(), _allInfo(){} ~MlxCfg() {}; mlxCfgStatus execute(int argc, char* argv[]); private: // User interface and parsing methods void printHelp(); mlxCfgStatus showDevConfs(); void printVersion(); void printUsage(); void printOpening(const char* dev, int devIndex); void printConfHeader(bool showDefualt, bool showNew, bool showCurrent); mlxCfgStatus parseArgs(int argc, char* argv[]); //Helper functions for parse args mlxCfgStatus extractNVInputFile(int argc, char* argv[]); mlxCfgStatus extractNVOutputFile(int argc, char* argv[]); mlxCfgStatus extractSetCfgArgs(int argc, char* argv[]); mlxCfgStatus extractQueryCfgArgs(int argc, char* argv[]); bool tagExsists(string tag); const char* getDeviceName(const char* dev); // Query cmd mlxCfgStatus queryDevsCfg(); mlxCfgStatus queryDevCfg(const char* dev, const char* pci=(const char*)NULL, int devIndex=1, bool printNewCfg=false); mlxCfgStatus queryDevCfg(Commander* commander, const char* dev, const char* pci=(const char*)NULL, int devIndex=1, bool printNewCfg=false); // Set cmd mlxCfgStatus setDevCfg(); // reset Cmd mlxCfgStatus resetDevsCfg(); mlxCfgStatus resetDevCfg(const char* dev); // Set Raw TLV file mlxCfgStatus setDevRawCfg(); mlxCfgStatus backupCfg(); mlxCfgStatus tlvLine2DwVec(const std::string& tlvStringLine, std::vector& tlvVec); mlxCfgStatus clrDevSem(); mlxCfgStatus readBinFile(string fileName, vector& buff); mlxCfgStatus readNVInputFile(vector& buff); mlxCfgStatus readNVInputFile(string& content); mlxCfgStatus readNVInputFile(vector& lines); mlxCfgStatus writeNVOutputFile(vector content); mlxCfgStatus writeNVOutputFile(string content); mlxCfgStatus writeNVOutputFile(vector lines); mlxCfgStatus genTLVsFile(); mlxCfgStatus genXMLTemplate(); mlxCfgStatus raw2XMLAux(bool isBin); mlxCfgStatus raw2XML(); mlxCfgStatus XML2RawAux(bool isBin); mlxCfgStatus XML2Raw(); mlxCfgStatus XML2Bin(); mlxCfgStatus createConf(); mlxCfgStatus apply(); bool askUser(const char* question); mlxCfgStatus err(bool report, const char* errMsg, ...); void printErr(); // data members MlxCfgParams _mlxParams; std::string _errStr; MlxCfgAllInfo _allInfo; }; #endif /* MLXCFG_UI_H_ */ mstflint-4.8.0/mlxconfig/mlxcfg_tlv.cpp0000755000175000017500000006624213201023206017162 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * * mlxcfg_tlv.cpp * * Created on: May 24, 2016 * Author: ahmads */ #include #include #include #include #include #include "../tools_layouts/tools_open_layouts.h" #include "mlxcfg_tlv.h" #include "ext_libs/muparser/muParser.h" using namespace mu; using namespace std; #define TLV_NAME_HEADER "name" #define TLV_ID_HEADER "id" #define TLV_CAP_HEADER "cap" #define TLV_TARGET_HEADER "target" #define TLV_CLASS_HEADER "class" #define TLV_VERSION_HEADER "version" #define TLV_SIZE_HEADER "size" #define TLV_DESCRIPTION_HEADER "description" #define TLV_MLXCONFIG_NAME_HEADER "mlxconfig_name" #define TLV_PORT_HEADER "port" #define CHECK_IF_FIELD_FOUND(b, s) \ if(!b) {\ throw MlxcfgException("The TLVConf field %s was not initialized", s);\ } TLVConf::TLVConf(int columnsCount, char **dataRow, char **headerRow) : _isNameFound(false), _isIdFound(false), _isSizeFound(false), _isCapFound(false), _isTargetFound(false), _isClassFound(false), _isVersion(false), _isDescriptionFound(false), _isMlxconfigNameFound(false), _isPortFound(false), _maxTlvVersionSuppByFw(0) { for (int i = 0; i < columnsCount; i++) { if (strcmp(headerRow[i], TLV_NAME_HEADER) == 0) { _name = dataRow[i]; _isNameFound = true; } else if (strcmp(headerRow[i], TLV_ID_HEADER) == 0) { _id = atoi(dataRow[i]); _isIdFound = true; } else if (strcmp(headerRow[i], TLV_CAP_HEADER) == 0) { if (dataRow[i] == NULL) { _cap = false; } else { _cap = atoi(dataRow[i]); } _isCapFound = true; } else if (strcmp(headerRow[i], TLV_TARGET_HEADER) == 0) { _target = str2TLVTarget(dataRow[i]); _isTargetFound = true; } else if (strcmp(headerRow[i], TLV_CLASS_HEADER) == 0) { _tlvClass = str2TLVClass(dataRow[i]); _isClassFound = true; } else if (strcmp(headerRow[i], TLV_VERSION_HEADER) == 0) { _version = atoi(dataRow[i]); _isVersion = true; } else if (strcmp(headerRow[i], TLV_SIZE_HEADER) == 0) { _size = atoi(dataRow[i]); _isSizeFound = true; } else if (strcmp(headerRow[i], TLV_DESCRIPTION_HEADER) == 0) { _description = dataRow[i] ? dataRow[i] : ""; _isDescriptionFound = true; } else if (strcmp(headerRow[i], TLV_MLXCONFIG_NAME_HEADER) == 0) { _mlxconfigName = dataRow[i] ? dataRow[i] : ""; _isMlxconfigNameFound = true; } else if (strcmp(headerRow[i], TLV_PORT_HEADER) == 0) { _port = atoi(dataRow[i]); _isPortFound = true; } else { printf("UNKNOWN - %s = %s\n", headerRow[i], dataRow[i] ? dataRow[i] : "NULL"); } } CHECK_IF_FIELD_FOUND(_isNameFound, TLV_NAME_HEADER) CHECK_IF_FIELD_FOUND(_isIdFound, TLV_ID_HEADER) CHECK_IF_FIELD_FOUND(_isCapFound, TLV_CAP_HEADER) CHECK_IF_FIELD_FOUND(_isTargetFound, TLV_TARGET_HEADER) CHECK_IF_FIELD_FOUND(_isClassFound, TLV_CLASS_HEADER) CHECK_IF_FIELD_FOUND(_isVersion, TLV_VERSION_HEADER) CHECK_IF_FIELD_FOUND(_isSizeFound, TLV_SIZE_HEADER) CHECK_IF_FIELD_FOUND(_isDescriptionFound, TLV_DESCRIPTION_HEADER) CHECK_IF_FIELD_FOUND(_isMlxconfigNameFound, TLV_MLXCONFIG_NAME_HEADER) CHECK_IF_FIELD_FOUND(_isPortFound, TLV_PORT_HEADER) _alreadyQueried = false; if (_tlvClass == Physical_Port) { _attrs[PORT_ATTR]= (_port == 1) ? "1" : "2"; } else if (_tlvClass == Per_Host_Per_Function) { _attrs[FUNC_ATTR]="0"; _attrs[HOST_ATTR]="0"; } _attrs[OVR_EN_ATTR]="1"; _attrs[RD_EN_ATTR]="1"; _buff.resize(_size, 0); } void TLVConf::getView(TLVConfView& tlvConfView) { tlvConfView.name = _mlxconfigName; tlvConfView.description = _description; tlvConfView.tlvClass = _tlvClass; for (size_t j = 0; j < _params.size(); j++) { if (!_params[j]->_mlxconfigName.empty()) { ParamView paramView; _params[j]->getView(paramView); tlvConfView.params.push_back(paramView); } } } //This function checks if the mlxconfig tool should support this TLV bool TLVConf::isMlxconfigSupported() { for (size_t i = 0; i < _params.size(); i++) { if (_params[i]->_mlxconfigName.empty() == false) { return true; } } return false; } //This function checks if the FW knows the TLV. bool TLVConf::isFWSupported(mfile* mf, bool read_write) { bool suppRead = false, suppWrite = false; //printf("-D- tlv=%s\n", _name.c_str()); if (_target == EXP_ROM) { return true; } if (nvqcCom5thGen(mf, getTlvTypeBe(), suppRead, suppWrite, _maxTlvVersionSuppByFw)) { //Don't throw exception if we fail to run nvqc, maybe its an old fw return false; } if (!suppRead) { return false; } if (read_write && !suppWrite) { return false; } return true; } void TLVConf::unpack(u_int8_t* buff) { VECTOR_ITERATOR(Param*, _params, p) { (*p)->unpack(buff); } } void TLVConf::pack(u_int8_t* buff) { VECTOR_ITERATOR(Param*, _params, p) { (*p)->pack(buff); } } void TLVConf::invalidate(mfile * mf) { MError mRc = nvdiCom5thGen(mf, getTlvTypeBe()); if (mRc) { throw MlxcfgException( "Failed to reset %s settings %s", _name.c_str(), m_err2str(mRc)); } } u_int32_t TLVConf::getGlobalTypeBe() { struct tools_open_global_type type; u_int32_t tlvType = 0; type.param_class = (u_int8_t)_tlvClass; type.param_idx = _id; tools_open_global_type_pack(&type, (u_int8_t*) &tlvType); return tlvType; } u_int32_t TLVConf::getPhysicalPortTypeBe() { struct tools_open_per_port_type type; u_int32_t tlvType = 0; if (_attrs[PORT_ATTR] == ALL_ATTR_VAL) { type.param_class = Physical_Port_Common; type.port = 0; //port field is reserved } else { type.param_class = Physical_Port; type.port = _port; } type.param_idx = _id; tools_open_per_port_type_pack(&type, (u_int8_t*) &tlvType); return tlvType; } u_int32_t TLVConf::getPerHostTypeBe() { u_int32_t tlvType = 0; struct tools_open_host_type type; memset(&type, 0x0, sizeof(type)); type.param_class = (u_int8_t)_tlvClass; type.param_idx = _id; tools_open_host_type_pack(&type, (u_int8_t*) &tlvType); return tlvType; } u_int32_t TLVConf::getPerHostFunctionTypeBe() { struct tools_open_per_host_type type; u_int32_t tlvType = 0, num = 0; string host = _attrs[HOST_ATTR], func = _attrs[FUNC_ATTR]; memset(&type, 0, sizeof(struct tools_open_per_host_type)); if (host == ALL_ATTR_VAL && func == ALL_ATTR_VAL) { type.param_class = All_Hosts_All_Functions; type.function = 0; type.host = 0; } else if (host == ALL_ATTR_VAL && func != ALL_ATTR_VAL) { type.param_class = All_Hosts_Per_Function; type.host = 0; if (!strToNum(_attrs[FUNC_ATTR], num)) { throw MlxcfgException(FUNC_ATTR" attribute value %s is not valid", func.c_str()); } type.function = num; } else if (host != ALL_ATTR_VAL && func == ALL_ATTR_VAL) { type.param_class = Per_Host_All_Functions; type.function = 0; if (!strToNum(_attrs[HOST_ATTR], num)) { throw MlxcfgException(HOST_ATTR" attribute value %s is not valid", host.c_str()); } type.host = num; } else if (host != ALL_ATTR_VAL && func != ALL_ATTR_VAL) { type.param_class = Per_Host_Per_Function; if (!strToNum(_attrs[HOST_ATTR], num)) { throw MlxcfgException(HOST_ATTR" attribute value %s is not valid", host.c_str()); } type.host = num; if (!strToNum(_attrs[FUNC_ATTR], num)) { throw MlxcfgException(FUNC_ATTR" attribute value %s is not valid", func.c_str()); } type.function = num; } type.param_idx = _id; tools_open_per_host_type_pack(&type, (u_int8_t*) &tlvType); return tlvType; } u_int32_t TLVConf::getTlvTypeBe() { switch (_tlvClass) { case NVFile: case Global: return getGlobalTypeBe(); case Physical_Port_Common: case Physical_Port: return getPhysicalPortTypeBe(); case All_Hosts_All_Functions: case All_Hosts_Per_Function: case Per_Host_All_Functions: case Per_Host_Per_Function: return getPerHostFunctionTypeBe(); case Per_Host: return getPerHostTypeBe(); default: break; } throw MlxcfgException("The tlv %s has unknown class %d", _name.c_str(), _tlvClass); } Param* TLVConf::getValidBitParam(string n) { Param *vP = getParamByName(n); if (!vP) { throw MlxcfgException( "The valid bit %s in the tlv %s was not found\n", n.c_str(), _name.c_str()); } if (vP->_type != UNSIGNED && vP->_type != INTEGER && vP->_type != ENUM && vP->_type != BOOLEAN_TYPE) { throw MlxcfgException("The valid bit %s is of invalid type", n.c_str()); } return vP; } bool TLVConf::checkParamValidBit(Param* p) { if (!p->_validBit.empty()) { Param *vP = getValidBitParam(p->_validBit); if (!vP->_value) { return false; } } return true; } void TLVConf::mnva(mfile* mf, u_int8_t* buff, u_int16_t len, u_int32_t type, reg_access_method_t method, QueryType qT) { bool isSet = (method == REG_ACCESS_METHOD_SET); MError mRc = mnvaCom5thGen(mf, buff, len, type, method, qT); if (mRc) { //Todo: ask for this check: if (mRc != ME_REG_ACCESS_RES_NOT_AVLBL || isSet) { throw MlxcfgException( "Failed to %s %s settings %s", isSet ? "set" : "get", _name.c_str(), m_err2str(mRc)); } } } void TLVConf::parseParamValue(string paramMlxconfigName, string valToParse, u_int32_t& val, string& strVal) { Param* p = findParamByMlxconfigName(paramMlxconfigName); if(!p) { throw MlxcfgException("Unknown Parameter %s", paramMlxconfigName.c_str()); } p->_value->parseValue(valToParse, val, strVal); } vector > TLVConf::query(mfile* mf, QueryType qT) { bool defaultQueried = false; bool getDefault = (qT == QueryDefault); vector > queryResult; vector defaultBuff(_size, 0); mnva(mf, _buff.data(), _size, getTlvTypeBe(), REG_ACCESS_METHOD_GET, qT); unpack(_buff.data()); VECTOR_ITERATOR(Param*, _params, it) { ParamView paramView; Param* p = *(it); if (!getDefault && !checkParamValidBit(p)) {//then take default value if(!defaultQueried) { mnva(mf, defaultBuff.data(), _size, getTlvTypeBe(), REG_ACCESS_METHOD_GET, QueryDefault); defaultQueried = true; } p->unpack(defaultBuff.data()); } if (p->_mlxconfigName.empty() || p->_supportedFromVersion > _maxTlvVersionSuppByFw) { continue; } p->getView(paramView); queryResult.push_back(make_pair(paramView, p->_dependency)); } return queryResult; } void TLVConf::updateParamByMlxconfigName(string paramMlxconfigName, string val) { Param* p = findParamByMlxconfigName(paramMlxconfigName); if(!p) { throw MlxcfgException("Unknown parameter: %s", paramMlxconfigName.c_str()); } p->setVal(val); //check if there is a valid bit if(!p->_validBit.empty()) { (getValidBitParam(p->_validBit))->_value->setVal(1); } } void TLVConf::updateParamByMlxconfigName(string paramMlxconfigName, string val, u_int32_t index) { Param* p = findParamByMlxconfigName(paramMlxconfigName); if(!p) { throw MlxcfgException("Unknown parameter: %s", paramMlxconfigName.c_str()); } p->setVal(val, index); } void TLVConf::updateParamByName(string paramName, string val) { Param* p = NULL; VECTOR_ITERATOR(Param*, _params, it){ if (paramName == (*it)->_name) { p = *it; break; } } if(!p) { throw MlxcfgException("Unknown parameter %s of the configuration %s", paramName.c_str(), _name.c_str()); } p->setVal(val); //check if there is a valid bit if(!p->_validBit.empty()) { (getValidBitParam(p->_validBit))->_value->setVal(1); } } void TLVConf::updateParamByName(string paramName, vector vals) { Param* p = NULL; VECTOR_ITERATOR(Param*, _params, it){ if (paramName == (*it)->_name) { p = *it; break; } } if(!p) { throw MlxcfgException("Unknown parameter %s of the configuration %s", paramName.c_str(), _name.c_str()); } p->setVal(vals); } bool TLVConf::isAStringParam(string paramName) { Param* param = getParamByName(paramName); if (!param) { throw MlxcfgException("Unknown parameter %s of the configuration %s", paramName.c_str(), _name.c_str()); } return (param->_type == STRING); } TLVTarget TLVConf::str2TLVTarget(char *s) { if (strcmp(s, "NIC") == 0) { return NIC; } else if(strcmp(s, "EXP_ROM") == 0){ return EXP_ROM; } else if (strcmp(s, "NIC-internal") == 0) { return NIC_INTERNAL; } throw MlxcfgException("Unknown target '%s'", s); } TLVClass TLVConf::str2TLVClass(char *s) { int i = atoi(s); switch (i) { case 0: return Global; case 1: return Physical_Port; case 2: return BMC; case 3: return Per_Host_Per_Function; case 6: return NVFile; case 7: return Per_Host; } throw MlxcfgException("Unknown TLV class %d", i); } Param* TLVConf::getParamByName(string n) { for (size_t i = 0; i < _params.size(); i++) { Param* p = _params[i]; if (n == p->_name) { return p; } } return NULL; } Param* TLVConf::findParamByMlxconfigName(string n) { VECTOR_ITERATOR(Param*, _params, it){ if (n == (*it)->_mlxconfigName) { return *it; } } return NULL; } Param* TLVConf::findParamByName(string name) { VECTOR_ITERATOR(Param*, _params, it){ if (name == (*it)->_name) { return *it; } } return NULL; } u_int32_t TLVConf::getParamValueByName(string n) { Param* p = getParamByName(n); if (!p) { throw MlxcfgException("The parameter %s was not found", n.c_str()); } return p->_value->getIntVal(); } void evalExpr(string expr, string var, u_int32_t& varVal, u_int32_t& exprResult) { double x = 0; mu::Parser p; try { if(!var.empty()) { p.DefineVar(var, &x); } p.SetExpr(expr); exprResult = (u_int32_t) p.Eval(); varVal = (u_int32_t)x; } catch (Parser::exception_type &e) { throw MlxcfgException("Error parsing mathematical expression"); } } void TLVConf::getExprVarsValues(vector& vars, vector ruleTLVs, map& var2ValMap, string expr) { Param* vP = NULL; //find value of all vars(w/o temp vars) in the tempVars string: VECTOR_ITERATOR(string, vars, i) { string var = *i; //TODO: make sure: assume temp var starts with '_' if ((var[0] != '_' /*&& !isTempVarsExpr*/) && var2ValMap.find(var) == var2ValMap.end()) { size_t pos = var.find('.'); if (pos == string::npos) { //the var is in the same tlv or it is a temp var vP = getParamByName(var); } else { string tlvName = var.substr(0, pos); VECTOR_ITERATOR(TLVConf*, ruleTLVs, k) { if ((*k)->_name == tlvName) { vP = (*k)->getParamByName(var.substr(pos + 1)); //printf("tlvName=%s p=%s val=%d\n", tlvName.c_str(), vP->_name.c_str(), vP->_value); break; } } } if (vP == NULL) { throw MlxcfgException( "The parameter %s in the rule %s was not found\n", var.c_str(), expr.c_str()); } var2ValMap[var] = vP->_value->getIntVal(); } } } void substituteVarsValues(string orgExpr, string& expr, map& var2ValMap, bool isTempVars, string& tempVar) { string var = ""; expr = ""; tempVar = ""; for (unsigned int j = 0; j < orgExpr.size(); j++) { if (orgExpr[j] == '$') { var = ""; j++; while (j < orgExpr.size() && (orgExpr[j] == '_' || orgExpr[j] == '.' || ('a' <= orgExpr[j] && orgExpr[j] <= 'z') || ('A' <= orgExpr[j] && orgExpr[j] <= 'Z') || ('0' <= orgExpr[j] && orgExpr[j] <= '9'))) { var += orgExpr[j]; j++; } if(var[0] == '_' && isTempVars) { tempVar = var.substr(1);//don't take first char(because of muParser) expr += tempVar; } else { stringstream ss; ss << var2ValMap[var]; expr += ss.str(); } if (j < orgExpr.size()) { expr += orgExpr[j]; } } else { expr += orgExpr[j]; } } //eval temp vars values and update the map: } void TLVConf::evalTempVars(Param* p, vector ruleTLVs, map& var2ValMap) { vector vars; p->extractVars(vars, p->_tempVars); getExprVarsValues(vars, ruleTLVs, var2ValMap, p->_tempVars); //Substitute vars (w/o temp vars) with value: string expr = ""; string orgExpr = p->_tempVars; string var = ""; string tempVar = ""; substituteVarsValues(orgExpr, expr, var2ValMap, true, tempVar); u_int32_t v, r; evalExpr(expr, tempVar, v, r); var2ValMap['_' + tempVar] = v; } u_int32_t TLVConf::evalRule(Param* p, string rule, vector& ruleTLVs, map& var2ValMap) { string expr = ""; string orgExpr = rule; string var = ""; string temp = ""; vector vars; p->extractVars(vars, rule); getExprVarsValues(vars, ruleTLVs, var2ValMap, rule); substituteVarsValues(orgExpr, expr, var2ValMap, false, temp); u_int32_t v, r; evalExpr(expr, temp, v, r); return r; } void TLVConf::checkRules(vector ruleTLVs) { VECTOR_ITERATOR(Param*, _params, it) { Param* p = *it; map var2ValMap; if (p->_supportedFromVersion > _maxTlvVersionSuppByFw) { continue; } //first, find values of temp vars if(!p->_tempVars.empty()) { evalTempVars(p, ruleTLVs, var2ValMap); } if (!p->_maxVal.empty()) { u_int32_t r = evalRule(p, p->_maxVal, ruleTLVs, var2ValMap); if(p->_value->getIntVal() > r) { throw MlxcfgException( "Parameter %s' value is larger than maximum allowed %d", p->_mlxconfigName.c_str(), r); } } if (!p->_minVal.empty()) { u_int32_t r = evalRule(p, p->_minVal, ruleTLVs, var2ValMap); if(p->_value->getIntVal() < r) { throw MlxcfgException( "Parameter %s' value is smaller than minimum allowed %d", p->_mlxconfigName.c_str(), r); } } if (!p->_rule.empty()) { if(evalRule(p, p->_rule, ruleTLVs, var2ValMap) == 0) { string paramsList = ""; vector vars; p->extractVars(vars, p->_tempVars); p->extractVars(vars, p->_rule); VECTOR_ITERATOR(string, vars, it) { if (((*it).find('_') == 0) || (paramsList.find(*it) != string::npos)) { continue; } paramsList += (*it) + ", "; } throw MlxcfgException("The Parameter %s has Illegal constraint.\n" "Note: The constraint of this parameter is affected by the following parameters:\n%s", p->_mlxconfigName.c_str(), (paramsList.size() <= 2) ? "" : (paramsList.substr(0, paramsList.size() - 2)).c_str()); } } } } void TLVConf::setOnDevice(mfile* mf) { pack(_buff.data()); mnva(mf, _buff.data(), _size, getTlvTypeBe(), REG_ACCESS_METHOD_SET); } void TLVConf::getRuleTLVs(std::set& result) { VECTOR_ITERATOR(Param*, _params, p) { vector rulesTLV; (*p)->getRulesTLV(rulesTLV); VECTOR_ITERATOR(string, rulesTLV, r) { result.insert(*r); //printf("-D- rule TLV: %s\n", r->c_str()); } } return; } void TLVConf::genXMLTemplate(string& xmlTemplate, bool allAttrs, bool withVal, bool defaultAttrVal) { map attrs; if (_tlvClass == Physical_Port) { attrs[PORT_ATTR] = defaultAttrVal ? ALL_ATTR_VAL : _attrs[PORT_ATTR]; } else if (_tlvClass == Per_Host_Per_Function && allAttrs) { attrs[HOST_ATTR] = defaultAttrVal ? ALL_ATTR_VAL : _attrs[HOST_ATTR]; attrs[FUNC_ATTR] = defaultAttrVal ? ALL_ATTR_VAL : _attrs[FUNC_ATTR]; } if (allAttrs) { attrs[OVR_EN_ATTR] = defaultAttrVal ? "1" : _attrs[OVR_EN_ATTR]; attrs[RD_EN_ATTR] = defaultAttrVal ? "1" : _attrs[RD_EN_ATTR]; } xmlTemplate = "<" + _name; MAP_ITERATOR(string, string, attrs, it) { xmlTemplate += " " + it->first + "='" + it->second + "'"; } xmlTemplate += ">\n\n"; VECTOR_ITERATOR(Param*, _params, it) { string paramXMLTemplate; (*it)->genXMLTemplate(paramXMLTemplate, withVal); vector lines = splitStr(paramXMLTemplate, '\n'); VECTOR_ITERATOR(string, lines, line) { xmlTemplate += "\t" + *line + "\n"; } xmlTemplate += "\n"; } xmlTemplate += ""; } void TLVConf::unpackTLVType(TLVClass tlvClass, tools_open_tlv_type& type, u_int32_t& id) { struct tools_open_global_type global; struct tools_open_host_type per_host; struct tools_open_per_port_type per_port; struct tools_open_per_host_type per_host_function; switch(tlvClass) { case NVFile: case Global: //printf("-D- global\n"); tools_open_global_type_unpack(&global, (u_int8_t*)&(type.tlv_type_dw.tlv_type_dw)); //printf("-D- id=%d\n", global.param_idx); id = global.param_idx; type.global = global; break; case Physical_Port_Common: case Physical_Port: tools_open_per_port_type_unpack(&per_port, (u_int8_t*)&(type.tlv_type_dw.tlv_type_dw)); id = per_port.param_idx; type.per_port = per_port; break; case All_Hosts_All_Functions: case All_Hosts_Per_Function: case Per_Host_All_Functions: case Per_Host_Per_Function: tools_open_per_host_type_unpack(&per_host_function, (u_int8_t*)&(type.tlv_type_dw.tlv_type_dw)); id = per_host_function.param_idx; type.per_host = per_host_function; break; case Per_Host: tools_open_host_type_unpack(&per_host, (u_int8_t*)&(type.tlv_type_dw.tlv_type_dw)); id = per_host.param_idx; type.host = per_host; break; default: throw MlxcfgException("Unknown TLV class %d", (u_int32_t)tlvClass); } } void TLVConf::setAttr(string attr, string val) { if (_attrs.find(attr) == _attrs.end()) { throw MlxcfgException("%s attribute does not apply to tlv %s", attr.c_str(), _name.c_str()); } else { _attrs[attr] = val; } } void TLVConf::genRaw(string& raw) { vector buff; ostringstream buffSS; genBin(buff); for(unsigned int i = 0; i < buff.size(); i++) { buff.data()[i] = __be32_to_cpu(buff.data()[i]); buffSS << "0x"; buffSS << std::setfill('0') << std::setw(8) << std::hex; buffSS << buff.data()[i] << " "; } raw = buffSS.str(); } void TLVConf::genBin(vector& buff, bool withHeader) { u_int32_t rd_en, ovr_en; tools_open_nv_hdr_fifth_gen hdr; if (withHeader) { u_int32_t hdrSize = tools_open_nv_hdr_fifth_gen_size(); buff.resize((_size + hdrSize) >> 2); memset(&hdr, 0, sizeof(hdr)); hdr.length = _size; if (!strToNum(_attrs[RD_EN_ATTR], rd_en) || (rd_en > 1)) { throw MlxcfgException("Illegal value for " RD_EN_ATTR); } hdr.rd_en = (u_int8_t)rd_en; if (!strToNum(_attrs[OVR_EN_ATTR], ovr_en) || (ovr_en > 1)) { throw MlxcfgException("Illegal value for " OVR_EN_ATTR); } hdr.over_en = (u_int8_t)ovr_en; hdr.type.tlv_type_dw.tlv_type_dw = __be32_to_cpu(getTlvTypeBe()); tools_open_nv_hdr_fifth_gen_pack(&hdr, (u_int8_t*)buff.data()); pack((u_int8_t*)buff.data() + hdrSize); } else { buff.resize(_size >> 2); pack((u_int8_t*)buff.data()); } } mstflint-4.8.0/mlxconfig/mlxcfg_parser.cpp0000755000175000017500000004061213201023206017642 0ustar mehdimehdi/* * Copyright (C) Jan 2013 Mellanox Technologies Ltd. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #include #include #include #include #include #include #include #include "mlxcfg_ui.h" #include "mlxcfg_generic_commander.h" #include "mlxcfg_commander.h" #include "mlxcfg_view.h" #include "mlxcfg_utils.h" using namespace std; #define IDENT " " #define IDENT2 IDENT IDENT #define IDENT3 "\t\t" #define IDENT4 IDENT2 IDENT #define FIFTH_GENERATION_LIST "Connect-IB/Connect-X4/LX" #define FOURTH_GENERATION_LIST "ConnectX3/Pro" static void printFlagLine(string flag_s, string flag_l, string param, string desc) { string flags = "-" + flag_s + "|--" + flag_l + (param.length() ? " <" + param + ">" : ""); printf(IDENT2"%-16s", flags.c_str()); printf(IDENT3": %s\n", desc.c_str()); } #ifdef MTCR_UL #define DEVICE_NAME "device" #else #define DEVICE_NAME "mst device" #endif void MlxCfg::printHelp() { // print opening printf(IDENT"NAME:\n" IDENT2 MLXCFG_NAME"\n" IDENT"SYNOPSIS:\n" IDENT2 MLXCFG_NAME " [Options] [Parameters]\n"); // print options printf("\n"); printf(IDENT"OPTIONS:\n"); printFlagLine("d", "dev", "device", "Perform operation for a specified MST device."); printFlagLine("b", "db", "filename", "Use a specific database file."); printFlagLine("f", "file", "conf_file", "raw configuration file."); printFlagLine("h", "help", "", "Display help message."); printFlagLine("v", "version", "", "Display version info."); printFlagLine("e", "enable_verbosity", "", "Show default and current configurations."); printFlagLine("y", "yes", "", "Answer yes in prompt."); printFlagLine("a", "all_attrs", "", "Show all attributes in the XML template"); printFlagLine("p", "private_key", "", "pem file for private key"); printFlagLine("u", "key_uuid", "", "keypair uuid"); //print commands printf("\n"); printf(IDENT"COMMANDS:\n"); printf(IDENT2"%-24s : %s\n","clear_semaphore", "clear the tool semaphore."); printf(IDENT2"%-24s : %s\n","i[show_confs]", "display informations about all configurations."); printf(IDENT2"%-24s : %s\n","q[uery]", "query supported configurations."); printf(IDENT2"%-24s : %s\n","r[eset]", "reset all configurations to their default value."); printf(IDENT2"%-24s : %s\n","s[et]", "set configurations to a specific device."); printf(IDENT2"%-24s : %s\n","set_raw", "set raw configuration file.(only " FIFTH_GENERATION_LIST ".)"); printf(IDENT2"%-24s : %s\n","backup", "backup configurations to a file (only " FIFTH_GENERATION_LIST ".). Use set_raw command to restore file."); printf(IDENT2"%-24s : %s\n","gen_tlvs_file", "Generate List of all TLVs. TLVs output file name must be specified. (*)"); printf(IDENT2"%-24s : %s\n","g[en_xml_template]", "Generate XML template. TLVs input file name and XML output file name must be specified. (*)"); printf(IDENT2"%-24s : %s\n","xml2raw", "Generate Raw file from XML file. XML input file name and raw output file name must be specified. (*)"); printf(IDENT2"%-24s : %s\n","raw2xml", "Generate XML file from Raw file. raw input file name and XML output file name must be specified. (*)"); printf(IDENT2"%-24s : %s\n","xml2bin", "Generate Bin file from XML file. XML input file name and bin output file name must be specified. (*)"); printf(IDENT2"%-24s : %s\n","create_conf", "Generate Configuration file from XML file. XML input file name and bin output file name must be specified. (*)"); printf(IDENT2"%-24s : %s\n","apply", "Apply a Configuration file. bin input file name must be specified. (*)"); // print supported commands printf("\n"); printf(IDENT"(*) These commands do not require MST device\n\n"); printf(IDENT"To show supported configurations by device type, run show_confs command\n"); printf("\n"); // print usage examples printf("\n"); printf(IDENT"Examples:\n"); printf(IDENT2"%-35s: %s\n", "To query configurations", MLXCFG_NAME " -d " MST_DEV_EXAMPLE " query"); printf(IDENT2"%-35s: %s\n", "To set configuration", MLXCFG_NAME " -d " MST_DEV_EXAMPLE " set SRIOV_EN=1 NUM_OF_VFS=16 WOL_MAGIC_EN_P1=1"); printf(IDENT2"%-35s: %s\n", "To set raw configuration", MLXCFG_NAME " -d " MST_DEV_EXAMPLE2 " -f conf_file set_raw"); printf(IDENT2"%-35s: %s\n", "To reset configuration", MLXCFG_NAME " -d " MST_DEV_EXAMPLE " reset"); printf("\n"); printf(IDENT"Supported devices:\n"); printf(IDENT2"4th Generation devices: ConnectX3, ConnectX3-Pro (FW 2.31.5000 and above).\n"); printf(IDENT2"5th Generation devices: ConnectIB, ConnectX4, ConnectX4-LX, ConnectX5.\n"); printf("\n"); printf(IDENT"Note: query device to view supported configurations by Firmware.\n"); printf("\n"); } void MlxCfg::printVersion() { print_version_string(MLXCFG_NAME, ""); } void MlxCfg::printUsage() { printHelp(); } bool MlxCfg::tagExsists(string tag) { VECTOR_ITERATOR(ParamView, _mlxParams.setParams, it) { if (it->mlxconfigName == tag) { return true; } } return false; } inline const char* cmdNVInputFileTag(mlxCfgCmd cmd, const char* def) { return (cmd == Mc_XML2Raw || cmd == Mc_XML2Bin || cmd == Mc_CreateConf) ? "XML" : (cmd == Mc_Raw2XML) ? "Raw" : (cmd == Mc_GenXMLTemplate) ? "TLVs" : (cmd == Mc_Apply) ? "Configuration" : def; } inline const char* cmdNVOutputFileTag(mlxCfgCmd cmd, const char* def) { return (cmd == Mc_XML2Raw) ? "Raw" : (cmd == Mc_Raw2XML) ? "XML" : (cmd == Mc_GenXMLTemplate) ? "XML" : (cmd == Mc_XML2Bin) ? "Bin" : (cmd == Mc_CreateConf) ? "Configuration" : def; } mlxCfgStatus MlxCfg::extractNVInputFile(int argc, char* argv[]) { if (argc < 1) { return err(true, "%s input file is missing", cmdNVInputFileTag(_mlxParams.cmd,"")); } _mlxParams.NVInputFile = argv[0]; return MLX_CFG_OK; } mlxCfgStatus MlxCfg::extractNVOutputFile(int argc, char* argv[]) { if (argc < 1) { return err(true, "%s output file is missing", cmdNVOutputFileTag(_mlxParams.cmd,"")); } _mlxParams.NVOutputFile = argv[0]; return MLX_CFG_OK; } mlxCfgStatus MlxCfg::extractQueryCfgArgs(int argc, char* argv[]) { int i = 0; for (;i < argc;i++) { ParamView pv; string mlxconfigName = argv[i]; if (isIndexedMlxconfigName(mlxconfigName)) { string indexStr = parseIndexStr(mlxconfigName); vector indexes; extractIndexes(indexStr, indexes); if (indexes.size() > 1) { mlxconfigName = mlxconfigName.substr(0, mlxconfigName.find('[')); VECTOR_ITERATOR(u_int32_t, indexes, it) { ParamView paramView; paramView.mlxconfigName = mlxconfigName + "[" + numToStr(*it) + "]"; _mlxParams.setParams.push_back(paramView); } continue; } else { pv.mlxconfigName = mlxconfigName; } } else { pv.mlxconfigName = mlxconfigName; } _mlxParams.setParams.push_back(pv); } return MLX_CFG_OK; } mlxCfgStatus MlxCfg::extractSetCfgArgs(int argc, char* argv[]) { int i = 0; string tag, strVal; for (;i < argc;i++) { char* ptr; // get the tag ptr = strtok(argv[i], "="); if (!ptr) { return err(true, "Invalid Configuration argument %s", argv[i]); } tag = ptr; // hopefully its calling copy function. // get the val ptr = strtok(NULL, "="); if (!ptr) { return err(true, "Invalid Configuration argument %s", argv[i]); } strVal = ptr; if (strtok(NULL, "=")) { return err(true, "Invalid Configuration argument %s", argv[i]); } if(tagExsists(tag)) { return err(true, "Duplicate parameter, %s.", tag.c_str()); } ParamView pv; if (isIndexedMlxconfigName(tag)) { string indexStr = parseIndexStr(tag); vector indexes; extractIndexes(indexStr, indexes); if (indexes.size() > 1) { string mlxconfigName = tag.substr(0, tag.find('[')); VECTOR_ITERATOR(u_int32_t, indexes, it) { ParamView paramView; paramView.setVal = strVal; paramView.mlxconfigName = mlxconfigName + "[" + numToStr(*it) + "]"; _mlxParams.setParams.push_back(paramView); } continue; } else { pv.mlxconfigName = tag; } } else { pv.mlxconfigName = tag; } pv.setVal = strVal; _mlxParams.setParams.push_back(pv); } return MLX_CFG_OK; } mlxCfgStatus MlxCfg::parseArgs(int argc, char* argv[]) { int i = 1; for (; i