openwince-include-0.3.2.orig/0040755000175000017500000000000007741657356013537 5ustar p2p2openwince-include-0.3.2.orig/arm/0040755000175000017500000000000007741657356014316 5ustar p2p2openwince-include-0.3.2.orig/arm/pxa2x0/0040755000175000017500000000000007741657356015440 5ustar p2p2openwince-include-0.3.2.orig/arm/pxa2x0/ac97.h0100644000175000017500000001641207652607242016343 0ustar p2p2/* * $Id: ac97.h,v 1.14 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 AC97 Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_AC97_H #define PXA2X0_AC97_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* AC97 Registers */ #define AC97_BASE 0x40500000 #if LANGUAGE == C typedef volatile struct AC97_registers { uint32_t pocr; uint32_t picr; uint32_t mccr; uint32_t gcr; uint32_t posr; uint32_t pisr; uint32_t mcsr; uint32_t gsr; uint32_t car; uint32_t __reserved1[7]; uint32_t pcdr; uint32_t __reserved2[7]; uint32_t mcdr; uint32_t __reserved3[39]; uint32_t mocr; uint32_t __reserved4; uint32_t micr; uint32_t __reserved5; uint32_t mosr; uint32_t __reserved6; uint32_t misr; uint32_t __reserved7[9]; uint32_t modr; uint32_t __reserved8[47]; uint32_t __pacr[64]; /* Primary Audio codec Registers */ uint32_t __sacr[64]; /* Secondary Audio codec Registers */ uint32_t __pmcr[64]; /* Primary Modem codec Registers */ uint32_t __smcr[64]; /* Secondary Modem codec Registers */ } AC97_registers_t; #ifdef PXA2X0_UNMAPPED #define AC97_pointer ((AC97_registers_t*) AC97_BASE) #endif #define POCR AC97_pointer->pocr #define PICR AC97_pointer->picr #define MCCR AC97_pointer->mccr #define GCR AC97_pointer->gcr #define POSR AC97_pointer->posr #define PISR AC97_pointer->pisr #define MCSR AC97_pointer->mcsr #define GSR AC97_pointer->gsr #define CAR AC97_pointer->car #define PCDR AC97_pointer->pcdr #define MCDR AC97_pointer->mcdr #define MOCR AC97_pointer->mocr #define MICR AC97_pointer->micr #define MOSR AC97_pointer->mosr #define MISR AC97_pointer->misr #define MODR AC97_pointer->modr #define __PACR(r) AC97_pointer->__pacr[(r) >> 1] #define __SACR(r) AC97_pointer->__sacr[(r) >> 1] #define __PMCR(r) AC97_pointer->__pmcr[(r) >> 1] #define __SMCR(r) AC97_pointer->__smcr[(r) >> 1] #endif /* LANGUAGE == C */ #define POCR_OFFSET 0x000 #define PICR_OFFSET 0x004 #define MCCR_OFFSET 0x008 #define GCR_OFFSET 0x00C #define POSR_OFFSET 0x010 #define PISR_OFFSET 0x014 #define MCSR_OFFSET 0x018 #define GSR_OFFSET 0x01C #define CAR_OFFSET 0x020 #define PCDR_OFFSET 0x040 #define MCDR_OFFSET 0x060 #define MOCR_OFFSET 0x100 #define MICR_OFFSET 0x108 #define MOSR_OFFSET 0x110 #define MISR_OFFSET 0x118 #define MODR_OFFSET 0x140 /* POCR bits - see Table 13-50 in [1], Table 13-10 in [2], Table 13-9 in [3] */ #define POCR_FEIE bit(3) /* PICR bits - see Table 13-51 in [1], Table 13-11 in [2], Table 13-10 in [3] */ #define PICR_FEIE bit(3) /* MCCR bits - see Table 13-56 in [1], Table 13-16 in [2], Table 13-15 in [3] */ #define MCCR_FEIE bit(3) /* GCR bits - see Table 13-48 in [1], Table 13-8 in [2], Table 13-7 in [3] */ #define GCR_CDONE_IE bit(19) #define GCR_SDONE_IE bit(18) #define GCR_SECRDY_IEN bit(9) #define GCR_PRIRDY_IEN bit(8) #define GCR_SECRES_IEN bit(5) #define GCR_PRIRES_IEN bit(4) #define GCR_ACLINK_OFF bit(3) #define GCR_WARM_RST bit(2) #define GCR_COLD_RST bit(1) #define GCR_GIE bit(0) /* POSR bits - see Table 13-52 in [1], Table 13-12 in [2], Table 13-11 in [3] */ #define POSR_FIFOE bit(4) /* PISR bits - see Table 13-53 in [1], Table 13-13 in [2], Table 13-12 in [3] */ #define PISR_FIFOE bit(4) /* MCSR bits - see Table 13-57 in [1], Table 13-17 in [2], Table 13-16 in [3] */ #define MCSR_FIFOE bit(4) /* GSR bits - see Table 13-49 in [1], Table 13-9 in [2], Table 13-8 in [3] */ #define GSR_CDONE bit(19) #define GSR_SDONE bit(18) #define GSR_RDCS bit(15) #define GSR_BIT3SLT12 bit(14) #define GSR_BIT2SLT12 bit(13) #define GSR_BIT1SLT12 bit(12) #define GSR_SECRES bit(11) #define GSR_PRIRES bit(10) #define GSR_SCR bit(9) #define GSR_PCR bit(8) #define GSR_MINT bit(7) #define GSR_POINT bit(6) #define GSR_PIINT bit(5) #define GSR_MOINT bit(2) #define GSR_MIINT bit(1) #define GSR_GSCI bit(0) /* CAR bits - see Table 13-54 in [1], Table 13-14 in [2], Table 13-13 in [3] */ #define CAR_CAIP bit(0) /* PCDR bits - see Table 13-55 in [1], Table 13-15 in [2], Table 13-14 in [3] */ #define PCDR_PCM_RDATA_MASK bits(31,16) #define PCDR_PCM_RDATA(x) bits_val(31,16,x) #define get_PCDR_PCM_RDATA(x) bits_get(31,16,x) #define PCDR_PCM_LDATA_MASK bits(15,0) #define PCDR_PCM_LDATA(x) bits_val(15,0,x) #define get_PCDR_PCM_LDATA(x) bits_get(15,0,x) /* MCDR bits - see Table 13-58 in [1], Table 13-18 in [2], Table 13-17 in [3] */ #define MCDR_MIC_IN_DAT_MASK bits(15,0) #define MCDR_MIC_IN_DAT(x) bits_val(15,0,x) #define get_MCDR_MIC_IN_DAT(x) bits_get(15,0,x) /* MOCR bits - see Table 13-59 in [1], Table 13-19 in [2], Table 13-18 in [3] */ #define MOCR_FEIE bit(3) /* MICR bits - see Table 13-60 in [1], Table 13-20 in [2], Table 13-19 in [3] */ #define MICR_FEIE bit(3) /* MOSR bits - see Table 13-61 in [1], Table 13-21 in [2], Table 13-20 in [3] */ #define MOSR_FIFOE bit(4) /* MISR bits - see Table 13-62 in [1], Table 13-22 in [2], Table 13-21 in [3] */ #define MISR_FIFOE bit(4) /* MODR bits - see Table 13-63 in [1], Table 13-23 in [2], Table 13-22 in [3] */ #define MODR_MODEM_DAT_MASK bits(15,0) #define MODR_MODEM_DAT(x) bits_val(15,0,x) #define get_MODR_MODEM_DAT(x) bits_get(15,0,x) #endif /* PXA2X0_AC97_H */ openwince-include-0.3.2.orig/arm/pxa2x0/cm.h0100644000175000017500000001074107652607242016176 0ustar p2p2/* * $Id: cm.h,v 1.12 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 Clocks Manager Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_CM_H #define PXA2X0_CM_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* Clocks Manager Registers */ #define CM_BASE 0x41300000 #if LANGUAGE == C typedef volatile struct CM_registers { uint32_t cccr; uint32_t cken; uint32_t oscc; } CM_registers_t; #ifdef PXA2X0_UNMAPPED #define CM_pointer ((CM_registers_t*) CM_BASE) #endif #define CCCR CM_pointer->cccr #define CKEN CM_pointer->cken #define OSCC CM_pointer->oscc #endif /* LANGUAGE == C */ #define CCCR_OFFSET 0x00 #define CKEN_OFFSET 0x04 #define OSCC_OFFSET 0x08 /* CCCR bits - see Table 3-20 in [1], Table 3-20 in [2], Table 3-20 in [3] */ #define CCCR_N_MASK bits(9,7) #define CCCR_N(x) bits_val(9,7,x) #define get_CCCR_N(x) bits_get(9,7,x) #define CCCR_M_MASK bits(6,5) #define CCCR_M(x) bits_val(6,5,x) #define get_CCCR_M(x) bits_get(6,5,x) #define CCCR_L_MASK bits(4,0) #define CCCR_L(x) bits_val(4,0,x) #define get_CCCR_L(x) bits_get(4,0,x) #define CCCR_N_1_0 CCCR_N(0x2) #define CCCR_N_1_5 CCCR_N(0x3) #define CCCR_N_2_0 CCCR_N(0x4) #define CCCR_N_3_0 CCCR_N(0x6) #define CCCR_M_1 CCCR_M(0x1) #define CCCR_M_2 CCCR_M(0x2) #if !defined(PXA2X0_NOPXA255) #define CCCR_M_4 CCCR_M(0x3) #endif /* PXA255 and above only */ #define CCCR_L_27 CCCR_L(0x01) #define CCCR_L_32 CCCR_L(0x02) #define CCCR_L_36 CCCR_L(0x03) #define CCCR_L_40 CCCR_L(0x04) #define CCCR_L_45 CCCR_L(0x05) /* CKEN bits - see Table 3-21 in [1], Table 3-21 in [2], Table 3-21 in [3] */ #define CKEN_CKEN16 bit(16) #define CKEN_CKEN14 bit(14) #define CKEN_CKEN13 bit(13) #define CKEN_CKEN12 bit(12) #define CKEN_CKEN11 bit(11) #if !defined(PXA2X0_NOPXA260) #define CKEN_CKEN10 bit(10) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) #define CKEN_CKEN9 bit(9) #endif /* PXA255 and above only */ #define CKEN_CKEN8 bit(8) #define CKEN_CKEN7 bit(7) #define CKEN_CKEN6 bit(6) #define CKEN_CKEN5 bit(5) #if !defined(PXA2X0_NOPXA255) #define CKEN_CKEN4 bit(4) #endif /* PXA255 and above only */ #define CKEN_CKEN3 bit(3) #define CKEN_CKEN2 bit(2) #define CKEN_CKEN1 bit(1) #define CKEN_CKEN0 bit(0) /* OSCC bits - see Table 3-22 in [1], Table 3-22 in [2], Table 3-22 in [3] */ #define OSCC_OON bit(1) #define OSCC_OOK bit(0) #endif /* PXA2X0_CM_H */ openwince-include-0.3.2.orig/arm/pxa2x0/dma.h0100644000175000017500000002243607652607242016344 0ustar p2p2/* * $Id: dma.h,v 1.14 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 DMA Controller Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_DMA_H #define PXA2X0_DMA_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* DMA Controller Registers */ #define DMA_BASE 0x40000000 #if LANGUAGE == C typedef struct _DMA_dar { uint32_t ddadr; uint32_t dsadr; uint32_t dtadr; uint32_t dcmd; } _DMA_dar_t; typedef volatile struct DMA_registers { uint32_t dcsr[16]; uint32_t __reserved1[44]; uint32_t dint; uint32_t __reserved2[3]; uint32_t drcmr[40]; uint32_t __reserved3[24]; _DMA_dar_t dar[16]; } DMA_registers_t; #ifdef PXA2X0_UNMAPPED #define DMA_pointer ((DMA_registers_t*) DMA_BASE) #endif #define DCSR(i) DMA_pointer->dcsr[i] #define DINT DMA_pointer->dint #define DRCMR(i) DMA_pointer->drcmr[i] #define DDADR(i) DMA_pointer->dar[i].ddadr #define DSADR(i) DMA_pointer->dar[i].dsadr #define DTADR(i) DMA_pointer->dar[i].dtadr #define DCMD(i) DMA_pointer->dar[i].dcmd /* DRCMR symbolic names - see Table 5-13 in [1], Table 5-13 in [2], Table 5-13 in [3] */ #define DRCMR_DREQ0 DRCMR(0) #define DRCMR_DREQ1 DRCMR(1) #define DRCMR_I2S_RX DRCMR(2) #define DRCMR_I2S_TX DRCMR(3) #define DRCMR_BTUART_RX DRCMR(4) #define DRCMR_BTUART_TX DRCMR(5) #define DRCMR_FFUART_RX DRCMR(6) #define DRCMR_FFUART_TX DRCMR(7) #define DRCMR_AC97_MIC_RX DRCMR(8) #define DRCMR_AC97_MODEM_RX DRCMR(9) #define DRCMR_AC97_MODEM_TX DRCMR(10) #define DRCMR_AC97_AUDIO_RX DRCMR(11) #define DRCMR_AC97_AUDIO_TX DRCMR(12) #define DRCMR_SSP_RX DRCMR(13) #define DRCMR_SSP_TX DRCMR(14) #if !defined(PXA2X0_NOPXA255) #define DRCMR_NSSP_RX DRCMR(15) #define DRCMR_NSSP_TX DRCMR(16) #endif /* PXA255 and above only */ #define DRCMR_FICP_RX DRCMR(17) #define DRCMR_FICP_TX DRCMR(18) #define DRCMR_STUART_RX DRCMR(19) #define DRCMR_STUART_TX DRCMR(20) #define DRCMR_MMC_RX DRCMR(21) #define DRCMR_MMC_TX DRCMR(22) #if !defined(PXA2X0_NOPXA260) #define DRCMR_ASSP_RX DRCMR(23) #define DRCMR_ASSP_TX DRCMR(24) #endif /* PXA260 and above only */ #define DRCMR_USB_EP1 DRCMR(25) #define DRCMR_USB_EP2 DRCMR(26) #define DRCMR_USB_EP3 DRCMR(27) #define DRCMR_USB_EP4 DRCMR(28) #if !defined(PXA2X0_NOPXA255) #define DRCMR_HWUART_RX DRCMR(29) #endif /* PXA255 and above only */ #define DRCMR_USB_EP6 DRCMR(30) #define DRCMR_USB_EP7 DRCMR(31) #define DRCMR_USB_EP8 DRCMR(32) #define DRCMR_USB_EP9 DRCMR(33) #if !defined(PXA2X0_NOPXA255) #define DRCMR_HWUART_TX DRCMR(34) #endif /* PXA255 and above only */ #define DRCMR_USB_EP11 DRCMR(35) #define DRCMR_USB_EP12 DRCMR(36) #define DRCMR_USB_EP13 DRCMR(37) #define DRCMR_USB_EP14 DRCMR(38) #endif /* LANGUAGE == C */ #define DCSR_OFFSET(i) ((i) << 2) #define DINT_OFFSET 0xF0 #define DRCMR_OFFSET(i) (0x100 + ((i) << 2)) #define DDADR_OFFSET(i) (0x200 + ((i) << 4)) #define DSADR_OFFSET(i) (0x204 + ((i) << 4)) #define DTADR_OFFSET(i) (0x208 + ((i) << 4)) #define DCMD_OFFSET(i) (0x20C + ((i) << 4)) /* DRCMR symbolic names offsets - see Table 5-13 in [1], Table 5-13 in [2], Table 5-13 in [3] */ #define DRCMR_DREQ0_OFFSET DRCMR_OFFSET(0) #define DRCMR_DREQ1_OFFSET DRCMR_OFFSET(1) #define DRCMR_I2S_RX_OFFSET DRCMR_OFFSET(2) #define DRCMR_I2S_TX_OFFSET DRCMR_OFFSET(3) #define DRCMR_BTUART_RX_OFFSET DRCMR_OFFSET(4) #define DRCMR_BTUART_TX_OFFSET DRCMR_OFFSET(5) #define DRCMR_FFUART_RX_OFFSET DRCMR_OFFSET(6) #define DRCMR_FFUART_TX_OFFSET DRCMR_OFFSET(7) #define DRCMR_AC97_MIC_RX_OFFSET DRCMR_OFFSET(8) #define DRCMR_AC97_MODEM_RX_OFFSET DRCMR_OFFSET(9) #define DRCMR_AC97_MODEM_TX_OFFSET DRCMR_OFFSET(10) #define DRCMR_AC97_AUDIO_RX_OFFSET DRCMR_OFFSET(11) #define DRCMR_AC97_AUDIO_TX_OFFSET DRCMR_OFFSET(12) #define DRCMR_SSP_RX_OFFSET DRCMR_OFFSET(13) #define DRCMR_SSP_TX_OFFSET DRCMR_OFFSET(14) #if !defined(PXA2X0_NOPXA255) #define DRCMR_NSSP_RX_OFFSET DRCMR_OFFSET(15) #define DRCMR_NSSP_TX_OFFSET DRCMR_OFFSET(16) #endif /* PXA255 and above only */ #define DRCMR_FICP_RX_OFFSET DRCMR_OFFSET(17) #define DRCMR_FICP_TX_OFFSET DRCMR_OFFSET(18) #define DRCMR_STUART_RX_OFFSET DRCMR_OFFSET(19) #define DRCMR_STUART_TX_OFFSET DRCMR_OFFSET(20) #define DRCMR_MMC_RX_OFFSET DRCMR_OFFSET(21) #define DRCMR_MMC_TX_OFFSET DRCMR_OFFSET(22) #if !defined(PXA2X0_NOPXA260) #define DRCMR_ASSP_RX_OFFSET DRCMR_OFFSET(23) #define DRCMR_ASSP_TX_OFFSET DRCMR_OFFSET(24) #endif /* PXA260 and above only */ #define DRCMR_USB_EP1_OFFSET DRCMR_OFFSET(25) #define DRCMR_USB_EP2_OFFSET DRCMR_OFFSET(26) #define DRCMR_USB_EP3_OFFSET DRCMR_OFFSET(27) #define DRCMR_USB_EP4_OFFSET DRCMR_OFFSET(28) #if !defined(PXA2X0_NOPXA255) #define DRCMR_HWUART_RX_OFFSET DRCMR_OFFSET(29) #endif /* PXA255 and above only */ #define DRCMR_USB_EP6_OFFSET DRCMR_OFFSET(30) #define DRCMR_USB_EP7_OFFSET DRCMR_OFFSET(31) #define DRCMR_USB_EP8_OFFSET DRCMR_OFFSET(32) #define DRCMR_USB_EP9_OFFSET DRCMR_OFFSET(33) #if !defined(PXA2X0_NOPXA255) #define DRCMR_HWUART_TX_OFFSET DRCMR_OFFSET(34) #endif /* PXA255 and above only */ #define DRCMR_USB_EP11_OFFSET DRCMR_OFFSET(35) #define DRCMR_USB_EP12_OFFSET DRCMR_OFFSET(36) #define DRCMR_USB_EP13_OFFSET DRCMR_OFFSET(37) #define DRCMR_USB_EP14_OFFSET DRCMR_OFFSET(38) /* DCSRx bits - see Table 5-7 in [1], Table 5-7 in [2], Table 5-7 in [3] */ #define DCSR_RUN bit(31) #define DCSR_NODESCFETCH bit(30) #define DCSR_STOPIRQEN bit(29) #define DCSR_REQPEND bit(8) #define DCSR_STOPSTATE bit(3) #define DCSR_ENDINTR bit(2) #define DCSR_STARTINTR bit(1) #define DCSR_BUSERRINTR bit(0) /* DINT bits - see Table 5-6 in [1], Table 5-6 in [2], Table 5-6 in [3] */ #define DINT_CHLINTR(x) bit(x) #define DINT_CHLINTR0 DINT_CHLINTR(0) #define DINT_CHLINTR1 DINT_CHLINTR(1) #define DINT_CHLINTR2 DINT_CHLINTR(2) #define DINT_CHLINTR3 DINT_CHLINTR(3) #define DINT_CHLINTR4 DINT_CHLINTR(4) #define DINT_CHLINTR5 DINT_CHLINTR(5) #define DINT_CHLINTR6 DINT_CHLINTR(6) #define DINT_CHLINTR7 DINT_CHLINTR(7) #define DINT_CHLINTR8 DINT_CHLINTR(8) #define DINT_CHLINTR9 DINT_CHLINTR(9) #define DINT_CHLINTR10 DINT_CHLINTR(10) #define DINT_CHLINTR11 DINT_CHLINTR(11) #define DINT_CHLINTR12 DINT_CHLINTR(12) #define DINT_CHLINTR13 DINT_CHLINTR(13) #define DINT_CHLINTR14 DINT_CHLINTR(14) #define DINT_CHLINTR15 DINT_CHLINTR(15) /* DRCMRx bits - see Table 5-8 in [1], Table 5-8 in [2], Table 5-8 in [3] */ #define DRCMR_MAPVLD bit(7) #define DRCMR_CHLNUM_MASK bits(3,0) #define DRCMR_CHLNUM(x) bits_val(3,0,x) #define get_DRCMR_CHLNUM(x) bits_get(3,0,x) /* DDADRx bits - see Table 5-9 in [1], Table 5-9 in [2], Table 5-9 in [3] */ #define DDADR_STOP bit(0) /* DCMDx bits - see Table 5-12 in [1], Table 5-12 in [2], Table 5-12 in [3] */ #define DCMD_INCSRCADDR bit(31) #define DCMD_INCTRGADDR bit(30) #define DCMD_FLOWSRC bit(29) #define DCMD_FLOWTRG bit(28) #define DCMD_STARTIRQEN bit(22) #define DCMD_ENDIRQEN bit(21) #define DCMD_ENDIAN bit(18) #define DCMD_SIZE_MASK bits(17,16) #define DCMD_SIZE(x) bits_val(17,16,x) #define get_DCMD_SIZE(x) bits_get(17,16,x) #define DCMD_WIDTH_MASK bits(15,14) #define DCMD_WIDTH(x) bits_val(15,14,x) #define get_DCMD_WIDTH(x) bits_get(15,14,x) #define DCMD_LENGTH_MASK bits(12,0) #define DCMD_LENGTH(x) bits_val(12,0,x) #define get_DCMD_LENGTH(x) bits_get(12,0,x) #endif /* PXA2X0_DMA_H */ openwince-include-0.3.2.orig/arm/pxa2x0/gpio.h0100644000175000017500000003221107652607242016531 0ustar p2p2/* * $Id: gpio.h,v 1.13 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 GPIO Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_GPIO_H #define PXA2X0_GPIO_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* GPIO Registers */ #define GPIO_BASE 0x40E00000 #if LANGUAGE == C typedef volatile struct GPIO_registers { uint32_t gplr0; uint32_t gplr1; uint32_t gplr2; uint32_t gpdr0; uint32_t gpdr1; uint32_t gpdr2; uint32_t gpsr0; uint32_t gpsr1; uint32_t gpsr2; uint32_t gpcr0; uint32_t gpcr1; uint32_t gpcr2; uint32_t grer0; uint32_t grer1; uint32_t grer2; uint32_t gfer0; uint32_t gfer1; uint32_t gfer2; uint32_t gedr0; uint32_t gedr1; uint32_t gedr2; uint32_t gafr0_l; uint32_t gafr0_u; uint32_t gafr1_l; uint32_t gafr1_u; uint32_t gafr2_l; uint32_t gafr2_u; } GPIO_registers_t; #ifdef PXA2X0_UNMAPPED #define GPIO_pointer ((GPIO_registers_t*) GPIO_BASE) #endif #define GPLR0 GPIO_pointer->gplr0 #define GPLR1 GPIO_pointer->gplr1 #define GPLR2 GPIO_pointer->gplr2 #define GPDR0 GPIO_pointer->gpdr0 #define GPDR1 GPIO_pointer->gpdr1 #define GPDR2 GPIO_pointer->gpdr2 #define GPSR0 GPIO_pointer->gpsr0 #define GPSR1 GPIO_pointer->gpsr1 #define GPSR2 GPIO_pointer->gpsr2 #define GPCR0 GPIO_pointer->gpcr0 #define GPCR1 GPIO_pointer->gpcr1 #define GPCR2 GPIO_pointer->gpcr2 #define GRER0 GPIO_pointer->grer0 #define GRER1 GPIO_pointer->grer1 #define GRER2 GPIO_pointer->grer2 #define GFER0 GPIO_pointer->gfer0 #define GFER1 GPIO_pointer->gfer1 #define GFER2 GPIO_pointer->gfer2 #define GEDR0 GPIO_pointer->gedr0 #define GEDR1 GPIO_pointer->gedr1 #define GEDR2 GPIO_pointer->gedr2 #define GAFR0_L GPIO_pointer->gafr0_l #define GAFR0_U GPIO_pointer->gafr0_u #define GAFR1_L GPIO_pointer->gafr1_l #define GAFR1_U GPIO_pointer->gafr1_u #define GAFR2_L GPIO_pointer->gafr2_l #define GAFR2_U GPIO_pointer->gafr2_u #endif /* LANGUAGE == C */ #define GPLR0_OFFSET 0x00 #define GPLR1_OFFSET 0x04 #define GPLR2_OFFSET 0x08 #define GPDR0_OFFSET 0x0C #define GPDR1_OFFSET 0x10 #define GPDR2_OFFSET 0x14 #define GPSR0_OFFSET 0x18 #define GPSR1_OFFSET 0x1C #define GPSR2_OFFSET 0x20 #define GPCR0_OFFSET 0x24 #define GPCR1_OFFSET 0x28 #define GPCR2_OFFSET 0x2C #define GRER0_OFFSET 0x30 #define GRER1_OFFSET 0x34 #define GRER2_OFFSET 0x38 #define GFER0_OFFSET 0x3C #define GFER1_OFFSET 0x40 #define GFER2_OFFSET 0x44 #define GEDR0_OFFSET 0x48 #define GEDR1_OFFSET 0x4C #define GEDR2_OFFSET 0x50 #define GAFR0_L_OFFSET 0x54 #define GAFR0_U_OFFSET 0x58 #define GAFR1_L_OFFSET 0x5C #define GAFR1_U_OFFSET 0x60 #define GAFR2_L_OFFSET 0x64 #define GAFR2_U_OFFSET 0x68 /* GPIO bits - see Table 2-11 in [1] */ #define GPIO0_GP0 bit(0) #define GPIO0_GP1 bit(1) #if !defined(PXA2X0_NOPXA250) #define GPIO0_GP2 bit(2) #define GPIO0_GP3 bit(3) #define GPIO0_GP4 bit(4) #define GPIO0_GP5 bit(5) #define GPIO0_GP6 bit(6) #define GPIO0_GP7 bit(7) #define GPIO0_GP8 bit(8) #define GPIO0_GP9 bit(9) #define GPIO0_GP10 bit(10) #define GPIO0_GP11 bit(11) #define GPIO0_GP12 bit(12) #define GPIO0_GP13 bit(13) #define GPIO0_GP14 bit(14) #endif /* PXA250 and above only */ #define GPIO0_GP15 bit(15) #define GPIO0_GP16 bit(16) #define GPIO0_GP17 bit(17) #define GPIO0_GP18 bit(18) #if !defined(PXA2X0_NOPXA250) #define GPIO0_GP19 bit(19) #define GPIO0_GP20 bit(20) #define GPIO0_GP21 bit(21) #define GPIO0_GP22 bit(22) #endif /* PXA250 and above only */ #define GPIO0_GP23 bit(23) #define GPIO0_GP24 bit(24) #define GPIO0_GP25 bit(25) #define GPIO0_GP26 bit(26) #define GPIO0_GP27 bit(27) #define GPIO0_GP28 bit(28) #define GPIO0_GP29 bit(29) #define GPIO0_GP30 bit(30) #define GPIO0_GP31 bit(31) #define GPIO1_GP32 bit(0) #define GPIO1_GP33 bit(1) #define GPIO1_GP34 bit(2) #if !defined(PXA2X0_NOPXA250) #define GPIO1_GP35 bit(3) #define GPIO1_GP36 bit(4) #define GPIO1_GP37 bit(5) #define GPIO1_GP38 bit(6) #endif /* PXA250 and above only */ #define GPIO1_GP39 bit(7) #if !defined(PXA2X0_NOPXA250) #define GPIO1_GP40 bit(8) #define GPIO1_GP41 bit(9) #endif /* PXA250 and above only */ #define GPIO1_GP42 bit(10) #define GPIO1_GP43 bit(11) #define GPIO1_GP44 bit(12) #define GPIO1_GP45 bit(13) #define GPIO1_GP46 bit(14) #define GPIO1_GP47 bit(15) #define GPIO1_GP48 bit(16) #define GPIO1_GP49 bit(17) #define GPIO1_GP50 bit(18) #define GPIO1_GP51 bit(19) #define GPIO1_GP52 bit(20) #define GPIO1_GP53 bit(21) #define GPIO1_GP54 bit(22) #define GPIO1_GP55 bit(23) #define GPIO1_GP56 bit(24) #define GPIO1_GP57 bit(25) #define GPIO1_GP58 bit(26) #define GPIO1_GP59 bit(27) #define GPIO1_GP60 bit(28) #define GPIO1_GP61 bit(29) #define GPIO1_GP62 bit(30) #define GPIO1_GP63 bit(31) #define GPIO2_GP64 bit(0) #define GPIO2_GP65 bit(1) #define GPIO2_GP66 bit(2) #define GPIO2_GP67 bit(3) #define GPIO2_GP68 bit(4) #define GPIO2_GP69 bit(5) #define GPIO2_GP70 bit(6) #define GPIO2_GP71 bit(7) #define GPIO2_GP72 bit(8) #define GPIO2_GP73 bit(9) #define GPIO2_GP74 bit(10) #define GPIO2_GP75 bit(11) #define GPIO2_GP76 bit(12) #define GPIO2_GP77 bit(13) #define GPIO2_GP78 bit(14) #define GPIO2_GP79 bit(15) #define GPIO2_GP80 bit(16) #if !defined(PXA2X0_NOPXA255) #define GPIO2_GP81 bit(17) #define GPIO2_GP82 bit(18) #define GPIO2_GP83 bit(19) #define GPIO2_GP84 bit(20) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define GPIO2_GP85 bit(21) #define GPIO2_GP86 bit(22) #define GPIO2_GP87 bit(23) #define GPIO2_GP88 bit(24) #define GPIO2_GP89 bit(25) #endif /* PXA260 and above only */ /* GAFR constants - see 4.1.3.6 in [1], 4.1.3.6 in [2], 4.1.3.6 in [3] */ #define ALT_FN_MASK 3 #define ALT_FN_0_IN 0 #define ALT_FN_1_IN 1 #define ALT_FN_2_IN 2 #define ALT_FN_3_IN 3 #define ALT_FN_0_OUT 0 #define ALT_FN_1_OUT 1 #define ALT_FN_2_OUT 2 #define ALT_FN_3_OUT 3 /* GAFR0_L bits - see Table 4-24 in [1], Table 4-24 in [2], Table 4-24 in [3] */ #define GAFR0_L_AF0(x) ((x) & ALT_FN_MASK) #define GAFR0_L_AF1(x) (((x) & ALT_FN_MASK) << 2) #if !defined(PXA2X0_NOPXA250) #define GAFR0_L_AF2(x) (((x) & ALT_FN_MASK) << 4) #define GAFR0_L_AF3(x) (((x) & ALT_FN_MASK) << 6) #define GAFR0_L_AF4(x) (((x) & ALT_FN_MASK) << 8) #define GAFR0_L_AF5(x) (((x) & ALT_FN_MASK) << 10) #define GAFR0_L_AF6(x) (((x) & ALT_FN_MASK) << 12) #define GAFR0_L_AF7(x) (((x) & ALT_FN_MASK) << 14) #define GAFR0_L_AF8(x) (((x) & ALT_FN_MASK) << 16) #define GAFR0_L_AF9(x) (((x) & ALT_FN_MASK) << 18) #define GAFR0_L_AF10(x) (((x) & ALT_FN_MASK) << 20) #define GAFR0_L_AF11(x) (((x) & ALT_FN_MASK) << 22) #define GAFR0_L_AF12(x) (((x) & ALT_FN_MASK) << 24) #define GAFR0_L_AF13(x) (((x) & ALT_FN_MASK) << 26) #define GAFR0_L_AF14(x) (((x) & ALT_FN_MASK) << 28) #endif /* PXA250 and above only */ #define GAFR0_L_AF15(x) (((x) & ALT_FN_MASK) << 30) /* GAFR0_U bits - see Table 4-25 in [1], Table 4-25 in [2], Table 4-25 in [3] */ #define GAFR0_U_AF16(x) ((x) & ALT_FN_MASK) #define GAFR0_U_AF17(x) (((x) & ALT_FN_MASK) << 2) #define GAFR0_U_AF18(x) (((x) & ALT_FN_MASK) << 4) #if !defined(PXA2X0_NOPXA250) #define GAFR0_U_AF19(x) (((x) & ALT_FN_MASK) << 6) #define GAFR0_U_AF20(x) (((x) & ALT_FN_MASK) << 8) #define GAFR0_U_AF21(x) (((x) & ALT_FN_MASK) << 10) #define GAFR0_U_AF22(x) (((x) & ALT_FN_MASK) << 12) #endif /* PXA250 and above only */ #define GAFR0_U_AF23(x) (((x) & ALT_FN_MASK) << 14) #define GAFR0_U_AF24(x) (((x) & ALT_FN_MASK) << 16) #define GAFR0_U_AF25(x) (((x) & ALT_FN_MASK) << 18) #define GAFR0_U_AF26(x) (((x) & ALT_FN_MASK) << 20) #define GAFR0_U_AF27(x) (((x) & ALT_FN_MASK) << 22) #define GAFR0_U_AF28(x) (((x) & ALT_FN_MASK) << 24) #define GAFR0_U_AF29(x) (((x) & ALT_FN_MASK) << 26) #define GAFR0_U_AF30(x) (((x) & ALT_FN_MASK) << 28) #define GAFR0_U_AF31(x) (((x) & ALT_FN_MASK) << 30) /* GAFR1_L bits - see Table 4-26 in [1], Table 4-26 in [2], Table 4-26 in [3] */ #define GAFR1_L_AF32(x) ((x) & ALT_FN_MASK) #define GAFR1_L_AF33(x) (((x) & ALT_FN_MASK) << 2) #define GAFR1_L_AF34(x) (((x) & ALT_FN_MASK) << 4) #if !defined(PXA2X0_NOPXA250) #define GAFR1_L_AF35(x) (((x) & ALT_FN_MASK) << 6) #define GAFR1_L_AF36(x) (((x) & ALT_FN_MASK) << 8) #define GAFR1_L_AF37(x) (((x) & ALT_FN_MASK) << 10) #define GAFR1_L_AF38(x) (((x) & ALT_FN_MASK) << 12) #endif /* PXA250 and above only */ #define GAFR1_L_AF39(x) (((x) & ALT_FN_MASK) << 14) #if !defined(PXA2X0_NOPXA250) #define GAFR1_L_AF40(x) (((x) & ALT_FN_MASK) << 16) #define GAFR1_L_AF41(x) (((x) & ALT_FN_MASK) << 18) #endif /* PXA250 and above only */ #define GAFR1_L_AF42(x) (((x) & ALT_FN_MASK) << 20) #define GAFR1_L_AF43(x) (((x) & ALT_FN_MASK) << 22) #define GAFR1_L_AF44(x) (((x) & ALT_FN_MASK) << 24) #define GAFR1_L_AF45(x) (((x) & ALT_FN_MASK) << 26) #define GAFR1_L_AF46(x) (((x) & ALT_FN_MASK) << 28) #define GAFR1_L_AF47(x) (((x) & ALT_FN_MASK) << 30) /* GAFR1_U bits - see Table 4-27 in [1], Table 4-27 in [2], Table 4-27 in [3] */ #define GAFR1_U_AF48(x) ((x) & ALT_FN_MASK) #define GAFR1_U_AF49(x) (((x) & ALT_FN_MASK) << 2) #define GAFR1_U_AF50(x) (((x) & ALT_FN_MASK) << 4) #define GAFR1_U_AF51(x) (((x) & ALT_FN_MASK) << 6) #define GAFR1_U_AF52(x) (((x) & ALT_FN_MASK) << 8) #define GAFR1_U_AF53(x) (((x) & ALT_FN_MASK) << 10) #define GAFR1_U_AF54(x) (((x) & ALT_FN_MASK) << 12) #define GAFR1_U_AF55(x) (((x) & ALT_FN_MASK) << 14) #define GAFR1_U_AF56(x) (((x) & ALT_FN_MASK) << 16) #define GAFR1_U_AF57(x) (((x) & ALT_FN_MASK) << 18) #define GAFR1_U_AF58(x) (((x) & ALT_FN_MASK) << 20) #define GAFR1_U_AF59(x) (((x) & ALT_FN_MASK) << 22) #define GAFR1_U_AF60(x) (((x) & ALT_FN_MASK) << 24) #define GAFR1_U_AF61(x) (((x) & ALT_FN_MASK) << 26) #define GAFR1_U_AF62(x) (((x) & ALT_FN_MASK) << 28) #define GAFR1_U_AF63(x) (((x) & ALT_FN_MASK) << 30) /* GAFR2_L bits - see Table 4-28 in [1], Table 4-28 in [2], Table 4-28 in [3] */ #define GAFR2_L_AF64(x) ((x) & ALT_FN_MASK) #define GAFR2_L_AF65(x) (((x) & ALT_FN_MASK) << 2) #define GAFR2_L_AF66(x) (((x) & ALT_FN_MASK) << 4) #define GAFR2_L_AF67(x) (((x) & ALT_FN_MASK) << 6) #define GAFR2_L_AF68(x) (((x) & ALT_FN_MASK) << 8) #define GAFR2_L_AF69(x) (((x) & ALT_FN_MASK) << 10) #define GAFR2_L_AF70(x) (((x) & ALT_FN_MASK) << 12) #define GAFR2_L_AF71(x) (((x) & ALT_FN_MASK) << 14) #define GAFR2_L_AF72(x) (((x) & ALT_FN_MASK) << 16) #define GAFR2_L_AF73(x) (((x) & ALT_FN_MASK) << 18) #define GAFR2_L_AF74(x) (((x) & ALT_FN_MASK) << 20) #define GAFR2_L_AF75(x) (((x) & ALT_FN_MASK) << 22) #define GAFR2_L_AF76(x) (((x) & ALT_FN_MASK) << 24) #define GAFR2_L_AF77(x) (((x) & ALT_FN_MASK) << 26) #define GAFR2_L_AF78(x) (((x) & ALT_FN_MASK) << 28) #define GAFR2_L_AF79(x) (((x) & ALT_FN_MASK) << 30) /* GAFR2_U bits - see Table 4-29 in [1], Table 4-29 in [2], Table 4-29 in [3] */ #define GAFR2_U_AF80(x) ((x) & ALT_FN_MASK) #if !defined(PXA2X0_NOPXA255) #define GAFR2_U_AF81(x) (((x) & ALT_FN_MASK) << 2) #define GAFR2_U_AF82(x) (((x) & ALT_FN_MASK) << 4) #define GAFR2_U_AF83(x) (((x) & ALT_FN_MASK) << 6) #define GAFR2_U_AF84(x) (((x) & ALT_FN_MASK) << 8) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define GAFR2_U_AF85(x) (((x) & ALT_FN_MASK) << 10) #define GAFR2_U_AF86(x) (((x) & ALT_FN_MASK) << 12) #define GAFR2_U_AF87(x) (((x) & ALT_FN_MASK) << 14) #define GAFR2_U_AF88(x) (((x) & ALT_FN_MASK) << 16) #define GAFR2_U_AF89(x) (((x) & ALT_FN_MASK) << 18) #endif /* PXA260 and above only */ #endif /* PXA2X0_GPIO_H */ openwince-include-0.3.2.orig/arm/pxa2x0/i2c.h0100644000175000017500000001062307652607242016253 0ustar p2p2/* * $Id: i2c.h,v 1.12 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 I2C Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_I2C_H #define PXA2X0_I2C_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* I2C Registers */ #define I2C_BASE 0x40300000 #if LANGUAGE == C typedef volatile struct I2C_registers { uint32_t __reserved1[1440]; uint32_t ibmr; uint32_t __reserved2; uint32_t idbr; uint32_t __reserved3; uint32_t icr; uint32_t __reserved4; uint32_t isr; uint32_t __reserved5; uint32_t isar; } I2C_registers_t; #ifdef PXA2X0_UNMAPPED #define I2C_pointer ((I2C_registers_t*) I2C_BASE) #endif #define IBMR I2C_pointer->ibmr #define IDBR I2C_pointer->idbr #define ICR I2C_pointer->icr #define ISR I2C_pointer->isr #define ISAR I2C_pointer->isar #endif /* LANGUAGE == C */ #define IBMR_OFFSET 0x1680 #define IDBR_OFFSET 0x1688 #define ICR_OFFSET 0x1690 #define ISR_OFFSET 0x1698 #define ISAR_OFFSET 0x16A0 /* IBMR bits - see Table 9-9 in [1], Table 9-9 in [2], Table 9-8 in [3] */ #define IBMR_SCLS bit(1) #define IBMR_SDAS bit(0) /* IDBR bits - see Table 9-10 in [1], Table 9-10 in [2], Table 9-9 in [3] */ #define IDBR_IDB_MASK bits(7,0) #define IDBR_IDB(x) bits_val(7,0,x) #define get_IDBR_IDB(x) bits_get(7,0,x) /* ICR bits - see Table 9-11 in [1], Table 9-11 in [2], Table 9-10 in [3] */ #define ICR_FM bit(15) #define ICR_UR bit(14) #define ICR_SADIE bit(13) #define ICR_ALDIE bit(12) #define ICR_SSDIE bit(11) #define ICR_BEIE bit(10) #define ICR_IRFIE bit(9) #define ICR_ITEIE bit(8) #define ICR_GCD bit(7) #define ICR_IUE bit(6) #define ICR_SCLE bit(5) #define ICR_MA bit(4) #define ICR_TB bit(3) #define ICR_ACKNAK bit(2) #define ICR_STOP bit(1) #define ICR_START bit(0) /* ISR bits - see Table 9-12 in [1], Table 9-12 in [2], Table 9-11 [3] */ #define ISR_BED bit(10) #define ISR_SAD bit(9) #define ISR_GCAD bit(8) #define ISR_IRF bit(7) #define ISR_ITE bit(6) #define ISR_ALD bit(5) #define ISR_SSD bit(4) #define ISR_IBB bit(3) #define ISR_UB bit(2) #define ISR_ACKNAK bit(1) #define ISR_RWM bit(0) /* ISAR bits - see Table 9-13 in [1], Table 9-13 in [2], Table 9-12 [3] */ #define ISAR_ISA_MASK bits(6,0) #define ISAR_ISA(x) bits_val(6,0,x) #define get_ISAR_ISA(x) bits_get(6,0,x) #endif /* PXA2X0_I2C_H */ openwince-include-0.3.2.orig/arm/pxa2x0/i2s.h0100644000175000017500000001231307652607242016271 0ustar p2p2/* * $Id: i2s.h,v 1.10 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 I2S Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_I2S_H #define PXA2X0_I2S_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* I2S Registers */ #define I2S_BASE 0x40400000 #if LANGUAGE == C typedef volatile struct I2S_registers { uint32_t sacr0; uint32_t sacr1; uint32_t __reserved1; uint32_t sasr0; uint32_t __reserved2; uint32_t saimr; uint32_t saicr; uint32_t __reserved3[17]; uint32_t sadiv; uint32_t __reserved4[7]; uint32_t sadr; } I2S_registers_t; #ifdef PXA2X0_UNMAPPED #define I2S_pointer ((I2S_registers_t*) I2S_BASE) #endif #define SACR0 I2S_pointer->sacr0 #define SACR1 I2S_pointer->sacr1 #define SASR0 I2S_pointer->sasr0 #define SAIMR I2S_pointer->saimr #define SAICR I2S_pointer->saicr #define SADIV I2S_pointer->sadiv #define SADR I2S_pointer->sadr #endif /* LANGUAGE == C */ #define SACR0_OFFSET 0x00 #define SACR1_OFFSET 0x04 #define SASR0_OFFSET 0x0C #define SAIMR_OFFSET 0x14 #define SAICR_OFFSET 0x18 #define SADIV_OFFSET 0x60 #define SADR_OFFSET 0x80 /* SACR0 bits - see Table 14-3 in [1], Table 14-3 in [2], Table 14-3 in [3] */ #define SACR0_RFTH_MASK bits(15,12) #define SACR0_RFTH(x) bits_val(15,12,x) #define get_SACR0_RFTH(x) bits_get(15,12,x) #define SACR0_TFTH_MASK bits(11,8) #define SACR0_TFTH(x) bits_val(11,8,x) #define get_SACR0_TFTH(x) bits_get(11,8,x) #define SACR0_STRF bit(5) #define SACR0_EFWR bit(4) #define SACR0_RST bit(3) #define SACR0_BCKD bit(2) #define SACR0_ENB bit(0) /* SACR1 bits - see Table 14-6 in [1], Table 14-6 in [2], Table 14-6 in [3] */ #define SACR1_ENLBF bit(5) #define SACR1_DRPL bit(4) #define SACR1_DREC bit(3) #define SACR1_AMSL bit(0) /* SASR0 bits - see Table 14-7 in [1], Table 14-7 in [2], Table 14-7 in [3] */ #define SASR0_RFL_MASK bits(15,12) #define SASR0_RFL(x) bits_val(15,12,x) #define get_SASR0_RFL(x) bits_get(15,12,x) #define SASR0_TFL_MASK bits(11,8) #define SASR0_TFL(x) bits_val(11,8,x) #define get_SASR0_TFL(x) bits_get(11,8,x) #define SASR0_ROR bit(6) #define SASR0_TUR bit(5) #define SASR0_RFS bit(4) #define SASR0_TFS bit(3) #define SASR0_BSY bit(2) #define SASR0_RNE bit(1) #define SASR0_TNF bit(0) /* SAIMR bits - see Table 14-10 in [1], Table 14-10 in [2], Table 14-10 in [3] */ #define SAIMR_ROR bit(6) #define SAIMR_TUR bit(5) #define SAIMR_RFS bit(4) #define SAIMR_TFS bit(3) /* SAICR bits - see Table 14-9 in [1], Table 14-9 in [2], Table 14-9 in [3] */ #define SAICR_ROR bit(6) #define SAICR_TUR bit(5) /* SADIV bits - see Table 14-8 in [1], Table 14-8 in [2], Table 14-8 in [3] */ #define SADIV_SADIV_MASK bits(6,0) #define SADIV_SADIV(x) bits_val(6,0,x) #define get_SADIV_SADIV(x) bits_get(6,0,x) /* SADR bits - see Table 14-11 in [1], Table 14-11 in [2], Table 14-11 in [3] */ #define SADR_DTH_MASK bits(31,16) #define SADR_DTH(x) bits_val(31,16,x) #define get_SADR_DTH(x) bits_get(31,16,x) #define SADR_DTL_MASK bits(15,0) #define SADR_DTL(x) bits_val(15,0,x) #define get_SADR_DTL(x) bits_get(15,0,x) #endif /* PXA2X0_I2S_H */ openwince-include-0.3.2.orig/arm/pxa2x0/ic.h0100644000175000017500000001201007652607242016161 0ustar p2p2/* * $Id: ic.h,v 1.9 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 Interrupt Control Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_IC_H #define PXA2X0_IC_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* Interrupt Control Registers */ #define IC_BASE 0x40D00000 #if LANGUAGE == C typedef volatile struct IC_registers { uint32_t icip; uint32_t icmr; uint32_t iclr; uint32_t icfp; uint32_t icpr; uint32_t iccr; } IC_registers_t; #ifdef PXA2X0_UNMAPPED #define IC_pointer ((IC_registers_t*) IC_BASE) #endif #define ICIP IC_pointer->icip #define ICMR IC_pointer->icmr #define ICLR IC_pointer->iclr #define ICFP IC_pointer->icfp #define ICPR IC_pointer->icpr #define ICCR IC_pointer->iccr #endif /* LANGUAGE == C */ #define ICIP_OFFSET 0x00 #define ICMR_OFFSET 0x04 #define ICLR_OFFSET 0x08 #define ICFP_OFFSET 0x0C #define ICPR_OFFSET 0x10 #define ICCR_OFFSET 0x14 /* IRQ bits */ #define IC_IRQ31 bit(31) #define IC_IRQ30 bit(30) #define IC_IRQ29 bit(29) #define IC_IRQ28 bit(28) #define IC_IRQ27 bit(27) #define IC_IRQ26 bit(26) #define IC_IRQ25 bit(25) #define IC_IRQ24 bit(24) #define IC_IRQ23 bit(23) #define IC_IRQ22 bit(22) #define IC_IRQ21 bit(21) #define IC_IRQ20 bit(20) #define IC_IRQ19 bit(19) #define IC_IRQ18 bit(18) #define IC_IRQ17 bit(17) #if !defined(PXA2X0_NOPXA255) #define IC_IRQ16 bit(16) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define IC_IRQ15 bit(15) #endif /* PXA260 and above only */ #define IC_IRQ14 bit(14) #define IC_IRQ13 bit(13) #define IC_IRQ12 bit(12) #define IC_IRQ11 bit(11) #define IC_IRQ10 bit(10) #define IC_IRQ9 bit(9) #define IC_IRQ8 bit(8) #if !defined(PXA2X0_NOPXA255) #define IC_IRQ7 bit(7) #endif /* PXA255 and above only */ /* symbolic names for IRQs - see Table 4-36 in [1], Table 4-36 in [2], Table 4-36 in [3] */ #define IC_IRQ_RTC_ALARM IC_IRQ31 #define IC_IRQ_RTC_HZ IC_IRQ30 #define IC_IRQ_OST3 IC_IRQ29 #define IC_IRQ_OST2 IC_IRQ28 #define IC_IRQ_OST1 IC_IRQ27 #define IC_IRQ_OST0 IC_IRQ26 #define IC_IRQ_DMA IC_IRQ25 #define IC_IRQ_SSP IC_IRQ24 #define IC_IRQ_MMC IC_IRQ23 #define IC_IRQ_FFUART IC_IRQ22 #define IC_IRQ_BTUART IC_IRQ21 #define IC_IRQ_STUART IC_IRQ20 #define IC_IRQ_ICP IC_IRQ19 #define IC_IRQ_I2C IC_IRQ18 #define IC_IRQ_LCD IC_IRQ17 #if !defined(PXA2X0_NOPXA255) #define IC_IRQ_NSSP IC_IRQ16 #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define IC_IRQ_ASSP IC_IRQ15 #endif /* PXA260 and above only */ #define IC_IRQ_AC97 IC_IRQ14 #define IC_IRQ_I2S IC_IRQ13 #define IC_IRQ_PMU IC_IRQ12 #define IC_IRQ_USB IC_IRQ11 #define IC_IRQ_GPIO IC_IRQ10 #define IC_IRQ_GPIO1 IC_IRQ9 #define IC_IRQ_GPIO0 IC_IRQ8 #if !defined(PXA2X0_NOPXA255) #define IC_IRQ_HWUART IC_IRQ7 #endif /* PXA255 and above only */ /* ICCR bits - see Table 4-33 in [1], Table 4-33 in [2], Table 4-32 in [3] */ #define ICCR_DIM bit(0) #endif /* PXA2X0_IC_H */ openwince-include-0.3.2.orig/arm/pxa2x0/icp.h0100644000175000017500000001074507652607242016356 0ustar p2p2/* * $Id: icp.h,v 1.10 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 ICP Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_ICP_H #define PXA2X0_ICP_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* ICP Registers */ #define ICP_BASE 0x40800000 #if LANGUAGE == C typedef volatile struct ICP_registers { uint32_t iccr0; uint32_t iccr1; uint32_t iccr2; uint32_t icdr; uint32_t __reserved; uint32_t icsr0; uint32_t icsr1; } ICP_registers_t; #ifdef PXA2X0_UNMAPPED #define ICP_pointer ((ICP_registers_t*) ICP_BASE) #endif #define ICCR0 ICP_pointer->iccr0 #define ICCR1 ICP_pointer->iccr1 #define ICCR2 ICP_pointer->iccr2 #define ICDR ICP_pointer->icdr #define ICSR0 ICP_pointer->icsr0 #define ICSR1 ICP_pointer->icsr1 #endif /* LANGUAGE == C */ #define ICCR0_OFFSET 0x00 #define ICCR1_OFFSET 0x04 #define ICCR2_OFFSET 0x08 #define ICDR_OFFSET 0x0C #define ICSR0_OFFSET 0x14 #define ICSR1_OFFSET 0x18 /* ICCR0 bits - see Table 11-2 in [1], Table 11-2 in [2], Table 11-2 in [3] */ #define ICCR0_AME bit(7) #define ICCR0_TIE bit(6) #define ICCR0_RIE bit(5) #define ICCR0_RXE bit(4) #define ICCR0_TXE bit(3) #define ICCR0_TUS bit(2) #define ICCR0_LBM bit(1) #define ICCR0_ITR bit(0) /* ICCR1 bits - see Table 11-3 in [1], Table 11-3 in [2], Table 11-3 in [3] */ #define ICCR1_AMV_MASK bits(7,0) #define ICCR1_AMV(x) bits_val(7,0,x) #define get_ICCR1_AMV(x) bits_get(7,0,x) /* ICCR2 bits - see Table 11-4 in [1], Table 11-4 in [2], Table 11-4 in [3] */ #define ICCR2_RXP bit(3) #define ICCR2_TXP bit(2) #define ICCR2_TRIG_MASK bits(1,0) #define ICCR2_TRIG(x) bits_val(1,0,x) #define get_ICCR2_TRIG(x) bits_get(1,0,x) /* ICDR bits - see Table 11-5 in [1], Table 11-5 in [2], Table 11-5 in [3] */ #define ICDR_DATA_MASK bits(7,0) #define ICDR_DATA(x) bits_val(7,0,x) #define get_ICDR_DATA(x) bits_get(7,0,x) /* ICSR0 bits - see Table 11-6 in [1], Table 11-6 in [2], Table 11-6 in [3] */ #define ICSR0_FRE bit(5) #define ICSR0_RFS bit(4) #define ICSR0_TFS bit(3) #define ICSR0_RAB bit(2) #define ICSR0_TUR bit(1) #define ICSR0_EIF bit(0) /* ICSR1 bits - see Table 11-7 in [1], Table 11-7 in [2], Table 11-7 in [3] */ #define ICSR1_ROR bit(6) #define ICSR1_CRE bit(5) #define ICSR1_EOF bit(4) #define ICSR1_TNF bit(3) #define ICSR1_RNE bit(2) #define ICSR1_TBY bit(1) #define ICSR1_RSY bit(0) #endif /* PXA2X0_ICP_H */ openwince-include-0.3.2.orig/arm/pxa2x0/lcd.h0100644000175000017500000002104107652607242016334 0ustar p2p2/* * $Id: lcd.h,v 1.11 2003/04/26 22:56:34 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 LCD Controller Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_LCD_H #define PXA2X0_LCD_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* LCD Controller Registers */ #define LCD_BASE 0x44000000 #if LANGUAGE == C typedef volatile struct LCD_registers { uint32_t lccr[4]; uint32_t __reserved1[4]; uint32_t fbr0; uint32_t fbr1; uint32_t __reserved2[4]; uint32_t lcsr; uint32_t liidr; uint32_t trgbr; uint32_t tcr; uint32_t __reserved3[110]; uint32_t fdadr0; uint32_t fsadr0; uint32_t fidr0; uint32_t ldcmd0; uint32_t fdadr1; uint32_t fsadr1; uint32_t fidr1; uint32_t ldcmd1; } LCD_registers_t; #ifdef PXA2X0_UNMAPPED #define LCD_pointer ((LCD_registers_t*) LCD_BASE) #endif #define LCCR(i) LCD_pointer->lccr[i] #define LCCR0 LCCR(0) #define LCCR1 LCCR(1) #define LCCR2 LCCR(2) #define LCCR3 LCCR(3) #define FDADR0 LCD_pointer->fdadr0 #define FSADR0 LCD_pointer->fsadr0 #define FIDR0 LCD_pointer->fidr0 #define LDCMD0 LCD_pointer->ldcmd0 #define FDADR1 LCD_pointer->fdadr1 #define FSADR1 LCD_pointer->fsadr1 #define FIDR1 LCD_pointer->fidr1 #define LDCMD1 LCD_pointer->ldcmd1 #define FBR0 LCD_pointer->fbr0 #define FBR1 LCD_pointer->fbr1 #define LCSR LCD_pointer->lcsr #define LIIDR LCD_pointer->liidr #define TRGBR LCD_pointer->trgbr #define TCR LCD_pointer->tcr #endif /* LANGUAGE == C */ #define LCCR0_OFFSET 0x000 #define LCCR1_OFFSET 0x004 #define LCCR2_OFFSET 0x008 #define LCCR3_OFFSET 0x00C #define FBR0_OFFSET 0x020 #define FBR1_OFFSET 0x024 #define LCSR_OFFSET 0x038 #define LIIDR_OFFSET 0x03C #define TRGBR_OFFSET 0x040 #define TCR_OFFSET 0x044 #define FDADR0_OFFSET 0x200 #define FSADR0_OFFSET 0x204 #define FIDR0_OFFSET 0x208 #define LDCMD0_OFFSET 0x20C #define FDADR1_OFFSET 0x210 #define FSADR1_OFFSET 0x214 #define FIDR1_OFFSET 0x218 #define LDCMD1_OFFSET 0x21C /* LCCR0 bits - see Table 7-2 in [1], Table 7-2 in [2], Table 7-3 in [3] */ #define LCCR0_OUM bit(21) #define LCCR0_BM bit(20) #define LCCR0_PDD_MASK bits(19,12) #define LCCR0_PDD(x) bits_val(19,12,x) #define get_LCCR0_PDD(x) bits_get(19,12,x) #define LCCR0_QDM bit(11) #define LCCR0_DIS bit(10) #define LCCR0_DPD bit(9) #define LCCR0_PAS bit(7) #define LCCR0_EFM bit(6) #define LCCR0_IUM bit(5) #define LCCR0_SFM bit(4) #define LCCR0_LDM bit(3) #define LCCR0_SDS bit(2) #define LCCR0_CMS bit(1) #define LCCR0_ENB bit(0) /* LCCR1 bits - see Table 7-5 in [1], Table 7-4 in [2], Table 7-4 in [3] */ #define LCCR1_BLW_MASK bits(31,24) #define LCCR1_BLW(x) bits_val(31,24,x) #define get_LCCR1_BLW(x) bits_get(31,24,x) #define LCCR1_ELW_MASK bits(23,16) #define LCCR1_ELW(x) bits_val(23,16,x) #define get_LCCR1_ELW(x) bits_get(23,16,x) #define LCCR1_HSW_MASK bits(15,10) #define LCCR1_HSW(x) bits_val(15,10,x) #define get_LCCR1_HSW(x) bits_get(15,10,x) #define LCCR1_PPL_MASK bits(9,0) #define LCCR1_PPL(x) bits_val(9,0,x) #define get_LCCR1_PPL(x) bits_get(9,0,x) /* LCCR2 bits - see Table 7-6 in [1], Table 7-5 in [2], Table 7-5 in [3] */ #define LCCR2_BFW_MASK bits(31,24) #define LCCR2_BFW(x) bits_val(31,24,x) #define get_LCCR2_BFW(x) bits_get(31,24,x) #define LCCR2_EFW_MASK bits(23,16) #define LCCR2_EFW(x) bits_val(23,16,x) #define get_LCCR2_EFW(x) bits_get(23,16,x) #define LCCR2_VSW_MASK bits(15,10) #define LCCR2_VSW(x) bits_val(15,10,x) #define get_LCCR2_VSW(x) bits_get(15,10,x) #define LCCR2_LPP_MASK bits(9,0) #define LCCR2_LPP(x) bits_val(9,0,x) #define get_LCCR2_LPP(x) bits_get(9,0,x) /* LCCR3 bits - see Table 7-7 in [1], Table 7-6 in [2], Table 7-6 in [3] */ #define LCCR3_DPC bit(27) #define LCCR3_BPP_MASK bits(26,24) #define LCCR3_BPP(x) bits_val(26,24,x) #define get_LCCR3_BPP(x) bits_get(26,24,x) #define LCCR3_OEP bit(23) #define LCCR3_PCP bit(22) #define LCCR3_HSP bit(21) #define LCCR3_VSP bit(20) #define LCCR3_API_MASK bits(19,16) #define LCCR3_API(x) bits_val(19,16,x) #define get_LCCR3_API(x) bits_get(19,16,x) #define LCCR3_ACB_MASK bits(15,8) #define LCCR3_ACB(x) bits_val(15,8,x) #define get_LCCR3_ACB(x) bits_get(15,8,x) #define LCCR3_PCD_MASK bits(7,0) #define LCCR3_PCD(x) bits_val(7,0,x) #define get_LCCR3_PCD(x) bits_get(7,0,x) /* FBR0 bits - see Table 7-12 in [1], Table 7-11 in [2], Table 7-11 in [3] */ #define FBR0_BINT bit(1) #define FBR0_BRA bit(0) /* FBR1 bits - see Table 7-12 in [1], Table 7-11 in [2], Table 7-11 in [3] */ #define FBR1_BINT bit(1) #define FBR1_BRA bit(0) /* LCSR bits - see Table 7-13 in [1], Table 7-12 in [2], Table 7-12 in [3] */ #define LCSR_SINT bit(10) #define LCSR_BS bit(9) #define LCSR_EOF bit(8) #define LCSR_QD bit(7) #define LCSR_OU bit(6) #define LCSR_IUU bit(5) #define LCSR_IUL bit(4) #define LCSR_ABC bit(3) #define LCSR_BER bit(2) #define LCSR_SOF bit(1) #define LCSR_LDD bit(0) /* LIIDR bits - see Table 7-14 in [1], Table 7-13 in [2], Table 7-13 in [3] */ #define LIIDR_IFRAMEID_MASK bits(31,3) #define LIIDR_IFRAMEID(x) bits_val(31,3,x) #define get_LIIDR_IFRAMEID(x) bits_get(31,3,x) /* TRGBR bits - see Table 7-15 in [1], Table 7-14 in [2], Table 7-14 in [3] */ #define TRGBR_TBS_MASK bits(23,16) #define TRGBR_TBS(x) bits_val(23,16,x) #define get_TRGBR_TBS(x) bits_get(23,16,x) #define TRGBR_TGS_MASK bits(15,8) #define TRGBR_TGS(x) bits_val(15,8,x) #define get_TRGBR_TGS(x) bits_get(15,8,x) #define TRGBR_TRS_MASK bits(7,0) #define TRGBR_TRS(x) bits_val(7,0,x) #define get_TRGBR_TRS(x) bits_vat(7,0,x) /* TCR bits - see Table 7-16 in [1], Table 7-15 in [2], Table 7-15 in [3] */ #define TCR_TED bit(14) #define TCR_THBS_MASK bits(11,8) #define TCR_THBS(x) bits_val(11,8,x) #define get_TCR_THBS(x) bits_get(11,8,x) #define TCR_TVBS_MASK bits(7,4) #define TCR_TVBS(x) bits_val(7,4,x) #define get_TCR_TVBS(x) bits_get(7,4,x) #define TCR_FNAME bit(3) #define TCR_COAE bit(2) #define TCR_FNAM bit(1) #define TCR_COAM bit(0) /* LDCMD0 bits - see Table 7-11 in [1], Table 7-10 in [2], Table 7-10 in [3] */ #define LDCMD0_PAL bit(26) #define LDCMD0_SOFINT bit(22) #define LDCMD0_EOFINT bit(21) #define LDCMD0_LEN_MASK bits(20,0) #define LDCMD0_LEN(x) bits_val(20,0,x) #define get_LDCMD0_LEN(x) bits_get(20,0,x) /* LDCMD1 bits - see Table 7-11 in [1], Table 7-10 in [2], Table 7-10 in [3] */ #define LDCMD1_PAL bit(26) #define LDCMD1_SOFINT bit(22) #define LDCMD1_EOFINT bit(21) #define LDCMD1_LEN_MASK bits(20,0) #define LDCMD1_LEN(x) bits_val(20,0,x) #define get_LDCMD1_LEN(x) bits_get(20,0,x) #endif /* PXA2X0_LCD_H */ openwince-include-0.3.2.orig/arm/pxa2x0/mc.h0100644000175000017500000003541607652607244016206 0ustar p2p2/* * $Id: mc.h,v 1.14 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 Memory Controller Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Specification Update", February 2003, Order Number: 278534-012 * [3] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [4] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_MC_H #define PXA2X0_MC_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* Memory Controller Registers */ #define MC_BASE 0x48000000 #if LANGUAGE == C typedef volatile struct MC_registers { uint32_t mdcnfg; uint32_t mdrefr; uint32_t msc0; uint32_t msc1; uint32_t msc2; uint32_t mecr; uint32_t __reserved1; uint32_t sxcnfg; uint32_t __reserved2; uint32_t sxmrs; uint32_t mcmem0; uint32_t mcmem1; uint32_t mcatt0; uint32_t mcatt1; uint32_t mcio0; uint32_t mcio1; uint32_t mdmrs; uint32_t boot_def; #if !defined(PXA2X0_NOPXA255) uint32_t __reserved3[4]; uint32_t mdmrslp; #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) uint32_t __reserved4[2]; uint32_t sa1111cr; #endif /* PXA260 and above only */ } MC_registers_t; #ifdef PXA2X0_UNMAPPED #define MC_pointer ((MC_registers_t*) MC_BASE) #endif #define MDCNFG MC_pointer->mdcnfg #define MDREFR MC_pointer->mdrefr #define MSC0 MC_pointer->msc0 #define MSC1 MC_pointer->msc1 #define MSC2 MC_pointer->msc2 #define MECR MC_pointer->mecr #define SXCNFG MC_pointer->sxcnfg #define SXMRS MC_pointer->sxmrs #define MCMEM0 MC_pointer->mcmem0 #define MCMEM1 MC_pointer->mcmem1 #define MCATT0 MC_pointer->mcatt0 #define MCATT1 MC_pointer->mcatt1 #define MCIO0 MC_pointer->mcio0 #define MCIO1 MC_pointer->mcio1 #define MDMRS MC_pointer->mdmrs #define BOOT_DEF MC_pointer->boot_def #if !defined(PXA2X0_NOPXA255) #define MDMRSLP MC_pointer->mdmrslp #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define SA1111CR MC_pointer->sa1111cr #endif /* PXA260 and above only */ #endif /* LANGUAGE == C */ #define MDCNFG_OFFSET 0x00 #define MDREFR_OFFSET 0x04 #define MSC0_OFFSET 0x08 #define MSC1_OFFSET 0x0C #define MSC2_OFFSET 0x10 #define MECR_OFFSET 0x14 #define SXCNFG_OFFSET 0x1C #define SXMRS_OFFSET 0x24 #define MCMEM0_OFFSET 0x28 #define MCMEM1_OFFSET 0x2C #define MCATT0_OFFSET 0x30 #define MCATT1_OFFSET 0x34 #define MCIO0_OFFSET 0x38 #define MCIO1_OFFSET 0x3C #define MDMRS_OFFSET 0x40 #define BOOT_DEF_OFFSET 0x44 #if !defined(PXA2X0_NOPXA255) #define MDMRSLP_OFFSET 0x58 #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define SA1111CR_OFFSET 0x64 #endif /* PXA260 and above only */ /* MDCNFG bits - see Table 6-3 in [1] and D25 in [2], Table 6-3 in [3], Table 6-2 in [4] */ #define MDCNFG_DSA1111_2 bit(28) #define MDCNFG_DLATCH2 bit(27) #define MDCNFG_DTC2_MASK bits(25,24) #define MDCNFG_DTC2(x) bits_val(25,24,x) #define get_MDCNFG_DTC2(x) bits_get(25,24,x) #define MDCNFG_DNB2 bit(23) #define MDCNFG_DRAC2_MASK bits(22,21) #define MDCNFG_DRAC2(x) bits_val(22,21,x) #define get_MDCNFG_DRAC2(x) bits_get(22,21,x) #define MDCNFG_DCAC2_MASK bits(20,19) #define MDCNFG_DCAC2(x) bits_val(20,19,x) #define get_MDCNFG_DCAC2(x) bits_get(20,19,x) #define MDCNFG_DWID2 bit(18) #define MDCNFG_DE3 bit(17) #define MDCNFG_DE2 bit(16) #define MDCNFG_DSA1111_0 bit(12) #define MDCNFG_DLATCH0 bit(11) #define MDCNFG_DTC0_MASK bits(9,8) #define MDCNFG_DTC0(x) bits_val(9,8,x) #define get_MDCNFG_DTC0(x) bits_get(9,8,x) #define MDCNFG_DNB0 bit(7) #define MDCNFG_DRAC0_MASK bits(6,5) #define MDCNFG_DRAC0(x) bits_val(6,5,x) #define get_MDCNFG_DRAC0(x) bits_get(6,5,x) #define MDCNFG_DCAC0_MASK bits(4,3) #define MDCNFG_DCAC0(x) bits_val(4,3,x) #define get_MDCNFG_DCAC0(x) bits_get(4,3,x) #define MDCNFG_DWID0 bit(2) #define MDCNFG_DE1 bit(1) #define MDCNFG_DE0 bit(0) /* MDREFR bits - see Table 6-5 in [1], Table 6-6 in [3], Table 6-5 in [4] */ #define MDREFR_K2FREE bit(25) #define MDREFR_K1FREE bit(24) #define MDREFR_K0FREE bit(23) #define MDREFR_SLFRSH bit(22) #define MDREFR_APD bit(20) #define MDREFR_K2DB2 bit(19) #define MDREFR_K2RUN bit(18) #define MDREFR_K1DB2 bit(17) #define MDREFR_K1RUN bit(16) #define MDREFR_E1PIN bit(15) #define MDREFR_K0DB2 bit(14) #define MDREFR_K0RUN bit(13) #define MDREFR_E0PIN bit(12) #define MDREFR_DRI_MASK bits(11,0) #define MDREFR_DRI(x) bits_val(11,0,x) #define get_MDREFR_DRI(x) bits_get(11,0,x) /* MSC0 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */ #define MSC0_RBUFF1 bit(31) #define MSC0_RRR1_MASK bits(30,28) #define MSC0_RRR1(x) bits_val(30,28,x) #define get_MSC0_RRR1(x) bits_get(30,28,x) #define MSC0_RDN1_MASK bits(27,24) #define MSC0_RDN1(x) bits_val(27,24,x) #define get_MSC0_RDN1(x) bits_get(27,24,x) #define MSC0_RDF1_MASK bits(23,20) #define MSC0_RDF1(x) bits_val(23,20,x) #define get_MSC0_RDF1(x) bits_get(23,20,x) #define MSC0_RBW1 bit(19) #define MSC0_RT1_MASK bits(18,16) #define MSC0_RT1(x) bits_val(18,16,x) #define get_MSC0_RT1(x) bits_get(18,16,x) #define MSC0_RBUFF0 bit(15) #define MSC0_RRR0_MASK bits(14,12) #define MSC0_RRR0(x) bits_val(14,12,x) #define get_MSC0_RRR0(x) bits_get(14,12,x) #define MSC0_RDN0_MASK bits(11,9) #define MSC0_RDN0(x) bits_val(11,8,x) #define get_MSC0_RDN0(x) bits_get(11,8,x) #define MSC0_RDF0_MASK bits(7,4) #define MSC0_RDF0(x) bits_val(7,4,x) #define get_MSC0_RDF0(x) bits_get(7,4,x) #define MSC0_RBW0 bit(3) #define MSC0_RT0_MASK bits(2,0) #define MSC0_RT0(x) bits_val(2,0,x) #define get_MSC0_RT0(x) bits_get(2,0,x) /* MSC1 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */ #define MSC1_RBUFF3 bit(31) #define MSC1_RRR3_MASK bits(30,28) #define MSC1_RRR3(x) bits_val(30,28,x) #define get_MSC1_RRR3(x) bits_get(30,28,x) #define MSC1_RDN3_MASK bits(27,24) #define MSC1_RDN3(x) bits_val(27,24,x) #define get_MSC1_RDN3(x) bits_get(27,24,x) #define MSC1_RDF3_MASK bits(23,20) #define MSC1_RDF3(x) bits_val(23,20,x) #define get_MSC1_RDF3(x) bits_get(23,20,x) #define MSC1_RBW3 bit(19) #define MSC1_RT3_MASK bits(18,16) #define MSC1_RT3(x) bits_val(18,16,x) #define get_MSC1_RT3(x) bits_get(18,16,x) #define MSC1_RBUFF2 bit(15) #define MSC1_RRR2_MASK bits(14,12) #define MSC1_RRR2(x) bits_val(14,12,x) #define get_MSC1_RRR2(x) bits_get(14,12,x) #define MSC1_RDN2_MASK bits(11,9) #define MSC1_RDN2(x) bits_val(11,8,x) #define get_MSC1_RDN2(x) bits_get(11,8,x) #define MSC1_RDF2_MASK bits(7,4) #define MSC1_RDF2(x) bits_val(7,4,x) #define get_MSC1_RDF2(x) bits_get(7,4,x) #define MSC1_RBW2 bit(3) #define MSC1_RT2_MASK bits(2,0) #define MSC1_RT2(x) bits_val(2,0,x) #define get_MSC1_RT2(x) bits_get(2,0,x) /* MSC2 bits - see Table 6-21 in [1], Table 6-25 in [3], Table 6-21 in [4] */ #define MSC2_RBUFF5 bit(31) #define MSC2_RRR5_MASK bits(30,28) #define MSC2_RRR5(x) bits_val(30,28,x) #define get_MSC2_RRR5(x) bits_get(30,28,x) #define MSC2_RDN5_MASK bits(27,24) #define MSC2_RDN5(x) bits_val(27,24,x) #define get_MSC2_RDN5(x) bits_get(27,24,x) #define MSC2_RDF5_MASK bits(23,20) #define MSC2_RDF5(x) bits_val(23,20,x) #define get_MSC2_RDF5(x) bits_get(23,20,x) #define MSC2_RBW5 bit(19) #define MSC2_RT5_MASK bits(18,16) #define MSC2_RT5(x) bits_val(18,16,x) #define get_MSC2_RT5(x) bits_get(18,16,x) #define MSC2_RBUFF4 bit(15) #define MSC2_RRR4_MASK bits(14,12) #define MSC2_RRR4(x) bits_val(14,12,x) #define get_MSC2_RRR4(x) bits_get(14,12,x) #define MSC2_RDN4_MASK bits(11,9) #define MSC2_RDN4(x) bits_val(11,8,x) #define get_MSC2_RDN4(x) bits_get(11,8,x) #define MSC2_RDF4_MASK bits(7,4) #define MSC2_RDF4(x) bits_val(7,4,x) #define get_MSC2_RDF4(x) bits_get(7,4,x) #define MSC2_RBW4 bit(3) #define MSC2_RT4_MASK bits(2,0) #define MSC2_RT4(x) bits_val(2,0,x) #define get_MSC2_RT4(x) bits_get(2,0,x) /* MECR bits - see Table 6-27 in [1], Table 6-31 in [3], Table 6-27 in [4] */ #define MECR_CIT bit(1) #define MECR_NOS bit(0) /* SXCNFG bits - see Table 6-13 in [1], Table 6-14 in [3], Table 6-13 in [4] */ #define SXCNFG_SXLATCH2 bit(30) #define SXCNFG_SXTP2_MASK bits(29,28) #define SXCNFG_SXTP2(x) bits_val(29,28,x) #define get_SXCNFG_SXTP2(x) bits_get(29,28,x) #define SXCNFG_SXCA2_MASK bits(27,26) #define SXCNFG_SXCA2(x) bits_val(27,26,x) #define get_SXCNFG_SXCA2(x) bits_get(27,26,x) #define SXCNFG_SXRA2_MASK bits(25,24) #define SXCNFG_SXRA2(x) bits_val(25,24,x) #define get_SXCNFG_SXRA2(x) bits_get(25,24,x) #define SXCNFG_SXRL2_MASK bits(23,21) #define SXCNFG_SXRL2(x) bits(23,21,x) #define SXCNFG_SXCL2_MASK bits(20,18) #define SXCNFG_SXCL2(x) bits_val(20,18,x) #define get_SXCNFG_SXCL2(x) bits_get(20,18,x) #define SXCNFG_SXEN2_MASK bits(17,16) #define SXCNFG_SXEN2(x) bits_val(17,16,x) #define get_SXCNFG_SXEN2(x) bits_get(17,16,x) #define SXCNFG_SXLATCH0 bit(14) #define SXCNFG_SXTP0_MASK bits(13,12) #define SXCNFG_SXTP0(x) bits_val(13,12,x) #define get_SXCNFG_SXTP0(x) bits_get(13,12,x) #define SXCNFG_SXCA0_MASK bits(11,10) #define SXCNFG_SXCA0(x) bits_val(11,10,x) #define get_SXCNFG_SXCA0(x) bits_get(11,10,x) #define SXCNFG_SXRA0_MASK bits(9,8) #define SXCNFG_SXRA0(x) bits_val(9,8,x) #define get_SXCNFG_SXRA0(x) bits_get(9,8,x) #define SXCNFG_SXRL0_MASK bits(7,5) #define SXCNFG_SXRL0(x) bits(7,5,x) #define SXCNFG_SXCL0_MASK bits(4,2) #define SXCNFG_SXCL0(x) bits_val(4,2,x) #define get_SXCNFG_SXCL0(x) bits_get(4,2,x) #define SXCNFG_SXEN0_MASK bits(1,0) #define SXCNFG_SXEN0(x) bits_val(1,0,x) #define get_SXCNFG_SXEN0(x) bits_get(1,0,x) /* SXMRS bits - see Table 6-16 in [1], Table 6-17 in [3], Table 6-16 in [4] */ #define SXMRS_SXMRS2_MASK bits(30,16) #define SXMRS_SXMRS2(x) bits_val(30,16,x) #define get_SXMRS_SXMRS2(x) bits_get(30,16,x) #define SXMRS_SXMRS0_MASK bits(14,0) #define SXMRS_SXMRS0(x) bits_val(14,0,x) #define get_SXMRS_SXMRS0(x) bits_get(14,0,x) /* MCMEMx bits - see Table 6-23 in [1], Table 6-27 in [3], Table 6-23 in [4] */ #define MCMEM_HOLD_MASK bits(19,14) #define MCMEM_HOLD(x) bits_val(19,14,x) #define get_MCMEM_HOLD(x) bits_get(19,14,x) #define MCMEM_ASST_MASK bits(11,7) #define MCMEM_ASST(x) bits_val(11,7,x) #define get_MCMEM_ASST(x) bits_get(11,7,x) #define MCMEM_SET_MASK bits(6,0) #define MCMEM_SET(x) bits_val(6,0,x) #define get_MCMEM_SET(x) bits_get(6,0,x) /* MCATTx bits - see Table 6-24 in [1], Table 6-28 in [3], Table 6-24 in [4] */ #define MCATT_HOLD_MASK bits(19,14) #define MCATT_HOLD(x) bits_val(19,14,x) #define get_MCATT_HOLD(x) bits_get(19,14,x) #define MCATT_ASST_MASK bits(11,7) #define MCATT_ASST(x) bits_val(11,7,x) #define get_MCATT_ASST(x) bits_get(11,7,x) #define MCATT_SET_MASK bits(6,0) #define MCATT_SET(x) bits_val(6,0,x) #define get_MCATT_SET(x) bits_get(6,0,x) /* MCIOx bits - see Table 6-25 in [1], Table 6-29 in [3], Table 6-25 in [4] */ #define MCIO_HOLD_MASK bits(19,14) #define MCIO_HOLD(x) bits_val(19,14,x) #define get_MCIO_HOLD(x) bits_get(19,14,x) #define MCIO_ASST_MASK bits(11,7) #define MCIO_ASST(x) bits_val(11,7,x) #define get_MCIO_ASST(x) bits_get(11,7,x) #define MCIO_SET_MASK bits(6,0) #define MCIO_SET(x) bits_val(6,0,x) #define get_MCIO_SET(x) bits_get(6,0,x) /* MDMRS bits - see Table 6-4 in [1], Table 6-4 in [3], Table 6-3 in [4] */ #define MDMRS_MDMRS2_MASK bits(30,23) #define MDMRS_MDMRS2(x) bits_val(30,23,x) #define get_MDMRS_MDMRS2(x) bits_get(30,23,x) #define MDMRS_MDCL2_MASK bits(22,20) #define MDMRS_MDCL2(x) bits_val(22,20,x) #define get_MDMRS_MDCL2(x) bits_get(22,20,x) #define MDMRS_MDADD2 bit(19) #define MDMRS_MDBL2_MASK bits(18,16) #define MDMRS_MDBL2(x) bits_val(18,16,x) #define get_MDMRS_MDBL2(x) bits_get(18,16,x) #define MDMRS_MDMRS0_MASK bits(14,7) #define MDMRS_MDMRS0(x) bits_val(14,7,x) #define get_MDMRS_MDMRS0(x) bits_get(14,7,x) #define MDMRS_MDCL0_MASK bits(6,4) #define MDMRS_MDCL0(x) bits_val(6,4,x) #define get_MDMRS_MDCL0(x) bits_get(6,4,x) #define MDMRS_MDADD0 bit(3) #define MDMRS_MDBL0_MASK bits(2,0) #define MDMRS_MDBL0(x) bits_val(2,0,x) #define get_MDMRS_MDBL0(x) bits_get(2,0,x) /* BOOT_DEF bits - see Table 6-37 in [1], Table 6-40 in [3], Table 6-37 in [4] */ #define BOOT_DEF_PKG_TYPE bit(3) #define BOOT_DEF_BOOT_SEL_MASK bits(2,0) #define BOOT_DEF_BOOT_SEL(x) bits_val(2,0,x) #define get_BOOT_DEF_BOOT_SEL(x) bits_get(2,0,x) #if !defined(PXA2X0_NOPXA255) /* MDMRSLP bits - see Table 6-5 in [3], Table 6-4 in [4] */ #define MDMRSLP_MDLPEN2 bit(31) #define MDMRSLP_MDMRSLP2_MASK bits(30,16) #define MDMRSLP_MDMRSLP2(x) bits_val(30,16,x) #define get_MDMRSLP_MDMRSLP2(x) bits_get(30,16,x) #define MDMRSLP_MDLPEN0 bit(15) #define MDMRSLP_MDMRSLP0_MASK bits(14,0) #define MDMRSLP_MDMRSLP0(x) bits_val(14,0,x) #define get_MDMRSLP_MDMRSLP0(x) bits_get(14,0,x) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* SA1111CR bits - see Table 6-24 in [3] */ #define SA1111CR_SA1111_5 bit(5) #define SA1111CR_SA1111_4 bit(4) #define SA1111CR_SA1111_3 bit(3) #define SA1111CR_SA1111_2 bit(2) #define SA1111CR_SA1111_1 bit(1) #define SA1111CR_SA1111_0 bit(0) #endif /* PXA260 and above only */ #endif /* PXA2X0_MC_H */ openwince-include-0.3.2.orig/arm/pxa2x0/mmc.h0100644000175000017500000002577307652607244016370 0ustar p2p2/* * $Id: mmc.h,v 1.10 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 MMC Controller Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_MMC_H #define PXA2X0_MMC_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* MMC Controller Registers */ #define MMC_BASE 0x41100000 #if LANGUAGE == C typedef volatile struct MMC_registers { uint32_t mmc_strpcl; uint32_t mmc_stat; uint32_t mmc_clkrt; uint32_t mmc_spi; uint32_t mmc_cmdat; uint32_t mmc_resto; uint32_t mmc_rdto; uint32_t mmc_blklen; uint32_t mmc_nob; uint32_t mmc_prtbuf; uint32_t mmc_i_mask; uint32_t mmc_i_reg; uint32_t mmc_cmd; uint32_t mmc_argh; uint32_t mmc_argl; uint32_t mmc_res; uint32_t mmc_rxfifo; uint32_t mmc_txfifo; } MMC_registers_t; #ifdef PXA2X0_UNMAPPED #define MMC_pointer ((MMC_registers_t*) MMC_BASE) #endif #define MMC_STRPCL MMC_pointer->mmc_strpcl #define MMC_STAT MMC_pointer->mmc_stat #define MMC_CLKRT MMC_pointer->mmc_clkrt #define MMC_SPI MMC_pointer->mmc_spi #define MMC_CMDAT MMC_pointer->mmc_cmdat #define MMC_RESTO MMC_pointer->mmc_resto #define MMC_RDTO MMC_pointer->mmc_rdto #define MMC_BLKLEN MMC_pointer->mmc_blklen #define MMC_NOB MMC_pointer->mmc_nob #define MMC_PRTBUF MMC_pointer->mmc_prtbuf #define MMC_I_MASK MMC_pointer->mmc_i_mask #define MMC_I_REG MMC_pointer->mmc_i_reg #define MMC_CMD MMC_pointer->mmc_cmd #define MMC_ARGH MMC_pointer->mmc_argh #define MMC_ARGL MMC_pointer->mmc_argl #define MMC_RES MMC_pointer->mmc_res #define MMC_RXFIFO MMC_pointer->mmc_rxfifo #define MMC_TXFIFO MMC_pointer->mmc_txfifo #endif /* LANGUAGE == C */ #define MMC_STRPCL_OFFSET 0x00 #define MMC_STAT_OFFSET 0x04 #define MMC_CLKRT_OFFSET 0x08 #define MMC_SPI_OFFSET 0x0C #define MMC_CMDAT_OFFSET 0x10 #define MMC_RESTO_OFFSET 0x14 #define MMC_RDTO_OFFSET 0x18 #define MMC_BLKLEN_OFFSET 0x1C #define MMC_NOB_OFFSET 0x20 #define MMC_PRTBUF_OFFSET 0x24 #define MMC_I_MASK_OFFSET 0x28 #define MMC_I_REG_OFFSET 0x2C #define MMC_CMD_OFFSET 0x30 #define MMC_ARGH_OFFSET 0x34 #define MMC_ARGL_OFFSET 0x38 #define MMC_RES_OFFSET 0x3C #define MMC_RXFIFO_OFFSET 0x40 #define MMC_TXFIFO_OFFSET 0x44 /* MMC_STRPCL bits - see Table 15-6 in [1], Table 15-6 in [2], Table 15-5 in [3] */ #define MMC_STRPCL_STRPCL_MASK bits(1,0) #define MMC_STRPCL_STRPCL(x) bits_val(1,0,x) #define get_MMC_STRPCL_STRPCL(x) bits_get(1,0,x) /* MMC_STAT bits - see Table 15-7 in [1], Table 15-7 in [2], Table 15-6 in [3] */ #define MMC_STAT_END_CMD_RES bit(13) #define MMC_STAT_PRG_DONE bit(12) #define MMC_STAT_DATA_TRAN_DONE bit(11) #define MMC_STAT_CLK_EN bit(8) #define MMC_STAT_RECV_FIFO_FULL bit(7) #define MMC_STAT_XMIT_FIFO_EMPTY bit(6) #define MMC_STAT_RES_CRC_ERR bit(5) #define MMC_STAT_SPI_READ_ERROR_TOKEN bit(4) #define MMC_STAT_CRC_READ_ERROR bit(3) #define MMC_STAT_CRC_WRITE_ERROR bit(2) #define MMC_STAT_TIME_OUT_RESPONSE bit(1) #define MMC_STAT_READ_TIME_OUT bit(0) /* MMC_CLKRT bits - see Table 15-8 in [1], Table 15-8 in [2], Table 15-7 in [3] */ #define MMC_CLKRT_CLK_RATE_MASK bits(2,0) #define MMC_CLKRT_CLK_RATE(x) bits_val(2,0,x) #define get_MMC_CLKRT_CLK_RATE(x) bits_get(2,0,x) /* MMC_SPI bits - see Table 15-9 in [1], Table 15-9 in [2], Table 15-8 in [3] */ #define MMC_SPI_SPI_CS_ADDRESS bit(3) #define MMC_SPI_SPI_CS_EN bit(2) #define MMC_SPI_CRC_ON bit(1) #define MMC_SPI_SPI_EN bit(0) /* MMC_CMDAT bits - see Table 15-10 in [1], Table 15-10 in [2], Table 15-9 in [3] */ #define MMC_CMDAT_MMC_DMA_EN bit(7) #define MMC_CMDAT_INIT bit(6) #define MMC_CMDAT_BUSY bit(5) #define MMC_CMDAT_STREAM_BLOCK bit(4) #define MMC_CMDAT_WRITE_READ bit(3) #define MMC_CMDAT_DATA_EN bit(2) #define MMC_CMDAT_RESPONSE_FORMAT_MASK bits(1,0) #define MMC_CMDAT_RESPONSE_FORMAT(x) bits_val(1,0,x) #define get_MMC_CMDAT_RESPONSE_FORMAT(x) bits_get(1,0,x) /* MMC_RESTO bits - see Table 15-11 in [1], Table 15-11 in [2], Table 15-10 in [3] */ #define MMC_RESTO_RES_TO_MASK bits(6,0) #define MMC_RESTO_RES_TO(x) bits_val(6,0,x) #define get_MMC_RESTO_RES_TO(x) bits_get(6,0,x) /* MMC_RDTO bits - see Table 15-12 in [1], Table 15-12 in [2], Table 15-11 in [3] */ #define MMC_RDTO_READ_TO_MASK bits(15,0) #define MMC_RDTO_READ_TO(x) bits_val(15,0,x) #define get_MMC_RDTO_READ_TO(x) bits_get(15,0,x) /* MMC_BLKLEN bits - see Table 15-13 in [1], Table 15-13 in [2], Table 15-12 in [3] */ #define MMC_BLKLEN_BLK_LEN_MASK bits(9,0) #define MMC_BLKLEN_BLK_LEN(x) bits_val(9,0,x) #define get_MMC_BLKLEN_BLK_LEN(x) bits_get(9,0,x) /* MMC_NOB bits - see Table 15-14 in [1], Table 15-14 in [2], Table 15-13 in [3] */ #define MMC_NOB_MMC_NOB_MASK bits(15,0) #define MMC_NOB_MMC_NOB(x) bits_val(15,0,x) #define get_MMC_NOB_MMC_NOB(x) bits_get(15,0,x) /* MMC_PRTBUF bits - see Table 15-15 in [1], Table 15-15 in [2], Table 15-14 in [3] */ #define MMC_PRTBUF_BUF_PART_FULL bit(0) /* MMC_I_MASK bits - see Table 15-16 in [1], Table 15-16 in [2], Table 15-15 in [3] */ #define MMC_I_MASK_TXFIFO_WR_REQ bit(6) #define MMC_I_MASK_RXFIFO_RD_REQ bit(5) #define MMC_I_MASK_CLK_IS_OFF bit(4) #define MMC_I_MASK_STOP_CMD bit(3) #define MMC_I_MASK_END_CMD_RES bit(2) #define MMC_I_MASK_PRG_DONE bit(1) #define MMC_I_MASK_DATA_TRAN_DONE bit(0) /* MMC_I_REG bits - see Table 15-17 in [1], Table 15-17 in [2], Table 15-16 in [3] */ #define MMC_I_REG_TXFIFO_WR_REQ bit(6) #define MMC_I_REG_RXFIFO_RD_REQ bit(5) #define MMC_I_REG_CLK_IS_OFF bit(4) #define MMC_I_REG_STOP_CMD bit(3) #define MMC_I_REG_END_CMD_RES bit(2) #define MMC_I_REG_PRG_DONE bit(1) #define MMC_I_REG_DATA_TRAN_DONE bit(0) /* MMC_CMD bits - see Table 15-18 in [1], Table 15-18 in [2], Table 15-17 in [3] */ #define MMC_CMD_CMD_INDEX_MASK bits(5,0) #define MMC_CMD_CMD_INDEX(x) bits_val(5,0,x) #define get_MMC_CMD_CMD_INDEX(x) bits_get(5,0,x) /* MMC commands (for MMC_CMD) - see Table 15-19 in [1], Table 15-19 in [2], Table 15-18 in [3] */ #define MMC_CMD_GO_IDLE_STATE MMC_CMD_CMD_INDEX(0) #define MMC_CMD_SEND_OP_COND MMC_CMD_CMD_INDEX(1) #define MMC_CMD_ALL_SEND_CID MMC_CMD_CMD_INDEX(2) #define MMC_CMD_SET_RELATIVE_ADDR MMC_CMD_CMD_INDEX(3) #define MMC_CMD_SET_DSR MMC_CMD_CMD_INDEX(4) #define MMC_CMD_SELECT_DESELECT_CARD MMC_CMD_CMD_INDEX(7) #define MMC_CMD_SEND_CSD MMC_CMD_CMD_INDEX(9) #define MMC_CMD_SEND_CID MMC_CMD_CMD_INDEX(10) #define MMC_CMD_READ_DAT_UNTIL_STOP MMC_CMD_CMD_INDEX(11) #define MMC_CMD_STOP_TRANSMISSION MMC_CMD_CMD_INDEX(12) #define MMC_CMD_SEND_STATUS MMC_CMD_CMD_INDEX(13) #define MMC_CMD_GO_INACTIVE_STATE MMC_CMD_CMD_INDEX(15) #define MMC_CMD_SET_BLOCKLEN MMC_CMD_CMD_INDEX(16) #define MMC_CMD_READ_SINGLE_BLOCK MMC_CMD_CMD_INDEX(17) #define MMC_CMD_READ_MULTIPLE_BLOCK MMC_CMD_CMD_INDEX(18) #define MMC_CMD_WRITE_DAT_UNTIL_STOP MMC_CMD_CMD_INDEX(20) #define MMC_CMD_WRITE_BLOCK MMC_CMD_CMD_INDEX(24) #define MMC_CMD_WRITE_MULTIPLE_BLOCK MMC_CMD_CMD_INDEX(25) #define MMC_CMD_PROGRAM_CID MMC_CMD_CMD_INDEX(26) #define MMC_CMD_PROGRAM_CSD MMC_CMD_CMD_INDEX(27) #define MMC_CMD_SET_WRITE_PROT MMC_CMD_CMD_INDEX(28) #define MMC_CMD_CLR_WRITE_PROT MMC_CMD_CMD_INDEX(29) #define MMC_CMD_SEND_WRITE_PROT MMC_CMD_CMD_INDEX(30) #define MMC_CMD_TAG_SECTOR_START MMC_CMD_CMD_INDEX(32) #define MMC_CMD_TAG_SECTOR_END MMC_CMD_CMD_INDEX(33) #define MMC_CMD_UNTAG_SECTOR MMC_CMD_CMD_INDEX(34) #define MMC_CMD_TAG_ERASE_GROUP_START MMC_CMD_CMD_INDEX(35) #define MMC_CMD_TAG_ERASE_GROUP_END MMC_CMD_CMD_INDEX(36) #define MMC_CMD_UNTAG_ERASE_GROUP MMC_CMD_CMD_INDEX(37) #define MMC_CMD_ERASE MMC_CMD_CMD_INDEX(38) #define MMC_CMD_FAST_IO MMC_CMD_CMD_INDEX(39) #define MMC_CMD_GO_IRQ_STATE MMC_CMD_CMD_INDEX(40) #define MMC_CMD_LOCK_UNLOCK MMC_CMD_CMD_INDEX(42) #define MMC_CMD_APP_CMD MMC_CMD_CMD_INDEX(55) #define MMC_CMD_GEN_CMD MMC_CMD_CMD_INDEX(56) #define MMC_CMD_READ_OCR MMC_CMD_CMD_INDEX(58) #define MMC_CMD_CRC_ON_OFF MMC_CMD_CMD_INDEX(59) /* MMC_ARGH bits - see Table 15-20 in [1], Table 15-20 in [2], Table 15-19 in [3] */ #define MMC_ARGH_ARG_H_MASK bits(15,0) #define MMC_ARGH_ARG_H(x) bits_val(15,0,x) #define get_MMC_ARGH_ARG_H(x) bits_get(15,0,x) /* MMC_ARGL bits - see Table 15-21 in [1], Table 15-21 in [2], Table 15-20 in [3] */ #define MMC_ARGL_ARG_L_MASK bits(15,0) #define MMC_ARGL_ARG_L(x) bits_val(15,0,x) #define get_MMC_ARGL_ARG_L(x) bits_get(15,0,x) /* MMC_RES bits - see Table 15-22 in [1], Table 15-22 in [2], Table 15-21 in [3] */ #define MMC_RES_RESPONSE_DATA_MASK bits(15,0) #define MMC_RES_RESPONSE_DATA(x) bits_val(15,0,x) #define get_MMC_RES_RESPONSE_DATA(x) bits_get(15,0,x) /* MMC_RXFIFO bits - see Table 15-23 in [1], Table 15-23 in [2], Table 15-22 in [3] */ #define MMC_RXFIFO_READ_DATA_MASK bits(7,0) #define MMC_RXFIFO_READ_DATA(x) bits_val(7,0,x) #define get_MMC_RXFIFO_READ_DATA(x) bits_get(7,0,x) /* MMC_TXFIFO bits - see Table 15-24 in [1], Table 15-24 in [2], Table 15-23 in [3] */ #define MMC_TXFIFO_WRITE_DATA_MASK bits(7,0) #define MMC_TXFIFO_WRITE_DATA(x) bits_val(7,0,x) #define get_MMC_TXFIFO_WRITE_DATA(x) bits_get(7,0,x) #endif /* PXA2X0_MMC_H */ openwince-include-0.3.2.orig/arm/pxa2x0/ost.h0100644000175000017500000000717007652607244016410 0ustar p2p2/* * $Id: ost.h,v 1.9 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 OS Timer Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_OST_H #define PXA2X0_OST_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* OS Timer Registers */ #define OST_BASE 0x40A00000 #if LANGUAGE == C typedef volatile struct OST_registers { uint32_t osmr[4]; uint32_t oscr; uint32_t ossr; uint32_t ower; uint32_t oier; } OST_registers_t; #ifdef PXA2X0_UNMAPPED #define OST_pointer ((OST_registers_t*) OST_BASE) #endif #define OSMR(i) OST_pointer->osmr[i] #define OSMR0 OSMR(0) #define OSMR1 OSMR(1) #define OSMR2 OSMR(2) #define OSMR3 OSMR(3) #define OSCR OST_pointer->oscr #define OSSR OST_pointer->ossr #define OWER OST_pointer->ower #define OIER OST_pointer->oier #endif /* LANGUAGE == C */ #define OSMR0_OFFSET 0x00 #define OSMR1_OFFSET 0x04 #define OSMR2_OFFSET 0x08 #define OSMR3_OFFSET 0x0C #define OSCR_OFFSET 0x10 #define OSSR_OFFSET 0x14 #define OWER_OFFSET 0x18 #define OIER_OFFSET 0x1C /* OSSR bits - see 4.4.2.5 in [1], Table 4-48 in [2], Table 4-45 in [3] */ #define OSSR_M3 bit(3) #define OSSR_M2 bit(2) #define OSSR_M1 bit(1) #define OSSR_M0 bit(0) /* OWER bits - see Table 4-46 in [1], Table 4-46 in [2], Table 4-43 in [3] */ #define OWER_WME bit(0) /* OIER bits - see Table 4-45 in [1], Table 4-45 in [2], Table 4-42 in [3] */ #define OIER_E3 bit(3) #define OIER_E2 bit(2) #define OIER_E1 bit(1) #define OIER_E0 bit(0) #endif /* PXA2X0_OST_H */ openwince-include-0.3.2.orig/arm/pxa2x0/pmrc.h0100644000175000017500000001131407652607244016537 0ustar p2p2/* * $Id: pmrc.h,v 1.8 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 Power Manager and Reset Control Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_PMRC_H #define PXA2X0_PMRC_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* Power Manager and Reset Control Registers */ #define PMRC_BASE 0x40F00000 #if LANGUAGE == C typedef volatile struct PMRC_registers { uint32_t pmcr; uint32_t pssr; uint32_t pspr; uint32_t pwer; uint32_t prer; uint32_t pfer; uint32_t pedr; uint32_t pcfr; uint32_t pgsr0; uint32_t pgsr1; uint32_t pgsr2; uint32_t __reserved; uint32_t rcsr; } PMRC_registers_t; #ifdef PXA2X0_UNMAPPED #define PMRC_pointer ((PMRC_registers_t*) PMRC_BASE) #endif #define PMCR PMRC_pointer->pmcr #define PSSR PMRC_pointer->pssr #define PSPR PMRC_pointer->pspr #define PWER PMRC_pointer->pwer #define PRER PMRC_pointer->prer #define PFER PMRC_pointer->pfer #define PEDR PMRC_pointer->pedr #define PCFR PMRC_pointer->pcfr #define PGSR0 PMRC_pointer->pgsr0 #define PGSR1 PMRC_pointer->pgsr1 #define PGSR2 PMRC_pointer->pgsr2 #define RCSR PMRC_pointer->rcsr #endif /* LANGUAGE == C */ #define PMCR_OFFSET 0x00 #define PSSR_OFFSET 0x04 #define PSPR_OFFSET 0x08 #define PWER_OFFSET 0x0C #define PRER_OFFSET 0x10 #define PFER_OFFSET 0x14 #define PEDR_OFFSET 0x18 #define PCFR_OFFSET 0x1C #define PGSR0_OFFSET 0x20 #define PGSR1_OFFSET 0x24 #define PGSR2_OFFSET 0x28 #define RCSR_OFFSET 0x30 /* PMCR bits - see Table 3-7 in [1], Table 3-7 in [2], Table 3-7 in [3] */ #define PMCR_IDAE bit(0) /* PSSR bits - see Table 3-13 in [1], Table 3-13 in [2], Table 3-13 in [3] */ #define PSSR_RDH bit(5) #define PSSR_PH bit(4) #define PSSR_VFS bit(2) #define PSSR_BFS bit(1) #define PSSR_SSS bit(0) /* PWER bits - see Table 3-9 in [1], Table 3-9 in [2], Table 3-9 in [3] */ #define PWER_WERTC bit(31) #define PWER_WE15 bit(15) #define PWER_WE14 bit(14) #define PWER_WE13 bit(13) #define PWER_WE12 bit(12) #define PWER_WE11 bit(11) #define PWER_WE10 bit(10) #define PWER_WE9 bit(9) #define PWER_WE8 bit(8) #define PWER_WE7 bit(7) #define PWER_WE6 bit(6) #define PWER_WE5 bit(5) #define PWER_WE4 bit(4) #define PWER_WE3 bit(3) #define PWER_WE2 bit(2) #define PWER_WE1 bit(1) #define PWER_WE0 bit(0) /* PCFR bits - see Table 3-8 in [1], Table 3-8 in [2], Table 3-8 in [3] */ #define PCFR_FS bit(2) #define PCFR_FP bit(1) #define PCFR_OPDE bit(0) /* RCSR bits - see Table 3-18 in [1], Table 3-18 in [2], Table 3-19 in [3] */ #define RCSR_GPR bit(3) #define RCSR_SMR bit(2) #define RCSR_WDR bit(1) #define RCSR_HWR bit(0) #endif /* PXA2X0_PMRC_H */ openwince-include-0.3.2.orig/arm/pxa2x0/pwm.h0100644000175000017500000000774707652607244016420 0ustar p2p2/* * $Id: pwm.h,v 1.11 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 PWM0 and PWM1 Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_PWM_H #define PXA2X0_PWM_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* PWM0 and PWM1 Registers */ #define PWM0_BASE 0x40B00000 #define PWM1_BASE 0x40C00000 #if LANGUAGE == C typedef volatile struct PWM_registers { uint32_t pwm_ctrl; uint32_t pwm_pwduty; uint32_t pwm_perval; } PWM_registers_t; #ifdef PXA2X0_UNMAPPED #define PWM0_pointer ((PWM_registers_t*) PWM0_BASE) #define PWM1_pointer ((PWM_registers_t*) PWM1_BASE) #endif #define PWM_CTRL PWM_pointer->pwm_ctrl #define PWM_PWDUTY PWM_pointer->pwm_pwduty #define PWM_PERVAL PWM_pointer->pwm_perval #define PWM_CTRL0 PWM0_pointer->pwm_ctrl #define PWM_PWDUTY0 PWM0_pointer->pwm_pwduty #define PWM_PERVAL0 PWM0_pointer->pwm_perval #define PWM_CTRL1 PWM1_pointer->pwm_ctrl #define PWM_PWDUTY1 PWM1_pointer->pwm_pwduty #define PWM_PERVAL1 PWM1_pointer->pwm_perval #endif /* LANGUAGE == C */ #define PWM_CTRL_OFFSET 0x00 #define PWM_PWDUTY_OFFSET 0x04 #define PWM_PERVAL_OFFSET 0x08 /* PWM_CTRL bits - see Table 4-49 in [1], Table 4-50 in [2], Table 4-46 in [3] */ #define PWM_CTRL_PWM_SD bit(6) #define PWM_CTRL_PRESCALE_MASK bits(5,0) #define PWM_CTRL_PRESCALE(x) bits_val(5,0,x) #define get_PWM_CTRL_PRESCALE(x) bits_get(5,0,x) /* PWM_PWDUTY bits - see Table 4-50 in [1], Table 4-51 in [2], Table 4-47 in [3] */ #define PWM_PWDUTY_FDCYCLE bit(10) #define PWM_PWDUTY_DCYCLE_MASK bits(9,0) #define PWM_PWDUTY_DCYCLE(x) bits_val(9,0,x) #define get_PWM_PWDUTY_DCYCLE(x) bits_get(9,0,x) /* PWM_PERVAL bits - see Table 4-51 in [1], Table 4-52 in [2], Table 4-48 in [3] */ #define PWM_PERVAL_PV_MASK bits(9,0) #define PWM_PERVAL_PV(x) bits_val(9,0,x) #define get_PWM_PERVAL_PV(x) bits_get(9,0,x) #endif /* PXA2X0_PWM_H */ openwince-include-0.3.2.orig/arm/pxa2x0/rtc.h0100644000175000017500000000670107652607244016372 0ustar p2p2/* * $Id: rtc.h,v 1.10 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 RTC Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_RTC_H #define PXA2X0_RTC_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* RTC Registers */ #define RTC_BASE 0x40900000 #if LANGUAGE == C typedef volatile struct RTC_registers { uint32_t rcnr; uint32_t rtar; uint32_t rtsr; uint32_t rttr; } RTC_registers_t; #ifdef PXA2X0_UNMAPPED #define RTC_pointer ((RTC_registers_t*) RTC_BASE) #endif #define RCNR RTC_pointer->rcnr #define RTAR RTC_pointer->rtar #define RTSR RTC_pointer->rtsr #define RTTR RTC_pointer->rttr #endif /* LANGUAGE == C */ #define RCNR_OFFSET 0x00 #define RTAR_OFFSET 0x04 #define RTSR_OFFSET 0x08 #define RTTR_OFFSET 0x0C /* RTSR bits - see Table 4-42 in [1], Table 4-42 in [2], Table 4-40 in [3] */ #define RTSR_HZE bit(3) #define RTSR_ALE bit(2) #define RTSR_HZ bit(1) #define RTSR_AL bit(0) /* RTTR bits - see Table 4-39 in [1], Table 4-39 in [2], Table 4-37 in [3] */ #define RTTR_LCK bit(31) #define RTTR_DEL_MASK bits(25,16) #define RTTR_DEL(x) bits_val(25,16,x) #define get_RTTR_DEL(x) bits_get(25,16,x) #define RTTR_CK_DIV_MASK bits(15,0) #define RTTR_CK_DIV(x) bits_val(15,0,x) #define get_RTTR_CK_DIV(x) bits_get(15,0,x) #endif /* PXA2X0_RTC_H */ openwince-include-0.3.2.orig/arm/pxa2x0/ssp.h0100644000175000017500000004124307652607244016407 0ustar p2p2/* * $Id: ssp.h,v 1.10 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 SSP/NSSP/ASSP Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_SSP_H #define PXA2X0_SSP_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* SSP Registers */ #define SSP_BASE 0x41000000 #if !defined(PXA2X0_NOPXA255) #define NSSP_BASE 0x41400000 #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define ASSP_BASE 0x41500000 #endif /* PXA260 and above only */ #if LANGUAGE == C /* see Table 8-7 in [1], Table 8-7 in [2], Table 16-10 in [2], Table 16-11 in [2], Table 8-7 in [3], Table 16-10 in [3] */ typedef volatile struct SSP_registers { uint32_t sscr0; uint32_t sscr1; uint32_t sssr; #if defined(PXA2X0_NOPXA255) uint32_t __reserved; #else /* PXA255 and above only */ uint32_t xssitr; /* only for NSSP/ASSP */ #endif /* PXA255 and above only */ uint32_t ssdr; #if !defined(PXA2X0_NOPXA255) uint32_t __reserved[5]; uint32_t xssto; /* only for NSSP/ASSP */ uint32_t xsspsp; /* only for NSSP/ASSP */ #endif /* PXA255 and above only */ } SSP_registers_t; #ifdef PXA2X0_UNMAPPED #define SSP_pointer ((SSP_registers_t*) SSP_BASE) #if !defined(PXA2X0_NOPXA255) #define NSSP_pointer ((SSP_registers_t*) NSSP_BASE) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define ASSP_pointer ((SSP_registers_t*) ASSP_BASE) #endif /* PXA260 and above only */ #endif #define SSCR0 SSP_pointer->sscr0 #define SSCR1 SSP_pointer->sscr1 #define SSSR SSP_pointer->sssr #define SSDR SSP_pointer->ssdr #if !defined(PXA2X0_NOPXA255) #define NSSCR0 NSSP_pointer->sscr0 #define NSSCR1 NSSP_pointer->sscr1 #define NSSSR NSSP_pointer->sssr #define NSSITR NSSP_pointer->xssitr #define NSSDR NSSP_pointer->ssdr #define NSSPTO NSSP_pointer->xsspto #define NSSPSP NSSP_pointer->xsspsp #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define ASSCR0 ASSP_pointer->sscr0 #define ASSCR1 ASSP_pointer->sscr1 #define ASSSR ASSP_pointer->sssr #define ASSITR ASSP_pointer->xssitr #define ASSDR ASSP_pointer->ssdr #define ASSPTO ASSP_pointer->xsspto #define ASSPSP ASSP_pointer->xsspsp #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* common for NSSP/ASSP */ #define XSSCR0 XSSP_pointer->sscr0 #define XSSCR1 XSSP_pointer->sscr1 #define XSSSR XSSP_pointer->sssr #define XSSITR XSSP_pointer->xssitr #define XSSDR XSSP_pointer->ssdr #define XSSPTO XSSP_pointer->xsspto #define XSSPSP XSSP_pointer->xsspsp #endif /* PXA255 and above only */ #endif /* LANGUAGE == C */ #define SSCR0_OFFSET 0x00 #define SSCR1_OFFSET 0x04 #define SSSR_OFFSET 0x08 #define SSDR_OFFSET 0x10 #if !defined(PXA2X0_NOPXA255) #define NSSCR0_OFFSET 0x00 #define NSSCR1_OFFSET 0x04 #define NSSSR_OFFSET 0x08 #define NSSITR_OFFSET 0x0C #define NSSDR_OFFSET 0x10 #define NSSTO_OFFSET 0x28 #define NSSPSP_OFFSET 0x2C #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) #define ASSCR0_OFFSET 0x00 #define ASSCR1_OFFSET 0x04 #define ASSSR_OFFSET 0x08 #define ASSITR_OFFSET 0x0C #define ASSDR_OFFSET 0x10 #define ASSTO_OFFSET 0x28 #define ASSPSP_OFFSET 0x2C #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* common for NSSP/ASSP */ #define XSSCR0_OFFSET 0x00 #define XSSCR1_OFFSET 0x04 #define XSSSR_OFFSET 0x08 #define XSSITR_OFFSET 0x0C #define XSSDR_OFFSET 0x10 #define XSSTO_OFFSET 0x28 #define XSSPSP_OFFSET 0x2C #endif /* PXA255 and above only */ /* SSCR0 bits - see Table 8-2 in [1], Table 8-2 in [2], Table 8-2 in [3] */ #define SSCR0_SCR_MASK bits(15,8) #define SSCR0_SCR(x) bits_val(15,8,x) #define get_SSCR0_SCR(x) bits_get(15,8,x) #define SSCR0_SSE bit(7) #define SSCR0_ECS bit(6) #define SSCR0_FRF_MASK bits(5,4) #define SSCR0_FRF(x) bits_val(5,4,x) #define get_SSCR0_FRF(x) bits_get(5,4,x) #define SSCR0_DSS_MASK bits(3,0) #define SSCR0_DSS(x) bits_val(3,0,x) #define get_SSCR0_DSS(x) bits_get(3,0,x) /* SSCR1 bits - see Table 8-3 in [1], Table 8-3 in [2], Table 8-3 in [3] */ #define SSCR1_RFT_MASK bits(13,10) #define SSCR1_RFT(x) bits_val(13,10,x) #define get_SSCR1_RFT(x) bits_get(13,10,x) #define SSCR1_TFT_MASK bits(9,6) #define SSCR1_TFT(x) bits_val(9,6,x) #define get_SSCR1_TFT(x) bits_get(9,6,x) #define SSCR1_MWDS bit(5) #define SSCR1_SPH bit(4) #define SSCR1_SPO bit(3) #define SSCR1_LBM bit(2) #define SSCR1_TIE bit(1) #define SSCR1_RIE bit(0) /* SSSR bits - see Table 8-6 in [1], Table 8-6 in [2], Table 8-6 in [3] */ #define SSSR_RFL_MASK bits(15,12) #define SSSR_RFL(x) bits_val(15,12,x) #define get_SSSR_RFL(x) bits_get(15,12,x) #define SSSR_TFL_MASK bits(11,8) #define SSSR_TFL(x) bits_val(11,8,x) #define get_SSSR_TFL(x) bits_get(11,8,x) #define SSSR_ROR bit(7) #define SSSR_RFS bit(6) #define SSSR_TFS bit(5) #define SSSR_BSY bit(4) #define SSSR_RNE bit(3) #define SSSR_TNF bit(2) #if !defined(PXA2X0_NOPXA255) /* NSSCR0 bits - see Table 16-3 in [2], Table 16-3 in [3] */ #define NSSCR0_EDSS bit(20) #define NSSCR0_SCR_MASK bits(19,8) #define NSSCR0_SCR(x) bits_val(19,8,x) #define get_NSSCR0_SCR(x) bits_get(19,8,x) #define NSSCR0_SSE bit(7) #define NSSCR0_FRF_MASK bits(5,4) #define NSSCR0_FRF(x) bits_val(5,4,x) #define get_NSSCR0_FRF(x) bits_get(5,4,x) #define NSSCR0_DSS_MASK bits(3,0) #define NSSCR0_DSS(x) bits_val(3,0,x) #define get_NSSCR0_DSS(x) bits_get(3,0,x) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* ASSCR0 bits - see Table 16-3 in [2] */ #define ASSCR0_EDSS bit(20) #define ASSCR0_SCR_MASK bits(19,8) #define ASSCR0_SCR(x) bits_val(19,8,x) #define get_ASSCR0_SCR(x) bits_get(19,8,x) #define ASSCR0_SSE bit(7) #define ASSCR0_FRF_MASK bits(5,4) #define ASSCR0_FRF(x) bits_val(5,4,x) #define get_ASSCR0_FRF(x) bits_get(5,4,x) #define ASSCR0_DSS_MASK bits(3,0) #define ASSCR0_DSS(x) bits_val(3,0,x) #define get_ASSCR0_DSS(x) bits_get(3,0,x) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* NSSCR0/ASSCR0 bits - see Table 16-3 in [2], Table 16-3 in [3] */ #define XSSCR0_EDSS bit(20) #define XSSCR0_SCR_MASK bits(19,8) #define XSSCR0_SCR(x) bits_val(19,8,x) #define get_XSSCR0_SCR(x) bits_get(19,8,x) #define XSSCR0_SSE bit(7) #define XSSCR0_FRF_MASK bits(5,4) #define XSSCR0_FRF(x) bits_val(5,4,x) #define get_XSSCR0_FRF(x) bits_get(5,4,x) #define XSSCR0_DSS_MASK bits(3,0) #define XSSCR0_DSS(x) bits_val(3,0,x) #define get_XSSCR0_DSS(x) bits_get(3,0,x) /* NSSCR1 bits - see Table 16-4 in [2], Table 16-4 in [3] */ #define NSSCR1_TTELP bit(31) #define NSSCR1_TTE bit(30) #define NSSCR1_EBCEI bit(29) #define NSSCR1_SCFR bit(28) #define NSSCR1_SCLKDIR bit(25) #define NSSCR1_SFRMDIR bit(24) #define NSSCR1_RWOT bit(23) #define NSSCR1_TSRE bit(21) #define NSSCR1_RSRE bit(20) #define NSSCR1_TINTE bit(19) #define NSSCR1_STRF bit(15) #define NSSCR1_EFWR bit(14) #define NSSCR1_RFT_MASK bits(13,10) #define NSSCR1_RFT(x) bits_val(13,10,x) #define get_NSSCR1_RFT(x) bits_get(13,10,x) #define NSSCR1_TFT_MASK bits(9,6) #define NSSCR1_TFT(x) bits_val(9,6,x) #define get_NSSCR1_TFT(x) bits_get(9,6,x) #define NSSCR1_MWDS bit(5) #define NSSCR1_SPH bit(4) #define NSSCR1_SPO bit(3) #define NSSCR1_LBM bit(2) #define NSSCR1_TIE bit(1) #define NSSCR1_RIE bit(0) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* ASSCR1 bits - see Table 16-4 in [2] */ #define ASSCR1_TTELP bit(31) #define ASSCR1_TTE bit(30) #define ASSCR1_EBCEI bit(29) #define ASSCR1_SCFR bit(28) #define ASSCR1_SCLKDIR bit(25) #define ASSCR1_SFRMDIR bit(24) #define ASSCR1_RWOT bit(23) #define ASSCR1_TSRE bit(21) #define ASSCR1_RSRE bit(20) #define ASSCR1_TINTE bit(19) #define ASSCR1_STRF bit(15) #define ASSCR1_EFWR bit(14) #define ASSCR1_RFT_MASK bits(13,10) #define ASSCR1_RFT(x) bits_val(13,10,x) #define get_ASSCR1_RFT(x) bits_get(13,10,x) #define ASSCR1_TFT_MASK bits(9,6) #define ASSCR1_TFT(x) bits_val(9,6,x) #define get_ASSCR1_TFT(x) bits_get(9,6,x) #define ASSCR1_MWDS bit(5) #define ASSCR1_SPH bit(4) #define ASSCR1_SPO bit(3) #define ASSCR1_LBM bit(2) #define ASSCR1_TIE bit(1) #define ASSCR1_RIE bit(0) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* NSSCR1/ASSCR1 bits - see Table 16-4 in [2], Table 16-4 in [3] */ #define XSSCR1_TTELP bit(31) #define XSSCR1_TTE bit(30) #define XSSCR1_EBCEI bit(29) #define XSSCR1_SCFR bit(28) #define XSSCR1_SCLKDIR bit(25) #define XSSCR1_SFRMDIR bit(24) #define XSSCR1_RWOT bit(23) #define XSSCR1_TSRE bit(21) #define XSSCR1_RSRE bit(20) #define XSSCR1_TINTE bit(19) #define XSSCR1_STRF bit(15) #define XSSCR1_EFWR bit(14) #define XSSCR1_RFT_MASK bits(13,10) #define XSSCR1_RFT(x) bits_val(13,10,x) #define get_XSSCR1_RFT(x) bits_get(13,10,x) #define XSSCR1_TFT_MASK bits(9,6) #define XSSCR1_TFT(x) bits_val(9,6,x) #define get_XSSCR1_TFT(x) bits_get(9,6,x) #define XSSCR1_MWDS bit(5) #define XSSCR1_SPH bit(4) #define XSSCR1_SPO bit(3) #define XSSCR1_LBM bit(2) #define XSSCR1_TIE bit(1) #define XSSCR1_RIE bit(0) /* NSSITR bits - see Table 16-7 in [2], Table 16-7 in [3] */ #define NSSITR_TROR bit(7) #define NSSITR_TRFS bit(6) #define NSSITR_TTFS bit(5) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* ASSITR bits - see Table 16-7 in [2] */ #define ASSITR_TROR bit(7) #define ASSITR_TRFS bit(6) #define ASSITR_TTFS bit(5) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* NSSITR/ASSITR bits - see Table 16-7 in [2], Table 16-7 in [3] */ #define XSSITR_TROR bit(7) #define XSSITR_TRFS bit(6) #define XSSITR_TTFS bit(5) /* NSSSR bits - see Table 16-8 in [2], Table 16-8 in [3] */ #define NSSSR_BCE bit(23) #define NSSSR_CSS bit(22) #define NSSSR_TUR bit(21) #define NSSSR_TINT bit(19) #define NSSSR_RFL_MASK bits(15,12) #define NSSSR_RFL(x) bits_val(15,12,x) #define get_NSSSR_RFL(x) bits_get(15,12,x) #define NSSSR_TFL_MASK bits(11,8) #define NSSSR_TFL(x) bits_val(11,8,x) #define get_NSSSR_TFL(x) bits_get(11,8,x) #define NSSSR_ROR bit(7) #define NSSSR_RFS bit(6) #define NSSSR_TFS bit(5) #define NSSSR_BSY bit(4) #define NSSSR_RNE bit(3) #define NSSSR_TNF bit(2) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* ASSSR bits - see Table 16-8 in [2] */ #define ASSSR_BCE bit(23) #define ASSSR_CSS bit(22) #define ASSSR_TUR bit(21) #define ASSSR_TINT bit(19) #define ASSSR_RFL_MASK bits(15,12) #define ASSSR_RFL(x) bits_val(15,12,x) #define get_ASSSR_RFL(x) bits_get(15,12,x) #define ASSSR_TFL_MASK bits(11,8) #define ASSSR_TFL(x) bits_val(11,8,x) #define get_ASSSR_TFL(x) bits_get(11,8,x) #define ASSSR_ROR bit(7) #define ASSSR_RFS bit(6) #define ASSSR_TFS bit(5) #define ASSSR_BSY bit(4) #define ASSSR_RNE bit(3) #define ASSSR_TNF bit(2) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* NSSSR/ASSSR bits - see Table 16-8 in [2], Table 16-8 in [3] */ #define XSSSR_BCE bit(23) #define XSSSR_CSS bit(22) #define XSSSR_TUR bit(21) #define XSSSR_TINT bit(19) #define XSSSR_RFL_MASK bits(15,12) #define XSSSR_RFL(x) bits_val(15,12,x) #define get_XSSSR_RFL(x) bits_get(15,12,x) #define XSSSR_TFL_MASK bits(11,8) #define XSSSR_TFL(x) bits_val(11,8,x) #define get_XSSSR_TFL(x) bits_get(11,8,x) #define XSSSR_ROR bit(7) #define XSSSR_RFS bit(6) #define XSSSR_TFS bit(5) #define XSSSR_BSY bit(4) #define XSSSR_RNE bit(3) #define XSSSR_TNF bit(2) /* NSSTO bits - see Table 16-6 in [2], Table 16-6 in [3] */ #define NSSTO_TIMEOUT_MASK bits(23,0) #define NSSTO_TIMEOUT(x) bits_val(23,0,x) #define get_NSSTO_TIMEOUT(x) bits_get(23,0,x) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* ASSTO bits - see Table 16-6 in [2] */ #define ASSTO_TIMEOUT_MASK bits(23,0) #define ASSTO_TIMEOUT(x) bits_val(23,0,x) #define get_ASSTO_TIMEOUT(x) bits_get(23,0,x) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* NSSTO/ASSTO bits - see Table 16-6 in [2], Table 16-6 in [3] */ #define XSSTO_TIMEOUT_MASK bits(23,0) #define XSSTO_TIMEOUT(x) bits_val(23,0,x) #define get_XSSTO_TIMEOUT(x) bits_get(23,0,x) /* NSSPSP bits - see Table 16-5 in [2], Table 16-5 in [3] */ #define NSSPSP_DMYSTOP_MASK bits(24,23) #define NSSPSP_DMYSTOP(x) bits_val(24,23,x) #define get_NSSPSP_DMYSTOP(x) bits_get(24,23,x) #define NSSPSP_SFRMWDTH_MASK bits(21,16) #define NSSPSP_SFRMWDTH(x) bits_val(21,16,x) #define get_NSSPSP_SFRMWDTH(x) bits_get(21,16,x) #define NSSPSP_SFRMDLY_MASK bits(15,9) #define NSSPSP_SFRMDLY(x) bits_val(15,9,x) #define get_NSSPSP_SFRMDLY(x) bits_get(15,9,x) #define NSSPSP_DMYSTRT_MASK bits(8,7) #define NSSPSP_DMYSTRT(x) bits_val(8,7,x) #define get_NSSPSP_DMYSTRT(x) bits_get(8,7,x) #define NSSPSP_STRTDLY_MASK bits(6,4) #define NSSPSP_STRTDLY(x) bits_val(6,4,x) #define get_NSSPSP_STRTDLY(x) bits_get(6,4,x) #define NSSPSP_ETDS bit(3) #define NSSPSP_SFRMP bit(2) #define NSSPSP_SCMODE_MASK bits(1,0) #define NSSPSP_SCMODE(x) bits_val(1,0,x) #define get_NSSPSP_SCMODE(x) bits_get(1,0,x) #endif /* PXA255 and above only */ #if !defined(PXA2X0_NOPXA260) /* ASSPSP bits - see Table 16-5 in [2] */ #define ASSPSP_DMYSTOP_MASK bits(24,23) #define ASSPSP_DMYSTOP(x) bits_val(24,23,x) #define get_ASSPSP_DMYSTOP(x) bits_get(24,23,x) #define ASSPSP_SFRMWDTH_MASK bits(21,16) #define ASSPSP_SFRMWDTH(x) bits_val(21,16,x) #define get_ASSPSP_SFRMWDTH(x) bits_get(21,16,x) #define ASSPSP_SFRMDLY_MASK bits(15,9) #define ASSPSP_SFRMDLY(x) bits_val(15,9,x) #define get_ASSPSP_SFRMDLY(x) bits_get(15,9,x) #define ASSPSP_DMYSTRT_MASK bits(8,7) #define ASSPSP_DMYSTRT(x) bits_val(8,7,x) #define get_ASSPSP_DMYSTRT(x) bits_get(8,7,x) #define ASSPSP_STRTDLY_MASK bits(6,4) #define ASSPSP_STRTDLY(x) bits_val(6,4,x) #define get_ASSPSP_STRTDLY(x) bits_get(6,4,x) #define ASSPSP_ETDS bit(3) #define ASSPSP_SFRMP bit(2) #define ASSPSP_SCMODE_MASK bits(1,0) #define ASSPSP_SCMODE(x) bits_val(1,0,x) #define get_ASSPSP_SCMODE(x) bits_get(1,0,x) #endif /* PXA260 and above only */ #if !defined(PXA2X0_NOPXA255) /* NSSPSP/ASSPSP bits - see Table 16-5 in [2], Table 16-5 in [3] */ #define XSSPSP_DMYSTOP_MASK bits(24,23) #define XSSPSP_DMYSTOP(x) bits_val(24,23,x) #define get_XSSPSP_DMYSTOP(x) bits_get(24,23,x) #define XSSPSP_SFRMWDTH_MASK bits(21,16) #define XSSPSP_SFRMWDTH(x) bits_val(21,16,x) #define get_XSSPSP_SFRMWDTH(x) bits_get(21,16,x) #define XSSPSP_SFRMDLY_MASK bits(15,9) #define XSSPSP_SFRMDLY(x) bits_val(15,9,x) #define get_XSSPSP_SFRMDLY(x) bits_get(15,9,x) #define XSSPSP_DMYSTRT_MASK bits(8,7) #define XSSPSP_DMYSTRT(x) bits_val(8,7,x) #define get_XSSPSP_DMYSTRT(x) bits_get(8,7,x) #define XSSPSP_STRTDLY_MASK bits(6,4) #define XSSPSP_STRTDLY(x) bits_val(6,4,x) #define get_XSSPSP_STRTDLY(x) bits_get(6,4,x) #define XSSPSP_ETDS bit(3) #define XSSPSP_SFRMP bit(2) #define XSSPSP_SCMODE_MASK bits(1,0) #define XSSPSP_SCMODE(x) bits_val(1,0,x) #define get_XSSPSP_SCMODE(x) bits_get(1,0,x) #endif /* PXA255 and above only */ #endif /* PXA2X0_SSP_H */ openwince-include-0.3.2.orig/arm/pxa2x0/uart.h0100644000175000017500000002514407652607244016557 0ustar p2p2/* * $Id: uart.h,v 1.11 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 UART (FFUART/BTUART/STUART/HWUART) Declarations * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_UART_H #define PXA2X0_UART_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* Common UART (FFUART/BTUART/STUART/HWUART) Declarations */ #define FFUART_BASE 0x40100000 #define BTUART_BASE 0x40200000 #define STUART_BASE 0x40700000 #if !defined(PXA2X0_NOPXA255) #define HWUART_BASE 0x41600000 #endif /* PXA255 and above only */ #if LANGUAGE == C typedef volatile struct UART_registers { union { uint32_t rbr; uint32_t thr; uint32_t dll; }; union { uint32_t ier; uint32_t dlh; }; union { uint32_t iir; uint32_t fcr; }; uint32_t lcr; uint32_t mcr; uint32_t lsr; uint32_t msr; /* only for FFUART, BTUART, HWUART */ uint32_t spr; uint32_t isr; #if !defined(PXA2X0_NOPXA255) uint32_t hwfor; /* only for HWUART */ uint32_t hwabr; /* only for HWUART */ uint32_t hwacr; /* only for HWUART */ #endif /* PXA255 and above only */ } UART_registers_t; #ifdef PXA2X0_UNMAPPED #define FFUART_pointer ((UART_registers_t*) FFUART_BASE) #define BTUART_pointer ((UART_registers_t*) BTUART_BASE) #define STUART_pointer ((UART_registers_t*) STUART_BASE) #if !defined(PXA2X0_NOPXA255) #define HWUART_pointer ((UART_registers_t*) HWUART_BASE) #endif /* PXA255 and above only */ #endif #define RBR UART_pointer->rbr #define THR UART_pointer->thr #define IER UART_pointer->ier #define IIR UART_pointer->iir #define FCR UART_pointer->fcr #define LCR UART_pointer->lcr #define MCR UART_pointer->mcr #define LSR UART_pointer->lsr #define MSR UART_pointer->msr #define SPR UART_pointer->spr #define ISR UART_pointer->isr #define DLL UART_pointer->dll #define DLH UART_pointer->dlh /* FFUART */ #define FFRBR FFUART_pointer->rbr #define FFTHR FFUART_pointer->thr #define FFIER FFUART_pointer->ier #define FFIIR FFUART_pointer->iir #define FFFCR FFUART_pointer->fcr #define FFLCR FFUART_pointer->lcr #define FFMCR FFUART_pointer->mcr #define FFLSR FFUART_pointer->lsr #define FFMSR FFUART_pointer->msr #define FFSPR FFUART_pointer->spr #define FFISR FFUART_pointer->isr #define FFDLL FFUART_pointer->dll #define FFDLH FFUART_pointer->dlh /* BTUART */ #define BTRBR BTUART_pointer->rbr #define BTTHR BTUART_pointer->thr #define BTIER BTUART_pointer->ier #define BTIIR BTUART_pointer->iir #define BTFCR BTUART_pointer->fcr #define BTLCR BTUART_pointer->lcr #define BTMCR BTUART_pointer->mcr #define BTLSR BTUART_pointer->lsr #define BTMSR BTUART_pointer->msr #define BTSPR BTUART_pointer->spr #define BTISR BTUART_pointer->isr #define BTDLL BTUART_pointer->dll #define BTDLH BTUART_pointer->dlh /* STUART */ #define STRBR STUART_pointer->rbr #define STTHR STUART_pointer->thr #define STIER STUART_pointer->ier #define STIIR STUART_pointer->iir #define STFCR STUART_pointer->fcr #define STLCR STUART_pointer->lcr #define STMCR STUART_pointer->mcr #define STLSR STUART_pointer->lsr #define STSPR STUART_pointer->spr #define STISR STUART_pointer->isr #define STDLL STUART_pointer->dll #define STDLH STUART_pointer->dlh #if !defined(PXA2X0_NOPXA255) /* HWUART */ #define HWRBR HWUART_pointer->rbr #define HWTHR HWUART_pointer->thr #define HWIER HWUART_pointer->ier #define HWIIR HWUART_pointer->iir #define HWFCR HWUART_pointer->fcr #define HWLCR HWUART_pointer->lcr #define HWMCR HWUART_pointer->mcr #define HWLSR HWUART_pointer->lsr #define HWMSR HWUART_pointer->msr #define HWSPR HWUART_pointer->spr #define HWISR HWUART_pointer->isr #define HWFOR HWUART_pointer->hwfor #define HWABR HWUART_pointer->hwabr #define HWACR HWUART_pointer->hwacr #define HWDLL HWUART_pointer->dll #define HWDLH HWUART_pointer->dlh #endif /* PXA255 and above only */ #endif /* LANGUAGE == C */ #define RBR_OFFSET 0x00 #define THR_OFFSET 0x00 #define IER_OFFSET 0x04 #define IIR_OFFSET 0x08 #define FCR_OFFSET 0x08 #define LCR_OFFSET 0x0C #define MCR_OFFSET 0x10 #define LSR_OFFSET 0x14 #define MSR_OFFSET 0x18 #define SPR_OFFSET 0x1C #define ISR_OFFSET 0x20 #if !defined(PXA2X0_NOPXA255) #define HWFOR_OFFSET 0x24 /* only for HWUART */ #define HWABR_OFFSET 0x28 /* only for HWUART */ #define HWACR_OFFSET 0x2C /* only for HWUART */ #endif /* PXA255 and above only */ #define DLL_OFFSET 0x00 #define DLH_OFFSET 0x04 /* IER bits - see Table 10-7 in [1], Table 10-7 in [2], Table 17-6 in [2], Table 10-7 in [3], Table 17-6 in [3] */ #define IER_DMAE bit(7) #define IER_UUE bit(6) #define IER_NRZE bit(5) #define IER_RTOIE bit(4) #define IER_MIE bit(3) #define IER_RLSE bit(2) #define IER_TIE bit(1) #define IER_RAVIE bit(0) /* IIR bits - see Table 10-9 in [1], Table 10-9 in [2], Table 17-8 in [2], Table 10-9 in [3], Table 17-8 in [3] */ #define IIR_FIFOES_MASK bits(7,6) #define IIR_FIFOES(x) bits_val(7,6,x) #define get_IIR_FIFOES(x) bits_get(7,6,x) #if !defined(PXA2X0_NOPXA255) #define IIR_ABL bit(4) /* only for HWUART */ #endif /* PXA255 and above only */ #define IIR_TOD bit(3) #define IIR_IID_MASK bits(2,1) #define IIR_IID(x) bits_val(2,1,x) #define get_IIR_IID(x) bits_get(2,1,x) #define IIR_IP bit(0) /* FCR bits - see Table 10-11 in [1], Table 10-11 in [2], Table 17-10 in [2], Table 10-11 in [3], Table 17-10 in [3] */ #define FCR_ITL_MASK bits(7,6) #define FCR_ITL(x) bits_val(7,6,x) #define get_FCR_ITL(x) bits_get(7,6,x) #if !defined(PXA2X0_NOPXA255) #define FCR_TIL bit(3) /* only for HWUART */ #endif /* PXA255 and above only */ #define FCR_RESETTF bit(2) #define FCR_RESETRF bit(1) #define FCR_TRFIFOE bit(0) /* LCR bits - see Table 10-12 in [1], Table 10-12 in [2], Table 17-14 in [2], Table 10-12 in [3], Table 17-14 in [3] */ #define LCR_DLAB bit(7) #define LCR_SB bit(6) #define LCR_STKYP bit(5) #define LCR_EPS bit(4) #define LCR_PEN bit(3) #define LCR_STB bit(2) #define LCR_WLS_MASK bits(1,0) #define LCR_WLS(x) bits_val(1,0,x) #define get_LCR_WLS(x) bits_get(1,0,x) /* LSR bits - see Table 10-13 in [1], Table 10-13 in [2], Table 17-15 in [2], Table 10-13 in [3], Table 17-15 in [3] */ #define LSR_FIFOE bit(7) #define LSR_TEMT bit(6) #define LSR_TDRQ bit(5) #define LSR_BI bit(4) #define LSR_FE bit(3) #define LSR_PE bit(2) #define LSR_OE bit(1) #define LSR_DR bit(0) /* MCR bits - see Table 10-14 in [1], Table 10-14 in [2], Table 17-16 in [2], Table 10-14 in [3], Table 17-16 in [3] */ #if !defined(PXA2X0_NOPXA255) #define MCR_AFE bit(5) /* only for HWUART */ #endif /* PXA255 and above only */ #define MCR_LOOP bit(4) #define MCR_OUT2 bit(3) #define MCR_OUT1 bit(2) /* only for FFUART - see Table 10-21 in [1], Table 10-21 in [2], Table 10-21 in [3] */ #define MCR_RTS bit(1) /* only for FFUART, BTUART, HWUART - see Table 10-21 in [1], Table 10-21 in [2], Table 10-21 in [3] */ #define MCR_DTR bit(0) /* only for FFUART - see Table 10-21 in [1], Table 10-21 in [2], Table 10-21 in [3] */ /* MSR bits - see Table 10-15 in [1], Table 10-15 in [2], Table 17-17 in [2], Table 10-15 in [3], Table 17-17 in [3] */ #define MSR_DCD bit(7) /* only for FFUART */ #define MSR_RI bit(6) /* only for FFUART */ #define MSR_DSR bit(5) /* only for FFUART */ #define MSR_CTS bit(4) /* only for FFUART, BTUART, HWUART - see Table 10-21 in [1], Table 10-21 in [2], Table 10-21 in [3] */ #define MSR_DDCD bit(3) /* only for FFUART */ #define MSR_TERI bit(2) /* only for FFUART */ #define MSR_DDSR bit(1) /* only for FFUART */ #define MSR_DCTS bit(0) /* only for FFUART, BTUART, HWUART - see Table 10-21 in [1], Table 10-21 in [2], Table 10-21 in [3] */ /* SPR bits - see Table 10-16 in [1], Table 10-16 in [2], Table 17-18 in [2], Table 10-16 in [3], Table 17-18 in [3] */ #define SPR_SP_MASK bits(7,0) #define SPR_SP(x) bits_val(7,0,x) #define get_SPR_SP(x) bits_get(7,0,x) /* ISR bits - see Table 10-17 in [1], Table 10-17 in [2], Table 17-19 in [2], Table 10-17 in [3], Table 17-19 in [3] */ #define ISR_RXPL bit(4) #define ISR_TXPL bit(3) #define ISR_XMODE bit(2) #define ISR_RCVEIR bit(1) #define ISR_XMITIR bit(0) #if !defined(PXA2X0_NOPXA255) /* HWFOR bits - see Table 17-11 in [2], Table 17-11 in [3] */ #define HWFOR_BC_MASK bits(6,0) #define HWFOR_BC(x) bits_val(6,0,x) #define get_HWFOR_BC(x) bits_get(6,0,x) /* HWABR bits - see Table 17-12 in [2], Table 17-12 in [3] */ #define HWABR_ABT bit(3) #define HWABR_ABUP bit(2) #define HWABR_ABLIE bit(1) #define HWABR_ABE bit(0) /* HWACR bits - see Table 17-13 in [2], Table 17-13 in [3] */ #define HWACR_ACR_MASK bits(15,0) #define HWACR_ACR(x) bits_val(15,0,x) #define get_HWACR_ACR(x) bits_get(15,0,x) #endif /* PXA255 and above only */ #endif /* PXA2X0_UART_H */ openwince-include-0.3.2.orig/arm/pxa2x0/udc.h0100644000175000017500000003302507652607244016354 0ustar p2p2/* * $Id: udc.h,v 1.10 2003/04/26 22:56:35 telka Exp $ * * XScale PXA26x/PXA255/PXA250/PXA210 UDC Registers * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors * Developer's Manual", February 2002, Order Number: 278522-001 * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual", * March 2003, Order Number: 278638-002 * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual" * March 2003, Order Number: 278693-001 * */ #ifndef PXA2X0_UDC_H #define PXA2X0_UDC_H #include #if LANGUAGE == C #include #endif #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255) #define PXA2X0_NOPXA255 #endif #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260) #define PXA2X0_NOPXA260 #endif /* UDC Registers */ #define UDC_BASE 0x40600000 #if LANGUAGE == C typedef volatile struct UDC_registers { uint32_t udccr; uint32_t __reserved1; #if !defined(PXA2X0_NOPXA255) uint32_t udccfr; #else /* PXA255 and above only */ uint32_t __reserved2; #endif uint32_t __reserved3; uint32_t udccs[16]; uint32_t uicr0; uint32_t uicr1; uint32_t usir0; uint32_t usir1; uint32_t ufnhr; /* see 12.6.12 in [1] */ uint32_t ufnlr; /* see 12.6.13 in [1] */ uint32_t ubcr2; uint32_t ubcr4; uint32_t ubcr7; uint32_t ubcr9; uint32_t ubcr12; uint32_t ubcr14; uint32_t uddr0; uint32_t __reserved4[7]; uint32_t uddr5; uint32_t __reserved5[7]; uint32_t uddr10; uint32_t __reserved6[7]; uint32_t uddr15; uint32_t __reserved7[7]; uint32_t uddr1; uint32_t __reserved8[31]; uint32_t uddr2; uint32_t __reserved9[31]; uint32_t uddr3; uint32_t __reserved10[127]; uint32_t uddr4; uint32_t __reserved11[127]; uint32_t uddr6; uint32_t __reserved12[31]; uint32_t uddr7; uint32_t __reserved13[31]; uint32_t uddr8; uint32_t __reserved14[127]; uint32_t uddr9; uint32_t __reserved15[127]; uint32_t uddr11; uint32_t __reserved16[31]; uint32_t uddr12; uint32_t __reserved17[31]; uint32_t uddr13; uint32_t __reserved18[127]; uint32_t uddr14; } UDC_registers_t; #ifdef PXA2X0_UNMAPPED #define UDC_pointer ((UDC_registers_t*) UDC_BASE) #endif #define UDCCR UDC_pointer->udccr #if !defined(PXA2X0_NOPXA255) #define UDCCFR UDC_pointer->udccfr #endif /* PXA255 and above only */ #define UDCCS(i) UDC_pointer->udccs[i] #define UDCCS0 UDCCS(0) #define UDCCS1 UDCCS(1) #define UDCCS2 UDCCS(2) #define UDCCS3 UDCCS(3) #define UDCCS4 UDCCS(4) #define UDCCS5 UDCCS(5) #define UDCCS6 UDCCS(6) #define UDCCS7 UDCCS(7) #define UDCCS8 UDCCS(8) #define UDCCS9 UDCCS(9) #define UDCCS10 UDCCS(10) #define UDCCS11 UDCCS(11) #define UDCCS12 UDCCS(12) #define UDCCS13 UDCCS(13) #define UDCCS14 UDCCS(14) #define UDCCS15 UDCCS(15) #define UFNHR UDC_pointer->ufnhr #define UFNLR UDC_pointer->ufnlr #define UBCR2 UDC_pointer->ubcr2 #define UBCR4 UDC_pointer->ubcr4 #define UBCR7 UDC_pointer->ubcr7 #define UBCR9 UDC_pointer->ubcr9 #define UBCR12 UDC_pointer->ubcr12 #define UBCR14 UDC_pointer->ubcr14 #define UDDR0 UDC_pointer->uddr0 #define UDDR1 UDC_pointer->uddr1 #define UDDR2 UDC_pointer->uddr2 #define UDDR3 UDC_pointer->uddr3 #define UDDR4 UDC_pointer->uddr4 #define UDDR5 UDC_pointer->uddr5 #define UDDR6 UDC_pointer->uddr6 #define UDDR7 UDC_pointer->uddr7 #define UDDR8 UDC_pointer->uddr8 #define UDDR9 UDC_pointer->uddr9 #define UDDR10 UDC_pointer->uddr10 #define UDDR11 UDC_pointer->uddr11 #define UDDR12 UDC_pointer->uddr12 #define UDDR13 UDC_pointer->uddr13 #define UDDR14 UDC_pointer->uddr14 #define UDDR15 UDC_pointer->uddr15 #define UICR0 UDC_pointer->uicr0 #define UICR1 UDC_pointer->uicr1 #define USIR0 UDC_pointer->usir0 #define USIR1 UDC_pointer->usir1 #endif /* LANGUAGE == C */ #define UDCCR_OFFSET 0x000 #if !defined(PXA2X0_NOPXA255) #define UDCCFR_OFFSET 0x008 #endif /* PXA255 and above only */ #define UDCCS_OFFSET(i) (0x010 + ((i) << 2)) #define UDCCS0_OFFSET UDCCS_OFFSET(0) #define UDCCS1_OFFSET UDCCS_OFFSET(1) #define UDCCS2_OFFSET UDCCS_OFFSET(2) #define UDCCS3_OFFSET UDCCS_OFFSET(3) #define UDCCS4_OFFSET UDCCS_OFFSET(4) #define UDCCS5_OFFSET UDCCS_OFFSET(5) #define UDCCS6_OFFSET UDCCS_OFFSET(6) #define UDCCS7_OFFSET UDCCS_OFFSET(7) #define UDCCS8_OFFSET UDCCS_OFFSET(8) #define UDCCS9_OFFSET UDCCS_OFFSET(9) #define UDCCS10_OFFSET UDCCS_OFFSET(10) #define UDCCS11_OFFSET UDCCS_OFFSET(11) #define UDCCS12_OFFSET UDCCS_OFFSET(12) #define UDCCS13_OFFSET UDCCS_OFFSET(13) #define UDCCS14_OFFSET UDCCS_OFFSET(14) #define UDCCS15_OFFSET UDCCS_OFFSET(15) #define UFNHR_OFFSET 0x060 #define UFNLR_OFFSET 0x064 #define UBCR2_OFFSET 0x068 #define UBCR4_OFFSET 0x06C #define UBCR7_OFFSET 0x070 #define UBCR9_OFFSET 0x074 #define UBCR12_OFFSET 0x078 #define UBCR14_OFFSET 0x07C #define UDDR0_OFFSET 0x080 #define UDDR1_OFFSET 0x100 #define UDDR2_OFFSET 0x180 #define UDDR3_OFFSET 0x200 #define UDDR4_OFFSET 0x400 #define UDDR5_OFFSET 0x0A0 #define UDDR6_OFFSET 0x600 #define UDDR7_OFFSET 0x680 #define UDDR8_OFFSET 0x700 #define UDDR9_OFFSET 0x900 #define UDDR10_OFFSET 0x0C0 #define UDDR11_OFFSET 0xB00 #define UDDR12_OFFSET 0xB80 #define UDDR13_OFFSET 0xC00 #define UDDR14_OFFSET 0xE00 #define UDDR15_OFFSET 0x0E0 #define UICR0_OFFSET 0x050 #define UICR1_OFFSET 0x054 #define USIR0_OFFSET 0x058 #define USIR1_OFFSET 0x05C /* UDCCR bits - see Table 12-20 in [1], Table 12-12 in [2], Table 12-12 in [3] */ #define UDCCR_REM bit(7) #define UDCCR_RSTIR bit(6) #define UDCCR_SRM bit(5) #define UDCCR_SUSIR bit(4) #define UDCCR_RESIR bit(3) #define UDCCR_RSM bit(2) #define UDCCR_UDA bit(1) #define UDCCR_UDE bit(0) #if !defined(PXA2X0_NOPXA255) /* UDCCFR bits - see Table 12-13 in [3] */ #define UDCCFR_AREN bit(7) #define UDCCFR_ACM bit(2) #endif /* PXA255 and above only */ /* UDCCS0 bits - see Table 12-21 in [1], Table 12-13 in [2], Table 12-14 in [3] */ #define UDCCS0_SA bit(7) #define UDCCS0_RNE bit(6) #define UDCCS0_FST bit(5) #define UDCCS0_SST bit(4) #define UDCCS0_DRWF bit(3) #define UDCCS0_FTF bit(2) #define UDCCS0_IPR bit(1) #define UDCCS0_OPR bit(0) /* UDCCS1 bits - see Table 12-22 in [1], Table 12-14 in [2], Table 12-15 in [3] */ #define UDCCS1_TSP bit(7) #define UDCCS1_FST bit(5) #define UDCCS1_SST bit(4) #define UDCCS1_TUR bit(3) #define UDCCS1_FTF bit(2) #define UDCCS1_TPC bit(1) #define UDCCS1_TFS bit(0) /* UDCCS2 bits - see Table 12-23 in [1], Table 12-15 in [2], Table 12-16 in [3] */ #define UDCCS2_RSP bit(7) #define UDCCS2_RNE bit(6) #define UDCCS2_FST bit(5) #define UDCCS2_SST bit(4) #define UDCCS2_DME bit(3) #define UDCCS2_RPC bit(1) #define UDCCS2_RFS bit(0) /* UDCCS3 bits - see Table 12-24 in [1], Table 12-16 in [2], Table 12-17 in [3] */ #define UDCCS3_TSP bit(7) #define UDCCS3_TUR bit(3) #define UDCCS3_FTF bit(2) #define UDCCS3_TPC bit(1) #define UDCCS3_TFS bit(0) /* UDCCS4 bits - see Table 12-25 in [1], Table 12-17 in [2], Table 12-18 in [3] */ #define UDCCS4_RSP bit(7) #define UDCCS4_RNE bit(6) #define UDCCS4_DME bit(3) #define UDCCS4_ROF bit(2) #define UDCCS4_RPC bit(1) #define UDCCS4_RFS bit(0) /* UDCCS5 bits - see Table 12-26 in [1], Table 12-18 in [2], Table 12-19 in [3] */ #define UDCCS5_TSP bit(7) #define UDCCS5_FST bit(5) #define UDCCS5_SST bit(4) #define UDCCS5_TUR bit(3) #define UDCCS5_FTF bit(2) #define UDCCS5_TPC bit(1) #define UDCCS5_TFS bit(0) /* UDCCS6 bits - see Table 12-22 in [1], Table 12-14 in [2], Table 12-15 in [3] */ #define UDCCS6_TSP bit(7) #define UDCCS6_FST bit(5) #define UDCCS6_SST bit(4) #define UDCCS6_TUR bit(3) #define UDCCS6_FTF bit(2) #define UDCCS6_TPC bit(1) #define UDCCS6_TFS bit(0) /* UDCCS7 bits - see Table 12-23 in [1], Table 12-15 in [2], Table 12-16 in [3] */ #define UDCCS7_RSP bit(7) #define UDCCS7_RNE bit(6) #define UDCCS7_FST bit(5) #define UDCCS7_SST bit(4) #define UDCCS7_DME bit(3) #define UDCCS7_RPC bit(1) #define UDCCS7_RFS bit(0) /* UDCCS8 bits - see Table 12-24 in [1], Table 12-16 in [2], Table 12-17 in [3] */ #define UDCCS8_TSP bit(7) #define UDCCS8_TUR bit(3) #define UDCCS8_FTF bit(2) #define UDCCS8_TPC bit(1) #define UDCCS8_TFS bit(0) /* UDCCS9 bits - see Table 12-25 in [1], Table 12-17 in [2], Table 12-18 in [3] */ #define UDCCS9_RSP bit(7) #define UDCCS9_RNE bit(6) #define UDCCS9_DME bit(3) #define UDCCS9_ROF bit(2) #define UDCCS9_RPC bit(1) #define UDCCS9_RFS bit(0) /* UDCCS10 bits - see Table 12-26 in [1], Table 12-18 in [2], Table 12-19 in [3] */ #define UDCCS10_TSP bit(7) #define UDCCS10_FST bit(5) #define UDCCS10_SST bit(4) #define UDCCS10_TUR bit(3) #define UDCCS10_FTF bit(2) #define UDCCS10_TPC bit(1) #define UDCCS10_TFS bit(0) /* UDCCS11 bits - see Table 12-22 in [1], Table 12-14 in [2], Table 12-15 in [3] */ #define UDCCS11_TSP bit(7) #define UDCCS11_FST bit(5) #define UDCCS11_SST bit(4) #define UDCCS11_TUR bit(3) #define UDCCS11_FTF bit(2) #define UDCCS11_TPC bit(1) #define UDCCS11_TFS bit(0) /* UDCCS12 bits - see Table 12-23 in [1], Table 12-15 in [2], Table 12-16 in [3] */ #define UDCCS12_RSP bit(7) #define UDCCS12_RNE bit(6) #define UDCCS12_FST bit(5) #define UDCCS12_SST bit(4) #define UDCCS12_DME bit(3) #define UDCCS12_RPC bit(1) #define UDCCS12_RFS bit(0) /* UDCCS13 bits - see Table 12-24 in [1], Table 12-16 in [2], Table 12-17 in [3] */ #define UDCCS13_TSP bit(7) #define UDCCS13_TUR bit(3) #define UDCCS13_FTF bit(2) #define UDCCS13_TPC bit(1) #define UDCCS13_TFS bit(0) /* UDCCS14 bits - see Table 12-25 in [1], Table 12-17 in [2], Table 12-18 in [3] */ #define UDCCS14_RSP bit(7) #define UDCCS14_RNE bit(6) #define UDCCS14_DME bit(3) #define UDCCS14_ROF bit(2) #define UDCCS14_RPC bit(1) #define UDCCS14_RFS bit(0) /* UDCCS15 bits - see Table 12-26 in [1], Table 12-18 in [2], Table 12-19 in [3] */ #define UDCCS15_TSP bit(7) #define UDCCS15_FST bit(5) #define UDCCS15_SST bit(4) #define UDCCS15_TUR bit(3) #define UDCCS15_FTF bit(2) #define UDCCS15_TPC bit(1) #define UDCCS15_TFS bit(0) /* UICR0 bits - see Table 12-27 in [1], Table 12-19 in [2], Table 12-20 in [3] */ #define UICR0_IM7 bit(7) #define UICR0_IM6 bit(6) #define UICR0_IM5 bit(5) #define UICR0_IM4 bit(4) #define UICR0_IM3 bit(3) #define UICR0_IM2 bit(2) #define UICR0_IM1 bit(1) #define UICR0_IM0 bit(0) /* UICR1 bits - see Table 12-28 in [1], Table 12-20 in [2], Table 12-21 in [3] */ #define UICR1_IM15 bit(7) #define UICR1_IM14 bit(6) #define UICR1_IM13 bit(5) #define UICR1_IM12 bit(4) #define UICR1_IM11 bit(3) #define UICR1_IM10 bit(2) #define UICR1_IM9 bit(1) #define UICR1_IM8 bit(0) /* USIR0 bits - see Table 12-29 in [1], Table 12-21 in [2], Table 12-22 in [3] */ #define USIR0_IR7 bit(7) #define USIR0_IR6 bit(6) #define USIR0_IR5 bit(5) #define USIR0_IR4 bit(4) #define USIR0_IR3 bit(3) #define USIR0_IR2 bit(2) #define USIR0_IR1 bit(1) #define USIR0_IR0 bit(0) /* USIR1 bits - see Table 12-30 in [1], Table 12-22 in [2], Table 12-23 in [3] */ #define USIR1_IR15 bit(7) #define USIR1_IR14 bit(6) #define USIR1_IR13 bit(5) #define USIR1_IR12 bit(4) #define USIR1_IR11 bit(3) #define USIR1_IR10 bit(2) #define USIR1_IR9 bit(1) #define USIR1_IR8 bit(0) /* UFNHR bits - see Table 12-31 in [1], Table 12-23 in [2], Table 12-24 in [3] */ #define UFNHR_SIR bit(7) #define UFNHR_SIM bit(6) #define UFNHR_IPE14 bit(5) #define UFNHR_IPE9 bit(4) #define UFNHR_IPE4 bit(3) #define UFNHR_FNMSB_MASK bits(2,0) #define UFNHR_FNMSB(x) bits_val(2,0,x) #define get_UFNHR_FNMSB(x) bits_get(2,0,x) /* UFNLR bits - see Table 12-32 in [1], Table 12-24 in [2], Table 12-25 in [3] */ #define UNFLR_FNLSB_MASK bits(7,0) #define UFNLR_FNLSB(x) bits_val(7,0,x) #define get_UFNLR_FNLSB(x) bits_get(7,0,x) /* UBCRx bits - see Table 12-33 in [1], Table 12-25 in [2], Table 12-26 in [3] */ #define UBCR_BC_MASK bits(7,0) #define UBCR_BC(x) bits_val(7,0,x) #define get_UBCR_BC(x) bits_get(7,0,x) /* UDDRx bits - see 12.6.15 - 12.6.20 in [1], 12.6.15 - 12.6.20 in [2], 12.6.16 - 12.6.21 in [3] */ #define UDDR_DATA_MASK bits(7,0) #define UDDR_DATA(x) bits_val(7,0,x) #define get_UDDR_DATA(x) bits_get(7,0,x) #endif /* PXA2X0_UDC_H */ openwince-include-0.3.2.orig/arm/sa11x0/0040755000175000017500000000000007741657356015333 5ustar p2p2openwince-include-0.3.2.orig/arm/sa11x0/gpclk.h0100644000175000017500000000536207560706540016574 0ustar p2p2/* * $Id: gpclk.h,v 1.7 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 GPCLK Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_GPCLK_H #define SA11X0_GPCLK_H #include #if LANGUAGE == C #include #endif /* GPCLK Registers (Serial Port 1) */ #define GPCLK_BASE 0x80020060 #if LANGUAGE == C typedef volatile struct GPCLK_registers { uint32_t gpclkr0; uint32_t gpclkr1; uint32_t __reserved; uint32_t gpclkr2; uint32_t gpclkr3; } GPCLK_registers_t; #ifdef SA11X0_UNMAPPED #define GPCLK_pointer ((GPCLK_registers_t*) GPCLK_BASE) #endif #define GPCLKR0 GPCLK_pointer->gpclkr0 #define GPCLKR1 GPCLK_pointer->gpclkr1 #define GPCLKR2 GPCLK_pointer->gpclkr2 #define GPCLKR3 GPCLK_pointer->gpclkr3 #endif /* LANGUAGE == C */ #define GPCLKR0_OFFSET 0x00 #define GPCLKR1_OFFSET 0x04 #define GPCLKR2_OFFSET 0x0C #define GPCLKR3_OFFSET 0x10 /* GPCLKR0 bits */ #define GPCLKR0_SCD bit(5) #define GPCLKR0_SCE bit(4) #define GPCLKR0_SUS bit(0) /* GPCLKR1 bits */ #define GPCLKR1_TXE bit(1) #endif /* SA11X0_GPCLK_H */ openwince-include-0.3.2.orig/arm/sa11x0/gpio.h0100644000175000017500000000543607560706540016434 0ustar p2p2/* * $Id: gpio.h,v 1.6 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 GPIO Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_GPIO_H #define SA11X0_GPIO_H #include #if LANGUAGE == C #include #endif /* GPIO Registers */ #define GPIO_BASE 0x90040000 #if LANGUAGE == C typedef volatile struct GPIO_registers { uint32_t gplr; uint32_t gpdr; uint32_t gpsr; uint32_t gpcr; uint32_t grer; uint32_t gfer; uint32_t gedr; uint32_t gafr; } GPIO_registers_t; #ifdef SA11X0_UNMAPPED #define GPIO_pointer ((GPIO_registers_t*) GPIO_BASE) #endif #define GPLR GPIO_pointer->gplr #define GPDR GPIO_pointer->gpdr #define GPSR GPIO_pointer->gpsr #define GPCR GPIO_pointer->gpcr #define GRER GPIO_pointer->grer #define GFER GPIO_pointer->gfer #define GEDR GPIO_pointer->gedr #define GAFR GPIO_pointer->gafr #endif /* LANGUAGE == C */ #define GPLR_OFFSET 0x00 #define GPDR_OFFSET 0x04 #define GPSR_OFFSET 0x08 #define GPCR_OFFSET 0x0C #define GRER_OFFSET 0x10 #define GFER_OFFSET 0x14 #define GEDR_OFFSET 0x18 #define GAFR_OFFSET 0x1C #endif /* SA11X0_GPIO_H */ openwince-include-0.3.2.orig/arm/sa11x0/hssp.h0100644000175000017500000000634007560706540016446 0ustar p2p2/* * $Id: hssp.h,v 1.5 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 ICP - HSSP Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_HSSP_H #define SA11X0_HSSP_H #include #if LANGUAGE == C #include #endif /* ICP - HSSP Registers (Serial Port 2) */ #define HSSP_BASE 0x80040060 #if LANGUAGE == C typedef volatile struct HSSP_registers { uint32_t hscr0; uint32_t hscr1; uint32_t __reserved1; uint32_t hsdr; uint32_t __reserved2; uint32_t hssr0; uint32_t hssr1; } HSSP_registers_t; #ifdef SA11X0_UNMAPPED #define HSSP_pointer ((HSSP_registers_t*) HSSP_BASE) #endif #define HSCR0 HSSP_pointer->hscr0 #define HSCR1 HSSP_pointer->hscr1 #define HSDR HSSP_pointer->hsdr #define HSSR0 HSSP_pointer->hssr0 #define HSSR1 HSSP_pointer->hssr1 #endif /* LANGUAGE == C */ #define HSCR0_OFFSET 0x00 #define HSCR1_OFFSET 0x04 #define HSDR_OFFSET 0x0C #define HSSR0_OFFSET 0x14 #define HSSR1_OFFSET 0x18 /* HSCR0 bits */ #define HSCR0_AME bit(7) #define HSCR0_TIE bit(6) #define HSCR0_RIE bit(5) #define HSCR0_RXE bit(4) #define HSCR0_TXE bit(3) #define HSCR0_TUS bit(2) #define HSCR0_LBM bit(1) #define HSCR0_ITR bit(0) /* HSSR0 bits */ #define HSSR0_FRE bit(5) #define HSSR0_RFS bit(4) #define HSSR0_TFS bit(3) #define HSSR0_RAB bit(2) #define HSSR0_TUR bit(1) #define HSSR0_EIF bit(0) /* HSSR1 bits */ #define HSSR1_ROR bit(6) #define HSSR1_CRE bit(5) #define HSSR1_EOF bit(4) #define HSSR1_TNF bit(3) #define HSSR1_RNE bit(2) #define HSSR1_TBY bit(1) #define HSSR1_RSY bit(0) #endif /* SA11X0_HSSP_H */ openwince-include-0.3.2.orig/arm/sa11x0/ic.h0100644000175000017500000000531607560706540016066 0ustar p2p2/* * $Id: ic.h,v 1.5 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 Interrupt Controller Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_IC_H #define SA11X0_IC_H #include #if LANGUAGE == C #include #endif /* Interrupt Controller Registers */ #define IC_BASE 0x90050000 #if LANGUAGE == C typedef volatile struct IC_registers { uint32_t icip; uint32_t icmr; uint32_t iclr; uint32_t iccr; uint32_t icfp; uint32_t __reserved[3]; uint32_t icpr; } IC_registers_t; #ifdef SA11X0_UNMAPPED #define IC_pointer ((IC_registers_t*) IC_BASE) #endif #define ICIP IC_pointer->icip #define ICMR IC_pointer->icmr #define ICLR IC_pointer->iclr #define ICCR IC_pointer->iccr #define ICFP IC_pointer->icfp #define ICPR IC_pointer->icpr #endif /* LANGUAGE == C */ #define ICIP_OFFSET 0x00 #define ICMR_OFFSET 0x04 #define ICLR_OFFSET 0x08 #define ICCR_OFFSET 0x0C #define ICFP_OFFSET 0x10 #define ICPR_OFFSET 0x20 /* ICCR bits */ #define ICCR_DIM bit(0) #endif /* SA11X0_IC_H */ openwince-include-0.3.2.orig/arm/sa11x0/lcd.h0100644000175000017500000000564207560706540016237 0ustar p2p2/* * $Id: lcd.h,v 1.4 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 LCD Controller Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_LCD_H #define SA11X0_LCD_H #include #if LANGUAGE == C #include #endif /* LCD Controller Registers */ #define LCD_BASE 0xB0100000 #if LANGUAGE == C typedef volatile struct LCD_registers { uint32_t lccr0; uint32_t lcsr; uint32_t __reserved[2]; uint32_t dbar1; uint32_t dcar1; uint32_t dbar2; uint32_t dcar2; uint32_t lccr1; uint32_t lccr2; uint32_t lccr3; } LCD_registers_t; #ifdef SA11X0_UNMAPPED #define LCD_pointer ((LCD_registers_t*) LCD_BASE) #endif #define LCCR0 LCD_pointer->lccr0 #define LCSR LCD_pointer->lcsr #define DBAR! LCD_pointer->dbar1 #define DCAR! LCD_pointer->dcar1 #define DBAR2 LCD_pointer->dbar2 #define DCAR2 LCD_pointer->dcar2 #define LCCR1 LCD_pointer->lccr1 #define LCCR2 LCD_pointer->lccr2 #define LCCR3 LCD_pointer->lccr3 #endif /* LANGUAGE == C */ #define LCCR0_OFFSET 0x00 #define LCSR_OFFSET 0x04 #define DBAR1_OFFSET 0x10 #define DCAR1_OFFSET 0x14 #define DBAR2_OFFSET 0x18 #define DCAR2_OFFSET 0x1C #define LCCR1_OFFSET 0x20 #define LCCR2_OFFSET 0x24 #define LCCR3_OFFSET 0x28 #endif /* SA11X0_LCD_H */ openwince-include-0.3.2.orig/arm/sa11x0/mc.h0100644000175000017500000001124407560706540016067 0ustar p2p2/* * $Id: mc.h,v 1.6 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 Memory Controller Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_MC_H #define SA11X0_MC_H #include #if LANGUAGE == C #include #endif /* Memory Controller Registers */ #define MC_BASE 0xA0000000 #if LANGUAGE == C typedef volatile struct MC_registers { uint32_t mdcnfg; uint32_t mdcas00; uint32_t mdcas01; uint32_t mdcas02; uint32_t msc0; uint32_t msc1; uint32_t mecr; uint32_t mdrefr; uint32_t mdcas20; uint32_t mdcas21; uint32_t mdcas22; uint32_t msc2; uint32_t smcnfg; } MC_registers_t; #ifdef SA11X0_UNMAPPED #define MC_pointer ((MC_registers_t*) MC_BASE) #endif #define MDCNFG MC_pointer->mdcnfg #define MDCAS00 MC_pointer->mdcas00 #define MDCAS01 MC_pointer->mdcas01 #define MDCAS02 MC_pointer->mdcas02 #define MSC0 MC_pointer->msc0 #define MSC1 MC_pointer->msc1 #define MECR MC_pointer->mecr #define MDREFR MC_pointer->mdrefr #define MDCAS20 MC_pointer->mdcas20 #define MDCAS21 MC_pointer->mdcas21 #define MDCAS22 MC_pointer->mdcas22 #define MSC2 MC_pointer->msc2 #define SMCNFG MC_pointer->smcnfg #endif /* LANGUAGE == C */ #define MDCNFG_OFFSET 0x00 #define MDCAS00_OFFSET 0x04 #define MDCAS01_OFFSET 0x08 #define MDCAS02_OFFSET 0x0C #define MSC0_OFFSET 0x10 #define MSC1_OFFSET 0x14 #define MECR_OFFSET 0x18 #define MDREFR_OFFSET 0x1C #define MDCAS20_OFFSET 0x20 #define MDCAS21_OFFSET 0x24 #define MDCAS22_OFFSET 0x28 #define MSC2_OFFSET 0x2C #define SMCNFG_OFFSET 0x30 /* MDCNFG bits - see 10.3.1 in [1] */ #define MDCNFG_TWR2_MASK bits(31,30) #define MDCNFG_TWR2(x) bits_val(31,30,x) #define MDCNFG_TDL2_MASK bits(29,28) #define MDCNFG_TDL2(x) bits_val(29,28,x) #define MDCNFG_TRP2_MASK bits(27,24) #define MDCNFG_TRP2(x) bits_val(27,24,x) #define MDCNFG_CDB22 bit(23) #define MDCNFG_DRAC2_MASK bits(22,20) #define MDCNFG_DRAC2(x) bits_val(22,20,x) #define MDCNFG_DWID2 bit(19) #define MDCNFG_DTIM2 bit(18) #define MDCNFG_DE3 bit(17) #define MDCNFG_DE2 bit(16) #define MDCNFG_TWR0_MASK bits(15,14) #define MDCNFG_TWR0(x) bits_val(15,14,x) #define MDCNFG_TDL0_MASK bits(13,12) #define MDCNFG_TDL0(x) bits_val(13,12,x) #define MDCNFG_TRP0_MASK bits(11,8) #define MDCNFG_TRP0(x) bits_val(11,8,x) #define MDCNFG_CDB20 bit(7) #define MDCNFG_DRAC0_MASK bits(6,4) #define MDCNFG_DRAC0(x) bits_val(6,4,x) #define MDCNFG_DWID0 bit(3) #define MDCNFG_DTIM0 bit(2) #define MDCNFG_DE1 bit(1) #define MDCNFG_DE0 bit(0) /* MDREFR bits - see 10.3.2 in [1] */ #define MDREFR_SLFRSH bit(31) #define MDREFR_KAPD bit(29) #define MDREFR_EAPD bit(28) #define MDREFR_K2DB2 bit(26) #define MDREFR_K2RUN bit(25) #define MDREFR_K1DB2 bit(22) #define MDREFR_K1RUN bit(21) #define MDREFR_E1PIN bit(20) #define MDREFR_K0DB2 bit(18) #define MDREFR_K0RUN bit(17) #define MDREFR_E0PIN bit(16) #define MDREFR_DRI_MASK bits(15,4) #define MDREFR_DRI(x) bits_val(15,4,x) #define MDREFR_TRASR_MASK bits(3,0) #define MDREFR_TRASR(x) bits_val(3,0,x) #endif /* SA11X0_MC_H */ openwince-include-0.3.2.orig/arm/sa11x0/mcp.h0100644000175000017500000000517507560706540016255 0ustar p2p2/* * $Id: mcp.h,v 1.4 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 MCP Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_MCP_H #define SA11X0_MCP_H #include #if LANGUAGE == C #include #endif /* MCP Registers (Serial Port 4) */ #define MCP_BASE 0x80060000 #if LANGUAGE == C typedef volatile struct MCP_registers { uint32_t mccr0; uint32_t __reserved1; uint32_t mcdr0; uint32_t mcdr1; uint32_t mcdr2; uint32_t __reserved2; uint32_t mcsr; } MCP_registers_t; #ifdef SA11X0_UNMAPPED #define MCP_pointer ((MCP_registers_t*) MCP_BASE) #endif #define MCCR0 MCP_pointer->mccr0 #define MCDR0 MCP_pointer->mcdr0 #define MCDR1 MCP_pointer->mcdr1 #define MCDR2 MCP_pointer->mcdr2 #define MCSR MCP_pointer->mcsr #endif /* LANGUAGE == C */ #define MCCR0_OFFSET 0x00 #define MCDR0_OFFSET 0x08 #define MCDR1_OFFSET 0x0C #define MCDR2_OFFSET 0x10 #define MCSR_OFFSET 0x18 #endif /* SA11X0_MCP_H */ openwince-include-0.3.2.orig/arm/sa11x0/ost.h0100644000175000017500000000522107560706540016273 0ustar p2p2/* * $Id: ost.h,v 1.4 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 OS Timer Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_OST_H #define SA11X0_OST_H #include #if LANGUAGE == C #include #endif /* OS Timer Registers */ #define OST_BASE 0x90000000 #if LANGUAGE == C typedef volatile struct OST_registers { uint32_t osmr[4]; uint32_t oscr; uint32_t ossr; uint32_t ower; uint32_t oier; } OST_registers_t; #ifdef SA11X0_UNMAPPED #define OST_pointer ((OST_registers_t*) OST_BASE) #endif #define OSMR(i) OST_pointer->osmr[i] #define OSCR OST_pointer->oscr #define OSSR OST_pointer->ossr #define OWER OST_pointer->ower #define OIER OST_pointer->oier #endif /* LANGUAGE == C */ #define OSMR0_OFFSET 0x00 #define OSMR1_OFFSET 0x04 #define OSMR2_OFFSET 0x08 #define OSMR3_OFFSET 0x0C #define OSCR_OFFSET 0x10 #define OSSR_OFFSET 0x14 #define OWER_OFFSET 0x18 #define OIER_OFFSET 0x1C #endif /* SA11X0_OST_H */ openwince-include-0.3.2.orig/arm/sa11x0/pm.h0100644000175000017500000000721707560706540016111 0ustar p2p2/* * $Id: pm.h,v 1.8 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 Power Manager Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_PM_H #define SA11X0_PM_H #include #if LANGUAGE == C #include #endif /* Power Manager Registers */ #define PM_BASE 0x90020000 #if LANGUAGE == C typedef volatile struct PM_registers { uint32_t pmcr; uint32_t pssr; uint32_t pspr; uint32_t pwer; uint32_t pcfr; uint32_t ppcr; uint32_t pgsr; uint32_t posr; } PM_registers_t; #ifdef SA11X0_UNMAPPED #define PM_pointer ((PM_registers_t*) PM_BASE) #endif #define PMCR PM_pointer->pmcr #define PSSR PM_pointer->pssr #define PSPR PM_pointer->pspr #define PWER PM_pointer->pwer #define PCFR PM_pointer->pcfr #define PPCR PM_pointer->ppcr #define PGSR PM_pointer->pgsr #define POSR PM_pointer->posr #endif /* LANGUAGE == C */ #define PMCR_OFFSET 0x00 #define PSSR_OFFSET 0x04 #define PSPR_OFFSET 0x08 #define PWER_OFFSET 0x0C #define PCFR_OFFSET 0x10 #define PPCR_OFFSET 0x14 #define PGSR_OFFSET 0x18 #define POSR_OFFSET 0x1C /* PMCR bits */ #define PMCR_SF bit(0) /* PCFR bits */ #define PCFR_FO bit(3) #define PCFR_FS bit(2) #define PCFR_FP bit(1) #define PCFR_OPDE bit(0) /* PPCR bits - see 9.5.7.3 in [1] */ #define PPCR_CCF_MASK bits(4,0) #define PPCR_CCF(x) bits_val(4,0,x) #define PPCR_CCF_59_0 PPCR_CCF(0x00) #define PPCR_CCF_73_7 PPCR_CCF(0x01) #define PPCR_CCF_88_5 PPCR_CCF(0x02) #define PPCR_CCF_103_2 PPCR_CCF(0x03) #define PPCR_CCF_118_0 PPCR_CCF(0x04) #define PPCR_CCF_132_7 PPCR_CCF(0x05) #define PPCR_CCF_147_5 PPCR_CCF(0x06) #define PPCR_CCF_162_2 PPCR_CCF(0x07) #define PPCR_CCF_176_9 PPCR_CCF(0x08) #define PPCR_CCF_191_7 PPCR_CCF(0x09) #define PPCR_CCF_206_4 PPCR_CCF(0x0A) #define PPCR_CCF_221_2 PPCR_CCF(0x0B) /* PSSR bits */ #define PSSR_PH bit(4) #define PSSR_DH bit(3) #define PSSR_VFS bit(2) #define PSSR_BFS bit(1) #define PSSR_SSS bit(0) /* POSR bits */ #define POSR_OOK bit(0) #endif /* SA11X0_PM_H */ openwince-include-0.3.2.orig/arm/sa11x0/ppc.h0100644000175000017500000000537207560706540016257 0ustar p2p2/* * $Id: ppc.h,v 1.4 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 PPC Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_PPC_H #define SA11X0_PPC_H #include #if LANGUAGE == C #include #endif /* PPC Registers */ #define PPC_BASE 0x90060000 #if LANGUAGE == C typedef volatile struct PPC_registers { uint32_t ppdr; uint32_t ppsr; uint32_t ppar; uint32_t psdr; uint32_t ppfr; uint32_t __reserved1[5]; uint32_t hscr2; uint32_t __reserved2; uint32_t mccr1; } PPC_registers_t; #ifdef SA11X0_UNMAPPED #define PPC_pointer ((PPC_registers_t*) PPC_BASE) #endif #define PPDR PPC_pointer->ppdr #define PPSR PPC_pointer->ppsr #define PPAR PPC_pointer->ppar #define PSDR PPC_pointer->psdr #define PPFR PPC_pointer->ppfr #define HSCR2 PPC_pointer->hscr2 #define MCCR1 PPC_pointer->mccr1 #endif /* LANGUAGE == C */ #define PPDR_OFFSET 0x00 #define PPSR_OFFSET 0x04 #define PPAR_OFFSET 0x08 #define PSDR_OFFSET 0x0C #define PPFR_OFFSET 0x10 #define HSCR2_OFFSET 0x28 #define MCCR1_OFFSET 0x30 #endif /* SA11X0_PPC_H */ openwince-include-0.3.2.orig/arm/sa11x0/rc.h0100644000175000017500000000465307560706540016102 0ustar p2p2/* * $Id: rc.h,v 1.4 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 Reset Controller Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_RC_H #define SA11X0_RC_H #include #if LANGUAGE == C #include #endif /* Reset Controller Registers */ #define RC_BASE 0x90030000 #if LANGUAGE == C typedef volatile struct RC_registers { uint32_t rsrr; uint32_t rcsr; uint32_t tucr; } RC_registers_t; #ifdef SA11X0_UNMAPPED #define RC_pointer ((RC_registers_t*) RC_BASE) #endif #define RSRR RC_pointer->rsrr #define RCSR RC_pointer->rcsr #define TUCR RC_pointer->tucr #endif /* LANGUAGE == C */ #define RSRR_OFFSET 0x00 #define RCSR_OFFSET 0x04 #define TUCR_OFFSET 0x08 #endif /* SA11X0_RC_H */ openwince-include-0.3.2.orig/arm/sa11x0/rtc.h0100644000175000017500000000520607560706540016261 0ustar p2p2/* * $Id: rtc.h,v 1.5 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 Real-Time Clock Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_RTC_H #define SA11X0_RTC_H #include #if LANGUAGE == C #include #endif /* Real-Time Clock Registers */ #define RTC_BASE 0x90010000 #if LANGUAGE == C typedef volatile struct RTC_registers { uint32_t rtar; uint32_t rcnr; uint32_t rttr; uint32_t __reserved; uint32_t rtsr; } RTC_registers_t; #ifdef SA11X0_UNMAPPED #define RTC_pointer ((RTC_registers_t*) RTC_BASE) #endif #define RTAR RTC_pointer->rtar #define RCNR RTC_pointer->rcnr #define RTTR RTC_pointer->rttr #define RTSR RTC_pointer->rtsr #endif /* LANGUAGE == C */ #define RTAR_OFFSET 0x00 #define RCNR_OFFSET 0x04 #define RTTR_OFFSET 0x08 #define RTSR_OFFSET 0x10 /* RTSR bits */ #define RTSR_HZE bit(3) #define RTSR_ALE bit(2) #define RTSR_HZ bit(1) #define RTSR_AL bit(0) #endif /* SA11X0_RTC_H */ openwince-include-0.3.2.orig/arm/sa11x0/ssp.h0100644000175000017500000000620507560706540016276 0ustar p2p2/* * $Id: ssp.h,v 1.5 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 SSP Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_SSP_H #define SA11X0_SSP_H #include #if LANGUAGE == C #include #endif /* SSP Registers (Serial Port 4) */ #define SSP_BASE 0x80070060 #if LANGUAGE == C typedef volatile struct SSP_registers { uint32_t sscr0; uint32_t sscr1; uint32_t __reserved1; uint32_t ssdr; uint32_t __reserved2; uint32_t sssr; } SSP_registers_t; #ifdef SA11X0_UNMAPPED #define SSP_pointer ((SSP_registers_t*) SSP_BASE) #endif #define SSCR0 SSP_pointer->sscr0 #define SSCR1 SSP_pointer->sscr1 #define SSDR SSP_pointer->ssdr #define SSSR SSP_pointer->sssr #endif /* LANGUAGE == C */ #define SSCR0_OFFSET 0x00 #define SSCR1_OFFSET 0x04 #define SSDR_OFFSET 0x0C #define SSSR_OFFSET 0x14 /* SSCR0 bits - see 11.12.9 */ #define SSCR0_SCR_MASK bits(15,8) #define SSCR0_SCR(x) bits_val(15,8,x) #define SSCR0_SSE bit(7) #define SSCR0_FRF_MASK bits(5,4) #define SSCR0_FRF(x) bits_val(5,4,x) #define SSCR0_DSS_MASK bits(3,0) #define SSCR0_DSS(x) bits_val(3,0,x) /* SSCR1 bits */ #define SSCR1_ECS bit(5) #define SSCR1_SPH bit(4) #define SSCR1_SPO bit(3) #define SSCR1_LBM bit(2) #define SSCR1_TIE bit(1) #define SSCR1_RIE bit(0) /* SSSR bits */ #define SSSR_ROR bit(6) #define SSSR_RFS bit(5) #define SSSR_TFS bit(4) #define SSSR_BSY bit(3) #define SSSR_RNE bit(2) #define SSSR_TNF bit(1) #endif /* SA11X0_SSP_H */ openwince-include-0.3.2.orig/arm/sa11x0/uart.h0100644000175000017500000001144007560706540016441 0ustar p2p2/* * $Id: uart.h,v 1.7 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 UART Registers (Serial Port 1, 2 and 3) * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_UART_H #define SA11X0_UART_H #include #if LANGUAGE == C #include #endif /* UART Registers (Serial Port 1, 2 and 3) */ #define UART1_BASE 0x80010000 #define UART2_BASE 0x80030000 #define UART3_BASE 0x80050000 #if LANGUAGE == C typedef volatile struct UART_registers { uint32_t utcr0; uint32_t utcr1; uint32_t utcr2; uint32_t utcr3; uint32_t utcr4; /* only for Serial Port 2 */ uint32_t utdr; uint32_t __reserved; uint32_t utsr0; uint32_t utsr1; } UART_registers_t; #ifdef SA11X0_UNMAPPED #define UART1_pointer ((UART_registers_t*) UART1_BASE) #define UART2_pointer ((UART_registers_t*) UART2_BASE) #define UART3_pointer ((UART_registers_t*) UART3_BASE) #endif #define UTCR0 UART_pointer->utcr0 #define UTCR1 UART_pointer->utcr1 #define UTCR2 UART_pointer->utcr2 #define UTCR3 UART_pointer->utcr3 #define UTCR4 UART_pointer->utcr4 /* only for Serial Port 2 */ #define UTDR UART_pointer->utdr #define UTSR0 UART_pointer->utsr0 #define UTSR1 UART_pointer->utsr1 /* Serial Port 1 */ #define Ser1UTCR0 UART1_pointer->utcr0 #define Ser1UTCR1 UART1_pointer->utcr1 #define Ser1UTCR2 UART1_pointer->utcr2 #define Ser1UTCR3 UART1_pointer->utcr3 #define Ser1UTDR UART1_pointer->utdr #define Ser1UTSR0 UART1_pointer->utsr0 #define Ser1UTSR1 UART1_pointer->utsr1 /* Serial Port 2 */ #define Ser2UTCR0 UART2_pointer->utcr0 #define Ser2UTCR1 UART2_pointer->utcr1 #define Ser2UTCR2 UART2_pointer->utcr2 #define Ser2UTCR3 UART2_pointer->utcr3 #define Ser2UTCR4 UART2_pointer->utcr4 #define Ser2UTDR UART2_pointer->utdr #define Ser2UTSR0 UART2_pointer->utsr0 #define Ser2UTSR1 UART2_pointer->utsr1 /* Serial Port 3 */ #define Ser3UTCR0 UART3_pointer->utcr0 #define Ser3UTCR1 UART3_pointer->utcr1 #define Ser3UTCR2 UART3_pointer->utcr2 #define Ser3UTCR3 UART3_pointer->utcr3 #define Ser3UTDR UART3_pointer->utdr #define Ser3UTSR0 UART3_pointer->utsr0 #define Ser3UTSR1 UART3_pointer->utsr1 #endif /* LANGUAGE == C */ #define UTCR0_OFFSET 0x00 #define UTCR1_OFFSET 0x04 #define UTCR2_OFFSET 0x08 #define UTCR3_OFFSET 0x0C #define UTCR4_OFFSET 0x10 /* only for Serial Port 2 */ #define UTDR_OFFSET 0x14 #define UTSR0_OFFSET 0x1C #define UTSR1_OFFSET 0x20 /* UTCR0 bits */ #define UTCR0_TCE bit(6) #define UTCR0_RCE bit(5) #define UTCR0_SCE bit(4) #define UTCR0_DSS bit(3) #define UTCR0_SBS bit(2) #define UTCR0_OES bit(1) #define UTCR0_PE bit(0) /* UTCR3 bits */ #define UTCR3_LBM bit(5) #define UTCR3_TIE bit(4) #define UTCR3_RIE bit(3) #define UTCR3_BRK bit(2) #define UTCR3_TXE bit(1) #define UTCR3_RXE bit(0) /* UTCR4 bits */ #define UTCR4_LPM bit(1) #define UTCR4_HSE bit(0) /* UTSR0 bits */ #define UTSR0_EIF bit(5) #define UTSR0_REB bit(4) #define UTSR0_RBB bit(3) #define UTSR0_RID bit(2) #define UTSR0_RFS bit(1) #define UTSR0_TFS bit(0) /* UTSR1 bits */ #define UTSR1_ROR bit(5) #define UTSR1_FRE bit(4) #define UTSR1_PRE bit(3) #define UTSR1_TNF bit(2) #define UTSR1_RNE bit(1) #define UTSR1_TBY bit(0) #endif /* SA11X0_UART_H */ openwince-include-0.3.2.orig/arm/sa11x0/udc.h0100644000175000017500000001003107560706540016234 0ustar p2p2/* * $Id: udc.h,v 1.5 2002/11/02 08:31:27 telka Exp $ * * StrongARM SA-1110 UDC Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor * Developer's Manual", October 2001, Order Number: 278240-004 * */ #ifndef SA11X0_UDC_H #define SA11X0_UDC_H #include #if LANGUAGE == C #include #endif /* UDC Registers (Serial Port 0) */ #define UDC_BASE 0x80000000 #if LANGUAGE == C typedef volatile struct UDC_registers { uint32_t udccr; uint32_t udcar; uint32_t udcomp; uint32_t udcimp; uint32_t udccs0; uint32_t udccs1; uint32_t udccs2; uint32_t udcd0; uint32_t udcwc; uint32_t __reserved1; uint32_t udcdr; uint32_t __reserved2; uint32_t udcsr; } UDC_registers_t; #ifdef SA11X0_UNMAPPED #define UDC_pointer ((UDC_registers_t*) UDC_BASE) #endif #define UDCCR UDC_pointer->udccr #define UDCAR UDC_pointer->udcar #define UDCOMP UDC_pointer->udcomp #define UDCIMP UDC_pointer->udcimp #define UDCCS0 UDC_pointer->udccs0 #define UDCCS1 UDC_pointer->udccs1 #define UDCCS2 UDC_pointer->udccs2 #define UDCD0 UDC_pointer->udcd0 #define UDCWC UDC_pointer->udcwc #define UDCDR UDC_pointer->udcdr #define UDCSR UDC_pointer->udcsr #endif /* LANGUAGE == C */ #define UDCCR_OFFSET 0x00 #define UDCAR_OFFSET 0x04 #define UDCOMP_OFFSET 0x08 #define UDCIMP_OFFSET 0x0C #define UDCCS0_OFFSET 0x10 #define UDCCS1_OFFSET 0x14 #define UDCCS2_OFFSET 0x18 #define UDCD0_OFFSET 0x1C #define UDCWC_OFFSET 0x20 #define UDCDR_OFFSET 0x28 #define UDCSR_OFFSET 0x30 /* UDCCR bits */ #define UDCCR_SUSIM bit(6) #define UDCCR_TIM bit(5) #define UDCCR_RIM bit(4) #define UDCCR_EIM bit(3) #define UDCCR_RESIM bit(2) #define UDCCR_UDA bit(1) #define UDCCR_UDD bit(0) /* UDCCS0 bits */ #define UDCCS0_SSE bit(7) #define UDCCS0_SO bit(6) #define UDCCS0_SE bit(5) #define UDCCS0_DE bit(4) #define UDCCS0_FST bit(3) #define UDCCS0_SST bit(2) #define UDCCS0_IPR bit(1) #define UDCCS0_OPR bit(0) /* UDCCS1 bits */ #define UDCCS1_RNE bit(5) #define UDCCS1_FST bit(4) #define UDCCS1_SST bit(3) #define UDCCS1_RPE bit(2) #define UDCCS1_RPC bit(1) #define UDCCS1_RFS bit(0) /* UDCCS2 bits */ #define UDCCS2_FST bit(5) #define UDCCS2_SST bit(4) #define UDCCS2_TUR bit(3) #define UDCCS2_TPE bit(2) #define UDCCS2_TPC bit(1) #define UDCCS2_TFS bit(0) /* UDCSR bits */ #define UDCSR_RSTIR bit(5) #define UDCSR_RESIR bit(4) #define UDCSR_SUSIR bit(3) #define UDCSR_TIR bit(2) #define UDCSR_RIR bit(1) #define UDCSR_EIR bit(0) #endif /* SA11X0_UDC_H */ openwince-include-0.3.2.orig/arm/arm.h0100644000175000017500000000572607646642722015250 0ustar p2p2/* * $Id: arm.h,v 1.3 2003/04/14 23:35:46 telka Exp $ * * ARM specific declarations * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * * Documentation: * [1] ARM Limited, "ARM Architecture Reference Manual", June 2000, * Order Number: ARM DDI 0100E * */ #ifndef ARM_H #define ARM_H #include /* PSR bits - see A2.5 in [1] */ #define PSR_N bit(31) #define PSR_Z bit(30) #define PSR_C bit(29) #define PSR_V bit(28) #define PSR_Q bit(27) /* E variants of the ARMV5 and above - see A2.5.1 in [1] */ #define PSR_I bit(7) #define PSR_F bit(6) #define PSR_T bit(5) #define PSR_MODE_MASK bits(4,0) #define PSR_MODE(x) ((x) & PSR_MODE_MASK) #define PSR_MODE_USR PSR_MODE(0x10) #define PSR_MODE_FIQ PSR_MODE(0x11) #define PSR_MODE_IRQ PSR_MODE(0x12) #define PSR_MODE_SVC PSR_MODE(0x13) #define PSR_MODE_ABT PSR_MODE(0x17) #define PSR_MODE_UND PSR_MODE(0x1B) #define PSR_MODE_SYS PSR_MODE(0x1F) /* ARMV4 and above */ /* System Control Coprocessor (SCC) Register 1: Control Register (CR) bits - see B2.4 in [1] */ #define SCC_CR_L4 bit(15) #define SCC_CR_RR bit(14) #define SCC_CR_V bit(13) #define SCC_CR_I bit(12) #define SCC_CR_Z bit(11) #define SCC_CR_F bit(10) #define SCC_CR_R bit(9) #define SCC_CR_S bit(8) #define SCC_CR_B bit(7) #define SCC_CR_L bit(6) #define SCC_CR_D bit(5) #define SCC_CR_P bit(4) #define SCC_CR_W bit(3) #define SCC_CR_C bit(2) #define SCC_CR_A bit(1) #define SCC_CR_M bit(0) #endif /* ARM_H */ openwince-include-0.3.2.orig/brux/0040755000175000017500000000000007741657356014517 5ustar p2p2openwince-include-0.3.2.orig/brux/bus.h0100644000175000017500000000575707730433662015462 0ustar p2p2/* * $Id: bus.h,v 1.6 2003/09/05 14:42:22 telka Exp $ * * Bus driver interface * Copyright (C) 2002, 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002, 2003. * */ #ifndef BRUX_BUS_H #define BRUX_BUS_H #include typedef struct { const char *description; uint32_t start; uint64_t length; unsigned int width; } bus_area_t; typedef struct bus bus_t; typedef struct bus_driver { const char *name; const char *description; bus_t *(*new_bus)( void ); void (*free_bus)( bus_t *bus ); void (*printinfo)( bus_t *bus ); void (*prepare)( bus_t *bus ); int (*area)( bus_t *bus, uint32_t adr, bus_area_t *area ); void (*read_start)( bus_t *bus, uint32_t adr ); uint32_t (*read_next)( bus_t *bus, uint32_t adr ); uint32_t (*read_end)( bus_t *bus ); uint32_t (*read)( bus_t *bus, uint32_t adr ); void (*write)( bus_t *bus, uint32_t adr, uint32_t data ); } bus_driver_t; struct bus { void *params; const bus_driver_t *driver; }; extern bus_t *bus; #define bus_printinfo(bus) bus->driver->printinfo(bus) #define bus_prepare(bus) bus->driver->prepare(bus) #define bus_area(bus,adr,a) bus->driver->area(bus,adr,a) #define bus_read_start(bus,adr) bus->driver->read_start(bus,adr) #define bus_read_next(bus,adr) bus->driver->read_next(bus,adr) #define bus_read_end(bus) bus->driver->read_end(bus) #define bus_read(bus,adr) bus->driver->read(bus,adr) #define bus_write(bus,adr,data) bus->driver->write(bus,adr,data) #define bus_free(bus) bus->driver->free_bus(bus) #endif /* BRUX_BUS_H */ openwince-include-0.3.2.orig/brux/cfi.h0100644000175000017500000000423007665727300015415 0ustar p2p2/* * $Id: cfi.h,v 1.1 2003/05/30 19:19:27 telka Exp $ * * Copyright (C) 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2003. * */ #ifndef BRUX_CFI_H #define BRUX_CFI_H #include #include #include typedef struct { int width; /* 1 for 8 bits, 2 for 16 bits, 4 for 32 bits, etc. */ cfi_query_structure_t cfi; } cfi_chip_t; typedef struct { bus_t *bus; uint32_t address; int bus_width; /* in cfi_chips, e.g. 4 for 32 bits */ cfi_chip_t **cfi_chips; } cfi_array_t; void cfi_array_free( cfi_array_t *cfi_array ); int cfi_detect( bus_t *bus, uint32_t adr, cfi_array_t **cfi_array ); #endif /* BRUX_CFI_H */ openwince-include-0.3.2.orig/brux/cmd.h0100644000175000017500000000371007667172330015420 0ustar p2p2/* * $Id: cmd.h,v 1.2 2003/06/03 19:19:52 telka Exp $ * * Copyright (C) 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2003. * */ #ifndef BRUX_CMD_H #define BRUX_CMD_H typedef struct { char *name; char *desc; void (*help)( void ); int (*run)( char *params[] ); } cmd_t; extern const cmd_t *cmds[]; int cmd_run( char *params[] ); int cmd_params( char *params[] ); int cmd_get_number( char *s, unsigned int *i ); #endif /* BRUX_CMD_H */ openwince-include-0.3.2.orig/brux/flash.h0100644000175000017500000000512007725163666015756 0ustar p2p2/* * $Id: flash.h,v 1.4 2003/08/27 08:49:50 telka Exp $ * * Copyright (C) 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2003. * */ #ifndef BRUX_FLASH_H #define BRUX_FLASH_H #include #include #include #include typedef struct { unsigned int bus_width; /* 1 for 8 bits, 2 for 16 bits, 4 for 32 bits, etc. */ const char *name; const char *description; int (*autodetect)( cfi_array_t *cfi_array ); void (*print_info)( cfi_array_t *cfi_array ); int (*erase_block)( cfi_array_t *cfi_array, uint32_t adr ); int (*unlock_block)( cfi_array_t *cfi_array, uint32_t adr ); int (*program)( cfi_array_t *cfi_array, uint32_t adr, uint32_t data ); void (*readarray)( cfi_array_t *cfi_array ); } flash_driver_t; #define FLASH_ERROR_NOERROR 0 #define FLASH_ERROR_INVALID_COMMAND_SEQUENCE 1 #define FLASH_ERROR_LOW_VPEN 2 #define FLASH_ERROR_BLOCK_LOCKED 3 #define FLASH_ERROR_UNKNOWN 99 void detectflash( bus_t *bus ); void flashmem( bus_t *bus, FILE *f, uint32_t addr ); void flashmsbin( bus_t *bus, FILE *f ); #endif /* BRUX_FLASH_H */ openwince-include-0.3.2.orig/device/0040755000175000017500000000000007741657356014776 5ustar p2p2openwince-include-0.3.2.orig/device/codec/0040755000175000017500000000000007741657356016053 5ustar p2p2openwince-include-0.3.2.orig/device/codec/ac97.h0100644000175000017500000000576307611737632016767 0ustar p2p2/* * $Id: ac97.h,v 1.1 2003/01/17 08:32:25 telka Exp $ * * AC97 Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "AC'97 Component Specification Revision 2.3 * Rev 1.0", April 2002 * */ #ifndef AC97_H #define AC97_H /* Baseline Audio Register Set - see 5.7 in [1] */ #define AC97_Reset 0x00 #define AC97_Master_Volume 0x02 #define AC97_Aux_Out_Volume 0x04 #define AC97_Mono_Volume 0x06 #define AC97_Master_Tone 0x08 #define AC97_PC_Beep_Volume 0x0A #define AC97_Phone_Volume 0x0C #define AC97_Mic_Volume 0x0E #define AC97_Line_In_Volume 0x10 #define AC97_CD_Volume 0x12 #define AC97_Video_Volume 0x14 #define AC97_Aux_In_Volume 0x16 #define AC97_PCM_Out_Volume 0x18 #define AC97_Record_Select 0x1A #define AC97_Record_Gain 0x1C #define AC97_Record_Gain_Mic 0x1E #define AC97_General_Purpose 0x20 #define AC97_3D_Control 0x22 #define AC97_Audio_Int_and_Paging 0x24 #define AC97_Powerdown_Ctrl_Stat 0x26 /* Extended Audio Register Set - see 5.8 in [1] */ #define AC97_Extended_Audio_ID 0x28 #define AC97_Extended_Audio_Stat_Ctrl 0x2A #define AC97_PCM_Front_DAC_Rate 0x2C #define AC97_PCM_Surr_DAC_Rate 0x2E #define AC97_PCM_LFE_DAC_Rate 0x30 #define AC97_PCM_L_R_ADC_Rate 0x32 #define AC97_Mic_ADC_Rate 0x34 #define AC97_Center_LFE_Volume 0x36 #define AC97_Surround_Volume 0x38 #define AC97_S_PDIF_Control 0x3A #define AC97_Vendor_ID1 0x7C #define AC97_Vendor_ID2 0x7E #endif /* AC97_H */ openwince-include-0.3.2.orig/device/codec/ucb1400.h0100644000175000017500000001375407611737632017301 0ustar p2p2/* * $Id: ucb1400.h,v 1.1 2003/01/17 08:32:25 telka Exp $ * * Philips UCB1400 Registers * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Philips Semiconductors, "UCB1400 Audio codec with touch screen * controller and power management monitor Rev. 02", 21 June 2002, * Order Number: 9397 750 0961 1 * */ #ifndef UCB1400_H #define UCB1400_H #include #define UCB1400_IO_Data 0x5A /* see 12.11 in [1] */ #define UCB1400_IO_Direction 0x5C /* see 12.12 in [1] */ #define UCB1400_Positive_INT_Enable 0x5E /* see 12.13 in [1] */ #define UCB1400_Negative_INT_Enable 0x60 /* see 12.14 in [1] */ #define UCB1400_INT_Clear_Status 0x62 /* see 12.15 in [1] */ #define UCB1400_Touch_Screen_Control 0x64 /* see 12.16 in [1] */ #define UCB1400_ADC_Control 0x66 /* see 12.17 in [1] */ #define UCB1400_ADC_Data 0x68 /* see 12.18 in [1] */ #define UCB1400_Feature_Control_Status_1 0x6A /* see 12.19 in [1] */ #define UCB1400_Feature_Control_Status_2 0x6C /* see 12.20 in [1] */ #define UCB1400_Test_Control 0x6E /* see 12.21 in [1] */ #define UCB1400_Extra_Interrupt 0x70 /* see 12.22 in [1] */ /* UCB1400 data/interrupt bits - see 12.11 - 12.15 in [1] */ #define UCB1400_IO9 bit(9) #define UCB1400_IO8 bit(8) #define UCB1400_IO7 bit(7) #define UCB1400_IO6 bit(6) #define UCB1400_IO5 bit(5) #define UCB1400_IO4 bit(4) #define UCB1400_IO3 bit(3) #define UCB1400_IO2 bit(2) #define UCB1400_IO1 bit(1) #define UCB1400_IO0 bit(0) /* UCB1400 interrupt bits - see 12.13 - 12.15 in [1] */ #define UCB1400_INT_OVL bit(15) #define UCB1400_INT_CLP bit(14) #define UCB1400_INT_TMX bit(13) #define UCB1400_INT_TPX bit(12) #define UCB1400_INT_ADC bit(11) /* UCB1400_Touch_Screen_Control bits - see 12.16 in [1] */ #define UCB1400_TSC_MX bit(13) #define UCB1400_TSC_PX bit(12) #define UCB1400_TSC_BIAS bit(11) #define UCB1400_TSC_HYSD bit(10) #define UCB1400_TSC_TM_MASK bits(9,8) #define UCB1400_TSC_TM(x) bits_val(9,8,x) #define UCB1400_TSC_PYG bit(7) #define UCB1400_TSC_MYG bit(6) #define UCB1400_TSC_PXG bit(5) #define UCB1400_TSC_MXG bit(4) #define UCB1400_TSC_PYP bit(3) #define UCB1400_TSC_MYP bit(2) #define UCB1400_TSC_PXP bit(1) #define UCB1400_TSC_MXP bit(0) /* UCB1400_ADC_Control bits - see 12.17 in [1] */ #define UCB1400_ADCC_AE bit(15) #define UCB1400_ADCC_AS bit(7) #define UCB1400_ADCC_EXVEN bit(5) #define UCB1400_ADCC_AI_MASK bits(4,2) #define UCB1400_ADCC_AI(x) bits_val(4,2,x) #define UCB1400_ADCC_VREFB bit(1) #define UCB1400_ADCC_ASE bit(0) #define UCB1400_ADCC_AI_TSPX UCB1400_ADCC_AI(0x0) #define UCB1400_ADCC_AI_TSMX UCB1400_ADCC_AI(0x1) #define UCB1400_ADCC_AI_TSPY UCB1400_ADCC_AI(0x2) #define UCB1400_ADCC_AI_TSMY UCB1400_ADCC_AI(0x3) #define UCB1400_ADCC_AI_AD0 UCB1400_ADCC_AI(0x4) #define UCB1400_ADCC_AI_AD1 UCB1400_ADCC_AI(0x5) #define UCB1400_ADCC_AI_AD2 UCB1400_ADCC_AI(0x6) #define UCB1400_ADCC_AI_AD3 UCB1400_ADCC_AI(0x7) /* UCB1400_ADC_Data bits - see 12.18 in [1] */ #define UCB1400_ADCD_ADV bit(15) #define UCB1400_ADCD_AD_MASK bits(9,0) #define UCB1400_ADCD_AD(x) bits_val(9,0,x) /* UCB1400_Feature_Control_Status_1 bits - see 12.19 in [1] */ #define UCB1400_FCS1_BB_MASK bits(14,11) #define UCB1400_FCS1_BB(x) bits_val(14,11,x) #define UCB1400_FCS1_TR_MASK bits(10,9) #define UCB1400_FCS1_TR(x) bits_val(10,9,x) #define UCB1400_FCS1_M_MASK bits(8,7) #define UCB1400_FCS1_M(x) bits_val(8,7,x) #define UCB1400_FCS1_HPEN bit(6) #define UCB1400_FCS1_DE bit(5) #define UCB1400_FCS1_DC bit(4) #define UCB1400_FCS1_HIPS bit(3) #define UCB1400_FCS1_GIEN bit(2) #define UCB1400_FCS1_OVFL bit(0) /* UCB1400_Feature_Control_Status_2 bits - see 12.20 in [1] */ #define UCB1400_FCS2_SMT bit(15) #define UCB1400_FCS2_SUEV_MASK bits(14,13) #define UCB1400_FCS2_SUEV(x) bits_val(14,13,x) #define UCB1400_FCS2_AVE bit(12) #define UCB1400_FCS2_AVEN_MASK bits(11,10) #define UCB1400_FCS2_AVEN(x) bits_val(11,10,x) #define UCB1400_FCS2_SLP_MASK bits(5,4) #define UCB1400_FCS2_SLP(x) bits_val(5,4,x) #define UCB1400_FCS2_EV_MASK bits(2,0) #define UCB1400_FCS2_EV(x) bits_val(2,0,x) /* UCB1400_Test_Control bits - see 12.21 in [1] */ #define UCB1400_TC_TM_MASK bits(6,0) #define UCB1400_TC_TM(x) bits_val(6,0,x) /* UCB1400_Extra_Interrupt bits - see 12.22 in [1] */ #define UCB1400_EI_CLPL bit(15) #define UCB1400_EI_CLPR bit(14) #define UCB1400_EI_CLPG bit(13) #endif /* UCB1400_H */ openwince-include-0.3.2.orig/device/flash/0040755000175000017500000000000007741657356016073 5ustar p2p2openwince-include-0.3.2.orig/device/flash/28fxxxj.h0100644000175000017500000000425007555513562017554 0ustar p2p2/* * $Id: 28fxxxj.h,v 1.1 2002/10/23 12:34:58 telka Exp $ * * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A, * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011 * */ #ifndef FLASH_28FXXXJ_H #define FLASH_28FXXXJ_H #include /* SR bits - see Table 6. in [1] */ #define SR_WSMS bit(7) #define SR_ESS bit(6) #define SR_ECLBS bit(5) #define SR_PSLBS bit(4) #define SR_VPENS bit(3) #define SR_PSS bit(2) #define SR_DPS bit(1) /* XSR bits - see Table 7. in [1] */ #define XSR_WBS bit(7) #endif /* FLASH_28FXXXJ_H */ openwince-include-0.3.2.orig/device/flash/28fxxxk.h0100644000175000017500000000472207555513562017561 0ustar p2p2/* * $Id: 28fxxxk.h,v 1.1 2002/10/23 12:34:58 telka Exp $ * * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18, * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005 * */ #ifndef FLASH_28FXXXK_H #define FLASH_28FXXXK_H #include /* RCR bits - see Table 4. in [1] */ #define RCR_RM bit(15) #define RCR_LC_MASK bits(14,11) #define RCR_LC(x) bits_val(14,11,x) #define RCR_WP bit(10) #define RCR_DH bit(9) #define RCR_WD bit(8) #define RCR_BS bit(7) #define RCR_CE bit(6) #define RCR_BL_MASK bits(2,0) #define RCR_BL(x) bits_val(2,0,x) /* SR bits - see Table 7. in [1] */ #define SR_RDY bit(7) #define SR_ES bit(6) #define SR_EE bit(5) #define SR_PE bit(4) #define SR_VE bit(3) #define SR_PS bit(2) #define SR_LE bit(1) #define SR_PS bit(0) #endif /* FLASH_28FXXXK_H */ openwince-include-0.3.2.orig/device/flash/cfi.h0100644000175000017500000001505307560706540016773 0ustar p2p2/* * $Id: cfi.h,v 1.11 2002/11/02 08:31:27 telka Exp $ * * Common Flash Memory Interface (CFI) Declarations * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] JEDEC Solid State Technology Association, "Common Flash Interface (CFI)", * September 1999, Order Number: JESD68 * [2] JEDEC Solid State Technology Association, "Common Flash Interface (CFI) ID Codes", * September 2001, Order Number: JEP137-A * */ #ifndef FLASH_CFI_H #define FLASH_CFI_H #include #if LANGUAGE == C #include #endif /* CFI commands - see Table 1 in [1] */ #define CFI_CMD_READ_ARRAY1 0xFF #define CFI_CMD_READ_ARRAY2 0xF0 #define CFI_CMD_QUERY 0x98 #define CFI_CMD_QUERY_OFFSET 0x55 /* Query identification string - see 4.3.2 in [1] */ #define CFI_QUERY_ID_OFFSET 0x10 #define PRI_VENDOR_ID_OFFSET 0x13 #define PRI_VENDOR_TABLE_ADR_OFFSET 0x15 #define ALT_VENDOR_ID_OFFSET 0x17 #define ALT_VENDOR_TABLE_ADR_OFFSET 0x19 #if LANGUAGE == C typedef struct cfi_query_identification_string { uint16_t pri_id_code; void *pri_vendor_tbl; uint16_t alt_id_code; void *alt_vendor_tbl; } cfi_query_identification_string_t; #endif /* LANGUAGE == C */ /* Algorithm command set & control interface ID codes - see Table 1 in [2] */ #define CFI_VENDOR_NULL 0x0000 #define CFI_VENDOR_INTEL_ECS 0x0001 #define CFI_VENDOR_AMD_SCS 0x0002 #define CFI_VENDOR_INTEL_SCS 0x0003 #define CFI_VENDOR_AMD_ECS 0x0004 #define CFI_VENDOR_MITSUBISHI_SCS 0x0100 #define CFI_VENDOR_MITSUBISHI_ECS 0x0101 #define CFI_VENDOR_SST_PWCS 0x0102 /* Query system interface information - see 4.3.3 in [1] */ #define VCC_MIN_WEV_OFFSET 0x1B /* Vcc Logic Supply Minimum Write/Erase voltage */ #define VCC_MAX_WEV_OFFSET 0x1C /* Vcc Logic Supply Maximum Write/Erase voltage */ #define VPP_MIN_WEV_OFFSET 0x1D /* Vpp [Programming] Supply Minimum Write/Erase voltage */ #define VPP_MAX_WEV_OFFSET 0x1E /* Vpp [Programming] Supply Maximum Write/Erase voltage */ #define TYP_SINGLE_WRITE_TIMEOUT_OFFSET 0x1F /* Typical timeout per single byte/word write */ #define TYP_BUFFER_WRITE_TIMEOUT_OFFSET 0x20 /* Typical timeout for minimum-size buffer write */ #define TYP_BLOCK_ERASE_TIMEOUT_OFFSET 0x21 /* Typical timeout per individual block erase */ #define TYP_CHIP_ERASE_TIMEOUT_OFFSET 0x22 /* Typical timeout for full chip erase */ #define MAX_SINGLE_WRITE_TIMEOUT_OFFSET 0x23 /* Maximum timeout for byte/word write */ #define MAX_BUFFER_WRITE_TIMEOUT_OFFSET 0x24 /* Maximum timeout for buffer write */ #define MAX_BLOCK_ERASE_TIMEOUT_OFFSET 0x25 /* Maximum timeout per individual block erase */ #define MAX_CHIP_ERASE_TIMEOUT_OFFSET 0x26 /* Maximum timeout for chip erase */ #if LANGUAGE == C typedef struct cfi_query_system_interface_information { uint16_t vcc_min_wev; /* in mV */ uint16_t vcc_max_wev; /* in mV */ uint16_t vpp_min_wev; /* in mV, 0 - no Vpp pin is present */ uint16_t vpp_max_wev; /* in mV, 0 - no Vpp pin is present */ uint32_t typ_single_write_timeout; /* in us, 0 - not supported */ uint32_t typ_buffer_write_timeout; /* in us, 0 - not supported */ uint32_t typ_block_erase_timeout; /* in ms, 0 - not supported */ uint32_t typ_chip_erase_timeout; /* in ms, 0 - not supported */ uint32_t max_single_write_timeout; /* in us, 0 - not supported */ uint32_t max_buffer_write_timeout; /* in us, 0 - not supported */ uint32_t max_block_erase_timeout; /* in ms, 0 - not supported */ uint32_t max_chip_erase_timeout; /* in ms, 0 - not supported */ } cfi_query_system_interface_information_t; #endif /* LANGUAGE == C */ /* Device geometry definition - see 4.3.4 in [1] */ #define DEVICE_SIZE_OFFSET 0x27 /* Device Size */ #define FLASH_DEVICE_INTERFACE_OFFSET 0x28 /* Flash Device Interface description */ #define MAX_BYTES_WRITE_OFFSET 0x2A /* Maximum number of bytes in multi-byte write */ #define NUMBER_OF_ERASE_REGIONS_OFFSET 0x2C /* Number of Erase Block Regions */ #define ERASE_BLOCK_REGION_OFFSET 0x2D /* Erase Block Region Information */ #if LANGUAGE == C typedef struct cfi_erase_block_region cfi_erase_block_region_t; typedef struct cfi_device_geometry { uint32_t device_size; /* in B */ uint16_t device_interface; /* see Table 2 in [2] */ uint32_t max_bytes_write; /* in B */ uint8_t number_of_erase_regions; cfi_erase_block_region_t *erase_block_regions; } cfi_device_geometry_t; struct cfi_erase_block_region { uint32_t erase_block_size; /* in B */ uint32_t number_of_erase_blocks; }; #endif /* LANGUAGE == C */ /* Device interface code assignments (for cfi_device_geometry.device_interface) - see Table 2 in [2] */ #define CFI_INTERFACE_X8 0 #define CFI_INTERFACE_X16 1 #define CFI_INTERFACE_X8_X16 2 #define CFI_INTERFACE_X32 3 #define CFI_INTERFACE_X16_X32 4 /* CFI Query structure - see 4.3.1 in [1] */ #if LANGUAGE == C typedef struct cfi_query_structure { cfi_query_identification_string_t identification_string; cfi_query_system_interface_information_t system_interface_info; cfi_device_geometry_t device_geometry; } cfi_query_structure_t; #endif /* LANGUAGE == C */ #endif /* FLASH_CFI_H */ openwince-include-0.3.2.orig/device/flash/intel.h0100644000175000017500000001173607556757312017361 0ustar p2p2/* * $Id: intel.h,v 1.6 2002/10/27 12:40:42 telka Exp $ * * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A, * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011 * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18, * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005 * */ #ifndef FLASH_INTEL_H #define FLASH_INTEL_H #include /* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */ #define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */ #define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */ /* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */ #define CFI_INTEL_SR_READY bit(7) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_ERASE_SUSPEND bit(6) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_ERASE_ERROR bit(5) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_PROGRAM_ERROR bit(4) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_VPEN_ERROR bit(3) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_PROGRAM_SUSPEND bit(2) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_BLOCK_LOCKED bit(1) /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */ #define CFI_INTEL_SR_BEFP bit(0) /* 28FxxxK3, 28FxxxK18 */ /* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */ #define CFI_CHIP_INTEL_28F320J3A 0x0016 #define CFI_CHIPN_INTEL_28F320J3A "28F320J3A" #define CFI_CHIP_INTEL_28F640J3A 0x0017 #define CFI_CHIPN_INTEL_28F640J3A "28F640J3A" #define CFI_CHIP_INTEL_28F128J3A 0x0018 #define CFI_CHIPN_INTEL_28F128J3A "28F128J3A" /* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */ #define CFI_CHIP_INTEL_28F640K3 0x8801 #define CFI_CHIPN_INTEL_28F640K3 "28F640K3" #define CFI_CHIP_INTEL_28F128K3 0x8802 #define CFI_CHIPN_INTEL_28F128K3 "28F128K3" #define CFI_CHIP_INTEL_28F256K3 0x8803 #define CFI_CHIPN_INTEL_28F256K3 "28F256K3" #define CFI_CHIP_INTEL_28F640K18 0x8805 #define CFI_CHIPN_INTEL_28F640K18 "28F640K18" #define CFI_CHIP_INTEL_28F128K18 0x8806 #define CFI_CHIPN_INTEL_28F128K18 "28F128K18" #define CFI_CHIP_INTEL_28F256K18 0x8807 #define CFI_CHIPN_INTEL_28F256K18 "28F256K18" #endif /* FLASH_INTEL_H */ openwince-include-0.3.2.orig/std/0040755000175000017500000000000007741657356014331 5ustar p2p2openwince-include-0.3.2.orig/std/mic.h0100644000175000017500000000501507556215216015235 0ustar p2p2/* * $Id: mic.h,v 1.1 2002/10/25 10:18:54 telka Exp $ * * Manufacturer's Identification Code declarations * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * * Documentation: * [1] JEDEC Solid State Technology Association, "Standard Manufacturer's * Identification Code", September 2001, Order Number: JEP106-K * */ #ifndef STD_MIC_H #define STD_MIC_H /* Manufacturer's Identification Code - see Table 1 in [1] */ #define STD_MIC_AMD 0x01 #define STD_MICN_AMD "AMD" #define STD_MIC_AMI 0x02 #define STD_MICN_AMI "AMI" #define STD_MIC_FAIRCHILD 0x83 #define STD_MICN_FAIRCHILD "Fairchild" #define STD_MIC_FUJITSU 0x04 #define STD_MICN_FUJITSU "Fujitsu" #define STD_MIC_GTE 0x85 #define STD_MICN_GTE "GTE" #define STD_MIC_HARRIS 0x86 #define STD_MICN_HARRIS "Harris" #define STD_MIC_HITACHI 0x07 #define STD_MICN_HITACHI "Hitachi" #define STD_MIC_INMOS 0x08 #define STD_MICN_INMOS "Inmos" #define STD_MIC_INTEL 0x89 #define STD_MICN_INTEL "Intel" /* TODO */ #endif /* STD_MIC_H */ openwince-include-0.3.2.orig/tools/0040755000175000017500000000000007741657356014677 5ustar p2p2openwince-include-0.3.2.orig/tools/install-sh0100755000175000017500000001572207721077272016676 0ustar p2p2#!/bin/sh # # install - install a program, script, or datafile # # This originates from X11R5 (mit/util/scripts/install.sh), which was # later released in X11R6 (xc/config/util/install.sh) with the # following copyright and license. # # Copyright (C) 1994 X Consortium # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to # deal in the Software without restriction, including without limitation the # rights to use, copy, modify, merge, publish, distribute, sublicense, and/or # sell copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 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It can only install one file at a time, a restriction # shared with many OS's install programs. # set DOITPROG to echo to test this script # Don't use :- since 4.3BSD and earlier shells don't like it. doit="${DOITPROG-}" # put in absolute paths if you don't have them in your path; or use env. vars. mvprog="${MVPROG-mv}" cpprog="${CPPROG-cp}" chmodprog="${CHMODPROG-chmod}" chownprog="${CHOWNPROG-chown}" chgrpprog="${CHGRPPROG-chgrp}" stripprog="${STRIPPROG-strip}" rmprog="${RMPROG-rm}" mkdirprog="${MKDIRPROG-mkdir}" transformbasename="" transform_arg="" instcmd="$mvprog" chmodcmd="$chmodprog 0755" chowncmd="" chgrpcmd="" stripcmd="" rmcmd="$rmprog -f" mvcmd="$mvprog" src="" dst="" dir_arg="" while [ x"$1" != x ]; do case $1 in -c) instcmd=$cpprog shift continue;; -d) dir_arg=true shift continue;; -m) chmodcmd="$chmodprog $2" shift shift continue;; -o) chowncmd="$chownprog $2" shift shift continue;; -g) chgrpcmd="$chgrpprog $2" shift shift continue;; -s) stripcmd=$stripprog shift continue;; -t=*) transformarg=`echo $1 | sed 's/-t=//'` shift continue;; -b=*) transformbasename=`echo $1 | sed 's/-b=//'` shift continue;; *) if [ x"$src" = x ] then src=$1 else # this colon is to work around a 386BSD /bin/sh bug : dst=$1 fi shift continue;; esac done if [ x"$src" = x ] then echo "$0: no input file specified" >&2 exit 1 else : fi if [ x"$dir_arg" != x ]; then dst=$src src="" if [ -d "$dst" ]; then instcmd=: chmodcmd="" else instcmd=$mkdirprog fi else # Waiting for this to be detected by the "$instcmd $src $dsttmp" command # might cause directories to be created, which would be especially bad # if $src (and thus $dsttmp) contains '*'. if [ -f "$src" ] || [ -d "$src" ] then : else echo "$0: $src does not exist" >&2 exit 1 fi if [ x"$dst" = x ] then echo "$0: no destination specified" >&2 exit 1 else : fi # If destination is a directory, append the input filename; if your system # does not like double slashes in filenames, you may need to add some logic if [ -d "$dst" ] then dst=$dst/`basename "$src"` else : fi fi ## this sed command emulates the dirname command dstdir=`echo "$dst" | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'` # Make sure that the destination directory exists. # this part is taken from Noah Friedman's mkinstalldirs script # Skip lots of stat calls in the usual case. if [ ! -d "$dstdir" ]; then defaultIFS=' ' IFS="${IFS-$defaultIFS}" oIFS=$IFS # Some sh's can't handle IFS=/ for some reason. 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You should only need it if you modified \`acinclude.m4' or \`${configure_ac}'. You might want to install the \`Automake' and \`Perl' packages. Grab them from any GNU archive site." touch aclocal.m4 ;; autoconf) if test -z "$run" && ($1 --version) > /dev/null 2>&1; then # We have it, but it failed. exit 1 fi echo 1>&2 "\ WARNING: \`$1' is missing on your system. You should only need it if you modified \`${configure_ac}'. You might want to install the \`Autoconf' and \`GNU m4' packages. Grab them from any GNU archive site." touch configure ;; autoheader) if test -z "$run" && ($1 --version) > /dev/null 2>&1; then # We have it, but it failed. exit 1 fi echo 1>&2 "\ WARNING: \`$1' is missing on your system. You should only need it if you modified \`acconfig.h' or \`${configure_ac}'. You might want to install the \`Autoconf' and \`GNU m4' packages. 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Grab them from any GNU archive site." find . -type f -name Makefile.am -print | sed 's/\.am$/.in/' | while read f; do touch "$f"; done ;; autom4te) if test -z "$run" && ($1 --version) > /dev/null 2>&1; then # We have it, but it failed. exit 1 fi echo 1>&2 "\ WARNING: \`$1' is needed, and you do not seem to have it handy on your system. You might have modified some files without having the proper tools for further handling them. You can get \`$1Help2man' as part of \`Autoconf' from any GNU archive site." file=`echo "$*" | sed -n 's/.*--output[ =]*\([^ ]*\).*/\1/p'` test -z "$file" && file=`echo "$*" | sed -n 's/.*-o[ ]*\([^ ]*\).*/\1/p'` if test -f "$file"; then touch $file else test -z "$file" || exec >$file echo "#! /bin/sh" echo "# Created by GNU Automake missing as a replacement of" echo "# $ $@" echo "exit 0" chmod +x $file exit 1 fi ;; bison|yacc) echo 1>&2 "\ WARNING: \`$1' is missing on your system. You should only need it if you modified a \`.y' file. You may need the \`Bison' package in order for those modifications to take effect. You can get \`Bison' from any GNU archive site." rm -f y.tab.c y.tab.h if [ $# -ne 1 ]; then eval LASTARG="\${$#}" case "$LASTARG" in *.y) SRCFILE=`echo "$LASTARG" | sed 's/y$/c/'` if [ -f "$SRCFILE" ]; then cp "$SRCFILE" y.tab.c fi SRCFILE=`echo "$LASTARG" | sed 's/y$/h/'` if [ -f "$SRCFILE" ]; then cp "$SRCFILE" y.tab.h fi ;; esac fi if [ ! -f y.tab.h ]; then echo >y.tab.h fi if [ ! -f y.tab.c ]; then echo 'main() { return 0; }' >y.tab.c fi ;; lex|flex) echo 1>&2 "\ WARNING: \`$1' is missing on your system. You should only need it if you modified a \`.l' file. You may need the \`Flex' package in order for those modifications to take effect. You can get \`Flex' from any GNU archive site." rm -f lex.yy.c if [ $# -ne 1 ]; then eval LASTARG="\${$#}" case "$LASTARG" in *.l) SRCFILE=`echo "$LASTARG" | sed 's/l$/c/'` if [ -f "$SRCFILE" ]; then cp "$SRCFILE" lex.yy.c fi ;; esac fi if [ ! -f lex.yy.c ]; then echo 'main() { return 0; }' >lex.yy.c fi ;; help2man) if test -z "$run" && ($1 --version) > /dev/null 2>&1; then # We have it, but it failed. exit 1 fi echo 1>&2 "\ WARNING: \`$1' is missing on your system. You should only need it if you modified a dependency of a manual page. You may need the \`Help2man' package in order for those modifications to take effect. You can get \`Help2man' from any GNU archive site." file=`echo "$*" | sed -n 's/.*-o \([^ ]*\).*/\1/p'` if test -z "$file"; then file=`echo "$*" | sed -n 's/.*--output=\([^ ]*\).*/\1/p'` fi if [ -f "$file" ]; then touch $file else test -z "$file" || exec >$file echo ".ab help2man is required to generate this page" exit 1 fi ;; makeinfo) if test -z "$run" && (makeinfo --version) > /dev/null 2>&1; then # We have makeinfo, but it failed. exit 1 fi echo 1>&2 "\ WARNING: \`$1' is missing on your system. You should only need it if you modified a \`.texi' or \`.texinfo' file, or any other file indirectly affecting the aspect of the manual. The spurious call might also be the consequence of using a buggy \`make' (AIX, DU, IRIX). You might want to install the \`Texinfo' package or the \`GNU make' package. Grab either from any GNU archive site." file=`echo "$*" | sed -n 's/.*-o \([^ ]*\).*/\1/p'` if test -z "$file"; then file=`echo "$*" | sed 's/.* \([^ ]*\) *$/\1/'` file=`sed -n '/^@setfilename/ { s/.* \([^ ]*\) *$/\1/; p; q; }' $file` fi touch $file ;; tar) shift if test -n "$run"; then echo 1>&2 "ERROR: \`tar' requires --run" exit 1 fi # We have already tried tar in the generic part. # Look for gnutar/gtar before invocation to avoid ugly error # messages. if (gnutar --version > /dev/null 2>&1); then gnutar "$@" && exit 0 fi if (gtar --version > /dev/null 2>&1); then gtar "$@" && exit 0 fi firstarg="$1" if shift; then case "$firstarg" in *o*) firstarg=`echo "$firstarg" | sed s/o//` tar "$firstarg" "$@" && exit 0 ;; esac case "$firstarg" in *h*) firstarg=`echo "$firstarg" | sed s/h//` tar "$firstarg" "$@" && exit 0 ;; esac fi echo 1>&2 "\ WARNING: I can't seem to be able to run \`tar' with the given arguments. You may want to install GNU tar or Free paxutils, or check the command line arguments." exit 1 ;; *) echo 1>&2 "\ WARNING: \`$1' is needed, and you do not seem to have it handy on your system. You might have modified some files without having the proper tools for further handling them. Check the \`README' file, it often tells you about the needed prerequirements for installing this package. You may also peek at any GNU archive site, in case some other package would contain this missing \`$1' program." exit 1 ;; esac exit 0 openwince-include-0.3.2.orig/tools/mkinstalldirs0100755000175000017500000000370407721077276017501 0ustar p2p2#! /bin/sh # mkinstalldirs --- make directory hierarchy # Author: Noah Friedman # Created: 1993-05-16 # Public domain errstatus=0 dirmode="" usage="\ Usage: mkinstalldirs [-h] [--help] [-m mode] dir ..." # process command line arguments while test $# -gt 0 ; do case $1 in -h | --help | --h*) # -h for help echo "$usage" 1>&2 exit 0 ;; -m) # -m PERM arg shift test $# -eq 0 && { echo "$usage" 1>&2; exit 1; } dirmode=$1 shift ;; --) # stop option processing shift break ;; -*) # unknown option echo "$usage" 1>&2 exit 1 ;; *) # first non-opt arg break ;; esac done for file do if test -d "$file"; then shift else break fi done case $# in 0) exit 0 ;; esac case $dirmode in '') if mkdir -p -- . 2>/dev/null; then echo "mkdir -p -- $*" exec mkdir -p -- "$@" fi ;; *) if mkdir -m "$dirmode" -p -- . 2>/dev/null; then echo "mkdir -m $dirmode -p -- $*" exec mkdir -m "$dirmode" -p -- "$@" fi ;; esac for file do set fnord `echo ":$file" | sed -ne 's/^:\//#/;s/^://;s/\// /g;s/^#/\//;p'` shift pathcomp= for d do pathcomp="$pathcomp$d" case $pathcomp in -*) pathcomp=./$pathcomp ;; esac if test ! -d "$pathcomp"; then echo "mkdir $pathcomp" mkdir "$pathcomp" || lasterr=$? if test ! -d "$pathcomp"; then errstatus=$lasterr else if test ! -z "$dirmode"; then echo "chmod $dirmode $pathcomp" lasterr="" chmod "$dirmode" "$pathcomp" || lasterr=$? if test ! -z "$lasterr"; then errstatus=$lasterr fi fi fi fi pathcomp="$pathcomp/" done done exit $errstatus # Local Variables: # mode: shell-script # sh-indentation: 2 # End: # mkinstalldirs ends here openwince-include-0.3.2.orig/win32/0040755000175000017500000000000007741657356014501 5ustar p2p2openwince-include-0.3.2.orig/win32/stdint.h0100644000175000017500000001250007716206364016141 0ustar p2p2/* * $Id: stdint.h,v 1.1 2003/08/12 15:51:16 telka Exp $ * * stdint.h - integer types for Win32 * Copyright (C) 2003 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2003. * */ #ifndef STDINT_H #define STDINT_H #include #include /* * Integer Types */ /* Exactly-width integer types */ typedef CHAR int8_t; typedef SHORT int16_t; typedef INT32 int32_t; typedef UCHAR uint8_t; typedef WORD uint16_t; typedef UINT32 uint32_t; typedef INT64 int64_t; typedef UINT64 uint64_t; /* Minimum-width integer types */ typedef CHAR int_least8_t; typedef SHORT int_least16_t; typedef INT32 int_least32_t; typedef INT64 int_least64_t; typedef UCHAR uint_least8_t; typedef WORD uint_least16_t; typedef UINT32 uint_least32_t; typedef UINT64 uint_least64_t; /* Fastest minimum-width integer types */ typedef CHAR int_fast8_t; typedef SHORT int_fast16_t; typedef INT32 int_fast32_t; typedef INT64 int_fast64_t; typedef UCHAR uint_fast8_t; typedef WORD uint_fast16_t; typedef UINT32 uint_fast32_t; typedef UINT64 uint_fast64_t; /* Integer types capable of holding object pointers */ typedef INT_PTR intptr_t; typedef DWORD_PTR uintptr_t; /* Greatest-width integer types */ typedef INT64 intmax_t; typedef UINT64 uintmax_t; /* * Limits of Specified-Width Integer Types */ /* Limits of exact-width integer types */ #define INT8_MIN (-127 - 1) #define INT16_MIN (-32767 - 1) #define INT32_MIN (-2147483647 - 1) #define INT64_MIN (-9223372036854775807i64 - 1) #define INT8_MAX 127 #define INT16_MAX 32767 #define INT32_MAX 2147483647 #define INT64_MAX 9223372036854775807i64 #define UINT8_MAX 0xFF #define UINT16_MAX 0xFFFF #define UINT32_MAX 0xFFFFFFFF #define UINT64_MAX 0xFFFFFFFFFFFFFFFFui64 /* Limits of minimum-width integer types */ #define INT_LEAST8_MIN INT8_MIN #define INT_LEAST16_MIN INT16_MIN #define INT_LEAST32_MIN INT32_MIN #define INT_LEAST64_MIN INT64_MIN #define INT_LEAST8_MAX INT8_MAX #define INT_LEAST16_MAX INT16_MAX #define INT_LEAST32_MAX INT32_MAX #define INT_LEAST64_MAX INT64_MAX #define UINT_LEAST8_MAX UINT8_MAX #define UINT_LEAST16_MAX UINT16_MAX #define UINT_LEAST32_MAX UINT32_MAX #define UINT_LEAST64_MAX UINT64_MAX /* Limits of fastest minimum-width integer types */ #define INT_FAST8_MIN INT8_MIN #define INT_FAST16_MIN INT16_MIN #define INT_FAST32_MIN INT32_MIN #define INT_FAST64_MIN INT64_MIN #define INT_FAST8_MAX INT8_MAX #define INT_FAST16_MAX INT16_MAX #define INT_FAST32_MAX INT32_MAX #define INT_FAST64_MAX INT64_MAX #define UINT_FAST8_MAX UINT8_MAX #define UINT_FAST16_MAX UINT16_MAX #define UINT_FAST32_MAX UINT32_MAX #define UINT_FAST64_MAX UINT64_MAX /* Limits of integer types capable of holding object pointers */ #define INTPTR_MIN INT32_MIN #define INTPTR_MAX INT32_MAX #define UINTPTR_MAX UINT32_MAX /* Limits of greatest-width integer types */ #define INTMAX_MIN INT64_MIN #define INTMAX_MAX INT64_MAX #define UINTMAX_MAX UINT64_MAX /* * Limits of Other Integer Types */ /* Limits of ptrdiff_t */ #define PTRDIFF_MIN INT_MIN #define PTRDIFF_MAX INT_MAX /* Limits of sig_atomic_t */ /* N/A for Windows */ /* Limit of size_t */ #define SIZE_MAX UINT_MAX /* Limits of wchar_t */ #define WCHAR_MIN 0 #define WCHAR_MAX USHRT_MAX /* Limits of wint_t */ #define WINT_MIN WCHAR_MIN #define WINT_MAX WCHAR_MAX /* * Macros for Integer Constant Expressions */ /* Macros for minimum-width integer constant expressions */ #define INT8_C(value) (value) #define INT16_C(value) (value) #define INT32_C(value) (value) #define INT64_C(value) (value##i64) #define UINT8_C(value) (value) #define UINT16_C(value) (value) #define UINT32_C(value) (value) #define UINT64_C(value) (value##ui64) /* Macros for greatest-width integer constant expressions */ #define INTMAX_C(value) INT64_C(value) #define UINTMAX_C(value) UINT64_C(value) #endif /* STDINT_H */ openwince-include-0.3.2.orig/README0100644000175000017500000000100407725415002014365 0ustar p2p2$Id: README,v 1.1 2003/09/03 16:42:42 telka Exp $ include ======= include package is a collection of the useful independent include files for C/Assembler developers. include package is released under BSD-style license. Please read COPYING file for more info. Feedback and contributions are welcome. Homepage: http://openwince.sourceforge.net/include/ Installation instructions ------------------------- 1. Download and unpack include sources. 2. Run ./configure script. 3. Run `make`. 4. Run `make install`. openwince-include-0.3.2.orig/common.h0100644000175000017500000000445507562314412015165 0ustar p2p2/* * $Id: common.h,v 1.8 2002/11/06 22:34:50 telka Exp $ * * Common header file * Copyright (C) 2002 ETC s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the ETC s.r.o. nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Marcel Telka , 2002. * */ #ifndef COMMON_H #define COMMON_H #ifndef LANGUAGE # ifdef __ASSEMBLY__ # define LANGUAGE ASM # else # define LANGUAGE C # endif #endif #ifndef ASM #define ASM 0 #endif #ifndef C #define C 1 #endif #define MAX_BITS_ABS_VAL 1024 #define BITS_ABS(a) (((((a) + MAX_BITS_ABS_VAL) / MAX_BITS_ABS_VAL) * 2 - 1) * (a)) #define BITS_MIN(a,b) (((a) + (b) - BITS_ABS((a) - (b))) / 2) #define bit(b) (1 << (b)) #define bits(b1,b2) (((2 << BITS_ABS((b1) - (b2))) - 1) << BITS_MIN(b1,b2)) #define bits_val(b1,b2,v) (((v) << BITS_MIN(b1,b2)) & bits(b1,b2)) #define bits_get(b1,b2,v) (((v) & bits(b1,b2)) >> BITS_MIN(b1,b2)) #endif /* COMMON_H */ openwince-include-0.3.2.orig/cexcept.h0100644000175000017500000002351307557713770015342 0ustar p2p2/*=== cexcept.h 2.0.0 (2001-Jul-12-Thu) Adam M. Costello An interface for exception-handling in ANSI C (C89 and subsequent ISO standards), developed jointly with Cosmin Truta . Copyright (c) 2001 Adam M. Costello and Cosmin Truta. Everyone is hereby granted permission to do whatever they like with this file, provided that if they modify it they take reasonable steps to avoid confusing or misleading people about the authors, version, and terms of use of the derived file. The copyright holders make no guarantees regarding this file, and are not responsible for any damage resulting from its use. Only user-defined exceptions are supported, not "real" exceptions like division by zero or memory segmentation violations. If this interface is used by multiple .c files, they shouldn't include this header file directly. Instead, create a wrapper header file that includes this header file and then invokes the define_exception_type macro (see below), and let your .c files include that header file. The interface consists of one type, one well-known name, and six macros. define_exception_type(type_name); This macro is used like an external declaration. It specifies the type of object that gets copied from the exception thrower to the exception catcher. The type_name can be any type that can be assigned to, that is, a non-constant arithmetic type, struct, union, or pointer. Examples: define_exception_type(int); enum exception { out_of_memory, bad_arguments, disk_full }; define_exception_type(enum exception); struct exception { int code; const char *msg; }; define_exception_type(struct exception); Because throwing an exception causes the object to be copied (not just once, but twice), programmers may wish to consider size when choosing the exception type. struct exception_context; This type may be used after the define_exception_type() macro has been invoked. A struct exception_context must be known to both the thrower and the catcher. It is expected that there be one context for each thread that uses exceptions. It would certainly be dangerous for multiple threads to access the same context. One thread can use multiple contexts, but that is likely to be confusing and not typically useful. The application can allocate this structure in any way it pleases--automatic, static, or dynamic. The application programmer should pretend not to know the structure members, which are subject to change. struct exception_context *the_exception_context; The Try/Catch and Throw statements (described below) implicitly refer to a context, using the name the_exception_context. It is the application's responsibility to make sure that this name yields the address of a mutable (non-constant) struct exception_context wherever those statements are used. Subject to that constraint, the application may declare a variable of this name anywhere it likes (inside a function, in a parameter list, or externally), and may use whatever storage class specifiers (static, extern, etc) or type qualifiers (const, volatile, etc) it likes. Examples: static struct exception_context * const the_exception_context = &foo; { struct exception_context *the_exception_context = bar; ... } int blah(struct exception_context *the_exception_context, ...); extern struct exception_context the_exception_context[1]; The last example illustrates a trick that avoids creating a pointer object separate from the structure object. The name could even be a macro, for example: struct exception_context ec_array[numthreads]; #define the_exception_context (ec_array + thread_id) Be aware that the_exception_context is used several times by the Try/Catch/Throw macros, so it shouldn't be expensive or have side effects. The expansion must be a drop-in replacement for an identifier, so it's safest to put parentheses around it. void init_exception_context(struct exception_context *ec); For context structures allocated statically (by an external definition or using the "static" keyword), the implicit initialization to all zeros is sufficient, but contexts allocated by other means must be initialized using this macro before they are used by a Try/Catch statement. It does no harm to initialize a context more than once (by using this macro on a statically allocated context, or using this macro twice on the same context), but a context must not be re-initialized after it has been used by a Try/Catch statement. Try statement Catch (expression) statement The Try/Catch/Throw macros are capitalized in order to avoid confusion with the C++ keywords, which have subtly different semantics. A Try/Catch statement has a syntax similar to an if/else statement, except that the parenthesized expression goes after the second keyword rather than the first. As with if/else, there are two clauses, each of which may be a simple statement ending with a semicolon or a brace-enclosed compound statement. But whereas the else clause is optional, the Catch clause is required. The expression must be a modifiable lvalue (something capable of being assigned to) of the same type (disregarding type qualifiers) that was passed to define_exception_type(). If a Throw that uses the same exception context as the Try/Catch is executed within the Try clause (typically within a function called by the Try clause), and the exception is not caught by a nested Try/Catch statement, then a copy of the exception will be assigned to the expression, and control will jump to the Catch clause. If no such Throw is executed, then the assignment is not performed, and the Catch clause is not executed. The expression is not evaluated unless and until the exception is caught, which is significant if it has side effects, for example: Try foo(); Catch (p[++i].e) { ... } IMPORTANT: Jumping into or out of a Try clause (for example via return, break, continue, goto, longjmp) is forbidden--the compiler will not complain, but bad things will happen at run-time. Jumping into or out of a Catch clause is okay, and so is jumping around inside a Try clause. In many cases where one is tempted to return from a Try clause, it will suffice to use Throw, and then return from the Catch clause. Another option is to set a flag variable and use goto to jump to the end of the Try clause, then check the flag after the Try/Catch statement. IMPORTANT: The values of any non-volatile automatic variables changed within the Try clause are undefined after an exception is caught. Therefore, variables modified inside the Try block whose values are needed later outside the Try block must either use static storage or be declared with the "volatile" type qualifier. Throw expression; A Throw statement is very much like a return statement, except that the expression is required. Whereas return jumps back to the place where the current function was called, Throw jumps back to the Catch clause of the innermost enclosing Try clause. The expression must be compatible with the type passed to define_exception_type(). The exception must be caught, otherwise the program may crash. Slight limitation: If the expression is a comma-expression it must be enclosed in parentheses. Try statement Catch_anonymous statement When the value of the exception is not needed, a Try/Catch statement can use Catch_anonymous instead of Catch (expression). Everything below this point is for the benefit of the compiler. The application programmer should pretend not to know any of it, because it is subject to change. ===*/ #ifndef CEXCEPT_H #define CEXCEPT_H #include #define define_exception_type(etype) \ struct exception_context { \ jmp_buf *penv; \ int caught; \ volatile struct { etype etmp; } v; \ } /* etmp must be volatile because the application might use automatic */ /* storage for the_exception_context, and etmp is modified between */ /* the calls to setjmp() and longjmp(). A wrapper struct is used to */ /* avoid warnings about a duplicate volatile qualifier in case etype */ /* already includes it. */ #define init_exception_context(ec) ((void)((ec)->penv = 0)) #define Try \ { \ jmp_buf *exception__prev, exception__env; \ exception__prev = the_exception_context->penv; \ the_exception_context->penv = &exception__env; \ if (setjmp(exception__env) == 0) { \ if (&exception__prev) #define exception__catch(action) \ else { } \ the_exception_context->caught = 0; \ } \ else { \ the_exception_context->caught = 1; \ } \ the_exception_context->penv = exception__prev; \ } \ if (!the_exception_context->caught || action) { } \ else #define Catch(e) exception__catch(((e) = the_exception_context->v.etmp, 0)) #define Catch_anonymous exception__catch(0) /* Try ends with if(), and Catch begins and ends with else. This */ /* ensures that the Try/Catch syntax is really the same as the */ /* if/else syntax. */ /* */ /* We use &exception__prev instead of 1 to appease compilers that */ /* warn about constant expressions inside if(). Most compilers */ /* should still recognize that &exception__prev is never zero and */ /* avoid generating test code. */ #define Throw \ for (;; longjmp(*the_exception_context->penv, 1)) \ the_exception_context->v.etmp = #endif /* CEXCEPT_H */ openwince-include-0.3.2.orig/AUTHORS0100644000175000017500000000003707560441622014566 0ustar p2p2Marcel Telka openwince-include-0.3.2.orig/COPYING0100644000175000017500000000304607622455376014566 0ustar p2p2$Id: COPYING,v 1.2 2003/02/12 14:32:29 telka Exp $ Copyright (C) 2002, 2003 ETC s.r.o. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the ETC s.r.o. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. openwince-include-0.3.2.orig/ChangeLog0100644000175000017500000001723107741657072015305 0ustar p2p22003-10-11 Marcel Telka Version 0.3.2 released. 2003-10-11 Marcel Telka * configure.ac (AC_INIT): Changed version number to 0.3.2. 2003-09-05 Marcel Telka * brux/bus.h (bus_t, bus_driver_t): Separated bus_driver_t from bus_t. 2003-08-28 Marcel Telka * brux/bus.h (bus_area_t): New structure. (bus_t): Removed width member, added area member. 2003-08-27 Marcel Telka * brux/flash.h: Added FLASH_ERROR_* macros. 2003-08-20 Marcel Telka Version 0.3.1 released. 2003-08-20 Marcel Telka * configure.ac (AC_INIT): Changed version number to 0.3.1. * Makefile.am (nobase_openwinceinc_HEADERS): Removed win32/stdint.h. (noinst_HEADERS): Added win32/stdint.h. * acinclude.m4 (AX_CREATE_STDINT_H): Forced not to include other stdint.h. 2003-08-19 Marcel Telka Version 0.3 released. 2003-08-12 Marcel Telka * win32/stdint.h: New file. 2003-08-11 Marcel Telka * brux/bus.h (struct bus): Added new member 'printinfo'. 2003-07-30 Marcel Telka * configure.ac (AC_INIT): Changed version number to 0.3. (AX_CREATE_STDINT_H): Added macro invocation. (AC_CHECK_HEADERS): Added stdint.h. (AM_CONDITIONAL): Added GENERATE_STDINT_H. * Makefile.am (nobase_openwinceinc_HEADERS): Removed stdint.h. (nodist_openwinceinc_HEADERS): Added owce-stdint.h and conditionally added stdint.h. (stdint.h): Added explicit target to generate stdint.h. (CLEANFILES): Adde stdint.h. * acinclude.m4: New file. * stdint.h: File removed. 2003-06-12 Marcel Telka * brux/flash.h (flash_driver_t): Renamed 'flash_readarray' member to 'readarray'. 2003-06-10 Marcel Telka * brux/flash.h (flash_driver_t): Added new type. 2003-06-10 Marcel Telka * brux/bus.h (bus_t): Changed return type from int to unsigned int for width(). 2003-06-03 Marcel Telka * brux/cmd.h (cmds): Added external variable declaration. * brux/bus.h (bus): Ditto. 2003-06-03 Marcel Telka * brux/cmd.h: New file extracted from jtag module, file src/cmd/cmd.h. * Makefile.am (nobase_openwinceinc_HEADERS): Added brux/flash.h and brux/cmd.h. 2003-06-03 Marcel Telka * brux/flash.h: New file extracted from jtag module, file include/jtag.h. 2003-05-30 Marcel Telka * Makefile.am (nobase_openwinceinc_HEADERS): Added brux/cfi.h. * brux/cfi.h: New file extracted from include/cfi.h from jtag module. 2003-05-30 Marcel Telka * Makefile.am (nobase_openwinceinc_HEADERS): Added brux/bus.h. * brux/bus.h: New file extracted from include/bus.h from jtag module. 2003-04-26 Marcel Telka * arm/pxa2x0/ac97.h: Changed comments for PXA255. Replaced PXA2X0_NOPXA26X with PXA2X0_NOPXA255 and PXA2X0_NOPXA260. * arm/pxa2x0/cm.h: Ditto. * arm/pxa2x0/dma.h: Ditto. * arm/pxa2x0/gpio.h: Ditto. * arm/pxa2x0/i2c.h: Ditto. * arm/pxa2x0/i2s.h: Ditto. * arm/pxa2x0/ic.h: Ditto. * arm/pxa2x0/icp.h: Ditto. * arm/pxa2x0/lcd.h: Ditto. * arm/pxa2x0/mc.h: Ditto. * arm/pxa2x0/mmc.h: Ditto. * arm/pxa2x0/ost.h: Ditto. * arm/pxa2x0/pmrc.h: Ditto. * arm/pxa2x0/pwm.h: Ditto. * arm/pxa2x0/rtc.h: Ditto. * arm/pxa2x0/ssp.h: Ditto. * arm/pxa2x0/uart.h: Ditto. * arm/pxa2x0/udc.h: Ditto. * arm/pxa2x0/cm.h (CCCR_M_4): New macro for PXA255 and above. * arm/pxa2x0/udc.h (UDCCFR): New register for PXA255 and above. 2003-04-14 Marcel Telka * arm/arm.h: Added System Control Coprocessor Control Register bits. (PSR_MODE): Fixed bug in macro declaration. (PSR_MODE_MASK): Rewritten using bits() macro. 2003-04-04 Marcel Telka Version 0.2.3 released. 2003-04-02 Marcel Telka * configure.ac (AC_INIT): Changed version number to 0.2.3. 2003-04-02 Marcel Telka * stdint.h: Ported to NetBSD (thanks to Jachym Holecek). 2003-03-19 Marcel Telka Version 0.2.2 released. 2003-03-19 Marcel Telka * configure.ac (AC_INIT): Changed version number to 0.2.2. 2003-03-17 Marcel Telka * stdint.h: Ported to cygwin-1.3.21. uint8_t, uint16_t, uint32_t, uint64_t, and uintptr_t are now declared in cygwin/types.h. 2003-02-12 Marcel Telka Version 0.2.1 released. 2003-02-04 Marcel Telka * arm/pxa2x0/ac97.h: Added get_* macros for register bits. * arm/pxa2x0/cm.h: Ditto. * arm/pxa2x0/i2c.h: Ditto. * arm/pxa2x0/i2s.h: Ditto. * arm/pxa2x0/icp.h: Ditto. * arm/pxa2x0/mc.h: Ditto. * arm/pxa2x0/mmc.h: Ditto. * arm/pxa2x0/pwm.h: Ditto. * arm/pxa2x0/rtc.h: Ditto. * arm/pxa2x0/ssp.h: Ditto. * arm/pxa2x0/udc.h: Ditto. * configure.ac (AC_INIT): Changed version number to 0.2.1. (AM_INIT_AUTOMAKE): Added check-news and dist-bzip2 parameters. 2003-02-04 Marcel Telka * arm/platform.h: Removed unused file. * arm/platform/wep.h: Ditto. * arm/platform/wid.h: Ditto. 2003-01-31 Marcel Telka * arm/pxa2x0/dma.h (DCSR_BUSERRINTR): Fixed typo in macro name (patch 678112). Thanks to Daniel Samek. 2003-01-27 Marcel Telka * arm/pxa2x0/dma.h (get_DRCMR_CHLNUM): Fixed a typo. 2003-01-27 Marcel Telka * arm/pxa2x0/dma.h: Added DRCMR symbolic names and offsets (suggested by Daniel Samek, patch 675417). Added get_* macros for register bits. 2003-01-17 Marcel Telka * arm/pxa2x0/cm.h: Fixed CKEN_CKEN4 declaration. 2003-01-17 Marcel Telka * arm/pxa2x0/lcd.h: Added get_* macros for register bits. Fixed TCR_TVBS macro. 2003-01-17 Marcel Telka * ac97.h: Moved this * device/codec/ac97.h: here. * ucb1400.h: Moved this * device/codec/ucb1400.h: here. 2003-01-10 Marcel Telka * stdint.h: Ported to glibc (removed compilation warning). 2002-12-05 Marcel Telka * arm/pxa2x0/ost.h: Added OSMRx (x = 0 through 3) macros. 2002-11-28 Marcel Telka * arm/pxa2x0/mc.h: Added register bits for MECR, SXCNFG, SXMRS, MCMEMx, MCATTx, MCIOx, BOOT_DEF. 2002-11-22 Marcel Telka * arm/pxa2x0/mmc.h: Added MMC commands (from Juraj Fabo). 2002-11-20 Marcel Telka * ucb1400.h: Added UCB1400_ADCC_AI_* declarations (suggested by Juraj Fabo). 2002-11-09 Marcel Telka * arm/pxa2x0/dma.h: Added DINT register bits. 2002-11-09 Marcel Telka * COPYING: Added BSD license file. 2002-11-08 Marcel Telka Version 0.2 released. 2002-11-07 Marcel Telka * arm/pxa2x0/gpio.h: Removed GPIOs not available for PXA210. 2002-11-06 Marcel Telka * common.h: Added bits_get() macro. * arm/pxa2x0/uart.h: Added get_* macros for register bits. * arm/pxa2x0/ic.h: Added symbolic names for IRQs. 2002-11-04 Marcel Telka * arm/pxa2x0/*: Added support for Intel PXA2x0 family processors. * arm/pxa2x0/uart.h: Fixed SPR_SP declaration, removed access to STMRS register. * arm/pxa2x0/mc.h: Fixed BOOT_DEF_OFFSET declaration. * arm/pxa2x0/gpio.h: Added ALT_FN_0_IN and ALT_FN_0_OUT declarations. * arm/pxa2x0/pmrc.h: Added missing PWER_WEx (where x = 0 through 15) declarations. * arm/pxa2x0/rtc.h: Fixed RTTR bit declarations. 2002-11-02 Marcel Telka * arm/pxa2x0/*: Added _t suffix for register type names. * arm/sa11x0/*: Ditto. * device/flash/cfi.h: Removed _t suffix from structure names. 2002-11-01 Marcel Telka Version 0.1 released. openwince-include-0.3.2.orig/Makefile.am0100644000175000017500000000547007720665264015570 0ustar p2p2# # $Id: Makefile.am,v 1.21 2003/08/20 12:33:56 telka Exp $ # # Copyright (C) 2002 ETC s.r.o. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the ETC s.r.o. nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # Written by Marcel Telka , 2002. # openwinceincdir = $(includedir)/openwince nobase_openwinceinc_HEADERS = \ common.h \ cexcept.h \ arm/arm.h \ arm/sa11x0/gpclk.h \ arm/sa11x0/gpio.h \ arm/sa11x0/hssp.h \ arm/sa11x0/ic.h \ arm/sa11x0/lcd.h \ arm/sa11x0/mc.h \ arm/sa11x0/mcp.h \ arm/sa11x0/ost.h \ arm/sa11x0/pm.h \ arm/sa11x0/ppc.h \ arm/sa11x0/rc.h \ arm/sa11x0/rtc.h \ arm/sa11x0/ssp.h \ arm/sa11x0/uart.h \ arm/sa11x0/udc.h \ arm/pxa2x0/ac97.h \ arm/pxa2x0/cm.h \ arm/pxa2x0/dma.h \ arm/pxa2x0/gpio.h \ arm/pxa2x0/i2c.h \ arm/pxa2x0/i2s.h \ arm/pxa2x0/ic.h \ arm/pxa2x0/icp.h \ arm/pxa2x0/lcd.h \ arm/pxa2x0/mc.h \ arm/pxa2x0/mmc.h \ arm/pxa2x0/ost.h \ arm/pxa2x0/pmrc.h \ arm/pxa2x0/pwm.h \ arm/pxa2x0/rtc.h \ arm/pxa2x0/ssp.h \ arm/pxa2x0/uart.h \ arm/pxa2x0/udc.h \ brux/bus.h \ brux/cfi.h \ brux/cmd.h \ brux/flash.h \ device/codec/ac97.h \ device/codec/ucb1400.h \ device/flash/28fxxxj.h \ device/flash/28fxxxk.h \ device/flash/cfi.h \ device/flash/intel.h \ std/mic.h noinst_HEADERS = \ win32/stdint.h nodist_openwinceinc_HEADERS = \ owce-stdint.h if GENERATE_STDINT_H nodist_openwinceinc_HEADERS += stdint.h endif stdint.h: echo "#include " > stdint.h CLEANFILES = stdint.h openwince-include-0.3.2.orig/Makefile.in0100644000175000017500000004234707741657230015602 0ustar p2p2# Makefile.in generated by automake 1.7.6 from Makefile.am. # @configure_input@ # Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 # Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # # $Id: Makefile.am,v 1.21 2003/08/20 12:33:56 telka Exp $ # # Copyright (C) 2002 ETC s.r.o. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the ETC s.r.o. nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. 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Added FLASH_ERROR_* macros - Modified bus_t structure - Added bus_area_t and bus_driver_t structures include-0.3.1 (2003-08-20): * Removed win32/stdint.h installation in POSIX environments. * Fixed recursive stdint.h include in owce-stdint.h. include-0.3 (2003-08-19): * Changes in PXA2x0 support: - added support for Intel PXA255 processor - replaced PXA2X0_NOPXA26X conditional directive with PXA2X0_NOPXA255 and PXA2X0_NOPXA260 directives to remove support for PXA255 and above (PXA2X0_NOPXA255) or PXA260 and above (PXA2X0_NOPXA260) processor features - added CCCR_M_4 multiplier for PXA255 and above - added new register UDCCFR for PXA255 and above * Added ARM System Control Coprocessor Register 1 (Control Register) bits. * Added brux common headers. * Replaced static stdint.h with autogenerated one for POSIX environments. include-0.2.3 (2003-04-04): * Ported stdint.h to NetBSD (thanks to Jachym Holecek). include-0.2.2 (2003-03-19): * stdint.h ported to cygwin-1.3.21 and later. include-0.2.1 (2003-02-12): * Changes in PXA2x0 support: - added DINT register bits - added MMC commands (Juraj Fabo) - added register bits for MECR, SXCNFG, SXMRS, MCMEMx, MCATTx, MCIOx, BOOT_DEF - added OSMRx (x = 0 through 3) macros - added (completed) get_* macros for all register bits - fixed TCR_TVBS macro declaration - fixed CKEN_CKEN4 declaration - added symbolic names and offsets for DRCMR registers (suggested by Daniel Samek, patch 675417) - fixed typo in DCSR_BUSERRINTR macro name (patch 678112, Daniel Samek) * Added UCB1400_ADCC_AI_* declarations for UCB1400 (suggested by Juraj Fabo) * Moved ac97.h and ucb1400.h files to device/codec directory * Removed arm/platform.h and arm/platform/* files. * Minor fixes. include-0.2 (2002-11-08): * Changes in PXA2x0 support: - added support for Intel PXA26x family processors - added PXA2X0_NOPXA250 and PXA2X0_NOPXA26X conditional directives to remove support for PXA250 and above (PXA2X0_NOPXA250) or PXA26x and above (PXA2X0_NOPXA26X) processor features - removed access to STMRS register - fixed SPR_SP declaration - fixed BOOT_DEF_OFFSET declaration - added _t suffix for register type names - added ALT_FN_0_IN and ALT_FN_0_OUT declarations - added missing PWER_WEx (where x = 0 through 15) declarations - fixed RTTR bit declarations - added new get_* macros for UART register bits - added symbolic names for IRQ masks (IC_IRQ_*) * Changes in SA11x0 support: - added _t suffix for register type names * Removed _t suffix from structure names in CFI declarations. include-0.1 (2002-11-01): * Initial public release with initial support for Intel SA-11x0/PXA2x0 processors, Common Flash Interface (CFI), Intel extensions to CFI, JEDEC Manufacturer's Identification Codes, base AC'97 declarations and Philips UCB1400 support. openwince-include-0.3.2.orig/TODO0100644000175000017500000000006107617727550014215 0ustar p2p2$Id: TODO,v 1.2 2003/02/04 12:17:44 telka Exp $ openwince-include-0.3.2.orig/acinclude.m40100644000175000017500000005346507720665264015734 0ustar p2p2dnl @synopsis AX_CREATE_STDINT_H [( HEADER-TO-GENERATE [, HEDERS-TO-CHECK])] dnl dnl the "ISO C9X: 7.18 Integer types " section requires the dnl existence of an include file that defines a set of dnl typedefs, especially uint8_t,int32_t,uintptr_t. dnl Many older installations will not provide this file, but some will dnl have the very same definitions in . In other enviroments dnl we can use the inet-types in which would define the dnl typedefs int8_t and u_int8_t respectivly. dnl dnl This macros will create a local "_stdint.h" or the headerfile given as dnl an argument. In many cases that file will just "#include " dnl or "#include ", while in other environments it will provide dnl the set of basic 'stdint's definitions/typedefs: dnl int8_t,uint8_t,int16_t,uint16_t,int32_t,uint32_t,intptr_t,uintptr_t dnl int_least32_t.. int_fast32_t.. intmax_t dnl which may or may not rely on the definitions of other files, dnl or using the AC_COMPILE_CHECK_SIZEOF macro to determine the actual dnl sizeof each type. dnl dnl if your header files require the stdint-types you will want to create an dnl installable file mylib-int.h that all your other installable header dnl may include. So if you have a library package named "mylib", just use dnl AX_CREATE_STDINT_H(mylib-int.h) dnl in configure.ac and go to install that very header file in Makefile.am dnl along with the other headers (mylib.h) - and the mylib-specific headers dnl can simply use "#include " to obtain the stdint-types. dnl dnl Remember, if the system already had a valid , the generated dnl file will include it directly. No need for fuzzy HAVE_STDINT_H things... dnl dnl @, (status: used on new platforms) (see http://ac-archive.sf.net/gstdint/) dnl @version $Id: ax_create_stdint_h.m4,v 1.2 2003/02/10 01:06:52 guidod Exp $ dnl @author Guido Draheim AC_DEFUN([AX_CREATE_STDINT_H], [# ------ AX CREATE STDINT H ------------------------------------- AC_MSG_CHECKING([for stdint types]) ac_stdint_h=`echo ifelse($1, , _stdint.h, $1)` # try to shortcircuit - if the default include path of the compiler # can find a "stdint.h" header then we assume that all compilers can. AC_CACHE_VAL([ac_cv_header_stdint_t],[ old_CXXFLAGS="$CXXFLAGS" ; CXXFLAGS="" old_CPPFLAGS="$CPPFLAGS" ; CPPFLAGS="" old_CFLAGS="$CFLAGS" ; CFLAGS="" AC_TRY_COMPILE([#include ],[int_least32_t v = 0;], [ac_cv_stdint_result="(assuming C99 compatible system)" ac_cv_header_stdint_t="stdint.h"; ], [ac_cv_header_stdint_t=""]) CXXFLAGS="$old_CXXFLAGS" CPPFLAGS="$old_CPPFLAGS" CFLAGS="$old_CFLAGS" ]) v="... $ac_cv_header_stdint_h" if test "$ac_stdint_h" = "stdint.h" ; then AC_MSG_RESULT([(are you sure you want them in ./stdint.h?)]) elif test "$ac_stdint_h" = "inttypes.h" ; then AC_MSG_RESULT([(are you sure you want them in ./inttypes.h?)]) elif test "_$ac_cv_header_stdint_t" = "_" ; then AC_MSG_RESULT([(putting them into $ac_stdint_h)$v]) else ac_cv_header_stdint="$ac_cv_header_stdint_t" AC_MSG_RESULT([$ac_cv_header_stdint (shortcircuit)]) fi if test "_$ac_cv_header_stdint_t" = "_" ; then # can not shortcircuit.. dnl .....intro message done, now do a few system checks..... dnl btw, all CHECK_TYPE macros do automatically "DEFINE" a type, therefore dnl we use the autoconf implementation detail _AC CHECK_TYPE_NEW instead inttype_headers=`echo $2 | sed -e 's/,/ /g'` ac_cv_stdint_result="(no helpful system typedefs seen)" AC_CACHE_CHECK([for stdint uintptr_t], [ac_cv_header_stdint_x],[ ac_cv_header_stdint_x="" # the 1997 typedefs (inttypes.h) AC_MSG_RESULT([(..)]) for i in stdint.h inttypes.h sys/inttypes.h $inttype_headers ; do unset ac_cv_type_uintptr_t unset ac_cv_type_uint64_t _AC_CHECK_TYPE_NEW(uintptr_t,[ac_cv_header_stdint_x=$i],dnl continue,[#include <$i>]) AC_CHECK_TYPE(uint64_t,[and64="/uint64_t"],[and64=""],[#include<$i>]) ac_cv_stdint_result="(seen uintptr_t$and64 in $i)" break; done AC_MSG_CHECKING([for stdint uintptr_t]) ]) if test "_$ac_cv_header_stdint_x" = "_" ; then AC_CACHE_CHECK([for stdint uint32_t], [ac_cv_header_stdint_o],[ ac_cv_header_stdint_o="" # the 1995 typedefs (sys/inttypes.h) AC_MSG_RESULT([(..)]) for i in inttypes.h sys/inttypes.h stdint.h $inttype_headers ; do unset ac_cv_type_uint32_t unset ac_cv_type_uint64_t AC_CHECK_TYPE(uint32_t,[ac_cv_header_stdint_o=$i],dnl continue,[#include <$i>]) AC_CHECK_TYPE(uint64_t,[and64="/uint64_t"],[and64=""],[#include<$i>]) ac_cv_stdint_result="(seen uint32_t$and64 in $i)" break; done AC_MSG_CHECKING([for stdint uint32_t]) ]) fi if test "_$ac_cv_header_stdint_x" = "_" ; then if test "_$ac_cv_header_stdint_o" = "_" ; then AC_CACHE_CHECK([for stdint u_int32_t], [ac_cv_header_stdint_u],[ ac_cv_header_stdint_u="" # the BSD typedefs (sys/types.h) AC_MSG_RESULT([(..)]) for i in sys/types.h inttypes.h sys/inttypes.h $inttype_headers ; do unset ac_cv_type_u_int32_t unset ac_cv_type_u_int64_t AC_CHECK_TYPE(u_int32_t,[ac_cv_header_stdint_u=$i],dnl continue,[#include <$i>]) AC_CHECK_TYPE(u_int64_t,[and64="/u_int64_t"],[and64=""],[#include<$i>]) ac_cv_stdint_result="(seen u_int32_t$and64 in $i)" break; done AC_MSG_CHECKING([for stdint u_int32_t]) ]) fi fi dnl if there was no good C99 header file, do some typedef checks... if test "_$ac_cv_header_stdint_x" = "_" ; then AC_MSG_CHECKING([for stdint datatype model]) AC_MSG_RESULT([(..)]) AC_COMPILE_CHECK_SIZEOF(char) AC_COMPILE_CHECK_SIZEOF(short) AC_COMPILE_CHECK_SIZEOF(int) AC_COMPILE_CHECK_SIZEOF(long) AC_COMPILE_CHECK_SIZEOF(void*) ac_cv_stdint_char_model="" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_char" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_short" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_int" ac_cv_stdint_long_model="" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_int" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_long" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_voidp" name="$ac_cv_stdint_long_model" case "$ac_cv_stdint_char_model/$ac_cv_stdint_long_model" in 122/242) name="$name, IP16 (standard 16bit machine)" ;; 122/244) name="$name, LP32 (standard 32bit mac/win)" ;; 122/*) name="$name (unusual int16 model)" ;; 124/444) name="$name, ILP32 (standard 32bit unixish)" ;; 124/488) name="$name, LP64 (standard 64bit unixish)" ;; 124/448) name="$name, LLP64 (unusual 64bit unixish)" ;; 124/*) name="$name (unusual int32 model)" ;; 128/888) name="$name, ILP64 (unusual 64bit numeric)" ;; 128/*) name="$name (unusual int64 model)" ;; 222/*|444/*) name="$name (unusual dsptype)" ;; *) name="$name (very unusal model)" ;; esac AC_MSG_RESULT([combined for stdint datatype model... $name]) fi if test "_$ac_cv_header_stdint_x" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_x" elif test "_$ac_cv_header_stdint_o" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_o" elif test "_$ac_cv_header_stdint_u" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_u" else ac_cv_header_stdint="stddef.h" fi AC_MSG_CHECKING([for extra inttypes in chosen header]) AC_MSG_RESULT([($ac_cv_header_stdint)]) dnl see if int_least and int_fast types are present in _this_ header. unset ac_cv_type_int_least32_t unset ac_cv_type_int_fast32_t AC_CHECK_TYPE(int_least32_t,,,[#include <$ac_cv_header_stdint>]) AC_CHECK_TYPE(int_fast32_t,,,[#include<$ac_cv_header_stdint>]) AC_CHECK_TYPE(intmax_t,,,[#include <$ac_cv_header_stdint>]) fi # shortcircut to system "stdint.h" # ------------------ PREPARE VARIABLES ------------------------------ if test "$GCC" = "yes" ; then ac_cv_stdint_message="using gnu compiler "`$CC --version | head -1` else ac_cv_stdint_message="using $CC" fi AC_MSG_RESULT([make use of $ac_cv_header_stdint in $ac_stdint_h dnl $ac_cv_stdint_result]) # ----------------- DONE inttypes.h checks START header ------------- AC_CONFIG_COMMANDS([$ac_stdint_h],[ AC_MSG_NOTICE(creating $ac_stdint_h : $_ac_stdint_h) ac_stdint=$tmp/_stdint.h echo "#ifndef" $_ac_stdint_h >$ac_stdint echo "#define" $_ac_stdint_h "1" >>$ac_stdint echo "#ifndef" _GENERATED_STDINT_H >>$ac_stdint echo "#define" _GENERATED_STDINT_H '"'$PACKAGE $VERSION'"' >>$ac_stdint echo "/* generated $ac_cv_stdint_message */" >>$ac_stdint if test "_$ac_cv_header_stdint_t" != "_" ; then echo "#define _STDINT_HAVE_STDINT_H" "1" >>$ac_stdint fi cat >>$ac_stdint < #else #include /* .................... configured part ............................ */ STDINT_EOF echo "/* whether we have a C99 compatible stdint header file */" >>$ac_stdint if test "_$ac_cv_header_stdint_x" != "_" ; then ac_header="$ac_cv_header_stdint_x" echo "#define _STDINT_HEADER_INTPTR" '"'"$ac_header"'"' >>$ac_stdint else echo "/* #undef _STDINT_HEADER_INTPTR */" >>$ac_stdint fi echo "/* whether we have a C96 compatible inttypes header file */" >>$ac_stdint if test "_$ac_cv_header_stdint_o" != "_" ; then ac_header="$ac_cv_header_stdint_o" echo "#define _STDINT_HEADER_UINT32" '"'"$ac_header"'"' >>$ac_stdint else echo "/* #undef _STDINT_HEADER_UINT32 */" >>$ac_stdint fi echo "/* whether we have a BSD compatible inet types header */" >>$ac_stdint if test "_$ac_cv_header_stdint_u" != "_" ; then ac_header="$ac_cv_header_stdint_u" echo "#define _STDINT_HEADER_U_INT32" '"'"$ac_header"'"' >>$ac_stdint else echo "/* #undef _STDINT_HEADER_U_INT32 */" >>$ac_stdint fi echo "" >>$ac_stdint if test "_$ac_header" != "_" ; then if test "$ac_header" != "stddef.h" ; then echo "#include <$ac_header>" >>$ac_stdint echo "" >>$ac_stdint fi fi echo "/* which 64bit typedef has been found */" >>$ac_stdint if test "$ac_cv_type_uint64_t" = "yes" ; then echo "#define _STDINT_HAVE_UINT64_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_UINT64_T */" >>$ac_stdint fi if test "$ac_cv_type_u_int64_t" = "yes" ; then echo "#define _STDINT_HAVE_U_INT64_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_U_INT64_T */" >>$ac_stdint fi echo "" >>$ac_stdint echo "/* which type model has been detected */" >>$ac_stdint if test "_$ac_cv_stdint_char_model" != "_" ; then echo "#define _STDINT_CHAR_MODEL" "$ac_cv_stdint_char_model" >>$ac_stdint echo "#define _STDINT_LONG_MODEL" "$ac_cv_stdint_long_model" >>$ac_stdint else echo "/* #undef _STDINT_CHAR_MODEL // skipped */" >>$ac_stdint echo "/* #undef _STDINT_LONG_MODEL // skipped */" >>$ac_stdint fi echo "" >>$ac_stdint echo "/* whether int_least types were detected */" >>$ac_stdint if test "$ac_cv_type_int_least32_t" = "yes"; then echo "#define _STDINT_HAVE_INT_LEAST32_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_INT_LEAST32_T */" >>$ac_stdint fi echo "/* whether int_fast types were detected */" >>$ac_stdint if test "$ac_cv_type_int_fast32_t" = "yes"; then echo "#define _STDINT_HAVE_INT_FAST32_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_INT_FAST32_T */" >>$ac_stdint fi echo "/* whether intmax_t type was detected */" >>$ac_stdint if test "$ac_cv_type_intmax_t" = "yes"; then echo "#define _STDINT_HAVE_INTMAX_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_INTMAX_T */" >>$ac_stdint fi echo "" >>$ac_stdint cat >>$ac_stdint <= 199901L #define _HAVE_UINT64_T typedef long long int64_t; typedef unsigned long long uint64_t; #elif !defined __STRICT_ANSI__ #if defined _MSC_VER || defined __WATCOMC__ || defined __BORLANDC__ #define _HAVE_UINT64_T typedef __int64 int64_t; typedef unsigned __int64 uint64_t; #elif defined __GNUC__ || defined __MWERKS__ || defined __ELF__ /* note: all ELF-systems seem to have loff-support which needs 64-bit */ #if !defined _NO_LONGLONG #define _HAVE_UINT64_T typedef long long int64_t; typedef unsigned long long uint64_t; #endif #elif defined __alpha || (defined __mips && defined _ABIN32) #if !defined _NO_LONGLONG typedef long int64_t; typedef unsigned long uint64_t; #endif /* compiler/cpu type to define int64_t */ #endif #endif #endif #if defined _STDINT_HAVE_U_INT_TYPES /* int8_t int16_t int32_t defined by inet code, redeclare the u_intXX types */ typedef u_int8_t uint8_t; typedef u_int16_t uint16_t; typedef u_int32_t uint32_t; /* glibc compatibility */ #ifndef __int8_t_defined #define __int8_t_defined #endif #endif #ifdef _STDINT_NEED_INT_MODEL_T /* we must guess all the basic types. Apart from byte-adressable system, */ /* there a few 32-bit-only dsp-systems that we guard with BYTE_MODEL 8-} */ /* (btw, those nibble-addressable systems are way off, or so we assume) */ dnl /* have a look at "64bit and data size neutrality" at */ dnl /* http://unix.org/version2/whatsnew/login_64bit.html */ dnl /* (the shorthand "ILP" types always have a "P" part) */ #if defined _STDINT_BYTE_MODEL #if _STDINT_LONG_MODEL+0 == 242 /* 2:4:2 = IP16 = a normal 16-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned long uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef long int32_t; #endif #elif _STDINT_LONG_MODEL+0 == 244 || _STDINT_LONG_MODEL == 444 /* 2:4:4 = LP32 = a 32-bit system derived from a 16-bit */ /* 4:4:4 = ILP32 = a normal 32-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef int int32_t; #endif #elif _STDINT_LONG_MODEL+0 == 484 || _STDINT_LONG_MODEL+0 == 488 /* 4:8:4 = IP32 = a 32-bit system prepared for 64-bit */ /* 4:8:8 = LP64 = a normal 64-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef int int32_t; #endif /* this system has a "long" of 64bit */ #ifndef _HAVE_UINT64_T #define _HAVE_UINT64_T typedef unsigned long uint64_t; typedef long int64_t; #endif #elif _STDINT_LONG_MODEL+0 == 448 /* LLP64 a 64-bit system derived from a 32-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef int int32_t; #endif /* assuming the system has a "long long" */ #ifndef _HAVE_UINT64_T #define _HAVE_UINT64_T typedef unsigned long long uint64_t; typedef long long int64_t; #endif #else #define _STDINT_NO_INT32_T #endif #else #define _STDINT_NO_INT8_T #define _STDINT_NO_INT32_T #endif #endif /* * quote from SunOS-5.8 sys/inttypes.h: * Use at your own risk. As of February 1996, the committee is squarely * behind the fixed sized types; the "least" and "fast" types are still being * discussed. The probability that the "fast" types may be removed before * the standard is finalized is high enough that they are not currently * implemented. */ #if defined _STDINT_NEED_INT_LEAST_T typedef int8_t int_least8_t; typedef int16_t int_least16_t; typedef int32_t int_least32_t; #ifdef _HAVE_UINT64_T typedef int64_t int_least64_t; #endif typedef uint8_t uint_least8_t; typedef uint16_t uint_least16_t; typedef uint32_t uint_least32_t; #ifdef _HAVE_UINT64_T typedef uint64_t uint_least64_t; #endif /* least types */ #endif #if defined _STDINT_NEED_INT_FAST_T typedef int8_t int_fast8_t; typedef int int_fast16_t; typedef int32_t int_fast32_t; #ifdef _HAVE_UINT64_T typedef int64_t int_fast64_t; #endif typedef uint8_t uint_fast8_t; typedef unsigned uint_fast16_t; typedef uint32_t uint_fast32_t; #ifdef _HAVE_UINT64_T typedef uint64_t uint_fast64_t; #endif /* fast types */ #endif #ifdef _STDINT_NEED_INTMAX_T #ifdef _HAVE_UINT64_T typedef int64_t intmax_t; typedef uint64_t uintmax_t; #else typedef long intmax_t; typedef unsigned long uintmax_t; #endif #endif #ifdef _STDINT_NEED_INTPTR_T #ifndef __intptr_t_defined #define __intptr_t_defined /* we encourage using "long" to store pointer values, never use "int" ! */ #if _STDINT_LONG_MODEL+0 == 242 || _STDINT_LONG_MODEL+0 == 484 typedef unsinged int uintptr_t; typedef int intptr_t; #elif _STDINT_LONG_MODEL+0 == 244 || _STDINT_LONG_MODEL+0 == 444 typedef unsigned long uintptr_t; typedef long intptr_t; #elif _STDINT_LONG_MODEL+0 == 448 && defined _HAVE_UINT64_T typedef uint64_t uintptr_t; typedef int64_t intptr_t; #else /* matches typical system types ILP32 and LP64 - but not IP16 or LLP64 */ typedef unsigned long uintptr_t; typedef long intptr_t; #endif #endif #endif /* shortcircuit*/ #endif /* once */ #endif #endif STDINT_EOF if cmp -s $ac_stdint_h $ac_stdint 2>/dev/null; then AC_MSG_NOTICE([$ac_stdint_h is unchanged]) else ac_dir=`AS_DIRNAME(["$ac_stdint_h"])` AS_MKDIR_P(["$ac_dir"]) rm -f $ac_stdint_h mv $ac_stdint $ac_stdint_h fi ],[# variables for create stdint.h replacement PACKAGE="$PACKAGE" VERSION="$VERSION" ac_stdint_h="$ac_stdint_h" _ac_stdint_h=AS_TR_CPP(_$PACKAGE-$ac_stdint_h) ac_cv_stdint_message="$ac_cv_stdint_message" ac_cv_header_stdint_t="$ac_cv_header_stdint_t" ac_cv_header_stdint_x="$ac_cv_header_stdint_x" ac_cv_header_stdint_o="$ac_cv_header_stdint_o" ac_cv_header_stdint_u="$ac_cv_header_stdint_u" ac_cv_type_uint64_t="$ac_cv_type_uint64_t" ac_cv_type_u_int64_t="$ac_cv_type_u_int64_t" ac_cv_stdint_char_model="$ac_cv_stdint_char_model" ac_cv_stdint_long_model="$ac_cv_stdint_long_model" ac_cv_type_int_least32_t="$ac_cv_type_int_least32_t" ac_cv_type_int_fast32_t="$ac_cv_type_int_fast32_t" ac_cv_type_intmax_t="$ac_cv_type_intmax_t" ]) ]) dnl @synopsis AC_COMPILE_CHECK_SIZEOF(TYPE [, HEADERS [, EXTRA_SIZES...]]) dnl dnl This macro checks for the size of TYPE using compile checks, not dnl run checks. You can supply extra HEADERS to look into. the check dnl will cycle through 1 2 4 8 16 and any EXTRA_SIZES the user dnl supplies. If a match is found, it will #define SIZEOF_`TYPE' to dnl that value. Otherwise it will emit a configure time error dnl indicating the size of the type could not be determined. dnl dnl The trick is that C will not allow duplicate case labels. While dnl this is valid C code: dnl dnl switch (0) case 0: case 1:; dnl dnl The following is not: dnl dnl switch (0) case 0: case 0:; dnl dnl Thus, the AC_TRY_COMPILE will fail if the currently tried size dnl does not match. dnl dnl Here is an example skeleton configure.in script, demonstrating the dnl macro's usage: dnl dnl AC_PROG_CC dnl AC_CHECK_HEADERS(stddef.h unistd.h) dnl AC_TYPE_SIZE_T dnl AC_CHECK_TYPE(ssize_t, int) dnl dnl headers='#ifdef HAVE_STDDEF_H dnl #include dnl #endif dnl #ifdef HAVE_UNISTD_H dnl #include dnl #endif dnl ' dnl dnl AC_COMPILE_CHECK_SIZEOF(char) dnl AC_COMPILE_CHECK_SIZEOF(short) dnl AC_COMPILE_CHECK_SIZEOF(int) dnl AC_COMPILE_CHECK_SIZEOF(long) dnl AC_COMPILE_CHECK_SIZEOF(unsigned char *) dnl AC_COMPILE_CHECK_SIZEOF(void *) dnl AC_COMPILE_CHECK_SIZEOF(size_t, $headers) dnl AC_COMPILE_CHECK_SIZEOF(ssize_t, $headers) dnl AC_COMPILE_CHECK_SIZEOF(ptrdiff_t, $headers) dnl AC_COMPILE_CHECK_SIZEOF(off_t, $headers) dnl dnl @author Kaveh Ghazi dnl @version $Id: ac_compile_check_sizeof.m4,v 1.1.1.1 2001/07/26 00:46:24 guidod Exp $ dnl AC_DEFUN([AC_COMPILE_CHECK_SIZEOF], [changequote(<<, >>)dnl dnl The name to #define. define(<>, translit(sizeof_$1, [a-z *], [A-Z_P]))dnl dnl The cache variable name. define(<>, translit(ac_cv_sizeof_$1, [ *], [_p]))dnl changequote([, ])dnl AC_MSG_CHECKING(size of $1) AC_CACHE_VAL(AC_CV_NAME, [for ac_size in 4 8 1 2 16 $2 ; do # List sizes in rough order of prevalence. AC_TRY_COMPILE([#include "confdefs.h" #include $2 ], [switch (0) case 0: case (sizeof ($1) == $ac_size):;], AC_CV_NAME=$ac_size) if test x$AC_CV_NAME != x ; then break; fi done ]) if test x$AC_CV_NAME = x ; then AC_MSG_ERROR([cannot determine a size for $1]) fi AC_MSG_RESULT($AC_CV_NAME) AC_DEFINE_UNQUOTED(AC_TYPE_NAME, $AC_CV_NAME, [The number of bytes in type $1]) undefine([AC_TYPE_NAME])dnl undefine([AC_CV_NAME])dnl ]) openwince-include-0.3.2.orig/aclocal.m40100644000175000017500000015275607741657220015402 0ustar p2p2# generated automatically by aclocal 1.7.6 -*- Autoconf -*- # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002 # Free Software Foundation, Inc. # This file is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. dnl @synopsis AX_CREATE_STDINT_H [( HEADER-TO-GENERATE [, HEDERS-TO-CHECK])] dnl dnl the "ISO C9X: 7.18 Integer types " section requires the dnl existence of an include file that defines a set of dnl typedefs, especially uint8_t,int32_t,uintptr_t. dnl Many older installations will not provide this file, but some will dnl have the very same definitions in . In other enviroments dnl we can use the inet-types in which would define the dnl typedefs int8_t and u_int8_t respectivly. dnl dnl This macros will create a local "_stdint.h" or the headerfile given as dnl an argument. In many cases that file will just "#include " dnl or "#include ", while in other environments it will provide dnl the set of basic 'stdint's definitions/typedefs: dnl int8_t,uint8_t,int16_t,uint16_t,int32_t,uint32_t,intptr_t,uintptr_t dnl int_least32_t.. int_fast32_t.. intmax_t dnl which may or may not rely on the definitions of other files, dnl or using the AC_COMPILE_CHECK_SIZEOF macro to determine the actual dnl sizeof each type. dnl dnl if your header files require the stdint-types you will want to create an dnl installable file mylib-int.h that all your other installable header dnl may include. So if you have a library package named "mylib", just use dnl AX_CREATE_STDINT_H(mylib-int.h) dnl in configure.ac and go to install that very header file in Makefile.am dnl along with the other headers (mylib.h) - and the mylib-specific headers dnl can simply use "#include " to obtain the stdint-types. dnl dnl Remember, if the system already had a valid , the generated dnl file will include it directly. No need for fuzzy HAVE_STDINT_H things... dnl dnl @, (status: used on new platforms) (see http://ac-archive.sf.net/gstdint/) dnl @version $Id: ax_create_stdint_h.m4,v 1.2 2003/02/10 01:06:52 guidod Exp $ dnl @author Guido Draheim AC_DEFUN([AX_CREATE_STDINT_H], [# ------ AX CREATE STDINT H ------------------------------------- AC_MSG_CHECKING([for stdint types]) ac_stdint_h=`echo ifelse($1, , _stdint.h, $1)` # try to shortcircuit - if the default include path of the compiler # can find a "stdint.h" header then we assume that all compilers can. AC_CACHE_VAL([ac_cv_header_stdint_t],[ old_CXXFLAGS="$CXXFLAGS" ; CXXFLAGS="" old_CPPFLAGS="$CPPFLAGS" ; CPPFLAGS="" old_CFLAGS="$CFLAGS" ; CFLAGS="" AC_TRY_COMPILE([#include ],[int_least32_t v = 0;], [ac_cv_stdint_result="(assuming C99 compatible system)" ac_cv_header_stdint_t="stdint.h"; ], [ac_cv_header_stdint_t=""]) CXXFLAGS="$old_CXXFLAGS" CPPFLAGS="$old_CPPFLAGS" CFLAGS="$old_CFLAGS" ]) v="... $ac_cv_header_stdint_h" if test "$ac_stdint_h" = "stdint.h" ; then AC_MSG_RESULT([(are you sure you want them in ./stdint.h?)]) elif test "$ac_stdint_h" = "inttypes.h" ; then AC_MSG_RESULT([(are you sure you want them in ./inttypes.h?)]) elif test "_$ac_cv_header_stdint_t" = "_" ; then AC_MSG_RESULT([(putting them into $ac_stdint_h)$v]) else ac_cv_header_stdint="$ac_cv_header_stdint_t" AC_MSG_RESULT([$ac_cv_header_stdint (shortcircuit)]) fi if test "_$ac_cv_header_stdint_t" = "_" ; then # can not shortcircuit.. dnl .....intro message done, now do a few system checks..... dnl btw, all CHECK_TYPE macros do automatically "DEFINE" a type, therefore dnl we use the autoconf implementation detail _AC CHECK_TYPE_NEW instead inttype_headers=`echo $2 | sed -e 's/,/ /g'` ac_cv_stdint_result="(no helpful system typedefs seen)" AC_CACHE_CHECK([for stdint uintptr_t], [ac_cv_header_stdint_x],[ ac_cv_header_stdint_x="" # the 1997 typedefs (inttypes.h) AC_MSG_RESULT([(..)]) for i in stdint.h inttypes.h sys/inttypes.h $inttype_headers ; do unset ac_cv_type_uintptr_t unset ac_cv_type_uint64_t _AC_CHECK_TYPE_NEW(uintptr_t,[ac_cv_header_stdint_x=$i],dnl continue,[#include <$i>]) AC_CHECK_TYPE(uint64_t,[and64="/uint64_t"],[and64=""],[#include<$i>]) ac_cv_stdint_result="(seen uintptr_t$and64 in $i)" break; done AC_MSG_CHECKING([for stdint uintptr_t]) ]) if test "_$ac_cv_header_stdint_x" = "_" ; then AC_CACHE_CHECK([for stdint uint32_t], [ac_cv_header_stdint_o],[ ac_cv_header_stdint_o="" # the 1995 typedefs (sys/inttypes.h) AC_MSG_RESULT([(..)]) for i in inttypes.h sys/inttypes.h stdint.h $inttype_headers ; do unset ac_cv_type_uint32_t unset ac_cv_type_uint64_t AC_CHECK_TYPE(uint32_t,[ac_cv_header_stdint_o=$i],dnl continue,[#include <$i>]) AC_CHECK_TYPE(uint64_t,[and64="/uint64_t"],[and64=""],[#include<$i>]) ac_cv_stdint_result="(seen uint32_t$and64 in $i)" break; done AC_MSG_CHECKING([for stdint uint32_t]) ]) fi if test "_$ac_cv_header_stdint_x" = "_" ; then if test "_$ac_cv_header_stdint_o" = "_" ; then AC_CACHE_CHECK([for stdint u_int32_t], [ac_cv_header_stdint_u],[ ac_cv_header_stdint_u="" # the BSD typedefs (sys/types.h) AC_MSG_RESULT([(..)]) for i in sys/types.h inttypes.h sys/inttypes.h $inttype_headers ; do unset ac_cv_type_u_int32_t unset ac_cv_type_u_int64_t AC_CHECK_TYPE(u_int32_t,[ac_cv_header_stdint_u=$i],dnl continue,[#include <$i>]) AC_CHECK_TYPE(u_int64_t,[and64="/u_int64_t"],[and64=""],[#include<$i>]) ac_cv_stdint_result="(seen u_int32_t$and64 in $i)" break; done AC_MSG_CHECKING([for stdint u_int32_t]) ]) fi fi dnl if there was no good C99 header file, do some typedef checks... if test "_$ac_cv_header_stdint_x" = "_" ; then AC_MSG_CHECKING([for stdint datatype model]) AC_MSG_RESULT([(..)]) AC_COMPILE_CHECK_SIZEOF(char) AC_COMPILE_CHECK_SIZEOF(short) AC_COMPILE_CHECK_SIZEOF(int) AC_COMPILE_CHECK_SIZEOF(long) AC_COMPILE_CHECK_SIZEOF(void*) ac_cv_stdint_char_model="" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_char" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_short" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_int" ac_cv_stdint_long_model="" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_int" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_long" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_voidp" name="$ac_cv_stdint_long_model" case "$ac_cv_stdint_char_model/$ac_cv_stdint_long_model" in 122/242) name="$name, IP16 (standard 16bit machine)" ;; 122/244) name="$name, LP32 (standard 32bit mac/win)" ;; 122/*) name="$name (unusual int16 model)" ;; 124/444) name="$name, ILP32 (standard 32bit unixish)" ;; 124/488) name="$name, LP64 (standard 64bit unixish)" ;; 124/448) name="$name, LLP64 (unusual 64bit unixish)" ;; 124/*) name="$name (unusual int32 model)" ;; 128/888) name="$name, ILP64 (unusual 64bit numeric)" ;; 128/*) name="$name (unusual int64 model)" ;; 222/*|444/*) name="$name (unusual dsptype)" ;; *) name="$name (very unusal model)" ;; esac AC_MSG_RESULT([combined for stdint datatype model... $name]) fi if test "_$ac_cv_header_stdint_x" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_x" elif test "_$ac_cv_header_stdint_o" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_o" elif test "_$ac_cv_header_stdint_u" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_u" else ac_cv_header_stdint="stddef.h" fi AC_MSG_CHECKING([for extra inttypes in chosen header]) AC_MSG_RESULT([($ac_cv_header_stdint)]) dnl see if int_least and int_fast types are present in _this_ header. unset ac_cv_type_int_least32_t unset ac_cv_type_int_fast32_t AC_CHECK_TYPE(int_least32_t,,,[#include <$ac_cv_header_stdint>]) AC_CHECK_TYPE(int_fast32_t,,,[#include<$ac_cv_header_stdint>]) AC_CHECK_TYPE(intmax_t,,,[#include <$ac_cv_header_stdint>]) fi # shortcircut to system "stdint.h" # ------------------ PREPARE VARIABLES ------------------------------ if test "$GCC" = "yes" ; then ac_cv_stdint_message="using gnu compiler "`$CC --version | head -1` else ac_cv_stdint_message="using $CC" fi AC_MSG_RESULT([make use of $ac_cv_header_stdint in $ac_stdint_h dnl $ac_cv_stdint_result]) # ----------------- DONE inttypes.h checks START header ------------- AC_CONFIG_COMMANDS([$ac_stdint_h],[ AC_MSG_NOTICE(creating $ac_stdint_h : $_ac_stdint_h) ac_stdint=$tmp/_stdint.h echo "#ifndef" $_ac_stdint_h >$ac_stdint echo "#define" $_ac_stdint_h "1" >>$ac_stdint echo "#ifndef" _GENERATED_STDINT_H >>$ac_stdint echo "#define" _GENERATED_STDINT_H '"'$PACKAGE $VERSION'"' >>$ac_stdint echo "/* generated $ac_cv_stdint_message */" >>$ac_stdint if test "_$ac_cv_header_stdint_t" != "_" ; then echo "#define _STDINT_HAVE_STDINT_H" "1" >>$ac_stdint fi cat >>$ac_stdint < #else #include /* .................... configured part ............................ */ STDINT_EOF echo "/* whether we have a C99 compatible stdint header file */" >>$ac_stdint if test "_$ac_cv_header_stdint_x" != "_" ; then ac_header="$ac_cv_header_stdint_x" echo "#define _STDINT_HEADER_INTPTR" '"'"$ac_header"'"' >>$ac_stdint else echo "/* #undef _STDINT_HEADER_INTPTR */" >>$ac_stdint fi echo "/* whether we have a C96 compatible inttypes header file */" >>$ac_stdint if test "_$ac_cv_header_stdint_o" != "_" ; then ac_header="$ac_cv_header_stdint_o" echo "#define _STDINT_HEADER_UINT32" '"'"$ac_header"'"' >>$ac_stdint else echo "/* #undef _STDINT_HEADER_UINT32 */" >>$ac_stdint fi echo "/* whether we have a BSD compatible inet types header */" >>$ac_stdint if test "_$ac_cv_header_stdint_u" != "_" ; then ac_header="$ac_cv_header_stdint_u" echo "#define _STDINT_HEADER_U_INT32" '"'"$ac_header"'"' >>$ac_stdint else echo "/* #undef _STDINT_HEADER_U_INT32 */" >>$ac_stdint fi echo "" >>$ac_stdint if test "_$ac_header" != "_" ; then if test "$ac_header" != "stddef.h" ; then echo "#include <$ac_header>" >>$ac_stdint echo "" >>$ac_stdint fi fi echo "/* which 64bit typedef has been found */" >>$ac_stdint if test "$ac_cv_type_uint64_t" = "yes" ; then echo "#define _STDINT_HAVE_UINT64_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_UINT64_T */" >>$ac_stdint fi if test "$ac_cv_type_u_int64_t" = "yes" ; then echo "#define _STDINT_HAVE_U_INT64_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_U_INT64_T */" >>$ac_stdint fi echo "" >>$ac_stdint echo "/* which type model has been detected */" >>$ac_stdint if test "_$ac_cv_stdint_char_model" != "_" ; then echo "#define _STDINT_CHAR_MODEL" "$ac_cv_stdint_char_model" >>$ac_stdint echo "#define _STDINT_LONG_MODEL" "$ac_cv_stdint_long_model" >>$ac_stdint else echo "/* #undef _STDINT_CHAR_MODEL // skipped */" >>$ac_stdint echo "/* #undef _STDINT_LONG_MODEL // skipped */" >>$ac_stdint fi echo "" >>$ac_stdint echo "/* whether int_least types were detected */" >>$ac_stdint if test "$ac_cv_type_int_least32_t" = "yes"; then echo "#define _STDINT_HAVE_INT_LEAST32_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_INT_LEAST32_T */" >>$ac_stdint fi echo "/* whether int_fast types were detected */" >>$ac_stdint if test "$ac_cv_type_int_fast32_t" = "yes"; then echo "#define _STDINT_HAVE_INT_FAST32_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_INT_FAST32_T */" >>$ac_stdint fi echo "/* whether intmax_t type was detected */" >>$ac_stdint if test "$ac_cv_type_intmax_t" = "yes"; then echo "#define _STDINT_HAVE_INTMAX_T" "1" >>$ac_stdint else echo "/* #undef _STDINT_HAVE_INTMAX_T */" >>$ac_stdint fi echo "" >>$ac_stdint cat >>$ac_stdint <= 199901L #define _HAVE_UINT64_T typedef long long int64_t; typedef unsigned long long uint64_t; #elif !defined __STRICT_ANSI__ #if defined _MSC_VER || defined __WATCOMC__ || defined __BORLANDC__ #define _HAVE_UINT64_T typedef __int64 int64_t; typedef unsigned __int64 uint64_t; #elif defined __GNUC__ || defined __MWERKS__ || defined __ELF__ /* note: all ELF-systems seem to have loff-support which needs 64-bit */ #if !defined _NO_LONGLONG #define _HAVE_UINT64_T typedef long long int64_t; typedef unsigned long long uint64_t; #endif #elif defined __alpha || (defined __mips && defined _ABIN32) #if !defined _NO_LONGLONG typedef long int64_t; typedef unsigned long uint64_t; #endif /* compiler/cpu type to define int64_t */ #endif #endif #endif #if defined _STDINT_HAVE_U_INT_TYPES /* int8_t int16_t int32_t defined by inet code, redeclare the u_intXX types */ typedef u_int8_t uint8_t; typedef u_int16_t uint16_t; typedef u_int32_t uint32_t; /* glibc compatibility */ #ifndef __int8_t_defined #define __int8_t_defined #endif #endif #ifdef _STDINT_NEED_INT_MODEL_T /* we must guess all the basic types. Apart from byte-adressable system, */ /* there a few 32-bit-only dsp-systems that we guard with BYTE_MODEL 8-} */ /* (btw, those nibble-addressable systems are way off, or so we assume) */ dnl /* have a look at "64bit and data size neutrality" at */ dnl /* http://unix.org/version2/whatsnew/login_64bit.html */ dnl /* (the shorthand "ILP" types always have a "P" part) */ #if defined _STDINT_BYTE_MODEL #if _STDINT_LONG_MODEL+0 == 242 /* 2:4:2 = IP16 = a normal 16-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned long uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef long int32_t; #endif #elif _STDINT_LONG_MODEL+0 == 244 || _STDINT_LONG_MODEL == 444 /* 2:4:4 = LP32 = a 32-bit system derived from a 16-bit */ /* 4:4:4 = ILP32 = a normal 32-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef int int32_t; #endif #elif _STDINT_LONG_MODEL+0 == 484 || _STDINT_LONG_MODEL+0 == 488 /* 4:8:4 = IP32 = a 32-bit system prepared for 64-bit */ /* 4:8:8 = LP64 = a normal 64-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef int int32_t; #endif /* this system has a "long" of 64bit */ #ifndef _HAVE_UINT64_T #define _HAVE_UINT64_T typedef unsigned long uint64_t; typedef long int64_t; #endif #elif _STDINT_LONG_MODEL+0 == 448 /* LLP64 a 64-bit system derived from a 32-bit system */ typedef unsigned char uint8_t; typedef unsigned short uint16_t; typedef unsigned int uint32_t; #ifndef __int8_t_defined #define __int8_t_defined typedef char int8_t; typedef short int16_t; typedef int int32_t; #endif /* assuming the system has a "long long" */ #ifndef _HAVE_UINT64_T #define _HAVE_UINT64_T typedef unsigned long long uint64_t; typedef long long int64_t; #endif #else #define _STDINT_NO_INT32_T #endif #else #define _STDINT_NO_INT8_T #define _STDINT_NO_INT32_T #endif #endif /* * quote from SunOS-5.8 sys/inttypes.h: * Use at your own risk. As of February 1996, the committee is squarely * behind the fixed sized types; the "least" and "fast" types are still being * discussed. The probability that the "fast" types may be removed before * the standard is finalized is high enough that they are not currently * implemented. */ #if defined _STDINT_NEED_INT_LEAST_T typedef int8_t int_least8_t; typedef int16_t int_least16_t; typedef int32_t int_least32_t; #ifdef _HAVE_UINT64_T typedef int64_t int_least64_t; #endif typedef uint8_t uint_least8_t; typedef uint16_t uint_least16_t; typedef uint32_t uint_least32_t; #ifdef _HAVE_UINT64_T typedef uint64_t uint_least64_t; #endif /* least types */ #endif #if defined _STDINT_NEED_INT_FAST_T typedef int8_t int_fast8_t; typedef int int_fast16_t; typedef int32_t int_fast32_t; #ifdef _HAVE_UINT64_T typedef int64_t int_fast64_t; #endif typedef uint8_t uint_fast8_t; typedef unsigned uint_fast16_t; typedef uint32_t uint_fast32_t; #ifdef _HAVE_UINT64_T typedef uint64_t uint_fast64_t; #endif /* fast types */ #endif #ifdef _STDINT_NEED_INTMAX_T #ifdef _HAVE_UINT64_T typedef int64_t intmax_t; typedef uint64_t uintmax_t; #else typedef long intmax_t; typedef unsigned long uintmax_t; #endif #endif #ifdef _STDINT_NEED_INTPTR_T #ifndef __intptr_t_defined #define __intptr_t_defined /* we encourage using "long" to store pointer values, never use "int" ! */ #if _STDINT_LONG_MODEL+0 == 242 || _STDINT_LONG_MODEL+0 == 484 typedef unsinged int uintptr_t; typedef int intptr_t; #elif _STDINT_LONG_MODEL+0 == 244 || _STDINT_LONG_MODEL+0 == 444 typedef unsigned long uintptr_t; typedef long intptr_t; #elif _STDINT_LONG_MODEL+0 == 448 && defined _HAVE_UINT64_T typedef uint64_t uintptr_t; typedef int64_t intptr_t; #else /* matches typical system types ILP32 and LP64 - but not IP16 or LLP64 */ typedef unsigned long uintptr_t; typedef long intptr_t; #endif #endif #endif /* shortcircuit*/ #endif /* once */ #endif #endif STDINT_EOF if cmp -s $ac_stdint_h $ac_stdint 2>/dev/null; then AC_MSG_NOTICE([$ac_stdint_h is unchanged]) else ac_dir=`AS_DIRNAME(["$ac_stdint_h"])` AS_MKDIR_P(["$ac_dir"]) rm -f $ac_stdint_h mv $ac_stdint $ac_stdint_h fi ],[# variables for create stdint.h replacement PACKAGE="$PACKAGE" VERSION="$VERSION" ac_stdint_h="$ac_stdint_h" _ac_stdint_h=AS_TR_CPP(_$PACKAGE-$ac_stdint_h) ac_cv_stdint_message="$ac_cv_stdint_message" ac_cv_header_stdint_t="$ac_cv_header_stdint_t" ac_cv_header_stdint_x="$ac_cv_header_stdint_x" ac_cv_header_stdint_o="$ac_cv_header_stdint_o" ac_cv_header_stdint_u="$ac_cv_header_stdint_u" ac_cv_type_uint64_t="$ac_cv_type_uint64_t" ac_cv_type_u_int64_t="$ac_cv_type_u_int64_t" ac_cv_stdint_char_model="$ac_cv_stdint_char_model" ac_cv_stdint_long_model="$ac_cv_stdint_long_model" ac_cv_type_int_least32_t="$ac_cv_type_int_least32_t" ac_cv_type_int_fast32_t="$ac_cv_type_int_fast32_t" ac_cv_type_intmax_t="$ac_cv_type_intmax_t" ]) ]) dnl @synopsis AC_COMPILE_CHECK_SIZEOF(TYPE [, HEADERS [, EXTRA_SIZES...]]) dnl dnl This macro checks for the size of TYPE using compile checks, not dnl run checks. You can supply extra HEADERS to look into. the check dnl will cycle through 1 2 4 8 16 and any EXTRA_SIZES the user dnl supplies. If a match is found, it will #define SIZEOF_`TYPE' to dnl that value. Otherwise it will emit a configure time error dnl indicating the size of the type could not be determined. dnl dnl The trick is that C will not allow duplicate case labels. While dnl this is valid C code: dnl dnl switch (0) case 0: case 1:; dnl dnl The following is not: dnl dnl switch (0) case 0: case 0:; dnl dnl Thus, the AC_TRY_COMPILE will fail if the currently tried size dnl does not match. dnl dnl Here is an example skeleton configure.in script, demonstrating the dnl macro's usage: dnl dnl AC_PROG_CC dnl AC_CHECK_HEADERS(stddef.h unistd.h) dnl AC_TYPE_SIZE_T dnl AC_CHECK_TYPE(ssize_t, int) dnl dnl headers='#ifdef HAVE_STDDEF_H dnl #include dnl #endif dnl #ifdef HAVE_UNISTD_H dnl #include dnl #endif dnl ' dnl dnl AC_COMPILE_CHECK_SIZEOF(char) dnl AC_COMPILE_CHECK_SIZEOF(short) dnl AC_COMPILE_CHECK_SIZEOF(int) dnl AC_COMPILE_CHECK_SIZEOF(long) dnl AC_COMPILE_CHECK_SIZEOF(unsigned char *) dnl AC_COMPILE_CHECK_SIZEOF(void *) dnl AC_COMPILE_CHECK_SIZEOF(size_t, $headers) dnl AC_COMPILE_CHECK_SIZEOF(ssize_t, $headers) dnl AC_COMPILE_CHECK_SIZEOF(ptrdiff_t, $headers) dnl AC_COMPILE_CHECK_SIZEOF(off_t, $headers) dnl dnl @author Kaveh Ghazi dnl @version $Id: ac_compile_check_sizeof.m4,v 1.1.1.1 2001/07/26 00:46:24 guidod Exp $ dnl AC_DEFUN([AC_COMPILE_CHECK_SIZEOF], [changequote(<<, >>)dnl dnl The name to #define. define(<>, translit(sizeof_$1, [a-z *], [A-Z_P]))dnl dnl The cache variable name. define(<>, translit(ac_cv_sizeof_$1, [ *], [_p]))dnl changequote([, ])dnl AC_MSG_CHECKING(size of $1) AC_CACHE_VAL(AC_CV_NAME, [for ac_size in 4 8 1 2 16 $2 ; do # List sizes in rough order of prevalence. AC_TRY_COMPILE([#include "confdefs.h" #include $2 ], [switch (0) case 0: case (sizeof ($1) == $ac_size):;], AC_CV_NAME=$ac_size) if test x$AC_CV_NAME != x ; then break; fi done ]) if test x$AC_CV_NAME = x ; then AC_MSG_ERROR([cannot determine a size for $1]) fi AC_MSG_RESULT($AC_CV_NAME) AC_DEFINE_UNQUOTED(AC_TYPE_NAME, $AC_CV_NAME, [The number of bytes in type $1]) undefine([AC_TYPE_NAME])dnl undefine([AC_CV_NAME])dnl ]) # Do all the work for Automake. -*- Autoconf -*- # This macro actually does too much some checks are only needed if # your package does certain things. But this isn't really a big deal. # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 # Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA # 02111-1307, USA. # serial 10 AC_PREREQ([2.54]) # Autoconf 2.50 wants to disallow AM_ names. We explicitly allow # the ones we care about. m4_pattern_allow([^AM_[A-Z]+FLAGS$])dnl # AM_INIT_AUTOMAKE(PACKAGE, VERSION, [NO-DEFINE]) # AM_INIT_AUTOMAKE([OPTIONS]) # ----------------------------------------------- # The call with PACKAGE and VERSION arguments is the old style # call (pre autoconf-2.50), which is being phased out. PACKAGE # and VERSION should now be passed to AC_INIT and removed from # the call to AM_INIT_AUTOMAKE. # We support both call styles for the transition. After # the next Automake release, Autoconf can make the AC_INIT # arguments mandatory, and then we can depend on a new Autoconf # release and drop the old call support. AC_DEFUN([AM_INIT_AUTOMAKE], [AC_REQUIRE([AM_SET_CURRENT_AUTOMAKE_VERSION])dnl AC_REQUIRE([AC_PROG_INSTALL])dnl # test to see if srcdir already configured if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then AC_MSG_ERROR([source directory already configured; run "make distclean" there first]) fi # test whether we have cygpath if test -z "$CYGPATH_W"; then if (cygpath --version) >/dev/null 2>/dev/null; then CYGPATH_W='cygpath -w' else CYGPATH_W=echo fi fi AC_SUBST([CYGPATH_W]) # Define the identity of the package. dnl Distinguish between old-style and new-style calls. m4_ifval([$2], [m4_ifval([$3], [_AM_SET_OPTION([no-define])])dnl AC_SUBST([PACKAGE], [$1])dnl AC_SUBST([VERSION], [$2])], [_AM_SET_OPTIONS([$1])dnl AC_SUBST([PACKAGE], ['AC_PACKAGE_TARNAME'])dnl AC_SUBST([VERSION], ['AC_PACKAGE_VERSION'])])dnl _AM_IF_OPTION([no-define],, [AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package]) AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package])])dnl # Some tools Automake needs. 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See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA # AM_AUTOMAKE_VERSION(VERSION) # ---------------------------- # Automake X.Y traces this macro to ensure aclocal.m4 has been # generated from the m4 files accompanying Automake X.Y. AC_DEFUN([AM_AUTOMAKE_VERSION],[am__api_version="1.7"]) # AM_SET_CURRENT_AUTOMAKE_VERSION # ------------------------------- # Call AM_AUTOMAKE_VERSION so it can be traced. # This function is AC_REQUIREd by AC_INIT_AUTOMAKE. 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INSTALL=$ac_install_sh fi fi echo "$as_me:$LINENO: result: $INSTALL" >&5 echo "${ECHO_T}$INSTALL" >&6 # Use test -z because SunOS4 sh mishandles braces in ${var-val}. # It thinks the first close brace ends the variable substitution. test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' echo "$as_me:$LINENO: checking whether build environment is sane" >&5 echo $ECHO_N "checking whether build environment is sane... $ECHO_C" >&6 # Just in case sleep 1 echo timestamp > conftest.file # Do `set' in a subshell so we don't clobber the current shell's # arguments. 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PACKAGE='include' VERSION='0.3.2' cat >>confdefs.h <<_ACEOF #define PACKAGE "$PACKAGE" _ACEOF cat >>confdefs.h <<_ACEOF #define VERSION "$VERSION" _ACEOF # Some tools Automake needs. ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal-${am__api_version}"} AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"} AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake-${am__api_version}"} AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"} MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"} AMTAR=${AMTAR-"${am_missing_run}tar"} install_sh=${install_sh-"$am_aux_dir/install-sh"} # Installed binaries are usually stripped using `strip' when the user # run `make install-strip'. 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then am__include=include am__quote= _am_result=GNU fi # Now try BSD make style include. if test "$am__include" = "#"; then echo '.include "confinc"' > confmf if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then am__include=.include am__quote="\"" _am_result=BSD fi fi echo "$as_me:$LINENO: result: $_am_result" >&5 echo "${ECHO_T}$_am_result" >&6 rm -f confinc confmf # Check whether --enable-dependency-tracking or --disable-dependency-tracking was given. if test "${enable_dependency_tracking+set}" = set; then enableval="$enable_dependency_tracking" fi; if test "x$enable_dependency_tracking" != xno; then am_depcomp="$ac_aux_dir/depcomp" AMDEPBACKSLASH='\' fi if test "x$enable_dependency_tracking" != xno; then AMDEP_TRUE= AMDEP_FALSE='#' else AMDEP_TRUE='#' AMDEP_FALSE= fi ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. set dummy ${ac_tool_prefix}gcc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_CC="${ac_tool_prefix}gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$ac_cv_prog_CC"; then ac_ct_CC=$CC # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_CC="gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 echo "${ECHO_T}$ac_ct_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi CC=$ac_ct_CC else CC="$ac_cv_prog_CC" fi if test -z "$CC"; then if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. set dummy ${ac_tool_prefix}cc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_CC="${ac_tool_prefix}cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$ac_cv_prog_CC"; then ac_ct_CC=$CC # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_CC="cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 echo "${ECHO_T}$ac_ct_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi CC=$ac_ct_CC else CC="$ac_cv_prog_CC" fi fi if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else ac_prog_rejected=no as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then ac_prog_rejected=yes continue fi ac_cv_prog_CC="cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done if test $ac_prog_rejected = yes; then # We found a bogon in the path, so make sure we never use it. set dummy $ac_cv_prog_CC shift if test $# != 0; then # We chose a different compiler from the bogus one. # However, it has the same basename, so the bogon will be chosen # first if we set CC to just the basename; use the full file name. shift ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" fi fi fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$CC"; then if test -n "$ac_tool_prefix"; then for ac_prog in cl do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_CC="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi test -n "$CC" && break done fi if test -z "$CC"; then ac_ct_CC=$CC for ac_prog in cl do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_CC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 echo "${ECHO_T}$ac_ct_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi test -n "$ac_ct_CC" && break done CC=$ac_ct_CC fi fi test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH See \`config.log' for more details." >&5 echo "$as_me: error: no acceptable C compiler found in \$PATH See \`config.log' for more details." >&2;} { (exit 1); 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It turns out that the SunPro C++ compiler does not properly # handle `-M -o', and we need to detect this. if depmode=$depmode \ source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \ depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \ >/dev/null 2>conftest.err && grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 && ${MAKE-make} -s -f confmf > /dev/null 2>&1; then # icc doesn't choke on unknown options, it will just issue warnings # (even with -Werror). So we grep stderr for any message # that says an option was ignored. if grep 'ignoring option' conftest.err >/dev/null 2>&1; then :; else am_cv_CC_dependencies_compiler_type=$depmode break fi fi done cd .. rm -rf conftest.dir else am_cv_CC_dependencies_compiler_type=none fi fi echo "$as_me:$LINENO: result: $am_cv_CC_dependencies_compiler_type" >&5 echo "${ECHO_T}$am_cv_CC_dependencies_compiler_type" >&6 CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type if test "x$enable_dependency_tracking" != xno \ && test "$am_cv_CC_dependencies_compiler_type" = gcc3; then am__fastdepCC_TRUE= am__fastdepCC_FALSE='#' else am__fastdepCC_TRUE='#' am__fastdepCC_FALSE= fi # ------ AX CREATE STDINT H ------------------------------------- echo "$as_me:$LINENO: checking for stdint types" >&5 echo $ECHO_N "checking for stdint types... $ECHO_C" >&6 ac_stdint_h=`echo owce-stdint.h ` # try to shortcircuit - if the default include path of the compiler # can find a "stdint.h" header then we assume that all compilers can. if test "${ac_cv_header_stdint_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else old_CXXFLAGS="$CXXFLAGS" ; CXXFLAGS="" old_CPPFLAGS="$CPPFLAGS" ; CPPFLAGS="" old_CFLAGS="$CFLAGS" ; CFLAGS="" cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include int main () { int_least32_t v = 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_stdint_result="(assuming C99 compatible system)" ac_cv_header_stdint_t="stdint.h"; else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_header_stdint_t="" fi rm -f conftest.$ac_objext conftest.$ac_ext CXXFLAGS="$old_CXXFLAGS" CPPFLAGS="$old_CPPFLAGS" CFLAGS="$old_CFLAGS" fi v="... $ac_cv_header_stdint_h" if test "$ac_stdint_h" = "stdint.h" ; then echo "$as_me:$LINENO: result: (are you sure you want them in ./stdint.h?)" >&5 echo "${ECHO_T}(are you sure you want them in ./stdint.h?)" >&6 elif test "$ac_stdint_h" = "inttypes.h" ; then echo "$as_me:$LINENO: result: (are you sure you want them in ./inttypes.h?)" >&5 echo "${ECHO_T}(are you sure you want them in ./inttypes.h?)" >&6 elif test "_$ac_cv_header_stdint_t" = "_" ; then echo "$as_me:$LINENO: result: (putting them into $ac_stdint_h)$v" >&5 echo "${ECHO_T}(putting them into $ac_stdint_h)$v" >&6 else ac_cv_header_stdint="$ac_cv_header_stdint_t" echo "$as_me:$LINENO: result: $ac_cv_header_stdint (shortcircuit)" >&5 echo "${ECHO_T}$ac_cv_header_stdint (shortcircuit)" >&6 fi if test "_$ac_cv_header_stdint_t" = "_" ; then # can not shortcircuit.. inttype_headers=`echo | sed -e 's/,/ /g'` ac_cv_stdint_result="(no helpful system typedefs seen)" echo "$as_me:$LINENO: checking for stdint uintptr_t" >&5 echo $ECHO_N "checking for stdint uintptr_t... $ECHO_C" >&6 if test "${ac_cv_header_stdint_x+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_cv_header_stdint_x="" # the 1997 typedefs (inttypes.h) echo "$as_me:$LINENO: result: (..)" >&5 echo "${ECHO_T}(..)" >&6 for i in stdint.h inttypes.h sys/inttypes.h $inttype_headers ; do unset ac_cv_type_uintptr_t unset ac_cv_type_uint64_t echo "$as_me:$LINENO: checking for uintptr_t" >&5 echo $ECHO_N "checking for uintptr_t... $ECHO_C" >&6 if test "${ac_cv_type_uintptr_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$i> int main () { if ((uintptr_t *) 0) return 0; if (sizeof (uintptr_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_uintptr_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_uintptr_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_uintptr_t" >&5 echo "${ECHO_T}$ac_cv_type_uintptr_t" >&6 if test $ac_cv_type_uintptr_t = yes; then ac_cv_header_stdint_x=$i else continue fi echo "$as_me:$LINENO: checking for uint64_t" >&5 echo $ECHO_N "checking for uint64_t... $ECHO_C" >&6 if test "${ac_cv_type_uint64_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include<$i> int main () { if ((uint64_t *) 0) return 0; if (sizeof (uint64_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_uint64_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_uint64_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_uint64_t" >&5 echo "${ECHO_T}$ac_cv_type_uint64_t" >&6 if test $ac_cv_type_uint64_t = yes; then and64="/uint64_t" else and64="" fi ac_cv_stdint_result="(seen uintptr_t$and64 in $i)" break; done echo "$as_me:$LINENO: checking for stdint uintptr_t" >&5 echo $ECHO_N "checking for stdint uintptr_t... $ECHO_C" >&6 fi echo "$as_me:$LINENO: result: $ac_cv_header_stdint_x" >&5 echo "${ECHO_T}$ac_cv_header_stdint_x" >&6 if test "_$ac_cv_header_stdint_x" = "_" ; then echo "$as_me:$LINENO: checking for stdint uint32_t" >&5 echo $ECHO_N "checking for stdint uint32_t... $ECHO_C" >&6 if test "${ac_cv_header_stdint_o+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_cv_header_stdint_o="" # the 1995 typedefs (sys/inttypes.h) echo "$as_me:$LINENO: result: (..)" >&5 echo "${ECHO_T}(..)" >&6 for i in inttypes.h sys/inttypes.h stdint.h $inttype_headers ; do unset ac_cv_type_uint32_t unset ac_cv_type_uint64_t echo "$as_me:$LINENO: checking for uint32_t" >&5 echo $ECHO_N "checking for uint32_t... $ECHO_C" >&6 if test "${ac_cv_type_uint32_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$i> int main () { if ((uint32_t *) 0) return 0; if (sizeof (uint32_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_uint32_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_uint32_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_uint32_t" >&5 echo "${ECHO_T}$ac_cv_type_uint32_t" >&6 if test $ac_cv_type_uint32_t = yes; then ac_cv_header_stdint_o=$i else continue fi echo "$as_me:$LINENO: checking for uint64_t" >&5 echo $ECHO_N "checking for uint64_t... $ECHO_C" >&6 if test "${ac_cv_type_uint64_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include<$i> int main () { if ((uint64_t *) 0) return 0; if (sizeof (uint64_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_uint64_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_uint64_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_uint64_t" >&5 echo "${ECHO_T}$ac_cv_type_uint64_t" >&6 if test $ac_cv_type_uint64_t = yes; then and64="/uint64_t" else and64="" fi ac_cv_stdint_result="(seen uint32_t$and64 in $i)" break; done echo "$as_me:$LINENO: checking for stdint uint32_t" >&5 echo $ECHO_N "checking for stdint uint32_t... $ECHO_C" >&6 fi echo "$as_me:$LINENO: result: $ac_cv_header_stdint_o" >&5 echo "${ECHO_T}$ac_cv_header_stdint_o" >&6 fi if test "_$ac_cv_header_stdint_x" = "_" ; then if test "_$ac_cv_header_stdint_o" = "_" ; then echo "$as_me:$LINENO: checking for stdint u_int32_t" >&5 echo $ECHO_N "checking for stdint u_int32_t... $ECHO_C" >&6 if test "${ac_cv_header_stdint_u+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_cv_header_stdint_u="" # the BSD typedefs (sys/types.h) echo "$as_me:$LINENO: result: (..)" >&5 echo "${ECHO_T}(..)" >&6 for i in sys/types.h inttypes.h sys/inttypes.h $inttype_headers ; do unset ac_cv_type_u_int32_t unset ac_cv_type_u_int64_t echo "$as_me:$LINENO: checking for u_int32_t" >&5 echo $ECHO_N "checking for u_int32_t... $ECHO_C" >&6 if test "${ac_cv_type_u_int32_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$i> int main () { if ((u_int32_t *) 0) return 0; if (sizeof (u_int32_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_u_int32_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_u_int32_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_u_int32_t" >&5 echo "${ECHO_T}$ac_cv_type_u_int32_t" >&6 if test $ac_cv_type_u_int32_t = yes; then ac_cv_header_stdint_u=$i else continue fi echo "$as_me:$LINENO: checking for u_int64_t" >&5 echo $ECHO_N "checking for u_int64_t... $ECHO_C" >&6 if test "${ac_cv_type_u_int64_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include<$i> int main () { if ((u_int64_t *) 0) return 0; if (sizeof (u_int64_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_u_int64_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_u_int64_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_u_int64_t" >&5 echo "${ECHO_T}$ac_cv_type_u_int64_t" >&6 if test $ac_cv_type_u_int64_t = yes; then and64="/u_int64_t" else and64="" fi ac_cv_stdint_result="(seen u_int32_t$and64 in $i)" break; done echo "$as_me:$LINENO: checking for stdint u_int32_t" >&5 echo $ECHO_N "checking for stdint u_int32_t... $ECHO_C" >&6 fi echo "$as_me:$LINENO: result: $ac_cv_header_stdint_u" >&5 echo "${ECHO_T}$ac_cv_header_stdint_u" >&6 fi fi if test "_$ac_cv_header_stdint_x" = "_" ; then echo "$as_me:$LINENO: checking for stdint datatype model" >&5 echo $ECHO_N "checking for stdint datatype model... $ECHO_C" >&6 echo "$as_me:$LINENO: result: (..)" >&5 echo "${ECHO_T}(..)" >&6 echo "$as_me:$LINENO: checking size of char" >&5 echo $ECHO_N "checking size of char... $ECHO_C" >&6 if test "${ac_cv_sizeof_char+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include "confdefs.h" #include int main () { switch (0) case 0: case (sizeof (char) == $ac_size):; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_sizeof_char=$ac_size else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.$ac_objext conftest.$ac_ext if test x$ac_cv_sizeof_char != x ; then break; fi done fi if test x$ac_cv_sizeof_char = x ; then { { echo "$as_me:$LINENO: error: cannot determine a size for char" >&5 echo "$as_me: error: cannot determine a size for char" >&2;} { (exit 1); exit 1; }; } fi echo "$as_me:$LINENO: result: $ac_cv_sizeof_char" >&5 echo "${ECHO_T}$ac_cv_sizeof_char" >&6 cat >>confdefs.h <<_ACEOF #define SIZEOF_CHAR $ac_cv_sizeof_char _ACEOF echo "$as_me:$LINENO: checking size of short" >&5 echo $ECHO_N "checking size of short... $ECHO_C" >&6 if test "${ac_cv_sizeof_short+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include "confdefs.h" #include int main () { switch (0) case 0: case (sizeof (short) == $ac_size):; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_sizeof_short=$ac_size else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.$ac_objext conftest.$ac_ext if test x$ac_cv_sizeof_short != x ; then break; fi done fi if test x$ac_cv_sizeof_short = x ; then { { echo "$as_me:$LINENO: error: cannot determine a size for short" >&5 echo "$as_me: error: cannot determine a size for short" >&2;} { (exit 1); exit 1; }; } fi echo "$as_me:$LINENO: result: $ac_cv_sizeof_short" >&5 echo "${ECHO_T}$ac_cv_sizeof_short" >&6 cat >>confdefs.h <<_ACEOF #define SIZEOF_SHORT $ac_cv_sizeof_short _ACEOF echo "$as_me:$LINENO: checking size of int" >&5 echo $ECHO_N "checking size of int... $ECHO_C" >&6 if test "${ac_cv_sizeof_int+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include "confdefs.h" #include int main () { switch (0) case 0: case (sizeof (int) == $ac_size):; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_sizeof_int=$ac_size else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.$ac_objext conftest.$ac_ext if test x$ac_cv_sizeof_int != x ; then break; fi done fi if test x$ac_cv_sizeof_int = x ; then { { echo "$as_me:$LINENO: error: cannot determine a size for int" >&5 echo "$as_me: error: cannot determine a size for int" >&2;} { (exit 1); exit 1; }; } fi echo "$as_me:$LINENO: result: $ac_cv_sizeof_int" >&5 echo "${ECHO_T}$ac_cv_sizeof_int" >&6 cat >>confdefs.h <<_ACEOF #define SIZEOF_INT $ac_cv_sizeof_int _ACEOF echo "$as_me:$LINENO: checking size of long" >&5 echo $ECHO_N "checking size of long... $ECHO_C" >&6 if test "${ac_cv_sizeof_long+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include "confdefs.h" #include int main () { switch (0) case 0: case (sizeof (long) == $ac_size):; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_sizeof_long=$ac_size else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.$ac_objext conftest.$ac_ext if test x$ac_cv_sizeof_long != x ; then break; fi done fi if test x$ac_cv_sizeof_long = x ; then { { echo "$as_me:$LINENO: error: cannot determine a size for long" >&5 echo "$as_me: error: cannot determine a size for long" >&2;} { (exit 1); exit 1; }; } fi echo "$as_me:$LINENO: result: $ac_cv_sizeof_long" >&5 echo "${ECHO_T}$ac_cv_sizeof_long" >&6 cat >>confdefs.h <<_ACEOF #define SIZEOF_LONG $ac_cv_sizeof_long _ACEOF echo "$as_me:$LINENO: checking size of void*" >&5 echo $ECHO_N "checking size of void*... $ECHO_C" >&6 if test "${ac_cv_sizeof_voidp+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else for ac_size in 4 8 1 2 16 ; do # List sizes in rough order of prevalence. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include "confdefs.h" #include int main () { switch (0) case 0: case (sizeof (void*) == $ac_size):; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_sizeof_voidp=$ac_size else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.$ac_objext conftest.$ac_ext if test x$ac_cv_sizeof_voidp != x ; then break; fi done fi if test x$ac_cv_sizeof_voidp = x ; then { { echo "$as_me:$LINENO: error: cannot determine a size for void*" >&5 echo "$as_me: error: cannot determine a size for void*" >&2;} { (exit 1); exit 1; }; } fi echo "$as_me:$LINENO: result: $ac_cv_sizeof_voidp" >&5 echo "${ECHO_T}$ac_cv_sizeof_voidp" >&6 cat >>confdefs.h <<_ACEOF #define SIZEOF_VOIDP $ac_cv_sizeof_voidp _ACEOF ac_cv_stdint_char_model="" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_char" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_short" ac_cv_stdint_char_model="$ac_cv_stdint_char_model$ac_cv_sizeof_int" ac_cv_stdint_long_model="" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_int" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_long" ac_cv_stdint_long_model="$ac_cv_stdint_long_model$ac_cv_sizeof_voidp" name="$ac_cv_stdint_long_model" case "$ac_cv_stdint_char_model/$ac_cv_stdint_long_model" in 122/242) name="$name, IP16 (standard 16bit machine)" ;; 122/244) name="$name, LP32 (standard 32bit mac/win)" ;; 122/*) name="$name (unusual int16 model)" ;; 124/444) name="$name, ILP32 (standard 32bit unixish)" ;; 124/488) name="$name, LP64 (standard 64bit unixish)" ;; 124/448) name="$name, LLP64 (unusual 64bit unixish)" ;; 124/*) name="$name (unusual int32 model)" ;; 128/888) name="$name, ILP64 (unusual 64bit numeric)" ;; 128/*) name="$name (unusual int64 model)" ;; 222/*|444/*) name="$name (unusual dsptype)" ;; *) name="$name (very unusal model)" ;; esac echo "$as_me:$LINENO: result: combined for stdint datatype model... $name" >&5 echo "${ECHO_T}combined for stdint datatype model... $name" >&6 fi if test "_$ac_cv_header_stdint_x" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_x" elif test "_$ac_cv_header_stdint_o" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_o" elif test "_$ac_cv_header_stdint_u" != "_" ; then ac_cv_header_stdint="$ac_cv_header_stdint_u" else ac_cv_header_stdint="stddef.h" fi echo "$as_me:$LINENO: checking for extra inttypes in chosen header" >&5 echo $ECHO_N "checking for extra inttypes in chosen header... $ECHO_C" >&6 echo "$as_me:$LINENO: result: ($ac_cv_header_stdint)" >&5 echo "${ECHO_T}($ac_cv_header_stdint)" >&6 unset ac_cv_type_int_least32_t unset ac_cv_type_int_fast32_t echo "$as_me:$LINENO: checking for int_least32_t" >&5 echo $ECHO_N "checking for int_least32_t... $ECHO_C" >&6 if test "${ac_cv_type_int_least32_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_cv_header_stdint> int main () { if ((int_least32_t *) 0) return 0; if (sizeof (int_least32_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_int_least32_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_int_least32_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_int_least32_t" >&5 echo "${ECHO_T}$ac_cv_type_int_least32_t" >&6 echo "$as_me:$LINENO: checking for int_fast32_t" >&5 echo $ECHO_N "checking for int_fast32_t... $ECHO_C" >&6 if test "${ac_cv_type_int_fast32_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include<$ac_cv_header_stdint> int main () { if ((int_fast32_t *) 0) return 0; if (sizeof (int_fast32_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_int_fast32_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_int_fast32_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_int_fast32_t" >&5 echo "${ECHO_T}$ac_cv_type_int_fast32_t" >&6 echo "$as_me:$LINENO: checking for intmax_t" >&5 echo $ECHO_N "checking for intmax_t... $ECHO_C" >&6 if test "${ac_cv_type_intmax_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_cv_header_stdint> int main () { if ((intmax_t *) 0) return 0; if (sizeof (intmax_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_intmax_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_intmax_t=no fi rm -f conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_intmax_t" >&5 echo "${ECHO_T}$ac_cv_type_intmax_t" >&6 fi # shortcircut to system "stdint.h" # ------------------ PREPARE VARIABLES ------------------------------ if test "$GCC" = "yes" ; then ac_cv_stdint_message="using gnu compiler "`$CC --version | head -1` else ac_cv_stdint_message="using $CC" fi echo "$as_me:$LINENO: result: make use of $ac_cv_header_stdint in $ac_stdint_h $ac_cv_stdint_result" >&5 echo "${ECHO_T}make use of $ac_cv_header_stdint in $ac_stdint_h $ac_cv_stdint_result" >&6 # ----------------- DONE inttypes.h checks START header ------------- ac_config_commands="$ac_config_commands $ac_stdint_h" ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= fi if test -z "$CPP"; then if test "${ac_cv_prog_CPP+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else # Double quotes because CPP needs to be expanded for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" do ac_preproc_ok=false for ac_c_preproc_warn_flag in '' yes do # Use a header file that comes with gcc, so configuring glibc # with a fresh cross-compiler works. # Prefer to if __STDC__ is defined, since # exists even on freestanding compilers. # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. "Syntax error" is here to catch this case. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #ifdef __STDC__ # include #else # include #endif Syntax error _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Broken: fails on valid input. continue fi rm -f conftest.err conftest.$ac_ext # OK, works on sane cases. Now check whether non-existent headers # can be detected and how. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Passes both tests. ac_preproc_ok=: break fi rm -f conftest.err conftest.$ac_ext done # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. rm -f conftest.err conftest.$ac_ext if $ac_preproc_ok; then break fi done ac_cv_prog_CPP=$CPP fi CPP=$ac_cv_prog_CPP else ac_cv_prog_CPP=$CPP fi echo "$as_me:$LINENO: result: $CPP" >&5 echo "${ECHO_T}$CPP" >&6 ac_preproc_ok=false for ac_c_preproc_warn_flag in '' yes do # Use a header file that comes with gcc, so configuring glibc # with a fresh cross-compiler works. # Prefer to if __STDC__ is defined, since # exists even on freestanding compilers. # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. "Syntax error" is here to catch this case. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #ifdef __STDC__ # include #else # include #endif Syntax error _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Broken: fails on valid input. continue fi rm -f conftest.err conftest.$ac_ext # OK, works on sane cases. Now check whether non-existent headers # can be detected and how. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Passes both tests. ac_preproc_ok=: break fi rm -f conftest.err conftest.$ac_ext done # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. rm -f conftest.err conftest.$ac_ext if $ac_preproc_ok; then : else { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check See \`config.log' for more details." >&5 echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check See \`config.log' for more details." >&2;} { (exit 1); exit 1; }; } fi ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu echo "$as_me:$LINENO: checking for egrep" >&5 echo $ECHO_N "checking for egrep... $ECHO_C" >&6 if test "${ac_cv_prog_egrep+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if echo a | (grep -E '(a|b)') >/dev/null 2>&1 then ac_cv_prog_egrep='grep -E' else ac_cv_prog_egrep='egrep' fi fi echo "$as_me:$LINENO: result: $ac_cv_prog_egrep" >&5 echo "${ECHO_T}$ac_cv_prog_egrep" >&6 EGREP=$ac_cv_prog_egrep echo "$as_me:$LINENO: checking for ANSI C header files" >&5 echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6 if test "${ac_cv_header_stdc+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #include #include #include int main () { ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_header_stdc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_header_stdc=no fi rm -f conftest.$ac_objext conftest.$ac_ext if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | $EGREP "memchr" >/dev/null 2>&1; then : else ac_cv_header_stdc=no fi rm -f conftest* fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | $EGREP "free" >/dev/null 2>&1; then : else ac_cv_header_stdc=no fi rm -f conftest* fi if test $ac_cv_header_stdc = yes; then # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. if test "$cross_compiling" = yes; then : else cat >conftest.$ac_ext <<_ACEOF #line $LINENO "configure" /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #if ((' ' & 0x0FF) == 0x020) # define ISLOWER(c) ('a' <= (c) && (c) <= 'z') # define TOUPPER(c) (ISLOWER(c) ? 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Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the ETC s.r.o. nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # Written by Marcel Telka , 2002. # AC_INIT(include,0.3.2) AC_PREREQ(2.53) AC_REVISION($Revision: 1.8 $) AC_CONFIG_AUX_DIR(tools) AM_INIT_AUTOMAKE([check-news dist-bzip2]) AC_CONFIG_FILES( Makefile ) AM_MAINTAINER_MODE AX_CREATE_STDINT_H( owce-stdint.h ) AC_CHECK_HEADERS( stdint.h ) AM_CONDITIONAL( GENERATE_STDINT_H, test x$ac_cv_header_stdint_h = xno ) AC_OUTPUT