oprofile-1.3.0/0000775000175000017500000000000013323173530010335 500000000000000oprofile-1.3.0/TODO0000664000175000017500000002552012534404406010753 00000000000000This is a list (not exhaustive) of some of the stuff to cleanup/fix. If you're interested in hacking on any of these, please contact the list first for some pointers and/or read HACKING and doc/CodingStyle. 1.0 release ----------- (this is a minimal selection of stuff I think we need) o Remove opcontrol and all daemon-related stuff (as it's been deprecated since 0.9.8) o the various open bugs Later ----- (Thoughts from John Levon. Some of these may no longer be valid. And for opcontrol-related issues, we don't care, since oprofile 1.0 will no longer support opcontrol.) o consider tagging opreport -c entries with a number like gprof o --details for opreport -c, or diff?? o should [self] entries be ommitted if 0 ?? o oparchive could fix up {kern} paths with -p (what about diff between archive and current though?) o consider a sort option for diff % o opannotate is silent about symbols missing debug info o odb_insert() can fail on ftruncate or mremap() in db_manage.c but we don't try to recover gracefully. o output column shortname headers for opreport -l o is relative_to_absolute_path guaranteeing a trailing '/' documented ? o move oprofiled.log to OP_SAMPLE_DIR/current ? o pp tools must handle samples count overflow (marked as (unsigned)-1) o callgraph patch: better way to skip ignored backtrace ? o lib-image: and image: behavior depend on --separate=, if --separate=library opreport "lib-image:*libc*" --merge=lib works but not opreport "image:*libc*" --merge=lib whilst the behavior is reversed if --separate==none. Must we take care ? o dependencies between profile_container.h symbol_container.h and sample_container.h become more and more ugly, I needed to include them in a specific order in some source (still true??) o add event aliases for common things like icache misses, we must start to think about metrics including simple like event alias mapped to two or more events and intepreted specially by user space tools like using the ratio of samples; more tricky will be to select an event used as call count (no cg on it) and used to emulate the call count field in gprof. I think this is a after 1.0 thing but event aliases must be specified in a way allowing such extension o do we need an opreport like opreport -c (showing caller/callee at binary boundary not symbols) ? o we can add lots more unit tests yet o Itanium event constraints are not implemented o GUI still has a physical-counter interface, should have a general one like opcontrol --event o I think we should have the ability to have *fixed* width headers, e.g. : vma samples cum. samples % cum. % symbol name image name app name 0804c350 64582 64582 35.0757 35.0757 odb_insert /usr/loc...in/oprofiled /usr/local/oprofile-pp/bin/oprofiled Note the ellipsis o should we make the sighup handler re-read counter config and re-start profiling too ? o improve --smart-demangle o allow user to add it's own pattern in user.pat, document it. o hard code ${typename} regular definition to remove all current limitations (difficult, perhaps after 1.0 ?). o oprof_start dialog size is too small initially o i18n. We need a good formatter, and also remember format_percent() o opannotate --source --output-dir=~moz/op/ /usr/bin/oprofiled will fail because the ~ is not expanded (no space around it) (popt bug I say) o opannotate : I added this to the doc about difference between nr samples credited to a source function and total number of samples for this function: "The missing samples are not lost, they will be credited to another source location where the inlined function is defined. The inlined function will be credited from multiple call site and merged in one place in the annotated source file so there is no way to see from what call site are coming the samples for an inlined function." I think we can work around this: output multiple instances of inlined function like : inline foo() { foo: total 1500 30.00 ... ... annotated source from all call site inline foo() { foo (call site bar()): total 500 10.00 .. annotated source from call site bar() etc. what about template..., can we do/must we do something like that template eat_cpu() and do a similar things, merging and annotating all instantation then annotating for each distinct instantation, this will break our "keep the source line number in annotated source file identical to the original source" o events/mips/34k/events, some events does not make sense, they get identical event number, um and counter nr so they overlap, currently commented o can we find a more efficient implementation for sparse_array ? o libpp/profile.cpp:is_spu_sample_file() can be simplified by using read_header() o while fixing #1819350 I needed to make extra_images per profile session rather than a global var so I think we need to revisit find_image_path(), extra_found_images, --image-path (-p). Actually we can't do something ala: opreport { archive:tmp1 search_path=/lib/modules/2.6.20 } { archive:tmp2 search_path=/.../2.6.20.9 } because search_path is specified through -p which is not a part of the profile spec. Fixing #1819350 covered all case except this one but w/o any user visible change. Another way will be to save the -p option used with oparchive in a file at the toplevel of the archive, use it with all tools when an archive: is specified on the command line and deprecate the use of -p in such case. o consider to make extra_images a ref counted object, it's copied by value a few time but can contain a lot of string. There is also some ugly public member extra_images to fix. o daemon bss size can be improved, grep for MAX_PATH to see where dynamic allocation can be used, try $ nm oprofiled --size-sort too. Documentation ------------- o the docs should mention the default event for each arch somewhere o more discussion of problematic code needs to go in the "interpreting" section. o document gcc 2.95 and linenr info problems especially for inline functions o finish the internals manual JIT support ----------- o We need a more dynamic structure to handle entries_address_ascending and entries_symbols_ascending, actually many scaling problem occur because they are array, this was perfect to get a first implementation focusing on handling overlap and all but the need to qsort/copy arrays at each iteration is a performance killer. Some sort of AVL tree will do the job. o Related to the previous, it's possible to do all processing in opjitconv.c in a single left to right walk of the jitentry list. o see the FIXME at parse_dump.c:parse_code_unload() o Increment JITHEADER_VERSION in jitdump.h to be sure that the new code only accepts dump file created by the new code. o opjitconv.c:replacement_name() should be enough clever to avoid name collision so we can remove the recursive call to disambiguate_symbol_names(), need a hash table or some sort of associative array to check quickly if a name exists, we will need some sort of avl tree so it's probably better to do not implement a hash table only for this purpose. o op_write_native_code() must accept one more parameter, the real code size which can be zero or equal to code_size, this will allow to create elf file w/o any code contents, only a symbol table and .text sections w/o contents (yes ELF format allow that). For dynamic binary translation it'll avoid to dump tons of code for little use, opannotate --assembly will not work on such elf file but it can be a real win. It'll need to add to jitrecord0 a real_size field, and some trickery when building the elf file, taking care about the case we mix zero code size with non zero code size. Perhaps we can use it too for java, filtering native method etc. Actually we allow a simplified form of this feature by allowing to disable/enable code dumping but at the whole dump level not on a symbol basis, quite possible sufficient. [mpj: We're backing away from the idea of dumping JIT records without code. Since BFD asymbol type does not include symbol size, the op_bfd technique for determining symbol size relies on knowing the true file size; and if code is not included in the .jo file, we don't have true size.] o The pipe used for triggering JIT dump conversion should be used for normal dumping too. o See FIXME in agents/jvmti/libjvmti_oprofile.c: If enablement to get line number info would be configurable through command line, what should be the default on/off? o See FIXME in opjitconv/debug_line.c o The way to use the pipe should be made more secure to avoid denial of service attacks. We have to think about it. o Callgraph does not work properly for the .jo files the JIT support creates. See section Chapter 4, sect 2.3.2 "Callgraph and JIT support". Try to figure out a way to correlate an anonymous sample callgraph entry with the .jo file that may exist for the anonymous code. o see mail from Gisle Dankel: "JIT_SUPPORT: Adding support for file-backed non-ELF JIT code" -> should be changed (if useful) before next release o See FIXME in op_header.cpp: The check for header.mtime of JIT sample files is not correct because currently this mtime value is set to zero due to missing cookie setting for JIT sample files. Some additional check/setting to header.mtime should be made for JIT sample files. o Mono JIT support: 2007-11-08: with callgraph massi got oparchive error: parse_filename() invalid filename: /var/lib/oprofile/samples/current/{root}/var/lib/oprofile/samples/current/{root}/home/massi/mono/amd64/bin/mono/{dep}/{anon:anon}/32432.0x40a26000.0x40a36000/CPU_CLK_UNHALTED.100000.0.all.all.all/{dep}/{root}/var/lib/oprofile/samples/current/{root}/home/massi/mono/amd64/bin/mono/{dep}/{anon:anon}/32432.0x40a26000.0x40a36000/CPU_CLK_UNHALTED.100000.0.all.all.all/{cg}/{root}/usr/oprofile/bin/oprofiled/CPU_CLK_ Massi added Mono JIT support, code on the stack is never unloaded and there is no byte code, code is always compiled to native machine code, this mean than for mono at least we can do callgraph if we can fix this samples filename problem. General checks to make ---------------------- o rgrep FIXME o run Coverity o valgrind (--show-reachable=yes --leak-check=yes) o audit to track unnecessary include <> o gcc 3.0/3.x compile o Qt2/3 check, no Qt check o verify builds (modversions, kernel versions, athlon etc.). I have the necessary stuff to check kernel versions/configurations on PIII core (Phil) o use nm and a little script to track unused function o test it to hell and back o compile all C++ programs with STL_port and test them (gcc 3.4 contain a debug mode too but std::string iterator are not checked) o There is probably place of post profile tools where looking at errno will give better error messages. oprofile-1.3.0/pp/0000775000175000017500000000000013323173530010754 500000000000000oprofile-1.3.0/pp/common_option.h0000664000175000017500000000372512534404406013736 00000000000000/** * @file common_option.h * Declaration of entry point of pp tools, implementation file add common * options of pp tools and some miscelleaneous functions * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef COMMON_OPTION_H #define COMMON_OPTION_H #include #include #include "arrange_profiles.h" #include "demangle_symbol.h" namespace options { extern bool verbose; extern double threshold; extern std::string threshold_opt; extern std::string command_options; extern std::vector image_path; extern std::string root_path; struct spec { std::list common; std::list first; std::list second; }; } /** * prototype of a pp tool entry point. This entry point is called * by run_pp_tool */ typedef int (*pp_fct_run_t)(options::spec const & spec); /** * @param argc command line number of argument * @param argv command line argument pointer array * @param fct function to run to start this pp tool * * Provide a common entry to all pp tools, parsing all options, handling * common options and providing the necessary try catch clause */ int run_pp_tool(int argc, char const * argv[], pp_fct_run_t fct); /** * @param option one of [smart,none,normal] * * return the demangle_type of option or throw an exception if option * is not valid. */ demangle_type handle_demangle_option(std::string const & option); /** * @param mergespec merge option * @param allow_lib is merge)lib allowed in mergespec * @param exclude_dependent user specified --exclude-dependent * * parse merge option and return a merge_option filled from it. * */ merge_option handle_merge_option(std::vector const & mergespec, bool allow_lib, bool exclude_dependent); /** * Answer the question 'did the user pass in a session-dir argument?'. */ bool was_session_dir_supplied(void); #endif /* !COMMON_OPTION_H */ oprofile-1.3.0/pp/Makefile.am0000664000175000017500000000211412534404406012730 00000000000000AM_CPPFLAGS = \ -I ${top_srcdir}/libop \ -I ${top_srcdir}/libutil \ -I ${top_srcdir}/libdb \ -I ${top_srcdir}/libopt++ \ -I ${top_srcdir}/libutil++ \ -I ${top_srcdir}/libregex \ -I ${top_srcdir}/libpp \ @OP_CPPFLAGS@ AM_CXXFLAGS = @OP_CXXFLAGS@ AM_LDFLAGS = @OP_LDFLAGS@ bin_PROGRAMS = opreport opannotate opgprof oparchive LIBS=@POPT_LIBS@ @BFD_LIBS@ pp_common = common_option.cpp common_option.h common_libs = \ ../libpp/libpp.a \ ../libopt++/libopt++.a \ ../libregex/libop_regex.a \ ../libutil++/libutil++.a \ ../libop/libop.a \ ../libutil/libutil.a \ ../libdb/libodb.a opreport_SOURCES = opreport.cpp \ opreport_options.h opreport_options.cpp \ $(pp_common) opreport_LDADD = $(common_libs) opannotate_SOURCES = opannotate.cpp \ opannotate_options.h opannotate_options.cpp \ $(pp_common) opannotate_LDADD = $(common_libs) opgprof_SOURCES = opgprof.cpp \ opgprof_options.h opgprof_options.cpp \ $(pp_common) opgprof_LDADD = $(common_libs) oparchive_SOURCES = oparchive.cpp \ oparchive_options.h oparchive_options.cpp \ $(pp_common) oparchive_LDADD = $(common_libs) oprofile-1.3.0/pp/opreport_options.h0000664000175000017500000000233112603572700014473 00000000000000/** * @file opreport_options.h * Options for opreport tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OPREPORT_OPTIONS_H #define OPREPORT_OPTIONS_H #include #include #include #include "common_option.h" #include "string_filter.h" #include "symbol_sort.h" class profile_classes; class merge_option; namespace options { extern demangle_type demangle; extern bool symbols; extern bool callgraph; extern bool debug_info; extern bool details; extern bool reverse_sort; extern bool exclude_dependent; extern sort_options sort_by; extern merge_option merge_by; extern bool global_percent; extern bool long_filenames; extern bool show_address; extern string_filter symbol_filter; extern bool show_header; extern bool accumulated; extern bool xml; extern std::string xml_options; } /// All the chosen sample files. extern profile_classes classes; extern profile_classes classes2; /** * handle_options - process command line * @param spec profile specification * * Process the spec, fatally complaining on error. */ void handle_options(options::spec const & spec); #endif // OPREPORT_OPTIONS_H oprofile-1.3.0/pp/oparchive_options.cpp0000664000175000017500000000616012741227567015153 00000000000000/** * @file oparchive_options.cpp * Options for oparchive tool * * @remark Copyright 2002, 2003, 2004 OProfile authors * @remark Read the file COPYING * * @author William Cohen * @author Philippe Elie */ #include #include #include #include #include #include #include #include "op_config.h" #include "profile_spec.h" #include "arrange_profiles.h" #include "oparchive_options.h" #include "popt_options.h" #include "string_filter.h" #include "file_manip.h" #include "cverb.h" using namespace std; profile_classes classes; list sample_files; namespace options { demangle_type demangle = dmt_normal; bool exclude_dependent; merge_option merge_by; string outdirectory; bool list_files; } namespace { vector mergespec; popt::option options_array[] = { popt::option(options::outdirectory, "output-directory", 'o', "output to the given directory", "directory"), popt::option(options::exclude_dependent, "exclude-dependent", 'x', "exclude libs, kernel, and module samples for applications"), popt::option(options::list_files, "list-files", 'l', "just list the files necessary, don't produce the archive") }; /** * check incompatible or meaningless options * */ void check_options() { using namespace options; /* output directory is required */ if (!list_files) { if (outdirectory.size() == 0) { cerr << "Requires --output-directory option." << endl; exit(EXIT_FAILURE); } string realpath = op_realpath(outdirectory); if (realpath == "/") { cerr << "Invalid --output-directory: /" << endl; exit(EXIT_FAILURE); } } } } // anonymous namespace void handle_options(options::spec const & spec) { using namespace options; if (spec.first.size()) { cerr << "differential profiles not allowed" << endl; exit(EXIT_FAILURE); } // merging doesn't occur in oparchive but we must allow it to avoid // triggering sanity checking in arrange_profiles() merge_by.cpu = true; merge_by.lib = true; merge_by.tid = true; merge_by.tgid = true; merge_by.unitmask = true; check_options(); profile_spec const pspec = profile_spec::create(spec.common, image_path, root_path); if (!was_session_dir_supplied()) cerr << "Using " << op_samples_dir << " for session-dir" << endl; sample_files = pspec.generate_file_list(exclude_dependent, false); cverb << vsfile << "Matched sample files: " << sample_files.size() << endl; copy(sample_files.begin(), sample_files.end(), ostream_iterator(cverb << vsfile, "\n")); classes = arrange_profiles(sample_files, merge_by, pspec.extra_found_images); cverb << vsfile << "profile_classes:\n" << classes << endl; if (classes.v.empty()) { cerr << "error: no sample files found: profile specification " "too strict ?" << endl; exit(EXIT_FAILURE); } if (strncmp(op_session_dir, OP_SESSION_DIR_DEFAULT, strlen(OP_SESSION_DIR_DEFAULT))) cerr << "NOTE: The sample data in this archive is located at " << op_session_dir << endl << "and is being moved to the standard location of " << OP_SESSION_DIR_DEFAULT << "." << endl; } oprofile-1.3.0/pp/Makefile.in0000664000175000017500000005747613323172173012766 00000000000000# Makefile.in generated by automake 1.15.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2017 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; 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#include "locate_images.h" #include "op_exception.h" #include "popt_options.h" #include "cverb.h" #include "common_option.h" #include "file_manip.h" #include #include #include #include using namespace std; namespace options { double threshold = 0.0; string threshold_opt; string session_dir; string command_options; vector image_path; string root_path; } namespace { vector verbose_strings; popt::option common_options_array[] = { popt::option(verbose_strings, "verbose", 'V', // FIXME help string for verbose level "verbose output", "all,debug,bfd,level1,sfile,stats,xml"), popt::option(options::session_dir, "session-dir", '\0', "specify session path to hold samples database and session data (" OP_SESSION_DIR_DEFAULT ")", "path"), popt::option(options::image_path, "image-path", 'p', "comma-separated path to search missing binaries", "path"), popt::option(options::root_path, "root", 'R', "path to filesystem to search for missing binaries", "path"), }; int session_dir_supplied; double handle_threshold(string threshold) { double value = 0.0; if (threshold.length()) { istringstream ss(threshold); if (!(ss >> value)) { cerr << "illegal threshold value: " << threshold << " allowed range: [0-100]" << endl; exit(EXIT_FAILURE); } if (value < 0.0 || value > 100.0) { cerr << "illegal threshold value: " << threshold << " allowed range: [0-100]" << endl; exit(EXIT_FAILURE); } } cverb << vdebug << "threshold: " << value << endl;; return value; } vector pre_parse_spec(vector const & non_options) { vector result; for (size_t i = 0; i < non_options.size(); ++i) { if (non_options[i] == "{}") { result.push_back("{"); result.push_back("}"); } else { result.push_back(non_options[i]); } } return result; } options::spec const parse_spec(vector non_options) { bool in_first = false; bool in_second = false; bool first = false; bool second = false; options::spec pspec; non_options = pre_parse_spec(non_options); vector::const_iterator it = non_options.begin(); vector::const_iterator end = non_options.end(); for (; it != end; ++it) { if (*it == "{") { if (in_first || in_second || second) goto fail; if (first) { in_second = true; second = true; } else { in_first = true; first = true; } continue; } if (*it == "}") { if (in_first) { in_first = false; } else if (in_second) { in_second = false; } else { goto fail; } continue; } if (in_first) { pspec.first.push_back(*it); } else if (in_second) { pspec.second.push_back(*it); } else { pspec.common.push_back(*it); } } if (in_first || in_second || (first && !second)) goto fail; if (pspec.first.empty() && pspec.second.size()) goto fail; if (first && second) { pspec.first.insert(pspec.first.begin(), pspec.common.begin(), pspec.common.end()); pspec.second.insert(pspec.second.begin(), pspec.common.begin(), pspec.common.end()); } return pspec; fail: cerr << "invalid profile specification "; copy(non_options.begin(), non_options.end(), ostream_iterator(cerr, " ")); cerr << endl; exit(EXIT_FAILURE); } options::spec get_options(int argc, char const * argv[]) { vector non_options; popt::parse_options(argc, argv, non_options); // initialize paths in op_config.h if (options::session_dir.empty()) { char * cwd; struct stat sb; // If /oprofile_data exists (used by operf), we'll use that as session-dir cwd = new char[PATH_MAX]; options::session_dir = (getcwd(cwd, PATH_MAX) == NULL) ? "" : cwd; delete [] cwd; options::session_dir +="/oprofile_data"; if ((stat(options::session_dir.c_str(), &sb) < 0) || ((sb.st_mode & S_IFMT) != S_IFDIR)) { // Use the standard default session dir instead options::session_dir = OP_SESSION_DIR_DEFAULT; } session_dir_supplied = 0; } else { session_dir_supplied = 1; } init_op_config_dirs(options::session_dir.c_str()); if (!options::threshold_opt.empty()) options::threshold = handle_threshold(options::threshold_opt); if (!verbose::setup(verbose_strings)) { cerr << "unknown --verbose= options\n"; exit(EXIT_FAILURE); } // XML generator needs command line options for its header ostringstream str; for (int i = 1; i < argc; ++i) str << argv[i] << " "; options::command_options = str.str(); return parse_spec(non_options); } } // anon namespace int run_pp_tool(int argc, char const * argv[], pp_fct_run_t fct) { try { return fct(get_options(argc, argv)); } catch (op_runtime_error const & e) { cerr << argv[0] << " error: " << e.what() << endl; } catch (op_fatal_error const & e) { cerr << argv[0] << " error: " << e.what() << endl; } catch (op_exception const & e) { cerr << argv[0] << " error: " << e.what() << endl; } catch (invalid_argument const & e) { cerr << argv[0] << " error: " << e.what() << endl; } catch (exception const & e) { cerr << argv[0] << " error: " << e.what() << endl; } catch (...) { cerr << argv[0] << " unknown exception" << endl; } return EXIT_FAILURE; } demangle_type handle_demangle_option(string const & option) { if (option == "none") return dmt_none; if (option == "smart") return dmt_smart; if (option == "normal") return dmt_normal; throw op_runtime_error("invalid option --demangle=" + option); } merge_option handle_merge_option(vector const & mergespec, bool allow_lib, bool exclude_dependent) { using namespace options; merge_option merge_by; merge_by.cpu = false; merge_by.lib = false; merge_by.tid = false; merge_by.tgid = false; merge_by.unitmask = false; if (!allow_lib) merge_by.lib = true; bool is_all = false; vector::const_iterator cit = mergespec.begin(); vector::const_iterator end = mergespec.end(); for (; cit != end; ++cit) { if (*cit == "cpu") { merge_by.cpu = true; } else if (*cit == "tid") { merge_by.tid = true; } else if (*cit == "tgid") { // PP:5.21 tgid merge imply tid merging. merge_by.tgid = true; merge_by.tid = true; } else if ((*cit == "lib" || *cit == "library") && allow_lib) { merge_by.lib = true; } else if (*cit == "unitmask") { merge_by.unitmask = true; } else if (*cit == "all") { merge_by.cpu = true; merge_by.lib = true; merge_by.tid = true; merge_by.tgid = true; merge_by.unitmask = true; is_all = true; } else { cerr << "unknown merge option: " << *cit << endl; exit(EXIT_FAILURE); } } // if --merge all, don't warn about lib merging, // it's not user friendly. Behaviour should still // be correct. if (exclude_dependent && merge_by.lib && allow_lib && !is_all) { cerr << "--merge=lib is meaningless " << "with --exclude-dependent" << endl; exit(EXIT_FAILURE); } return merge_by; } bool was_session_dir_supplied(void) { return session_dir_supplied; } oprofile-1.3.0/pp/oparchive_options.h0000664000175000017500000000144212534404406014603 00000000000000/** * @file oparchive_options.h * Options for oparchive tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Will Cohen * @author Philippe Elie */ #ifndef OPARCHIVE_OPTIONS_H #define OPARCHIVE_OPTIONS_H #include "common_option.h" class profile_classes; class merge_option; namespace options { extern bool exclude_dependent; extern merge_option merge_by; extern std::string outdirectory; extern bool list_files; } /// All the chosen sample files. extern profile_classes classes; extern std::list sample_files; /** * handle_options - process command line * @param spec profile specification * * Process the spec, fatally complaining on error. */ void handle_options(options::spec const & spec); #endif // OPARCHIVE_OPTIONS_H oprofile-1.3.0/pp/opannotate_options.h0000664000175000017500000000201312534404406014766 00000000000000/** * @file opannotate_options.h * Options for opannotate tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OPANNOTATE_OPTIONS_H #define OPANNOTATE_OPTIONS_H #include #include #include "common_option.h" #include "path_filter.h" class profile_classes; namespace options { extern demangle_type demangle; extern bool source; extern bool assembly; extern string_filter symbol_filter; extern path_filter file_filter; extern std::string output_dir; extern std::vector search_dirs; extern std::vector base_dirs; extern std::vector objdump_params; extern double threshold; } /// classes of sample filenames to handle extern profile_classes classes; /** * handle_options - process command line * @param spec profile specification * * Process the spec, fatally complaining on error. */ void handle_options(options::spec const & spec); #endif // OPANNOTATE_OPTIONS_H oprofile-1.3.0/pp/opreport_options.cpp0000664000175000017500000002127612603572700015037 00000000000000/** * @file opreport_options.cpp * Options for opreport tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include "op_config.h" #include "profile_spec.h" #include "arrange_profiles.h" #include "opreport_options.h" #include "popt_options.h" #include "string_filter.h" #include "file_manip.h" #include "xml_output.h" #include "xml_utils.h" #include "cverb.h" using namespace std; profile_classes classes; profile_classes classes2; namespace options { demangle_type demangle = dmt_normal; bool symbols; bool callgraph; bool debug_info; bool details; bool exclude_dependent; string_filter symbol_filter; sort_options sort_by; merge_option merge_by; bool show_header = true; bool long_filenames; bool show_address; bool accumulated; bool reverse_sort; bool global_percent; bool xml; string xml_options; } namespace { string outfile; vector mergespec; vector sort; vector exclude_symbols; vector include_symbols; string demangle_option = "normal"; popt::option options_array[] = { popt::option(options::callgraph, "callgraph", 'c', "show call graph"), popt::option(options::details, "details", 'd', "output detailed samples for each symbol"), popt::option(options::symbols, "symbols", 'l', "list all symbols"), popt::option(outfile, "output-file", 'o', "output to the given filename", "file"), popt::option(sort, "sort", 's', "sort by", "sample,image,app-name,symbol,debug,vma"), popt::option(options::reverse_sort, "reverse-sort", 'r', "use reverse sort"), popt::option(mergespec, "merge", 'm', "comma separated list", "cpu,lib,tid,tgid,unitmask,all"), popt::option(options::exclude_dependent, "exclude-dependent", 'x', "exclude libs, kernel, and module samples for applications"), popt::option(exclude_symbols, "exclude-symbols", 'e', "exclude these comma separated symbols", "symbols"), popt::option(include_symbols, "include-symbols", 'i', "include these comma separated symbols", "symbols"), popt::option(options::threshold_opt, "threshold", 't', "minimum percentage needed to produce output", "percent"), popt::option(demangle_option, "demangle", 'D', "demangle GNU C++ symbol names (default normal)", "none|normal|smart"), // PP:5 popt::option(options::debug_info, "debug-info", 'g', "add source file and line number to output"), popt::option(options::show_header, "no-header", 'n', "remove all headers from output"), popt::option(options::show_address, "show-address", 'w', "show VMA address of each symbol"), popt::option(options::long_filenames, "long-filenames", 'f', "show the full path of filenames"), popt::option(options::accumulated, "accumulated", 'a', "percentage field show accumulated count"), popt::option(options::global_percent, "global-percent", '%', "percentage are not relative to symbol count or image " "count but total sample count"), popt::option(options::xml, "xml", 'X', "XML output"), }; void handle_sort_option() { if (options::xml && !sort.empty()) { cerr << "warning: sort options ignored because they " << "are incompatible with --xml" << endl; // don't allow any other sorting, except the default below, // to mess up symbol traversal for XML sort.clear(); } if (sort.empty() || options::xml) { // PP:5.14 sort default to sample if (options::xml) { // implicitly sort by app-name,image so that in the // symbol traversal all library module symbols are // grouped together with their application sort.push_back("app-name"); sort.push_back("image"); } else sort.push_back("sample"); } vector::const_iterator cit = sort.begin(); vector::const_iterator end = sort.end(); for (; cit != end; ++cit) options::sort_by.add_sort_option(*cit); } void handle_output_file() { if (outfile.empty()) return; static ofstream os(outfile.c_str()); if (!os) { cerr << "Couldn't open \"" << outfile << "\" for writing." << endl; exit(EXIT_FAILURE); } cout.rdbuf(os.rdbuf()); } /// Check incompatible or meaningless options. void check_options(bool diff) { using namespace options; bool do_exit = false; if (callgraph) { symbols = true; if (details) { cerr << "--callgraph is incompatible with --details" << endl; do_exit = true; } if (diff) { cerr << "differential profiles are incompatible with --callgraph" << endl; do_exit = true; } } if (xml) { if (accumulated) { cerr << "--accumulated is incompatible with --xml" << endl; do_exit = true; } if (global_percent) { cerr << "--global_percent is incompatible with --xml" << endl; do_exit = true; } } if (details && diff) { cerr << "differential profiles are incompatible with --details" << endl; do_exit = true; } if (!symbols) { if (diff) { cerr << "different profiles are meaningless " "without --symbols" << endl; do_exit = true; } if (show_address) { cerr << "--show-address is meaningless " "without --symbols" << endl; do_exit = true; } if (debug_info || accumulated) { cerr << "--debug-info and --accumulated are " << "meaningless without --symbols" << endl; do_exit = true; } if (!exclude_symbols.empty() || !include_symbols.empty()) { cerr << "--exclude-symbols and --include-symbols are " << "meaningless without --symbols" << endl; do_exit = true; } if (find(sort_by.options.begin(), sort_by.options.end(), sort_options::vma) != sort_by.options.end()) { cerr << "--sort=vma is " << "meaningless without --symbols" << endl; do_exit = true; } } if (global_percent && symbols && !(details || callgraph)) { cerr << "--global-percent is meaningless with --symbols " "and without --details or --callgraph" << endl; do_exit = true; } if (do_exit) exit(EXIT_FAILURE); } /// process a spec into classes void process_spec(profile_classes & classes, list const & spec) { using namespace options; copy(spec.begin(), spec.end(), ostream_iterator(cverb << vsfile, " ")); cverb << vsfile << "\n\n"; profile_spec const pspec = profile_spec::create(spec, options::image_path, options::root_path); if (!was_session_dir_supplied()) cerr << "Using " << op_samples_dir << " for samples directory." << endl; list sample_files = pspec.generate_file_list(exclude_dependent, !options::callgraph); cverb << vsfile << "Archive: " << pspec.get_archive_path() << endl; cverb << vsfile << "Matched sample files: " << sample_files.size() << endl; copy(sample_files.begin(), sample_files.end(), ostream_iterator(cverb << vsfile, "\n")); classes = arrange_profiles(sample_files, merge_by, pspec.extra_found_images); cverb << vsfile << "profile_classes:\n" << classes << endl; if (classes.v.empty()) { cerr << "error: no sample files found: profile specification " "too strict ?" << endl; exit(EXIT_FAILURE); } } } // namespace anon void handle_options(options::spec const & spec) { using namespace options; if (details) { symbols = true; show_address = true; } if (options::xml) { if (spec.common.size() != 0) xml_utils::add_option(SESSION, spec.common); if (debug_info) xml_utils::add_option(DEBUG_INFO, true); if (details) xml_utils::add_option(DETAILS, true); if (!image_path.empty()) xml_utils::add_option(IMAGE_PATH, image_path); if (!mergespec.empty()) xml_utils::add_option(MERGE, mergespec); if (exclude_dependent) xml_utils::add_option(EXCLUDE_DEPENDENT, true); if (!exclude_symbols.empty()) xml_utils::add_option(EXCLUDE_SYMBOLS, exclude_symbols); if (!include_symbols.empty()) xml_utils::add_option(INCLUDE_SYMBOLS, include_symbols); } handle_sort_option(); merge_by = handle_merge_option(mergespec, true, exclude_dependent); handle_output_file(); demangle = handle_demangle_option(demangle_option); check_options(spec.first.size()); symbol_filter = string_filter(include_symbols, exclude_symbols); if (!spec.first.size()) { process_spec(classes, spec.common); } else { if (options::xml) { cerr << "differential profiles are incompatible with --xml" << endl; exit(EXIT_FAILURE); } cverb << vsfile << "profile spec 1:" << endl; process_spec(classes, spec.first); cverb << vsfile << "profile spec 2:" << endl; process_spec(classes2, spec.second); if (!classes.matches(classes2)) { cerr << "profile classes are incompatible" << endl; exit(EXIT_FAILURE); } } } oprofile-1.3.0/pp/opannotate_options.cpp0000664000175000017500000001307512534404406015333 00000000000000/** * @file opannotate_options.cpp * Options for opannotate tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include "op_config.h" #include "profile_spec.h" #include "arrange_profiles.h" #include "op_exception.h" #include "opannotate_options.h" #include "popt_options.h" #include "cverb.h" using namespace std; profile_classes classes; namespace options { demangle_type demangle = dmt_normal; string output_dir; vector search_dirs; vector base_dirs; merge_option merge_by; path_filter file_filter; string_filter symbol_filter; bool source; bool assembly; vector objdump_params; bool exclude_dependent; } namespace { string include_symbols; string exclude_symbols; string include_file; string exclude_file; string demangle_option = "normal"; vector mergespec; popt::option options_array[] = { popt::option(demangle_option, "demangle", 'D', "demangle GNU C++ symbol names (default normal)", "none|normal|smart"), popt::option(options::output_dir, "output-dir", 'o', "output directory", "directory name"), popt::option(options::search_dirs, "search-dirs", 'd', "directories to look for source files", "comma-separated paths"), popt::option(options::base_dirs, "base-dirs", 'b', "source file prefixes to strip", "comma-separated paths"), popt::option(include_file, "include-file", '\0', "include these comma separated filename", "filenames"), popt::option(exclude_file, "exclude-file", '\0', "exclude these comma separated filename", "filenames"), popt::option(include_symbols, "include-symbols", 'i', "include these comma separated symbols", "symbols"), popt::option(exclude_symbols, "exclude-symbols", 'e', "exclude these comma separated symbols", "symbols"), popt::option(options::objdump_params, "objdump-params", '\0', "additional params to pass to objdump", "parameters"), popt::option(options::exclude_dependent, "exclude-dependent", 'x', "exclude libs, kernel, and module samples for applications"), popt::option(mergespec, "merge", 'm', "comma separated list", "cpu,tid,tgid,unitmask,all"), popt::option(options::source, "source", 's', "output source"), popt::option(options::assembly, "assembly", 'a', "output assembly"), popt::option(options::threshold_opt, "threshold", 't', "minimum percentage needed to produce output", "percent"), }; } // anonymous namespace void handle_options(options::spec const & spec) { using namespace options; vector tmp_objdump_parms; /* When passing a quoted string of options from opannotate for the * objdump command, objdump_parms consists of a single string. Need * to break the string into a series of individual options otherwise * the call to exec_comand fails when it sees the space between the * options. */ for (unsigned int i = 0; i < objdump_params.size(); i++) { string s; s = objdump_params[i]; stringstream ss(s); istream_iterator begin(ss); istream_iterator end; vector vstrings(begin, end); for (unsigned int j = 0; j < vstrings.size(); j++) tmp_objdump_parms.push_back(vstrings[j]); } // update objdump_parms. objdump_params.assign(tmp_objdump_parms.begin(), tmp_objdump_parms.end()); if (spec.first.size()) { cerr << "differential profiles not allowed" << endl; exit(EXIT_FAILURE); } if (!assembly && !source) { cerr << "you must specify at least --source or --assembly\n"; exit(EXIT_FAILURE); } if (!objdump_params.empty() && !assembly) { cerr << "--objdump-params is meaningless without --assembly\n"; exit(EXIT_FAILURE); } if (search_dirs.empty() && !base_dirs.empty()) { cerr << "--base-dirs is useless unless you specify an " "alternative source location with --search-dirs" << endl; exit(EXIT_FAILURE); } if (assembly && !output_dir.empty()) { cerr << "--output-dir is meaningless with --assembly" << endl; exit(EXIT_FAILURE); } if (assembly && (!include_file.empty() || !exclude_file.empty())) { cerr << "--exclude[include]-file options not supported with --assembly" << endl; cerr << "Please see the opannotate man page." << endl; exit(EXIT_FAILURE); } options::symbol_filter = string_filter(include_symbols, exclude_symbols); options::file_filter = path_filter(include_file, exclude_file); profile_spec const pspec = profile_spec::create(spec.common, options::image_path, options::root_path); if (!was_session_dir_supplied()) cerr << "Using " << op_samples_dir << " for session-dir" << endl; list sample_files = pspec.generate_file_list(exclude_dependent, true); cverb << vsfile << "Archive: " << pspec.get_archive_path() << endl; cverb << vsfile << "Matched sample files: " << sample_files.size() << endl; copy(sample_files.begin(), sample_files.end(), ostream_iterator(cverb << vsfile, "\n")); demangle = handle_demangle_option(demangle_option); // we always merge but this have no effect on output since at source // or assembly point of view the result will be merged anyway merge_by = handle_merge_option(mergespec, false, exclude_dependent); classes = arrange_profiles(sample_files, merge_by, pspec.extra_found_images); cverb << vsfile << "profile_classes:\n" << classes << endl; if (classes.v.empty()) { cerr << "error: no sample files found: profile specification " "too strict ?" << endl; exit(EXIT_FAILURE); } } oprofile-1.3.0/pp/opgprof.cpp0000664000175000017500000002033012603572700013054 00000000000000/** * @file opgprof.cpp * Implement opgprof utility * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "op_header.h" #include "profile.h" #include "op_libiberty.h" #include "op_fileio.h" #include "string_filter.h" #include "profile_container.h" #include "arrange_profiles.h" #include "image_errors.h" #include "opgprof_options.h" #include "cverb.h" #include "op_file.h" using namespace std; extern profile_classes classes; namespace { #define GMON_VERSION 1 #define GMON_TAG_TIME_HIST 0 #define GMON_TAG_CG_ARC 1 struct gmon_hdr { char cookie[4]; u32 version; u32 spare[3]; }; void op_write_vma(FILE * fp, op_bfd const & abfd, bfd_vma vma) { // bfd vma write size is a per binary property not a bfd // configuration property switch (abfd.bfd_arch_bits_per_address()) { case 32: op_write_u32(fp, vma); break; case 64: op_write_u64(fp, vma); break; default: cerr << "oprofile: unknown vma size for this binary\n"; exit(EXIT_FAILURE); } } void get_vma_range(bfd_vma & min, bfd_vma & max, profile_container const & samples) { min = bfd_vma(-1); max = 0; sample_container::samples_iterator it = samples.begin(); sample_container::samples_iterator end = samples.end(); for (; it != end ; ++it) { if (it->second.vma < min) min = it->second.vma; if (it->second.vma > max) max = it->second.vma; } if (min == bfd_vma(-1)) min = 0; // we must return a range [min, max) not a range [min, max] if (max != 0) max += 1; } /** * @param abfd bfd object * @param samples_files profile container to act on * @param gap a power of 2 * * return true if all sample in samples_files are at least aligned on gap. This * function is used to get at runtime the right size of gprof bin size * reducing gmon.out on arch with fixed size instruction length * */ bool aligned_samples(profile_container const & samples, int gap) { sample_container::samples_iterator it = samples.begin(); sample_container::samples_iterator end = samples.end(); for (; it != end ; ++it) { if (it->second.vma % gap) return false; } return true; } void output_cg(FILE * fp, op_bfd const & abfd, profile_t const & cg_db) { opd_header const & header = cg_db.get_header(); bfd_vma offset = 0; if (header.is_kernel) offset = abfd.get_start_offset(0); else offset = header.anon_start; profile_t::iterator_pair p_it = cg_db.samples_range(); for (; p_it.first != p_it.second; ++p_it.first) { bfd_vma from = p_it.first.vma() >> 32; bfd_vma to = p_it.first.vma() & 0xffffffff; op_write_u8(fp, GMON_TAG_CG_ARC); op_write_vma(fp, abfd, abfd.offset_to_pc(from + offset)); op_write_vma(fp, abfd, abfd.offset_to_pc(to + offset)); u32 count = p_it.first.count(); if (count != p_it.first.count()) { count = (u32)-1; cerr << "Warning: capping sample count by " << p_it.first.count() - count << endl; } op_write_u32(fp, p_it.first.count()); } } void output_gprof(op_bfd const & abfd, profile_container const & samples, profile_t const & cg_db, string const & gmon_filename) { static gmon_hdr hdr = { { 'g', 'm', 'o', 'n' }, GMON_VERSION, {0, 0, 0 } }; bfd_vma low_pc; bfd_vma high_pc; /* FIXME worth to try more multiplier ? */ int multiplier = 2; if (aligned_samples(samples, 4)) multiplier = 8; cverb << vdebug << "opgrof multiplier: " << multiplier << endl; get_vma_range(low_pc, high_pc, samples); cverb << vdebug << "low_pc: " << hex << low_pc << " " << "high_pc: " << high_pc << dec << endl; // round-down low_pc to ensure bin number is correct in the inner loop low_pc = (low_pc / multiplier) * multiplier; // round-up high_pc to ensure a correct histsize calculus high_pc = ((high_pc + multiplier - 1) / multiplier) * multiplier; cverb << vdebug << "low_pc: " << hex << low_pc << " " << "high_pc: " << high_pc << dec << endl; size_t histsize = (high_pc - low_pc) / multiplier; // FIXME: must we skip the flat profile write if histsize == 0 ? // (this can occur with callgraph w/o samples to the binary) but in // this case user must gprof --no-flat-profile which is a bit boring // and result *seems* weirds. FILE * fp = op_open_file(gmon_filename.c_str(), "w"); op_write_file(fp, &hdr, sizeof(gmon_hdr)); op_write_u8(fp, GMON_TAG_TIME_HIST); op_write_vma(fp, abfd, low_pc); op_write_vma(fp, abfd, high_pc); /* size of histogram */ op_write_u32(fp, histsize); /* profiling rate */ op_write_u32(fp, 1); op_write_file(fp, "samples\0\0\0\0\0\0\0\0", 15); /* abbreviation */ op_write_u8(fp, '1'); u16 * hist = (u16*)xcalloc(histsize, sizeof(u16)); profile_container::symbol_choice choice; choice.threshold = options::threshold; symbol_collection symbols = samples.select_symbols(choice); symbol_collection::const_iterator sit = symbols.begin(); symbol_collection::const_iterator send = symbols.end(); for (; sit != send; ++sit) { sample_container::samples_iterator it = samples.begin(*sit); sample_container::samples_iterator end = samples.end(*sit); for (; it != end ; ++it) { u32 pos = (it->second.vma - low_pc) / multiplier; count_type count = it->second.counts[0]; if (pos >= histsize) { cerr << "Bogus histogram bin " << pos << ", larger than " << pos << " !\n"; continue; } if (hist[pos] + count > (u16)-1) { hist[pos] = (u16)-1; cerr << "Warning: capping sample count by " << hist[pos] + count - ((u16)-1) << endl; } else { hist[pos] += (u16)count; } } } op_write_file(fp, hist, histsize * sizeof(u16)); if (!cg_db.empty()) output_cg(fp, abfd, cg_db); op_close_file(fp); free(hist); } void load_samples(op_bfd const & abfd, list const & files, string const & image, profile_container & samples) { list::const_iterator it = files.begin(); list::const_iterator const end = files.end(); for (; it != end; ++it) { // we can get call graph w/o any samples to the binary if (it->sample_filename.empty()) continue; cverb << vsfile << "loading flat samples files : " << it->sample_filename << endl; profile_t profile; profile.add_sample_file(it->sample_filename); profile.set_offset(abfd); check_mtime(abfd.get_filename(), profile.get_header()); samples.add(profile, abfd, image, 0); } } void load_cg(profile_t & cg_db, list const & files) { list::const_iterator it = files.begin(); list::const_iterator const end = files.end(); /* the list of non cg files is a super set of the list of cg file * (module always log a samples to non-cg files before logging * call stack) so by using the list of non-cg file we are sure to get * all existing cg files. */ for (; it != end; ++it) { list::const_iterator cit; list::const_iterator const cend = it->cg_files.end(); for (cit = it->cg_files.begin(); cit != cend; ++cit) { // FIXME: do we need filtering ? /* We can't handle start_offset now but after splitting * data in from/to eip. */ cverb << vsfile << "loading cg samples file : " << *cit << endl; cg_db.add_sample_file(*cit); } } } int opgprof(options::spec const & spec) { handle_options(spec); profile_container samples(false, true, classes.extra_found_images); bool ok = image_profile.error == image_ok; // FIXME: symbol_filter would be allowed through option op_bfd abfd(image_profile.image, string_filter(), classes.extra_found_images, ok); if (!ok && image_profile.error == image_ok) image_profile.error = image_format_failure; if (image_profile.error != image_ok) { report_image_error(image_profile, true, classes.extra_found_images); exit(EXIT_FAILURE); } profile_t cg_db; image_group_set const & groups = image_profile.groups[0]; image_group_set::const_iterator it; for (it = groups.begin(); it != groups.end(); ++it) { load_samples(abfd, it->files, image_profile.image, samples); load_cg(cg_db, it->files); } output_gprof(abfd, samples, cg_db, options::gmon_filename); return 0; } } // anonymous namespace int main(int argc, char const * argv[]) { return run_pp_tool(argc, argv, opgprof); } oprofile-1.3.0/pp/oparchive.cpp0000664000175000017500000002267013306276754013404 00000000000000/** * @file oparchive.cpp * Implement oparchive utility * * @remark Copyright 2003, 2004 OProfile authors * @remark Read the file COPYING * * @author Will Cohen * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include #include #include #include #include #include "op_file.h" #include "op_bfd.h" #include "op_config.h" #include "oparchive_options.h" #include "file_manip.h" #include "cverb.h" #include "image_errors.h" #include "string_manip.h" #include "locate_images.h" using namespace std; namespace { void copy_one_file(image_error err, string const & source, string const & dest) { if (!op_file_readable(source)) return; if (options::list_files) { cout << source << endl; return; } if (!copy_file(source, dest) && err == image_ok) { cerr << "can't copy from " << source << " to " << dest << " cause: " << strerror(errno) << endl; } } static void _copy_operf_stats(string const & archive_stats, string const & stats_path) { struct dirent * dirent; string throttled_path; throttled_path = stats_path + "/throttled"; DIR * dir = opendir(throttled_path.c_str()); while (dir && (dirent = readdir(dir))) { if ((!strcmp(dirent->d_name, ".")) || (!strcmp(dirent->d_name, ".."))) continue; string archive_stats_path; string throttled_event = throttled_path + "/" + dirent->d_name; archive_stats_path = archive_stats + "throttled/" + dirent->d_name; if (!options::list_files && create_path(archive_stats_path.c_str())) { cerr << "Unable to create directory for " << archive_stats_path << "." << endl; exit (EXIT_FAILURE); } copy_one_file(image_ok, throttled_event, archive_stats_path); } if (dir) closedir(dir); for (int i = 0; i < OPERF_MAX_STATS; i++) { if (i > 0 && i < OPERF_INDEX_OF_FIRST_LOST_STAT) continue; string fname = stats_path + "/" + stats_filenames[i]; int fd = open(fname.c_str(), O_RDONLY); if (fd != -1) { string archive_stats_path = archive_stats + stats_filenames[i]; if (!options::list_files && create_path(archive_stats_path.c_str())) { cerr << "Unable to create directory for " << archive_stats_path << "." << endl; exit (EXIT_FAILURE); } copy_one_file(image_ok, fname, archive_stats_path); close(fd); } } } static void _copy_legacy_stats(DIR * dir, string const & archive_stats, string const & stats_path) { struct dirent * dirent; string archive_stats_path = archive_stats + "event_lost_overflow"; if (!options::list_files && create_path(archive_stats_path.c_str())) { cerr << "Unable to create directory for " << archive_stats_path << "." << endl; exit (EXIT_FAILURE); } copy_one_file(image_ok, stats_path + "event_lost_overflow", archive_stats_path); while ((dirent = readdir(dir))) { int cpu_nr; string path; if (sscanf(dirent->d_name, "cpu%d", &cpu_nr) != 1) continue; path = string(dirent->d_name) + "/" + "sample_lost_overflow"; archive_stats_path = archive_stats + path; if (!options::list_files && create_path(archive_stats_path.c_str())) { cerr << "Unable to create directory for " << archive_stats_path << "." << endl; exit (EXIT_FAILURE); } copy_one_file(image_ok, stats_path + path, archive_stats_path); } } void copy_stats(string const & session_samples_dir, string const & archive_path) { DIR * dir; string stats_path; stats_path = session_samples_dir + "stats/"; if (!(dir = opendir(stats_path.c_str()))) { return; } string sample_base_dir = session_samples_dir.substr(archive_path.size()); string archive_stats = options::outdirectory + sample_base_dir + "stats/"; _copy_legacy_stats(dir, archive_stats, stats_path); closedir(dir); _copy_operf_stats(archive_stats, stats_path); } int oparchive(options::spec const & spec) { handle_options(spec); string archive_path = classes.extra_found_images.get_archive_path(); /* Check to see if directory can be created */ if (!options::list_files && create_path(options::outdirectory.c_str())) { cerr << "Unable to create directory for " << options::outdirectory << "." << endl; exit (EXIT_FAILURE); } /* copy over each of the executables and the debuginfo files */ list iprofiles = invert_profiles(classes); report_image_errors(iprofiles, classes.extra_found_images); list::iterator it = iprofiles.begin(); list::iterator const end = iprofiles.end(); cverb << vdebug << "(exe_names)" << endl << endl; for (; it != end; ++it) { string exe_name = it->image; image_error error; string real_exe_name = classes.extra_found_images.find_image_path(it->image, error, true); if (error == image_ok) exe_name = classes.extra_found_images.strip_path_prefix(real_exe_name); // output name must be identical to the original name, when // using this archive the used fixup will be identical e.g.: // oparchive -p /lib/modules/2.6.42/kernel -o tmp; // opreport -p /lib/modules/2.6.42/kernel { archive:tmp } string exe_archive_file = options::outdirectory + exe_name; // FIXME: hacky if (it->error == image_not_found && is_prefix(exe_name, "anon ")) continue; cverb << vdebug << real_exe_name << endl; /* Create directory for executable file. */ if (!options::list_files && create_path(exe_archive_file.c_str())) { cerr << "Unable to create directory for " << exe_archive_file << "." << endl; exit (EXIT_FAILURE); } /* Copy actual executable files */ copy_one_file(it->error, real_exe_name, exe_archive_file); /* If there are any debuginfo files, copy them over. * Need to copy the debug info file to somewhere we'll * find it - executable location + "/.debug" * to avoid overwriting files with the same name. The * /usr/lib/debug search path is not going to work. */ bfd * ibfd = open_bfd(real_exe_name); if (ibfd) { string dirname = op_dirname(real_exe_name); string debug_filename; if (find_separate_debug_file(ibfd, real_exe_name, debug_filename, classes.extra_found_images)) { /* found something copy it over */ string dest_debug_dir = options::outdirectory + dirname + "/.debug/"; if (!options::list_files && create_dir(dest_debug_dir.c_str())) { cerr << "Unable to create directory: " << dest_debug_dir << "." << endl; exit (EXIT_FAILURE); } string dest_debug = dest_debug_dir + op_basename(debug_filename); copy_one_file(image_ok, debug_filename, dest_debug); } bfd_close(ibfd); } } /* place samples and other related material in easily found default directory */ string dest_session_dir = options::outdirectory + string(OP_SESSION_DIR_DEFAULT); string dest_samples_dir = dest_session_dir + string("samples"); /* dest_session_dir is parent of dest_samples and will also created */ if (!options::list_files && create_path(dest_samples_dir.c_str())) { cerr << "Unable to create directory for " << dest_samples_dir << "." << endl; exit (EXIT_FAILURE); } /* copy over each of the sample files */ list::iterator sit = sample_files.begin(); list::iterator const send = sample_files.end(); string a_sample_file = *sit; int offset = a_sample_file.find('{'); string base_samples_dir = a_sample_file.substr(0, offset); copy_stats(base_samples_dir, archive_path); cverb << vdebug << "(sample_names)" << endl << endl; for (; sit != send; ++sit) { string sample_name = *sit; /* determine the session name of sample file */ int offset = sample_name.find('{'); string base_samples_dir = sample_name.substr(0, offset-1); string session = op_basename(base_samples_dir.c_str()); /* Get rid of the the archive_path from the name */ string sample_base = sample_name.substr(offset); string sample_archive_file = dest_samples_dir + "/" + session + "/" + sample_base; cverb << vdebug << sample_name << endl; cverb << vdebug << " destp " << sample_archive_file << endl; if (!options::list_files && create_path(sample_archive_file.c_str())) { cerr << "Unable to create directory for " << sample_archive_file << "." << endl; exit (EXIT_FAILURE); } /* Copy over actual sample file. */ copy_one_file(image_ok, sample_name, sample_archive_file); } /* copy over the /abi file if it exists */ char * real_session_dir = realpath(op_session_dir, NULL); if (!real_session_dir) { cerr << "Unable to to obtain realpath for " << op_session_dir << endl; exit (EXIT_FAILURE); } string abi_name = string(real_session_dir) + string("/abi"); string dest_abi_name = dest_session_dir + string("/abi"); copy_one_file(image_ok, archive_path + abi_name, dest_abi_name); /* copy over the /samples/oprofiled.log file */ string log_name = string(real_session_dir) + string("/samples") + string("/oprofiled.log"); string dest_log_name = dest_samples_dir + string("/oprofiled.log"); copy_one_file(image_ok, archive_path + log_name, dest_log_name); /* copy over the /samples/operf.log file */ log_name = string(real_session_dir) + string("/samples") + string("/operf.log"); dest_log_name = dest_samples_dir + string("/operf.log"); copy_one_file(image_ok, archive_path + log_name, dest_log_name); free(real_session_dir); return 0; } } // anonymous namespace int main(int argc, char const * argv[]) { return run_pp_tool(argc, argv, oparchive); } oprofile-1.3.0/pp/opgprof_options.h0000664000175000017500000000124412534404406014277 00000000000000/** * @file opgprof_options.h * Options for opgprof tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OPGPROF_OPTIONS_H #define OPGPROF_OPTIONS_H #include #include "common_option.h" namespace options { extern std::string gmon_filename; } class inverted_profile; /// a set of sample filenames to handle. extern inverted_profile image_profile; /** * handle_options - process command line * @param spec profile specification * * Process the spec, fatally complaining on error. */ void handle_options(options::spec const & spec); #endif // OPGPROF_OPTIONS_H oprofile-1.3.0/pp/opreport.cpp0000664000175000017500000003465412603572700013270 00000000000000/** * @file opreport.cpp * Implement opreport utility * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include "op_exception.h" #include "stream_util.h" #include "string_manip.h" #include "file_manip.h" #include "opreport_options.h" #include "op_header.h" #include "profile.h" #include "populate.h" #include "arrange_profiles.h" #include "profile_container.h" #include "callgraph_container.h" #include "diff_container.h" #include "symbol_sort.h" #include "format_output.h" #include "xml_utils.h" #include "image_errors.h" using namespace std; namespace { static size_t nr_classes; /// storage for a merged file summary struct summary { count_array_t counts; string lib_image; bool operator<(summary const & rhs) const { return options::reverse_sort ? counts[0] < rhs.counts[0] : rhs.counts[0] < counts[0]; } /// add a set of files to a summary count_type add_files(list const & files, size_t pclass); }; count_type summary:: add_files(list const & files, size_t pclass) { count_type subtotal = 0; list::const_iterator it = files.begin(); list::const_iterator const end = files.end(); for (; it != end; ++it) { count_type count = profile_t::sample_count(it->sample_filename); counts[pclass] += count; subtotal += count; if (!it->cg_files.empty()) { throw op_runtime_error("opreport.cpp::add_files(): " "unxpected non empty cg file set"); } } return subtotal; } /** * Summary of an application: a set of image summaries * for one application, i.e. an application image and all * dependent images such as libraries. */ struct app_summary { /// total count of us and all dependents count_array_t counts; /// the main image string image; /// our dependent images vector deps; /// construct and fill in the data count_type add_profile(profile_set const & profile, size_t pclass); bool operator<(app_summary const & rhs) const { return options::reverse_sort ? counts[0] < rhs.counts[0] : rhs.counts[0] < counts[0]; } private: /// find a matching summary (including main app summary) summary & find_summary(string const & image); }; summary & app_summary::find_summary(string const & image) { vector::iterator sit = deps.begin(); vector::iterator const send = deps.end(); for (; sit != send; ++sit) { if (sit->lib_image == image) return *sit; } summary summ; summ.lib_image = image; deps.push_back(summ); return deps.back(); } count_type app_summary::add_profile(profile_set const & profile, size_t pclass) { count_type group_total = 0; // first the main image summary & summ = find_summary(profile.image); count_type app_count = summ.add_files(profile.files, pclass); counts[pclass] += app_count; group_total += app_count; // now all dependent images if any list::const_iterator it = profile.deps.begin(); list::const_iterator const end = profile.deps.end(); for (; it != end; ++it) { summary & summ = find_summary(it->lib_image); count_type lib_count = summ.add_files(it->files, pclass); counts[pclass] += lib_count; group_total += lib_count; } return group_total; } /// all the summaries struct summary_container { summary_container(vector const & pclasses); /// all map summaries vector apps; /// total count of samples for all summaries count_array_t total_counts; }; summary_container:: summary_container(vector const & pclasses) { typedef map app_map_t; app_map_t app_map; for (size_t i = 0; i < pclasses.size(); ++i) { list::const_iterator it = pclasses[i].profiles.begin(); list::const_iterator const end = pclasses[i].profiles.end(); for (; it != end; ++it) { app_map_t::iterator ait = app_map.find(it->image); if (ait == app_map.end()) { app_summary app; app.image = it->image; total_counts[i] += app.add_profile(*it, i); app_map[app.image] = app; } else { total_counts[i] += ait->second.add_profile(*it, i); } } } app_map_t::const_iterator it = app_map.begin(); app_map_t::const_iterator const end = app_map.end(); for (; it != end; ++it) apps.push_back(it->second); // sort by count stable_sort(apps.begin(), apps.end()); vector::iterator ait = apps.begin(); vector::iterator const aend = apps.end(); for (; ait != aend; ++ait) stable_sort(ait->deps.begin(), ait->deps.end()); } void output_header() { if (!options::show_header) return; cout << classes.cpuinfo << endl; if (!classes.event.empty()) cout << classes.event << endl; for (vector::size_type i = 0; i < classes.v.size(); ++i) { cout << classes.v[i].longname << endl; } } string get_filename(string const & filename) { return options::long_filenames ? filename : op_basename(filename); } /// Output a count and a percentage void output_count(count_type total_count, count_type count) { cout << setw(9) << count << ' '; double ratio = op_ratio(count, total_count); cout << format_percent(ratio * 100, percent_int_width, percent_fract_width) << ' '; } void output_col_headers(bool indent) { if (!options::show_header) return; if (indent) cout << '\t'; size_t colwidth = 9 + 1 + percent_width; for (size_t i = 0; i < classes.v.size(); ++i) { string name = classes.v[i].name; if (name.length() > colwidth) name = name.substr(0, colwidth - 3) + "..."; io_state state(cout); // gcc 2.95 doesn't know right io manipulator cout.setf(ios::right, ios::adjustfield); // gcc 2.95 doesn't honor setw() for std::string cout << setw(colwidth) << name.c_str(); cout << '|'; } cout << '\n'; if (indent) cout << '\t'; for (size_t i = 0; i < classes.v.size(); ++i) { cout << " samples| "; io_state state(cout); // gcc 2.95 doesn't know right io manipulator cout.setf(ios::right, ios::adjustfield); cout << setw(percent_width) << "%|"; } cout << '\n'; if (indent) cout << '\t'; for (size_t i = 0; i < classes.v.size(); ++i) { cout << "-----------"; string str(percent_width, '-'); cout << str; } cout << '\n'; } void output_deps(summary_container const & summaries, app_summary const & app) { // the app summary itself is *always* present // (perhaps with zero counts) so this test // is correct if (app.deps.size() == 1) return; output_col_headers(true); for (size_t j = 0 ; j < app.deps.size(); ++j) { summary const & summ = app.deps[j]; if (summ.counts.zero()) continue; cout << '\t'; for (size_t i = 0; i < nr_classes; ++i) { count_type tot_count = options::global_percent ? summaries.total_counts[i] : app.counts[i]; output_count(tot_count, summ.counts[i]); } cout << get_filename(summ.lib_image); cout << '\n'; } } /** * Display all the given summary information */ void output_summaries(summary_container const & summaries) { output_col_headers(false); for (size_t i = 0; i < summaries.apps.size(); ++i) { app_summary const & app = summaries.apps[i]; double ratio = (!summaries.total_counts[0]) ? 0 : (app.counts[0] * 100.0)/ summaries.total_counts[0]; if (ratio < options::threshold) { continue; } for (size_t j = 0; j < nr_classes; ++j) output_count(summaries.total_counts[j], app.counts[j]); cout << get_filename(app.image) << '\n'; output_deps(summaries, app); } } format_flags get_format_flags(column_flags const & cf) { format_flags flags(ff_none); flags = format_flags(flags | ff_nr_samples); flags = format_flags(flags | ff_percent | ff_symb_name); if (options::show_address) flags = format_flags(flags | ff_vma); if (options::debug_info) flags = format_flags(flags | ff_linenr_info); if (options::accumulated) { flags = format_flags(flags | ff_nr_samples_cumulated); flags = format_flags(flags | ff_percent_cumulated); } if (classes2.v.size()) flags = format_flags(flags | ff_diff); if (cf & cf_image_name) flags = format_flags(flags | ff_image_name); return flags; } void output_symbols(profile_container const & pc, bool multiple_apps) { profile_container::symbol_choice choice; choice.threshold = options::threshold; symbol_collection symbols = pc.select_symbols(choice); options::sort_by.sort(symbols, options::reverse_sort, options::long_filenames); format_output::formatter * out; format_output::xml_formatter * xml_out = 0; format_output::opreport_formatter * text_out = 0; if (options::xml) { xml_out = new format_output::xml_formatter(&pc, symbols, pc.extra_found_images, options::symbol_filter); xml_out->show_details(options::details); out = xml_out; // for XML always output long filenames out->show_long_filenames(true); } else { text_out = new format_output::opreport_formatter(pc); text_out->show_details(options::details); out = text_out; out->show_long_filenames(options::long_filenames); } out->set_nr_classes(nr_classes); out->show_header(options::show_header); out->vma_format_64bit(choice.hints & cf_64bit_vma); out->show_global_percent(options::global_percent); format_flags flags = get_format_flags(choice.hints); if (multiple_apps) flags = format_flags(flags | ff_app_name); out->add_format(flags); if (options::xml) { xml_support = new xml_utils(xml_out, symbols, nr_classes, pc.extra_found_images); xml_out->output(cout); } else { text_out->output(cout, symbols); } } void output_diff_symbols(profile_container const & pc1, profile_container const & pc2, bool multiple_apps) { diff_container dc(pc1, pc2); profile_container::symbol_choice choice; choice.threshold = options::threshold; diff_collection symbols = dc.get_symbols(choice); format_flags flags = get_format_flags(choice.hints); if (multiple_apps) flags = format_flags(flags | ff_app_name); // With diff profile we output only filename coming from the first // profile session, internally we use only name derived from the sample // filename so image name can match. format_output::diff_formatter out(dc, pc1.extra_found_images); out.set_nr_classes(nr_classes); out.show_long_filenames(options::long_filenames); out.show_header(options::show_header); out.show_global_percent(options::global_percent); out.vma_format_64bit(choice.hints & cf_64bit_vma); out.add_format(flags); options::sort_by.sort(symbols, options::reverse_sort, options::long_filenames); out.output(cout, symbols); } void output_cg_symbols(callgraph_container const & cg, bool multiple_apps) { column_flags output_hints = cg.output_hint(); symbol_collection symbols = cg.get_symbols(); options::sort_by.sort(symbols, options::reverse_sort, options::long_filenames); format_output::formatter * out; format_output::xml_cg_formatter * xml_out = 0; format_output::cg_formatter * text_out = 0; if (options::xml) { xml_out = new format_output::xml_cg_formatter(cg, symbols, options::symbol_filter); xml_out->show_details(options::details); out = xml_out; // for XML always output long filenames out->show_long_filenames(true); } else { text_out = new format_output::cg_formatter(cg); out = text_out; out->show_long_filenames(options::long_filenames); } out->set_nr_classes(nr_classes); out->show_header(options::show_header); out->vma_format_64bit(output_hints & cf_64bit_vma); out->show_global_percent(options::global_percent); format_flags flags = get_format_flags(output_hints); if (multiple_apps) flags = format_flags(flags | ff_app_name); out->add_format(flags); if (options::xml) { xml_support = new xml_utils(xml_out, symbols, nr_classes, cg.extra_found_images); xml_out->output(cout); } else { text_out->output(cout, symbols); } } int opreport(options::spec const & spec) { want_xml = options::xml; handle_options(spec); nr_classes = classes.v.size(); if (!options::symbols && !options::xml) { summary_container summaries(classes.v); output_header(); output_summaries(summaries); return 0; } bool multiple_apps = false; for (size_t i = 0; i < classes.v.size(); ++i) { if (classes.v[i].profiles.size() > 1) multiple_apps = true; } list iprofiles = invert_profiles(classes); report_image_errors(iprofiles, classes.extra_found_images); if (options::xml) { xml_utils::output_xml_header(options::command_options, classes.cpuinfo, classes.event); } else { output_header(); } if (classes2.v.size()) { for (size_t i = 0; i < classes2.v.size(); ++i) { if (classes2.v[i].profiles.size() > 1) multiple_apps |= true; } profile_container pc1(options::debug_info, options::details, classes.extra_found_images); list::iterator it = iprofiles.begin(); list::iterator const end = iprofiles.end(); for (; it != end; ++it) populate_for_image(pc1, *it, options::symbol_filter, 0); list iprofiles2 = invert_profiles(classes2); report_image_errors(iprofiles2, classes2.extra_found_images); profile_container pc2(options::debug_info, options::details, classes2.extra_found_images); list::iterator it2 = iprofiles2.begin(); list::iterator const end2 = iprofiles2.end(); for (; it2 != end2; ++it2) populate_for_image(pc2, *it2, options::symbol_filter, 0); output_diff_symbols(pc1, pc2, multiple_apps); } else if (options::callgraph) { callgraph_container cg_container; cg_container.populate(iprofiles, classes.extra_found_images, options::debug_info, options::threshold, options::merge_by.lib, options::symbol_filter); output_cg_symbols(cg_container, multiple_apps); } else { profile_container samples(options::debug_info, options::details, classes.extra_found_images); list::iterator it = iprofiles.begin(); list::iterator const end = iprofiles.end(); for (; it != end; ++it) populate_for_image(samples, *it, options::symbol_filter, 0); output_symbols(samples, multiple_apps); } return 0; } } // anonymous namespace int main(int argc, char const * argv[]) { cout.tie(0); return run_pp_tool(argc, argv, opreport); } oprofile-1.3.0/pp/opannotate.cpp0000664000175000017500000005412412534404406013560 00000000000000/** * @file opannotate.cpp * Implement opannotate utility * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include "op_exception.h" #include "op_header.h" #include "profile.h" #include "populate.h" #include "op_sample_file.h" #include "cverb.h" #include "string_manip.h" #include "demangle_symbol.h" #include "child_reader.h" #include "op_file.h" #include "file_manip.h" #include "arrange_profiles.h" #include "opannotate_options.h" #include "profile_container.h" #include "symbol_sort.h" #include "image_errors.h" using namespace std; using namespace options; namespace { size_t nr_events; scoped_ptr samples; /// how opannotate was invoked string cmdline; /// empty annotation fill string string annotation_fill; /// string used as start / end comment to annotate source string const begin_comment("/* "); string const in_comment(" * "); string const end_comment(" */"); /// field width for the sample count unsigned int const count_width = 6; string get_annotation_fill() { string str; for (size_t i = 0; i < nr_events; ++i) { str += string(count_width, ' ') + ' '; str += string(percent_width, ' '); } for (size_t i = 1; i < nr_events; ++i) str += " "; str += " :"; return str; } symbol_entry const * find_symbol(string const & image_name, string const & str_vma, bfd_vma vma_adj) { // do not use the bfd equivalent: // - it does not skip space at begin // - we does not need cross architecture compile so the native // strtoull must work, assuming unsigned long long can contain a vma // and on 32/64 bits box bfd_vma is 64 bits bfd_vma vma = strtoull(str_vma.c_str(), NULL, 16) - vma_adj; return samples->find_symbol(image_name, vma); } void output_info(ostream & out) { out << begin_comment << '\n'; out << in_comment << "Command line: " << cmdline << '\n' << in_comment << '\n'; out << in_comment << "Interpretation of command line:" << '\n'; if (!assembly) { out << in_comment << "Output annotated source file with samples" << '\n'; if (options::threshold != 0) { out << in_comment << "Output files where samples count reach " << options::threshold << "% of the samples\n"; } else { out << in_comment << "Output all files" << '\n'; } } else { out << in_comment << "Output annotated assembly listing with samples" << '\n'; if (!objdump_params.empty()) { out << in_comment << "Passing the following " "additional arguments to objdump ; \""; for (size_t i = 0 ; i < objdump_params.size() ; ++i) out << objdump_params[i] << " "; out << "\"" << '\n'; } } out << in_comment << '\n'; out << in_comment << classes.cpuinfo << endl; if (!classes.event.empty()) out << in_comment << classes.event << endl; for (size_t i = 0; i < classes.v.size(); ++i) out << in_comment << classes.v[i].longname << endl; out << end_comment << '\n'; } string count_str(count_array_t const & count, count_array_t const & total) { ostringstream os; for (size_t i = 0; i < nr_events; ++i) { os << setw(count_width) << count[i] << ' '; os << format_percent(op_ratio(count[i], total[i]) * 100.0, percent_int_width, percent_fract_width); } return os.str(); } /// NOTE: This function annotates a list containing output from objdump. /// It uses a list iterator, and a sample_container iterator which iterates /// from the beginning to the end, and compare sample address /// against the instruction address on the asm line. /// /// There are 2 cases of annotation: /// 1. If sample address matches current line address, annotate the current line. /// 2. If (previous line address < sample address < current line address), /// then we annotate previous line. This case happens when sample address /// is not aligned with the instruction address, which is seen when profile /// using the instruction fetch mode of AMD Instruction-Based Sampling (IBS). /// int asm_list_annotation(symbol_entry const * last_symbol, bfd_vma last_symbol_vma, list::iterator sit, sample_container::samples_iterator & samp_it, list & asm_lines, bfd_vma vma_adj) { int ret = 0; sample_entry const * sample = NULL; if (samp_it != samples->end()) sample = &samp_it->second; // do not use the bfd equivalent: // - it does not skip space at begin // - we does not need cross architecture compile so the native // strtoull must work, assuming unsigned long long can contain a vma // and on 32/64 bits box bfd_vma is 64 bits // gcc 2.91.66 workaround bfd_vma vma = strtoull((*sit).c_str(), NULL, 16) - vma_adj; if (sample && ((sample->vma < last_symbol_vma) || (sample->vma > vma))) { *sit = annotation_fill + *sit; } else if (sample && sample->vma == vma) { // Case 1 : Sample address match current line address. string str = count_str(sample->counts, samples->samples_count()); // For each events for (size_t i = 1; i < nr_events; ++i) str += " "; *sit = str + " :" + *sit; if (samp_it != samples->end()) ++samp_it; } else if (sample && sample->vma < vma) { // Case 2 : vma of the current line is greater than vma of the sample // Get the string of previous assembly line list::iterator sit_prev = sit; string prev_line, prev_vma_str; string::size_type loc1 = string::npos, loc2 = string::npos; while (sit_prev != asm_lines.begin()) { --sit_prev; prev_line = *sit_prev; loc1 = prev_line.find(":", 0); if (loc1 != string::npos) { loc2 = prev_line.find(":", loc1+1); if (loc2 != string::npos) { prev_vma_str = prev_line.substr(loc1+1, loc2); break; } } } bfd_vma prev_vma = strtoull(prev_vma_str.c_str(), NULL, 16); // Need to check if prev_vma < sample->vma if (prev_vma != 0 && prev_vma < sample->vma) { string str; // Get sample for previous line. sample_entry * prev_sample = (sample_entry *)samples-> find_sample(last_symbol, prev_vma); if (prev_sample) { // Aggregate sample with previous line if it already has samples prev_sample->counts += sample->counts; str = count_str(prev_sample->counts, samples->samples_count()); } else { str = count_str(sample->counts, samples->samples_count()); } // For each events for (size_t i = 1; i < nr_events; ++i) str += " "; *sit_prev = str + " :" + prev_line.substr(loc1+1); if (samp_it != samples->end()) ++samp_it; ret = -1; } else { // Failed to annotate the previous line. Skip sample. *sit = annotation_fill + *sit; if (samp_it != samples->end()) ++samp_it; } } else { // In case sample is NULL *sit = annotation_fill + *sit; } return ret; } string symbol_annotation(symbol_entry const * symbol) { if (!symbol) return string(); string annot = count_str(symbol->sample.counts, samples->samples_count()); string const & symname = symbol_names.demangle(symbol->name); string str = " "; str += begin_comment + symname + " total: "; str += count_str(symbol->sample.counts, samples->samples_count()); str += end_comment; return str; } /// return true if this line contains a symbol name in objdump formatting /// symbol are on the form 08030434 : we need to be strict /// here to avoid any interpretation of a source line as a symbol line bool is_symbol_line(string const & str, string::size_type pos) { if (str[pos] != ' ' || str[pos + 1] != '<') return false; return str[str.length() - 1] == ':'; } void annotate_objdump_str_list(string const & app_name, symbol_collection const & symbols, list & asm_lines) { symbol_entry const * last_symbol = 0; bfd_vma last_symbol_vma = 0; bfd_vma vma_adj; int ret = 0; // to filter output of symbols (filter based on command line options) bool do_output = true; vma_adj = symbols[0]->vma_adj; // We simultaneously walk the two structures (list and sample_container) // which are sorted by address. and do address comparision. list::iterator sit = asm_lines.begin(); list::iterator send = asm_lines.end(); sample_container::samples_iterator samp_it = samples->begin(); for (; sit != send; (!ret? sit++: sit)) { // output of objdump is a human readable form and can contain some // ambiguity so this code is dirty. It is also optimized a little bit // so it is difficult to simplify it without breaking something ... // line of interest are: "[:space:]*[:xdigit:]?[ :]", the last char of // this regexp dis-ambiguate between a symbol line and an asm line. If // source contain line of this form an ambiguity occur and we rely on // the robustness of this code. string str = *sit; size_t pos = 0; while (pos < str.length() && isspace(str[pos])) ++pos; if (pos == str.length() || !isxdigit(str[pos])) { if (do_output) { *sit = annotation_fill + str; continue; } } while (pos < str.length() && isxdigit(str[pos])) ++pos; if (pos == str.length() || (!isspace(str[pos]) && str[pos] != ':')) { if (do_output) { *sit = annotation_fill + str; continue; } } if (is_symbol_line(str, pos)) { last_symbol = find_symbol(app_name, str, vma_adj); last_symbol_vma = strtoull(str.c_str(), NULL, 16) - vma_adj; // ! complexity: linear in number of symbol must use sorted // by address vector and lower_bound ? // Note this use a pointer comparison. It work because symbols // pointer are unique if (find(symbols.begin(), symbols.end(), last_symbol) != symbols.end()) do_output = true; else do_output = false; if (do_output) { *sit += symbol_annotation(last_symbol); // Realign the sample iterator to // the beginning of this symbols samp_it = samples->begin(last_symbol); } } else { // not a symbol, probably an asm line. if (do_output) ret = asm_list_annotation(last_symbol, last_symbol_vma, sit, samp_it, asm_lines, vma_adj); } if (!do_output) *sit = ""; } } void output_objdump_str_list(symbol_collection const & symbols, string const & app_name, list & asm_lines) { annotate_objdump_str_list(app_name, symbols, asm_lines); // Printing objdump output to stdout list::iterator sit = asm_lines.begin(); list::iterator send = asm_lines.end(); sit = asm_lines.begin(); for (; sit != send; ++sit) { string str = *sit; if (str.length() != 0) cout << str << '\n'; } } void do_one_output_objdump(symbol_collection const & symbols, string const & image_name, string const & app_name, bfd_vma start, bfd_vma end) { vector args; list asm_lines; args.push_back("-d"); args.push_back("--no-show-raw-insn"); if (source) args.push_back("-S"); if (start || end != ~(bfd_vma)0) { ostringstream arg1, arg2; arg1 << "--start-address=" << start; arg2 << "--stop-address=" << end; args.push_back(arg1.str()); args.push_back(arg2.str()); } if (!objdump_params.empty()) { for (size_t i = 0 ; i < objdump_params.size() ; ++i) args.push_back(objdump_params[i]); } args.push_back(image_name); child_reader reader("objdump", args); if (reader.error()) { cerr << "An error occur during the execution of objdump:\n\n"; cerr << reader.error_str() << endl; return; } // Read each output line from objdump and store in a list. string str; while (reader.getline(str)) asm_lines.push_back(str); output_objdump_str_list(symbols, app_name, asm_lines); // objdump always returns SUCCESS so we must rely on the stderr state // of objdump. If objdump error message is cryptic our own error // message will be probably also cryptic ostringstream std_err; ostringstream std_out; reader.get_data(std_out, std_err); if (std_err.str().length()) { cerr << "An error occur during the execution of objdump:\n\n"; cerr << std_err.str() << endl; return ; } // force error code to be acquired reader.terminate_process(); // required because if objdump stop by signal all above things suceeed // (signal error message are not output through stdout/stderr) if (reader.error()) { cerr << "An error occur during the execution of objdump:\n\n"; cerr << reader.error_str() << endl; return; } } void output_objdump_asm(symbol_collection const & symbols, string const & app_name) { image_error error; string image = classes.extra_found_images.find_image_path(app_name, error, true); if (image == "/proc/kallsyms") { cerr << "Cannot annotate pseudo file /proc/kallsyms -- ignoring." << endl; return; } // this is only an optimisation, we can either filter output by // directly calling objdump and rely on the symbol filtering or // we can call objdump with the right parameter to just disassemble // the needed part. This is a real win only when calling objdump // a medium number of times, I dunno if the used threshold is optimal // but it is a conservative value. size_t const max_objdump_exec = 50; if (symbols.size() <= max_objdump_exec || error != image_ok) { symbol_collection::const_iterator cit = symbols.begin(); symbol_collection::const_iterator end = symbols.end(); for (; cit != end; ++cit) { bfd_vma start = (*cit)->sample.vma; bfd_vma end = start + (*cit)->size; do_one_output_objdump(symbols, image, app_name, start, end); } } else { do_one_output_objdump(symbols, image, app_name, 0, ~bfd_vma(0)); } } bool output_asm(string const & app_name) { profile_container::symbol_choice choice; choice.threshold = options::threshold; choice.image_name = app_name; choice.match_image = true; symbol_collection symbols = samples->select_symbols(choice); if (!symbols.empty()) { sort_options options; options.add_sort_option(sort_options::sample); options.sort(symbols, false, false); output_info(cout); output_objdump_asm(symbols, app_name); return true; } return false; } string const source_line_annotation(debug_name_id filename, size_t linenr) { string str; count_array_t counts = samples->samples_count(filename, linenr); if (!counts.zero()) { str += count_str(counts, samples->samples_count()); for (size_t i = 1; i < nr_events; ++i) str += " "; str += " :"; } else { str = annotation_fill; } return str; } string source_symbol_annotation(debug_name_id filename, size_t linenr) { symbol_collection const symbols = samples->find_symbol(filename, linenr); if (symbols.empty()) return string(); string str = " " + begin_comment; count_array_t counts; for (size_t i = 0; i < symbols.size(); ++i) { str += symbol_names.demangle(symbols[i]->name); if (symbols.size() == 1) str += " total: "; else str += " "; str += count_str(symbols[i]->sample.counts, samples->samples_count()); if (symbols.size() != 1) str += ", "; counts += symbols[i]->sample.counts; } if (symbols.size() > 1) str += "total: " + count_str(counts, samples->samples_count()); str += end_comment; return str; } void output_per_file_info(ostream & out, debug_name_id filename, count_array_t const & total_file_count) { out << begin_comment << '\n' << in_comment << "Total samples for file : " << '"' << debug_names.name(filename) << '"' << '\n'; out << in_comment << '\n' << in_comment << count_str(total_file_count, samples->samples_count()) << '\n'; out << end_comment << '\n' << '\n'; } string const line0_info(debug_name_id filename) { string annotation = source_line_annotation(filename, 0); if (trim(annotation, " \t:").empty()) return string(); string str = " "; str += annotation; return str; } void do_output_one_file(ostream & out, istream & in, debug_name_id filename, bool header) { count_array_t count = samples->samples_count(filename); if (header) { output_per_file_info(out, filename, count); out << line0_info(filename) << '\n'; } if (in) { string str; for (size_t linenr = 1 ; getline(in, str) ; ++linenr) { out << source_line_annotation(filename, linenr) << str << source_symbol_annotation(filename, linenr) << '\n'; } } else { // source is not available but we can at least output all the // symbols belonging to this file. This make more visible the // problem of having less samples for a given file than the // sum of all symbols samples for this file due to inlining symbol_collection const symbols = samples->select_symbols(filename); for (size_t i = 0; i < symbols.size(); ++i) out << symbol_annotation(symbols[i]) << endl; } if (!header) { output_per_file_info(out, filename, count); out << line0_info(filename) << '\n'; } } void output_one_file(istream & in, debug_name_id filename, string const & source) { if (output_dir.empty()) { do_output_one_file(cout, in, filename, true); return; } string const out_file = op_realpath(output_dir + source); /* Just because you're paranoid doesn't mean they're not out to * get you ... * * This is just a lame final safety check. If we found the * source, then "source" should be canonical already, and * can't escape from the output dir. We can't use op_realpath() * alone as that needs the file to exist already. * * Let's not complain again if we couldn't find the file anyway. */ if (out_file.find("/../") != string::npos) { if (in) { cerr << "refusing to create non-canonical filename " << out_file << endl; } return; } else if (!is_prefix(out_file, output_dir)) { if (in) { cerr << "refusing to create file " << out_file << " outside of output directory " << output_dir << endl; } return; } if (is_files_identical(out_file, source)) { cerr << "input and output files are identical: " << out_file << endl; return; } if (create_path(out_file.c_str())) { cerr << "unable to create file: " << '"' << op_dirname(out_file) << '"' << endl; return; } ofstream out(out_file.c_str()); if (!out) { cerr << "unable to open output file " << '"' << out_file << '"' << endl; } else { do_output_one_file(out, in, filename, false); output_info(out); } } /* Locate a source file from debug info, which may be relative */ string const locate_source_file(debug_name_id filename_id) { string const origfile = debug_names.name(filename_id); string file = origfile; if (file.empty()) return file; /* Allow absolute paths to be relocated to a different directory */ if (file[0] == '/') { vector::const_iterator cit = base_dirs.begin(); vector::const_iterator end = base_dirs.end(); for (; cit != end; ++cit) { string path = op_realpath(*cit); if (is_prefix(file, path)) { file = file.substr(path.length()); break; } } } vector::const_iterator cit = search_dirs.begin(); vector::const_iterator end = search_dirs.end(); for (; cit != end; ++cit) { string const absfile = op_realpath(*cit + "/" + file); if (op_file_readable(absfile)) return absfile; } /* We didn't find a relocated absolute file, or a relative file, * assume the original is correct, accounting for the * possibility it's relative the cwd */ return op_realpath(origfile); } void output_source(path_filter const & filter) { bool const separate_file = !output_dir.empty(); if (!separate_file) output_info(cout); vector filenames = samples->select_filename(options::threshold); for (size_t i = 0 ; i < filenames.size() ; ++i) { string const & source = locate_source_file(filenames[i]); if (!filter.match(source)) continue; ifstream in(source.c_str()); // it is common to have empty filename due to the lack // of debug info (eg _init function) so warn only // if the filename is non empty. The case: no debug // info at all has already been checked. if (!in && source.length()) { cerr << "opannotate (warning): unable to open for " "reading: " << source << endl; } if (source.length()) output_one_file(in, filenames[i], source); } } bool annotate_source(list const & images) { annotation_fill = get_annotation_fill(); if (!output_dir.empty()) { if (create_path(output_dir.c_str())) { cerr << "unable to create " << output_dir << " directory: " << endl; return false; } // Make sure we have an absolute path. output_dir = op_realpath(output_dir); if (output_dir.length() && output_dir[output_dir.length() - 1] != '/') output_dir += '/'; /* Don't let the user stomp on their sources */ if (output_dir == "/") { cerr << "Output path of / would over-write the " "source files" << endl; return false; } } if (assembly) { bool some_output = false; list::const_iterator it = images.begin(); list::const_iterator const end = images.end(); for (; it != end; ++it) { if (output_asm(*it)) some_output = true; } if (!some_output) { // It's the only case we must care since we know the // selected image set is not empty cerr << "selected image set doesn't contain any of " << "the selected symbol\n"; } } else { output_source(file_filter); } return true; } int opannotate(options::spec const & spec) { handle_options(spec); nr_events = classes.v.size(); samples.reset(new profile_container(true, true, classes.extra_found_images)); list images; list iprofiles = invert_profiles(classes); report_image_errors(iprofiles, classes.extra_found_images); list::iterator it = iprofiles.begin(); list::iterator const end = iprofiles.end(); bool debug_info = false; for (; it != end; ++it) { bool tmp = false; populate_for_image(*samples, *it, options::symbol_filter, &tmp); images.push_back(it->image); if (tmp) debug_info = true; } if (!debug_info && !options::assembly) { cerr << "opannotate (warning): no debug information available for any binary " << "selected, and --assembly not requested.\n"; } annotate_source(images); return 0; } } // anonymous namespace int main(int argc, char const * argv[]) { // set the invocation, for the file headers later for (int i = 0 ; i < argc ; ++i) cmdline += string(argv[i]) + " "; return run_pp_tool(argc, argv, opannotate); } oprofile-1.3.0/pp/opgprof_options.cpp0000664000175000017500000000560512534404406014637 00000000000000/** * @file opgprof_options.cpp * Options for opgprof tool * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include "opgprof_options.h" #include "popt_options.h" #include "cverb.h" #include "profile_spec.h" #include "arrange_profiles.h" using namespace std; profile_classes classes; inverted_profile image_profile; namespace options { string gmon_filename = "gmon.out"; // Ugly, for build only demangle_type demangle; } namespace { popt::option options_array[] = { popt::option(options::gmon_filename, "output-filename", 'o', "output filename, defaults to gmon.out if not specified", "filename"), popt::option(options::threshold_opt, "threshold", 't', "minimum percentage needed to produce output", "percent"), }; bool try_merge_profiles(profile_spec const & spec, bool exclude_dependent) { list sample_files = spec.generate_file_list(exclude_dependent, false); cverb << vsfile << "Matched sample files: " << sample_files.size() << endl; copy(sample_files.begin(), sample_files.end(), ostream_iterator(cverb << vsfile, "\n")); // opgprof merge all by default merge_option merge_by; merge_by.cpu = true; merge_by.lib = true; merge_by.tid = true; merge_by.tgid = true; merge_by.unitmask = true; classes = arrange_profiles(sample_files, merge_by, spec.extra_found_images); cverb << vsfile << "profile_classes:\n" << classes << endl; size_t nr_classes = classes.v.size(); list iprofiles = invert_profiles(classes); if (nr_classes == 1 && iprofiles.size() == 1) { image_profile = *(iprofiles.begin()); return true; } // come round for another try if (exclude_dependent) return false; if (iprofiles.empty()) { cerr << "error: no sample files found: profile specification " "too strict ?" << endl; exit(EXIT_FAILURE); } if (nr_classes > 1 || iprofiles.size() > 1) { cerr << "error: specify exactly one binary to process " "and give an event: or count: specification if necessary" << endl; exit(EXIT_FAILURE); } return false; } } // anonymous namespace void handle_options(options::spec const & spec) { if (spec.first.size()) { cerr << "differential profiles not allowed" << endl; exit(EXIT_FAILURE); } profile_spec const pspec = profile_spec::create(spec.common, options::image_path, options::root_path); cverb << vsfile << "output filename: " << options::gmon_filename << endl; // we do a first try with exclude-dependent if it fails we include // dependent. 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extern std::vector events; extern op_cpu cpu_type; using namespace std; // Global functions int op_pe_utils::op_get_next_online_cpu(DIR * dir, struct dirent *entry) { #define OFFLINE 0x30 unsigned int cpu_num; char cpu_online_pathname[40]; int res; FILE * online; again: do { entry = readdir(dir); if (!entry) return -1; } while (entry->d_type != DT_DIR); res = sscanf(entry->d_name, "cpu%u", &cpu_num); if (res <= 0) goto again; errno = 0; snprintf(cpu_online_pathname, 40, "/sys/devices/system/cpu/cpu%u/online", cpu_num); if ((online = fopen(cpu_online_pathname, "r")) == NULL) { cerr << "Unable to open " << cpu_online_pathname << endl; if (errno) cerr << strerror(errno) << endl; return -1; } res = fgetc(online); fclose(online); if (res == OFFLINE) goto again; else return cpu_num; } int op_pe_utils::op_get_sys_value(const char * filename) { char str[10]; int _val = -999; FILE * fp = fopen(filename, "r"); if (fp == NULL) return _val; if (fgets(str, 9, fp)) sscanf(str, "%d", &_val); fclose(fp); return _val; } int op_pe_utils::op_get_cpu_for_perf_events_cap(void) { int retval; string err_msg; char cpus_online[257]; FILE * online_cpus; DIR *dir = NULL; int total_cpus = sysconf(_SC_NPROCESSORS_ONLN); if (!total_cpus) { err_msg = "Internal Error (1): Number of online cpus cannot be determined."; retval = -1; goto error; } online_cpus = fopen("/sys/devices/system/cpu/online", "r"); if (!online_cpus) { err_msg = "Internal Error (2): Number of online cpus cannot be determined."; retval = -1; goto error; } memset(cpus_online, 0, sizeof(cpus_online)); if ( fgets(cpus_online, sizeof(cpus_online), online_cpus) == NULL) { fclose(online_cpus); err_msg = "Internal Error (3): Number of online cpus cannot be determined."; retval = -1; goto error; } if (!cpus_online[0]) { fclose(online_cpus); err_msg = "Internal Error (4): Number of online cpus cannot be determined."; retval = -1; goto error; } if (index(cpus_online, ',') || cpus_online[0] != '0') { // A comma in cpus_online implies a gap, which in turn implies that not all // CPUs are online. if ((dir = opendir("/sys/devices/system/cpu")) == NULL) { fclose(online_cpus); err_msg = "Internal Error (5): Number of online cpus cannot be determined."; retval = -1; goto error; } else { struct dirent *entry = NULL; retval = op_get_next_online_cpu(dir, entry); closedir(dir); } } else { // All CPUs are available, so we just arbitrarily choose CPU 0. retval = 0; } fclose(online_cpus); error: return retval; } int op_pe_utils::op_check_perf_events_cap(bool use_cpu_minus_one) { /* If perf_events syscall is not implemented, the syscall below will fail * with ENOSYS (38). If implemented, but the processor type on which this * program is running is not supported by perf_events, the syscall returns * ENOENT (2). */ struct perf_event_attr attr; pid_t pid ; int cpu_to_try = use_cpu_minus_one ? -1 : op_get_cpu_for_perf_events_cap(); errno = 0; memset(&attr, 0, sizeof(attr)); attr.size = sizeof(attr); attr.sample_type = PERF_SAMPLE_IP; /* avoid kernel events so test works when perf_event_paranoid = 2 */ attr.exclude_kernel =1; pid = getpid(); syscall(__NR_perf_event_open, &attr, pid, cpu_to_try, -1, 0); return errno; } static const char * appname; static int find_app_file_in_dir(const struct dirent * d) { if (!strcmp(d->d_name, appname)) return 1; else return 0; } static char dir_pathname[PATH_MAX]; static char full_pathname[PATH_MAX]; static int _get_PATH_based_pathname(const char * app_name) { int retval = -1; int retlen; char * real_path = getenv("PATH"); char * path = (char *) xstrdup(real_path); char * segment = strtok(path, ":"); appname = app_name; while (segment) { struct dirent ** namelist; int rc = scandir(segment, &namelist, find_app_file_in_dir, NULL); if (rc < 0) { if (errno != ENOENT) { cerr << strerror(errno) << endl; cerr << app_name << " cannot be found in your PATH." << endl; break; } } else if (rc == 1) { if (!strcmp(segment, ".")) { if (getcwd(dir_pathname, sizeof(dir_pathname)) == NULL) { retval = -1; cerr << "getcwd [3] failed when processing /" << app_name << " found via PATH. Aborting." << endl; break; } } else { strncpy(dir_pathname, segment, sizeof(dir_pathname)-1); } retlen = snprintf(full_pathname, sizeof(full_pathname), "%s/%s", dir_pathname, app_name); if (retlen <= 0 || ((int) sizeof(full_pathname)) <= retlen) { cerr << "Path segment " << segment << " prepended to the passed app name is too long" << endl; retval = -1; break; } retval = 0; free(namelist[0]); free(namelist); break; } segment = strtok(NULL, ":"); } free(path); return retval; } int op_pe_utils::op_validate_app_name(char ** app, char ** save_appname) { int rc = 0; struct stat filestat; char * app_name = *app; size_t len = strlen(app_name); if (len > (size_t) (OP_APPNAME_LEN - 1)) { cerr << "app name longer than max allowed (" << OP_APPNAME_LEN << " chars)\n"; cerr << app_name << endl; rc = -1; goto out; } if (index(app_name, '/') == app_name) { // Full pathname of app was specified, starting with "/". strncpy(full_pathname, app_name, len); } else if ((app_name[0] == '.') && (app_name[1] == '/')) { // Passed app is in current directory; e.g., "./myApp" if (getcwd(full_pathname, PATH_MAX) == NULL) { rc = -1; cerr << "getcwd [1] failed when trying to find app name " << app_name << ". Aborting." << endl; goto out; } strcat(full_pathname, "/"); if ((strlen(full_pathname) + strlen(app_name + 2) + 1) > PATH_MAX) { rc = -1; cerr << "Length of current dir (" << full_pathname << ") and app name (" << (app_name + 2) << ") exceeds max allowed (" << PATH_MAX << "). Aborting." << endl; goto out; } strcat(full_pathname, (app_name + 2)); } else if (index(app_name, '/')) { // Passed app is in a subdirectory of cur dir; e.g., "test-stuff/myApp" if (getcwd(full_pathname, PATH_MAX) == NULL) { rc = -1; cerr << "getcwd [2] failed when trying to find app name " << app_name << ". Aborting." << endl; goto out; } strcat(full_pathname, "/"); strcat(full_pathname, app_name); } else { // Passed app name, at this point, MUST be found in PATH rc = _get_PATH_based_pathname(app_name); } if (rc) { cerr << "Problem finding app name " << app_name << ". Aborting." << endl; goto out; } *save_appname = app_name; *app = full_pathname; if (stat(*app, &filestat)) { char msg[OP_APPNAME_LEN + 50]; snprintf(msg, OP_APPNAME_LEN + 50, "Non-existent app name \"%s\"", *app); perror(msg); rc = -1; } out: return rc; } set op_pe_utils::op_get_available_cpus(int max_num_cpus) { struct dirent *entry = NULL; int rc = 0; bool all_cpus_avail = true; DIR *dir = NULL; string err_msg; char cpus_online[257]; set available_cpus; FILE * online_cpus = fopen("/sys/devices/system/cpu/online", "r"); if (max_num_cpus == -1) { if (online_cpus) fclose(online_cpus); return available_cpus; } if (!online_cpus) { err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto out; } memset(cpus_online, 0, sizeof(cpus_online)); if (fgets(cpus_online, sizeof(cpus_online), online_cpus) == NULL) { fclose(online_cpus); err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto out; } if (index(cpus_online, ',') || cpus_online[0] != '0') { all_cpus_avail = false; if ((dir = opendir("/sys/devices/system/cpu")) == NULL) { fclose(online_cpus); err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto out; } } fclose(online_cpus); for (int cpu = 0; cpu < max_num_cpus; cpu++) { int real_cpu; if (all_cpus_avail) { available_cpus.insert(cpu); } else { real_cpu = op_get_next_online_cpu(dir, entry); if (real_cpu < 0) { err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto out; } available_cpus.insert(real_cpu); } } out: if (dir) closedir(dir); if (rc) throw runtime_error(err_msg); return available_cpus; } static void _get_event_code(operf_event_t * event, op_cpu cpu_type) { FILE * fp; char oprof_event_code[11]; string command; u64 base_code, config; char buf[20]; if ((snprintf(buf, 20, "%lu", event->count)) < 0) { cerr << "Error parsing event count of " << event->count << endl; exit(EXIT_FAILURE); } base_code = config = 0ULL; command = OP_BINDIR; command += "ophelp "; command += event->name; fp = popen(command.c_str(), "r"); if (fp == NULL) { cerr << "Unable to execute ophelp to get info for event " << event->name << endl; exit(EXIT_FAILURE); } if (fgets(oprof_event_code, sizeof(oprof_event_code), fp) == NULL) { pclose(fp); cerr << "Unable to find info for event " << event->name << endl; exit(EXIT_FAILURE); } pclose(fp); base_code = strtoull(oprof_event_code, (char **) NULL, 10); #if defined(__i386__) || defined(__x86_64__) // Setup EventSelct[11:8] field for AMD const char * vendor_AMD = "AuthenticAMD"; if (op_is_cpu_vendor((char *)vendor_AMD)) { config = base_code & 0xF00ULL; config = config << 32; } // Setup EventSelct[7:0] field config |= base_code & 0xFFULL; #endif #if defined(__i386__) || defined(__x86_64__) || defined(__powerpc64__) char mask[OP_MAX_UM_NAME_LEN]; // Setup unitmask field handle_named_um: if (event->um_name[0]) { command = OP_BINDIR; command += "ophelp "; command += "--extra-mask "; command += event->name; command += ":"; command += buf; command += ":"; command += event->um_name; fp = popen(command.c_str(), "r"); if (fp == NULL) { cerr << "Unable to execute ophelp to get info for event " << event->name << endl; exit(EXIT_FAILURE); } if (fgets(mask, sizeof(mask), fp) == NULL) { pclose(fp); cerr << "Unable to find unit mask info for " << event->um_name << " for event " << event->name << endl; exit(EXIT_FAILURE); } pclose(fp); // FIXME: The mask value here is the extra bits from the named unit mask. It's not // ideal to put that value into the UM's mask, since that's what will show up in // opreport. It would be better if we could somehow have the unit mask name that the // user passed to us show up in opreort. event->evt_um = strtoull(mask, (char **) NULL, 10); /* A value >= EXTRA_MIN_VAL returned by 'ophelp --extra-mask' is interpreted as a * valid extra value; otherwise we interpret it as a simple unit mask value * for a named unit mask with EXTRA_NONE. */ if (event->evt_um >= EXTRA_MIN_VAL) config |= event->evt_um; else config |= ((event->evt_um & 0xFFULL) << 8); } else if (!event->evt_um) { char * endptr; command.clear(); command = OP_BINDIR; command += "ophelp "; command += "--unit-mask "; command += event->name; command += ":"; command += buf; fp = popen(command.c_str(), "r"); if (fp == NULL) { cerr << "Unable to execute ophelp to get unit mask for event " << event->name << endl; exit(EXIT_FAILURE); } if (fgets(mask, sizeof(mask), fp) == NULL) { pclose(fp); cerr << "Unable to find unit mask info for event " << event->name << endl; exit(EXIT_FAILURE); } pclose(fp); event->evt_um = strtoull(mask, &endptr, 10); if ((endptr >= mask) && (endptr <= (mask + strlen(mask) - 2))) { // '- 2' to account for linefeed and '\0' // Must be a default named unit mask strncpy(event->um_name, mask, OP_MAX_UM_NAME_LEN - 1); goto handle_named_um; } #if defined(__powerpc64__) config = base_code; config |= ((event->evt_um & 0xFFULL) << 32); #else config |= ((event->evt_um & 0xFFULL) << 8); #endif } else { config |= ((event->evt_um & 0xFFULL) << 8); } #else config = base_code; #endif event->op_evt_code = base_code; if (cpu_type == CPU_P4 || cpu_type == CPU_P4_HT2) { if (op_netburst_get_perf_encoding(event->name, event->evt_um, 1, 1, &config)) { cerr << "Unable to get event encoding for " << event->name << endl; exit(EXIT_FAILURE); } } event->evt_code = config; cverb << vdebug << "Final event code is " << hex << event->evt_code << endl; } #if PPC64_ARCH /* All ppc64 events (except CYCLES) have a _GRP suffix. This is * because the legacy opcontrol profiler can only profile events in * the same group (i.e., having the same _GRP suffix). But operf * can multiplex events, so we should allow the user to pass event * names without the _GRP suffix. * * If event name is not CYCLES or does not have a _GRP suffix, * we'll call ophelp and scan the list of events, searching for one * that matches up to the _GRP suffix. If we don't find a match, * then we'll exit with the expected error message for invalid event name. */ static string _handle_powerpc_event_spec(string event_spec) { FILE * fp; char line[MAX_INPUT]; size_t grp_pos; string evt, err_msg; size_t evt_name_len; bool first_non_cyc_evt_found = false; bool event_found = false; char event_name[OP_MAX_EVT_NAME_LEN], * remaining_evt_spec, * colon_start; string cmd = OP_BINDIR; cmd += "/ophelp"; colon_start = (char *)index(event_spec.c_str(), ':'); if (colon_start) evt_name_len = colon_start - event_spec.c_str(); else evt_name_len = event_spec.length(); strncpy(event_name, event_spec.c_str(), evt_name_len); event_name[evt_name_len] = '\0'; remaining_evt_spec = colon_start ? ((char *)event_spec.c_str() + strlen(event_name) + 1) : NULL; if (!strcmp("CYCLES", event_name)) { event_found = true; goto out; } evt = event_name; // Need to make sure the event name truly has a _GRP suffix. grp_pos = evt.rfind("_GRP"); if ((grp_pos != string::npos) && ((evt = evt.substr(grp_pos, string::npos))).length() > 4) { char * end; unsigned long dummy __attribute__ ((__unused__)); dummy = strtoul(evt.substr(4, string::npos).c_str(), &end, 0); if (end && (*end == '\0')) { // Valid group number found after _GRP, so we can skip to the end. event_found = true; goto out; } } // If we get here, it implies the user passed a non-CYCLES event without a GRP suffix. // Lets try to find a valid suffix for it. fp = popen(cmd.c_str(), "r"); if (fp == NULL) { cerr << "Unable to execute ophelp to get info for event " << event_spec << endl; exit(EXIT_FAILURE); } err_msg = "Cannot find event "; while (fgets(line, MAX_INPUT, fp)) { if (!first_non_cyc_evt_found) { if (!strncmp(line, "PM_", 3)) first_non_cyc_evt_found = true; else continue; } if (line[0] == ' ' || line[0] == '\t') continue; if (!strncmp(line, event_name, evt_name_len)) { // Found a potential match. Check if it's a perfect match. string save_event_name = event_name; size_t full_evt_len = index(line, ':') - line; memset(event_name, '\0', OP_MAX_EVT_NAME_LEN); strncpy(event_name, line, full_evt_len); string candidate = event_name; if (candidate.rfind("_GRP") == evt_name_len) { event_found = true; break; } else { memset(event_name, '\0', OP_MAX_EVT_NAME_LEN); strncpy(event_name, save_event_name.c_str(), evt_name_len); } } } pclose(fp); out: if (!event_found) { cerr << err_msg << event_name << endl; cerr << "Error retrieving info for event " << event_spec << endl; exit(EXIT_FAILURE); } ostringstream ret_strm; if (remaining_evt_spec) ret_strm << event_name << ":" << remaining_evt_spec; else ret_strm << event_name; return ret_strm.str(); } /* Some architectures (e.g., ppc64) do not use the same event value (code) for oprofile * and for perf_events. The operf-record process requires event values that perf_events * understands, but the operf-read process requires oprofile event values. The purpose of * the following method is to map the operf-record event value to a value that * opreport can understand. */ extern op_cpu cpu_type; #define NIL_CODE ~0U #if HAVE_LIBPFM3 static bool _get_codes_for_match(unsigned int pfm_idx, const char name[], vector * evt_vec) { unsigned int num_events = evt_vec->size(); int tmp_code, ret; bool edge_detect = false; char evt_name[OP_MAX_EVT_NAME_LEN]; unsigned int events_converted = 0; for (unsigned int i = 0; i < num_events; i++) { operf_event_t event = (*evt_vec)[i]; if (event.evt_code != NIL_CODE) { events_converted++; continue; } memset(evt_name, 0, OP_MAX_EVT_NAME_LEN); if (!strcmp(event.name, "CYCLES")) { strcpy(evt_name ,"PM_CYC") ; } else if (strstr(event.name, "_GRP")) { string str = event.name; strncpy(evt_name, event.name, str.rfind("_GRP")); } else { strncpy(evt_name, event.name, strlen(event.name)); } /* Events where the "_EDGE_COUNT" suffix has been appended to a * real native event name are pseudo events (events that have * not been formally defined in processor documentation), where * we wish to detect the rising edge of the real native event. * This "edge detection" technique is useful for events that normally * count the number of cycles that a particular condition is true. * Since libpfm does not know about pseudo events, we need to * convert them to their real native event equivalent, and then * set the "edge detect" bit (the LSB) in the event code. */ string evt = evt_name; size_t edge_suffix_pos = evt.rfind("_EDGE_COUNT"); if (edge_suffix_pos != string::npos) { evt = evt.substr(0, edge_suffix_pos); strncpy(evt_name, evt.c_str(), evt.length() + 1); edge_detect = true; } if (strncmp(name, evt_name, OP_MAX_EVT_NAME_LEN)) continue; ret = pfm_get_event_code(pfm_idx, &tmp_code); if (ret != PFMLIB_SUCCESS) { string evt_name_str = event.name; string msg = "libpfm cannot find event code for " + evt_name_str + "; cannot continue"; throw runtime_error(msg); } event.evt_code = tmp_code; // Setting LSB of code makes this a "rising edge detection" type of event if (edge_detect) event.evt_code |= 1; (*evt_vec)[i] = event; events_converted++; cverb << vdebug << "Successfully converted " << event.name << " to perf_event code " << hex << event.evt_code << endl; } return (events_converted == num_events); } #else static bool _op_get_event_codes(vector * evt_vec) { int ret; unsigned int num_events = evt_vec->size(); bool edge_detect = false; char evt_name[OP_MAX_EVT_NAME_LEN]; unsigned int events_converted = 0; u64 code[1]; typedef struct { u64 *codes; char **fstr; size_t size; int count; int idx; } pfm_raw_pmu_encode_t; pfm_raw_pmu_encode_t raw; raw.codes = code; raw.count = 1; raw.fstr = NULL; if (pfm_initialize() != PFM_SUCCESS) throw runtime_error("Unable to initialize libpfm; cannot continue"); for (unsigned int i = 0; i < num_events; i++) { operf_event_t event = (*evt_vec)[i]; if (event.evt_code != NIL_CODE) { events_converted++; continue; } memset(evt_name, 0, OP_MAX_EVT_NAME_LEN); if (!strcmp(event.name, "CYCLES")) { strcpy(evt_name ,"PM_CYC") ; } else if (strstr(event.name, "_GRP")) { string str = event.name; strncpy(evt_name, event.name, str.rfind("_GRP")); } else { strncpy(evt_name, event.name, strlen(event.name)); } /* Events where the "_EDGE_COUNT" suffix has been appended to a * real native event name are pseudo events (events that have * not been formally defined in processor documentation), where * we wish to detect the rising edge of the real native event. * This "edge detection" technique is useful for events that normally * count the number of cycles that a particular condition is true. * Since libpfm does not know about pseudo events, we need to * convert them to their real native event equivalent, and then * set the "edge detect" bit (the LSB) in the event code. */ string evt = evt_name; size_t edge_suffix_pos = evt.rfind("_EDGE_COUNT"); if (edge_suffix_pos != string::npos) { evt = evt.substr(0, edge_suffix_pos); strncpy(evt_name, evt.c_str(), evt.length() + 1); edge_detect = true; } memset(&raw, 0, sizeof(raw)); ret = pfm_get_os_event_encoding(evt_name, PFM_PLM3, PFM_OS_NONE, &raw); if (ret != PFM_SUCCESS) { string evt_name_str = event.name; string msg = "libpfm cannot find event code for " + evt_name_str + "; cannot continue"; throw runtime_error(msg); } event.evt_code = raw.codes[0]; // Setting LSB of code makes this a "rising edge detection" type of event if (edge_detect) event.evt_code |= 1; (*evt_vec)[i] = event; events_converted++; cverb << vdebug << "Successfully converted " << event.name << " to perf_event code " << hex << event.evt_code << endl; } return (events_converted == num_events); } #endif static bool convert_event_vals(vector * evt_vec) { for (unsigned int i = 0; i < evt_vec->size(); i++) { operf_event_t event = (*evt_vec)[i]; if (cpu_type == CPU_PPC64_POWER7) { if (!strncmp(event.name, "PM_RUN_CYC", strlen("PM_RUN_CYC"))) { event.evt_code = 0x600f4; } else if (!strncmp(event.name, "PM_RUN_INST_CMPL", strlen("PM_RUN_INST_CMPL"))) { event.evt_code = 0x500fa; } else { event.evt_code = NIL_CODE; } } else { event.evt_code = NIL_CODE; } (*evt_vec)[i] = event; } #if HAVE_LIBPFM3 unsigned int i, count; char name[256]; int ret; if (pfm_initialize() != PFMLIB_SUCCESS) throw runtime_error("Unable to initialize libpfm; cannot continue"); ret = pfm_get_num_events(&count); if (ret != PFMLIB_SUCCESS) throw runtime_error("Unable to use libpfm to obtain event code; cannot continue"); for(i =0 ; i < count; i++) { ret = pfm_get_event_name(i, name, 256); if (ret != PFMLIB_SUCCESS) continue; if (_get_codes_for_match(i, name, evt_vec)) break; } return (i != count); #else return _op_get_event_codes(evt_vec); #endif } #endif // PPC64_ARCH void op_pe_utils::op_process_events_list(set & passed_evts, bool do_profiling, bool do_callgraph) { string cmd = OP_BINDIR; if (passed_evts.size() > OP_MAX_EVENTS) { cerr << "Number of events specified is greater than allowed maximum of " << OP_MAX_EVENTS << "." << endl; exit(EXIT_FAILURE); } cmd += "/ophelp --check-events "; if (!do_profiling) cmd += "--ignore-count "; for (set::iterator it = passed_evts.begin(); it != passed_evts.end(); it++) { FILE * fp; string full_cmd = cmd; string event_spec = *it; #if PPC64_ARCH // Starting with CPU_PPC64_ARCH_V1, ppc64 events files are formatted like // other architectures, so no special handling is needed. if (cpu_type < CPU_PPC64_ARCH_V1) event_spec = _handle_powerpc_event_spec(event_spec); #endif if (do_callgraph) full_cmd += " --callgraph=1 "; full_cmd += event_spec; fp = popen(full_cmd.c_str(), "r"); if (fp == NULL) { cerr << "Unable to execute ophelp to get info for event " << event_spec << endl; exit(EXIT_FAILURE); } if (fgetc(fp) == EOF) { pclose(fp); cerr << "Error retrieving info for event " << event_spec << endl; if (do_callgraph) cerr << "Note: When doing callgraph profiling, the sample count must be" << endl << "15 times the minimum count value for the event." << endl; exit(EXIT_FAILURE); } pclose(fp); char * event_str = op_xstrndup(event_spec.c_str(), event_spec.length()); operf_event_t event; memset(&event, 0, sizeof(event)); strncpy(event.name, strtok(event_str, ":"), OP_MAX_EVT_NAME_LEN - 1); if (do_profiling) event.count = atoi(strtok(NULL, ":")); else event.count = 0UL; /* Event name is required in the event spec in order for * 'ophelp --check-events' to pass. But since unit mask * and domain control bits are optional, we need to ensure the result of * strtok is valid. */ char * info; #define _OP_UM 1 #define _OP_KERNEL 2 #define _OP_USER 3 int place = _OP_UM; char * endptr = NULL; event.evt_um = 0UL; event.no_kernel = 0; event.no_user = 0; event.throttled = false; event.mode_specified = false; event.umask_specified = false; memset(event.um_name, '\0', OP_MAX_UM_NAME_LEN); memset(event.um_numeric_val_as_str, '\0', OP_MAX_UM_NAME_STR_LEN); while ((info = strtok(NULL, ":"))) { switch (place) { case _OP_UM: event.evt_um = strtoul(info, &endptr, 0); event.umask_specified = true; // If any of the UM part is not a number, then we // consider the entire part a string. if (*endptr) { event.evt_um = 0; strncpy(event.um_name, info, OP_MAX_UM_NAME_LEN - 1); } else { /* event.evt_um gets modified later, * save the specified number as a * string to output later. */ stringstream strs; strs << "0x" << hex << event.evt_um; strncpy(event.um_numeric_val_as_str, (char *)strs.str().c_str(), strs.str().length()); } break; case _OP_KERNEL: event.mode_specified = true; if (atoi(info) == 0) event.no_kernel = 1; break; case _OP_USER: event.mode_specified = true; if (atoi(info) == 0) event.no_user = 1; break; } place++; } free(event_str); #ifdef __s390__ if (do_profiling) { if (strncmp(event.name, "CPU_CYCLES", strlen(event.name)) != 0) { cerr << "Profiling with " << event.name << " is not supported." << endl << "Only CPU_CYCLES is allowed to use with operf." << endl; exit(EXIT_FAILURE); } } else { if (!event.no_kernel && event.no_user) { cerr << "Counting for just the kernel is not supported." << endl << "Re-run the command and simply pass the event name " << endl << "(" << event.name << ") for the event spec, without" << endl << "unit mask/kernel/user bits." << endl; exit(EXIT_FAILURE); } } #endif #ifdef __alpha__ // Alpha arch does not support any mode exclusion, so if either user or kernel // mode are excluded by the user, we'll exit with an error message. if (event.no_kernel || event.no_user) { cerr << "Mode exclusion is not supported on Alpha." << endl << "Re-run the command and simply pass the event name " << endl << "(" << event.name << ") for the event spec, without" << endl << "unit mask/kernel/user bits." << endl; exit(EXIT_FAILURE); } #endif _get_event_code(&event, cpu_type); events.push_back(event); } #if PPC64_ARCH { /* For ppc64 architecture processors prior to the introduction of * architected_events_v1, the oprofile event code needs to be converted * to the appropriate event code to pass to the perf_event_open syscall. * But as of the introduction of architected_events_v1, the events * file contains the necessary event code information, so this conversion * step is no longer needed. */ using namespace op_pe_utils; if ((cpu_type < CPU_PPC64_ARCH_V1) && !convert_event_vals(&events)) { cerr << "Unable to convert all oprofile event values to perf_event values" << endl; exit(EXIT_FAILURE); } } #endif } void op_pe_utils::op_get_default_event(bool do_callgraph) { operf_event_t dft_evt; struct op_default_event_descr descr; vector tmp_events; op_default_event(cpu_type, &descr); if (descr.name[0] == '\0') { cerr << "Unable to find default event" << endl; exit(EXIT_FAILURE); } memset(&dft_evt, 0, sizeof(dft_evt)); if (do_callgraph) { struct op_event * _event; op_events(cpu_type); if ((_event = find_event_by_name(descr.name, 0, 0))) { dft_evt.count = _event->min_count * CALLGRAPH_MIN_COUNT_SCALE; } else { cerr << "Error getting event info for " << descr.name << endl; exit(EXIT_FAILURE); } } else { dft_evt.count = descr.count; } dft_evt.evt_um = descr.um; strncpy(dft_evt.name, descr.name, OP_MAX_EVT_NAME_LEN - 1); _get_event_code(&dft_evt, cpu_type); events.push_back(dft_evt); #if PPC64_ARCH { /* This section of code is for architectures such as ppc[64] for which * the oprofile event code needs to be converted to the appropriate event * code to pass to the perf_event_open syscall. */ using namespace op_pe_utils; if ((cpu_type < CPU_PPC64_ARCH_V1) && !convert_event_vals(&events)) { cerr << "Unable to convert all oprofile event values to perf_event values" << endl; exit(EXIT_FAILURE); } } #endif } oprofile-1.3.0/libpe_utils/op_pe_utils.h0000664000175000017500000000222713124774026015274 00000000000000/** * @file op_pe_utils.h * Definitions and prototypes for tools using Linux Performance Events Subsystem. * * @remark Copyright 2013 OProfile authors * @remark Read the file COPYING * * Created on: May 21, 2013 * @author Maynard Johnson * (C) Copyright IBM Corp. 2013 * */ #ifndef OP_PE_UTILS_H_ #define OP_PE_UTILS_H_ #include #include #include #include "op_cpu_type.h" #define OP_APPNAME_LEN 1024 #define OP_MAX_EVENTS 24 #define CALLGRAPH_MIN_COUNT_SCALE 15 // Candidates for refactoring of operf namespace op_pe_utils { // prototypes extern int op_check_perf_events_cap(bool use_cpu_minus_one); extern int op_get_sys_value(const char * filename); extern int op_get_cpu_for_perf_events_cap(void); extern int op_validate_app_name(char ** app, char ** save_appname); extern void op_get_default_event(bool do_callgraph); extern void op_process_events_list(std::set & passed_evts, bool do_profiling, bool do_callgraph); extern int op_get_next_online_cpu(DIR * dir, struct dirent *entry); extern std::set op_get_available_cpus(int max_num_cpus); } #endif /* OP_PE_UTILS_H_ */ oprofile-1.3.0/ltmain.sh0000644000175000017500000117077112774744576012140 00000000000000#! /bin/sh ## DO NOT EDIT - This file generated from ./build-aux/ltmain.in ## by inline-source v2014-01-03.01 # libtool (GNU libtool) 2.4.6 # Provide generalized library-building support services. # Written by Gordon Matzigkeit , 1996 # Copyright (C) 1996-2015 Free Software Foundation, Inc. # This is free software; see the source for copying conditions. There is NO # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. # GNU Libtool is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # As a special exception to the GNU General Public License, # if you distribute this file as part of a program or library that # is built using GNU Libtool, you may include this file under the # same distribution terms that you use for the rest of that program. # # GNU Libtool is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . PROGRAM=libtool PACKAGE=libtool VERSION=2.4.6 package_revision=2.4.6 ## ------ ## ## Usage. ## ## ------ ## # Run './libtool --help' for help with using this script from the # command line. ## ------------------------------- ## ## User overridable command paths. ## ## ------------------------------- ## # After configure completes, it has a better idea of some of the # shell tools we need than the defaults used by the functions shared # with bootstrap, so set those here where they can still be over- # ridden by the user, but otherwise take precedence. : ${AUTOCONF="autoconf"} : ${AUTOMAKE="automake"} ## -------------------------- ## ## Source external libraries. ## ## -------------------------- ## # Much of our low-level functionality needs to be sourced from external # libraries, which are installed to $pkgauxdir. # Set a version string for this script. scriptversion=2015-01-20.17; # UTC # General shell script boiler plate, and helper functions. # Written by Gary V. Vaughan, 2004 # Copyright (C) 2004-2015 Free Software Foundation, Inc. # This is free software; see the source for copying conditions. There is NO # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. # As a special exception to the GNU General Public License, if you distribute # this file as part of a program or library that is built using GNU Libtool, # you may include this file under the same distribution terms that you use # for the rest of that program. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNES FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # Please report bugs or propose patches to gary@gnu.org. ## ------ ## ## Usage. ## ## ------ ## # Evaluate this file near the top of your script to gain access to # the functions and variables defined here: # # . `echo "$0" | ${SED-sed} 's|[^/]*$||'`/build-aux/funclib.sh # # If you need to override any of the default environment variable # settings, do that before evaluating this file. ## -------------------- ## ## Shell normalisation. ## ## -------------------- ## # Some shells need a little help to be as Bourne compatible as possible. # Before doing anything else, make sure all that help has been provided! DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : emulate sh NULLCMD=: # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which # is contrary to our usage. Disable this feature. alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else case `(set -o) 2>/dev/null` in *posix*) set -o posix ;; esac fi # NLS nuisances: We save the old values in case they are required later. _G_user_locale= _G_safe_locale= for _G_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES do eval "if test set = \"\${$_G_var+set}\"; then save_$_G_var=\$$_G_var $_G_var=C export $_G_var _G_user_locale=\"$_G_var=\\\$save_\$_G_var; \$_G_user_locale\" _G_safe_locale=\"$_G_var=C; \$_G_safe_locale\" fi" done # CDPATH. (unset CDPATH) >/dev/null 2>&1 && unset CDPATH # Make sure IFS has a sensible default sp=' ' nl=' ' IFS="$sp $nl" # There are apparently some retarded systems that use ';' as a PATH separator! if test "${PATH_SEPARATOR+set}" != set; then PATH_SEPARATOR=: (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || PATH_SEPARATOR=';' } fi ## ------------------------- ## ## Locate command utilities. ## ## ------------------------- ## # func_executable_p FILE # ---------------------- # Check that FILE is an executable regular file. func_executable_p () { test -f "$1" && test -x "$1" } # func_path_progs PROGS_LIST CHECK_FUNC [PATH] # -------------------------------------------- # Search for either a program that responds to --version with output # containing "GNU", or else returned by CHECK_FUNC otherwise, by # trying all the directories in PATH with each of the elements of # PROGS_LIST. # # CHECK_FUNC should accept the path to a candidate program, and # set $func_check_prog_result if it truncates its output less than # $_G_path_prog_max characters. func_path_progs () { _G_progs_list=$1 _G_check_func=$2 _G_PATH=${3-"$PATH"} _G_path_prog_max=0 _G_path_prog_found=false _G_save_IFS=$IFS; IFS=${PATH_SEPARATOR-:} for _G_dir in $_G_PATH; do IFS=$_G_save_IFS test -z "$_G_dir" && _G_dir=. for _G_prog_name in $_G_progs_list; do for _exeext in '' .EXE; do _G_path_prog=$_G_dir/$_G_prog_name$_exeext func_executable_p "$_G_path_prog" || continue case `"$_G_path_prog" --version 2>&1` in *GNU*) func_path_progs_result=$_G_path_prog _G_path_prog_found=: ;; *) $_G_check_func $_G_path_prog func_path_progs_result=$func_check_prog_result ;; esac $_G_path_prog_found && break 3 done done done IFS=$_G_save_IFS test -z "$func_path_progs_result" && { echo "no acceptable sed could be found in \$PATH" >&2 exit 1 } } # We want to be able to use the functions in this file before configure # has figured out where the best binaries are kept, which means we have # to search for them ourselves - except when the results are already set # where we skip the searches. # Unless the user overrides by setting SED, search the path for either GNU # sed, or the sed that truncates its output the least. test -z "$SED" && { _G_sed_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/ for _G_i in 1 2 3 4 5 6 7; do _G_sed_script=$_G_sed_script$nl$_G_sed_script done echo "$_G_sed_script" 2>/dev/null | sed 99q >conftest.sed _G_sed_script= func_check_prog_sed () { _G_path_prog=$1 _G_count=0 printf 0123456789 >conftest.in while : do cat conftest.in conftest.in >conftest.tmp mv conftest.tmp conftest.in cp conftest.in conftest.nl echo '' >> conftest.nl "$_G_path_prog" -f conftest.sed conftest.out 2>/dev/null || break diff conftest.out conftest.nl >/dev/null 2>&1 || break _G_count=`expr $_G_count + 1` if test "$_G_count" -gt "$_G_path_prog_max"; then # Best one so far, save it but keep looking for a better one func_check_prog_result=$_G_path_prog _G_path_prog_max=$_G_count fi # 10*(2^10) chars as input seems more than enough test 10 -lt "$_G_count" && break done rm -f conftest.in conftest.tmp conftest.nl conftest.out } func_path_progs "sed gsed" func_check_prog_sed $PATH:/usr/xpg4/bin rm -f conftest.sed SED=$func_path_progs_result } # Unless the user overrides by setting GREP, search the path for either GNU # grep, or the grep that truncates its output the least. test -z "$GREP" && { func_check_prog_grep () { _G_path_prog=$1 _G_count=0 _G_path_prog_max=0 printf 0123456789 >conftest.in while : do cat conftest.in conftest.in >conftest.tmp mv conftest.tmp conftest.in cp conftest.in conftest.nl echo 'GREP' >> conftest.nl "$_G_path_prog" -e 'GREP$' -e '-(cannot match)-' conftest.out 2>/dev/null || break diff conftest.out conftest.nl >/dev/null 2>&1 || break _G_count=`expr $_G_count + 1` if test "$_G_count" -gt "$_G_path_prog_max"; then # Best one so far, save it but keep looking for a better one func_check_prog_result=$_G_path_prog _G_path_prog_max=$_G_count fi # 10*(2^10) chars as input seems more than enough test 10 -lt "$_G_count" && break done rm -f conftest.in conftest.tmp conftest.nl conftest.out } func_path_progs "grep ggrep" func_check_prog_grep $PATH:/usr/xpg4/bin GREP=$func_path_progs_result } ## ------------------------------- ## ## User overridable command paths. ## ## ------------------------------- ## # All uppercase variable names are used for environment variables. These # variables can be overridden by the user before calling a script that # uses them if a suitable command of that name is not already available # in the command search PATH. : ${CP="cp -f"} : ${ECHO="printf %s\n"} : ${EGREP="$GREP -E"} : ${FGREP="$GREP -F"} : ${LN_S="ln -s"} : ${MAKE="make"} : ${MKDIR="mkdir"} : ${MV="mv -f"} : ${RM="rm -f"} : ${SHELL="${CONFIG_SHELL-/bin/sh}"} ## -------------------- ## ## Useful sed snippets. ## ## -------------------- ## sed_dirname='s|/[^/]*$||' sed_basename='s|^.*/||' # Sed substitution that helps us do robust quoting. It backslashifies # metacharacters that are still active within double-quoted strings. sed_quote_subst='s|\([`"$\\]\)|\\\1|g' # Same as above, but do not quote variable references. sed_double_quote_subst='s/\(["`\\]\)/\\\1/g' # Sed substitution that turns a string into a regex matching for the # string literally. sed_make_literal_regex='s|[].[^$\\*\/]|\\&|g' # Sed substitution that converts a w32 file name or path # that contains forward slashes, into one that contains # (escaped) backslashes. A very naive implementation. sed_naive_backslashify='s|\\\\*|\\|g;s|/|\\|g;s|\\|\\\\|g' # Re-'\' parameter expansions in output of sed_double_quote_subst that # were '\'-ed in input to the same. If an odd number of '\' preceded a # '$' in input to sed_double_quote_subst, that '$' was protected from # expansion. Since each input '\' is now two '\'s, look for any number # of runs of four '\'s followed by two '\'s and then a '$'. '\' that '$'. _G_bs='\\' _G_bs2='\\\\' _G_bs4='\\\\\\\\' _G_dollar='\$' sed_double_backslash="\ s/$_G_bs4/&\\ /g s/^$_G_bs2$_G_dollar/$_G_bs&/ s/\\([^$_G_bs]\\)$_G_bs2$_G_dollar/\\1$_G_bs2$_G_bs$_G_dollar/g s/\n//g" ## ----------------- ## ## Global variables. ## ## ----------------- ## # Except for the global variables explicitly listed below, the following # functions in the '^func_' namespace, and the '^require_' namespace # variables initialised in the 'Resource management' section, sourcing # this file will not pollute your global namespace with anything # else. There's no portable way to scope variables in Bourne shell # though, so actually running these functions will sometimes place # results into a variable named after the function, and often use # temporary variables in the '^_G_' namespace. If you are careful to # avoid using those namespaces casually in your sourcing script, things # should continue to work as you expect. And, of course, you can freely # overwrite any of the functions or variables defined here before # calling anything to customize them. EXIT_SUCCESS=0 EXIT_FAILURE=1 EXIT_MISMATCH=63 # $? = 63 is used to indicate version mismatch to missing. EXIT_SKIP=77 # $? = 77 is used to indicate a skipped test to automake. # Allow overriding, eg assuming that you follow the convention of # putting '$debug_cmd' at the start of all your functions, you can get # bash to show function call trace with: # # debug_cmd='eval echo "${FUNCNAME[0]} $*" >&2' bash your-script-name debug_cmd=${debug_cmd-":"} exit_cmd=: # By convention, finish your script with: # # exit $exit_status # # so that you can set exit_status to non-zero if you want to indicate # something went wrong during execution without actually bailing out at # the point of failure. exit_status=$EXIT_SUCCESS # Work around backward compatibility issue on IRIX 6.5. On IRIX 6.4+, sh # is ksh but when the shell is invoked as "sh" and the current value of # the _XPG environment variable is not equal to 1 (one), the special # positional parameter $0, within a function call, is the name of the # function. progpath=$0 # The name of this program. progname=`$ECHO "$progpath" |$SED "$sed_basename"` # Make sure we have an absolute progpath for reexecution: case $progpath in [\\/]*|[A-Za-z]:\\*) ;; *[\\/]*) progdir=`$ECHO "$progpath" |$SED "$sed_dirname"` progdir=`cd "$progdir" && pwd` progpath=$progdir/$progname ;; *) _G_IFS=$IFS IFS=${PATH_SEPARATOR-:} for progdir in $PATH; do IFS=$_G_IFS test -x "$progdir/$progname" && break done IFS=$_G_IFS test -n "$progdir" || progdir=`pwd` progpath=$progdir/$progname ;; esac ## ----------------- ## ## Standard options. ## ## ----------------- ## # The following options affect the operation of the functions defined # below, and should be set appropriately depending on run-time para- # meters passed on the command line. opt_dry_run=false opt_quiet=false opt_verbose=false # Categories 'all' and 'none' are always available. Append any others # you will pass as the first argument to func_warning from your own # code. warning_categories= # By default, display warnings according to 'opt_warning_types'. Set # 'warning_func' to ':' to elide all warnings, or func_fatal_error to # treat the next displayed warning as a fatal error. warning_func=func_warn_and_continue # Set to 'all' to display all warnings, 'none' to suppress all # warnings, or a space delimited list of some subset of # 'warning_categories' to display only the listed warnings. opt_warning_types=all ## -------------------- ## ## Resource management. ## ## -------------------- ## # This section contains definitions for functions that each ensure a # particular resource (a file, or a non-empty configuration variable for # example) is available, and if appropriate to extract default values # from pertinent package files. Call them using their associated # 'require_*' variable to ensure that they are executed, at most, once. # # It's entirely deliberate that calling these functions can set # variables that don't obey the namespace limitations obeyed by the rest # of this file, in order that that they be as useful as possible to # callers. # require_term_colors # ------------------- # Allow display of bold text on terminals that support it. require_term_colors=func_require_term_colors func_require_term_colors () { $debug_cmd test -t 1 && { # COLORTERM and USE_ANSI_COLORS environment variables take # precedence, because most terminfo databases neglect to describe # whether color sequences are supported. test -n "${COLORTERM+set}" && : ${USE_ANSI_COLORS="1"} if test 1 = "$USE_ANSI_COLORS"; then # Standard ANSI escape sequences tc_reset='' tc_bold=''; tc_standout='' tc_red=''; tc_green='' tc_blue=''; tc_cyan='' else # Otherwise trust the terminfo database after all. test -n "`tput sgr0 2>/dev/null`" && { tc_reset=`tput sgr0` test -n "`tput bold 2>/dev/null`" && tc_bold=`tput bold` tc_standout=$tc_bold test -n "`tput smso 2>/dev/null`" && tc_standout=`tput smso` test -n "`tput setaf 1 2>/dev/null`" && tc_red=`tput setaf 1` test -n "`tput setaf 2 2>/dev/null`" && tc_green=`tput setaf 2` test -n "`tput setaf 4 2>/dev/null`" && tc_blue=`tput setaf 4` test -n "`tput setaf 5 2>/dev/null`" && tc_cyan=`tput setaf 5` } fi } require_term_colors=: } ## ----------------- ## ## Function library. ## ## ----------------- ## # This section contains a variety of useful functions to call in your # scripts. Take note of the portable wrappers for features provided by # some modern shells, which will fall back to slower equivalents on # less featureful shells. # func_append VAR VALUE # --------------------- # Append VALUE onto the existing contents of VAR. # We should try to minimise forks, especially on Windows where they are # unreasonably slow, so skip the feature probes when bash or zsh are # being used: if test set = "${BASH_VERSION+set}${ZSH_VERSION+set}"; then : ${_G_HAVE_ARITH_OP="yes"} : ${_G_HAVE_XSI_OPS="yes"} # The += operator was introduced in bash 3.1 case $BASH_VERSION in [12].* | 3.0 | 3.0*) ;; *) : ${_G_HAVE_PLUSEQ_OP="yes"} ;; esac fi # _G_HAVE_PLUSEQ_OP # Can be empty, in which case the shell is probed, "yes" if += is # useable or anything else if it does not work. test -z "$_G_HAVE_PLUSEQ_OP" \ && (eval 'x=a; x+=" b"; test "a b" = "$x"') 2>/dev/null \ && _G_HAVE_PLUSEQ_OP=yes if test yes = "$_G_HAVE_PLUSEQ_OP" then # This is an XSI compatible shell, allowing a faster implementation... eval 'func_append () { $debug_cmd eval "$1+=\$2" }' else # ...otherwise fall back to using expr, which is often a shell builtin. func_append () { $debug_cmd eval "$1=\$$1\$2" } fi # func_append_quoted VAR VALUE # ---------------------------- # Quote VALUE and append to the end of shell variable VAR, separated # by a space. if test yes = "$_G_HAVE_PLUSEQ_OP"; then eval 'func_append_quoted () { $debug_cmd func_quote_for_eval "$2" eval "$1+=\\ \$func_quote_for_eval_result" }' else func_append_quoted () { $debug_cmd func_quote_for_eval "$2" eval "$1=\$$1\\ \$func_quote_for_eval_result" } fi # func_append_uniq VAR VALUE # -------------------------- # Append unique VALUE onto the existing contents of VAR, assuming # entries are delimited by the first character of VALUE. For example: # # func_append_uniq options " --another-option option-argument" # # will only append to $options if " --another-option option-argument " # is not already present somewhere in $options already (note spaces at # each end implied by leading space in second argument). func_append_uniq () { $debug_cmd eval _G_current_value='`$ECHO $'$1'`' _G_delim=`expr "$2" : '\(.\)'` case $_G_delim$_G_current_value$_G_delim in *"$2$_G_delim"*) ;; *) func_append "$@" ;; esac } # func_arith TERM... # ------------------ # Set func_arith_result to the result of evaluating TERMs. test -z "$_G_HAVE_ARITH_OP" \ && (eval 'test 2 = $(( 1 + 1 ))') 2>/dev/null \ && _G_HAVE_ARITH_OP=yes if test yes = "$_G_HAVE_ARITH_OP"; then eval 'func_arith () { $debug_cmd func_arith_result=$(( $* )) }' else func_arith () { $debug_cmd func_arith_result=`expr "$@"` } fi # func_basename FILE # ------------------ # Set func_basename_result to FILE with everything up to and including # the last / stripped. if test yes = "$_G_HAVE_XSI_OPS"; then # If this shell supports suffix pattern removal, then use it to avoid # forking. Hide the definitions single quotes in case the shell chokes # on unsupported syntax... _b='func_basename_result=${1##*/}' _d='case $1 in */*) func_dirname_result=${1%/*}$2 ;; * ) func_dirname_result=$3 ;; esac' else # ...otherwise fall back to using sed. _b='func_basename_result=`$ECHO "$1" |$SED "$sed_basename"`' _d='func_dirname_result=`$ECHO "$1" |$SED "$sed_dirname"` if test "X$func_dirname_result" = "X$1"; then func_dirname_result=$3 else func_append func_dirname_result "$2" fi' fi eval 'func_basename () { $debug_cmd '"$_b"' }' # func_dirname FILE APPEND NONDIR_REPLACEMENT # ------------------------------------------- # Compute the dirname of FILE. If nonempty, add APPEND to the result, # otherwise set result to NONDIR_REPLACEMENT. eval 'func_dirname () { $debug_cmd '"$_d"' }' # func_dirname_and_basename FILE APPEND NONDIR_REPLACEMENT # -------------------------------------------------------- # Perform func_basename and func_dirname in a single function # call: # dirname: Compute the dirname of FILE. If nonempty, # add APPEND to the result, otherwise set result # to NONDIR_REPLACEMENT. # value returned in "$func_dirname_result" # basename: Compute filename of FILE. # value retuned in "$func_basename_result" # For efficiency, we do not delegate to the functions above but instead # duplicate the functionality here. eval 'func_dirname_and_basename () { $debug_cmd '"$_b"' '"$_d"' }' # func_echo ARG... # ---------------- # Echo program name prefixed message. func_echo () { $debug_cmd _G_message=$* func_echo_IFS=$IFS IFS=$nl for _G_line in $_G_message; do IFS=$func_echo_IFS $ECHO "$progname: $_G_line" done IFS=$func_echo_IFS } # func_echo_all ARG... # -------------------- # Invoke $ECHO with all args, space-separated. func_echo_all () { $ECHO "$*" } # func_echo_infix_1 INFIX ARG... # ------------------------------ # Echo program name, followed by INFIX on the first line, with any # additional lines not showing INFIX. func_echo_infix_1 () { $debug_cmd $require_term_colors _G_infix=$1; shift _G_indent=$_G_infix _G_prefix="$progname: $_G_infix: " _G_message=$* # Strip color escape sequences before counting printable length for _G_tc in "$tc_reset" "$tc_bold" "$tc_standout" "$tc_red" "$tc_green" "$tc_blue" "$tc_cyan" do test -n "$_G_tc" && { _G_esc_tc=`$ECHO "$_G_tc" | $SED "$sed_make_literal_regex"` _G_indent=`$ECHO "$_G_indent" | $SED "s|$_G_esc_tc||g"` } done _G_indent="$progname: "`echo "$_G_indent" | $SED 's|.| |g'`" " ## exclude from sc_prohibit_nested_quotes func_echo_infix_1_IFS=$IFS IFS=$nl for _G_line in $_G_message; do IFS=$func_echo_infix_1_IFS $ECHO "$_G_prefix$tc_bold$_G_line$tc_reset" >&2 _G_prefix=$_G_indent done IFS=$func_echo_infix_1_IFS } # func_error ARG... # ----------------- # Echo program name prefixed message to standard error. func_error () { $debug_cmd $require_term_colors func_echo_infix_1 " $tc_standout${tc_red}error$tc_reset" "$*" >&2 } # func_fatal_error ARG... # ----------------------- # Echo program name prefixed message to standard error, and exit. func_fatal_error () { $debug_cmd func_error "$*" exit $EXIT_FAILURE } # func_grep EXPRESSION FILENAME # ----------------------------- # Check whether EXPRESSION matches any line of FILENAME, without output. func_grep () { $debug_cmd $GREP "$1" "$2" >/dev/null 2>&1 } # func_len STRING # --------------- # Set func_len_result to the length of STRING. STRING may not # start with a hyphen. test -z "$_G_HAVE_XSI_OPS" \ && (eval 'x=a/b/c; test 5aa/bb/cc = "${#x}${x%%/*}${x%/*}${x#*/}${x##*/}"') 2>/dev/null \ && _G_HAVE_XSI_OPS=yes if test yes = "$_G_HAVE_XSI_OPS"; then eval 'func_len () { $debug_cmd func_len_result=${#1} }' else func_len () { $debug_cmd func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len` } fi # func_mkdir_p DIRECTORY-PATH # --------------------------- # Make sure the entire path to DIRECTORY-PATH is available. func_mkdir_p () { $debug_cmd _G_directory_path=$1 _G_dir_list= if test -n "$_G_directory_path" && test : != "$opt_dry_run"; then # Protect directory names starting with '-' case $_G_directory_path in -*) _G_directory_path=./$_G_directory_path ;; esac # While some portion of DIR does not yet exist... while test ! -d "$_G_directory_path"; do # ...make a list in topmost first order. Use a colon delimited # list incase some portion of path contains whitespace. _G_dir_list=$_G_directory_path:$_G_dir_list # If the last portion added has no slash in it, the list is done case $_G_directory_path in */*) ;; *) break ;; esac # ...otherwise throw away the child directory and loop _G_directory_path=`$ECHO "$_G_directory_path" | $SED -e "$sed_dirname"` done _G_dir_list=`$ECHO "$_G_dir_list" | $SED 's|:*$||'` func_mkdir_p_IFS=$IFS; IFS=: for _G_dir in $_G_dir_list; do IFS=$func_mkdir_p_IFS # mkdir can fail with a 'File exist' error if two processes # try to create one of the directories concurrently. Don't # stop in that case! $MKDIR "$_G_dir" 2>/dev/null || : done IFS=$func_mkdir_p_IFS # Bail out if we (or some other process) failed to create a directory. test -d "$_G_directory_path" || \ func_fatal_error "Failed to create '$1'" fi } # func_mktempdir [BASENAME] # ------------------------- # Make a temporary directory that won't clash with other running # libtool processes, and avoids race conditions if possible. If # given, BASENAME is the basename for that directory. func_mktempdir () { $debug_cmd _G_template=${TMPDIR-/tmp}/${1-$progname} if test : = "$opt_dry_run"; then # Return a directory name, but don't create it in dry-run mode _G_tmpdir=$_G_template-$$ else # If mktemp works, use that first and foremost _G_tmpdir=`mktemp -d "$_G_template-XXXXXXXX" 2>/dev/null` if test ! -d "$_G_tmpdir"; then # Failing that, at least try and use $RANDOM to avoid a race _G_tmpdir=$_G_template-${RANDOM-0}$$ func_mktempdir_umask=`umask` umask 0077 $MKDIR "$_G_tmpdir" umask $func_mktempdir_umask fi # If we're not in dry-run mode, bomb out on failure test -d "$_G_tmpdir" || \ func_fatal_error "cannot create temporary directory '$_G_tmpdir'" fi $ECHO "$_G_tmpdir" } # func_normal_abspath PATH # ------------------------ # Remove doubled-up and trailing slashes, "." path components, # and cancel out any ".." path components in PATH after making # it an absolute path. func_normal_abspath () { $debug_cmd # These SED scripts presuppose an absolute path with a trailing slash. _G_pathcar='s|^/\([^/]*\).*$|\1|' _G_pathcdr='s|^/[^/]*||' _G_removedotparts=':dotsl s|/\./|/|g t dotsl s|/\.$|/|' _G_collapseslashes='s|/\{1,\}|/|g' _G_finalslash='s|/*$|/|' # Start from root dir and reassemble the path. func_normal_abspath_result= func_normal_abspath_tpath=$1 func_normal_abspath_altnamespace= case $func_normal_abspath_tpath in "") # Empty path, that just means $cwd. func_stripname '' '/' "`pwd`" func_normal_abspath_result=$func_stripname_result return ;; # The next three entries are used to spot a run of precisely # two leading slashes without using negated character classes; # we take advantage of case's first-match behaviour. ///*) # Unusual form of absolute path, do nothing. ;; //*) # Not necessarily an ordinary path; POSIX reserves leading '//' # and for example Cygwin uses it to access remote file shares # over CIFS/SMB, so we conserve a leading double slash if found. func_normal_abspath_altnamespace=/ ;; /*) # Absolute path, do nothing. ;; *) # Relative path, prepend $cwd. func_normal_abspath_tpath=`pwd`/$func_normal_abspath_tpath ;; esac # Cancel out all the simple stuff to save iterations. We also want # the path to end with a slash for ease of parsing, so make sure # there is one (and only one) here. func_normal_abspath_tpath=`$ECHO "$func_normal_abspath_tpath" | $SED \ -e "$_G_removedotparts" -e "$_G_collapseslashes" -e "$_G_finalslash"` while :; do # Processed it all yet? if test / = "$func_normal_abspath_tpath"; then # If we ascended to the root using ".." the result may be empty now. if test -z "$func_normal_abspath_result"; then func_normal_abspath_result=/ fi break fi func_normal_abspath_tcomponent=`$ECHO "$func_normal_abspath_tpath" | $SED \ -e "$_G_pathcar"` func_normal_abspath_tpath=`$ECHO "$func_normal_abspath_tpath" | $SED \ -e "$_G_pathcdr"` # Figure out what to do with it case $func_normal_abspath_tcomponent in "") # Trailing empty path component, ignore it. ;; ..) # Parent dir; strip last assembled component from result. func_dirname "$func_normal_abspath_result" func_normal_abspath_result=$func_dirname_result ;; *) # Actual path component, append it. func_append func_normal_abspath_result "/$func_normal_abspath_tcomponent" ;; esac done # Restore leading double-slash if one was found on entry. func_normal_abspath_result=$func_normal_abspath_altnamespace$func_normal_abspath_result } # func_notquiet ARG... # -------------------- # Echo program name prefixed message only when not in quiet mode. func_notquiet () { $debug_cmd $opt_quiet || func_echo ${1+"$@"} # A bug in bash halts the script if the last line of a function # fails when set -e is in force, so we need another command to # work around that: : } # func_relative_path SRCDIR DSTDIR # -------------------------------- # Set func_relative_path_result to the relative path from SRCDIR to DSTDIR. func_relative_path () { $debug_cmd func_relative_path_result= func_normal_abspath "$1" func_relative_path_tlibdir=$func_normal_abspath_result func_normal_abspath "$2" func_relative_path_tbindir=$func_normal_abspath_result # Ascend the tree starting from libdir while :; do # check if we have found a prefix of bindir case $func_relative_path_tbindir in $func_relative_path_tlibdir) # found an exact match func_relative_path_tcancelled= break ;; $func_relative_path_tlibdir*) # found a matching prefix func_stripname "$func_relative_path_tlibdir" '' "$func_relative_path_tbindir" func_relative_path_tcancelled=$func_stripname_result if test -z "$func_relative_path_result"; then func_relative_path_result=. fi break ;; *) func_dirname $func_relative_path_tlibdir func_relative_path_tlibdir=$func_dirname_result if test -z "$func_relative_path_tlibdir"; then # Have to descend all the way to the root! func_relative_path_result=../$func_relative_path_result func_relative_path_tcancelled=$func_relative_path_tbindir break fi func_relative_path_result=../$func_relative_path_result ;; esac done # Now calculate path; take care to avoid doubling-up slashes. func_stripname '' '/' "$func_relative_path_result" func_relative_path_result=$func_stripname_result func_stripname '/' '/' "$func_relative_path_tcancelled" if test -n "$func_stripname_result"; then func_append func_relative_path_result "/$func_stripname_result" fi # Normalisation. If bindir is libdir, return '.' else relative path. if test -n "$func_relative_path_result"; then func_stripname './' '' "$func_relative_path_result" func_relative_path_result=$func_stripname_result fi test -n "$func_relative_path_result" || func_relative_path_result=. : } # func_quote_for_eval ARG... # -------------------------- # Aesthetically quote ARGs to be evaled later. # This function returns two values: # i) func_quote_for_eval_result # double-quoted, suitable for a subsequent eval # ii) func_quote_for_eval_unquoted_result # has all characters that are still active within double # quotes backslashified. func_quote_for_eval () { $debug_cmd func_quote_for_eval_unquoted_result= func_quote_for_eval_result= while test 0 -lt $#; do case $1 in *[\\\`\"\$]*) _G_unquoted_arg=`printf '%s\n' "$1" |$SED "$sed_quote_subst"` ;; *) _G_unquoted_arg=$1 ;; esac if test -n "$func_quote_for_eval_unquoted_result"; then func_append func_quote_for_eval_unquoted_result " $_G_unquoted_arg" else func_append func_quote_for_eval_unquoted_result "$_G_unquoted_arg" fi case $_G_unquoted_arg in # Double-quote args containing shell metacharacters to delay # word splitting, command substitution and variable expansion # for a subsequent eval. # Many Bourne shells cannot handle close brackets correctly # in scan sets, so we specify it separately. *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") _G_quoted_arg=\"$_G_unquoted_arg\" ;; *) _G_quoted_arg=$_G_unquoted_arg ;; esac if test -n "$func_quote_for_eval_result"; then func_append func_quote_for_eval_result " $_G_quoted_arg" else func_append func_quote_for_eval_result "$_G_quoted_arg" fi shift done } # func_quote_for_expand ARG # ------------------------- # Aesthetically quote ARG to be evaled later; same as above, # but do not quote variable references. func_quote_for_expand () { $debug_cmd case $1 in *[\\\`\"]*) _G_arg=`$ECHO "$1" | $SED \ -e "$sed_double_quote_subst" -e "$sed_double_backslash"` ;; *) _G_arg=$1 ;; esac case $_G_arg in # Double-quote args containing shell metacharacters to delay # word splitting and command substitution for a subsequent eval. # Many Bourne shells cannot handle close brackets correctly # in scan sets, so we specify it separately. *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") _G_arg=\"$_G_arg\" ;; esac func_quote_for_expand_result=$_G_arg } # func_stripname PREFIX SUFFIX NAME # --------------------------------- # strip PREFIX and SUFFIX from NAME, and store in func_stripname_result. # PREFIX and SUFFIX must not contain globbing or regex special # characters, hashes, percent signs, but SUFFIX may contain a leading # dot (in which case that matches only a dot). if test yes = "$_G_HAVE_XSI_OPS"; then eval 'func_stripname () { $debug_cmd # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are # positional parameters, so assign one to ordinary variable first. func_stripname_result=$3 func_stripname_result=${func_stripname_result#"$1"} func_stripname_result=${func_stripname_result%"$2"} }' else func_stripname () { $debug_cmd case $2 in .*) func_stripname_result=`$ECHO "$3" | $SED -e "s%^$1%%" -e "s%\\\\$2\$%%"`;; *) func_stripname_result=`$ECHO "$3" | $SED -e "s%^$1%%" -e "s%$2\$%%"`;; esac } fi # func_show_eval CMD [FAIL_EXP] # ----------------------------- # Unless opt_quiet is true, then output CMD. Then, if opt_dryrun is # not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP # is given, then evaluate it. func_show_eval () { $debug_cmd _G_cmd=$1 _G_fail_exp=${2-':'} func_quote_for_expand "$_G_cmd" eval "func_notquiet $func_quote_for_expand_result" $opt_dry_run || { eval "$_G_cmd" _G_status=$? if test 0 -ne "$_G_status"; then eval "(exit $_G_status); $_G_fail_exp" fi } } # func_show_eval_locale CMD [FAIL_EXP] # ------------------------------------ # Unless opt_quiet is true, then output CMD. Then, if opt_dryrun is # not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP # is given, then evaluate it. Use the saved locale for evaluation. func_show_eval_locale () { $debug_cmd _G_cmd=$1 _G_fail_exp=${2-':'} $opt_quiet || { func_quote_for_expand "$_G_cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || { eval "$_G_user_locale $_G_cmd" _G_status=$? eval "$_G_safe_locale" if test 0 -ne "$_G_status"; then eval "(exit $_G_status); $_G_fail_exp" fi } } # func_tr_sh # ---------- # Turn $1 into a string suitable for a shell variable name. # Result is stored in $func_tr_sh_result. All characters # not in the set a-zA-Z0-9_ are replaced with '_'. Further, # if $1 begins with a digit, a '_' is prepended as well. func_tr_sh () { $debug_cmd case $1 in [0-9]* | *[!a-zA-Z0-9_]*) func_tr_sh_result=`$ECHO "$1" | $SED -e 's/^\([0-9]\)/_\1/' -e 's/[^a-zA-Z0-9_]/_/g'` ;; * ) func_tr_sh_result=$1 ;; esac } # func_verbose ARG... # ------------------- # Echo program name prefixed message in verbose mode only. func_verbose () { $debug_cmd $opt_verbose && func_echo "$*" : } # func_warn_and_continue ARG... # ----------------------------- # Echo program name prefixed warning message to standard error. func_warn_and_continue () { $debug_cmd $require_term_colors func_echo_infix_1 "${tc_red}warning$tc_reset" "$*" >&2 } # func_warning CATEGORY ARG... # ---------------------------- # Echo program name prefixed warning message to standard error. Warning # messages can be filtered according to CATEGORY, where this function # elides messages where CATEGORY is not listed in the global variable # 'opt_warning_types'. func_warning () { $debug_cmd # CATEGORY must be in the warning_categories list! case " $warning_categories " in *" $1 "*) ;; *) func_internal_error "invalid warning category '$1'" ;; esac _G_category=$1 shift case " $opt_warning_types " in *" $_G_category "*) $warning_func ${1+"$@"} ;; esac } # func_sort_ver VER1 VER2 # ----------------------- # 'sort -V' is not generally available. # Note this deviates from the version comparison in automake # in that it treats 1.5 < 1.5.0, and treats 1.4.4a < 1.4-p3a # but this should suffice as we won't be specifying old # version formats or redundant trailing .0 in bootstrap.conf. # If we did want full compatibility then we should probably # use m4_version_compare from autoconf. func_sort_ver () { $debug_cmd printf '%s\n%s\n' "$1" "$2" \ | sort -t. -k 1,1n -k 2,2n -k 3,3n -k 4,4n -k 5,5n -k 6,6n -k 7,7n -k 8,8n -k 9,9n } # func_lt_ver PREV CURR # --------------------- # Return true if PREV and CURR are in the correct order according to # func_sort_ver, otherwise false. Use it like this: # # func_lt_ver "$prev_ver" "$proposed_ver" || func_fatal_error "..." func_lt_ver () { $debug_cmd test "x$1" = x`func_sort_ver "$1" "$2" | $SED 1q` } # Local variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'before-save-hook 'time-stamp) # time-stamp-pattern: "10/scriptversion=%:y-%02m-%02d.%02H; # UTC" # time-stamp-time-zone: "UTC" # End: #! /bin/sh # Set a version string for this script. scriptversion=2014-01-07.03; # UTC # A portable, pluggable option parser for Bourne shell. # Written by Gary V. Vaughan, 2010 # Copyright (C) 2010-2015 Free Software Foundation, Inc. # This is free software; see the source for copying conditions. There is NO # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. # This program is free software: you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation, either version 3 of the License, or # (at your option) any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # Please report bugs or propose patches to gary@gnu.org. ## ------ ## ## Usage. ## ## ------ ## # This file is a library for parsing options in your shell scripts along # with assorted other useful supporting features that you can make use # of too. # # For the simplest scripts you might need only: # # #!/bin/sh # . relative/path/to/funclib.sh # . relative/path/to/options-parser # scriptversion=1.0 # func_options ${1+"$@"} # eval set dummy "$func_options_result"; shift # ...rest of your script... # # In order for the '--version' option to work, you will need to have a # suitably formatted comment like the one at the top of this file # starting with '# Written by ' and ending with '# warranty; '. # # For '-h' and '--help' to work, you will also need a one line # description of your script's purpose in a comment directly above the # '# Written by ' line, like the one at the top of this file. # # The default options also support '--debug', which will turn on shell # execution tracing (see the comment above debug_cmd below for another # use), and '--verbose' and the func_verbose function to allow your script # to display verbose messages only when your user has specified # '--verbose'. # # After sourcing this file, you can plug processing for additional # options by amending the variables from the 'Configuration' section # below, and following the instructions in the 'Option parsing' # section further down. ## -------------- ## ## Configuration. ## ## -------------- ## # You should override these variables in your script after sourcing this # file so that they reflect the customisations you have added to the # option parser. # The usage line for option parsing errors and the start of '-h' and # '--help' output messages. You can embed shell variables for delayed # expansion at the time the message is displayed, but you will need to # quote other shell meta-characters carefully to prevent them being # expanded when the contents are evaled. usage='$progpath [OPTION]...' # Short help message in response to '-h' and '--help'. Add to this or # override it after sourcing this library to reflect the full set of # options your script accepts. usage_message="\ --debug enable verbose shell tracing -W, --warnings=CATEGORY report the warnings falling in CATEGORY [all] -v, --verbose verbosely report processing --version print version information and exit -h, --help print short or long help message and exit " # Additional text appended to 'usage_message' in response to '--help'. long_help_message=" Warning categories include: 'all' show all warnings 'none' turn off all the warnings 'error' warnings are treated as fatal errors" # Help message printed before fatal option parsing errors. fatal_help="Try '\$progname --help' for more information." ## ------------------------- ## ## Hook function management. ## ## ------------------------- ## # This section contains functions for adding, removing, and running hooks # to the main code. A hook is just a named list of of function, that can # be run in order later on. # func_hookable FUNC_NAME # ----------------------- # Declare that FUNC_NAME will run hooks added with # 'func_add_hook FUNC_NAME ...'. func_hookable () { $debug_cmd func_append hookable_fns " $1" } # func_add_hook FUNC_NAME HOOK_FUNC # --------------------------------- # Request that FUNC_NAME call HOOK_FUNC before it returns. FUNC_NAME must # first have been declared "hookable" by a call to 'func_hookable'. func_add_hook () { $debug_cmd case " $hookable_fns " in *" $1 "*) ;; *) func_fatal_error "'$1' does not accept hook functions." ;; esac eval func_append ${1}_hooks '" $2"' } # func_remove_hook FUNC_NAME HOOK_FUNC # ------------------------------------ # Remove HOOK_FUNC from the list of functions called by FUNC_NAME. func_remove_hook () { $debug_cmd eval ${1}_hooks='`$ECHO "\$'$1'_hooks" |$SED "s| '$2'||"`' } # func_run_hooks FUNC_NAME [ARG]... # --------------------------------- # Run all hook functions registered to FUNC_NAME. # It is assumed that the list of hook functions contains nothing more # than a whitespace-delimited list of legal shell function names, and # no effort is wasted trying to catch shell meta-characters or preserve # whitespace. func_run_hooks () { $debug_cmd case " $hookable_fns " in *" $1 "*) ;; *) func_fatal_error "'$1' does not support hook funcions.n" ;; esac eval _G_hook_fns=\$$1_hooks; shift for _G_hook in $_G_hook_fns; do eval $_G_hook '"$@"' # store returned options list back into positional # parameters for next 'cmd' execution. eval _G_hook_result=\$${_G_hook}_result eval set dummy "$_G_hook_result"; shift done func_quote_for_eval ${1+"$@"} func_run_hooks_result=$func_quote_for_eval_result } ## --------------- ## ## Option parsing. ## ## --------------- ## # In order to add your own option parsing hooks, you must accept the # full positional parameter list in your hook function, remove any # options that you action, and then pass back the remaining unprocessed # options in '_result', escaped suitably for # 'eval'. Like this: # # my_options_prep () # { # $debug_cmd # # # Extend the existing usage message. # usage_message=$usage_message' # -s, --silent don'\''t print informational messages # ' # # func_quote_for_eval ${1+"$@"} # my_options_prep_result=$func_quote_for_eval_result # } # func_add_hook func_options_prep my_options_prep # # # my_silent_option () # { # $debug_cmd # # # Note that for efficiency, we parse as many options as we can # # recognise in a loop before passing the remainder back to the # # caller on the first unrecognised argument we encounter. # while test $# -gt 0; do # opt=$1; shift # case $opt in # --silent|-s) opt_silent=: ;; # # Separate non-argument short options: # -s*) func_split_short_opt "$_G_opt" # set dummy "$func_split_short_opt_name" \ # "-$func_split_short_opt_arg" ${1+"$@"} # shift # ;; # *) set dummy "$_G_opt" "$*"; shift; break ;; # esac # done # # func_quote_for_eval ${1+"$@"} # my_silent_option_result=$func_quote_for_eval_result # } # func_add_hook func_parse_options my_silent_option # # # my_option_validation () # { # $debug_cmd # # $opt_silent && $opt_verbose && func_fatal_help "\ # '--silent' and '--verbose' options are mutually exclusive." # # func_quote_for_eval ${1+"$@"} # my_option_validation_result=$func_quote_for_eval_result # } # func_add_hook func_validate_options my_option_validation # # You'll alse need to manually amend $usage_message to reflect the extra # options you parse. It's preferable to append if you can, so that # multiple option parsing hooks can be added safely. # func_options [ARG]... # --------------------- # All the functions called inside func_options are hookable. See the # individual implementations for details. func_hookable func_options func_options () { $debug_cmd func_options_prep ${1+"$@"} eval func_parse_options \ ${func_options_prep_result+"$func_options_prep_result"} eval func_validate_options \ ${func_parse_options_result+"$func_parse_options_result"} eval func_run_hooks func_options \ ${func_validate_options_result+"$func_validate_options_result"} # save modified positional parameters for caller func_options_result=$func_run_hooks_result } # func_options_prep [ARG]... # -------------------------- # All initialisations required before starting the option parse loop. # Note that when calling hook functions, we pass through the list of # positional parameters. If a hook function modifies that list, and # needs to propogate that back to rest of this script, then the complete # modified list must be put in 'func_run_hooks_result' before # returning. func_hookable func_options_prep func_options_prep () { $debug_cmd # Option defaults: opt_verbose=false opt_warning_types= func_run_hooks func_options_prep ${1+"$@"} # save modified positional parameters for caller func_options_prep_result=$func_run_hooks_result } # func_parse_options [ARG]... # --------------------------- # The main option parsing loop. func_hookable func_parse_options func_parse_options () { $debug_cmd func_parse_options_result= # this just eases exit handling while test $# -gt 0; do # Defer to hook functions for initial option parsing, so they # get priority in the event of reusing an option name. func_run_hooks func_parse_options ${1+"$@"} # Adjust func_parse_options positional parameters to match eval set dummy "$func_run_hooks_result"; shift # Break out of the loop if we already parsed every option. test $# -gt 0 || break _G_opt=$1 shift case $_G_opt in --debug|-x) debug_cmd='set -x' func_echo "enabling shell trace mode" $debug_cmd ;; --no-warnings|--no-warning|--no-warn) set dummy --warnings none ${1+"$@"} shift ;; --warnings|--warning|-W) test $# = 0 && func_missing_arg $_G_opt && break case " $warning_categories $1" in *" $1 "*) # trailing space prevents matching last $1 above func_append_uniq opt_warning_types " $1" ;; *all) opt_warning_types=$warning_categories ;; *none) opt_warning_types=none warning_func=: ;; *error) opt_warning_types=$warning_categories warning_func=func_fatal_error ;; *) func_fatal_error \ "unsupported warning category: '$1'" ;; esac shift ;; --verbose|-v) opt_verbose=: ;; --version) func_version ;; -\?|-h) func_usage ;; --help) func_help ;; # Separate optargs to long options (plugins may need this): --*=*) func_split_equals "$_G_opt" set dummy "$func_split_equals_lhs" \ "$func_split_equals_rhs" ${1+"$@"} shift ;; # Separate optargs to short options: -W*) func_split_short_opt "$_G_opt" set dummy "$func_split_short_opt_name" \ "$func_split_short_opt_arg" ${1+"$@"} shift ;; # Separate non-argument short options: -\?*|-h*|-v*|-x*) func_split_short_opt "$_G_opt" set dummy "$func_split_short_opt_name" \ "-$func_split_short_opt_arg" ${1+"$@"} shift ;; --) break ;; -*) func_fatal_help "unrecognised option: '$_G_opt'" ;; *) set dummy "$_G_opt" ${1+"$@"}; shift; break ;; esac done # save modified positional parameters for caller func_quote_for_eval ${1+"$@"} func_parse_options_result=$func_quote_for_eval_result } # func_validate_options [ARG]... # ------------------------------ # Perform any sanity checks on option settings and/or unconsumed # arguments. func_hookable func_validate_options func_validate_options () { $debug_cmd # Display all warnings if -W was not given. test -n "$opt_warning_types" || opt_warning_types=" $warning_categories" func_run_hooks func_validate_options ${1+"$@"} # Bail if the options were screwed! $exit_cmd $EXIT_FAILURE # save modified positional parameters for caller func_validate_options_result=$func_run_hooks_result } ## ----------------- ## ## Helper functions. ## ## ----------------- ## # This section contains the helper functions used by the rest of the # hookable option parser framework in ascii-betical order. # func_fatal_help ARG... # ---------------------- # Echo program name prefixed message to standard error, followed by # a help hint, and exit. func_fatal_help () { $debug_cmd eval \$ECHO \""Usage: $usage"\" eval \$ECHO \""$fatal_help"\" func_error ${1+"$@"} exit $EXIT_FAILURE } # func_help # --------- # Echo long help message to standard output and exit. func_help () { $debug_cmd func_usage_message $ECHO "$long_help_message" exit 0 } # func_missing_arg ARGNAME # ------------------------ # Echo program name prefixed message to standard error and set global # exit_cmd. func_missing_arg () { $debug_cmd func_error "Missing argument for '$1'." exit_cmd=exit } # func_split_equals STRING # ------------------------ # Set func_split_equals_lhs and func_split_equals_rhs shell variables after # splitting STRING at the '=' sign. test -z "$_G_HAVE_XSI_OPS" \ && (eval 'x=a/b/c; test 5aa/bb/cc = "${#x}${x%%/*}${x%/*}${x#*/}${x##*/}"') 2>/dev/null \ && _G_HAVE_XSI_OPS=yes if test yes = "$_G_HAVE_XSI_OPS" then # This is an XSI compatible shell, allowing a faster implementation... eval 'func_split_equals () { $debug_cmd func_split_equals_lhs=${1%%=*} func_split_equals_rhs=${1#*=} test "x$func_split_equals_lhs" = "x$1" \ && func_split_equals_rhs= }' else # ...otherwise fall back to using expr, which is often a shell builtin. func_split_equals () { $debug_cmd func_split_equals_lhs=`expr "x$1" : 'x\([^=]*\)'` func_split_equals_rhs= test "x$func_split_equals_lhs" = "x$1" \ || func_split_equals_rhs=`expr "x$1" : 'x[^=]*=\(.*\)$'` } fi #func_split_equals # func_split_short_opt SHORTOPT # ----------------------------- # Set func_split_short_opt_name and func_split_short_opt_arg shell # variables after splitting SHORTOPT after the 2nd character. if test yes = "$_G_HAVE_XSI_OPS" then # This is an XSI compatible shell, allowing a faster implementation... eval 'func_split_short_opt () { $debug_cmd func_split_short_opt_arg=${1#??} func_split_short_opt_name=${1%"$func_split_short_opt_arg"} }' else # ...otherwise fall back to using expr, which is often a shell builtin. func_split_short_opt () { $debug_cmd func_split_short_opt_name=`expr "x$1" : 'x-\(.\)'` func_split_short_opt_arg=`expr "x$1" : 'x-.\(.*\)$'` } fi #func_split_short_opt # func_usage # ---------- # Echo short help message to standard output and exit. func_usage () { $debug_cmd func_usage_message $ECHO "Run '$progname --help |${PAGER-more}' for full usage" exit 0 } # func_usage_message # ------------------ # Echo short help message to standard output. func_usage_message () { $debug_cmd eval \$ECHO \""Usage: $usage"\" echo $SED -n 's|^# || /^Written by/{ x;p;x } h /^Written by/q' < "$progpath" echo eval \$ECHO \""$usage_message"\" } # func_version # ------------ # Echo version message to standard output and exit. func_version () { $debug_cmd printf '%s\n' "$progname $scriptversion" $SED -n ' /(C)/!b go :more /\./!{ N s|\n# | | b more } :go /^# Written by /,/# warranty; / { s|^# || s|^# *$|| s|\((C)\)[ 0-9,-]*[ ,-]\([1-9][0-9]* \)|\1 \2| p } /^# Written by / { s|^# || p } /^warranty; /q' < "$progpath" exit $? } # Local variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'before-save-hook 'time-stamp) # time-stamp-pattern: "10/scriptversion=%:y-%02m-%02d.%02H; # UTC" # time-stamp-time-zone: "UTC" # End: # Set a version string. scriptversion='(GNU libtool) 2.4.6' # func_echo ARG... # ---------------- # Libtool also displays the current mode in messages, so override # funclib.sh func_echo with this custom definition. func_echo () { $debug_cmd _G_message=$* func_echo_IFS=$IFS IFS=$nl for _G_line in $_G_message; do IFS=$func_echo_IFS $ECHO "$progname${opt_mode+: $opt_mode}: $_G_line" done IFS=$func_echo_IFS } # func_warning ARG... # ------------------- # Libtool warnings are not categorized, so override funclib.sh # func_warning with this simpler definition. func_warning () { $debug_cmd $warning_func ${1+"$@"} } ## ---------------- ## ## Options parsing. ## ## ---------------- ## # Hook in the functions to make sure our own options are parsed during # the option parsing loop. usage='$progpath [OPTION]... [MODE-ARG]...' # Short help message in response to '-h'. usage_message="Options: --config show all configuration variables --debug enable verbose shell tracing -n, --dry-run display commands without modifying any files --features display basic configuration information and exit --mode=MODE use operation mode MODE --no-warnings equivalent to '-Wnone' --preserve-dup-deps don't remove duplicate dependency libraries --quiet, --silent don't print informational messages --tag=TAG use configuration variables from tag TAG -v, --verbose print more informational messages than default --version print version information -W, --warnings=CATEGORY report the warnings falling in CATEGORY [all] -h, --help, --help-all print short, long, or detailed help message " # Additional text appended to 'usage_message' in response to '--help'. func_help () { $debug_cmd func_usage_message $ECHO "$long_help_message MODE must be one of the following: clean remove files from the build directory compile compile a source file into a libtool object execute automatically set library path, then run a program finish complete the installation of libtool libraries install install libraries or executables link create a library or an executable uninstall remove libraries from an installed directory MODE-ARGS vary depending on the MODE. When passed as first option, '--mode=MODE' may be abbreviated as 'MODE' or a unique abbreviation of that. Try '$progname --help --mode=MODE' for a more detailed description of MODE. When reporting a bug, please describe a test case to reproduce it and include the following information: host-triplet: $host shell: $SHELL compiler: $LTCC compiler flags: $LTCFLAGS linker: $LD (gnu? $with_gnu_ld) version: $progname (GNU libtool) 2.4.6 automake: `($AUTOMAKE --version) 2>/dev/null |$SED 1q` autoconf: `($AUTOCONF --version) 2>/dev/null |$SED 1q` Report bugs to . GNU libtool home page: . General help using GNU software: ." exit 0 } # func_lo2o OBJECT-NAME # --------------------- # Transform OBJECT-NAME from a '.lo' suffix to the platform specific # object suffix. lo2o=s/\\.lo\$/.$objext/ o2lo=s/\\.$objext\$/.lo/ if test yes = "$_G_HAVE_XSI_OPS"; then eval 'func_lo2o () { case $1 in *.lo) func_lo2o_result=${1%.lo}.$objext ;; * ) func_lo2o_result=$1 ;; esac }' # func_xform LIBOBJ-OR-SOURCE # --------------------------- # Transform LIBOBJ-OR-SOURCE from a '.o' or '.c' (or otherwise) # suffix to a '.lo' libtool-object suffix. eval 'func_xform () { func_xform_result=${1%.*}.lo }' else # ...otherwise fall back to using sed. func_lo2o () { func_lo2o_result=`$ECHO "$1" | $SED "$lo2o"` } func_xform () { func_xform_result=`$ECHO "$1" | $SED 's|\.[^.]*$|.lo|'` } fi # func_fatal_configuration ARG... # ------------------------------- # Echo program name prefixed message to standard error, followed by # a configuration failure hint, and exit. func_fatal_configuration () { func__fatal_error ${1+"$@"} \ "See the $PACKAGE documentation for more information." \ "Fatal configuration error." } # func_config # ----------- # Display the configuration for all the tags in this script. func_config () { re_begincf='^# ### BEGIN LIBTOOL' re_endcf='^# ### END LIBTOOL' # Default configuration. $SED "1,/$re_begincf CONFIG/d;/$re_endcf CONFIG/,\$d" < "$progpath" # Now print the configurations for the tags. for tagname in $taglist; do $SED -n "/$re_begincf TAG CONFIG: $tagname\$/,/$re_endcf TAG CONFIG: $tagname\$/p" < "$progpath" done exit $? } # func_features # ------------- # Display the features supported by this script. func_features () { echo "host: $host" if test yes = "$build_libtool_libs"; then echo "enable shared libraries" else echo "disable shared libraries" fi if test yes = "$build_old_libs"; then echo "enable static libraries" else echo "disable static libraries" fi exit $? } # func_enable_tag TAGNAME # ----------------------- # Verify that TAGNAME is valid, and either flag an error and exit, or # enable the TAGNAME tag. We also add TAGNAME to the global $taglist # variable here. func_enable_tag () { # Global variable: tagname=$1 re_begincf="^# ### BEGIN LIBTOOL TAG CONFIG: $tagname\$" re_endcf="^# ### END LIBTOOL TAG CONFIG: $tagname\$" sed_extractcf=/$re_begincf/,/$re_endcf/p # Validate tagname. case $tagname in *[!-_A-Za-z0-9,/]*) func_fatal_error "invalid tag name: $tagname" ;; esac # Don't test for the "default" C tag, as we know it's # there but not specially marked. case $tagname in CC) ;; *) if $GREP "$re_begincf" "$progpath" >/dev/null 2>&1; then taglist="$taglist $tagname" # Evaluate the configuration. Be careful to quote the path # and the sed script, to avoid splitting on whitespace, but # also don't use non-portable quotes within backquotes within # quotes we have to do it in 2 steps: extractedcf=`$SED -n -e "$sed_extractcf" < "$progpath"` eval "$extractedcf" else func_error "ignoring unknown tag $tagname" fi ;; esac } # func_check_version_match # ------------------------ # Ensure that we are using m4 macros, and libtool script from the same # release of libtool. func_check_version_match () { if test "$package_revision" != "$macro_revision"; then if test "$VERSION" != "$macro_version"; then if test -z "$macro_version"; then cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, but the $progname: definition of this LT_INIT comes from an older release. $progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION $progname: and run autoconf again. _LT_EOF else cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, but the $progname: definition of this LT_INIT comes from $PACKAGE $macro_version. $progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION $progname: and run autoconf again. _LT_EOF fi else cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, revision $package_revision, $progname: but the definition of this LT_INIT comes from revision $macro_revision. $progname: You should recreate aclocal.m4 with macros from revision $package_revision $progname: of $PACKAGE $VERSION and run autoconf again. _LT_EOF fi exit $EXIT_MISMATCH fi } # libtool_options_prep [ARG]... # ----------------------------- # Preparation for options parsed by libtool. libtool_options_prep () { $debug_mode # Option defaults: opt_config=false opt_dlopen= opt_dry_run=false opt_help=false opt_mode= opt_preserve_dup_deps=false opt_quiet=false nonopt= preserve_args= # Shorthand for --mode=foo, only valid as the first argument case $1 in clean|clea|cle|cl) shift; set dummy --mode clean ${1+"$@"}; shift ;; compile|compil|compi|comp|com|co|c) shift; set dummy --mode compile ${1+"$@"}; shift ;; execute|execut|execu|exec|exe|ex|e) shift; set dummy --mode execute ${1+"$@"}; shift ;; finish|finis|fini|fin|fi|f) shift; set dummy --mode finish ${1+"$@"}; shift ;; install|instal|insta|inst|ins|in|i) shift; set dummy --mode install ${1+"$@"}; shift ;; link|lin|li|l) shift; set dummy --mode link ${1+"$@"}; shift ;; uninstall|uninstal|uninsta|uninst|unins|unin|uni|un|u) shift; set dummy --mode uninstall ${1+"$@"}; shift ;; esac # Pass back the list of options. func_quote_for_eval ${1+"$@"} libtool_options_prep_result=$func_quote_for_eval_result } func_add_hook func_options_prep libtool_options_prep # libtool_parse_options [ARG]... # --------------------------------- # Provide handling for libtool specific options. libtool_parse_options () { $debug_cmd # Perform our own loop to consume as many options as possible in # each iteration. while test $# -gt 0; do _G_opt=$1 shift case $_G_opt in --dry-run|--dryrun|-n) opt_dry_run=: ;; --config) func_config ;; --dlopen|-dlopen) opt_dlopen="${opt_dlopen+$opt_dlopen }$1" shift ;; --preserve-dup-deps) opt_preserve_dup_deps=: ;; --features) func_features ;; --finish) set dummy --mode finish ${1+"$@"}; shift ;; --help) opt_help=: ;; --help-all) opt_help=': help-all' ;; --mode) test $# = 0 && func_missing_arg $_G_opt && break opt_mode=$1 case $1 in # Valid mode arguments: clean|compile|execute|finish|install|link|relink|uninstall) ;; # Catch anything else as an error *) func_error "invalid argument for $_G_opt" exit_cmd=exit break ;; esac shift ;; --no-silent|--no-quiet) opt_quiet=false func_append preserve_args " $_G_opt" ;; --no-warnings|--no-warning|--no-warn) opt_warning=false func_append preserve_args " $_G_opt" ;; --no-verbose) opt_verbose=false func_append preserve_args " $_G_opt" ;; --silent|--quiet) opt_quiet=: opt_verbose=false func_append preserve_args " $_G_opt" ;; --tag) test $# = 0 && func_missing_arg $_G_opt && break opt_tag=$1 func_append preserve_args " $_G_opt $1" func_enable_tag "$1" shift ;; --verbose|-v) opt_quiet=false opt_verbose=: func_append preserve_args " $_G_opt" ;; # An option not handled by this hook function: *) set dummy "$_G_opt" ${1+"$@"}; shift; break ;; esac done # save modified positional parameters for caller func_quote_for_eval ${1+"$@"} libtool_parse_options_result=$func_quote_for_eval_result } func_add_hook func_parse_options libtool_parse_options # libtool_validate_options [ARG]... # --------------------------------- # Perform any sanity checks on option settings and/or unconsumed # arguments. libtool_validate_options () { # save first non-option argument if test 0 -lt $#; then nonopt=$1 shift fi # preserve --debug test : = "$debug_cmd" || func_append preserve_args " --debug" case $host in # Solaris2 added to fix http://debbugs.gnu.org/cgi/bugreport.cgi?bug=16452 # see also: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59788 *cygwin* | *mingw* | *pw32* | *cegcc* | *solaris2* | *os2*) # don't eliminate duplications in $postdeps and $predeps opt_duplicate_compiler_generated_deps=: ;; *) opt_duplicate_compiler_generated_deps=$opt_preserve_dup_deps ;; esac $opt_help || { # Sanity checks first: func_check_version_match test yes != "$build_libtool_libs" \ && test yes != "$build_old_libs" \ && func_fatal_configuration "not configured to build any kind of library" # Darwin sucks eval std_shrext=\"$shrext_cmds\" # Only execute mode is allowed to have -dlopen flags. if test -n "$opt_dlopen" && test execute != "$opt_mode"; then func_error "unrecognized option '-dlopen'" $ECHO "$help" 1>&2 exit $EXIT_FAILURE fi # Change the help message to a mode-specific one. generic_help=$help help="Try '$progname --help --mode=$opt_mode' for more information." } # Pass back the unparsed argument list func_quote_for_eval ${1+"$@"} libtool_validate_options_result=$func_quote_for_eval_result } func_add_hook func_validate_options libtool_validate_options # Process options as early as possible so that --help and --version # can return quickly. func_options ${1+"$@"} eval set dummy "$func_options_result"; shift ## ----------- ## ## Main. ## ## ----------- ## magic='%%%MAGIC variable%%%' magic_exe='%%%MAGIC EXE variable%%%' # Global variables. extracted_archives= extracted_serial=0 # If this variable is set in any of the actions, the command in it # will be execed at the end. This prevents here-documents from being # left over by shells. exec_cmd= # A function that is used when there is no print builtin or printf. func_fallback_echo () { eval 'cat <<_LTECHO_EOF $1 _LTECHO_EOF' } # func_generated_by_libtool # True iff stdin has been generated by Libtool. This function is only # a basic sanity check; it will hardly flush out determined imposters. func_generated_by_libtool_p () { $GREP "^# Generated by .*$PACKAGE" > /dev/null 2>&1 } # func_lalib_p file # True iff FILE is a libtool '.la' library or '.lo' object file. # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_lalib_p () { test -f "$1" && $SED -e 4q "$1" 2>/dev/null | func_generated_by_libtool_p } # func_lalib_unsafe_p file # True iff FILE is a libtool '.la' library or '.lo' object file. # This function implements the same check as func_lalib_p without # resorting to external programs. To this end, it redirects stdin and # closes it afterwards, without saving the original file descriptor. # As a safety measure, use it only where a negative result would be # fatal anyway. Works if 'file' does not exist. func_lalib_unsafe_p () { lalib_p=no if test -f "$1" && test -r "$1" && exec 5<&0 <"$1"; then for lalib_p_l in 1 2 3 4 do read lalib_p_line case $lalib_p_line in \#\ Generated\ by\ *$PACKAGE* ) lalib_p=yes; break;; esac done exec 0<&5 5<&- fi test yes = "$lalib_p" } # func_ltwrapper_script_p file # True iff FILE is a libtool wrapper script # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_script_p () { test -f "$1" && $lt_truncate_bin < "$1" 2>/dev/null | func_generated_by_libtool_p } # func_ltwrapper_executable_p file # True iff FILE is a libtool wrapper executable # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_executable_p () { func_ltwrapper_exec_suffix= case $1 in *.exe) ;; *) func_ltwrapper_exec_suffix=.exe ;; esac $GREP "$magic_exe" "$1$func_ltwrapper_exec_suffix" >/dev/null 2>&1 } # func_ltwrapper_scriptname file # Assumes file is an ltwrapper_executable # uses $file to determine the appropriate filename for a # temporary ltwrapper_script. func_ltwrapper_scriptname () { func_dirname_and_basename "$1" "" "." func_stripname '' '.exe' "$func_basename_result" func_ltwrapper_scriptname_result=$func_dirname_result/$objdir/${func_stripname_result}_ltshwrapper } # func_ltwrapper_p file # True iff FILE is a libtool wrapper script or wrapper executable # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_p () { func_ltwrapper_script_p "$1" || func_ltwrapper_executable_p "$1" } # func_execute_cmds commands fail_cmd # Execute tilde-delimited COMMANDS. # If FAIL_CMD is given, eval that upon failure. # FAIL_CMD may read-access the current command in variable CMD! func_execute_cmds () { $debug_cmd save_ifs=$IFS; IFS='~' for cmd in $1; do IFS=$sp$nl eval cmd=\"$cmd\" IFS=$save_ifs func_show_eval "$cmd" "${2-:}" done IFS=$save_ifs } # func_source file # Source FILE, adding directory component if necessary. # Note that it is not necessary on cygwin/mingw to append a dot to # FILE even if both FILE and FILE.exe exist: automatic-append-.exe # behavior happens only for exec(3), not for open(2)! Also, sourcing # 'FILE.' does not work on cygwin managed mounts. func_source () { $debug_cmd case $1 in */* | *\\*) . "$1" ;; *) . "./$1" ;; esac } # func_resolve_sysroot PATH # Replace a leading = in PATH with a sysroot. Store the result into # func_resolve_sysroot_result func_resolve_sysroot () { func_resolve_sysroot_result=$1 case $func_resolve_sysroot_result in =*) func_stripname '=' '' "$func_resolve_sysroot_result" func_resolve_sysroot_result=$lt_sysroot$func_stripname_result ;; esac } # func_replace_sysroot PATH # If PATH begins with the sysroot, replace it with = and # store the result into func_replace_sysroot_result. func_replace_sysroot () { case $lt_sysroot:$1 in ?*:"$lt_sysroot"*) func_stripname "$lt_sysroot" '' "$1" func_replace_sysroot_result='='$func_stripname_result ;; *) # Including no sysroot. func_replace_sysroot_result=$1 ;; esac } # func_infer_tag arg # Infer tagged configuration to use if any are available and # if one wasn't chosen via the "--tag" command line option. # Only attempt this if the compiler in the base compile # command doesn't match the default compiler. # arg is usually of the form 'gcc ...' func_infer_tag () { $debug_cmd if test -n "$available_tags" && test -z "$tagname"; then CC_quoted= for arg in $CC; do func_append_quoted CC_quoted "$arg" done CC_expanded=`func_echo_all $CC` CC_quoted_expanded=`func_echo_all $CC_quoted` case $@ in # Blanks in the command may have been stripped by the calling shell, # but not from the CC environment variable when configure was run. " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) ;; # Blanks at the start of $base_compile will cause this to fail # if we don't check for them as well. *) for z in $available_tags; do if $GREP "^# ### BEGIN LIBTOOL TAG CONFIG: $z$" < "$progpath" > /dev/null; then # Evaluate the configuration. eval "`$SED -n -e '/^# ### BEGIN LIBTOOL TAG CONFIG: '$z'$/,/^# ### END LIBTOOL TAG CONFIG: '$z'$/p' < $progpath`" CC_quoted= for arg in $CC; do # Double-quote args containing other shell metacharacters. func_append_quoted CC_quoted "$arg" done CC_expanded=`func_echo_all $CC` CC_quoted_expanded=`func_echo_all $CC_quoted` case "$@ " in " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) # The compiler in the base compile command matches # the one in the tagged configuration. # Assume this is the tagged configuration we want. tagname=$z break ;; esac fi done # If $tagname still isn't set, then no tagged configuration # was found and let the user know that the "--tag" command # line option must be used. if test -z "$tagname"; then func_echo "unable to infer tagged configuration" func_fatal_error "specify a tag with '--tag'" # else # func_verbose "using $tagname tagged configuration" fi ;; esac fi } # func_write_libtool_object output_name pic_name nonpic_name # Create a libtool object file (analogous to a ".la" file), # but don't create it if we're doing a dry run. func_write_libtool_object () { write_libobj=$1 if test yes = "$build_libtool_libs"; then write_lobj=\'$2\' else write_lobj=none fi if test yes = "$build_old_libs"; then write_oldobj=\'$3\' else write_oldobj=none fi $opt_dry_run || { cat >${write_libobj}T </dev/null` if test "$?" -eq 0 && test -n "$func_convert_core_file_wine_to_w32_tmp"; then func_convert_core_file_wine_to_w32_result=`$ECHO "$func_convert_core_file_wine_to_w32_tmp" | $SED -e "$sed_naive_backslashify"` else func_convert_core_file_wine_to_w32_result= fi fi } # end: func_convert_core_file_wine_to_w32 # func_convert_core_path_wine_to_w32 ARG # Helper function used by path conversion functions when $build is *nix, and # $host is mingw, cygwin, or some other w32 environment. Relies on a correctly # configured wine environment available, with the winepath program in $build's # $PATH. Assumes ARG has no leading or trailing path separator characters. # # ARG is path to be converted from $build format to win32. # Result is available in $func_convert_core_path_wine_to_w32_result. # Unconvertible file (directory) names in ARG are skipped; if no directory names # are convertible, then the result may be empty. func_convert_core_path_wine_to_w32 () { $debug_cmd # unfortunately, winepath doesn't convert paths, only file names func_convert_core_path_wine_to_w32_result= if test -n "$1"; then oldIFS=$IFS IFS=: for func_convert_core_path_wine_to_w32_f in $1; do IFS=$oldIFS func_convert_core_file_wine_to_w32 "$func_convert_core_path_wine_to_w32_f" if test -n "$func_convert_core_file_wine_to_w32_result"; then if test -z "$func_convert_core_path_wine_to_w32_result"; then func_convert_core_path_wine_to_w32_result=$func_convert_core_file_wine_to_w32_result else func_append func_convert_core_path_wine_to_w32_result ";$func_convert_core_file_wine_to_w32_result" fi fi done IFS=$oldIFS fi } # end: func_convert_core_path_wine_to_w32 # func_cygpath ARGS... # Wrapper around calling the cygpath program via LT_CYGPATH. This is used when # when (1) $build is *nix and Cygwin is hosted via a wine environment; or (2) # $build is MSYS and $host is Cygwin, or (3) $build is Cygwin. In case (1) or # (2), returns the Cygwin file name or path in func_cygpath_result (input # file name or path is assumed to be in w32 format, as previously converted # from $build's *nix or MSYS format). In case (3), returns the w32 file name # or path in func_cygpath_result (input file name or path is assumed to be in # Cygwin format). Returns an empty string on error. # # ARGS are passed to cygpath, with the last one being the file name or path to # be converted. # # Specify the absolute *nix (or w32) name to cygpath in the LT_CYGPATH # environment variable; do not put it in $PATH. func_cygpath () { $debug_cmd if test -n "$LT_CYGPATH" && test -f "$LT_CYGPATH"; then func_cygpath_result=`$LT_CYGPATH "$@" 2>/dev/null` if test "$?" -ne 0; then # on failure, ensure result is empty func_cygpath_result= fi else func_cygpath_result= func_error "LT_CYGPATH is empty or specifies non-existent file: '$LT_CYGPATH'" fi } #end: func_cygpath # func_convert_core_msys_to_w32 ARG # Convert file name or path ARG from MSYS format to w32 format. Return # result in func_convert_core_msys_to_w32_result. func_convert_core_msys_to_w32 () { $debug_cmd # awkward: cmd appends spaces to result func_convert_core_msys_to_w32_result=`( cmd //c echo "$1" ) 2>/dev/null | $SED -e 's/[ ]*$//' -e "$sed_naive_backslashify"` } #end: func_convert_core_msys_to_w32 # func_convert_file_check ARG1 ARG2 # Verify that ARG1 (a file name in $build format) was converted to $host # format in ARG2. Otherwise, emit an error message, but continue (resetting # func_to_host_file_result to ARG1). func_convert_file_check () { $debug_cmd if test -z "$2" && test -n "$1"; then func_error "Could not determine host file name corresponding to" func_error " '$1'" func_error "Continuing, but uninstalled executables may not work." # Fallback: func_to_host_file_result=$1 fi } # end func_convert_file_check # func_convert_path_check FROM_PATHSEP TO_PATHSEP FROM_PATH TO_PATH # Verify that FROM_PATH (a path in $build format) was converted to $host # format in TO_PATH. Otherwise, emit an error message, but continue, resetting # func_to_host_file_result to a simplistic fallback value (see below). func_convert_path_check () { $debug_cmd if test -z "$4" && test -n "$3"; then func_error "Could not determine the host path corresponding to" func_error " '$3'" func_error "Continuing, but uninstalled executables may not work." # Fallback. This is a deliberately simplistic "conversion" and # should not be "improved". See libtool.info. if test "x$1" != "x$2"; then lt_replace_pathsep_chars="s|$1|$2|g" func_to_host_path_result=`echo "$3" | $SED -e "$lt_replace_pathsep_chars"` else func_to_host_path_result=$3 fi fi } # end func_convert_path_check # func_convert_path_front_back_pathsep FRONTPAT BACKPAT REPL ORIG # Modifies func_to_host_path_result by prepending REPL if ORIG matches FRONTPAT # and appending REPL if ORIG matches BACKPAT. func_convert_path_front_back_pathsep () { $debug_cmd case $4 in $1 ) func_to_host_path_result=$3$func_to_host_path_result ;; esac case $4 in $2 ) func_append func_to_host_path_result "$3" ;; esac } # end func_convert_path_front_back_pathsep ################################################## # $build to $host FILE NAME CONVERSION FUNCTIONS # ################################################## # invoked via '$to_host_file_cmd ARG' # # In each case, ARG is the path to be converted from $build to $host format. # Result will be available in $func_to_host_file_result. # func_to_host_file ARG # Converts the file name ARG from $build format to $host format. Return result # in func_to_host_file_result. func_to_host_file () { $debug_cmd $to_host_file_cmd "$1" } # end func_to_host_file # func_to_tool_file ARG LAZY # converts the file name ARG from $build format to toolchain format. Return # result in func_to_tool_file_result. If the conversion in use is listed # in (the comma separated) LAZY, no conversion takes place. func_to_tool_file () { $debug_cmd case ,$2, in *,"$to_tool_file_cmd",*) func_to_tool_file_result=$1 ;; *) $to_tool_file_cmd "$1" func_to_tool_file_result=$func_to_host_file_result ;; esac } # end func_to_tool_file # func_convert_file_noop ARG # Copy ARG to func_to_host_file_result. func_convert_file_noop () { func_to_host_file_result=$1 } # end func_convert_file_noop # func_convert_file_msys_to_w32 ARG # Convert file name ARG from (mingw) MSYS to (mingw) w32 format; automatic # conversion to w32 is not available inside the cwrapper. Returns result in # func_to_host_file_result. func_convert_file_msys_to_w32 () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then func_convert_core_msys_to_w32 "$1" func_to_host_file_result=$func_convert_core_msys_to_w32_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_msys_to_w32 # func_convert_file_cygwin_to_w32 ARG # Convert file name ARG from Cygwin to w32 format. Returns result in # func_to_host_file_result. func_convert_file_cygwin_to_w32 () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then # because $build is cygwin, we call "the" cygpath in $PATH; no need to use # LT_CYGPATH in this case. func_to_host_file_result=`cygpath -m "$1"` fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_cygwin_to_w32 # func_convert_file_nix_to_w32 ARG # Convert file name ARG from *nix to w32 format. Requires a wine environment # and a working winepath. Returns result in func_to_host_file_result. func_convert_file_nix_to_w32 () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then func_convert_core_file_wine_to_w32 "$1" func_to_host_file_result=$func_convert_core_file_wine_to_w32_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_nix_to_w32 # func_convert_file_msys_to_cygwin ARG # Convert file name ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. # Returns result in func_to_host_file_result. func_convert_file_msys_to_cygwin () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then func_convert_core_msys_to_w32 "$1" func_cygpath -u "$func_convert_core_msys_to_w32_result" func_to_host_file_result=$func_cygpath_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_msys_to_cygwin # func_convert_file_nix_to_cygwin ARG # Convert file name ARG from *nix to Cygwin format. Requires Cygwin installed # in a wine environment, working winepath, and LT_CYGPATH set. Returns result # in func_to_host_file_result. func_convert_file_nix_to_cygwin () { $debug_cmd func_to_host_file_result=$1 if test -n "$1"; then # convert from *nix to w32, then use cygpath to convert from w32 to cygwin. func_convert_core_file_wine_to_w32 "$1" func_cygpath -u "$func_convert_core_file_wine_to_w32_result" func_to_host_file_result=$func_cygpath_result fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_nix_to_cygwin ############################################# # $build to $host PATH CONVERSION FUNCTIONS # ############################################# # invoked via '$to_host_path_cmd ARG' # # In each case, ARG is the path to be converted from $build to $host format. # The result will be available in $func_to_host_path_result. # # Path separators are also converted from $build format to $host format. If # ARG begins or ends with a path separator character, it is preserved (but # converted to $host format) on output. # # All path conversion functions are named using the following convention: # file name conversion function : func_convert_file_X_to_Y () # path conversion function : func_convert_path_X_to_Y () # where, for any given $build/$host combination the 'X_to_Y' value is the # same. If conversion functions are added for new $build/$host combinations, # the two new functions must follow this pattern, or func_init_to_host_path_cmd # will break. # func_init_to_host_path_cmd # Ensures that function "pointer" variable $to_host_path_cmd is set to the # appropriate value, based on the value of $to_host_file_cmd. to_host_path_cmd= func_init_to_host_path_cmd () { $debug_cmd if test -z "$to_host_path_cmd"; then func_stripname 'func_convert_file_' '' "$to_host_file_cmd" to_host_path_cmd=func_convert_path_$func_stripname_result fi } # func_to_host_path ARG # Converts the path ARG from $build format to $host format. Return result # in func_to_host_path_result. func_to_host_path () { $debug_cmd func_init_to_host_path_cmd $to_host_path_cmd "$1" } # end func_to_host_path # func_convert_path_noop ARG # Copy ARG to func_to_host_path_result. func_convert_path_noop () { func_to_host_path_result=$1 } # end func_convert_path_noop # func_convert_path_msys_to_w32 ARG # Convert path ARG from (mingw) MSYS to (mingw) w32 format; automatic # conversion to w32 is not available inside the cwrapper. Returns result in # func_to_host_path_result. func_convert_path_msys_to_w32 () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # Remove leading and trailing path separator characters from ARG. MSYS # behavior is inconsistent here; cygpath turns them into '.;' and ';.'; # and winepath ignores them completely. func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" func_to_host_path_result=$func_convert_core_msys_to_w32_result func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_msys_to_w32 # func_convert_path_cygwin_to_w32 ARG # Convert path ARG from Cygwin to w32 format. Returns result in # func_to_host_file_result. func_convert_path_cygwin_to_w32 () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_to_host_path_result=`cygpath -m -p "$func_to_host_path_tmp1"` func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_cygwin_to_w32 # func_convert_path_nix_to_w32 ARG # Convert path ARG from *nix to w32 format. Requires a wine environment and # a working winepath. Returns result in func_to_host_file_result. func_convert_path_nix_to_w32 () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" func_to_host_path_result=$func_convert_core_path_wine_to_w32_result func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_nix_to_w32 # func_convert_path_msys_to_cygwin ARG # Convert path ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. # Returns result in func_to_host_file_result. func_convert_path_msys_to_cygwin () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" func_cygpath -u -p "$func_convert_core_msys_to_w32_result" func_to_host_path_result=$func_cygpath_result func_convert_path_check : : \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" : "$1" fi } # end func_convert_path_msys_to_cygwin # func_convert_path_nix_to_cygwin ARG # Convert path ARG from *nix to Cygwin format. Requires Cygwin installed in a # a wine environment, working winepath, and LT_CYGPATH set. Returns result in # func_to_host_file_result. func_convert_path_nix_to_cygwin () { $debug_cmd func_to_host_path_result=$1 if test -n "$1"; then # Remove leading and trailing path separator characters from # ARG. msys behavior is inconsistent here, cygpath turns them # into '.;' and ';.', and winepath ignores them completely. func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" func_cygpath -u -p "$func_convert_core_path_wine_to_w32_result" func_to_host_path_result=$func_cygpath_result func_convert_path_check : : \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" : "$1" fi } # end func_convert_path_nix_to_cygwin # func_dll_def_p FILE # True iff FILE is a Windows DLL '.def' file. # Keep in sync with _LT_DLL_DEF_P in libtool.m4 func_dll_def_p () { $debug_cmd func_dll_def_p_tmp=`$SED -n \ -e 's/^[ ]*//' \ -e '/^\(;.*\)*$/d' \ -e 's/^\(EXPORTS\|LIBRARY\)\([ ].*\)*$/DEF/p' \ -e q \ "$1"` test DEF = "$func_dll_def_p_tmp" } # func_mode_compile arg... func_mode_compile () { $debug_cmd # Get the compilation command and the source file. base_compile= srcfile=$nonopt # always keep a non-empty value in "srcfile" suppress_opt=yes suppress_output= arg_mode=normal libobj= later= pie_flag= for arg do case $arg_mode in arg ) # do not "continue". Instead, add this to base_compile lastarg=$arg arg_mode=normal ;; target ) libobj=$arg arg_mode=normal continue ;; normal ) # Accept any command-line options. case $arg in -o) test -n "$libobj" && \ func_fatal_error "you cannot specify '-o' more than once" arg_mode=target continue ;; -pie | -fpie | -fPIE) func_append pie_flag " $arg" continue ;; -shared | -static | -prefer-pic | -prefer-non-pic) func_append later " $arg" continue ;; -no-suppress) suppress_opt=no continue ;; -Xcompiler) arg_mode=arg # the next one goes into the "base_compile" arg list continue # The current "srcfile" will either be retained or ;; # replaced later. I would guess that would be a bug. -Wc,*) func_stripname '-Wc,' '' "$arg" args=$func_stripname_result lastarg= save_ifs=$IFS; IFS=, for arg in $args; do IFS=$save_ifs func_append_quoted lastarg "$arg" done IFS=$save_ifs func_stripname ' ' '' "$lastarg" lastarg=$func_stripname_result # Add the arguments to base_compile. func_append base_compile " $lastarg" continue ;; *) # Accept the current argument as the source file. # The previous "srcfile" becomes the current argument. # lastarg=$srcfile srcfile=$arg ;; esac # case $arg ;; esac # case $arg_mode # Aesthetically quote the previous argument. func_append_quoted base_compile "$lastarg" done # for arg case $arg_mode in arg) func_fatal_error "you must specify an argument for -Xcompile" ;; target) func_fatal_error "you must specify a target with '-o'" ;; *) # Get the name of the library object. test -z "$libobj" && { func_basename "$srcfile" libobj=$func_basename_result } ;; esac # Recognize several different file suffixes. # If the user specifies -o file.o, it is replaced with file.lo case $libobj in *.[cCFSifmso] | \ *.ada | *.adb | *.ads | *.asm | \ *.c++ | *.cc | *.ii | *.class | *.cpp | *.cxx | \ *.[fF][09]? | *.for | *.java | *.go | *.obj | *.sx | *.cu | *.cup) func_xform "$libobj" libobj=$func_xform_result ;; esac case $libobj in *.lo) func_lo2o "$libobj"; obj=$func_lo2o_result ;; *) func_fatal_error "cannot determine name of library object from '$libobj'" ;; esac func_infer_tag $base_compile for arg in $later; do case $arg in -shared) test yes = "$build_libtool_libs" \ || func_fatal_configuration "cannot build a shared library" build_old_libs=no continue ;; -static) build_libtool_libs=no build_old_libs=yes continue ;; -prefer-pic) pic_mode=yes continue ;; -prefer-non-pic) pic_mode=no continue ;; esac done func_quote_for_eval "$libobj" test "X$libobj" != "X$func_quote_for_eval_result" \ && $ECHO "X$libobj" | $GREP '[]~#^*{};<>?"'"'"' &()|`$[]' \ && func_warning "libobj name '$libobj' may not contain shell special characters." func_dirname_and_basename "$obj" "/" "" objname=$func_basename_result xdir=$func_dirname_result lobj=$xdir$objdir/$objname test -z "$base_compile" && \ func_fatal_help "you must specify a compilation command" # Delete any leftover library objects. if test yes = "$build_old_libs"; then removelist="$obj $lobj $libobj ${libobj}T" else removelist="$lobj $libobj ${libobj}T" fi # On Cygwin there's no "real" PIC flag so we must build both object types case $host_os in cygwin* | mingw* | pw32* | os2* | cegcc*) pic_mode=default ;; esac if test no = "$pic_mode" && test pass_all != "$deplibs_check_method"; then # non-PIC code in shared libraries is not supported pic_mode=default fi # Calculate the filename of the output object if compiler does # not support -o with -c if test no = "$compiler_c_o"; then output_obj=`$ECHO "$srcfile" | $SED 's%^.*/%%; s%\.[^.]*$%%'`.$objext lockfile=$output_obj.lock else output_obj= need_locks=no lockfile= fi # Lock this critical section if it is needed # We use this script file to make the link, it avoids creating a new file if test yes = "$need_locks"; then until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do func_echo "Waiting for $lockfile to be removed" sleep 2 done elif test warn = "$need_locks"; then if test -f "$lockfile"; then $ECHO "\ *** ERROR, $lockfile exists and contains: `cat $lockfile 2>/dev/null` This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support '-c' and '-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi func_append removelist " $output_obj" $ECHO "$srcfile" > "$lockfile" fi $opt_dry_run || $RM $removelist func_append removelist " $lockfile" trap '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' 1 2 15 func_to_tool_file "$srcfile" func_convert_file_msys_to_w32 srcfile=$func_to_tool_file_result func_quote_for_eval "$srcfile" qsrcfile=$func_quote_for_eval_result # Only build a PIC object if we are building libtool libraries. if test yes = "$build_libtool_libs"; then # Without this assignment, base_compile gets emptied. fbsd_hideous_sh_bug=$base_compile if test no != "$pic_mode"; then command="$base_compile $qsrcfile $pic_flag" else # Don't build PIC code command="$base_compile $qsrcfile" fi func_mkdir_p "$xdir$objdir" if test -z "$output_obj"; then # Place PIC objects in $objdir func_append command " -o $lobj" fi func_show_eval_locale "$command" \ 'test -n "$output_obj" && $RM $removelist; exit $EXIT_FAILURE' if test warn = "$need_locks" && test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then $ECHO "\ *** ERROR, $lockfile contains: `cat $lockfile 2>/dev/null` but it should contain: $srcfile This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support '-c' and '-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi # Just move the object if needed, then go on to compile the next one if test -n "$output_obj" && test "X$output_obj" != "X$lobj"; then func_show_eval '$MV "$output_obj" "$lobj"' \ 'error=$?; $opt_dry_run || $RM $removelist; exit $error' fi # Allow error messages only from the first compilation. if test yes = "$suppress_opt"; then suppress_output=' >/dev/null 2>&1' fi fi # Only build a position-dependent object if we build old libraries. if test yes = "$build_old_libs"; then if test yes != "$pic_mode"; then # Don't build PIC code command="$base_compile $qsrcfile$pie_flag" else command="$base_compile $qsrcfile $pic_flag" fi if test yes = "$compiler_c_o"; then func_append command " -o $obj" fi # Suppress compiler output if we already did a PIC compilation. func_append command "$suppress_output" func_show_eval_locale "$command" \ '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' if test warn = "$need_locks" && test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then $ECHO "\ *** ERROR, $lockfile contains: `cat $lockfile 2>/dev/null` but it should contain: $srcfile This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support '-c' and '-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi # Just move the object if needed if test -n "$output_obj" && test "X$output_obj" != "X$obj"; then func_show_eval '$MV "$output_obj" "$obj"' \ 'error=$?; $opt_dry_run || $RM $removelist; exit $error' fi fi $opt_dry_run || { func_write_libtool_object "$libobj" "$objdir/$objname" "$objname" # Unlock the critical section if it was locked if test no != "$need_locks"; then removelist=$lockfile $RM "$lockfile" fi } exit $EXIT_SUCCESS } $opt_help || { test compile = "$opt_mode" && func_mode_compile ${1+"$@"} } func_mode_help () { # We need to display help for each of the modes. case $opt_mode in "") # Generic help is extracted from the usage comments # at the start of this file. func_help ;; clean) $ECHO \ "Usage: $progname [OPTION]... --mode=clean RM [RM-OPTION]... FILE... Remove files from the build directory. RM is the name of the program to use to delete files associated with each FILE (typically '/bin/rm'). RM-OPTIONS are options (such as '-f') to be passed to RM. If FILE is a libtool library, object or program, all the files associated with it are deleted. Otherwise, only FILE itself is deleted using RM." ;; compile) $ECHO \ "Usage: $progname [OPTION]... --mode=compile COMPILE-COMMAND... SOURCEFILE Compile a source file into a libtool library object. This mode accepts the following additional options: -o OUTPUT-FILE set the output file name to OUTPUT-FILE -no-suppress do not suppress compiler output for multiple passes -prefer-pic try to build PIC objects only -prefer-non-pic try to build non-PIC objects only -shared do not build a '.o' file suitable for static linking -static only build a '.o' file suitable for static linking -Wc,FLAG pass FLAG directly to the compiler COMPILE-COMMAND is a command to be used in creating a 'standard' object file from the given SOURCEFILE. The output file name is determined by removing the directory component from SOURCEFILE, then substituting the C source code suffix '.c' with the library object suffix, '.lo'." ;; execute) $ECHO \ "Usage: $progname [OPTION]... --mode=execute COMMAND [ARGS]... Automatically set library path, then run a program. This mode accepts the following additional options: -dlopen FILE add the directory containing FILE to the library path This mode sets the library path environment variable according to '-dlopen' flags. If any of the ARGS are libtool executable wrappers, then they are translated into their corresponding uninstalled binary, and any of their required library directories are added to the library path. Then, COMMAND is executed, with ARGS as arguments." ;; finish) $ECHO \ "Usage: $progname [OPTION]... --mode=finish [LIBDIR]... Complete the installation of libtool libraries. Each LIBDIR is a directory that contains libtool libraries. The commands that this mode executes may require superuser privileges. Use the '--dry-run' option if you just want to see what would be executed." ;; install) $ECHO \ "Usage: $progname [OPTION]... --mode=install INSTALL-COMMAND... Install executables or libraries. INSTALL-COMMAND is the installation command. The first component should be either the 'install' or 'cp' program. The following components of INSTALL-COMMAND are treated specially: -inst-prefix-dir PREFIX-DIR Use PREFIX-DIR as a staging area for installation The rest of the components are interpreted as arguments to that command (only BSD-compatible install options are recognized)." ;; link) $ECHO \ "Usage: $progname [OPTION]... --mode=link LINK-COMMAND... Link object files or libraries together to form another library, or to create an executable program. LINK-COMMAND is a command using the C compiler that you would use to create a program from several object files. The following components of LINK-COMMAND are treated specially: -all-static do not do any dynamic linking at all -avoid-version do not add a version suffix if possible -bindir BINDIR specify path to binaries directory (for systems where libraries must be found in the PATH setting at runtime) -dlopen FILE '-dlpreopen' FILE if it cannot be dlopened at runtime -dlpreopen FILE link in FILE and add its symbols to lt_preloaded_symbols -export-dynamic allow symbols from OUTPUT-FILE to be resolved with dlsym(3) -export-symbols SYMFILE try to export only the symbols listed in SYMFILE -export-symbols-regex REGEX try to export only the symbols matching REGEX -LLIBDIR search LIBDIR for required installed libraries -lNAME OUTPUT-FILE requires the installed library libNAME -module build a library that can dlopened -no-fast-install disable the fast-install mode -no-install link a not-installable executable -no-undefined declare that a library does not refer to external symbols -o OUTPUT-FILE create OUTPUT-FILE from the specified objects -objectlist FILE use a list of object files found in FILE to specify objects -os2dllname NAME force a short DLL name on OS/2 (no effect on other OSes) -precious-files-regex REGEX don't remove output files matching REGEX -release RELEASE specify package release information -rpath LIBDIR the created library will eventually be installed in LIBDIR -R[ ]LIBDIR add LIBDIR to the runtime path of programs and libraries -shared only do dynamic linking of libtool libraries -shrext SUFFIX override the standard shared library file extension -static do not do any dynamic linking of uninstalled libtool libraries -static-libtool-libs do not do any dynamic linking of libtool libraries -version-info CURRENT[:REVISION[:AGE]] specify library version info [each variable defaults to 0] -weak LIBNAME declare that the target provides the LIBNAME interface -Wc,FLAG -Xcompiler FLAG pass linker-specific FLAG directly to the compiler -Wl,FLAG -Xlinker FLAG pass linker-specific FLAG directly to the linker -XCClinker FLAG pass link-specific FLAG to the compiler driver (CC) All other options (arguments beginning with '-') are ignored. Every other argument is treated as a filename. Files ending in '.la' are treated as uninstalled libtool libraries, other files are standard or library object files. If the OUTPUT-FILE ends in '.la', then a libtool library is created, only library objects ('.lo' files) may be specified, and '-rpath' is required, except when creating a convenience library. If OUTPUT-FILE ends in '.a' or '.lib', then a standard library is created using 'ar' and 'ranlib', or on Windows using 'lib'. If OUTPUT-FILE ends in '.lo' or '.$objext', then a reloadable object file is created, otherwise an executable program is created." ;; uninstall) $ECHO \ "Usage: $progname [OPTION]... --mode=uninstall RM [RM-OPTION]... FILE... Remove libraries from an installation directory. RM is the name of the program to use to delete files associated with each FILE (typically '/bin/rm'). RM-OPTIONS are options (such as '-f') to be passed to RM. If FILE is a libtool library, all the files associated with it are deleted. Otherwise, only FILE itself is deleted using RM." ;; *) func_fatal_help "invalid operation mode '$opt_mode'" ;; esac echo $ECHO "Try '$progname --help' for more information about other modes." } # Now that we've collected a possible --mode arg, show help if necessary if $opt_help; then if test : = "$opt_help"; then func_mode_help else { func_help noexit for opt_mode in compile link execute install finish uninstall clean; do func_mode_help done } | $SED -n '1p; 2,$s/^Usage:/ or: /p' { func_help noexit for opt_mode in compile link execute install finish uninstall clean; do echo func_mode_help done } | $SED '1d /^When reporting/,/^Report/{ H d } $x /information about other modes/d /more detailed .*MODE/d s/^Usage:.*--mode=\([^ ]*\) .*/Description of \1 mode:/' fi exit $? fi # func_mode_execute arg... func_mode_execute () { $debug_cmd # The first argument is the command name. cmd=$nonopt test -z "$cmd" && \ func_fatal_help "you must specify a COMMAND" # Handle -dlopen flags immediately. for file in $opt_dlopen; do test -f "$file" \ || func_fatal_help "'$file' is not a file" dir= case $file in *.la) func_resolve_sysroot "$file" file=$func_resolve_sysroot_result # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$file" \ || func_fatal_help "'$lib' is not a valid libtool archive" # Read the libtool library. dlname= library_names= func_source "$file" # Skip this library if it cannot be dlopened. if test -z "$dlname"; then # Warn if it was a shared library. test -n "$library_names" && \ func_warning "'$file' was not linked with '-export-dynamic'" continue fi func_dirname "$file" "" "." dir=$func_dirname_result if test -f "$dir/$objdir/$dlname"; then func_append dir "/$objdir" else if test ! -f "$dir/$dlname"; then func_fatal_error "cannot find '$dlname' in '$dir' or '$dir/$objdir'" fi fi ;; *.lo) # Just add the directory containing the .lo file. func_dirname "$file" "" "." dir=$func_dirname_result ;; *) func_warning "'-dlopen' is ignored for non-libtool libraries and objects" continue ;; esac # Get the absolute pathname. absdir=`cd "$dir" && pwd` test -n "$absdir" && dir=$absdir # Now add the directory to shlibpath_var. if eval "test -z \"\$$shlibpath_var\""; then eval "$shlibpath_var=\"\$dir\"" else eval "$shlibpath_var=\"\$dir:\$$shlibpath_var\"" fi done # This variable tells wrapper scripts just to set shlibpath_var # rather than running their programs. libtool_execute_magic=$magic # Check if any of the arguments is a wrapper script. args= for file do case $file in -* | *.la | *.lo ) ;; *) # Do a test to see if this is really a libtool program. if func_ltwrapper_script_p "$file"; then func_source "$file" # Transform arg to wrapped name. file=$progdir/$program elif func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" func_source "$func_ltwrapper_scriptname_result" # Transform arg to wrapped name. file=$progdir/$program fi ;; esac # Quote arguments (to preserve shell metacharacters). func_append_quoted args "$file" done if $opt_dry_run; then # Display what would be done. if test -n "$shlibpath_var"; then eval "\$ECHO \"\$shlibpath_var=\$$shlibpath_var\"" echo "export $shlibpath_var" fi $ECHO "$cmd$args" exit $EXIT_SUCCESS else if test -n "$shlibpath_var"; then # Export the shlibpath_var. eval "export $shlibpath_var" fi # Restore saved environment variables for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES do eval "if test \"\${save_$lt_var+set}\" = set; then $lt_var=\$save_$lt_var; export $lt_var else $lt_unset $lt_var fi" done # Now prepare to actually exec the command. exec_cmd=\$cmd$args fi } test execute = "$opt_mode" && func_mode_execute ${1+"$@"} # func_mode_finish arg... func_mode_finish () { $debug_cmd libs= libdirs= admincmds= for opt in "$nonopt" ${1+"$@"} do if test -d "$opt"; then func_append libdirs " $opt" elif test -f "$opt"; then if func_lalib_unsafe_p "$opt"; then func_append libs " $opt" else func_warning "'$opt' is not a valid libtool archive" fi else func_fatal_error "invalid argument '$opt'" fi done if test -n "$libs"; then if test -n "$lt_sysroot"; then sysroot_regex=`$ECHO "$lt_sysroot" | $SED "$sed_make_literal_regex"` sysroot_cmd="s/\([ ']\)$sysroot_regex/\1/g;" else sysroot_cmd= fi # Remove sysroot references if $opt_dry_run; then for lib in $libs; do echo "removing references to $lt_sysroot and '=' prefixes from $lib" done else tmpdir=`func_mktempdir` for lib in $libs; do $SED -e "$sysroot_cmd s/\([ ']-[LR]\)=/\1/g; s/\([ ']\)=/\1/g" $lib \ > $tmpdir/tmp-la mv -f $tmpdir/tmp-la $lib done ${RM}r "$tmpdir" fi fi if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then for libdir in $libdirs; do if test -n "$finish_cmds"; then # Do each command in the finish commands. func_execute_cmds "$finish_cmds" 'admincmds="$admincmds '"$cmd"'"' fi if test -n "$finish_eval"; then # Do the single finish_eval. eval cmds=\"$finish_eval\" $opt_dry_run || eval "$cmds" || func_append admincmds " $cmds" fi done fi # Exit here if they wanted silent mode. $opt_quiet && exit $EXIT_SUCCESS if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then echo "----------------------------------------------------------------------" echo "Libraries have been installed in:" for libdir in $libdirs; do $ECHO " $libdir" done echo echo "If you ever happen to want to link against installed libraries" echo "in a given directory, LIBDIR, you must either use libtool, and" echo "specify the full pathname of the library, or use the '-LLIBDIR'" echo "flag during linking and do at least one of the following:" if test -n "$shlibpath_var"; then echo " - add LIBDIR to the '$shlibpath_var' environment variable" echo " during execution" fi if test -n "$runpath_var"; then echo " - add LIBDIR to the '$runpath_var' environment variable" echo " during linking" fi if test -n "$hardcode_libdir_flag_spec"; then libdir=LIBDIR eval flag=\"$hardcode_libdir_flag_spec\" $ECHO " - use the '$flag' linker flag" fi if test -n "$admincmds"; then $ECHO " - have your system administrator run these commands:$admincmds" fi if test -f /etc/ld.so.conf; then echo " - have your system administrator add LIBDIR to '/etc/ld.so.conf'" fi echo echo "See any operating system documentation about shared libraries for" case $host in solaris2.[6789]|solaris2.1[0-9]) echo "more information, such as the ld(1), crle(1) and ld.so(8) manual" echo "pages." ;; *) echo "more information, such as the ld(1) and ld.so(8) manual pages." ;; esac echo "----------------------------------------------------------------------" fi exit $EXIT_SUCCESS } test finish = "$opt_mode" && func_mode_finish ${1+"$@"} # func_mode_install arg... func_mode_install () { $debug_cmd # There may be an optional sh(1) argument at the beginning of # install_prog (especially on Windows NT). if test "$SHELL" = "$nonopt" || test /bin/sh = "$nonopt" || # Allow the use of GNU shtool's install command. case $nonopt in *shtool*) :;; *) false;; esac then # Aesthetically quote it. func_quote_for_eval "$nonopt" install_prog="$func_quote_for_eval_result " arg=$1 shift else install_prog= arg=$nonopt fi # The real first argument should be the name of the installation program. # Aesthetically quote it. func_quote_for_eval "$arg" func_append install_prog "$func_quote_for_eval_result" install_shared_prog=$install_prog case " $install_prog " in *[\\\ /]cp\ *) install_cp=: ;; *) install_cp=false ;; esac # We need to accept at least all the BSD install flags. dest= files= opts= prev= install_type= isdir=false stripme= no_mode=: for arg do arg2= if test -n "$dest"; then func_append files " $dest" dest=$arg continue fi case $arg in -d) isdir=: ;; -f) if $install_cp; then :; else prev=$arg fi ;; -g | -m | -o) prev=$arg ;; -s) stripme=" -s" continue ;; -*) ;; *) # If the previous option needed an argument, then skip it. if test -n "$prev"; then if test X-m = "X$prev" && test -n "$install_override_mode"; then arg2=$install_override_mode no_mode=false fi prev= else dest=$arg continue fi ;; esac # Aesthetically quote the argument. func_quote_for_eval "$arg" func_append install_prog " $func_quote_for_eval_result" if test -n "$arg2"; then func_quote_for_eval "$arg2" fi func_append install_shared_prog " $func_quote_for_eval_result" done test -z "$install_prog" && \ func_fatal_help "you must specify an install program" test -n "$prev" && \ func_fatal_help "the '$prev' option requires an argument" if test -n "$install_override_mode" && $no_mode; then if $install_cp; then :; else func_quote_for_eval "$install_override_mode" func_append install_shared_prog " -m $func_quote_for_eval_result" fi fi if test -z "$files"; then if test -z "$dest"; then func_fatal_help "no file or destination specified" else func_fatal_help "you must specify a destination" fi fi # Strip any trailing slash from the destination. func_stripname '' '/' "$dest" dest=$func_stripname_result # Check to see that the destination is a directory. test -d "$dest" && isdir=: if $isdir; then destdir=$dest destname= else func_dirname_and_basename "$dest" "" "." destdir=$func_dirname_result destname=$func_basename_result # Not a directory, so check to see that there is only one file specified. set dummy $files; shift test "$#" -gt 1 && \ func_fatal_help "'$dest' is not a directory" fi case $destdir in [\\/]* | [A-Za-z]:[\\/]*) ;; *) for file in $files; do case $file in *.lo) ;; *) func_fatal_help "'$destdir' must be an absolute directory name" ;; esac done ;; esac # This variable tells wrapper scripts just to set variables rather # than running their programs. libtool_install_magic=$magic staticlibs= future_libdirs= current_libdirs= for file in $files; do # Do each installation. case $file in *.$libext) # Do the static libraries later. func_append staticlibs " $file" ;; *.la) func_resolve_sysroot "$file" file=$func_resolve_sysroot_result # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$file" \ || func_fatal_help "'$file' is not a valid libtool archive" library_names= old_library= relink_command= func_source "$file" # Add the libdir to current_libdirs if it is the destination. if test "X$destdir" = "X$libdir"; then case "$current_libdirs " in *" $libdir "*) ;; *) func_append current_libdirs " $libdir" ;; esac else # Note the libdir as a future libdir. case "$future_libdirs " in *" $libdir "*) ;; *) func_append future_libdirs " $libdir" ;; esac fi func_dirname "$file" "/" "" dir=$func_dirname_result func_append dir "$objdir" if test -n "$relink_command"; then # Determine the prefix the user has applied to our future dir. inst_prefix_dir=`$ECHO "$destdir" | $SED -e "s%$libdir\$%%"` # Don't allow the user to place us outside of our expected # location b/c this prevents finding dependent libraries that # are installed to the same prefix. # At present, this check doesn't affect windows .dll's that # are installed into $libdir/../bin (currently, that works fine) # but it's something to keep an eye on. test "$inst_prefix_dir" = "$destdir" && \ func_fatal_error "error: cannot install '$file' to a directory not ending in $libdir" if test -n "$inst_prefix_dir"; then # Stick the inst_prefix_dir data into the link command. relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"` else relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%%"` fi func_warning "relinking '$file'" func_show_eval "$relink_command" \ 'func_fatal_error "error: relink '\''$file'\'' with the above command before installing it"' fi # See the names of the shared library. set dummy $library_names; shift if test -n "$1"; then realname=$1 shift srcname=$realname test -n "$relink_command" && srcname=${realname}T # Install the shared library and build the symlinks. func_show_eval "$install_shared_prog $dir/$srcname $destdir/$realname" \ 'exit $?' tstripme=$stripme case $host_os in cygwin* | mingw* | pw32* | cegcc*) case $realname in *.dll.a) tstripme= ;; esac ;; os2*) case $realname in *_dll.a) tstripme= ;; esac ;; esac if test -n "$tstripme" && test -n "$striplib"; then func_show_eval "$striplib $destdir/$realname" 'exit $?' fi if test "$#" -gt 0; then # Delete the old symlinks, and create new ones. # Try 'ln -sf' first, because the 'ln' binary might depend on # the symlink we replace! Solaris /bin/ln does not understand -f, # so we also need to try rm && ln -s. for linkname do test "$linkname" != "$realname" \ && func_show_eval "(cd $destdir && { $LN_S -f $realname $linkname || { $RM $linkname && $LN_S $realname $linkname; }; })" done fi # Do each command in the postinstall commands. lib=$destdir/$realname func_execute_cmds "$postinstall_cmds" 'exit $?' fi # Install the pseudo-library for information purposes. func_basename "$file" name=$func_basename_result instname=$dir/${name}i func_show_eval "$install_prog $instname $destdir/$name" 'exit $?' # Maybe install the static library, too. test -n "$old_library" && func_append staticlibs " $dir/$old_library" ;; *.lo) # Install (i.e. copy) a libtool object. # Figure out destination file name, if it wasn't already specified. if test -n "$destname"; then destfile=$destdir/$destname else func_basename "$file" destfile=$func_basename_result destfile=$destdir/$destfile fi # Deduce the name of the destination old-style object file. case $destfile in *.lo) func_lo2o "$destfile" staticdest=$func_lo2o_result ;; *.$objext) staticdest=$destfile destfile= ;; *) func_fatal_help "cannot copy a libtool object to '$destfile'" ;; esac # Install the libtool object if requested. test -n "$destfile" && \ func_show_eval "$install_prog $file $destfile" 'exit $?' # Install the old object if enabled. if test yes = "$build_old_libs"; then # Deduce the name of the old-style object file. func_lo2o "$file" staticobj=$func_lo2o_result func_show_eval "$install_prog \$staticobj \$staticdest" 'exit $?' fi exit $EXIT_SUCCESS ;; *) # Figure out destination file name, if it wasn't already specified. if test -n "$destname"; then destfile=$destdir/$destname else func_basename "$file" destfile=$func_basename_result destfile=$destdir/$destfile fi # If the file is missing, and there is a .exe on the end, strip it # because it is most likely a libtool script we actually want to # install stripped_ext= case $file in *.exe) if test ! -f "$file"; then func_stripname '' '.exe' "$file" file=$func_stripname_result stripped_ext=.exe fi ;; esac # Do a test to see if this is really a libtool program. case $host in *cygwin* | *mingw*) if func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" wrapper=$func_ltwrapper_scriptname_result else func_stripname '' '.exe' "$file" wrapper=$func_stripname_result fi ;; *) wrapper=$file ;; esac if func_ltwrapper_script_p "$wrapper"; then notinst_deplibs= relink_command= func_source "$wrapper" # Check the variables that should have been set. test -z "$generated_by_libtool_version" && \ func_fatal_error "invalid libtool wrapper script '$wrapper'" finalize=: for lib in $notinst_deplibs; do # Check to see that each library is installed. libdir= if test -f "$lib"; then func_source "$lib" fi libfile=$libdir/`$ECHO "$lib" | $SED 's%^.*/%%g'` if test -n "$libdir" && test ! -f "$libfile"; then func_warning "'$lib' has not been installed in '$libdir'" finalize=false fi done relink_command= func_source "$wrapper" outputname= if test no = "$fast_install" && test -n "$relink_command"; then $opt_dry_run || { if $finalize; then tmpdir=`func_mktempdir` func_basename "$file$stripped_ext" file=$func_basename_result outputname=$tmpdir/$file # Replace the output file specification. relink_command=`$ECHO "$relink_command" | $SED 's%@OUTPUT@%'"$outputname"'%g'` $opt_quiet || { func_quote_for_expand "$relink_command" eval "func_echo $func_quote_for_expand_result" } if eval "$relink_command"; then : else func_error "error: relink '$file' with the above command before installing it" $opt_dry_run || ${RM}r "$tmpdir" continue fi file=$outputname else func_warning "cannot relink '$file'" fi } else # Install the binary that we compiled earlier. file=`$ECHO "$file$stripped_ext" | $SED "s%\([^/]*\)$%$objdir/\1%"` fi fi # remove .exe since cygwin /usr/bin/install will append another # one anyway case $install_prog,$host in */usr/bin/install*,*cygwin*) case $file:$destfile in *.exe:*.exe) # this is ok ;; *.exe:*) destfile=$destfile.exe ;; *:*.exe) func_stripname '' '.exe' "$destfile" destfile=$func_stripname_result ;; esac ;; esac func_show_eval "$install_prog\$stripme \$file \$destfile" 'exit $?' $opt_dry_run || if test -n "$outputname"; then ${RM}r "$tmpdir" fi ;; esac done for file in $staticlibs; do func_basename "$file" name=$func_basename_result # Set up the ranlib parameters. oldlib=$destdir/$name func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 tool_oldlib=$func_to_tool_file_result func_show_eval "$install_prog \$file \$oldlib" 'exit $?' if test -n "$stripme" && test -n "$old_striplib"; then func_show_eval "$old_striplib $tool_oldlib" 'exit $?' fi # Do each command in the postinstall commands. func_execute_cmds "$old_postinstall_cmds" 'exit $?' done test -n "$future_libdirs" && \ func_warning "remember to run '$progname --finish$future_libdirs'" if test -n "$current_libdirs"; then # Maybe just do a dry run. $opt_dry_run && current_libdirs=" -n$current_libdirs" exec_cmd='$SHELL "$progpath" $preserve_args --finish$current_libdirs' else exit $EXIT_SUCCESS fi } test install = "$opt_mode" && func_mode_install ${1+"$@"} # func_generate_dlsyms outputname originator pic_p # Extract symbols from dlprefiles and create ${outputname}S.o with # a dlpreopen symbol table. func_generate_dlsyms () { $debug_cmd my_outputname=$1 my_originator=$2 my_pic_p=${3-false} my_prefix=`$ECHO "$my_originator" | $SED 's%[^a-zA-Z0-9]%_%g'` my_dlsyms= if test -n "$dlfiles$dlprefiles" || test no != "$dlself"; then if test -n "$NM" && test -n "$global_symbol_pipe"; then my_dlsyms=${my_outputname}S.c else func_error "not configured to extract global symbols from dlpreopened files" fi fi if test -n "$my_dlsyms"; then case $my_dlsyms in "") ;; *.c) # Discover the nlist of each of the dlfiles. nlist=$output_objdir/$my_outputname.nm func_show_eval "$RM $nlist ${nlist}S ${nlist}T" # Parse the name list into a source file. func_verbose "creating $output_objdir/$my_dlsyms" $opt_dry_run || $ECHO > "$output_objdir/$my_dlsyms" "\ /* $my_dlsyms - symbol resolution table for '$my_outputname' dlsym emulation. */ /* Generated by $PROGRAM (GNU $PACKAGE) $VERSION */ #ifdef __cplusplus extern \"C\" { #endif #if defined __GNUC__ && (((__GNUC__ == 4) && (__GNUC_MINOR__ >= 4)) || (__GNUC__ > 4)) #pragma GCC diagnostic ignored \"-Wstrict-prototypes\" #endif /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif #define STREQ(s1, s2) (strcmp ((s1), (s2)) == 0) /* External symbol declarations for the compiler. */\ " if test yes = "$dlself"; then func_verbose "generating symbol list for '$output'" $opt_dry_run || echo ': @PROGRAM@ ' > "$nlist" # Add our own program objects to the symbol list. progfiles=`$ECHO "$objs$old_deplibs" | $SP2NL | $SED "$lo2o" | $NL2SP` for progfile in $progfiles; do func_to_tool_file "$progfile" func_convert_file_msys_to_w32 func_verbose "extracting global C symbols from '$func_to_tool_file_result'" $opt_dry_run || eval "$NM $func_to_tool_file_result | $global_symbol_pipe >> '$nlist'" done if test -n "$exclude_expsyms"; then $opt_dry_run || { eval '$EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' } fi if test -n "$export_symbols_regex"; then $opt_dry_run || { eval '$EGREP -e "$export_symbols_regex" "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' } fi # Prepare the list of exported symbols if test -z "$export_symbols"; then export_symbols=$output_objdir/$outputname.exp $opt_dry_run || { $RM $export_symbols eval "$SED -n -e '/^: @PROGRAM@ $/d' -e 's/^.* \(.*\)$/\1/p' "'< "$nlist" > "$export_symbols"' case $host in *cygwin* | *mingw* | *cegcc* ) eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' eval 'cat "$export_symbols" >> "$output_objdir/$outputname.def"' ;; esac } else $opt_dry_run || { eval "$SED -e 's/\([].[*^$]\)/\\\\\1/g' -e 's/^/ /' -e 's/$/$/'"' < "$export_symbols" > "$output_objdir/$outputname.exp"' eval '$GREP -f "$output_objdir/$outputname.exp" < "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' case $host in *cygwin* | *mingw* | *cegcc* ) eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' eval 'cat "$nlist" >> "$output_objdir/$outputname.def"' ;; esac } fi fi for dlprefile in $dlprefiles; do func_verbose "extracting global C symbols from '$dlprefile'" func_basename "$dlprefile" name=$func_basename_result case $host in *cygwin* | *mingw* | *cegcc* ) # if an import library, we need to obtain dlname if func_win32_import_lib_p "$dlprefile"; then func_tr_sh "$dlprefile" eval "curr_lafile=\$libfile_$func_tr_sh_result" dlprefile_dlbasename= if test -n "$curr_lafile" && func_lalib_p "$curr_lafile"; then # Use subshell, to avoid clobbering current variable values dlprefile_dlname=`source "$curr_lafile" && echo "$dlname"` if test -n "$dlprefile_dlname"; then func_basename "$dlprefile_dlname" dlprefile_dlbasename=$func_basename_result else # no lafile. user explicitly requested -dlpreopen . $sharedlib_from_linklib_cmd "$dlprefile" dlprefile_dlbasename=$sharedlib_from_linklib_result fi fi $opt_dry_run || { if test -n "$dlprefile_dlbasename"; then eval '$ECHO ": $dlprefile_dlbasename" >> "$nlist"' else func_warning "Could not compute DLL name from $name" eval '$ECHO ": $name " >> "$nlist"' fi func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe | $SED -e '/I __imp/d' -e 's/I __nm_/D /;s/_nm__//' >> '$nlist'" } else # not an import lib $opt_dry_run || { eval '$ECHO ": $name " >> "$nlist"' func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" } fi ;; *) $opt_dry_run || { eval '$ECHO ": $name " >> "$nlist"' func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" } ;; esac done $opt_dry_run || { # Make sure we have at least an empty file. test -f "$nlist" || : > "$nlist" if test -n "$exclude_expsyms"; then $EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T $MV "$nlist"T "$nlist" fi # Try sorting and uniquifying the output. if $GREP -v "^: " < "$nlist" | if sort -k 3 /dev/null 2>&1; then sort -k 3 else sort +2 fi | uniq > "$nlist"S; then : else $GREP -v "^: " < "$nlist" > "$nlist"S fi if test -f "$nlist"S; then eval "$global_symbol_to_cdecl"' < "$nlist"S >> "$output_objdir/$my_dlsyms"' else echo '/* NONE */' >> "$output_objdir/$my_dlsyms" fi func_show_eval '$RM "${nlist}I"' if test -n "$global_symbol_to_import"; then eval "$global_symbol_to_import"' < "$nlist"S > "$nlist"I' fi echo >> "$output_objdir/$my_dlsyms" "\ /* The mapping between symbol names and symbols. */ typedef struct { const char *name; void *address; } lt_dlsymlist; extern LT_DLSYM_CONST lt_dlsymlist lt_${my_prefix}_LTX_preloaded_symbols[];\ " if test -s "$nlist"I; then echo >> "$output_objdir/$my_dlsyms" "\ static void lt_syminit(void) { LT_DLSYM_CONST lt_dlsymlist *symbol = lt_${my_prefix}_LTX_preloaded_symbols; for (; symbol->name; ++symbol) {" $SED 's/.*/ if (STREQ (symbol->name, \"&\")) symbol->address = (void *) \&&;/' < "$nlist"I >> "$output_objdir/$my_dlsyms" echo >> "$output_objdir/$my_dlsyms" "\ } }" fi echo >> "$output_objdir/$my_dlsyms" "\ LT_DLSYM_CONST lt_dlsymlist lt_${my_prefix}_LTX_preloaded_symbols[] = { {\"$my_originator\", (void *) 0}," if test -s "$nlist"I; then echo >> "$output_objdir/$my_dlsyms" "\ {\"@INIT@\", (void *) <_syminit}," fi case $need_lib_prefix in no) eval "$global_symbol_to_c_name_address" < "$nlist" >> "$output_objdir/$my_dlsyms" ;; *) eval "$global_symbol_to_c_name_address_lib_prefix" < "$nlist" >> "$output_objdir/$my_dlsyms" ;; esac echo >> "$output_objdir/$my_dlsyms" "\ {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt_${my_prefix}_LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif\ " } # !$opt_dry_run pic_flag_for_symtable= case "$compile_command " in *" -static "*) ;; *) case $host in # compiling the symbol table file with pic_flag works around # a FreeBSD bug that causes programs to crash when -lm is # linked before any other PIC object. But we must not use # pic_flag when linking with -static. The problem exists in # FreeBSD 2.2.6 and is fixed in FreeBSD 3.1. *-*-freebsd2.*|*-*-freebsd3.0*|*-*-freebsdelf3.0*) pic_flag_for_symtable=" $pic_flag -DFREEBSD_WORKAROUND" ;; *-*-hpux*) pic_flag_for_symtable=" $pic_flag" ;; *) $my_pic_p && pic_flag_for_symtable=" $pic_flag" ;; esac ;; esac symtab_cflags= for arg in $LTCFLAGS; do case $arg in -pie | -fpie | -fPIE) ;; *) func_append symtab_cflags " $arg" ;; esac done # Now compile the dynamic symbol file. func_show_eval '(cd $output_objdir && $LTCC$symtab_cflags -c$no_builtin_flag$pic_flag_for_symtable "$my_dlsyms")' 'exit $?' # Clean up the generated files. func_show_eval '$RM "$output_objdir/$my_dlsyms" "$nlist" "${nlist}S" "${nlist}T" "${nlist}I"' # Transform the symbol file into the correct name. symfileobj=$output_objdir/${my_outputname}S.$objext case $host in *cygwin* | *mingw* | *cegcc* ) if test -f "$output_objdir/$my_outputname.def"; then compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` else compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` fi ;; *) compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` ;; esac ;; *) func_fatal_error "unknown suffix for '$my_dlsyms'" ;; esac else # We keep going just in case the user didn't refer to # lt_preloaded_symbols. The linker will fail if global_symbol_pipe # really was required. # Nullify the symbol file. compile_command=`$ECHO "$compile_command" | $SED "s% @SYMFILE@%%"` finalize_command=`$ECHO "$finalize_command" | $SED "s% @SYMFILE@%%"` fi } # func_cygming_gnu_implib_p ARG # This predicate returns with zero status (TRUE) if # ARG is a GNU/binutils-style import library. Returns # with nonzero status (FALSE) otherwise. func_cygming_gnu_implib_p () { $debug_cmd func_to_tool_file "$1" func_convert_file_msys_to_w32 func_cygming_gnu_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $EGREP ' (_head_[A-Za-z0-9_]+_[ad]l*|[A-Za-z0-9_]+_[ad]l*_iname)$'` test -n "$func_cygming_gnu_implib_tmp" } # func_cygming_ms_implib_p ARG # This predicate returns with zero status (TRUE) if # ARG is an MS-style import library. Returns # with nonzero status (FALSE) otherwise. func_cygming_ms_implib_p () { $debug_cmd func_to_tool_file "$1" func_convert_file_msys_to_w32 func_cygming_ms_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $GREP '_NULL_IMPORT_DESCRIPTOR'` test -n "$func_cygming_ms_implib_tmp" } # func_win32_libid arg # return the library type of file 'arg' # # Need a lot of goo to handle *both* DLLs and import libs # Has to be a shell function in order to 'eat' the argument # that is supplied when $file_magic_command is called. # Despite the name, also deal with 64 bit binaries. func_win32_libid () { $debug_cmd win32_libid_type=unknown win32_fileres=`file -L $1 2>/dev/null` case $win32_fileres in *ar\ archive\ import\ library*) # definitely import win32_libid_type="x86 archive import" ;; *ar\ archive*) # could be an import, or static # Keep the egrep pattern in sync with the one in _LT_CHECK_MAGIC_METHOD. if eval $OBJDUMP -f $1 | $SED -e '10q' 2>/dev/null | $EGREP 'file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' >/dev/null; then case $nm_interface in "MS dumpbin") if func_cygming_ms_implib_p "$1" || func_cygming_gnu_implib_p "$1" then win32_nmres=import else win32_nmres= fi ;; *) func_to_tool_file "$1" func_convert_file_msys_to_w32 win32_nmres=`eval $NM -f posix -A \"$func_to_tool_file_result\" | $SED -n -e ' 1,100{ / I /{ s|.*|import| p q } }'` ;; esac case $win32_nmres in import*) win32_libid_type="x86 archive import";; *) win32_libid_type="x86 archive static";; esac fi ;; *DLL*) win32_libid_type="x86 DLL" ;; *executable*) # but shell scripts are "executable" too... case $win32_fileres in *MS\ Windows\ PE\ Intel*) win32_libid_type="x86 DLL" ;; esac ;; esac $ECHO "$win32_libid_type" } # func_cygming_dll_for_implib ARG # # Platform-specific function to extract the # name of the DLL associated with the specified # import library ARG. # Invoked by eval'ing the libtool variable # $sharedlib_from_linklib_cmd # Result is available in the variable # $sharedlib_from_linklib_result func_cygming_dll_for_implib () { $debug_cmd sharedlib_from_linklib_result=`$DLLTOOL --identify-strict --identify "$1"` } # func_cygming_dll_for_implib_fallback_core SECTION_NAME LIBNAMEs # # The is the core of a fallback implementation of a # platform-specific function to extract the name of the # DLL associated with the specified import library LIBNAME. # # SECTION_NAME is either .idata$6 or .idata$7, depending # on the platform and compiler that created the implib. # # Echos the name of the DLL associated with the # specified import library. func_cygming_dll_for_implib_fallback_core () { $debug_cmd match_literal=`$ECHO "$1" | $SED "$sed_make_literal_regex"` $OBJDUMP -s --section "$1" "$2" 2>/dev/null | $SED '/^Contents of section '"$match_literal"':/{ # Place marker at beginning of archive member dllname section s/.*/====MARK====/ p d } # These lines can sometimes be longer than 43 characters, but # are always uninteresting /:[ ]*file format pe[i]\{,1\}-/d /^In archive [^:]*:/d # Ensure marker is printed /^====MARK====/p # Remove all lines with less than 43 characters /^.\{43\}/!d # From remaining lines, remove first 43 characters s/^.\{43\}//' | $SED -n ' # Join marker and all lines until next marker into a single line /^====MARK====/ b para H $ b para b :para x s/\n//g # Remove the marker s/^====MARK====// # Remove trailing dots and whitespace s/[\. \t]*$// # Print /./p' | # we now have a list, one entry per line, of the stringified # contents of the appropriate section of all members of the # archive that possess that section. Heuristic: eliminate # all those that have a first or second character that is # a '.' (that is, objdump's representation of an unprintable # character.) This should work for all archives with less than # 0x302f exports -- but will fail for DLLs whose name actually # begins with a literal '.' or a single character followed by # a '.'. # # Of those that remain, print the first one. $SED -e '/^\./d;/^.\./d;q' } # func_cygming_dll_for_implib_fallback ARG # Platform-specific function to extract the # name of the DLL associated with the specified # import library ARG. # # This fallback implementation is for use when $DLLTOOL # does not support the --identify-strict option. # Invoked by eval'ing the libtool variable # $sharedlib_from_linklib_cmd # Result is available in the variable # $sharedlib_from_linklib_result func_cygming_dll_for_implib_fallback () { $debug_cmd if func_cygming_gnu_implib_p "$1"; then # binutils import library sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$7' "$1"` elif func_cygming_ms_implib_p "$1"; then # ms-generated import library sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$6' "$1"` else # unknown sharedlib_from_linklib_result= fi } # func_extract_an_archive dir oldlib func_extract_an_archive () { $debug_cmd f_ex_an_ar_dir=$1; shift f_ex_an_ar_oldlib=$1 if test yes = "$lock_old_archive_extraction"; then lockfile=$f_ex_an_ar_oldlib.lock until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do func_echo "Waiting for $lockfile to be removed" sleep 2 done fi func_show_eval "(cd \$f_ex_an_ar_dir && $AR x \"\$f_ex_an_ar_oldlib\")" \ 'stat=$?; rm -f "$lockfile"; exit $stat' if test yes = "$lock_old_archive_extraction"; then $opt_dry_run || rm -f "$lockfile" fi if ($AR t "$f_ex_an_ar_oldlib" | sort | sort -uc >/dev/null 2>&1); then : else func_fatal_error "object name conflicts in archive: $f_ex_an_ar_dir/$f_ex_an_ar_oldlib" fi } # func_extract_archives gentop oldlib ... func_extract_archives () { $debug_cmd my_gentop=$1; shift my_oldlibs=${1+"$@"} my_oldobjs= my_xlib= my_xabs= my_xdir= for my_xlib in $my_oldlibs; do # Extract the objects. case $my_xlib in [\\/]* | [A-Za-z]:[\\/]*) my_xabs=$my_xlib ;; *) my_xabs=`pwd`"/$my_xlib" ;; esac func_basename "$my_xlib" my_xlib=$func_basename_result my_xlib_u=$my_xlib while :; do case " $extracted_archives " in *" $my_xlib_u "*) func_arith $extracted_serial + 1 extracted_serial=$func_arith_result my_xlib_u=lt$extracted_serial-$my_xlib ;; *) break ;; esac done extracted_archives="$extracted_archives $my_xlib_u" my_xdir=$my_gentop/$my_xlib_u func_mkdir_p "$my_xdir" case $host in *-darwin*) func_verbose "Extracting $my_xabs" # Do not bother doing anything if just a dry run $opt_dry_run || { darwin_orig_dir=`pwd` cd $my_xdir || exit $? darwin_archive=$my_xabs darwin_curdir=`pwd` func_basename "$darwin_archive" darwin_base_archive=$func_basename_result darwin_arches=`$LIPO -info "$darwin_archive" 2>/dev/null | $GREP Architectures 2>/dev/null || true` if test -n "$darwin_arches"; then darwin_arches=`$ECHO "$darwin_arches" | $SED -e 's/.*are://'` darwin_arch= func_verbose "$darwin_base_archive has multiple architectures $darwin_arches" for darwin_arch in $darwin_arches; do func_mkdir_p "unfat-$$/$darwin_base_archive-$darwin_arch" $LIPO -thin $darwin_arch -output "unfat-$$/$darwin_base_archive-$darwin_arch/$darwin_base_archive" "$darwin_archive" cd "unfat-$$/$darwin_base_archive-$darwin_arch" func_extract_an_archive "`pwd`" "$darwin_base_archive" cd "$darwin_curdir" $RM "unfat-$$/$darwin_base_archive-$darwin_arch/$darwin_base_archive" done # $darwin_arches ## Okay now we've a bunch of thin objects, gotta fatten them up :) darwin_filelist=`find unfat-$$ -type f -name \*.o -print -o -name \*.lo -print | $SED -e "$sed_basename" | sort -u` darwin_file= darwin_files= for darwin_file in $darwin_filelist; do darwin_files=`find unfat-$$ -name $darwin_file -print | sort | $NL2SP` $LIPO -create -output "$darwin_file" $darwin_files done # $darwin_filelist $RM -rf unfat-$$ cd "$darwin_orig_dir" else cd $darwin_orig_dir func_extract_an_archive "$my_xdir" "$my_xabs" fi # $darwin_arches } # !$opt_dry_run ;; *) func_extract_an_archive "$my_xdir" "$my_xabs" ;; esac my_oldobjs="$my_oldobjs "`find $my_xdir -name \*.$objext -print -o -name \*.lo -print | sort | $NL2SP` done func_extract_archives_result=$my_oldobjs } # func_emit_wrapper [arg=no] # # Emit a libtool wrapper script on stdout. # Don't directly open a file because we may want to # incorporate the script contents within a cygwin/mingw # wrapper executable. Must ONLY be called from within # func_mode_link because it depends on a number of variables # set therein. # # ARG is the value that the WRAPPER_SCRIPT_BELONGS_IN_OBJDIR # variable will take. If 'yes', then the emitted script # will assume that the directory where it is stored is # the $objdir directory. This is a cygwin/mingw-specific # behavior. func_emit_wrapper () { func_emit_wrapper_arg1=${1-no} $ECHO "\ #! $SHELL # $output - temporary wrapper script for $objdir/$outputname # Generated by $PROGRAM (GNU $PACKAGE) $VERSION # # The $output program cannot be directly executed until all the libtool # libraries that it depends on are installed. # # This wrapper script should never be moved out of the build directory. # If it is, it will not operate correctly. # Sed substitution that helps us do robust quoting. It backslashifies # metacharacters that are still active within double-quoted strings. sed_quote_subst='$sed_quote_subst' # Be Bourne compatible if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: # Zsh 3.x and 4.x performs word splitting on \${1+\"\$@\"}, which # is contrary to our usage. Disable this feature. alias -g '\${1+\"\$@\"}'='\"\$@\"' setopt NO_GLOB_SUBST else case \`(set -o) 2>/dev/null\` in *posix*) set -o posix;; esac fi BIN_SH=xpg4; export BIN_SH # for Tru64 DUALCASE=1; export DUALCASE # for MKS sh # The HP-UX ksh and POSIX shell print the target directory to stdout # if CDPATH is set. (unset CDPATH) >/dev/null 2>&1 && unset CDPATH relink_command=\"$relink_command\" # This environment variable determines our operation mode. if test \"\$libtool_install_magic\" = \"$magic\"; then # install mode needs the following variables: generated_by_libtool_version='$macro_version' notinst_deplibs='$notinst_deplibs' else # When we are sourced in execute mode, \$file and \$ECHO are already set. if test \"\$libtool_execute_magic\" != \"$magic\"; then file=\"\$0\"" qECHO=`$ECHO "$ECHO" | $SED "$sed_quote_subst"` $ECHO "\ # A function that is used when there is no print builtin or printf. func_fallback_echo () { eval 'cat <<_LTECHO_EOF \$1 _LTECHO_EOF' } ECHO=\"$qECHO\" fi # Very basic option parsing. These options are (a) specific to # the libtool wrapper, (b) are identical between the wrapper # /script/ and the wrapper /executable/ that is used only on # windows platforms, and (c) all begin with the string "--lt-" # (application programs are unlikely to have options that match # this pattern). # # There are only two supported options: --lt-debug and # --lt-dump-script. There is, deliberately, no --lt-help. # # The first argument to this parsing function should be the # script's $0 value, followed by "$@". lt_option_debug= func_parse_lt_options () { lt_script_arg0=\$0 shift for lt_opt do case \"\$lt_opt\" in --lt-debug) lt_option_debug=1 ;; --lt-dump-script) lt_dump_D=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%/[^/]*$%%'\` test \"X\$lt_dump_D\" = \"X\$lt_script_arg0\" && lt_dump_D=. lt_dump_F=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%^.*/%%'\` cat \"\$lt_dump_D/\$lt_dump_F\" exit 0 ;; --lt-*) \$ECHO \"Unrecognized --lt- option: '\$lt_opt'\" 1>&2 exit 1 ;; esac done # Print the debug banner immediately: if test -n \"\$lt_option_debug\"; then echo \"$outputname:$output:\$LINENO: libtool wrapper (GNU $PACKAGE) $VERSION\" 1>&2 fi } # Used when --lt-debug. Prints its arguments to stdout # (redirection is the responsibility of the caller) func_lt_dump_args () { lt_dump_args_N=1; for lt_arg do \$ECHO \"$outputname:$output:\$LINENO: newargv[\$lt_dump_args_N]: \$lt_arg\" lt_dump_args_N=\`expr \$lt_dump_args_N + 1\` done } # Core function for launching the target application func_exec_program_core () { " case $host in # Backslashes separate directories on plain windows *-*-mingw | *-*-os2* | *-cegcc*) $ECHO "\ if test -n \"\$lt_option_debug\"; then \$ECHO \"$outputname:$output:\$LINENO: newargv[0]: \$progdir\\\\\$program\" 1>&2 func_lt_dump_args \${1+\"\$@\"} 1>&2 fi exec \"\$progdir\\\\\$program\" \${1+\"\$@\"} " ;; *) $ECHO "\ if test -n \"\$lt_option_debug\"; then \$ECHO \"$outputname:$output:\$LINENO: newargv[0]: \$progdir/\$program\" 1>&2 func_lt_dump_args \${1+\"\$@\"} 1>&2 fi exec \"\$progdir/\$program\" \${1+\"\$@\"} " ;; esac $ECHO "\ \$ECHO \"\$0: cannot exec \$program \$*\" 1>&2 exit 1 } # A function to encapsulate launching the target application # Strips options in the --lt-* namespace from \$@ and # launches target application with the remaining arguments. func_exec_program () { case \" \$* \" in *\\ --lt-*) for lt_wr_arg do case \$lt_wr_arg in --lt-*) ;; *) set x \"\$@\" \"\$lt_wr_arg\"; shift;; esac shift done ;; esac func_exec_program_core \${1+\"\$@\"} } # Parse options func_parse_lt_options \"\$0\" \${1+\"\$@\"} # Find the directory that this script lives in. thisdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*$%%'\` test \"x\$thisdir\" = \"x\$file\" && thisdir=. # Follow symbolic links until we get to the real thisdir. file=\`ls -ld \"\$file\" | $SED -n 's/.*-> //p'\` while test -n \"\$file\"; do destdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*\$%%'\` # If there was a directory component, then change thisdir. if test \"x\$destdir\" != \"x\$file\"; then case \"\$destdir\" in [\\\\/]* | [A-Za-z]:[\\\\/]*) thisdir=\"\$destdir\" ;; *) thisdir=\"\$thisdir/\$destdir\" ;; esac fi file=\`\$ECHO \"\$file\" | $SED 's%^.*/%%'\` file=\`ls -ld \"\$thisdir/\$file\" | $SED -n 's/.*-> //p'\` done # Usually 'no', except on cygwin/mingw when embedded into # the cwrapper. WRAPPER_SCRIPT_BELONGS_IN_OBJDIR=$func_emit_wrapper_arg1 if test \"\$WRAPPER_SCRIPT_BELONGS_IN_OBJDIR\" = \"yes\"; then # special case for '.' if test \"\$thisdir\" = \".\"; then thisdir=\`pwd\` fi # remove .libs from thisdir case \"\$thisdir\" in *[\\\\/]$objdir ) thisdir=\`\$ECHO \"\$thisdir\" | $SED 's%[\\\\/][^\\\\/]*$%%'\` ;; $objdir ) thisdir=. ;; esac fi # Try to get the absolute directory name. absdir=\`cd \"\$thisdir\" && pwd\` test -n \"\$absdir\" && thisdir=\"\$absdir\" " if test yes = "$fast_install"; then $ECHO "\ program=lt-'$outputname'$exeext progdir=\"\$thisdir/$objdir\" if test ! -f \"\$progdir/\$program\" || { file=\`ls -1dt \"\$progdir/\$program\" \"\$progdir/../\$program\" 2>/dev/null | $SED 1q\`; \\ test \"X\$file\" != \"X\$progdir/\$program\"; }; then file=\"\$\$-\$program\" if test ! -d \"\$progdir\"; then $MKDIR \"\$progdir\" else $RM \"\$progdir/\$file\" fi" $ECHO "\ # relink executable if necessary if test -n \"\$relink_command\"; then if relink_command_output=\`eval \$relink_command 2>&1\`; then : else \$ECHO \"\$relink_command_output\" >&2 $RM \"\$progdir/\$file\" exit 1 fi fi $MV \"\$progdir/\$file\" \"\$progdir/\$program\" 2>/dev/null || { $RM \"\$progdir/\$program\"; $MV \"\$progdir/\$file\" \"\$progdir/\$program\"; } $RM \"\$progdir/\$file\" fi" else $ECHO "\ program='$outputname' progdir=\"\$thisdir/$objdir\" " fi $ECHO "\ if test -f \"\$progdir/\$program\"; then" # fixup the dll searchpath if we need to. # # Fix the DLL searchpath if we need to. Do this before prepending # to shlibpath, because on Windows, both are PATH and uninstalled # libraries must come first. if test -n "$dllsearchpath"; then $ECHO "\ # Add the dll search path components to the executable PATH PATH=$dllsearchpath:\$PATH " fi # Export our shlibpath_var if we have one. if test yes = "$shlibpath_overrides_runpath" && test -n "$shlibpath_var" && test -n "$temp_rpath"; then $ECHO "\ # Add our own library path to $shlibpath_var $shlibpath_var=\"$temp_rpath\$$shlibpath_var\" # Some systems cannot cope with colon-terminated $shlibpath_var # The second colon is a workaround for a bug in BeOS R4 sed $shlibpath_var=\`\$ECHO \"\$$shlibpath_var\" | $SED 's/::*\$//'\` export $shlibpath_var " fi $ECHO "\ if test \"\$libtool_execute_magic\" != \"$magic\"; then # Run the actual program with our arguments. func_exec_program \${1+\"\$@\"} fi else # The program doesn't exist. \$ECHO \"\$0: error: '\$progdir/\$program' does not exist\" 1>&2 \$ECHO \"This script is just a wrapper for \$program.\" 1>&2 \$ECHO \"See the $PACKAGE documentation for more information.\" 1>&2 exit 1 fi fi\ " } # func_emit_cwrapperexe_src # emit the source code for a wrapper executable on stdout # Must ONLY be called from within func_mode_link because # it depends on a number of variable set therein. func_emit_cwrapperexe_src () { cat < #include #ifdef _MSC_VER # include # include # include #else # include # include # ifdef __CYGWIN__ # include # endif #endif #include #include #include #include #include #include #include #include #define STREQ(s1, s2) (strcmp ((s1), (s2)) == 0) /* declarations of non-ANSI functions */ #if defined __MINGW32__ # ifdef __STRICT_ANSI__ int _putenv (const char *); # endif #elif defined __CYGWIN__ # ifdef __STRICT_ANSI__ char *realpath (const char *, char *); int putenv (char *); int setenv (const char *, const char *, int); # endif /* #elif defined other_platform || defined ... */ #endif /* portability defines, excluding path handling macros */ #if defined _MSC_VER # define setmode _setmode # define stat _stat # define chmod _chmod # define getcwd _getcwd # define putenv _putenv # define S_IXUSR _S_IEXEC #elif defined __MINGW32__ # define setmode _setmode # define stat _stat # define chmod _chmod # define getcwd _getcwd # define putenv _putenv #elif defined __CYGWIN__ # define HAVE_SETENV # define FOPEN_WB "wb" /* #elif defined other platforms ... */ #endif #if defined PATH_MAX # define LT_PATHMAX PATH_MAX #elif defined MAXPATHLEN # define LT_PATHMAX MAXPATHLEN #else # define LT_PATHMAX 1024 #endif #ifndef S_IXOTH # define S_IXOTH 0 #endif #ifndef S_IXGRP # define S_IXGRP 0 #endif /* path handling portability macros */ #ifndef DIR_SEPARATOR # define DIR_SEPARATOR '/' # define PATH_SEPARATOR ':' #endif #if defined _WIN32 || defined __MSDOS__ || defined __DJGPP__ || \ defined __OS2__ # define HAVE_DOS_BASED_FILE_SYSTEM # define FOPEN_WB "wb" # ifndef DIR_SEPARATOR_2 # define DIR_SEPARATOR_2 '\\' # endif # ifndef PATH_SEPARATOR_2 # define PATH_SEPARATOR_2 ';' # endif #endif #ifndef DIR_SEPARATOR_2 # define IS_DIR_SEPARATOR(ch) ((ch) == DIR_SEPARATOR) #else /* DIR_SEPARATOR_2 */ # define IS_DIR_SEPARATOR(ch) \ (((ch) == DIR_SEPARATOR) || ((ch) == DIR_SEPARATOR_2)) #endif /* DIR_SEPARATOR_2 */ #ifndef PATH_SEPARATOR_2 # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR) #else /* PATH_SEPARATOR_2 */ # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR_2) #endif /* PATH_SEPARATOR_2 */ #ifndef FOPEN_WB # define FOPEN_WB "w" #endif #ifndef _O_BINARY # define _O_BINARY 0 #endif #define XMALLOC(type, num) ((type *) xmalloc ((num) * sizeof(type))) #define XFREE(stale) do { \ if (stale) { free (stale); stale = 0; } \ } while (0) #if defined LT_DEBUGWRAPPER static int lt_debug = 1; #else static int lt_debug = 0; #endif const char *program_name = "libtool-wrapper"; /* in case xstrdup fails */ void *xmalloc (size_t num); char *xstrdup (const char *string); const char *base_name (const char *name); char *find_executable (const char *wrapper); char *chase_symlinks (const char *pathspec); int make_executable (const char *path); int check_executable (const char *path); char *strendzap (char *str, const char *pat); void lt_debugprintf (const char *file, int line, const char *fmt, ...); void lt_fatal (const char *file, int line, const char *message, ...); static const char *nonnull (const char *s); static const char *nonempty (const char *s); void lt_setenv (const char *name, const char *value); char *lt_extend_str (const char *orig_value, const char *add, int to_end); void lt_update_exe_path (const char *name, const char *value); void lt_update_lib_path (const char *name, const char *value); char **prepare_spawn (char **argv); void lt_dump_script (FILE *f); EOF cat <= 0) && (st.st_mode & (S_IXUSR | S_IXGRP | S_IXOTH))) return 1; else return 0; } int make_executable (const char *path) { int rval = 0; struct stat st; lt_debugprintf (__FILE__, __LINE__, "(make_executable): %s\n", nonempty (path)); if ((!path) || (!*path)) return 0; if (stat (path, &st) >= 0) { rval = chmod (path, st.st_mode | S_IXOTH | S_IXGRP | S_IXUSR); } return rval; } /* Searches for the full path of the wrapper. Returns newly allocated full path name if found, NULL otherwise Does not chase symlinks, even on platforms that support them. */ char * find_executable (const char *wrapper) { int has_slash = 0; const char *p; const char *p_next; /* static buffer for getcwd */ char tmp[LT_PATHMAX + 1]; size_t tmp_len; char *concat_name; lt_debugprintf (__FILE__, __LINE__, "(find_executable): %s\n", nonempty (wrapper)); if ((wrapper == NULL) || (*wrapper == '\0')) return NULL; /* Absolute path? */ #if defined HAVE_DOS_BASED_FILE_SYSTEM if (isalpha ((unsigned char) wrapper[0]) && wrapper[1] == ':') { concat_name = xstrdup (wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } else { #endif if (IS_DIR_SEPARATOR (wrapper[0])) { concat_name = xstrdup (wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } #if defined HAVE_DOS_BASED_FILE_SYSTEM } #endif for (p = wrapper; *p; p++) if (*p == '/') { has_slash = 1; break; } if (!has_slash) { /* no slashes; search PATH */ const char *path = getenv ("PATH"); if (path != NULL) { for (p = path; *p; p = p_next) { const char *q; size_t p_len; for (q = p; *q; q++) if (IS_PATH_SEPARATOR (*q)) break; p_len = (size_t) (q - p); p_next = (*q == '\0' ? q : q + 1); if (p_len == 0) { /* empty path: current directory */ if (getcwd (tmp, LT_PATHMAX) == NULL) lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", nonnull (strerror (errno))); tmp_len = strlen (tmp); concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, tmp, tmp_len); concat_name[tmp_len] = '/'; strcpy (concat_name + tmp_len + 1, wrapper); } else { concat_name = XMALLOC (char, p_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, p, p_len); concat_name[p_len] = '/'; strcpy (concat_name + p_len + 1, wrapper); } if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } } /* not found in PATH; assume curdir */ } /* Relative path | not found in path: prepend cwd */ if (getcwd (tmp, LT_PATHMAX) == NULL) lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", nonnull (strerror (errno))); tmp_len = strlen (tmp); concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, tmp, tmp_len); concat_name[tmp_len] = '/'; strcpy (concat_name + tmp_len + 1, wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); return NULL; } char * chase_symlinks (const char *pathspec) { #ifndef S_ISLNK return xstrdup (pathspec); #else char buf[LT_PATHMAX]; struct stat s; char *tmp_pathspec = xstrdup (pathspec); char *p; int has_symlinks = 0; while (strlen (tmp_pathspec) && !has_symlinks) { lt_debugprintf (__FILE__, __LINE__, "checking path component for symlinks: %s\n", tmp_pathspec); if (lstat (tmp_pathspec, &s) == 0) { if (S_ISLNK (s.st_mode) != 0) { has_symlinks = 1; break; } /* search backwards for last DIR_SEPARATOR */ p = tmp_pathspec + strlen (tmp_pathspec) - 1; while ((p > tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) p--; if ((p == tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) { /* no more DIR_SEPARATORS left */ break; } *p = '\0'; } else { lt_fatal (__FILE__, __LINE__, "error accessing file \"%s\": %s", tmp_pathspec, nonnull (strerror (errno))); } } XFREE (tmp_pathspec); if (!has_symlinks) { return xstrdup (pathspec); } tmp_pathspec = realpath (pathspec, buf); if (tmp_pathspec == 0) { lt_fatal (__FILE__, __LINE__, "could not follow symlinks for %s", pathspec); } return xstrdup (tmp_pathspec); #endif } char * strendzap (char *str, const char *pat) { size_t len, patlen; assert (str != NULL); assert (pat != NULL); len = strlen (str); patlen = strlen (pat); if (patlen <= len) { str += len - patlen; if (STREQ (str, pat)) *str = '\0'; } return str; } void lt_debugprintf (const char *file, int line, const char *fmt, ...) { va_list args; if (lt_debug) { (void) fprintf (stderr, "%s:%s:%d: ", program_name, file, line); va_start (args, fmt); (void) vfprintf (stderr, fmt, args); va_end (args); } } static void lt_error_core (int exit_status, const char *file, int line, const char *mode, const char *message, va_list ap) { fprintf (stderr, "%s:%s:%d: %s: ", program_name, file, line, mode); vfprintf (stderr, message, ap); fprintf (stderr, ".\n"); if (exit_status >= 0) exit (exit_status); } void lt_fatal (const char *file, int line, const char *message, ...) { va_list ap; va_start (ap, message); lt_error_core (EXIT_FAILURE, file, line, "FATAL", message, ap); va_end (ap); } static const char * nonnull (const char *s) { return s ? s : "(null)"; } static const char * nonempty (const char *s) { return (s && !*s) ? "(empty)" : nonnull (s); } void lt_setenv (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_setenv) setting '%s' to '%s'\n", nonnull (name), nonnull (value)); { #ifdef HAVE_SETENV /* always make a copy, for consistency with !HAVE_SETENV */ char *str = xstrdup (value); setenv (name, str, 1); #else size_t len = strlen (name) + 1 + strlen (value) + 1; char *str = XMALLOC (char, len); sprintf (str, "%s=%s", name, value); if (putenv (str) != EXIT_SUCCESS) { XFREE (str); } #endif } } char * lt_extend_str (const char *orig_value, const char *add, int to_end) { char *new_value; if (orig_value && *orig_value) { size_t orig_value_len = strlen (orig_value); size_t add_len = strlen (add); new_value = XMALLOC (char, add_len + orig_value_len + 1); if (to_end) { strcpy (new_value, orig_value); strcpy (new_value + orig_value_len, add); } else { strcpy (new_value, add); strcpy (new_value + add_len, orig_value); } } else { new_value = xstrdup (add); } return new_value; } void lt_update_exe_path (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_update_exe_path) modifying '%s' by prepending '%s'\n", nonnull (name), nonnull (value)); if (name && *name && value && *value) { char *new_value = lt_extend_str (getenv (name), value, 0); /* some systems can't cope with a ':'-terminated path #' */ size_t len = strlen (new_value); while ((len > 0) && IS_PATH_SEPARATOR (new_value[len-1])) { new_value[--len] = '\0'; } lt_setenv (name, new_value); XFREE (new_value); } } void lt_update_lib_path (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_update_lib_path) modifying '%s' by prepending '%s'\n", nonnull (name), nonnull (value)); if (name && *name && value && *value) { char *new_value = lt_extend_str (getenv (name), value, 0); lt_setenv (name, new_value); XFREE (new_value); } } EOF case $host_os in mingw*) cat <<"EOF" /* Prepares an argument vector before calling spawn(). Note that spawn() does not by itself call the command interpreter (getenv ("COMSPEC") != NULL ? getenv ("COMSPEC") : ({ OSVERSIONINFO v; v.dwOSVersionInfoSize = sizeof(OSVERSIONINFO); GetVersionEx(&v); v.dwPlatformId == VER_PLATFORM_WIN32_NT; }) ? "cmd.exe" : "command.com"). Instead it simply concatenates the arguments, separated by ' ', and calls CreateProcess(). We must quote the arguments since Win32 CreateProcess() interprets characters like ' ', '\t', '\\', '"' (but not '<' and '>') in a special way: - Space and tab are interpreted as delimiters. They are not treated as delimiters if they are surrounded by double quotes: "...". - Unescaped double quotes are removed from the input. Their only effect is that within double quotes, space and tab are treated like normal characters. - Backslashes not followed by double quotes are not special. - But 2*n+1 backslashes followed by a double quote become n backslashes followed by a double quote (n >= 0): \" -> " \\\" -> \" \\\\\" -> \\" */ #define SHELL_SPECIAL_CHARS "\"\\ \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" #define SHELL_SPACE_CHARS " \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" char ** prepare_spawn (char **argv) { size_t argc; char **new_argv; size_t i; /* Count number of arguments. */ for (argc = 0; argv[argc] != NULL; argc++) ; /* Allocate new argument vector. */ new_argv = XMALLOC (char *, argc + 1); /* Put quoted arguments into the new argument vector. */ for (i = 0; i < argc; i++) { const char *string = argv[i]; if (string[0] == '\0') new_argv[i] = xstrdup ("\"\""); else if (strpbrk (string, SHELL_SPECIAL_CHARS) != NULL) { int quote_around = (strpbrk (string, SHELL_SPACE_CHARS) != NULL); size_t length; unsigned int backslashes; const char *s; char *quoted_string; char *p; length = 0; backslashes = 0; if (quote_around) length++; for (s = string; *s != '\0'; s++) { char c = *s; if (c == '"') length += backslashes + 1; length++; if (c == '\\') backslashes++; else backslashes = 0; } if (quote_around) length += backslashes + 1; quoted_string = XMALLOC (char, length + 1); p = quoted_string; backslashes = 0; if (quote_around) *p++ = '"'; for (s = string; *s != '\0'; s++) { char c = *s; if (c == '"') { unsigned int j; for (j = backslashes + 1; j > 0; j--) *p++ = '\\'; } *p++ = c; if (c == '\\') backslashes++; else backslashes = 0; } if (quote_around) { unsigned int j; for (j = backslashes; j > 0; j--) *p++ = '\\'; *p++ = '"'; } *p = '\0'; new_argv[i] = quoted_string; } else new_argv[i] = (char *) string; } new_argv[argc] = NULL; return new_argv; } EOF ;; esac cat <<"EOF" void lt_dump_script (FILE* f) { EOF func_emit_wrapper yes | $SED -n -e ' s/^\(.\{79\}\)\(..*\)/\1\ \2/ h s/\([\\"]\)/\\\1/g s/$/\\n/ s/\([^\n]*\).*/ fputs ("\1", f);/p g D' cat <<"EOF" } EOF } # end: func_emit_cwrapperexe_src # func_win32_import_lib_p ARG # True if ARG is an import lib, as indicated by $file_magic_cmd func_win32_import_lib_p () { $debug_cmd case `eval $file_magic_cmd \"\$1\" 2>/dev/null | $SED -e 10q` in *import*) : ;; *) false ;; esac } # func_suncc_cstd_abi # !!ONLY CALL THIS FOR SUN CC AFTER $compile_command IS FULLY EXPANDED!! # Several compiler flags select an ABI that is incompatible with the # Cstd library. Avoid specifying it if any are in CXXFLAGS. func_suncc_cstd_abi () { $debug_cmd case " $compile_command " in *" -compat=g "*|*\ -std=c++[0-9][0-9]\ *|*" -library=stdcxx4 "*|*" -library=stlport4 "*) suncc_use_cstd_abi=no ;; *) suncc_use_cstd_abi=yes ;; esac } # func_mode_link arg... func_mode_link () { $debug_cmd case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) # It is impossible to link a dll without this setting, and # we shouldn't force the makefile maintainer to figure out # what system we are compiling for in order to pass an extra # flag for every libtool invocation. # allow_undefined=no # FIXME: Unfortunately, there are problems with the above when trying # to make a dll that has undefined symbols, in which case not # even a static library is built. For now, we need to specify # -no-undefined on the libtool link line when we can be certain # that all symbols are satisfied, otherwise we get a static library. allow_undefined=yes ;; *) allow_undefined=yes ;; esac libtool_args=$nonopt base_compile="$nonopt $@" compile_command=$nonopt finalize_command=$nonopt compile_rpath= finalize_rpath= compile_shlibpath= finalize_shlibpath= convenience= old_convenience= deplibs= old_deplibs= compiler_flags= linker_flags= dllsearchpath= lib_search_path=`pwd` inst_prefix_dir= new_inherited_linker_flags= avoid_version=no bindir= dlfiles= dlprefiles= dlself=no export_dynamic=no export_symbols= export_symbols_regex= generated= libobjs= ltlibs= module=no no_install=no objs= os2dllname= non_pic_objects= precious_files_regex= prefer_static_libs=no preload=false prev= prevarg= release= rpath= xrpath= perm_rpath= temp_rpath= thread_safe=no vinfo= vinfo_number=no weak_libs= single_module=$wl-single_module func_infer_tag $base_compile # We need to know -static, to get the right output filenames. for arg do case $arg in -shared) test yes != "$build_libtool_libs" \ && func_fatal_configuration "cannot build a shared library" build_old_libs=no break ;; -all-static | -static | -static-libtool-libs) case $arg in -all-static) if test yes = "$build_libtool_libs" && test -z "$link_static_flag"; then func_warning "complete static linking is impossible in this configuration" fi if test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=yes ;; -static) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=built ;; -static-libtool-libs) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=yes ;; esac build_libtool_libs=no build_old_libs=yes break ;; esac done # See if our shared archives depend on static archives. test -n "$old_archive_from_new_cmds" && build_old_libs=yes # Go through the arguments, transforming them on the way. while test "$#" -gt 0; do arg=$1 shift func_quote_for_eval "$arg" qarg=$func_quote_for_eval_unquoted_result func_append libtool_args " $func_quote_for_eval_result" # If the previous option needs an argument, assign it. if test -n "$prev"; then case $prev in output) func_append compile_command " @OUTPUT@" func_append finalize_command " @OUTPUT@" ;; esac case $prev in bindir) bindir=$arg prev= continue ;; dlfiles|dlprefiles) $preload || { # Add the symbol object into the linking commands. func_append compile_command " @SYMFILE@" func_append finalize_command " @SYMFILE@" preload=: } case $arg in *.la | *.lo) ;; # We handle these cases below. force) if test no = "$dlself"; then dlself=needless export_dynamic=yes fi prev= continue ;; self) if test dlprefiles = "$prev"; then dlself=yes elif test dlfiles = "$prev" && test yes != "$dlopen_self"; then dlself=yes else dlself=needless export_dynamic=yes fi prev= continue ;; *) if test dlfiles = "$prev"; then func_append dlfiles " $arg" else func_append dlprefiles " $arg" fi prev= continue ;; esac ;; expsyms) export_symbols=$arg test -f "$arg" \ || func_fatal_error "symbol file '$arg' does not exist" prev= continue ;; expsyms_regex) export_symbols_regex=$arg prev= continue ;; framework) case $host in *-*-darwin*) case "$deplibs " in *" $qarg.ltframework "*) ;; *) func_append deplibs " $qarg.ltframework" # this is fixed later ;; esac ;; esac prev= continue ;; inst_prefix) inst_prefix_dir=$arg prev= continue ;; mllvm) # Clang does not use LLVM to link, so we can simply discard any # '-mllvm $arg' options when doing the link step. prev= continue ;; objectlist) if test -f "$arg"; then save_arg=$arg moreargs= for fil in `cat "$save_arg"` do # func_append moreargs " $fil" arg=$fil # A libtool-controlled object. # Check to see that this really is a libtool object. if func_lalib_unsafe_p "$arg"; then pic_object= non_pic_object= # Read the .lo file func_source "$arg" if test -z "$pic_object" || test -z "$non_pic_object" || test none = "$pic_object" && test none = "$non_pic_object"; then func_fatal_error "cannot find name of object for '$arg'" fi # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result if test none != "$pic_object"; then # Prepend the subdirectory the object is found in. pic_object=$xdir$pic_object if test dlfiles = "$prev"; then if test yes = "$build_libtool_libs" && test yes = "$dlopen_support"; then func_append dlfiles " $pic_object" prev= continue else # If libtool objects are unsupported, then we need to preload. prev=dlprefiles fi fi # CHECK ME: I think I busted this. -Ossama if test dlprefiles = "$prev"; then # Preload the old-style object. func_append dlprefiles " $pic_object" prev= fi # A PIC object. func_append libobjs " $pic_object" arg=$pic_object fi # Non-PIC object. if test none != "$non_pic_object"; then # Prepend the subdirectory the object is found in. non_pic_object=$xdir$non_pic_object # A standard non-PIC object func_append non_pic_objects " $non_pic_object" if test -z "$pic_object" || test none = "$pic_object"; then arg=$non_pic_object fi else # If the PIC object exists, use it instead. # $xdir was prepended to $pic_object above. non_pic_object=$pic_object func_append non_pic_objects " $non_pic_object" fi else # Only an error if not doing a dry-run. if $opt_dry_run; then # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result func_lo2o "$arg" pic_object=$xdir$objdir/$func_lo2o_result non_pic_object=$xdir$func_lo2o_result func_append libobjs " $pic_object" func_append non_pic_objects " $non_pic_object" else func_fatal_error "'$arg' is not a valid libtool object" fi fi done else func_fatal_error "link input file '$arg' does not exist" fi arg=$save_arg prev= continue ;; os2dllname) os2dllname=$arg prev= continue ;; precious_regex) precious_files_regex=$arg prev= continue ;; release) release=-$arg prev= continue ;; rpath | xrpath) # We need an absolute path. case $arg in [\\/]* | [A-Za-z]:[\\/]*) ;; *) func_fatal_error "only absolute run-paths are allowed" ;; esac if test rpath = "$prev"; then case "$rpath " in *" $arg "*) ;; *) func_append rpath " $arg" ;; esac else case "$xrpath " in *" $arg "*) ;; *) func_append xrpath " $arg" ;; esac fi prev= continue ;; shrext) shrext_cmds=$arg prev= continue ;; weak) func_append weak_libs " $arg" prev= continue ;; xcclinker) func_append linker_flags " $qarg" func_append compiler_flags " $qarg" prev= func_append compile_command " $qarg" func_append finalize_command " $qarg" continue ;; xcompiler) func_append compiler_flags " $qarg" prev= func_append compile_command " $qarg" func_append finalize_command " $qarg" continue ;; xlinker) func_append linker_flags " $qarg" func_append compiler_flags " $wl$qarg" prev= func_append compile_command " $wl$qarg" func_append finalize_command " $wl$qarg" continue ;; *) eval "$prev=\"\$arg\"" prev= continue ;; esac fi # test -n "$prev" prevarg=$arg case $arg in -all-static) if test -n "$link_static_flag"; then # See comment for -static flag below, for more details. func_append compile_command " $link_static_flag" func_append finalize_command " $link_static_flag" fi continue ;; -allow-undefined) # FIXME: remove this flag sometime in the future. func_fatal_error "'-allow-undefined' must not be used because it is the default" ;; -avoid-version) avoid_version=yes continue ;; -bindir) prev=bindir continue ;; -dlopen) prev=dlfiles continue ;; -dlpreopen) prev=dlprefiles continue ;; -export-dynamic) export_dynamic=yes continue ;; -export-symbols | -export-symbols-regex) if test -n "$export_symbols" || test -n "$export_symbols_regex"; then func_fatal_error "more than one -exported-symbols argument is not allowed" fi if test X-export-symbols = "X$arg"; then prev=expsyms else prev=expsyms_regex fi continue ;; -framework) prev=framework continue ;; -inst-prefix-dir) prev=inst_prefix continue ;; # The native IRIX linker understands -LANG:*, -LIST:* and -LNO:* # so, if we see these flags be careful not to treat them like -L -L[A-Z][A-Z]*:*) case $with_gcc/$host in no/*-*-irix* | /*-*-irix*) func_append compile_command " $arg" func_append finalize_command " $arg" ;; esac continue ;; -L*) func_stripname "-L" '' "$arg" if test -z "$func_stripname_result"; then if test "$#" -gt 0; then func_fatal_error "require no space between '-L' and '$1'" else func_fatal_error "need path for '-L' option" fi fi func_resolve_sysroot "$func_stripname_result" dir=$func_resolve_sysroot_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) ;; *) absdir=`cd "$dir" && pwd` test -z "$absdir" && \ func_fatal_error "cannot determine absolute directory name of '$dir'" dir=$absdir ;; esac case "$deplibs " in *" -L$dir "* | *" $arg "*) # Will only happen for absolute or sysroot arguments ;; *) # Preserve sysroot, but never include relative directories case $dir in [\\/]* | [A-Za-z]:[\\/]* | =*) func_append deplibs " $arg" ;; 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*-*-sco3.2v5* | *-*-sco5v6*) # Causes problems with __ctype test X-lc = "X$arg" && continue ;; *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) # Compiler inserts libc in the correct place for threads to work test X-lc = "X$arg" && continue ;; esac elif test X-lc_r = "X$arg"; then case $host in *-*-openbsd* | *-*-freebsd* | *-*-dragonfly* | *-*-bitrig*) # Do not include libc_r directly, use -pthread flag. continue ;; esac fi func_append deplibs " $arg" continue ;; -mllvm) prev=mllvm continue ;; -module) module=yes continue ;; # Tru64 UNIX uses -model [arg] to determine the layout of C++ # classes, name mangling, and exception handling. # Darwin uses the -arch flag to determine output architecture. -model|-arch|-isysroot|--sysroot) func_append compiler_flags " $arg" func_append compile_command " $arg" func_append finalize_command " $arg" prev=xcompiler continue ;; -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) func_append compiler_flags " $arg" func_append compile_command " $arg" func_append finalize_command " $arg" case "$new_inherited_linker_flags " in *" $arg "*) ;; * ) func_append new_inherited_linker_flags " $arg" ;; esac continue ;; -multi_module) single_module=$wl-multi_module continue ;; -no-fast-install) fast_install=no continue ;; -no-install) case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-darwin* | *-cegcc*) # The PATH hackery in wrapper scripts is required on Windows # and Darwin in order for the loader to find any dlls it needs. func_warning "'-no-install' is ignored for $host" func_warning "assuming '-no-fast-install' instead" fast_install=no ;; *) no_install=yes ;; esac continue ;; -no-undefined) allow_undefined=no continue ;; -objectlist) prev=objectlist continue ;; -os2dllname) prev=os2dllname continue ;; -o) prev=output ;; -precious-files-regex) prev=precious_regex continue ;; -release) prev=release continue ;; -rpath) prev=rpath continue ;; -R) prev=xrpath continue ;; -R*) func_stripname '-R' '' "$arg" dir=$func_stripname_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) ;; =*) func_stripname '=' '' "$dir" dir=$lt_sysroot$func_stripname_result ;; *) func_fatal_error "only absolute run-paths are allowed" ;; esac case "$xrpath " in *" $dir "*) ;; *) func_append xrpath " $dir" ;; esac continue ;; -shared) # The effects of -shared are defined in a previous loop. continue ;; -shrext) prev=shrext continue ;; -static | -static-libtool-libs) # The effects of -static are defined in a previous loop. # We used to do the same as -all-static on platforms that # didn't have a PIC flag, but the assumption that the effects # would be equivalent was wrong. It would break on at least # Digital Unix and AIX. continue ;; -thread-safe) thread_safe=yes continue ;; -version-info) prev=vinfo continue ;; -version-number) prev=vinfo vinfo_number=yes continue ;; -weak) prev=weak continue ;; -Wc,*) func_stripname '-Wc,' '' "$arg" args=$func_stripname_result arg= save_ifs=$IFS; IFS=, for flag in $args; do IFS=$save_ifs func_quote_for_eval "$flag" func_append arg " $func_quote_for_eval_result" func_append compiler_flags " $func_quote_for_eval_result" done IFS=$save_ifs func_stripname ' ' '' "$arg" arg=$func_stripname_result ;; -Wl,*) func_stripname '-Wl,' '' "$arg" args=$func_stripname_result arg= save_ifs=$IFS; IFS=, for flag in $args; do IFS=$save_ifs func_quote_for_eval "$flag" func_append arg " $wl$func_quote_for_eval_result" func_append compiler_flags " $wl$func_quote_for_eval_result" func_append linker_flags " $func_quote_for_eval_result" done IFS=$save_ifs func_stripname ' ' '' "$arg" arg=$func_stripname_result ;; -Xcompiler) prev=xcompiler continue ;; -Xlinker) prev=xlinker continue ;; -XCClinker) prev=xcclinker continue ;; # -msg_* for osf cc -msg_*) func_quote_for_eval "$arg" arg=$func_quote_for_eval_result ;; # Flags to be passed through unchanged, with rationale: # -64, -mips[0-9] enable 64-bit mode for the SGI compiler # -r[0-9][0-9]* specify processor for the SGI compiler # -xarch=*, -xtarget=* enable 64-bit mode for the Sun compiler # +DA*, +DD* enable 64-bit mode for the HP compiler # -q* compiler args for the IBM compiler # -m*, -t[45]*, -txscale* architecture-specific flags for GCC # -F/path path to uninstalled frameworks, gcc on darwin # -p, -pg, --coverage, -fprofile-* profiling flags for GCC # -fstack-protector* stack protector flags for GCC # @file GCC response files # -tp=* Portland pgcc target processor selection # --sysroot=* for sysroot support # -O*, -g*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization # -stdlib=* select c++ std lib with clang -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \ -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \ -O*|-g*|-flto*|-fwhopr*|-fuse-linker-plugin|-fstack-protector*|-stdlib=*) func_quote_for_eval "$arg" arg=$func_quote_for_eval_result func_append compile_command " $arg" func_append finalize_command " $arg" func_append compiler_flags " $arg" continue ;; -Z*) if test os2 = "`expr $host : '.*\(os2\)'`"; then # OS/2 uses -Zxxx to specify OS/2-specific options compiler_flags="$compiler_flags $arg" func_append compile_command " $arg" func_append finalize_command " $arg" case $arg in -Zlinker | -Zstack) prev=xcompiler ;; esac continue else # Otherwise treat like 'Some other compiler flag' below func_quote_for_eval "$arg" arg=$func_quote_for_eval_result fi ;; # Some other compiler flag. -* | +*) func_quote_for_eval "$arg" arg=$func_quote_for_eval_result ;; *.$objext) # A standard object. func_append objs " $arg" ;; *.lo) # A libtool-controlled object. # Check to see that this really is a libtool object. if func_lalib_unsafe_p "$arg"; then pic_object= non_pic_object= # Read the .lo file func_source "$arg" if test -z "$pic_object" || test -z "$non_pic_object" || test none = "$pic_object" && test none = "$non_pic_object"; then func_fatal_error "cannot find name of object for '$arg'" fi # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result test none = "$pic_object" || { # Prepend the subdirectory the object is found in. pic_object=$xdir$pic_object if test dlfiles = "$prev"; then if test yes = "$build_libtool_libs" && test yes = "$dlopen_support"; then func_append dlfiles " $pic_object" prev= continue else # If libtool objects are unsupported, then we need to preload. prev=dlprefiles fi fi # CHECK ME: I think I busted this. -Ossama if test dlprefiles = "$prev"; then # Preload the old-style object. func_append dlprefiles " $pic_object" prev= fi # A PIC object. func_append libobjs " $pic_object" arg=$pic_object } # Non-PIC object. if test none != "$non_pic_object"; then # Prepend the subdirectory the object is found in. non_pic_object=$xdir$non_pic_object # A standard non-PIC object func_append non_pic_objects " $non_pic_object" if test -z "$pic_object" || test none = "$pic_object"; then arg=$non_pic_object fi else # If the PIC object exists, use it instead. # $xdir was prepended to $pic_object above. non_pic_object=$pic_object func_append non_pic_objects " $non_pic_object" fi else # Only an error if not doing a dry-run. if $opt_dry_run; then # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir=$func_dirname_result func_lo2o "$arg" pic_object=$xdir$objdir/$func_lo2o_result non_pic_object=$xdir$func_lo2o_result func_append libobjs " $pic_object" func_append non_pic_objects " $non_pic_object" else func_fatal_error "'$arg' is not a valid libtool object" fi fi ;; *.$libext) # An archive. func_append deplibs " $arg" func_append old_deplibs " $arg" continue ;; *.la) # A libtool-controlled library. func_resolve_sysroot "$arg" if test dlfiles = "$prev"; then # This library was specified with -dlopen. func_append dlfiles " $func_resolve_sysroot_result" prev= elif test dlprefiles = "$prev"; then # The library was specified with -dlpreopen. func_append dlprefiles " $func_resolve_sysroot_result" prev= else func_append deplibs " $func_resolve_sysroot_result" fi continue ;; # Some other compiler argument. *) # Unknown arguments in both finalize_command and compile_command need # to be aesthetically quoted because they are evaled later. func_quote_for_eval "$arg" arg=$func_quote_for_eval_result ;; esac # arg # Now actually substitute the argument into the commands. if test -n "$arg"; then func_append compile_command " $arg" func_append finalize_command " $arg" fi done # argument parsing loop test -n "$prev" && \ func_fatal_help "the '$prevarg' option requires an argument" if test yes = "$export_dynamic" && test -n "$export_dynamic_flag_spec"; then eval arg=\"$export_dynamic_flag_spec\" func_append compile_command " $arg" func_append finalize_command " $arg" fi oldlibs= # calculate the name of the file, without its directory func_basename "$output" outputname=$func_basename_result libobjs_save=$libobjs if test -n "$shlibpath_var"; then # get the directories listed in $shlibpath_var eval shlib_search_path=\`\$ECHO \"\$$shlibpath_var\" \| \$SED \'s/:/ /g\'\` else shlib_search_path= fi eval sys_lib_search_path=\"$sys_lib_search_path_spec\" eval sys_lib_dlsearch_path=\"$sys_lib_dlsearch_path_spec\" # Definition is injected by LT_CONFIG during libtool generation. func_munge_path_list sys_lib_dlsearch_path "$LT_SYS_LIBRARY_PATH" func_dirname "$output" "/" "" output_objdir=$func_dirname_result$objdir func_to_tool_file "$output_objdir/" tool_output_objdir=$func_to_tool_file_result # Create the object directory. func_mkdir_p "$output_objdir" # Determine the type of output case $output in "") func_fatal_help "you must specify an output file" ;; *.$libext) linkmode=oldlib ;; *.lo | *.$objext) linkmode=obj ;; *.la) linkmode=lib ;; *) linkmode=prog ;; # Anything else should be a program. esac specialdeplibs= libs= # Find all interdependent deplibs by searching for libraries # that are linked more than once (e.g. -la -lb -la) for deplib in $deplibs; do if $opt_preserve_dup_deps; then case "$libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append libs " $deplib" done if test lib = "$linkmode"; then libs="$predeps $libs $compiler_lib_search_path $postdeps" # Compute libraries that are listed more than once in $predeps # $postdeps and mark them as special (i.e., whose duplicates are # not to be eliminated). pre_post_deps= if $opt_duplicate_compiler_generated_deps; then for pre_post_dep in $predeps $postdeps; do case "$pre_post_deps " in *" $pre_post_dep "*) func_append specialdeplibs " $pre_post_deps" ;; esac func_append pre_post_deps " $pre_post_dep" done fi pre_post_deps= fi deplibs= newdependency_libs= newlib_search_path= need_relink=no # whether we're linking any uninstalled libtool libraries notinst_deplibs= # not-installed libtool libraries notinst_path= # paths that contain not-installed libtool libraries case $linkmode in lib) passes="conv dlpreopen link" for file in $dlfiles $dlprefiles; do case $file in *.la) ;; *) func_fatal_help "libraries can '-dlopen' only libtool libraries: $file" ;; esac done ;; prog) compile_deplibs= finalize_deplibs= alldeplibs=false newdlfiles= newdlprefiles= passes="conv scan dlopen dlpreopen link" ;; *) passes="conv" ;; esac for pass in $passes; do # The preopen pass in lib mode reverses $deplibs; put it back here # so that -L comes before libs that need it for instance... if test lib,link = "$linkmode,$pass"; then ## FIXME: Find the place where the list is rebuilt in the wrong ## order, and fix it there properly tmp_deplibs= for deplib in $deplibs; do tmp_deplibs="$deplib $tmp_deplibs" done deplibs=$tmp_deplibs fi if test lib,link = "$linkmode,$pass" || test prog,scan = "$linkmode,$pass"; then libs=$deplibs deplibs= fi if test prog = "$linkmode"; then case $pass in dlopen) libs=$dlfiles ;; dlpreopen) libs=$dlprefiles ;; link) libs="$deplibs %DEPLIBS% $dependency_libs" ;; esac fi if test lib,dlpreopen = "$linkmode,$pass"; then # Collect and forward deplibs of preopened libtool libs for lib in $dlprefiles; do # Ignore non-libtool-libs dependency_libs= func_resolve_sysroot "$lib" case $lib in *.la) func_source "$func_resolve_sysroot_result" ;; esac # Collect preopened libtool deplibs, except any this library # has declared as weak libs for deplib in $dependency_libs; do func_basename "$deplib" deplib_base=$func_basename_result case " $weak_libs " in *" $deplib_base "*) ;; *) func_append deplibs " $deplib" ;; esac done done libs=$dlprefiles fi if test dlopen = "$pass"; then # Collect dlpreopened libraries save_deplibs=$deplibs deplibs= fi for deplib in $libs; do lib= found=false case $deplib in -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else func_append compiler_flags " $deplib" if test lib = "$linkmode"; then case "$new_inherited_linker_flags " in *" $deplib "*) ;; * ) func_append new_inherited_linker_flags " $deplib" ;; esac fi fi continue ;; -l*) if test lib != "$linkmode" && test prog != "$linkmode"; then func_warning "'-l' is ignored for archives/objects" continue fi func_stripname '-l' '' "$deplib" name=$func_stripname_result if test lib = "$linkmode"; then searchdirs="$newlib_search_path $lib_search_path $compiler_lib_search_dirs $sys_lib_search_path $shlib_search_path" else searchdirs="$newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path" fi for searchdir in $searchdirs; do for search_ext in .la $std_shrext .so .a; do # Search the libtool library lib=$searchdir/lib$name$search_ext if test -f "$lib"; then if test .la = "$search_ext"; then found=: else found=false fi break 2 fi done done if $found; then # deplib is a libtool library # If $allow_libtool_libs_with_static_runtimes && $deplib is a stdlib, # We need to do some special things here, and not later. if test yes = "$allow_libtool_libs_with_static_runtimes"; then case " $predeps $postdeps " in *" $deplib "*) if func_lalib_p "$lib"; then library_names= old_library= func_source "$lib" for l in $old_library $library_names; do ll=$l done if test "X$ll" = "X$old_library"; then # only static version available found=false func_dirname "$lib" "" "." ladir=$func_dirname_result lib=$ladir/$old_library if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" test lib = "$linkmode" && newdependency_libs="$deplib $newdependency_libs" fi continue fi fi ;; *) ;; esac fi else # deplib doesn't seem to be a libtool library if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" test lib = "$linkmode" && newdependency_libs="$deplib $newdependency_libs" fi continue fi ;; # -l *.ltframework) if test prog,link = "$linkmode,$pass"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" if test lib = "$linkmode"; then case "$new_inherited_linker_flags " in *" $deplib "*) ;; * ) func_append new_inherited_linker_flags " $deplib" ;; esac fi fi continue ;; -L*) case $linkmode in lib) deplibs="$deplib $deplibs" test conv = "$pass" && continue newdependency_libs="$deplib $newdependency_libs" func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; prog) if test conv = "$pass"; then deplibs="$deplib $deplibs" continue fi if test scan = "$pass"; then deplibs="$deplib $deplibs" else compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" fi func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; *) func_warning "'-L' is ignored for archives/objects" ;; esac # linkmode continue ;; # -L -R*) if test link = "$pass"; then func_stripname '-R' '' "$deplib" func_resolve_sysroot "$func_stripname_result" dir=$func_resolve_sysroot_result # Make sure the xrpath contains only unique directories. case "$xrpath " in *" $dir "*) ;; *) func_append xrpath " $dir" ;; esac fi deplibs="$deplib $deplibs" continue ;; *.la) func_resolve_sysroot "$deplib" lib=$func_resolve_sysroot_result ;; *.$libext) if test conv = "$pass"; then deplibs="$deplib $deplibs" continue fi case $linkmode in lib) # Linking convenience modules into shared libraries is allowed, # but linking other static libraries is non-portable. case " $dlpreconveniencelibs " in *" $deplib "*) ;; *) valid_a_lib=false case $deplibs_check_method in match_pattern*) set dummy $deplibs_check_method; shift match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` if eval "\$ECHO \"$deplib\"" 2>/dev/null | $SED 10q \ | $EGREP "$match_pattern_regex" > /dev/null; then valid_a_lib=: fi ;; pass_all) valid_a_lib=: ;; esac if $valid_a_lib; then echo $ECHO "*** Warning: Linking the shared library $output against the" $ECHO "*** static library $deplib is not portable!" deplibs="$deplib $deplibs" else echo $ECHO "*** Warning: Trying to link with static lib archive $deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because the file extensions .$libext of this argument makes me believe" echo "*** that it is just a static archive that I should not use here." fi ;; esac continue ;; prog) if test link != "$pass"; then deplibs="$deplib $deplibs" else compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" fi continue ;; esac # linkmode ;; # *.$libext *.lo | *.$objext) if test conv = "$pass"; then deplibs="$deplib $deplibs" elif test prog = "$linkmode"; then if test dlpreopen = "$pass" || test yes != "$dlopen_support" || test no = "$build_libtool_libs"; then # If there is no dlopen support or we're linking statically, # we need to preload. func_append newdlprefiles " $deplib" compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else func_append newdlfiles " $deplib" fi fi continue ;; %DEPLIBS%) alldeplibs=: continue ;; esac # case $deplib $found || test -f "$lib" \ || func_fatal_error "cannot find the library '$lib' or unhandled argument '$deplib'" # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$lib" \ || func_fatal_error "'$lib' is not a valid libtool archive" func_dirname "$lib" "" "." ladir=$func_dirname_result dlname= dlopen= dlpreopen= libdir= library_names= old_library= inherited_linker_flags= # If the library was installed with an old release of libtool, # it will not redefine variables installed, or shouldnotlink installed=yes shouldnotlink=no avoidtemprpath= # Read the .la file func_source "$lib" # Convert "-framework foo" to "foo.ltframework" if test -n "$inherited_linker_flags"; then tmp_inherited_linker_flags=`$ECHO "$inherited_linker_flags" | $SED 's/-framework \([^ $]*\)/\1.ltframework/g'` for tmp_inherited_linker_flag in $tmp_inherited_linker_flags; do case " $new_inherited_linker_flags " in *" $tmp_inherited_linker_flag "*) ;; *) func_append new_inherited_linker_flags " $tmp_inherited_linker_flag";; esac done fi dependency_libs=`$ECHO " $dependency_libs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` if test lib,link = "$linkmode,$pass" || test prog,scan = "$linkmode,$pass" || { test prog != "$linkmode" && test lib != "$linkmode"; }; then test -n "$dlopen" && func_append dlfiles " $dlopen" test -n "$dlpreopen" && func_append dlprefiles " $dlpreopen" fi if test conv = "$pass"; then # Only check for convenience libraries deplibs="$lib $deplibs" if test -z "$libdir"; then if test -z "$old_library"; then func_fatal_error "cannot find name of link library for '$lib'" fi # It is a libtool convenience library, so add in its objects. func_append convenience " $ladir/$objdir/$old_library" func_append old_convenience " $ladir/$objdir/$old_library" elif test prog != "$linkmode" && test lib != "$linkmode"; then func_fatal_error "'$lib' is not a convenience library" fi tmp_libs= for deplib in $dependency_libs; do deplibs="$deplib $deplibs" if $opt_preserve_dup_deps; then case "$tmp_libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append tmp_libs " $deplib" done continue fi # $pass = conv # Get the name of the library we link against. linklib= if test -n "$old_library" && { test yes = "$prefer_static_libs" || test built,no = "$prefer_static_libs,$installed"; }; then linklib=$old_library else for l in $old_library $library_names; do linklib=$l done fi if test -z "$linklib"; then func_fatal_error "cannot find name of link library for '$lib'" fi # This library was specified with -dlopen. if test dlopen = "$pass"; then test -z "$libdir" \ && func_fatal_error "cannot -dlopen a convenience library: '$lib'" if test -z "$dlname" || test yes != "$dlopen_support" || test no = "$build_libtool_libs" then # If there is no dlname, no dlopen support or we're linking # statically, we need to preload. We also need to preload any # dependent libraries so libltdl's deplib preloader doesn't # bomb out in the load deplibs phase. func_append dlprefiles " $lib $dependency_libs" else func_append newdlfiles " $lib" fi continue fi # $pass = dlopen # We need an absolute path. case $ladir in [\\/]* | [A-Za-z]:[\\/]*) abs_ladir=$ladir ;; *) abs_ladir=`cd "$ladir" && pwd` if test -z "$abs_ladir"; then func_warning "cannot determine absolute directory name of '$ladir'" func_warning "passing it literally to the linker, although it might fail" abs_ladir=$ladir fi ;; esac func_basename "$lib" laname=$func_basename_result # Find the relevant object directory and library name. if test yes = "$installed"; then if test ! -f "$lt_sysroot$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then func_warning "library '$lib' was moved." dir=$ladir absdir=$abs_ladir libdir=$abs_ladir else dir=$lt_sysroot$libdir absdir=$lt_sysroot$libdir fi test yes = "$hardcode_automatic" && avoidtemprpath=yes else if test ! -f "$ladir/$objdir/$linklib" && test -f "$abs_ladir/$linklib"; then dir=$ladir absdir=$abs_ladir # Remove this search path later func_append notinst_path " $abs_ladir" else dir=$ladir/$objdir absdir=$abs_ladir/$objdir # Remove this search path later func_append notinst_path " $abs_ladir" fi fi # $installed = yes func_stripname 'lib' '.la' "$laname" name=$func_stripname_result # This library was specified with -dlpreopen. if test dlpreopen = "$pass"; then if test -z "$libdir" && test prog = "$linkmode"; then func_fatal_error "only libraries may -dlpreopen a convenience library: '$lib'" fi case $host in # special handling for platforms with PE-DLLs. *cygwin* | *mingw* | *cegcc* ) # Linker will automatically link against shared library if both # static and shared are present. Therefore, ensure we extract # symbols from the import library if a shared library is present # (otherwise, the dlopen module name will be incorrect). We do # this by putting the import library name into $newdlprefiles. # We recover the dlopen module name by 'saving' the la file # name in a special purpose variable, and (later) extracting the # dlname from the la file. if test -n "$dlname"; then func_tr_sh "$dir/$linklib" eval "libfile_$func_tr_sh_result=\$abs_ladir/\$laname" func_append newdlprefiles " $dir/$linklib" else func_append newdlprefiles " $dir/$old_library" # Keep a list of preopened convenience libraries to check # that they are being used correctly in the link pass. test -z "$libdir" && \ func_append dlpreconveniencelibs " $dir/$old_library" fi ;; * ) # Prefer using a static library (so that no silly _DYNAMIC symbols # are required to link). if test -n "$old_library"; then func_append newdlprefiles " $dir/$old_library" # Keep a list of preopened convenience libraries to check # that they are being used correctly in the link pass. test -z "$libdir" && \ func_append dlpreconveniencelibs " $dir/$old_library" # Otherwise, use the dlname, so that lt_dlopen finds it. elif test -n "$dlname"; then func_append newdlprefiles " $dir/$dlname" else func_append newdlprefiles " $dir/$linklib" fi ;; esac fi # $pass = dlpreopen if test -z "$libdir"; then # Link the convenience library if test lib = "$linkmode"; then deplibs="$dir/$old_library $deplibs" elif test prog,link = "$linkmode,$pass"; then compile_deplibs="$dir/$old_library $compile_deplibs" finalize_deplibs="$dir/$old_library $finalize_deplibs" else deplibs="$lib $deplibs" # used for prog,scan pass fi continue fi if test prog = "$linkmode" && test link != "$pass"; then func_append newlib_search_path " $ladir" deplibs="$lib $deplibs" linkalldeplibs=false if test no != "$link_all_deplibs" || test -z "$library_names" || test no = "$build_libtool_libs"; then linkalldeplibs=: fi tmp_libs= for deplib in $dependency_libs; do case $deplib in -L*) func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; esac # Need to link against all dependency_libs? if $linkalldeplibs; then deplibs="$deplib $deplibs" else # Need to hardcode shared library paths # or/and link against static libraries newdependency_libs="$deplib $newdependency_libs" fi if $opt_preserve_dup_deps; then case "$tmp_libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append tmp_libs " $deplib" done # for deplib continue fi # $linkmode = prog... if test prog,link = "$linkmode,$pass"; then if test -n "$library_names" && { { test no = "$prefer_static_libs" || test built,yes = "$prefer_static_libs,$installed"; } || test -z "$old_library"; }; then # We need to hardcode the library path if test -n "$shlibpath_var" && test -z "$avoidtemprpath"; then # Make sure the rpath contains only unique directories. case $temp_rpath: in *"$absdir:"*) ;; *) func_append temp_rpath "$absdir:" ;; esac fi # Hardcode the library path. # Skip directories that are in the system default run-time # search path. case " $sys_lib_dlsearch_path " in *" $absdir "*) ;; *) case "$compile_rpath " in *" $absdir "*) ;; *) func_append compile_rpath " $absdir" ;; esac ;; esac case " $sys_lib_dlsearch_path " in *" $libdir "*) ;; *) case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac ;; esac fi # $linkmode,$pass = prog,link... if $alldeplibs && { test pass_all = "$deplibs_check_method" || { test yes = "$build_libtool_libs" && test -n "$library_names"; }; }; then # We only need to search for static libraries continue fi fi link_static=no # Whether the deplib will be linked statically use_static_libs=$prefer_static_libs if test built = "$use_static_libs" && test yes = "$installed"; then use_static_libs=no fi if test -n "$library_names" && { test no = "$use_static_libs" || test -z "$old_library"; }; then case $host in *cygwin* | *mingw* | *cegcc* | *os2*) # No point in relinking DLLs because paths are not encoded func_append notinst_deplibs " $lib" need_relink=no ;; *) if test no = "$installed"; then func_append notinst_deplibs " $lib" need_relink=yes fi ;; esac # This is a shared library # Warn about portability, can't link against -module's on some # systems (darwin). Don't bleat about dlopened modules though! dlopenmodule= for dlpremoduletest in $dlprefiles; do if test "X$dlpremoduletest" = "X$lib"; then dlopenmodule=$dlpremoduletest break fi done if test -z "$dlopenmodule" && test yes = "$shouldnotlink" && test link = "$pass"; then echo if test prog = "$linkmode"; then $ECHO "*** Warning: Linking the executable $output against the loadable module" else $ECHO "*** Warning: Linking the shared library $output against the loadable module" fi $ECHO "*** $linklib is not portable!" fi if test lib = "$linkmode" && test yes = "$hardcode_into_libs"; then # Hardcode the library path. # Skip directories that are in the system default run-time # search path. case " $sys_lib_dlsearch_path " in *" $absdir "*) ;; *) case "$compile_rpath " in *" $absdir "*) ;; *) func_append compile_rpath " $absdir" ;; esac ;; esac case " $sys_lib_dlsearch_path " in *" $libdir "*) ;; *) case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac ;; esac fi if test -n "$old_archive_from_expsyms_cmds"; then # figure out the soname set dummy $library_names shift realname=$1 shift libname=`eval "\\$ECHO \"$libname_spec\""` # use dlname if we got it. it's perfectly good, no? if test -n "$dlname"; then soname=$dlname elif test -n "$soname_spec"; then # bleh windows case $host in *cygwin* | mingw* | *cegcc* | *os2*) func_arith $current - $age major=$func_arith_result versuffix=-$major ;; esac eval soname=\"$soname_spec\" else soname=$realname fi # Make a new name for the extract_expsyms_cmds to use soroot=$soname func_basename "$soroot" soname=$func_basename_result func_stripname 'lib' '.dll' "$soname" newlib=libimp-$func_stripname_result.a # If the library has no export list, then create one now if test -f "$output_objdir/$soname-def"; then : else func_verbose "extracting exported symbol list from '$soname'" func_execute_cmds "$extract_expsyms_cmds" 'exit $?' fi # Create $newlib if test -f "$output_objdir/$newlib"; then :; else func_verbose "generating import library for '$soname'" func_execute_cmds "$old_archive_from_expsyms_cmds" 'exit $?' fi # make sure the library variables are pointing to the new library dir=$output_objdir linklib=$newlib fi # test -n "$old_archive_from_expsyms_cmds" if test prog = "$linkmode" || test relink != "$opt_mode"; then add_shlibpath= add_dir= add= lib_linked=yes case $hardcode_action in immediate | unsupported) if test no = "$hardcode_direct"; then add=$dir/$linklib case $host in *-*-sco3.2v5.0.[024]*) add_dir=-L$dir ;; *-*-sysv4*uw2*) add_dir=-L$dir ;; *-*-sysv5OpenUNIX* | *-*-sysv5UnixWare7.[01].[10]* | \ *-*-unixware7*) add_dir=-L$dir ;; *-*-darwin* ) # if the lib is a (non-dlopened) module then we cannot # link against it, someone is ignoring the earlier warnings if /usr/bin/file -L $add 2> /dev/null | $GREP ": [^:]* bundle" >/dev/null; then if test "X$dlopenmodule" != "X$lib"; then $ECHO "*** Warning: lib $linklib is a module, not a shared library" if test -z "$old_library"; then echo echo "*** And there doesn't seem to be a static archive available" echo "*** The link will probably fail, sorry" else add=$dir/$old_library fi elif test -n "$old_library"; then add=$dir/$old_library fi fi esac elif test no = "$hardcode_minus_L"; then case $host in *-*-sunos*) add_shlibpath=$dir ;; esac add_dir=-L$dir add=-l$name elif test no = "$hardcode_shlibpath_var"; then add_shlibpath=$dir add=-l$name else lib_linked=no fi ;; relink) if test yes = "$hardcode_direct" && test no = "$hardcode_direct_absolute"; then add=$dir/$linklib elif test yes = "$hardcode_minus_L"; then add_dir=-L$absdir # Try looking first in the location we're being installed to. if test -n "$inst_prefix_dir"; then case $libdir in [\\/]*) func_append add_dir " -L$inst_prefix_dir$libdir" ;; esac fi add=-l$name elif test yes = "$hardcode_shlibpath_var"; then add_shlibpath=$dir add=-l$name else lib_linked=no fi ;; *) lib_linked=no ;; esac if test yes != "$lib_linked"; then func_fatal_configuration "unsupported hardcode properties" fi if test -n "$add_shlibpath"; then case :$compile_shlibpath: in *":$add_shlibpath:"*) ;; *) func_append compile_shlibpath "$add_shlibpath:" ;; esac fi if test prog = "$linkmode"; then test -n "$add_dir" && compile_deplibs="$add_dir $compile_deplibs" test -n "$add" && compile_deplibs="$add $compile_deplibs" else test -n "$add_dir" && deplibs="$add_dir $deplibs" test -n "$add" && deplibs="$add $deplibs" if test yes != "$hardcode_direct" && test yes != "$hardcode_minus_L" && test yes = "$hardcode_shlibpath_var"; then case :$finalize_shlibpath: in *":$libdir:"*) ;; *) func_append finalize_shlibpath "$libdir:" ;; esac fi fi fi if test prog = "$linkmode" || test relink = "$opt_mode"; then add_shlibpath= add_dir= add= # Finalize command for both is simple: just hardcode it. if test yes = "$hardcode_direct" && test no = "$hardcode_direct_absolute"; then add=$libdir/$linklib elif test yes = "$hardcode_minus_L"; then add_dir=-L$libdir add=-l$name elif test yes = "$hardcode_shlibpath_var"; then case :$finalize_shlibpath: in *":$libdir:"*) ;; *) func_append finalize_shlibpath "$libdir:" ;; esac add=-l$name elif test yes = "$hardcode_automatic"; then if test -n "$inst_prefix_dir" && test -f "$inst_prefix_dir$libdir/$linklib"; then add=$inst_prefix_dir$libdir/$linklib else add=$libdir/$linklib fi else # We cannot seem to hardcode it, guess we'll fake it. add_dir=-L$libdir # Try looking first in the location we're being installed to. if test -n "$inst_prefix_dir"; then case $libdir in [\\/]*) func_append add_dir " -L$inst_prefix_dir$libdir" ;; esac fi add=-l$name fi if test prog = "$linkmode"; then test -n "$add_dir" && finalize_deplibs="$add_dir $finalize_deplibs" test -n "$add" && finalize_deplibs="$add $finalize_deplibs" else test -n "$add_dir" && deplibs="$add_dir $deplibs" test -n "$add" && deplibs="$add $deplibs" fi fi elif test prog = "$linkmode"; then # Here we assume that one of hardcode_direct or hardcode_minus_L # is not unsupported. This is valid on all known static and # shared platforms. if test unsupported != "$hardcode_direct"; then test -n "$old_library" && linklib=$old_library compile_deplibs="$dir/$linklib $compile_deplibs" finalize_deplibs="$dir/$linklib $finalize_deplibs" else compile_deplibs="-l$name -L$dir $compile_deplibs" finalize_deplibs="-l$name -L$dir $finalize_deplibs" fi elif test yes = "$build_libtool_libs"; then # Not a shared library if test pass_all != "$deplibs_check_method"; then # We're trying link a shared library against a static one # but the system doesn't support it. # Just print a warning and add the library to dependency_libs so # that the program can be linked against the static library. echo $ECHO "*** Warning: This system cannot link to static lib archive $lib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have." if test yes = "$module"; then echo "*** But as you try to build a module library, libtool will still create " echo "*** a static module, that should work as long as the dlopening application" echo "*** is linked with the -dlopen flag to resolve symbols at runtime." if test -z "$global_symbol_pipe"; then echo echo "*** However, this would only work if libtool was able to extract symbol" echo "*** lists from a program, using 'nm' or equivalent, but libtool could" echo "*** not find such a program. So, this module is probably useless." echo "*** 'nm' from GNU binutils and a full rebuild may help." fi if test no = "$build_old_libs"; then build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi fi else deplibs="$dir/$old_library $deplibs" link_static=yes fi fi # link shared/static library? if test lib = "$linkmode"; then if test -n "$dependency_libs" && { test yes != "$hardcode_into_libs" || test yes = "$build_old_libs" || test yes = "$link_static"; }; then # Extract -R from dependency_libs temp_deplibs= for libdir in $dependency_libs; do case $libdir in -R*) func_stripname '-R' '' "$libdir" temp_xrpath=$func_stripname_result case " $xrpath " in *" $temp_xrpath "*) ;; *) func_append xrpath " $temp_xrpath";; esac;; *) func_append temp_deplibs " $libdir";; esac done dependency_libs=$temp_deplibs fi func_append newlib_search_path " $absdir" # Link against this library test no = "$link_static" && newdependency_libs="$abs_ladir/$laname $newdependency_libs" # ... and its dependency_libs tmp_libs= for deplib in $dependency_libs; do newdependency_libs="$deplib $newdependency_libs" case $deplib in -L*) func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result";; *) func_resolve_sysroot "$deplib" ;; esac if $opt_preserve_dup_deps; then case "$tmp_libs " in *" $func_resolve_sysroot_result "*) func_append specialdeplibs " $func_resolve_sysroot_result" ;; esac fi func_append tmp_libs " $func_resolve_sysroot_result" done if test no != "$link_all_deplibs"; then # Add the search paths of all dependency libraries for deplib in $dependency_libs; do path= case $deplib in -L*) path=$deplib ;; *.la) func_resolve_sysroot "$deplib" deplib=$func_resolve_sysroot_result func_dirname "$deplib" "" "." dir=$func_dirname_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) absdir=$dir ;; *) absdir=`cd "$dir" && pwd` if test -z "$absdir"; then func_warning "cannot determine absolute directory name of '$dir'" absdir=$dir fi ;; esac if $GREP "^installed=no" $deplib > /dev/null; then case $host in *-*-darwin*) depdepl= eval deplibrary_names=`$SED -n -e 's/^library_names=\(.*\)$/\1/p' $deplib` if test -n "$deplibrary_names"; then for tmp in $deplibrary_names; do depdepl=$tmp done if test -f "$absdir/$objdir/$depdepl"; then depdepl=$absdir/$objdir/$depdepl darwin_install_name=`$OTOOL -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` if test -z "$darwin_install_name"; then darwin_install_name=`$OTOOL64 -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` fi func_append compiler_flags " $wl-dylib_file $wl$darwin_install_name:$depdepl" func_append linker_flags " -dylib_file $darwin_install_name:$depdepl" path= fi fi ;; *) path=-L$absdir/$objdir ;; esac else eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` test -z "$libdir" && \ func_fatal_error "'$deplib' is not a valid libtool archive" test "$absdir" != "$libdir" && \ func_warning "'$deplib' seems to be moved" path=-L$absdir fi ;; esac case " $deplibs " in *" $path "*) ;; *) deplibs="$path $deplibs" ;; esac done fi # link_all_deplibs != no fi # linkmode = lib done # for deplib in $libs if test link = "$pass"; then if test prog = "$linkmode"; then compile_deplibs="$new_inherited_linker_flags $compile_deplibs" finalize_deplibs="$new_inherited_linker_flags $finalize_deplibs" else compiler_flags="$compiler_flags "`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` fi fi dependency_libs=$newdependency_libs if test dlpreopen = "$pass"; then # Link the dlpreopened libraries before other libraries for deplib in $save_deplibs; do deplibs="$deplib $deplibs" done fi if test dlopen != "$pass"; then test conv = "$pass" || { # Make sure lib_search_path contains only unique directories. lib_search_path= for dir in $newlib_search_path; do case "$lib_search_path " in *" $dir "*) ;; *) func_append lib_search_path " $dir" ;; esac done newlib_search_path= } if test prog,link = "$linkmode,$pass"; then vars="compile_deplibs finalize_deplibs" else vars=deplibs fi for var in $vars dependency_libs; do # Add libraries to $var in reverse order eval tmp_libs=\"\$$var\" new_libs= for deplib in $tmp_libs; do # FIXME: Pedantically, this is the right thing to do, so # that some nasty dependency loop isn't accidentally # broken: #new_libs="$deplib $new_libs" # Pragmatically, this seems to cause very few problems in # practice: case $deplib in -L*) new_libs="$deplib $new_libs" ;; -R*) ;; *) # And here is the reason: when a library appears more # than once as an explicit dependence of a library, or # is implicitly linked in more than once by the # compiler, it is considered special, and multiple # occurrences thereof are not removed. Compare this # with having the same library being listed as a # dependency of multiple other libraries: in this case, # we know (pedantically, we assume) the library does not # need to be listed more than once, so we keep only the # last copy. This is not always right, but it is rare # enough that we require users that really mean to play # such unportable linking tricks to link the library # using -Wl,-lname, so that libtool does not consider it # for duplicate removal. case " $specialdeplibs " in *" $deplib "*) new_libs="$deplib $new_libs" ;; *) case " $new_libs " in *" $deplib "*) ;; *) new_libs="$deplib $new_libs" ;; esac ;; esac ;; esac done tmp_libs= for deplib in $new_libs; do case $deplib in -L*) case " $tmp_libs " in *" $deplib "*) ;; *) func_append tmp_libs " $deplib" ;; esac ;; *) func_append tmp_libs " $deplib" ;; esac done eval $var=\"$tmp_libs\" done # for var fi # Add Sun CC postdeps if required: test CXX = "$tagname" && { case $host_os in linux*) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 func_suncc_cstd_abi if test no != "$suncc_use_cstd_abi"; then func_append postdeps ' -library=Cstd -library=Crun' fi ;; esac ;; solaris*) func_cc_basename "$CC" case $func_cc_basename_result in CC* | sunCC*) func_suncc_cstd_abi if test no != "$suncc_use_cstd_abi"; then func_append postdeps ' -library=Cstd -library=Crun' fi ;; esac ;; esac } # Last step: remove runtime libs from dependency_libs # (they stay in deplibs) tmp_libs= for i in $dependency_libs; do case " $predeps $postdeps $compiler_lib_search_path " in *" $i "*) i= ;; esac if test -n "$i"; then func_append tmp_libs " $i" fi done dependency_libs=$tmp_libs done # for pass if test prog = "$linkmode"; then dlfiles=$newdlfiles fi if test prog = "$linkmode" || test lib = "$linkmode"; then dlprefiles=$newdlprefiles fi case $linkmode in oldlib) if test -n "$dlfiles$dlprefiles" || test no != "$dlself"; then func_warning "'-dlopen' is ignored for archives" fi case " $deplibs" in *\ -l* | *\ -L*) func_warning "'-l' and '-L' are ignored for archives" ;; esac test -n "$rpath" && \ func_warning "'-rpath' is ignored for archives" test -n "$xrpath" && \ func_warning "'-R' is ignored for archives" test -n "$vinfo" && \ func_warning "'-version-info/-version-number' is ignored for archives" test -n "$release" && \ func_warning "'-release' is ignored for archives" test -n "$export_symbols$export_symbols_regex" && \ func_warning "'-export-symbols' is ignored for archives" # Now set the variables for building old libraries. build_libtool_libs=no oldlibs=$output func_append objs "$old_deplibs" ;; lib) # Make sure we only generate libraries of the form 'libNAME.la'. case $outputname in lib*) func_stripname 'lib' '.la' "$outputname" name=$func_stripname_result eval shared_ext=\"$shrext_cmds\" eval libname=\"$libname_spec\" ;; *) test no = "$module" \ && func_fatal_help "libtool library '$output' must begin with 'lib'" if test no != "$need_lib_prefix"; then # Add the "lib" prefix for modules if required func_stripname '' '.la' "$outputname" name=$func_stripname_result eval shared_ext=\"$shrext_cmds\" eval libname=\"$libname_spec\" else func_stripname '' '.la' "$outputname" libname=$func_stripname_result fi ;; esac if test -n "$objs"; then if test pass_all != "$deplibs_check_method"; then func_fatal_error "cannot build libtool library '$output' from non-libtool objects on this host:$objs" else echo $ECHO "*** Warning: Linking the shared library $output against the non-libtool" $ECHO "*** objects $objs is not portable!" func_append libobjs " $objs" fi fi test no = "$dlself" \ || func_warning "'-dlopen self' is ignored for libtool libraries" set dummy $rpath shift test 1 -lt "$#" \ && func_warning "ignoring multiple '-rpath's for a libtool library" install_libdir=$1 oldlibs= if test -z "$rpath"; then if test yes = "$build_libtool_libs"; then # Building a libtool convenience library. # Some compilers have problems with a '.al' extension so # convenience libraries should have the same extension an # archive normally would. oldlibs="$output_objdir/$libname.$libext $oldlibs" build_libtool_libs=convenience build_old_libs=yes fi test -n "$vinfo" && \ func_warning "'-version-info/-version-number' is ignored for convenience libraries" test -n "$release" && \ func_warning "'-release' is ignored for convenience libraries" else # Parse the version information argument. save_ifs=$IFS; IFS=: set dummy $vinfo 0 0 0 shift IFS=$save_ifs test -n "$7" && \ func_fatal_help "too many parameters to '-version-info'" # convert absolute version numbers to libtool ages # this retains compatibility with .la files and attempts # to make the code below a bit more comprehensible case $vinfo_number in yes) number_major=$1 number_minor=$2 number_revision=$3 # # There are really only two kinds -- those that # use the current revision as the major version # and those that subtract age and use age as # a minor version. But, then there is irix # that has an extra 1 added just for fun # case $version_type in # correct linux to gnu/linux during the next big refactor darwin|freebsd-elf|linux|osf|windows|none) func_arith $number_major + $number_minor current=$func_arith_result age=$number_minor revision=$number_revision ;; freebsd-aout|qnx|sunos) current=$number_major revision=$number_minor age=0 ;; irix|nonstopux) func_arith $number_major + $number_minor current=$func_arith_result age=$number_minor revision=$number_minor lt_irix_increment=no ;; esac ;; no) current=$1 revision=$2 age=$3 ;; esac # Check that each of the things are valid numbers. case $current in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "CURRENT '$current' must be a nonnegative integer" func_fatal_error "'$vinfo' is not valid version information" ;; esac case $revision in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "REVISION '$revision' must be a nonnegative integer" func_fatal_error "'$vinfo' is not valid version information" ;; esac case $age in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "AGE '$age' must be a nonnegative integer" func_fatal_error "'$vinfo' is not valid version information" ;; esac if test "$age" -gt "$current"; then func_error "AGE '$age' is greater than the current interface number '$current'" func_fatal_error "'$vinfo' is not valid version information" fi # Calculate the version variables. major= versuffix= verstring= case $version_type in none) ;; darwin) # Like Linux, but with the current version available in # verstring for coding it into the library header func_arith $current - $age major=.$func_arith_result versuffix=$major.$age.$revision # Darwin ld doesn't like 0 for these options... func_arith $current + 1 minor_current=$func_arith_result xlcverstring="$wl-compatibility_version $wl$minor_current $wl-current_version $wl$minor_current.$revision" verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" # On Darwin other compilers case $CC in nagfor*) verstring="$wl-compatibility_version $wl$minor_current $wl-current_version $wl$minor_current.$revision" ;; *) verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" ;; esac ;; freebsd-aout) major=.$current versuffix=.$current.$revision ;; freebsd-elf) func_arith $current - $age major=.$func_arith_result versuffix=$major.$age.$revision ;; irix | nonstopux) if test no = "$lt_irix_increment"; then func_arith $current - $age else func_arith $current - $age + 1 fi major=$func_arith_result case $version_type in nonstopux) verstring_prefix=nonstopux ;; *) verstring_prefix=sgi ;; esac verstring=$verstring_prefix$major.$revision # Add in all the interfaces that we are compatible with. loop=$revision while test 0 -ne "$loop"; do func_arith $revision - $loop iface=$func_arith_result func_arith $loop - 1 loop=$func_arith_result verstring=$verstring_prefix$major.$iface:$verstring done # Before this point, $major must not contain '.'. major=.$major versuffix=$major.$revision ;; linux) # correct to gnu/linux during the next big refactor func_arith $current - $age major=.$func_arith_result versuffix=$major.$age.$revision ;; osf) func_arith $current - $age major=.$func_arith_result versuffix=.$current.$age.$revision verstring=$current.$age.$revision # Add in all the interfaces that we are compatible with. loop=$age while test 0 -ne "$loop"; do func_arith $current - $loop iface=$func_arith_result func_arith $loop - 1 loop=$func_arith_result verstring=$verstring:$iface.0 done # Make executables depend on our current version. func_append verstring ":$current.0" ;; qnx) major=.$current versuffix=.$current ;; sco) major=.$current versuffix=.$current ;; sunos) major=.$current versuffix=.$current.$revision ;; windows) # Use '-' rather than '.', since we only want one # extension on DOS 8.3 file systems. func_arith $current - $age major=$func_arith_result versuffix=-$major ;; *) func_fatal_configuration "unknown library version type '$version_type'" ;; esac # Clear the version info if we defaulted, and they specified a release. if test -z "$vinfo" && test -n "$release"; then major= case $version_type in darwin) # we can't check for "0.0" in archive_cmds due to quoting # problems, so we reset it completely verstring= ;; *) verstring=0.0 ;; esac if test no = "$need_version"; then versuffix= else versuffix=.0.0 fi fi # Remove version info from name if versioning should be avoided if test yes,no = "$avoid_version,$need_version"; then major= versuffix= verstring= fi # Check to see if the archive will have undefined symbols. if test yes = "$allow_undefined"; then if test unsupported = "$allow_undefined_flag"; then if test yes = "$build_old_libs"; then func_warning "undefined symbols not allowed in $host shared libraries; building static only" build_libtool_libs=no else func_fatal_error "can't build $host shared library unless -no-undefined is specified" fi fi else # Don't allow undefined symbols. allow_undefined_flag=$no_undefined_flag fi fi func_generate_dlsyms "$libname" "$libname" : func_append libobjs " $symfileobj" test " " = "$libobjs" && libobjs= if test relink != "$opt_mode"; then # Remove our outputs, but don't remove object files since they # may have been created when compiling PIC objects. removelist= tempremovelist=`$ECHO "$output_objdir/*"` for p in $tempremovelist; do case $p in *.$objext | *.gcno) ;; $output_objdir/$outputname | $output_objdir/$libname.* | $output_objdir/$libname$release.*) if test -n "$precious_files_regex"; then if $ECHO "$p" | $EGREP -e "$precious_files_regex" >/dev/null 2>&1 then continue fi fi func_append removelist " $p" ;; *) ;; esac done test -n "$removelist" && \ func_show_eval "${RM}r \$removelist" fi # Now set the variables for building old libraries. if test yes = "$build_old_libs" && test convenience != "$build_libtool_libs"; then func_append oldlibs " $output_objdir/$libname.$libext" # Transform .lo files to .o files. oldobjs="$objs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.$libext$/d; $lo2o" | $NL2SP` fi # Eliminate all temporary directories. #for path in $notinst_path; do # lib_search_path=`$ECHO "$lib_search_path " | $SED "s% $path % %g"` # deplibs=`$ECHO "$deplibs " | $SED "s% -L$path % %g"` # dependency_libs=`$ECHO "$dependency_libs " | $SED "s% -L$path % %g"` #done if test -n "$xrpath"; then # If the user specified any rpath flags, then add them. temp_xrpath= for libdir in $xrpath; do func_replace_sysroot "$libdir" func_append temp_xrpath " -R$func_replace_sysroot_result" case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac done if test yes != "$hardcode_into_libs" || test yes = "$build_old_libs"; then dependency_libs="$temp_xrpath $dependency_libs" fi fi # Make sure dlfiles contains only unique files that won't be dlpreopened old_dlfiles=$dlfiles dlfiles= for lib in $old_dlfiles; do case " $dlprefiles $dlfiles " in *" $lib "*) ;; *) func_append dlfiles " $lib" ;; esac done # Make sure dlprefiles contains only unique files old_dlprefiles=$dlprefiles dlprefiles= for lib in $old_dlprefiles; do case "$dlprefiles " in *" $lib "*) ;; *) func_append dlprefiles " $lib" ;; esac done if test yes = "$build_libtool_libs"; then if test -n "$rpath"; then case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos* | *-cegcc* | *-*-haiku*) # these systems don't actually have a c library (as such)! ;; *-*-rhapsody* | *-*-darwin1.[012]) # Rhapsody C library is in the System framework func_append deplibs " System.ltframework" ;; *-*-netbsd*) # Don't link with libc until the a.out ld.so is fixed. ;; *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) # Do not include libc due to us having libc/libc_r. ;; *-*-sco3.2v5* | *-*-sco5v6*) # Causes problems with __ctype ;; *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) # Compiler inserts libc in the correct place for threads to work ;; *) # Add libc to deplibs on all other systems if necessary. if test yes = "$build_libtool_need_lc"; then func_append deplibs " -lc" fi ;; esac fi # Transform deplibs into only deplibs that can be linked in shared. name_save=$name libname_save=$libname release_save=$release versuffix_save=$versuffix major_save=$major # I'm not sure if I'm treating the release correctly. I think # release should show up in the -l (ie -lgmp5) so we don't want to # add it in twice. Is that correct? release= versuffix= major= newdeplibs= droppeddeps=no case $deplibs_check_method in pass_all) # Don't check for shared/static. Everything works. # This might be a little naive. We might want to check # whether the library exists or not. But this is on # osf3 & osf4 and I'm not really sure... Just # implementing what was already the behavior. newdeplibs=$deplibs ;; test_compile) # This code stresses the "libraries are programs" paradigm to its # limits. Maybe even breaks it. We compile a program, linking it # against the deplibs as a proxy for the library. Then we can check # whether they linked in statically or dynamically with ldd. $opt_dry_run || $RM conftest.c cat > conftest.c </dev/null` $nocaseglob else potential_libs=`ls $i/$libnameglob[.-]* 2>/dev/null` fi for potent_lib in $potential_libs; do # Follow soft links. if ls -lLd "$potent_lib" 2>/dev/null | $GREP " -> " >/dev/null; then continue fi # The statement above tries to avoid entering an # endless loop below, in case of cyclic links. # We might still enter an endless loop, since a link # loop can be closed while we follow links, # but so what? potlib=$potent_lib while test -h "$potlib" 2>/dev/null; do potliblink=`ls -ld $potlib | $SED 's/.* -> //'` case $potliblink in [\\/]* | [A-Za-z]:[\\/]*) potlib=$potliblink;; *) potlib=`$ECHO "$potlib" | $SED 's|[^/]*$||'`"$potliblink";; esac done if eval $file_magic_cmd \"\$potlib\" 2>/dev/null | $SED -e 10q | $EGREP "$file_magic_regex" > /dev/null; then func_append newdeplibs " $a_deplib" a_deplib= break 2 fi done done fi if test -n "$a_deplib"; then droppeddeps=yes echo $ECHO "*** Warning: linker path does not have real file for library $a_deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because I did check the linker path looking for a file starting" if test -z "$potlib"; then $ECHO "*** with $libname but no candidates were found. (...for file magic test)" else $ECHO "*** with $libname and none of the candidates passed a file format test" $ECHO "*** using a file magic. Last file checked: $potlib" fi fi ;; *) # Add a -L argument. func_append newdeplibs " $a_deplib" ;; esac done # Gone through all deplibs. ;; match_pattern*) set dummy $deplibs_check_method; shift match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` for a_deplib in $deplibs; do case $a_deplib in -l*) func_stripname -l '' "$a_deplib" name=$func_stripname_result if test yes = "$allow_libtool_libs_with_static_runtimes"; then case " $predeps $postdeps " in *" $a_deplib "*) func_append newdeplibs " $a_deplib" a_deplib= ;; esac fi if test -n "$a_deplib"; then libname=`eval "\\$ECHO \"$libname_spec\""` for i in $lib_search_path $sys_lib_search_path $shlib_search_path; do potential_libs=`ls $i/$libname[.-]* 2>/dev/null` for potent_lib in $potential_libs; do potlib=$potent_lib # see symlink-check above in file_magic test if eval "\$ECHO \"$potent_lib\"" 2>/dev/null | $SED 10q | \ $EGREP "$match_pattern_regex" > /dev/null; then func_append newdeplibs " $a_deplib" a_deplib= break 2 fi done done fi if test -n "$a_deplib"; then droppeddeps=yes echo $ECHO "*** Warning: linker path does not have real file for library $a_deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because I did check the linker path looking for a file starting" if test -z "$potlib"; then $ECHO "*** with $libname but no candidates were found. (...for regex pattern test)" else $ECHO "*** with $libname and none of the candidates passed a file format test" $ECHO "*** using a regex pattern. Last file checked: $potlib" fi fi ;; *) # Add a -L argument. func_append newdeplibs " $a_deplib" ;; esac done # Gone through all deplibs. ;; none | unknown | *) newdeplibs= tmp_deplibs=`$ECHO " $deplibs" | $SED 's/ -lc$//; s/ -[LR][^ ]*//g'` if test yes = "$allow_libtool_libs_with_static_runtimes"; then for i in $predeps $postdeps; do # can't use Xsed below, because $i might contain '/' tmp_deplibs=`$ECHO " $tmp_deplibs" | $SED "s|$i||"` done fi case $tmp_deplibs in *[!\ \ ]*) echo if test none = "$deplibs_check_method"; then echo "*** Warning: inter-library dependencies are not supported in this platform." else echo "*** Warning: inter-library dependencies are not known to be supported." fi echo "*** All declared inter-library dependencies are being dropped." droppeddeps=yes ;; esac ;; esac versuffix=$versuffix_save major=$major_save release=$release_save libname=$libname_save name=$name_save case $host in *-*-rhapsody* | *-*-darwin1.[012]) # On Rhapsody replace the C library with the System framework newdeplibs=`$ECHO " $newdeplibs" | $SED 's/ -lc / System.ltframework /'` ;; esac if test yes = "$droppeddeps"; then if test yes = "$module"; then echo echo "*** Warning: libtool could not satisfy all declared inter-library" $ECHO "*** dependencies of module $libname. Therefore, libtool will create" echo "*** a static module, that should work as long as the dlopening" echo "*** application is linked with the -dlopen flag." if test -z "$global_symbol_pipe"; then echo echo "*** However, this would only work if libtool was able to extract symbol" echo "*** lists from a program, using 'nm' or equivalent, but libtool could" echo "*** not find such a program. So, this module is probably useless." echo "*** 'nm' from GNU binutils and a full rebuild may help." fi if test no = "$build_old_libs"; then oldlibs=$output_objdir/$libname.$libext build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi else echo "*** The inter-library dependencies that have been dropped here will be" echo "*** automatically added whenever a program is linked with this library" echo "*** or is declared to -dlopen it." if test no = "$allow_undefined"; then echo echo "*** Since this library must not contain undefined symbols," echo "*** because either the platform does not support them or" echo "*** it was explicitly requested with -no-undefined," echo "*** libtool will only create a static version of it." if test no = "$build_old_libs"; then oldlibs=$output_objdir/$libname.$libext build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi fi fi fi # Done checking deplibs! deplibs=$newdeplibs fi # Time to change all our "foo.ltframework" stuff back to "-framework foo" case $host in *-*-darwin*) newdeplibs=`$ECHO " $newdeplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` new_inherited_linker_flags=`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` deplibs=`$ECHO " $deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` ;; esac # move library search paths that coincide with paths to not yet # installed libraries to the beginning of the library search list new_libs= for path in $notinst_path; do case " $new_libs " in *" -L$path/$objdir "*) ;; *) case " $deplibs " in *" -L$path/$objdir "*) func_append new_libs " -L$path/$objdir" ;; esac ;; esac done for deplib in $deplibs; do case $deplib in -L*) case " $new_libs " in *" $deplib "*) ;; *) func_append new_libs " $deplib" ;; esac ;; *) func_append new_libs " $deplib" ;; esac done deplibs=$new_libs # All the library-specific variables (install_libdir is set above). library_names= old_library= dlname= # Test again, we may have decided not to build it any more if test yes = "$build_libtool_libs"; then # Remove $wl instances when linking with ld. # FIXME: should test the right _cmds variable. case $archive_cmds in *\$LD\ *) wl= ;; esac if test yes = "$hardcode_into_libs"; then # Hardcode the library paths hardcode_libdirs= dep_rpath= rpath=$finalize_rpath test relink = "$opt_mode" || rpath=$compile_rpath$rpath for libdir in $rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then func_replace_sysroot "$libdir" libdir=$func_replace_sysroot_result if test -z "$hardcode_libdirs"; then hardcode_libdirs=$libdir else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append dep_rpath " $flag" fi elif test -n "$runpath_var"; then case "$perm_rpath " in *" $libdir "*) ;; *) func_append perm_rpath " $libdir" ;; esac fi done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir=$hardcode_libdirs eval "dep_rpath=\"$hardcode_libdir_flag_spec\"" fi if test -n "$runpath_var" && test -n "$perm_rpath"; then # We should set the runpath_var. rpath= for dir in $perm_rpath; do func_append rpath "$dir:" done eval "$runpath_var='$rpath\$$runpath_var'; export $runpath_var" fi test -n "$dep_rpath" && deplibs="$dep_rpath $deplibs" fi shlibpath=$finalize_shlibpath test relink = "$opt_mode" || shlibpath=$compile_shlibpath$shlibpath if test -n "$shlibpath"; then eval "$shlibpath_var='$shlibpath\$$shlibpath_var'; export $shlibpath_var" fi # Get the real and link names of the library. eval shared_ext=\"$shrext_cmds\" eval library_names=\"$library_names_spec\" set dummy $library_names shift realname=$1 shift if test -n "$soname_spec"; then eval soname=\"$soname_spec\" else soname=$realname fi if test -z "$dlname"; then dlname=$soname fi lib=$output_objdir/$realname linknames= for link do func_append linknames " $link" done # Use standard objects if they are pic test -z "$pic_flag" && libobjs=`$ECHO "$libobjs" | $SP2NL | $SED "$lo2o" | $NL2SP` test "X$libobjs" = "X " && libobjs= delfiles= if test -n "$export_symbols" && test -n "$include_expsyms"; then $opt_dry_run || cp "$export_symbols" "$output_objdir/$libname.uexp" export_symbols=$output_objdir/$libname.uexp func_append delfiles " $export_symbols" fi orig_export_symbols= case $host_os in cygwin* | mingw* | cegcc*) if test -n "$export_symbols" && test -z "$export_symbols_regex"; then # exporting using user supplied symfile func_dll_def_p "$export_symbols" || { # and it's NOT already a .def file. Must figure out # which of the given symbols are data symbols and tag # them as such. So, trigger use of export_symbols_cmds. # export_symbols gets reassigned inside the "prepare # the list of exported symbols" if statement, so the # include_expsyms logic still works. orig_export_symbols=$export_symbols export_symbols= always_export_symbols=yes } fi ;; esac # Prepare the list of exported symbols if test -z "$export_symbols"; then if test yes = "$always_export_symbols" || test -n "$export_symbols_regex"; then func_verbose "generating symbol list for '$libname.la'" export_symbols=$output_objdir/$libname.exp $opt_dry_run || $RM $export_symbols cmds=$export_symbols_cmds save_ifs=$IFS; IFS='~' for cmd1 in $cmds; do IFS=$save_ifs # Take the normal branch if the nm_file_list_spec branch # doesn't work or if tool conversion is not needed. case $nm_file_list_spec~$to_tool_file_cmd in *~func_convert_file_noop | *~func_convert_file_msys_to_w32 | ~*) try_normal_branch=yes eval cmd=\"$cmd1\" func_len " $cmd" len=$func_len_result ;; *) try_normal_branch=no ;; esac if test yes = "$try_normal_branch" \ && { test "$len" -lt "$max_cmd_len" \ || test "$max_cmd_len" -le -1; } then func_show_eval "$cmd" 'exit $?' skipped_export=false elif test -n "$nm_file_list_spec"; then func_basename "$output" output_la=$func_basename_result save_libobjs=$libobjs save_output=$output output=$output_objdir/$output_la.nm func_to_tool_file "$output" libobjs=$nm_file_list_spec$func_to_tool_file_result func_append delfiles " $output" func_verbose "creating $NM input file list: $output" for obj in $save_libobjs; do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" done > "$output" eval cmd=\"$cmd1\" func_show_eval "$cmd" 'exit $?' output=$save_output libobjs=$save_libobjs skipped_export=false else # The command line is too long to execute in one step. func_verbose "using reloadable object file for export list..." skipped_export=: # Break out early, otherwise skipped_export may be # set to false by a later but shorter cmd. break fi done IFS=$save_ifs if test -n "$export_symbols_regex" && test : != "$skipped_export"; then func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' func_show_eval '$MV "${export_symbols}T" "$export_symbols"' fi fi fi if test -n "$export_symbols" && test -n "$include_expsyms"; then tmp_export_symbols=$export_symbols test -n "$orig_export_symbols" && tmp_export_symbols=$orig_export_symbols $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' fi if test : != "$skipped_export" && test -n "$orig_export_symbols"; then # The given exports_symbols file has to be filtered, so filter it. func_verbose "filter symbol list for '$libname.la' to tag DATA exports" # FIXME: $output_objdir/$libname.filter potentially contains lots of # 's' commands, which not all seds can handle. GNU sed should be fine # though. Also, the filter scales superlinearly with the number of # global variables. join(1) would be nice here, but unfortunately # isn't a blessed tool. $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter func_append delfiles " $export_symbols $output_objdir/$libname.filter" export_symbols=$output_objdir/$libname.def $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols fi tmp_deplibs= for test_deplib in $deplibs; do case " $convenience " in *" $test_deplib "*) ;; *) func_append tmp_deplibs " $test_deplib" ;; esac done deplibs=$tmp_deplibs if test -n "$convenience"; then if test -n "$whole_archive_flag_spec" && test yes = "$compiler_needs_object" && test -z "$libobjs"; then # extract the archives, so we have objects to list. # TODO: could optimize this to just extract one archive. whole_archive_flag_spec= fi if test -n "$whole_archive_flag_spec"; then save_libobjs=$libobjs eval libobjs=\"\$libobjs $whole_archive_flag_spec\" test "X$libobjs" = "X " && libobjs= else gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $convenience func_append libobjs " $func_extract_archives_result" test "X$libobjs" = "X " && libobjs= fi fi if test yes = "$thread_safe" && test -n "$thread_safe_flag_spec"; then eval flag=\"$thread_safe_flag_spec\" func_append linker_flags " $flag" fi # Make a backup of the uninstalled library when relinking if test relink = "$opt_mode"; then $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}U && $MV $realname ${realname}U)' || exit $? fi # Do each of the archive commands. if test yes = "$module" && test -n "$module_cmds"; then if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then eval test_cmds=\"$module_expsym_cmds\" cmds=$module_expsym_cmds else eval test_cmds=\"$module_cmds\" cmds=$module_cmds fi else if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then eval test_cmds=\"$archive_expsym_cmds\" cmds=$archive_expsym_cmds else eval test_cmds=\"$archive_cmds\" cmds=$archive_cmds fi fi if test : != "$skipped_export" && func_len " $test_cmds" && len=$func_len_result && test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then : else # The command line is too long to link in one step, link piecewise # or, if using GNU ld and skipped_export is not :, use a linker # script. # Save the value of $output and $libobjs because we want to # use them later. If we have whole_archive_flag_spec, we # want to use save_libobjs as it was before # whole_archive_flag_spec was expanded, because we can't # assume the linker understands whole_archive_flag_spec. # This may have to be revisited, in case too many # convenience libraries get linked in and end up exceeding # the spec. if test -z "$convenience" || test -z "$whole_archive_flag_spec"; then save_libobjs=$libobjs fi save_output=$output func_basename "$output" output_la=$func_basename_result # Clear the reloadable object creation command queue and # initialize k to one. test_cmds= concat_cmds= objlist= last_robj= k=1 if test -n "$save_libobjs" && test : != "$skipped_export" && test yes = "$with_gnu_ld"; then output=$output_objdir/$output_la.lnkscript func_verbose "creating GNU ld script: $output" echo 'INPUT (' > $output for obj in $save_libobjs do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" >> $output done echo ')' >> $output func_append delfiles " $output" func_to_tool_file "$output" output=$func_to_tool_file_result elif test -n "$save_libobjs" && test : != "$skipped_export" && test -n "$file_list_spec"; then output=$output_objdir/$output_la.lnk func_verbose "creating linker input file list: $output" : > $output set x $save_libobjs shift firstobj= if test yes = "$compiler_needs_object"; then firstobj="$1 " shift fi for obj do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" >> $output done func_append delfiles " $output" func_to_tool_file "$output" output=$firstobj\"$file_list_spec$func_to_tool_file_result\" else if test -n "$save_libobjs"; then func_verbose "creating reloadable object files..." output=$output_objdir/$output_la-$k.$objext eval test_cmds=\"$reload_cmds\" func_len " $test_cmds" len0=$func_len_result len=$len0 # Loop over the list of objects to be linked. for obj in $save_libobjs do func_len " $obj" func_arith $len + $func_len_result len=$func_arith_result if test -z "$objlist" || test "$len" -lt "$max_cmd_len"; then func_append objlist " $obj" else # The command $test_cmds is almost too long, add a # command to the queue. if test 1 -eq "$k"; then # The first file doesn't have a previous command to add. reload_objs=$objlist eval concat_cmds=\"$reload_cmds\" else # All subsequent reloadable object files will link in # the last one created. reload_objs="$objlist $last_robj" eval concat_cmds=\"\$concat_cmds~$reload_cmds~\$RM $last_robj\" fi last_robj=$output_objdir/$output_la-$k.$objext func_arith $k + 1 k=$func_arith_result output=$output_objdir/$output_la-$k.$objext objlist=" $obj" func_len " $last_robj" func_arith $len0 + $func_len_result len=$func_arith_result fi done # Handle the remaining objects by creating one last # reloadable object file. All subsequent reloadable object # files will link in the last one created. test -z "$concat_cmds" || concat_cmds=$concat_cmds~ reload_objs="$objlist $last_robj" eval concat_cmds=\"\$concat_cmds$reload_cmds\" if test -n "$last_robj"; then eval concat_cmds=\"\$concat_cmds~\$RM $last_robj\" fi func_append delfiles " $output" else output= fi ${skipped_export-false} && { func_verbose "generating symbol list for '$libname.la'" export_symbols=$output_objdir/$libname.exp $opt_dry_run || $RM $export_symbols libobjs=$output # Append the command to create the export file. test -z "$concat_cmds" || concat_cmds=$concat_cmds~ eval concat_cmds=\"\$concat_cmds$export_symbols_cmds\" if test -n "$last_robj"; then eval concat_cmds=\"\$concat_cmds~\$RM $last_robj\" fi } test -n "$save_libobjs" && func_verbose "creating a temporary reloadable object file: $output" # Loop through the commands generated above and execute them. save_ifs=$IFS; IFS='~' for cmd in $concat_cmds; do IFS=$save_ifs $opt_quiet || { func_quote_for_expand "$cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || eval "$cmd" || { lt_exit=$? # Restore the uninstalled library and exit if test relink = "$opt_mode"; then ( cd "$output_objdir" && \ $RM "${realname}T" && \ $MV "${realname}U" "$realname" ) fi exit $lt_exit } done IFS=$save_ifs if test -n "$export_symbols_regex" && ${skipped_export-false}; then func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' func_show_eval '$MV "${export_symbols}T" "$export_symbols"' fi fi ${skipped_export-false} && { if test -n "$export_symbols" && test -n "$include_expsyms"; then tmp_export_symbols=$export_symbols test -n "$orig_export_symbols" && tmp_export_symbols=$orig_export_symbols $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' fi if test -n "$orig_export_symbols"; then # The given exports_symbols file has to be filtered, so filter it. func_verbose "filter symbol list for '$libname.la' to tag DATA exports" # FIXME: $output_objdir/$libname.filter potentially contains lots of # 's' commands, which not all seds can handle. GNU sed should be fine # though. Also, the filter scales superlinearly with the number of # global variables. join(1) would be nice here, but unfortunately # isn't a blessed tool. $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter func_append delfiles " $export_symbols $output_objdir/$libname.filter" export_symbols=$output_objdir/$libname.def $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols fi } libobjs=$output # Restore the value of output. output=$save_output if test -n "$convenience" && test -n "$whole_archive_flag_spec"; then eval libobjs=\"\$libobjs $whole_archive_flag_spec\" test "X$libobjs" = "X " && libobjs= fi # Expand the library linking commands again to reset the # value of $libobjs for piecewise linking. # Do each of the archive commands. if test yes = "$module" && test -n "$module_cmds"; then if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then cmds=$module_expsym_cmds else cmds=$module_cmds fi else if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then cmds=$archive_expsym_cmds else cmds=$archive_cmds fi fi fi if test -n "$delfiles"; then # Append the command to remove temporary files to $cmds. eval cmds=\"\$cmds~\$RM $delfiles\" fi # Add any objects from preloaded convenience libraries if test -n "$dlprefiles"; then gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $dlprefiles func_append libobjs " $func_extract_archives_result" test "X$libobjs" = "X " && libobjs= fi save_ifs=$IFS; IFS='~' for cmd in $cmds; do IFS=$sp$nl eval cmd=\"$cmd\" IFS=$save_ifs $opt_quiet || { func_quote_for_expand "$cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || eval "$cmd" || { lt_exit=$? # Restore the uninstalled library and exit if test relink = "$opt_mode"; then ( cd "$output_objdir" && \ $RM "${realname}T" && \ $MV "${realname}U" "$realname" ) fi exit $lt_exit } done IFS=$save_ifs # Restore the uninstalled library and exit if test relink = "$opt_mode"; then $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}T && $MV $realname ${realname}T && $MV ${realname}U $realname)' || exit $? if test -n "$convenience"; then if test -z "$whole_archive_flag_spec"; then func_show_eval '${RM}r "$gentop"' fi fi exit $EXIT_SUCCESS fi # Create links to the real library. for linkname in $linknames; do if test "$realname" != "$linkname"; then func_show_eval '(cd "$output_objdir" && $RM "$linkname" && $LN_S "$realname" "$linkname")' 'exit $?' fi done # If -module or -export-dynamic was specified, set the dlname. if test yes = "$module" || test yes = "$export_dynamic"; then # On all known operating systems, these are identical. dlname=$soname fi fi ;; obj) if test -n "$dlfiles$dlprefiles" || test no != "$dlself"; then func_warning "'-dlopen' is ignored for objects" fi case " $deplibs" in *\ -l* | *\ -L*) func_warning "'-l' and '-L' are ignored for objects" ;; esac test -n "$rpath" && \ func_warning "'-rpath' is ignored for objects" test -n "$xrpath" && \ func_warning "'-R' is ignored for objects" test -n "$vinfo" && \ func_warning "'-version-info' is ignored for objects" test -n "$release" && \ func_warning "'-release' is ignored for objects" case $output in *.lo) test -n "$objs$old_deplibs" && \ func_fatal_error "cannot build library object '$output' from non-libtool objects" libobj=$output func_lo2o "$libobj" obj=$func_lo2o_result ;; *) libobj= obj=$output ;; esac # Delete the old objects. $opt_dry_run || $RM $obj $libobj # Objects from convenience libraries. This assumes # single-version convenience libraries. Whenever we create # different ones for PIC/non-PIC, this we'll have to duplicate # the extraction. reload_conv_objs= gentop= # if reload_cmds runs $LD directly, get rid of -Wl from # whole_archive_flag_spec and hope we can get by with turning comma # into space. case $reload_cmds in *\$LD[\ \$]*) wl= ;; esac if test -n "$convenience"; then if test -n "$whole_archive_flag_spec"; then eval tmp_whole_archive_flags=\"$whole_archive_flag_spec\" test -n "$wl" || tmp_whole_archive_flags=`$ECHO "$tmp_whole_archive_flags" | $SED 's|,| |g'` reload_conv_objs=$reload_objs\ $tmp_whole_archive_flags else gentop=$output_objdir/${obj}x func_append generated " $gentop" func_extract_archives $gentop $convenience reload_conv_objs="$reload_objs $func_extract_archives_result" fi fi # If we're not building shared, we need to use non_pic_objs test yes = "$build_libtool_libs" || libobjs=$non_pic_objects # Create the old-style object. reload_objs=$objs$old_deplibs' '`$ECHO "$libobjs" | $SP2NL | $SED "/\.$libext$/d; /\.lib$/d; $lo2o" | $NL2SP`' '$reload_conv_objs output=$obj func_execute_cmds "$reload_cmds" 'exit $?' # Exit if we aren't doing a library object file. if test -z "$libobj"; then if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi exit $EXIT_SUCCESS fi test yes = "$build_libtool_libs" || { if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi # Create an invalid libtool object if no PIC, so that we don't # accidentally link it into a program. # $show "echo timestamp > $libobj" # $opt_dry_run || eval "echo timestamp > $libobj" || exit $? exit $EXIT_SUCCESS } if test -n "$pic_flag" || test default != "$pic_mode"; then # Only do commands if we really have different PIC objects. reload_objs="$libobjs $reload_conv_objs" output=$libobj func_execute_cmds "$reload_cmds" 'exit $?' fi if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi exit $EXIT_SUCCESS ;; prog) case $host in *cygwin*) func_stripname '' '.exe' "$output" output=$func_stripname_result.exe;; esac test -n "$vinfo" && \ func_warning "'-version-info' is ignored for programs" test -n "$release" && \ func_warning "'-release' is ignored for programs" $preload \ && test unknown,unknown,unknown = "$dlopen_support,$dlopen_self,$dlopen_self_static" \ && func_warning "'LT_INIT([dlopen])' not used. Assuming no dlopen support." case $host in *-*-rhapsody* | *-*-darwin1.[012]) # On Rhapsody replace the C library is the System framework compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's/ -lc / System.ltframework /'` finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's/ -lc / System.ltframework /'` ;; esac case $host in *-*-darwin*) # Don't allow lazy linking, it breaks C++ global constructors # But is supposedly fixed on 10.4 or later (yay!). if test CXX = "$tagname"; then case ${MACOSX_DEPLOYMENT_TARGET-10.0} in 10.[0123]) func_append compile_command " $wl-bind_at_load" func_append finalize_command " $wl-bind_at_load" ;; esac fi # Time to change all our "foo.ltframework" stuff back to "-framework foo" compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` ;; esac # move library search paths that coincide with paths to not yet # installed libraries to the beginning of the library search list new_libs= for path in $notinst_path; do case " $new_libs " in *" -L$path/$objdir "*) ;; *) case " $compile_deplibs " in *" -L$path/$objdir "*) func_append new_libs " -L$path/$objdir" ;; esac ;; esac done for deplib in $compile_deplibs; do case $deplib in -L*) case " $new_libs " in *" $deplib "*) ;; *) func_append new_libs " $deplib" ;; esac ;; *) func_append new_libs " $deplib" ;; esac done compile_deplibs=$new_libs func_append compile_command " $compile_deplibs" func_append finalize_command " $finalize_deplibs" if test -n "$rpath$xrpath"; then # If the user specified any rpath flags, then add them. for libdir in $rpath $xrpath; do # This is the magic to use -rpath. case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac done fi # Now hardcode the library paths rpath= hardcode_libdirs= for libdir in $compile_rpath $finalize_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then hardcode_libdirs=$libdir else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append rpath " $flag" fi elif test -n "$runpath_var"; then case "$perm_rpath " in *" $libdir "*) ;; *) func_append perm_rpath " $libdir" ;; esac fi case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) testbindir=`$ECHO "$libdir" | $SED -e 's*/lib$*/bin*'` case :$dllsearchpath: in *":$libdir:"*) ;; ::) dllsearchpath=$libdir;; *) func_append dllsearchpath ":$libdir";; esac case :$dllsearchpath: in *":$testbindir:"*) ;; ::) dllsearchpath=$testbindir;; *) func_append dllsearchpath ":$testbindir";; esac ;; esac done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir=$hardcode_libdirs eval rpath=\" $hardcode_libdir_flag_spec\" fi compile_rpath=$rpath rpath= hardcode_libdirs= for libdir in $finalize_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then hardcode_libdirs=$libdir else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append rpath " $flag" fi elif test -n "$runpath_var"; then case "$finalize_perm_rpath " in *" $libdir "*) ;; *) func_append finalize_perm_rpath " $libdir" ;; esac fi done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir=$hardcode_libdirs eval rpath=\" $hardcode_libdir_flag_spec\" fi finalize_rpath=$rpath if test -n "$libobjs" && test yes = "$build_old_libs"; then # Transform all the library objects into standard objects. compile_command=`$ECHO "$compile_command" | $SP2NL | $SED "$lo2o" | $NL2SP` finalize_command=`$ECHO "$finalize_command" | $SP2NL | $SED "$lo2o" | $NL2SP` fi func_generate_dlsyms "$outputname" "@PROGRAM@" false # template prelinking step if test -n "$prelink_cmds"; then func_execute_cmds "$prelink_cmds" 'exit $?' fi wrappers_required=: case $host in *cegcc* | *mingw32ce*) # Disable wrappers for cegcc and mingw32ce hosts, we are cross compiling anyway. wrappers_required=false ;; *cygwin* | *mingw* ) test yes = "$build_libtool_libs" || wrappers_required=false ;; *) if test no = "$need_relink" || test yes != "$build_libtool_libs"; then wrappers_required=false fi ;; esac $wrappers_required || { # Replace the output file specification. compile_command=`$ECHO "$compile_command" | $SED 's%@OUTPUT@%'"$output"'%g'` link_command=$compile_command$compile_rpath # We have no uninstalled library dependencies, so finalize right now. exit_status=0 func_show_eval "$link_command" 'exit_status=$?' if test -n "$postlink_cmds"; then func_to_tool_file "$output" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi # Delete the generated files. if test -f "$output_objdir/${outputname}S.$objext"; then func_show_eval '$RM "$output_objdir/${outputname}S.$objext"' fi exit $exit_status } if test -n "$compile_shlibpath$finalize_shlibpath"; then compile_command="$shlibpath_var=\"$compile_shlibpath$finalize_shlibpath\$$shlibpath_var\" $compile_command" fi if test -n "$finalize_shlibpath"; then finalize_command="$shlibpath_var=\"$finalize_shlibpath\$$shlibpath_var\" $finalize_command" fi compile_var= finalize_var= if test -n "$runpath_var"; then if test -n "$perm_rpath"; then # We should set the runpath_var. rpath= for dir in $perm_rpath; do func_append rpath "$dir:" done compile_var="$runpath_var=\"$rpath\$$runpath_var\" " fi if test -n "$finalize_perm_rpath"; then # We should set the runpath_var. rpath= for dir in $finalize_perm_rpath; do func_append rpath "$dir:" done finalize_var="$runpath_var=\"$rpath\$$runpath_var\" " fi fi if test yes = "$no_install"; then # We don't need to create a wrapper script. link_command=$compile_var$compile_command$compile_rpath # Replace the output file specification. link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output"'%g'` # Delete the old output file. $opt_dry_run || $RM $output # Link the executable and exit func_show_eval "$link_command" 'exit $?' if test -n "$postlink_cmds"; then func_to_tool_file "$output" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi exit $EXIT_SUCCESS fi case $hardcode_action,$fast_install in relink,*) # Fast installation is not supported link_command=$compile_var$compile_command$compile_rpath relink_command=$finalize_var$finalize_command$finalize_rpath func_warning "this platform does not like uninstalled shared libraries" func_warning "'$output' will be relinked during installation" ;; *,yes) link_command=$finalize_var$compile_command$finalize_rpath relink_command=`$ECHO "$compile_var$compile_command$compile_rpath" | $SED 's%@OUTPUT@%\$progdir/\$file%g'` ;; *,no) link_command=$compile_var$compile_command$compile_rpath relink_command=$finalize_var$finalize_command$finalize_rpath ;; *,needless) link_command=$finalize_var$compile_command$finalize_rpath relink_command= ;; esac # Replace the output file specification. link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'` # Delete the old output files. $opt_dry_run || $RM $output $output_objdir/$outputname $output_objdir/lt-$outputname func_show_eval "$link_command" 'exit $?' if test -n "$postlink_cmds"; then func_to_tool_file "$output_objdir/$outputname" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi # Now create the wrapper script. func_verbose "creating $output" # Quote the relink command for shipping. if test -n "$relink_command"; then # Preserve any variables that may affect compiler behavior for var in $variables_saved_for_relink; do if eval test -z \"\${$var+set}\"; then relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" elif eval var_value=\$$var; test -z "$var_value"; then relink_command="$var=; export $var; $relink_command" else func_quote_for_eval "$var_value" relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" fi done relink_command="(cd `pwd`; $relink_command)" relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` fi # Only actually do things if not in dry run mode. $opt_dry_run || { # win32 will think the script is a binary if it has # a .exe suffix, so we strip it off here. case $output in *.exe) func_stripname '' '.exe' "$output" output=$func_stripname_result ;; esac # test for cygwin because mv fails w/o .exe extensions case $host in *cygwin*) exeext=.exe func_stripname '' '.exe' "$outputname" outputname=$func_stripname_result ;; *) exeext= ;; esac case $host in *cygwin* | *mingw* ) func_dirname_and_basename "$output" "" "." output_name=$func_basename_result output_path=$func_dirname_result cwrappersource=$output_path/$objdir/lt-$output_name.c cwrapper=$output_path/$output_name.exe $RM $cwrappersource $cwrapper trap "$RM $cwrappersource $cwrapper; exit $EXIT_FAILURE" 1 2 15 func_emit_cwrapperexe_src > $cwrappersource # The wrapper executable is built using the $host compiler, # because it contains $host paths and files. If cross- # compiling, it, like the target executable, must be # executed on the $host or under an emulation environment. $opt_dry_run || { $LTCC $LTCFLAGS -o $cwrapper $cwrappersource $STRIP $cwrapper } # Now, create the wrapper script for func_source use: func_ltwrapper_scriptname $cwrapper $RM $func_ltwrapper_scriptname_result trap "$RM $func_ltwrapper_scriptname_result; exit $EXIT_FAILURE" 1 2 15 $opt_dry_run || { # note: this script will not be executed, so do not chmod. if test "x$build" = "x$host"; then $cwrapper --lt-dump-script > $func_ltwrapper_scriptname_result else func_emit_wrapper no > $func_ltwrapper_scriptname_result fi } ;; * ) $RM $output trap "$RM $output; exit $EXIT_FAILURE" 1 2 15 func_emit_wrapper no > $output chmod +x $output ;; esac } exit $EXIT_SUCCESS ;; esac # See if we need to build an old-fashioned archive. for oldlib in $oldlibs; do case $build_libtool_libs in convenience) oldobjs="$libobjs_save $symfileobj" addlibs=$convenience build_libtool_libs=no ;; module) oldobjs=$libobjs_save addlibs=$old_convenience build_libtool_libs=no ;; *) oldobjs="$old_deplibs $non_pic_objects" $preload && test -f "$symfileobj" \ && func_append oldobjs " $symfileobj" addlibs=$old_convenience ;; esac if test -n "$addlibs"; then gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $addlibs func_append oldobjs " $func_extract_archives_result" fi # Do each command in the archive commands. if test -n "$old_archive_from_new_cmds" && test yes = "$build_libtool_libs"; then cmds=$old_archive_from_new_cmds else # Add any objects from preloaded convenience libraries if test -n "$dlprefiles"; then gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_extract_archives $gentop $dlprefiles func_append oldobjs " $func_extract_archives_result" fi # POSIX demands no paths to be encoded in archives. We have # to avoid creating archives with duplicate basenames if we # might have to extract them afterwards, e.g., when creating a # static archive out of a convenience library, or when linking # the entirety of a libtool archive into another (currently # not supported by libtool). if (for obj in $oldobjs do func_basename "$obj" $ECHO "$func_basename_result" done | sort | sort -uc >/dev/null 2>&1); then : else echo "copying selected object files to avoid basename conflicts..." gentop=$output_objdir/${outputname}x func_append generated " $gentop" func_mkdir_p "$gentop" save_oldobjs=$oldobjs oldobjs= counter=1 for obj in $save_oldobjs do func_basename "$obj" objbase=$func_basename_result case " $oldobjs " in " ") oldobjs=$obj ;; *[\ /]"$objbase "*) while :; do # Make sure we don't pick an alternate name that also # overlaps. newobj=lt$counter-$objbase func_arith $counter + 1 counter=$func_arith_result case " $oldobjs " in *[\ /]"$newobj "*) ;; *) if test ! -f "$gentop/$newobj"; then break; fi ;; esac done func_show_eval "ln $obj $gentop/$newobj || cp $obj $gentop/$newobj" func_append oldobjs " $gentop/$newobj" ;; *) func_append oldobjs " $obj" ;; esac done fi func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 tool_oldlib=$func_to_tool_file_result eval cmds=\"$old_archive_cmds\" func_len " $cmds" len=$func_len_result if test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then cmds=$old_archive_cmds elif test -n "$archiver_list_spec"; then func_verbose "using command file archive linking..." for obj in $oldobjs do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" done > $output_objdir/$libname.libcmd func_to_tool_file "$output_objdir/$libname.libcmd" oldobjs=" $archiver_list_spec$func_to_tool_file_result" cmds=$old_archive_cmds else # the command line is too long to link in one step, link in parts func_verbose "using piecewise archive linking..." save_RANLIB=$RANLIB RANLIB=: objlist= concat_cmds= save_oldobjs=$oldobjs oldobjs= # Is there a better way of finding the last object in the list? for obj in $save_oldobjs do last_oldobj=$obj done eval test_cmds=\"$old_archive_cmds\" func_len " $test_cmds" len0=$func_len_result len=$len0 for obj in $save_oldobjs do func_len " $obj" func_arith $len + $func_len_result len=$func_arith_result func_append objlist " $obj" if test "$len" -lt "$max_cmd_len"; then : else # the above command should be used before it gets too long oldobjs=$objlist if test "$obj" = "$last_oldobj"; then RANLIB=$save_RANLIB fi test -z "$concat_cmds" || concat_cmds=$concat_cmds~ eval concat_cmds=\"\$concat_cmds$old_archive_cmds\" objlist= len=$len0 fi done RANLIB=$save_RANLIB oldobjs=$objlist if test -z "$oldobjs"; then eval cmds=\"\$concat_cmds\" else eval cmds=\"\$concat_cmds~\$old_archive_cmds\" fi fi fi func_execute_cmds "$cmds" 'exit $?' done test -n "$generated" && \ func_show_eval "${RM}r$generated" # Now create the libtool archive. case $output in *.la) old_library= test yes = "$build_old_libs" && old_library=$libname.$libext func_verbose "creating $output" # Preserve any variables that may affect compiler behavior for var in $variables_saved_for_relink; do if eval test -z \"\${$var+set}\"; then relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" elif eval var_value=\$$var; test -z "$var_value"; then relink_command="$var=; export $var; $relink_command" else func_quote_for_eval "$var_value" relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" fi done # Quote the link command for shipping. relink_command="(cd `pwd`; $SHELL \"$progpath\" $preserve_args --mode=relink $libtool_args @inst_prefix_dir@)" relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` if test yes = "$hardcode_automatic"; then relink_command= fi # Only create the output if not a dry run. $opt_dry_run || { for installed in no yes; do if test yes = "$installed"; then if test -z "$install_libdir"; then break fi output=$output_objdir/${outputname}i # Replace all uninstalled libtool libraries with the installed ones newdependency_libs= for deplib in $dependency_libs; do case $deplib in *.la) func_basename "$deplib" name=$func_basename_result func_resolve_sysroot "$deplib" eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $func_resolve_sysroot_result` test -z "$libdir" && \ func_fatal_error "'$deplib' is not a valid libtool archive" func_append newdependency_libs " ${lt_sysroot:+=}$libdir/$name" ;; -L*) func_stripname -L '' "$deplib" func_replace_sysroot "$func_stripname_result" func_append newdependency_libs " -L$func_replace_sysroot_result" ;; -R*) func_stripname -R '' "$deplib" func_replace_sysroot "$func_stripname_result" func_append newdependency_libs " -R$func_replace_sysroot_result" ;; *) func_append newdependency_libs " $deplib" ;; esac done dependency_libs=$newdependency_libs newdlfiles= for lib in $dlfiles; do case $lib in *.la) func_basename "$lib" name=$func_basename_result eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $lib` test -z "$libdir" && \ func_fatal_error "'$lib' is not a valid libtool archive" func_append newdlfiles " ${lt_sysroot:+=}$libdir/$name" ;; *) func_append newdlfiles " $lib" ;; esac done dlfiles=$newdlfiles newdlprefiles= for lib in $dlprefiles; do case $lib in *.la) # Only pass preopened files to the pseudo-archive (for # eventual linking with the app. that links it) if we # didn't already link the preopened objects directly into # the library: func_basename "$lib" name=$func_basename_result eval libdir=`$SED -n -e 's/^libdir=\(.*\)$/\1/p' $lib` test -z "$libdir" && \ func_fatal_error "'$lib' is not a valid libtool archive" func_append newdlprefiles " ${lt_sysroot:+=}$libdir/$name" ;; esac done dlprefiles=$newdlprefiles else newdlfiles= for lib in $dlfiles; do case $lib in [\\/]* | [A-Za-z]:[\\/]*) abs=$lib ;; *) abs=`pwd`"/$lib" ;; esac func_append newdlfiles " $abs" done dlfiles=$newdlfiles newdlprefiles= for lib in $dlprefiles; do case $lib in [\\/]* | [A-Za-z]:[\\/]*) abs=$lib ;; *) abs=`pwd`"/$lib" ;; esac func_append newdlprefiles " $abs" done dlprefiles=$newdlprefiles fi $RM $output # place dlname in correct position for cygwin # In fact, it would be nice if we could use this code for all target # systems that can't hard-code library paths into their executables # and that have no shared library path variable independent of PATH, # but it turns out we can't easily determine that from inspecting # libtool variables, so we have to hard-code the OSs to which it # applies here; at the moment, that means platforms that use the PE # object format with DLL files. See the long comment at the top of # tests/bindir.at for full details. tdlname=$dlname case $host,$output,$installed,$module,$dlname in *cygwin*,*lai,yes,no,*.dll | *mingw*,*lai,yes,no,*.dll | *cegcc*,*lai,yes,no,*.dll) # If a -bindir argument was supplied, place the dll there. if test -n "$bindir"; then func_relative_path "$install_libdir" "$bindir" tdlname=$func_relative_path_result/$dlname else # Otherwise fall back on heuristic. tdlname=../bin/$dlname fi ;; esac $ECHO > $output "\ # $outputname - a libtool library file # Generated by $PROGRAM (GNU $PACKAGE) $VERSION # # Please DO NOT delete this file! # It is necessary for linking the library. # The name that we can dlopen(3). dlname='$tdlname' # Names of this library. library_names='$library_names' # The name of the static archive. old_library='$old_library' # Linker flags that cannot go in dependency_libs. inherited_linker_flags='$new_inherited_linker_flags' # Libraries that this one depends upon. dependency_libs='$dependency_libs' # Names of additional weak libraries provided by this library weak_library_names='$weak_libs' # Version information for $libname. current=$current age=$age revision=$revision # Is this an already installed library? installed=$installed # Should we warn about portability when linking against -modules? shouldnotlink=$module # Files to dlopen/dlpreopen dlopen='$dlfiles' dlpreopen='$dlprefiles' # Directory that this library needs to be installed in: libdir='$install_libdir'" if test no,yes = "$installed,$need_relink"; then $ECHO >> $output "\ relink_command=\"$relink_command\"" fi done } # Do a symbolic link so that the libtool archive can be found in # LD_LIBRARY_PATH before the program is installed. func_show_eval '( cd "$output_objdir" && $RM "$outputname" && $LN_S "../$outputname" "$outputname" )' 'exit $?' ;; esac exit $EXIT_SUCCESS } if test link = "$opt_mode" || test relink = "$opt_mode"; then func_mode_link ${1+"$@"} fi # func_mode_uninstall arg... func_mode_uninstall () { $debug_cmd RM=$nonopt files= rmforce=false exit_status=0 # This variable tells wrapper scripts just to set variables rather # than running their programs. libtool_install_magic=$magic for arg do case $arg in -f) func_append RM " $arg"; rmforce=: ;; -*) func_append RM " $arg" ;; *) func_append files " $arg" ;; esac done test -z "$RM" && \ func_fatal_help "you must specify an RM program" rmdirs= for file in $files; do func_dirname "$file" "" "." dir=$func_dirname_result if test . = "$dir"; then odir=$objdir else odir=$dir/$objdir fi func_basename "$file" name=$func_basename_result test uninstall = "$opt_mode" && odir=$dir # Remember odir for removal later, being careful to avoid duplicates if test clean = "$opt_mode"; then case " $rmdirs " in *" $odir "*) ;; *) func_append rmdirs " $odir" ;; esac fi # Don't error if the file doesn't exist and rm -f was used. if { test -L "$file"; } >/dev/null 2>&1 || { test -h "$file"; } >/dev/null 2>&1 || test -f "$file"; then : elif test -d "$file"; then exit_status=1 continue elif $rmforce; then continue fi rmfiles=$file case $name in *.la) # Possibly a libtool archive, so verify it. if func_lalib_p "$file"; then func_source $dir/$name # Delete the libtool libraries and symlinks. for n in $library_names; do func_append rmfiles " $odir/$n" done test -n "$old_library" && func_append rmfiles " $odir/$old_library" case $opt_mode in clean) case " $library_names " in *" $dlname "*) ;; *) test -n "$dlname" && func_append rmfiles " $odir/$dlname" ;; esac test -n "$libdir" && func_append rmfiles " $odir/$name $odir/${name}i" ;; uninstall) if test -n "$library_names"; then # Do each command in the postuninstall commands. func_execute_cmds "$postuninstall_cmds" '$rmforce || exit_status=1' fi if test -n "$old_library"; then # Do each command in the old_postuninstall commands. func_execute_cmds "$old_postuninstall_cmds" '$rmforce || exit_status=1' fi # FIXME: should reinstall the best remaining shared library. ;; esac fi ;; *.lo) # Possibly a libtool object, so verify it. if func_lalib_p "$file"; then # Read the .lo file func_source $dir/$name # Add PIC object to the list of files to remove. if test -n "$pic_object" && test none != "$pic_object"; then func_append rmfiles " $dir/$pic_object" fi # Add non-PIC object to the list of files to remove. if test -n "$non_pic_object" && test none != "$non_pic_object"; then func_append rmfiles " $dir/$non_pic_object" fi fi ;; *) if test clean = "$opt_mode"; then noexename=$name case $file in *.exe) func_stripname '' '.exe' "$file" file=$func_stripname_result func_stripname '' '.exe' "$name" noexename=$func_stripname_result # $file with .exe has already been added to rmfiles, # add $file without .exe func_append rmfiles " $file" ;; esac # Do a test to see if this is a libtool program. if func_ltwrapper_p "$file"; then if func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" relink_command= func_source $func_ltwrapper_scriptname_result func_append rmfiles " $func_ltwrapper_scriptname_result" else relink_command= func_source $dir/$noexename fi # note $name still contains .exe if it was in $file originally # as does the version of $file that was added into $rmfiles func_append rmfiles " $odir/$name $odir/${name}S.$objext" if test yes = "$fast_install" && test -n "$relink_command"; then func_append rmfiles " $odir/lt-$name" fi if test "X$noexename" != "X$name"; then func_append rmfiles " $odir/lt-$noexename.c" fi fi fi ;; esac func_show_eval "$RM $rmfiles" 'exit_status=1' done # Try to remove the $objdir's in the directories where we deleted files for dir in $rmdirs; do if test -d "$dir"; then func_show_eval "rmdir $dir >/dev/null 2>&1" fi done exit $exit_status } if test uninstall = "$opt_mode" || test clean = "$opt_mode"; then func_mode_uninstall ${1+"$@"} fi test -z "$opt_mode" && { help=$generic_help func_fatal_help "you must specify a MODE" } test -z "$exec_cmd" && \ func_fatal_help "invalid operation mode '$opt_mode'" if test -n "$exec_cmd"; then eval exec "$exec_cmd" exit $EXIT_FAILURE fi exit $exit_status # The TAGs below are defined such that we never get into a situation # where we disable both kinds of libraries. Given conflicting # choices, we go for a static library, that is the most portable, # since we can't tell whether shared libraries were disabled because # the user asked for that or because the platform doesn't support # them. This is particularly important on AIX, because we don't # support having both static and shared libraries enabled at the same # time on that platform, so we default to a shared-only configuration. # If a disable-shared tag is given, we'll fallback to a static-only # configuration. But we'll never go from static-only to shared-only. # ### BEGIN LIBTOOL TAG CONFIG: disable-shared build_libtool_libs=no build_old_libs=yes # ### END LIBTOOL TAG CONFIG: disable-shared # ### BEGIN LIBTOOL TAG CONFIG: disable-static build_old_libs=`case $build_libtool_libs in yes) echo no;; *) echo yes;; esac` # ### END LIBTOOL TAG CONFIG: disable-static # Local Variables: # mode:shell-script # sh-indentation:2 # End: oprofile-1.3.0/Makefile.am0000664000175000017500000000126612534404406012320 00000000000000#### ATTENTION #### # The agents directory must be kept as the last subdir SUBDIRS = \ . \ m4 \ libutil \ libop \ libopagent \ libdb \ libutil++ \ libopt++ \ libabi \ utils \ libregex \ libpp \ opjitconv \ pp \ events \ doc \ libpe_utils \ libperf_events \ pe_profiling \ pe_counting \ agents #### ATTENTION #### # The agents directory must be kept as the last subdir ACLOCAL_AMFLAGS = -I m4 EXTRA_DIST = \ ChangeLog-2001 \ ChangeLog-2002 \ ChangeLog-2003 \ ChangeLog-2004 \ ChangeLog-2005 \ ChangeLog-2006 \ ChangeLog-2007 \ ChangeLog-2008 \ ChangeLog-2009 \ ChangeLog-2010 \ ChangeLog-2011 \ autogen.sh \ README_PACKAGERS \ include/sstream oprofile-1.3.0/libop/0000775000175000017500000000000013323173527011450 500000000000000oprofile-1.3.0/libop/op_config.c0000664000175000017500000000377312534404406013505 00000000000000/** * @file op_config.c * Oprofile configuration parameters. * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Nathan Tallent * @Modifications Daniel Hansel */ #include "op_config.h" #include #include #include #include #include /* paths in op_config.h */ char op_session_dir[PATH_MAX]; char op_samples_dir[PATH_MAX]; char op_samples_current_dir[PATH_MAX]; char op_lock_file[PATH_MAX]; char op_log_file[PATH_MAX]; char op_pipe_file[PATH_MAX]; char op_dump_status[PATH_MAX]; /* paths in op_config_24.h */ char op_device[PATH_MAX]; char op_note_device[PATH_MAX]; char op_hash_device[PATH_MAX]; char * stats_filenames[OPERF_MAX_STATS] = { "total_samples", "", "", "lost_invalid_domain", "lost_kernel", "lost_samplefile", "lost_no_mapping", "lost_no_app_for_kernel_sample", "lost_no_app_for_user_sample", "lost_bt_no_mapping", "lost_invalid_hypervisor_addr", "lost_records_by_kernel", }; void init_op_config_dirs(char const * session_dir) { int session_dir_len; assert(session_dir); session_dir_len = strlen(session_dir); if (session_dir_len + strlen("/samples/oprofiled.log") > PATH_MAX) { fprintf(stderr, "Session_dir string \"%s\" is too large.\n", session_dir); exit(EXIT_FAILURE); } strcpy(op_session_dir, session_dir); strcpy(op_samples_dir, op_session_dir); strcat(op_samples_dir, "/samples/"); strcpy(op_samples_current_dir, op_samples_dir); strcat(op_samples_current_dir, "/current/"); } oprofile-1.3.0/libop/op_cpu_type.h0000664000175000017500000001377513230147570014100 00000000000000/** * @file op_cpu_type.h * CPU type determination * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_CPU_TYPE_H #define OP_CPU_TYPE_H #ifdef __cplusplus extern "C" { #endif /** * Supported cpu type. Always add new CPU types at the very end. */ typedef enum { CPU_NO_GOOD = -1, /**< unsupported CPU type */ CPU_PPRO, /**< Pentium Pro */ CPU_PII, /**< Pentium II series */ CPU_PIII, /**< Pentium III series */ CPU_ATHLON, /**< AMD P6 series */ CPU_TIMER_INT, /**< CPU using the timer interrupt */ CPU_P4, /**< Pentium 4 / Xeon series */ CPU_HAMMER, /**< AMD Hammer family */ CPU_P4_HT2, /**< Pentium 4 / Xeon series with 2 hyper-threads */ CPU_AXP_EV67, /**< Alpha EV67 family */ CPU_P6_MOBILE, /**< Pentium M series */ CPU_ARM_XSCALE1, /**< ARM XScale 1 */ CPU_ARM_XSCALE2, /**< ARM XScale 2 */ CPU_PPC64_POWER4, /**< ppc64 POWER4 family */ CPU_PPC64_POWER5, /**< ppc64 POWER5 family */ CPU_PPC64_POWER5p, /**< ppc64 Power5+ family */ CPU_PPC64_970, /**< ppc64 970 family */ CPU_MIPS_20K, /**< MIPS 20K */ CPU_MIPS_24K, /**< MIPS 24K */ CPU_MIPS_25K, /**< MIPS 25K */ CPU_MIPS_34K, /**< MIPS 34K */ CPU_MIPS_5K, /**< MIPS 5K */ CPU_MIPS_R10000, /**< MIPS R10000 */ CPU_MIPS_R12000, /**< MIPS R12000 */ CPU_MIPS_RM7000, /**< QED RM7000 */ CPU_MIPS_RM9000, /**< PMC-Sierra RM9000 */ CPU_MIPS_SB1, /**< Broadcom SB1 */ CPU_MIPS_VR5432, /**< NEC VR5432 */ CPU_MIPS_VR5500, /**< MIPS VR5500, VR5532 and VR7701 */ CPU_PPC_E500, /**< e500 */ CPU_PPC_E500_2, /**< e500v2 */ CPU_CORE, /**< Core Solo / Duo series */ CPU_PPC_7450, /**< PowerPC G4 */ CPU_CORE_2, /**< Intel Core 2 */ CPU_PPC64_POWER6, /**< ppc64 POWER6 family */ CPU_PPC64_970MP, /**< ppc64 970MP */ CPU_FAMILY10, /**< AMD family 10 */ CPU_ARM_MPCORE, /**< ARM MPCore */ CPU_ARM_V6, /**< ARM V6 */ CPU_PPC64_POWER5pp, /**< ppc64 Power5++ family */ CPU_PPC_E300, /**< e300 */ CPU_ARM_V7, /**< ARM Cortex-A8 */ CPU_ARCH_PERFMON, /**< Intel architectural perfmon */ CPU_FAMILY11H, /**< AMD family 11h */ CPU_PPC64_POWER7, /**< ppc64 POWER7 family */ CPU_CORE_I7, /* Intel Core i7, Nehalem */ CPU_ATOM, /* First generation Intel Atom */ CPU_MIPS_LOONGSON2, /* < loongson2 family */ CPU_NEHALEM, /* Intel Nehalem microarchitecture */ CPU_ARM_V7_CA9, /**< ARM Cortex-A9 */ CPU_MIPS_74K, /**< MIPS 74K */ CPU_MIPS_1004K, /**< MIPS 1004K */ CPU_FAMILY12H, /**< AMD family 12h */ CPU_FAMILY14H, /**< AMD family 14h */ CPU_FAMILY15H, /**< AMD family 15h */ CPU_WESTMERE, /* Intel Westmere microarchitecture */ CPU_ARM_SCORPION, /**< ARM SCORPION */ CPU_ARM_SCORPIONMP, /**< ARM SCORPIONMP */ CPU_SANDYBRIDGE, /* Intel Sandy-Bridge microarchitecture */ CPU_TILE_TILE64, /**< Tilera TILE64 family */ CPU_TILE_TILEPRO, /**< Tilera TILEPro family (Pro64 or Pro36) */ CPU_TILE_TILEGX, /**< Tilera TILE-GX family */ CPU_S390_Z10, /* IBM System z10 */ CPU_S390_Z196, /* IBM zEnterprise z196 */ CPU_IVYBRIDGE, /* Intel Ivy-Bridge microarchitecture */ CPU_ARM_V7_CA5, /**< ARM Cortex-A5 */ CPU_ARM_V7_CA7, /**< ARM Cortex-A7 */ CPU_ARM_V7_CA15, /**< ARM Cortex-A15 */ CPU_HASWELL, /** < Intel Haswell microarchitecture */ CPU_S390_ZEC12, /**< IBM zEnterprise EC12 */ CPU_AMD64_GENERIC, /**< AMD64 Generic */ CPU_PPC64_ARCH_V1, /** < IBM Power architected events version 1 */ CPU_PPC64_POWER8, /**< ppc64 POWER8 family */ CPU_PPC_E500MC, /**< e500mc */ CPU_PPC_E6500, /**< e6500 */ CPU_SILVERMONT, /** < Intel Silvermont microarchitecture */ CPU_ARM_KRAIT, /**< ARM KRAIT */ CPU_ARM_V8_APM_XGENE, /* APM X-Gene */ CPU_BROADWELL, /** < Intel Broadwell (Core-M) microarchitecture */ CPU_ARM_V8_CA57, /* ARM Cortex-A57 */ CPU_ARM_V8_CA53, /* ARM Cortex-A53 */ CPU_SKYLAKE, /** < Intel Skylake microarchitecture */ CPU_GOLDMONT, /** < Intel Goldmont microarchitecture */ CPU_GOLDMONTPLUS, /** < Intel Goldmont Plus microarchitecture */ CPU_S390_Z13, /** < IBM z13 */ CPU_ARM_V7_CA17, /* ARM Cortex-A17 */ CPU_PPC64_POWER9, /**< ppc64 POWER8 family */ CPU_KNIGHTSLANDING, /** Intel Knights Landing microarchitecture */ MAX_CPU_TYPE } op_cpu; /* A macro to be used for ppc64 architecture-specific code. The '__powerpc__' macro * is defined for both ppc64 and ppc32 architectures, so we must further qualify by * including the 'HAVE_LIBPFM' macro, since that macro will be defined only for ppc64. */ #if defined(HAVE_LIBPFM) && ((defined(__powerpc__) || defined(__powerpc64__))) #define PPC64_ARCH 1 #endif /** * the CPU lowest common denominator * * returns 1 if there are variations for the base cpu type; */ int op_cpu_variations(op_cpu cpu_type); /** * get the CPU lowest common denominator * * returns cpu_type if cpu_type does not have a lowest common denominator. */ op_cpu op_cpu_base_type(op_cpu cpu_type); /** * get the CPU type from the kernel * * returns CPU_NO_GOOD if the CPU could not be identified. * This function can not work if the module is not loaded */ op_cpu op_get_cpu_type(void); /** * get the cpu number based on string * @param cpu_string with either the cpu type identifier or cpu type number * * The function returns CPU_NO_GOOD if no matching string was found. */ op_cpu op_get_cpu_number(char const * cpu_string); /** * get the cpu string. * @param cpu_type the cpu type identifier * * The function always return a valid char const * the core cpu denomination * or "invalid cpu type" if cpu_type is not valid. */ char const * op_get_cpu_type_str(op_cpu cpu_type); /** * op_get_cpu_name - get the cpu name * @param cpu_type the cpu identifier name * * The function always return a valid char const * * Return the OProfile CPU name, e.g. "i386/pii" */ char const * op_get_cpu_name(op_cpu cpu_type); #if defined(__i386__) || defined(__x86_64__) int op_is_cpu_vendor(char * vendor); #endif /** * compute the number of counters available * @param cpu_type numeric processor type * * returns 0 if the CPU could not be identified */ int op_get_nr_counters(op_cpu cpu_type); #ifdef __cplusplus } #endif #endif /* OP_CPU_TYPE_H */ oprofile-1.3.0/libop/op_alloc_counter.c0000664000175000017500000001214012745433142015060 00000000000000/** * @file op_alloc_counter.c * hardware counter allocation * * You can have silliness here. * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include "op_events.h" #include "op_libiberty.h" typedef struct counter_arc_head { /** the head of allowed counter for this event */ struct list_head next; } counter_arc_head; typedef struct counter_arc { /** counter nr */ int counter; /** the next counter allowed for this event */ struct list_head next; } counter_arc; /** * @param pev an array of event * @param nr_events number of entry in pev * * build an array of counter list allowed for each events * counter_arc_head[i] is the list of allowed counter for pev[i] events * The returned pointer is an array of nr_events entry */ static counter_arc_head * build_counter_arc(struct op_event const * pev[], int nr_events) { counter_arc_head * ctr_arc; int i; ctr_arc = xmalloc(nr_events * sizeof(*ctr_arc)); for (i = 0; i < nr_events; ++i) { int j; u32 mask = pev[i]->counter_mask; list_init(&ctr_arc[i].next); for (j = 0; mask; ++j) { if (mask & (1 << j)) { counter_arc * arc = xmalloc(sizeof(counter_arc)); arc->counter = j; /* we are looping by increasing counter number, * allocation use a left to right tree walking * so we add at end to ensure counter will * be allocated by increasing number: it's not * required but a bit less surprising when * debugging code */ list_add_tail(&arc->next, &ctr_arc[i].next); mask &= ~(1 << j); } } } return ctr_arc; } /** * @param ctr_arc the array to deallocate * @param nr_events number of entry in array * * deallocate all previously allocated resource by build_counter_arc() */ static void delete_counter_arc(counter_arc_head * ctr_arc, int nr_events) { int i; for (i = 0; i < nr_events; ++i) { struct list_head * pos, * pos2; list_for_each_safe(pos, pos2, &ctr_arc[i].next) { counter_arc * arc = list_entry(pos, counter_arc, next); list_del(&arc->next); free(arc); } } free(ctr_arc); } /** * @param ctr_arc tree description, ctr_arc[i] is the i-th level of tree. * @param max_depth number of entry in array ctr_arc == depth of tree * @param depth current level we are exploring * @param allocated_mask current counter already allocated mask * @param counter_map array of counter number mapping, returned results go * here * * return non zero on succees, in this case counter_map is set to the counter * mapping number. * * Solution is searched through a simple backtracking exploring recursively all * possible solution until one is found, pruning is done in O(1) by tracking * a bitmask of already allocated counter. Walking through node is done in * preorder left to right. * * In case of extended events (required no physical counters), the associated * counter_map entry will be -1. * * Possible improvement if necessary: partition counters in class of counter, * two counter belong to the same class if they allow exactly the same set of * event. Now using a variant of the backtrack algo can works on class of * counter rather on counter (this is not an improvement if each counter goes * in it's own class) */ static int allocate_counter(counter_arc_head const * ctr_arc, int max_depth, int depth, u32 allocated_mask, size_t * counter_map) { struct list_head * pos; if (depth == max_depth) return 1; /* If ctr_arc is not available, counter_map is -1 */ if((&ctr_arc[depth].next)->next == &ctr_arc[depth].next) { counter_map[depth] = -1; if (allocate_counter(ctr_arc, max_depth, depth + 1, allocated_mask, counter_map)) return 1; } else { list_for_each(pos, &ctr_arc[depth].next) { counter_arc const * arc = list_entry(pos, counter_arc, next); if (allocated_mask & (1 << arc->counter)) continue; counter_map[depth] = arc->counter; if (allocate_counter(ctr_arc, max_depth, depth + 1, allocated_mask | (1 << arc->counter), counter_map)) return 1; } } return 0; } size_t * map_event_to_counter(struct op_event const * pev[], int nr_events, op_cpu cpu_type) { counter_arc_head * ctr_arc; size_t * counter_map; int i, nr_counters, nr_pmc_events; u32 unavailable_counters = 0; nr_counters = op_get_nr_counters(cpu_type); /* no counters then probably perfmon managing perfmon hw */ if (nr_counters <= 0) { nr_counters = op_get_nr_counters(cpu_type); unavailable_counters = (~0U) << nr_counters; } /* Check to see if we have enough physical counters to map events*/ for (i = 0, nr_pmc_events = 0; i < nr_events; i++) if(pev[i]->ext == NULL) if (++nr_pmc_events > nr_counters) return 0; ctr_arc = build_counter_arc(pev, nr_events); counter_map = xmalloc(nr_events * sizeof(size_t)); if (!allocate_counter(ctr_arc, nr_events, 0, unavailable_counters, counter_map)) { free(counter_map); counter_map = 0; } delete_counter_arc(ctr_arc, nr_events); return counter_map; } oprofile-1.3.0/libop/op_config.h0000664000175000017500000000421512603572700013502 00000000000000/** * @file op_config.h * * Parameters a user may want to change. See * also op_config_24.h * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie * @Modifications Daniel Hansel */ #ifndef OP_CONFIG_H #define OP_CONFIG_H #if defined(__cplusplus) extern "C" { #endif enum { OPERF_SAMPLES, /**< nr. samples */ OPERF_KERNEL, /**< nr. kernel samples */ OPERF_PROCESS, /**< nr. userspace samples */ OPERF_INVALID_CTX, /**< nr. samples lost due to sample address not in expected range for domain */ OPERF_LOST_KERNEL, /**< nr. kernel samples lost */ OPERF_LOST_SAMPLEFILE, /**< nr samples for which sample file can't be opened */ OPERF_LOST_NO_MAPPING, /**< nr samples lost due to no mapping */ OPERF_NO_APP_KERNEL_SAMPLE, /**&2; \ exit 1;; \ esac; \ has_opt=no; \ sane_makeflags=$$MAKEFLAGS; \ if $(am__is_gnu_make); then \ sane_makeflags=$$MFLAGS; \ else \ case $$MAKEFLAGS in \ *\\[\ \ ]*) \ bs=\\; \ sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \ | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \ esac; \ fi; \ skip_next=no; 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int count; int unit_mask; char * unit_mask_name; int kernel; int user; int unit_mask_valid; }; /** * @param parsed_events array of events to fill in * @param max_events size of parsed_events * @param events null terminated array of events string on the form * event_name:count[:unit_mask:kernel:user] * * parse events given by the nil terminated array events and fill in * parsed_events with results. Events validity are not checked except. * A fatal error occur if number of events is greater than max_events. * * Return the number of events parsed. */ size_t parse_events(struct parsed_event * parsed_events, size_t max_events, char const * const * events, int check_count); #endif /* !OP_PARSE_EVENT_H */ oprofile-1.3.0/libop/op_xml_out.c0000664000175000017500000001056212603572700013721 00000000000000/** * @file op_xml_out.c * C utility routines for writing XML * * @remark Copyright 2008 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #include #include #include #include "op_xml_out.h" char const * xml_tag_map[] = { "NONE", "id", "profile", "processor", "cputype", "title", "schemaversion", "mhz", "setup", "timersetup", "rtcinterrupts", "eventsetup", "eventname", "unitmask", "setupcount", "separatedcpus", "options", "session", "debuginfo", "details", "excludedependent", "excludesymbols", "imagepath", "includesymbols", "merge", "classes", "class", "cpu", "event", "mask", "process", "pid", "thread", "tid", "binary", "module", "name", "callers", "callees", "symbol", "idref", "self", "detaillo", "detailhi", "symboltable", "symboldata", "startingaddr", "file", "line", "codelength", "summarydata", "sampledata", "count", "detailtable", "symboldetails", "detaildata", "vmaoffset", "bytestable", "bytes", "help_events", "header", "title", "doc", "event", "event_name", "group", "desc", "counter_mask", "min_count", "ext", "unit_masks", "default", "category", "unit_mask", "mask", "desc", "name" }; #define MAX_BUF_LEN 2048 char const * xml_tag_name(tag_t tag) { return xml_tag_map[tag]; } void open_xml_element(tag_t tag, int with_attrs, char *buffer, size_t max) { char *buf; int size, ret; buffer[max - 1] = '\0'; size = strlen(buffer); buf = &buffer[size]; size = max - 1 - size; ret = snprintf(buf, size, "<%s%s", xml_tag_name(tag), (with_attrs ? " " : ">\n")); if (ret < 0 || ret >= size) { fprintf(stderr,"open_xml_element: snprintf failed\n"); exit(EXIT_FAILURE); } } void close_xml_element(tag_t tag, int has_nested, char *buffer, size_t max) { char *buf; int size, ret; buffer[max - 1] = '\0'; size = strlen(buffer); buf = &buffer[size]; size = max - 1 - size; if (tag == NONE) ret = snprintf(buf, size, "%s\n", (has_nested ? ">" : "/>")); else ret = snprintf(buf, size, "\n", xml_tag_name(tag)); if (ret < 0 || ret >= size) { fprintf(stderr, "close_xml_element: snprintf failed\n"); exit(EXIT_FAILURE); } } void init_xml_int_attr(tag_t attr, int value, char *buffer, size_t max) { char *buf; int size, ret; buffer[max - 1] = '\0'; size = strlen(buffer); buf = &buffer[size]; size = max - 1 - size; ret = snprintf(buf, size, " %s=\"%d\"", xml_tag_name(attr), value); if (ret < 0 || ret >= size) { fprintf(stderr,"init_xml_int_attr: snprintf failed\n"); exit(EXIT_FAILURE); } } void init_xml_dbl_attr(tag_t attr, double value, char *buffer, size_t max) { char *buf; int size, ret; buffer[max - 1] = '\0'; size = strlen(buffer); buf = &buffer[size]; size = max - 1 - size; ret = snprintf(buf, size, " %s=\"%.2f\"", xml_tag_name(attr), value); if (ret < 0 || ret >= size) { fprintf(stderr, "init_xml_dbl_attr: snprintf failed\n"); exit(EXIT_FAILURE); } } static void xml_quote(char const *str, char *buffer, size_t max) { char *buf; char *quote; char *pos = (char*)str; size_t size; int ret; buffer[max - 1] = '\0'; size = strlen(buffer); buf = &buffer[size]; size = max - 1 - size; if (size < strlen(pos) + 2) goto Error; *buf = '"'; buf++; size--; while (*pos) { switch(*pos) { case '&': quote = "&"; break; case '<': quote = "<"; break; case '>': quote = ">"; break; case '"': quote = """; break; default: *buf = *pos; pos++; buf++; size--; continue; } pos++; ret = snprintf(buf, size, "%s", quote); if (ret < 0 || ret >= (int)size) goto Error; buf += ret; size -= ret; if (size < strlen(pos)) goto Error; } if (!size) goto Error; *buf = '"'; buf++; *buf = '\0'; return; Error: fprintf(stderr,"quote_str: buffer overflow\n"); exit(EXIT_FAILURE); } void init_xml_str_attr(tag_t attr, char const *str, char *buffer, size_t max) { char *buf; int size, ret; buffer[max - 1] = '\0'; size = strlen(buffer); buf = &buffer[size]; size = max - 1 - size; ret = snprintf(buf, size, " %s=", xml_tag_name(attr)); if (ret < 0 || ret >= size) goto Error; buf += ret; size -= ret; if (!size) goto Error; xml_quote(str, buf, size); return; Error: fprintf(stderr,"init_xml_str_attr: snprintf failed\n"); exit(EXIT_FAILURE); } oprofile-1.3.0/libop/op_mangle.h0000664000175000017500000000234512534404406013502 00000000000000/** * @file op_mangle.h * Mangling of sample file names * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_MANGLE_H #define OP_MANGLE_H #include #ifdef __cplusplus extern "C" { #endif enum mangle_flags { MANGLE_NONE = 0, MANGLE_CPU = (1 << 0), MANGLE_TGID = (1 << 1), MANGLE_TID = (1 << 2), MANGLE_KERNEL = (1 << 3), MANGLE_CALLGRAPH = (1 << 4), MANGLE_ANON = (1 << 5), MANGLE_CG_ANON = (1 << 6), }; /** * Temporary structure for passing parameters to * op_mangle_filename. */ struct mangle_values { int flags; char const * image_name; char const * anon_name; char const * dep_name; char const * cg_image_name; char const * event_name; int count; unsigned int unit_mask; pid_t tgid; pid_t tid; int cpu; }; /** * op_mangle_filename - mangle a sample filename * @param values parameters to use as mangling input * * See also PP:3 for the encoding scheme * * Returns a char* pointer to the mangled string. Caller * is responsible for freeing this string. */ char * op_mangle_filename(struct mangle_values const * values); #ifdef __cplusplus } #endif #endif /* OP_MANGLE_H */ oprofile-1.3.0/libop/tests/0000775000175000017500000000000013323173527012612 500000000000000oprofile-1.3.0/libop/tests/parse_event_tests.c0000664000175000017500000000306612534404406016434 00000000000000/** * @file parse_event_tests.c * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include "op_parse_event.h" struct events_test { /* second pointer is the null terminating array marker */ char const * const tests[2]; struct parsed_event expected; }; static struct events_test const events[] = { { { "FOO:3000:0:0:0", 0 }, { "FOO", 3000, 0, NULL, 0, 0, 0 } }, { { "BAR:3000", 0 }, { "BAR", 3000, 0, NULL, 1, 1, 0 } }, { { "FOOBAR:3000:1:1:1", 0 }, { "FOOBAR", 3000, 1, NULL, 1, 1, 0 } }, { { NULL, NULL }, { 0, 0, 0, NULL, 0, 0, 0 } } }; static void do_test(struct events_test const * ev) { struct parsed_event parsed; parse_events(&parsed, 1, ev->tests, 1); if (strcmp(ev->expected.name, parsed.name) || ev->expected.count != parsed.count || ev->expected.unit_mask != parsed.unit_mask || ev->expected.kernel != parsed.kernel || ev->expected.user != parsed.user) { printf("for %s expect { %s, %d, %d, %d, %d } found " "{ %s, %d, %d, %d, %d }\n", ev->tests[0], ev->expected.name, ev->expected.count, ev->expected.unit_mask, ev->expected.kernel, ev->expected.user, parsed.name, parsed.count, parsed.unit_mask, parsed.kernel, parsed.user); exit(EXIT_FAILURE); } } int main(void) { struct events_test const * ev; for (ev = events; ev->tests[0]; ++ev) do_test(ev); return 0; } oprofile-1.3.0/libop/tests/load_events_files_tests.c0000664000175000017500000000102712534404406017601 00000000000000/** * @file load_events_files_tests.c * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "op_events.h" #include "op_cpu_type.h" int main(void) { op_cpu cpu_type; setenv("OPROFILE_EVENTS_DIR", OPROFILE_SRCDIR "/events", 1); for (cpu_type = CPU_NO_GOOD + 1; cpu_type < MAX_CPU_TYPE; ++cpu_type) { if (cpu_type != CPU_TIMER_INT) { op_events(cpu_type); op_free_events(); } } return 0; } oprofile-1.3.0/libop/tests/Makefile.am0000664000175000017500000000154012534404406014562 00000000000000AM_CPPFLAGS = \ -I ${top_srcdir}/libutil \ -I ${top_srcdir}/libop \ @OP_CPPFLAGS@ AM_CFLAGS = @OP_CFLAGS@ -DOPROFILE_SRCDIR=\"@top_srcdir@\" COMMON_LIBS = ../libop.a ../../libutil/libutil.a LIBS = @LIBERTY_LIBS@ check_PROGRAMS = \ cpu_type_tests \ parse_event_tests \ load_events_files_tests \ alloc_counter_tests \ mangle_tests EXTRA_DIST = utf8_checker.sh cpu_type_tests_SOURCES = cpu_type_tests.c cpu_type_tests_LDADD = ${COMMON_LIBS} parse_event_tests_SOURCES = parse_event_tests.c parse_event_tests_LDADD = ${COMMON_LIBS} alloc_counter_tests_SOURCES = alloc_counter_tests.c alloc_counter_tests_LDADD = ${COMMON_LIBS} load_events_files_tests_SOURCES = load_events_files_tests.c load_events_files_tests_LDADD = ${COMMON_LIBS} mangle_tests_SOURCES = mangle_tests.c mangle_tests_LDADD = ${COMMON_LIBS} TESTS = ${check_PROGRAMS} utf8_checker.sh oprofile-1.3.0/libop/tests/utf8_checker.sh0000775000175000017500000000123712534404406015442 00000000000000#!/bin/sh # This script validates that all event descriptions in the various # architecture-specific events files contain only UTF-8 characters. # While this is not a requirement for the command-line tools of oprofile, # many GUI tools (in particular, the oprofile plugin from Eclipse LTP) do # have such a requirement. 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install-dvi-am install-exec \ install-exec-am install-html install-html-am install-info \ install-info-am install-man install-pdf install-pdf-am \ install-ps install-ps-am install-strip installcheck \ installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ recheck tags tags-am uninstall uninstall-am .PRECIOUS: Makefile # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: oprofile-1.3.0/libop/tests/alloc_counter_tests.c0000664000175000017500000001121412534404406016744 00000000000000/** * @file alloc_counter_tests.c * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "op_parse_event.h" #include "op_alloc_counter.h" #include "op_events.h" #include "op_hw_config.h" #include "op_cpu_type.h" #include "op_events.h" #define MAX_EVENTS 20 /* some test are setup to fail in a known way */ enum failure_type { no_failure, fail_to_find_event, fail_to_alloc_counter }; struct allocated_counter { op_cpu cpu_type; char const * const * events; size_t alloc_map[MAX_EVENTS]; /* expected failure for this test */ enum failure_type failure; }; static char const * const events_ppro_1[] = { "CPU_CLK_UNHALTED:4096:0:1:1", NULL }; static char const * const events_ppro_2[] = { "CPU_CLK_UNHALTED:4096:0:1:1", "DATA_MEM_REFS:4096:0:1:1", NULL }; static char const * const events_ppro_3[] = { /* fail_to_alloc_counter: 2 event to counter 0 */ "COMP_FLOP_RET:4096:0:1:1", "FLOPS:4096:0:1:1", NULL }; static char const * const events_ppro_4[] = { "FLOPS:4096:0:1:1", "FP_ASSIST:4096:0:1:1", NULL }; static char const * const events_ppro_5[] = { "FP_ASSIST:4096:0:1:1", "FLOPS:4096:0:1:1", NULL }; static char const * const events_p4_1[] = { "BRANCH_RETIRED:4096:1:1:1", "MISPRED_BRANCH_RETIRED:4096:1:1:1", "BPU_FETCH_REQUEST:4096:1:1:1", "ITLB_REFERENCE:4096:1:1:1", "MEMORY_CANCEL:4096:4:1:1", "MEMORY_COMPLETE:4096:1:1:1", "TC_MS_XFER:4096:1:1:1", "UOP_QUEUE_WRITES:4096:1:1:1", NULL }; static char const * const events_p4_2[] = { /* fail_to_alloc_counter: 3 event to counter 3, 7 */ "BRANCH_RETIRED:4096:1:1:1", "MISPRED_BRANCH_RETIRED:4096:1:1:1", "INSTR_RETIRED:4096:1:1:1", "BPU_FETCH_REQUEST:4096:1:1:1", "ITLB_REFERENCE:4096:1:1:1", "MEMORY_CANCEL:4096:4:1:1", "MEMORY_COMPLETE:4096:1:1:1", "TC_MS_XFER:4096:1:1:1", NULL }; static char const * const events_mips_34k[] = { /* fail_to_alloc_counter: w/o 2006-8-03 Jeremiah Lott patch, see * ChangeLog */ "DTLB_MISSES:500:0:1:1", "JR_31_INSNS:500:0:1:1", NULL }; static struct allocated_counter const tests[] = { { CPU_PPRO, events_ppro_1, { 0 }, no_failure }, { CPU_PPRO, events_ppro_2, { 0, 1 }, no_failure }, { CPU_PPRO, events_ppro_3, { -1 }, fail_to_alloc_counter }, { CPU_PPRO, events_ppro_4, { 0, 1 }, no_failure }, { CPU_PPRO, events_ppro_5, { 1, 0 }, no_failure }, { CPU_P4, events_p4_1, { 3, 7, 0, 4, 2, 6, 1, 5 }, no_failure }, { CPU_P4, events_p4_2, { -1 }, fail_to_alloc_counter }, { CPU_MIPS_34K, events_mips_34k, { 1, 0 }, no_failure }, { CPU_NO_GOOD, 0, { 0 }, 0 } }; static void show_events(char const * const * events) { for ( ; *events; ++events) printf("%s\n", *events); } static void show_counter_map(size_t const * counter_map, size_t nr_events) { size_t i; for (i = 0; i < nr_events; ++i) printf("%lu ", (unsigned long)counter_map[i]); printf("\n"); } static void do_test(struct allocated_counter const * it) { size_t i; size_t * counter_map; size_t nr_events; struct parsed_event parsed[MAX_EVENTS]; struct op_event const * event[MAX_EVENTS]; op_events(it->cpu_type); nr_events = parse_events(parsed, MAX_EVENTS, it->events, 1); for (i = 0; i < nr_events; ++i) { event[i] = find_event_by_name(parsed[i].name, parsed[i].unit_mask, parsed[i].unit_mask_valid); if (!event[i]) { if (it->failure == fail_to_find_event) goto free_events; printf("Can't find events %s for cpu %s\n", parsed[i].name, op_get_cpu_type_str(it->cpu_type)); exit(EXIT_FAILURE); } } counter_map = map_event_to_counter(event, nr_events, it->cpu_type); if (!counter_map) { if (it->failure == fail_to_alloc_counter) goto free_events; printf("Can't map this set of events to counter:\n"); show_events(it->events); exit(EXIT_FAILURE); } for (i = 0; i < nr_events; ++i) { if (counter_map[i] != it->alloc_map[i]) { printf("Incorrect allocation map for these events:\n"); show_events(it->events); printf("(expect, found):\n"); show_counter_map(it->alloc_map, nr_events); show_counter_map(counter_map, nr_events); exit(EXIT_FAILURE); } } if (it->failure != no_failure) { /* test should fail but success! */ printf("test should fail with a failure type %d but succeed " "for events:\n", it->failure); for (i = 0; i < nr_events; ++i) printf("%s\n", it->events[i]); exit(EXIT_FAILURE); } free(counter_map); free_events: op_free_events(); } int main(void) { struct allocated_counter const * it; setenv("OPROFILE_EVENTS_DIR", OPROFILE_SRCDIR "/events", 1); for (it = tests; it->cpu_type != CPU_NO_GOOD; ++it) do_test(it); return 0; } oprofile-1.3.0/libop/tests/cpu_type_tests.c0000664000175000017500000000306512534404406015750 00000000000000/** * @file cpu_type_tests.c * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include "op_cpu_type.h" static struct cpu_type { char const * name; op_cpu type; } cpu_str[] = { { "i386/ppro", CPU_PPRO }, { "i386/pii", CPU_PII }, { "i386/piii", CPU_PIII }, { "i386/athlon", CPU_ATHLON }, { "timer", CPU_TIMER_INT }, { "i386/p4", CPU_P4 }, { "x86-64/hammer", CPU_HAMMER }, { "i386/p4-ht", CPU_P4_HT2 }, { "alpha/ev67", CPU_AXP_EV67 }, { "tile/tile64", CPU_TILE_TILE64 }, { "tile/tilepro", CPU_TILE_TILEPRO }, { "tile/tilegx", CPU_TILE_TILEGX }, { "foo", CPU_NO_GOOD }, { "-3", CPU_NO_GOOD }, { "2927", CPU_NO_GOOD }, { "", CPU_NO_GOOD }, { NULL, CPU_NO_GOOD } }; static void test(struct cpu_type const * cpu) { char const * name; op_cpu type; name = op_get_cpu_name(cpu->type); if (cpu->type != CPU_NO_GOOD && strcmp(cpu->name, name)) { printf("for %d expect %s found %s\n", cpu->type, cpu->name, name); exit(EXIT_FAILURE); } if (cpu->type == CPU_NO_GOOD && strcmp("invalid cpu type", name)) { printf("for %d expect %s found %s\n", cpu->type, "invalid cpu type", name); exit(EXIT_FAILURE); } type = op_get_cpu_number(cpu->name); if (type != cpu->type) { printf("for %s expect %d found %d\n", cpu->name, cpu->type, type); exit(EXIT_FAILURE); } } int main(void) { struct cpu_type * cpu; for (cpu = cpu_str; cpu->name; ++cpu) test(cpu); return 0; } oprofile-1.3.0/libop/tests/mangle_tests.c0000664000175000017500000000463612534404406015370 00000000000000/** * @file mangle_tests.c * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include "op_libiberty.h" #include "op_mangle.h" #include "op_config.h" struct test_input { struct mangle_values values; char const * result; }; static struct test_input const tests[] = { { { MANGLE_NONE, "foo", "", "bar", NULL, "EVENT", 0, 0, 0, 0, 0 }, "{root}/bar/{dep}/{root}/foo/EVENT.0.0.all.all.all" }, { { MANGLE_CPU, "foo", "", "bar", NULL, "EVENT", 0, 0, 0, 0, 2 }, "{root}/bar/{dep}/{root}/foo/EVENT.0.0.all.all.2" }, { { MANGLE_TID, "foo", "", "bar", NULL, "EVENT", 0, 0, 0, 33, 0 }, "{root}/bar/{dep}/{root}/foo/EVENT.0.0.all.33.all" }, { { MANGLE_TGID, "foo", "", "bar", NULL, "EVENT", 0, 0, 34, 0, 0 }, "{root}/bar/{dep}/{root}/foo/EVENT.0.0.34.all.all" }, { { MANGLE_KERNEL, "foo", "", "bar", NULL, "EVENT", 0, 0, 0, 0, 0 }, "{kern}/bar/{dep}/{kern}/foo/EVENT.0.0.all.all.all" }, { { MANGLE_CALLGRAPH, "foo-from", "", "bar-from", "foo-to", "EVENT", 0, 0, 0, 0, 0 }, "{root}/bar-from/{dep}/{root}/foo-from/{cg}/{root}/foo-to/EVENT.0.0.all.all.all" }, { { MANGLE_CPU|MANGLE_TID|MANGLE_TID|MANGLE_TGID|MANGLE_KERNEL, "foo", "", "bar", NULL, "EVENT", 1234, 8192, 34, 35, 2 }, "{kern}/bar/{dep}/{kern}/foo/EVENT.1234.8192.34.35.2" }, { { MANGLE_CPU|MANGLE_TID|MANGLE_TID|MANGLE_TGID|MANGLE_KERNEL, "foo1/foo2", "", "bar1/bar2", NULL, "EVENT", 1234, 8192, 34, 35, 2 }, "{root}/bar1/bar2/{dep}/{root}/foo1/foo2/EVENT.1234.8192.34.35.2" }, { { MANGLE_CALLGRAPH|MANGLE_CPU|MANGLE_TID|MANGLE_TID|MANGLE_TGID|MANGLE_KERNEL, "bar1/bar2", "", "bar1/bar2", "bar1/bar2-to", "EVENT", 1234, 8192, 34, 35, 2 }, "{root}/bar1/bar2/{dep}/{root}/bar1/bar2/{cg}/{root}/bar1/bar2-to/EVENT.1234.8192.34.35.2" }, { { 0, NULL, NULL, NULL, NULL, NULL, 0, 0, 0, 0, 0 }, NULL } }; int main(void) { struct test_input const * test; for (test = tests; test->result; ++test) { char * result = op_mangle_filename(&test->values); char * expect = xmalloc(strlen(test->result) + strlen(op_samples_current_dir) + 1); strcpy(expect, op_samples_current_dir); strcat(expect, test->result); if (strcmp(result, expect)) { fprintf(stderr, "test %d:\nfound: %s\nexpect: %s\n", (int)(test - tests), result, expect); exit(EXIT_FAILURE); } free(expect); free(result); } return EXIT_SUCCESS; } oprofile-1.3.0/libop/op_alloc_counter.h0000664000175000017500000000161212534404406015064 00000000000000/** * @file op_alloc_counter.h * hardware counter allocation * * You can have silliness here. * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_ALLOC_COUNTER_H #define OP_ALLOC_COUNTER_H #include #include "op_cpu_type.h" struct op_event; #ifdef __cplusplus extern "C" { #endif /** * @param pev array of selected event we want to bind to counter * @param nr_events size of pev array * @param cpu_type cpu type * * Try to calculate a binding between passed event in pev and counter number. * The binding is returned in a size_t * where returned ptr[i] is the counter * number bound to pev[i] */ size_t * map_event_to_counter(struct op_event const * pev[], int nr_events, op_cpu cpu_type); #ifdef __cplusplus } #endif #endif /* !OP_ALLOC_COUNTER_H */ oprofile-1.3.0/libop/op_netburst.c0000664000175000017500000011351113136424525014101 00000000000000/** * @file libop/op_netburst.c * Definitions of Netburst events and a function for obtaining an encoding * for a given event/unit mask in perf_events format. * * @remark Copyright 2013 OProfile authors * @remark Read the file COPYING * * Created on: May 14, 2013 * @author Maynard Johnson * (C) Copyright IBM Corp. 2013 * */ #include "config.h" #include #include "op_types.h" #include "op_netburst.h" /** * netburst_events * * Array of events that can be counted on Pentium4. **/ netburst_entry_t op_netburst_events[] = { /* 0 */ {.name = "TC_DELIVER_MODE", .desc = "The duration (in clock cycles) of the operating modes of " "the trace cache and decode engine in the processor package", .event_select = 0x1, .escr_select = 0x1, .allowed_escrs = { 9, 32 }, .perf_code = P4_EVENT_TC_DELIVER_MODE, .event_masks = { {.name = "DD", .desc = "Both logical CPUs in deliver mode", .bit = 0, }, {.name = "DB", .desc = "Logical CPU 0 in deliver mode and " "logical CPU 1 in build mode", .bit = 1, }, {.name = "DI", .desc = "Logical CPU 0 in deliver mode and logical CPU 1 " "either halted, under machine clear condition, or " "transitioning to a long microcode flow", .bit = 2, }, {.name = "BD", .desc = "Logical CPU 0 in build mode and " "logical CPU 1 is in deliver mode", .bit = 3, }, {.name = "BB", .desc = "Both logical CPUs in build mode", .bit = 4, }, {.name = "BI", .desc = "Logical CPU 0 in build mode and logical CPU 1 " "either halted, under machine clear condition, or " "transitioning to a long microcode flow", .bit = 5, }, {.name = "ID", .desc = "Logical CPU 0 either halted, under machine clear " "condition, or transitioning to a long microcode " "flow, and logical CPU 1 in deliver mode", .bit = 6, }, {.name = "IB", .desc = "Logical CPU 0 either halted, under machine clear " "condition, or transitioning to a long microcode " "flow, and logical CPU 1 in build mode", .bit = 7, }, }, }, /* 1 */ {.name = "BPU_FETCH_REQUEST", .desc = "Instruction fetch requests by the Branch Prediction Unit", .event_select = 0x3, .escr_select = 0x0, .allowed_escrs = { 0, 23 }, .perf_code = P4_EVENT_BPU_FETCH_REQUEST, .event_masks = { {.name = "TCMISS", .desc = "Trace cache lookup miss", .bit = 0, .flags = NETBURST_FL_DFL, }, }, }, /* 2 */ {.name = "ITLB_REFERENCE", .desc = "Translations using the Instruction " "Translation Look-Aside Buffer", .event_select = 0x18, .escr_select = 0x3, .allowed_escrs = { 3, 26 }, .perf_code = P4_EVENT_ITLB_REFERENCE, .event_masks = { {.name = "HIT", .desc = "ITLB hit", .bit = 0, }, {.name = "MISS", .desc = "ITLB miss", .bit = 1, }, {.name = "HIT_UC", .desc = "Uncacheable ITLB hit", .bit = 2, }, }, }, /* 3 */ {.name = "MEMORY_CANCEL", .desc = "Canceling of various types of requests in the " "Data cache Address Control unit (DAC)", .event_select = 0x2, .escr_select = 0x5, .allowed_escrs = { 15, 38 }, .perf_code = P4_EVENT_MEMORY_CANCEL, .event_masks = { {.name = "ST_RB_FULL", .desc = "Replayed because no store request " "buffer is available", .bit = 2, }, {.name = "64K_CONF", .desc = "Conflicts due to 64K aliasing", .bit = 3, }, }, }, /* 4 */ {.name = "MEMORY_COMPLETE", .desc = "Completions of a load split, store split, " "uncacheable (UC) split, or UC load", .event_select = 0x8, .escr_select = 0x2, .allowed_escrs = { 13, 36 }, .perf_code = P4_EVENT_MEMORY_COMPLETE, .event_masks = { {.name = "LSC", .desc = "Load split completed, excluding UC/WC loads", .bit = 0, }, {.name = "SSC", .desc = "Any split stores completed", .bit = 1, }, }, }, /* 5 */ {.name = "LOAD_PORT_REPLAY", .desc = "Replayed events at the load port", .event_select = 0x4, .escr_select = 0x2, .allowed_escrs = { 13, 36 }, .perf_code = P4_EVENT_LOAD_PORT_REPLAY, .event_masks = { {.name = "SPLIT_LD", .desc = "Split load", .bit = 1, .flags = NETBURST_FL_DFL, }, }, }, /* 6 */ {.name = "STORE_PORT_REPLAY", .desc = "Replayed events at the store port", .event_select = 0x5, .escr_select = 0x2, .allowed_escrs = { 13, 36 }, .perf_code = P4_EVENT_STORE_PORT_REPLAY, .event_masks = { {.name = "SPLIT_ST", .desc = "Split store", .bit = 1, .flags = NETBURST_FL_DFL, }, }, }, /* 7 */ {.name = "MOB_LOAD_REPLAY", .desc = "Count of times the memory order buffer (MOB) " "caused a load operation to be replayed", .event_select = 0x3, .escr_select = 0x2, .allowed_escrs = { 2, 25 }, .perf_code = P4_EVENT_MOB_LOAD_REPLAY, .event_masks = { {.name = "NO_STA", .desc = "Replayed because of unknown store address", .bit = 1, }, {.name = "NO_STD", .desc = "Replayed because of unknown store data", .bit = 3, }, {.name = "PARTIAL_DATA", .desc = "Replayed because of partially overlapped data " "access between the load and store operations", .bit = 4, }, {.name = "UNALGN_ADDR", .desc = "Replayed because the lower 4 bits of the " "linear address do not match between the " "load and store operations", .bit = 5, }, }, }, /* 8 */ {.name = "PAGE_WALK_TYPE", .desc = "Page walks that the page miss handler (PMH) performs", .event_select = 0x1, .escr_select = 0x4, .allowed_escrs = { 4, 27 }, .perf_code = P4_EVENT_PAGE_WALK_TYPE, .event_masks = { {.name = "DTMISS", .desc = "Page walk for a data TLB miss (load or store)", .bit = 0, }, {.name = "ITMISS", .desc = "Page walk for an instruction TLB miss", .bit = 1, }, }, }, /* 9 */ {.name = "BSQ_CACHE_REFERENCE", .desc = "Cache references (2nd or 3rd level caches) as seen by the " "bus unit. Read types include both load and RFO, and write " "types include writebacks and evictions", .event_select = 0xC, .escr_select = 0x7, .allowed_escrs = { 7, 30 }, .perf_code = P4_EVENT_BSQ_CACHE_REFERENCE, .event_masks = { {.name = "RD_2ndL_HITS", .desc = "Read 2nd level cache hit Shared", .bit = 0, }, {.name = "RD_2ndL_HITE", .desc = "Read 2nd level cache hit Exclusive", .bit = 1, }, {.name = "RD_2ndL_HITM", .desc = "Read 2nd level cache hit Modified", .bit = 2, }, {.name = "RD_3rdL_HITS", .desc = "Read 3rd level cache hit Shared", .bit = 3, }, {.name = "RD_3rdL_HITE", .desc = "Read 3rd level cache hit Exclusive", .bit = 4, }, {.name = "RD_3rdL_HITM", .desc = "Read 3rd level cache hit Modified", .bit = 5, }, {.name = "RD_2ndL_MISS", .desc = "Read 2nd level cache miss", .bit = 8, }, {.name = "RD_3rdL_MISS", .desc = "Read 3rd level cache miss", .bit = 9, }, {.name = "WR_2ndL_MISS", .desc = "A writeback lookup from DAC misses the 2nd " "level cache (unlikely to happen)", .bit = 10, }, }, }, /* 10 */ {.name = "IOQ_ALLOCATION", .desc = "Count of various types of transactions on the bus. A count " "is generated each time a transaction is allocated into the " "IOQ that matches the specified mask bits. An allocated entry " "can be a sector (64 bytes) or a chunk of 8 bytes. Requests " "are counted once per retry. All 'TYPE_BIT*' event-masks " "together are treated as a single 5-bit value", .event_select = 0x3, .escr_select = 0x6, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_IOQ_ALLOCATION, .event_masks = { {.name = "TYPE_BIT0", .desc = "Bus request type (bit 0)", .bit = 0, }, {.name = "TYPE_BIT1", .desc = "Bus request type (bit 1)", .bit = 1, }, {.name = "TYPE_BIT2", .desc = "Bus request type (bit 2)", .bit = 2, }, {.name = "TYPE_BIT3", .desc = "Bus request type (bit 3)", .bit = 3, }, {.name = "TYPE_BIT4", .desc = "Bus request type (bit 4)", .bit = 4, }, {.name = "ALL_READ", .desc = "Count read entries", .bit = 5, }, {.name = "ALL_WRITE", .desc = "Count write entries", .bit = 6, }, {.name = "MEM_UC", .desc = "Count UC memory access entries", .bit = 7, }, {.name = "MEM_WC", .desc = "Count WC memory access entries", .bit = 8, }, {.name = "MEM_WT", .desc = "Count write-through (WT) memory access entries", .bit = 9, }, {.name = "MEM_WP", .desc = "Count write-protected (WP) memory access entries", .bit = 10, }, {.name = "MEM_WB", .desc = "Count WB memory access entries", .bit = 11, }, {.name = "OWN", .desc = "Count all store requests driven by processor, as " "opposed to other processor or DMA", .bit = 13, }, {.name = "OTHER", .desc = "Count all requests driven by other " "processors or DMA", .bit = 14, }, {.name = "PREFETCH", .desc = "Include HW and SW prefetch requests in the count", .bit = 15, }, }, }, /* 11 */ {.name = "IOQ_ACTIVE_ENTRIES", .desc = "Number of entries (clipped at 15) in the IOQ that are " "active. An allocated entry can be a sector (64 bytes) " "or a chunk of 8 bytes. This event must be programmed in " "conjunction with IOQ_allocation. All 'TYPE_BIT*' event-masks " "together are treated as a single 5-bit value", .event_select = 0x1A, .escr_select = 0x6, .allowed_escrs = { 29, -1 }, .perf_code = P4_EVENT_IOQ_ACTIVE_ENTRIES, .event_masks = { {.name = "TYPE_BIT0", .desc = "Bus request type (bit 0)", .bit = 0, }, {.name = "TYPE_BIT1", .desc = "Bus request type (bit 1)", .bit = 1, }, {.name = "TYPE_BIT2", .desc = "Bus request type (bit 2)", .bit = 2, }, {.name = "TYPE_BIT3", .desc = "Bus request type (bit 3)", .bit = 3, }, {.name = "TYPE_BIT4", .desc = "Bus request type (bit 4)", .bit = 4, }, {.name = "ALL_READ", .desc = "Count read entries", .bit = 5, }, {.name = "ALL_WRITE", .desc = "Count write entries", .bit = 6, }, {.name = "MEM_UC", .desc = "Count UC memory access entries", .bit = 7, }, {.name = "MEM_WC", .desc = "Count WC memory access entries", .bit = 8, }, {.name = "MEM_WT", .desc = "Count write-through (WT) memory access entries", .bit = 9, }, {.name = "MEM_WP", .desc = "Count write-protected (WP) memory access entries", .bit = 10, }, {.name = "MEM_WB", .desc = "Count WB memory access entries", .bit = 11, }, {.name = "OWN", .desc = "Count all store requests driven by processor, as " "opposed to other processor or DMA", .bit = 13, }, {.name = "OTHER", .desc = "Count all requests driven by other " "processors or DMA", .bit = 14, }, {.name = "PREFETCH", .desc = "Include HW and SW prefetch requests in the count", .bit = 15, }, }, }, /* 12 */ {.name = "FSB_DATA_ACTIVITY", .desc = "Count of DRDY or DBSY events that " "occur on the front side bus", .event_select = 0x17, .escr_select = 0x6, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_FSB_DATA_ACTIVITY, .event_masks = { {.name = "DRDY_DRV", .desc = "Count when this processor drives data onto the bus. " "Includes writes and implicit writebacks", .bit = 0, }, {.name = "DRDY_OWN", .desc = "Count when this processor reads data from the bus. " "Includes loads and some PIC transactions. Count " "DRDY events that we drive. Count DRDY events sampled " "that we own", .bit = 1, }, {.name = "DRDY_OTHER", .desc = "Count when data is on the bus but not being sampled " "by the processor. It may or may not be driven by " "this processor", .bit = 2, }, {.name = "DBSY_DRV", .desc = "Count when this processor reserves the bus for use " "in the next bus cycle in order to drive data", .bit = 3, }, {.name = "DBSY_OWN", .desc = "Count when some agent reserves the bus for use in " "the next bus cycle to drive data that this processor " "will sample", .bit = 4, }, {.name = "DBSY_OTHER", .desc = "Count when some agent reserves the bus for use in " "the next bus cycle to drive data that this processor " "will NOT sample. It may or may not be being driven " "by this processor", .bit = 5, }, }, }, /* 13 */ {.name = "BSQ_ALLOCATION", .desc = "Allocations in the Bus Sequence Unit (BSQ). The event mask " "bits consist of four sub-groups: request type, request " "length, memory type, and a sub-group consisting mostly of " "independent bits (5 through 10). Must specify a mask for " "each sub-group", .event_select = 0x5, .escr_select = 0x7, .allowed_escrs = { 7, -1 }, .perf_code = P4_EVENT_BSQ_ALLOCATION, .event_masks = { {.name = "REQ_TYPE0", .desc = "Along with REQ_TYPE1, request type encodings are: " "0 - Read (excludes read invalidate), 1 - Read " "invalidate, 2 - Write (other than writebacks), 3 - " "Writeback (evicted from cache)", .bit = 0, }, {.name = "REQ_TYPE1", .desc = "Along with REQ_TYPE0, request type encodings are: " "0 - Read (excludes read invalidate), 1 - Read " "invalidate, 2 - Write (other than writebacks), 3 - " "Writeback (evicted from cache)", .bit = 1, }, {.name = "REQ_LEN0", .desc = "Along with REQ_LEN1, request length encodings are: " "0 - zero chunks, 1 - one chunk, 3 - eight chunks", .bit = 2, }, {.name = "REQ_LEN1", .desc = "Along with REQ_LEN0, request length encodings are: " "0 - zero chunks, 1 - one chunk, 3 - eight chunks", .bit = 3, }, {.name = "REQ_IO_TYPE", .desc = "Request type is input or output", .bit = 5, }, {.name = "REQ_LOCK_TYPE", .desc = "Request type is bus lock", .bit = 6, }, {.name = "REQ_CACHE_TYPE", .desc = "Request type is cacheable", .bit = 7, }, {.name = "REQ_SPLIT_TYPE", .desc = "Request type is a bus 8-byte chunk split across " "an 8-byte boundary", .bit = 8, }, {.name = "REQ_DEM_TYPE", .desc = "0: Request type is HW.SW prefetch. " "1: Request type is a demand", .bit = 9, }, {.name = "REQ_ORD_TYPE", .desc = "Request is an ordered type", .bit = 10, }, {.name = "MEM_TYPE0", .desc = "Along with MEM_TYPE1 and MEM_TYPE2, " "memory type encodings are: 0 - UC, " "1 - USWC, 4- WT, 5 - WP, 6 - WB", .bit = 11, }, {.name = "MEM_TYPE1", .desc = "Along with MEM_TYPE0 and MEM_TYPE2, " "memory type encodings are: 0 - UC, " "1 - USWC, 4- WT, 5 - WP, 6 - WB", .bit = 12, }, {.name = "MEM_TYPE2", .desc = "Along with MEM_TYPE0 and MEM_TYPE1, " "memory type encodings are: 0 - UC, " "1 - USWC, 4- WT, 5 - WP, 6 - WB", .bit = 13, }, }, }, /* 14 */ {.name = "BSQ_ACTIVE_ENTRIES", .desc = "Number of BSQ entries (clipped at 15) currently active " "(valid) which meet the subevent mask criteria during " "allocation in the BSQ. Active request entries are allocated " "on the BSQ until de-allocated. De-allocation of an entry " "does not necessarily imply the request is filled. This " "event must be programmed in conjunction with BSQ_allocation", .event_select = 0x6, .escr_select = 0x7, .allowed_escrs = { 30, -1 }, .perf_code = P4_EVENT_BSQ_ACTIVE_ENTRIES, .event_masks = { {.name = "REQ_TYPE0", .desc = "Along with REQ_TYPE1, request type encodings are: " "0 - Read (excludes read invalidate), 1 - Read " "invalidate, 2 - Write (other than writebacks), 3 - " "Writeback (evicted from cache)", .bit = 0, }, {.name = "REQ_TYPE1", .desc = "Along with REQ_TYPE0, request type encodings are: " "0 - Read (excludes read invalidate), 1 - Read " "invalidate, 2 - Write (other than writebacks), 3 - " "Writeback (evicted from cache)", .bit = 1, }, {.name = "REQ_LEN0", .desc = "Along with REQ_LEN1, request length encodings are: " "0 - zero chunks, 1 - one chunk, 3 - eight chunks", .bit = 2, }, {.name = "REQ_LEN1", .desc = "Along with REQ_LEN0, request length encodings are: " "0 - zero chunks, 1 - one chunk, 3 - eight chunks", .bit = 3, }, {.name = "REQ_IO_TYPE", .desc = "Request type is input or output", .bit = 5, }, {.name = "REQ_LOCK_TYPE", .desc = "Request type is bus lock", .bit = 6, }, {.name = "REQ_CACHE_TYPE", .desc = "Request type is cacheable", .bit = 7, }, {.name = "REQ_SPLIT_TYPE", .desc = "Request type is a bus 8-byte chunk split across " "an 8-byte boundary", .bit = 8, }, {.name = "REQ_DEM_TYPE", .desc = "0: Request type is HW.SW prefetch. " "1: Request type is a demand", .bit = 9, }, {.name = "REQ_ORD_TYPE", .desc = "Request is an ordered type", .bit = 10, }, {.name = "MEM_TYPE0", .desc = "Along with MEM_TYPE1 and MEM_TYPE2, " "memory type encodings are: 0 - UC, " "1 - USWC, 4- WT, 5 - WP, 6 - WB", .bit = 11, }, {.name = "MEM_TYPE1", .desc = "Along with MEM_TYPE0 and MEM_TYPE2, " "memory type encodings are: 0 - UC, " "1 - USWC, 4- WT, 5 - WP, 6 - WB", .bit = 12, }, {.name = "MEM_TYPE2", .desc = "Along with MEM_TYPE0 and MEM_TYPE1, " "memory type encodings are: 0 - UC, " "1 - USWC, 4- WT, 5 - WP, 6 - WB", .bit = 13, }, }, }, /* 15 */ {.name = "SSE_INPUT_ASSIST", .desc = "Number of times an assist is requested to handle problems " "with input operands for SSE/SSE2/SSE3 operations; most " "notably denormal source operands when the DAZ bit isn't set", .event_select = 0x34, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_SSE_INPUT_ASSIST, .event_masks = { {.name = "ALL", .desc = "Count assists for SSE/SSE2/SSE3 uops", .bit = 15, .flags = NETBURST_FL_DFL, }, }, }, /* 16 */ {.name = "PACKED_SP_UOP", .desc = "Number of packed single-precision uops", .event_select = 0x8, .escr_select = 0x1, .perf_code = P4_EVENT_PACKED_SP_UOP, .allowed_escrs = { 12, 35 }, .event_masks = { {.name = "ALL", .desc = "Count all uops operating on packed " "single-precisions operands", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 17 */ {.name = "PACKED_DP_UOP", .desc = "Number of packed double-precision uops", .event_select = 0xC, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_PACKED_DP_UOP, .event_masks = { {.name = "ALL", .desc = "Count all uops operating on packed " "double-precisions operands", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 18 */ {.name = "SCALAR_SP_UOP", .desc = "Number of scalar single-precision uops", .event_select = 0xA, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_SCALAR_SP_UOP, .event_masks = { {.name = "ALL", .desc = "Count all uops operating on scalar " "single-precisions operands", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 19 */ {.name = "SCALAR_DP_UOP", .desc = "Number of scalar double-precision uops", .event_select = 0xE, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_SCALAR_DP_UOP, .event_masks = { {.name = "ALL", .desc = "Count all uops operating on scalar " "double-precisions operands", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 20 */ {.name = "64BIT_MMX_UOP", .desc = "Number of MMX instructions which " "operate on 64-bit SIMD operands", .event_select = 0x2, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_64BIT_MMX_UOP, .event_masks = { {.name = "ALL", .desc = "Count all uops operating on 64-bit SIMD integer " "operands in memory or MMX registers", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 21 */ {.name = "128BIT_MMX_UOP", .desc = "Number of MMX instructions which " "operate on 128-bit SIMD operands", .event_select = 0x1A, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_128BIT_MMX_UOP, .event_masks = { {.name = "ALL", .desc = "Count all uops operating on 128-bit SIMD integer " "operands in memory or MMX registers", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 22 */ {.name = "X87_FP_UOP", .desc = "Number of x87 floating-point uops", .event_select = 0x4, .escr_select = 0x1, .allowed_escrs = { 12, 35 }, .perf_code = P4_EVENT_X87_FP_UOP, .event_masks = { {.name = "ALL", .desc = "Count all x87 FP uops", .bit = 15, .flags = NETBURST_FL_DFL, }, {.name = "TAG0", .desc = "Tag this event with tag bit 0 " "for retirement counting with execution_event", .bit = 16, }, {.name = "TAG1", .desc = "Tag this event with tag bit 1 " "for retirement counting with execution_event", .bit = 17, }, {.name = "TAG2", .desc = "Tag this event with tag bit 2 " "for retirement counting with execution_event", .bit = 18, }, {.name = "TAG3", .desc = "Tag this event with tag bit 3 " "for retirement counting with execution_event", .bit = 19, }, }, }, /* 23 */ {.name = "TC_misc", .desc = "Miscellaneous events detected by the TC. The counter will " "count twice for each occurrence", .event_select = 0x6, .escr_select = 0x1, .allowed_escrs = { 9, 32 }, .perf_code = P4_EVENT_TC_MISC, .event_masks = { {.name = "FLUSH", .desc = "Number of flushes", .bit = 4, .flags = NETBURST_FL_DFL, }, }, }, /* 24 */ {.name = "GLOBAL_POWER_EVENTS", .desc = "Counts the time during which a processor is not stopped", .event_select = 0x13, .escr_select = 0x6, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_GLOBAL_POWER_EVENTS, .event_masks = { {.name = "RUNNING", .desc = "The processor is active (includes the " "handling of HLT STPCLK and throttling", .bit = 0, .flags = NETBURST_FL_DFL, }, }, }, /* 25 */ {.name = "TC_MS_XFER", .desc = "Number of times that uop delivery changed from TC to MS ROM", .event_select = 0x5, .escr_select = 0x0, .allowed_escrs = { 8, 31 }, .perf_code = P4_EVENT_TC_MS_XFER, .event_masks = { {.name = "CISC", .desc = "A TC to MS transfer occurred", .bit = 0, .flags = NETBURST_FL_DFL, }, }, }, /* 26 */ {.name = "UOP_QUEUE_WRITES", .desc = "Number of valid uops written to the uop queue", .event_select = 0x9, .escr_select = 0x0, .allowed_escrs = { 8, 31 }, .perf_code = P4_EVENT_UOP_QUEUE_WRITES, .event_masks = { {.name = "FROM_TC_BUILD", .desc = "The uops being written are from TC build mode", .bit = 0, }, {.name = "FROM_TC_DELIVER", .desc = "The uops being written are from TC deliver mode", .bit = 1, }, {.name = "FROM_ROM", .desc = "The uops being written are from microcode ROM", .bit = 2, }, }, }, /* 27 */ {.name = "RETIRED_MISPRED_BRANCH_TYPE", .desc = "Number of retiring mispredicted branches by type", .event_select = 0x5, .escr_select = 0x2, .allowed_escrs = { 10, 33 }, .perf_code = P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE, .event_masks = { {.name = "CONDITIONAL", .desc = "Conditional jumps", .bit = 1, }, {.name = "CALL", .desc = "Indirect call branches", .bit = 2, }, {.name = "RETURN", .desc = "Return branches", .bit = 3, }, {.name = "INDIRECT", .desc = "Returns, indirect calls, or indirect jumps", .bit = 4, }, }, }, /* 28 */ {.name = "RETIRED_BRANCH_TYPE", .desc = "Number of retiring branches by type", .event_select = 0x4, .escr_select = 0x2, .allowed_escrs = { 10, 33 }, .perf_code = P4_EVENT_RETIRED_BRANCH_TYPE, .event_masks = { {.name = "CONDITIONAL", .desc = "Conditional jumps", .bit = 1, }, {.name = "CALL", .desc = "Indirect call branches", .bit = 2, }, {.name = "RETURN", .desc = "Return branches", .bit = 3, }, {.name = "INDIRECT", .desc = "Returns, indirect calls, or indirect jumps", .bit = 4, }, }, }, /* 29 */ {.name = "resource_stall", .desc = "Occurrences of latency or stalls in the Allocator", .event_select = 0x1, .escr_select = 0x1, .allowed_escrs = { 17, 40 }, .perf_code = P4_EVENT_RESOURCE_STALL, .event_masks = { {.name = "SBFULL", .desc = "A stall due to lack of store buffers", .bit = 5, .flags = NETBURST_FL_DFL, }, }, }, /* 30 */ {.name = "WC_Buffer", .desc = "Number of Write Combining Buffer operations", .event_select = 0x5, .escr_select = 0x5, .allowed_escrs = { 15, 38 }, .perf_code = P4_EVENT_WC_BUFFER, .event_masks = { {.name = "WCB_EVICTS", .desc = "WC Buffer evictions of all causes", .bit = 0, }, {.name = "WCB_FULL_EVICT", .desc = "WC Buffer eviction; no WC buffer is available", .bit = 1, }, }, }, /* 31 */ {.name = "b2b_cycles", .desc = "Number of back-to-back bus cycles", .event_select = 0x16, .escr_select = 0x3, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_B2B_CYCLES, .event_masks = { {.name = "BIT1", .desc = "bit 1", .bit = 1, }, {.name = "BIT2", .desc = "bit 2", .bit = 2, }, {.name = "BIT3", .desc = "bit 3", .bit = 3, }, {.name = "BIT4", .desc = "bit 4", .bit = 4, }, {.name = "BIT5", .desc = "bit 5", .bit = 4, }, {.name = "BIT6", .desc = "bit 6", .bit = 4, }, }, }, /* 32 */ {.name = "bnr", .desc = "Number of bus-not-ready conditions", .event_select = 0x8, .escr_select = 0x3, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_BNR, .event_masks = { {.name = "BIT0", .desc = "bit 0", .bit = 0, }, {.name = "BIT1", .desc = "bit 1", .bit = 1, }, {.name = "BIT2", .desc = "bit 2", .bit = 2, }, }, }, /* 33 */ {.name = "snoop", .desc = "Number of snoop hit modified bus traffic", .event_select = 0x6, .escr_select = 0x3, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_SNOOP, .event_masks = { {.name = "BIT2", .desc = "bit 2", .bit = 2, }, {.name = "BIT6", .desc = "bit 6", .bit = 6, }, {.name = "BIT7", .desc = "bit 7", .bit = 7, }, }, }, /* 34 */ {.name = "response", .desc = "Count of different types of responses", .event_select = 0x4, .escr_select = 0x3, .allowed_escrs = { 6, 29 }, .perf_code = P4_EVENT_RESPONSE, .event_masks = { {.name = "BIT1", .desc = "bit 1", .bit = 1, }, {.name = "BIT2", .desc = "bit 2", .bit = 2, }, {.name = "BIT8", .desc = "bit 8", .bit = 8, }, {.name = "BIT9", .desc = "bit 9", .bit = 9, }, }, }, /* 35 */ {.name = "front_end_event", .desc = "Number of retirements of tagged uops which are specified " "through the front-end tagging mechanism", .event_select = 0x8, .escr_select = 0x5, .allowed_escrs = { 21, 43 }, .perf_code = P4_EVENT_FRONT_END_EVENT, .event_masks = { {.name = "NBOGUS", .desc = "The marked uops are not bogus", .bit = 0, }, {.name = "BOGUS", .desc = "The marked uops are bogus", .bit = 1, }, }, }, /* 36 */ {.name = "execution_event", .desc = "Number of retirements of tagged uops which are specified " "through the execution tagging mechanism. The event-mask " "allows from one to four types of uops to be tagged", .event_select = 0xC, .escr_select = 0x5, .allowed_escrs = { 21, 43 }, .perf_code = P4_EVENT_EXECUTION_EVENT, .event_masks = { {.name = "NBOGUS0", .desc = "The marked uops are not bogus", .bit = 0, }, {.name = "NBOGUS1", .desc = "The marked uops are not bogus", .bit = 1, }, {.name = "NBOGUS2", .desc = "The marked uops are not bogus", .bit = 2, }, {.name = "NBOGUS3", .desc = "The marked uops are not bogus", .bit = 3, }, {.name = "BOGUS0", .desc = "The marked uops are bogus", .bit = 4, }, {.name = "BOGUS1", .desc = "The marked uops are bogus", .bit = 5, }, {.name = "BOGUS2", .desc = "The marked uops are bogus", .bit = 6, }, {.name = "BOGUS3", .desc = "The marked uops are bogus", .bit = 7, }, }, }, /* 37 */ {.name = "replay_event", .desc = "Number of retirements of tagged uops which are specified " "through the replay tagging mechanism", .event_select = 0x9, .escr_select = 0x5, .allowed_escrs = { 21, 43 }, .perf_code = P4_EVENT_REPLAY_EVENT, .event_masks = { {.name = "NBOGUS", .desc = "The marked uops are not bogus", .bit = 0, }, {.name = "BOGUS", .desc = "The marked uops are bogus", .bit = 1, }, {.name = "L1_LD_MISS", .desc = "Virtual mask for L1 cache load miss replays", .bit = 2, }, {.name = "L2_LD_MISS", .desc = "Virtual mask for L2 cache load miss replays", .bit = 3, }, {.name = "DTLB_LD_MISS", .desc = "Virtual mask for DTLB load miss replays", .bit = 4, }, {.name = "DTLB_ST_MISS", .desc = "Virtual mask for DTLB store miss replays", .bit = 5, }, {.name = "DTLB_ALL_MISS", .desc = "Virtual mask for all DTLB miss replays", .bit = 6, }, {.name = "BR_MSP", .desc = "Virtual mask for tagged mispredicted branch replays", .bit = 7, }, {.name = "MOB_LD_REPLAY", .desc = "Virtual mask for MOB load replays", .bit = 8, }, {.name = "SP_LD_RET", .desc = "Virtual mask for split load replays. Use with load_port_replay event", .bit = 9, }, {.name = "SP_ST_RET", .desc = "Virtual mask for split store replays. Use with store_port_replay event", .bit = 10, }, }, }, /* 38 */ {.name = "INSTR_RETIRED", .desc = "Number of instructions retired during a clock cycle", .event_select = 0x2, .escr_select = 0x4, .allowed_escrs = { 20, 42 }, .perf_code = P4_EVENT_INSTR_RETIRED, .event_masks = { {.name = "NBOGUSNTAG", .desc = "Non-bogus instructions that are not tagged", .bit = 0, }, {.name = "NBOGUSTAG", .desc = "Non-bogus instructions that are tagged", .bit = 1, }, {.name = "BOGUSNTAG", .desc = "Bogus instructions that are not tagged", .bit = 2, }, {.name = "BOGUSTAG", .desc = "Bogus instructions that are tagged", .bit = 3, }, }, }, /* 39 */ {.name = "UOPS_RETIRED", .desc = "Number of uops retired during a clock cycle", .event_select = 0x1, .escr_select = 0x4, .allowed_escrs = { 20, 42 }, .perf_code = P4_EVENT_UOPS_RETIRED, .event_masks = { {.name = "NBOGUS", .desc = "The marked uops are not bogus", .bit = 0, }, {.name = "BOGUS", .desc = "The marked uops are bogus", .bit = 1, }, }, }, /* 40 */ {.name = "UOP_TYPE", .desc = "This event is used in conjunction with with the front-end " "mechanism to tag load and store uops", .event_select = 0x2, .escr_select = 0x2, .allowed_escrs = { 18, 41 }, .perf_code = P4_EVENT_UOP_TYPE, .event_masks = { {.name = "TAGLOADS", .desc = "The uop is a load operation", .bit = 1, }, {.name = "TAGSTORES", .desc = "The uop is a store operation", .bit = 2, }, }, }, /* 41 */ {.name = "BRANCH_RETIRED", .desc = "Number of retirements of a branch", .event_select = 0x6, .escr_select = 0x5, .allowed_escrs = { 21, 43 }, .perf_code = P4_EVENT_BRANCH_RETIRED, .event_masks = { {.name = "MMNP", .desc = "Branch not-taken predicted", .bit = 0, }, {.name = "MMNM", .desc = "Branch not-taken mispredicted", .bit = 1, }, {.name = "MMTP", .desc = "Branch taken predicted", .bit = 2, }, {.name = "MMTM", .desc = "Branch taken mispredicted", .bit = 3, }, }, }, /* 42 */ {.name = "MISPRED_BRANCH_RETIRED", .desc = "Number of retirements of mispredicted " "IA-32 branch instructions", .event_select = 0x3, .escr_select = 0x4, .allowed_escrs = { 20, 42 }, .perf_code = P4_EVENT_MISPRED_BRANCH_RETIRED, .event_masks = { {.name = "BOGUS", .desc = "The retired instruction is not bogus", .bit = 0, .flags = NETBURST_FL_DFL, }, }, }, /* 43 */ {.name = "X87_ASSIST", .desc = "Number of retirements of x87 instructions that required " "special handling", .event_select = 0x3, .escr_select = 0x5, .allowed_escrs = { 21, 43 }, .perf_code = P4_EVENT_X87_ASSIST, .event_masks = { {.name = "FPSU", .desc = "Handle FP stack underflow", .bit = 0, }, {.name = "FPSO", .desc = "Handle FP stack overflow", .bit = 1, }, {.name = "POAO", .desc = "Handle x87 output overflow", .bit = 2, }, {.name = "POAU", .desc = "Handle x87 output underflow", .bit = 3, }, {.name = "PREA", .desc = "Handle x87 input assist", .bit = 4, }, }, }, /* 44 */ {.name = "MACHINE_CLEAR", .desc = "Number of occurrences when the entire " "pipeline of the machine is cleared", .event_select = 0x2, .escr_select = 0x5, .allowed_escrs = { 21, 43 }, .perf_code = P4_EVENT_MACHINE_CLEAR, .event_masks = { {.name = "CLEAR", .desc = "Counts for a portion of the many cycles while the " "machine is cleared for any cause. Use edge-" "triggering for this bit only to get a count of " "occurrences versus a duration", .bit = 0, }, {.name = "MOCLEAR", .desc = "Increments each time the machine is cleared due to " "memory ordering issues", .bit = 2, }, {.name = "SMCLEAR", .desc = "Increments each time the machine is cleared due to " "self-modifying code issues", .bit = 6, }, }, }, /* 45 */ {.name = "instr_completed", .desc = "Instructions that have completed and " "retired during a clock cycle (models 3, 4, 6 only)", .event_select = 0x7, .escr_select = 0x4, .allowed_escrs = { 21, 42 }, .perf_code = P4_EVENT_INSTR_COMPLETED, .event_masks = { {.name = "NBOGUS", .desc = "Non-bogus instructions", .bit = 0, }, {.name = "BOGUS", .desc = "Bogus instructions", .bit = 1, }, }, }, }; #define NETBURST_EVENT_COUNT (sizeof(op_netburst_events)/sizeof(netburst_entry_t)) int op_netburst_get_perf_encoding(const char * evt_name, unsigned long evt_um, int do_kernel, int do_user, u64 * config) { unsigned int evmask = 0; const char *n; unsigned int i, evt_idx, um_idx; int bit; int tag_enable = 0, tag_value = 0; int perf_code; netburst_escr_value_t escr; netburst_cccr_value_t cccr; u64 escr_val; evt_idx = um_idx = 0xffffffff; // Match up event name with netburst event index for (i = 0; i < NETBURST_EVENT_COUNT; i++) { if (!strcmp(evt_name, op_netburst_events[i].name)) { evt_idx = i; break; } } if (evt_idx == 0xffffffff) return -1; // Iterate through unit masks of the event to find UM idx for (i = 0; op_netburst_events[evt_idx].event_masks[i].name; i++) { if (evt_um == (unsigned long)(1 << op_netburst_events[evt_idx].event_masks[i].bit)) { um_idx = i; break; } } if (um_idx == 0xffffffff) return -1; perf_code = op_netburst_events[evt_idx].perf_code; bit = op_netburst_events[evt_idx].event_masks[um_idx].bit; n = op_netburst_events[evt_idx].event_masks[um_idx].name; if (bit < EVENT_MASK_BITS && n) { evmask |= (1 << bit); } else if (bit >= EVENT_MASK_BITS && n) { tag_value |= (1 << (bit - EVENT_MASK_BITS)); tag_enable = 1; } if (do_user) { escr.bits.t1_usr = 1; escr.bits.t0_usr = 1; } if (do_kernel) { escr.bits.t1_os = 1; escr.bits.t0_os = 1; } escr.bits.tag_enable = tag_enable; escr.bits.tag_value = tag_value; escr.bits.event_mask = evmask; escr.bits.event_select = op_netburst_events[evt_idx].event_select; cccr.bits.enable = 1; cccr.bits.escr_select = op_netburst_events[evt_idx].escr_select; cccr.bits.active_thread = 3; escr_val = escr.val & ~(0x3full << 25); escr_val |= perf_code << 25; *config = (escr_val << 32) | cccr.val; return 0; } oprofile-1.3.0/libop/op_xml_out.h0000664000175000017500000000331612603572700013725 00000000000000/** * @file op_xml_out.h * utility routines for writing XML * * @remark Copyright 2008 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #ifndef OP_XML_OUT_H #define OP_XML_OUT_H #ifdef __cplusplus extern "C" { #endif typedef enum { NONE=0, TABLE_ID, PROFILE, PROCESSOR, CPU_NAME, TITLE, SCHEMA_VERSION, MHZ, SETUP, TIMER_SETUP, RTC_INTERRUPTS, EVENT_SETUP, EVENT_NAME, UNIT_MASK, SETUP_COUNT, SEPARATED_CPUS, OPTIONS, SESSION, DEBUG_INFO, DETAILS, EXCLUDE_DEPENDENT, EXCLUDE_SYMBOLS, IMAGE_PATH, INCLUDE_SYMBOLS, MERGE, CLASSES, CLASS, CPU_NUM, EVENT_NUM, EVENT_MASK, PROCESS, PROC_ID, THREAD, THREAD_ID, BINARY, MODULE, NAME, CALLERS, CALLEES, SYMBOL, ID_REF, SELFREF, DETAIL_LO, DETAIL_HI, SYMBOL_TABLE, SYMBOL_DATA, STARTING_ADDR, SOURCE_FILE, SOURCE_LINE, CODE_LENGTH, SUMMARY, SAMPLE, COUNT, DETAIL_TABLE, SYMBOL_DETAILS, DETAIL_DATA, VMA, BYTES_TABLE, BYTES, HELP_EVENTS, HELP_HEADER, HELP_TITLE, HELP_DOC, HELP_EVENT, HELP_EVENT_NAME, HELP_EVENT_GROUP, HELP_EVENT_DESC, HELP_COUNTER_MASK, HELP_MIN_COUNT, HELP_EXT, HELP_UNIT_MASKS, HELP_DEFAULT_MASK, HELP_UNIT_MASKS_CATEGORY, HELP_UNIT_MASK, HELP_UNIT_MASK_VALUE, HELP_UNIT_MASK_DESC, HELP_UNIT_MASK_NAME, } tag_t; char const * xml_tag_name(tag_t tag); void open_xml_element(tag_t tag, int with_attrs, char *buffer, size_t size); void close_xml_element(tag_t tag, int has_nested, char *buffer, size_t size); void init_xml_int_attr(tag_t attr, int value, char *buffer, size_t size); void init_xml_dbl_attr(tag_t attr, double value, char *buffer, size_t size); void init_xml_str_attr(tag_t attr, char const *str, char *buffer, size_t size); #ifdef __cplusplus } #endif #endif /* OP_XML_OUT_H */ oprofile-1.3.0/libop/op_hw_specific.h0000664000175000017500000001030013230147570014510 00000000000000/* * @file architecture specific interfaces * @remark Copyright 2008 Intel Corporation * @remark Read the file COPYING * @author Andi Kleen */ #if defined(__i386__) || defined(__x86_64__) /* Assume we run on the same host as the profilee */ #define num_to_mask(x) ((1U << (x)) - 1) typedef struct { unsigned eax, ebx, ecx, edx; } cpuid_data; #if defined(__i386__) static inline void cpuid(int func, cpuid_data * p) { asm("push %%ebx; cpuid; mov %%ebx, %%esi; pop %%ebx" : "=a" (p->eax), "=S" (p->ebx), "=c" (p->ecx), "=d" (p->edx) : "0" (func)); } #else static inline void cpuid(int func, cpuid_data * p) { asm("cpuid" : "=a" (p->eax), "=b" (p->ebx), "=c" (p->ecx), "=d" (p->edx) : "0" (func)); } #endif static inline int cpuid_vendor(char *vnd) { union { struct { unsigned b,d,c; }; char v[12]; } v; cpuid_data data; cpuid(0, &data); v.b = data.ebx; v.c = data.ecx; v.d = data.edx; return !strncmp(v.v, vnd, 12); } static inline unsigned int cpuid_signature() { cpuid_data data; cpuid(1, &data); return data.eax; } static inline unsigned int cpu_model(unsigned int eax) { unsigned model = (eax & 0xf0) >> 4; unsigned ext_model = (eax & 0xf0000) >> 12; return ext_model + model; } static inline unsigned int cpu_family(unsigned int eax) { unsigned family = (eax & 0xf00) >> 8; unsigned ext_family = (eax & 0xff00000) >> 20; return ext_family + family; } static inline unsigned int cpu_stepping(unsigned int eax) { return (eax & 0xf); } /* Work around Nehalem spec update AAJ79: CPUID incorrectly indicates unhalted reference cycle architectural event is supported. We assume steppings after C0 report correct data in CPUID. */ static inline void workaround_nehalem_aaj79(unsigned *ebx) { unsigned eax; if (!cpuid_vendor("GenuineIntel")) return; eax = cpuid_signature(); if (cpu_family(eax) != 6 || cpu_model(eax) != 26 || cpu_stepping(eax) > 4) return; *ebx |= (1 << 2); /* disable unsupported event */ } static inline unsigned arch_get_filter(op_cpu cpu_type) { if (op_cpu_base_type(cpu_type) == CPU_ARCH_PERFMON) { cpuid_data data; cpuid(0xa, &data); workaround_nehalem_aaj79(&data.ebx); return data.ebx & num_to_mask(data.eax >> 24); } return -1U; } static inline int arch_num_counters(op_cpu cpu_type) { if (op_cpu_base_type(cpu_type) == CPU_ARCH_PERFMON) { cpuid_data data; cpuid(0xa, &data); return (data.eax >> 8) & 0xff; } return -1; } static inline unsigned arch_get_counter_mask(void) { cpuid_data data; cpuid(0xa, &data); return num_to_mask((data.eax >> 8) & 0xff); } static inline op_cpu op_cpu_specific_type(op_cpu cpu_type) { if (cpu_type == CPU_ARCH_PERFMON) { /* Already know is Intel family 6, so just check the model. */ int model = cpu_model(cpuid_signature()); switch(model) { case 0x0f: case 0x16: case 0x17: case 0x1d: return CPU_CORE_2; case 0x1a: case 0x1e: case 0x1f: case 0x2e: return CPU_CORE_I7; case 0x1c: return CPU_ATOM; case 0x25: /* Westmere mobile/desktop/entry level server */ case 0x2c: /* Westmere-EP (Intel Xeon 5600 series) */ case 0x2f: /* Westmere-EX */ return CPU_WESTMERE; case 0x2a: case 0x2d: return CPU_SANDYBRIDGE; case 0x3a: case 0x3e: return CPU_IVYBRIDGE; case 0x3c: case 0x3f: case 0x45: case 0x46: return CPU_HASWELL; case 0x3d: case 0x47: case 0x4f: case 0x56: return CPU_BROADWELL; case 0x4e: case 0x5e: case 0x55: case 0x8e: case 0x9e: return CPU_SKYLAKE; case 0x37: case 0x4d: case 0x4c: return CPU_SILVERMONT; case 0x5c: case 0x5f: return CPU_GOLDMONT; case 0x57: case 0x85: return CPU_KNIGHTSLANDING; case 0x7a: return CPU_GOLDMONTPLUS; } } return cpu_type; } #else static inline unsigned arch_get_filter(op_cpu cpu_type) { /* Do something with passed arg to shut up the compiler warning */ if (cpu_type != CPU_NO_GOOD) return 0; return 0; } static inline int arch_num_counters(op_cpu cpu_type) { /* Do something with passed arg to shut up the compiler warning */ if (cpu_type != CPU_NO_GOOD) return -1; return -1; } static inline unsigned arch_get_counter_mask(void) { return 0; } static inline op_cpu op_cpu_specific_type(op_cpu cpu_type) { return cpu_type; } #endif oprofile-1.3.0/libop/op_events.h0000664000175000017500000001015412546756165013557 00000000000000/** * @file op_events.h * Details of PMC profiling events * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_EVENTS_H #define OP_EVENTS_H #ifdef __cplusplus extern "C" { #endif #include "op_cpu_type.h" #include "op_types.h" #include "op_list.h" #define UMASK_SHIFT 8 #define UMASK_MASK 0xff #define EXTRA_EDGE (1U << 18) #define EXTRA_MIN_VAL EXTRA_EDGE #define EXTRA_ANY (1U << 21) #define EXTRA_INV (1U << 23) #define EXTRA_CMASK_SHIFT 24 #define EXTRA_CMASK_MASK 0xff #define EXTRA_PEBS (1U << 19) /* fake, mapped to pin control, but mapped back for perf */ #define EXTRA_NONE (1U << 22) /* mapped to enabled */ /** Describe an unit mask type. Events can optionally use a filter called * the unit mask. the mask type can be a bitmask or a discrete value */ enum unit_mask_type { utm_mandatory, /**< useless but required by the hardware */ utm_exclusive, /**< only one of the values is allowed */ utm_bitmask /**< bitmask */ }; #define MAX_UNIT_MASK 64 /** Describe an unit mask. */ struct op_unit_mask { char * name; /**< name of unit mask type */ u32 num; /**< number of possible unit masks */ enum unit_mask_type unit_type_mask; u32 default_mask; /**< only the gui use it */ char * default_mask_name; struct op_described_um { u32 extra; u32 value; char * name; char * desc; } um[MAX_UNIT_MASK]; struct list_head um_next; /**< next um in list */ int used; /**< used by events file parser */ }; /** Describe an event. */ struct op_event { u32 counter_mask; /**< bitmask of allowed counter */ u32 val; /**< event number */ /** which unit mask if any allowed */ struct op_unit_mask * unit; char * name; /**< the event name */ char * desc; /**< the event description */ int min_count; /**< minimum counter value allowed */ int filter; /**< architecture specific filter or -1 */ char * ext; /**< extended events */ struct list_head event_next; /**< next event in list */ }; /** Return the known events list. Idempotent */ struct list_head * op_events(op_cpu cpu_type); /** Find a given event, returns NULL on error */ struct op_event * op_find_event(op_cpu cpu_type, u32 nr, u32 um); struct op_event * op_find_event_any(op_cpu cpu_type, u32 nr); /** Find a given event by name */ struct op_event * find_event_by_name(char const * name, unsigned um, int um_valid); /** * Find a mapping for a given event ID for architectures requiring additional information * from what is held in the events file. */ char const * find_mapping_for_event(u32 val, op_cpu cpu_type); /** op_check_events() return code */ enum op_event_check { OP_OK_EVENT = 0, /**< event is valid and allowed */ OP_INVALID_EVENT = 1, /**< event number is invalid */ OP_INVALID_UM = 2, /**< unit mask is invalid */ OP_INVALID_COUNTER = 4 /**< event is not allowed for the given counter */ }; /** * sanity check event values * @param ctr counter number * @param event value for counter * @param um unit mask for counter * @param cpu_type processor type * * Check that the counter event and unit mask values are allowed. * * The function returns bitmask of failure cause 0 otherwise * * \sa op_cpu, OP_EVENTS_OK */ int op_check_events(char * name, int ctr, u32 event, u32 um, op_cpu cpu_type); /** * free memory used by any call to above function. Need to be called only once */ void op_free_events(void); struct op_default_event_descr { char * name; unsigned long count; unsigned long um; }; /** * op_default_event - return the details of the default event * @param cpu_type cpu type * @param descr filled event description * * Fills in the event description if applicable */ void op_default_event(op_cpu cpu_type, struct op_default_event_descr * descr); /** * op_resolve_unit_mask - resolve a unit mask in a parsed event. * @pe parsed event * @extra pointer to extra mask or NULL. * * Fills in the extra mask for the unit mask. */ struct parsed_event; void op_resolve_unit_mask(struct parsed_event *pe, u32 *extra); #ifdef __cplusplus } #endif #endif /* OP_EVENTS_H */ oprofile-1.3.0/libop/op_parse_event.c0000664000175000017500000000425512534404406014547 00000000000000/** * @file op_parse_event.c * event parsing * * You can have silliness here. * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include "op_parse_event.h" #include "op_string.h" #include "op_events.h" static char * next_part(char const ** str) { char const * c; char * ret; if ((*str)[0] == '\0') return NULL; if ((*str)[0] == ':') ++(*str); c = *str; while (*c != '\0' && *c != ':') ++c; if (c == *str) return NULL; ret = op_xstrndup(*str, c - *str); *str += c - *str; return ret; } static int parse_ulong(char const * str) { unsigned long value; char * end; value = strtoul(str, &end, 0); if (end && *end) { fprintf(stderr, "Invalid event part %s\n", str); exit(EXIT_FAILURE); } return value; } size_t parse_events(struct parsed_event * parsed_events, size_t max_events, char const * const * events, int check_count) { size_t i = 0; while (events[i]) { char const * cp = events[i]; char * part = next_part(&cp); if (i >= max_events) { fprintf(stderr, "Too many events specified: CPU " "only has %lu counters.\n", (unsigned long) max_events); exit(EXIT_FAILURE); } if (!part) { fprintf(stderr, "Invalid event %s\n", cp); exit(EXIT_FAILURE); } parsed_events[i].name = part; if (check_count) { part = next_part(&cp); if (!part) { fprintf(stderr, "Invalid count for event %s\n", events[i]); exit(EXIT_FAILURE); } parsed_events[i].count = parse_ulong(part); free(part); } parsed_events[i].unit_mask = 0; part = next_part(&cp); if (part) { parsed_events[i].unit_mask_valid = 1; if (!isdigit(*part)) parsed_events[i].unit_mask_name = part; else { parsed_events[i].unit_mask = parse_ulong(part); free(part); } } parsed_events[i].kernel = 1; part = next_part(&cp); if (part) { parsed_events[i].kernel = parse_ulong(part); free(part); } parsed_events[i].user = 1; part = next_part(&cp); if (part) { parsed_events[i].user = parse_ulong(part); free(part); } ++i; } return i; } oprofile-1.3.0/libop/op_netburst.h0000664000175000017500000001717512534404406014114 00000000000000/* * @file libop/op_netburst.h * Definitions of structures and methods for handling Intel Netburst events. * * @remark Copyright 2013 OProfile authors * @remark Read the file COPYING * * Created on: May 14, 2013 * @author Maynard Johnson * (C) Copyright IBM Corp. 2013 * * NOTE: The code in this file was largely borrowed from a libpfm file, * so we include below the Copyright and licensing information from that file. */ /* * Copyright (c) 2006 IBM Corp. * Contributed by Kevin Corry * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * pfmlib_netburst_priv.h * * Structures and definitions for use in the Pentium4/Xeon/EM64T libpfm code. */ #ifndef OP_NETBURST_H_ #define OP_NETBURST_H_ #ifdef __cplusplus extern "C" { #endif /* ESCR: Event Selection Control Register * * These registers are used to select which event to count along with options * for that event. There are (up to) 45 ESCRs, but each data counter is * restricted to a specific set of ESCRs. */ /** * netburst_escr_value_t * * Bit-wise breakdown of the ESCR registers. * * Bits Description * ------- ----------- * 63 - 31 Reserved * 30 - 25 Event Select * 24 - 9 Event Mask * 8 - 5 Tag Value * 4 Tag Enable * 3 T0 OS - Enable counting in kernel mode (thread 0) * 2 T0 USR - Enable counting in user mode (thread 0) * 1 T1 OS - Enable counting in kernel mode (thread 1) * 0 T1 USR - Enable counting in user mode (thread 1) **/ #define EVENT_MASK_BITS 16 #define EVENT_SELECT_BITS 6 typedef union { unsigned long long val; struct { unsigned long t1_usr:1; unsigned long t1_os:1; unsigned long t0_usr:1; unsigned long t0_os:1; unsigned long tag_enable:1; unsigned long tag_value:4; unsigned long event_mask:EVENT_MASK_BITS; unsigned long event_select:EVENT_SELECT_BITS; unsigned long reserved:1; } bits; } netburst_escr_value_t; /* CCCR: Counter Configuration Control Register * * These registers are used to configure the data counters. There are 18 * CCCRs, one for each data counter. */ /** * netburst_cccr_value_t * * Bit-wise breakdown of the CCCR registers. * * Bits Description * ------- ----------- * 63 - 32 Reserved * 31 OVF - The data counter overflowed. * 30 Cascade - Enable cascading of data counter when alternate * counter overflows. * 29 - 28 Reserved * 27 OVF_PMI_T1 - Generate interrupt for LP1 on counter overflow * 26 OVF_PMI_T0 - Generate interrupt for LP0 on counter overflow * 25 FORCE_OVF - Force interrupt on every counter increment * 24 Edge - Enable rising edge detection of the threshold comparison * output for filtering event counts. * 23 - 20 Threshold Value - Select the threshold value for comparing to * incoming event counts. * 19 Complement - Select how incoming event count is compared with * the threshold value. * 18 Compare - Enable filtering of event counts. * 17 - 16 Active Thread - Only used with HT enabled. * 00 - None: Count when neither LP is active. * 01 - Single: Count when only one LP is active. * 10 - Both: Count when both LPs are active. * 11 - Any: Count when either LP is active. * 15 - 13 ESCR Select - Select which ESCR to use for selecting the * event to count. * 12 Enable - Turns the data counter on or off. * 11 - 0 Reserved **/ typedef union { unsigned long long val; struct { unsigned long reserved1:12; unsigned long enable:1; unsigned long escr_select:3; unsigned long active_thread:2; unsigned long compare:1; unsigned long complement:1; unsigned long threshold:4; unsigned long edge:1; unsigned long force_ovf:1; unsigned long ovf_pmi_t0:1; unsigned long ovf_pmi_t1:1; unsigned long reserved2:2; unsigned long cascade:1; unsigned long overflow:1; } bits; } netburst_cccr_value_t; /** * netburst_event_mask_t * * Defines one bit of the event-mask for one Pentium4 event. * * @name: Event mask name * @desc: Event mask description * @bit: The bit position within the event_mask field. **/ typedef struct { char *name; char *desc; unsigned int bit; unsigned int flags; } netburst_event_mask_t; /* * netburst_event_mask_t->flags */ #define NETBURST_FL_DFL 0x1 /* event mask is default */ #define MAX_ESCRS_PER_EVENT 2 /* * These are the unique event codes used by perf_events. * They need to be encoded in the ESCR.event_select field when * programming for perf_events. * NOTE: Only 36 of the events specified below have counterparts * in oprofile's p4 event list */ enum netburst_event_code { P4_EVENT_TC_DELIVER_MODE, P4_EVENT_BPU_FETCH_REQUEST, P4_EVENT_ITLB_REFERENCE, P4_EVENT_MEMORY_CANCEL, P4_EVENT_MEMORY_COMPLETE, P4_EVENT_LOAD_PORT_REPLAY, P4_EVENT_STORE_PORT_REPLAY, P4_EVENT_MOB_LOAD_REPLAY, P4_EVENT_PAGE_WALK_TYPE, P4_EVENT_BSQ_CACHE_REFERENCE, P4_EVENT_IOQ_ALLOCATION, P4_EVENT_IOQ_ACTIVE_ENTRIES, P4_EVENT_FSB_DATA_ACTIVITY, P4_EVENT_BSQ_ALLOCATION, P4_EVENT_BSQ_ACTIVE_ENTRIES, P4_EVENT_SSE_INPUT_ASSIST, P4_EVENT_PACKED_SP_UOP, P4_EVENT_PACKED_DP_UOP, P4_EVENT_SCALAR_SP_UOP, P4_EVENT_SCALAR_DP_UOP, P4_EVENT_64BIT_MMX_UOP, P4_EVENT_128BIT_MMX_UOP, P4_EVENT_X87_FP_UOP, P4_EVENT_TC_MISC, P4_EVENT_GLOBAL_POWER_EVENTS, P4_EVENT_TC_MS_XFER, P4_EVENT_UOP_QUEUE_WRITES, P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE, P4_EVENT_RETIRED_BRANCH_TYPE, P4_EVENT_RESOURCE_STALL, P4_EVENT_WC_BUFFER, P4_EVENT_B2B_CYCLES, P4_EVENT_BNR, P4_EVENT_SNOOP, P4_EVENT_RESPONSE, P4_EVENT_FRONT_END_EVENT, P4_EVENT_EXECUTION_EVENT, P4_EVENT_REPLAY_EVENT, P4_EVENT_INSTR_RETIRED, P4_EVENT_UOPS_RETIRED, P4_EVENT_UOP_TYPE, P4_EVENT_BRANCH_RETIRED, P4_EVENT_MISPRED_BRANCH_RETIRED, P4_EVENT_X87_ASSIST, P4_EVENT_MACHINE_CLEAR, P4_EVENT_INSTR_COMPLETED, }; typedef struct { char *name; char *desc; unsigned int event_select; unsigned int escr_select; enum netburst_event_code perf_code; /* perf_event event code, enum P4_EVENTS */ int allowed_escrs[MAX_ESCRS_PER_EVENT]; netburst_event_mask_t event_masks[EVENT_MASK_BITS]; } netburst_entry_t; #define NETBURST_ATTR_U 0 #define NETBURST_ATTR_K 1 #define NETBURST_ATTR_C 2 #define NETBURST_ATTR_E 3 #define NETBURST_ATTR_T 4 #define _NETBURST_ATTR_U (1 << NETBURST_ATTR_U) #define _NETBURST_ATTR_K (1 << NETBURST_ATTR_K) #define P4_REPLAY_REAL_MASK 0x00000003 int op_netburst_get_perf_encoding(const char * evt_name, unsigned long evt_um, int do_kernel, int do_user, u64 * config); #ifdef __cplusplus } #endif #endif // OP_NETBURST_H_ oprofile-1.3.0/libop/op_mangle.c0000664000175000017500000000547312534404406013502 00000000000000/** * @file op_mangle.c * Mangling of sample file names * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include "op_mangle.h" #include #include #include "op_libiberty.h" #include "op_sample_file.h" #include "op_config.h" static void append_image(char * dest, int flags, int anon, char const * name, char const * anon_name) { if ((flags & MANGLE_KERNEL) && !strchr(name, '/')) { strcat(dest, "{kern}/"); } else if (anon && anon_name) { strcat(dest, "{anon:"); strcat(dest, anon_name); strcat(dest,"}/"); } else { strcat(dest, "{root}/"); } strcat(dest, name); strcat(dest, "/"); } char * op_mangle_filename(struct mangle_values const * values) { char * mangled; size_t len; int anon = values->flags & MANGLE_ANON; int cg_anon = values->flags & MANGLE_CG_ANON; /* if dep_name != image_name we need to invert them (and so revert them * unconditionally because if they are equal it doesn't hurt to invert * them), see P:3, FIXME: this is a bit weirds, we prolly need to * reword pp_interface */ char const * image_name = values->dep_name; char const * anon_name = values->anon_name; char const * dep_name = values->image_name; char const * cg_image_name = values->cg_image_name; len = strlen(op_samples_current_dir) + strlen(dep_name) + 1 + strlen(values->event_name) + 1 + strlen(image_name) + 1; // Just to silence Coverity, check cg_image_name and anon_name below for !=NULL. if (cg_image_name && (values->flags & MANGLE_CALLGRAPH)) len += strlen(cg_image_name) + 1; if (anon_name && (anon || cg_anon)) len += strlen(anon_name); /* provision for tgid, tid, unit_mask, cpu and some {root}, {dep}, * {kern}, {anon} and {cg} marker */ /* FIXME: too ugly */ len += 256; mangled = xmalloc(len); strcpy(mangled, op_samples_current_dir); append_image(mangled, values->flags, 0, image_name, anon_name); strcat(mangled, "{dep}" "/"); append_image(mangled, values->flags, anon, dep_name, anon_name); if (cg_image_name && (values->flags & MANGLE_CALLGRAPH)) { strcat(mangled, "{cg}" "/"); append_image(mangled, values->flags, cg_anon, cg_image_name, anon_name); } strcat(mangled, values->event_name); sprintf(mangled + strlen(mangled), ".%d.%d.", values->count, values->unit_mask); if (values->flags & MANGLE_TGID) { sprintf(mangled + strlen(mangled), "%d.", values->tgid); } else { sprintf(mangled + strlen(mangled), "%s.", "all"); } if (values->flags & MANGLE_TID) { sprintf(mangled + strlen(mangled), "%d.", values->tid); } else { sprintf(mangled + strlen(mangled), "%s.", "all"); } if (values->flags & MANGLE_CPU) { sprintf(mangled + strlen(mangled), "%d", values->cpu); } else { sprintf(mangled + strlen(mangled), "%s", "all"); } return mangled; } oprofile-1.3.0/libop/op_cpu_type.c0000664000175000017500000005410713260503760014065 00000000000000/** * @file op_cpu_type.c * CPU type determination * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "config.h" #include "op_cpu_type.h" #include "op_hw_specific.h" struct cpu_descr { char const * pretty; char const * name; op_cpu cpu; unsigned int nr_counters; }; static struct cpu_descr const cpu_descrs[MAX_CPU_TYPE] = { { "Pentium Pro", "i386/ppro", CPU_PPRO, 2 }, { "PII", "i386/pii", CPU_PII, 2 }, { "PIII", "i386/piii", CPU_PIII, 2 }, { "Athlon", "i386/athlon", CPU_ATHLON, 4 }, { "CPU with timer interrupt", "timer", CPU_TIMER_INT, 1 }, { "P4 / Xeon", "i386/p4", CPU_P4, 8 }, { "AMD64 processors", "x86-64/hammer", CPU_HAMMER, 4 }, { "P4 / Xeon with 2 hyper-threads", "i386/p4-ht", CPU_P4_HT2, 4 }, { "Alpha EV67", "alpha/ev67", CPU_AXP_EV67, 20 }, { "Pentium M (P6 core)", "i386/p6_mobile", CPU_P6_MOBILE, 2 }, { "ARM/XScale PMU1", "arm/xscale1", CPU_ARM_XSCALE1, 3 }, { "ARM/XScale PMU2", "arm/xscale2", CPU_ARM_XSCALE2, 5 }, { "ppc64 POWER4", "ppc64/power4", CPU_PPC64_POWER4, 8 }, { "ppc64 POWER5", "ppc64/power5", CPU_PPC64_POWER5, 6 }, { "ppc64 POWER5+", "ppc64/power5+", CPU_PPC64_POWER5p, 6 }, { "ppc64 970", "ppc64/970", CPU_PPC64_970, 8 }, { "MIPS 20K", "mips/20K", CPU_MIPS_20K, 1}, { "MIPS 24K", "mips/24K", CPU_MIPS_24K, 2}, { "MIPS 25K", "mips/25K", CPU_MIPS_25K, 2}, { "MIPS 34K", "mips/34K", CPU_MIPS_34K, 2}, { "MIPS 5K", "mips/5K", CPU_MIPS_5K, 2}, { "MIPS R10000", "mips/r10000", CPU_MIPS_R10000, 2 }, { "MIPS R12000", "mips/r12000", CPU_MIPS_R12000, 4 }, { "QED RM7000", "mips/rm7000", CPU_MIPS_RM7000, 1 }, { "PMC-Sierra RM9000", "mips/rm9000", CPU_MIPS_RM9000, 2 }, { "Sibyte SB1", "mips/sb1", CPU_MIPS_SB1, 4 }, { "NEC VR5432", "mips/vr5432", CPU_MIPS_VR5432, 2 }, { "NEC VR5500", "mips/vr5500", CPU_MIPS_VR5500, 2 }, { "e500", "ppc/e500", CPU_PPC_E500, 4 }, { "e500v2", "ppc/e500v2", CPU_PPC_E500_2, 4 }, { "Core Solo / Duo", "i386/core", CPU_CORE, 2 }, { "PowerPC G4", "ppc/7450", CPU_PPC_7450, 6 }, { "Core 2", "i386/core_2", CPU_CORE_2, 2 }, { "ppc64 POWER6", "ppc64/power6", CPU_PPC64_POWER6, 4 }, { "ppc64 970MP", "ppc64/970MP", CPU_PPC64_970MP, 8 }, { "AMD64 family10", "x86-64/family10", CPU_FAMILY10, 4 }, { "ARM 11MPCore", "arm/mpcore", CPU_ARM_MPCORE, 2 }, { "ARM V6 PMU", "arm/armv6", CPU_ARM_V6, 3 }, { "ppc64 POWER5++", "ppc64/power5++", CPU_PPC64_POWER5pp, 6 }, { "e300", "ppc/e300", CPU_PPC_E300, 4 }, { "ARM Cortex-A8", "arm/armv7", CPU_ARM_V7, 5 }, { "Intel Architectural Perfmon", "i386/arch_perfmon", CPU_ARCH_PERFMON, 0}, { "AMD64 family11h", "x86-64/family11h", CPU_FAMILY11H, 4 }, { "ppc64 POWER7", "ppc64/power7", CPU_PPC64_POWER7, 6 }, { "Intel Core/i7", "i386/core_i7", CPU_CORE_I7, 4 }, { "Intel Atom", "i386/atom", CPU_ATOM, 2 }, { "Loongson2", "mips/loongson2", CPU_MIPS_LOONGSON2, 2 }, { "Intel Nehalem microarchitecture", "i386/nehalem", CPU_NEHALEM, 4 }, { "ARM Cortex-A9", "arm/armv7-ca9", CPU_ARM_V7_CA9, 7 }, { "MIPS 74K", "mips/74K", CPU_MIPS_74K, 4}, { "MIPS 1004K", "mips/1004K", CPU_MIPS_1004K, 2}, { "AMD64 family12h", "x86-64/family12h", CPU_FAMILY12H, 4 }, { "AMD64 family14h", "x86-64/family14h", CPU_FAMILY14H, 4 }, { "AMD64 family15h", "x86-64/family15h", CPU_FAMILY15H, 6 }, { "Intel Westmere microarchitecture", "i386/westmere", CPU_WESTMERE, 4 }, { "ARMv7 Scorpion", "arm/armv7-scorpion", CPU_ARM_SCORPION, 5 }, { "ARMv7 ScorpionMP", "arm/armv7-scorpionmp", CPU_ARM_SCORPIONMP, 5 }, { "Intel Sandy Bridge microarchitecture", "i386/sandybridge", CPU_SANDYBRIDGE, 8 }, { "TILE64", "tile/tile64", CPU_TILE_TILE64, 2 }, { "TILEPro", "tile/tilepro", CPU_TILE_TILEPRO, 4 }, { "TILE-GX", "tile/tilegx", CPU_TILE_TILEGX, 4 }, { "IBM System z10", "s390/z10", CPU_S390_Z10, 1 }, { "IBM zEnterprise z196", "s390/z196", CPU_S390_Z196, 1 }, { "Intel Ivy Bridge microarchitecture", "i386/ivybridge", CPU_IVYBRIDGE, 8 }, { "ARM Cortex-A5", "arm/armv7-ca5", CPU_ARM_V7_CA5, 3 }, { "ARM Cortex-A7", "arm/armv7-ca7", CPU_ARM_V7_CA7, 5 }, { "ARM Cortex-A15", "arm/armv7-ca15", CPU_ARM_V7_CA15, 7 }, { "Intel Haswell microarchitecture", "i386/haswell", CPU_HASWELL, 4 }, { "IBM zEnterprise EC12", "s390/zEC12", CPU_S390_ZEC12, 1 }, { "AMD64 generic", "x86-64/generic", CPU_AMD64_GENERIC, 4 }, { "IBM Power Architected Events V1", "ppc64/architected_events_v1", CPU_PPC64_ARCH_V1, 6 }, { "ppc64 POWER8", "ppc64/power8", CPU_PPC64_POWER8, 6 }, { "e500mc", "ppc/e500mc", CPU_PPC_E500MC, 4 }, { "e6500", "ppc/e6500", CPU_PPC_E6500, 6 }, { "Intel Silvermont microarchitecture", "i386/silvermont", CPU_SILVERMONT, 2 }, { "ARMv7 Krait", "arm/armv7-krait", CPU_ARM_KRAIT, 5 }, { "APM X-Gene", "arm/armv8-xgene", CPU_ARM_V8_APM_XGENE, 6 }, { "Intel Broadwell microarchitecture", "i386/broadwell", CPU_BROADWELL, 4 }, { "ARM Cortex-A57", "arm/armv8-ca57", CPU_ARM_V8_CA57, 6}, { "ARM Cortex-A53", "arm/armv8-ca53", CPU_ARM_V8_CA53, 6}, { "Intel Skylake microarchitecture", "i386/skylake", CPU_SKYLAKE, 4 }, { "Intel Goldmont microarchitecture", "i386/goldmont", CPU_GOLDMONT, 4 }, { "Intel Goldmont Plus microarchitecture", "i386/goldmontplus", CPU_GOLDMONTPLUS, 4 }, { "IBM z13", "s390/z13", CPU_S390_Z13, 1 }, { "ARM Cortex-A17", "arm/armv7-ca17", CPU_ARM_V7_CA17, 7 }, { "ppc64 POWER9", "ppc64/power9", CPU_PPC64_POWER9, 6 }, { "Intel Knights Landing", "i386/knightslanding", CPU_KNIGHTSLANDING, 4 }, }; static size_t const nr_cpu_descrs = sizeof(cpu_descrs) / sizeof(struct cpu_descr); static char * _get_cpuinfo_cpu_type_line(char * buf, int len, const char * prefix, int token) { char * ret = NULL; char * end = NULL; int prefix_len = strlen(prefix); FILE * fp = fopen("/proc/cpuinfo", "r"); if (!fp) { perror("Unable to open /proc/cpuinfo\n"); return ret; } memset(buf, 0, len); while (!ret) { if (fgets(buf, len, fp) == NULL) { fprintf(stderr, "Did not find processor type in /proc/cpuinfo.\n"); break; } if (!strncmp(buf, prefix, prefix_len)) { ret = buf + prefix_len; /* Strip leading whitespace and ':' delimiter */ while (*ret && (*ret == ':' || isspace(*ret))) ++ret; buf = ret; /* if token param 0 then read the whole line else * first token only. */ if (token == 0) { /* Trim trailing whitespace and commas */ end = buf + strlen(buf) - 1; while (isspace(*end) || *end == ',') --end; *(++end) = '\0'; break; } else { /* Scan ahead to the end of the token */ while (*buf && !(isspace(*buf) || *buf == ',')) ++buf; /* Trim trailing whitespace and commas */ *buf = '\0'; break; } } } fclose(fp); return ret; } static char * _get_cpuinfo_cpu_type(char * buf, int len, const char * prefix) { return _get_cpuinfo_cpu_type_line(buf, len, prefix, 1); } #if PPC64_ARCH // The aux vector stuff below is currently only used by ppc64 arch static ElfW(auxv_t) * auxv_buf = NULL; static ElfW(auxv_t) * _auxv_fetch() { ElfW(auxv_t) * auxv_temp = (ElfW(auxv_t) *)auxv_buf; int auxv_f; size_t page_size = getpagesize(); ssize_t bytes; if(auxv_temp == NULL) { auxv_f = open("/proc/self/auxv", O_RDONLY); if(auxv_f == -1) { perror("Cannot open /proc/self/auxv"); fprintf(stderr, "Assuming native platform profiling is supported.\n"); return NULL; } else { auxv_temp = (ElfW(auxv_t) *)malloc(page_size); if (!auxv_temp) { perror("Allocation of space for auxv failed."); close(auxv_f); return NULL; } bytes = read(auxv_f, (void *)auxv_temp, page_size); if (bytes <= 0) { free(auxv_temp); close(auxv_f); perror("Error /proc/self/auxv read failed"); return NULL; } if (close(auxv_f)) { perror("Error close failed"); fprintf(stderr, "Recoverable error. Continuing.\n"); } } auxv_buf = auxv_temp; } return (ElfW(auxv_t) *)auxv_temp; } static const char * fetch_at_hw_platform(ElfW(Addr) type) { int i = 0; const char * platform = NULL; ElfW(auxv_t) * my_auxv = NULL; if ((my_auxv = (ElfW(auxv_t)*) _auxv_fetch()) == NULL) return NULL; do { if(my_auxv[i].a_type == type) { platform = (const char *)my_auxv[i].a_un.a_val; break; } i++; } while (my_auxv[i].a_type != AT_NULL); return platform; } static void release_at_hw_platform(void) { if (auxv_buf) { free(auxv_buf); auxv_buf = NULL; } } static op_cpu _try_ppc64_arch_generic_cpu(void) { const char * platform, * base_platform; op_cpu cpu_type = CPU_NO_GOOD; platform = fetch_at_hw_platform(AT_PLATFORM); base_platform = fetch_at_hw_platform(AT_BASE_PLATFORM); if (!platform || !base_platform) { fprintf(stderr, "NULL returned for one or both of AT_PLATFORM/AT_BASE_PLATFORM\n"); fprintf(stderr, "AT_PLATFORM: %s; \tAT_BASE_PLATFORM: %s\n", platform, base_platform); release_at_hw_platform(); return cpu_type; } // FIXME whenever a new IBM Power processor is added -- need to ensure // we're returning the correct version of the architected events file. if (strcmp(platform, base_platform)) { // If platform and base_platform differ by only a "+" at the end of the name, we // consider these equal. int platforms_are_equivalent = 0; size_t p1_len, p2_len; p1_len = strlen(platform); p2_len = strlen(base_platform); if (p2_len == (p1_len + 1)) { if ((strncmp(platform, base_platform, p1_len) == 0) && (base_platform[p2_len - 1] == '+')) { platforms_are_equivalent = 1; } } if (!platforms_are_equivalent) { // FIXME /* For POWER8 running in POWER7 compat mode (RHEL 6.5 and SLES 11 SP4), * the kernel will have enough POWER8-specific PMU code so we can utilize * all of the POWER8 events. In general, this is not necessarily the case * when running in compat mode. This code needs to be inspected for every * new IBM Power processor released, but for now, we'll assume that for the * next processor model (assuming there will be something like a POWER9?), * we should use just the architected events when running POWER8 compat mode. */ if ((strcmp(platform, "power7") == 0) && (strcmp(base_platform, "power8") == 0)) cpu_type = CPU_PPC64_POWER8; else if ((strcmp(platform, "power8") == 0) && (strcmp(base_platform, "power9") == 0)) cpu_type = CPU_PPC64_POWER9; else cpu_type = CPU_PPC64_ARCH_V1; } } release_at_hw_platform(); return cpu_type; } static op_cpu _get_ppc64_cpu_type(void) { int i; size_t len; char line[100], cpu_type_str[64], cpu_name_lowercase[64], * cpu_name; op_cpu cpu_type = CPU_NO_GOOD; cpu_type = _try_ppc64_arch_generic_cpu(); if (cpu_type != CPU_NO_GOOD) return cpu_type; cpu_name = _get_cpuinfo_cpu_type(line, 100, "cpu"); if (!cpu_name) return CPU_NO_GOOD; len = strlen(cpu_name); for (i = 0; i < (int)len ; i++) cpu_name_lowercase[i] = tolower(cpu_name[i]); if (strncmp(cpu_name_lowercase, "power7+", 7) == 0) cpu_name_lowercase[6] = '\0'; if (strncmp(cpu_name_lowercase, "power8e", 7) == 0) cpu_name_lowercase[6] = '\0'; /* The POWER8NV and POWER8NVL variants have the same core PMU events as * POWER8. */ if (strncmp(cpu_name_lowercase, "power8nv", 8) == 0) cpu_name_lowercase[6] = '\0'; cpu_type_str[0] = '\0'; strcat(cpu_type_str, "ppc64/"); strncat(cpu_type_str, cpu_name_lowercase, len); cpu_type = op_get_cpu_number(cpu_type_str); return cpu_type; } #else static op_cpu _get_ppc64_cpu_type(void) { return CPU_NO_GOOD; } #endif static char *alpha_cpu_models[] = { "EV67", "EV68CB", "EV68AL", "EV68CX", "EV7", "EV79", "EV69", NULL }; static op_cpu _get_alpha_cpu_type(void) { char *cpu_model; char **p; char line[100]; cpu_model = _get_cpuinfo_cpu_type(line, 100, "cpu model"); if (!cpu_model) return CPU_NO_GOOD; for (p = alpha_cpu_models; *p; p++) { if (strcmp(cpu_model, *p) == 0) return CPU_AXP_EV67; } return CPU_NO_GOOD; } static op_cpu _get_arm_cpu_type(void) { unsigned long cpuid, vendorid; char line[100]; char * cpu_part, * cpu_implementer; cpu_implementer = _get_cpuinfo_cpu_type(line, 100, "CPU implementer"); if (!cpu_implementer) return CPU_NO_GOOD; errno = 0; vendorid = strtoul(cpu_implementer, NULL, 16); if (errno) { fprintf(stderr, "Unable to parse CPU implementer %s\n", cpu_implementer); return CPU_NO_GOOD; } cpu_part = _get_cpuinfo_cpu_type(line, 100, "CPU part"); if (!cpu_part) return CPU_NO_GOOD; errno = 0; cpuid = strtoul(cpu_part, NULL, 16); if (errno) { fprintf(stderr, "Unable to parse CPU part %s\n", cpu_part); return CPU_NO_GOOD; } if (vendorid == 0x41) { /* ARM Ltd. */ switch (cpuid) { case 0xb36: case 0xb56: case 0xb76: return op_get_cpu_number("arm/armv6"); case 0xb02: return op_get_cpu_number("arm/mpcore"); case 0xc05: return op_get_cpu_number("arm/armv7-ca5"); case 0xc07: return op_get_cpu_number("arm/armv7-ca7"); case 0xc08: return op_get_cpu_number("arm/armv7"); case 0xc09: return op_get_cpu_number("arm/armv7-ca9"); case 0xc0f: return op_get_cpu_number("arm/armv7-ca15"); case 0xc0e: return op_get_cpu_number("arm/armv7-ca17"); case 0xd07: return op_get_cpu_number("arm/armv8-ca57"); case 0xd03: return op_get_cpu_number("arm/armv8-ca53"); } } else if (vendorid == 0x42) { /* Broadcom Corporation */ switch (cpuid) { case 0x00f: return op_get_cpu_number("arm/armv7-ca15"); } } else if (vendorid == 0x50) { /* Applied Micro Circuits Corporation */ switch (cpuid) { case 0x000: return op_get_cpu_number("arm/armv8-xgene"); } } else if (vendorid == 0x69) { /* Intel xscale */ switch (cpuid >> 9) { case 1: return op_get_cpu_number("arm/xscale1"); case 2: return op_get_cpu_number("arm/xscale2"); } } return CPU_NO_GOOD; } static op_cpu _get_tile_cpu_type(void) { int i; size_t len; char line[100], cpu_type_str[64], cpu_name_lowercase[64], * cpu_name; cpu_name = _get_cpuinfo_cpu_type(line, 100, "model name"); if (!cpu_name) return CPU_NO_GOOD; len = strlen(cpu_name); for (i = 0; i < (int)len ; i++) cpu_name_lowercase[i] = tolower(cpu_name[i]); cpu_type_str[0] = '\0'; strcat(cpu_type_str, "tile/"); strncat(cpu_type_str, cpu_name_lowercase, len); return op_get_cpu_number(cpu_type_str); } #if defined(__x86_64__) || defined(__i386__) int op_is_cpu_vendor(char * vendor) { return cpuid_vendor(vendor); } static unsigned cpuid_eax(unsigned func) { cpuid_data d; cpuid(func, &d); return d.eax; } static inline int perfmon_available(void) { unsigned eax; if (cpuid_eax(0) < 10) return 0; eax = cpuid_eax(10); if ((eax & 0xff) == 0) return 0; return (eax >> 8) & 0xff; } static int cpu_info_number(char *name, unsigned long *number) { char buf[100]; char *end; if (!_get_cpuinfo_cpu_type(buf, sizeof buf, name)) return 0; *number = strtoul(buf, &end, 0); return end > buf; } static op_cpu _get_intel_cpu_type(void) { unsigned eax, family, model; if (perfmon_available()) return op_cpu_specific_type(CPU_ARCH_PERFMON); /* Handle old non arch perfmon CPUs */ eax = cpuid_signature(); family = cpu_family(eax); model = cpu_model(eax); if (family == 6) { /* Reproduce kernel p6_init logic. Only for non arch perfmon cpus */ switch (model) { case 0 ... 2: return op_get_cpu_number("i386/ppro"); case 3 ... 5: return op_get_cpu_number("i386/pii"); case 6 ... 8: case 10 ... 11: return op_get_cpu_number("i386/piii"); case 9: case 13: return op_get_cpu_number("i386/p6_mobile"); } } else if (family == 15) { unsigned long siblings; /* Reproduce kernel p4_init() logic */ if (model > 6 || model == 5) return CPU_NO_GOOD; if (!cpu_info_number("siblings", &siblings) || siblings == 1) return op_get_cpu_number("i386/p4"); if (siblings == 2) return op_get_cpu_number("i386/p4-ht"); } return CPU_NO_GOOD; } static op_cpu _get_amd_cpu_type(void) { unsigned eax, family; op_cpu ret = CPU_NO_GOOD; char buf[20] = {'\0'}; eax = cpuid_signature(); family = cpu_family(eax); /* These family does not exist in the past.*/ if ((family < 0x0f && family != 0x6) || family == 0x13) return ret; switch (family) { case 0x6: ret = op_get_cpu_number("i386/athlon"); break; case 0x0f: ret = op_get_cpu_number("x86-64/hammer"); break; case 0x10: ret = op_get_cpu_number("x86-64/family10"); break; case 0x11: case 0x12: case 0x14: case 0x15: /* From family11h and forward, we use the same naming scheme */ snprintf(buf, 20, "x86-64/family%xh", family); ret = op_get_cpu_number(buf); break; default: /* Future processors */ snprintf(buf, 20, "x86-64/generic"); ret = op_get_cpu_number(buf); break; } return ret; } static op_cpu _get_x86_64_cpu_type(void) { op_cpu ret = CPU_NO_GOOD; if (cpuid_vendor("GenuineIntel")) { ret = _get_intel_cpu_type(); } else if (cpuid_vendor("AuthenticAMD")) { ret = _get_amd_cpu_type(); } return ret; } #else static op_cpu _get_x86_64_cpu_type(void) { return CPU_NO_GOOD; } #endif struct mips_cpu_descr { const char * key; const char * value; }; static struct mips_cpu_descr mips_cpu_descrs[] = { { .key = "MIPS 5Kc", .value = "mips/5K" }, /* CPU_5KC */ { .key = "MIPS 20Kc", .value = "mips/20K" }, /* CPU_20KC */ { .key = "MIPS 24Kc", .value = "mips/24K" }, /* CPU_24K */ { .key = "MIPS 25Kc", .value = "mips/25K" }, /* CPU_25KF */ { .key = "MIPS 34Kc", .value = "mips/34K" }, /* CPU_34K */ { .key = "MIPS 74Kc", .value = "mips/74K" }, /* CPU_74K */ { .key = "MIPS M14Kc", .value = "mips/M14Kc" }, /* CPU_M14KC */ { .key = "RM9000", .value = "mips/rm9000" }, /* CPU_RM9000 */ { .key = "R10000", .value = "mips/r10000" }, /* CPU_R10000 */ { .key = "R12000", .value = "mips/r12000" }, /* CPU_R12000 */ { .key = "R14000", .value = "mips/r12000" }, /* CPU_R14000 */ { .key = "ICT Loongson-2", .value = "mips/loongson2" }, /* CPU_LOONGSON2 */ { .key = NULL, .value = NULL } }; static const char * _get_mips_op_name(const char * key) { struct mips_cpu_descr * p_it = mips_cpu_descrs; size_t len; while (p_it->key != NULL) { len = strlen(p_it->key); if (0 == strncmp(key, p_it->key, len)) return p_it->value; ++p_it; } return NULL; } static op_cpu _get_mips_cpu_type(void) { char line[100]; char * cpu_model; const char * op_name = NULL; cpu_model = _get_cpuinfo_cpu_type_line(line, 100, "cpu model", 0); if (!cpu_model) return CPU_NO_GOOD; op_name = _get_mips_op_name(cpu_model); if (op_name) return op_get_cpu_number(op_name); return CPU_NO_GOOD; } static op_cpu _get_s390_cpu_type(void) { char line[100]; char *ptr; const char prefix[] = "machine = "; unsigned model; ptr = _get_cpuinfo_cpu_type_line(line, sizeof(line), "processor", 0); if (!ptr) return CPU_NO_GOOD; ptr = strstr(ptr, prefix); if (!ptr) return CPU_NO_GOOD; ptr += sizeof(prefix) - 1; model = strtol(ptr, NULL, 16); switch (model) { case 0x2097: case 0x2098: return CPU_S390_Z10; case 0x2817: case 0x2818: return CPU_S390_Z196; case 0x2827: case 0x2828: return CPU_S390_ZEC12; case 0x2964: return CPU_S390_Z13; } return CPU_NO_GOOD; } static op_cpu __get_cpu_type(void) { struct utsname uname_info; if (uname(&uname_info) < 0) { perror("uname failed"); return CPU_NO_GOOD; } if (strncmp(uname_info.machine, "x86_64", 6) == 0 || fnmatch("i?86", uname_info.machine, 0) == 0) { return _get_x86_64_cpu_type(); } if ((strncmp(uname_info.machine, "ppc64", 5) == 0) || (strncmp(uname_info.machine, "ppc64le", 7) == 0)) { return _get_ppc64_cpu_type(); } if (strncmp(uname_info.machine, "alpha", 5) == 0) { return _get_alpha_cpu_type(); } if (strncmp(uname_info.machine, "arm", 3) == 0 || strncmp(uname_info.machine, "aarch64", 7) == 0) { return _get_arm_cpu_type(); } if (strncmp(uname_info.machine, "tile", 4) == 0) { return _get_tile_cpu_type(); } if (strncmp(uname_info.machine, "mips", 4) == 0) { return _get_mips_cpu_type(); } if (strncmp(uname_info.machine, "s390", 4) == 0) { return _get_s390_cpu_type(); } return CPU_NO_GOOD; } int op_cpu_variations(op_cpu cpu_type) { switch (cpu_type) { case CPU_ARCH_PERFMON: return 1; default: return 0; } } op_cpu op_cpu_base_type(op_cpu cpu_type) { /* All the processors that support CPU_ARCH_PERFMON */ switch (cpu_type) { case CPU_CORE_2: case CPU_CORE_I7: case CPU_ATOM: case CPU_NEHALEM: case CPU_HASWELL: case CPU_BROADWELL: case CPU_SKYLAKE: case CPU_GOLDMONT: case CPU_SILVERMONT: case CPU_WESTMERE: case CPU_SANDYBRIDGE: case CPU_IVYBRIDGE: case CPU_KNIGHTSLANDING: return CPU_ARCH_PERFMON; default: /* assume processor in a class by itself */ return cpu_type; } } op_cpu op_get_cpu_type(void) { int cpu_type = CPU_NO_GOOD; if ((cpu_type = __get_cpu_type()) == CPU_NO_GOOD) { fprintf(stderr, "Unable to obtain cpu_type\n"); fprintf(stderr, "Verify that a pre-1.0 version of OProfile is not in use.\n" "If the /dev/oprofile/cpu_type file exists, locate the pre-1.0 OProfile\n" "installation, and use its 'opcontrol' command, passing the --deinit option.\n"); } return cpu_type; } op_cpu op_get_cpu_number(char const * cpu_string) { int cpu_type = CPU_NO_GOOD; int scan_matches = 0; size_t i; for (i = 0; i < nr_cpu_descrs; ++i) { if (!strcmp(cpu_descrs[i].name, cpu_string)) { cpu_type = cpu_descrs[i].cpu; break; } } /* Attempt to convert into a number */ if (cpu_type == CPU_NO_GOOD) { scan_matches = sscanf(cpu_string, "%d\n", &cpu_type); if (scan_matches && (cpu_type <= CPU_NO_GOOD || cpu_type >= MAX_CPU_TYPE)) cpu_type = CPU_NO_GOOD; } return cpu_type; } char const * op_get_cpu_type_str(op_cpu cpu_type) { if (cpu_type <= CPU_NO_GOOD || cpu_type >= MAX_CPU_TYPE) return "invalid cpu type"; return cpu_descrs[cpu_type].pretty; } char const * op_get_cpu_name(op_cpu cpu_type) { if (cpu_type <= CPU_NO_GOOD || cpu_type >= MAX_CPU_TYPE) return "invalid cpu type"; return cpu_descrs[cpu_type].name; } int op_get_nr_counters(op_cpu cpu_type) { int cnt; if (cpu_type <= CPU_NO_GOOD || cpu_type >= MAX_CPU_TYPE) return 0; cnt = arch_num_counters(cpu_type); if (cnt < 0) cnt = cpu_descrs[cpu_type].nr_counters; return cnt; } oprofile-1.3.0/libop/op_xml_events.c0000664000175000017500000000572712534404406014425 00000000000000/** * @file op_xml_events.c * routines for generating event files in XML * * @remark Copyright 2008 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #include #include #include "op_events.h" #include "op_list.h" #include "op_cpu_type.h" #include "op_xml_out.h" static op_cpu cpu_type; #define MAX_BUFFER 16384 static char buffer[MAX_BUFFER]; void open_xml_events(char const * title, char const * doc, op_cpu the_cpu_type) { char const * schema_version = "2.0"; buffer[0] = '\0'; cpu_type = the_cpu_type; open_xml_element(HELP_EVENTS, 1, buffer, MAX_BUFFER); init_xml_str_attr(SCHEMA_VERSION, schema_version, buffer, MAX_BUFFER); close_xml_element(NONE, 1, buffer, MAX_BUFFER); open_xml_element(HELP_HEADER, 1, buffer, MAX_BUFFER); init_xml_str_attr(HELP_TITLE, title, buffer, MAX_BUFFER); init_xml_str_attr(HELP_DOC, doc, buffer, MAX_BUFFER); close_xml_element(NONE, 0, buffer, MAX_BUFFER); printf("%s", buffer); } void close_xml_events(void) { buffer[0] = '\0'; close_xml_element(HELP_EVENTS, 0, buffer, MAX_BUFFER); printf("%s", buffer); } void xml_help_for_event(struct op_event const * event) { uint i; int has_nested = strcmp(event->unit->name, "zero"); buffer[0] = '\0'; open_xml_element(HELP_EVENT, 1, buffer, MAX_BUFFER); init_xml_str_attr(HELP_EVENT_NAME, event->name, buffer, MAX_BUFFER); init_xml_str_attr(HELP_EVENT_DESC, event->desc, buffer, MAX_BUFFER); init_xml_int_attr(HELP_COUNTER_MASK, event->counter_mask, buffer, MAX_BUFFER); if (event->ext) init_xml_str_attr(HELP_EXT, event->ext, buffer, MAX_BUFFER); init_xml_int_attr(HELP_MIN_COUNT, event->min_count, buffer, MAX_BUFFER); if (has_nested) { char um_type[10]; close_xml_element(NONE, 1, buffer, MAX_BUFFER); open_xml_element(HELP_UNIT_MASKS, 1, buffer, MAX_BUFFER); init_xml_int_attr(HELP_DEFAULT_MASK, event->unit->default_mask, buffer, MAX_BUFFER); switch (event->unit->unit_type_mask){ case utm_bitmask: strncpy(um_type, "bitmask", sizeof(um_type)); break; case utm_exclusive: strncpy(um_type, "exclusive", sizeof(um_type)); break; case utm_mandatory: strncpy(um_type, "mandatory", sizeof(um_type)); break; } init_xml_str_attr(HELP_UNIT_MASKS_CATEGORY, um_type, buffer, MAX_BUFFER); close_xml_element(NONE, 1, buffer, MAX_BUFFER); for (i = 0; i < event->unit->num; i++) { open_xml_element(HELP_UNIT_MASK, 1, buffer, MAX_BUFFER); if (event->unit->um[i].name) init_xml_str_attr(HELP_UNIT_MASK_NAME, event->unit->um[i].name, buffer, MAX_BUFFER); init_xml_int_attr(HELP_UNIT_MASK_VALUE, event->unit->um[i].value, buffer, MAX_BUFFER); init_xml_str_attr(HELP_UNIT_MASK_DESC, event->unit->um[i].desc, buffer, MAX_BUFFER); close_xml_element(NONE, 0, buffer, MAX_BUFFER); } close_xml_element(HELP_UNIT_MASKS, 0, buffer, MAX_BUFFER); } close_xml_element(has_nested ? HELP_EVENT : NONE, has_nested, buffer, MAX_BUFFER); printf("%s", buffer); } oprofile-1.3.0/libop/op_xml_events.h0000664000175000017500000000070212534404406014416 00000000000000/** * @file op_xml_events.h * routines for generating event files in XML * * @remark Copyright 2008 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #ifndef OP_XML_EVENTS_H #define OP_XML_EVENTS_H #include "op_events.h" void xml_help_for_event(struct op_event const * event); void open_xml_events(char const * title, char const * doc, op_cpu cpu_type); void close_xml_events(void); #endif /* OP_XML_EVENTS_H */ oprofile-1.3.0/libop/op_events.c0000664000175000017500000010262213230147570013535 00000000000000/** * @file op_events.c * Details of PMC profiling events * * You can have silliness here. * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include "op_events.h" #include "op_libiberty.h" #include "op_fileio.h" #include "op_string.h" #include "op_cpufreq.h" #include "op_hw_specific.h" #include "op_parse_event.h" #include #include #include #include static LIST_HEAD(events_list); static LIST_HEAD(um_list); static char const * filename; static unsigned int line_nr; static void delete_event(struct op_event * event); static void read_events(char const * file); static void read_unit_masks(char const * file); static void free_unit_mask(struct op_unit_mask * um); static char *build_fn(const char *cpu_name, const char *fn) { char *s; static const char *dir; if (dir == NULL) dir = getenv("OPROFILE_EVENTS_DIR"); if (dir == NULL) dir = OP_DATADIR; s = xmalloc(strlen(dir) + strlen(cpu_name) + strlen(fn) + 5); sprintf(s, "%s/%s/%s", dir, cpu_name, fn); return s; } static void parse_error(char const * context) { fprintf(stderr, "oprofile: parse error in %s, line %u\n", filename, line_nr); fprintf(stderr, "%s\n", context); exit(EXIT_FAILURE); } static int parse_int(char const * str) { int value; if (sscanf(str, "%d", &value) != 1) parse_error("expected decimal value"); return value; } static int parse_hex(char const * str) { int value; /* 0x/0X to force the use of hexa notation for field intended to be in hexadecimal */ if (sscanf(str, "0x%x", &value) != 1 && sscanf(str, "0X%x", &value) != 1) parse_error("expected hexadecimal value"); return value; } static u64 parse_long_hex(char const * str) { u64 value; if (sscanf(str, "%Lx", &value) != 1) parse_error("expected long hexadecimal value"); fflush(stderr); return value; } static void include_um(const char *start, const char *end) { char *s; char cpu[end - start + 1]; int old_line_nr; const char *old_filename; strncpy(cpu, start, end - start); cpu[end - start] = 0; s = build_fn(cpu, "unit_masks"); old_line_nr = line_nr; old_filename = filename; read_unit_masks(s); line_nr = old_line_nr; filename = old_filename; free(s); } /* extra:cmask=12,inv,edge */ unsigned parse_extra(const char *s) { unsigned v, w; int o; /* This signifies that the first word of the description is unique */ v = EXTRA_NONE; while (*s) { if (isspace(*s)) break; if (strisprefix(s, "edge")) { v |= EXTRA_EDGE; s += 4; } else if (strisprefix(s, "inv")) { v |= EXTRA_INV; s += 3; } else if (sscanf(s, "cmask=%x%n", &w, &o) >= 1) { v |= (w & EXTRA_CMASK_MASK) << EXTRA_CMASK_SHIFT; s += o; } else if (strisprefix(s, "any")) { v |= EXTRA_ANY; s += 3; } else if (strisprefix(s, "pebs")) { v |= EXTRA_PEBS; s += 4; } else { parse_error("Illegal extra field modifier"); } if (*s == ',') ++s; } return v; } /* name:MESI type:bitmask default:0x0f */ static void parse_um(struct op_unit_mask * um, char const * line) { int seen_name = 0; int seen_type = 0; int seen_default = 0; char const * valueend = line + 1; char const * tagend = line + 1; char const * start = line; while (*valueend) { valueend = skip_nonws(valueend); while (*tagend != ':' && *tagend) ++tagend; if (valueend == tagend) break; if (!*tagend) parse_error("parse_um() expected :value"); ++tagend; if (strisprefix(start, "include")) { if (seen_name + seen_type + seen_default > 0) parse_error("include must be on its own"); free_unit_mask(um); include_um(tagend, valueend); return; } if (strisprefix(start, "name")) { if (seen_name) parse_error("duplicate name: tag"); seen_name = 1; um->name = op_xstrndup(tagend, valueend - tagend); } else if (strisprefix(start, "type")) { if (seen_type) parse_error("duplicate type: tag"); seen_type = 1; if (strisprefix(tagend, "mandatory")) { um->unit_type_mask = utm_mandatory; } else if (strisprefix(tagend, "bitmask")) { um->unit_type_mask = utm_bitmask; } else if (strisprefix(tagend, "exclusive")) { um->unit_type_mask = utm_exclusive; } else { parse_error("invalid unit mask type"); } } else if (strisprefix(start, "default")) { if (seen_default) parse_error("duplicate default: tag"); seen_default = 1; if (0 != strncmp(tagend, "0x", 2)) { um->default_mask_name = op_xstrndup( tagend, valueend - tagend); } else { um->default_mask = parse_hex(tagend); } } else { parse_error("invalid unit mask tag"); } valueend = skip_ws(valueend); tagend = valueend; start = valueend; } if (!um->name) parse_error("Missing name for unit mask"); if (!seen_type) parse_error("Missing type for unit mask"); } /* \t0x08 (M)odified cache state */ /* \t0x08 extra:inv,cmask=... mod_cach_state (M)odified cache state */ static void parse_um_entry(struct op_described_um * entry, char const * line) { char const * c = line; /* value */ c = skip_ws(c); entry->value = parse_hex(c); /* extra: */ c = skip_nonws(c); c = skip_ws(c); if (!*c) goto invalid_out; if (strisprefix(c, "extra:")) { c += 6; entry->extra = parse_extra(c); /* include the regular umask if there are real extra bits */ if (entry->extra != EXTRA_NONE) entry->extra |= (entry->value & UMASK_MASK) << UMASK_SHIFT; /* named mask */ c = skip_nonws(c); c = skip_ws(c); if (!*c) goto invalid_out; /* "extra:" !!ALWAYS!! followed by named mask */ entry->name = op_xstrndup(c, strcspn(c, " \t")); c = skip_nonws(c); c = skip_ws(c); } else { entry->extra = 0; } /* desc */ if (!*c) { /* This is a corner case where the named unit mask entry * only has one word. This should really be fixed in the * unit_mask file */ entry->desc = xstrdup(entry->name); } else entry->desc = xstrdup(c); return; invalid_out: parse_error("invalid unit mask entry"); } static struct op_unit_mask * new_unit_mask(void) { struct op_unit_mask * um = xmalloc(sizeof(struct op_unit_mask)); memset(um, '\0', sizeof(struct op_unit_mask)); list_add_tail(&um->um_next, &um_list); return um; } static void free_unit_mask(struct op_unit_mask * um) { list_del(&um->um_next); free(um); um = NULL; } /* * name:zero type:mandatory default:0x0 * \t0x0 No unit mask */ static void read_unit_masks(char const * file) { struct op_unit_mask * um = NULL; char * line; FILE * fp = fopen(file, "r"); if (!fp) { fprintf(stderr, "oprofile: could not open unit mask description file %s\n", file); exit(EXIT_FAILURE); } filename = file; line_nr = 1; line = op_get_line(fp); while (line) { if (empty_line(line) || comment_line(line)) goto next; if (line[0] != '\t') { um = new_unit_mask(); parse_um(um, line); } else { if (!um) parse_error("no unit mask name line"); parse_um_entry(&um->um[um->num], line); ++(um->num); } next: free(line); line = op_get_line(fp); ++line_nr; } fclose(fp); } static u32 parse_counter_mask(char const * str) { u32 mask = 0; char const * numstart = str; while (*numstart) { mask |= 1 << parse_int(numstart); while (*numstart && *numstart != ',') ++numstart; /* skip , unless we reach eos */ if (*numstart) ++numstart; numstart = skip_ws(numstart); } return mask; } static struct op_unit_mask * try_find_um(char const * value) { struct list_head * pos; list_for_each(pos, &um_list) { struct op_unit_mask * um = list_entry(pos, struct op_unit_mask, um_next); if (strcmp(value, um->name) == 0) { um->used = 1; return um; } } return NULL; } static struct op_unit_mask * find_um(char const * value) { struct op_unit_mask * um = try_find_um(value); if (um) return um; fprintf(stderr, "oprofile: could not find unit mask %s\n", value); exit(EXIT_FAILURE); } /* um:a,b,c,d merge multiple unit masks */ static struct op_unit_mask * merge_um(char * value) { int num; char *s; struct op_unit_mask *new, *um; enum unit_mask_type type = -1U; um = try_find_um(value); if (um) return um; new = new_unit_mask(); new->name = xstrdup(value); new->used = 1; num = 0; while ((s = strsep(&value, ",")) != NULL) { unsigned c; um = find_um(s); if (type == -1U) type = um->unit_type_mask; if (um->unit_type_mask != type) parse_error("combined unit mask must be all the same types"); if (type != utm_bitmask && type != utm_exclusive) parse_error("combined unit mask must be all bitmasks or exclusive"); new->default_mask |= um->default_mask; new->num += um->num; if (new->num > MAX_UNIT_MASK) parse_error("too many members in combined unit mask"); for (c = 0; c < um->num; c++, num++) { new->um[num] = um->um[c]; new->um[num].desc = xstrdup(new->um[num].desc); } } if (type == -1U) parse_error("Empty unit mask"); new->unit_type_mask = type; return new; } /* parse either a "tag:value" or a ": trailing description string" */ static int next_token(char const ** cp, char ** name, char ** value) { size_t tag_len; size_t val_len; char const * c = *cp; char const * end; char const * colon; c = skip_ws(c); end = colon = c; end = skip_nonws(end); colon = strchr(colon, ':'); if (!colon) { if (*c) parse_error("next_token(): garbage at end of line"); return 0; } if (colon >= end) parse_error("next_token() expected ':'"); tag_len = colon - c; val_len = end - (colon + 1); if (!tag_len) { /* : trailing description */ end = skip_ws(end); *name = xstrdup("desc"); *value = xstrdup(end); end += strlen(end); } else { /* tag:value */ *name = op_xstrndup(c, tag_len); *value = op_xstrndup(colon + 1, val_len); end = skip_ws(end); } *cp = end; return 1; } static void include_events (char *value) { char * event_file; const char *old_filename; int old_line_nr; event_file = build_fn(value, "events"); old_line_nr = line_nr; old_filename = filename; read_events(event_file); line_nr = old_line_nr; filename = old_filename; free(event_file); } static struct op_event * new_event(void) { struct op_event * event = xmalloc(sizeof(struct op_event)); memset(event, '\0', sizeof(struct op_event)); list_add_tail(&event->event_next, &events_list); return event; } static void free_event(struct op_event * event) { list_del(&event->event_next); free(event); } /* event:0x00 counters:0 um:zero minimum:4096 name:ISSUES : Total issues */ /* event:0x00 ext:xxxxxx um:zero minimum:4096 name:ISSUES : Total issues */ static void read_events(char const * file) { struct op_event * event = NULL; char * line; char * name; char * value; char const * c; int seen_event, seen_counters, seen_um, seen_minimum, seen_name, seen_ext; FILE * fp = fopen(file, "r"); int tags; int fail = 0; if (!fp) { fprintf(stderr, "oprofile: could not open event description file %s\n", file); exit(EXIT_FAILURE); } filename = file; line_nr = 1; line = op_get_line(fp); while (line) { int bad_val = 0; u64 tmp_val = 0ULL; if (empty_line(line) || comment_line(line)) goto next; tags = 0; seen_name = 0; seen_event = 0; seen_counters = 0; seen_ext = 0; seen_um = 0; seen_minimum = 0; event = new_event(); event->filter = -1; event->ext = NULL; c = line; while (next_token(&c, &name, &value)) { if (strcmp(name, "name") == 0) { if (seen_name) parse_error("duplicate name: tag"); seen_name = 1; if (strchr(value, '/') != NULL) parse_error("invalid event name"); if (strchr(value, '.') != NULL) parse_error("invalid event name"); event->name = value; if (bad_val) { fprintf(stderr, "Event %s event code (0x%llx) is too big to fit in an int\n", event->name, tmp_val); fail = 1; bad_val = 0; } } else if (strcmp(name, "event") == 0) { if (seen_event) parse_error("duplicate event: tag"); seen_event = 1; tmp_val = parse_long_hex(value); if (tmp_val > 0xffffffff) bad_val = 1; else event->val = (u32)tmp_val; free(value); } else if (strcmp(name, "counters") == 0) { if (seen_counters) parse_error("duplicate counters: tag"); seen_counters = 1; if (!strcmp(value, "cpuid")) event->counter_mask = arch_get_counter_mask(); else event->counter_mask = parse_counter_mask(value); free(value); } else if (strcmp(name, "ext") == 0) { if (seen_ext) parse_error("duplicate ext: tag"); seen_ext = 1; event->ext = value; } else if (strcmp(name, "um") == 0) { if (seen_um) parse_error("duplicate um: tag"); seen_um = 1; if (strchr(value, ',')) event->unit = merge_um(value); else event->unit = find_um(value); free(value); } else if (strcmp(name, "minimum") == 0) { if (seen_minimum) parse_error("duplicate minimum: tag"); seen_minimum = 1; event->min_count = parse_int(value); free(value); } else if (strcmp(name, "desc") == 0) { event->desc = value; } else if (strcmp(name, "filter") == 0) { event->filter = parse_int(value); free(value); } else if (strcmp(name, "include") == 0) { if (tags > 0) parse_error("tags before include:"); free_event(event); include_events(value); free(value); c = skip_ws(c); if (*c != '\0' && *c != '#') parse_error("non whitespace after include:"); break; } else { parse_error("unknown tag"); } tags++; free(name); } next: free(line); line = op_get_line(fp); ++line_nr; } fclose(fp); if (fail) exit(EXIT_FAILURE); } /* usefull for make check */ static int check_unit_mask(struct op_unit_mask const * um, char const * cpu_name) { u32 i; int err = 0; if (!um->used) { fprintf(stderr, "um %s is not used\n", um->name); err = EXIT_FAILURE; } if (um->unit_type_mask == utm_mandatory && um->num != 1) { fprintf(stderr, "mandatory um %s doesn't contain exactly one " "entry (%s)\n", um->name, cpu_name); err = EXIT_FAILURE; } else if (um->unit_type_mask == utm_bitmask) { u32 default_mask = um->default_mask; for (i = 0; i < um->num; ++i) default_mask &= ~um->um[i].value; if (default_mask) { fprintf(stderr, "um %s default mask is not valid " "(%s)\n", um->name, cpu_name); err = EXIT_FAILURE; } } else if (um->unit_type_mask == utm_exclusive) { if (um->default_mask_name) { for (i = 0; i < um->num; ++i) { if (0 == strcmp(um->default_mask_name, um->um[i].name)) break; } } else { for (i = 0; i < um->num; ++i) { if (um->default_mask == um->um[i].value) break; } } if (i == um->num) { fprintf(stderr, "exclusive um %s default value is not " "valid (%s)\n", um->name, cpu_name); err = EXIT_FAILURE; } } return err; } static void arch_filter_events(op_cpu cpu_type) { struct list_head * pos, * pos2; unsigned filter = arch_get_filter(cpu_type); if (!filter) return; list_for_each_safe (pos, pos2, &events_list) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (event->filter >= 0 && ((1U << event->filter) & filter)) delete_event(event); } } static void load_events_name(const char *cpu_name) { char * event_file; char * um_file; event_file = build_fn(cpu_name, "events"); um_file = build_fn(cpu_name, "unit_masks"); read_unit_masks(um_file); read_events(event_file); free(um_file); free(event_file); } static void load_events(op_cpu cpu_type) { const char * cpu_name = op_get_cpu_name(cpu_type); struct list_head * pos; int err = 0; if (!list_empty(&events_list)) return; load_events_name(cpu_name); arch_filter_events(cpu_type); /* sanity check: all unit mask must be used */ list_for_each(pos, &um_list) { struct op_unit_mask * um = list_entry(pos, struct op_unit_mask, um_next); err |= check_unit_mask(um, cpu_name); } if (err) exit(err); } struct list_head * op_events(op_cpu cpu_type) { load_events(cpu_type); arch_filter_events(cpu_type); return &events_list; } static void delete_unit_mask(struct op_unit_mask * unit) { u32 cur; for (cur = 0 ; cur < unit->num ; ++cur) { if (unit->um[cur].desc) free(unit->um[cur].desc); } if (unit->name) free(unit->name); list_del(&unit->um_next); free(unit); } static void delete_event(struct op_event * event) { if (event->name) free(event->name); if (event->desc) free(event->desc); list_del(&event->event_next); free(event); } void op_free_events(void) { struct list_head * pos, * pos2; list_for_each_safe(pos, pos2, &events_list) { struct op_event * event = list_entry(pos, struct op_event, event_next); delete_event(event); } list_for_each_safe(pos, pos2, &um_list) { struct op_unit_mask * unit = list_entry(pos, struct op_unit_mask, um_next); delete_unit_mask(unit); } } /* There can be actually multiple events here, so this is not quite correct */ static struct op_event * find_event_any(u32 nr) { struct list_head * pos; list_for_each(pos, &events_list) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (event->val == nr) return event; } return NULL; } static struct op_event * find_event_um(u32 nr, u32 um) { struct list_head * pos; unsigned int i; list_for_each(pos, &events_list) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (event->val == nr) { for (i = 0; i < event->unit->num; i++) { if (event->unit->um[i].value == um) return event; } } } return NULL; } static FILE * open_event_mapping_file(char const * cpu_name) { char * ev_map_file; char * dir; dir = getenv("OPROFILE_EVENTS_DIR"); if (dir == NULL) dir = OP_DATADIR; ev_map_file = xmalloc(strlen(dir) + strlen("/") + strlen(cpu_name) + strlen("/") + + strlen("event_mappings") + 1); strcpy(ev_map_file, dir); strcat(ev_map_file, "/"); strcat(ev_map_file, cpu_name); strcat(ev_map_file, "/"); strcat(ev_map_file, "event_mappings"); filename = ev_map_file; return (fopen(ev_map_file, "r")); } /** * This function is PPC64-specific. */ static char const * get_mapping(u32 nr, FILE * fp) { char * line; char * name; char * value; char const * c; char * map = NULL; int seen_event = 0, seen_mmcr0 = 0, seen_mmcr1 = 0, seen_mmcra = 0; u32 mmcr0 = 0; u64 mmcr1 = 0; u32 mmcra = 0; int event_found = 0; line_nr = 1; line = op_get_line(fp); while (line && !event_found) { if (empty_line(line) || comment_line(line)) goto next; seen_event = 0; seen_mmcr0 = 0; seen_mmcr1 = 0; seen_mmcra = 0; mmcr0 = 0; mmcr1 = 0; mmcra = 0; c = line; while (next_token(&c, &name, &value)) { if (strcmp(name, "event") == 0) { u32 evt; if (seen_event) parse_error("duplicate event tag"); seen_event = 1; evt = parse_hex(value); if (evt == nr) event_found = 1; free(value); } else if (strcmp(name, "mmcr0") == 0) { if (seen_mmcr0) parse_error("duplicate mmcr0 tag"); seen_mmcr0 = 1; mmcr0 = parse_hex(value); free(value); } else if (strcmp(name, "mmcr1") == 0) { if (seen_mmcr1) parse_error("duplicate mmcr1: tag"); seen_mmcr1 = 1; mmcr1 = parse_long_hex(value); free(value); } else if (strcmp(name, "mmcra") == 0) { if (seen_mmcra) parse_error("duplicate mmcra: tag"); seen_mmcra = 1; mmcra = parse_hex(value); free(value); } else { parse_error("unknown tag"); } free(name); } next: free(line); line = op_get_line(fp); ++line_nr; } if (event_found) { if (!seen_mmcr0 || !seen_mmcr1 || !seen_mmcra) { fprintf(stderr, "Error: Missing information in line %d of event mapping file %s\n", line_nr, filename); exit(EXIT_FAILURE); } map = xmalloc(70); snprintf(map, 70, "mmcr0:%u mmcr1:%Lu mmcra:%u", mmcr0, mmcr1, mmcra); } return map; } char const * find_mapping_for_event(u32 nr, op_cpu cpu_type) { char const * cpu_name = op_get_cpu_name(cpu_type); FILE * fp = open_event_mapping_file(cpu_name); char const * map = NULL; switch (cpu_type) { case CPU_PPC64_970: case CPU_PPC64_970MP: case CPU_PPC64_POWER4: case CPU_PPC64_POWER5: case CPU_PPC64_POWER5p: case CPU_PPC64_POWER5pp: case CPU_PPC64_POWER6: case CPU_PPC64_POWER7: // For ppc64 types of CPU_PPC64_ARCH_V1 and higher, we don't need an event_mappings file if (!fp) { fprintf(stderr, "oprofile: could not open event mapping file %s\n", filename); exit(EXIT_FAILURE); } else { map = get_mapping(nr, fp); } break; default: break; } if (fp) fclose(fp); return map; } static int match_event(int i, struct op_event *event, unsigned um) { unsigned v = event->unit->um[i].value; switch (event->unit->unit_type_mask) { case utm_exclusive: case utm_mandatory: return v == um; case utm_bitmask: return (v & um) || (!v && v == 0); } abort(); } struct op_event * find_event_by_name(char const * name, unsigned um, int um_valid) { struct list_head * pos; list_for_each(pos, &events_list) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (strcmp(event->name, name) == 0) { if (um_valid) { unsigned i; for (i = 0; i < event->unit->num; i++) if (match_event(i, event, um)) return event; continue; } return event; } } return NULL; } static struct op_event * find_next_event(struct op_event * e) { struct list_head * n; for (n = e->event_next.next; n != &events_list; n = n->next) { struct op_event * ne = list_entry(n, struct op_event, event_next); if (!strcmp(e->name, ne->name)) return ne; } return NULL; } struct op_event * op_find_event(op_cpu cpu_type, u32 nr, u32 um) { struct op_event * event; load_events(cpu_type); event = find_event_um(nr, um); return event; } struct op_event * op_find_event_any(op_cpu cpu_type, u32 nr) { load_events(cpu_type); return find_event_any(nr); } static int _is_um_valid_bitmask(struct op_event * event, u32 passed_um) { int duped_um[MAX_UNIT_MASK]; int retval = 0; u32 masked_val = 0; u32 i, k; int dup_value_used = 0; struct op_event evt; struct op_unit_mask * tmp_um = xmalloc(sizeof(struct op_unit_mask)); struct op_unit_mask * tmp_um_no_dups = xmalloc(sizeof(struct op_unit_mask)); memset(tmp_um, '\0', sizeof(struct op_unit_mask));; memset(tmp_um_no_dups, '\0', sizeof(struct op_unit_mask)); memset(duped_um, '\0', sizeof(int) * MAX_UNIT_MASK); // First, we make a copy of the event, with just its unit mask values. evt.unit = tmp_um; evt.unit->num = event->unit->num; for (i = 0; i < event->unit->num; i++) evt.unit->um[i].value = event->unit->um[i].value; // Next, we sort the unit mask values in ascending order. for (i = 1; i < evt.unit->num; i++) { int j = i - 1; u32 tmp = evt.unit->um[i].value; while (j >= 0 && tmp < evt.unit->um[j].value) { evt.unit->um[j + 1].value = evt.unit->um[j].value; j -= 1; } evt.unit->um[j + 1].value = tmp; } /* Now we remove duplicates. Duplicate unit mask values were not * allowed until the "named unit mask" support was added in * release 0.9.7. The down side to this is that if the user passed * a unit mask value that includes one of the duplicated values, * we have no way of differentiating between the duplicates, so * the meaning of the bitmask would be ambiguous if we were to * allow it. Thus, we must prevent the user from specifying such * bitmasks. */ for (i = 0, k = 0; k < evt.unit->num; i++) { tmp_um_no_dups->um[i].value = evt.unit->um[k].value; tmp_um_no_dups->num++; k++; while ((evt.unit->um[i].value == evt.unit->um[k].value) && i < evt.unit->num) { k++; duped_um[i] = 1; } } evt.unit = tmp_um_no_dups; // Now check if passed um==0 and if the defined event has a UM with value '0'. if (!passed_um) { for (i = 0; i < evt.unit->num; i++) { if (!evt.unit->um[i].value) return 1; } } /* Finally, we'll see if the passed unit mask value can be matched with a * mask of available unit mask values. We check for this by determining * whether the exact bits set in the current um are also set in the * passed um; if so, we OR those bits into a cumulative masked_val variable. * Simultaneously, we check if the passed um contains a non-unique unit * mask value, in which case, it's invalid.. */ for (i = 0; i < evt.unit->num; i++) { if ((evt.unit->um[i].value & passed_um) == evt.unit->um[i].value) { masked_val |= evt.unit->um[i].value; if (duped_um[i]) { dup_value_used = 1; break; } } } if (dup_value_used) { fprintf(stderr, "Ambiguous bitmask: Unit mask values" " cannot include non-unique numerical values (i.e., 0x%x).\n", evt.unit->um[i].value); fprintf(stderr, "Use ophelp to see the unit mask values for event %s.\n", event->name); } else if (masked_val == passed_um && passed_um != 0) { retval = 1; } free(tmp_um); free(tmp_um_no_dups); return retval; } static int _is_ppc64_cpu_type(op_cpu cpu_type) { char const * cpu_name = op_get_cpu_name(cpu_type); if (strncmp(cpu_name, "ppc64/power", strlen("ppc64/power")) == 0) return 1; else return 0; } int op_check_events(char * evt_name, int ctr, u32 nr, u32 um, op_cpu cpu_type) { int ret = OP_INVALID_EVENT; size_t i; u32 ctr_mask = 1 << ctr; struct list_head * pos; int ibm_power_proc = _is_ppc64_cpu_type(cpu_type); load_events(cpu_type); list_for_each(pos, &events_list) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (event->val != nr) continue; // Why do we have to do this, since event codes are supposed to be unique? // See the big comment below. if (ibm_power_proc && strcmp(evt_name, event->name)) continue; ret = OP_OK_EVENT; if ((event->counter_mask & ctr_mask) == 0) ret |= OP_INVALID_COUNTER; if (event->unit->unit_type_mask == utm_bitmask) { if (!_is_um_valid_bitmask(event, um)) ret |= OP_INVALID_UM; } else { for (i = 0; i < event->unit->num; ++i) { if (event->unit->um[i].value == um) break; } /* A small number of events on the IBM Power8 processor have real event * codes that are larger than sizeof(int). Rather than change the width of * the event code everywhere to be a long int (which would include having to * change the sample file format), we have defined some internal-use-only * unit masks for those events. In oprofile's power8 events file, we have * truncated those event codes to integer size, and the truncated bits are * used as a unit mask value which is ORed into the event code by * libpe_utils/op_pe_utils.cpp:_get_event_code(). This technique allowed * us to handle this situation with minimal code perturbation. The one * downside is that the truncated event codes are not unique. So in this * function, where we're searching for events by 'nr' (i.e., the event code), * we have to also make sure the name matches. * * If the user gives us an event specification such as: * PM_L1MISS_LAT_EXC_256:0x0:1:1 * the above code will actually find a non-zero unit mask for this event and * we'd normally fail at this point since the user passed '0x0' for a unit mask. * But we don't expose these internal-use-only UMs to the user, so there's * no way for them to know about it or to try to use it in their event spec; * thus, we handle it below. */ if ((i == event->unit->num) && !((um == 0) && ibm_power_proc)) ret |= OP_INVALID_UM; } if (ret == OP_OK_EVENT) return ret; } return ret; } void op_default_event(op_cpu cpu_type, struct op_default_event_descr * descr) { descr->name = ""; descr->um = 0x0; /* A fixed value of CPU cycles; this should ensure good * granulity even on faster CPUs, though it will generate more * interrupts. */ descr->count = 100000; switch (cpu_type) { case CPU_PPRO: case CPU_PII: case CPU_PIII: case CPU_P6_MOBILE: case CPU_CORE: case CPU_CORE_2: case CPU_ATHLON: case CPU_HAMMER: case CPU_FAMILY10: case CPU_ARCH_PERFMON: case CPU_FAMILY11H: case CPU_ATOM: case CPU_CORE_I7: case CPU_NEHALEM: case CPU_HASWELL: case CPU_BROADWELL: case CPU_SILVERMONT: case CPU_WESTMERE: case CPU_SANDYBRIDGE: case CPU_IVYBRIDGE: case CPU_KNIGHTSLANDING: case CPU_MIPS_LOONGSON2: case CPU_FAMILY12H: case CPU_FAMILY14H: case CPU_FAMILY15H: case CPU_AMD64_GENERIC: descr->name = "CPU_CLK_UNHALTED"; break; case CPU_GOLDMONT: case CPU_GOLDMONTPLUS: case CPU_SKYLAKE: descr->name = "cpu_clk_unhalted"; break; case CPU_P4: case CPU_P4_HT2: descr->name = "GLOBAL_POWER_EVENTS"; descr->um = 0x1; break; case CPU_AXP_EV67: descr->name = "CYCLES"; descr->um = 0x1; break; // we could possibly use the CCNT case CPU_ARM_XSCALE1: case CPU_ARM_XSCALE2: case CPU_ARM_MPCORE: case CPU_ARM_V6: case CPU_ARM_V7: case CPU_ARM_V7_CA5: case CPU_ARM_V7_CA7: case CPU_ARM_V7_CA9: case CPU_ARM_V7_CA15: case CPU_ARM_V7_CA17: case CPU_ARM_SCORPION: case CPU_ARM_SCORPIONMP: case CPU_ARM_KRAIT: case CPU_ARM_V8_APM_XGENE: case CPU_ARM_V8_CA57: case CPU_ARM_V8_CA53: descr->name = "CPU_CYCLES"; break; case CPU_PPC64_970: case CPU_PPC64_970MP: case CPU_PPC_7450: case CPU_PPC64_POWER4: case CPU_PPC64_POWER5: case CPU_PPC64_POWER6: case CPU_PPC64_POWER5p: case CPU_PPC64_POWER5pp: case CPU_PPC64_POWER7: case CPU_PPC64_ARCH_V1: case CPU_PPC64_POWER8: case CPU_PPC64_POWER9: descr->name = "CYCLES"; break; case CPU_MIPS_20K: descr->name = "CYCLES"; break; case CPU_MIPS_24K: case CPU_MIPS_34K: case CPU_MIPS_74K: case CPU_MIPS_1004K: descr->name = "INSTRUCTIONS"; break; case CPU_MIPS_5K: case CPU_MIPS_25K: descr->name = "CYCLES"; break; case CPU_MIPS_R10000: case CPU_MIPS_R12000: descr->name = "INSTRUCTIONS_GRADUATED"; break; case CPU_MIPS_RM7000: case CPU_MIPS_RM9000: descr->name = "INSTRUCTIONS_ISSUED"; break; case CPU_MIPS_SB1: descr->name = "INSN_SURVIVED_STAGE7"; break; case CPU_MIPS_VR5432: case CPU_MIPS_VR5500: descr->name = "INSTRUCTIONS_EXECUTED"; break; case CPU_PPC_E500: case CPU_PPC_E500_2: case CPU_PPC_E500MC: case CPU_PPC_E6500: case CPU_PPC_E300: descr->name = "CPU_CLK"; break; case CPU_S390_Z10: case CPU_S390_Z196: case CPU_S390_ZEC12: case CPU_S390_Z13: descr->name = "CPU_CYCLES"; descr->count = 4127518; break; case CPU_TILE_TILE64: case CPU_TILE_TILEPRO: case CPU_TILE_TILEGX: descr->name = "ONE"; break; // don't use default, if someone add a cpu he wants a compiler // warning if he forgets to handle it here. case CPU_TIMER_INT: case CPU_NO_GOOD: case MAX_CPU_TYPE: break; } } static void extra_check(struct op_event *e, char *name, unsigned w) { int found; unsigned i; if (!e->unit->um[w].extra) { fprintf(stderr, "Named unit mask (%s) not allowed for event without 'extra:' values.\n" "Please specify the numerical value for the unit mask. See the 'operf'\n" "man page for more info.\n", name); exit(EXIT_FAILURE); } found = 0; for (i = 0; i < e->unit->num; i++) { int len = strcspn(e->unit->um[i].desc, " \t"); if (!strncmp(name, e->unit->um[i].desc, len) && name[len] == '\0') found++; } if (found > 1) { fprintf(stderr, "Unit mask name `%s' not unique. Please use a numerical unit mask\n", name); exit(EXIT_FAILURE); } } static void do_resolve_unit_mask(struct op_event *e, struct parsed_event *pe, u32 *extra) { unsigned i; /* If not specified um and the default um is name type * we populate pe unitmask name with default name */ if ((e->unit->default_mask_name != NULL) && (pe->unit_mask_name == NULL) && (!pe->unit_mask_valid)) { pe->unit_mask_name = xstrdup(e->unit->default_mask_name); } for (;;) { if (pe->unit_mask_name == NULL) { /* For numerical unit mask */ int found = 0; int old_um_valid = pe->unit_mask_valid; /* Use default unitmask if not specified */ if (!pe->unit_mask_valid) { pe->unit_mask_valid = 1; pe->unit_mask = e->unit->default_mask; } /* Checking to see there are any duplicate numerical unit mask * in which case it should be using named unit mask instead. */ for (i = 0; i < e->unit->num; i++) { if (e->unit->um[i].value == (unsigned int)pe->unit_mask) found++; } if (found > 1) { if (!old_um_valid) fprintf(stderr, "Default unit mask not supported for this event.\n" "Please speicfy a unit mask by name, using the first " "word of the unit mask description\n"); else fprintf(stderr, "Unit mask (0x%x) is non unique.\n" "Please specify the unit mask using the first " "word of the description\n", pe->unit_mask); exit(EXIT_FAILURE); } if (i == e->unit->num) { e = find_next_event(e); if (e != NULL) continue; } return; } else { /* For named unit mask */ for (i = 0; i < e->unit->num; i++) { int len = 0; if (e->unit->um[i].name) len = strlen(e->unit->um[i].name); if (len && (!strncmp(pe->unit_mask_name, e->unit->um[i].name, len)) && (pe->unit_mask_name[len] == '\0')) break; } if (i == e->unit->num) { e = find_next_event(e); if (e != NULL) continue; fprintf(stderr, "Cannot find unit mask %s for %s\n", pe->unit_mask_name, pe->name); exit(EXIT_FAILURE); } extra_check(e, pe->unit_mask_name, i); pe->unit_mask_valid = 1; pe->unit_mask = e->unit->um[i].value; if (extra) { if (e->unit->um[i].extra == EXTRA_NONE) *extra = e->unit->um[i].value; else *extra = e->unit->um[i].extra; } return; } } } void op_resolve_unit_mask(struct parsed_event *pe, u32 *extra) { struct op_event *e; e = find_event_by_name(pe->name, 0, 0); if (!e) { fprintf(stderr, "Cannot find event %s\n", pe->name); exit(EXIT_FAILURE); } return do_resolve_unit_mask(e, pe, extra); } oprofile-1.3.0/libop/op_sample_file.h0000664000175000017500000000122112534404406014507 00000000000000/** * @file op_sample_file.h * Sample file format * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_SAMPLE_FILE_H #define OP_SAMPLE_FILE_H #include "op_types.h" #include #include /* header of the sample files */ struct opd_header { u8 magic[4]; u32 version; u32 cpu_type; u32 ctr_event; u32 ctr_um; u32 ctr_count; // for cg file the from_cg_is_kernel u32 is_kernel; double cpu_speed; u64 mtime; u32 cg_to_is_kernel; u64 anon_start; u64 cg_to_anon_start; /* binary compatibility reserve */ }; #endif /* OP_SAMPLE_FILE_H */ oprofile-1.3.0/opjitconv/0000775000175000017500000000000013323173530012350 500000000000000oprofile-1.3.0/opjitconv/parse_dump.c0000664000175000017500000001517012534404406014601 00000000000000/** * @file parse_dump.c * parse a jit dump file * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Jens Wilke * @Modifications Maynard Johnson * @Modifications Philippe Elie * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ #include "opjitconv.h" #include "jitdump.h" #include "op_libiberty.h" #include #include /* parse a code load record and add the entry to the jitentry list */ static int parse_code_load(void const * ptr_arg, int size, unsigned long long end_time) { struct jitentry * entry; int rc = OP_JIT_CONV_OK; char const * ptr = ptr_arg; struct jr_code_load const * rec = ptr_arg; char const * end; size_t padding_count, rec_totalsize; end = rec->code_addr ? ptr + size : NULL; entry = xcalloc(1, sizeof(struct jitentry)); // jitentry constructor entry->next = NULL; ptr += sizeof(*rec); /* symbol_name can be malloced so we cast away the constness. */ entry->symbol_name = (char *)ptr; entry->sym_name_malloced = 0; ptr += strlen(ptr) + 1; entry->code = rec->code_addr ? ptr : NULL; entry->vma = rec->vma; entry->code_size = rec->code_size; entry->section = NULL; entry->life_start = rec->timestamp; // if nothing else is known the symbol lives till the end of the // sampling run, this value may be overwritten by an unload record1 // later entry->life_end = end_time; // build list entry->next = jitentry_list; jitentry_list = entry; /* padding bytes are calculated over the complete record * (i.e. header + symbol name + code) */ rec_totalsize = sizeof(*rec) + strlen(entry->symbol_name) + 1 + entry->code_size; padding_count = PADDING_8ALIGNED(rec_totalsize); verbprintf(debug, "record0: name=%s, vma=%llx, code_size=%i, " "padding_count=%llu, life_start=%lli, life_end=%lli\n", entry->symbol_name, entry->vma, entry->code_size, (unsigned long long)padding_count, entry->life_start, entry->life_end); /* If end == NULL, the dump does not include code, and this sanity * check is skipped. */ if (end && (ptr + entry->code_size + padding_count != end)) { verbprintf(debug, "record total size mismatch\n"); rc = OP_JIT_CONV_FAIL; } return rc; } /* * parse a code unload record. Search for existing record with this code * address and fill life_end field with the timestamp. linear search not very * efficient. FIXME: inefficient */ static void parse_code_unload(void const * ptr, unsigned long long end_time) { struct jr_code_unload const * rec = ptr; struct jitentry * entry; verbprintf(debug,"record1: vma=%llx, life_end=%lli\n", rec->vma, rec->timestamp); /** * Normally we won't get a jr_code_unload with a zero time stamp or * a zero code address. The code address is directly provided by the JVMTI. * The documentation of JVMTI does not say anything about the address value if * it could be zero or not. Therefore it is only a sanity check at the moment. */ if (rec->timestamp > 0 && rec->vma != 0) { for (entry = jitentry_list; entry; entry = entry->next) { if (entry->vma == rec->vma && entry->life_end == end_time) { entry->life_end = rec->timestamp; verbprintf(debug,"matching record found\n"); break; } } } } /* * There is no real parsing here, we just record a pointer to the data, * we will interpret on the fly the record when building the bfd file. */ static void parse_code_debug_info(void const * ptr, void const * end, unsigned long long end_time) { struct jr_code_debug_info const * rec = ptr; struct jitentry_debug_line * debug_line = xmalloc(sizeof(struct jitentry_debug_line)); debug_line->data = rec; debug_line->end = end; debug_line->life_start = rec->timestamp; debug_line->life_end = end_time; debug_line->next = jitentry_debug_line_list; jitentry_debug_line_list = debug_line; } /* parse all entries in the jit dump file and build jitentry_list. * the code needs to check always whether there is enough * to read remaining. this is because the file may be written to * concurrently. */ static int parse_entries(void const * ptr, void const * end, unsigned long long end_time) { int rc = OP_JIT_CONV_OK; struct jr_prefix const * rec = ptr; while ((void *)rec + sizeof(struct jr_prefix) < end) { if (((void *) rec + rec->total_size) > end) { verbprintf(debug, "record past end of file\n"); rc = OP_JIT_CONV_FAIL; break; } switch (rec->id) { case JIT_CODE_LOAD: if (parse_code_load(rec, rec->total_size, end_time)) { rc = OP_JIT_CONV_FAIL; break; } break; case JIT_CODE_UNLOAD: parse_code_unload(rec, end_time); break; // end of VM live time, no action case JIT_CODE_CLOSE: break; case JIT_CODE_DEBUG_INFO: if (rec->total_size == 0) { /* op_write_debug_line_info() ensures to write records with * totalsize > 0. */ rc = OP_JIT_CONV_FAIL; break; } parse_code_debug_info(rec, end, end_time); break; default: verbprintf(debug, "unknown record type\n"); rc = OP_JIT_CONV_FAIL; break; } /* advance to next record (incl. possible padding bytes) */ rec = (void *)rec + rec->total_size; } return rc; } /* parse the jit dump header information * The ptr arg is the address of the pointer to the mmapped * file, which we modify below. */ static int parse_header(char const ** ptr, char const * end) { int rc = OP_JIT_CONV_OK; struct jitheader const * header; if (*ptr + sizeof(struct jitheader) >= end) { verbprintf(debug, "opjitconv: EOF in jitdump file, no header\n"); rc = OP_JIT_CONV_FAIL; goto out; } header = (struct jitheader *)*ptr; if (header->magic != JITHEADER_MAGIC) { verbprintf(debug, "opjitconv: Wrong jitdump file magic\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (header->version != JITHEADER_VERSION) { verbprintf(debug, "opjitconv: Wrong jitdump file version\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (*ptr + header->totalsize > end) { verbprintf(debug, "opjitconv: EOF in jitdump file, not enough " "data for header\n"); rc = OP_JIT_CONV_FAIL; goto out; } dump_bfd_arch = header->bfd_arch; dump_bfd_mach = header->bfd_mach; dump_bfd_target_name = header->bfd_target; verbprintf(debug, "header: bfd-arch=%i, bfd-mach=%i," " bfd_target_name=%s\n", dump_bfd_arch, dump_bfd_mach, dump_bfd_target_name); *ptr = *ptr + header->totalsize; out: return rc; } /* Read in the memory mapped jitdump file. * Build up jitentry structure and set global variables. */ int parse_all(void const * start, void const * end, unsigned long long end_time) { char const * ptr = start; if (!parse_header(&ptr, end)) return parse_entries(ptr, end, end_time); else return OP_JIT_CONV_FAIL; } oprofile-1.3.0/opjitconv/opjitconv.h0000664000175000017500000001063112534404406014457 00000000000000/** * @file opjitconv.h * Convert a jit dump file to an ELF file * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Jens Wilke * @Modifications Maynard Johnson * @Modifications Philippe Elie * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ #ifndef OPJITCONV_H #define OPJITCONV_H #define OP_JIT_CONV_OK 0 #define OP_JIT_CONV_FAIL -1 #define OP_JIT_CONV_NO_DUMPFILE 1 #define OP_JIT_CONV_NO_ANON_SAMPLES 2 #define OP_JIT_CONV_NO_MATCHING_ANON_SAMPLES 3 #define OP_JIT_CONV_NO_JIT_RECS_IN_DUMPFILE 4 #define OP_JIT_CONV_ALREADY_DONE 5 #define OP_JIT_CONV_TMPDIR_NOT_REMOVED 6 #include "config.h" #include #include #include #include "op_list.h" #include "op_types.h" #define verbprintf(x, args...) \ do { \ /* This is a bit fragile, but we must catch verbprintf("%s", "") */ \ if (x == 1) \ printf(args); \ } while (0) /* Structure that contains all information * for one function entry in the jit dump file. * the jit dump file gets mmapped and code and * symbol_name point directly into the file */ struct jitentry { /* linked list. see jitentry_list */ struct jitentry * next; /* vma */ unsigned long long vma; /* point to code in the memory mapped file */ void const * code; /* size of the jitted code */ int code_size; /* point to the name in memory mapped jitdump file, or * to a malloced string, if we have a disambiguation replacement */ char * symbol_name; /* sym_name_malloced ==1 means we need to free the memory when done. */ int sym_name_malloced; /* seconds since epoch when the code was created */ unsigned long long life_start; /* seconds since epoch when the code was overwritten */ unsigned long long life_end; /* after ordering and partitioning this is the ELF * section we put this code to */ asection * section; }; struct jitentry_debug_line { struct jitentry_debug_line * next; struct jr_code_debug_info const * data; /* seconds since epoch when the code was created */ unsigned long long life_start; /* seconds since epoch when the code was overwritten */ unsigned long long life_end; void const * end; }; struct op_jitdump_info { void * dmp_file; struct stat dmp_file_stat; }; struct pathname { char * name; struct list_head neighbor; }; struct jitdump_deletion_candidate { char * name; struct list_head neighbor; }; /* jitsymbol.c */ void create_arrays(void); int resolve_overlaps(unsigned long long start_time); void disambiguate_symbol_names(void); /* parse_dump.c */ int parse_all(void const * start, void const * end, unsigned long long end_time); /* conversion.c */ int op_jit_convert(struct op_jitdump_info *file_info, char const * elffile, unsigned long long start_time, unsigned long long end_time); /* create_bfd.c */ bfd * open_elf(char const * filename); int partition_sections(void); int fill_sections(void); asection * create_section(bfd * abfd, char const * section_name, size_t size, bfd_vma vma, flagword flags); int fill_section_content(bfd * abfd, asection * section, void const * b, file_ptr offset, size_t sz); /* debug_line.c */ int init_debug_line_info(bfd * abfd); int finalize_debug_line_info(bfd * abfd); /* jit dump header information */ extern enum bfd_architecture dump_bfd_arch; extern int dump_bfd_mach; extern char const * dump_bfd_target_name; /* * list head. The linked list is used during parsing (parse_all) to * hold all jitentry elements. After parsing, the program works on the * array structures (entries_symbols_ascending, entries_address_ascending) * and the linked list is not used any more. */ extern struct jitentry * jitentry_list; /* count of jitentries in the list */ extern u32 entry_count; /* list head for debug line information */ extern struct jitentry_debug_line * jitentry_debug_line_list; /* maximum space in the entry arrays, needed to add entries */ extern u32 max_entry_count; /* array pointing to all jit entries, sorted by symbol names */ extern struct jitentry ** entries_symbols_ascending; /* array pointing to all jit entries sorted by address */ extern struct jitentry ** entries_address_ascending; /* Global variable for asymbols so we can free the storage later. */ extern asymbol ** syms; /* the bfd handle of the ELF file we write */ extern bfd * cur_bfd; /* debug flag, print some information */ extern int debug; #endif /* OPJITCONV_H */ oprofile-1.3.0/opjitconv/Makefile.am0000664000175000017500000000060412534404406014326 00000000000000AM_CPPFLAGS = -I ${top_srcdir}/libopagent \ -I ${top_srcdir}/libutil \ @OP_CPPFLAGS@ AM_CFLAGS = @OP_CFLAGS@ AM_LDFLAGS = @OP_LDFLAGS@ bin_PROGRAMS = opjitconv LIBS = @BFD_LIBS@ needed_libs = \ ../libutil/libutil.a opjitconv_LDADD = $(needed_libs) opjitconv_SOURCES = \ opjitconv.c \ opjitconv.h \ conversion.c \ parse_dump.c \ jitsymbol.c \ create_bfd.c \ debug_line.c oprofile-1.3.0/opjitconv/conversion.c0000664000175000017500000000365012534404406014627 00000000000000/** * @file conversion.c * Convert a jit dump file to an ELF file * * @remark Copyright 2008 OProfile authors * @remark Read the file COPYING * * @author Daniel Hansel * * Copyright IBM Corporation 2008 * */ #include #include "opjitconv.h" static void free_jit_records(void) { struct jitentry * entry, * next; for (entry = jitentry_list; entry; entry = next) { if (entry->sym_name_malloced) free(entry->symbol_name); next = entry->next; free(entry); } jitentry_list = NULL; } static void free_jit_debug_line(void) { struct jitentry_debug_line * entry, * next; for (entry = jitentry_debug_line_list; entry; entry = next) { next = entry->next; free(entry); } jitentry_debug_line_list = NULL; } int op_jit_convert(struct op_jitdump_info * file_info, char const * elffile, unsigned long long start_time, unsigned long long end_time) { void const * jitdump = file_info->dmp_file; int rc= OP_JIT_CONV_OK; entry_count = 0; max_entry_count = 0; syms = NULL; cur_bfd = NULL; jitentry_list = NULL; jitentry_debug_line_list = NULL; entries_symbols_ascending = entries_address_ascending = NULL; if ((rc = parse_all(jitdump, jitdump + file_info->dmp_file_stat.st_size, end_time)) == OP_JIT_CONV_FAIL) goto out; create_arrays(); if ((rc = resolve_overlaps(start_time)) == OP_JIT_CONV_FAIL) goto out; disambiguate_symbol_names(); if (!entry_count) return OP_JIT_CONV_NO_JIT_RECS_IN_DUMPFILE; if ((cur_bfd = open_elf(elffile)) == NULL) { rc = OP_JIT_CONV_FAIL; goto out; } init_debug_line_info(cur_bfd); if ((rc = partition_sections()) == OP_JIT_CONV_FAIL) goto out; if ((rc = fill_sections()) == OP_JIT_CONV_FAIL) goto out; finalize_debug_line_info(cur_bfd); if (cur_bfd) bfd_close(cur_bfd); free(syms); out: free_jit_records(); free_jit_debug_line(); free(entries_symbols_ascending); free(entries_address_ascending); return rc; } oprofile-1.3.0/opjitconv/Makefile.in0000664000175000017500000005161213323172173014344 00000000000000# Makefile.in generated by automake 1.15.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2017 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; 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u32 i; int r; struct jitentry const * e; asymbol * s; asection * section = NULL; /* Check for valid value of entry_count to avoid integer overflow. */ if (entry_count > UINT32_MAX - 1) { bfd_perror("invalid entry_count value"); rc = OP_JIT_CONV_FAIL; goto out; } syms = xmalloc(sizeof(asymbol *) * (entry_count+1)); syms[entry_count] = NULL; assert(entries_address_ascending[0]->section); // Do this to silence Coverity section = entries_address_ascending[0]->section; for (i = 0; i < entry_count; i++) { e = entries_address_ascending[i]; if (e->section) section = e->section; s = bfd_make_empty_symbol(cur_bfd); if (!s) { bfd_perror("bfd_make_empty_symbol"); rc = OP_JIT_CONV_FAIL; goto out; } s->name = e->symbol_name; s->section = section; s->flags = BSF_GLOBAL | BSF_FUNCTION; s->value = e->vma - section->vma; verbprintf(debug,"add sym: name=%s, value=%llx\n", s->name, (unsigned long long)s->value); syms[i] = s; } r = bfd_set_symtab(cur_bfd, syms, entry_count); if (r == FALSE) { bfd_perror("bfd_set_symtab"); rc = OP_JIT_CONV_FAIL; } out: return rc; } /* * create a new section. */ asection * create_section(bfd * abfd, char const * section_name, size_t size, bfd_vma vma, flagword flags) { asection * section; verbprintf(debug, "create_section() %s\n", section_name); section = bfd_make_section(abfd, section_name); if (section == NULL) { bfd_perror("bfd_make_section"); goto error; } bfd_set_section_vma(abfd, section, vma); if (bfd_set_section_size(abfd, section, size) == FALSE) { bfd_perror("bfd_set_section_size"); goto error; } if (bfd_set_section_flags(abfd, section, flags) == FALSE) { bfd_perror("bfd_set_section_flags"); goto error; } return section; error: return NULL; } /* create a .text section. end_idx: index last jitentry (inclusive!) */ static int create_text_section(int start_idx, int end_idx) { int rc = OP_JIT_CONV_OK; asection * section; char const * section_name; int idx = start_idx; unsigned long long vma_start = entries_address_ascending[start_idx]->vma; struct jitentry * ee = entries_address_ascending[end_idx]; unsigned long long vma_end = ee->vma + ee->code_size; int size = vma_end - vma_start; section_name = bfd_get_unique_section_name(cur_bfd, ".text", &idx); verbprintf(debug, "section idx=%i, name=%s, vma_start=%llx, size=%i\n", idx, section_name, vma_start, size); section = create_section(cur_bfd, section_name, size, vma_start, SEC_ALLOC|SEC_LOAD|SEC_READONLY|SEC_CODE|SEC_HAS_CONTENTS); if (section) entries_address_ascending[start_idx]->section = section; else rc = OP_JIT_CONV_FAIL; return rc; } /* fill a section contents at a given offset from the start of the section */ int fill_section_content(bfd * abfd, asection * section, void const * b, file_ptr offset, size_t sz) { if (bfd_set_section_contents(abfd, section, b, offset, sz) == FALSE) { bfd_perror("bfd_set_section_contents"); return OP_JIT_CONV_FAIL; } return OP_JIT_CONV_OK; } /* * Copy all code of the functions that are within start_idx and end_idx to * the section. */ static int fill_text_section_content(asection * section, int start_idx, int end_idx) { int rc = OP_JIT_CONV_OK; unsigned long long vma_start = entries_address_ascending[start_idx]->vma; struct jitentry const * e; int i; for (i = start_idx; i <= end_idx; i++) { e = entries_address_ascending[i]; verbprintf(debug, "section = %s, i = %i, code = %llx," " vma = %llx, offset = %llx," "size = %i, name = %s\n", section->name, i, (unsigned long long) (uintptr_t) e->code, e->vma, e->vma - vma_start, e->code_size, e->symbol_name); /* the right part that is created by split_entry may * have no code; also, the agent may have passed NULL * for the code location. */ if (e->code) { rc = fill_section_content(cur_bfd, section, e->code, (file_ptr) (e->vma - vma_start), (bfd_size_type)e->code_size); if (rc != OP_JIT_CONV_OK) break; } } return rc; } /* Walk over the symbols sorted by address and create ELF sections. Whenever we * have a gap greater or equal to 4096 make a new section. */ int partition_sections(void) { int rc = OP_JIT_CONV_OK; u32 i, j; struct jitentry const * pred; struct jitentry const * entry; unsigned long long end_addr; // i: start index of the section i = 0; for (j = 1; j < entry_count; j++) { entry = entries_address_ascending[j]; pred = entries_address_ascending[j - 1]; end_addr = pred->vma + pred->code_size; // calculate gap between code, if it is more than one page // create an additional section if ((entry->vma - end_addr) >= 4096) { rc = create_text_section(i, j - 1); if (rc == OP_JIT_CONV_FAIL) goto out; i = j; } } // this holds always if we have at least one jitentry if (i < entry_count) rc = create_text_section(i, entry_count - 1); out: return rc; } /* Fill the code content into the sections created by partition_sections() */ int fill_sections(void) { int rc = OP_JIT_CONV_OK; u32 i, j; asection * section; rc = fill_symtab(); if (rc == OP_JIT_CONV_FAIL) goto out; verbprintf(debug, "opjitconv: fill_sections\n"); i = 0; for (j = 1; j < entry_count; j++) { if (entries_address_ascending[j]->section) { section = entries_address_ascending[i]->section; rc = fill_text_section_content(section, i, j - 1); if (rc == OP_JIT_CONV_FAIL) goto out; i = j; } } // this holds always if we have at least one jitentry if (i < entry_count) { section = entries_address_ascending[i]->section; rc = fill_text_section_content(section, i, entry_count - 1); } out: return rc; } /* create the elf file */ bfd * open_elf(char const * filename) { bfd * abfd; abfd = bfd_openw(filename, dump_bfd_target_name); if (!abfd) { bfd_perror("bfd_openw"); goto error1; } if (bfd_set_format(abfd, bfd_object) == FALSE) { bfd_perror("bfd_set_format"); goto error; } if (bfd_set_arch_mach(abfd, dump_bfd_arch, dump_bfd_mach) == FALSE) { bfd_perror("bfd_set_arch_mach"); goto error; } return abfd; error: bfd_close(abfd); error1: return NULL; } oprofile-1.3.0/opjitconv/debug_line.c0000664000175000017500000003120412534404406014533 00000000000000/** * @file debug_line.c * DWARF 2 debug line info creation helper * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include "config.h" #include #include #include #include #include #include #include #include "opjitconv.h" #include "jitdump.h" #include "opagent.h" #include "op_libiberty.h" #include "op_growable_buffer.h" /* * Terminology comes from the TIS DWARF Debugging Information Format * version 2.0 */ typedef uint32_t uword; typedef uint16_t uhalf; typedef int32_t sword; typedef int16_t shalf; typedef uint8_t ubyte; typedef int8_t sbyte; /* * Many of the following enum are incomplete and define only the subset * of DWARF we use. */ enum lns_opcode { DW_LNS_copy=1, DW_LNS_advance_pc, DW_LNS_advance_line, DW_LNS_set_file, DW_LNS_set_column, DW_LNS_negate_stmt, DW_LNS_set_basic_block, DW_LNS_const_add_pc, DW_LNS_fixed_advance_pc, /* Adding new opcode needs an update of the standard_opcode_length * array */ DW_LNS_max_opcode, }; enum lne_opcode { DW_LNE_end_sequence = 1, DW_LNE_set_address, DW_LNE_define_file }; enum dw_tag { DW_TAG_compile_unit = 0x11, }; enum dw_at { DW_AT_name = 0x03, DW_AT_stmt_list = 0x10, DW_AT_low_pc, DW_AT_high_pc, DW_AT_language, DW_AT_compdir = 0x1b, DW_AT_producer = 0x25, }; enum dw_children { DW_CHILDREN_no, DW_CHILDREN_yes }; enum dw_form { DW_FORM_data4 = 0x06, }; struct debug_line_header { // Not counting this field uword total_length; // version number (2 currently) uhalf version; // relative offset from next field to // program statement uword prolog_length; ubyte minimum_instruction_length; ubyte default_is_stmt; // line_base - see DWARF 2 specs sbyte line_base; // line_range - see DWARF 2 specs ubyte line_range; // number of opcode + 1 ubyte opcode_base; /* follow the array of opcode args nr: ubytes [nr_opcode_base] */ /* follow the search directories index, zero terminated string * terminated by an empty string. */ /* follow an array of { filename, LEB128, LEB128, LEB128 }, first is * the directory index entry, 0 means current directory, then mtime * and filesize, last entry is followed by en empty string. */ /* follow the first program statement */ } __attribute__((packed)); /* DWARF 2 spec talk only about one possible compilation unit header while * binutils can handle two flavours of dwarf 2, 32 and 64 bits, this is not * related to the used arch, an ELF 32 can hold more than 4 Go of debug * information. For now we handle only DWARF 2 32 bits comp unit. It'll only * become a problem if we generate more than 4GB of debug information. */ struct compilation_unit_header { uword total_length; uhalf version; uword debug_abbrev_offset; ubyte pointer_size; } __attribute__((packed)); /* field filled at run time are marked with -1 */ static struct debug_line_header const default_debug_line_header = { -1, 2, -1, 1, /* could be better when min instruction size != 1 */ 1, /* we don't take care about basic block */ -5, /* sensible value for line base ... */ 14, /* ... and line range are guessed statically */ DW_LNS_max_opcode }; static ubyte const standard_opcode_length[DW_LNS_max_opcode - 1] = { 0, 1, 1, 1, 1, 0, 0, 0, 1 }; /* field filled at run time are marked with -1 */ static struct compilation_unit_header const default_comp_unit_header = { -1, 2, 0, /* we reuse the same abbrev entries for all comp unit */ -1 }; static void emit_uword(struct growable_buffer * b, uword data) { add_data(b, &data, sizeof(uword)); } static void emit_string(struct growable_buffer * b, char const * s) { add_data(b, s, strlen(s) + 1); } static void emit_unsigned_LEB128(struct growable_buffer * b, unsigned long data) { do { ubyte cur = data & 0x7F; data >>= 7; if (data) cur |= 0x80; add_data(b, &cur, 1); } while (data); } static void emit_signed_LEB128(struct growable_buffer * b, long data) { int more = 1; int negative = data < 0; int size = sizeof(long) * CHAR_BIT; while (more) { ubyte cur = data & 0x7F; data >>= 7; if (negative) data |= - (1 << (size - 7)); if ((data == 0 && !(cur & 0x40)) || (data == -1l && (cur & 0x40))) more = 0; else cur |= 0x80; add_data(b, &cur, 1); } } static void emit_extended_opcode(struct growable_buffer * b, ubyte opcode, void * data, size_t data_len) { add_data(b, "", 1); emit_unsigned_LEB128(b, data_len + 1); add_data(b, &opcode, 1); add_data(b, data, data_len); } static void emit_opcode(struct growable_buffer * b, ubyte opcode) { add_data(b, &opcode, 1); } static void emit_opcode_signed(struct growable_buffer * b, ubyte opcode, long data) { add_data(b, &opcode, 1); emit_signed_LEB128(b, data); } static void emit_opcode_unsigned(struct growable_buffer * b, ubyte opcode, unsigned long data) { add_data(b, &opcode, 1); emit_unsigned_LEB128(b, data); } static void emit_advance_pc(struct growable_buffer * b, unsigned long delta_pc) { emit_opcode_unsigned(b, DW_LNS_advance_pc, delta_pc); } static void emit_advance_lineno(struct growable_buffer * b, long delta_lineno) { emit_opcode_signed(b, DW_LNS_advance_line, delta_lineno); } static void emit_lne_end_of_sequence(struct growable_buffer * b) { emit_extended_opcode(b, DW_LNE_end_sequence, NULL, 0); } static void emit_set_file(struct growable_buffer * b, unsigned long index) { emit_opcode_unsigned(b, DW_LNS_set_file, index); } static void emit_lne_define_filename(struct growable_buffer * b, char const * filename) { /* emit_extended_opcode() can't be used here, we have additional * data to output and the len field will be miscalculated. */ add_data(b, "", 1); /* strlen(filename) + zero terminator + len field + 3 bytes for the dir * entry, timestamp and filesize */ emit_unsigned_LEB128(b, strlen(filename) + 5); emit_opcode(b, DW_LNE_define_file); emit_string(b, filename); add_data(b, "\0\0\0", 3); } static void emit_lne_set_address(struct growable_buffer * b, void const * address) { emit_extended_opcode(b, DW_LNE_set_address, &address, sizeof(unsigned long)); } static ubyte get_special_opcode(struct debug_line_info const * line, unsigned int last_lineno, unsigned long last_vma) { unsigned int temp; unsigned long delta_addr; /* See TIS DWARF Debugging Information Format version 2.0 § 6.2.5.1 */ temp = (line->lineno - last_lineno) - default_debug_line_header.line_base; if (temp >= default_debug_line_header.line_range) return 0; delta_addr = (line->vma - last_vma) / default_debug_line_header.minimum_instruction_length; /* This is not sufficient to ensure opcode will be in [0-256] but * sufficient to ensure when summing with the delta lineno we will * not overflow the unsigned long opcode */ if (delta_addr <= 256 / default_debug_line_header.line_range) { unsigned long opcode = temp + (delta_addr * default_debug_line_header.line_range) + default_debug_line_header.opcode_base; return opcode <= 255 ? opcode : 0; } return 0; } static void emit_lineno_info(struct growable_buffer * b, struct debug_line_info const * line, size_t nr_entry, unsigned long code_addr) { size_t i; /* * Machine state at start of a statement program * address = 0 * file = 1 * line = 1 * column = 0 * is_stmt = default_is_stmt as given in the debug_line_header * basic block = 0 * end sequence = 0 */ /* start state of the state machine we take care of */ unsigned long last_vma = code_addr; unsigned int last_lineno = 1; char const * cur_filename = NULL; unsigned long cur_file_index = 0; /* FIXME: relocatable address? */ emit_lne_set_address(b, (void const *)code_addr); emit_advance_lineno(b, line[0].lineno - last_lineno); last_lineno = line[0].lineno; emit_lne_define_filename(b, line[0].filename); cur_filename = line[0].filename; emit_set_file(b, ++cur_file_index); emit_opcode(b, DW_LNS_copy); for (i = 0; i < nr_entry; i++) { int need_copy = 0; ubyte special_opcode; if (!cur_filename || strcmp(cur_filename, line[i].filename)) { emit_lne_define_filename(b, line[i].filename); cur_filename = line[i].filename; emit_set_file(b, ++cur_file_index); need_copy = 1; } if ((special_opcode = get_special_opcode(&line[i], last_lineno, last_vma)) != 0) { last_lineno = line[i].lineno; last_vma = line[i].vma; emit_opcode(b, special_opcode); } else { if (last_lineno != line[i].lineno) { emit_advance_lineno(b, line[i].lineno - last_lineno); last_lineno = line[i].lineno; need_copy = 1; } if (last_vma != line[i].vma) { emit_advance_pc(b, line[i].vma - last_vma); last_vma = line[i].vma; need_copy = 1; } if (need_copy) emit_opcode(b, DW_LNS_copy); } } } static void add_debug_line(struct growable_buffer * b, struct debug_line_info const * line, size_t nr_entry, unsigned long code_addr) { struct debug_line_header * dbg_header; size_t old_size; old_size = b->size; add_data(b, &default_debug_line_header, sizeof(default_debug_line_header)); add_data(b, &standard_opcode_length, sizeof(standard_opcode_length)); // empty directory entry add_data(b, "", 1); // empty filename directory add_data(b, "", 1); dbg_header = b->p + old_size; dbg_header->prolog_length = (b->size - old_size) - offsetof(struct debug_line_header, minimum_instruction_length); emit_lineno_info(b, line, nr_entry, code_addr); emit_lne_end_of_sequence(b); dbg_header = b->p + old_size; dbg_header->total_length = (b->size - old_size) - offsetof(struct debug_line_header, version); } static void add_compilation_unit(struct growable_buffer * b, size_t offset_debug_line) { struct compilation_unit_header * comp_unit_header; size_t old_size = b->size; add_data(b, &default_comp_unit_header, sizeof(default_comp_unit_header)); emit_unsigned_LEB128(b, 1); emit_uword(b, offset_debug_line); comp_unit_header = b->p + old_size; comp_unit_header->total_length = (b->size - old_size) - offsetof(struct compilation_unit_header, version); comp_unit_header->pointer_size = sizeof(void *); } static void create_debug_abbrev(struct growable_buffer * b) { emit_unsigned_LEB128(b, 1); emit_unsigned_LEB128(b, DW_TAG_compile_unit); emit_unsigned_LEB128(b, DW_CHILDREN_yes); emit_unsigned_LEB128(b, DW_AT_stmt_list); emit_unsigned_LEB128(b, DW_FORM_data4); emit_unsigned_LEB128(b, 0); } static struct growable_buffer b_line; static struct growable_buffer b_debug_info; static struct growable_buffer b_debug_abbrev; int init_debug_line_info(bfd * abfd) { asection * line_section, * debug_info, * debug_abbrev; struct jitentry_debug_line * debug_line; init_buffer(&b_line); init_buffer(&b_debug_info); init_buffer(&b_debug_abbrev); for (debug_line = jitentry_debug_line_list; debug_line; debug_line = debug_line->next) { struct jr_code_debug_info const * rec = debug_line->data; if (rec->nr_entry) { size_t i; void const * data = rec + 1; struct debug_line_info * dbg_line = xmalloc(rec->nr_entry * sizeof(struct debug_line_info)); for (i = 0; i < rec->nr_entry; ++i) { dbg_line[i].vma = *(unsigned long *)data; data += sizeof(unsigned long); dbg_line[i].lineno = *(unsigned int *)data; data += sizeof(unsigned int); dbg_line[i].filename = data; data += strlen(data) + 1; } add_compilation_unit(&b_debug_info, b_line.size); add_debug_line(&b_line, dbg_line, rec->nr_entry, rec->code_addr); create_debug_abbrev(&b_debug_abbrev); free(dbg_line); } } line_section = create_section(abfd, ".debug_line", b_line.size, 0, SEC_HAS_CONTENTS|SEC_READONLY|SEC_DEBUGGING); if (!line_section) return -1; debug_info = create_section(abfd, ".debug_info", b_debug_info.size, 0, SEC_HAS_CONTENTS|SEC_READONLY|SEC_DEBUGGING); if (!debug_info) return -1; debug_abbrev = create_section(abfd, ".debug_abbrev", b_debug_abbrev.size, 0, SEC_HAS_CONTENTS|SEC_READONLY|SEC_DEBUGGING); if (!debug_abbrev) return -1; return 0; } int finalize_debug_line_info(bfd * abfd) { asection * line_section, * debug_info, * debug_abbrev; line_section = bfd_get_section_by_name(abfd, ".debug_line"); if (!line_section) return -1; debug_info = bfd_get_section_by_name(abfd, ".debug_info"); if (!debug_info) return -1; debug_abbrev = bfd_get_section_by_name(abfd, ".debug_abbrev"); if (!debug_abbrev) return -1; fill_section_content(abfd, line_section, b_line.p, 0, b_line.size); fill_section_content(abfd, debug_info, b_debug_info.p, 0, b_debug_info.size); fill_section_content(abfd, debug_abbrev, b_debug_abbrev.p, 0, b_debug_abbrev.size); free_buffer(&b_line); free_buffer(&b_debug_info); free_buffer(&b_debug_abbrev); return 0; } oprofile-1.3.0/opjitconv/opjitconv.c0000664000175000017500000006443113323165335014463 00000000000000/** * @file opjitconv.c * Convert a jit dump file to an ELF file * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Jens Wilke * @Modifications Maynard Johnson * @Modifications Daniel Hansel * @Modifications Gisle Dankel * * Copyright IBM Corporation 2007 * */ #include "opjitconv.h" #include "op_file.h" #include "op_libiberty.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* * list head. The linked list is used during parsing (parse_all) to * hold all jitentry elements. After parsing, the program works on the * array structures (entries_symbols_ascending, entries_address_ascending) * and the linked list is not used any more. */ struct jitentry * jitentry_list = NULL; struct jitentry_debug_line * jitentry_debug_line_list = NULL; /* Global variable for asymbols so we can free the storage later. */ asymbol ** syms; /* jit dump header information */ enum bfd_architecture dump_bfd_arch; int dump_bfd_mach; char const * dump_bfd_target_name; /* user information for special user 'oprofile' */ struct passwd * pw_oprofile; char sys_cmd_buffer[PATH_MAX + 1]; /* the bfd handle of the ELF file we write */ bfd * cur_bfd; /* count of jitentries in the list */ u32 entry_count; /* maximul space in the entry arrays, needed to add entries */ u32 max_entry_count; /* array pointing to all jit entries, sorted by symbol names */ struct jitentry ** entries_symbols_ascending; /* array pointing to all jit entries sorted by address */ struct jitentry ** entries_address_ascending; /* debug flag, print some information */ int debug; /* indicates opjitconv invoked by non-root user via operf */ int non_root; /* indicates we should delete jitdump files owned by the user */ int delete_jitdumps; /* Session directory where sample data is stored */ char * session_dir; static struct option long_options [] = { { "session-dir", required_argument, NULL, 's'}, { "debug", no_argument, NULL, 'd'}, { "delete-jitdumps", no_argument, NULL, 'j'}, { "non-root", no_argument, NULL, 'n'}, { "help", no_argument, NULL, 'h'}, { NULL, 9, NULL, 0} }; const char * short_options = "s:djnh"; LIST_HEAD(jitdump_deletion_candidates); /* * Front-end processing from this point to end of the source. * From main(), the general flow is as follows: * 1. Find all anonymous samples directories * 2. Find all JIT dump files * 3. For each JIT dump file: * 3.1 Find matching anon samples dir (from list retrieved in step 1) * 3.2 mmap the JIT dump file * 3.3 Call op_jit_convert to create ELF file if necessary */ /* Callback function used for get_matching_pathnames() call to obtain * matching path names. */ static void get_pathname(char const * pathname, void * name_list) { struct list_head * names = (struct list_head *) name_list; struct pathname * pn = xmalloc(sizeof(struct pathname)); pn->name = xstrdup(pathname); list_add(&pn->neighbor, names); } static void delete_pathname(struct pathname * pname) { free(pname->name); list_del(&pname->neighbor); free(pname); } static void delete_path_names_list(struct list_head * list) { struct list_head * pos1, * pos2; list_for_each_safe(pos1, pos2, list) { struct pathname * pname = list_entry(pos1, struct pathname, neighbor); delete_pathname(pname); } } static int mmap_jitdump(char const * dumpfile, struct op_jitdump_info * file_info) { int rc = OP_JIT_CONV_OK; int dumpfd; dumpfd = open(dumpfile, O_RDONLY); if (dumpfd < 0) { if (errno == ENOENT) rc = OP_JIT_CONV_NO_DUMPFILE; else rc = OP_JIT_CONV_FAIL; goto out; } rc = fstat(dumpfd, &file_info->dmp_file_stat); if (rc < 0) { perror("opjitconv:fstat on dumpfile"); rc = OP_JIT_CONV_FAIL; goto out; } file_info->dmp_file = mmap(0, file_info->dmp_file_stat.st_size, PROT_READ, MAP_PRIVATE, dumpfd, 0); if (file_info->dmp_file == MAP_FAILED) { perror("opjitconv:mmap\n"); rc = OP_JIT_CONV_FAIL; } out: if (dumpfd != -1) close(dumpfd); return rc; } static char const * find_anon_dir_match(struct list_head * anon_dirs, char const * proc_id) { struct list_head * pos; /* Current PID_MAX_LIMIT (as defined in include/linux/threads.h) is * 4 x 4 x 1024 * 1024 (for 64-bit kernels) * So need to have space for 7 chars for proc_id. */ char match_filter[12]; snprintf(match_filter, 12, "*/%s.*", proc_id); list_for_each(pos, anon_dirs) { struct pathname * anon_dir = list_entry(pos, struct pathname, neighbor); if (!fnmatch(match_filter, anon_dir->name, 0)) return anon_dir->name; } return NULL; } int change_owner(char * path) { int rc = OP_JIT_CONV_OK; int fd; if (non_root) return rc; fd = open(path, 0); if (fd < 0) { printf("opjitconv: File cannot be opened for changing ownership.\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (fchown(fd, pw_oprofile->pw_uid, pw_oprofile->pw_gid) != 0) { printf("opjitconv: Changing ownership failed (%s).\n", strerror(errno)); close(fd); rc = OP_JIT_CONV_FAIL; goto out; } close(fd); out: return rc; } /* Copies the given file to the temporary working directory and sets ownership * to 'oprofile:oprofile'. */ int copy_dumpfile(char const * dumpfile, char * tmp_dumpfile) { #define OP_JITCONV_USECS_TO_WAIT 1000 int file_locked = 0; unsigned int usecs_waited = 0; int rc = OP_JIT_CONV_OK; int fd = open(dumpfile, O_RDONLY); if (fd < 0) { perror("opjitconv failed to open JIT dumpfile"); return OP_JIT_CONV_FAIL; } again: // Need OS-level file locking here since opagent may still be writing to the file. rc = flock(fd, LOCK_EX | LOCK_NB); if (rc) { if (usecs_waited < OP_JITCONV_USECS_TO_WAIT) { usleep(100); usecs_waited += 100; goto again; } else { printf("opjitconv: Unable to obtain lock on %s.\n", dumpfile); rc = OP_JIT_CONV_FAIL; goto out; } } file_locked = 1; sprintf(sys_cmd_buffer, "/bin/cp -p %s %s", dumpfile, tmp_dumpfile); if (system(sys_cmd_buffer) != 0) { printf("opjitconv: Calling system() to copy files failed.\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (change_owner(tmp_dumpfile) != 0) { printf("opjitconv: Changing ownership of temporary dump file failed.\n"); rc = OP_JIT_CONV_FAIL; goto out; } out: #undef OP_JITCONV_USECS_TO_WAIT close(fd); if (file_locked) flock(fd, LOCK_UN); return rc; } /* Copies the created ELF file located in the temporary working directory to the * final destination (i.e. given ELF file name) and sets ownership to the * current user. */ int copy_elffile(char * elf_file, char * tmp_elffile) { int rc = OP_JIT_CONV_OK; int retlen, fd; retlen = snprintf(sys_cmd_buffer, sizeof(sys_cmd_buffer), "/bin/cp -p %s %s", tmp_elffile, elf_file); if (retlen <= 0 || ((int) sizeof(sys_cmd_buffer)) <= retlen || system(sys_cmd_buffer) != 0) { printf("opjitconv: Calling system() to copy files failed.\n"); rc = OP_JIT_CONV_FAIL; goto out; } fd = open(elf_file, 0); if (fd < 0) { printf("opjitconv: File cannot be opened for changing ownership.\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (fchown(fd, getuid(), getgid()) != 0) { printf("opjitconv: Changing ownership failed (%s).\n", strerror(errno)); close(fd); rc = OP_JIT_CONV_FAIL; goto out; } close(fd); out: return rc; } /* Look for an anonymous samples directory that matches the process ID * given by the passed JIT dmp_pathname. If none is found, it's an error * since by agreement, all JIT dump files should be removed every time * the user does --reset. If we do find the matching samples directory, * we create an ELF file (.jo) and place it in that directory. */ static int process_jit_dumpfile(char const * dmp_pathname, struct list_head * anon_sample_dirs, unsigned long long start_time, unsigned long long end_time, char * tmp_conv_dir) { int result_dir_length, proc_id_length; int rc = OP_JIT_CONV_OK; int jofd; struct stat file_stat; time_t dumpfile_modtime; struct op_jitdump_info dmp_info; char * elf_file = NULL; char * proc_id = NULL; char const * anon_dir; char const * dumpfilename = rindex(dmp_pathname, '/'); /* temporary copy of dump file created for conversion step */ char * tmp_dumpfile; /* temporary ELF file created during conversion step */ char * tmp_elffile; int tmp_dumpfile_size, elf_file_size, tmp_elffile_size; verbprintf(debug, "Processing dumpfile %s\n", dmp_pathname); /* Check if the dump file is a symbolic link. * We should not trust symbolic links because we only produce normal dump * files (no links). */ if (lstat(dmp_pathname, &file_stat) == -1) { printf("opjitconv: lstat for dumpfile failed (%s).\n", strerror(errno)); rc = OP_JIT_CONV_FAIL; goto out; } if (S_ISLNK(file_stat.st_mode)) { printf("opjitconv: dumpfile path is corrupt (symbolic links not allowed).\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (dumpfilename) { size_t tmp_conv_dir_length = strlen(tmp_conv_dir); char const * dot_dump = rindex(++dumpfilename, '.'); if (!dot_dump) goto chk_proc_id; proc_id_length = dot_dump - dumpfilename; proc_id = xmalloc(proc_id_length + 1); memcpy(proc_id, dumpfilename, proc_id_length); proc_id[proc_id_length] = '\0'; verbprintf(debug, "Found JIT dumpfile for process %s\n", proc_id); tmp_dumpfile_size = tmp_conv_dir_length + 1 + strlen(dumpfilename + 1); tmp_dumpfile = xmalloc(tmp_dumpfile_size); snprintf(tmp_dumpfile, tmp_dumpfile_size, "%s/%s", tmp_conv_dir, dumpfilename); } chk_proc_id: if (!proc_id) { printf("opjitconv: dumpfile path is corrupt.\n"); rc = OP_JIT_CONV_FAIL; goto out; } if (!(anon_dir = find_anon_dir_match(anon_sample_dirs, proc_id))) { /* When profiling with operf, opjitconv will remove old jitdump * files (see _cleanup_jitdumps() for details). But this cleanup * strategy makes it quite likely that opjitconv will sometimes find * jitdump files that are not owned by the current user or are in use * by other operf users, thus, the current profile data would not have * matching anon samples for such jitdump files. */ verbprintf(debug, "Informational message: No matching anon samples for %s\n", dmp_pathname); rc = OP_JIT_CONV_NO_MATCHING_ANON_SAMPLES; goto free_res1; } if (copy_dumpfile(dmp_pathname, tmp_dumpfile) != OP_JIT_CONV_OK) goto free_res1; if ((rc = mmap_jitdump(tmp_dumpfile, &dmp_info)) == OP_JIT_CONV_OK) { char * anon_path_seg = rindex(anon_dir, '/'); if (!anon_path_seg) { printf("opjitconv: Bad path for anon sample: %s\n", anon_dir); rc = OP_JIT_CONV_FAIL; goto free_res2; } result_dir_length = ++anon_path_seg - anon_dir; /* create final ELF file name */ elf_file_size = result_dir_length + strlen(proc_id) + strlen(".jo") + 1; elf_file = xmalloc(elf_file_size); snprintf(elf_file, elf_file_size, "%s%s.jo", anon_dir, proc_id); /* create temporary ELF file name */ tmp_elffile_size = strlen(tmp_conv_dir) + 1 + strlen(proc_id) + strlen(".jo") + 1; tmp_elffile = xmalloc(tmp_elffile_size); snprintf(tmp_elffile, tmp_elffile_size, "%s/%s.jo", tmp_conv_dir, proc_id); // Check if final ELF file exists already jofd = open(elf_file, O_RDONLY); if (jofd < 0) goto create_elf; rc = fstat(jofd, &file_stat); close(jofd); if (rc < 0) { perror("opjitconv:fstat on .jo file"); rc = OP_JIT_CONV_FAIL; goto free_res3; } if (dmp_info.dmp_file_stat.st_mtime > dmp_info.dmp_file_stat.st_ctime) dumpfile_modtime = dmp_info.dmp_file_stat.st_mtime; else dumpfile_modtime = dmp_info.dmp_file_stat.st_ctime; /* Final ELF file already exists, so if dumpfile has not been * modified since the ELF file's mod time, we don't need to * do ELF creation again. */ if (!(file_stat.st_ctime < dumpfile_modtime || file_stat.st_mtime < dumpfile_modtime)) { rc = OP_JIT_CONV_ALREADY_DONE; goto free_res3; } create_elf: verbprintf(debug, "Converting %s to %s\n", dmp_pathname, elf_file); /* Set eGID of the special user 'oprofile'. */ if (!non_root && setegid(pw_oprofile->pw_gid) != 0) { perror("opjitconv: setegid to special user failed"); rc = OP_JIT_CONV_FAIL; goto free_res3; } /* Set eUID of the special user 'oprofile'. */ if (!non_root && seteuid(pw_oprofile->pw_uid) != 0) { perror("opjitconv: seteuid to special user failed"); rc = OP_JIT_CONV_FAIL; goto free_res3; } /* Convert the dump file as the special user 'oprofile'. */ rc = op_jit_convert(&dmp_info, tmp_elffile, start_time, end_time); if (rc < 0) goto free_res3; /* Set eUID back to the original user. */ if (!non_root && seteuid(getuid()) != 0) { perror("opjitconv: seteuid to original user failed"); rc = OP_JIT_CONV_FAIL; goto free_res3; } /* Set eGID back to the original user. */ if (!non_root && setegid(getgid()) != 0) { perror("opjitconv: setegid to original user failed"); rc = OP_JIT_CONV_FAIL; goto free_res3; } rc = copy_elffile(elf_file, tmp_elffile); free_res3: free(elf_file); free(tmp_elffile); free_res2: munmap(dmp_info.dmp_file, dmp_info.dmp_file_stat.st_size); } free_res1: free(proc_id); free(tmp_dumpfile); out: return rc; } /* If non-NULL value is returned, caller is responsible for freeing memory.*/ static char * get_procid_from_dirname(char * dirname) { char * ret = NULL; if (dirname) { char * proc_id; int proc_id_length; char * fname = rindex(dirname, '/'); char const * dot = index(++fname, '.'); if (!dot) goto out; proc_id_length = dot - fname; proc_id = xmalloc(proc_id_length + 1); memcpy(proc_id, fname, proc_id_length); proc_id[proc_id_length] = '\0'; ret = proc_id; } out: return ret; } static void filter_anon_samples_list(struct list_head * anon_dirs) { struct procid { struct procid * next; char * pid; }; struct procid * pid_list = NULL; struct procid * id, * nxt; struct list_head * pos1, * pos2; list_for_each_safe(pos1, pos2, anon_dirs) { struct pathname * pname = list_entry(pos1, struct pathname, neighbor); char * proc_id = get_procid_from_dirname(pname->name); if (proc_id) { int found = 0; for (id = pid_list; id != NULL; id = id->next) { if (!strcmp(id->pid, proc_id)) { /* Already have an entry for this * process ID, so delete this entry * from anon_dirs. */ free(pname->name); list_del(&pname->neighbor); free(pname); found = 1; } } if (!found) { struct procid * this_proc = xmalloc(sizeof(struct procid)); this_proc->pid = proc_id; this_proc->next = pid_list; pid_list = this_proc; } } else { printf("Unexpected result in processing anon sample" " directory\n"); } } for (id = pid_list; id; id = nxt) { free(id->pid); nxt = id->next; free(id); } } static void _add_jitdumps_to_deletion_list(void * all_jitdumps, char const * jitdump_dir ) { struct list_head * jd_fnames = (struct list_head *) all_jitdumps; struct list_head * pos1, *pos2; size_t dir_len = strlen(jitdump_dir); list_for_each_safe(pos1, pos2, jd_fnames) { struct pathname * dmpfile = list_entry(pos1, struct pathname, neighbor); struct stat mystat; char dmpfile_pathname[dir_len + 20]; int fd; memset(dmpfile_pathname, '\0', dir_len + 20); strcpy(dmpfile_pathname, jitdump_dir); strcat(dmpfile_pathname,dmpfile->name); fd = open(dmpfile_pathname, O_RDONLY); if (fd < 0) { // Non-fatal error, so just display debug message and continue verbprintf(debug, "opjitconv: cannot open jitdump file %s\n", dmpfile_pathname); continue; } if (fstat(fd, &mystat) < 0) { // Non-fatal error, so just display debug message and continue verbprintf(debug, "opjitconv: cannot fstat jitdump file"); close(fd); continue; } close(fd); if (!non_root || geteuid() == mystat.st_uid) { struct jitdump_deletion_candidate * jdc = xmalloc(sizeof(struct jitdump_deletion_candidate)); jdc->name = xstrdup(dmpfile->name); list_add(&jdc->neighbor, &jitdump_deletion_candidates); } } } static int op_process_jit_dumpfiles(char const * session_dir, unsigned long long start_time, unsigned long long end_time) { struct list_head * pos1, * pos2; int rc = OP_JIT_CONV_OK; char jitdumpfile[PATH_MAX + 1]; char oprofile_tmp_template[PATH_MAX + 1]; char const * jitdump_dir = "/tmp/.oprofile/jitdump/"; int retlen; LIST_HEAD(jd_fnames); char const * anon_dir_filter = "*/{dep}/{anon:anon}/[0-9]*.*"; LIST_HEAD(anon_dnames); char const * samples_subdir = "/samples/current"; int samples_dir_len = strlen(session_dir) + strlen(samples_subdir); char * samples_dir; /* temporary working directory for dump file conversion step */ char * tmp_conv_dir = NULL; if (non_root) sprintf(oprofile_tmp_template, "%s/tmp", session_dir); else strcpy(oprofile_tmp_template, "/tmp/oprofile.XXXXXX"); /* Create a temporary working directory used for the conversion step. */ if (non_root) { retlen = snprintf(sys_cmd_buffer, sizeof(sys_cmd_buffer), "/bin/rm -rf %s", oprofile_tmp_template); if (retlen <= 0 || ((int) sizeof(sys_cmd_buffer)) <= retlen || system(sys_cmd_buffer) != 0) { printf("opjitconv: Removing temporary working directory %s failed.\n", oprofile_tmp_template); rc = OP_JIT_CONV_TMPDIR_NOT_REMOVED; } else { if (!mkdir(oprofile_tmp_template, S_IRWXU | S_IRWXG )) tmp_conv_dir = oprofile_tmp_template; } } else { tmp_conv_dir = mkdtemp(oprofile_tmp_template); } if (tmp_conv_dir == NULL) { printf("opjitconv: Temporary working directory %s cannot be created.\n", oprofile_tmp_template); perror("Exiting due to error"); rc = OP_JIT_CONV_FAIL; goto out; } errno = 0; if ((rc = get_matching_pathnames(&jd_fnames, get_pathname, jitdump_dir, "*.dump", NO_RECURSION)) < 0 || list_empty(&jd_fnames)) { if (errno) { if (errno != ENOENT) { char msg[PATH_MAX]; strcpy(msg, "opjitconv: fatal error trying to find JIT dump files in "); strcat(msg, jitdump_dir); perror(msg); rc = OP_JIT_CONV_FAIL; } else { verbprintf(debug, "opjitconv: Non-fatal error trying to find JIT dump files in %s: %s\n", jitdump_dir, strerror(errno)); rc = OP_JIT_CONV_NO_DUMPFILE; } } goto rm_tmp; } if (delete_jitdumps) _add_jitdumps_to_deletion_list(&jd_fnames, jitdump_dir); /* Get user information (i.e. UID and GID) for special user 'oprofile'. */ if (non_root) { pw_oprofile = NULL; } else { pw_oprofile = getpwnam("oprofile"); if (pw_oprofile == NULL) { printf("opjitconv: User information for special user oprofile cannot be found.\n"); rc = OP_JIT_CONV_FAIL; goto rm_tmp; } } /* Change ownership of the temporary working directory to prevent other users * to attack conversion process. */ if (change_owner(tmp_conv_dir) != 0) { printf("opjitconv: Changing ownership of temporary directory failed.\n"); rc = OP_JIT_CONV_FAIL; goto rm_tmp; } samples_dir = xmalloc(samples_dir_len + 1); sprintf(samples_dir, "%s%s", session_dir, samples_subdir); if (get_matching_pathnames(&anon_dnames, get_pathname, samples_dir, anon_dir_filter, MATCH_DIR_ONLY_RECURSION) < 0 || list_empty(&anon_dnames)) { rc = OP_JIT_CONV_NO_ANON_SAMPLES; goto rm_tmp; } /* When using get_matching_pathnames to find anon samples, * the list that's returned may contain multiple entries for * one or more processes; e.g., * 6868.0x100000.0x103000 * 6868.0xdfe77000.0xdec40000 * 7012.0x100000.0x103000 * 7012.0xdfe77000.0xdec40000 * * So we must filter the list so there's only one entry per * process. */ filter_anon_samples_list(&anon_dnames); /* get_matching_pathnames returns only filename segment when * NO_RECURSION is passed, so below, we add back the JIT * dump directory path to the name. */ list_for_each_safe(pos1, pos2, &jd_fnames) { struct pathname * dmpfile = list_entry(pos1, struct pathname, neighbor); snprintf(jitdumpfile, PATH_MAX, "%s%s", jitdump_dir, dmpfile->name); jitdumpfile[PATH_MAX] = '\0'; rc = process_jit_dumpfile(jitdumpfile, &anon_dnames, start_time, end_time, tmp_conv_dir); if (rc == OP_JIT_CONV_FAIL) { verbprintf(debug, "JIT convert error %d\n", rc); goto rm_tmp; } delete_pathname(dmpfile); } delete_path_names_list(&anon_dnames); rm_tmp: /* Delete temporary working directory with all its files * (i.e. dump and ELF file). */ sprintf(sys_cmd_buffer, "/bin/rm -rf '%s'", tmp_conv_dir); if (system(sys_cmd_buffer) != 0) { printf("opjitconv: Removing temporary working directory failed.\n"); rc = OP_JIT_CONV_TMPDIR_NOT_REMOVED; } out: return rc; } static void _cleanup_jitdumps(void) { struct list_head * pos1, *pos2; char const * jitdump_dir = "/tmp/.oprofile/jitdump/"; size_t dir_len = strlen(jitdump_dir); char dmpfile_pathname[dir_len + 20]; char proc_fd_dir[PATH_MAX]; if (!delete_jitdumps) return; /* The delete_jitdumps flag tells us to try to delete the jitdump files we found * that belong to this user. Only operf should pass the --delete-jitdumps * argument to opjitconv since legacy oprofile uses opcontrol to delete old * jitdump files. * * The code below will only delete jitdump files that are not currently * being used by another process. */ list_for_each_safe(pos1, pos2, &jitdump_deletion_candidates) { DIR * dir; struct dirent * dirent; int pid; size_t dmpfile_name_len; int do_not_delete = 0; struct jitdump_deletion_candidate * cand = list_entry(pos1, struct jitdump_deletion_candidate, neighbor); memset(dmpfile_pathname, '\0', dir_len + 20); memset(proc_fd_dir, '\0', PATH_MAX); if ((sscanf(cand->name, "%d", &pid)) != 1) { verbprintf(debug, "Cannot get process id from jitdump file %s\n", cand->name); continue; } strcpy(dmpfile_pathname, jitdump_dir); strcat(dmpfile_pathname, cand->name); dmpfile_name_len = strlen(dmpfile_pathname); sprintf(proc_fd_dir, "/proc/%d/fd/", pid); if ((dir = opendir(proc_fd_dir))) { size_t proc_fd_dir_len = strlen(proc_fd_dir); while ((dirent = readdir(dir))) { if (dirent->d_type == DT_LNK) { char buf[1024]; char fname[1024]; memset(buf, '\0', 1024); memset(fname, '\0', 1024); memset(buf, '\0', 1024); strcpy(fname, proc_fd_dir); strncat(fname, dirent->d_name, 1023 - proc_fd_dir_len); if (readlink(fname, buf, 1023) > 0) { verbprintf(debug, "readlink found for %s\n", buf); if (strncmp(buf, dmpfile_pathname, dmpfile_name_len) == 0) { do_not_delete = 1; break; } } } } closedir(dir); } if (!do_not_delete) { if (remove(dmpfile_pathname)) verbprintf(debug, "Unable to delete %s: %s\n", dmpfile_pathname, strerror(errno)); } } list_for_each_safe(pos1, pos2, &jitdump_deletion_candidates) { struct jitdump_deletion_candidate * pname = list_entry(pos1, struct jitdump_deletion_candidate, neighbor); free(pname->name); list_del(&pname->neighbor); free(pname); } } static void __print_usage(void) { fprintf(stderr, "usage: opjitconv [--debug | --non-root | --delete-jitdumps ] --session-dir= \n"); } static int _process_args(int argc, char * const argv[]) { int keep_trying = 1; int idx_of_non_options = 0; char * prev_env = getenv("POSIXLY_CORRECT"); setenv("POSIXLY_CORRECT", "1", 0); while (keep_trying) { int option_idx = 0; int c = getopt_long(argc, argv, short_options, long_options, &option_idx); switch (c) { case -1: if (optind != argc) { idx_of_non_options = optind; } keep_trying = 0; break; case '?': printf("non-option detected at optind %d\n", optind); keep_trying = 0; idx_of_non_options = -1; break; case 's': session_dir = optarg; break; case 'd': debug = 1; break; case 'n': non_root = 1; break; case 'j': delete_jitdumps = 1; break; case 'h': break; default: break; } } if (prev_env == NULL) unsetenv("POSIXLY_CORRECT"); return idx_of_non_options; } int main(int argc, char * const argv[]) { unsigned long long start_time, end_time; struct stat filestat; int non_options_idx, rc = 0; size_t sessdir_len = 0; debug = 0; non_root = 0; delete_jitdumps = 0; session_dir = NULL; non_options_idx = _process_args(argc, argv); // We need the session_dir and two non-option values passed -- starttime and endtime. if (!session_dir || (non_options_idx != argc - 2)) { __print_usage(); fflush(stdout); rc = EXIT_FAILURE; goto out; } /* * Check for a maximum of 4096 bytes (Linux path name length limit) minus 16 bytes * (to be used later for appending samples sub directory) minus 1 (for terminator). * Integer overflows according to the session dir parameter (user controlled) * are not possible anymore. */ if ((sessdir_len = strlen(session_dir)) >= (PATH_MAX - 17)) { printf("opjitconv: Path name length limit exceeded for session directory\n"); rc = EXIT_FAILURE; goto out; } if (stat(session_dir, &filestat)) { perror("stat operation on passed session-dir failed"); rc = EXIT_FAILURE; goto out; } if (!S_ISDIR(filestat.st_mode)) { printf("Passed session-dir %s is not a directory\n", session_dir); rc = EXIT_FAILURE; goto out; } start_time = atol(argv[non_options_idx++]); end_time = atol(argv[non_options_idx]); if (start_time > end_time) { rc = EXIT_FAILURE; goto out; } verbprintf(debug, "start time/end time is %llu/%llu\n", start_time, end_time); rc = op_process_jit_dumpfiles(session_dir, start_time, end_time); if (delete_jitdumps) _cleanup_jitdumps(); if (rc > OP_JIT_CONV_OK) { verbprintf(debug, "opjitconv: Ending with rc = %d. This code" " is usually OK, but can be useful for debugging" " purposes.\n", rc); rc = OP_JIT_CONV_OK; } fflush(stdout); if (rc == OP_JIT_CONV_OK) rc = EXIT_SUCCESS; else rc = EXIT_FAILURE; out: _exit(rc); } oprofile-1.3.0/opjitconv/jitsymbol.c0000664000175000017500000003510412546756165014474 00000000000000/** * @file jitsymbol.c * Handle symbols found in jitted code dump * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Jens Wilke * @Modifications Maynard Johnson * @Modifications Philippe Elie * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ #include "opjitconv.h" #include "op_libiberty.h" #include "op_types.h" #include #include #include #include #include #include #include typedef int (*compare_symbol)(void const *, void const *); /* count the entries in the jitentry_list */ static u32 count_entries(void) { struct jitentry const * entry; u32 cnt = 0; for (entry = jitentry_list; entry; entry = entry->next) cnt++; return cnt; } static void fill_entry_array(struct jitentry * entries[]) { int i = 0; struct jitentry * entry; for (entry = jitentry_list; entry; entry = entry->next) entries[i++] = entry; } /* create an array pointing to the jitentry structures which is sorted * according to the comparator rule given by parameter compar */ static struct jitentry ** create_sorted_array(compare_symbol compare) { struct jitentry ** array = xmalloc(sizeof(struct jitentry *) * entry_count); fill_entry_array(array); qsort(array, entry_count, sizeof(struct jitentry *), compare); return array; } /* comparator method for qsort which sorts jitentries by symbol_name */ static int cmp_symbolname(void const * a, void const * b) { struct jitentry * a0 = *(struct jitentry **) a; struct jitentry * b0 = *(struct jitentry **) b; return strcmp(a0->symbol_name, b0->symbol_name); } /* comparator method for qsort which sorts jitentries by address */ static int cmp_address(void const * a, void const * b) { struct jitentry * a0 = *(struct jitentry **) a; struct jitentry * b0 = *(struct jitentry **) b; if (a0->vma < b0->vma) return -1; if (a0->vma == b0->vma) return 0; return 1; } /* resort address_ascending array */ static void resort_address(void) { u32 i; qsort(entries_address_ascending, entry_count, sizeof(struct jitentry *), cmp_address); // lower entry_count if entries are invalidated for (i = 0; i < entry_count; ++i) { if (entries_address_ascending[i]->vma) break; } if (i) { entry_count -= i; memmove(&entries_address_ascending[0], &entries_address_ascending[i], sizeof(struct jitentry *) * entry_count); } } /* Copy address_ascending array to entries_symbols_ascending and resort it. */ static void resort_symbol(void) { memcpy(entries_symbols_ascending, entries_address_ascending, sizeof(struct jitentry *) * entry_count); qsort(entries_symbols_ascending, entry_count, sizeof(struct jitentry *), cmp_symbolname); } /* allocate, populate and sort the jitentry arrays */ void create_arrays(void) { max_entry_count = entry_count = count_entries(); entries_symbols_ascending = create_sorted_array(cmp_symbolname); entries_address_ascending = create_sorted_array(cmp_address); } /* add a new create jitentry to the array. mallocs new arrays if space is * needed */ static void insert_entry(struct jitentry * entry) { if (entry_count == max_entry_count) { if (max_entry_count < UINT32_MAX - 18) max_entry_count += 18; else if (max_entry_count < UINT32_MAX) max_entry_count += 1; else { fprintf(stderr, "Amount of JIT dump file entries is too large.\n"); exit(EXIT_FAILURE); } entries_symbols_ascending = (struct jitentry **) xrealloc(entries_symbols_ascending, sizeof(struct jitentry *) * max_entry_count); entries_address_ascending = (struct jitentry **) xrealloc(entries_address_ascending, sizeof(struct jitentry *) * max_entry_count); } entries_address_ascending[entry_count++] = entry; } /* add a suffix to the name to differenciate it */ static char * replacement_name(char * s, int i) { int cnt = 1; int j = i; char * res; while ((j = j/10)) cnt++; cnt += 2 + strlen(s); res = xmalloc(cnt); snprintf(res, cnt, "%s~%i", s, i); return res; } /* * Mark the entry so it is not included in the ELF file. We do this by * writing a 0 address as magic vma and sorting * it out later */ static void invalidate_entry(struct jitentry * e) { verbprintf(debug, "invalidate_entry: addr=%llx, name=%s\n", e->vma, e->symbol_name); e->vma = 0; } /* * Invalidate all symbols that are not alive at sampling start time. */ static void invalidate_earlybirds(unsigned long long start_time) { u32 i; int flag; struct jitentry * a; flag = 0; for (i = 0; i < entry_count; i++) { a = entries_address_ascending[i]; if (a->life_end < start_time) { invalidate_entry(a); flag = 1; } } if (flag) { resort_address(); resort_symbol(); } } static void invalidate_zero_size_entries(void) { u32 i; int flag; struct jitentry * a; flag = 0; for (i = 0; i < entry_count; i++) { a = entries_address_ascending[i]; if (a->code_size == 0) { invalidate_entry(a); flag = 1; } } if (flag) { resort_address(); resort_symbol(); } } /* select the symbol with the longest life time in the index range */ static int select_one(int start_idx, int end_idx) { int i; int candidate = OP_JIT_CONV_FAIL; unsigned long long lifetime = 0; unsigned long long x; struct jitentry const * e; for (i = start_idx; i <= end_idx; i++) { e = entries_address_ascending[i]; x = e->life_end - e->life_start; if (candidate == -1 || x > lifetime) { candidate = i; lifetime = x; } } return candidate; } /* * We decided to keep one entry in favor of the other. Instead of dropping * the overlapping entry we split or truncate it to not overlap any more. * * Looking on the address regions, we may have the following situation: * * split: |------------| * keep: |---| * * The split entry may be splitted in a left part and a right part. E.g.: * * split0/1: |--| |---| * keep: |---| * * However, both parts may or may not exist. */ static void split_entry(struct jitentry * split, struct jitentry const * keep) { unsigned long long start_addr_keep = keep->vma; unsigned long long end_addr_keep = keep->vma + keep->code_size; unsigned long long end_addr_split = split->vma + split->code_size; unsigned long long start_addr_split = split->vma; // do we need a right part? if (end_addr_split > end_addr_keep) { struct jitentry * new_entry = xcalloc(1, sizeof(struct jitentry)); char * s = NULL; /* Check for max. length to avoid possible integer overflow. */ if (strlen(split->symbol_name) > SIZE_MAX - 3) { fprintf(stderr, "Length of symbol name is too large.\n"); exit(EXIT_FAILURE); } else { s = xmalloc(strlen(split->symbol_name) + 3); strcpy(s, split->symbol_name); strcat(s, "#1"); } new_entry->vma = end_addr_keep; new_entry->code_size = end_addr_split - end_addr_keep; new_entry->symbol_name = s; new_entry->sym_name_malloced = 1; new_entry->life_start = split->life_start; new_entry->life_end = split->life_end; // the right part does not have an associated code, because we // don't know whether the split part begins at an opcode new_entry->code = NULL; verbprintf(debug, "split right (new) name=%s, start=%llx," " end=%llx\n", new_entry->symbol_name, new_entry->vma, new_entry->vma + new_entry->code_size); insert_entry(new_entry); } // do we need a left part? if (start_addr_split < start_addr_keep) { char * s = NULL; /* Check for max. length to avoid possible integer overflow. */ if (strlen(split->symbol_name) > SIZE_MAX - 3) { fprintf(stderr, "Length of symbol name is too large.\n"); exit(EXIT_FAILURE); } else { s = xmalloc(strlen(split->symbol_name) + 3); strcpy(s, split->symbol_name); strcat(s, "#0"); } split->code_size = start_addr_keep - start_addr_split; if (split->sym_name_malloced) free(split->symbol_name); split->symbol_name = s; split->sym_name_malloced = 1; verbprintf(debug, "split left name=%s, start=%llx, end=%llx\n", split->symbol_name, split->vma, split->vma + split->code_size); } else { invalidate_entry(split); } } /* * Scans through the index range and splits/truncates entries that overlap * with the one indexed by keep_idx. Returns the total lifetime of the symbols * found to overlap. * Returns ULONG_MAX on error. */ static unsigned long long eliminate_overlaps(int start_idx, int end_idx, int keep_idx) { unsigned long long retval; struct jitentry const * keep = entries_address_ascending[keep_idx]; struct jitentry * e; unsigned long long start_addr_keep = keep->vma; unsigned long long end_addr_keep = keep->vma + keep->code_size; unsigned long long start_addr_entry, end_addr_entry; int i; unsigned long long min_start = keep->life_start; unsigned long long max_end = keep->life_end; for (i = start_idx; i <= end_idx; i++) { if (i == keep_idx) continue; e = entries_address_ascending[i]; start_addr_entry = e->vma; end_addr_entry = e->vma + e->code_size; if (debug) { if (!(start_addr_entry <= end_addr_entry)) { verbprintf(debug, "assert failed:" " start_addr_entry <=" " end_addr_entry\n"); retval = ULONG_MAX; goto out; } if (!(start_addr_keep <= end_addr_keep)) { verbprintf(debug, "assert failed: " "start_addr_keep <=" " end_addr_keep\n"); retval = ULONG_MAX; goto out; } } if (start_addr_entry < end_addr_keep && end_addr_entry > start_addr_keep) { if (e->life_start < min_start) min_start = e->life_start; if (e->life_end > max_end) max_end = e->life_end; split_entry(e, keep); } } retval = max_end - min_start; out: return retval; } /* * Within the index range (into the array entries_address_ascending), find the * symbol with the maximal lifetime and split/truncate all symbols that overlap * with it (i.e. that there won't be any overlaps anymore). */ static int handle_overlap_region(int start_idx, int end_idx) { int rc = OP_JIT_CONV_OK; int idx; struct jitentry * e; int cnt; char * name; int i, j; unsigned long long totaltime, pct; if (debug) { for (i = start_idx; i <= end_idx; i++) { e = entries_address_ascending[i]; verbprintf(debug, "overlap idx=%i, name=%s, " "start=%llx, end=%llx, life_start=%lli, " "life_end=%lli, lifetime=%lli\n", i, e->symbol_name, e->vma, e->vma + e->code_size, e->life_start, e->life_end, e->life_end - e->life_start); } } idx = select_one(start_idx, end_idx); // This can't happen, but we check anyway, just to silence Coverity if (idx == OP_JIT_CONV_FAIL) { rc = OP_JIT_CONV_FAIL; goto out; } totaltime = eliminate_overlaps(start_idx, end_idx, idx); if (totaltime == ULONG_MAX) { rc = OP_JIT_CONV_FAIL; goto out; } e = entries_address_ascending[idx]; pct = (totaltime == 0) ? 100 : (e->life_end - e->life_start) * 100 / totaltime; cnt = 1; j = pct; while ((j = j/10)) cnt++; // Mark symbol name with a %% to indicate the overlap. cnt += strlen(e->symbol_name) + 2 + 1; name = xmalloc(cnt); snprintf(name, cnt, "%s%%%llu", e->symbol_name, pct); if (e->sym_name_malloced) free(e->symbol_name); e->symbol_name = name; e->sym_name_malloced = 1; verbprintf(debug, "selected idx=%i, name=%s\n", idx, e->symbol_name); out: return rc; } /* * one scan through the symbols to find overlaps. * return 1 if an overlap is found. this is repeated until no more overlap * is there. * Process: There may be more than two overlapping symbols with each other. * The index range of symbols found to overlap are passed to * handle_overlap_region. */ static int scan_overlaps(void) { int i, j; unsigned long long end_addr, end_addr2; struct jitentry const * a; int flag = 0; // entry_count can be incremented by split_entry() during the loop, // save the inital value as loop count int loop_count = entry_count; verbprintf(debug,"count=%i, scan overlaps...\n", entry_count); i = 0; end_addr = 0; for (j = 1; j < loop_count; j++) { /** * Take a symbol [i] and look for the next symbol(s) [j] that are overlapping * symbol [i]. If a symbol [j] is found that is not overlapping symbol [i] the * symbols [i]..[j-1] are handled to be not overlapping anymore. * See descriptions of handle_overlap_region() and eliminate_overlaps() for * further details of this handling. * E.g. possible cases to be handled could be: * * sym1 |-----------| * sym2 |---| * * sym1 |--------| * sym2 |--------| * * sym1 |--------| * sym2 |-------| * sym3 |---------| * * But in the following case * * sym1 |--------| * sym2 |-------------| * sym3 |----------| * * sym3 would not overlap with sym1. Therefore handle_overlap_regio() would * only be called for sym1 up to sym2. */ a = entries_address_ascending[j - 1]; end_addr2 = a->vma + a->code_size; if (end_addr2 > end_addr) end_addr = end_addr2; a = entries_address_ascending[j]; if (end_addr <= a->vma) { if (i != j - 1) { if (handle_overlap_region(i, j - 1) == OP_JIT_CONV_FAIL) { flag = OP_JIT_CONV_FAIL; goto out; } flag = 1; } i = j; } } if (i != j - 1) { if (handle_overlap_region(i, j - 1) == OP_JIT_CONV_FAIL) flag = OP_JIT_CONV_FAIL; else flag = 1; } out: return flag; } /* search for symbols that have overlapping address ranges and decide for * one */ int resolve_overlaps(unsigned long long start_time) { int rc = OP_JIT_CONV_OK; int cnt = 0; invalidate_earlybirds(start_time); invalidate_zero_size_entries(); while ((rc = scan_overlaps()) && rc != OP_JIT_CONV_FAIL) { resort_address(); if (cnt == 0) { verbprintf(debug, "WARNING: overlaps detected. " "Removing overlapping JIT methods\n"); } cnt++; } if (cnt > 0 && rc != OP_JIT_CONV_FAIL) resort_symbol(); return rc; } /* * scan through the sorted array and replace identical symbol names by unique * ones by adding a counter value. */ void disambiguate_symbol_names(void) { u32 j; int cnt, rep_cnt; struct jitentry * a; struct jitentry * b; rep_cnt = 0; for (j = 1; j < entry_count; j++) { a = entries_symbols_ascending[j - 1]; cnt = 1; do { b = entries_symbols_ascending[j]; if (strcmp(a->symbol_name, b->symbol_name) == 0) { if (b->sym_name_malloced) free(b->symbol_name); b->symbol_name = replacement_name(a->symbol_name, cnt); b->sym_name_malloced = 1; j++; cnt++; rep_cnt++; } else { break; } } while (j < entry_count); } /* recurse to avoid that the added suffix also creates a collision */ if (rep_cnt) { qsort(entries_symbols_ascending, entry_count, sizeof(struct jitentry *), cmp_symbolname); disambiguate_symbol_names(); } } oprofile-1.3.0/config.sub0000755000175000017500000010576212535323746012263 00000000000000#! /bin/sh # Configuration validation subroutine script. # Copyright 1992-2014 Free Software Foundation, Inc. timestamp='2014-07-28' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, see . # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that # program. This Exception is an additional permission under section 7 # of the GNU General Public License, version 3 ("GPLv3"). # Please send patches with a ChangeLog entry to config-patches@gnu.org. # # Configuration subroutine to validate and canonicalize a configuration type. # Supply the specified configuration type as an argument. # If it is invalid, we print an error message on stderr and exit with code 1. # Otherwise, we print the canonical config type on stdout and succeed. # You can get the latest version of this script from: # http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD # This file is supposed to be the same for all GNU packages # and recognize all the CPU types, system types and aliases # that are meaningful with *any* GNU software. # Each package is responsible for reporting which valid configurations # it does not support. The user should be able to distinguish # a failure to support a valid configuration from a meaningless # configuration. # The goal of this file is to map all the various variations of a given # machine specification into a single specification in the form: # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM # or in some cases, the newer four-part form: # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM # It is wrong to echo any other type of specification. me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] CPU-MFR-OPSYS $0 [OPTION] ALIAS Canonicalize a configuration name. Operation modes: -h, --help print this help, then exit -t, --time-stamp print date of last modification, then exit -v, --version print version number, then exit Report bugs and patches to ." version="\ GNU config.sub ($timestamp) Copyright 1992-2014 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." help=" Try \`$me --help' for more information." # Parse command line while test $# -gt 0 ; do case $1 in --time-stamp | --time* | -t ) echo "$timestamp" ; exit ;; --version | -v ) echo "$version" ; exit ;; --help | --h* | -h ) echo "$usage"; exit ;; -- ) # Stop option processing shift; break ;; - ) # Use stdin as input. break ;; -* ) echo "$me: invalid option $1$help" exit 1 ;; *local*) # First pass through any local machine types. echo $1 exit ;; * ) break ;; esac done case $# in 0) echo "$me: missing argument$help" >&2 exit 1;; 1) ;; *) echo "$me: too many arguments$help" >&2 exit 1;; esac # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). # Here we must recognize all the valid KERNEL-OS combinations. maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` case $maybe_os in nto-qnx* | linux-gnu* | linux-android* | linux-dietlibc | linux-newlib* | \ linux-musl* | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \ knetbsd*-gnu* | netbsd*-gnu* | \ kopensolaris*-gnu* | \ storm-chaos* | os2-emx* | rtmk-nova*) os=-$maybe_os basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` ;; android-linux) os=-linux-android basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`-unknown ;; *) basic_machine=`echo $1 | sed 's/-[^-]*$//'` if [ $basic_machine != $1 ] then os=`echo $1 | sed 's/.*-/-/'` else os=; fi ;; esac ### Let's recognize common machines as not being operating systems so ### that things like config.sub decstation-3100 work. We also ### recognize some manufacturers as not being operating systems, so we ### can provide default operating systems below. case $os in -sun*os*) # Prevent following clause from handling this invalid input. ;; -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ -apple | -axis | -knuth | -cray | -microblaze*) os= basic_machine=$1 ;; -bluegene*) os=-cnk ;; -sim | -cisco | -oki | -wec | -winbond) os= basic_machine=$1 ;; -scout) ;; -wrs) os=-vxworks basic_machine=$1 ;; -chorusos*) os=-chorusos basic_machine=$1 ;; -chorusrdb) os=-chorusrdb basic_machine=$1 ;; -hiux*) os=-hiuxwe2 ;; -sco6) os=-sco5v6 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco5) os=-sco3.2v5 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco4) os=-sco3.2v4 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2.[4-9]*) os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2v[4-9]*) # Don't forget version if it is 3.2v4 or newer. basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco5v6*) # Don't forget version if it is 3.2v4 or newer. basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco*) os=-sco3.2v2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -udk*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -isc) os=-isc2.2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -clix*) basic_machine=clipper-intergraph ;; -isc*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -lynx*178) os=-lynxos178 ;; -lynx*5) os=-lynxos5 ;; -lynx*) os=-lynxos ;; -ptx*) basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` ;; -windowsnt*) os=`echo $os | sed -e 's/windowsnt/winnt/'` ;; -psos*) os=-psos ;; -mint | -mint[0-9]*) basic_machine=m68k-atari os=-mint ;; esac # Decode aliases for certain CPU-COMPANY combinations. case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. 1750a | 580 \ | a29k \ | aarch64 | aarch64_be \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ | am33_2.0 \ | arc | arceb \ | arm | arm[bl]e | arme[lb] | armv[2-8] | armv[3-8][lb] | armv7[arm] \ | avr | avr32 \ | be32 | be64 \ | bfin \ | c4x | c8051 | clipper \ | d10v | d30v | dlx | dsp16xx \ | epiphany \ | fido | fr30 | frv \ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | hexagon \ | i370 | i860 | i960 | ia64 \ | ip2k | iq2000 \ | k1om \ | le32 | le64 \ | lm32 \ | m32c | m32r | m32rle | m68000 | m68k | m88k \ | maxq | mb | microblaze | microblazeel | mcore | mep | metag \ | mips | mipsbe | mipseb | mipsel | mipsle \ | mips16 \ | mips64 | mips64el \ | mips64octeon | mips64octeonel \ | mips64orion | mips64orionel \ | mips64r5900 | mips64r5900el \ | mips64vr | mips64vrel \ | mips64vr4100 | mips64vr4100el \ | mips64vr4300 | mips64vr4300el \ | mips64vr5000 | mips64vr5000el \ | mips64vr5900 | mips64vr5900el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa32r6 | mipsisa32r6el \ | mipsisa64 | mipsisa64el \ | mipsisa64r2 | mipsisa64r2el \ | mipsisa64r6 | mipsisa64r6el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipsr5900 | mipsr5900el \ | mipstx39 | mipstx39el \ | mn10200 | mn10300 \ | moxie \ | mt \ | msp430 \ | nds32 | nds32le | nds32be \ | nios | nios2 | nios2eb | nios2el \ | ns16k | ns32k \ | open8 | or1k | or1knd | or32 \ | pdp10 | pdp11 | pj | pjl \ | powerpc | powerpc64 | powerpc64le | powerpcle \ | pyramid \ | rl78 | rx \ | score \ | sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[34]eb | sheb | shbe | shle | sh[1234]le | sh3ele \ | sh64 | sh64le \ | sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \ | sparcv8 | sparcv9 | sparcv9b | sparcv9v \ | spu \ | tahoe | tic4x | tic54x | tic55x | tic6x | tic80 | tron \ | ubicom32 \ | v850 | v850e | v850e1 | v850e2 | v850es | v850e2v3 \ | we32k \ | x86 | xc16x | xstormy16 | xtensa \ | z8k | z80) basic_machine=$basic_machine-unknown ;; c54x) basic_machine=tic54x-unknown ;; c55x) basic_machine=tic55x-unknown ;; c6x) basic_machine=tic6x-unknown ;; m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | nvptx | picochip) basic_machine=$basic_machine-unknown os=-none ;; m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) ;; ms1) basic_machine=mt-unknown ;; strongarm | thumb | xscale) basic_machine=arm-unknown ;; xgate) basic_machine=$basic_machine-unknown os=-none ;; xscaleeb) basic_machine=armeb-unknown ;; xscaleel) basic_machine=armel-unknown ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and # (2) the word "unknown" tends to confuse beginning users. i*86 | x86_64) basic_machine=$basic_machine-pc ;; # Object if more than one company name word. *-*-*) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; # Recognize the basic CPU types with company name. 580-* \ | a29k-* \ | aarch64-* | aarch64_be-* \ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ | avr-* | avr32-* \ | be32-* | be64-* \ | bfin-* | bs2000-* \ | c[123]* | c30-* | [cjt]90-* | c4x-* \ | c8051-* | clipper-* | craynv-* | cydra-* \ | d10v-* | d30v-* | dlx-* \ | elxsi-* \ | f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \ | h8300-* | h8500-* \ | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ | hexagon-* \ | i*86-* | i860-* | i960-* | ia64-* \ | ip2k-* | iq2000-* \ | k1om-* \ | le32-* | le64-* \ | lm32-* \ | m32c-* | m32r-* | m32rle-* \ | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ | m88110-* | m88k-* | maxq-* | mcore-* | metag-* \ | microblaze-* | microblazeel-* \ | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ | mips16-* \ | mips64-* | mips64el-* \ | mips64octeon-* | mips64octeonel-* \ | mips64orion-* | mips64orionel-* \ | mips64r5900-* | mips64r5900el-* \ | mips64vr-* | mips64vrel-* \ | mips64vr4100-* | mips64vr4100el-* \ | mips64vr4300-* | mips64vr4300el-* \ | mips64vr5000-* | mips64vr5000el-* \ | mips64vr5900-* | mips64vr5900el-* \ | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa32r6-* | mipsisa32r6el-* \ | mipsisa64-* | mipsisa64el-* \ | mipsisa64r2-* | mipsisa64r2el-* \ | mipsisa64r6-* | mipsisa64r6el-* \ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipsr5900-* | mipsr5900el-* \ | mipstx39-* | mipstx39el-* \ | mmix-* \ | mt-* \ | msp430-* \ | nds32-* | nds32le-* | nds32be-* \ | nios-* | nios2-* | nios2eb-* | nios2el-* \ | none-* | np1-* | ns16k-* | ns32k-* \ | open8-* \ | or1k*-* \ | orion-* \ | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \ | pyramid-* \ | rl78-* | romp-* | rs6000-* | rx-* \ | sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \ | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ | sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \ | sparclite-* \ | sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | sv1-* | sx?-* \ | tahoe-* \ | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* \ | tile*-* \ | tron-* \ | ubicom32-* \ | v850-* | v850e-* | v850e1-* | v850es-* | v850e2-* | v850e2v3-* \ | vax-* \ | we32k-* \ | x86-* | x86_64-* | xc16x-* | xps100-* \ | xstormy16-* | xtensa*-* \ | ymp-* \ | z8k-* | z80-*) ;; # Recognize the basic CPU types without company name, with glob match. xtensa*) basic_machine=$basic_machine-unknown ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) basic_machine=i386-unknown os=-bsd ;; 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) basic_machine=m68000-att ;; 3b*) basic_machine=we32k-att ;; a29khif) basic_machine=a29k-amd os=-udi ;; abacus) basic_machine=abacus-unknown ;; adobe68k) basic_machine=m68010-adobe os=-scout ;; alliant | fx80) basic_machine=fx80-alliant ;; altos | altos3068) basic_machine=m68k-altos ;; am29k) basic_machine=a29k-none os=-bsd ;; amd64) basic_machine=x86_64-pc ;; amd64-*) basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; amdahl) basic_machine=580-amdahl os=-sysv ;; amiga | amiga-*) basic_machine=m68k-unknown ;; amigaos | amigados) basic_machine=m68k-unknown os=-amigaos ;; amigaunix | amix) basic_machine=m68k-unknown os=-sysv4 ;; apollo68) basic_machine=m68k-apollo os=-sysv ;; apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; aros) basic_machine=i386-pc os=-aros ;; aux) basic_machine=m68k-apple os=-aux ;; balance) basic_machine=ns32k-sequent os=-dynix ;; blackfin) basic_machine=bfin-unknown os=-linux ;; blackfin-*) basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; bluegene*) basic_machine=powerpc-ibm os=-cnk ;; c54x-*) basic_machine=tic54x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c55x-*) basic_machine=tic55x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c6x-*) basic_machine=tic6x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c90) basic_machine=c90-cray os=-unicos ;; cegcc) basic_machine=arm-unknown os=-cegcc ;; convex-c1) basic_machine=c1-convex os=-bsd ;; convex-c2) basic_machine=c2-convex os=-bsd ;; convex-c32) basic_machine=c32-convex os=-bsd ;; convex-c34) basic_machine=c34-convex os=-bsd ;; convex-c38) basic_machine=c38-convex os=-bsd ;; cray | j90) basic_machine=j90-cray os=-unicos ;; craynv) basic_machine=craynv-cray os=-unicosmp ;; cr16 | cr16-*) basic_machine=cr16-unknown os=-elf ;; crds | unos) basic_machine=m68k-crds ;; crisv32 | crisv32-* | etraxfs*) basic_machine=crisv32-axis ;; cris | cris-* | etrax*) basic_machine=cris-axis ;; crx) basic_machine=crx-unknown os=-elf ;; da30 | da30-*) basic_machine=m68k-da30 ;; decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) basic_machine=mips-dec ;; decsystem10* | dec10*) basic_machine=pdp10-dec os=-tops10 ;; decsystem20* | dec20*) basic_machine=pdp10-dec os=-tops20 ;; delta | 3300 | motorola-3300 | motorola-delta \ | 3300-motorola | delta-motorola) basic_machine=m68k-motorola ;; delta88) basic_machine=m88k-motorola os=-sysv3 ;; dicos) basic_machine=i686-pc os=-dicos ;; djgpp) basic_machine=i586-pc os=-msdosdjgpp ;; dpx20 | dpx20-*) basic_machine=rs6000-bull os=-bosx ;; dpx2* | dpx2*-bull) basic_machine=m68k-bull os=-sysv3 ;; ebmon29k) basic_machine=a29k-amd os=-ebmon ;; elxsi) basic_machine=elxsi-elxsi os=-bsd ;; encore | umax | mmax) basic_machine=ns32k-encore ;; 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Otherwise, code above # will signal an error saying that MANUFACTURER isn't an operating # system, and we'll never get to this point. case $basic_machine in score-*) os=-elf ;; spu-*) os=-elf ;; *-acorn) os=-riscix1.2 ;; arm*-rebel) os=-linux ;; arm*-semi) os=-aout ;; c4x-* | tic4x-*) os=-coff ;; c8051-*) os=-elf ;; hexagon-*) os=-elf ;; tic54x-*) os=-coff ;; tic55x-*) os=-coff ;; tic6x-*) os=-coff ;; # This must come before the *-dec entry. pdp10-*) os=-tops20 ;; pdp11-*) os=-none ;; *-dec | vax-*) os=-ultrix4.2 ;; m68*-apollo) os=-domain ;; i386-sun) os=-sunos4.0.2 ;; m68000-sun) os=-sunos3 ;; m68*-cisco) os=-aout ;; mep-*) os=-elf ;; mips*-cisco) os=-elf ;; mips*-*) os=-elf ;; or32-*) os=-coff ;; *-tti) # must be before sparc entry or we get the wrong os. os=-sysv3 ;; sparc-* | *-sun) os=-sunos4.1.1 ;; *-be) os=-beos ;; *-haiku) os=-haiku ;; *-ibm) os=-aix ;; *-knuth) os=-mmixware ;; *-wec) os=-proelf ;; *-winbond) os=-proelf ;; *-oki) os=-proelf ;; *-hp) os=-hpux ;; *-hitachi) os=-hiux ;; i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent) os=-sysv ;; *-cbm) os=-amigaos ;; *-dg) os=-dgux ;; *-dolphin) os=-sysv3 ;; m68k-ccur) os=-rtu ;; m88k-omron*) os=-luna ;; *-next ) os=-nextstep ;; *-sequent) os=-ptx ;; *-crds) os=-unos ;; *-ns) os=-genix ;; i370-*) os=-mvs ;; *-next) os=-nextstep3 ;; *-gould) os=-sysv ;; *-highlevel) os=-bsd ;; *-encore) os=-bsd ;; *-sgi) os=-irix ;; *-siemens) os=-sysv4 ;; *-masscomp) os=-rtu ;; f30[01]-fujitsu | f700-fujitsu) os=-uxpv ;; *-rom68k) os=-coff ;; *-*bug) os=-coff ;; *-apple) os=-macos ;; *-atari*) os=-mint ;; *) os=-none ;; esac fi # Here we handle the case where we know the os, and the CPU type, but not the # manufacturer. We pick the logical manufacturer. vendor=unknown case $basic_machine in *-unknown) case $os in -riscix*) vendor=acorn ;; -sunos*) vendor=sun ;; -cnk*|-aix*) vendor=ibm ;; -beos*) vendor=be ;; -hpux*) vendor=hp ;; -mpeix*) vendor=hp ;; -hiux*) vendor=hitachi ;; -unos*) vendor=crds ;; -dgux*) vendor=dg ;; -luna*) vendor=omron ;; -genix*) vendor=ns ;; -mvs* | -opened*) vendor=ibm ;; -os400*) vendor=ibm ;; -ptx*) vendor=sequent ;; -tpf*) vendor=ibm ;; -vxsim* | -vxworks* | -windiss*) vendor=wrs ;; -aux*) vendor=apple ;; -hms*) vendor=hitachi ;; -mpw* | -macos*) vendor=apple ;; -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) vendor=atari ;; -vos*) vendor=stratus ;; esac basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"` ;; esac echo $basic_machine$os exit # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "timestamp='" # time-stamp-format: "%:y-%02m-%02d" # time-stamp-end: "'" # End: oprofile-1.3.0/ChangeLog-20090000664000175000017500000003135012534404406012423 000000000000002009-12-07 Robert Richter * agents/Makefile.am: * configure.in: adding config option to disable oprofile user check 2009-11-25 Chen Jie * events/Makefile.am: * events/mips/loongson2/events: New File * events/mips/loongson2/unit_masks: New File * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: Add default event for loongson2 * libutil/op_cpufreq.c: Add freq estimation for high performance mips processors * utils/ophelp.c: Add support for ICT loongson2 2009-11-25 Maynard Johnson * configure.in: bump version in AM_INIT_AUTOMAKE to 0.9.7cvs 2009-11-24 Maynard Johnson * configure.in: bump version in AM_INIT_AUTOMAKE to 0.9.6 2009-10-29 William Cohen * daemon/opd_perfmon.c: Fix start-daemon problem on ia64 2009-10-29 Maynard Johnson * events/ppc64/power7/events: * events/ppc64/power7/event_mappings: Updates to POWER7 events and groups 2009-10-28 Maynard Johnson * doc/opreport.xsd: Fix up schema and bump version to match 2009-06-18 fix; other schema fixups for correctness and to facilitate XML document-to-schema validation works * libpp/xml_utils.cpp: bump schema version * libpp/format_output.cpp: * libpp/format_output.h: Fix regression in XML callgraph output caused by 2009-06-18 fix 2009-10-26 Robert Richter * doc/oprofile.1.in: fix user-space daemon logfile in man page 2009-10-26 Maynard Johnson * libutil++/bfd_support.cpp: * libutil++/bfd_support.h: Fix regression in handling separate debuginfo files 2009-10-23 Robert Richter * autogen.sh: create copies with libtoolize instead of symlinks 2009-10-23 Suravee Suthikulpanit * events/x86-64/family10/events: * events/x86-64/family10/unit_masks: Update events and unitmasks from publication 31116 revision 3.34 and fixes 2009-10-23 Maynard Johnson * README_PACKAGERS: Add mention of new opjitconv binary 2009-10-14 Maynard Johnson * agents/jvmpi/jvmpi_oprofile.cpp: Add extra #includes since new libstdc++ header files do not include standard C header files 2009-10-13 Maynard Johnson * utils/opcontrol: Remove incorrect redundant invocation of get_image_range 2009-10-09 Robert Richter * libop/op_xml_events.c: * libop/op_xml_out.c: * libop/op_xml_out.h: * libutil++/xml_output.cpp: fix buffer overflows in xml generator 2009-09-14 Suravee Suthikulpanit * utils/opcontrol: Fix timer mode 2009-09-08 Robert Richter * utils/opcontrol: fix deinit; kill daemon only if running to prevent unnecessary "Daemon not running" message 2009-09-08 Robert Richter * utils/opcontrol: fix help message 2009-09-04 Robert Richter * utils/opcontrol: Do stop only if enabled 2009-08-20 Suravee Suthikulpanit * libop/op_xml_events.c: * libop/op_xml_out.h: * libop/op_xml_out.c: Fix ophelp -X output for IBS events * utils/ophelp.c: Fix ophelp output for "counter:cpuid" and "ext:xxx" case. 2009-07-31 Maynard Johnson * configure.in: bump version in AM_INIT_AUTOMAKE to 0.9.6cvs 2009-07-31 Maynard Johnson * configure.in: bump version in AM_INIT_AUTOMAKE to 0.9.5 2009-07-31 Andi Kleen * events/i386/nehalem/events: Fix name of event 0xa7 2009-07-20 Jeffrey Yasskin * libutil++/bfd_support.h(find_nearest_line): * libutil++/bfd_support.cpp(find_nearest_line): * libutil++/op_bfd.h(op_bfd::get_linenr): * libutil++/op_bfd.cpp(op_bfd::get_linenr): Change the type of offset from unsigned int to bfd_vma to accommodate addresses above 4G 2009-07-17 Maynard Johnson * libutil++/bfd_support.cpp: Fix logic error from previous patch to this file 2009-07-14 Maynard Johnson * Makefile.am: Add ChangeLog-2008 to EXTRA_DIST 2009-07-10 Maynard Johnson * libpp/profile_spec.cpp: * pp/oparchive.cpp: * utils/opcontrol: Handle bad samples from kernel due to overflows 2009-06-29 Maynard Johnson * events/ppc64/power7/events: * events/ppc64/power7/event_mappings: Update to IBM POWER7 events and groups 2009-06-23 Maynard Johnson * libutil++/bfd_support.cpp: Discard symbols from sections that do not have SEC_LOAD flag set; this prevents issues with bogus symbol size computation, resulting in "samples_range(): start > end" message 2009-06-23 Maynard Johnson * libpp/profile_spec.cpp: * pp/common_option.cpp: Fix image-path option to be appended to archive path 2009-06-18 Maynard Johnson * libpp/format_output.h: * libpp/format_output.cpp: Make sure that all callgraph symbols are reported, even if 0 samples 2009-06-05 William Cohen * libutil++/bfd_support.cpp: Avoid calling bfd_find_nearest_line with NULL syms argument 2009-06-05 Andi Kleen * libop/op_events.h: (find_event_by_name): * libop/op_events.c: (find_event_by_name): Match unit mask. * libop/op_parse_event.c: (parse_events): Set unit_mask_valid * libop/op_parse_event.h: (parsed_eventd): Add unit_mask_valid * libop/tests/alloc_counter_tests.c: (do_test): * libop/tests/parse_event_tests.c: * daemon/opd_ibs: (ibs_parse_and_set_events): * gui/oprof_start.cpp (alloc_selected_events): * utils/ophelp.c: (resolve_events, show_unit_mask): Update find_event_by_name call. 2009-06-05 Andi Kleen * libop/tests/alloc_counter_tests.c: Don't use non existent unit masks in P4 counter tests. 2009-06-03 Suravee Suthikulpanit * events/x86-64/family10/events: * events/x86-64/family10/unit_masks: Update events and unitmasks for the AMD Six-core Opteron processor support from publication 31116 revision 3.28 2009-05-27 Suravee Suthikulpanit * utils/opcontrol: Fix IBS initialization 2009-05-27 Suravee Suthikulpanit * daemon/oprofiled.c: * daemon/opd_ext.c: Fix extended feature initialization 2009-05-27 Suravee Suthikulpanit * doc/oprofile.xml: * doc/internals.xml: Add Extended-Interface and IBS documentation, 2009-05-19 Andi Kleen * utils/ophelp.c: (cleanup) Fix cleanup crash. 2009-05-19 Andi Kleen * events/i386/atom/events: Use hardcoded counters. Readd UNHALTED_REFERENCE_CLOCK. * events/i386/nehalem/events: * events/i386/nehalem/unit_masks: Use hardcoded counters. Clarify CPU_CLOCKS_UNHALTED.REF_P 2009-05-19 Andi Kleen * libop/op_hw_specific.h: (arch_get_filter): Return -1 when CPUID is not available. 2009-05-18 Brian Bloniarz * libutil/op_file.c: Fix crash when chasing broken symlinks 2009-05-13 Maynard Johnson * pp/oparchive.cpp: Fixes for oparchive session-dir as reported in bugs 2646389 and 2646376 2009-05-13 Maynard Johnson * utils/opcontrol: Fix for session-dir setup, bug report 2646398 2009-05-13 Brian Bloniarz * utils/opcontrol: Replace bash built-in let with posix statements 2009-05-07 Andi Kleen * utils/ophelp.c: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * libop/op_hw_specific.h: Add workaround_nehalem_aaj79 * events/Makefile.am: * events/i386/atom/events: Add Atom support (New file) * events/i386/atom/unit_masks: Add Atom support (New file) * events/i386/nehalem/events: Add Nehalem support (New file) * events/i386/nehalem/unit_masks: Add Nehalem support (New file) * events/i386/core_i7/events: Add Core i7 support (New file) * events/i386/core_i7/unit_masks: Add Core i7 support (New file) 2009-05-07 Maynard Johnson * oprof-compat/events/Makefile.am: * oprof-compat/events/ppc64/ibm-compat-v1/event_mappings: (new) * oprof-compat/events/ppc64/ibm-compat-v1/events: (new) * oprof-compat/events/ppc64/ibm-compat-v1/unit_masks: (new) * oprof-compat/libop/op_cpu_type.c: * oprof-compat/libop/op_cpu_type.h: * oprof-compat/libop/op_events.c: * oprof-compat/utils/ophelp.c: Add support for IBM ppc64 architected events 2009-05-06 Andi Kleen * utils/ophelp.c: Use word wrap to output event descriptions 2009-05-01 Andi Kleen * events/i386/arch_perfmon/events: Update event names to conform to manual. 2009-05-01 Maynard Johnson * configure.in: * m4/binutils.m4: Workaround to make oprofile build on recent SUSE 2009-04-29 Andi Kleen * libop/op_events.c: Add support for include and unit mask merging statements in event files 2009-04-29 Andi Kleen * libop/op_events.c: Allow make check to accumulate some errors before exiting 2009-04-28 Maynard Johnson * events/Makefile.am: * events/ppc64/power7/event_mappings: (new) * events/ppc64/power7/events: (new) * events/ppc64/power7/unit_masks: (new) * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: Add support for IBM POWER7 processor 2009-04-22 Maynard Johnson * agents/jvmpi/jvmpi_oprofile.cpp: Change this file to use LGPL license to allow JVMPI agent library to link to non-GPL code 2009-04-17 Suravee Suthikulpanit * utils/opcontrol: Add IBS support, patch 4 of 4 2009-04-17 Suravee Suthikulpanit * pp/opannotate.cpp: Add IBS support, patch 3 of 4 2009-04-17 Suravee Suthikulpanit * events/x86-64/family10/events: * events/x86-64/family10/unit_masks: Add IBS support, patch 2 of 4 2009-04-17 Suravee Suthikulpanit * daemon/Makefile.am: * daemon/opd_extended.c: * daemon/opd_ibs.c: New File * daemon/opd_ibs.h: New File * daemon/opd_ibs_macro.h: New File * daemon/opd_ibs_trans.c: New File * daemon/opd_ibs_trans.h: New File * daemon/opd_interface.h: * daemon/opd_sfile.c: * daemon/opd_sfile.h: * daemon/opd_trans.c: * libdb/db_insert.c: * libdb/odb.h: Add IBS support, patch 1 of 4 2009-04-15 Maynard Johnson * libpp/xml_utils.cpp: Fix binary count total in XML output when using --separate=lib 2009-04-08 William Cohen * configure.in: Add check for basename declaration 2009-04-01 Suravee Suthikulpanit * daemon/Makefile.am: * daemon/opd_events.c: * daemon/opd_extended.h: New File * daemon/opd_extended.c: New File * daemon/opd_printf.h: * daemon/opd_sfile.h: * daemon/opd_sfile.c: * daemon/opd_stats.c: * daemon/opd_trans.h: * daemon/opd_trans.c: * daemon/oprofiled.c: * libop/op_events.h: * libop/op_events.c: * libop/op_alloc_counter.c: * utils/ophelp.c: Add Extended Feature Interface 2009-03-17 Suraveee Suthikulpanit * events/Makefile.am * events/x86-64/family11h/events: New event file * events/x86-64/family11h/unit_masks: New Unitmask file * libop/op_cpu_type.c: Adding family11h * libop/op_cpu_type.h: Adding family11h * libop/op_events.c: Adding family11h * utils/ophelp.c: Adding family11h and update documents 2009-03-17 Maynard Johnson * libop/op_allocate_counter.c: Make map_event_to_counter handle a non-native cpu_type 2009-03-05 Robert Richter * libutil++/bfd_support.cpp: suppress 'unused parameter' warning 2009-02-10 Maynard Johnson * libabi/tests/abi_test.cpp: * libregex/tests/java_test.cpp: * libregex/tests/regex_test.cpp: Use C++ style #includes for stdlib and string 2009-02-09 Kjetil Barvik * libabi/tests/abi_test.cpp: * libregex/tests/java_test.cpp: * libregex/tests/regex_test.cpp: * libutil/tests/file_tests.c: Fix gcc warnings 2009-02-06 Maynard Johnson * libutil++/bfd_support.cpp: * libutil++/bfd_support.h: * libutil++/op_bfd.cpp: Fixup debuginfo processing for ppc64 2009-02-03 Carl Love * utils/opcontrol: * doc/oprofile.xml: * events/ppc64/cell-be/events: * events/ppc64/cell-be/unit_masks: Added IBM CELL SPU event profiling support 2009-01-05 Maynard Johnson * m4/binutils.m4: Fix error in AC_CHECK_LIB action See ChangeLog-2008 for earlier changelogs. oprofile-1.3.0/libutil/0000775000175000017500000000000013323173527012007 500000000000000oprofile-1.3.0/libutil/op_fileio.h0000664000175000017500000000706212534404406014046 00000000000000/** * @file op_fileio.h * Reading from / writing to files * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_FILEIO_H #define OP_FILEIO_H #ifdef __cplusplus extern "C" { #endif #include "op_types.h" #include /** * op_try_open_file - open a file * @param name file name * @param mode mode string * * Open a file name. * Returns file handle or %NULL on failure. */ FILE * op_try_open_file(char const * name, char const * mode); /** * op_open_file - open a file * @param name file name * @param mode mode string * * Open a file name. * Failure to open is fatal. */ FILE * op_open_file(char const * name, char const * mode); /** * op_read_int_from_file - parse an ASCII value from a file into an integer * @param filename name of file to parse integer value from * @param fatal non-zero if any error must be fatal * * Reads an ASCII integer from the given file. If an error occur and fatal is * zero (u32)-1 is returned else the value read in is returned. */ u32 op_read_int_from_file(char const * filename, int fatal); /** * op_read_long_from_file - parse an ASCII value from a file into an unsigned long * @param filename name of file to parse value from * @param fatal non-zero if any error must be fatal * * Reads an ASCII unsigned long number from the given file. If an error occurs,and * the passed 'fatal' arg is zero, then (unsigned long)-1 is returned; else the * value read in is returned. */ unsigned long op_read_long_from_file(char const * filename, int fatal); /** * op_close_file - close a file * @param fp file pointer * * Closes a file pointer. A non-fatal * error message is produced if the * close fails. */ void op_close_file(FILE * fp); /** * op_write_file - write to a file * @param fp file pointer * @param buf buffer * @param size nr. of bytes to write * * Write size bytes of buffer buf to a file. * Failure is fatal. */ void op_write_file(FILE * fp, void const * buf, size_t size); /** * op_write_u32 - write four bytes to a file * @param fp file pointer * @param val value to write * * Write an unsigned four-byte value val to a file. * Failure is fatal. * * No byte-swapping is done. */ void op_write_u32(FILE * fp, u32 val); /** * op_write_u64 - write eight bytes to a file * @param fp file pointer * @param val value to write * * Write an unsigned eight-byte value val to a file. * Failure is fatal. * * No byte-swapping is done. */ void op_write_u64(FILE * fp, u64 val); /** * op_write_u8 - write a byte to a file * @param fp file pointer * @param val value to write * * Write an unsigned byte value val to a file. * Failure is fatal. */ void op_write_u8(FILE * fp, u8 val); /** * op_get_line - read an ASCII line from a file * @param fp file pointer * * Get a line of ASCII text from a file. The file is read * up to the first '\0' or '\n'. A trailing '\n' is deleted. * * Returns the dynamically-allocated string containing * that line. At the end of a file NULL will be returned. * be returned. * * The string returned must be free()d by the caller. * * getline() is not a proper solution to replace this function */ char * op_get_line(FILE * fp); /** * calc_crc32 * @param crc current value * @param buf pointer to buffer * @param len * * Returns current crc computed from the crc argument and the * characters in len characters in buf. */ unsigned long calc_crc32(unsigned long crc, unsigned char * buf, size_t len); #ifdef __cplusplus } #endif #endif /* OP_FILEIO_H */ oprofile-1.3.0/libutil/op_popt.c0000664000175000017500000000162212534404406013550 00000000000000/** * @file op_popt.c * Wrapper for libpopt - always use this rather * than popt.h * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "op_libiberty.h" #include "op_popt.h" poptContext op_poptGetContext(char const * name, int argc, char const ** argv, struct poptOption const * options, int flags) { poptContext optcon; int c; xmalloc_set_program_name(argv[0]); #ifdef CONST_POPT optcon = poptGetContext(name, argc, argv, options, flags); #else optcon = poptGetContext((char *)name, argc, (char **)argv, options, flags); #endif c = poptGetNextOpt(optcon); if (c < -1) { fprintf(stderr, "%s: %s: %s\n", argv[0], poptBadOption(optcon, POPT_BADOPTION_NOALIAS), poptStrerror(c)); poptPrintHelp(optcon, stderr, 0); exit(EXIT_FAILURE); } return optcon; } oprofile-1.3.0/libutil/op_libiberty.c0000664000175000017500000000126512534404406014556 00000000000000/** * @file op_libiberty.c * Wrapper for libiberty - always use this instead of * libiberty.h * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include "op_libiberty.h" #ifndef HAVE_XCALLOC /* some system have a valid libiberty without xcalloc */ void * xcalloc(size_t n_elem, size_t sz) { void * ptr = xmalloc(n_elem * sz); memset(ptr, '\0', n_elem * sz); return ptr; } #endif #ifndef HAVE_XMEMDUP void * xmemdup (void const * input, size_t copy_size, size_t alloc_size) { void * output = xcalloc(1, alloc_size); memcpy(output, input, copy_size); return output; } #endif oprofile-1.3.0/libutil/op_version.h0000664000175000017500000000062012534404406014255 00000000000000/** * @file op_version.h * output version string * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_VERSION_H #define OP_VERSION_H #ifdef __cplusplus extern "C" { #endif /** output the version string */ void show_version(char const * app_name); #ifdef __cplusplus } #endif #endif /* !OP_VERSION_H */ oprofile-1.3.0/libutil/op_get_time.c0000664000175000017500000000052312534404406014362 00000000000000/** * @file op_get_time.c * Get current time as a string * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include "op_get_time.h" #include char * op_get_time(void) { time_t t = time(NULL); if (t == -1) return ""; return ctime(&t); } oprofile-1.3.0/libutil/op_growable_buffer.h0000664000175000017500000000204212534404406015723 00000000000000/** * @file op_growable_buffer.h * a growable buffer interface * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef OP_GROWABLE_BUFFER_H #define OP_GROWABLE_BUFFER_H #include struct growable_buffer { void * p; size_t size; size_t max_size; }; /** * init_buffer - initialize an empty buffer * @param buffer the buffer to initialize * * init_buffer do not do any allocation, the first allocation will occur * when add_data() with a non zero len param will be called. */ void init_buffer(struct growable_buffer * buffer); /** * free_buffer - free the memory allocated for this buffer * @param buffer the buffer to free */ void free_buffer(struct growable_buffer * buffer); /** * add_data - add data to this buffer * @param b the buffer where to add data * @param data a pointer to the data to add * @param len number of byte to add to the buffer */ void add_data(struct growable_buffer * b, void const * data, size_t len); #endif /* !OP_GROWABLE_BUFFER_H */ oprofile-1.3.0/libutil/Makefile.am0000664000175000017500000000102312534404406013753 00000000000000SUBDIRS = . tests AM_CPPFLAGS=-I ${top_srcdir}/libop @OP_CPPFLAGS@ AM_CFLAGS = @OP_CFLAGS@ noinst_LIBRARIES = libutil.a libutil_a_SOURCES = \ op_deviceio.c \ op_lockfile.c \ op_file.c \ op_fileio.c \ op_get_time.c \ op_libiberty.c \ op_popt.c \ op_string.c \ op_cpufreq.c \ op_deviceio.h \ op_fileio.h \ op_libiberty.h \ op_lockfile.h \ op_types.h \ op_file.h \ op_get_time.h \ op_list.h \ op_popt.h \ op_string.h \ op_cpufreq.h \ op_version.c \ op_version.h \ op_growable_buffer.c \ op_growable_buffer.h oprofile-1.3.0/libutil/op_libiberty.h0000664000175000017500000000353712534404406014567 00000000000000/** * @file op_libiberty.h * Wrapper for libiberty - always use this instead of * libiberty.h * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_LIBIBERTY_H #define OP_LIBIBERTY_H #include #include "config.h" #ifdef MALLOC_ATTRIBUTE_OK #define OP_ATTRIB_MALLOC __attribute__((malloc)) #else #define OP_ATTRIB_MALLOC #endif #ifdef HAVE_LIBIBERTY_H #include #else #ifdef __cplusplus extern "C" { #endif /* some system have a libiberty.a but no libiberty.h so we must provide * ourself the missing proto */ #ifndef HAVE_LIBIBERTY_H /* Set the program name used by xmalloc. */ void xmalloc_set_program_name(char const *); /* Allocate memory without fail. If malloc fails, this will print a message to stderr (using the name set by xmalloc_set_program_name, if any) and then call xexit. */ void * xmalloc(size_t) OP_ATTRIB_MALLOC; /* Reallocate memory without fail. This works like xmalloc. Note, realloc type functions are not suitable for attribute malloc since they may return the same address across multiple calls. */ void * xrealloc(void *, size_t); /* Allocate memory without fail and set it to zero. This works like xmalloc */ void * xcalloc(size_t, size_t) OP_ATTRIB_MALLOC; /* Copy a string into a memory buffer without fail. */ char * xstrdup(char const *) OP_ATTRIB_MALLOC; /** * Duplicates a region of memory without fail. First, alloc_size bytes * are allocated, then copy_size bytes from input are copied into * it, and the new memory is returned. If fewer bytes are copied than were * allocated, the remaining memory is zeroed. */ void * xmemdup(void const *, size_t, size_t) OP_ATTRIB_MALLOC; #endif /* !HAVE_LIBIBERTY_H */ #ifdef __cplusplus } #endif #endif /* !HAVE_LIBIBERTY_H */ #endif /* OP_LIBIBERTY_H */ oprofile-1.3.0/libutil/op_string.h0000664000175000017500000000322612534404406014103 00000000000000/** * @file op_string.h * general purpose C string handling declarations. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_STRING_H #define OP_STRING_H #include #ifdef __cplusplus extern "C" { #endif /** * @param s: input string * @param len: len char to copy * * Allocate and copy len character from s to a newly allocated buffer then * append a '\0' terminator. Return the newly allocated string */ char * op_xstrndup(char const * s, size_t len); /** * @param s: string to hash * * Generate a hash code from a string */ size_t op_hash_string(char const * s); /** * @param str: string to test * @param prefix: prefix string * * return non zero if prefix parameters is a prefix of str */ int strisprefix(char const * str, char const * prefix); /** * @param c: input string * * return a pointer to the first location in c which is not a blank space * where blank space are in " \t\n" */ char const * skip_ws(char const * c); /** * @param c: input string * * return a pointer to the first location in c which is a blank space * where blank space are in " \t\n" */ char const * skip_nonws(char const * c); /** * @param c: input string * * return non zero if c string contains only blank space * where blank space are in " \t\n" */ int empty_line(char const * c); /** * @param c: input string * * return non zero if c string is a comment. Comment are lines with optional * blank space at left then a '#' character. Blank space are in " \t\n" */ int comment_line(char const * c); #ifdef __cplusplus } #endif #endif /* !OP_STRING_H */ oprofile-1.3.0/libutil/op_file.h0000664000175000017500000000610012534404406013506 00000000000000/** * @file op_file.h * Useful file management helpers * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_FILE_H #define OP_FILE_H #ifdef __cplusplus extern "C" { #endif #include /** * op_file_readable - is a file readable * @param file file name * * Return true if the given file is readable and regular. * * Beware of race conditions ! */ int op_file_readable(char const * file); /** * op_get_mtime - get mtime of file * @param file file name * * Returns the mtime of the given file or 0 on failure */ time_t op_get_mtime(char const * file); /** * create_dir - create a directory * @param dir the directory name to create * * Returns 0 on success. */ int create_dir(char const * dir); /** * create_path - create a path * @param path the path to create * * create directory for each dir components in path * the last path component is not considered as a directory * but as a filename * * Returns 0 on success. */ int create_path(char const * path); /** * Clients of get_matching_pathnames must provide their own implementation * of get_pathname_callback. */ typedef void (*get_pathname_callback)(char const * pathname, void * name_list); /* This enum is intended solely for the use of get_matching_pathnames(), * bit 0 is reserved for internal use..*/ enum recursion_type { NO_RECURSION = 2, MATCH_ANY_ENTRY_RECURSION = 4, MATCH_DIR_ONLY_RECURSION = 8, }; /** * @param name_list where to store result * @param get_pathname_callback client-provided callback function * @param base_dir directory from where lookup starts * @param filter a pathname filter * @param recursion recursion_type -- see above enum and following description: * NO_RECURSION: Find matching files from passed base_dir and call * get_pathname_callback to add entry to name_list to be returned. * MATCH_ANY_ENTRY_RECURSION: Starting at base_dir, for each entry in the * dir that matches the filter: if entry is of type 'dir', recurse; * else call get_pathname_callback to add entry to name_list to be * returned. * MATCH_DIR_ONLY_RECURSION: Starting at base_dir, if an entry in the * dir is of type 'dir' and its complete pathname contains a match to * the filter, call get_pathname_callback to add entry to name_list to * be returned; else recurse. * * Returns 0 on success. * * Return a list of pathnames under base_dir, filtered by filter and optionally * looking in sub-directory. See description above of the recursion_type * parameter for more details. * NOTE: For C clients: Your implementation of the get_pathname_callback * function will probably dynamically allocate storage for elements * added to name_list. If so, remember to free that memory when it's * no longer needed. */ int get_matching_pathnames(void * name_list, get_pathname_callback, char const * base_dir, char const * filter, enum recursion_type recursion); #ifdef __cplusplus } #endif #endif /* OP_FILE_H */ oprofile-1.3.0/libutil/op_lockfile.c0000664000175000017500000000177612534404406014370 00000000000000/** * @file op_lockfile.c * PID-based lockfile management * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include "op_lockfile.h" #include "op_file.h" #include #include #include #include #include static pid_t op_read_lock_file(char const * file) { FILE * fp; pid_t value; fp = fopen(file, "r"); if (fp == NULL) return 0; if (fscanf(fp, "%d", &value) != 1) { fclose(fp); return 0; } fclose(fp); return value; } int op_write_lock_file(char const * file) { FILE * fp; if (op_file_readable(file)) { pid_t pid = op_read_lock_file(file); /* FIXME: ESRCH vs. EPERM */ if (kill(pid, 0)) { int err = unlink(file); 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exit(EXIT_FAILURE); } int main() { if (!strisprefix("", "")) error("\"\" is not a prefix of \"\""); if (!strisprefix("a", "")) error("\"\" is not a prefix of a"); if (!strisprefix("a", "a")) error("a is not a prefix of a"); if (!strisprefix("aa", "a")) error("a is not a prefix of aa"); if (strisprefix("a", "b")) error("b is a prefix of a"); if (strcmp(skip_ws(""), "")) error("skip_ws of \"\" is not \"\""); if (strcmp(skip_ws("\na"), "a")) error("skip_ws of \\na is not a"); if (strcmp(skip_ws("\n\na"), "a")) error("skip_ws of \\n\\na is not a"); if (strcmp(skip_ws("\n a"), "a")) error("skip_ws of \\n a is not a"); if (strcmp(skip_ws("\n \ta"), "a")) error("skip_ws of \\n \\ta is not a"); if (strcmp(skip_ws("\n \t"), "")) error("skip_ws of \\n \\t is not \"\""); if (strcmp(skip_ws(" "), "")) error("skip_ws of \" \" is not \"\""); if (strcmp(skip_nonws(""), "")) error("skip_nonws of \"\" is not \"\""); if (strcmp(skip_nonws("a"), "")) error("skip_nonws of a is not \"\""); if (strcmp(skip_nonws("\n"), "\n")) error("skip_nonws of \\n is not \\n"); if (strcmp(skip_nonws(" "), " ")) error("skip_nonws of \" \" is not \" \""); if (strcmp(skip_nonws("\t"), "\t")) error("skip_nonws of \\t is not \\t"); if (strcmp(skip_nonws("a\n"), "\n")) error("skip_nonws of a\\n is not \\n"); if (strcmp(skip_nonws("ab"), "")) error("skip_nonws of ab is not \"\""); if (!empty_line("")) error("empty_line is false for \"\""); if (!empty_line("\n\t ")) error("empty_line is false for \"\\n\\n \""); if (!empty_line(" ")) error("empty_line is false for \" \""); if (empty_line("\r")) error("empty_line is true for \\r"); if (comment_line("")) error("comment_line is true for \"\""); if (comment_line("\n")) error("comment_line is true for \n"); if (!comment_line("#")) error("comment_line is false for #"); if (!comment_line(" #")) error("comment_line is false for \" #\""); /* this is what the spec says */ if (!comment_line("\n#")) error("comment_line is false for \\n#"); if (!comment_line("\t#")) error("comment_line is false for \\t#"); return EXIT_SUCCESS; } oprofile-1.3.0/libutil/tests/file_tests.c0000664000175000017500000000262212534404406015374 00000000000000/** * @file file_tests.c * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include "op_file.h" #include #include #include #include #include static char * tests[][2] = { { "/usr/bin/../bin", "/usr/bin" }, { "/../usr/bin/", "/usr/bin" }, { "/../../usr/bin/", "/usr/bin" }, { "/../../usr/bin/.", "/usr/bin" }, { "/../../usr/bin/./", "/usr/bin" }, { "/usr/./bin", "/usr/bin" }, { "/usr/././bin", "/usr/bin" }, { "/usr///", "/usr" }, { "../", "/" }, { "./", "/usr" }, { ".", "/usr" }, { "./../", "/" }, { "bin/../bin/../", "/usr" }, { "../../../../../", "/" }, { "/usr/bin/../../..", "/" }, { "/usr/bin/../../../", "/" }, { "././.", "/usr" }, /* POSIX namespace ignored by realpath(3) */ { "//", "/" }, { "//usr", "/usr" }, { "///", "/" }, { NULL, NULL }, }; int main(void) { char tmp[PATH_MAX]; size_t i = 0; if (chdir("/usr")) { fprintf(stderr, "chdir(\"/usr\") failed for %s\n", tests[i][0]); exit(EXIT_FAILURE); } while (tests[i][0]) { if (!realpath(tests[i][0], tmp)) { fprintf(stderr, "NULL return for %s\n", tests[i][0]); exit(EXIT_FAILURE); } if (strcmp(tmp, tests[i][1])) { fprintf(stderr, "%s does not match %s given %s\n", tmp, tests[i][1], tests[i][0]); exit(EXIT_FAILURE); } ++i; } return EXIT_SUCCESS; } oprofile-1.3.0/libutil/op_growable_buffer.c0000664000175000017500000000145512534404406015725 00000000000000/** * @file op_growable_buffer.c * a growable buffer implementation * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include "op_growable_buffer.h" #include "op_libiberty.h" #include #include void init_buffer(struct growable_buffer * b) { b->max_size = 0; b->size = 0; b->p = NULL; } void free_buffer(struct growable_buffer * b) { free(b->p); } static void grow_buffer(struct growable_buffer * b) { size_t new_size = (b->max_size + b->size) * 2; b->p = xrealloc(b->p, new_size); b->max_size = new_size; } void add_data(struct growable_buffer * b, void const * data, size_t len) { size_t old_size = b->size; b->size += len; if (b->size > b->max_size) grow_buffer(b); memcpy(b->p + old_size, data, len); } oprofile-1.3.0/libutil/op_cpufreq.h0000664000175000017500000000104512534404406014237 00000000000000/** * @file op_cpufreq.h * get cpu frequency declaration * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie * @author Suravee Suthikulpanit */ #ifndef OP_CPUFREQ_H #define OP_CPUFREQ_H #if defined(__cplusplus) extern "C" { #endif /* * return the estimated cpu frequency in Mhz, * return 0 if this information * is not avalaible e.g. sparc64 with a non SMP kernel */ double op_cpu_frequency(void); #if defined(__cplusplus) } #endif #endif /* !OP_CPUFREQ_H */ oprofile-1.3.0/libutil/op_fileio.c0000664000175000017500000001476312534404406014047 00000000000000/** * @file op_fileio.c * Reading from / writing to files * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include "op_fileio.h" #include "op_libiberty.h" #include #include #include static FILE * op_do_open_file(char const * name, char const * mode, int fatal) { FILE * fp; fp = fopen(name, mode); if (!fp) { if (fatal) { fprintf(stderr,"oprofiled:op_do_open_file: %s: %s", name, strerror(errno)); exit(EXIT_FAILURE); } } return fp; } FILE * op_try_open_file(char const * name, char const * mode) { return op_do_open_file(name, mode, 0); } FILE * op_open_file(char const * name, char const * mode) { return op_do_open_file(name, mode, 1); } void op_close_file(FILE * fp) { if (fclose(fp)) perror("oprofiled:op_close_file: "); } void op_write_file(FILE * fp, void const * buf, size_t size) { size_t written; if (size == 0) return; written = fwrite(buf, size, 1, fp); if (written != 1) { fprintf(stderr, "oprofiled:op_write_file: wrote less than expected: %lu bytes.\n", (unsigned long)size); exit(EXIT_FAILURE); } } void op_write_u8(FILE * fp, u8 val) { op_write_file(fp, &val, sizeof(val)); } void op_write_u32(FILE * fp, u32 val) { op_write_file(fp, &val, sizeof(val)); } void op_write_u64(FILE * fp, u64 val) { op_write_file(fp, &val, sizeof(val)); } unsigned long op_read_long_from_file(char const * filename, int fatal) { FILE * fp; unsigned long value; fp = fopen(filename, "r"); if (fp == NULL) { if (!fatal) return (unsigned long)-1; fprintf(stderr, "op_read_long_from_file: Failed to open %s, reason %s\n", filename, strerror(errno)); exit(EXIT_FAILURE); } if (fscanf(fp, "%lu", &value) != 1) { fclose(fp); if (!fatal) return (unsigned long)-1; fprintf(stderr, "op_read_long_from_file: Failed to convert contents of file %s to unsigned long\n", filename); exit(EXIT_FAILURE); } fclose(fp); return value; } u32 op_read_int_from_file(char const * filename, int fatal) { FILE * fp; u32 value; fp = fopen(filename, "r"); if (fp == NULL) { if (!fatal) return (u32)-1; fprintf(stderr, "op_read_int_from_file: Failed to open %s, reason %s\n", filename, strerror(errno)); exit(EXIT_FAILURE); } if (fscanf(fp, "%u", &value) != 1) { fclose(fp); if (!fatal) return (u32)-1; fprintf(stderr, "op_read_int_from_file: Failed to convert contents of file %s to integer\n", filename); exit(EXIT_FAILURE); } fclose(fp); return value; } char * op_get_line(FILE * fp) { char * buf; char * cp; int c; size_t max = 512; buf = xmalloc(max); cp = buf; while (1) { switch (c = getc(fp)) { case EOF: free(buf); return NULL; break; case '\n': case '\0': *cp = '\0'; return buf; break; default: *cp = (char)c; cp++; if (((size_t)(cp - buf)) == max) { buf = xrealloc(buf, max + 128); cp = buf + max; max += 128; } break; } } } /* FIXME the debug info stuff should be handled by binutils */ unsigned long calc_crc32(unsigned long crc, unsigned char * buf, size_t len) { static const unsigned long crc32_table[256] = { 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d }; unsigned char * end; crc = ~crc & 0xffffffff; for (end = buf + len; buf < end; ++buf) crc = crc32_table[(crc ^ *buf) & 0xff] ^ (crc >> 8); return ~crc & 0xffffffff; } oprofile-1.3.0/libutil/op_file.c0000664000175000017500000001056012534404406013506 00000000000000/** * @file op_file.c * Useful file management helpers * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include #include #include #include #include #include "op_file.h" #include "op_libiberty.h" int op_file_readable(char const * file) { struct stat st; return !stat(file, &st) && S_ISREG(st.st_mode) && !access(file, R_OK); } time_t op_get_mtime(char const * file) { struct stat st; if (stat(file, &st)) return 0; return st.st_mtime; } int create_dir(char const * dir) { if (mkdir(dir, 0755)) { /* FIXME: Does not verify existing is a dir */ if (errno == EEXIST) return 0; return errno; } return 0; } int create_path(char const * path) { int ret = 0; char * str = xstrdup(path); char * pos = str[0] == '/' ? str + 1 : str; for ( ; (pos = strchr(pos, '/')) != NULL; ++pos) { *pos = '\0'; ret = create_dir(str); *pos = '/'; if (ret) break; } free(str); return ret; } inline static int is_dot_or_dotdot(char const * name) { return name[0] == '.' && (name[1] == '\0' || (name[1] == '.' && name[2] == '\0')); } /* If non-null is returned, the caller is responsible for freeing * the memory allocated for the return value. */ static char * make_pathname_from_dirent(char const * basedir, struct dirent * ent, struct stat * st_buf) { int name_len; char * name; name_len = strlen(basedir) + strlen("/") + strlen(ent->d_name) + 1; name = xmalloc(name_len); sprintf(name, "%s/%s", basedir, ent->d_name); if (stat(name, st_buf) != 0) { struct stat lstat_buf; int err = errno; if (lstat(name, &lstat_buf) == 0 && S_ISLNK(lstat_buf.st_mode)) { // dangling symlink -- silently ignore } else { fprintf(stderr, "stat failed for %s (%s)\n", name, strerror(err)); } free(name); name = NULL; } return name; } int get_matching_pathnames(void * name_list, get_pathname_callback getpathname, char const * base_dir, char const * filter, enum recursion_type recursion) { /* The algorithm below depends on recursion type (of which there are 3) * and whether the current dirent matches the filter. There are 6 possible * different behaviors, which is why we define 6 case below in the switch * statement of the algorithm. Actually, when the recursion type is * MATCH_DIR_ONLY_RECURSION, the behavior is the same, whether or not the dir * entry matches the filter. However, the behavior of the recursion types * NO_RECURSION and MATCH_ANY_ENTRY_RECURSION do depend on the dir entry * filter match, so for simplicity, we perform this match for all recursion * types and logically OR the match result with the value of the passed * recursion_type. */ #define NO_MATCH 0 #define MATCH 1 DIR * dir; struct dirent * ent; struct stat stat_buffer; int match; char * name = NULL; if (!(dir = opendir(base_dir))) return -1; while ((ent = readdir(dir)) != 0) { if (is_dot_or_dotdot(ent->d_name)) continue; if (fnmatch(filter, ent->d_name, 0) == 0) match = 1; else match = 0; switch (recursion | match) { case NO_RECURSION + NO_MATCH: case MATCH_ANY_ENTRY_RECURSION + NO_MATCH: // nothing to do but continue the loop break; case NO_RECURSION + MATCH: getpathname(ent->d_name, name_list); break; case MATCH_ANY_ENTRY_RECURSION + MATCH: name = make_pathname_from_dirent(base_dir, ent, &stat_buffer); if (name) { if (S_ISDIR(stat_buffer.st_mode)) { get_matching_pathnames( name_list, getpathname, name, filter, recursion); } else { getpathname(name, name_list); } } free(name); break; case MATCH_DIR_ONLY_RECURSION + NO_MATCH: case MATCH_DIR_ONLY_RECURSION + MATCH: name = make_pathname_from_dirent(base_dir, ent, &stat_buffer); if (name && S_ISDIR(stat_buffer.st_mode)) { /* Check if full directory name contains * match to the filter; if so, add it to * name_list and quit; else, recurse. */ if (!fnmatch(filter, name, 0)) { getpathname(name, name_list); } else { get_matching_pathnames( name_list, getpathname, name, filter, recursion); } } free(name); break; } } closedir(dir); return 0; } oprofile-1.3.0/libutil/op_deviceio.h0000664000175000017500000000260112534404406014360 00000000000000/** * @file op_deviceio.h * Reading from a special device * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_DEVICEIO_H #define OP_DEVICEIO_H #ifdef __cplusplus extern "C" { #endif #include "op_types.h" #include /** * op_open_device - open a special char device for reading * @param name file name of device file * * Open the special file name. Returns the file descriptor * for the file or -1 on error. */ fd_t op_open_device(char const * name); /** * op_read_device - read from a special char device * @param devfd file descriptor of device * @param buf buffer * @param size size of buffer * * Read size bytes from a device into buffer buf. * A seek to the start of the device file is done first * then a read is requested in one go of size bytes. * * It is the caller's responsibility to do further op_read_device() * calls if the number of bytes read is not what is requested * (where this is applicable). * * The number of bytes read is returned, or a negative number * on failure (in which case errno will be set). If the call is * interrupted, then errno will be EINTR, and the client should * arrange for re-starting the read if necessary. */ ssize_t op_read_device(fd_t devfd, void * buf, size_t size); #ifdef __cplusplus } #endif #endif /* OP_DEVICEIO_H */ oprofile-1.3.0/libutil/op_version.c0000664000175000017500000000077012534404406014256 00000000000000/** * @file op_version.c * output version string * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "op_version.h" #include "config.h" void show_version(char const * app_name) { /* Do not change the version format: it is documented in html doc */ printf("%s: " PACKAGE " " VERSION " compiled on " __DATE__ " " __TIME__ "\n", app_name); exit(EXIT_SUCCESS); } oprofile-1.3.0/libutil/op_string.c0000664000175000017500000000165112534404406014076 00000000000000/** * @file op_string.c * general purpose C string handling implementation. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include "op_libiberty.h" char * op_xstrndup(char const * s, size_t len) { return xmemdup(s, len, len + 1); } size_t op_hash_string(char const * str) { size_t hash = 0; for (; *str; ++str) hash ^= (hash << 16) ^ (hash >> 8) ^ *str; return hash; } int strisprefix(char const * str, char const * prefix) { return strstr(str, prefix) == str; } char const * skip_ws(char const * c) { while (*c == ' ' || *c == '\t' || *c == '\n') ++c; return c; } char const * skip_nonws(char const * c) { while (*c && *c != ' ' && *c != '\t' && *c != '\n') ++c; return c; } int empty_line(char const * c) { return !*skip_ws(c); } int comment_line(char const * c) { return *skip_ws(c) == '#'; } oprofile-1.3.0/libutil/op_deviceio.c0000664000175000017500000000127112534404406014355 00000000000000/** * @file op_deviceio.c * Reading from a special device * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include "op_deviceio.h" #include #include #include #include #include #include fd_t op_open_device(char const * name) { return open(name, O_RDONLY); } ssize_t op_read_device(fd_t devfd, void * buf, size_t size) { ssize_t count; lseek(devfd, 0, SEEK_SET); count = read(devfd, buf, size); if (count < 0 && errno != EINTR && errno != EAGAIN) { perror("oprofiled:op_read_device: "); exit(EXIT_FAILURE); } return count; } oprofile-1.3.0/libutil/op_popt.h0000664000175000017500000000151212534404406013553 00000000000000/** * @file op_popt.h * Wrapper for libpopt - always use this rather * than popt.h * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_POPT_H #define OP_POPT_H #include // not in some versions of popt.h #ifndef POPT_TABLEEND #define POPT_TABLEEND { NULL, '\0', 0, 0, 0, NULL, NULL } #endif #ifdef __cplusplus extern "C" { #endif /** * op_poptGetContext - wrapper for popt * * Use this instead of poptGetContext to cope with * different popt versions. This also handle unrecognized * options. All error are fatal. */ poptContext op_poptGetContext(char const * name, int argc, char const ** argv, struct poptOption const * options, int flags); #ifdef __cplusplus } #endif #endif /* OP_POPT_H */ oprofile-1.3.0/libutil/op_list.h0000664000175000017500000001065212534404406013551 00000000000000/** * @file op_list.h * Kernel-style lists * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Linux kernel authors */ #ifndef OP_LIST_H #define OP_LIST_H /* * Simple doubly linked list implementation. * * Some of the internal functions ("__xxx") are useful when * manipulating whole lists rather than single entries, as * sometimes we already know the next/prev entries and we can * generate better code by using them directly rather than * using the generic single-entry routines. */ struct list_head { struct list_head * next, * prev; }; /** * list_init - init a new entry * @param ptr the list to init * * Init a list head to create an empty list from it */ static __inline__ void list_init(struct list_head * ptr) { ptr->next = ptr; ptr->prev = ptr; } /* * Insert a new entry between two known consecutive entries. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static __inline__ void __list_add(struct list_head * new_entry, struct list_head * prev, struct list_head * next) { next->prev = new_entry; new_entry->next = next; new_entry->prev = prev; prev->next = new_entry; } /** * list_add - add a new entry * @param new new entry to be added * @param head list head to add it after * * Insert a new entry after the specified head. * This is good for implementing stacks. */ static __inline__ void list_add(struct list_head * new_entry, struct list_head * head) { __list_add(new_entry, head, head->next); } /** * list_add_tail - add a new entry * @param new new entry to be added * @param head list head to add it before * * Insert a new entry before the specified head. * This is useful for implementing queues. */ static __inline__ void list_add_tail(struct list_head * new_entry, struct list_head * head) { __list_add(new_entry, head->prev, head); } /* * Delete a list entry by making the prev/next entries * point to each other. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static __inline__ void __list_del(struct list_head * prev, struct list_head * next) { next->prev = prev; prev->next = next; } /** * list_del - deletes entry from list. * @param entry the element to delete from the list. * Note: list_empty on entry does not return true after this, the entry is in an undefined state. */ static __inline__ void list_del(struct list_head * entry) { __list_del(entry->prev, entry->next); } /** * list_del_init - deletes entry from list and reinitialize it. * @param entry the element to delete from the list. */ static __inline__ void list_del_init(struct list_head * entry) { __list_del(entry->prev, entry->next); list_init(entry); } /** * list_empty - tests whether a list is empty * @param head the list to test. */ static __inline__ int list_empty(struct list_head const * head) { return head->next == head; } /** * list_splice - join two lists * @param list the new list to add. * @param head the place to add it in the first list. */ static __inline__ void list_splice(struct list_head * list, struct list_head * head) { struct list_head * first = list->next; if (first != list) { struct list_head * last = list->prev; struct list_head * at = head->next; first->prev = head; head->next = first; last->next = at; at->prev = last; } } /** * list_entry - get the struct for this entry * @param ptr the &struct list_head pointer. * @param type the type of the struct this is embedded in. * @param member the name of the list_struct within the struct. */ #define list_entry(ptr, type, member) \ ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member))) /** * list_for_each - iterate over a list * @param pos the &struct list_head to use as a loop counter. * @param head the head for your list. */ #define list_for_each(pos, head) \ for (pos = (head)->next; pos != (head); pos = pos->next) /** * list_for_each_safe - iterate over a list safe against removal of list entry * @param pos the &struct list_head to use as a loop counter. * @param n another &struct list_head to use as temporary storage * @param head the head for your list. */ #define list_for_each_safe(pos, n, head) \ for (pos = (head)->next, n = pos->next; pos != (head); \ pos = n, n = pos->next) #define LIST_HEAD_INIT(name) { &(name), &(name) } #define LIST_HEAD(name) struct list_head name = LIST_HEAD_INIT(name) #endif /* OP_LIST_H */ oprofile-1.3.0/libutil/op_cpufreq.c0000664000175000017500000000546012534404406014237 00000000000000/** * @file op_cpufreq.c * get cpu frequency definition * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie * @author Suravee Suthikulpanit */ #include #include #include "op_fileio.h" /* * Use frequency information from /proc/cpuinfo. This should be available in most case. * However, this number is the current cpu frequency which could be in the idle state. * We should actually report the max frequency because the cpu should switch into the * highest power state when running. */ static double op_cpu_freq_cpuinfo(void) { double fval = 0.0; unsigned long uval; char * line = NULL; FILE * fp = op_try_open_file("/proc/cpuinfo", "r"); if (!fp) return 0.0; while (1) { line = op_get_line(fp); if (!line) break; if (line[0] == '\0') { free(line); continue; } /* x86/parisc/ia64/x86_64 */ if (sscanf(line, "cpu MHz : %lf", &fval) == 1) break; /* ppc/ppc64 */ if (sscanf(line, "clock : %lfMHz", &fval) == 1) break; /* alpha */ if (sscanf(line, "cycle frequency [Hz] : %lu", &uval) == 1) { fval = uval / 1E6; break; } /* sparc64 if CONFIG_SMP only */ if (sscanf(line, "Cpu0ClkTck : %lx", &uval) == 1) { fval = uval / 1E6; break; } /* mips including loongson2 */ if (sscanf(line, "BogoMIPS : %lu", &uval) == 1) { fval = uval * 3 / 2; break; } /* s390 doesn't provide cpu freq, checked up to 2.6-test4 */ free(line); } if (line) free(line); op_close_file(fp); return fval; } /* * Use frequency information from /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq * This number is the maximum cpu frequency of the processor. */ static double op_cpu_freq_sys_devices(void) { double fval = 0.0; char * line = NULL; FILE * fp = op_try_open_file("/sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq", "r"); if (!fp) return 0.0; while (1) { line = op_get_line(fp); if (!line) break; if (line[0] == '\0') { free(line); continue; } if (sscanf(line, "%lf", &fval) == 1) break; free(line); } if (line) free(line); op_close_file(fp); /* Return the frequency in MHz. When the frequency is * printed it is assumed to be in units of MHz. */ return fval/1000; } double op_cpu_frequency(void) { /* * Typically, system changes the frequency scaling of the cpus * based on the workload. /proc/cpuinfo reports the current * frequency value which might not be at the maximum at the time * of query. Since cpu switch into running state with max frequency * when under workload, we should make sure to report the max frequency * value acquiring from /sys/devices when available. */ double freq = op_cpu_freq_sys_devices(); if (freq == 0) { freq = op_cpu_freq_cpuinfo(); } return freq; } oprofile-1.3.0/config.guess0000755000175000017500000012355012535323746012613 00000000000000#! /bin/sh # Attempt to guess a canonical system name. # Copyright 1992-2014 Free Software Foundation, Inc. timestamp='2014-03-23' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, see . # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that # program. This Exception is an additional permission under section 7 # of the GNU General Public License, version 3 ("GPLv3"). # # Originally written by Per Bothner. # # You can get the latest version of this script from: # http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD # # Please send patches with a ChangeLog entry to config-patches@gnu.org. me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] Output the configuration name of the system \`$me' is run on. Operation modes: -h, --help print this help, then exit -t, --time-stamp print date of last modification, then exit -v, --version print version number, then exit Report bugs and patches to ." version="\ GNU config.guess ($timestamp) Originally written by Per Bothner. Copyright 1992-2014 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." help=" Try \`$me --help' for more information." # Parse command line while test $# -gt 0 ; do case $1 in --time-stamp | --time* | -t ) echo "$timestamp" ; exit ;; --version | -v ) echo "$version" ; exit ;; --help | --h* | -h ) echo "$usage"; exit ;; -- ) # Stop option processing shift; break ;; - ) # Use stdin as input. break ;; -* ) echo "$me: invalid option $1$help" >&2 exit 1 ;; * ) break ;; esac done if test $# != 0; then echo "$me: too many arguments$help" >&2 exit 1 fi trap 'exit 1' 1 2 15 # CC_FOR_BUILD -- compiler used by this script. Note that the use of a # compiler to aid in system detection is discouraged as it requires # temporary files to be created and, as you can see below, it is a # headache to deal with in a portable fashion. # Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still # use `HOST_CC' if defined, but it is deprecated. # Portable tmp directory creation inspired by the Autoconf team. set_cc_for_build=' trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ; trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ; : ${TMPDIR=/tmp} ; { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } || { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } || { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ; dummy=$tmp/dummy ; tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ; case $CC_FOR_BUILD,$HOST_CC,$CC in ,,) echo "int x;" > $dummy.c ; for c in cc gcc c89 c99 ; do if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then CC_FOR_BUILD="$c"; break ; fi ; done ; if test x"$CC_FOR_BUILD" = x ; then CC_FOR_BUILD=no_compiler_found ; fi ;; ,,*) CC_FOR_BUILD=$CC ;; ,*,*) CC_FOR_BUILD=$HOST_CC ;; esac ; set_cc_for_build= ;' # This is needed to find uname on a Pyramid OSx when run in the BSD universe. # (ghazi@noc.rutgers.edu 1994-08-24) if (test -f /.attbin/uname) >/dev/null 2>&1 ; then PATH=$PATH:/.attbin ; export PATH fi UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown case "${UNAME_SYSTEM}" in Linux|GNU|GNU/*) # If the system lacks a compiler, then just pick glibc. # We could probably try harder. LIBC=gnu eval $set_cc_for_build cat <<-EOF > $dummy.c #include #if defined(__UCLIBC__) LIBC=uclibc #elif defined(__dietlibc__) LIBC=dietlibc #else LIBC=gnu #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC' | sed 's, ,,g'` ;; esac # Note: order is significant - the case branches are not exclusive. case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in *:NetBSD:*:*) # NetBSD (nbsd) targets should (where applicable) match one or # more of the tuples: *-*-netbsdelf*, *-*-netbsdaout*, # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently # switched to ELF, *-*-netbsd* would select the old # object file format. This provides both forward # compatibility and a consistent mechanism for selecting the # object file format. # # Note: NetBSD doesn't particularly care about the vendor # portion of the name. We always set it to "unknown". sysctl="sysctl -n hw.machine_arch" UNAME_MACHINE_ARCH=`(/sbin/$sysctl 2>/dev/null || \ /usr/sbin/$sysctl 2>/dev/null || echo unknown)` case "${UNAME_MACHINE_ARCH}" in armeb) machine=armeb-unknown ;; arm*) machine=arm-unknown ;; sh3el) machine=shl-unknown ;; sh3eb) machine=sh-unknown ;; sh5el) machine=sh5le-unknown ;; *) machine=${UNAME_MACHINE_ARCH}-unknown ;; esac # The Operating System including object format, if it has switched # to ELF recently, or will in the future. case "${UNAME_MACHINE_ARCH}" in arm*|i386|m68k|ns32k|sh3*|sparc|vax) eval $set_cc_for_build if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \ | grep -q __ELF__ then # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout). # Return netbsd for either. FIX? os=netbsd else os=netbsdelf fi ;; *) os=netbsd ;; esac # The OS release # Debian GNU/NetBSD machines have a different userland, and # thus, need a distinct triplet. However, they do not need # kernel version information, so it can be replaced with a # suitable tag, in the style of linux-gnu. case "${UNAME_VERSION}" in Debian*) release='-gnu' ;; *) release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` ;; esac # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: # contains redundant information, the shorter form: # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. echo "${machine}-${os}${release}" exit ;; *:Bitrig:*:*) UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'` echo ${UNAME_MACHINE_ARCH}-unknown-bitrig${UNAME_RELEASE} exit ;; *:OpenBSD:*:*) UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE} exit ;; *:ekkoBSD:*:*) echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} exit ;; *:SolidBSD:*:*) echo ${UNAME_MACHINE}-unknown-solidbsd${UNAME_RELEASE} exit ;; macppc:MirBSD:*:*) echo powerpc-unknown-mirbsd${UNAME_RELEASE} exit ;; *:MirBSD:*:*) echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE} exit ;; alpha:OSF1:*:*) case $UNAME_RELEASE in *4.0) UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` ;; *5.*) UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'` ;; esac # According to Compaq, /usr/sbin/psrinfo has been available on # OSF/1 and Tru64 systems produced since 1995. I hope that # covers most systems running today. This code pipes the CPU # types through head -n 1, so we only detect the type of CPU 0. ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` case "$ALPHA_CPU_TYPE" in "EV4 (21064)") UNAME_MACHINE="alpha" ;; "EV4.5 (21064)") UNAME_MACHINE="alpha" ;; "LCA4 (21066/21068)") UNAME_MACHINE="alpha" ;; "EV5 (21164)") UNAME_MACHINE="alphaev5" ;; "EV5.6 (21164A)") UNAME_MACHINE="alphaev56" ;; "EV5.6 (21164PC)") UNAME_MACHINE="alphapca56" ;; "EV5.7 (21164PC)") UNAME_MACHINE="alphapca57" ;; "EV6 (21264)") UNAME_MACHINE="alphaev6" ;; "EV6.7 (21264A)") UNAME_MACHINE="alphaev67" ;; "EV6.8CB (21264C)") UNAME_MACHINE="alphaev68" ;; "EV6.8AL (21264B)") UNAME_MACHINE="alphaev68" ;; "EV6.8CX (21264D)") UNAME_MACHINE="alphaev68" ;; "EV6.9A (21264/EV69A)") UNAME_MACHINE="alphaev69" ;; "EV7 (21364)") UNAME_MACHINE="alphaev7" ;; "EV7.9 (21364A)") UNAME_MACHINE="alphaev79" ;; esac # A Pn.n version is a patched version. # A Vn.n version is a released version. # A Tn.n version is a released field test version. # A Xn.n version is an unreleased experimental baselevel. # 1.2 uses "1.2" for uname -r. echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[PVTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` # Reset EXIT trap before exiting to avoid spurious non-zero exit code. exitcode=$? trap '' 0 exit $exitcode ;; Alpha\ *:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # Should we change UNAME_MACHINE based on the output of uname instead # of the specific Alpha model? echo alpha-pc-interix exit ;; 21064:Windows_NT:50:3) echo alpha-dec-winnt3.5 exit ;; Amiga*:UNIX_System_V:4.0:*) echo m68k-unknown-sysv4 exit ;; *:[Aa]miga[Oo][Ss]:*:*) echo ${UNAME_MACHINE}-unknown-amigaos exit ;; *:[Mm]orph[Oo][Ss]:*:*) echo ${UNAME_MACHINE}-unknown-morphos exit ;; *:OS/390:*:*) echo i370-ibm-openedition exit ;; *:z/VM:*:*) echo s390-ibm-zvmoe exit ;; *:OS400:*:*) echo powerpc-ibm-os400 exit ;; arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) echo arm-acorn-riscix${UNAME_RELEASE} exit ;; arm*:riscos:*:*|arm*:RISCOS:*:*) echo arm-unknown-riscos exit ;; SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) echo hppa1.1-hitachi-hiuxmpp exit ;; Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) # akee@wpdis03.wpafb.af.mil (Earle F. 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Hard to guess exactly what SunOS6 will be like, but # it's likely to be more like Solaris than SunOS4. echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; sun4*:SunOS:*:*) case "`/usr/bin/arch -k`" in Series*|S4*) UNAME_RELEASE=`uname -v` ;; esac # Japanese Language versions have a version number like `4.1.3-JL'. echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` exit ;; sun3*:SunOS:*:*) echo m68k-sun-sunos${UNAME_RELEASE} exit ;; sun*:*:4.2BSD:*) UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 case "`/bin/arch`" in sun3) echo m68k-sun-sunos${UNAME_RELEASE} ;; sun4) echo sparc-sun-sunos${UNAME_RELEASE} ;; esac exit ;; aushp:SunOS:*:*) echo sparc-auspex-sunos${UNAME_RELEASE} exit ;; # The situation for MiNT is a little confusing. The machine name # can be virtually everything (everything which is not # "atarist" or "atariste" at least should have a processor # > m68000). The system name ranges from "MiNT" over "FreeMiNT" # to the lowercase version "mint" (or "freemint"). Finally # the system name "TOS" denotes a system which is actually not # MiNT. But MiNT is downward compatible to TOS, so this should # be no problem. atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) echo m68k-milan-mint${UNAME_RELEASE} exit ;; hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) echo m68k-hades-mint${UNAME_RELEASE} exit ;; *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) echo m68k-unknown-mint${UNAME_RELEASE} exit ;; m68k:machten:*:*) echo m68k-apple-machten${UNAME_RELEASE} exit ;; powerpc:machten:*:*) echo powerpc-apple-machten${UNAME_RELEASE} exit ;; RISC*:Mach:*:*) echo mips-dec-mach_bsd4.3 exit ;; RISC*:ULTRIX:*:*) echo mips-dec-ultrix${UNAME_RELEASE} exit ;; VAX*:ULTRIX*:*:*) echo vax-dec-ultrix${UNAME_RELEASE} exit ;; 2020:CLIX:*:* | 2430:CLIX:*:*) echo clipper-intergraph-clix${UNAME_RELEASE} exit ;; mips:*:*:UMIPS | mips:*:*:RISCos) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #ifdef __cplusplus #include /* for printf() prototype */ int main (int argc, char *argv[]) { #else int main (argc, argv) int argc; char *argv[]; { #endif #if defined (host_mips) && defined (MIPSEB) #if defined (SYSTYPE_SYSV) printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_SVR4) printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); #endif #endif exit (-1); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` && SYSTEM_NAME=`$dummy $dummyarg` && { echo "$SYSTEM_NAME"; exit; } echo mips-mips-riscos${UNAME_RELEASE} exit ;; Motorola:PowerMAX_OS:*:*) echo powerpc-motorola-powermax exit ;; Motorola:*:4.3:PL8-*) echo powerpc-harris-powermax exit ;; Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) echo powerpc-harris-powermax exit ;; Night_Hawk:Power_UNIX:*:*) echo powerpc-harris-powerunix exit ;; m88k:CX/UX:7*:*) echo m88k-harris-cxux7 exit ;; m88k:*:4*:R4*) echo m88k-motorola-sysv4 exit ;; m88k:*:3*:R3*) echo m88k-motorola-sysv3 exit ;; AViiON:dgux:*:*) # DG/UX returns AViiON for all architectures UNAME_PROCESSOR=`/usr/bin/uname -p` if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] then if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ [ ${TARGET_BINARY_INTERFACE}x = x ] then echo m88k-dg-dgux${UNAME_RELEASE} else echo m88k-dg-dguxbcs${UNAME_RELEASE} fi else echo i586-dg-dgux${UNAME_RELEASE} fi exit ;; M88*:DolphinOS:*:*) # DolphinOS (SVR3) echo m88k-dolphin-sysv3 exit ;; M88*:*:R3*:*) # Delta 88k system running SVR3 echo m88k-motorola-sysv3 exit ;; XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) echo m88k-tektronix-sysv3 exit ;; Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) echo m68k-tektronix-bsd exit ;; *:IRIX*:*:*) echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` exit ;; ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' i*86:AIX:*:*) echo i386-ibm-aix exit ;; ia64:AIX:*:*) if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} exit ;; *:AIX:2:3) if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include main() { if (!__power_pc()) exit(1); puts("powerpc-ibm-aix3.2.5"); exit(0); } EOF if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` then echo "$SYSTEM_NAME" else echo rs6000-ibm-aix3.2.5 fi elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then echo rs6000-ibm-aix3.2.4 else echo rs6000-ibm-aix3.2 fi exit ;; *:AIX:*:[4567]) IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then IBM_ARCH=rs6000 else IBM_ARCH=powerpc fi if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${IBM_ARCH}-ibm-aix${IBM_REV} exit ;; *:AIX:*:*) echo rs6000-ibm-aix exit ;; ibmrt:4.4BSD:*|romp-ibm:BSD:*) echo romp-ibm-bsd4.4 exit ;; ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to exit ;; # report: romp-ibm BSD 4.3 *:BOSX:*:*) echo rs6000-bull-bosx exit ;; DPX/2?00:B.O.S.:*:*) echo m68k-bull-sysv3 exit ;; 9000/[34]??:4.3bsd:1.*:*) echo m68k-hp-bsd exit ;; hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) echo m68k-hp-bsd4.4 exit ;; 9000/[34678]??:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` case "${UNAME_MACHINE}" in 9000/31? ) HP_ARCH=m68000 ;; 9000/[34]?? ) HP_ARCH=m68k ;; 9000/[678][0-9][0-9]) if [ -x /usr/bin/getconf ]; then sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` case "${sc_cpu_version}" in 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 532) # CPU_PA_RISC2_0 case "${sc_kernel_bits}" in 32) HP_ARCH="hppa2.0n" ;; 64) HP_ARCH="hppa2.0w" ;; '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 esac ;; esac fi if [ "${HP_ARCH}" = "" ]; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #define _HPUX_SOURCE #include #include int main () { #if defined(_SC_KERNEL_BITS) long bits = sysconf(_SC_KERNEL_BITS); #endif long cpu = sysconf (_SC_CPU_VERSION); switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0"); break; case CPU_PA_RISC1_1: puts ("hppa1.1"); break; case CPU_PA_RISC2_0: #if defined(_SC_KERNEL_BITS) switch (bits) { case 64: puts ("hppa2.0w"); break; case 32: puts ("hppa2.0n"); break; default: puts ("hppa2.0"); break; } break; #else /* !defined(_SC_KERNEL_BITS) */ puts ("hppa2.0"); break; #endif default: puts ("hppa1.0"); break; } exit (0); } EOF (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` test -z "$HP_ARCH" && HP_ARCH=hppa fi ;; esac if [ ${HP_ARCH} = "hppa2.0w" ] then eval $set_cc_for_build # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler # generating 64-bit code. GNU and HP use different nomenclature: # # $ CC_FOR_BUILD=cc ./config.guess # => hppa2.0w-hp-hpux11.23 # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess # => hppa64-hp-hpux11.23 if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | grep -q __LP64__ then HP_ARCH="hppa2.0w" else HP_ARCH="hppa64" fi fi echo ${HP_ARCH}-hp-hpux${HPUX_REV} exit ;; ia64:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` echo ia64-hp-hpux${HPUX_REV} exit ;; 3050*:HI-UX:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include int main () { long cpu = sysconf (_SC_CPU_VERSION); /* The order matters, because CPU_IS_HP_MC68K erroneously returns true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct results, however. */ if (CPU_IS_PA_RISC (cpu)) { switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; default: puts ("hppa-hitachi-hiuxwe2"); break; } } else if (CPU_IS_HP_MC68K (cpu)) puts ("m68k-hitachi-hiuxwe2"); else puts ("unknown-hitachi-hiuxwe2"); exit (0); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && { echo "$SYSTEM_NAME"; exit; } echo unknown-hitachi-hiuxwe2 exit ;; 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) echo hppa1.1-hp-bsd exit ;; 9000/8??:4.3bsd:*:*) echo hppa1.0-hp-bsd exit ;; *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) echo hppa1.0-hp-mpeix exit ;; hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) echo hppa1.1-hp-osf exit ;; hp8??:OSF1:*:*) echo hppa1.0-hp-osf exit ;; i*86:OSF1:*:*) if [ -x /usr/sbin/sysversion ] ; then echo ${UNAME_MACHINE}-unknown-osf1mk else echo ${UNAME_MACHINE}-unknown-osf1 fi exit ;; parisc*:Lites*:*:*) echo hppa1.1-hp-lites exit ;; C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) echo c1-convex-bsd exit ;; C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit ;; C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) echo c34-convex-bsd exit ;; C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) echo c38-convex-bsd exit ;; C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) echo c4-convex-bsd exit ;; CRAY*Y-MP:*:*:*) echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*[A-Z]90:*:*:*) echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ -e 's/\.[^.]*$/.X/' exit ;; CRAY*TS:*:*:*) echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*T3E:*:*:*) echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*SV1:*:*:*) echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; *:UNICOS/mp:*:*) echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; 5000:UNIX_System_V:4.*:*) FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit ;; sparc*:BSD/OS:*:*) echo sparc-unknown-bsdi${UNAME_RELEASE} exit ;; *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit ;; *:FreeBSD:*:*) UNAME_PROCESSOR=`/usr/bin/uname -p` case ${UNAME_PROCESSOR} in amd64) echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; *) echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; esac exit ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin exit ;; *:MINGW64*:*) echo ${UNAME_MACHINE}-pc-mingw64 exit ;; *:MINGW*:*) echo ${UNAME_MACHINE}-pc-mingw32 exit ;; *:MSYS*:*) echo ${UNAME_MACHINE}-pc-msys exit ;; i*:windows32*:*) # uname -m includes "-pc" on this system. echo ${UNAME_MACHINE}-mingw32 exit ;; i*:PW*:*) echo ${UNAME_MACHINE}-pc-pw32 exit ;; *:Interix*:*) case ${UNAME_MACHINE} in x86) echo i586-pc-interix${UNAME_RELEASE} exit ;; authenticamd | genuineintel | EM64T) echo x86_64-unknown-interix${UNAME_RELEASE} exit ;; IA64) echo ia64-unknown-interix${UNAME_RELEASE} exit ;; esac ;; [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) echo i${UNAME_MACHINE}-pc-mks exit ;; 8664:Windows_NT:*) echo x86_64-pc-mks exit ;; i*:Windows_NT*:* | Pentium*:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we # UNAME_MACHINE based on the output of uname instead of i386? echo i586-pc-interix exit ;; i*:UWIN*:*) echo ${UNAME_MACHINE}-pc-uwin exit ;; amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) echo x86_64-unknown-cygwin exit ;; p*:CYGWIN*:*) echo powerpcle-unknown-cygwin exit ;; prep*:SunOS:5.*:*) echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; *:GNU:*:*) # the GNU system echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-${LIBC}`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` exit ;; *:GNU/*:*:*) # other systems with GNU libc and userland echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-${LIBC} exit ;; i*86:Minix:*:*) echo ${UNAME_MACHINE}-pc-minix exit ;; aarch64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; aarch64_be:Linux:*:*) UNAME_MACHINE=aarch64_be echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; alpha:Linux:*:*) case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in EV5) UNAME_MACHINE=alphaev5 ;; EV56) UNAME_MACHINE=alphaev56 ;; PCA56) UNAME_MACHINE=alphapca56 ;; PCA57) UNAME_MACHINE=alphapca56 ;; EV6) UNAME_MACHINE=alphaev6 ;; EV67) UNAME_MACHINE=alphaev67 ;; EV68*) UNAME_MACHINE=alphaev68 ;; esac objdump --private-headers /bin/sh | grep -q ld.so.1 if test "$?" = 0 ; then LIBC="gnulibc1" ; fi echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; arc:Linux:*:* | arceb:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; arm*:Linux:*:*) eval $set_cc_for_build if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ | grep -q __ARM_EABI__ then echo ${UNAME_MACHINE}-unknown-linux-${LIBC} else if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \ | grep -q __ARM_PCS_VFP then echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabi else echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabihf fi fi exit ;; avr32*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; cris:Linux:*:*) echo ${UNAME_MACHINE}-axis-linux-${LIBC} exit ;; crisv32:Linux:*:*) echo ${UNAME_MACHINE}-axis-linux-${LIBC} exit ;; frv:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; hexagon:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; i*86:Linux:*:*) echo ${UNAME_MACHINE}-pc-linux-${LIBC} exit ;; ia64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; m32r*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; m68*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; mips:Linux:*:* | mips64:Linux:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #undef CPU #undef ${UNAME_MACHINE} #undef ${UNAME_MACHINE}el #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) CPU=${UNAME_MACHINE}el #else #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) CPU=${UNAME_MACHINE} #else CPU= #endif #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'` test x"${CPU}" != x && { echo "${CPU}-unknown-linux-${LIBC}"; exit; } ;; openrisc*:Linux:*:*) echo or1k-unknown-linux-${LIBC} exit ;; or32:Linux:*:* | or1k*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; padre:Linux:*:*) echo sparc-unknown-linux-${LIBC} exit ;; parisc64:Linux:*:* | hppa64:Linux:*:*) echo hppa64-unknown-linux-${LIBC} exit ;; parisc:Linux:*:* | hppa:Linux:*:*) # Look for CPU level case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in PA7*) echo hppa1.1-unknown-linux-${LIBC} ;; PA8*) echo hppa2.0-unknown-linux-${LIBC} ;; *) echo hppa-unknown-linux-${LIBC} ;; esac exit ;; ppc64:Linux:*:*) echo powerpc64-unknown-linux-${LIBC} exit ;; ppc:Linux:*:*) echo powerpc-unknown-linux-${LIBC} exit ;; ppc64le:Linux:*:*) echo powerpc64le-unknown-linux-${LIBC} exit ;; ppcle:Linux:*:*) echo powerpcle-unknown-linux-${LIBC} exit ;; s390:Linux:*:* | s390x:Linux:*:*) echo ${UNAME_MACHINE}-ibm-linux-${LIBC} exit ;; sh64*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; sh*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; sparc:Linux:*:* | sparc64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; tile*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; vax:Linux:*:*) echo ${UNAME_MACHINE}-dec-linux-${LIBC} exit ;; x86_64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; xtensa*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; i*86:DYNIX/ptx:4*:*) # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. # earlier versions are messed up and put the nodename in both # sysname and nodename. echo i386-sequent-sysv4 exit ;; i*86:UNIX_SV:4.2MP:2.*) # Unixware is an offshoot of SVR4, but it has its own version # number series starting with 2... # I am not positive that other SVR4 systems won't match this, # I just have to hope. -- rms. # Use sysv4.2uw... so that sysv4* matches it. echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} exit ;; i*86:OS/2:*:*) # If we were able to find `uname', then EMX Unix compatibility # is probably installed. echo ${UNAME_MACHINE}-pc-os2-emx exit ;; i*86:XTS-300:*:STOP) echo ${UNAME_MACHINE}-unknown-stop exit ;; i*86:atheos:*:*) echo ${UNAME_MACHINE}-unknown-atheos exit ;; i*86:syllable:*:*) echo ${UNAME_MACHINE}-pc-syllable exit ;; i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.[02]*:*) echo i386-unknown-lynxos${UNAME_RELEASE} exit ;; i*86:*DOS:*:*) echo ${UNAME_MACHINE}-pc-msdosdjgpp exit ;; i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} else echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} fi exit ;; i*86:*:5:[678]*) # UnixWare 7.x, OpenUNIX and OpenServer 6. case `/bin/uname -X | grep "^Machine"` in *486*) UNAME_MACHINE=i486 ;; *Pentium) UNAME_MACHINE=i586 ;; *Pent*|*Celeron) UNAME_MACHINE=i686 ;; esac echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} exit ;; i*86:*:3.2:*) if test -f /usr/options/cb.name; then UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ && UNAME_MACHINE=i586 (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ && UNAME_MACHINE=i686 (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ && UNAME_MACHINE=i686 echo ${UNAME_MACHINE}-pc-sco$UNAME_REL else echo ${UNAME_MACHINE}-pc-sysv32 fi exit ;; pc:*:*:*) # Left here for compatibility: # uname -m prints for DJGPP always 'pc', but it prints nothing about # the processor, so we play safe by assuming i586. # Note: whatever this is, it MUST be the same as what config.sub # prints for the "djgpp" host, or else GDB configury will decide that # this is a cross-build. echo i586-pc-msdosdjgpp exit ;; Intel:Mach:3*:*) echo i386-pc-mach3 exit ;; paragon:*:*:*) echo i860-intel-osf1 exit ;; i860:*:4.*:*) # i860-SVR4 if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 else # Add other i860-SVR4 vendors below as they are discovered. echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 fi exit ;; mini*:CTIX:SYS*5:*) # "miniframe" echo m68010-convergent-sysv exit ;; mc68k:UNIX:SYSTEM5:3.51m) echo m68k-convergent-sysv exit ;; M680?0:D-NIX:5.3:*) echo m68k-diab-dnix exit ;; M68*:*:R3V[5678]*:*) test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) OS_REL='' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4; exit; } ;; NCR*:*:4.2:* | MPRAS*:*:4.2:*) OS_REL='.3' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) echo m68k-unknown-lynxos${UNAME_RELEASE} exit ;; mc68030:UNIX_System_V:4.*:*) echo m68k-atari-sysv4 exit ;; TSUNAMI:LynxOS:2.*:*) echo sparc-unknown-lynxos${UNAME_RELEASE} exit ;; rs6000:LynxOS:2.*:*) echo rs6000-unknown-lynxos${UNAME_RELEASE} exit ;; PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.[02]*:*) echo powerpc-unknown-lynxos${UNAME_RELEASE} exit ;; SM[BE]S:UNIX_SV:*:*) echo mips-dde-sysv${UNAME_RELEASE} exit ;; RM*:ReliantUNIX-*:*:*) echo mips-sni-sysv4 exit ;; RM*:SINIX-*:*:*) echo mips-sni-sysv4 exit ;; *:SINIX-*:*:*) if uname -p 2>/dev/null >/dev/null ; then UNAME_MACHINE=`(uname -p) 2>/dev/null` echo ${UNAME_MACHINE}-sni-sysv4 else echo ns32k-sni-sysv fi exit ;; PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort # says echo i586-unisys-sysv4 exit ;; *:UNIX_System_V:4*:FTX*) # From Gerald Hewes . # How about differentiating between stratus architectures? -djm echo hppa1.1-stratus-sysv4 exit ;; *:*:*:FTX*) # From seanf@swdc.stratus.com. echo i860-stratus-sysv4 exit ;; i*86:VOS:*:*) # From Paul.Green@stratus.com. echo ${UNAME_MACHINE}-stratus-vos exit ;; *:VOS:*:*) # From Paul.Green@stratus.com. echo hppa1.1-stratus-vos exit ;; mc68*:A/UX:*:*) echo m68k-apple-aux${UNAME_RELEASE} exit ;; news*:NEWS-OS:6*:*) echo mips-sony-newsos6 exit ;; R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) if [ -d /usr/nec ]; then echo mips-nec-sysv${UNAME_RELEASE} else echo mips-unknown-sysv${UNAME_RELEASE} fi exit ;; BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. echo powerpc-be-beos exit ;; BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. echo powerpc-apple-beos exit ;; BePC:BeOS:*:*) # BeOS running on Intel PC compatible. echo i586-pc-beos exit ;; BePC:Haiku:*:*) # Haiku running on Intel PC compatible. echo i586-pc-haiku exit ;; x86_64:Haiku:*:*) echo x86_64-unknown-haiku exit ;; SX-4:SUPER-UX:*:*) echo sx4-nec-superux${UNAME_RELEASE} exit ;; SX-5:SUPER-UX:*:*) echo sx5-nec-superux${UNAME_RELEASE} exit ;; SX-6:SUPER-UX:*:*) echo sx6-nec-superux${UNAME_RELEASE} exit ;; SX-7:SUPER-UX:*:*) echo sx7-nec-superux${UNAME_RELEASE} exit ;; SX-8:SUPER-UX:*:*) echo sx8-nec-superux${UNAME_RELEASE} exit ;; SX-8R:SUPER-UX:*:*) echo sx8r-nec-superux${UNAME_RELEASE} exit ;; Power*:Rhapsody:*:*) echo powerpc-apple-rhapsody${UNAME_RELEASE} exit ;; *:Rhapsody:*:*) echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} exit ;; *:Darwin:*:*) UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown eval $set_cc_for_build if test "$UNAME_PROCESSOR" = unknown ; then UNAME_PROCESSOR=powerpc fi if test `echo "$UNAME_RELEASE" | sed -e 's/\..*//'` -le 10 ; then if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \ (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \ grep IS_64BIT_ARCH >/dev/null then case $UNAME_PROCESSOR in i386) UNAME_PROCESSOR=x86_64 ;; powerpc) UNAME_PROCESSOR=powerpc64 ;; esac fi fi elif test "$UNAME_PROCESSOR" = i386 ; then # Avoid executing cc on OS X 10.9, as it ships with a stub # that puts up a graphical alert prompting to install # developer tools. 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If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License. 9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. 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It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. Copyright (C) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker. , 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. oprofile-1.3.0/events/0000775000175000017500000000000013323173530011641 500000000000000oprofile-1.3.0/events/arm/0000775000175000017500000000000013323173530012420 500000000000000oprofile-1.3.0/events/arm/armv7-scorpionmp/0000775000175000017500000000000013323173530015643 500000000000000oprofile-1.3.0/events/arm/armv7-scorpionmp/events0000664000175000017500000001600512534404406017016 00000000000000# ARM V7 events # From Scorpion Processor Family Programmer's Reference Manual (PRM) # include:arm/armv7-common event:0x4c counters:1,2,3,4 um:zero minimum:500 name:ICACHE_EXPL_INV : I-cache explicit invalidates event:0x4d counters:1,2,3,4 um:zero minimum:500 name:ICACHE_MISS : I-cache misses event:0x4e counters:1,2,3,4 um:zero minimum:500 name:ICACHE_ACCESS : I-cache accesses event:0x4f counters:1,2,3,4 um:zero minimum:500 name:ICACHE_CACHEREQ_L2 : I-cache cacheable requests to L2 event:0x50 counters:1,2,3,4 um:zero minimum:500 name:ICACHE_NOCACHE_L2 : I-cache non-cacheable requests to L2 event:0x51 counters:1,2,3,4 um:zero minimum:500 name:HIQUP_NOPED : Conditional instructions HIQUPs NOPed event:0x52 counters:1,2,3,4 um:zero minimum:500 name:DATA_ABORT : Interrupts and Exceptions Data Abort event:0x53 counters:1,2,3,4 um:zero minimum:500 name:IRQ : Interrupts and Exceptions IRQ event:0x54 counters:1,2,3,4 um:zero minimum:500 name:FIQ : Interrupts and Exceptions FIQ event:0x55 counters:1,2,3,4 um:zero minimum:500 name:ALL_EXCPT : Interrupts and Exceptions All interrupts event:0x56 counters:1,2,3,4 um:zero minimum:500 name:UNDEF : Interrupts and Exceptions Undefined event:0x57 counters:1,2,3,4 um:zero minimum:500 name:SVC : Interrupts and Exceptions SVC event:0x58 counters:1,2,3,4 um:zero minimum:500 name:SMC : Interrupts and Exceptions SMC event:0x59 counters:1,2,3,4 um:zero minimum:500 name:PREFETCH_ABORT : Interrupts and Exceptions Prefetch Abort event:0x5a counters:1,2,3,4 um:zero minimum:500 name:INDEX_CHECK : Interrupts and Exceptions Index Check event:0x5b counters:1,2,3,4 um:zero minimum:500 name:NULL_CHECK : Interrupts and Exceptions Null Check event:0x5c counters:1,2,3,4 um:zero minimum:500 name:EXPL_ICIALLU : I-cache and BTAC Invalidates Explicit ICIALLU event:0x5d counters:1,2,3,4 um:zero minimum:500 name:IMPL_ICIALLU : I-cache and BTAC Invalidates Implicit ICIALLU event:0x5e counters:1,2,3,4 um:zero minimum:500 name:NONICIALLU_BTAC_INV : I-cache and BTAC Invalidates Non-ICIALLU BTAC Invalidate event:0x5f counters:1,2,3,4 um:zero minimum:500 name:ICIMVAU_IMPL_ICIALLU : I-cache and BTAC Invalidates ICIMVAU-implied ICIALLU event:0x60 counters:1,2,3,4 um:zero minimum:500 name:SPIPE_ONLY_CYCLES : Issue S-pipe only issue cycles event:0x61 counters:1,2,3,4 um:zero minimum:500 name:XPIPE_ONLY_CYCLES : Issue X-pipe only issue cycles event:0x62 counters:1,2,3,4 um:zero minimum:500 name:DUAL_CYCLES : Issue dual issue cycles event:0x63 counters:1,2,3,4 um:zero minimum:500 name:DISPATCH_ANY_CYCLES : Dispatch any dispatch cycles event:0x64 counters:1,2,3,4 um:zero minimum:500 name:FIFO_FULLBLK_CMT : Commits Trace FIFO full Blk CMT event:0x65 counters:1,2,3,4 um:zero minimum:500 name:FAIL_COND_INST : Conditional instructions failing conditional instrs (excluding branches) event:0x66 counters:1,2,3,4 um:zero minimum:500 name:PASS_COND_INST : Conditional instructions passing conditional instrs (excluding branches) event:0x67 counters:1,2,3,4 um:zero minimum:500 name:ALLOW_VU_CLK : Unit Clock Gating Allow VU Clks event:0x68 counters:1,2,3,4 um:zero minimum:500 name:VU_IDLE : Unit Clock Gating VU Idle event:0x69 counters:1,2,3,4 um:zero minimum:500 name:ALLOW_L2_CLK : Unit Clock Gating Allow L2 Clks event:0x6a counters:1,2,3,4 um:zero minimum:500 name:L2_IDLE : Unit Clock Gating L2 Idle event:0x6b counters:1,2,3,4 um:zero minimum:500 name:DTLB_IMPL_INV_SCTLR_DACR : DTLB implicit invalidates writes to SCTLR and DACR event:0x6c counters:1,2,3,4 um:zero minimum:500 name:DTLB_EXPL_INV : DTLB explicit invalidates event:0x6d counters:1,2,3,4 um:zero minimum:500 name:DTLB_MISS : DTLB misses event:0x6e counters:1,2,3,4 um:zero minimum:500 name:DTLB_ACCESS : DTLB accesses event:0x6f counters:1,2,3,4 um:zero minimum:500 name:SCORPION_ITLB_MISS : ITLB misses event:0x70 counters:1,2,3,4 um:zero minimum:500 name:ITLB_IMPL_INV : ITLB implicit ITLB invalidates event:0x71 counters:1,2,3,4 um:zero minimum:500 name:ITLB_EXPL_INV : ITLB explicit ITLB invalidates event:0x72 counters:1,2,3,4 um:zero minimum:500 name:UTLB_D_MISS : UTLB d-side misses event:0x73 counters:1,2,3,4 um:zero minimum:500 name:UTLB_D_ACCESS : UTLB d-side accesses event:0x74 counters:1,2,3,4 um:zero minimum:500 name:UTLB_I_MISS : UTLB i-side misses event:0x75 counters:1,2,3,4 um:zero minimum:500 name:UTLB_I_ACCESS : UTLB i-side accesses event:0x76 counters:1,2,3,4 um:zero minimum:500 name:UTLB_INV_ASID : UTLB invalidate by ASID event:0x77 counters:1,2,3,4 um:zero minimum:500 name:UTLB_INV_MVA : UTLB invalidate by MVA event:0x78 counters:1,2,3,4 um:zero minimum:500 name:UTLB_INV_ALL : UTLB invalidate all event:0x79 counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_RDQ_UNAVAIL : S2 hold RDQ unavail event:0x7a counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD : S2 hold S2 hold event:0x7b counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_DEV_OP : S2 hold device op event:0x7c counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_ORDER : S2 hold strongly ordered op event:0x7d counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_BARRIER : S2 hold barrier event:0x7e counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VIU_DUAL_CYCLE : Scorpion VIU dual cycle event:0x7f counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VIU_SINGLE_CYCLE : Scorpion VIU single cycle event:0x80 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_WAR_STALL_CYCLES : Scorpion VX pipe WAR cycles event:0x81 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_WAW_STALL_CYCLES : Scorpion VX pipe WAW cycles event:0x82 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_RAW_STALL_CYCLES : Scorpion VX pipe RAW cycles event:0x83 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_LOAD_USE_STALL : Scorpion VX pipe load use stall event:0x84 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VS_PIPE_WAR_STALL_CYCLES : Scorpion VS pipe WAR stall cycles event:0x85 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VS_PIPE_WAW_STALL_CYCLES : Scorpion VS pipe WAW stall cycles event:0x86 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VS_PIPE_RAW_STALL_CYCLES : Scorpion VS pipe RAW stall cycles event:0x87 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_INV_OPERATION : Scorpion invalid operation exceptions event:0x88 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_DIV_BY_ZERO : Scorpion divide by zero exceptions event:0x89 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_COND_INST_FAIL_VX_PIPE : Scorpion conditional instruction fail VX pipe event:0x8a counters:1,2,3,4 um:zero minimum:500 name:SCORPION_COND_INST_FAIL_VS_PIPE : Scorpion conditional instruction fail VS pipe event:0x8b counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_OVERFLOW : Scorpion overflow exceptions event:0x8c counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_UNDERFLOW : Scorpion underflow exceptions event:0x8d counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_DENORM : Scorpion denorm exceptions event:0x8e counters:1,2,3,4 um:zero minimum:500 name:SCORPIONMP_NUM_BARRIERS : Barriers event:0x8f counters:1,2,3,4 um:zero minimum:500 name:SCORPIONMP_BARRIER_CYCLES : Barrier cycles oprofile-1.3.0/events/arm/armv7-scorpionmp/unit_masks0000664000175000017500000000013512534404406017664 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/xscale1/0000775000175000017500000000000013323173530013760 500000000000000oprofile-1.3.0/events/arm/xscale1/events0000664000175000017500000000460612534404406015137 00000000000000# XScale 1 events # event:0x00 counters:1,2 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x02 counters:1,2 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall occurs for due to data dependency event:0x03 counters:1,2 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x04 counters:1,2 um:zero minimum:500 name:DTLB_MISS : number of DTLB misses event:0x05 counters:1,2 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change event:0x06 counters:1,2 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted event:0x07 counters:1,2 um:zero minimum:500 name:INSN_EXECUTED : instruction executed event:0x08 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_FULL_STALL : cycles in stall due to full dcache event:0x09 counters:1,1 um:zero minimum:500 name:DCACHE_FULL_STALL_CNT : number of stalls due to dcache full condition event:0x0a counters:1,2 um:zero minimum:500 name:DCACHE_ACCESS : data cache access event:0x0b counters:1,2 um:zero minimum:500 name:DCACHE_MISS : data cache miss event:0x0c counters:1,2 um:zero minimum:500 name:DCACHE_WB : data cache writeback, 1 event for every half cacheline event:0x0d counters:1,2 um:zero minimum:500 name:PC_CHANGE : number of times the program counter was changed without a mode switch event:0x10 counters:1,2 um:zero minimum:500 name:BCU_REQUEST : number of time the BCU received a new memory request from the core event:0x11 counters:1,2 um:zero minimum:500 name:BCU_FULL : number of cycles the BCUs request queue is full event:0x12 counters:1,2 um:zero minimum:500 name:BCU_DRAIN : number of times the BCU queues were drained due to a Drain Write Buffer command or an I/O transaction on a non-cacheable and non-bufferable page event:0x14 counters:1,2 um:zero minimum:500 name:BCU_ECC_NO_ELOG : number of times the BCU detected an ECC error, but no ELOG register was available in which to log the error event:0x15 counters:1,2 um:zero minimum:500 name:BCU_1_BIT_ERR : number of times the BCU detected a 1-bit error while reading data from the bus event:0x16 counters:1,2 um:zero minimum:500 name:RMW : number of times an RMW cycle occurred due to narrow write on ECC-protected memory event:0xfe counters:0 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter oprofile-1.3.0/events/arm/xscale1/unit_masks0000664000175000017500000000013212534404406015776 00000000000000# XScale 1 possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv7-krait/0000775000175000017500000000000013323173530014564 500000000000000oprofile-1.3.0/events/arm/armv7-krait/events0000664000175000017500000000015612534404406015737 00000000000000# ARM V7 events # WARNING: just re-uses common ARM PMU codes as Stephen Boyd advised include:arm/armv7-common oprofile-1.3.0/events/arm/armv7-krait/unit_masks0000664000175000017500000000013512534404406016605 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv8-ca53/0000775000175000017500000000000013323173530014206 500000000000000oprofile-1.3.0/events/arm/armv8-ca53/events0000664000175000017500000000640512534404406015364 00000000000000# # Copyright (c) Red Hat, 2014. # Contributed by William Cohen # # ARM Cortex A53 events # From Cortex A53 TRM # include:arm/armv8-pmuv3-common event:0x60 um:zero minimum:10007 name:BUS_ACCESS_LD : Bus access - Read event:0x61 um:zero minimum:10007 name:BUS_ACCESS_ST : Bus access - Write event:0x7A um:zero minimum:10007 name:BR_INDIRECT_SPEC : Branch speculatively executed - Indirect branch event:0x86 um:zero minimum:10007 name:EXC_IRQ : Exception taken, IRQ event:0x87 um:zero minimum:10007 name:EXC_FIQ : Exception taken, FIQ event:0xC0 um:zero minimum:10007 name:EXT_MEM_REQ : External memory request event:0xC1 um:zero minimum:10007 name:EXT_MEM_REQ_NC : Non-cacheable external memory request event:0xC2 um:zero minimum:10007 name:PREFETCH_LINEFILL : Linefill because of prefetch event:0xC3 um:zero minimum:10007 name:PREFETCH_LINEFILL_DROP : Instruction Cache Throttle occurred event:0xC4 um:zero minimum:10007 name:READ_ALLOC_ENTER : Entering read allocate mode event:0xC5 um:zero minimum:10007 name:READ_ALLOC : Read allocate mode event:0xC6 um:zero minimum:10007 name:PRE_DECODE_ERR : Pre-decode error event:0xC7 um:zero minimum:10007 name:STALL_SB_FULL : Data Write operation that stalls the pipeline because the store buffer is full event:0xC8 um:zero minimum:10007 name:EXT_SNOOP : SCU Snooped data from another CPU for this CPU event:0xC9 um:zero minimum:10007 name:BR_COND : Conditional branch executed event:0xCA um:zero minimum:10007 name:BR_INDIRECT_MISPRED : Indirect branch mispredicted event:0xCB um:zero minimum:10007 name:BR_INDIRECT_MISPRED_ADDR : Indirect branch mispredicted because of address miscompare event:0xCC um:zero minimum:10007 name:BR_COND_MISPRED : Conditional branch mispredicted event:0xD0 um:zero minimum:10007 name:L1I_CACHE_ERR : L1 Instruction Cache (data or tag) memory error event:0xD1 um:zero minimum:10007 name:L1D_CACHE_ERR : L1 Data Cache (data, tag or dirty) memory error, correctable or non-correctable event:0xD2 um:zero minimum:10007 name:TLB_ERR : TLB memory error event:0xE0 um:zero minimum:10007 name:OTHER_IQ_DEP_STALL : Cycles that the DPU IQ is empty and that is not because of a recent micro-TLB miss, instruction cache miss or pre-decode error event:0xE1 um:zero minimum:10007 name:IC_DEP_STALL : Cycles the DPU IQ is empty and there is an instruction cache miss being processed event:0xE2 um:zero minimum:10007 name:IUTLB_DEP_STALL : Cycles the DPU IQ is empty and there is an instruction micro-TLB miss being processed event:0xE3 um:zero minimum:10007 name:DECODE_DEP_STALL : Cycles the DPU IQ is empty and there is a pre-decode error being processed event:0xE4 um:zero minimum:10007 name:OTHER_INTERLOCK_STALL : Cycles there is an interlock other than Advanced SIMD/Floating-point instructions or load/store instruction event:0xE5 um:zero minimum:10007 name:AGU_DEP_STALL : Cycles there is an interlock for a load/store instruction waiting for data to calculate the address in the AGU event:0xE6 um:zero minimum:10007 name:SIMD_DEP_STALL : Cycles there is an interlock for an Advanced SIMD/Floating-point operation. event:0xE7 um:zero minimum:10007 name:LD_DEP_STALL : Cycles there is a stall in the Wr stage because of a load miss event:0xE8 um:zero minimum:10007 name:ST_DEP_STALL : Cycles there is a stall in the Wr stage because of a store oprofile-1.3.0/events/arm/armv8-ca53/unit_masks0000664000175000017500000000007712534404406016234 00000000000000# ARMv8 Cortex A53 unit masks # include:arm/armv8-pmuv3-common oprofile-1.3.0/events/arm/armv7/0000775000175000017500000000000013323173530013454 500000000000000oprofile-1.3.0/events/arm/armv7/events0000664000175000017500000000705312534404406014632 00000000000000# ARM V7 events # From Cortex A8 DDI (ARM DDI 0344B, revision r1p1) # include:arm/armv7-common event:0x40 counters:1,2,3,4 um:zero minimum:500 name:WRITE_BUFFER_FULL : Any write buffer full cycle event:0x41 counters:1,2,3,4 um:zero minimum:500 name:L2_STORE_MERGED : Any store that is merged in L2 cache event:0x42 counters:1,2,3,4 um:zero minimum:500 name:L2_STORE_BUFF : Any bufferable store from load/store to L2 cache event:0x43 counters:1,2,3,4 um:zero minimum:500 name:L2_ACCESS : Any access to L2 cache event:0x44 counters:1,2,3,4 um:zero minimum:500 name:L2_CACH_MISS : Any cacheable miss in L2 cache event:0x45 counters:1,2,3,4 um:zero minimum:500 name:AXI_READ_CYCLES : Number of cycles for an active AXI read event:0x46 counters:1,2,3,4 um:zero minimum:500 name:AXI_WRITE_CYCLES : Number of cycles for an active AXI write event:0x47 counters:1,2,3,4 um:zero minimum:500 name:MEMORY_REPLAY : Any replay event in the memory subsystem event:0x48 counters:1,2,3,4 um:zero minimum:500 name:UNALIGNED_ACCESS_REPLAY : Unaligned access that causes a replay event:0x49 counters:1,2,3,4 um:zero minimum:500 name:L1_DATA_MISS : L1 data cache miss as a result of the hashing algorithm event:0x4A counters:1,2,3,4 um:zero minimum:500 name:L1_INST_MISS : L1 instruction cache miss as a result of the hashing algorithm event:0x4B counters:1,2,3,4 um:zero minimum:500 name:L1_DATA_COLORING : L1 data access in which a page coloring alias occurs event:0x4C counters:1,2,3,4 um:zero minimum:500 name:L1_NEON_DATA : NEON data access that hits L1 cache event:0x4D counters:1,2,3,4 um:zero minimum:500 name:L1_NEON_CACH_DATA : NEON cacheable data access that hits L1 cache event:0x4E counters:1,2,3,4 um:zero minimum:500 name:L2_NEON : L2 access as a result of NEON memory access event:0x4F counters:1,2,3,4 um:zero minimum:500 name:L2_NEON_HIT : Any NEON hit in L2 cache event:0x50 counters:1,2,3,4 um:zero minimum:500 name:L1_INST : Any L1 instruction cache access, excluding CP15 cache accesses event:0x51 counters:1,2,3,4 um:zero minimum:500 name:PC_RETURN_MIS_PRED : Return stack misprediction at return stack pop (incorrect target address) event:0x52 counters:1,2,3,4 um:zero minimum:500 name:PC_BRANCH_FAILED : Branch prediction misprediction event:0x53 counters:1,2,3,4 um:zero minimum:500 name:PC_BRANCH_TAKEN : Any predicted branch that is taken event:0x54 counters:1,2,3,4 um:zero minimum:500 name:PC_BRANCH_EXECUTED : Any taken branch that is executed event:0x55 counters:1,2,3,4 um:zero minimum:500 name:OP_EXECUTED : Number of operations executed (in instruction or mutli-cycle instruction) event:0x56 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_INST_STALL : Cycles where no instruction available event:0x57 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_INST : Number of instructions issued in a cycle event:0x58 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_NEON_DATA_STALL : Number of cycles the processor waits on MRC data from NEON event:0x59 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_NEON_INST_STALL : Number of cycles the processor waits on NEON instruction queue or NEON load queue event:0x5A counters:1,2,3,4 um:zero minimum:500 name:NEON_CYCLES : Number of cycles NEON and integer processors are not idle event:0x70 counters:1,2,3,4 um:zero minimum:500 name:PMU0_EVENTS : Number of events from external input source PMUEXTIN[0] event:0x71 counters:1,2,3,4 um:zero minimum:500 name:PMU1_EVENTS : Number of events from external input source PMUEXTIN[1] event:0x72 counters:1,2,3,4 um:zero minimum:500 name:PMU_EVENTS : Number of events from both external input sources PMUEXTIN[0] and PMUEXTIN[1] oprofile-1.3.0/events/arm/armv7/unit_masks0000664000175000017500000000013512534404406015475 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv6/0000775000175000017500000000000013323173530013453 500000000000000oprofile-1.3.0/events/arm/armv6/events0000664000175000017500000000421312534404406014624 00000000000000# ARM V6 events # event:0x00 counters:0,1 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x01 counters:0,1 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x02 counters:0,1 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall occurs for due to data dependency event:0x03 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of Instruction MicroTLB misses event:0x04 counters:0,1 um:zero minimum:500 name:DTLB_MISS : number of Data MicroTLB misses event:0x05 counters:0,1 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change event:0x06 counters:0,1 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted event:0x07 counters:0,1 um:zero minimum:500 name:INSN_EXECUTED : instructions executed event:0x09 counters:0,1 um:zero minimum:500 name:DCACHE_ACCESS : data cache access, cacheable locations event:0x0a counters:0,1 um:zero minimum:500 name:DCACHE_ACCESS_ALL : data cache access, all locations event:0x0b counters:0,1 um:zero minimum:500 name:DCACHE_MISS : data cache miss event:0x0c counters:0,1 um:zero minimum:500 name:DCACHE_WB : data cache writeback, 1 event for every half cacheline event:0x0d counters:0,1 um:zero minimum:500 name:PC_CHANGE : number of times the program counter was changed without a mode switch event:0x0f counters:0,1 um:zero minimum:500 name:TLB_MISS : Main TLB miss event:0x10 counters:0,1 um:zero minimum:500 name:EXP_EXTERNAL : Explict external data access event:0x11 counters:0,1 um:zero minimum:500 name:LSU_STALL : cycles stalled because Load Store request queque is full event:0x12 counters:0,1 um:zero minimum:500 name:WRITE_DRAIN : Times write buffer was drained event:0x20 counters:0,1 um:zero minimum:500 name:ETMEXTOUT0 : nuber of cycles ETMEXTOUT[0] signal was asserted event:0x21 counters:0,1 um:zero minimum:500 name:ETMEXTOUT1 : nuber of cycles ETMEXTOUT[1] signal was asserted event:0x22 counters:0,1 um:zero minimum:500 name:ETMEXTOUT_BOTH : nuber of cycles both ETMEXTOUT [0] and [1] were asserted * 2 event:0xff counters:0,1,2 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter oprofile-1.3.0/events/arm/armv6/unit_masks0000664000175000017500000000013412534404406015473 00000000000000# ARM V6 PMU possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv7-ca15/0000775000175000017500000000000013323173530014203 500000000000000oprofile-1.3.0/events/arm/armv7-ca15/events0000664000175000017500000001145712534404406015364 00000000000000# ARM Cortex A15 events # From Cortex A15 TRM # include:arm/armv7-common event:0x40 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_LD : Level 1 data cache access, read event:0x41 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_ST : Level 1 data cache access, write event:0x42 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_REFILL_LD : Level 1 data cache refill, read event:0x43 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_REFILL_ST : Level 1 data cache refill, write event:0x46 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_WB_VICTIM : Level 1 data cache write-back, victim event:0x47 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_WB_CLEAN : Level 1 data cache write-back, cleaning and coherency event:0x48 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_INVAL : Level 1 data cache invalidate event:0x4C counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_TLB_REFILL_LD : Level 1 data TLB refill, read event:0x4D counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_TLB_REFILL_ST : Level 1 data TLB refill, write event:0x50 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_LD : Level 2 data cache access, read event:0x52 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_ST : Level 2 data cache access, write event:0x52 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_REFILL_LD : Level 2 data cache refill, read event:0x53 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_REFILL_ST : Level 2 data cache refill, write event:0x56 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_WB_VICTIM : Level 2 data cache write-back, victim event:0x57 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_WB_CLEAN : Level 2 data cache write-back, cleaning and coherency event:0x58 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_INVAL : Level 2 data cache invalidate event:0x60 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_LD : Bus access, read event:0x61 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_ST : Bus access, write event:0x62 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_SHARED : Bus access, normal, cacheable, shareable event:0x63 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_NOT_SHARED : Bus access, not normal, cacheable, shareable event:0x64 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_NORMAL : Bus access, normal event:0x65 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_PERIPH : Bus access, peripheral event:0x66 counters:1,2,3,4,5,6 um:zero minimum:500 name:MEM_ACCESS_LD : Data memory access, read event:0x67 counters:1,2,3,4,5,6 um:zero minimum:500 name:MEM_ACCESS_ST : Data memory access, write event:0x68 counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_LD_SPEC : Unaligned access, read event:0x69 counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_ST_SPEC : Unaligned access, write event:0x6A counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_LDST_SPEC : Unaligned access event:0x6C counters:1,2,3,4,5,6 um:zero minimum:500 name:LDREX_SPEC : ldrex instruction speculatively executed event:0x6D counters:1,2,3,4,5,6 um:zero minimum:500 name:STREX_PASS_SPEC : strex instruction speculatively executed, pass event:0x6E counters:1,2,3,4,5,6 um:zero minimum:500 name:STREX_FAIL_SPEC : strex instruction speculatively executed, fail event:0x70 counters:1,2,3,4,5,6 um:zero minimum:500 name:LD_SPEC : Load instruction speculatively executed event:0x71 counters:1,2,3,4,5,6 um:zero minimum:500 name:ST_SPEC : Store instruction speculatively executed event:0x72 counters:1,2,3,4,5,6 um:zero minimum:500 name:LDST_SPEC : Load or store instruction speculatively executed event:0x73 counters:1,2,3,4,5,6 um:zero minimum:500 name:DP_SPEC : Integer data processing instruction speculatively executed event:0x74 counters:1,2,3,4,5,6 um:zero minimum:500 name:ASE_SPEC : Advanced SIMD extension instruction speculatively executed event:0x75 counters:1,2,3,4,5,6 um:zero minimum:500 name:VFP_SPEC : Floating-point extension instruction speculatively executed event:0x76 counters:1,2,3,4,5,6 um:zero minimum:500 name:PC_WRITE_SPEC : Software change of the PC instruction speculatively executed event:0x78 counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_IMMED_SPEC : Immediate branch instruction speculatively executed event:0x79 counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_RETURN_SPEC : Procedure return instruction speculatively executed event:0x7A counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_INDIRECT_SPEC : Indirect branch instruction speculatively executed event:0x7C counters:1,2,3,4,5,6 um:zero minimum:500 name:ISB_SPEC : ISB barrier instruction speculatively executed event:0x7D counters:1,2,3,4,5,6 um:zero minimum:500 name:DSB_SPEC : DSB barrier instruction speculatively executed event:0x7E counters:1,2,3,4,5,6 um:zero minimum:500 name:DMB_SPEC : DMB barrier instruction speculatively executed oprofile-1.3.0/events/arm/armv7-ca15/unit_masks0000664000175000017500000000013512534404406016224 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv8-ca57/0000775000175000017500000000000013323173530014212 500000000000000oprofile-1.3.0/events/arm/armv8-ca57/events0000664000175000017500000001300212534404406015357 00000000000000# # Copyright (c) Red Hat, 2014. # Contributed by William Cohen # # ARM Cortex A57 events # From Cortex A57 TRM # include:arm/armv8-pmuv3-common event:0x40 um:zero minimum:10007 name:L1D_CACHE_LD : Level 1 data cache access - Read event:0x41 um:zero minimum:10007 name:L1D_CACHE_ST : Level 1 data cache access - Write event:0x42 um:zero minimum:10007 name:L1D_CACHE_REFILL_LD : Level 1 data cache refill - Read event:0x43 um:zero minimum:10007 name:L1D_CACHE_REFILL_ST : Level 1 data cache refill - Write event:0x46 um:zero minimum:10007 name:L1D_CACHE_WB_VICTIM : Level 1 data cache Write-back - Victim event:0x47 um:zero minimum:10007 name:L1D_CACHE_WB_CLEAN : Level 1 data cache Write-back - Cleaning event:and coherency event:0x48 um:zero minimum:10007 name:L1D_CACHE_INVAL : Level 1 data cache invalidate event:0x4C um:zero minimum:10007 name:L1D_TLB_REFILL_LD : Level 1 data TLB refill - Read event:0x4D um:zero minimum:10007 name:L1D_TLB_REFILL_ST : Level 1 data TLB refill - Write event:0x50 um:zero minimum:10007 name:L2D_CACHE_LD : Level 2 data cache access - Read event:0x51 um:zero minimum:10007 name:L2D_CACHE_ST : Level 2 data cache access - Write event:0x52 um:zero minimum:10007 name:L2D_CACHE_REFILL_LD : Level 2 data cache refill - Read event:0x53 um:zero minimum:10007 name:L2D_CACHE_REFILL_ST : Level 2 data cache refill - Write event:0x56 um:zero minimum:10007 name:L2D_CACHE_WB_VICTIM : Level 2 data cache Write-back - Victim event:0x57 um:zero minimum:10007 name:L2D_CACHE_WB_CLEAN : Level 2 data cache Write-back - Cleaning and coherency event:0x58 um:zero minimum:10007 name:L2D_CACHE_INVAL : Level 2 data cache invalidate event:0x60 um:zero minimum:10007 name:BUS_ACCESS_LD : Bus access - Read event:0x61 um:zero minimum:10007 name:BUS_ACCESS_ST : Bus access - Write event:0x62 um:zero minimum:10007 name:BUS_ACCESS_SHARED : Bus access - Normal event:0x63 um:zero minimum:10007 name:BUS_ACCESS_NOT_SHARED : Bus access - Not normal event:0x64 um:zero minimum:10007 name:BUS_ACCESS_NORMAL : Bus access - Normal event:0x65 um:zero minimum:10007 name:BUS_ACCESS_PERIPH : Bus access - Peripheral event:0x66 um:zero minimum:10007 name:MEM_ACCESS_LD : Data memory access - Read event:0x67 um:zero minimum:10007 name:MEM_ACCESS_ST : Data memory access - Write event:0x68 um:zero minimum:10007 name:UNALIGNED_LD_SPEC : Unaligned access - Read event:0x69 um:zero minimum:10007 name:UNALIGNED_ST_SPEC : Unaligned access - Write event:0x6A um:zero minimum:10007 name:UNALIGNED_LDST_SPEC : Unaligned access event:0x6C um:zero minimum:10007 name:LDREX_SPEC : Exclusive operation speculatively executed - LDREX event:0x6D um:zero minimum:10007 name:STREX_PASS_SPEC : Exclusive instruction speculatively executed - STREX pass event:0x6E um:zero minimum:10007 name:STREX_FAIL_SPEC : Exclusive operation speculatively executed - STREX fail event:0x70 um:zero minimum:10007 name:LD_SPEC : Operation speculatively executed - Load event:0x71 um:zero minimum:10007 name:ST_SPEC : Operation speculatively executed - Store event:0x72 um:zero minimum:10007 name:LDST_SPEC : Operation speculatively executed - Load or store event:0x73 um:zero minimum:10007 name:DP_SPEC : Operation speculatively executed - Integer data processing event:0x74 um:zero minimum:10007 name:ASE_SPEC : Operation speculatively executed - Advanced SIMD event:0x75 um:zero minimum:10007 name:VFP_SPEC : Operation speculatively executed - VFP event:0x76 um:zero minimum:10007 name:PC_WRITE_SPEC : Operation speculatively executed - Software change of the PC event:0x77 um:zero minimum:10007 name:CRYPTO_SPEC : Operation speculatively executed, crypto data processing event:0x78 um:zero minimum:10007 name:BR_IMMED_SPEC : Branch speculatively executed - Immediate branch event:0x79 um:zero minimum:10007 name:BR_RETURN_SPEC : Branch speculatively executed - Procedure return event:0x7A um:zero minimum:10007 name:BR_INDIRECT_SPEC : Branch speculatively executed - Indirect branch event:0x7C um:zero minimum:10007 name:ISB_SPEC : Barrier speculatively executed - ISB event:0x7D um:zero minimum:10007 name:DSB_SPEC : Barrier speculatively executed - DSB event:0x7E um:zero minimum:10007 name:DMB_SPEC : Barrier speculatively executed - DMB event:0x81 um:zero minimum:10007 name:EXC_UNDEF : Exception taken, other synchronous event:0x82 um:zero minimum:10007 name:EXC_SVC : Exception taken, Supervisor Call event:0x83 um:zero minimum:10007 name:EXC_PABORT : Exception taken, Instruction Abort event:0x84 um:zero minimum:10007 name:EXC_DABORT : Exception taken, Data Abort or SError event:0x86 um:zero minimum:10007 name:EXC_IRQ : Exception taken, IRQ event:0x87 um:zero minimum:10007 name:EXC_FIQ : Exception taken, FIQ event:0x88 um:zero minimum:10007 name:EXC_SMC : Exception taken, Secure Monitor Call event:0x8A um:zero minimum:10007 name:EXC_HVC : Exception taken, Hypervisor Call event:0x8B um:zero minimum:10007 name:EXC_TRAP_PABORT : Exception taken, Instruction Abort not taken locally event:0x8C um:zero minimum:10007 name:EXC_TRAP_DABORT : Exception taken, Data Abort, or SError not taken locally event:0x8D um:zero minimum:10007 name:EXC_TRAP_OTHER : Exception taken – Other traps not taken locally event:0x8E um:zero minimum:10007 name:EXC_TRAP_IRQ : Exception taken, IRQ not taken locally event:0x8F um:zero minimum:10007 name:EXC_TRAP_FIQ : Exception taken, FIQ not taken locally event:0x90 um:zero minimum:10007 name:RC_LD_SPEC : Release consistency instruction speculatively executed – Load-Acquire event:0x91 um:zero minimum:10007 name:RC_ST_SPEC : Release consistency instruction speculatively executed – Store-Release oprofile-1.3.0/events/arm/armv8-ca57/unit_masks0000664000175000017500000000007712534404406016240 00000000000000# ARMv8 Cortex A57 unit masks # include:arm/armv8-pmuv3-common oprofile-1.3.0/events/arm/armv7-ca5/0000775000175000017500000000000013323173530014122 500000000000000oprofile-1.3.0/events/arm/armv7-ca5/events0000664000175000017500000000176512534404406015304 00000000000000# ARM Cortex A5 events # From Cortex A5 TRM # include:arm/armv7-common event:0x86 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_IRQ : IRQ exception taken event:0x87 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_FIQ : FIQ exception taken event:0xC0 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXT_MEM_REQ : External memory request event:0xC1 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXT_MEM_REQ_NC : Non-cacheable external memory request event:0xC2 counters:1,2,3,4,5,6 um:zero minimum:500 name:PREFETCH_LINEFILL : Linefill because of prefetch event:0xC3 counters:1,2,3,4,5,6 um:zero minimum:500 name:PREFETCH_LINEFILL_DROP : Prefetch linefill dropped event:0xC4 counters:1,2,3,4,5,6 um:zero minimum:500 name:READ_ALLOC_ENTER : Entering read allocate mode event:0xC5 counters:1,2,3,4,5,6 um:zero minimum:500 name:READ_ALLOC : Read allocate mode event:0xC9 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_SB_FULL : Data write operation that stalls the pipeline because the store buffer is full oprofile-1.3.0/events/arm/armv7-ca5/unit_masks0000664000175000017500000000013512534404406016143 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv7-ca17/0000775000175000017500000000000013323173530014205 500000000000000oprofile-1.3.0/events/arm/armv7-ca17/events0000664000175000017500000001603313124774026015365 00000000000000# ARM Cortex A17 events # From Cortex A17 TRM # include:arm/armv7-common event:0x40 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_LD : Level 1 data cache access, read event:0x41 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_ST : Level 1 data cache access, write event:0x50 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_LD : Level 2 data cache access, read event:0x51 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_ST : Level 2 data cache access, write event:0x56 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_WB_VICTIM : Level 2 data cache write-back, victim event:0x57 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_WB_CLEAN : Level 2 data cache write-back, cleaning and coherency event:0x58 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_INVAL : Level 2 data cache invalidate event:0x62 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_SHARED : Bus access, normal, cacheable, shareable event:0x63 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_NOT_SHARED : Bus access, not normal, cacheable, shareable event:0x64 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_NORMAL : Bus access, normal event:0x65 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_PERIPH : Bus access, peripheral event:0x66 counters:1,2,3,4,5,6 um:zero minimum:500 name:MEM_ACCESS_LD : Data memory access, read event:0x67 counters:1,2,3,4,5,6 um:zero minimum:500 name:MEM_ACCESS_ST : Data memory access, write event:0x68 counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_LD_SPEC : Unaligned access, read event:0x69 counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_ST_SPEC : Unaligned access, write event:0x6A counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_LDST_SPEC : Unaligned access event:0x6C counters:1,2,3,4,5,6 um:zero minimum:500 name:LDREX_SPEC : ldrex instruction speculatively executed event:0x6E counters:1,2,3,4,5,6 um:zero minimum:500 name:STREX_FAIL_SPEC : strex instruction speculatively executed, fail event:0x6F counters:1,2,3,4,5,6 um:zero minimum:500 name:STREX_SPEC : strex instruction speculatively executed event:0x70 counters:1,2,3,4,5,6 um:zero minimum:500 name:LD_SPEC : Load instruction speculatively executed event:0x71 counters:1,2,3,4,5,6 um:zero minimum:500 name:ST_SPEC : Store instruction speculatively executed event:0x72 counters:1,2,3,4,5,6 um:zero minimum:500 name:LDST_SPEC : Load or store instruction speculatively executed event:0x73 counters:1,2,3,4,5,6 um:zero minimum:500 name:DP_SPEC : Data processing instruction speculatively executed event:0x74 counters:1,2,3,4,5,6 um:zero minimum:500 name:ASE_SPEC : Advanced SIMD extension instruction speculatively executed event:0x75 counters:1,2,3,4,5,6 um:zero minimum:500 name:VFP_SPEC : Floating-point extension instruction speculatively executed event:0x76 counters:1,2,3,4,5,6 um:zero minimum:500 name:PC_WRITE_SPEC : Software change of the PC instruction speculatively executed event:0x78 counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_IMMED_SPEC : Immediate branch instruction speculatively executed event:0x79 counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_RETURN_SPEC : Procedure return instruction speculatively executed event:0x7A counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_INDIRECT_SPEC : Indirect branch instruction speculatively executed event:0x7C counters:1,2,3,4,5,6 um:zero minimum:500 name:ISB_SPEC : ISB barrier instruction speculatively executed event:0x7D counters:1,2,3,4,5,6 um:zero minimum:500 name:DSB_SPEC : DSB barrier instruction speculatively executed event:0x7E counters:1,2,3,4,5,6 um:zero minimum:500 name:DMB_SPEC : DMB barrier instruction speculatively executed event:0x81 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_UNDEF : Exception taken, Undefined Instruction event:0x8A counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_HVC : Exception taken, Hypervisor Call event:0xC0 counters:1,2,3,4,5,6 um:zero minimum:500 name:LF_STALL : Linefill caused an instruction side stall event:0xC1 counters:1,2,3,4,5,6 um:zero minimum:500 name:PTW_STALL : Translation table walk caused an instruction side stall event:0xC2 counters:1,2,3,4,5,6 um:zero minimum:500 name:I_TAG_RAM_RD : Number of set of 4 ways read in the instruction cache - Tag RAM event:0xC3 counters:1,2,3,4,5,6 um:zero minimum:500 name:I_DATA_RAM_RD : Number of ways read in the instruction cache - Data RAM event:0xC4 counters:1,2,3,4,5,6 um:zero minimum:500 name:I_BTAC_RAM_RD : Number of ways read in the instruction BTAC RAM event:0xCA counters:1,2,3,4,5,6 um:zero minimum:500 name:DATA_SNOOP : Data snooped from other processor event:0xD3 counters:1,2,3,4,5,6 um:zero minimum:500 name:D_LSU_SLOT_FULL : Duration during which all slots in the Load-Store Unit are busy event:0xD8 counters:1,2,3,4,5,6 um:zero minimum:500 name:LS_IQ_FULL : Duration during which all slots in the Load-Store Issue queue are busy event:0xD9 counters:1,2,3,4,5,6 um:zero minimum:500 name:DP_IQ_FULL : Duration during which all slots in the Data Processing issue queue are busy. event:0xDA counters:1,2,3,4,5,6 um:zero minimum:500 name:DE_IQ_FULL : Duration during which all slots in the Data Engine issue queue are busy event:0xDB counters:1,2,3,4,5,6 um:zero minimum:500 name:FLUSH_DE_NEON : Number of NEON instruction which fail their condition code and lead to a flush of the DE pipe event:0xDC counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_TRAP_HYP : Number of Trap to hypervisor event:0xDE counters:1,2,3,4,5,6 um:zero minimum:500 name:ETM_EXT_OUT0 : PTM EXTOUT 0 event:0xDF counters:1,2,3,4,5,6 um:zero minimum:500 name:ETM_EXT_OUT1 : PTM EXTOUT 1 event:0xE0 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW : Duration during which the MMU handle a translation table walk. event:0xE1 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW_ST1 : Duration during which the MMU handle a Stage1 translation table walk event:0xE2 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW_ST2 : Duration during which the MMU handle a Stage2 translation table walk event:0xE3 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW_LSU : Duration during which the MMU handle a translation table walk requested by the Load Store Unit event:0xE4 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW_ISIDE : Duration during which the MMU handle a translation table walk requested by the Instruction side event:0xE5 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW_PLD : Duration during which the MMU handle a translation table walk requested by a Preload instruction or Prefetch request event:0xE6 counters:1,2,3,4,5,6 um:zero minimum:500 name:MMU_PTW_CP15 : Duration during which the MMU handle a translation table walk requested by a CP15 operation event:0xE7 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLD_UTLB_REFILL : Level 1 PLD TLB refill event:0xE8 counters:1,2,3,4,5,6 um:zero minimum:500 name:CP15_UTLB_REFILL : Level 1 CP15 TLB refil event:0xE9 counters:1,2,3,4,5,6 um:zero minimum:500 name:UTLB_FLUSH : Level 1 TLB flus event:0xEA counters:1,2,3,4,5,6 um:zero minimum:500 name:TLB_ACCESS : Level 2 TLB access event:0xEB counters:1,2,3,4,5,6 um:zero minimum:500 name:TLB_MISS : Level 2 TLB miss oprofile-1.3.0/events/arm/armv7-ca17/unit_masks0000664000175000017500000000013513124774026016232 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv8-xgene/0000775000175000017500000000000013323173530014561 500000000000000oprofile-1.3.0/events/arm/armv8-xgene/events0000664000175000017500000002433312741227556015750 00000000000000# # Copyright (c) Red Hat, 2014. # Contributed by William Cohen # # Applied Micro X-Gene events # # The X-Gene processor excludes a few of the basic ARMv8 architected events. # Thus, need to explicitly list them rather than include # arm/armv8-pmuv3-common # The basic ARMv8 architect events supported by X-Gene event:0x00 um:zero minimum:500 name:SW_INCR : Instruction architecturally executed, condition code check pass, software increment event:0x01 um:zero minimum:5000 name:L1I_CACHE_REFILL : Level 1 instruction cache refill event:0x02 um:zero minimum:5000 name:L1I_TLB_REFILL : Level 1 instruction TLB refill event:0x03 um:zero minimum:5000 name:L1D_CACHE_REFILL : Level 1 data cache refill event:0x04 um:zero minimum:5000 name:L1D_CACHE : Level 1 data cache access event:0x05 um:zero minimum:5000 name:L1D_TLB_REFILL : Level 1 data TLB refill # event:0x06 um:zero minimum:100000 name:LD_RETIRED : Instruction architecturally executed, condition code check pass, load # event:0x07 um:zero minimum:100000 name:ST_RETIRED : Instruction architecturally executed, condition code check pass, store event:0x08 um:zero minimum:100000 name:INST_RETIRED : Instruction architecturally executed event:0x09 um:zero minimum:500 name:EXC_TAKEN : Exception taken event:0x0A um:zero minimum:500 name:EXC_RETURN : Instruction architecturally executed, condition code check pass, exception return event:0x0B um:zero minimum:500 name:CID_WRITE_RETIRED : Instruction architecturally executed, condition code check pass, write to CONTEXTIDR # event:0x0C um:zero minimum:5000 name:PC_WRITE_RETIRED : Instruction architecturally executed, condition code check pass, software change of the PC # event:0x0D um:zero minimum:5000 name:BR_IMMED_RETIRED : Instruction architecturally executed, immediate branch # event:0x0E um:zero minimum:5000 name:BR_RETURN_RETIRED : Instruction architecturally executed, condition code check pass, procedure return # event:0x0F um:zero minimum:500 name:UNALIGNED_LDST_RETIRED : Instruction architecturally executed, condition code check pass, unaligned load or store event:0x10 um:zero minimum:5000 name:BR_MIS_PRED : Mispredicted or not predicted branch speculatively executed event:0x11 um:zero minimum:100000 name:CPU_CYCLES : Cycle event:0x12 um:zero minimum:5000 name:BR_PRED : Predictable branch speculatively executed event:0x13 um:zero minimum:100000 name:MEM_ACCESS : Data memory access event:0x14 um:zero minimum:5000 name:L1I_CACHE : Level 1 instruction cache access # event:0x15 um:zero minimum:5000 name:L1D_CACHE_WB : Level 1 data cache write-back event:0x16 um:zero minimum:5000 name:L2D_CACHE : Level 2 data cache access event:0x17 um:zero minimum:5000 name:L2D_CACHE_REFILL : Level 2 data cache refill event:0x18 um:zero minimum:5000 name:L2D_CACHE_WB : Level 2 data cache write-back event:0x19 um:zero minimum:5000 name:BUS_ACCESS : Bus access event:0x1A um:zero minimum:500 name:MEMORY_ERROR : Local memory error event:0x1B um:zero minimum:100000 name:INST_SPEC : Operation speculatively executed event:0x1C um:zero minimum:5000 name:TTBR_WRITE_RETIRED : Instruction architecturally executed, condition code check pass, write to TTBR # event:0x1D um:zero minimum:5000 name:BUS_CYCLES : Bus cycle # event:0x1F um:zero minimum:5000 name:L1D_CACHE_ALLOCATE : Level 1 data cache allocation without refill # event:0x20 um:zero minimum:5000 name:L2D_CACHE_ALLOCATE : Level 2 data cache allocation without refill # X-Gene specific events event:0x040 um:zero minimum:10007 name:L1D_CACHE_LD : L1 data cache access - Read event:0x041 um:zero minimum:10007 name:L1D_CACHE_ST : L1 data cache access - Write event:0x042 um:zero minimum:10007 name:L1D_CACHE_REFILL_LD : L1 data cache refill - Read event:0x048 um:zero minimum:10007 name:L1D_CACHE_INVAL : L1 data cache invalidate event:0x04C um:zero minimum:10007 name:L1D_TLB_REFILL_LD : L1 data TLB refill - Read event:0x04D um:zero minimum:10007 name:L1D_TLB_REFILL_ST : L1 data TLB refill - Write event:0x050 um:zero minimum:10007 name:L2D_CACHE_LD : L2 data cache access - Read event:0x051 um:zero minimum:10007 name:L2D_CACHE_ST : L2 data cache access - Write event:0x052 um:zero minimum:10007 name:L2D_CACHE_REFILL_LD : L2 data cache refill - Read event:0x053 um:zero minimum:10007 name:L2D_CACHE_REFILL_ST : L2 data cache refill - Write event:0x056 um:zero minimum:10007 name:L2D_CACHE_WB_VICTIM : L2 data cache write-back - victim event:0x057 um:zero minimum:10007 name:L2D_CACHE_WB_CLEAN : L2 data cache write-back - Cleaning and coherency event:0x058 um:zero minimum:10007 name:L2D_CACHE_INVAL : L2 data cache invalidate event:0x060 um:zero minimum:10007 name:BUS_ACCESS_LD : Bus access - Read event:0x061 um:zero minimum:10007 name:BUS_ACCESS_ST : Bus access - Write event:0x062 um:zero minimum:10007 name:BUS_ACCESS_SHARED : Bus access - Normal, cacheable, sharable event:0x063 um:zero minimum:10007 name:BUS_ACCESS_NOT_SHARED : Bus access - Not normal, cacheable, sharable event:0x064 um:zero minimum:10007 name:BUS_ACCESS_NORMAL : Bus access - Normal event:0x065 um:zero minimum:10007 name:BUS_ACCESS_PERIPH : Bus access - Peripheral event:0x066 um:zero minimum:10007 name:MEM_ACCESS_LD : Data memory access - Read event:0x067 um:zero minimum:10007 name:MEM_ACCESS_ST : Data memory access - write event:0x068 um:zero minimum:10007 name:UNALIGNED_LD_SPEC : Unaligned access - Read event:0x069 um:zero minimum:10007 name:UNALIGNED_ST_SPEC : Unaligned access - Write event:0x06A um:zero minimum:10007 name:UNALIGNED_LDST_SPEC : Unaligned access event:0x06C um:zero minimum:10007 name:LDREX_SPEC : Exclusive operation speculatively executed - Load exclusive event:0x06D um:zero minimum:10007 name:STREX_PASS_SPEC : Exclusive operation speculative executed - Store exclusive pass event:0x06E um:zero minimum:10007 name:STREX_FAIL_SPEC : Exclusive operation speculative executed - Store exclusive fail event:0x06F um:zero minimum:10007 name:STREX_SPEC : Exclusive operation speculatively executed - Store exclusive event:0x070 um:zero minimum:10007 name:LD_SPEC : Operation speculatively executed - Load event:0x071 um:zero minimum:10007 name:ST_SPEC : Operation speculatively executed - Store event:0x072 um:zero minimum:10007 name:LDST_SPEC : Operation speculatively executed - Load or store event:0x073 um:zero minimum:10007 name:DP_SPEC : Operation speculatively executed - Integer data processing event:0x074 um:zero minimum:10007 name:ASE_SPEC : Operation speculatively executed - Advanced SIMD event:0x075 um:zero minimum:10007 name:VFP_SPEC : Operation speculatively executed - FP event:0x076 um:zero minimum:10007 name:PC_WRITE_SPEC : Operation speculatively executed - Software change of PC event:0x078 um:zero minimum:10007 name:BR_IMMED_SPEC : Branch speculative executed - Immediate branch event:0x079 um:zero minimum:10007 name:BR_RETURN_SPEC : Branch speculative executed - Procedure return event:0x07A um:zero minimum:10007 name:BR_INDIRECT_SPEC : Branch speculative executed - Indirect branch event:0x07C um:zero minimum:10007 name:ISB_SPEC : Barrier speculatively executed - ISB event:0x07D um:zero minimum:10007 name:DSB_SPEC : Barrier speculatively executed - DSB event:0x07E um:zero minimum:10007 name:DMB_SPEC : Barrier speculatively executed - DMB event:0x081 um:zero minimum:10007 name:EXC_UNDEF : Exception taken, other synchronous event:0x082 um:zero minimum:10007 name:EXC_SVC : Exception taken, Supervisor Call event:0x083 um:zero minimum:10007 name:EXC_PABORT : Exception taken, Instruction Abort event:0x084 um:zero minimum:10007 name:EXC_DABORT : Exception taken, Data Abort or SError event:0x086 um:zero minimum:10007 name:EXC_IRQ : Exception taken, IRQ event:0x087 um:zero minimum:10007 name:EXC_FIQ : Exception taken, FIQ event:0x08A um:zero minimum:10007 name:EXC_HVC : Exception taken, Hypervisor Call event:0x08B um:zero minimum:10007 name:EXC_TRAP_PABORT : Exception taken, Instruction Abort not taken locally event:0x08C um:zero minimum:10007 name:EXC_TRAP_DABORT : Exception taken, Data Abort or SError not taken locally event:0x08D um:zero minimum:10007 name:EXC_TRAP_OTHER : Exception taken, other traps not taken locally event:0x08E um:zero minimum:10007 name:EXC_TRAP_IRQ : Exception taken, IRQ not taken locally event:0x08F um:zero minimum:10007 name:EXC_TRAP_FIQ : Exception taken, FIQ not taken locally event:0x090 um:zero minimum:10007 name:RC_LD_SPEC : Release consistency instruction speculatively executed - Load Acquire event:0x091 um:zero minimum:10007 name:RC_ST_SPEC : Release consistency instruction speculatively executed - Store Release event:0x100 um:zero minimum:10007 name:NOP_SPEC : Operation speculatively executed - NOP event:0x101 um:zero minimum:10007 name:FSU_CLOCK_OFF_CYCLES : FSU clocking gated off cycle event:0x102 um:zero minimum:10007 name:BTB_MIS_PRED : BTB misprediction event:0x103 um:zero minimum:10007 name:ITB_MISS : ITB miss event:0x104 um:zero minimum:10007 name:DTB_MISS : DTB miss event:0x105 um:zero minimum:10007 name:L1D_CACHE_LATE_MISS : L1 data cache late miss event:0x106 um:zero minimum:10007 name:L1D_CACHE_PREFETCH : L1 data cache prefetch request event:0x107 um:zero minimum:10007 name:L2D_CACHE_PREFETCH : L2 data prefetch request event:0x108 um:zero minimum:10007 name:DECODE_STALL : Decode starved for instruction cycle event:0x109 um:zero minimum:10007 name:DISPATCH_STALL : Op dispatch stalled cycle event:0x10A um:zero minimum:10007 name:IXA_STALL : IXA Op non-issue event:0x10B um:zero minimum:10007 name:IXB_STALL : IXB Op non-issue event:0x10C um:zero minimum:10007 name:BX_STALL : BX Op non-issue event:0x10D um:zero minimum:10007 name:LX_STALL : LX Op non-issue event:0x10E um:zero minimum:10007 name:SX_STALL : SX Op non-issue event:0x10F um:zero minimum:10007 name:FX_STALL : FX Op non-issue event:0x110 um:zero minimum:10007 name:WAIT_CYCLES : Wait state cycle event:0x111 um:zero minimum:10007 name:L1_STAGE2_TLB_REFILL : L1 stage-2 TLB refill event:0x112 um:zero minimum:10007 name:PAGE_WALK_L0_STAGE1_HIT : Page Walk Cache level-0 stage-1 hit event:0x113 um:zero minimum:10007 name:PAGE_WALK_L1_STAGE1_HIT : Page Walk Cache level-1 stage-1 hit event:0x114 um:zero minimum:10007 name:PAGE_WALK_L2_STAGE1_HIT : Page Walk Cache level-2 stage-1 hit event:0x115 um:zero minimum:10007 name:PAGE_WALK_L1_STAGE2_HIT : Page Walk Cache level-1 stage-2 hit event:0x116 um:zero minimum:10007 name:PAGE_WALK_L2_STAGE2_HIT : Page Walk Cache level-2 stage-2 hit oprofile-1.3.0/events/arm/armv8-xgene/unit_masks0000664000175000017500000000010712534404406016601 00000000000000# ARMv8 architected events unit masks # include:arm/armv8-pmuv3-common oprofile-1.3.0/events/arm/armv7-ca7/0000775000175000017500000000000013323173530014124 500000000000000oprofile-1.3.0/events/arm/armv7-ca7/events0000664000175000017500000000063312621207037015275 00000000000000# ARM Cortex A7 events # From Cortex A7 TRM # include:arm/armv7-ca5 event:0x60 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_LD : Bus access, read event:0x61 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS_ST : Bus access, write event:0xCA counters:1,2,3,4,5,6 um:zero minimum:500 name:LOCAL_CLUSTER_SNOOP : Data read transaction snooped from another processor within the local A7 cluster oprofile-1.3.0/events/arm/armv7-ca7/unit_masks0000664000175000017500000000013512534404406016145 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/mpcore/0000775000175000017500000000000013323173530013705 500000000000000oprofile-1.3.0/events/arm/mpcore/events0000664000175000017500000000435412534404406015064 00000000000000# MPCore events # event:0x00 counters:0,1 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x01 counters:0,1 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x02 counters:0,1 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall occurs for due to data dependency event:0x03 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x04 counters:0,1 um:zero minimum:500 name:DTLB_MISS : number of DTLB misses event:0x05 counters:0,1 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change event:0x06 counters:0,1 um:zero minimum:500 name:BR_INST_NOT_PRED : branch not predicted event:0x07 counters:0,1 um:zero minimum:500 name:BR_INST_MISPRED : branch mispredicted event:0x08 counters:0,1 um:zero minimum:500 name:INSN_EXECUTED : instruction executed event:0x09 counters:0,1 um:zero minimum:500 name:INSN_FOLD_EXECUTED : folded instruction executed event:0x0a counters:0,1 um:zero minimum:500 name:DCACHE_ACCESS : data cache read access event:0x0b counters:0,1 um:zero minimum:500 name:DCACHE_MISS : data cache miss event:0x0c counters:0,1 um:zero minimum:500 name:DCACHE_WA : data cache write access event:0x0d counters:0,1 um:zero minimum:500 name:DCACHE_WM : data cache write miss event:0x0e counters:0,1 um:zero minimum:500 name:DCACHE_LINE_EV : data cache line eviction event:0x0f counters:0,1 um:zero minimum:500 name:SOFT_PC_CHANGE : software changed PC without mode change event:0x10 counters:0,1 um:zero minimum:500 name:TLB_MISS : main TLB miss event:0x11 counters:0,1 um:zero minimum:500 name:MEM_REQUEST : external memory request (Cache request, write back) event:0x12 counters:0,1 um:zero minimum:500 name:LS_QUEUE_FULL : stall because load store unit queue being full event:0x13 counters:0,1 um:zero minimum:500 name:LS_QUEUE_DRAINED : number of times store buffer drained event:0x14 counters:0,1 um:zero minimum:500 name:LS_QUEUE_WMERGE : buffered write merged into a store buffer slot event:0x15 counters:0,1 um:zero minimum:500 name:LS_SAFE_MODE : LSU in safe mode event:0xff counters:0,1 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter #see ARM11 MPCore Techical Reference Manual rev. r1p0, page 3-70 oprofile-1.3.0/events/arm/mpcore/unit_masks0000664000175000017500000000013012534404406015721 00000000000000# MPCore possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv7-common/0000775000175000017500000000000013323173530014742 500000000000000oprofile-1.3.0/events/arm/armv7-common/events0000664000175000017500000000655112534404406016122 00000000000000# Common ARM V7 events # From ARM ARM # See Sections 30.8.* for definitions of terms and events used here. # event:0x00 counters:1,2,3,4,5,6 um:zero minimum:500 name:SW_INCR : Software increment of PMNC registers event:0x01 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1I_CACHE_REFILL : Level 1 instruction cache refill event:0x02 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1I_TLB_REFILL : Level 1 instruction TLB refill event:0x03 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_REFILL : Level 1 data cache refill event:0x04 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE : Level 1 data cache access event:0x05 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_TLB_REFILL : Level 1 data TLB refill event:0x06 counters:1,2,3,4,5,6 um:zero minimum:500 name:LD_RETIRED : Load instruction architecturally executed, condition code pass event:0x07 counters:1,2,3,4,5,6 um:zero minimum:500 name:ST_RETIRED : Store instruction architecturally executed, condition code pass event:0x08 counters:1,2,3,4,5,6 um:zero minimum:500 name:INST_RETIRED : Instruction architecturally executed event:0x09 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_TAKEN : Exception taken event:0x0A counters:1,2,3,4,5,6 um:zero minimum:500 name:EXC_RETURN : Exception return instruction architecturally executed event:0x0B counters:1,2,3,4,5,6 um:zero minimum:500 name:CID_WRITE_RETIRED : Write to CONTEXTIDR register architecturally executed event:0x0C counters:1,2,3,4,5,6 um:zero minimum:500 name:PC_WRITE_RETIRED : Software change of the PC architecturally executed, condition code pass event:0x0D counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_IMMED_RETIRED : Immediate branch instruction architecturally executed event:0x0E counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_RETURN_RETIRED : Procedure return instruction architecturally executed, condition code pass event:0x0F counters:1,2,3,4,5,6 um:zero minimum:500 name:UNALIGNED_LDST_RETIRED : Unaligned load or store instruction architecturally executed, condition code pass event:0x10 counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_MIS_PRED : Mispredicted or not predicted branch speculatively executed event:0x12 counters:1,2,3,4,5,6 um:zero minimum:500 name:BR_PRED : Predictable branch speculatively executed event:0x13 counters:1,2,3,4,5,6 um:zero minimum:500 name:MEM_ACCESS : Data memory access event:0x14 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1I_CACHE : Level 1 instruction cache access event:0x15 counters:1,2,3,4,5,6 um:zero minimum:500 name:L1D_CACHE_WB : Level 1 data cache write-back event:0x16 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE : Level 2 data cache access event:0x17 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_REFILL : Level 2 data cache refill event:0x18 counters:1,2,3,4,5,6 um:zero minimum:500 name:L2D_CACHE_WB : Level 2 data cache write-back event:0x19 counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_ACCESS : Bus access event:0x1A counters:1,2,3,4,5,6 um:zero minimum:500 name:MEMORY_ERROR : Local memory error event:0x1B counters:1,2,3,4,5,6 um:zero minimum:500 name:INST_SPEC : Instruction speculatively executed event:0x1C counters:1,2,3,4,5,6 um:zero minimum:500 name:TTBR_WRITE_RETIRED : Write to TTBR architecturally executed, condition code pass event:0x1D counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_CYCLES : Bus cycle event:0xFF counters:0 um:zero minimum:100000 name:CPU_CYCLES : CPU cycle oprofile-1.3.0/events/arm/armv7-common/unit_masks0000664000175000017500000000013512534404406016763 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/xscale2/0000775000175000017500000000000013323173530013761 500000000000000oprofile-1.3.0/events/arm/xscale2/events0000664000175000017500000000472612534404406015143 00000000000000# XScale 2 events # event:0x00 counters:1,2,3,4 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x01 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x02 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall occurs for due to data dependency event:0x03 counters:1,2,3,4 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x04 counters:1,2,3,4 um:zero minimum:500 name:DTLB_MISS : number of DTLB misses event:0x05 counters:1,2,3,4 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change event:0x06 counters:1,2,3,4 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted event:0x07 counters:1,2,3,4 um:zero minimum:500 name:INSN_EXECUTED : instruction executed event:0x08 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_DCACHE_FULL_STALL : cycles in stall due to full dcache event:0x09 counters:1,2,3,4 um:zero minimum:500 name:DCACHE_FULL_STALL_CNT : number of stalls due to dcache full condition event:0x0a counters:1,2,3,4 um:zero minimum:500 name:DCACHE_ACCESS : data cache access event:0x0b counters:1,2,3,4 um:zero minimum:500 name:DCACHE_MISS : data cache miss event:0x0c counters:1,2,3,4 um:zero minimum:500 name:DCACHE_WB : data cache writeback, 1 event for every half cacheline event:0x0d counters:1,2,3,4 um:zero minimum:500 name:PC_CHANGE : number of times the program counter was changed without a mode switch event:0x10 counters:1,2,3,4 um:zero minimum:500 name:BCU_REQUEST : number of time the BCU received a new memory request from the core event:0x11 counters:1,2,3,4 um:zero minimum:500 name:BCU_FULL : number of cycles the BCUs request queue is full event:0x12 counters:1,2,3,4 um:zero minimum:500 name:BCU_DRAIN : number of times the BCU queues were drained due to a Drain Write Buffer command or an I/O transaction on a non-cacheable and non-bufferable page event:0x14 counters:1,2,3,4 um:zero minimum:500 name:BCU_ECC_NO_ELOG : number of times the BCU detected an ECC error, but no ELOG register was available in which to log the error event:0x15 counters:1,2,3,4 um:zero minimum:500 name:BCU_1_BIT_ERR : number of times the BCU detected a 1-bit error while reading data from the bus event:0x16 counters:1,2,3,4 um:zero minimum:500 name:RMW : number of times an RMW cycle occurred due to narrow write on ECC-protected memory event:0xfe counters:0 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter oprofile-1.3.0/events/arm/xscale2/unit_masks0000664000175000017500000000013212534404406015777 00000000000000# XScale 2 possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv7-scorpion/0000775000175000017500000000000013323173530015306 500000000000000oprofile-1.3.0/events/arm/armv7-scorpion/events0000664000175000017500000002171412534404406016464 00000000000000# ARM V7 events # From Scorpion Processor Family Programmer's Reference Manual (PRM) # include:arm/armv7-common event:0x4c counters:1,2,3,4 um:zero minimum:500 name:ICACHE_EXPL_INV : I-cache explicit invalidates event:0x4d counters:1,2,3,4 um:zero minimum:500 name:ICACHE_MISS : I-cache misses event:0x4e counters:1,2,3,4 um:zero minimum:500 name:ICACHE_ACCESS : I-cache accesses event:0x4f counters:1,2,3,4 um:zero minimum:500 name:ICACHE_CACHEREQ_L2 : I-cache cacheable requests to L2 event:0x50 counters:1,2,3,4 um:zero minimum:500 name:ICACHE_NOCACHE_L2 : I-cache non-cacheable requests to L2 event:0x51 counters:1,2,3,4 um:zero minimum:500 name:HIQUP_NOPED : Conditional instructions HIQUPs NOPed event:0x52 counters:1,2,3,4 um:zero minimum:500 name:DATA_ABORT : Interrupts and Exceptions Data Abort event:0x53 counters:1,2,3,4 um:zero minimum:500 name:IRQ : Interrupts and Exceptions IRQ event:0x54 counters:1,2,3,4 um:zero minimum:500 name:FIQ : Interrupts and Exceptions FIQ event:0x55 counters:1,2,3,4 um:zero minimum:500 name:ALL_EXCPT : Interrupts and Exceptions All interrupts event:0x56 counters:1,2,3,4 um:zero minimum:500 name:UNDEF : Interrupts and Exceptions Undefined event:0x57 counters:1,2,3,4 um:zero minimum:500 name:SVC : Interrupts and Exceptions SVC event:0x58 counters:1,2,3,4 um:zero minimum:500 name:SMC : Interrupts and Exceptions SMC event:0x59 counters:1,2,3,4 um:zero minimum:500 name:PREFETCH_ABORT : Interrupts and Exceptions Prefetch Abort event:0x5a counters:1,2,3,4 um:zero minimum:500 name:INDEX_CHECK : Interrupts and Exceptions Index Check event:0x5b counters:1,2,3,4 um:zero minimum:500 name:NULL_CHECK : Interrupts and Exceptions Null Check event:0x5c counters:1,2,3,4 um:zero minimum:500 name:EXPL_ICIALLU : I-cache and BTAC Invalidates Explicit ICIALLU event:0x5d counters:1,2,3,4 um:zero minimum:500 name:IMPL_ICIALLU : I-cache and BTAC Invalidates Implicit ICIALLU event:0x5e counters:1,2,3,4 um:zero minimum:500 name:NONICIALLU_BTAC_INV : I-cache and BTAC Invalidates Non-ICIALLU BTAC Invalidate event:0x5f counters:1,2,3,4 um:zero minimum:500 name:ICIMVAU_IMPL_ICIALLU : I-cache and BTAC Invalidates ICIMVAU-implied ICIALLU event:0x60 counters:1,2,3,4 um:zero minimum:500 name:SPIPE_ONLY_CYCLES : Issue S-pipe only issue cycles event:0x61 counters:1,2,3,4 um:zero minimum:500 name:XPIPE_ONLY_CYCLES : Issue X-pipe only issue cycles event:0x62 counters:1,2,3,4 um:zero minimum:500 name:DUAL_CYCLES : Issue dual issue cycles event:0x63 counters:1,2,3,4 um:zero minimum:500 name:DISPATCH_ANY_CYCLES : Dispatch any dispatch cycles event:0x64 counters:1,2,3,4 um:zero minimum:500 name:FIFO_FULLBLK_CMT : Commits Trace FIFO full Blk CMT event:0x65 counters:1,2,3,4 um:zero minimum:500 name:FAIL_COND_INST : Conditional instructions failing conditional instrs (excluding branches) event:0x66 counters:1,2,3,4 um:zero minimum:500 name:PASS_COND_INST : Conditional instructions passing conditional instrs (excluding branches) event:0x67 counters:1,2,3,4 um:zero minimum:500 name:ALLOW_VU_CLK : Unit Clock Gating Allow VU Clks event:0x68 counters:1,2,3,4 um:zero minimum:500 name:VU_IDLE : Unit Clock Gating VU Idle event:0x69 counters:1,2,3,4 um:zero minimum:500 name:ALLOW_L2_CLK : Unit Clock Gating Allow L2 Clks event:0x6a counters:1,2,3,4 um:zero minimum:500 name:L2_IDLE : Unit Clock Gating L2 Idle event:0x6b counters:1,2,3,4 um:zero minimum:500 name:DTLB_IMPL_INV_SCTLR_DACR : DTLB implicit invalidates writes to SCTLR and DACR event:0x6c counters:1,2,3,4 um:zero minimum:500 name:DTLB_EXPL_INV : DTLB explicit invalidates event:0x6d counters:1,2,3,4 um:zero minimum:500 name:DTLB_MISS : DTLB misses event:0x6e counters:1,2,3,4 um:zero minimum:500 name:DTLB_ACCESS : DTLB accesses event:0x6f counters:1,2,3,4 um:zero minimum:500 name:SCORPION_ITLB_MISS : ITLB misses event:0x70 counters:1,2,3,4 um:zero minimum:500 name:ITLB_IMPL_INV : ITLB implicit ITLB invalidates event:0x71 counters:1,2,3,4 um:zero minimum:500 name:ITLB_EXPL_INV : ITLB explicit ITLB invalidates event:0x72 counters:1,2,3,4 um:zero minimum:500 name:UTLB_D_MISS : UTLB d-side misses event:0x73 counters:1,2,3,4 um:zero minimum:500 name:UTLB_D_ACCESS : UTLB d-side accesses event:0x74 counters:1,2,3,4 um:zero minimum:500 name:UTLB_I_MISS : UTLB i-side misses event:0x75 counters:1,2,3,4 um:zero minimum:500 name:UTLB_I_ACCESS : UTLB i-side accesses event:0x76 counters:1,2,3,4 um:zero minimum:500 name:UTLB_INV_ASID : UTLB invalidate by ASID event:0x77 counters:1,2,3,4 um:zero minimum:500 name:UTLB_INV_MVA : UTLB invalidate by MVA event:0x78 counters:1,2,3,4 um:zero minimum:500 name:UTLB_INV_ALL : UTLB invalidate all event:0x79 counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_RDQ_UNAVAIL : S2 hold RDQ unavail event:0x7a counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD : S2 hold S2 hold event:0x7b counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_DEV_OP : S2 hold device op event:0x7c counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_ORDER : S2 hold strongly ordered op event:0x7d counters:1,2,3,4 um:zero minimum:500 name:S2_HOLD_BARRIER : S2 hold barrier event:0x7e counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VIU_DUAL_CYCLE : Scorpion VIU dual cycle event:0x7f counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VIU_SINGLE_CYCLE : Scorpion VIU single cycle event:0x80 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_WAR_STALL_CYCLES : Scorpion VX pipe WAR cycles event:0x81 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_WAW_STALL_CYCLES : Scorpion VX pipe WAW cycles event:0x82 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_RAW_STALL_CYCLES : Scorpion VX pipe RAW cycles event:0x83 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VX_PIPE_LOAD_USE_STALL : Scorpion VX pipe load use stall event:0x84 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VS_PIPE_WAR_STALL_CYCLES : Scorpion VS pipe WAR stall cycles event:0x85 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VS_PIPE_WAW_STALL_CYCLES : Scorpion VS pipe WAW stall cycles event:0x86 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_VS_PIPE_RAW_STALL_CYCLES : Scorpion VS pipe RAW stall cycles event:0x87 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_INV_OPERATION : Scorpion invalid operation exceptions event:0x88 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_DIV_BY_ZERO : Scorpion divide by zero exceptions event:0x89 counters:1,2,3,4 um:zero minimum:500 name:SCORPION_COND_INST_FAIL_VX_PIPE : Scorpion conditional instruction fail VX pipe event:0x8a counters:1,2,3,4 um:zero minimum:500 name:SCORPION_COND_INST_FAIL_VS_PIPE : Scorpion conditional instruction fail VS pipe event:0x8b counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_OVERFLOW : Scorpion overflow exceptions event:0x8c counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_UNDERFLOW : Scorpion underflow exceptions event:0x8d counters:1,2,3,4 um:zero minimum:500 name:SCORPION_EXCEPTIONS_DENORM : Scorpion denorm exceptions event:0x8e counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_HIT : L2 hit rates bank A/B hits event:0x8f counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_ACCESS : L2 hit rates bank A/B accesses event:0x90 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_HIT : L2 hit rates bank C/D hits event:0x91 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_ACCESS : L2 hit rates bank C/D accesses event:0x92 counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_DSIDE_HIT : L2 hit rates bank A/B d-side hits event:0x93 counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_DSIDE_ACCESS : L2 hit rates bank A/B d-side accesses event:0x94 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_DSIDE_HIT : L2 hit rates bank C/D d-side hits event:0x95 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_DSIDE_ACCESS : L2 hit rates bank C/D d-side accesses event:0x96 counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_ISIDE_HIT : L2 hit rates bank A/B i-side hits event:0x97 counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_ISIDE_ACCESS : L2 hit rates bank A/B i-side accesses event:0x98 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_ISIDE_HIT : L2 hit rates bank C/D i-side hits event:0x99 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_ISIDE_ACCESS : L2 hit rates bank C/D i-side accesses event:0x9a counters:1,2,3,4 um:zero minimum:500 name:ISIDE_RD_WAIT : fills and castouts cycles that i-side RD requests wait on data from bus event:0x9b counters:1,2,3,4 um:zero minimum:500 name:DSIDE_RD_WAIT : fills and castouts cycles that d-side RD requests wait on data from bus event:0x9c counters:1,2,3,4 um:zero minimum:500 name:BANK_BYPASS_WRITE : fills and castouts bank bypass writes event:0x9d counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_NON_CASTOUT : fills and castouts bank A/B non-castout writes to bus event:0x9e counters:1,2,3,4 um:zero minimum:500 name:BANK_AB_L2_CASTOUT : fills and castouts bank A/B L2 castouts (granules) event:0x9f counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_NON_CASTOUT : fills and castouts bank C/D non-castout writes to bus event:0xa0 counters:1,2,3,4 um:zero minimum:500 name:BANK_CD_L2_CASTOUT : fills and castouts bank C/D L2 castouts (granules) oprofile-1.3.0/events/arm/armv7-scorpion/unit_masks0000664000175000017500000000013512534404406017327 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv8-pmuv3-common/0000775000175000017500000000000013323173530016013 500000000000000oprofile-1.3.0/events/arm/armv8-pmuv3-common/events0000664000175000017500000000623512534404406017172 00000000000000# # Copyright (c) Red Hat, 2014. # Contributed by William Cohen # # ARMv8 pmu v3 architected events event:0x00 um:zero minimum:500 name:SW_INCR : Instruction architecturally executed, condition code check pass, software increment event:0x01 um:zero minimum:5000 name:L1I_CACHE_REFILL : Level 1 instruction cache refill event:0x02 um:zero minimum:5000 name:L1I_TLB_REFILL : Level 1 instruction TLB refill event:0x03 um:zero minimum:5000 name:L1D_CACHE_REFILL : Level 1 data cache refill event:0x04 um:zero minimum:5000 name:L1D_CACHE : Level 1 data cache access event:0x05 um:zero minimum:5000 name:L1D_TLB_REFILL : Level 1 data TLB refill event:0x06 um:zero minimum:100000 name:LD_RETIRED : Instruction architecturally executed, condition code check pass, load event:0x07 um:zero minimum:100000 name:ST_RETIRED : Instruction architecturally executed, condition code check pass, store event:0x08 um:zero minimum:100000 name:INST_RETIRED : Instruction architecturally executed event:0x09 um:zero minimum:500 name:EXC_TAKEN : Exception taken event:0x0A um:zero minimum:500 name:EXC_RETURN : Instruction architecturally executed, condition code check pass, exception return event:0x0B um:zero minimum:500 name:CID_WRITE_RETIRED : Instruction architecturally executed, condition code check pass, write to CONTEXTIDR event:0x0C um:zero minimum:5000 name:PC_WRITE_RETIRED : Instruction architecturally executed, condition code check pass, software change of the PC event:0x0D um:zero minimum:5000 name:BR_IMMED_RETIRED : Instruction architecturally executed, immediate branch event:0x0E um:zero minimum:5000 name:BR_RETURN_RETIRED : Instruction architecturally executed, condition code check pass, procedure return event:0x0F um:zero minimum:500 name:UNALIGNED_LDST_RETIRED : Instruction architecturally executed, condition code check pass, unaligned load or store event:0x10 um:zero minimum:5000 name:BR_MIS_PRED : Mispredicted or not predicted branch speculatively executed event:0x11 um:zero minimum:100000 name:CPU_CYCLES : Cycle event:0x12 um:zero minimum:5000 name:BR_PRED : Predictable branch speculatively executed event:0x13 um:zero minimum:100000 name:MEM_ACCESS : Data memory access event:0x14 um:zero minimum:5000 name:L1I_CACHE : Level 1 instruction cache access event:0x15 um:zero minimum:5000 name:L1D_CACHE_WB : Level 1 data cache write-back event:0x16 um:zero minimum:5000 name:L2D_CACHE : Level 2 data cache access event:0x17 um:zero minimum:5000 name:L2D_CACHE_REFILL : Level 2 data cache refill event:0x18 um:zero minimum:5000 name:L2D_CACHE_WB : Level 2 data cache write-back event:0x19 um:zero minimum:5000 name:BUS_ACCESS : Bus access event:0x1A um:zero minimum:500 name:MEMORY_ERROR : Local memory error event:0x1B um:zero minimum:100000 name:INST_SPEC : Operation speculatively executed event:0x1C um:zero minimum:5000 name:TTBR_WRITE_RETIRED : Instruction architecturally executed, condition code check pass, write to TTBR event:0x1D um:zero minimum:5000 name:BUS_CYCLES : Bus cycle event:0x1F um:zero minimum:5000 name:L1D_CACHE_ALLOCATE : Level 1 data cache allocation without refill event:0x20 um:zero minimum:5000 name:L2D_CACHE_ALLOCATE : Level 2 data cache allocation without refill oprofile-1.3.0/events/arm/armv8-pmuv3-common/unit_masks0000664000175000017500000000014112534404406020031 00000000000000# ARMv8 architected events unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/arm/armv7-ca9/0000775000175000017500000000000013323173530014126 500000000000000oprofile-1.3.0/events/arm/armv7-ca9/events0000664000175000017500000001332412534404406015302 00000000000000# ARM Cortex A9 events # From Cortex A9 TRM # include:arm/armv7-common event:0x40 counters:1,2,3,4,5,6 um:zero minimum:500 name:JAVA_BC_EXEC : Number of Java bytecodes decoded, including speculative ones event:0x41 counters:1,2,3,4,5,6 um:zero minimum:500 name:JAVA_SFTBC_EXEC : Number of software Java bytecodes decoded, including speculative ones event:0x42 counters:1,2,3,4,5,6 um:zero minimum:500 name:JAVA_BB_EXEC : Number of Jazelle taken branches executed, including those flushed due to a previous load/store which aborts late event:0x50 counters:1,2,3,4,5,6 um:zero minimum:500 name:CO_LF_MISS : Number of coherent linefill requests which miss in all other CPUs, meaning that the request is sent to external memory event:0x51 counters:1,2,3,4,5,6 um:zero minimum:500 name:CO_LF_HIT : Number of coherent linefill requests which hit in another CPU, meaning that the linefill data is fetched directly from the relevant cache event:0x60 counters:1,2,3,4,5,6 um:zero minimum:500 name:IC_DEP_STALL : Number of cycles where CPU is ready to accept new instructions but does not receive any because of the instruction side not being able to provide any and the instruction cache is currently performing at least one linefill event:0x61 counters:1,2,3,4,5,6 um:zero minimum:500 name:DC_DEP_STALL : Number of cycles where CPU has some instructions that it cannot issue to any pipeline and the LSU has at least one pending linefill request but no pending TLB requests event:0x62 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_MAIN_TLB : Number of cycles where CPU is stalled waiting for completion of translation table walk from the main TLB event:0x63 counters:1,2,3,4,5,6 um:zero minimum:500 name:STREX_PASS : Number of STREX instructions architecturally executed and passed event:0x64 counters:1,2,3,4,5,6 um:zero minimum:500 name:STREX_FAILS : Number of STREX instructions architecturally executed and failed event:0x65 counters:1,2,3,4,5,6 um:zero minimum:500 name:DATA_EVICT : Number of eviction requests due to a linefill in the data cache event:0x66 counters:1,2,3,4,5,6 um:zero minimum:500 name:ISS_NO_DISP : Number of cycles where the issue stage does not dispatch any instruction event:0x67 counters:1,2,3,4,5,6 um:zero minimum:500 name:ISS_EMPTY : Number of cycles where the issue stage is empty event:0x68 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_RENAME : Number of instructions going through the Register Renaming stage event:0x6E counters:1,2,3,4,5,6 um:zero minimum:500 name:PRD_FN_RET : Number of procedure returns whose condition codes do not fail, excluding all exception returns event:0x70 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_MAIN_EXEC : Number of instructions being executed in main execution pipeline of the CPU, the multiply pipeline and the ALU pipeline event:0x71 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_SND_EXEC : Number of instructions being executed in the second execution pipeline (ALU) of the CPU event:0x72 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_LSU : Number of instructions being executed in the Load/Store unit event:0x73 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_FP_RR : Number of floating-point instructions going through the Register Rename stage event:0x74 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_NEON_RR : Number of NEON instructions going through the Register Rename stage event:0x80 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_PLD : Number of cycles where CPU is stalled because PLD slots are all full event:0x81 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_WRITE : Number of cycles where CPU is stalled because data side is full and executing writes to external memory event:0x82 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_INS_TLB : Number of cycles where CPU is stalled because of main TLB misses on requests issued by the instruction side event:0x83 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_DATA_TLB : Number of cycles where CPU is stalled because of main TLB misses on requests issued by the data side event:0x84 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_INS_UTLB : Number of cycles where CPU is stalled because of micro TLB misses on the instruction side event:0x85 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_DATA_ULTB : Number of cycles where CPU is stalled because of micro TLB misses on the data side event:0x86 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_DMB : Number of cycles where CPU is stalled due to executed of a DMB memory barrier event:0x8A counters:1,2,3,4,5,6 um:zero minimum:500 name:CLK_INT_EN : Number of cycles during which the integer core clock is enabled event:0x8B counters:1,2,3,4,5,6 um:zero minimum:500 name:CLK_DE_EN : Number of cycles during which the Data Engine clock is enabled event:0x90 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_ISB : Number of ISB instructions architecturally executed event:0x91 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_DSB : Number of DSB instructions architecturally executed event:0x92 counters:1,2,3,4,5,6 um:zero minimum:500 name:INS_DMB : Number of DMB instructions speculatively executed event:0x93 counters:1,2,3,4,5,6 um:zero minimum:500 name:EXT_IRQ : Number of external interrupts executed by the processor event:0xA0 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLE_CL_REQ_CMP : PLE cache line request completed event:0xA1 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLE_CL_REQ_SKP : PLE cache line request skipped event:0xA2 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLE_FIFO_FLSH : PLE FIFO flush event:0xA3 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLE_REQ_COMP : PLE request completed event:0xA4 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLE_FIFO_OF : PLE FIFO overflow event:0xA5 counters:1,2,3,4,5,6 um:zero minimum:500 name:PLE_REQ_PRG : PLE request programmed oprofile-1.3.0/events/arm/armv7-ca9/unit_masks0000664000175000017500000000013512534404406016147 00000000000000# ARM V7 PMNC possible unit masks # name:zero type:mandatory default:0x00 0x00 No unit mask oprofile-1.3.0/events/Makefile.am0000664000175000017500000001177213230147570013627 00000000000000event_files = \ alpha/ev67/events alpha/ev67/unit_masks \ i386/athlon/events i386/athlon/unit_masks \ i386/core_2/events i386/core_2/unit_masks \ i386/p4/events i386/p4-ht/events \ i386/p4-ht/unit_masks i386/p4/unit_masks \ i386/pii/events i386/pii/unit_masks \ i386/piii/events i386/piii/unit_masks \ i386/ppro/events i386/ppro/unit_masks \ i386/p6_mobile/events i386/p6_mobile/unit_masks \ i386/core/events i386/core/unit_masks \ i386/arch_perfmon/events i386/arch_perfmon/unit_masks \ i386/atom/events i386/atom/unit_masks \ i386/core_i7/events i386/core_i7/unit_masks \ i386/nehalem/events i386/nehalem/unit_masks \ i386/westmere/events i386/westmere/unit_masks \ i386/sandybridge/events i386/sandybridge/unit_masks \ i386/ivybridge/events i386/ivybridge/unit_masks \ i386/haswell/events i386/haswell/unit_masks \ i386/broadwell/events i386/broadwell/unit_masks \ i386/skylake/events i386/skylake/unit_masks \ i386/silvermont/events i386/silvermont/unit_masks \ i386/goldmont/events i386/goldmont/unit_masks \ i386/goldmontplus/events i386/goldmontplus/unit_masks \ i386/knightslanding/events i386/knightslanding/unit_masks \ ppc64/architected_events_v1/events ppc64/architected_events_v1/unit_masks \ ppc64/power4/events ppc64/power4/event_mappings ppc64/power4/unit_masks \ ppc64/power5/events ppc64/power5/event_mappings ppc64/power5/unit_masks \ ppc64/power5+/events ppc64/power5+/event_mappings ppc64/power5+/unit_masks \ ppc64/power5++/events ppc64/power5++/event_mappings ppc64/power5++/unit_masks \ ppc64/power6/events ppc64/power6/event_mappings ppc64/power6/unit_masks \ ppc64/power7/events ppc64/power7/event_mappings ppc64/power7/unit_masks \ ppc64/power8/events ppc64/power8/unit_masks \ ppc64/power9/events ppc64/power9/unit_masks \ ppc64/970/events ppc64/970/event_mappings ppc64/970/unit_masks \ ppc64/970MP/events ppc64/970MP/event_mappings ppc64/970MP/unit_masks \ x86-64/hammer/events x86-64/hammer/unit_masks \ x86-64/family10/events x86-64/family10/unit_masks \ x86-64/family11h/events x86-64/family11h/unit_masks \ x86-64/family12h/events x86-64/family12h/unit_masks \ x86-64/family14h/events x86-64/family14h/unit_masks \ x86-64/family15h/events x86-64/family15h/unit_masks \ x86-64/generic/events x86-64/generic/unit_masks \ arm/xscale1/events arm/xscale1/unit_masks \ arm/xscale2/events arm/xscale2/unit_masks \ arm/armv6/events arm/armv6/unit_masks \ arm/armv7-common/events arm/armv7-common/unit_masks \ arm/armv7/events arm/armv7/unit_masks \ arm/armv7-scorpion/events arm/armv7-scorpion/unit_masks \ arm/armv7-scorpionmp/events arm/armv7-scorpionmp/unit_masks \ arm/armv7-krait/events arm/armv7-krait/unit_masks \ arm/armv7-ca9/events arm/armv7-ca9/unit_masks \ arm/armv7-ca5/events arm/armv7-ca5/unit_masks \ arm/armv7-ca7/events arm/armv7-ca7/unit_masks \ arm/armv7-ca15/events arm/armv7-ca15/unit_masks \ arm/armv7-ca17/events arm/armv7-ca17/unit_masks \ arm/mpcore/events arm/mpcore/unit_masks \ arm/armv8-pmuv3-common/events arm/armv8-pmuv3-common/unit_masks \ arm/armv8-xgene/events arm/armv8-xgene/unit_masks \ arm/armv8-ca57/events arm/armv8-ca57/unit_masks \ arm/armv8-ca53/events arm/armv8-ca53/unit_masks \ mips/20K/events mips/20K/unit_masks \ mips/24K/events mips/24K/unit_masks \ mips/25K/events mips/25K/unit_masks \ mips/34K/events mips/34K/unit_masks \ mips/5K/events mips/5K/unit_masks \ mips/rm7000/events mips/rm7000/unit_masks \ mips/rm9000/events mips/rm9000/unit_masks \ mips/sb1/events mips/sb1/unit_masks \ mips/r10000/events mips/r10000/unit_masks \ mips/r12000/events mips/r12000/unit_masks \ mips/vr5432/events mips/vr5432/unit_masks \ mips/vr5500/events mips/vr5500/unit_masks \ mips/loongson2/events mips/loongson2/unit_masks \ mips/1004K/events mips/1004K/unit_masks \ mips/74K/events mips/74K/unit_masks \ ppc/7450/events ppc/7450/unit_masks \ ppc/e500/events ppc/e500/unit_masks \ ppc/e500v2/events ppc/e500v2/unit_masks \ ppc/e500mc/events ppc/e500mc/unit_masks \ ppc/e6500/events ppc/e6500/unit_masks \ ppc/e300/events ppc/e300/unit_masks \ tile/tile64/events tile/tile64/unit_masks \ tile/tilepro/events tile/tilepro/unit_masks \ tile/tilegx/events tile/tilegx/unit_masks \ s390/z10/events s390/z10/unit_masks \ s390/z196/events s390/z196/unit_masks \ s390/zEC12/events s390/zEC12/unit_masks \ s390/z13/events s390/z13/unit_masks install-data-local: for i in ${event_files} ; do \ dir=`dirname $$i` ; \ mkdir -p $(DESTDIR)$(pkgdatadir)/$$dir ; \ $(INSTALL_DATA) $(top_srcdir)/events/$$i $(DESTDIR)$(pkgdatadir)/$$i ; \ done uninstall-local: for i in ${event_files} ; do \ dir=`dirname $$i` ; \ archdir=`dirname $$dir` ; \ if test -f $(DESTDIR)$(pkgdatadir)/$$i ; then \ rm $(DESTDIR)$(pkgdatadir)/$$i ; \ fi; \ if test -d $(DESTDIR)$(pkgdatadir)/$$dir ; then \ rmdir --ignore-fail-on-non-empty $(DESTDIR)$(pkgdatadir)/$$dir ; \ fi; \ if test $$archdir != "." -a -d $(DESTDIR)$(pkgdatadir)/$$archdir ; then \ rmdir --ignore-fail-on-non-empty $(DESTDIR)$(pkgdatadir)/$$archdir ; \ fi; \ done EXTRA_DIST = $(event_files) oprofile-1.3.0/events/tile/0000775000175000017500000000000013323173530012576 500000000000000oprofile-1.3.0/events/tile/tilegx/0000775000175000017500000000000013323173530014072 500000000000000oprofile-1.3.0/events/tile/tilegx/events0000664000175000017500000003357112534404406015254 00000000000000# TILE-Gx Events event:0x180 counters:0,1,2,3 um:zero minimum:500 name:ZERO : Always zero - no event ever happens event:0x181 counters:0,1,2,3 um:zero minimum:20000 name:ONE : Always one - an event occurs every cycle event:0x182 counters:0,1,2,3 um:zero minimum:500 name:PASS_WRITTEN : The event indicates that the PASS SPR was written event:0x183 counters:0,1,2,3 um:zero minimum:500 name:FAIL_WRITTEN : The event indicates that the FAIL SPR was written event:0x184 counters:0,1,2,3 um:zero minimum:500 name:DONE_WRITTEN : The event indicates that the DONE SPR was written event:0xc4 counters:0,1,2,3 um:zero minimum:500 name:L1D_FILL_STALL : The event occurs when a memory operation stalls due to L1 DCache being busy doing a fill. event:0xc6 counters:0,1,2,3 um:zero minimum:500 name:LOAD_HIT_STALL : The event occurs when an instruction 2 cycles after a load stalls due to a source operand being the destination. The L1 DCache hit latency is two cycles, so the instruction would stall on a miss but not on a hit. event:0xc7 counters:0,1,2,3 um:zero minimum:500 name:LOAD_STALL : The event occurs when an instruction stalls due to a source operand being the destination of a load instruction. This event happens on all cycles that stall except for the one 2 cycles after the load, which is counted by LOAD_HIT_STALL event. event:0xc8 counters:0,1,2,3 um:zero minimum:500 name:ALU_SRC_STALL : The event occurs when an instruction stalls due to a source operand being the destination of an ALU instruction. event:0xc9 counters:0,1,2,3 um:zero minimum:500 name:IDN_SRC_STALL : The event occurs when an instruction stalls due to IDN source register not available. event:0xca counters:0,1,2,3 um:zero minimum:500 name:UDN_SRC_STALL : The event occurs when an instruction stalls due to UDN source register not available. event:0xcb counters:0,1,2,3 um:zero minimum:500 name:MF_STALL : The event during stalls for Memory Fence instruction. event:0xcc counters:0,1,2,3 um:zero minimum:500 name:SLOW_SPR_STALL : The event occurs during stalls to slow SPR access. event:0xcd counters:0,1,2,3 um:zero minimum:500 name:NETWORK_DEST_STALL : The event occurs when a valid instruction in pipeline Decode stage stalls due to network destination full. event:0xce counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_STALL : The event occurs when a valid instruction in pipeline Decode stage stalls for any reason. event:0xd4 counters:0,1,2,3 um:zero minimum:500 name:ITLB_MISS_INTERRUPT : The event occurs when an ITLB_MISS interrupt is taken. event:0xd5 counters:0,1,2,3 um:zero minimum:500 name:INTERRUPT : The event occurs when any interrupt is taken. event:0xdb counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_BUNDLE : The event occurs when there is a valid instruction in pipeline WB stage (e.g. when an instruction is commited). event:0x40 counters:0,1,2,3 um:zero minimum:500 name:TLB : The event occurs when a data memory operation is issued and the data translation lookaside buffer (DTLB) is used to translate the virtual address into the physical address. event:0x41 counters:0,1,2,3 um:zero minimum:500 name:READ : The event occurs when a load is issued. event:0x42 counters:0,1,2,3 um:zero minimum:500 name:WRITE : The event occurs when a store is issed. event:0x43 counters:0,1,2,3 um:zero minimum:500 name:TLB_EXCEPTION : The event occurs when the address of a data stream memory operation causes a Data TLB Exception including TLB Misses and protection violations. event:0x44 counters:0,1,2,3 um:zero minimum:500 name:READ_MISS : The event occurs when a load is issued and data is not returned from the level 1 data cache. event:0x45 counters:0,1,2,3 um:zero minimum:500 name:WRITE_MISS : The event occurs when a store is issued and the 16-byte aligned block (level 1 data cache line size) containing the address is not present at the level 1 data cache. event:0x80 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_INCREMENT_READ : The event occurs when a read request is received from another Tile off the SDN and the Level 3 cache will track the share state. event:0x81 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_NON_INCREMENT_READ : The event occurs when a read request is received from another Tile off the SDN and the Level 3 cache will not track the share state. event:0x82 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_WRITE : The event occurs when a write request is received from another Tile off the SDN. event:0x83 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_IO_READ : The event occurs when a read request is received from an IO device off the SDN. event:0x84 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_IO_WRITE : The event occurs when a write request is received from an IO device off the SDN. event:0x85 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_DATA_READ : The event occurs when a data read request is received from the main processor and the Level 3 cache resides in the Tile. event:0x86 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_WRITE : The event occurs when a write request is received from the main processor and the Level 3 cache resides in the Tile. event:0x87 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_INSTRUCTION_READ : The event occurs when an instruction read request is received from the main processor and the Level 3 cache resides in the Tile. event:0x88 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_DATA_READ : The event occurs when a data read request is received from the main processor and the Level 3 cache resides in another Tile. event:0x89 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_WRITE : The event occurs when a write request is received from the main processor and the Level 3 cache resides in another Tile. event:0x8a counters:0,1,2,3 um:zero minimum:500 name:REMOTE_INSTRUCTION_READ : The event occurs when an instruction read request is received from the main processor and the Level 3 cache resides in another Tile. event:0x8b counters:0,1,2,3 um:zero minimum:500 name:COHERENCE_INVALIDATION : The event occurs when a coherence invalidation is received from another Tile off the QDN. event:0x8c counters:0,1,2,3 um:zero minimum:500 name:SNOOP_INCREMENT_READ_MISS : The event occurs when a read request is received from another Tile off the SDN and misses the Level 3 cache. The level 3 cache will track the share state. event:0x8d counters:0,1,2,3 um:zero minimum:500 name:SNOOP_NON_INCREMENT_READ_MISS : The event occurs when a read request is received from another Tile off the SDN and misses the Level 3 cache. The Level 3 cache will not track the share state. event:0x8e counters:0,1,2,3 um:zero minimum:500 name:SNOOP_WRITE_MISS : The event occurs when a write request is received from another Tile off the SDN and misses the Level 3 cache. event:0x8f counters:0,1,2,3 um:zero minimum:500 name:SNOOP_IO_READ_MISS : The event occurs when a read request is received from an IO device off the SDN and misses the Level 3 cache. event:0x90 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_IO_WRITE_MISS : The event occurs when a write request is received from an IO device off the SDN and misses the Level 3 cache. event:0x91 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_DATA_READ_MISS : The event occurs when a data read request is received from the main processor and misses the Level 3 cache resided in the Tile. event:0x92 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_WRITE_MISS : The event occurs when a write request is received from the main processor and misses the Level 3 cache resided in the Tile. event:0x93 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_INSTRUCTION_READ_MISS : The event occurs when an instruction read request is received from the main processor and misses the Level 3 cache resided in the Tile. event:0x94 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_DATA_READ_MISS : The event occurs when a data read request is received from the main processor and misses the Level 2 cache. The Level 3 cache resides in another Tile. event:0x95 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_WRITE_MISS : The event occurs when a write request is received from the main processor and misses the Level 2 cache. The Level 3 cache resides in another Tile. event:0x96 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_INSTRUCTION_READ_MISS : The event occurs when an instruction read request is received from the main processor and misses the Level 2 cache. The Level 3 cache resides in another Tile. event:0x97 counters:0,1,2,3 um:zero minimum:500 name:COHERENCE_INVALIDATION_HIT : The event occurs when a coherence invalidation is received from another Tile off the QDN and hits the level 2 cache. event:0x98 counters:0,1,2,3 um:zero minimum:500 name:CACHE_WRITEBACK : The event occurs when a cache writeback to main memory, including victim writes or explicit flushes, leaves the Tile. event:0x99 counters:0,1,2,3 um:zero minimum:500 name:SDN_STARVED : The event occurs when a snoop is received and the controller enters the SDN starved condition. event:0x9a counters:0,1,2,3 um:zero minimum:500 name:RDN_STARVED : The event occurs when the controller enters the RDN starved condition. event:0x9b counters:0,1,2,3 um:zero minimum:500 name:QDN_STARVED : The event occurs when the controller enters the QDN starved condition. event:0x9c counters:0,1,2,3 um:zero minimum:500 name:SKF_STARVED : The event occurs when the controller enters the skid FIFO starved condition. event:0x9d counters:0,1,2,3 um:zero minimum:500 name:RTF_STARVED : The event occurs when the controller enters the re-try FIFO starved condition. event:0x9e counters:0,1,2,3 um:zero minimum:500 name:IREQ_STARVED : The event occurs when the controller enters the instruction stream starved condition. event:0xa1 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_WRITE_BUFFER_ALLOC : The event occurs when a write request is received from the main processor and allocates a write buffer in the Level 3 cache resided in the Tile. event:0xa2 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_WRITE_BUFFER_ALLOC : The event occurs when a write request is received from the main processor and allocates a write buffer in the Level 2 cache resided in the Tile. The Level 3 cache resides in another Tile event:0x00 counters:0,1,2,3 um:zero minimum:500 name:UDN_PACKET_SENT : Main processor finished sending a packet to the UDN. event:0x01 counters:0,1,2,3 um:zero minimum:500 name:UDN_WORD_SENT : UDN word sent to an output port. Participating ports are selected with the UDN_EVT_PORT_SEL field. event:0x02 counters:0,1,2,3 um:zero minimum:500 name:UDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the UDN_EVT_PORT_SEL field. event:0x03 counters:0,1,2,3 um:zero minimum:500 name:UDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the UDN_EVT_PORT_SEL field. event:0x04 counters:0,1,2,3 um:zero minimum:500 name:IDN_PACKET_SENT : Main processor finished sending a packet to the IDN. event:0x05 counters:0,1,2,3 um:zero minimum:500 name:IDN_WORD_SENT : IDN word sent to an output port. Participating ports are selected with the IDN_EVT_PORT_SEL field. event:0x06 counters:0,1,2,3 um:zero minimum:500 name:IDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the IDN_EVT_PORT_SEL field. event:0x07 counters:0,1,2,3 um:zero minimum:500 name:IDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the IDN_EVT_PORT_SEL field. event:0x08 counters:0,1,2,3 um:zero minimum:500 name:RDN_PACKET_SENT : Main processor finished sending a packet to the RDN. event:0x09 counters:0,1,2,3 um:zero minimum:500 name:RDN_WORD_SENT : RDN word sent to an output port. Participating ports are selected with the RDN_EVT_PORT_SEL field. event:0x0a counters:0,1,2,3 um:zero minimum:500 name:RDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the RDN_EVT_PORT_SEL field. event:0x0b counters:0,1,2,3 um:zero minimum:500 name:RDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the RDN_EVT_PORT_SEL field. event:0x0c counters:0,1,2,3 um:zero minimum:500 name:SDN_PACKET_SENT : Main processor finished sending a packet to the SDN. event:0x0d counters:0,1,2,3 um:zero minimum:500 name:SDN_WORD_SENT : SDN word sent to an output port. Participating ports are selected with the SDN_EVT_PORT_SEL field. event:0x0e counters:0,1,2,3 um:zero minimum:500 name:SDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the SDN_EVT_PORT_SEL field. event:0x0f counters:0,1,2,3 um:zero minimum:500 name:SDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the SDN_EVT_PORT_SEL field. event:0x10 counters:0,1,2,3 um:zero minimum:500 name:QDN_PACKET_SENT : Main processor finished sending a packet to the QDN. event:0x11 counters:0,1,2,3 um:zero minimum:500 name:QDN_WORD_SENT : QDN word sent to an output port. Participating ports are selected with the QDN_EVT_PORT_SEL field. event:0x12 counters:0,1,2,3 um:zero minimum:500 name:QDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the QDN_EVT_PORT_SEL field. event:0x13 counters:0,1,2,3 um:zero minimum:500 name:QDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the QDN_EVT_PORT_SEL field. event:0x14 counters:0,1,2,3 um:zero minimum:500 name:UDN_DEMUX_STALL : UDN Demux stalled due to buffer full event:0x15 counters:0,1,2,3 um:zero minimum:500 name:IDN_DEMUX_STALL : IDN Demux stalled due to buffer full oprofile-1.3.0/events/tile/tilegx/unit_masks0000664000175000017500000000012712534404406016114 00000000000000# TILE-GX possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/tile/tilepro/0000775000175000017500000000000013323173530014254 500000000000000oprofile-1.3.0/events/tile/tilepro/events0000664000175000017500000003757512534404406015446 00000000000000# TILEPro Events event:0x00 counters:0,1,2,3 um:zero minimum:500 name:ZERO : Always zero - no event ever happens event:0x01 counters:0,1,2,3 um:zero minimum:20000 name:ONE : Always one - an event occurs every cycle event:0x02 counters:0,1,2,3 um:zero minimum:500 name:PASS_WRITTEN : The event indicates that the PASS SPR was written event:0x03 counters:0,1,2,3 um:zero minimum:500 name:FAIL_WRITTEN : The event indicates that the FAIL SPR was written event:0x04 counters:0,1,2,3 um:zero minimum:500 name:DONE_WRITTEN : The event indicates that the DONE SPR was written event:0x06 counters:0,1,2,3 um:zero minimum:500 name:MP_BUNDLE_RETIRED : The event occurs when instruction bundle is retired. event:0x07 counters:0,1,2,3 um:zero minimum:500 name:MP_BUNDLE_1_INSTR_RETIRED : The event occurs when an instruction bundle containing one valid instruction is retired. event:0x08 counters:0,1,2,3 um:zero minimum:500 name:MP_BUNDLE_2_INSTR_RETIRED : The event occurs when an instruction bundle containing two valid instructions is retired. event:0x09 counters:0,1,2,3 um:zero minimum:500 name:MP_BUNDLE_3_INSTR_RETIRED : The event occurs when an instruction bundle containing three valid instructions is retired. event:0x0a counters:0,1,2,3 um:zero minimum:500 name:MP_UDN_READ_STALL : An event occurs every cycle that an instruction bundle is stalled on a UDN read. Multiple stall events may occur and be counted during the same cycle. event:0x0b counters:0,1,2,3 um:zero minimum:500 name:MP_IDN_READ_STALL : An event occurs every cycle that an instruction bundle is stalled on a IDN read. Multiple stall events may occur and be counted during the same cycle. event:0x0c counters:0,1,2,3 um:zero minimum:500 name:MP_SN_READ_STALL : An event occurs every cycle that an instruction bundle is stalled on a STN read. Multiple stall events may occur and be counted during the same cycle. event:0x0d counters:0,1,2,3 um:zero minimum:500 name:MP_UDN_WRITE_STALL : An event occurs every cycle that an instruction bundle is stalled on a UDN write. Multiple stall events may occur and be counted during the same cycle. event:0x0e counters:0,1,2,3 um:zero minimum:500 name:MP_IDN_WRITE_STALL : An event occurs every cycle that an instruction bundle is stalled on a IDN write. Multiple stall events may occur and be counted during the same cycle. event:0x0f counters:0,1,2,3 um:zero minimum:500 name:MP_SN_WRITE_STALL : An event occurs every cycle that an instruction bundle is stalled on a STN write. Multiple stall events may occur and be counted during the same cycle. event:0x10 counters:0,1,2,3 um:zero minimum:500 name:MP_DATA_CACHE_STALL : An event occurs every cycle that an instruction bundle is stalled on a data memory operation except for the cycles when a replay trap is being performed. Instructions that depend on the result of a load and are fired speculatively cause a reply trap if the request misses the L1 data cache and thus are not counted. The wait is 4 if the consumer of the load immediately follows the load or 3 if there is a cycle between the load issue and the consumer issue. Multiple stall events may occur and be counted during the same cycle. event:0x11 counters:0,1,2,3 um:zero minimum:500 name:MP_INSTRUCTION_CACHE_STALL : An event occurs every cycle that an instruction bundle is stalled on a instruction memory operation. Multiple stall events may occur and be counted during the same cycle. event:0x12 counters:0,1,2,3 um:zero minimum:500 name:MP_ICACHE_HIT_ISSUED : The event occurs when the fetch of an issued instruction hits the L1 Instruction cache. event:0x13 counters:0,1,2,3 um:zero minimum:500 name:MP_ITLB_HIT_ISSUED : The event occurs when the fetch of an issued instruction hits the instruction TLB. event:0x14 counters:0,1,2,3 um:zero minimum:500 name:MP_CONDITIONAL_BRANCH_MISSPREDICT : The event occurs when a conditional branch is misspredicted. event:0x15 counters:0,1,2,3 um:zero minimum:500 name:MP_INDIRECT_BRANCH_MISSPREDICT : The event occurs when a register indirect branch is misspredicted. event:0x16 counters:0,1,2,3 um:zero minimum:500 name:MP_CONDITIONAL_BRANCH_ISSUED : The event occurs when a conditional branch is issued. event:0x17 counters:0,1,2,3 um:zero minimum:500 name:MP_INDIRECT_BRANCH_ISSUED : The event occurs when a register indirect branch is issued. event:0x18 counters:0,1,2,3 um:zero minimum:500 name:MP_CACHE_BUSY_STALL : The event occurs when the cache system is busy, and a memory operation cannot be issued. event:0x19 counters:0,1,2,3 um:zero minimum:500 name:MP_NAP_STALL : The event occurs every cycle a processor is stalled due to a nap instruction. event:0x1a counters:0,1,2,3 um:zero minimum:500 name:MP_SPR_STALL : The event occurs every cycle a processor is stalled when executing an instruction that reads or writes an SPR. event:0x1b counters:0,1,2,3 um:zero minimum:500 name:MP_ALU_STALL : The event occurs every cycle a processor is stalled because an operand is not available due to an arithmetic operation. For example, this event will occur when an instruction consuming the result of a multiply stall for one cycle waiting for the multiply result. event:0x1c counters:0,1,2,3 um:zero minimum:500 name:MP_LOAD_MISS_REPLAY_TRAP : The event occurs every time an instruction consuming the result of a load issues within two cycles of the load instruction, and the load instruction misses in the L1 data cache. event:0x1d counters:0,1,2,3 um:zero minimum:500 name:TLB_CNT : The event occurs when a data memory operation is issued and the data translation lookaside buffer (DTLB) is used to translate the virtual address into the physical address. event:0x1e counters:0,1,2,3 um:zero minimum:500 name:RD_CNT : The event occurs when a load is issued. event:0x1f counters:0,1,2,3 um:zero minimum:500 name:WR_CNT : The event occurs when a store is issed. event:0x20 counters:0,1,2,3 um:zero minimum:500 name:TLB_EXCEPTION : The event occurs when the address of a data stream memory operation causes a Data TLB Exception including TLB Misses and protection violations. event:0x21 counters:0,1,2,3 um:zero minimum:500 name:RD_MISS : The event occurs when a load is issued and data is not returned from the level 1 data cache. event:0x22 counters:0,1,2,3 um:zero minimum:500 name:WR_MISS : The event occurs when a store is issued and the 16-byte aligned block (level 1 data cache line size) containing the address is not present at the level 1 data cache. event:0x23 counters:0,1,2,3 um:zero minimum:500 name:SNP_INC_RD_CNT : The event occurs when a read request is received from another Tile off the TDN and the Level 3 cache will track the share state. event:0x24 counters:0,1,2,3 um:zero minimum:500 name:SNP_NINC_RD_CNT : The event occurs when a read request is received from another Tile off the TDN and the Level 3 cache will not track the share state. event:0x25 counters:0,1,2,3 um:zero minimum:500 name:SNP_WR_CNT : The event occurs when a write (store or test-and-set) request is received from another Tile off the TDN. event:0x26 counters:0,1,2,3 um:zero minimum:500 name:SNP_IO_RD_CNT : The event occurs when a read request is received from an IO device off the TDN. event:0x27 counters:0,1,2,3 um:zero minimum:500 name:SNP_IO_WR_CNT : The event occurs when a write request is received from an IO device off the TDN. event:0x28 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_DRD_CNT : The event occurs when a data read request is received from the main processor and the Level 3 cache resides in the Tile. event:0x29 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_WR_CNT : The event occurs when a write (store or test-and-set) request is received from the main processor and the Level 3 cache resides in the Tile. event:0x2a counters:0,1,2,3 um:zero minimum:500 name:LOCAL_IRD_CNT : The event occurs when an instruction read request is received from the main processor and the Level 3 cache resides in the Tile. event:0x2b counters:0,1,2,3 um:zero minimum:500 name:REMOTE_DRD_CNT : The event occurs when a data read request is received from the main processor and the Level 3 cache resides in another Tile. event:0x2c counters:0,1,2,3 um:zero minimum:500 name:REMOTE_WR_CNT : The event occurs when a write (store or test-and-set) request is received from the main processor and the Level 3 cache resides in another Tile. event:0x2d counters:0,1,2,3 um:zero minimum:500 name:REMOTE_IRD_CNT : The event occurs when an instruction read request is received from the main processor and the Level 3 cache resides in another Tile. event:0x2e counters:0,1,2,3 um:zero minimum:500 name:COH_INV_CNT : The event occurs when a coherence invalidation is received from another Tile off the VDN. event:0x2f counters:0,1,2,3 um:zero minimum:500 name:SNP_INC_RD_MISS : The event occurs when a read request is received from another Tile off the TDN and misses the Level 3 cache. The level 3 cache will track the share state. event:0x30 counters:0,1,2,3 um:zero minimum:500 name:SNP_NINC_RD_MISS : The event occurs when a read request is received from another Tile off the TDN and misses the Level 3 cache. The Level 3 cache will not track the share state. event:0x31 counters:0,1,2,3 um:zero minimum:500 name:SNP_WR_MISS : The event occurs when a write (store or test-and-set) request is received from another Tile off the TDN and misses the Level 3 cache. event:0x32 counters:0,1,2,3 um:zero minimum:500 name:SNP_IO_RD_MISS : The event occurs when a read request is received from an IO device off the TDN and misses the Level 3 cache. event:0x33 counters:0,1,2,3 um:zero minimum:500 name:SNP_IO_WR_MISS : The event occurs when a write request is received from an IO device off the TDN and misses the Level 3 cache. event:0x34 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_DRD_MISS : The event occurs when a data read request is received from the main processor and misses the Level 3 cache resided in the Tile. event:0x35 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_WR_MISS : The event occurs when a write (store or test-and-set) request is received from the main processor and misses the Level 3 cache resided in the Tile. event:0x36 counters:0,1,2,3 um:zero minimum:500 name:LOCAL_IRD_MISS : The event occurs when an instruction read request is received from the main processor and misses the Level 3 cache resided in the Tile. event:0x37 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_DRD_MISS : The event occurs when a data read request is received from the main processor and misses the Level 2 cache. The Level 3 cache resides in another Tile. event:0x38 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_WR_MISS : The event occurs when a write (store or test-and-set) request is received from the main processor and misses the Level 2 cache. The Level 3 cache resides in another Tile. event:0x39 counters:0,1,2,3 um:zero minimum:500 name:REMOTE_IRD_MISS : The event occurs when an instruction read request is received from the main processor and misses the Level 2 cache. The Level 3 cache resides in another Tile. event:0x3a counters:0,1,2,3 um:zero minimum:500 name:COH_INV_HIT : The event occurs when a coherence invalidation is received from another Tile off the VDN and hits the level 2 cache. event:0x3b counters:0,1,2,3 um:zero minimum:500 name:VIC_WB_CNT : The event occurs when a cache writeback to main memory, including victim writes or explicit flushes, leaves the Tile. event:0x3c counters:0,1,2,3 um:zero minimum:500 name:TDN_STARVED : The event occurs when a snoop is received and the controller enters the TDN starved condition. event:0x3d counters:0,1,2,3 um:zero minimum:500 name:DMA_STARVED : The event occurs when a DMA is received and the controller enters the starved condition. event:0x3e counters:0,1,2,3 um:zero minimum:500 name:MDN_STARVED : The event occurs when the controller enters the MDN or VDN starved condition. event:0x3f counters:0,1,2,3 um:zero minimum:500 name:RTF_STARVED : The event occurs when the controller enters the re-try FIFO starved condition. event:0x40 counters:0,1,2,3 um:zero minimum:500 name:IREQ_STARVED : The event occurs when the controller enters the instruction stream starved condition. event:0x41 counters:0,1,2,3 um:zero minimum:500 name:RRTF_STARVED : The event occurs when the controller enters the remote re-try FIFO starved condition. event:0x54 counters:0,1,2,3 um:zero minimum:500 name:UDN_PKT_SNT : Main processor finished sending a packet to the UDN. event:0x55 counters:0,1,2,3 um:zero minimum:500 name:UDN_SNT : UDN word sent to an output port. Participating ports are selected with the UDN_EVT_PORT_SEL field. event:0x56 counters:0,1,2,3 um:zero minimum:500 name:UDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the UDN_EVT_PORT_SEL field. event:0x57 counters:0,1,2,3 um:zero minimum:500 name:UDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the UDN_EVT_PORT_SEL field. event:0x58 counters:0,1,2,3 um:zero minimum:500 name:IDN_PKT_SNT : Main processor finished sending a packet to the IDN. event:0x59 counters:0,1,2,3 um:zero minimum:500 name:IDN_SNT : IDN word sent to an output port. Participating ports are selected with the IDN_EVT_PORT_SEL field. event:0x5a counters:0,1,2,3 um:zero minimum:500 name:IDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the IDN_EVT_PORT_SEL field. event:0x5b counters:0,1,2,3 um:zero minimum:500 name:IDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the IDN_EVT_PORT_SEL field. event:0x5c counters:0,1,2,3 um:zero minimum:500 name:MDN_PKT_SNT : Main processor finished sending a packet to the MDN. event:0x5d counters:0,1,2,3 um:zero minimum:500 name:MDN_SNT : MDN word sent to an output port. Participating ports are selected with the MDN_EVT_PORT_SEL field. event:0x5e counters:0,1,2,3 um:zero minimum:500 name:MDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the MDN_EVT_PORT_SEL field. event:0x5f counters:0,1,2,3 um:zero minimum:500 name:MDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the MDN_EVT_PORT_SEL field. event:0x60 counters:0,1,2,3 um:zero minimum:500 name:TDN_PKT_SNT : Main processor finished sending a packet to the TDN. event:0x61 counters:0,1,2,3 um:zero minimum:500 name:TDN_SNT : TDN word sent to an output port. Participating ports are selected with the TDN_EVT_PORT_SEL field. event:0x62 counters:0,1,2,3 um:zero minimum:500 name:TDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the TDN_EVT_PORT_SEL field. event:0x63 counters:0,1,2,3 um:zero minimum:500 name:TDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the TDN_EVT_PORT_SEL field. event:0x64 counters:0,1,2,3 um:zero minimum:500 name:VDN_PKT_SNT : Main processor finished sending a packet to the VDN. event:0x65 counters:0,1,2,3 um:zero minimum:500 name:VDN_SNT : VDN word sent to an output port. Participating ports are selected with the VDN_EVT_PORT_SEL field. event:0x66 counters:0,1,2,3 um:zero minimum:500 name:VDN_BUBBLE : Bubble detected on an output port. A bubble is defined as a cycle in which no data is being sent, but the first word of a packet has already traversed the switch. Participating ports are selected with the VDN_EVT_PORT_SEL field. event:0x67 counters:0,1,2,3 um:zero minimum:500 name:VDN_CONGESTION : Out of credit on an output port. Participating ports are selected with the VDN_EVT_PORT_SEL field. event:0x68 counters:0,1,2,3 um:zero minimum:500 name:UDN_DMUX_STALL : UDN Demux stalled due to buffer full event:0x69 counters:0,1,2,3 um:zero minimum:500 name:IDN_DMUX_STALL : IDN Demux stalled due to buffer full oprofile-1.3.0/events/tile/tilepro/unit_masks0000664000175000017500000000012712534404406016276 00000000000000# TILEPRO possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/tile/tile64/0000775000175000017500000000000013323173530013705 500000000000000oprofile-1.3.0/events/tile/tile64/events0000664000175000017500000001501112534404406015054 00000000000000# TILE64 Events event:0x00 counters:0,1 um:zero minimum:500 name:ZERO : Always zero - no event ever happens event:0x01 counters:0,1 um:zero minimum:20000 name:ONE : Always one - an event occurs every cycle event:0x02 counters:0,1 um:zero minimum:500 name:PASS_WRITTEN : The event indicates that the PASS SPR was written event:0x03 counters:0,1 um:zero minimum:500 name:FAIL_WRITTEN : The event indicates that the FAIL SPR was written event:0x04 counters:0,1 um:zero minimum:500 name:DONE_WRITTEN : The event indicates that the DONE SPR was written event:0x06 counters:0,1 um:zero minimum:500 name:MP_BUNDLE_RETIRED : The event occurs when instruction bundle is retired. event:0x0a counters:0,1 um:zero minimum:500 name:MP_UDN_READ_STALL : An event occurs every cycle that an instruction bundle is stalled on a UDN read. Multiple stall events may occur and be counted during the same cycle. This behavior is errata for TILE64 because the event is actually triggered only once per instruction stall rather than once per cycle of an instruction stall. event:0x0b counters:0,1 um:zero minimum:500 name:MP_IDN_READ_STALL : An event occurs every cycle that an instruction bundle is stalled on a IDN read. Multiple stall events may occur and be counted during the same cycle. This behavior is errata for TILE64 because the event is actually triggered only once per instruction stall rather than once per cycle of an instruction stall. event:0x0c counters:0,1 um:zero minimum:500 name:MP_SN_READ_STALL : An event occurs every cycle that an instruction bundle is stalled on a STN read. Multiple stall events may occur and be counted during the same cycle. This behavior is errata for TILE64 because the event is actually triggered only once per instruction stall rather than once per cycle of an instruction stall. event:0x0d counters:0,1 um:zero minimum:500 name:MP_UDN_WRITE_STALL : An event occurs every cycle that an instruction bundle is stalled on a UDN write. Multiple stall events may occur and be counted during the same cycle. event:0x0e counters:0,1 um:zero minimum:500 name:MP_IDN_WRITE_STALL : An event occurs every cycle that an instruction bundle is stalled on a IDN write. Multiple stall events may occur and be counted during the same cycle. event:0x0f counters:0,1 um:zero minimum:500 name:MP_SN_WRITE_STALL : An event occurs every cycle that an instruction bundle is stalled on a STN write. Multiple stall events may occur and be counted during the same cycle. event:0x10 counters:0,1 um:zero minimum:500 name:MP_DATA_CACHE_STALL : An event occurs every cycle that an instruction bundle is stalled on a data memory operation except for the cycles when a replay trap is being performed. Instructions that depend on the result of a load and are fired speculatively cause a reply trap if the request misses the L1 data cache and thus are not counted. The wait is 4 if the consumer of the load immediately follows the load or 3 if there is a cycle between the load issue and the consumer issue. Multiple stall events may occur and be counted during the same cycle. event:0x11 counters:0,1 um:zero minimum:500 name:MP_INSTRUCTION_CACHE_STALL : An event occurs every cycle that an instruction bundle is stalled on a instruction memory operation. Multiple stall events may occur and be counted during the same cycle. event:0x18 counters:0,1 um:zero minimum:500 name:TLB_HIT : The event occurs when the address of a data stream memory operation hits in the Data TLB. It includes speculative requests down branch paths. event:0x19 counters:0,1 um:zero minimum:500 name:TLB_EXC : The event occurs when the address of a data stream memory operation causes a Data TLB Exception including TLB Misses and protection violations. event:0x1a counters:0,1 um:zero minimum:500 name:HIT : This event occurs when a load instruction hits in the L1 Data cache. event:0x1b counters:0,1 um:zero minimum:500 name:MEM_REQ_RD : The event occurs when a read or TNS request to main memory leaves the Tile. event:0x1c counters:0,1 um:zero minimum:500 name:MEM_REQ_WR : The event occurs when a write request to main memory, including explicit flushes and non-cacheable stores, leaves the Tile. event:0x1d counters:0,1 um:zero minimum:500 name:MEM_REQ_VIC : The event occurs when a cache writeback to main memory, including victim writes or explicit flushes, leaves the Tile. event:0x1e counters:0,1 um:zero minimum:500 name:MISS_I : The event occurs when an instruction stream read misses the L2 cache due to an L1 instruction cache miss. event:0x1f counters:0,1 um:zero minimum:500 name:MISS_D_WR : The event occurs when a store request misses the L2 cache with the page cached locally or remotely. event:0x20 counters:0,1 um:zero minimum:500 name:MISS_D_RD : The event occurs when a load request or instruction prefetch misses the L2 cache due to an L1 miss with the page cached locally or remotely. event:0x21 counters:0,1 um:zero minimum:500 name:MISS_TDN : This event occurs when a snoop incoming on the TDN misses the L2 cache. event:0x22 counters:0,1 um:zero minimum:500 name:OLOC_REQ_RD : This event occurs when a remote read request is sent to another Tile, including load miss, data stream prefetch miss, and instruction stream prefetch miss. event:0x23 counters:0,1 um:zero minimum:500 name:OLOC_REQ_WR : This event occurs when a remote write request is sent to another Tile, including all stores whether they hit local or don't hit and write through the L2 cache. event:0x26 counters:0,1 um:zero minimum:500 name:L2_HIT : This event occurs when any cache access hits the L2 and includes MDN fills and Memory Fence operations locally or remotely issued. event:0x27 counters:0,1 um:zero minimum:500 name:L2_INV : The event occurs when an inval, flush, or finv hits a clean L2 cache block. event:0x28 counters:0,1 um:zero minimum:500 name:TDN_STARVED : The event occurs when a snoop is received and the controller enters the TDN starved condition. event:0x29 counters:0,1 um:zero minimum:500 name:DMA_STARVED : The event occurs when a DMA is received and the controller enters the starved condition. event:0x2a counters:0,1 um:zero minimum:500 name:MDN_STARVED : The event occurs when the controller enters the MDN starved condition. event:0x2b counters:0,1 um:zero minimum:500 name:RTF_STARVED : The event occurs when the controller enters the re-try FIFO starved condition. event:0x2c counters:0,1 um:zero minimum:500 name:IREQ_STARVED : The event occurs when the controller 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oprofile-1.3.0/events/s390/zEC12/unit_masks0000664000175000017500000000033012534404406015201 00000000000000# Copyright OProfile authors # Copyright (c) International Business Machines, 2013. # Contributed by Andreas Krebbel . # # S/390 Basic Mode Hardware Sampling unit masks # include:s390/z10 oprofile-1.3.0/events/s390/z196/0000775000175000017500000000000013323173530013050 500000000000000oprofile-1.3.0/events/s390/z196/events0000664000175000017500000000032312534404406014217 00000000000000# Copyright OProfile authors # Copyright (c) International Business Machines, 2011. # Contributed by Andreas Krebbel . # # zEnterprise z196 events for operf/ocount # include:s390/z10 oprofile-1.3.0/events/s390/z196/unit_masks0000664000175000017500000000033112534404406015067 00000000000000# Copyright OProfile authors# # Copyright (c) International Business Machines, 2011. # Contributed by Andreas Krebbel . # # S/390 Basic Mode Hardware Sampling unit masks # include:s390/z10 oprofile-1.3.0/events/s390/z13/0000775000175000017500000000000013323173530012754 500000000000000oprofile-1.3.0/events/s390/z13/events0000664000175000017500000000054613124774026014136 00000000000000# Copyright OProfile authors # Copyright (c) International Business Machines, 2016. # Contributed by Andreas Arnez . # # IBM Enterprise z13 events for operf/ocount # event:0x00 counters:0 um:zero minimum:19264 name:CPU_CYCLES : Processor cycles event:0x01 counters:0 um:zero minimum:19264 name:INSTRUCTIONS : Instructions completed oprofile-1.3.0/events/s390/z13/unit_masks0000664000175000017500000000032413124774026015001 00000000000000# Copyright OProfile authors # Copyright (c) International Business Machines, 2016. # Contributed by Andreas Arnez . # # S/390 Basic Mode Hardware Sampling unit masks # include:s390/z10 oprofile-1.3.0/events/s390/z10/0000775000175000017500000000000013323173530012751 500000000000000oprofile-1.3.0/events/s390/z10/events0000664000175000017500000000054412534404406014125 00000000000000# Copyright OProfile authors # Copyright (c) International Business Machines, 2011. # Contributed by Andreas Krebbel . # # IBM System z10 events for operf/ocount # event:0x00 counters:0 um:zero minimum:2202 name:CPU_CYCLES : Processor cycles event:0x01 counters:0 um:zero minimum:2202 name:INSTRUCTIONS : Instructions completed oprofile-1.3.0/events/s390/z10/unit_masks0000664000175000017500000000037712534404406015002 00000000000000# Copyright OProfile authors# # Copyright (c) International Business Machines, 2011. # Contributed by Andreas Krebbel . # # S/390 Basic Mode Hardware Sampling unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/i386/0000775000175000017500000000000013323173530012332 500000000000000oprofile-1.3.0/events/i386/ivybridge/0000775000175000017500000000000013323173530014316 500000000000000oprofile-1.3.0/events/i386/ivybridge/events0000664000175000017500000001304212534404406015467 00000000000000# # Event masks for the Intel "Ivy Bridge" micro architecture # # See http://ark.intel.com/ for help in identifying Ivy Bridge based CPUs # include:i386/arch_perfmon event:0x3 counters:cpuid um:ld_blocks minimum:100000 name:ld_blocks : Blocked loads event:0x5 counters:cpuid um:misalign_mem_ref minimum:2000000 name:misalign_mem_ref : Misaligned memory references event:0x7 counters:cpuid um:ld_blocks_partial minimum:100000 name:ld_blocks_partial : Partial loads event:0x8 counters:cpuid um:dtlb_load_misses minimum:2000000 name:dtlb_load_misses : D-TLB misses event:0xd counters:cpuid um:int_misc minimum:2000000 name:int_misc : Instruction decoder events event:0xe counters:0,1,2,3 um:uops_issued minimum:2000000 name:uops_issued : Uops issued event:0x14 counters:cpuid um:arith minimum:2000000 name:arith : Arithmetic event:0x24 counters:cpuid um:l2_rqsts minimum:200000 name:l2_rqsts : L2 cache requests event:0x27 counters:cpuid um:l2_store_lock_rqsts minimum:200000 name:l2_store_lock_rqsts : L2 cache store lock requests event:0x28 counters:cpuid um:l2_l1d_wb_rqsts minimum:200000 name:l2_l1d_wb_rqsts : writebacks from L1D to the L2 cache event:0x48 counters:2 um:l1d_pend_miss minimum:2000000 name:l1d_pend_miss : L1D miss oustandings event:0x49 counters:cpuid um:dtlb_store_misses minimum:2000000 name:dtlb_store_misses : Store misses in all DTLB levels that cause page walks event:0x4c counters:cpuid um:load_hit_pre minimum:100000 name:load_hit_pre : Load dispatches that hit fill buffer event:0x51 counters:cpuid um:l1d minimum:2000000 name:l1d : L1D data line replacements event:0x58 counters:cpuid um:move_elimination minimum:1000000 name:move_elimination : Integer move elimination event:0x5c counters:cpuid um:cpl_cycles minimum:2000000 name:cpl_cycles : Unhalted core cycles qualified by ring event:0x5e counters:cpuid um:rs_events minimum:2000000 name:rs_events : Reservation station event:0x5f counters:cpuid um:tlb_access minimum:100000 name:tlb_access : TLB access event:0x60 counters:cpuid um:offcore_requests_outstanding minimum:2000000 name:offcore_requests_outstanding : Offcore outstanding transactions event:0x63 counters:cpuid um:lock_cycles minimum:2000000 name:lock_cycles : Locked cycles event:0x79 counters:0,1,2,3 um:idq minimum:2000000 name:idq : Instruction Decode Queue (IDQ) event:0x80 counters:cpuid um:icache minimum:200000 name:icache : Instruction cache event:0x85 counters:cpuid um:itlb_misses minimum:2000000 name:itlb_misses : Misses at all ITLB levels that cause page walks event:0x87 counters:cpuid um:ild_stall minimum:2000000 name:ild_stall : Stalls caused by changing prefix length of the instruction. event:0x88 counters:cpuid um:br_inst_exec minimum:200000 name:br_inst_exec : Branch instructions event:0x89 counters:cpuid um:br_misp_exec minimum:200000 name:br_misp_exec : Mispredicted branch instructions event:0x9c counters:cpuid um:idq_uops_not_delivered minimum:2000000 name:idq_uops_not_delivered : Uops not delivered by the Frontend to the Backend of the machine, while there is no Backend stall event:0xa1 counters:cpuid um:uops_dispatched_port minimum:2000000 name:uops_dispatched_port : Cycles per thread when uops are dispatched to port event:0xa2 counters:cpuid um:resource_stalls minimum:2000000 name:resource_stalls : Resource-related stall cycles event:0xa3 counters:2 um:cycle_activity minimum:2000000 name:cycle_activity : Cycle activity event:0xab counters:cpuid um:dsb2mite_switches minimum:2000000 name:dsb2mite_switches : Decode Stream Buffer (DSB)-to-MITE switches event:0xac counters:cpuid um:dsb_fill minimum:2000000 name:dsb_fill : Decode Stream Buffer (DSB) fill event:0xae counters:cpuid um:itlb minimum:10000 name:itlb : Instruction TLB (ITLB) event:0xb0 counters:cpuid um:offcore_requests minimum:100000 name:offcore_requests : Uncore requests event:0xb1 counters:0,1,2,3 um:uops_executed minimum:2000000 name:uops_executed : Uops executed event:0xbd counters:cpuid um:tlb_flush minimum:10000 name:tlb_flush : DTLB flushes event:0xc1 counters:cpuid um:other_assists minimum:100000 name:other_assists : Microcode assists. event:0xc2 counters:0,1,2,3 um:uops_retired minimum:2000000 name:uops_retired : Retired uops. event:0xc3 counters:cpuid um:machine_clears minimum:100000 name:machine_clears : Machine clears event:0xc4 counters:cpuid um:br_inst_retired minimum:400000 name:br_inst_retired : Conditional branch instructions retired. event:0xc5 counters:cpuid um:br_misp_retired minimum:400000 name:br_misp_retired : Mispredicted conditional branch instructions retired. event:0xca counters:0,1,2,3 um:fp_assist minimum:100000 name:fp_assist : FPU assists event:0xcc counters:cpuid um:rob_misc_events minimum:2000000 name:rob_misc_events : ROB (Register Order Buffer) events event:0xd0 counters:0,1,2,3 um:mem_uops_retired minimum:2000000 name:mem_uops_retired : Memory Uops event:0xd1 counters:0,1,2,3 um:mem_load_uops_retired minimum:50000 name:mem_load_uops_retired : Memory load uops event:0xd2 counters:0,1,2,3 um:mem_load_uops_llc_hit_retired minimum:20000 name:mem_load_uops_llc_hit_retired : Memory load uops with LLC (Last Level Cache) hit event:0xd3 counters:0,1,2,3 um:mem_load_uops_llc_miss_retired minimum:10000 name:mem_load_uops_llc_miss_retired : Memory load uops with LLC (Last Level Cache) miss event:0xe6 counters:cpuid um:baclears minimum:100000 name:baclears : Frontend resteering event:0xf0 counters:cpuid um:l2_trans minimum:200000 name:l2_trans : L2 cache transactions event:0xf1 counters:cpuid um:l2_lines_in minimum:100000 name:l2_lines_in : L2 cache lines in event:0xf2 counters:cpuid um:l2_lines_out minimum:100000 name:l2_lines_out : L2 cache lines out oprofile-1.3.0/events/i386/ivybridge/unit_masks0000664000175000017500000005277212534404406016355 00000000000000# # Unit masks for the Intel "Ivy Bridge" micro architecture # # See http://ark.intel.com/ for help in identifying Ivy Bridge based CPUs # include:i386/arch_perfmon name:ld_blocks type:mandatory default:0x2 0x2 extra: store_forward loads blocked by overlapping with store buffer that cannot be forwarded name:misalign_mem_ref type:bitmask default:0x1 0x1 extra: loads Speculative cache line split load uops dispatched to L1 cache 0x2 extra: stores Speculative cache line split STA uops dispatched to L1 cache name:ld_blocks_partial type:mandatory default:0x1 0x1 extra: address_alias False dependencies in MOB due to partial compare on address name:dtlb_load_misses type:exclusive default:0x81 0x81 extra: demand_ld_miss_causes_a_walk Demand load Miss in all translation lookaside buffer (TLB) levels causes an page walk of any page size. 0x82 extra: demand_ld_walk_completed Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of any page size. 0x84 extra: demand_ld_walk_duration Demand load cycles page miss handler (PMH) is busy with this walk. name:int_misc type:exclusive default:recovery_cycles 0x3 extra:cmask=1 recovery_cycles Number of cycles waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...) 0x3 extra:cmask=1,edge recovery_stalls_count Number of occurences waiting for the checkpoints in Resource Allocation Table (RAT) to be recovered after Nuke due to all other cases except JEClear (e.g. whenever a ucode assist is needed like SSE exception, memory disambiguation, etc...) name:uops_issued type:exclusive default:any 0x1 extra: any Uops that Resource Allocation Table (RAT) issues to Reservation Station (RS) 0x1 extra:cmask=1,inv stall_cycles Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for the thread 0x1 extra:cmask=1,inv,any core_stall_cycles Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for all threads 0x10 extra: flags_merge Number of flags-merge uops being allocated. 0x20 extra: slow_lea Number of slow LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sources + immediate) regardless if as a result of LEA instruction or not. 0x40 extra: single_mul Number of Multiply packed/scalar single precision uops allocated name:arith type:bitmask default:fpu_div_active 0x1 extra: fpu_div_active Cycles when divider is busy executing divide operations 0x4 extra:cmask=1,edge fpu_div Divide operations executed name:l2_rqsts type:exclusive default:0x1 0x1 extra: demand_data_rd_hit Demand Data Read requests that hit L2 cache 0x3 extra: all_demand_data_rd Demand Data Read requests 0x4 extra: rfo_hit RFO requests that hit L2 cache 0x8 extra: rfo_miss RFO requests that miss L2 cache 0xc extra: all_rfo RFO requests to L2 cache 0x10 extra: code_rd_hit L2 cache hits when fetching instructions, code reads. 0x20 extra: code_rd_miss L2 cache misses when fetching instructions 0x30 extra: all_code_rd L2 code requests 0x40 extra: pf_hit Requests from the L2 hardware prefetchers that hit L2 cache 0x80 extra: pf_miss Requests from the L2 hardware prefetchers that miss L2 cache 0xc0 extra: all_pf Requests from L2 hardware prefetchers name:l2_store_lock_rqsts type:exclusive default:0x1 0x1 extra: miss RFOs that miss cache lines 0x8 extra: hit_m RFOs that hit cache lines in M state 0xf extra: all RFOs that access cache lines in any state name:l2_l1d_wb_rqsts type:exclusive default:0x1 0x1 extra: miss Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from the DCU.) 0x4 extra: hit_e Not rejected writebacks from L1D to L2 cache lines in E state 0x8 extra: hit_m Not rejected writebacks from L1D to L2 cache lines in M state 0xf extra: all Not rejected writebacks from L1D to L2 cache lines in any state. name:l1d_pend_miss type:exclusive default:pending_cycles 0x1 extra: pending L1D miss oustandings duration in cycles 0x1 extra:cmask=1 pending_cycles Cycles with L1D load Misses outstanding. 0x1 extra:cmask=1,edge occurences This event counts the number of L1D misses outstanding, using an edge detect to count transitions. name:dtlb_store_misses type:bitmask default:0x1 0x1 extra: miss_causes_a_walk Store misses in all DTLB levels that cause page walks 0x2 extra: walk_completed Store misses in all DTLB levels that cause completed page walks 0x4 extra: walk_duration Cycles when PMH is busy with page walks 0x10 extra: stlb_hit Store operations that miss the first TLB level but hit the second and do not cause page walks name:load_hit_pre type:bitmask default:0x1 0x1 extra: sw_pf Not software-prefetch load dispatches that hit forward buffer allocated for software prefetch 0x2 extra: hw_pf Not software-prefetch load dispatches that hit forward buffer allocated for hardware prefetch name:l1d type:mandatory default:0x1 0x1 extra: replacement L1D data line replacements name:move_elimination type:bitmask default:0x1 0x1 extra: int_not_eliminated Number of integer Move Elimination candidate uops that were not eliminated. 0x2 extra: simd_not_eliminated Number of SIMD Move Elimination candidate uops that were not eliminated. 0x4 extra: int_eliminated Number of integer Move Elimination candidate uops that were eliminated. 0x8 extra: simd_eliminated Number of SIMD Move Elimination candidate uops that were eliminated. name:cpl_cycles type:exclusive default:ring0 0x1 extra: ring0 Unhalted core cycles when the thread is in ring 0 0x1 extra:cmask=1,edge ring0_trans Number of intervals between processor halts while thread is in ring 0 0x2 extra: ring123 Unhalted core cycles when thread is in rings 1, 2, or 3 name:rs_events type:mandatory default:0x1 0x1 extra: empty_cycles Cycles when Reservation Station (RS) is empty for the thread name:tlb_access type:mandatory default:0x4 0x4 extra: load_stlb_hit Load operations that miss the first DTLB level but hit the second and do not cause page walks name:offcore_requests_outstanding type:exclusive default:cycles_with_demand_data_rd 0x1 extra: demand_data_rd Offcore outstanding Demand Data Read transactions in uncore queue. 0x1 extra:cmask=1 cycles_with_demand_data_rd Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore 0x2 extra: demand_code_rd Offcore outstanding code reads transactions in SuperQueue (SQ), queue to uncore, every cycle 0x4 extra: demand_rfo Offcore outstanding RFO store transactions in SuperQueue (SQ), queue to uncore 0x4 extra:cmask=1 cycles_with_demand_rfo Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle 0x8 extra: all_data_rd Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore 0x8 extra:cmask=1 cycles_with_data_rd Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore name:lock_cycles type:bitmask default:0x1 0x1 extra: split_lock_uc_lock_duration Cycles when L1 and L2 are locked due to UC or split lock 0x2 extra: cache_lock_duration Cycles when L1D is locked name:idq type:exclusive default:empty 0x2 extra: empty Instruction Decode Queue (IDQ) empty cycles 0x4 extra: mite_uops Uops delivered to Instruction Decode Queue (IDQ) from MITE path 0x4 extra:cmask=1 mite_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from MITE path 0x8 extra: dsb_uops Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path 0x8 extra:cmask=1 dsb_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path 0x10 extra: ms_dsb_uops Uops initiated by Decode Stream Buffer (DSB) that are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x10 extra:cmask=1 ms_dsb_cycles Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x10 extra:cmask=1,edge ms_dsb_occur Deliveries to Instruction Decode Queue (IDQ) initiated by Decode Stream Buffer (DSB) while Microcode Sequenser (MS) is busy 0x18 extra:cmask=1 all_dsb_cycles_any_uops Cycles Decode Stream Buffer (DSB) is delivering any Uop 0x18 extra:cmask=4 all_dsb_cycles_4_uops Cycles Decode Stream Buffer (DSB) is delivering 4 Uops 0x20 extra: ms_mite_uops Uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x24 extra:cmask=1 all_mite_cycles_any_uops Cycles MITE is delivering any Uop 0x24 extra:cmask=4 all_mite_cycles_4_uops Cycles MITE is delivering 4 Uops 0x30 extra: ms_uops Uops delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x30 extra:cmask=1 ms_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x3c extra: mite_all_uops Uops delivered to Instruction Decode Queue (IDQ) from MITE path name:icache type:mandatory default:0x2 0x2 extra: misses Instruction cache, streaming buffer and victim cache misses name:itlb_misses type:bitmask default:0x1 0x1 extra: miss_causes_a_walk Misses at all ITLB levels that cause page walks 0x2 extra: walk_completed Misses in all ITLB levels that cause completed page walks 0x4 extra: walk_duration Cycles when PMH is busy with page walks 0x10 extra: stlb_hit Operations that miss the first ITLB level but hit the second and do not cause any page walks name:ild_stall type:bitmask default:0x1 0x1 extra: lcp Stalls caused by changing prefix length of the instruction. 0x4 extra: iq_full Stall cycles because IQ is full name:br_inst_exec type:exclusive default:0x41 0x41 extra: nontaken_conditional Not taken macro-conditional branches 0x81 extra: taken_conditional Taken speculative and retired macro-conditional branches 0x82 extra: taken_direct_jump Taken speculative and retired macro-conditional branch instructions excluding calls and indirects 0x84 extra: taken_indirect_jump_non_call_ret Taken speculative and retired indirect branches excluding calls and returns 0x88 extra: taken_indirect_near_return Taken speculative and retired indirect branches with return mnemonic 0x90 extra: taken_direct_near_call Taken speculative and retired direct near calls 0xa0 extra: taken_indirect_near_call Taken speculative and retired indirect calls 0xc1 extra: all_conditional Speculative and retired macro-conditional branches 0xc2 extra: all_direct_jmp Speculative and retired macro-unconditional branches excluding calls and indirects 0xc4 extra: all_indirect_jump_non_call_ret Speculative and retired indirect branches excluding calls and returns 0xc8 extra: all_indirect_near_return Speculative and retired indirect return branches. 0xd0 extra: all_direct_near_call Speculative and retired direct near calls 0xff extra: all_branches Speculative and retired branches name:br_misp_exec type:exclusive default:0x41 0x41 extra: nontaken_conditional Not taken speculative and retired mispredicted macro conditional branches 0x81 extra: taken_conditional Taken speculative and retired mispredicted macro conditional branches 0x84 extra: taken_indirect_jump_non_call_ret Taken speculative and retired mispredicted indirect branches excluding calls and returns 0x88 extra: taken_return_near Taken speculative and retired mispredicted indirect branches with return mnemonic 0xa0 extra: taken_indirect_near_call Taken speculative and retired mispredicted indirect calls 0xc1 extra: all_conditional Speculative and retired mispredicted macro conditional branches 0xc4 extra: all_indirect_jump_non_call_ret Mispredicted indirect branches excluding calls and returns 0xff extra: all_branches Speculative and retired mispredicted macro conditional branches name:idq_uops_not_delivered type:exclusive default:core 0x1 extra: core Uops not delivered by the Frontend to the Backend of the machine, while there is no Backend stall 0x1 extra:cmask=1 cycles_le_3_uop_deliv.core Cycles with 3 or less uops delivered by the Frontend to the Backend of the machine, while there is no Backend stall 0x1 extra:cmask=1,inv cycles_fe_was_ok Cycles with 4 uops delivered by the Frontend to the Backend of the machine, or the Backend was stalling 0x1 extra:cmask=2 cycles_le_2_uop_deliv.core Cycles with 2 or less uops delivered by the Frontend to the Backend of the machine, while there is no Backend stall 0x1 extra:cmask=3 cycles_le_1_uop_deliv.core Cycles with 1 or less uops delivered by the Frontend to the Backend of the machine, while there is no Backend stall 0x1 extra:cmask=4 cycles_0_uops_deliv.core Cycles with no uops delivered by the Frontend to the Backend of the machine, while there is no Backend stall name:uops_dispatched_port type:exclusive default:port_0 0x1 extra: port_0 Cycles per thread when uops are dispatched to port 0 0x1 extra:any port_0_core Cycles per core when uops are dispatched to port 0 0x2 extra: port_1 Cycles per thread when uops are dispatched to port 1 0x2 extra:any port_1_core Cycles per core when uops are dispatched to port 1 0xc extra: port_2 Cycles per thread when load or STA uops are dispatched to port 2 0xc extra:any port_2_core Cycles per core when load or STA uops are dispatched to port 2 0x30 extra: port_3 Cycles per thread when load or STA uops are dispatched to port 3 0x30 extra:any port_3_core Cycles per core when load or STA uops are dispatched to port 3 0x40 extra: port_4 Cycles per thread when uops are dispatched to port 4 0x40 extra:any port_4_core Cycles per core when uops are dispatched to port 4 0x80 extra: port_5 Cycles per thread when uops are dispatched to port 5 0x80 extra:any port_5_core Cycles per core when uops are dispatched to port 5 name:resource_stalls type:bitmask default:0x1 0x1 extra: any Resource-related stall cycles 0x4 extra: rs Cycles stalled due to no eligible RS entry available. 0x8 extra: sb Cycles stalled due to no store buffers available. (not including draining form sync). 0x10 extra: rob Cycles stalled due to re-order buffer full. name:cycle_activity type:exclusive default:0x1 0x1 extra:cmask=1 cycles_l2_pending Cycles with pending L2 cache miss loads. 0x2 extra:cmask=2 cycles_ldm_pending Cycles with pending memory loads. 0x4 extra:cmask=4 cycles_no_execute Total execution stalls 0x5 extra:cmask=5 stalls_l2_pending Execution stalls due to L2 cache misses. 0x6 extra:cmask=6 stalls_ldm_pending Execution stalls due to memory subsystem. 0x8 extra:cmask=8 cycles_l1d_pending Cycles with pending L1 cache miss loads. 0xc extra:cmask=c stalls_l1d_pending Execution stalls due to L1 data cache misses name:dsb2mite_switches type:mandatory default:0x1 0x1 extra: count Decode Stream Buffer (DSB)-to-MITE switches name:dsb_fill type:mandatory default:0x8 0x8 extra: exceed_dsb_lines Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stream Buffer (DSB) lines name:itlb type:mandatory default:0x1 0x1 extra: itlb_flush Flushing of the Instruction TLB (ITLB) pages, includes 4k/2M/4M pages. name:offcore_requests type:bitmask default:0x1 0x1 extra: demand_data_rd Demand Data Read requests sent to uncore 0x2 extra: demand_code_rd Cacheable and noncachaeble code read requests 0x4 extra: demand_rfo Demand RFO requests including regular RFOs, locks, ItoM 0x8 extra: all_data_rd Demand and prefetch data reads name:uops_executed type:exclusive default:thread 0x1 extra: thread Counts the number of uops to be executed per-thread each cycle. 0x1 extra:cmask=1 cycles_ge_1_uop_exec Cycles where at least 1 uop was executed per-thread 0x1 extra:cmask=1,inv stall_cycles Counts number of cycles no uops were dispatched to be executed on this thread. 0x1 extra:cmask=2 cycles_ge_2_uops_exec Cycles where at least 2 uops were executed per-thread 0x1 extra:cmask=3 cycles_ge_3_uops_exec Cycles where at least 3 uops were executed per-thread 0x1 extra:cmask=4 cycles_ge_4_uops_exec Cycles where at least 4 uops were executed per-thread 0x2 extra: core Number of uops executed on the core. name:tlb_flush type:bitmask default:0x1 0x1 extra: dtlb_thread DTLB flush attempts of the thread-specific entries 0x20 extra: stlb_any STLB flush attempts name:other_assists type:bitmask default:0x8 0x8 extra: avx_store Number of AVX memory assist for stores. AVX microcode assist is being invoked whenever the hardware is unable to properly handle AVX-256b operations. 0x10 extra: avx_to_sse Number of transitions from AVX-256 to legacy SSE when penalty applicable. 0x20 extra: sse_to_avx Number of transitions from SSE to AVX-256 when penalty applicable. name:uops_retired type:exclusive default:all 0x1 extra: all Actually retired uops. 0x1 extra:cmask=1,inv stall_cycles Cycles without actually retired uops. 0x1 extra:cmask=1,inv,any core_stall_cycles Cycles without actually retired uops. 0x1 extra:cmask=10,inv total_cycles Cycles with less than 10 actually retired uops. 0x2 extra: retire_slots Retirement slots used. name:machine_clears type:bitmask default:0x2 0x2 extra: memory_ordering Counts the number of machine clears due to memory order conflicts. 0x4 extra: smc Self-modifying code (SMC) detected. 0x20 extra: maskmov This event counts the number of executed Intel AVX masked load operations that refer to an illegal address range with the mask bits set to 0. name:br_inst_retired type:exclusive default:0x1 0x1 extra: conditional Conditional branch instructions retired. 0x2 extra: near_call_r3 Direct and indirect macro near call instructions retired (captured in ring 3). 0x2 extra: near_call Direct and indirect near call instructions retired. 0x8 extra: near_return Return instructions retired. 0x10 extra: not_taken Not taken branch instructions retired. 0x20 extra: near_taken Taken branch instructions retired. 0x40 extra: far_branch Far branch instructions retired. name:br_misp_retired type:bitmask default:0x1 0x1 extra: conditional Mispredicted conditional branch instructions retired. 0x20 extra: near_taken number of near branch instructions retired that were mispredicted and taken. name:fp_assist type:exclusive default:0x1e 0x2 extra: x87_output Number of X87 assists due to output value. 0x4 extra: x87_input Number of X87 assists due to input value. 0x8 extra: simd_output Number of SIMD FP assists due to Output values 0x10 extra: simd_input Number of SIMD FP assists due to input values 0x1e extra:cmask=1 any Cycles with any input/output SSE or FP assist name:rob_misc_events type:mandatory default:0x20 0x20 extra: lbr_inserts Count cases of saving new LBR name:mem_uops_retired type:exclusive default:0x81 0x11 extra: stlb_miss_loads Load uops with true STLB miss retired to architected path. 0x12 extra: stlb_miss_stores Store uops with true STLB miss retired to architected path. 0x21 extra: lock_loads Load uops with locked access retired to architected path. 0x41 extra: split_loads Line-splitted load uops retired to architected path. 0x42 extra: split_stores Line-splitted store uops retired to architected path. 0x81 extra: all_loads Load uops retired to architected path with filter on bits 0 and 1 applied. 0x82 extra: all_stores Store uops retired to architected path with filter on bits 0 and 1 applied. name:mem_load_uops_retired type:bitmask default:0x1 0x1 extra: l1_hit Retired load uops with L1 cache hits as data sources. 0x2 extra: l2_hit Retired load uops with L2 cache hits as data sources. 0x4 extra: llc_hit Retired load uops which data sources were data hits in LLC without snoops required. 0x40 extra: hit_lfb Retired load uops which data sources were load uops missed L1 but hit forward buffer due to preceding miss to the same cache line with data not ready. name:mem_load_uops_llc_hit_retired type:bitmask default:0x1 0x1 extra: xsnp_miss Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core cache. 0x2 extra: xsnp_hit Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core cache. 0x4 extra: xsnp_hitm Retired load uops which data sources were HitM responses from shared LLC. 0x8 extra: xsnp_none Retired load uops which data sources were hits in LLC without snoops required. name:mem_load_uops_llc_miss_retired type:mandatory default:0x1 0x1 extra: local_dram Data from local DRAM either Snoop not needed or Snoop Miss (RspI) name:baclears type:mandatory default:0x1f 0x1f extra: any Counts the total number when the front end is resteered, mainly when the BPU cannot provide a correct prediction and this is corrected by other branch handling mechanisms at the front end. name:l2_trans type:bitmask default:0x80 0x1 extra: demand_data_rd Demand Data Read requests that access L2 cache 0x2 extra: rfo RFO requests that access L2 cache 0x4 extra: code_rd L2 cache accesses when fetching instructions 0x8 extra: all_pf L2 or LLC HW prefetches that access L2 cache 0x10 extra: l1d_wb L1D writebacks that access L2 cache 0x20 extra: l2_fill L2 fill requests that access L2 cache 0x40 extra: l2_wb L2 writebacks that access L2 cache 0x80 extra: all_requests Transactions accessing L2 pipe name:l2_lines_in type:exclusive default:0x7 0x1 extra: i L2 cache lines in I state filling L2 0x2 extra: s L2 cache lines in S state filling L2 0x4 extra: e L2 cache lines in E state filling L2 0x7 extra: all L2 cache lines filling L2 name:l2_lines_out type:exclusive default:0x1 0x1 extra: demand_clean Clean L2 cache lines evicted by demand 0x2 extra: demand_dirty Dirty L2 cache lines evicted by demand 0x4 extra: pf_clean Clean L2 cache lines evicted by L2 prefetch 0x8 extra: pf_dirty Dirty L2 cache lines evicted by L2 prefetch 0xa extra: dirty_all Dirty L2 cache lines filling the L2 oprofile-1.3.0/events/i386/ppro/0000775000175000017500000000000013323173530013312 500000000000000oprofile-1.3.0/events/i386/ppro/events0000664000175000017500000001523012534404406014464 00000000000000# Pentium Pro events # event:0x79 counters:0,1 um:zero minimum:6000 name:CPU_CLK_UNHALTED : clocks processor is not halted event:0x43 counters:0,1 um:zero minimum:500 name:DATA_MEM_REFS : all memory references, cachable and non event:0x45 counters:0,1 um:zero minimum:500 name:DCU_LINES_IN : total lines allocated in the DCU event:0x46 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_IN : number of M state lines allocated in DCU event:0x47 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_OUT : number of M lines evicted from the DCU event:0x48 counters:0,1 um:zero minimum:500 name:DCU_MISS_OUTSTANDING : number of cycles while DCU miss outstanding event:0x80 counters:0,1 um:zero minimum:500 name:IFU_IFETCH : number of non/cachable instruction fetches event:0x81 counters:0,1 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x85 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled event:0x28 counters:0,1 um:mesi minimum:500 name:L2_IFETCH : number of L2 instruction fetches event:0x29 counters:0,1 um:mesi minimum:500 name:L2_LD : number of L2 data loads event:0x2a counters:0,1 um:mesi minimum:500 name:L2_ST : number of L2 data stores event:0x24 counters:0,1 um:zero minimum:500 name:L2_LINES_IN : number of allocated lines in L2 event:0x26 counters:0,1 um:zero minimum:500 name:L2_LINES_OUT : number of recovered lines from L2 event:0x25 counters:0,1 um:zero minimum:500 name:L2_M_LINES_INM : number of modified lines allocated in L2 event:0x27 counters:0,1 um:zero minimum:500 name:L2_M_LINES_OUTM : number of modified lines removed from L2 event:0x2e counters:0,1 um:mesi minimum:500 name:L2_RQSTS : number of L2 requests event:0x21 counters:0,1 um:zero minimum:500 name:L2_ADS : number of L2 address strobes event:0x22 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY : number of cycles data bus was busy event:0x23 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY_RD : cycles data bus was busy in xfer from L2 to CPU event:0x62 counters:0,1 um:ebl minimum:500 name:BUS_DRDY_CLOCKS : number of clocks DRDY is asserted event:0x63 counters:0,1 um:ebl minimum:500 name:BUS_LOCK_CLOCKS : number of clocks LOCK is asserted event:0x60 counters:0,1 um:zero minimum:500 name:BUS_REQ_OUTSTANDING : number of outstanding bus requests event:0x65 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BRD : number of burst read transactions event:0x66 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_RFO : number of read for ownership transactions event:0x67 counters:0,1 um:ebl minimum:500 name:BUS_TRANS_WB : number of write back transactions event:0x68 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_IFETCH : number of instruction fetch transactions event:0x69 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_INVAL : number of invalidate transactions event:0x6a counters:0,1 um:ebl minimum:500 name:BUS_TRAN_PWR : number of partial write transactions event:0x6b counters:0,1 um:ebl minimum:500 name:BUS_TRANS_P : number of partial transactions event:0x6c counters:0,1 um:ebl minimum:500 name:BUS_TRANS_IO : number of I/O transactions event:0x6d counters:0,1 um:ebl minimum:500 name:BUS_TRANS_DEF : number of deferred transactions event:0x6e counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BURST : number of burst transactions event:0x70 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_ANY : number of all transactions event:0x6f counters:0,1 um:ebl minimum:500 name:BUS_TRAN_MEM : number of memory transactions event:0x64 counters:0,1 um:zero minimum:500 name:BUS_DATA_RCV : bus cycles this processor is receiving data event:0x61 counters:0,1 um:zero minimum:500 name:BUS_BNR_DRV : bus cycles this processor is driving BNR pin event:0x7a counters:0,1 um:zero minimum:500 name:BUS_HIT_DRV : bus cycles this processor is driving HIT pin event:0x7b counters:0,1 um:zero minimum:500 name:BUS_HITM_DRV : bus cycles this processor is driving HITM pin event:0x7e counters:0,1 um:zero minimum:500 name:BUS_SNOOP_STALL : cycles during bus snoop stall event:0xc1 counters:0 um:zero minimum:3000 name:COMP_FLOP_RET : number of computational FP operations retired event:0x10 counters:0 um:zero minimum:3000 name:FLOPS : number of computational FP operations executed event:0x11 counters:1 um:zero minimum:500 name:FP_ASSIST : number of FP exceptions handled by microcode event:0x12 counters:1 um:zero minimum:1000 name:MUL : number of multiplies event:0x13 counters:1 um:zero minimum:500 name:DIV : number of divides event:0x14 counters:0 um:zero minimum:1000 name:CYCLES_DIV_BUSY : cycles divider is busy event:0x03 counters:0,1 um:zero minimum:500 name:LD_BLOCKS : number of store buffer blocks event:0x04 counters:0,1 um:zero minimum:500 name:SB_DRAINS : number of store buffer drain cycles event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED : number of instructions retired event:0xc2 counters:0,1 um:zero minimum:6000 name:UOPS_RETIRED : number of UOPs retired event:0xd0 counters:0,1 um:zero minimum:6000 name:INST_DECODED : number of instructions decoded event:0xc8 counters:0,1 um:zero minimum:500 name:HW_INT_RX : number of hardware interrupts received event:0xc6 counters:0,1 um:zero minimum:500 name:CYCLES_INT_MASKED : cycles interrupts are disabled event:0xc7 counters:0,1 um:zero minimum:500 name:CYCLES_INT_PENDING_AND_MASKED : cycles interrupts are disabled with pending interrupts event:0xc4 counters:0,1 um:zero minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired event:0xc9 counters:0,1 um:zero minimum:500 name:BR_TAKEN_RETIRED : number of taken branches retired event:0xca counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_TAKEN_RET : number of taken mispredictions branches retired event:0xe0 counters:0,1 um:zero minimum:500 name:BR_INST_DECODED : number of branch instructions decoded event:0xe2 counters:0,1 um:zero minimum:500 name:BTB_MISSES : number of branches that miss the BTB event:0xe4 counters:0,1 um:zero minimum:500 name:BR_BOGUS : number of bogus branches event:0xe6 counters:0,1 um:zero minimum:500 name:BACLEARS : number of times BACLEAR is asserted event:0xa2 counters:0,1 um:zero minimum:500 name:RESOURCE_STALLS : cycles during resource related stalls event:0xd2 counters:0,1 um:zero minimum:500 name:PARTIAL_RAT_STALLS : cycles or events for partial stalls event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads oprofile-1.3.0/events/i386/ppro/unit_masks0000664000175000017500000000054612534404406015341 00000000000000# Pentium Pro possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:mesi type:bitmask default:0x0f 0x08 (M)odified cache state 0x04 (E)xclusive cache state 0x02 (S)hared cache state 0x01 (I)nvalid cache state 0x0f All cache states name:ebl type:exclusive default:0x20 0x00 self-generated transactions 0x20 any transactions oprofile-1.3.0/events/i386/broadwell/0000775000175000017500000000000013323173530014305 500000000000000oprofile-1.3.0/events/i386/broadwell/events0000664000175000017500000001124012534404406015454 00000000000000# # Intel "Broadwell" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Broadwell based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # include:i386/arch_perfmon event:0x03 counters:cpuid um:ld_blocks minimum:100003 name:ld_blocks : event:0x05 counters:cpuid um:misalign_mem_ref minimum:2000003 name:misalign_mem_ref : event:0x07 counters:cpuid um:one minimum:100003 name:ld_blocks_partial_address_alias : event:0x08 counters:cpuid um:dtlb_load_misses minimum:2000003 name:dtlb_load_misses : event:0x0d counters:cpuid um:x03 minimum:2000003 name:int_misc_recovery_cycles : event:0x0e counters:cpuid um:uops_issued minimum:2000003 name:uops_issued : event:0x14 counters:cpuid um:one minimum:2000003 name:arith_fpu_div_active : event:0x24 counters:cpuid um:l2_rqsts minimum:200003 name:l2_rqsts : event:0x27 counters:cpuid um:x50 minimum:200003 name:l2_demand_rqsts_wb_hit : event:0x48 counters:2 um:l1d_pend_miss minimum:2000003 name:l1d_pend_miss : event:0x49 counters:cpuid um:dtlb_store_misses minimum:100003 name:dtlb_store_misses : event:0x4c counters:cpuid um:x02 minimum:100003 name:load_hit_pre_hw_pf : event:0x4f counters:cpuid um:x10 minimum:2000003 name:ept_walk_cycles : event:0x51 counters:cpuid um:one minimum:2000003 name:l1d_replacement : event:0x54 counters:cpuid um:tx_mem minimum:2000003 name:tx_mem : event:0x58 counters:cpuid um:move_elimination minimum:1000003 name:move_elimination : event:0x5c counters:cpuid um:cpl_cycles minimum:2000003 name:cpl_cycles : event:0x5d counters:cpuid um:tx_exec minimum:2000003 name:tx_exec : event:0x5e counters:cpuid um:rs_events minimum:2000003 name:rs_events : event:0x60 counters:cpuid um:offcore_requests_outstanding minimum:2000003 name:offcore_requests_outstanding : event:0x63 counters:cpuid um:lock_cycles minimum:2000003 name:lock_cycles : event:0x79 counters:0,1,2,3 um:idq minimum:2000003 name:idq : event:0x80 counters:cpuid um:x02 minimum:200003 name:icache_misses : event:0x85 counters:cpuid um:itlb_misses minimum:100003 name:itlb_misses : event:0x87 counters:cpuid um:one minimum:2000003 name:ild_stall_lcp : event:0x88 counters:cpuid um:br_inst_exec minimum:200003 name:br_inst_exec : event:0x89 counters:cpuid um:br_misp_exec minimum:200003 name:br_misp_exec : event:0x9c counters:0,1,2,3 um:idq_uops_not_delivered minimum:2000003 name:idq_uops_not_delivered : event:0xa1 counters:cpuid um:uops_executed_port minimum:2000003 name:uops_executed_port : event:0xa1 counters:cpuid um:uops_dispatched_port minimum:2000003 name:uops_dispatched_port : event:0xa2 counters:cpuid um:resource_stalls minimum:2000003 name:resource_stalls : event:0xa3 counters:2 um:cycle_activity minimum:2000003 name:cycle_activity : event:0xa8 counters:cpuid um:lsd minimum:2000003 name:lsd : event:0xab counters:cpuid um:x02 minimum:2000003 name:dsb2mite_switches_penalty_cycles : event:0xae counters:cpuid um:one minimum:100007 name:itlb_itlb_flush : event:0xb0 counters:cpuid um:offcore_requests minimum:100003 name:offcore_requests : event:0xb1 counters:cpuid um:uops_executed minimum:2000003 name:uops_executed : event:0xbc counters:0,1,2,3 um:page_walker_loads minimum:2000003 name:page_walker_loads : event:0xc0 counters:1 um:inst_retired minimum:2000003 name:inst_retired : event:0xc1 counters:cpuid um:other_assists minimum:100003 name:other_assists : event:0xc2 counters:cpuid um:uops_retired minimum:2000003 name:uops_retired : event:0xc3 counters:cpuid um:machine_clears minimum:2000003 name:machine_clears : event:0xc4 counters:cpuid um:br_inst_retired minimum:400009 name:br_inst_retired : event:0xc5 counters:cpuid um:br_misp_retired minimum:400009 name:br_misp_retired : event:0xc8 counters:cpuid um:hle_retired minimum:2000003 name:hle_retired : event:0xc9 counters:0,1,2,3 um:rtm_retired minimum:2000003 name:rtm_retired : event:0xca counters:cpuid um:fp_assist minimum:100003 name:fp_assist : event:0xcc counters:cpuid um:x20 minimum:2000003 name:rob_misc_events_lbr_inserts : event:0xd0 counters:0,1,2,3 um:mem_uops_retired minimum:2000003 name:mem_uops_retired : event:0xd1 counters:0,1,2,3 um:mem_load_uops_retired minimum:2000003 name:mem_load_uops_retired : event:0xd2 counters:0,1,2,3 um:mem_load_uops_l3_hit_retired minimum:100003 name:mem_load_uops_l3_hit_retired : event:0xd3 counters:0,1,2,3 um:mem_load_uops_l3_miss_retired minimum:100007 name:mem_load_uops_l3_miss_retired : event:0xe6 counters:cpuid um:x1f minimum:100003 name:baclears_any : event:0xf0 counters:cpuid um:l2_trans minimum:200003 name:l2_trans : event:0xf1 counters:cpuid um:l2_lines_in minimum:100003 name:l2_lines_in : event:0xf2 counters:cpuid um:x05 minimum:100003 name:l2_lines_out_demand_clean : oprofile-1.3.0/events/i386/broadwell/unit_masks0000664000175000017500000013465612546756165016365 00000000000000# # Unit masks for the Intel "Broadwell" micro architecture # # See http://ark.intel.com/ for help in identifying Broadwell based CPUs # include:i386/arch_perfmon name:x02 type:mandatory default:0x2 0x2 No unit mask name:x03 type:mandatory default:0x3 0x3 No unit mask name:x05 type:mandatory default:0x5 0x5 No unit mask name:x10 type:mandatory default:0x10 0x10 No unit mask name:x1f type:mandatory default:0x1f 0x1f No unit mask name:x20 type:mandatory default:0x20 0x20 No unit mask name:x50 type:mandatory default:0x50 0x50 No unit mask name:ld_blocks type:exclusive default:0x2 0x2 extra: store_forward This event counts how many times the load operation got the true Block-on-Store blocking code preventing store forwarding. This includes cases when: - preceding store conflicts with the load (incomplete overlap); - store forwarding is impossible due to u-arch limitations; - preceding lock RMW operations are not forwarded; - store has the no-forward bit set (uncacheable/page-split/masked stores); - all-blocking stores are used (mostly, fences and port I/O); and others. The most common case is a load blocked due to its address range overlapping with a preceding smaller uncompleted store. Note: This event does not take into account cases of out-of-SW-control (for example, SbTailHit), unknown physical STA, and cases of blocking loads on store due to being non-WB memory type or a lock. These cases are covered by other events. See the table of not supported store forwards in the Optimization Guide. 0x8 extra: no_sr This event counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. name:misalign_mem_ref type:exclusive default:0x1 0x1 extra: loads This event counts speculative cache-line split load uops dispatched to the L1 cache. 0x2 extra: stores This event counts speculative cache line split store-address (STA) uops dispatched to the L1 cache. name:dtlb_load_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk This event counts load misses in all DTLB levels that cause page walks of any page size (4K/2M/4M/1G). 0x2 extra: walk_completed_4k This event counts load misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can end with or without a fault. 0x10 extra: walk_duration This event counts the number of cycles while PMH is busy with the page walk. 0x20 extra: stlb_hit_4k Load misses that miss the DTLB and hit the STLB (4K) 0xe extra: walk_completed Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of any page size. 0x60 extra: stlb_hit Load operations that miss the first DTLB level but hit the second and do not cause page walks name:uops_issued type:exclusive default:any 0x1 extra: any This event counts the number of Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS). 0x10 extra: flags_merge Number of flags-merge uops being allocated. Such uops considered perf sensitive; added by GSR u-arch. 0x20 extra: slow_lea Number of slow LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sources + immediate) regardless if as a result of LEA instruction or not. 0x40 extra: single_mul Number of Multiply packed/scalar single precision uops allocated 0x1 extra:cmask=1,inv stall_cycles This event counts cycles during which the Resource Allocation Table (RAT) does not issue any Uops to the reservation station (RS) for the current thread. name:l2_rqsts type:exclusive default:0x21 0x21 extra: demand_data_rd_miss This event counts the number of demand Data Read requests that miss L2 cache. Only not rejected loads are counted. 0x41 extra: demand_data_rd_hit This event counts the number of demand Data Read requests that hit L2 cache. Only not rejected loads are counted. 0x30 extra: l2_pf_miss This event counts the number of requests from the L2 hardware prefetchers that miss L2 cache. 0x50 extra: l2_pf_hit This event counts the number of requests from the L2 hardware prefetchers that hit L2 cache. L3 prefetch new types 0xe1 extra: all_demand_data_rd This event counts the number of demand Data Read requests (including requests from L1D hardware prefetchers). These loads may hit or miss L2 cache. Only non rejected loads are counted. 0xe2 extra: all_rfo This event counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches. 0xe4 extra: all_code_rd This event counts the total number of L2 code requests. 0xf8 extra: all_pf This event counts the total number of requests from the L2 hardware prefetchers. 0x42 extra: rfo_hit RFO requests that hit L2 cache 0x22 extra: rfo_miss RFO requests that miss L2 cache 0x44 extra: code_rd_hit L2 cache hits when fetching instructions, code reads. 0x24 extra: code_rd_miss L2 cache misses when fetching instructions 0x27 extra: all_demand_miss Demand requests that miss L2 cache 0xe7 extra: all_demand_references Demand requests to L2 cache 0x3f extra: miss All requests that miss L2 cache 0xff extra: references All L2 requests name:l1d_pend_miss type:exclusive default:pending 0x1 extra: pending This event counts duration of L1D miss outstanding, that is each cycle number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand; from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type. 0x1 extra:cmask=1 pending_cycles This event counts duration of L1D miss outstanding in cycles. name:dtlb_store_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk This event counts store misses in all DTLB levels that cause page walks of any page size (4K/2M/4M/1G). 0x2 extra: walk_completed_4k This event counts store misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can end with or without a fault. 0x10 extra: walk_duration This event counts the number of cycles while PMH is busy with the page walk. 0x20 extra: stlb_hit_4k Store misses that miss the DTLB and hit the STLB (4K) 0xe extra: walk_completed Store misses in all DTLB levels that cause completed page walks 0x60 extra: stlb_hit Store operations that miss the first TLB level but hit the second and do not cause page walks name:tx_mem type:exclusive default:0x1 0x1 extra: abort_conflict Number of times a TSX line had a cache conflict 0x2 extra: abort_capacity_write Number of times a TSX Abort was triggered due to an evicted line caused by a transaction overflow 0x4 extra: abort_hle_store_to_elided_lock Number of times a TSX Abort was triggered due to a non-release/commit store to lock 0x8 extra: abort_hle_elision_buffer_not_empty Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty 0x10 extra: abort_hle_elision_buffer_mismatch Number of times a TSX Abort was triggered due to release/commit but data and address mismatch 0x20 extra: abort_hle_elision_buffer_unsupported_alignment Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer 0x40 extra: hle_elision_buffer_full Number of times we could not allocate Lock Buffer name:move_elimination type:exclusive default:0x1 0x1 extra: int_eliminated Number of integer Move Elimination candidate uops that were eliminated. 0x2 extra: simd_eliminated Number of SIMD Move Elimination candidate uops that were eliminated. 0x4 extra: int_not_eliminated Number of integer Move Elimination candidate uops that were not eliminated. 0x8 extra: simd_not_eliminated Number of SIMD Move Elimination candidate uops that were not eliminated. name:cpl_cycles type:exclusive default:ring0 0x1 extra: ring0 This event counts the unhalted core cycles during which the thread is in the ring 0 privileged mode. 0x2 extra: ring123 This event counts unhalted core cycles during which the thread is in rings 1, 2, or 3. 0x1 extra:cmask=1,edge ring0_trans This event counts when there is a transition from ring 1,2 or 3 to ring0. name:tx_exec type:exclusive default:0x1 0x1 extra: misc1 Unfriendly TSX abort triggered by a flowmarker 0x2 extra: misc2 Unfriendly TSX abort triggered by a vzeroupper instruction 0x4 extra: misc3 Unfriendly TSX abort triggered by a nest count that is too deep 0x8 extra: misc4 RTM region detected inside HLE 0x10 extra: misc5 # HLE inside HLE+ name:rs_events type:exclusive default:empty_cycles 0x1 extra: empty_cycles This event counts cycles during which the reservation station (RS) is empty for the thread. Note: In ST-mode, not active thread should drive 0. This is usually caused by severely costly branch mispredictions, or allocator/FE issues. 0x1 extra:cmask=1,inv,edge empty_end Counts end of periods where the Reservation Station (RS) was empty. Could be useful to precisely locate Frontend Latency Bound issues. name:offcore_requests_outstanding type:exclusive default:demand_data_rd 0x1 extra: demand_data_rd This event counts the number of offcore outstanding Demand Data Read transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor. See the corresponding Umask under OFFCORE_REQUESTS. Note: A prefetch promoted to Demand is counted from the promotion point. 0x2 extra: demand_code_rd This event counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The "Offcore outstanding" state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. 0x4 extra: demand_rfo This event counts the number of offcore outstanding RFO (store) transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS. 0x8 extra: all_data_rd This event counts the number of offcore outstanding cacheable Core Data Read transactions in the super queue every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS. 0x1 extra:cmask=1 cycles_with_demand_data_rd This event counts cycles when offcore outstanding Demand Data Read transactions are present in the super queue (SQ). A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). 0x8 extra:cmask=1 cycles_with_data_rd This event counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS. name:lock_cycles type:exclusive default:0x1 0x1 extra: split_lock_uc_lock_duration This event counts cycles in which the L1 and L2 are locked due to a UC lock or split lock. A lock is asserted in case of locked memory access, due to noncacheable memory, locked operation that spans two cache lines, or a page walk from the noncacheable page table. L1D and L2 locks have a very high performance penalty and it is highly recommended to avoid such access. 0x2 extra: cache_lock_duration This event counts the number of cycles when the L1D is locked. It is a superset of the 0x1 mask (BUS_LOCK_CLOCKS.BUS_LOCK_DURATION). name:idq type:exclusive default:0x2 0x2 extra: empty This counts the number of cycles that the instruction decoder queue is empty and can indicate that the application may be bound in the front end. It does not determine whether there are uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instruction Decode Queue (IDQ) when it is empty. 0x4 extra: mite_uops This event counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may "bypass" the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). 0x8 extra: dsb_uops This event counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may "bypass" the IDQ. 0x10 extra: ms_dsb_uops This event counts the number of uops initiated by Decode Stream Buffer (DSB) that are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may "bypass" the IDQ. 0x20 extra: ms_mite_uops This event counts the number of uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequenser (MS) is busy. Counting includes uops that may "bypass" the IDQ. 0x30 extra: ms_uops This event counts the total number of uops delivered to Instruction Decode Queue (IDQ) while the Microcode Sequenser (MS) is busy. Counting includes uops that may "bypass" the IDQ. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. 0x30 extra:cmask=1 ms_cycles This event counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequenser (MS) is busy. Counting includes uops that may "bypass" the IDQ. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. 0x4 extra:cmask=1 mite_cycles This event counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may "bypass" the IDQ. 0x8 extra:cmask=1 dsb_cycles This event counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may "bypass" the IDQ. 0x10 extra:cmask=1 ms_dsb_cycles This event counts cycles during which uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may "bypass" the IDQ. 0x10 extra:cmask=1,edge ms_dsb_occur This event counts the number of deliveries to Instruction Decode Queue (IDQ) initiated by Decode Stream Buffer (DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may "bypass" the IDQ. 0x18 extra:cmask=4 all_dsb_cycles_4_uops This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may "bypass" the IDQ. 0x18 extra:cmask=1 all_dsb_cycles_any_uops This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may "bypass" the IDQ. 0x24 extra:cmask=4 all_mite_cycles_4_uops This event counts the number of cycles 4 uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may "bypass" the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). 0x24 extra:cmask=1 all_mite_cycles_any_uops This event counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may "bypass" the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). 0x3c extra: mite_all_uops This event counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may "bypass" the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). 0x30 extra:cmask=1,edge ms_switches Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer name:itlb_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk This event counts store misses in all DTLB levels that cause page walks of any page size (4K/2M/4M/1G). 0x2 extra: walk_completed_4k This event counts store misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can end with or without a fault. 0x10 extra: walk_duration This event counts the number of cycles while PMH is busy with the page walk. 0x20 extra: stlb_hit_4k Core misses that miss the DTLB and hit the STLB (4K) 0xe extra: walk_completed Misses in all ITLB levels that cause completed page walks 0x60 extra: stlb_hit Operations that miss the first ITLB level but hit the second and do not cause any page walks name:br_inst_exec type:exclusive default:0xff 0xff extra: all_branches This event counts both taken and not taken speculative and retired branch instructions. 0x41 extra: nontaken_conditional This event counts not taken macro-conditional branch instructions. 0x81 extra: taken_conditional This event counts taken speculative and retired macro-conditional branch instructions. 0x82 extra: taken_direct_jump This event counts taken speculative and retired macro-conditional branch instructions excluding calls and indirect branches. 0x84 extra: taken_indirect_jump_non_call_ret This event counts taken speculative and retired indirect branches excluding calls and return branches. 0x88 extra: taken_indirect_near_return This event counts taken speculative and retired indirect branches that have a return mnemonic. 0x90 extra: taken_direct_near_call This event counts taken speculative and retired direct near calls. 0xa0 extra: taken_indirect_near_call This event counts taken speculative and retired indirect calls including both register and memory indirect. 0xc1 extra: all_conditional This event counts both taken and not taken speculative and retired macro-conditional branch instructions. 0xc2 extra: all_direct_jmp This event counts both taken and not taken speculative and retired macro-unconditional branch instructions, excluding calls and indirects. 0xc4 extra: all_indirect_jump_non_call_ret This event counts both taken and not taken speculative and retired indirect branches excluding calls and return branches. 0xc8 extra: all_indirect_near_return This event counts both taken and not taken speculative and retired indirect branches that have a return mnemonic. 0xd0 extra: all_direct_near_call This event counts both taken and not taken speculative and retired direct near calls. name:br_misp_exec type:exclusive default:0xff 0xff extra: all_branches This event counts both taken and not taken speculative and retired mispredicted branch instructions. 0x41 extra: nontaken_conditional This event counts not taken speculative and retired mispredicted macro conditional branch instructions. 0x81 extra: taken_conditional This event counts taken speculative and retired mispredicted macro conditional branch instructions. 0x84 extra: taken_indirect_jump_non_call_ret This event counts taken speculative and retired mispredicted indirect branches excluding calls and returns. 0xc1 extra: all_conditional This event counts both taken and not taken speculative and retired mispredicted macro conditional branch instructions. 0xc4 extra: all_indirect_jump_non_call_ret This event counts both taken and not taken mispredicted indirect branches excluding calls and returns. 0xa0 extra: taken_indirect_near_call Taken speculative and retired mispredicted indirect calls name:idq_uops_not_delivered type:exclusive default:core 0x1 extra: core This event counts the number of uops not delivered to Resource Allocation Table (RAT) per thread adding ?4 ? x? when Resource Allocation Table (RAT) is not stalled and Instruction Decode Queue (IDQ) delivers x uops to Resource Allocation Table (RAT) (where x belongs to {0,1,2,3}). Counting does not cover cases when: a. IDQ-Resource Allocation Table (RAT) pipe serves the other thread; b. Resource Allocation Table (RAT) is stalled for the thread (including uop drops and clear BE conditions); c. Instruction Decode Queue (IDQ) delivers four uops. 0x1 extra:cmask=4 cycles_0_uops_deliv_core This event counts, on the per-thread basis, cycles when no uops are delivered to Resource Allocation Table (RAT). IDQ_Uops_Not_Delivered.core =4. 0x1 extra:cmask=3 cycles_le_1_uop_deliv_core This event counts, on the per-thread basis, cycles when less than 1 uop is delivered to Resource Allocation Table (RAT). IDQ_Uops_Not_Delivered.core >=3. 0x1 extra:cmask=2 cycles_le_2_uop_deliv_core Cycles with less than 2 uops delivered by the front end 0x1 extra:cmask=1 cycles_le_3_uop_deliv_core Cycles with less than 3 uops delivered by the front end 0x1 extra:cmask=1,inv cycles_fe_was_ok Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stalling FE. name:uops_executed_port type:exclusive default:port_0 0x1 extra:any port_0_core Cycles per core when uops are exectuted in port 0 0x2 extra:any port_1_core Cycles per core when uops are exectuted in port 1 0x4 extra:any port_2_core Cycles per core when uops are dispatched to port 2 0x8 extra:any port_3_core Cycles per core when uops are dispatched to port 3 0x10 extra:any port_4_core Cycles per core when uops are exectuted in port 4 0x20 extra:any port_5_core Cycles per core when uops are exectuted in port 5 0x40 extra:any port_6_core Cycles per core when uops are exectuted in port 6 0x80 extra:any port_7_core Cycles per core when uops are dispatched to port 7 0x1 extra: port_0 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0. 0x2 extra: port_1 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 1. 0x4 extra: port_2 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 2. 0x8 extra: port_3 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 3. 0x10 extra: port_4 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 4. 0x20 extra: port_5 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 5. 0x40 extra: port_6 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 6. 0x80 extra: port_7 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 7. name:uops_dispatched_port type:exclusive default:0x1 0x1 extra: port_0 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0. 0x2 extra: port_1 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 1. 0x4 extra: port_2 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 2. 0x8 extra: port_3 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 3. 0x10 extra: port_4 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 4. 0x20 extra: port_5 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 5. 0x40 extra: port_6 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 6. 0x80 extra: port_7 This event counts, on the per-thread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 7. name:resource_stalls type:exclusive default:0x1 0x1 extra: any This event counts resource-related stall cycles. Reasons for stalls can be as follows: - *any* u-arch structure got full (LB, SB, RS, ROB, BOB, LM, Physical Register Reclaim Table (PRRT), or Physical History Table (PHT) slots) - *any* u-arch structure got empty (like INT/SIMD FreeLists) - FPU control word (FPCW), MXCSR and others. This counts cycles that the pipeline backend blocked uop delivery from the front end. 0x4 extra: rs This event counts stall cycles caused by absence of eligible entries in the reservation station (RS). This may result from RS overflow, or from RS deallocation because of the RS array Write Port allocation scheme (each RS entry has two write ports instead of four. As a result, empty entries could not be used, although RS is not really full). This counts cycles that the pipeline backend blocked uop delivery from the front end. 0x8 extra: sb This event counts stall cycles caused by the store buffer (SB) overflow (excluding draining from synch). This counts cycles that the pipeline backend blocked uop delivery from the front end. 0x10 extra: rob This event counts ROB full stall cycles. This counts cycles that the pipeline backend blocked uop delivery from the front end. name:cycle_activity type:exclusive default:cycles_l2_pending 0x1 extra:cmask=1 cycles_l2_pending Counts number of cycles the CPU has at least one pending demand* load request missing the L2 cache. 0x8 extra:cmask=8 cycles_l1d_pending Counts number of cycles the CPU has at least one pending demand load request missing the L1 data cache. 0x2 extra:cmask=2 cycles_ldm_pending Counts number of cycles the CPU has at least one pending demand load request (that is cycles with non-completed load waiting for its data from memory subsystem) 0x4 extra:cmask=4 cycles_no_execute Counts number of cycles nothing is executed on any execution port. 0x5 extra:cmask=5 stalls_l2_pending Counts number of cycles nothing is executed on any execution port, while there was at least one pending demand* load request missing the L2 cache. (as a footprint) * includes also L1 HW prefetch requests that may or may not be required by demands 0x6 extra:cmask=6 stalls_ldm_pending Counts number of cycles nothing is executed on any execution port, while there was at least one pending demand load request. 0xc extra:cmask=c stalls_l1d_pending Counts number of cycles nothing is executed on any execution port, while there was at least one pending demand load request missing the L1 data cache. 0x8 extra:cmask=8 cycles_l1d_miss Cycles while L1 cache miss demand load is outstanding. 0x1 extra:cmask=1 cycles_l2_miss Cycles while L2 cache miss demand load is outstanding. 0x2 extra:cmask=2 cycles_mem_any Cycles while memory subsystem has an outstanding load. 0x4 extra:cmask=4 stalls_total Total execution stalls. 0xc extra:cmask=c stalls_l1d_miss Execution stalls while L1 cache miss demand load is outstanding. 0x5 extra:cmask=5 stalls_l2_miss Execution stalls while L2 cache miss demand load is outstanding. 0x6 extra:cmask=6 stalls_mem_any Execution stalls while memory subsystem has an outstanding load. name:lsd type:exclusive default:uops 0x1 extra: uops Number of Uops delivered by the LSD. Read more on LSD under LSD_REPLAY.REPLAY 0x1 extra:cmask=4 cycles_4_uops Cycles 4 Uops delivered by the LSD, but didn't come from the decoder 0x1 extra:cmask=1 cycles_active Cycles Uops delivered by the LSD, but didn't come from the decoder name:offcore_requests type:exclusive default:0x1 0x1 extra: demand_data_rd This event counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore. 0x2 extra: demand_code_rd This event counts both cacheable and noncachaeble code read requests. 0x4 extra: demand_rfo This event counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM. 0x8 extra: all_data_rd This event counts the demand and prefetch data reads. All Core Data Reads include cacheable "Demands" and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type. name:uops_executed type:exclusive default:thread 0x1 extra: thread Number of uops to be executed per-thread each cycle. 0x2 extra: core Number of uops executed from any thread 0x1 extra:cmask=1,inv stall_cycles This event counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread. 0x1 extra:cmask=1 cycles_ge_1_uop_exec Cycles where at least 1 uop was executed per-thread 0x1 extra:cmask=2 cycles_ge_2_uops_exec Cycles where at least 2 uops were executed per-thread 0x1 extra:cmask=3 cycles_ge_3_uops_exec Cycles where at least 3 uops were executed per-thread 0x1 extra:cmask=4 cycles_ge_4_uops_exec Cycles where at least 4 uops were executed per-thread name:page_walker_loads type:exclusive default:0x11 0x11 extra: dtlb_l1 Number of DTLB page walker hits in the L1+FB 0x21 extra: itlb_l1 Number of ITLB page walker hits in the L1+FB 0x12 extra: dtlb_l2 Number of DTLB page walker hits in the L2 0x22 extra: itlb_l2 Number of ITLB page walker hits in the L2 0x14 extra: dtlb_l3 Number of DTLB page walker hits in the L3 + XSNP 0x24 extra: itlb_l3 Number of ITLB page walker hits in the L3 + XSNP 0x18 extra: dtlb_memory Number of DTLB page walker hits in Memory name:inst_retired type:exclusive default:0x2 0x2 extra: x87 This is a non-precise version (that is, does not use PEBS) of the event that counts FP operations retired. For X87 FP operations that have no exceptions counting also includes flows that have several X87, or flows that use X87 uops in the exception handling. 0x1 extra:pebs prec_dist This is a precise version (that is, uses PEBS) of the event that counts instructions retired. name:other_assists type:exclusive default:0x8 0x8 extra: avx_to_sse This is a non-precise version (that is, does not use PEBS) of the event that counts the number of transitions from AVX-256 to legacy SSE when penalty is applicable. 0x10 extra: sse_to_avx This is a non-precise version (that is, does not use PEBS) of the event that counts the number of transitions from legacy SSE to AVX-256 when penalty is applicable. 0x40 extra: any_wb_assist Number of times any microcode assist is invoked by HW upon uop writeback. name:uops_retired type:exclusive default:all 0x1 extra: all This is a non-precise version (that is, does not use PEBS) of the event that counts all actually retired uops. Counting increments by two for micro-fused uops, and by one for macro-fused and other uops. Maximal increment value for one cycle is eight. 0x1 extra: all_pebs Counts all actually retired uops. Counting increments by two for micro-fused uops, and by one for macro-fused and other uops. Maximal increment value for one cycle is eight. 0x2 extra: retire_slots This is a non-precise version (that is, does not use PEBS) of the event that counts the number of retirement slots used. 0x2 extra: retire_slots_pebs Counts the number of retirement slots used. 0x1 extra:cmask=1,inv stall_cycles This is a non-precise version (that is, does not use PEBS) of the event that counts cycles without actually retired uops. 0x1 extra:cmask=a,inv total_cycles Number of cycles using always true condition (uops_ret < 16) applied to non PEBS uops retired event. name:machine_clears type:exclusive default:cycles 0x1 extra: cycles This event counts both thread-specific (TS) and all-thread (AT) nukes. 0x2 extra: memory_ordering This event counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following: 1. memory disambiguation, 2. external snoop, or 3. cross SMT-HW-thread snoop (stores) hitting load buffer. 0x4 extra: smc This event counts self-modifying code (SMC) detected, which causes a machine clear. 0x20 extra: maskmov Maskmov false fault - counts number of time ucode passes through Maskmov flow due to instruction's mask being 0 while the flow was completed without raising a fault. 0x1 extra:cmask=1,edge count Number of machine clears (nukes) of any type. name:br_inst_retired type:exclusive default:conditional 0x1 extra: conditional This is a non-precise version (that is, does not use PEBS) of the event that counts conditional branch instructions retired. 0x1 extra: conditional_pebs Counts conditional branch instructions retired. 0x2 extra: near_call This is a non-precise version (that is, does not use PEBS) of the event that counts both direct and indirect near call instructions retired. 0x2 extra: near_call_pebs Counts both direct and indirect near call instructions retired. 0x8 extra: near_return This is a non-precise version (that is, does not use PEBS) of the event that counts return instructions retired. 0x8 extra: near_return_pebs Counts return instructions retired. 0x10 extra: not_taken This is a non-precise version (that is, does not use PEBS) of the event that counts not taken branch instructions retired. 0x20 extra: near_taken This is a non-precise version (that is, does not use PEBS) of the event that counts taken branch instructions retired. 0x20 extra: near_taken_pebs Counts taken branch instructions retired. 0x40 extra: far_branch This is a non-precise version (that is, does not use PEBS) of the event that counts far branch instructions retired. 0x4 extra:pebs all_branches_pebs This is a precise version of BR_INST_RETIRED.ALL_BRANCHES that counts all (macro) branch instructions retired. name:br_misp_retired type:exclusive default:conditional 0x1 extra: conditional This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted conditional branch instructions retired. 0x1 extra: conditional_pebs Counts mispredicted conditional branch instructions retired. 0x4 extra:pebs all_branches_pebs This is a precise version of BR_MISP_RETIRED.ALL_BRANCHES that counts all mispredicted macro branch instructions retired. 0x20 extra: near_taken number of near branch instructions retired that were mispredicted and taken. 0x20 extra: near_taken_pebs number of near branch instructions retired that were mispredicted and taken. name:hle_retired type:exclusive default:0x1 0x1 extra: start Number of times we entered an HLE region; does not count nested transactions 0x2 extra: commit Number of times HLE commit succeeded 0x4 extra: aborted Number of times HLE abort was triggered 0x4 extra: aborted_pebs Number of times HLE abort was triggered 0x8 extra: aborted_misc1 Number of times an HLE abort was attributed to a Memory condition (See TSX_Memory event for additional details) 0x10 extra: aborted_misc2 Number of times the TSX watchdog signaled an HLE abort 0x20 extra: aborted_misc3 Number of times a disallowed operation caused an HLE abort 0x40 extra: aborted_misc4 Number of times HLE caused a fault 0x80 extra: aborted_misc5 Number of times HLE aborted and was not due to the abort conditions in subevents 3-6 name:rtm_retired type:exclusive default:0x1 0x1 extra: start Number of times we entered an RTM region; does not count nested transactions 0x2 extra: commit Number of times RTM commit succeeded 0x4 extra: aborted Number of times RTM abort was triggered 0x4 extra: aborted_pebs Number of times RTM abort was triggered 0x8 extra: aborted_misc1 Number of times an RTM abort was attributed to a Memory condition (See TSX_Memory event for additional details) 0x10 extra: aborted_misc2 Number of times the TSX watchdog signaled an RTM abort 0x20 extra: aborted_misc3 Number of times a disallowed operation caused an RTM abort 0x40 extra: aborted_misc4 Number of times a RTM caused a fault 0x80 extra: aborted_misc5 Number of times RTM aborted and was not due to the abort conditions in subevents 3-6 name:fp_assist type:exclusive default:0x1e 0x1e extra:cmask=1 any This event counts cycles with any input and output SSE or x87 FP assist. If an input and output assist are detected on the same cycle the event increments by 1. 0x2 extra: x87_output This is a non-precise version (that is, does not use PEBS) of the event that counts the number of x87 floating point (FP) micro-code assist (numeric overflow/underflow, inexact result) when the output value (destination register) is invalid. 0x4 extra: x87_input This is a non-precise version (that is, does not use PEBS) of the event that counts x87 floating point (FP) micro-code assist (invalid operation, denormal operand, SNaN operand) when the input value (one of the source operands to an FP instruction) is invalid. 0x8 extra: simd_output This is a non-precise version (that is, does not use PEBS) of the event that counts the number of SSE* floating point (FP) micro-code assist (numeric overflow/underflow) when the output value (destination register) is invalid. Counting covers only cases involving penalties that require micro-code assist intervention. 0x10 extra: simd_input This is a non-precise version (that is, does not use PEBS) of the event that counts any input SSE* FP assist - invalid operation, denormal operand, dividing by zero, SNaN operand. Counting includes only cases involving penalties that required micro-code assist intervention. name:mem_uops_retired type:exclusive default:stlb_miss_loads 0x11 extra: stlb_miss_loads This is a non-precise version (that is, does not use PEBS) of the event that counts load uops with true STLB miss retired to the architected path. True STLB miss is an uop triggering page walk that gets completed without blocks, and later gets retired. This page walk can end up with or without a fault. 0x11 extra: stlb_miss_loads_pebs Counts load uops with true STLB miss retired to the architected path. True STLB miss is an uop triggering page walk that gets completed without blocks, and later gets retired. This page walk can end up with or without a fault. 0x12 extra: stlb_miss_stores This is a non-precise version (that is, does not use PEBS) of the event that counts store uops with true STLB miss retired to the architected path. True STLB miss is an uop triggering page walk that gets completed without blocks, and later gets retired. This page walk can end up with or without a fault. 0x12 extra: stlb_miss_stores_pebs Counts store uops with true STLB miss retired to the architected path. True STLB miss is an uop triggering page walk that gets completed without blocks, and later gets retired. This page walk can end up with or without a fault. 0x21 extra: lock_loads This is a non-precise version (that is, does not use PEBS) of the event that counts load uops with locked access retired to the architected path. 0x21 extra: lock_loads_pebs Counts load uops with locked access retired to the architected path. 0x41 extra: split_loads This is a non-precise version (that is, does not use PEBS) of the event that counts line-splitted load uops retired to the architected path. A line split is across 64B cache-line which includes a page split (4K). 0x41 extra: split_loads_pebs Counts line-splitted load uops retired to the architected path. A line split is across 64B cache-line which includes a page split (4K). 0x42 extra: split_stores This is a non-precise version (that is, does not use PEBS) of the event that counts line-splitted store uops retired to the architected path. A line split is across 64B cache-line which includes a page split (4K). 0x42 extra: split_stores_pebs Counts line-splitted store uops retired to the architected path. A line split is across 64B cache-line which includes a page split (4K). 0x81 extra: all_loads This is a non-precise version (that is, does not use PEBS) of the event that counts load uops retired to the architected path with a filter on bits 0 and 1 applied. Note: This event ?ounts AVX-256bit load/store double-pump memory uops as a single uop at retirement. This event also counts SW prefetches. 0x81 extra: all_loads_pebs Counts load uops retired to the architected path with a filter on bits 0 and 1 applied. Note: This event ?ounts AVX-256bit load/store double-pump memory uops as a single uop at retirement. This event also counts SW prefetches. 0x82 extra: all_stores This is a non-precise version (that is, does not use PEBS) of the event that counts store uops retired to the architected path with a filter on bits 0 and 1 applied. Note: This event ?ounts AVX-256bit load/store double-pump memory uops as a single uop at retirement. 0x82 extra: all_stores_pebs Counts store uops retired to the architected path with a filter on bits 0 and 1 applied. Note: This event ?ounts AVX-256bit load/store double-pump memory uops as a single uop at retirement. name:mem_load_uops_retired type:exclusive default:l1_hit 0x1 extra: l1_hit This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were hits in the nearest-level (L1) cache. Note: Only two data-sources of L1/FB are applicable for AVX-256bit even though the corresponding AVX load could be serviced by a deeper level in the memory hierarchy. Data source is reported for the Low-half load. This event also counts SW prefetches independent of the actual data source 0x1 extra: l1_hit_pebs Counts retired load uops which data sources were hits in the nearest-level (L1) cache. Note: Only two data-sources of L1/FB are applicable for AVX-256bit even though the corresponding AVX load could be serviced by a deeper level in the memory hierarchy. Data source is reported for the Low-half load. This event also counts SW prefetches independent of the actual data source 0x2 extra: l2_hit This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were hits in the mid-level (L2) cache. 0x2 extra: l2_hit_pebs Counts retired load uops which data sources were hits in the mid-level (L2) cache. 0x4 extra: l3_hit This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were data hits in the last-level (L3) cache without snoops required. 0x4 extra: l3_hit_pebs Counts retired load uops which data sources were data hits in the last-level (L3) cache without snoops required. 0x8 extra: l1_miss This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were misses in the nearest-level (L1) cache. Counting excludes unknown and UC data source. 0x8 extra: l1_miss_pebs Counts retired load uops which data sources were misses in the nearest-level (L1) cache. Counting excludes unknown and UC data source. 0x10 extra: l2_miss This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were misses in the mid-level (L2) cache. Counting excludes unknown and UC data source. 0x10 extra: l2_miss_pebs Counts retired load uops which data sources were misses in the mid-level (L2) cache. Counting excludes unknown and UC data source. 0x20 extra: l3_miss Miss in last-level (L3) cache. Excludes Unknown data-source. 0x20 extra: l3_miss_pebs Miss in last-level (L3) cache. Excludes Unknown data-source. 0x40 extra: hit_lfb This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were load uops missed L1 but hit a fill buffer due to a preceding miss to the same cache line with the data not ready. Note: Only two data-sources of L1/FB are applicable for AVX-256bit even though the corresponding AVX load could be serviced by a deeper level in the memory hierarchy. Data source is reported for the Low-half load. 0x40 extra: hit_lfb_pebs Counts retired load uops which data sources were load uops missed L1 but hit a fill buffer due to a preceding miss to the same cache line with the data not ready. Note: Only two data-sources of L1/FB are applicable for AVX-256bit even though the corresponding AVX load could be serviced by a deeper level in the memory hierarchy. Data source is reported for the Low-half load. name:mem_load_uops_l3_hit_retired type:exclusive default:xsnp_miss 0x1 extra: xsnp_miss This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were L3 Hit and a cross-core snoop missed in the on-pkg core cache. 0x1 extra: xsnp_miss_pebs Counts retired load uops which data sources were L3 Hit and a cross-core snoop missed in the on-pkg core cache. 0x2 extra: xsnp_hit This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were L3 hit and a cross-core snoop hit in the on-pkg core cache. 0x2 extra: xsnp_hit_pebs Counts retired load uops which data sources were L3 hit and a cross-core snoop hit in the on-pkg core cache. 0x4 extra: xsnp_hitm This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were HitM responses from a core on same socket (shared L3). 0x4 extra: xsnp_hitm_pebs Counts retired load uops which data sources were HitM responses from a core on same socket (shared L3). 0x8 extra: xsnp_none This is a non-precise version (that is, does not use PEBS) of the event that counts retired load uops which data sources were hits in the last-level (L3) cache without snoops required. 0x8 extra: xsnp_none_pebs Counts retired load uops which data sources were hits in the last-level (L3) cache without snoops required. name:mem_load_uops_l3_miss_retired type:exclusive default:local_dram 0x1 extra: local_dram Retired load uop whose Data Source was: local DRAM either Snoop not needed or Snoop Miss (RspI) 0x1 extra: local_dram_pebs Retired load uop whose Data Source was: local DRAM either Snoop not needed or Snoop Miss (RspI) name:l2_trans type:exclusive default:0x80 0x80 extra: all_requests This event counts transactions that access the L2 pipe including snoops, pagewalks, and so on. 0x1 extra: demand_data_rd This event counts Demand Data Read requests that access L2 cache, including rejects. 0x2 extra: rfo This event counts Read for Ownership (RFO) requests that access L2 cache. 0x4 extra: code_rd This event counts the number of L2 cache accesses when fetching instructions. 0x8 extra: all_pf This event counts L2 or L3 HW prefetches that access L2 cache including rejects. 0x10 extra: l1d_wb This event counts L1D writebacks that access L2 cache. 0x20 extra: l2_fill This event counts L2 fill requests that access L2 cache. 0x40 extra: l2_wb This event counts L2 writebacks that access L2 cache. name:l2_lines_in type:exclusive default:0x7 0x7 extra: all This event counts the number of L2 cache lines filling the L2. Counting does not cover rejects. 0x1 extra: i This event counts the number of L2 cache lines in the Invalidate state filling the L2. Counting does not cover rejects. 0x2 extra: s This event counts the number of L2 cache lines in the Shared state filling the L2. Counting does not cover rejects. 0x4 extra: e This event counts the number of L2 cache lines in the Exclusive state filling the L2. Counting does not cover rejects. oprofile-1.3.0/events/i386/sandybridge/0000775000175000017500000000000013323173530014625 500000000000000oprofile-1.3.0/events/i386/sandybridge/events0000664000175000017500000001450112534404406015777 00000000000000# # Intel "sandy-bridge" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying sandy-bridge based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # include:i386/arch_perfmon event:0x03 counters:cpuid um:ld_blocks minimum:100000 name:ld_blocks : blocked loads event:0x05 counters:cpuid um:misalign_mem_ref minimum:2000000 name:misalign_mem_ref : Misaligned memory references event:0x07 counters:cpuid um:ld_blocks_partial minimum:100000 name:ld_blocks_partial : Partial loads event:0x08 counters:cpuid um:dtlb_load_misses minimum:2000000 name:dtlb_load_misses : D-TLB misses event:0x0d counters:cpuid um:int_misc minimum:2000000 name:int_misc : Instruction decoder events event:0x0e counters:0,1,2,3 um:uops_issued minimum:2000000 name:uops_issued : Number of Uops issued event:0x14 counters:cpuid um:arith minimum:2000000 name:arith : Misc ALU events event:0x17 counters:cpuid um:one minimum:2000000 name:insts_written_to_iq : Number of instructions written to Instruction Queue (IQ) this cycle. event:0x24 counters:cpuid um:l2_rqsts minimum:200000 name:l2_rqsts : Requests from L2 cache event:0x27 counters:cpuid um:l2_store_lock_rqsts minimum:200000 name:l2_store_lock_rqsts : L2 cache store lock requests event:0x28 counters:cpuid um:l2_l1d_wb_rqsts minimum:200000 name:l2_l1d_wb_rqsts : writebacks from L1D to the L2 cache event:0x48 counters:2 um:l1d_pend_miss minimum:2000000 name:l1d_pend_miss : Cycles with L1D load Misses outstanding. event:0x49 counters:cpuid um:dtlb_store_misses minimum:2000000 name:dtlb_store_misses : D-TLB store misses event:0x4c counters:cpuid um:load_hit_pre minimum:100000 name:load_hit_pre : Load dispatches that hit fill buffer event:0x4e counters:cpuid um:x02 minimum:2000000 name:hw_pre_req : Hardware Prefetch requests event:0x51 counters:cpuid um:l1d minimum:2000000 name:l1d : L1D cache events event:0x59 counters:cpuid um:partial_rat_stalls minimum:2000000 name:partial_rat_stalls : Partial RAT stalls event:0x5b counters:0,1,2,3 um:resource_stalls2 minimum:2000000 name:resource_stalls2 : Misc resource stalls event:0x5c counters:cpuid um:cpl_cycles minimum:2000000 name:cpl_cycles : Unhalted core cycles in specific rings event:0x5e counters:0,1,2,3 um:one minimum:2000000 name:rs_events : Events for the reservation station event:0x60 counters:cpuid um:offcore_requests_outstanding minimum:2000000 name:offcore_requests_outstanding : Offcore outstanding transactions event:0x63 counters:cpuid um:lock_cycles minimum:2000000 name:lock_cycles : Cycles due to LOCK prefixes. event:0x79 counters:0,1,2,3 um:idq minimum:2000000 name:idq : Instruction Decode Queue events event:0x80 counters:cpuid um:x02 minimum:200000 name:icache : Instruction cache events event:0x85 counters:cpuid um:itlb_misses minimum:2000000 name:itlb_misses : I-TLB misses event:0x87 counters:cpuid um:ild_stall minimum:2000000 name:ild_stall : Instruction decoding stalls event:0x88 counters:cpuid um:br_inst_exec minimum:200000 name:br_inst_exec : Branch instructions event:0x89 counters:cpuid um:br_misp_exec minimum:200000 name:br_misp_exec : Mispredicted branch instructions event:0x9c counters:0,1,2,3 um:idq_uops_not_delivered minimum:2000000 name:idq_uops_not_delivered : uops not delivered to IDQ. event:0xa1 counters:cpuid um:uops_dispatched_port minimum:2000000 name:uops_dispatched_port : Count on which ports uops are dispatched. event:0xa2 counters:cpuid um:resource_stalls minimum:2000000 name:resource_stalls : Core resource stalls event:0xab counters:cpuid um:dsb2mite_switches minimum:2000000 name:dsb2mite_switches : Number of Decode Stream Buffer (DSB) to MITE switches event:0xac counters:cpuid um:dsb_fill minimum:2000000 name:dsb_fill : DSB fill events event:0xae counters:cpuid um:one minimum:10000 name:itlb : ITLB events event:0xb0 counters:cpuid um:offcore_requests minimum:100000 name:offcore_requests : Requests sent outside the core event:0xb1 counters:0,1,2,3 um:uops_dispatched minimum:2000000 name:uops_dispatched : uops dispatched event:0xb2 counters:cpuid um:one minimum:2000000 name:offcore_requests_buffer : Offcore requests buffer events event:0xb6 counters:cpuid um:one minimum:100000 name:agu_bypass_cancel : AGU bypass cancel event:0xbd counters:cpuid um:tlb_flush minimum:10000 name:tlb_flush : TLB flushes event:0xbf counters:cpuid um:l1d_blocks minimum:100000 name:l1d_blocks : L1D cache blocking events event:0xc0 counters:1 um:one minimum:2000000 name:inst_retired : Instructions retired event:0xc1 counters:cpuid um:other_assists minimum:100000 name:other_assists : Instructions that needed an assist event:0xc2 counters:0,1,2,3 um:uops_retired minimum:2000000 name:uops_retired : uops that actually retired. event:0xc3 counters:cpuid um:machine_clears minimum:100000 name:machine_clears : Number of Machine Clears detected. event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:400000 name:br_inst_retired : Counts branch instructions retired event:0xc5 counters:0,1,2,3 um:br_misp_retired minimum:400000 name:br_misp_retired : Counts mispredicted branch instructions event:0xca counters:0,1,2,3 um:fp_assist minimum:100000 name:fp_assist : Counts floating point assists event:0xcb counters:cpuid um:one minimum:100000 name:hw_interrupts : Number of hardware interrupts received by the processor. event:0xcc counters:cpuid um:x20 minimum:2000000 name:rob_misc_events : Count ROB (Register Reorder Buffer) events. event:0xcd counters:3 um:x02 minimum:2000000 name:mem_trans_retired : Count memory transactions event:0xd0 counters:0,1,2,3 um:mem_uops_retired minimum:2000000 name:mem_uops_retired : Count uops with memory accessed retired event:0xd1 counters:0,1,2,3 um:mem_load_uops_retired minimum:2000000 name:mem_load_uops_retired : Memory load uops. event:0xd2 counters:0,1,2,3 um:mem_load_uops_llc_hit_retired minimum:100000 name:mem_load_uops_llc_hit_retired : Memory load uops with LLC (Last level cache) hit event:0xd4 counters:0,1,2,3 um:x02 minimum:10000 name:mem_load_uops_misc_retired : Memory load uops retired event:0xf0 counters:cpuid um:l2_trans minimum:200000 name:l2_trans : L2 cache accesses event:0xf1 counters:cpuid um:l2_lines_in minimum:100000 name:l2_lines_in : L2 cache lines in event:0xf2 counters:cpuid um:l2_lines_out minimum:100000 name:l2_lines_out : L2 cache lines out event:0xf4 counters:cpuid um:x10 minimum:100000 name:sq_misc : Store queue misc events oprofile-1.3.0/events/i386/sandybridge/unit_masks0000664000175000017500000005142212534404406016653 00000000000000# # Unit masks for the Intel "sandy-bridge" micro architecture # # See http://ark.intel.com/ for help in identifying sandy-bridge based CPUs # include:i386/arch_perfmon name:x02 type:mandatory default:0x2 0x2 No unit mask name:x10 type:mandatory default:0x10 0x10 No unit mask name:x20 type:mandatory default:0x20 0x20 No unit mask name:ld_blocks type:bitmask default:0x1 0x1 extra: data_unknown blocked loads due to store buffer blocks with unknown data. 0x2 extra: store_forward loads blocked by overlapping with store buffer that cannot be forwarded 0x8 extra: no_sr This event counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. 0x10 extra: all_block Number of cases where any load is blocked but has no DCU miss. name:misalign_mem_ref type:bitmask default:0x1 0x1 extra: loads Speculative cache-line split load uops dispatched to the L1D. 0x2 extra: stores Speculative cache-line split Store-address uops dispatched to L1D name:ld_blocks_partial type:bitmask default:0x1 0x1 extra: address_alias False dependencies in MOB due to partial compare on address 0x8 extra: all_sta_block This event counts the number of times that load operations are temporarily blocked because of older stores, with addresses that are not yet known. A load operation may incur more than one block of this type. name:dtlb_load_misses type:bitmask default:0x1 0x1 extra: miss_causes_a_walk Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G) 0x2 extra: walk_completed Miss in all TLB levels causes a page walk that completes of any page size (4K/2M/4M/1G) 0x4 extra: walk_duration Cycles PMH is busy with this walk 0x10 extra: stlb_hit First level miss but second level hit; no page walk. name:int_misc type:bitmask default:0x40 0x40 extra: rat_stall_cycles Cycles Resource Allocation Table (RAT) external stall is sent to Instruction Decode Queue (IDQ) for this thread. 0x3 extra:cmask=1 recovery_cycles Number of cycles waiting to be recover after Nuke due to all other cases except JEClear. 0x3 extra:cmask=1,edge recovery_stalls_count Edge applied to recovery_cycles, thus counts occurrences. name:uops_issued type:bitmask default:any 0x1 extra: any Number of Uops issued by the Resource Allocation Table (RAT) to the Reservation Station (RS) 0x1 extra:cmask=1,inv stall_cycles cycles no uops issued by this thread. name:arith type:bitmask default:fpu_div_active 0x1 extra: fpu_div_active Cycles that the divider is busy with any divide or sqrt operation. 0x1 extra:cmask=1,edge fpu_div Number of times that the divider is actived, includes INT, SIMD and FP. name:l2_rqsts type:bitmask default:0x1 0x1 extra: demand_data_rd_hit Demand Data Read hit L2, no rejects 0x4 extra: rfo_hit RFO requests that hit L2 cache 0x8 extra: rfo_miss RFO requests that miss L2 cache 0x10 extra: code_rd_hit L2 cache hits when fetching instructions, code reads. 0x20 extra: code_rd_miss L2 cache misses when fetching instructions 0x40 extra: pf_hit Requests from the L2 hardware prefetchers that hit L2 cache 0x80 extra: pf_miss Requests from the L2 hardware prefetchers that miss L2 cache 0x3 extra: all_demand_data_rd Any data read request to L2 cache 0xc extra: all_rfo Any data RFO request to L2 cache 0x30 extra: all_code_rd Any code read request to L2 cache 0xc0 extra: all_pf Any L2 HW prefetch request to L2 cache name:l2_store_lock_rqsts type:bitmask default:0xf 0xf extra: all RFOs that access cache lines in any state 0x1 extra: miss RFO (as a result of regular RFO or Lock request) miss cache - I state 0x4 extra: hit_e RFO (as a result of regular RFO or Lock request) hits cache in E state 0x8 extra: hit_m RFO (as a result of regular RFO or Lock request) hits cache in M state name:l2_l1d_wb_rqsts type:bitmask default:0x4 0x4 extra: hit_e writebacks from L1D to L2 cache lines in E state 0x8 extra: hit_m writebacks from L1D to L2 cache lines in M state name:l1d_pend_miss type:bitmask default:pending 0x1 extra: pending Cycles with L1D load Misses outstanding. 0x1 extra:cmask=1,edge occurences This event counts the number of L1D misses outstanding occurences. name:dtlb_store_misses type:bitmask default:0x1 0x1 extra: miss_causes_a_walk Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G) 0x2 extra: walk_completed Miss in all TLB levels causes a page walk that completes of any page size (4K/2M/4M/1G) 0x4 extra: walk_duration Cycles PMH is busy with this walk 0x10 extra: stlb_hit First level miss but second level hit; no page walk. Only relevant if multiple levels. name:load_hit_pre type:bitmask default:0x1 0x1 extra: sw_pf Load dispatches that hit fill buffer allocated for S/W prefetch. 0x2 extra: hw_pf Load dispatches that hit fill buffer allocated for HW prefetch. name:l1d type:bitmask default:0x1 0x1 extra: replacement L1D Data line replacements. 0x2 extra: allocated_in_m L1D M-state Data Cache Lines Allocated 0x4 extra: eviction L1D M-state Data Cache Lines Evicted due to replacement (only) 0x8 extra: all_m_replacement All Modified lines evicted out of L1D name:partial_rat_stalls type:bitmask default:flags_merge_uop 0x20 extra: flags_merge_uop Number of perf sensitive flags-merge uops added by Sandy Bridge u-arch. 0x40 extra: slow_lea_window Number of cycles with at least 1 slow Load Effective Address (LEA) uop being allocated. 0x80 extra: mul_single_uop Number of Multiply packed/scalar single precision uops allocated 0x20 extra:cmask=1 flags_merge_uop_cycles Cycles with perf sensitive flags-merge uops added by SandyBridge u-arch. name:resource_stalls2 type:bitmask default:0x40 0x40 extra: bob_full Cycles Allocator is stalled due Branch Order Buffer (BOB). 0xf extra: all_prf_control Resource stalls2 control structures full for physical registers 0xc extra: all_fl_empty Cycles with either free list is empty 0x4f extra: ooo_rsrc Resource stalls2 control structures full Physical Register Reclaim Table (PRRT), Physical History Table (PHT), INT or SIMD Free List (FL), Branch Order Buffer (BOB) name:cpl_cycles type:bitmask default:ring0 0x1 extra: ring0 Unhalted core cycles the Thread was in Rings 0. 0x1 extra:cmask=1,edge ring0_trans Transitions from ring123 to Ring0. 0x2 extra: ring123 Unhalted core cycles the Thread was in Rings 1/2/3. name:offcore_requests_outstanding type:bitmask default:cycles_with_demand_data_rd 0x1 extra: demand_data_rd Offcore outstanding Demand Data Read transactions in the SuperQueue (SQ), queue to uncore, every cycle. Includes L1D data hardware prefetches. 0x1 extra:cmask=1 cycles_with_demand_data_rd cycles there are Offcore outstanding RD data transactions in the SuperQueue (SQ), queue to uncore. 0x2 extra: demand_code_rd Offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle. 0x4 extra: demand_rfo Offcore outstanding RFO (store) transactions in the SuperQueue (SQ), queue to uncore, every cycle. 0x8 extra: all_data_rd Offcore outstanding all cacheable Core Data Read transactions in the SuperQueue (SQ), queue to uncore, every cycle. 0x8 extra:cmask=1 cycles_with_data_rd Cycles there are Offcore outstanding all Data read transactions in the SuperQueue (SQ), queue to uncore, every cycle. 0x2 extra:cmask=1 cycles_with_demand_code_rd Cycles with offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle. 0x4 extra:cmask=1 cycles_with_demand_rfo Cycles with offcore outstanding demand RFO Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle. name:lock_cycles type:bitmask default:0x1 0x1 extra: split_lock_uc_lock_duration Cycles in which the L1D and L2 are locked, due to a UC lock or split lock 0x2 extra: cache_lock_duration cycles that theL1D is locked name:idq type:bitmask default:0x2 0x2 extra: empty Cycles the Instruction Decode Queue (IDQ) is empty. 0x4 extra: mite_uops Number of uops delivered to Instruction Decode Queue (IDQ) from MITE path. 0x8 extra: dsb_uops Number of uops delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path. 0x10 extra: ms_dsb_uops Number of Uops delivered into Instruction Decode Queue (IDQ) when MS_Busy, initiated by Decode Stream Buffer (DSB). 0x20 extra: ms_mite_uops Number of Uops delivered into Instruction Decode Queue (IDQ) when MS_Busy, initiated by MITE. 0x30 extra: ms_uops Number of Uops were delivered into Instruction Decode Queue (IDQ) from MS, initiated by Decode Stream Buffer (DSB) or MITE. 0x30 extra:cmask=1 ms_cycles Number of cycles that Uops were delivered into Instruction Decode Queue (IDQ) when MS_Busy, initiated by Decode Stream Buffer (DSB) or MITE. 0x4 extra:cmask=1 mite_cycles Cycles MITE is active 0x8 extra:cmask=1 dsb_cycles Cycles Decode Stream Buffer (DSB) is active 0x10 extra:cmask=1 ms_dsb_cycles Cycles Decode Stream Buffer (DSB) Microcode Sequenser (MS) is active 0x10 extra:cmask=1,edge ms_dsb_occur Occurences of Decode Stream Buffer (DSB) Microcode Sequenser (MS) going active 0x18 extra:cmask=1 all_dsb_cycles_any_uops Cycles Decode Stream Buffer (DSB) is delivering anything 0x18 extra:cmask=4 all_dsb_cycles_4_uops Cycles Decode Stream Buffer (DSB) is delivering 4 Uops 0x24 extra:cmask=1 all_mite_cycles_any_uops Cycles MITE is delivering anything 0x24 extra:cmask=4 all_mite_cycles_4_uops Cycles MITE is delivering 4 Uops 0x3c extra: mite_all_uops Number of uops delivered to Instruction Decode Queue (IDQ) from any path. name:itlb_misses type:bitmask default:0x1 0x1 extra: miss_causes_a_walk Miss in all TLB levels causes an page walk of any page size (4K/2M/4M) 0x2 extra: walk_completed Miss in all TLB levels causes a page walk that completes of any page size (4K/2M/4M) 0x4 extra: walk_duration Cycles PMH is busy with this walk. 0x10 extra: stlb_hit First level miss but second level hit; no page walk. name:ild_stall type:bitmask default:0x1 0x1 extra: lcp Stall "occurrences" due to length changing prefixes (LCP). 0x4 extra: iq_full Stall cycles when instructions cannot be written because the Instruction Queue (IQ) is full. name:br_inst_exec type:bitmask default:0xff 0xff extra: all_branches All branch instructions executed. 0x41 extra: nontaken_conditional All macro conditional nontaken branch instructions. 0x81 extra: taken_conditional All macro conditional taken branch instructions. 0x82 extra: taken_direct_jump All macro unconditional taken branch instructions, excluding calls and indirects. 0x84 extra: taken_indirect_jump_non_call_ret All taken indirect branches that are not calls nor returns. 0x88 extra: taken_indirect_near_return All taken indirect branches that have a return mnemonic. 0x90 extra: taken_direct_near_call All taken non-indirect calls. 0xa0 extra: taken_indirect_near_call All taken indirect calls, including both register and memory indirect. 0xc1 extra: all_conditional All macro conditional branch instructions. 0xc2 extra: all_direct_jmp All macro unconditional branch instructions, excluding calls and indirects 0xc4 extra: all_indirect_jump_non_call_ret All indirect branches that are not calls nor returns. 0xc8 extra: all_indirect_near_return All indirect return branches. 0xd0 extra: all_direct_near_call All non-indirect calls executed. name:br_misp_exec type:bitmask default:0xff 0xff extra: all_branches All mispredicted branch instructions executed. 0x41 extra: nontaken_conditional All nontaken mispredicted macro conditional branch instructions. 0x81 extra: taken_conditional All taken mispredicted macro conditional branch instructions. 0x84 extra: taken_indirect_jump_non_call_ret All taken mispredicted indirect branches that are not calls nor returns. 0x88 extra: taken_return_near All taken mispredicted indirect branches that have a return mnemonic. 0x90 extra: taken_direct_near_call All taken mispredicted non-indirect calls. 0xa0 extra: taken_indirect_near_call All taken mispredicted indirect calls, including both register and memory indirect. 0xc1 extra: all_conditional All mispredicted macro conditional branch instructions. 0xc4 extra: all_indirect_jump_non_call_ret All mispredicted indirect branches that are not calls nor returns. 0xd0 extra: all_direct_near_call All mispredicted non-indirect calls name:idq_uops_not_delivered type:bitmask default:core 0x1 extra: core Count number of non-delivered uops to Resource Allocation Table (RAT). 0x1 extra:cmask=4 cycles_0_uops_deliv.core Counts the cycles no uops were delivered 0x1 extra:cmask=3 cycles_le_1_uop_deliv.core Counts the cycles less than 1 uops were delivered 0x1 extra:cmask=2 cycles_le_2_uop_deliv.core Counts the cycles less than 2 uops were delivered 0x1 extra:cmask=1 cycles_le_3_uop_deliv.core Counts the cycles less than 3 uops were delivered 0x1 extra:cmask=4,inv cycles_ge_1_uop_deliv.core Cycles when 1 or more uops were delivered to the by the front end. 0x1 extra:cmask=1,inv cycles_fe_was_ok Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stalling FE. name:uops_dispatched_port type:bitmask default:0x1 0x1 extra: port_0 Cycles which a Uop is dispatched on port 0 0x2 extra: port_1 Cycles which a Uop is dispatched on port 1 0x4 extra: port_2_ld Cycles which a load Uop is dispatched on port 2 0x8 extra: port_2_sta Cycles which a STA Uop is dispatched on port 2 0x10 extra: port_3_ld Cycles which a load Uop is dispatched on port 3 0x20 extra: port_3_sta Cycles which a STA Uop is dispatched on port 3 0x40 extra: port_4 Cycles which a Uop is dispatched on port 4 0x80 extra: port_5 Cycles which a Uop is dispatched on port 5 0xc extra: port_2 Uops disptached to port 2, loads and stores (speculative and retired) 0x30 extra: port_3 Uops disptached to port 3, loads and stores (speculative and retired) 0xc extra: port_2_core Uops disptached to port 2, loads and stores per core (speculative and retired) 0x30 extra: port_3_core Uops disptached to port 3, loads and stores per core (speculative and retired) name:resource_stalls type:bitmask default:0x1 0x1 extra: any Cycles Allocation is stalled due to Resource Related reason. 0x2 extra: lb Cycles Allocator is stalled due to Load Buffer full 0x4 extra: rs Stall due to no eligible Reservation Station (RS) entry available. 0x8 extra: sb Cycles Allocator is stalled due to Store Buffer full (not including draining from synch). 0x10 extra: rob ROB full cycles. 0xe extra: mem_rs Resource stalls due to LB, SB or Reservation Station (RS) being completely in use 0xf0 extra: ooo_rsrc Resource stalls due to Rob being full, FCSW, MXCSR and OTHER 0xa extra: lb_sb Resource stalls due to load or store buffers name:dsb2mite_switches type:bitmask default:0x1 0x1 extra: count Number of Decode Stream Buffer (DSB) to MITE switches 0x2 extra: penalty_cycles Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. name:dsb_fill type:bitmask default:0x2 0x2 extra: other_cancel Count number of times a valid DSB fill has been actually cancelled for any reason. 0x8 extra: exceed_dsb_lines Decode Stream Buffer (DSB) Fill encountered > 3 Decode Stream Buffer (DSB) lines. 0xa extra: all_cancel Count number of times a valid Decode Stream Buffer (DSB) fill has been actually cancelled for any reason. name:offcore_requests type:bitmask default:0x1 0x1 extra: demand_data_rd Demand Data Read requests sent to uncore 0x2 extra: demand_code_rd Offcore Code read requests. Includes Cacheable and Un-cacheables. 0x4 extra: demand_rfo Offcore Demand RFOs. Includes regular RFO, Locks, ItoM. 0x8 extra: all_data_rd Offcore Demand and prefetch data reads returned to the core. name:uops_dispatched type:bitmask default:thread 0x1 extra: thread Counts total number of uops to be dispatched per-thread each cycle. 0x1 extra:cmask=1,inv stall_cycles Counts number of cycles no uops were dispatced to be executed on this thread. 0x2 extra: core Counts total number of uops dispatched from any thread name:tlb_flush type:bitmask default:0x1 0x1 extra: dtlb_thread Count number of DTLB flushes of thread-specific entries. 0x20 extra: stlb_any Count number of any STLB flushes name:l1d_blocks type:bitmask default:bank_conflict_cycles 0x1 extra: ld_bank_conflict Any dispatched loads cancelled due to DCU bank conflict 0x5 extra:cmask=1 bank_conflict_cycles Cycles with l1d blocks due to bank conflicts name:other_assists type:bitmask default:0x2 0x2 extra: itlb_miss_retired Instructions that experienced an ITLB miss. Non Pebs 0x10 extra: avx_to_sse Number of transitions from AVX-256 to legacy SSE when penalty applicable Non Pebs 0x20 extra: sse_to_avx Number of transitions from legacy SSE to AVX-256 when penalty applicable Non Pebs name:uops_retired type:bitmask default:all 0x1 extra: all All uops that actually retired. 0x2 extra: retire_slots number of retirement slots used non PEBS 0x1 extra:cmask=1,inv stall_cycles Cycles no executable uops retired 0x1 extra:cmask=10,inv total_cycles Number of cycles using always true condition applied to non PEBS uops retired event. name:machine_clears type:bitmask default:0x2 0x2 extra: memory_ordering Number of Memory Ordering Machine Clears detected. 0x4 extra: smc Number of Self-modifying code (SMC) Machine Clears detected. 0x20 extra: maskmov Number of AVX masked mov Machine Clears detected. name:br_inst_retired type:bitmask default:0x1 0x1 extra: conditional Counts all taken and not taken macro conditional branch instructions. 0x2 extra: near_call Counts all macro direct and indirect near calls. non PEBS 0x8 extra: near_return This event counts the number of near ret instructions retired. 0x10 extra: not_taken Counts all not taken macro branch instructions retired. 0x20 extra: near_taken Counts the number of near branch taken instructions retired. 0x40 extra: far_branch Counts the number of far branch instructions retired. 0x4 extra: all_branches_ps Counts all taken and not taken macro branches including far branches.(Precise Event) 0x2 extra: near_call_r3 Ring123 only near calls (non precise) 0x2 extra: near_call_r3_ps Ring123 only near calls (precise event) name:br_misp_retired type:bitmask default:0x1 0x1 extra: conditional All mispredicted macro conditional branch instructions. 0x2 extra: near_call All macro direct and indirect near calls 0x10 extra: not_taken number of branch instructions retired that were mispredicted and not-taken. 0x20 extra: taken number of branch instructions retired that were mispredicted and taken. 0x4 extra: all_branches_ps all macro branches (Precise Event) name:fp_assist type:bitmask default:0x1e 0x1e extra:cmask=1 any Counts any FP_ASSIST umask was incrementing. 0x2 extra: x87_output output - Numeric Overflow, Numeric Underflow, Inexact Result 0x4 extra: x87_input input - Invalid Operation, Denormal Operand, SNaN Operand 0x8 extra: simd_output Any output SSE* FP Assist - Numeric Overflow, Numeric Underflow. 0x10 extra: simd_input Any input SSE* FP Assist name:mem_uops_retired type:bitmask default:0x11 0x11 extra: stlb_miss_loads STLB misses dues to retired loads 0x12 extra: stlb_miss_stores STLB misses dues to retired stores 0x21 extra: lock_loads Locked retired loads 0x41 extra: split_loads Retired loads causing cacheline splits 0x42 extra: split_stores Retired stores causing cacheline splits 0x81 extra: all_loads Any retired loads 0x82 extra: all_stores Any retired stores name:mem_load_uops_retired type:bitmask default:0x1 0x1 extra: l1_hit Load hit in nearest-level (L1D) cache 0x2 extra: l2_hit Load hit in mid-level (L2) cache 0x4 extra: llc_hit Load hit in last-level (L3) cache with no snoop needed 0x40 extra: hit_lfb A load missed L1D but hit the Fill Buffer name:mem_load_uops_llc_hit_retired type:bitmask default:0x1 0x1 extra: xsnp_miss Load LLC Hit and a cross-core Snoop missed in on-pkg core cache 0x2 extra: xsnp_hit Load LLC Hit and a cross-core Snoop hits in on-pkg core cache 0x4 extra: xsnp_hitm Load had HitM Response from a core on same socket (shared LLC). 0x8 extra: xsnp_none Load hit in last-level (L3) cache with no snoop needed. name:l2_trans type:bitmask default:0x80 0x80 extra: all_requests Transactions accessing L2 pipe 0x1 extra: demand_data_rd Demand Data Read requests that access L2 cache, includes L1D prefetches. 0x2 extra: rfo RFO requests that access L2 cache 0x4 extra: code_rd L2 cache accesses when fetching instructions including L1D code prefetches 0x8 extra: all_pf L2 or LLC HW prefetches that access L2 cache 0x10 extra: l1d_wb L1D writebacks that access L2 cache 0x20 extra: l2_fill L2 fill requests that access L2 cache 0x40 extra: l2_wb L2 writebacks that access L2 cache name:l2_lines_in type:bitmask default:0x7 0x7 extra: all L2 cache lines filling L2 0x1 extra: i L2 cache lines in I state filling L2 0x2 extra: s L2 cache lines in S state filling L2 0x4 extra: e L2 cache lines in E state filling L2 name:l2_lines_out type:bitmask default:0x1 0x1 extra: demand_clean Clean line evicted by a demand 0x2 extra: demand_dirty Dirty line evicted by a demand 0x4 extra: pf_clean Clean line evicted by an L2 Prefetch 0x8 extra: pf_dirty Dirty line evicted by an L2 Prefetch 0xa extra: dirty_all Any Dirty line evicted oprofile-1.3.0/events/i386/pii/0000775000175000017500000000000013323173530013113 500000000000000oprofile-1.3.0/events/i386/pii/events0000664000175000017500000001732312534404406014272 00000000000000# Pentium II events # event:0x79 counters:0,1 um:zero minimum:6000 name:CPU_CLK_UNHALTED : clocks processor is not halted event:0x43 counters:0,1 um:zero minimum:500 name:DATA_MEM_REFS : all memory references, cachable and non event:0x45 counters:0,1 um:zero minimum:500 name:DCU_LINES_IN : total lines allocated in the DCU event:0x46 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_IN : number of M state lines allocated in DCU event:0x47 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_OUT : number of M lines evicted from the DCU event:0x48 counters:0,1 um:zero minimum:500 name:DCU_MISS_OUTSTANDING : number of cycles while DCU miss outstanding event:0x80 counters:0,1 um:zero minimum:500 name:IFU_IFETCH : number of non/cachable instruction fetches event:0x81 counters:0,1 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x85 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled event:0x28 counters:0,1 um:mesi minimum:500 name:L2_IFETCH : number of L2 instruction fetches event:0x29 counters:0,1 um:mesi minimum:500 name:L2_LD : number of L2 data loads event:0x2a counters:0,1 um:mesi minimum:500 name:L2_ST : number of L2 data stores event:0x24 counters:0,1 um:zero minimum:500 name:L2_LINES_IN : number of allocated lines in L2 event:0x26 counters:0,1 um:zero minimum:500 name:L2_LINES_OUT : number of recovered lines from L2 event:0x25 counters:0,1 um:zero minimum:500 name:L2_M_LINES_INM : number of modified lines allocated in L2 event:0x27 counters:0,1 um:zero minimum:500 name:L2_M_LINES_OUTM : number of modified lines removed from L2 event:0x2e counters:0,1 um:mesi minimum:500 name:L2_RQSTS : number of L2 requests event:0x21 counters:0,1 um:zero minimum:500 name:L2_ADS : number of L2 address strobes event:0x22 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY : number of cycles data bus was busy event:0x23 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY_RD : cycles data bus was busy in xfer from L2 to CPU event:0x62 counters:0,1 um:ebl minimum:500 name:BUS_DRDY_CLOCKS : number of clocks DRDY is asserted event:0x63 counters:0,1 um:ebl minimum:500 name:BUS_LOCK_CLOCKS : number of clocks LOCK is asserted event:0x60 counters:0,1 um:zero minimum:500 name:BUS_REQ_OUTSTANDING : number of outstanding bus requests event:0x65 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BRD : number of burst read transactions event:0x66 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_RFO : number of read for ownership transactions event:0x67 counters:0,1 um:ebl minimum:500 name:BUS_TRANS_WB : number of write back transactions event:0x68 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_IFETCH : number of instruction fetch transactions event:0x69 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_INVAL : number of invalidate transactions event:0x6a counters:0,1 um:ebl minimum:500 name:BUS_TRAN_PWR : number of partial write transactions event:0x6b counters:0,1 um:ebl minimum:500 name:BUS_TRANS_P : number of partial transactions event:0x6c counters:0,1 um:ebl minimum:500 name:BUS_TRANS_IO : number of I/O transactions event:0x6d counters:0,1 um:ebl minimum:500 name:BUS_TRANS_DEF : number of deferred transactions event:0x6e counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BURST : number of burst transactions event:0x70 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_ANY : number of all transactions event:0x6f counters:0,1 um:ebl minimum:500 name:BUS_TRAN_MEM : number of memory transactions event:0x64 counters:0,1 um:zero minimum:500 name:BUS_DATA_RCV : bus cycles this processor is receiving data event:0x61 counters:0,1 um:zero minimum:500 name:BUS_BNR_DRV : bus cycles this processor is driving BNR pin event:0x7a counters:0,1 um:zero minimum:500 name:BUS_HIT_DRV : bus cycles this processor is driving HIT pin event:0x7b counters:0,1 um:zero minimum:500 name:BUS_HITM_DRV : bus cycles this processor is driving HITM pin event:0x7e counters:0,1 um:zero minimum:500 name:BUS_SNOOP_STALL : cycles during bus snoop stall event:0xc1 counters:0 um:zero minimum:3000 name:COMP_FLOP_RET : number of computational FP operations retired event:0x10 counters:0 um:zero minimum:3000 name:FLOPS : number of computational FP operations executed event:0x11 counters:1 um:zero minimum:500 name:FP_ASSIST : number of FP exceptions handled by microcode event:0x12 counters:1 um:zero minimum:1000 name:MUL : number of multiplies event:0x13 counters:1 um:zero minimum:500 name:DIV : number of divides event:0x14 counters:0 um:zero minimum:1000 name:CYCLES_DIV_BUSY : cycles divider is busy event:0x03 counters:0,1 um:zero minimum:500 name:LD_BLOCKS : number of store buffer blocks event:0x04 counters:0,1 um:zero minimum:500 name:SB_DRAINS : number of store buffer drain cycles event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED : number of instructions retired event:0xc2 counters:0,1 um:zero minimum:6000 name:UOPS_RETIRED : number of UOPs retired event:0xd0 counters:0,1 um:zero minimum:6000 name:INST_DECODED : number of instructions decoded event:0xc8 counters:0,1 um:zero minimum:500 name:HW_INT_RX : number of hardware interrupts received event:0xc6 counters:0,1 um:zero minimum:500 name:CYCLES_INT_MASKED : cycles interrupts are disabled event:0xc7 counters:0,1 um:zero minimum:500 name:CYCLES_INT_PENDING_AND_MASKED : cycles interrupts are disabled with pending interrupts event:0xc4 counters:0,1 um:zero minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired event:0xc9 counters:0,1 um:zero minimum:500 name:BR_TAKEN_RETIRED : number of taken branches retired event:0xca counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_TAKEN_RET : number of taken mispredictions branches retired event:0xe0 counters:0,1 um:zero minimum:500 name:BR_INST_DECODED : number of branch instructions decoded event:0xe2 counters:0,1 um:zero minimum:500 name:BTB_MISSES : number of branches that miss the BTB event:0xe4 counters:0,1 um:zero minimum:500 name:BR_BOGUS : number of bogus branches event:0xe6 counters:0,1 um:zero minimum:500 name:BACLEARS : number of times BACLEAR is asserted event:0xa2 counters:0,1 um:zero minimum:500 name:RESOURCE_STALLS : cycles during resource related stalls event:0xd2 counters:0,1 um:zero minimum:500 name:PARTIAL_RAT_STALLS : cycles or events for partial stalls event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads event:0xb0 counters:0,1 um:zero minimum:3000 name:MMX_INSTR_EXEC : number of MMX instructions executed event:0xb1 counters:0,1 um:zero minimum:3000 name:MMX_SAT_INSTR_EXEC : number of MMX saturating instructions executed event:0xb2 counters:0,1 um:mmx_uops minimum:3000 name:MMX_UOPS_EXEC : number of MMX UOPS executed event:0xb3 counters:0,1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions event:0xcd counters:0,1 um:zero minimum:500 name:MMX_ASSIST : number of EMMS instructions executed event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired event:0xd4 counters:0,1 um:seg_rename minimum:500 name:SEG_RENAME_STALLS : number of segment register renaming stalls event:0xd5 counters:0,1 um:seg_rename minimum:500 name:SEG_REG_RENAMES : number of segment register renames event:0xd6 counters:0,1 um:zero minimum:500 name:RET_SEG_RENAMES : number of segment register rename events retired oprofile-1.3.0/events/i386/pii/unit_masks0000664000175000017500000000176112534404406015142 00000000000000# Pentium II possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:mesi type:bitmask default:0x0f 0x08 (M)odified cache state 0x04 (E)xclusive cache state 0x02 (S)hared cache state 0x01 (I)nvalid cache state 0x0f All cache states name:ebl type:exclusive default:0x20 0x00 self-generated transactions 0x20 any transactions name:mmx_uops type:mandatory default:0xf 0x0f mandatory name:mmx_instr_type_exec type:bitmask default:0x3f 0x01 MMX packed multiplies 0x02 MMX packed shifts 0x04 MMX pack operations 0x08 MMX unpack operations 0x10 MMX packed logical 0x20 MMX packed arithmetic 0x3f all of the above name:mmx_trans type:exclusive default:0x0 0x00 MMX->float operations 0x01 float->MMX operations name:seg_rename type:bitmask default:0xf 0x1 ES register 0x2 DS register 0x4 FS register # IA manual says this is actually FS again - no mention in errata # but test show that is really a typo error from IA manual 0x8 GS register 0xf ES, DS, FS, GS registers oprofile-1.3.0/events/i386/goldmont/0000775000175000017500000000000013323173530014155 500000000000000oprofile-1.3.0/events/i386/goldmont/events0000664000175000017500000000454613124774026015343 00000000000000# # Intel "Goldmont" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Goldmont based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # event:0x3c counters:cpuid um:cpu_clk_unhalted minimum:2000003 name:cpu_clk_unhalted : event:0x03 counters:cpuid um:ld_blocks minimum:200003 name:ld_blocks : event:0x05 counters:cpuid um:page_walks minimum:200003 name:page_walks : event:0x0e counters:cpuid um:uops_issued minimum:200003 name:uops_issued_any : event:0x13 counters:cpuid um:misalign_mem_ref minimum:200003 name:misalign_mem_ref : event:0x2e counters:cpuid um:longest_lat_cache minimum:200003 name:longest_lat_cache : event:0x30 counters:cpuid um:l2_reject_xq minimum:200003 name:l2_reject_xq_all : event:0x31 counters:cpuid um:core_reject_l2q minimum:200003 name:core_reject_l2q_all : event:0x51 counters:cpuid um:dl1 minimum:200003 name:dl1_dirty_eviction : event:0x80 counters:cpuid um:icache minimum:200003 name:icache : event:0x81 counters:cpuid um:itlb minimum:200003 name:itlb_miss : event:0x86 counters:cpuid um:fetch_stall minimum:200003 name:fetch_stall_icache_fill_pending_cycles : event:0x9c counters:cpuid um:uops_not_delivered minimum:200003 name:uops_not_delivered_any : event:0xc0 counters:cpuid um:inst_retired minimum:2000003 name:inst_retired : event:0xc2 counters:cpuid um:uops_retired minimum:2000003 name:uops_retired : event:0xc3 counters:cpuid um:machine_clears minimum:200003 name:machine_clears : event:0xc4 counters:cpuid um:br_inst_retired minimum:200003 name:br_inst_retired : event:0xc5 counters:cpuid um:br_misp_retired minimum:200003 name:br_misp_retired : event:0xca counters:cpuid um:issue_slots_not_consumed minimum:200003 name:issue_slots_not_consumed : event:0xcb counters:cpuid um:hw_interrupts minimum:200003 name:hw_interrupts : event:0xcd counters:cpuid um:cycles_div_busy minimum:2000003 name:cycles_div_busy : event:0xd0 counters:cpuid um:mem_uops_retired minimum:200003 name:mem_uops_retired : event:0xd1 counters:cpuid um:mem_load_uops_retired minimum:200003 name:mem_load_uops_retired : event:0xe6 counters:cpuid um:baclears minimum:200003 name:baclears : event:0xe7 counters:cpuid um:ms_decoded minimum:200003 name:ms_decoded_ms_entry : event:0xe9 counters:cpuid um:decode_restriction minimum:200003 name:decode_restriction_predecode_wrong : oprofile-1.3.0/events/i386/goldmont/unit_masks0000664000175000017500000006641413124774026016216 00000000000000# # Unit masks for the Intel "Goldmont" micro architecture # # See http://ark.intel.com/ for help in identifying Goldmont based CPUs # name:core_reject_l2q type:mandatory default:0x0 0x0 extra: all Counts the number of demand and L1 prefetcher requests rejected by the L2Q due to a full or nearly full condition which likely indicates back pressure from L2Q. It also counts requests that would have gone directly to the XQ, but are rejected due to a full or nearly full condition, indicating back pressure from the IDI link. The L2Q may also reject transactions from a core to insure fairness between cores, or to delay a core's dirty eviction when the address conflicts with incoming external snoops. name:decode_restriction type:mandatory default:0x1 0x1 extra: predecode_wrong Counts the number of times the prediction (from the predecode cache) for instruction length is incorrect. name:dl1 type:mandatory default:0x1 0x1 extra: dirty_eviction Counts when a modified (dirty) cache line is evicted from the data L1 cache and needs to be written back to memory. No count will occur if the evicted line is clean, and hence does not require a writeback. name:fetch_stall type:mandatory default:0x2 0x2 extra: icache_fill_pending_cycles Counts cycles that an ICache miss is outstanding, and instruction fetch is stalled. That is, the decoder queue is able to accept bytes, but the fetch unit is unable to provide bytes, while an Icache miss outstanding. Note this event is not the same as cycles to retrieve an instruction due to an Icache miss. Rather, it is the part of the Instruction Cache (ICache) miss time where no bytes are available for the decoder. name:itlb type:mandatory default:0x4 0x4 extra: miss Counts the number of times the machine was unable to find a translation in the Instruction Translation Lookaside Buffer (ITLB) for a linear address of an instruction fetch. It counts when new translation are filled into the ITLB. The event is speculative in nature, but will not count translations (page walks) that are begun and not finished, or translations that are finished but not filled into the ITLB. name:l2_reject_xq type:mandatory default:0x0 0x0 extra: all Counts the number of demand and prefetch transactions that the L2 XQ rejects due to a full or near full condition which likely indicates back pressure from the intra-die interconnect (IDI) fabric. The XQ may reject transactions from the L2Q (non-cacheable requests), L2 misses and L2 write-back victims. name:ms_decoded type:mandatory default:0x1 0x1 extra: ms_entry Counts the number of times the Microcode Sequencer (MS) starts a flow of uops from the MSROM. It does not count every time a uop is read from the MSROM. The most common case that this counts is when a micro-coded instruction is encountered by the front end of the machine. Other cases include when an instruction encounters a fault, trap, or microcode assist of any sort that initiates a flow of uops. The event will count MS startups for uops that are speculative, and subsequently cleared by branch mispredict or a machine clear. name:uops_issued type:mandatory default:0x0 0x0 extra: any Counts uops issued by the front end and allocated into the back end of the machine. This event counts uops that retire as well as uops that were speculatively executed but didn't retire. The sort of speculative uops that might be counted includes, but is not limited to those uops issued in the shadow of a miss-predicted branch, those uops that are inserted during an assist (such as for a denormal floating point result), and (previously allocated) uops that might be canceled during a machine clear. name:uops_not_delivered type:mandatory default:0x0 0x0 extra: any This event used to measure front-end inefficiencies. I.e. when front-end of the machine is not delivering uops to the back-end and the back-end has is not stalled. This event can be used to identify if the machine is truly front-end bound. When this event occurs, it is an indication that the front-end of the machine is operating at less than its theoretical peak performance. Background: We can think of the processor pipeline as being divided into 2 broader parts: Front-end and Back-end. Front-end is responsible for fetching the instruction, decoding into uops in machine understandable format and putting them into a uop queue to be consumed by back end. The back-end then takes these uops, allocates the required resources. When all resources are ready, uops are executed. If the back-end is not ready to accept uops from the front-end, then we do not want to count these as front-end bottlenecks. However, whenever we have bottlenecks in the back-end, we will have allocation unit stalls and eventually forcing the front-end to wait until the back-end is ready to receive more uops. This event counts only when back-end is requesting more uops and front-end is not able to provide them. When 3 uops are requested and no uops are delivered, the event counts 3. When 3 are requested, and only 1 is delivered, the event counts 2. When only 2 are delivered, the event counts 1. Alternatively stated, the event will not count if 3 uops are delivered, or if the back end is stalled and not requesting any uops at all. Counts indicate missed opportunities for the front-end to deliver a uop to the back end. Some examples of conditions that cause front-end efficiencies are: ICache misses, ITLB misses, and decoder restrictions that limit the front-end bandwidth. Known Issues: Some uops require multiple allocation slots. These uops will not be charged as a front end 'not delivered' opportunity, and will be regarded as a back end problem. For example, the INC instruction has one uop that requires 2 issue slots. A stream of INC instructions will not count as UOPS_NOT_DELIVERED, even though only one instruction can be issued per clock. The low uop issue rate for a stream of INC instructions is considered to be a back end issue. name:cpu_clk_unhalted type:exclusive default:core_p 0x0 extra: core_p Core cycles when core is not halted. This event uses a (_P)rogrammable general purpose performance counter. 0x1 extra: ref Reference cycles when core is not halted. This event uses a (_P)rogrammable general purpose performance counter. name:ld_blocks type:exclusive default:all_block 0x10 extra: all_block Counts anytime a load that retires is blocked for any reason. 0x10 extra:pebs all_block_pebs Counts anytime a load that retires is blocked for any reason. 0x8 extra: utlb_miss Counts loads blocked because they are unable to find their physical address in the micro TLB (UTLB). 0x8 extra:pebs utlb_miss_pebs Counts loads blocked because they are unable to find their physical address in the micro TLB (UTLB). 0x2 extra: store_forward Counts a load blocked from using a store forward because of an address/size mismatch, only one of the loads blocked from each store will be counted. 0x2 extra:pebs store_forward_pebs Counts a load blocked from using a store forward because of an address/size mismatch, only one of the loads blocked from each store will be counted. 0x1 extra: data_unknown Counts a load blocked from using a store forward, but did not occur because the store data was not available at the right time. The forward might occur subsequently when the data is available. 0x1 extra:pebs data_unknown_pebs Counts a load blocked from using a store forward, but did not occur because the store data was not available at the right time. The forward might occur subsequently when the data is available. 0x4 extra: u4k_alias Counts loads that block because their address modulo 4K matches a pending store. 0x4 extra:pebs u4k_alias_pebs Counts loads that block because their address modulo 4K matches a pending store. name:page_walks type:exclusive default:0x1 0x1 extra: d_side_cycles Counts every core cycle when a Data-side (walks due to a data operation) page walk is in progress. 0x2 extra: i_side_cycles Counts every core cycle when a Instruction-side (walks due to an instruction fetch) page walk is in progress. 0x3 extra: cycles Counts every core cycle a page-walk is in progress due to either a data memory operation or an instruction fetch. name:misalign_mem_ref type:exclusive default:load_page_split 0x2 extra: load_page_split Counts when a memory load of a uop spans a page boundary (a split) is retired. 0x2 extra:pebs load_page_split_pebs Counts when a memory load of a uop spans a page boundary (a split) is retired. 0x4 extra: store_page_split Counts when a memory store of a uop spans a page boundary (a split) is retired. 0x4 extra:pebs store_page_split_pebs Counts when a memory store of a uop spans a page boundary (a split) is retired. name:longest_lat_cache type:exclusive default:0x4f 0x4f extra: reference Counts memory requests originating from the core that reference a cache line in the L2 cache. 0x41 extra: miss Counts memory requests originating from the core that miss in the L2 cache. name:icache type:exclusive default:0x1 0x1 extra: hit Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line and that cache line is in the ICache (hit). The event strives to count on a cache line basis, so that multiple accesses which hit in a single cache line count as one ICACHE.HIT. Specifically, the event counts when straight line code crosses the cache line boundary, or when a branch target is to a new line, and that cache line is in the ICache. This event counts differently than Intel processors based on Silvermont microarchitecture. 0x2 extra: misses Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line and that cache line is not in the ICache (miss). The event strives to count on a cache line basis, so that multiple accesses which miss in a single cache line count as one ICACHE.MISS. Specifically, the event counts when straight line code crosses the cache line boundary, or when a branch target is to a new line, and that cache line is not in the ICache. This event counts differently than Intel processors based on Silvermont microarchitecture. 0x3 extra: accesses Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line. The event strives to count on a cache line basis, so that multiple fetches to a single cache line count as one ICACHE.ACCESS. Specifically, the event counts when accesses from straight line code crosses the cache line boundary, or when a branch target is to a new line. This event counts differently than Intel processors based on Silvermont microarchitecture. name:inst_retired type:exclusive default:any 0x0 extra: any Counts the number of instructions that retire execution. For instructions that consist of multiple uops, this event counts the retirement of the last uop of the instruction. The counter continues counting during hardware interrupts, traps, and inside interrupt handlers. This event uses fixed counter 0. You cannot collect a PEBs record for this event. 0x0 extra: any_p Counts the number of instructions that retire execution. For instructions that consist of multiple uops, this event counts the retirement of the last uop of the instruction. The event continues counting during hardware interrupts, traps, and inside interrupt handlers. This is an architectural performance event. This event uses a (_P)rogrammable general purpose performance counter. *This event is Precise Event capable: The EventingRIP field in the PEBS record is precise to the address of the instruction which caused the event. Note: Because PEBS records can be collected only on IA32_PMC0, only one event can use the PEBS facility at a time. 0x0 extra:pebs any_p_pebs Counts the number of instructions that retire execution. For instructions that consist of multiple uops, this event counts the retirement of the last uop of the instruction. The event continues counting during hardware interrupts, traps, and inside interrupt handlers. This is an architectural performance event. This event uses a (_P)rogrammable general purpose performance counter. *This event is Precise Event capable: The EventingRIP field in the PEBS record is precise to the address of the instruction which caused the event. Note: Because PEBS records can be collected only on IA32_PMC0, only one event can use the PEBS facility at a time. name:uops_retired type:exclusive default:any 0x0 extra: any Counts uops which retired 0x0 extra:pebs any_pebs Counts uops which retired 0x1 extra: ms Counts uops retired that are from the complex flows issued by the micro-sequencer (MS). Counts both the uops from a micro-coded instruction, and the uops that might be generated from a micro-coded assist. 0x1 extra:pebs ms_pebs Counts uops retired that are from the complex flows issued by the micro-sequencer (MS). Counts both the uops from a micro-coded instruction, and the uops that might be generated from a micro-coded assist. name:machine_clears type:exclusive default:0x0 0x0 extra: all Counts machine clears for any reason 0x1 extra: smc Counts the number of times that the processor detects that a program is writing to a code section and has to perform a machine clear because of that modification. Self-modifying code (SMC) causes a severe penalty in all Intel architecture processors. 0x2 extra: memory_ordering Counts machine clears due to memory ordering issues. This occurs when a snoop request happens and the machine is uncertain if memory ordering will be preserved - as another core is in the process of modifying the data. 0x4 extra: fp_assist Counts machine clears due to floating point (FP) operations needing assists. For instance, if the result was a floating point denormal, the hardware clears the pipeline and reissues uops to produce the correct IEEE compliant denormal result. 0x8 extra: disambiguation Counts machine clears due to memory disambiguation. Memory disambiguation happens when a load which has been issued conflicts with a previous unretired store in the pipeline whose address was not known at issue time, but is later resolved to be the same as the load address. name:br_inst_retired type:exclusive default:all_branches 0x0 extra: all_branches Counts branch instructions retired for all branch types. This is an architectural performance event. 0x0 extra:pebs all_branches_pebs Counts branch instructions retired for all branch types. This is an architectural performance event. 0x7e extra: jcc Counts retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was taken and when it was not taken. 0x7e extra:pebs jcc_pebs Counts retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was taken and when it was not taken. 0xfe extra: taken_jcc Counts Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were taken and does not count when the Jcc branch instruction were not taken. 0xfe extra:pebs taken_jcc_pebs Counts Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were taken and does not count when the Jcc branch instruction were not taken. 0xf9 extra: call Counts near CALL branch instructions retired. 0xf9 extra:pebs call_pebs Counts near CALL branch instructions retired. 0xfd extra: rel_call Counts near relative CALL branch instructions retired. 0xfd extra:pebs rel_call_pebs Counts near relative CALL branch instructions retired. 0xfb extra: ind_call Counts near indirect CALL branch instructions retired. 0xfb extra:pebs ind_call_pebs Counts near indirect CALL branch instructions retired. 0xf7 extra: return Counts near return branch instructions retired. 0xf7 extra:pebs return_pebs Counts near return branch instructions retired. 0xeb extra: non_return_ind Counts near indirect call or near indirect jmp branch instructions retired. 0xeb extra:pebs non_return_ind_pebs Counts near indirect call or near indirect jmp branch instructions retired. 0xbf extra: far_branch Counts far branch instructions retired. This includes far jump, far call and return, and Interrupt call and return. 0xbf extra:pebs far_branch_pebs Counts far branch instructions retired. This includes far jump, far call and return, and Interrupt call and return. name:br_misp_retired type:exclusive default:all_branches 0x0 extra: all_branches Counts mispredicted branch instructions retired including all branch types. 0x0 extra:pebs all_branches_pebs Counts mispredicted branch instructions retired including all branch types. 0x7e extra: jcc Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was supposed to be taken and when it was not supposed to be taken (but the processor predicted the opposite condition). 0x7e extra:pebs jcc_pebs Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was supposed to be taken and when it was not supposed to be taken (but the processor predicted the opposite condition). 0xfe extra: taken_jcc Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were supposed to be taken but the processor predicted that it would not be taken. 0xfe extra:pebs taken_jcc_pebs Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were supposed to be taken but the processor predicted that it would not be taken. 0xfb extra: ind_call Counts mispredicted near indirect CALL branch instructions retired, where the target address taken was not what the processor predicted. 0xfb extra:pebs ind_call_pebs counts mispredicted near indirect CALL branch instructions retired, where the target address taken was not what the processor predicted. 0xf7 extra: return Counts mispredicted near RET branch instructions retired, where the return address taken was not what the processor predicted. 0xf7 extra:pebs return_pebs Counts mispredicted near RET branch instructions retired, where the return address taken was not what the processor predicted. 0xeb extra: non_return_ind Counts mispredicted branch instructions retired that were near indirect call or near indirect jmp, where the target address taken was not what the processor predicted. 0xeb extra:pebs non_return_ind_pebs Counts mispredicted branch instructions retired that were near indirect call or near indirect jmp, where the target address taken was not what the processor predicted. name:issue_slots_not_consumed type:exclusive default:0x0 0x0 extra: any Counts the number of issue slots per core cycle that were not consumed by the backend due to either a full resource in the backend (RESOURCE_FULL) or due to the processor recovering from some event (RECOVERY) 0x1 extra: resource_full Counts the number of issue slots per core cycle that were not consumed because of a full resource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), reservation stations (RS), load/store buffers, physical registers, or any other needed machine resource that is currently unavailable. Note that uops must be available for consumption in order for this event to fire. If a uop is not available (Instruction Queue is empty), this event will not count. 0x2 extra: recovery Counts the number of issue slots per core cycle that were not consumed by the backend because allocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g. the event is relevant during certain microcode flows). Counts all issue slots blocked while within this window including slots where uops were not available in the Instruction Queue. name:hw_interrupts type:exclusive default:0x1 0x1 extra: received Counts hardware interrupts received by the processor. 0x4 extra: pending_and_masked Counts core cycles during which there are pending interrupts, but interrupts are masked (EFLAGS.IF = 0). name:cycles_div_busy type:exclusive default:0x0 0x0 extra: all Counts core cycles if either divide unit is busy. 0x1 extra: idiv Counts core cycles the integer divide unit is busy. 0x2 extra: fpdiv Counts core cycles the floating point divide unit is busy. name:mem_uops_retired type:exclusive default:all 0x83 extra: all Counts the number of memory uops retired that is either a loads or a store or both. 0x81 extra: all_loads Counts the number of load uops retired 0x81 extra:pebs all_loads_pebs Counts the number of load uops retired 0x82 extra: all_stores Counts the number of store uops retired. 0x82 extra:pebs all_stores_pebs Counts the number of store uops retired. 0x83 extra:pebs all_pebs Counts the number of memory uops retired that is either a loads or a store or both. 0x11 extra: dtlb_miss_loads Counts load uops retired that caused a DTLB miss. 0x11 extra:pebs dtlb_miss_loads_pebs Counts load uops retired that caused a DTLB miss. 0x12 extra: dtlb_miss_stores Counts store uops retired that caused a DTLB miss. 0x12 extra:pebs dtlb_miss_stores_pebs Counts store uops retired that caused a DTLB miss. 0x13 extra: dtlb_miss Counts uops retired that had a DTLB miss on load, store or either. Note that when two distinct memory operations to the same page miss the DTLB, only one of them will be recorded as a DTLB miss. 0x13 extra:pebs dtlb_miss_pebs Counts uops retired that had a DTLB miss on load, store or either. Note that when two distinct memory operations to the same page miss the DTLB, only one of them will be recorded as a DTLB miss. 0x21 extra: lock_loads Counts locked memory uops retired. This includes "regular" locks and bus locks. (To specifically count bus locks only, see the Offcore response event.) A locked access is one with a lock prefix, or an exchange to memory. See the SDM for a complete description of which memory load accesses are locks. 0x21 extra:pebs lock_loads_pebs Counts locked memory uops retired. This includes "regular" locks and bus locks. (To specifically count bus locks only, see the Offcore response event.) A locked access is one with a lock prefix, or an exchange to memory. See the SDM for a complete description of which memory load accesses are locks. 0x41 extra: split_loads Counts load uops retired where the data requested spans a 64 byte cache line boundary. 0x41 extra:pebs split_loads_pebs Counts load uops retired where the data requested spans a 64 byte cache line boundary. 0x42 extra: split_stores Counts store uops retired where the data requested spans a 64 byte cache line boundary. 0x42 extra:pebs split_stores_pebs Counts store uops retired where the data requested spans a 64 byte cache line boundary. 0x43 extra: split Counts memory uops retired where the data requested spans a 64 byte cache line boundary. 0x43 extra:pebs split_pebs Counts memory uops retired where the data requested spans a 64 byte cache line boundary. name:mem_load_uops_retired type:exclusive default:l1_hit 0x1 extra: l1_hit Counts load uops retired that hit the L1 data cache. 0x1 extra:pebs l1_hit_pebs Counts load uops retired that hit the L1 data cache. 0x8 extra: l1_miss Counts load uops retired that miss the L1 data cache. 0x8 extra:pebs l1_miss_pebs Counts load uops retired that miss the L1 data cache. 0x2 extra: l2_hit Counts load uops retired that hit in the L2 cache. 0x2 extra:pebs l2_hit_pebs Counts load uops retired that hit in the L2 cache. 0x10 extra: l2_miss Counts load uops retired that miss in the L2 cache. 0x10 extra:pebs l2_miss_pebs Counts load uops retired that miss in the L2 cache. 0x20 extra: hitm Counts load uops retired where the cache line containing the data was in the modified state of another core or modules cache (HITM). More specifically, this means that when the load address was checked by other caching agents (typically another processor) in the system, one of those caching agents indicated that they had a dirty copy of the data. Loads that obtain a HITM response incur greater latency than most is typical for a load. In addition, since HITM indicates that some other processor had this data in its cache, it implies that the data was shared between processors, or potentially was a lock or semaphore value. This event is useful for locating sharing, false sharing, and contended locks. 0x20 extra:pebs hitm_pebs Counts load uops retired where the cache line containing the data was in the modified state of another core or modules cache (HITM). More specifically, this means that when the load address was checked by other caching agents (typically another processor) in the system, one of those caching agents indicated that they had a dirty copy of the data. Loads that obtain a HITM response incur greater latency than most is typical for a load. In addition, since HITM indicates that some other processor had this data in its cache, it implies that the data was shared between processors, or potentially was a lock or semaphore value. This event is useful for locating sharing, false sharing, and contended locks. 0x40 extra: wcb_hit Counts memory load uops retired where the data is retrieved from the WCB (or fill buffer), indicating that the load found its data while that data was in the process of being brought into the L1 cache. Typically a load will receive this indication when some other load or prefetch missed the L1 cache and was in the process of retrieving the cache line containing the data, but that process had not yet finished (and written the data back to the cache). For example, consider load X and Y, both referencing the same cache line that is not in the L1 cache. If load X misses cache first, it obtains and WCB (or fill buffer) and begins the process of requesting the data. When load Y requests the data, it will either hit the WCB, or the L1 cache, depending on exactly what time the request to Y occurs. 0x40 extra:pebs wcb_hit_pebs Counts memory load uops retired where the data is retrieved from the WCB (or fill buffer), indicating that the load found its data while that data was in the process of being brought into the L1 cache. Typically a load will receive this indication when some other load or prefetch missed the L1 cache and was in the process of retrieving the cache line containing the data, but that process had not yet finished (and written the data back to the cache). For example, consider load X and Y, both referencing the same cache line that is not in the L1 cache. If load X misses cache first, it obtains and WCB (or fill buffer) and begins the process of requesting the data. When load Y requests the data, it will either hit the WCB, or the L1 cache, depending on exactly what time the request to Y occurs. 0x80 extra: dram_hit Counts memory load uops retired where the data is retrieved from DRAM. Event is counted at retirement, so the speculative loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the L2 cache, hit DRAM, hit in the WCB or receive a HITM response. 0x80 extra:pebs dram_hit_pebs Counts memory load uops retired where the data is retrieved from DRAM. Event is counted at retirement, so the speculative loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the L2 cache, hit DRAM, hit in the WCB or receive a HITM response. name:baclears type:exclusive default:0x1 0x1 extra: all Counts the number of times a BACLEAR is signaled for any reason, including, but not limited to indirect branch/call, Jcc (Jump on Conditional Code/Jump if Condition is Met) branch, unconditional branch/call, and returns. 0x8 extra: return Counts BACLEARS on return instructions. 0x10 extra: cond Counts BACLEARS on Jcc (Jump on Conditional Code/Jump if Condition is Met) branches. oprofile-1.3.0/events/i386/piii/0000775000175000017500000000000013323173530013264 500000000000000oprofile-1.3.0/events/i386/piii/events0000664000175000017500000001746212534404406014447 00000000000000# Pentium III events # event:0x79 counters:0,1 um:zero minimum:6000 name:CPU_CLK_UNHALTED : clocks processor is not halted event:0x43 counters:0,1 um:zero minimum:500 name:DATA_MEM_REFS : all memory references, cachable and non event:0x45 counters:0,1 um:zero minimum:500 name:DCU_LINES_IN : total lines allocated in the DCU event:0x46 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_IN : number of M state lines allocated in DCU event:0x47 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_OUT : number of M lines evicted from the DCU event:0x48 counters:0,1 um:zero minimum:500 name:DCU_MISS_OUTSTANDING : number of cycles while DCU miss outstanding event:0x80 counters:0,1 um:zero minimum:500 name:IFU_IFETCH : number of non/cachable instruction fetches event:0x81 counters:0,1 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x85 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled event:0x28 counters:0,1 um:mesi minimum:500 name:L2_IFETCH : number of L2 instruction fetches event:0x29 counters:0,1 um:mesi minimum:500 name:L2_LD : number of L2 data loads event:0x2a counters:0,1 um:mesi minimum:500 name:L2_ST : number of L2 data stores event:0x24 counters:0,1 um:zero minimum:500 name:L2_LINES_IN : number of allocated lines in L2 event:0x26 counters:0,1 um:zero minimum:500 name:L2_LINES_OUT : number of recovered lines from L2 event:0x25 counters:0,1 um:zero minimum:500 name:L2_M_LINES_INM : number of modified lines allocated in L2 event:0x27 counters:0,1 um:zero minimum:500 name:L2_M_LINES_OUTM : number of modified lines removed from L2 event:0x2e counters:0,1 um:mesi minimum:500 name:L2_RQSTS : number of L2 requests event:0x21 counters:0,1 um:zero minimum:500 name:L2_ADS : number of L2 address strobes event:0x22 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY : number of cycles data bus was busy event:0x23 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY_RD : cycles data bus was busy in xfer from L2 to CPU event:0x62 counters:0,1 um:ebl minimum:500 name:BUS_DRDY_CLOCKS : number of clocks DRDY is asserted event:0x63 counters:0,1 um:ebl minimum:500 name:BUS_LOCK_CLOCKS : number of clocks LOCK is asserted event:0x60 counters:0,1 um:zero minimum:500 name:BUS_REQ_OUTSTANDING : number of outstanding bus requests event:0x65 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BRD : number of burst read transactions event:0x66 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_RFO : number of read for ownership transactions event:0x67 counters:0,1 um:ebl minimum:500 name:BUS_TRANS_WB : number of write back transactions event:0x68 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_IFETCH : number of instruction fetch transactions event:0x69 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_INVAL : number of invalidate transactions event:0x6a counters:0,1 um:ebl minimum:500 name:BUS_TRAN_PWR : number of partial write transactions event:0x6b counters:0,1 um:ebl minimum:500 name:BUS_TRANS_P : number of partial transactions event:0x6c counters:0,1 um:ebl minimum:500 name:BUS_TRANS_IO : number of I/O transactions event:0x6d counters:0,1 um:ebl minimum:500 name:BUS_TRANS_DEF : number of deferred transactions event:0x6e counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BURST : number of burst transactions event:0x70 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_ANY : number of all transactions event:0x6f counters:0,1 um:ebl minimum:500 name:BUS_TRAN_MEM : number of memory transactions event:0x64 counters:0,1 um:zero minimum:500 name:BUS_DATA_RCV : bus cycles this processor is receiving data event:0x61 counters:0,1 um:zero minimum:500 name:BUS_BNR_DRV : bus cycles this processor is driving BNR pin event:0x7a counters:0,1 um:zero minimum:500 name:BUS_HIT_DRV : bus cycles this processor is driving HIT pin event:0x7b counters:0,1 um:zero minimum:500 name:BUS_HITM_DRV : bus cycles this processor is driving HITM pin event:0x7e counters:0,1 um:zero minimum:500 name:BUS_SNOOP_STALL : cycles during bus snoop stall event:0xc1 counters:0 um:zero minimum:3000 name:COMP_FLOP_RET : number of computational FP operations retired event:0x10 counters:0 um:zero minimum:3000 name:FLOPS : number of computational FP operations executed event:0x11 counters:1 um:zero minimum:500 name:FP_ASSIST : number of FP exceptions handled by microcode event:0x12 counters:1 um:zero minimum:1000 name:MUL : number of multiplies event:0x13 counters:1 um:zero minimum:500 name:DIV : number of divides event:0x14 counters:0 um:zero minimum:1000 name:CYCLES_DIV_BUSY : cycles divider is busy event:0x03 counters:0,1 um:zero minimum:500 name:LD_BLOCKS : number of store buffer blocks event:0x04 counters:0,1 um:zero minimum:500 name:SB_DRAINS : number of store buffer drain cycles event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references event:0x07 counters:0,1 um:kni_prefetch minimum:500 name:EMON_KNI_PREF_DISPATCHED : number of KNI pre-fetch/weakly ordered insns dispatched event:0x4b counters:0,1 um:kni_prefetch minimum:500 name:EMON_KNI_PREF_MISS : number of KNI pre-fetch/weakly ordered insns that miss all caches event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED : number of instructions retired event:0xc2 counters:0,1 um:zero minimum:6000 name:UOPS_RETIRED : number of UOPs retired event:0xd0 counters:0,1 um:zero minimum:6000 name:INST_DECODED : number of instructions decoded event:0xd8 counters:0,1 um:kni_inst_retired minimum:3000 name:EMON_KNI_INST_RETIRED : number of KNI instructions retired event:0xd9 counters:0,1 um:kni_inst_retired minimum:3000 name:EMON_KNI_COMP_INST_RET : number of KNI computation instructions retired event:0xc8 counters:0,1 um:zero minimum:500 name:HW_INT_RX : number of hardware interrupts received event:0xc6 counters:0,1 um:zero minimum:500 name:CYCLES_INT_MASKED : cycles interrupts are disabled event:0xc7 counters:0,1 um:zero minimum:500 name:CYCLES_INT_PENDING_AND_MASKED : cycles interrupts are disabled with pending interrupts event:0xc4 counters:0,1 um:zero minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired event:0xc9 counters:0,1 um:zero minimum:500 name:BR_TAKEN_RETIRED : number of taken branches retired event:0xca counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_TAKEN_RET : number of taken mispredictions branches retired event:0xe0 counters:0,1 um:zero minimum:500 name:BR_INST_DECODED : number of branch instructions decoded event:0xe2 counters:0,1 um:zero minimum:500 name:BTB_MISSES : number of branches that miss the BTB event:0xe4 counters:0,1 um:zero minimum:500 name:BR_BOGUS : number of bogus branches event:0xe6 counters:0,1 um:zero minimum:500 name:BACLEARS : number of times BACLEAR is asserted event:0xa2 counters:0,1 um:zero minimum:500 name:RESOURCE_STALLS : cycles during resource related stalls event:0xd2 counters:0,1 um:zero minimum:500 name:PARTIAL_RAT_STALLS : cycles or events for partial stalls event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads event:0xb1 counters:0,1 um:zero minimum:3000 name:MMX_SAT_INSTR_EXEC : number of MMX saturating instructions executed event:0xb2 counters:0,1 um:mmx_uops minimum:3000 name:MMX_UOPS_EXEC : number of MMX UOPS executed event:0xb3 counters:0,1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions event:0xcd counters:0,1 um:zero minimum:500 name:MMX_ASSIST : number of EMMS instructions executed event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired oprofile-1.3.0/events/i386/piii/unit_masks0000664000175000017500000000205612534404406015311 00000000000000# Pentium III possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:mesi type:bitmask default:0x0f 0x08 (M)odified cache state 0x04 (E)xclusive cache state 0x02 (S)hared cache state 0x01 (I)nvalid cache state 0x0f All cache states name:ebl type:exclusive default:0x20 0x00 self-generated transactions 0x20 any transactions name:kni_prefetch type:exclusive default:0x0 0x00 prefetch NTA 0x01 prefetch T1 0x02 prefetch T2 0x03 weakly-ordered stores # this bitmask can seems weirds but is correct, note there is no way to only # count scalar SIMD instructions name:kni_inst_retired type:exclusive default:0x0 0x00 packed and scalar 0x01 packed name:mmx_uops type:mandatory default:0xf 0x0f mandatory name:mmx_instr_type_exec type:bitmask default:0x3f 0x01 MMX packed multiplies 0x02 MMX packed shifts 0x04 MMX pack operations 0x08 MMX unpack operations 0x10 MMX packed logical 0x20 MMX packed arithmetic 0x3f all of the above name:mmx_trans type:exclusive default:0x0 0x00 MMX->float operations 0x01 float->MMX operations oprofile-1.3.0/events/i386/core/0000775000175000017500000000000013323173530013262 500000000000000oprofile-1.3.0/events/i386/core/events0000664000175000017500000002646212534404406014445 00000000000000# Core Solo / Duo events # # Architectural events # event:0x3c counters:0,1 um:nonhlt minimum:6000 name:CPU_CLK_UNHALTED : Unhalted clock cycles event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED : number of instructions retired event:0x2e counters:0,1 um:mesi minimum:6000 name:L2_RQSTS : number of L2 requests # # Model specific events # event:0x03 counters:0,1 um:zero minimum:500 name:LD_BLOCKS : number of store buffer blocks event:0x04 counters:0,1 um:zero minimum:500 name:SB_DRAINS : number of store buffer drain cycles event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads event:0x07 counters:0,1 um:kni_prefetch minimum:500 name:EMON_KNI_PREF_DISPATCHED : number of SSE pre-fetch/weakly ordered insns retired event:0x10 counters:0 um:zero minimum:3000 name:FLOPS : number of computational FP operations executed event:0x11 counters:1 um:zero minimum:500 name:FP_ASSIST : number of FP exceptions handled by microcode event:0x12 counters:1 um:zero minimum:1000 name:MUL : number of multiplies event:0x13 counters:1 um:zero minimum:500 name:DIV : number of divides event:0x14 counters:0 um:zero minimum:1000 name:CYCLES_DIV_BUSY : cycles divider is busy event:0x21 counters:0,1 um:zero minimum:500 name:L2_ADS : number of L2 address strobes event:0x22 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY : number of cycles data bus was busy event:0x23 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY_RD : cycles data bus was busy in xfer from L2 to CPU event:0x24 counters:0,1 um:zero minimum:500 name:L2_LINES_IN : number of allocated lines in L2 event:0x25 counters:0,1 um:zero minimum:500 name:L2_M_LINES_INM : number of modified lines allocated in L2 event:0x26 counters:0,1 um:zero minimum:500 name:L2_LINES_OUT : number of recovered lines from L2 event:0x27 counters:0,1 um:zero minimum:500 name:L2_M_LINES_OUTM : number of modified lines removed from L2 event:0x28 counters:0,1 um:mesi minimum:500 name:L2_IFETCH : number of L2 instruction fetches event:0x29 counters:0,1 um:mesi minimum:500 name:L2_LD : number of L2 data loads event:0x2a counters:0,1 um:mesi minimum:500 name:L2_ST : number of L2 data stores event:0x30 counters:0,1 um:mesi minimum:500 name:L2_REJECT_CYCLES : Cycles L2 is busy and rejecting new requests event:0x32 counters:0,1 um:mesi minimum:500 name:L2_NO_REQUEST_CYCLES : Cycles there is no request to access L2 event:0x3a counters:0,1 um:est_trans minimum:500 name:EST_TRANS_ALL : Intel(tm) Enhanced SpeedStep(r) Technology transitions event:0x3b counters:0,1 um:xc0 minimum:500 name:THERMAL_TRIP : Duration in a thremal trip based on the current core clock event:0x40 counters:0,1 um:mesi minimum:500 name:DCACHE_CACHE_LD : L1 cacheable data read operations event:0x41 counters:0,1 um:mesi minimum:500 name:DCACHE_CACHE_ST : L1 cacheable data write operations event:0x42 counters:0,1 um:mesi minimum:500 name:DCACHE_CACHE_LOCK : L1 cacheable lock read operations to invalid state event:0x43 counters:0,1 um:one minimum:500 name:DATA_MEM_REFS : all L1 memory references, cachable and non event:0x44 counters:0,1 um:two minimum:500 name:DATA_MEM_CACHE_REFS : L1 data cacheable read and write operations event:0x45 counters:0,1 um:x0f minimum:500 name:DCACHE_REPL : L1 data cache line replacements event:0x46 counters:0,1 um:zero minimum:500 name:DCACHE_M_REPL : L1 data M-state cache line allocated event:0x47 counters:0,1 um:zero minimum:500 name:DCACHE_M_EVICT : L1 data M-state cache line evicted event:0x48 counters:0,1 um:dc_pend_miss minimum:500 name:DCACHE_PEND_MISS : Weighted cycles of L1 miss outstanding event:0x49 counters:0,1 um:zero minimum:500 name:DTLB_MISS : Data references that missed TLB event:0x4b counters:0,1 um:sse_miss minimum:500 name:SSE_PREF_MISS : SSE instructions that missed all caches event:0x4f counters:0,1 um:zero minimum:500 name:L1_PREF_REQ : L1 prefetch requests due to DCU cache misses # event:0x60 counters:0,1 um:zero minimum:500 name:BUS_REQ_OUTSTANDING : weighted number of outstanding bus requests event:0x61 counters:0,1 um:zero minimum:500 name:BUS_BNR_DRV : External bus cycles this processor is driving BNR pin event:0x62 counters:0,1 um:zero minimum:500 name:BUS_DRDY_CLOCKS : External bus cycles DRDY is asserted event:0x63 counters:0,1 um:zero minimum:500 name:BUS_LOCK_CLOCKS : External bus cycles LOCK is asserted event:0x64 counters:0,1 um:x40 minimum:500 name:BUS_DATA_RCV : External bus cycles this processor is receiving data event:0x65 counters:0,1 um:zero minimum:500 name:BUS_TRAN_BRD : number of burst read transactions event:0x66 counters:0,1 um:zero minimum:500 name:BUS_TRAN_RFO : number of completed read for ownership transactions event:0x67 counters:0,1 um:xc0 minimum:500 name:BUS_TRAN_WB : number of completed writeback transactions event:0x68 counters:0,1 um:zero minimum:500 name:BUS_TRAN_IFETCH : number of completed instruction fetch transactions event:0x69 counters:0,1 um:zero minimum:500 name:BUS_TRAN_INVAL : number of completed invalidate transactions event:0x6a counters:0,1 um:zero minimum:500 name:BUS_TRAN_PWR : number of completed partial write transactions event:0x6b counters:0,1 um:zero minimum:500 name:BUS_TRANS_P : number of completed partial transactions event:0x6c counters:0,1 um:zero minimum:500 name:BUS_TRANS_IO : number of completed I/O transactions event:0x6d counters:0,1 um:x20 minimum:500 name:BUS_TRANS_DEF : number of completed defer transactions event:0x6e counters:0,1 um:xc0 minimum:500 name:BUS_TRAN_BURST : number of completed burst transactions event:0x6f counters:0,1 um:xc0 minimum:500 name:BUS_TRAN_MEM : number of completed memory transactions event:0x70 counters:0,1 um:xc0 minimum:500 name:BUS_TRAN_ANY : number of any completed bus transactions event:0x77 counters:0,1 um:zero minimum:500 name:BUS_SNOOPS : External bus cycles event:0x78 counters:0,1 um:one minimum:500 name:DCU_SNOOP_TO_SHARE : DCU snoops to share-state L1 cache line due to L1 misses event:0x7d counters:0,1 um:zero minimum:500 name:BUS_NOT_IN_USE : Number of cycles there is no transaction from the core event:0x7e counters:0,1 um:zero minimum:500 name:BUS_SNOOP_STALL : Number of bus cycles during bus snoop stall event:0x80 counters:0,1 um:zero minimum:500 name:ICACHE_READS : number of instruction fetches event:0x81 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : number of instruction fetch misses event:0x85 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled event:0x88 counters:0,1 um:zero minimum:3000 name:BR_INST_EXEC : Branch instructions executed (not necessarily retired) event:0x89 counters:0,1 um:zero minimum:3000 name:BR_MISSP_EXEC : Branch instructions executed that were mispredicted at execution event:0x8a counters:0,1 um:zero minimum:3000 name:BR_BAC_MISSP_EXEC : Branch instructions executed that were mispredicted at Front End (BAC) event:0x8b counters:0,1 um:zero minimum:3000 name:BR_CND_EXEC : Conditional Branch instructions executed event:0x8c counters:0,1 um:zero minimum:3000 name:BR_CND_MISSP_EXEC : Conditional Branch instructions executed that were mispredicted event:0x8d counters:0,1 um:zero minimum:3000 name:BR_IND_EXEC : Indirect Branch instructions executed event:0x8e counters:0,1 um:zero minimum:3000 name:BR_IND_MISSP_EXEC : Indirect Branch instructions executed that were mispredicted event:0x8f counters:0,1 um:zero minimum:3000 name:BR_RET_EXEC : Return Branch instructions executed event:0x90 counters:0,1 um:zero minimum:3000 name:BR_RET_MISSP_EXEC : Return Branch instructions executed that were mispredicted at Execution event:0x91 counters:0,1 um:zero minimum:3000 name:BR_RET_BAC_MISSP_EXEC :Return Branch instructions executed that were mispredicted at Front End (BAC) event:0x92 counters:0,1 um:zero minimum:3000 name:BR_CALL_EXEC : CALL instruction executed event:0x93 counters:0,1 um:zero minimum:3000 name:BR_CALL_MISSP_EXEC : CALL instruction executed and miss predicted event:0x94 counters:0,1 um:zero minimum:3000 name:BR_IND_CALL_EXEC : Indirect CALL instruction executed event:0xa2 counters:0,1 um:zero minimum:500 name:RESOURCE_STALLS : cycles during resource related stalls event:0xb0 counters:0,1 um:zero minimum:500 name:MMX_INSTR_EXEC : number of MMX instructions executed (not MOVQ and MOVD) event:0xb1 counters:0,1 um:zero minimum:3000 name:SIMD_SAT_INSTR_EXEC : number of SIMD saturating instructions executed event:0xb3 counters:0,1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions event:0xc1 counters:0 um:zero minimum:3000 name:COMP_FLOP_RET : number of computational FP operations retired event:0xc2 counters:0,1 um:zero minimum:6000 name:UOPS_RETIRED : number of UOPs retired event:0xc3 counters:0,1 um:zero minimum:500 name:SMC_DETECTED : number of times self-modifying code condition is detected event:0xc4 counters:0,1 um:zero minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired event:0xc6 counters:0,1 um:zero minimum:500 name:CYCLES_INT_MASKED : cycles interrupts are disabled event:0xc7 counters:0,1 um:zero minimum:500 name:CYCLES_INT_PENDING_AND_MASKED : cycles interrupts are disabled with pending interrupts event:0xc8 counters:0,1 um:zero minimum:500 name:HW_INT_RX : number of hardware interrupts received event:0xc9 counters:0,1 um:zero minimum:500 name:BR_TAKEN_RETIRED : number of taken branches retired event:0xca counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_TAKEN_RET : number of taken mispredictions branches retired event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions event:0xcd counters:0,1 um:zero minimum:500 name:MMX_ASSIST : number of EMMS instructions executed event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired event:0xd0 counters:0,1 um:zero minimum:6000 name:INST_DECODED : number of instructions decoded event:0xd7 counters:0,1 um:zero minimum:3000 name:ESP_UOPS : Number of ESP folding instructions decoded event:0xd8 counters:0,1 um:sse_sse2_inst_retired minimum:3000 name:EMON_SSE_SSE2_INST_RETIRED : Streaming SIMD Extensions Instructions Retired event:0xd9 counters:0,1 um:sse_sse2_inst_retired minimum:3000 name:EMON_SSE_SSE2_COMP_INST_RETIRED : Computational SSE Instructions Retired event:0xda counters:0,1 um:fused minimum:3000 name:EMON_FUSED_UOPS_RET : Number of retired fused micro-ops event:0xdb counters:0,1 um:zero minimum:3000 name:EMON_UNFUSION : Number of unfusion events in the ROB, happened on a FP exception to a fused uOp event:0xe0 counters:0,1 um:zero minimum:500 name:BR_INST_DECODED : number of branch instructions decoded event:0xe2 counters:0,1 um:zero minimum:500 name:BTB_MISSES : number of branches that miss the BTB event:0xe4 counters:0,1 um:zero minimum:500 name:BR_BOGUS : number of bogus branches event:0xe6 counters:0,1 um:zero minimum:500 name:BACLEARS : number of times BACLEAR is asserted event:0xf0 counters:0,1 um:zero minimum:3000 name:EMON_PREF_RQSTS_UP : Number of upward prefetches issued event:0xf8 counters:0,1 um:zero minimum:3000 name:EMON_PREF_RQSTS_DN : Number of downward prefetches issued oprofile-1.3.0/events/i386/core/unit_masks0000664000175000017500000000402512534404406015305 00000000000000# Core Solo / Core Duo possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:one type:mandatory default:0x1 0x1 No unit mask name:two type:mandatory default:0x2 0x2 No unit mask name:x0f type:mandatory default:0xf 0xf No unit mask name:x20 type:mandatory default:0x20 0x20 No unit mask name:x40 type:mandatory default:0x40 0x40 No unit mask name:xc0 type:mandatory default:0xc0 0xc0 No unit mask name:nonhlt type:exclusive default:0x0 0x0 Unhalted core cycles 0x1 Unhalted bus cycles 0x2 Unhalted bus cycles of this core while the other core is halted name:mesi type:bitmask default:0x0f 0x08 (M)odified cache state 0x04 (E)xclusive cache state 0x02 (S)hared cache state 0x01 (I)nvalid cache state 0x0f All cache states 0x10 HW prefetched line only 0x20 all prefetched line w/o regarding mask 0x10. name:est_trans type:exclusive default:0x00 0x00 any transitions 0x10 Intel(tm) Enhanced SpeedStep(r) Technology frequency transitions 0x20 any transactions name:kni_prefetch type:exclusive default:0x0 0x00 prefetch NTA 0x01 prefetch T1 0x02 prefetch T2 0x03 weakly-ordered stores # this bitmask can seems weirds but is correct, note there is no way to only # count scalar SIMD instructions name:sse_sse2_inst_retired type:exclusive default:0x0 0x00 SSE Packed Single 0x01 SSE Scalar-Single 0x02 SSE2 Packed-Double 0x03 SSE2 Scalar-Double name:mmx_instr_type_exec type:bitmask default:0x3f 0x01 MMX packed multiplies 0x02 MMX packed shifts 0x04 MMX pack operations 0x08 MMX unpack operations 0x10 MMX packed logical 0x20 MMX packed arithmetic 0x3f all of the above name:mmx_trans type:exclusive default:0x0 0x00 MMX->float operations 0x01 float->MMX operations name:fused type:exclusive default:0x0 0x00 All fused micro-ops 0x01 Only load+Op micro-ops 0x02 Only std+sta micro-ops name:dc_pend_miss type:exclusive default:0x0 0x00 Weighted cycles 0x01 Duration of cycles name:sse_miss type:exclusive default:0x0 0x00 PREFETCHNTA 0x01 PREFETCHT1 0x02 PREFETCHT2 0x03 SSE streaming store instructions oprofile-1.3.0/events/i386/p4/0000775000175000017500000000000013323173530012655 500000000000000oprofile-1.3.0/events/i386/p4/events0000664000175000017500000001062412534404406014031 00000000000000# Pentium IV events # # NOTE: events cannot currently be 0x00 due to event binding checks in # driver # event:0x1d counters:0,4 um:global_power_events minimum:3000 name:GLOBAL_POWER_EVENTS : time during which processor is not stopped event:0x01 counters:3,7 um:branch_retired minimum:3000 name:BRANCH_RETIRED : retired branches event:0x02 counters:3,7 um:mispred_branch_retired minimum:3000 name:MISPRED_BRANCH_RETIRED : retired mispredicted branches event:0x04 counters:0,4 um:bpu_fetch_request minimum:3000 name:BPU_FETCH_REQUEST : instruction fetch requests from the branch predict unit event:0x05 counters:0,4 um:itlb_reference minimum:3000 name:ITLB_REFERENCE : translations using the instruction translation lookaside buffer event:0x06 counters:2,6 um:memory_cancel minimum:3000 name:MEMORY_CANCEL : cancelled requesets in data cache address control unit event:0x07 counters:2,6 um:memory_complete minimum:3000 name:MEMORY_COMPLETE : completed split event:0x08 counters:2,6 um:load_port_replay minimum:3000 name:LOAD_PORT_REPLAY : replayed events at the load port event:0x09 counters:2,6 um:store_port_replay minimum:3000 name:STORE_PORT_REPLAY : replayed events at the store port event:0x0a counters:0,4 um:mob_load_replay minimum:3000 name:MOB_LOAD_REPLAY : replayed loads from the memory order buffer event:0x0c counters:0,4 um:bsq_cache_reference minimum:3000 name:BSQ_CACHE_REFERENCE : cache references seen by the bus unit # intel doc vol 3 table A-1 P4 and xeon with cpuid signature < 0xf27 doen't allow MSR_FSB_ESCR1 so on only counter 0 is available event:0x0d counters:0 um:ioq minimum:3000 name:IOQ_ALLOCATION : bus transactions # FIXME the unit mask associated is known to get different behavior between cpu # step id, it need to be documented in P4 events doc event:0x0e counters:4 um:ioq minimum:3000 name:IOQ_ACTIVE_ENTRIES : number of entries in the IOQ which are active event:0x10 counters:0 um:bsq minimum:3000 name:BSQ_ALLOCATION : allocations in the bus sequence unit event:0x12 counters:3,7 um:x87_assist minimum:3000 name:X87_ASSIST : retired x87 instructions which required special handling event:0x1c counters:3,7 um:machine_clear minimum:3000 name:MACHINE_CLEAR : cycles with entire machine pipeline cleared event:0x1e counters:1,5 um:tc_ms_xfer minimum:3000 name:TC_MS_XFER : number of times uops deliver changed from TC to MS ROM event:0x1f counters:1,5 um:uop_queue_writes minimum:3000 name:UOP_QUEUE_WRITES : number of valid uops written to the uop queue event:0x23 counters:3,7 um:instr_retired minimum:3000 name:INSTR_RETIRED : retired instructions event:0x24 counters:3,7 um:uops_retired minimum:3000 name:UOPS_RETIRED : retired uops event:0x25 counters:3,7 um:uop_type minimum:3000 name:UOP_TYPE : type of uop tagged by front-end tagging event:0x26 counters:1,5 um:branch_type minimum:3000 name:RETIRED_MISPRED_BRANCH_TYPE : retired mispredicted branched, selected by type event:0x27 counters:1,5 um:branch_type minimum:3000 name:RETIRED_BRANCH_TYPE : retired branches, selected by type event:0x03 counters:1,5 um:tc_deliver_mode minimum:3000 name:TC_DELIVER_MODE : duration (in clock cycles) in the trace cache and decode engine event:0x0b counters:0,4 um:page_walk_type minimum:3000 name:PAGE_WALK_TYPE : page walks by the page miss handler event:0x0f counters:0,4 um:fsb_data_activity minimum:3000 name:FSB_DATA_ACTIVITY : DRDY or DBSY events on the front side bus event:0x11 counters:4 um:bsq minimum:3000 name:BSQ_ACTIVE_ENTRIES : number of entries in the bus sequence unit which are active event:0x13 counters:2,6 um:flame_uop minimum:3000 name:SSE_INPUT_ASSIST : input assists requested for SSE or SSE2 operands event:0x14 counters:2,6 um:flame_uop minimum:3000 name:PACKED_SP_UOP : packed single precision uops event:0x15 counters:2,6 um:flame_uop minimum:3000 name:PACKED_DP_UOP : packed double precision uops event:0x16 counters:2,6 um:flame_uop minimum:3000 name:SCALAR_SP_UOP : scalar single precision uops event:0x17 counters:2,6 um:flame_uop minimum:3000 name:SCALAR_DP_UOP : scalar double presision uops event:0x18 counters:2,6 um:flame_uop minimum:3000 name:64BIT_MMX_UOP : 64 bit integer SIMD MMX uops event:0x19 counters:2,6 um:flame_uop minimum:3000 name:128BIT_MMX_UOP : 128 bit integer SIMD SSE2 uops event:0x1a counters:2,6 um:flame_uop minimum:3000 name:X87_FP_UOP : x87 floating point uops event:0x1b counters:2,6 um:x87_simd_moves_uop minimum:3000 name:X87_SIMD_MOVES_UOP : x87 FPU, MMX, SSE, or SSE2 loads, stores and reg-to-reg moves oprofile-1.3.0/events/i386/p4/unit_masks0000664000175000017500000001222212534404406014676 00000000000000# Pentium IV possible unit masks # name:branch_retired type:bitmask default:0x0c 0x01 branch not-taken predicted 0x02 branch not-taken mispredicted 0x04 branch taken predicted 0x08 branch taken mispredicted name:mispred_branch_retired type:bitmask default:0x01 0x01 retired instruction is non-bogus # FIXME: 0 count nothing, 0xff count more than 0x01, docs says it's a bitmask: # something wrong in documentation ? name:bpu_fetch_request type:bitmask default:0x01 0x01 trace cache lookup miss name:itlb_reference type:bitmask default:0x07 0x01 ITLB hit 0x02 ITLB miss 0x04 uncacheable ITLB hit name:memory_cancel type:bitmask default:0x08 0x04 replayed because no store request buffer available 0x08 conflicts due to 64k aliasing name:memory_complete type:bitmask default:0x03 0x01 load split completed, excluding UC/WC loads 0x02 any split stores completed 0x04 uncacheable load split completed 0x08 uncacheable store split complete name:load_port_replay type:mandatory default:0x02 0x02 split load name:store_port_replay type:mandatory default:0x02 0x02 split store name:mob_load_replay type:bitmask default:0x3a 0x02 replay cause: unknown store address 0x08 replay cause: unknown store data 0x10 replay cause: partial overlap between load and store 0x20 replay cause: mismatched low 4 bits between load and store addr name:bsq_cache_reference type:bitmask default:0x073f 0x01 read 2nd level cache hit shared 0x02 read 2nd level cache hit exclusive 0x04 read 2nd level cache hit modified 0x08 read 3rd level cache hit shared 0x10 read 3rd level cache hit exclusive 0x20 read 3rd level cache hit modified 0x100 read 2nd level cache miss 0x200 read 3rd level cache miss 0x400 writeback lookup from DAC misses 2nd level cache name:ioq type:bitmask default:0xefe1 0x01 bus request type bit 0 0x02 bus request type bit 1 0x04 bus request type bit 2 0x08 bus request type bit 3 0x10 bus request type bit 4 0x20 count read entries 0x40 count write entries 0x80 count UC memory access entries 0x100 count WC memory access entries 0x200 count write-through memory access entries 0x400 count write-protected memory access entries 0x800 count WB memory access entries 0x2000 count own store requests 0x4000 count other / DMA store requests 0x8000 count HW/SW prefetch requests name:bsq type:bitmask default:0x21 0x01 (r)eq (t)ype (e)ncoding, bit 0: see next bit 0x02 rte bit 1: 00=read, 01=read invalidate, 10=write, 11=writeback 0x04 req len bit 0 0x08 req len bit 1 0x20 request type is input (0=output) 0x40 request type is bus lock 0x80 request type is cacheable 0x100 request type is 8-byte chunk split across 8-byte boundary 0x200 request type is demand (0=prefetch) 0x400 request type is ordered 0x800 (m)emory (t)ype (e)ncoding, bit 0: see next bits 0x1000 mte bit 1: see next bits 0x2000 mte bit 2: 000=UC, 001=USWC, 100=WT, 101=WP, 110=WB name:x87_assist type:bitmask default:0x1f 0x01 handle FP stack underflow 0x02 handle FP stack overflow 0x04 handle x87 output overflow 0x08 handle x87 output underflow 0x10 handle x87 input assist name:machine_clear type:bitmask default:0x01 0x01 count a portion of cycles the machine is cleared for any cause 0x04 count each time the machine is cleared due to memory ordering issues 0x40 count each time the machine is cleared due to self modifying code name:global_power_events type:mandatory default:0x01 0x01 mandatory name:tc_ms_xfer type:mandatory default:0x01 0x01 count TC to MS transfers name:uop_queue_writes type:bitmask default:0x07 0x01 count uops written to queue from TC build mode 0x02 count uops written to queue from TC deliver mode 0x04 count uops written to queue from microcode ROM name:instr_retired type:bitmask default:0x01 0x01 count non-bogus instructions which are not tagged 0x02 count non-bogus instructions which are tagged 0x04 count bogus instructions which are not tagged 0x08 count bogus instructions which are tagged name:uops_retired type:bitmask default:0x01 0x01 count marked uops which are non-bogus 0x02 count marked uops which are bogus name:uop_type type:bitmask default:0x02 0x02 count uops which are load operations 0x04 count uops which are store operations name:branch_type type:bitmask default:0x1f 0x01 count unconditional jumps 0x02 count conditional jumps 0x04 count call branches 0x08 count return branches 0x10 count indirect jumps name:tc_deliver_mode type:bitmask default:0x04 0x04 processor is in deliver mode 0x20 processor is in build mode name:page_walk_type type:bitmask default:0x01 0x01 page walk for data TLB miss 0x02 page walk for instruction TLB miss name:fsb_data_activity type:bitmask default:0x3f 0x01 count when this processor drives data onto bus 0x02 count when this processor reads data from bus 0x04 count when data is on bus but not sampled by this processor 0x08 count when this processor reserves bus for driving 0x10 count when other reserves bus and this processor will sample 0x20 count when other reserves bus and this processor will not sample name:flame_uop type:mandatory default:0x8000 0x8000 count all uops of this type name:x87_simd_moves_uop type:bitmask default:0x18 0x08 count all x87 SIMD store/move uops 0x10 count all x87 SIMD load uops oprofile-1.3.0/events/i386/p4-ht/0000775000175000017500000000000013323173530013266 500000000000000oprofile-1.3.0/events/i386/p4-ht/events0000664000175000017500000000461212534404406014442 00000000000000# Pentium IV HyperThreading events # # NOTE: events cannot currently be 0x00 due to event binding checks in # driver # event:0x1d counters:0 um:global_power_events minimum:6000 name:GLOBAL_POWER_EVENTS : time during which processor is not stopped event:0x01 counters:3 um:branch_retired minimum:6000 name:BRANCH_RETIRED : retired branches event:0x02 counters:3 um:mispred_branch_retired minimum:6000 name:MISPRED_BRANCH_RETIRED : retired mispredicted branches event:0x04 counters:0 um:bpu_fetch_request minimum:6000 name:BPU_FETCH_REQUEST : instruction fetch requests from the branch predict unit event:0x05 counters:0 um:itlb_reference minimum:6000 name:ITLB_REFERENCE : translations using the instruction translation lookaside buffer event:0x06 counters:2 um:memory_cancel minimum:6000 name:MEMORY_CANCEL : cancelled requesets in data cache address control unit event:0x07 counters:2 um:memory_complete minimum:6000 name:MEMORY_COMPLETE : completed split event:0x08 counters:2 um:load_port_replay minimum:6000 name:LOAD_PORT_REPLAY : replayed events at the load port event:0x09 counters:2 um:store_port_replay minimum:6000 name:STORE_PORT_REPLAY : replayed events at the store port event:0x0a counters:0 um:mob_load_replay minimum:6000 name:MOB_LOAD_REPLAY : replayed loads from the memory order buffer event:0x0c counters:0 um:bsq_cache_reference minimum:6000 name:BSQ_CACHE_REFERENCE : cache references seen by the bus unit event:0x12 counters:3 um:x87_assist minimum:6000 name:X87_ASSIST : retired x87 instructions which required special handling event:0x1c counters:3 um:machine_clear minimum:6000 name:MACHINE_CLEAR : cycles with entire machine pipeline cleared event:0x1e counters:1 um:tc_ms_xfer minimum:6000 name:TC_MS_XFER : number of times uops deliver changed from TC to MS ROM event:0x1f counters:1 um:uop_queue_writes minimum:6000 name:UOP_QUEUE_WRITES : number of valid uops written to the uop queue event:0x23 counters:3 um:instr_retired minimum:6000 name:INSTR_RETIRED : retired instructions event:0x24 counters:3 um:uops_retired minimum:6000 name:UOPS_RETIRED : retired uops event:0x25 counters:3 um:uop_type minimum:6000 name:UOP_TYPE : type of uop tagged by front-end tagging event:0x26 counters:1 um:branch_type minimum:6000 name:RETIRED_MISPRED_BRANCH_TYPE : retired mispredicted branched, selected by type event:0x27 counters:1 um:branch_type minimum:6000 name:RETIRED_BRANCH_TYPE : retired branches, selected by type oprofile-1.3.0/events/i386/p4-ht/unit_masks0000664000175000017500000000632012534404406015311 00000000000000# Pentium IV HyperThreading possible unit masks # name:branch_retired type:bitmask default:0x0c 0x01 branch not-taken predicted 0x02 branch not-taken mispredicted 0x04 branch taken predicted 0x08 branch taken mispredicted name:mispred_branch_retired type:bitmask default:0x01 0x01 retired instruction is non-bogus # FIXME: 0 count nothing, 0xff count more than 0x01, docs says it's a bitmask: # something wrong in documentation ? name:bpu_fetch_request type:bitmask default:0x01 0x01 trace cache lookup miss name:itlb_reference type:bitmask default:0x07 0x01 ITLB hit 0x02 ITLB miss 0x04 uncacheable ITLB hit name:memory_cancel type:bitmask default:0x08 0x04 replayed because no store request buffer available 0x08 conflicts due to 64k aliasing name:memory_complete type:bitmask default:0x03 0x01 load split completed, excluding UC/WC loads 0x02 any split stores completed 0x04 uncacheable load split completed 0x08 uncacheable store split complete name:load_port_replay type:mandatory default:0x02 0x02 split load name:store_port_replay type:mandatory default:0x02 0x02 split store name:mob_load_replay type:bitmask default:0x3a 0x02 replay cause: unknown store address 0x08 replay cause: unknown store data 0x10 replay cause: partial overlap between load and store 0x20 replay cause: mismatched low 4 bits between load and store addr name:bsq_cache_reference type:bitmask default:0x073f 0x01 read 2nd level cache hit shared 0x02 read 2nd level cache hit exclusive 0x04 read 2nd level cache hit modified 0x08 read 3rd level cache hit shared 0x10 read 3rd level cache hit exclusive 0x20 read 3rd level cache hit modified 0x100 read 2nd level cache miss 0x200 read 3rd level cache miss 0x400 writeback lookup from DAC misses 2nd level cache name:x87_assist type:bitmask default:0x1f 0x01 handle FP stack underflow 0x02 handle FP stack overflow 0x04 handle x87 output overflow 0x08 handle x87 output underflow 0x10 handle x87 input assist name:machine_clear type:bitmask default:0x01 0x01 count a portion of cycles the machine is cleared for any cause 0x04 count each time the machine is cleared due to memory ordering issues 0x40 count each time the machine is cleared due to self modifying code name:global_power_events type:mandatory default:0x01 0x01 mandatory name:tc_ms_xfer type:mandatory default:0x01 0x01 count TC to MS transfers name:uop_queue_writes type:bitmask default:0x07 0x01 count uops written to queue from TC build mode 0x02 count uops written to queue from TC deliver mode 0x04 count uops written to queue from microcode ROM name:instr_retired type:bitmask default:0x01 0x01 count non-bogus instructions which are not tagged 0x02 count non-bogus instructions which are tagged 0x04 count bogus instructions which are not tagged 0x08 count bogus instructions which are tagged name:uops_retired type:bitmask default:0x01 0x01 count marked uops which are non-bogus 0x02 count marked uops which are bogus name:uop_type type:bitmask default:0x02 0x02 count uops which are load operations 0x04 count uops which are store operations name:branch_type type:bitmask default:0x1f 0x01 count unconditional jumps 0x02 count conditional jumps 0x04 count call branches 0x08 count return branches 0x10 count indirect jumps oprofile-1.3.0/events/i386/skylake/0000775000175000017500000000000013323173530013775 500000000000000oprofile-1.3.0/events/i386/skylake/events0000664000175000017500000001107412547036311015151 00000000000000# # Intel "Skylake" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Skylake based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # event:0x03 counters:cpuid um:ld_blocks minimum:100003 name:ld_blocks : event:0x07 counters:cpuid um:ld_blocks_partial minimum:100003 name:ld_blocks_partial_address_alias : event:0x08 counters:cpuid um:dtlb_load_misses minimum:2000003 name:dtlb_load_misses : event:0x0d counters:cpuid um:int_misc minimum:2000003 name:int_misc : event:0x0e counters:cpuid um:uops_issued minimum:2000003 name:uops_issued : event:0x14 counters:cpuid um:arith minimum:2000003 name:arith_divider_active : event:0x24 counters:cpuid um:l2_rqsts minimum:200003 name:l2_rqsts : event:0x2e counters:cpuid um:longest_lat_cache minimum:100003 name:longest_lat_cache : event:0x3c counters:cpuid um:cpu_clk_unhalted minimum:2000003 name:cpu_clk_unhalted : event:0x3c counters:cpuid um:cpu_clk_thread_unhalted minimum:2000003 name:cpu_clk_thread_unhalted : event:0x48 counters:cpuid um:l1d_pend_miss minimum:2000003 name:l1d_pend_miss : event:0x49 counters:cpuid um:dtlb_store_misses minimum:2000003 name:dtlb_store_misses : event:0x4c counters:cpuid um:load_hit_pre minimum:100003 name:load_hit_pre_sw_pf : event:0x4f counters:cpuid um:ept minimum:2000003 name:ept_walk_pending : event:0x51 counters:cpuid um:l1d minimum:2000003 name:l1d_replacement : event:0x54 counters:cpuid um:tx_mem minimum:2000003 name:tx_mem : event:0x5d counters:cpuid um:tx_exec minimum:2000003 name:tx_exec : event:0x5e counters:cpuid um:rs_events minimum:2000003 name:rs_events : event:0x60 counters:cpuid um:offcore_requests_outstanding minimum:2000003 name:offcore_requests_outstanding : event:0x63 counters:cpuid um:lock_cycles minimum:2000003 name:lock_cycles_cache_lock_duration : event:0x79 counters:cpuid um:idq minimum:2000003 name:idq : event:0x80 counters:cpuid um:icache_16b minimum:2000003 name:icache_16b_ifdata_stall : event:0x83 counters:cpuid um:icache_64b minimum:200003 name:icache_64b : event:0x85 counters:cpuid um:itlb_misses minimum:100003 name:itlb_misses : event:0x87 counters:cpuid um:ild_stall minimum:2000003 name:ild_stall_lcp : event:0x9c counters:cpuid um:idq_uops_not_delivered minimum:2000003 name:idq_uops_not_delivered : event:0xa1 counters:cpuid um:uops_dispatched_port minimum:2000003 name:uops_dispatched_port : event:0xa2 counters:cpuid um:resource_stalls minimum:2000003 name:resource_stalls : event:0xa3 counters:cpuid um:cycle_activity minimum:2000003 name:cycle_activity : event:0xa6 counters:cpuid um:exe_activity minimum:2000003 name:exe_activity : event:0xa8 counters:cpuid um:lsd minimum:2000003 name:lsd : event:0xab counters:cpuid um:dsb2mite_switches minimum:2000003 name:dsb2mite_switches_penalty_cycles : event:0xae counters:cpuid um:itlb minimum:100007 name:itlb_itlb_flush : event:0xb0 counters:cpuid um:offcore_requests minimum:100003 name:offcore_requests : event:0xb1 counters:cpuid um:uops_executed minimum:2000003 name:uops_executed : event:0xb2 counters:cpuid um:offcore_requests_buffer minimum:2000003 name:offcore_requests_buffer_sq_full : event:0xbd counters:cpuid um:tlb_flush minimum:100007 name:tlb_flush : event:0xc0 counters:1 um:inst_retired minimum:2000003 name:inst_retired : event:0xc1 counters:cpuid um:other_assists minimum:100003 name:other_assists_any : event:0xc2 counters:cpuid um:uops_retired minimum:2000003 name:uops_retired : event:0xc3 counters:cpuid um:machine_clears minimum:100003 name:machine_clears : event:0xc4 counters:cpuid um:br_inst_retired minimum:400009 name:br_inst_retired : event:0xc5 counters:cpuid um:br_misp_retired minimum:400009 name:br_misp_retired : event:0xc7 counters:cpuid um:fp_arith_inst_retired minimum:2000003 name:fp_arith_inst_retired : event:0xc8 counters:cpuid um:hle_retired minimum:2000003 name:hle_retired : event:0xc9 counters:cpuid um:rtm_retired minimum:2000003 name:rtm_retired : event:0xca counters:cpuid um:fp_assist minimum:100003 name:fp_assist_any : event:0xcb counters:cpuid um:hw_interrupts minimum:100003 name:hw_interrupts_received : event:0xd0 counters:0,1,2,3 um:mem_inst_retired minimum:2000003 name:mem_inst_retired : event:0xd1 counters:0,1,2,3 um:mem_load_retired minimum:2000003 name:mem_load_retired : event:0xd2 counters:0,1,2,3 um:mem_load_l3_hit_retired minimum:100003 name:mem_load_l3_hit_retired : event:0xe6 counters:cpuid um:baclears minimum:100003 name:baclears_any : event:0xf0 counters:cpuid um:l2_trans minimum:200003 name:l2_trans_l2_wb : event:0xf1 counters:cpuid um:l2_lines_in minimum:100003 name:l2_lines_in_all : oprofile-1.3.0/events/i386/skylake/unit_masks0000664000175000017500000007345712547036321016040 00000000000000# # Unit masks for the Intel "Skylake" micro architecture # # See http://ark.intel.com/ for help in identifying Skylake based CPUs # name:arith type:mandatory default:0x1 0x1 extra:cmask=1,edge divider_active Cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations. name:baclears type:mandatory default:0x1 0x1 extra: any Counts the total number when the front end is resteered, mainly when the BPU cannot provide a correct prediction and this is corrected by other branch handling mechanisms at the front end. name:dsb2mite_switches type:mandatory default:0x2 0x2 extra: penalty_cycles Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. name:ept type:mandatory default:0x10 0x10 extra: walk_pending Counts 1 per cycle for each PMH that is busy with a EPT (Extended Page Table) walk for any request type. name:fp_assist type:mandatory default:0x1e 0x1e extra:cmask=1 any Cycles with any input/output SSE or FP assist name:hw_interrupts type:mandatory default:0x1 0x1 extra: received Number of hardware interrupts received by the processor. name:icache_16b type:mandatory default:0x4 0x4 extra: ifdata_stall Cycles where a code fetch is stalled due to L1 instruction cache miss. name:ild_stall type:mandatory default:0x1 0x1 extra: lcp Stalls caused by changing prefix length of the instruction. name:itlb type:mandatory default:0x1 0x1 extra: itlb_flush Flushing of the Instruction TLB (ITLB) pages, includes 4k/2M/4M pages. name:l1d type:mandatory default:0x1 0x1 extra: replacement L1D data line replacements name:l2_lines_in type:mandatory default:0x7 0x7 extra: all L2 cache lines filling L2 name:l2_trans type:mandatory default:0x40 0x40 extra: l2_wb L2 writebacks that access L2 cache name:ld_blocks_partial type:mandatory default:0x1 0x1 extra: address_alias False dependencies in MOB due to partial compare on address. name:load_hit_pre type:mandatory default:0x1 0x1 extra: sw_pf Demand load dispatches that hit L1D fill buffer (FB) allocated for software prefetch. name:lock_cycles type:mandatory default:0x2 0x2 extra: cache_lock_duration Cycles when L1D is locked name:offcore_requests_buffer type:mandatory default:0x1 0x1 extra: sq_full Offcore requests buffer cannot take more entries for this thread core. name:other_assists type:mandatory default:0x3f 0x3f extra: any Number of times a microcode assist is invoked by HW other than FP-assist. Examples include AD (page Access Dirty) and AVX* related assists. name:ld_blocks type:exclusive default:0x2 0x2 extra: store_forward loads blocked by overlapping with store buffer that cannot be forwarded . 0x8 extra: no_sr The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use name:dtlb_load_misses type:exclusive default:miss_causes_a_walk 0x1 extra: miss_causes_a_walk Load misses in all DTLB levels that cause page walks 0x10 extra: walk_pending Counts 1 per cycle for each PMH that is busy with a page walk for a load. 0x20 extra: stlb_hit Loads that miss the DTLB and hit the STLB. 0xe extra: walk_completed Load miss in all TLB levels causes a page walk that completes. (All page sizes) 0x10 extra:cmask=1 walk_active Cycles when at least one PMH is busy with a page walk for a load. name:int_misc type:exclusive default:recovery_cycles 0x1 extra: recovery_cycles Core cycles the allocator was stalled due to recovery from earlier clear event for this thread (e.g. misprediction or memory nuke) 0x80 extra: clear_resteer_cycles Cycles the issue-stage is waiting for front-end to fetch from resteered path following branch misprediction or machine clear events. 0x1 extra:any recovery_cycles_any Core cycles the allocator was stalled due to recovery from earlier clear event for any thread running on the physical core (e.g. misprediction or memory nuke) name:uops_issued type:exclusive default:any 0x1 extra: any Uops that Resource Allocation Table (RAT) issues to Reservation Station (RS) 0x20 extra: slow_lea Number of slow LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sources + immediate) regardless if as a result of LEA instruction or not. 0x1 extra:cmask=1,inv stall_cycles Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for the thread 0x2 extra: vector_width_mismatch This event counts the number of Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order to preserve upper bits of vector registers. Starting the Skylake microarchitecture, these Blend uops are needed since every Intel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destination register. For more information, refer to ?Mixing Intel AVX and Intel SSE Code? section of the Optimization Guide. name:l2_rqsts type:exclusive default:0x21 0x21 extra: demand_data_rd_miss Demand Data Read miss L2, no rejects 0x41 extra: demand_data_rd_hit Demand Data Read requests that hit L2 cache 0xe1 extra: all_demand_data_rd Demand Data Read requests 0xe2 extra: all_rfo RFO requests to L2 cache 0xe4 extra: all_code_rd L2 code requests 0xf8 extra: all_pf Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches 0x38 extra: pf_miss Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache 0xd8 extra: pf_hit Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache 0x42 extra: rfo_hit RFO requests that hit L2 cache 0x22 extra: rfo_miss RFO requests that miss L2 cache 0x44 extra: code_rd_hit L2 cache hits when fetching instructions, code reads. 0x24 extra: code_rd_miss L2 cache misses when fetching instructions 0x27 extra: all_demand_miss Demand requests that miss L2 cache 0xe7 extra: all_demand_references Demand requests to L2 cache 0x3f extra: miss All requests that miss L2 cache 0xff extra: references All L2 requests name:longest_lat_cache type:exclusive default:0x41 0x41 extra: miss Core-originated cacheable demand requests missed L3 0x4f extra: reference Core-originated cacheable demand requests that refer to L3 name:cpu_clk_unhalted type:exclusive default:thread 0x0 extra: thread Core cycles when the thread is not in halt state 0x1 extra: ref_tsc Reference cycles when the core is not in halt state. 0x0 extra: thread_p Thread cycles when thread is not in halt state 0x2 extra:any thread_any Core cycles when at least one thread on the physical core is not in halt state 0x0 extra:any thread_p_any Core cycles when at least one thread on the physical core is not in halt state name:cpu_clk_thread_unhalted type:exclusive default:ref_xclk 0x1 extra: ref_xclk Reference cycles when the thread is unhalted (counts at 100 MHz rate) 0x2 extra: one_thread_active Count XClk pulses when this thread is unhalted and the other thread is halted. 0x1 extra:any ref_xclk_any Reference cycles when the at least one thread on the physical core is unhalted (counts at 100 MHz rate) name:l1d_pend_miss type:exclusive default:pending 0x1 extra: pending L1D miss oustandings duration in cycles 0x2 extra: fb_full Number of times a request needed a FB entry but there was no entry available for it. That is the FB unavailability was dominant reason for blocking the request. A request includes cacheable/uncacheable demands that is load, store or SW prefetch. HWP are e 0x1 extra:cmask=1 pending_cycles Cycles with L1D load Misses outstanding. 0x1 extra:cmask=1,any pending_cycles_any Cycles with L1D load Misses outstanding from any thread on physical core name:dtlb_store_misses type:exclusive default:miss_causes_a_walk 0x1 extra: miss_causes_a_walk Store misses in all DTLB levels that cause page walks 0x10 extra: walk_pending Counts 1 per cycle for each PMH that is busy with a page walk for a store. 0x20 extra: stlb_hit Stores that miss the DTLB and hit the STLB. 0xe extra: walk_completed Store misses in all TLB levels causes a page walk that completes. (All page sizes) 0x10 extra:cmask=1 walk_active Cycles when at least one PMH is busy with a page walk for a store. name:tx_mem type:exclusive default:0x1 0x1 extra: abort_conflict Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address 0x2 extra: abort_capacity Number of times a transactional abort was signaled due to a data capacity limitation for transactional reads or writes. 0x4 extra: abort_hle_store_to_elided_lock Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer 0x8 extra: abort_hle_elision_buffer_not_empty Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero. 0x10 extra: abort_hle_elision_buffer_mismatch Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer 0x20 extra: abort_hle_elision_buffer_unsupported_alignment Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer. 0x40 extra: hle_elision_buffer_full Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero. name:tx_exec type:exclusive default:0x1 0x1 extra: misc1 Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort. 0x2 extra: misc2 Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region 0x4 extra: misc3 Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded 0x8 extra: misc4 Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region. 0x10 extra: misc5 Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region name:rs_events type:exclusive default:empty_cycles 0x1 extra: empty_cycles Cycles when Reservation Station (RS) is empty for the thread 0x1 extra:cmask=1,inv,edge empty_end Counts end of periods where the Reservation Station (RS) was empty. Could be useful to precisely locate Frontend Latency Bound issues. name:offcore_requests_outstanding type:exclusive default:demand_data_rd 0x1 extra: demand_data_rd Offcore outstanding Demand Data Read transactions in uncore queue. 0x2 extra: demand_code_rd Offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore. 0x4 extra: demand_rfo Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle 0x8 extra: all_data_rd Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore 0x10 extra: l3_miss_demand_data_rd Counts number of Offcore outstanding Demand Data Read requests who miss L3 cache in the superQ every cycle. 0x1 extra:cmask=1 cycles_with_demand_data_rd Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore 0x8 extra:cmask=1 cycles_with_data_rd Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore 0x2 extra:cmask=1 cycles_with_demand_code_rd Cycles with offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle. 0x4 extra:cmask=1 cycles_with_demand_rfo Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle 0x10 extra:cmask=1 cycles_with_l3_miss_demand_data_rd Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ 0x10 extra:cmask=6 l3_miss_demand_data_rd_ge_6 Cycles with at least 6 Demand Data Read requests who miss L3 cache in the superQ 0x1 extra:cmask=6 demand_data_rd_ge_6 Cycles with at least 6 offcore outstanding Demand Data Read transactions in uncore queue name:idq type:exclusive default:mite_uops 0x4 extra: mite_uops Uops delivered to Instruction Decode Queue (IDQ) from MITE path 0x8 extra: dsb_uops Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path 0x20 extra: ms_mite_uops Uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x30 extra:cmask=1 ms_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x4 extra:cmask=1 mite_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from MITE path 0x8 extra:cmask=1 dsb_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path 0x10 extra:cmask=1 ms_dsb_cycles Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x18 extra:cmask=4 all_dsb_cycles_4_uops Cycles Decode Stream Buffer (DSB) is delivering 4 Uops 0x18 extra:cmask=1 all_dsb_cycles_any_uops Cycles Decode Stream Buffer (DSB) is delivering any Uop 0x24 extra:cmask=4 all_mite_cycles_4_uops Cycles MITE is delivering 4 Uops 0x24 extra:cmask=1 all_mite_cycles_any_uops Cycles MITE is delivering any Uop 0x30 extra:cmask=1,edge ms_switches Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer 0x30 extra: ms_uops Uops delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy name:icache_64b type:exclusive default:0x1 0x1 extra: iftag_hit Instruction fetch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity. 0x2 extra: iftag_miss Instruction fetch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity. 0x4 extra: iftag_stall Cycles where a code fetch is stalled due to L1 instruction cache tag miss. name:itlb_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk Misses at all ITLB levels that cause page walks 0x10 extra: walk_pending Counts 1 per cycle for each PMH that is busy with a page walk for an instruction fetch request. 0x20 extra: stlb_hit Intruction fetch requests that miss the ITLB and hit the STLB. 0xe extra: walk_completed Code miss in all TLB levels causes a page walk that completes. (All page sizes) name:idq_uops_not_delivered type:exclusive default:core 0x1 extra: core Uops not delivered to Resource Allocation Table (RAT) per thread when backend of the machine is not stalled 0x1 extra:cmask=4 cycles_0_uops_deliv_core Cycles per thread when 4 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled 0x1 extra:cmask=3 cycles_le_1_uop_deliv_core Cycles per thread when 3 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled 0x1 extra:cmask=2 cycles_le_2_uop_deliv_core Cycles with less than 2 uops delivered by the front end. 0x1 extra:cmask=1 cycles_le_3_uop_deliv_core Cycles with less than 3 uops delivered by the front end. 0x1 extra:cmask=1,inv cycles_fe_was_ok Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stalling FE. name:uops_dispatched_port type:exclusive default:0x1 0x1 extra: port_0 Cycles per thread when uops are executed in port 0 0x2 extra: port_1 Cycles per thread when uops are executed in port 1 0x4 extra: port_2 Cycles per thread when uops are executed in port 2 0x8 extra: port_3 Cycles per thread when uops are executed in port 3 0x10 extra: port_4 Cycles per thread when uops are executed in port 4 0x20 extra: port_5 Cycles per thread when uops are executed in port 5 0x40 extra: port_6 Cycles per thread when uops are executed in port 6 0x80 extra: port_7 Cycles per thread when uops are executed in port 7 name:resource_stalls type:exclusive default:0x1 0x1 extra: any Resource-related stall cycles 0x8 extra: sb Cycles stalled due to no store buffers available. (not including draining form sync). name:cycle_activity type:exclusive default:0x4 0x4 extra:cmask=4 stalls_total Total execution stalls. 0x8 extra:cmask=8 cycles_l1d_miss Cycles while L1 cache miss demand load is outstanding. 0xc extra:cmask=c stalls_l1d_miss Execution stalls while L1 cache miss demand load is outstanding. 0x1 extra:cmask=1 cycles_l2_miss Cycles while L2 cache miss demand load is outstanding. 0x5 extra:cmask=5 stalls_l2_miss Execution stalls while L2 cache miss demand load is outstanding. 0x10 extra:cmask=10 cycles_mem_any Cycles while memory subsystem has an outstanding load. 0x14 extra:cmask=14 stalls_mem_any Execution stalls while memory subsystem has an outstanding load. 0x2 extra:cmask=2 cycles_l3_miss Cycles while L3 cache miss demand load is outstanding. 0x6 extra:cmask=6 stalls_l3_miss Execution stalls while L3 cache miss demand load is outstanding. name:exe_activity type:exclusive default:0x1 0x1 extra: exe_bound_0_ports Cycles where no uops were executed, the Reservation Station was not empty, the Store Buffer was full and there was no outstanding load. 0x2 extra: u1_ports_util Cycles total of 1 uop is executed on all ports and Reservation Station was not empty. 0x4 extra: u2_ports_util Cycles total of 2 uops are executed on all ports and Reservation Station was not empty. 0x8 extra: u3_ports_util Cycles total of 3 uops are executed on all ports and Reservation Station was not empty. 0x10 extra: u4_ports_util Cycles total of 4 uops are executed on all ports and Reservation Station was not empty. 0x40 extra: bound_on_stores Cycles where the Store Buffer was full and no outstanding load. name:lsd type:exclusive default:uops 0x1 extra: uops Number of Uops delivered by the LSD. 0x1 extra:cmask=1 cycles_active Cycles Uops delivered by the LSD, but didn't come from the decoder 0x1 extra:cmask=4 cycles_4_uops Cycles 4 Uops delivered by the LSD, but didn't come from the decoder name:offcore_requests type:exclusive default:0x80 0x80 extra: all_requests Any memory transaction that reached the SQ. 0x1 extra: demand_data_rd Demand Data Read requests sent to uncore 0x2 extra: demand_code_rd Cacheable and noncachaeble code read requests 0x4 extra: demand_rfo Demand RFO requests including regular RFOs, locks, ItoM 0x8 extra: all_data_rd Demand and prefetch data reads 0x10 extra: l3_miss_demand_data_rd Demand Data Read requests who miss L3 cache name:uops_executed type:exclusive default:thread 0x1 extra: thread Counts the number of uops to be executed per-thread each cycle. 0x2 extra: core Number of uops executed on the core. 0x10 extra: x87 Counts the number of x87 uops dispatched. 0x1 extra:cmask=1,inv stall_cycles Counts number of cycles no uops were dispatched to be executed on this thread. 0x1 extra:cmask=1 cycles_ge_1_uop_exec Cycles where at least 1 uop was executed per-thread 0x1 extra:cmask=2 cycles_ge_2_uops_exec Cycles where at least 2 uops were executed per-thread 0x1 extra:cmask=3 cycles_ge_3_uops_exec Cycles where at least 3 uops were executed per-thread 0x1 extra:cmask=4 cycles_ge_4_uops_exec Cycles where at least 4 uops were executed per-thread 0x2 extra:cmask=1 core_cycles_ge_1 Cycles at least 1 micro-op is executed from any thread on physical core 0x2 extra:cmask=2 core_cycles_ge_2 Cycles at least 2 micro-op is executed from any thread on physical core 0x2 extra:cmask=3 core_cycles_ge_3 Cycles at least 3 micro-op is executed from any thread on physical core 0x2 extra:cmask=4 core_cycles_ge_4 Cycles at least 4 micro-op is executed from any thread on physical core 0x2 extra:cmask=1,inv core_cycles_none Cycles with no micro-ops executed from any thread on physical core name:tlb_flush type:exclusive default:0x1 0x1 extra: dtlb_thread DTLB flush attempts of the thread-specific entries 0x20 extra: stlb_any STLB flush attempts name:inst_retired type:exclusive default:any 0x0 extra: any Instructions retired from execution.mem 0x0 extra: any_p Number of instructions retired. General Counter - architectural event 0x1 extra:pebs prec_dist Precise instruction retired event with HW to reduce effect of PEBS shadow in IP distribution name:uops_retired type:exclusive default:retire_slots 0x2 extra: retire_slots Retirement slots used. 0x1 extra:cmask=1,inv stall_cycles Cycles without actually retired uops. 0x1 extra:cmask=a,inv total_cycles Cycles with less than 10 actually retired uops. name:machine_clears type:exclusive default:0x1 0x1 extra:cmask=1,edge count Number of machine clears (nukes) of any type. 0x2 extra: memory_ordering Counts the number of machine clears due to memory order conflicts. 0x4 extra: smc Self-modifying code (SMC) detected. name:br_inst_retired type:exclusive default:all_branches 0x0 extra: all_branches All (macro) branch instructions retired. 0x1 extra: conditional Conditional branch instructions retired. 0x1 extra:pebs conditional_pebs Conditional branch instructions retired. 0x2 extra: near_call Direct and indirect near call instructions retired. 0x2 extra:pebs near_call_pebs Direct and indirect near call instructions retired. 0x0 extra:pebs all_branches_pebs All (macro) branch instructions retired. 0x8 extra: near_return Return instructions retired. 0x8 extra:pebs near_return_pebs Return instructions retired. 0x10 extra: not_taken Not taken branch instructions retired. 0x20 extra: near_taken Taken branch instructions retired. 0x20 extra:pebs near_taken_pebs Taken branch instructions retired. 0x40 extra: far_branch Far branch instructions retired. 0x40 extra:pebs far_branch_pebs Far branch instructions retired. 0x4 extra:pebs all_branches_pebs All (macro) branch instructions retired. name:br_misp_retired type:exclusive default:all_branches 0x0 extra: all_branches All mispredicted macro branch instructions retired. 0x1 extra: conditional Mispredicted conditional branch instructions retired. 0x1 extra:pebs conditional_pebs Mispredicted conditional branch instructions retired. 0x20 extra: near_taken number of near branch instructions retired that were mispredicted and taken. 0x20 extra:pebs near_taken_pebs number of near branch instructions retired that were mispredicted and taken. 0x4 extra:pebs all_branches_pebs Mispredicted macro branch instructions retired. name:fp_arith_inst_retired type:exclusive default:0x1 0x1 extra: scalar_double Number of SSE/AVX computational scalar double precision floating-point instructions retired. Each count represents 1 computation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element. 0x2 extra: scalar_single Number of SSE/AVX computational scalar single precision floating-point instructions retired. Each count represents 1 computation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP RSQRT SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element. 0x4 extra: u128b_packed_double Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired. Each count represents 2 computations. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element. 0x8 extra: u128b_packed_single Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired. Each count represents 4 computations. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP RSQRT SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element. 0x10 extra: u256b_packed_double Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired. Each count represents 4 computations. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element. 0x20 extra: u256b_packed_single Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired. Each count represents 8 computations. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP RSQRT SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element. name:hle_retired type:exclusive default:start 0x1 extra: start Number of times an HLE execution started. 0x2 extra: commit Number of times an HLE execution successfully committed 0x4 extra: aborted Number of times an HLE execution aborted due to any reasons (multiple categories may count as one). 0x4 extra:pebs aborted_pebs Number of times an HLE execution aborted due to any reasons (multiple categories may count as one). 0x8 extra: aborted_misc1 Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts). 0x10 extra: aborted_misc2 Number of times an HLE execution aborted due to hardware timer expiration. 0x20 extra: aborted_misc3 Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.). 0x40 extra: aborted_misc4 Number of times an HLE execution aborted due to incompatible memory type 0x80 extra: aborted_misc5 Number of times an HLE execution aborted due to unfriendly events (such as interrupts). name:rtm_retired type:exclusive default:start 0x1 extra: start Number of times an RTM execution started. 0x2 extra: commit Number of times an RTM execution successfully committed 0x4 extra: aborted Number of times an RTM execution aborted due to any reasons (multiple categories may count as one). 0x4 extra:pebs aborted_pebs Number of times an RTM execution aborted due to any reasons (multiple categories may count as one). 0x8 extra: aborted_misc1 Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts) 0x10 extra: aborted_misc2 Number of times an RTM execution aborted due to uncommon conditions. 0x20 extra: aborted_misc3 Number of times an RTM execution aborted due to HLE-unfriendly instructions 0x40 extra: aborted_misc4 Number of times an RTM execution aborted due to incompatible memory type 0x80 extra: aborted_misc5 Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt) name:mem_inst_retired type:exclusive default:stlb_miss_loads 0x11 extra: stlb_miss_loads Number of load instructions retired with STLB miss 0x11 extra:pebs stlb_miss_loads_pebs Number of load instructions retired with STLB miss 0x12 extra: stlb_miss_stores Number of store instructions retired with STLB miss 0x12 extra:pebs stlb_miss_stores_pebs Number of store instructions retired with STLB miss 0x21 extra: lock_loads Number of lock load instructions retired 0x21 extra:pebs lock_loads_pebs Number of lock load instructions retired 0x41 extra: split_loads Number of load instructions retired with cache-line splits that may impact performance. 0x41 extra:pebs split_loads_pebs Number of load instructions retired with cache-line splits that may impact performance. 0x42 extra: split_stores Number of store instructions retired with line-split 0x42 extra:pebs split_stores_pebs Number of store instructions retired with line-split 0x81 extra: all_loads Number of load instructions retired 0x81 extra:pebs all_loads_pebs Number of load instructions retired 0x82 extra: all_stores Number of store instructions retired 0x82 extra:pebs all_stores_pebs Number of store instructions retired name:mem_load_retired type:exclusive default:l1_hit 0x1 extra: l1_hit Retired load instructions with L1 cache hits as data sources 0x1 extra:pebs l1_hit_pebs Retired load instructions with L1 cache hits as data sources 0x2 extra: l2_hit Retired load instructions with L2 cache hits as data sources 0x2 extra:pebs l2_hit_pebs Retired load instructions with L2 cache hits as data sources 0x4 extra: l3_hit Retired load instructions with L3 cache hits as data sources 0x4 extra:pebs l3_hit_pebs Retired load instructions with L3 cache hits as data sources 0x8 extra: l1_miss Retired load instructions missed L1 cache as data sources 0x8 extra:pebs l1_miss_pebs Retired load instructions missed L1 cache as data sources 0x10 extra: l2_miss Retired load instructions missed L2 cache as data sources 0x10 extra:pebs l2_miss_pebs Retired load instructions missed L2 cache as data sources 0x20 extra: l3_miss Retired load instructions missed L3 cache as data sources 0x20 extra:pebs l3_miss_pebs Retired load instructions missed L3 cache as data sources 0x40 extra: fb_hit Retired load instructions which data sources were load missed L1 but hit FB due to preceding miss to the same cache line with data not ready 0x40 extra:pebs fb_hit_pebs Retired load instructions which data sources were load missed L1 but hit FB due to preceding miss to the same cache line with data not ready name:mem_load_l3_hit_retired type:exclusive default:xsnp_miss 0x1 extra: xsnp_miss Retired load instructions which data sources were L3 hit and cross-core snoop missed in on-pkg core cache. 0x1 extra:pebs xsnp_miss_pebs Retired load instructions which data sources were L3 hit and cross-core snoop missed in on-pkg core cache. 0x2 extra: xsnp_hit Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache 0x2 extra:pebs xsnp_hit_pebs Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache 0x4 extra: xsnp_hitm Retired load instructions which data sources were HitM responses from shared L3 0x4 extra:pebs xsnp_hitm_pebs Retired load instructions which data sources were HitM responses from shared L3 0x8 extra: xsnp_none Retired load instructions which data sources were hits in L3 without snoops required 0x8 extra:pebs xsnp_none_pebs Retired load instructions which data sources were hits in L3 without snoops required oprofile-1.3.0/events/i386/goldmontplus/0000775000175000017500000000000013323173530015061 500000000000000oprofile-1.3.0/events/i386/goldmontplus/events0000664000175000017500000000524013230147570016233 00000000000000# # Intel "Goldmont Plus" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Goldmont based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # event:0x3c counters:cpuid um:cpu_clk_unhalted minimum:2000003 name:cpu_clk_unhalted : event:0x03 counters:cpuid um:ld_blocks minimum:200003 name:ld_blocks : event:0x08 counters:cpuid um:dtlb_load_misses minimum:200003 name:dtlb_load_misses : event:0x0e counters:cpuid um:uops_issued minimum:200003 name:uops_issued_any : event:0x13 counters:cpuid um:misalign_mem_ref minimum:200003 name:misalign_mem_ref : event:0x2e counters:cpuid um:longest_lat_cache minimum:200003 name:longest_lat_cache : event:0x30 counters:cpuid um:l2_reject_xq minimum:200003 name:l2_reject_xq_all : event:0x31 counters:cpuid um:core_reject_l2q minimum:200003 name:core_reject_l2q_all : event:0x49 counters:cpuid um:dtlb_store_misses minimum:2000003 name:dtlb_store_misses : event:0x4f counters:cpuid um:ept minimum:200003 name:ept : event:0x51 counters:cpuid um:dl1 minimum:200003 name:dl1_dirty_eviction : event:0x80 counters:cpuid um:icache minimum:200003 name:icache : event:0x81 counters:cpuid um:itlb minimum:200003 name:itlb_miss : event:0x85 counters:cpuid um:itlb_misses minimum:2000003 name:itlb_misses : event:0x86 counters:cpuid um:fetch_stall minimum:200003 name:fetch_stall_icache_fill_pending_cycles : event:0x9c counters:cpuid um:uops_not_delivered minimum:200003 name:uops_not_delivered_any : event:0xbd counters:cpuid um:tlb_flushes minimum:20003 name:tlb_flushes : event:0xc0 counters:cpuid um:inst_retired minimum:2000003 name:inst_retired : event:0xc2 counters:cpuid um:uops_retired minimum:2000003 name:uops_retired : event:0xc3 counters:cpuid um:machine_clears minimum:200003 name:machine_clears : event:0xc4 counters:cpuid um:br_inst_retired minimum:200003 name:br_inst_retired : event:0xc5 counters:cpuid um:br_misp_retired minimum:200003 name:br_misp_retired : event:0xca counters:cpuid um:issue_slots_not_consumed minimum:200003 name:issue_slots_not_consumed : event:0xcb counters:cpuid um:hw_interrupts minimum:200003 name:hw_interrupts : event:0xcd counters:cpuid um:cycles_div_busy minimum:2000003 name:cycles_div_busy : event:0xd0 counters:cpuid um:mem_uops_retired minimum:200003 name:mem_uops_retired : event:0xd1 counters:cpuid um:mem_load_uops_retired minimum:200003 name:mem_load_uops_retired : event:0xe6 counters:cpuid um:baclears minimum:200003 name:baclears : event:0xe7 counters:cpuid um:ms_decoded minimum:200003 name:ms_decoded_ms_entry : event:0xe9 counters:cpuid um:decode_restriction minimum:200003 name:decode_restriction_predecode_wrong : oprofile-1.3.0/events/i386/goldmontplus/unit_masks0000664000175000017500000007602013230147570017110 00000000000000# # Unit masks for the Intel "Goldmont Plus" micro architecture # # See http://ark.intel.com/ for help in identifying Goldmont based CPUs # name:core_reject_l2q type:mandatory default:0x0 0x0 extra: all Counts the number of demand and L1 prefetcher requests rejected by the L2Q due to a full or nearly full condition which likely indicates back pressure from L2Q. It also counts requests that would have gone directly to the XQ, but are rejected due to a full or nearly full condition, indicating back pressure from the IDI link. The L2Q may also reject transactions from a core to insure fairness between cores, or to delay a core's dirty eviction when the address conflicts with incoming external snoops. name:decode_restriction type:mandatory default:0x1 0x1 extra: predecode_wrong Counts the number of times the prediction (from the predecode cache) for instruction length is incorrect. name:dl1 type:mandatory default:0x1 0x1 extra: dirty_eviction Counts when a modified (dirty) cache line is evicted from the data L1 cache and needs to be written back to memory. No count will occur if the evicted line is clean, and hence does not require a writeback. name:fetch_stall type:mandatory default:0x2 0x2 extra: icache_fill_pending_cycles Counts cycles that an ICache miss is outstanding, and instruction fetch is stalled. That is, the decoder queue is able to accept bytes, but the fetch unit is unable to provide bytes, while an Icache miss outstanding. Note this event is not the same as cycles to retrieve an instruction due to an Icache miss. Rather, it is the part of the Instruction Cache (ICache) miss time where no bytes are available for the decoder. name:itlb type:mandatory default:0x4 0x4 extra: miss Counts the number of times the machine was unable to find a translation in the Instruction Translation Lookaside Buffer (ITLB) for a linear address of an instruction fetch. It counts when new translation are filled into the ITLB. The event is speculative in nature, but will not count translations (page walks) that are begun and not finished, or translations that are finished but not filled into the ITLB. name:l2_reject_xq type:mandatory default:0x0 0x0 extra: all Counts the number of demand and prefetch transactions that the L2 XQ rejects due to a full or near full condition which likely indicates back pressure from the intra-die interconnect (IDI) fabric. The XQ may reject transactions from the L2Q (non-cacheable requests), L2 misses and L2 write-back victims. name:ms_decoded type:mandatory default:0x1 0x1 extra: ms_entry Counts the number of times the Microcode Sequencer (MS) starts a flow of uops from the MSROM. It does not count every time a uop is read from the MSROM. The most common case that this counts is when a micro-coded instruction is encountered by the front end of the machine. Other cases include when an instruction encounters a fault, trap, or microcode assist of any sort that initiates a flow of uops. The event will count MS startups for uops that are speculative, and subsequently cleared by branch mispredict or a machine clear. name:uops_issued type:mandatory default:0x0 0x0 extra: any Counts uops issued by the front end and allocated into the back end of the machine. This event counts uops that retire as well as uops that were speculatively executed but didn't retire. The sort of speculative uops that might be counted includes, but is not limited to those uops issued in the shadow of a miss-predicted branch, those uops that are inserted during an assist (such as for a denormal floating point result), and (previously allocated) uops that might be canceled during a machine clear. name:uops_not_delivered type:mandatory default:0x0 0x0 extra: any This event used to measure front-end inefficiencies. I.e. when front-end of the machine is not delivering uops to the back-end and the back-end has is not stalled. This event can be used to identify if the machine is truly front-end bound. When this event occurs, it is an indication that the front-end of the machine is operating at less than its theoretical peak performance. Background: We can think of the processor pipeline as being divided into 2 broader parts: Front-end and Back-end. Front-end is responsible for fetching the instruction, decoding into uops in machine understandable format and putting them into a uop queue to be consumed by back end. The back-end then takes these uops, allocates the required resources. When all resources are ready, uops are executed. If the back-end is not ready to accept uops from the front-end, then we do not want to count these as front-end bottlenecks. However, whenever we have bottlenecks in the back-end, we will have allocation unit stalls and eventually forcing the front-end to wait until the back-end is ready to receive more uops. This event counts only when back-end is requesting more uops and front-end is not able to provide them. When 3 uops are requested and no uops are delivered, the event counts 3. When 3 are requested, and only 1 is delivered, the event counts 2. When only 2 are delivered, the event counts 1. Alternatively stated, the event will not count if 3 uops are delivered, or if the back end is stalled and not requesting any uops at all. Counts indicate missed opportunities for the front-end to deliver a uop to the back end. Some examples of conditions that cause front-end efficiencies are: ICache misses, ITLB misses, and decoder restrictions that limit the front-end bandwidth. Known Issues: Some uops require multiple allocation slots. These uops will not be charged as a front end 'not delivered' opportunity, and will be regarded as a back end problem. For example, the INC instruction has one uop that requires 2 issue slots. A stream of INC instructions will not count as UOPS_NOT_DELIVERED, even though only one instruction can be issued per clock. The low uop issue rate for a stream of INC instructions is considered to be a back end issue. name:cpu_clk_unhalted type:exclusive default:core_p 0x0 extra: core_p Core cycles when core is not halted. This event uses a (_P)rogrammable general purpose performance counter. 0x1 extra: ref Reference cycles when core is not halted. This event uses a (_P)rogrammable general purpose performance counter. name:ld_blocks type:exclusive default:all_block 0x10 extra: all_block Counts anytime a load that retires is blocked for any reason. 0x10 extra:pebs all_block_pebs Counts anytime a load that retires is blocked for any reason. 0x8 extra: utlb_miss Counts loads blocked because they are unable to find their physical address in the micro TLB (UTLB). 0x8 extra:pebs utlb_miss_pebs Counts loads blocked because they are unable to find their physical address in the micro TLB (UTLB). 0x2 extra: store_forward Counts a load blocked from using a store forward because of an address/size mismatch, only one of the loads blocked from each store will be counted. 0x2 extra:pebs store_forward_pebs Counts a load blocked from using a store forward because of an address/size mismatch, only one of the loads blocked from each store will be counted. 0x1 extra: data_unknown Counts a load blocked from using a store forward, but did not occur because the store data was not available at the right time. The forward might occur subsequently when the data is available. 0x1 extra:pebs data_unknown_pebs Counts a load blocked from using a store forward, but did not occur because the store data was not available at the right time. The forward might occur subsequently when the data is available. 0x4 extra: u4k_alias Counts loads that block because their address modulo 4K matches a pending store. 0x4 extra:pebs u4k_alias_pebs Counts loads that block because their address modulo 4K matches a pending store. name:dtlb_load_misses type:exclusive default:walk_pending 0x2 extra: walk_completed_4k Counts page walks completed due to demand data loads (including SW prefetches) whose address translations missed in all TLB levels and were mapped to 4K pages. The page walks can end with or without a page fault. 0x4 extra: walk_completed_2m_4m Counts page walks completed due to demand data loads (including SW prefetches) whose address translations missed in all TLB levels and were mapped to 2M or 4M pages. The page walks can end with or without a page fault. 0x8 extra: walk_completed_1gb Counts page walks completed due to demand data loads (including SW prefetches) whose address translations missed in all TLB levels and were mapped to 1GB pages. The page walks can end with or without a page fault. 0x10 extra: walk_pending Counts once per cycle for each page walk occurring due to a load (demand data loads or SW prefetches). Includes cycles spent traversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by the number of walks. name:dtlb_store_misses type:exclusive default:walk_pending 0x2 extra: walk_completed_4k Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault. 0x4 extra: walk_completed_2m_4m Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 2M or 4M pages. The page walks can end with or without a page fault. 0x8 extra: walk_completed_1gb Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 1GB pages. The page walks can end with or without a page fault. 0x10 extra: walk_pending Counts once per cycle for each page walk occurring due to a demand data store. Includes cycles spent traversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by the number of walks. name:ept type:exclusive default:walk_pending 0x10 extra: walk_pending Counts once per cycle for each page walk only while traversing the Extended Page Table (EPT), and does not count during the rest of the translation. The EPT is used for translating Guest-Physical Addresses to Physical Addresses for Virtual Machine Monitors (VMMs). Average cycles per walk can be calculated by dividing the count by number of walks. name:itlb_misses type:exclusive default:walk_pending 0x2 extra: walk_completed_4k Counts page walks completed due to instruction fetches whose address translations missed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault. 0x4 extra: walk_completed_2m_4m Counts page walks completed due to instruction fetches whose address translations missed in the TLB and were mapped to 2M or 4M pages. The page walks can end with or without a page fault. 0x8 extra: walk_completed_1gb Counts page walks completed due to instruction fetches whose address translations missed in the TLB and were mapped to 1GB pages. The page walks can end with or without a page fault. 0x10 extra: walk_pending Counts once per cycle for each page walk occurring due to an instruction fetch. Includes cycles spent traversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by the number of walks. name:tlb_flushes type:exclusive default:stlb_any 0x20 extra: stlb_any Counts STLB flushes. The TLBs are flushed on instructions like INVLPG and MOV to CR3. name:misalign_mem_ref type:exclusive default:load_page_split 0x2 extra: load_page_split Counts when a memory load of a uop spans a page boundary (a split) is retired. 0x2 extra:pebs load_page_split_pebs Counts when a memory load of a uop spans a page boundary (a split) is retired. 0x4 extra: store_page_split Counts when a memory store of a uop spans a page boundary (a split) is retired. 0x4 extra:pebs store_page_split_pebs Counts when a memory store of a uop spans a page boundary (a split) is retired. name:longest_lat_cache type:exclusive default:0x4f 0x4f extra: reference Counts memory requests originating from the core that reference a cache line in the L2 cache. 0x41 extra: miss Counts memory requests originating from the core that miss in the L2 cache. name:icache type:exclusive default:0x1 0x1 extra: hit Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line and that cache line is in the ICache (hit). The event strives to count on a cache line basis, so that multiple accesses which hit in a single cache line count as one ICACHE.HIT. Specifically, the event counts when straight line code crosses the cache line boundary, or when a branch target is to a new line, and that cache line is in the ICache. This event counts differently than Intel processors based on Silvermont microarchitecture. 0x2 extra: misses Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line and that cache line is not in the ICache (miss). The event strives to count on a cache line basis, so that multiple accesses which miss in a single cache line count as one ICACHE.MISS. Specifically, the event counts when straight line code crosses the cache line boundary, or when a branch target is to a new line, and that cache line is not in the ICache. This event counts differently than Intel processors based on Silvermont microarchitecture. 0x3 extra: accesses Counts requests to the Instruction Cache (ICache) for one or more bytes in an ICache Line. The event strives to count on a cache line basis, so that multiple fetches to a single cache line count as one ICACHE.ACCESS. Specifically, the event counts when accesses from straight line code crosses the cache line boundary, or when a branch target is to a new line. This event counts differently than Intel processors based on Silvermont microarchitecture. name:inst_retired type:exclusive default:any 0x0 extra: any Counts the number of instructions that retire execution. For instructions that consist of multiple uops, this event counts the retirement of the last uop of the instruction. The counter continues counting during hardware interrupts, traps, and inside interrupt handlers. This event uses fixed counter 0. You cannot collect a PEBs record for this event. 0x0 extra: any_p Counts the number of instructions that retire execution. For instructions that consist of multiple uops, this event counts the retirement of the last uop of the instruction. The event continues counting during hardware interrupts, traps, and inside interrupt handlers. This is an architectural performance event. This event uses a (_P)rogrammable general purpose performance counter. *This event is Precise Event capable: The EventingRIP field in the PEBS record is precise to the address of the instruction which caused the event. Note: Because PEBS records can be collected only on IA32_PMC0, only one event can use the PEBS facility at a time. 0x0 extra:pebs any_p_pebs Counts the number of instructions that retire execution. For instructions that consist of multiple uops, this event counts the retirement of the last uop of the instruction. The event continues counting during hardware interrupts, traps, and inside interrupt handlers. This is an architectural performance event. This event uses a (_P)rogrammable general purpose performance counter. *This event is Precise Event capable: The EventingRIP field in the PEBS record is precise to the address of the instruction which caused the event. Note: Because PEBS records can be collected only on IA32_PMC0, only one event can use the PEBS facility at a time. name:uops_retired type:exclusive default:any 0x0 extra: any Counts uops which retired 0x0 extra:pebs any_pebs Counts uops which retired 0x1 extra: ms Counts uops retired that are from the complex flows issued by the micro-sequencer (MS). Counts both the uops from a micro-coded instruction, and the uops that might be generated from a micro-coded assist. 0x1 extra:pebs ms_pebs Counts uops retired that are from the complex flows issued by the micro-sequencer (MS). Counts both the uops from a micro-coded instruction, and the uops that might be generated from a micro-coded assist. 0x8 extra: fpdiv Counts the number of floating point divide uops retired. 0x8 extra:pebs fpdiv_pebs Counts the number of floating point divide uops retired. 0x10 extra: idiv Counts the number of integer divide uops retired. 0x10 extra:pebs idiv_pebs Counts the number of integer divide uops retired. name:machine_clears type:exclusive default:all 0x0 extra: all Counts machine clears for any reason 0x1 extra: smc Counts the number of times that the processor detects that a program is writing to a code section and has to perform a machine clear because of that modification. Self-modifying code (SMC) causes a severe penalty in all Intel architecture processors. 0x2 extra: memory_ordering Counts machine clears due to memory ordering issues. This occurs when a snoop request happens and the machine is uncertain if memory ordering will be preserved - as another core is in the process of modifying the data. 0x4 extra: fp_assist Counts machine clears due to floating point (FP) operations needing assists. For instance, if the result was a floating point denormal, the hardware clears the pipeline and reissues uops to produce the correct IEEE compliant denormal result. 0x8 extra: disambiguation Counts machine clears due to memory disambiguation. Memory disambiguation happens when a load which has been issued conflicts with a previous unretired store in the pipeline whose address was not known at issue time, but is later resolved to be the same as the load address. 0x20 extra: page_fault Counts the number of times that the machines clears due to a page fault. Covers both I-side and D-side(Loads/Stores) page faults. A page fault occurs when either page is not present, or an access violation. name:br_inst_retired type:exclusive default:all_branches 0x0 extra: all_branches Counts branch instructions retired for all branch types. This is an architectural performance event. 0x0 extra:pebs all_branches_pebs Counts branch instructions retired for all branch types. This is an architectural performance event. 0x7e extra: jcc Counts retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was taken and when it was not taken. 0x7e extra:pebs jcc_pebs Counts retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was taken and when it was not taken. 0x80 extra: all_taken_branches Counts the number of taken branch instructions retired. 0x80 extra:pebs all_taken_branches_pebs Counts the number of taken branch instructions retired. 0xfe extra: taken_jcc Counts Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were taken and does not count when the Jcc branch instruction were not taken. 0xfe extra:pebs taken_jcc_pebs Counts Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were taken and does not count when the Jcc branch instruction were not taken. 0xf9 extra: call Counts near CALL branch instructions retired. 0xf9 extra:pebs call_pebs Counts near CALL branch instructions retired. 0xfd extra: rel_call Counts near relative CALL branch instructions retired. 0xfd extra:pebs rel_call_pebs Counts near relative CALL branch instructions retired. 0xfb extra: ind_call Counts near indirect CALL branch instructions retired. 0xfb extra:pebs ind_call_pebs Counts near indirect CALL branch instructions retired. 0xf7 extra: return Counts near return branch instructions retired. 0xf7 extra:pebs return_pebs Counts near return branch instructions retired. 0xeb extra: non_return_ind Counts near indirect call or near indirect jmp branch instructions retired. 0xeb extra:pebs non_return_ind_pebs Counts near indirect call or near indirect jmp branch instructions retired. 0xbf extra: far_branch Counts far branch instructions retired. This includes far jump, far call and return, and Interrupt call and return. 0xbf extra:pebs far_branch_pebs Counts far branch instructions retired. This includes far jump, far call and return, and Interrupt call and return. name:br_misp_retired type:exclusive default:all_branches 0x0 extra: all_branches Counts mispredicted branch instructions retired including all branch types. 0x0 extra:pebs all_branches_pebs Counts mispredicted branch instructions retired including all branch types. 0x7e extra: jcc Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was supposed to be taken and when it was not supposed to be taken (but the processor predicted the opposite condition). 0x7e extra:pebs jcc_pebs Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired, including both when the branch was supposed to be taken and when it was not supposed to be taken (but the processor predicted the opposite condition). 0xfe extra: taken_jcc Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were supposed to be taken but the processor predicted that it would not be taken. 0xfe extra:pebs taken_jcc_pebs Counts mispredicted retired Jcc (Jump on Conditional Code/Jump if Condition is Met) branch instructions retired that were supposed to be taken but the processor predicted that it would not be taken. 0xfb extra: ind_call Counts mispredicted near indirect CALL branch instructions retired, where the target address taken was not what the processor predicted. 0xfb extra:pebs ind_call_pebs counts mispredicted near indirect CALL branch instructions retired, where the target address taken was not what the processor predicted. 0xf7 extra: return Counts mispredicted near RET branch instructions retired, where the return address taken was not what the processor predicted. 0xf7 extra:pebs return_pebs Counts mispredicted near RET branch instructions retired, where the return address taken was not what the processor predicted. 0xeb extra: non_return_ind Counts mispredicted branch instructions retired that were near indirect call or near indirect jmp, where the target address taken was not what the processor predicted. 0xeb extra:pebs non_return_ind_pebs Counts mispredicted branch instructions retired that were near indirect call or near indirect jmp, where the target address taken was not what the processor predicted. name:issue_slots_not_consumed type:exclusive default:0x0 0x0 extra: any Counts the number of issue slots per core cycle that were not consumed by the backend due to either a full resource in the backend (RESOURCE_FULL) or due to the processor recovering from some event (RECOVERY) 0x1 extra: resource_full Counts the number of issue slots per core cycle that were not consumed because of a full resource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), reservation stations (RS), load/store buffers, physical registers, or any other needed machine resource that is currently unavailable. Note that uops must be available for consumption in order for this event to fire. If a uop is not available (Instruction Queue is empty), this event will not count. 0x2 extra: recovery Counts the number of issue slots per core cycle that were not consumed by the backend because allocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g. the event is relevant during certain microcode flows). Counts all issue slots blocked while within this window including slots where uops were not available in the Instruction Queue. name:hw_interrupts type:exclusive default:0x1 0x1 extra: received Counts hardware interrupts received by the processor. 0x4 extra: pending_and_masked Counts core cycles during which there are pending interrupts, but interrupts are masked (EFLAGS.IF = 0). name:cycles_div_busy type:exclusive default:0x0 0x0 extra: all Counts core cycles if either divide unit is busy. 0x1 extra: idiv Counts core cycles the integer divide unit is busy. 0x2 extra: fpdiv Counts core cycles the floating point divide unit is busy. name:mem_uops_retired type:exclusive default:all 0x83 extra: all Counts the number of memory uops retired that is either a loads or a store or both. 0x81 extra: all_loads Counts the number of load uops retired 0x81 extra:pebs all_loads_pebs Counts the number of load uops retired 0x82 extra: all_stores Counts the number of store uops retired. 0x82 extra:pebs all_stores_pebs Counts the number of store uops retired. 0x83 extra:pebs all_pebs Counts the number of memory uops retired that is either a loads or a store or both. 0x11 extra: dtlb_miss_loads Counts load uops retired that caused a DTLB miss. 0x11 extra:pebs dtlb_miss_loads_pebs Counts load uops retired that caused a DTLB miss. 0x12 extra: dtlb_miss_stores Counts store uops retired that caused a DTLB miss. 0x12 extra:pebs dtlb_miss_stores_pebs Counts store uops retired that caused a DTLB miss. 0x13 extra: dtlb_miss Counts uops retired that had a DTLB miss on load, store or either. Note that when two distinct memory operations to the same page miss the DTLB, only one of them will be recorded as a DTLB miss. 0x13 extra:pebs dtlb_miss_pebs Counts uops retired that had a DTLB miss on load, store or either. Note that when two distinct memory operations to the same page miss the DTLB, only one of them will be recorded as a DTLB miss. 0x21 extra: lock_loads Counts locked memory uops retired. This includes "regular" locks and bus locks. (To specifically count bus locks only, see the Offcore response event.) A locked access is one with a lock prefix, or an exchange to memory. See the SDM for a complete description of which memory load accesses are locks. 0x21 extra:pebs lock_loads_pebs Counts locked memory uops retired. This includes "regular" locks and bus locks. (To specifically count bus locks only, see the Offcore response event.) A locked access is one with a lock prefix, or an exchange to memory. See the SDM for a complete description of which memory load accesses are locks. 0x41 extra: split_loads Counts load uops retired where the data requested spans a 64 byte cache line boundary. 0x41 extra:pebs split_loads_pebs Counts load uops retired where the data requested spans a 64 byte cache line boundary. 0x42 extra: split_stores Counts store uops retired where the data requested spans a 64 byte cache line boundary. 0x42 extra:pebs split_stores_pebs Counts store uops retired where the data requested spans a 64 byte cache line boundary. 0x43 extra: split Counts memory uops retired where the data requested spans a 64 byte cache line boundary. 0x43 extra:pebs split_pebs Counts memory uops retired where the data requested spans a 64 byte cache line boundary. name:mem_load_uops_retired type:exclusive default:l1_hit 0x1 extra: l1_hit Counts load uops retired that hit the L1 data cache. 0x1 extra:pebs l1_hit_pebs Counts load uops retired that hit the L1 data cache. 0x8 extra: l1_miss Counts load uops retired that miss the L1 data cache. 0x8 extra:pebs l1_miss_pebs Counts load uops retired that miss the L1 data cache. 0x2 extra: l2_hit Counts load uops retired that hit in the L2 cache. 0x2 extra:pebs l2_hit_pebs Counts load uops retired that hit in the L2 cache. 0x10 extra: l2_miss Counts load uops retired that miss in the L2 cache. 0x10 extra:pebs l2_miss_pebs Counts load uops retired that miss in the L2 cache. 0x20 extra: hitm Counts load uops retired where the cache line containing the data was in the modified state of another core or modules cache (HITM). More specifically, this means that when the load address was checked by other caching agents (typically another processor) in the system, one of those caching agents indicated that they had a dirty copy of the data. Loads that obtain a HITM response incur greater latency than most is typical for a load. In addition, since HITM indicates that some other processor had this data in its cache, it implies that the data was shared between processors, or potentially was a lock or semaphore value. This event is useful for locating sharing, false sharing, and contended locks. 0x20 extra:pebs hitm_pebs Counts load uops retired where the cache line containing the data was in the modified state of another core or modules cache (HITM). More specifically, this means that when the load address was checked by other caching agents (typically another processor) in the system, one of those caching agents indicated that they had a dirty copy of the data. Loads that obtain a HITM response incur greater latency than most is typical for a load. In addition, since HITM indicates that some other processor had this data in its cache, it implies that the data was shared between processors, or potentially was a lock or semaphore value. This event is useful for locating sharing, false sharing, and contended locks. 0x40 extra: wcb_hit Counts memory load uops retired where the data is retrieved from the WCB (or fill buffer), indicating that the load found its data while that data was in the process of being brought into the L1 cache. Typically a load will receive this indication when some other load or prefetch missed the L1 cache and was in the process of retrieving the cache line containing the data, but that process had not yet finished (and written the data back to the cache). For example, consider load X and Y, both referencing the same cache line that is not in the L1 cache. If load X misses cache first, it obtains and WCB (or fill buffer) and begins the process of requesting the data. When load Y requests the data, it will either hit the WCB, or the L1 cache, depending on exactly what time the request to Y occurs. 0x40 extra:pebs wcb_hit_pebs Counts memory load uops retired where the data is retrieved from the WCB (or fill buffer), indicating that the load found its data while that data was in the process of being brought into the L1 cache. Typically a load will receive this indication when some other load or prefetch missed the L1 cache and was in the process of retrieving the cache line containing the data, but that process had not yet finished (and written the data back to the cache). For example, consider load X and Y, both referencing the same cache line that is not in the L1 cache. If load X misses cache first, it obtains and WCB (or fill buffer) and begins the process of requesting the data. When load Y requests the data, it will either hit the WCB, or the L1 cache, depending on exactly what time the request to Y occurs. 0x80 extra: dram_hit Counts memory load uops retired where the data is retrieved from DRAM. Event is counted at retirement, so the speculative loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the L2 cache, hit DRAM, hit in the WCB or receive a HITM response. 0x80 extra:pebs dram_hit_pebs Counts memory load uops retired where the data is retrieved from DRAM. Event is counted at retirement, so the speculative loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the L2 cache, hit DRAM, hit in the WCB or receive a HITM response. name:baclears type:exclusive default:0x1 0x1 extra: all Counts the number of times a BACLEAR is signaled for any reason, including, but not limited to indirect branch/call, Jcc (Jump on Conditional Code/Jump if Condition is Met) branch, unconditional branch/call, and returns. 0x8 extra: return Counts BACLEARS on return instructions. 0x10 extra: cond Counts BACLEARS on Jcc (Jump on Conditional Code/Jump if Condition is Met) branches. oprofile-1.3.0/events/i386/arch_perfmon/0000775000175000017500000000000013323173530014775 500000000000000oprofile-1.3.0/events/i386/arch_perfmon/events0000664000175000017500000000160012534404406016143 00000000000000# # Intel Architectural events as of arch perfmon v2 # event:0x3c counters:cpuid um:zero minimum:6000 filter:0 name:CPU_CLK_UNHALTED : Clock cycles when not halted event:0x3c counters:cpuid um:one minimum:6000 filter:2 name:UNHALTED_REFERENCE_CYCLES : Unhalted reference cycles event:0xc0 counters:cpuid um:zero minimum:6000 filter:1 name:INST_RETIRED : number of instructions retired event:0x2e counters:cpuid um:x41 minimum:6000 filter:4 name:LLC_MISSES : Last level cache demand requests from this core that missed the LLC event:0x2e counters:cpuid um:x4f minimum:6000 filter:3 name:LLC_REFS : Last level cache demand requests from this core event:0xc4 counters:cpuid um:zero minimum:500 filter:5 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:cpuid um:zero minimum:500 filter:6 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise) oprofile-1.3.0/events/i386/arch_perfmon/unit_masks0000664000175000017500000000041112534404406017013 00000000000000# Intel architectural perfmon unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:one type:mandatory default:0x1 0x1 No unit mask name:x41 type:mandatory default:0x41 0x41 No unit mask name:x4f type:mandatory default:0x4f 0x4f No unit mask #oprofile-1.3.0/events/i386/p6_mobile/0000775000175000017500000000000013323173530014206 500000000000000oprofile-1.3.0/events/i386/p6_mobile/events0000664000175000017500000002505513124774026015372 00000000000000# Pentium M events # event:0x79 counters:0,1 um:zero minimum:6000 name:CPU_CLK_UNHALTED : clocks processor is not halted, and not in a thermal trip event:0x43 counters:0,1 um:zero minimum:500 name:DATA_MEM_REFS : all memory references, cachable and non event:0x45 counters:0,1 um:zero minimum:500 name:DCU_LINES_IN : total lines allocated in the DCU event:0x46 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_IN : number of M state lines allocated in DCU event:0x47 counters:0,1 um:zero minimum:500 name:DCU_M_LINES_OUT : number of M lines evicted from the DCU event:0x48 counters:0,1 um:zero minimum:500 name:DCU_MISS_OUTSTANDING : number of cycles while DCU miss outstanding event:0x80 counters:0,1 um:zero minimum:500 name:IFU_IFETCH : number of non/cachable instruction fetches event:0x81 counters:0,1 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses event:0x85 counters:0,1 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled event:0x28 counters:0,1 um:mesi minimum:500 name:L2_IFETCH : number of L2 instruction fetches event:0x29 counters:0,1 um:mesi minimum:500 name:L2_LD : number of L2 data loads event:0x2a counters:0,1 um:mesi minimum:500 name:L2_ST : number of L2 data stores event:0x24 counters:0,1 um:zero minimum:500 name:L2_LINES_IN : number of allocated lines in L2 event:0x26 counters:0,1 um:zero minimum:500 name:L2_LINES_OUT : number of recovered lines from L2 event:0x25 counters:0,1 um:zero minimum:500 name:L2_M_LINES_INM : number of modified lines allocated in L2 event:0x27 counters:0,1 um:zero minimum:500 name:L2_M_LINES_OUTM : number of modified lines removed from L2 event:0x2e counters:0,1 um:mesi minimum:500 name:L2_RQSTS : number of L2 requests event:0x21 counters:0,1 um:zero minimum:500 name:L2_ADS : number of L2 address strobes event:0x22 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY : number of cycles data bus was busy event:0x23 counters:0,1 um:zero minimum:500 name:L2_DBUS_BUSY_RD : cycles data bus was busy in xfer from L2 to CPU event:0x62 counters:0,1 um:ebl minimum:500 name:BUS_DRDY_CLOCKS : number of clocks DRDY is asserted event:0x63 counters:0,1 um:ebl minimum:500 name:BUS_LOCK_CLOCKS : number of clocks LOCK is asserted event:0x60 counters:0,1 um:zero minimum:500 name:BUS_REQ_OUTSTANDING : number of outstanding bus requests event:0x65 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BRD : number of burst read transactions event:0x66 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_RFO : number of read for ownership transactions event:0x67 counters:0,1 um:ebl minimum:500 name:BUS_TRANS_WB : number of write back transactions event:0x68 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_IFETCH : number of instruction fetch transactions event:0x69 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_INVAL : number of invalidate transactions event:0x6a counters:0,1 um:ebl minimum:500 name:BUS_TRAN_PWR : number of partial write transactions event:0x6b counters:0,1 um:ebl minimum:500 name:BUS_TRANS_P : number of partial transactions event:0x6c counters:0,1 um:ebl minimum:500 name:BUS_TRANS_IO : number of I/O transactions event:0x6d counters:0,1 um:ebl minimum:500 name:BUS_TRANS_DEF : number of deferred transactions event:0x6e counters:0,1 um:ebl minimum:500 name:BUS_TRAN_BURST : number of burst transactions event:0x70 counters:0,1 um:ebl minimum:500 name:BUS_TRAN_ANY : number of all transactions event:0x6f counters:0,1 um:ebl minimum:500 name:BUS_TRAN_MEM : number of memory transactions event:0x64 counters:0,1 um:zero minimum:500 name:BUS_DATA_RCV : bus cycles this processor is receiving data event:0x61 counters:0,1 um:zero minimum:500 name:BUS_BNR_DRV : bus cycles this processor is driving BNR pin event:0x7a counters:0,1 um:zero minimum:500 name:BUS_HIT_DRV : bus cycles this processor is driving HIT pin event:0x7b counters:0,1 um:zero minimum:500 name:BUS_HITM_DRV : bus cycles this processor is driving HITM pin event:0x7e counters:0,1 um:zero minimum:500 name:BUS_SNOOP_STALL : cycles during bus snoop stall event:0xc1 counters:0 um:zero minimum:3000 name:COMP_FLOP_RET : number of computational FP operations retired event:0x10 counters:0 um:zero minimum:3000 name:FLOPS : number of computational FP operations executed event:0x11 counters:1 um:zero minimum:500 name:FP_ASSIST : number of FP exceptions handled by microcode event:0x12 counters:1 um:zero minimum:1000 name:MUL : number of multiplies event:0x13 counters:1 um:zero minimum:500 name:DIV : number of divides event:0x14 counters:0 um:zero minimum:1000 name:CYCLES_DIV_BUSY : cycles divider is busy event:0x03 counters:0,1 um:zero minimum:500 name:LD_BLOCKS : number of store buffer blocks event:0x04 counters:0,1 um:zero minimum:500 name:SB_DRAINS : number of store buffer drain cycles event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references event:0x07 counters:0,1 um:kni_prefetch minimum:500 name:EMON_KNI_PREF_DISPATCHED : number of KNI pre-fetch/weakly ordered insns dispatched event:0x4b counters:0,1 um:kni_prefetch minimum:500 name:EMON_KNI_PREF_MISS : number of KNI pre-fetch/weakly ordered insns that miss all caches event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED : number of instructions retired event:0xc2 counters:0,1 um:zero minimum:6000 name:UOPS_RETIRED : number of UOPs retired # Errata lists INST_DECODE as not accurate. See 25266507.pdf. event:0xd0 counters:0,1 um:zero minimum:6000 name:INST_DECODED : number of instructions decoded event:0xd8 counters:0,1 um:sse_sse2_inst_retired minimum:3000 name:EMON_SSE_SSE2_INST_RETIRED : Streaming SIMD Extensions Instructions Retired event:0xd9 counters:0,1 um:sse_sse2_inst_retired minimum:3000 name:EMON_SSE_SSE2_COMP_INST_RETIRED : Computational SSE Instructions Retired event:0xc8 counters:0,1 um:zero minimum:500 name:HW_INT_RX : number of hardware interrupts received event:0xc6 counters:0,1 um:zero minimum:500 name:CYCLES_INT_MASKED : cycles interrupts are disabled event:0xc7 counters:0,1 um:zero minimum:500 name:CYCLES_INT_PENDING_AND_MASKED : cycles interrupts are disabled with pending interrupts event:0xc4 counters:0,1 um:zero minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired event:0xc9 counters:0,1 um:zero minimum:500 name:BR_TAKEN_RETIRED : number of taken branches retired event:0xca counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_TAKEN_RET : number of taken mispredictions branches retired event:0xe0 counters:0,1 um:zero minimum:500 name:BR_INST_DECODED : number of branch instructions decoded event:0xe2 counters:0,1 um:zero minimum:500 name:BTB_MISSES : number of branches that miss the BTB event:0xe4 counters:0,1 um:zero minimum:500 name:BR_BOGUS : number of bogus branches event:0xe6 counters:0,1 um:zero minimum:500 name:BACLEARS : number of times BACLEAR is asserted event:0xa2 counters:0,1 um:zero minimum:500 name:RESOURCE_STALLS : cycles during resource related stalls event:0xd2 counters:0,1 um:zero minimum:500 name:PARTIAL_RAT_STALLS : cycles or events for partial stalls event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads event:0xb1 counters:0,1 um:zero minimum:3000 name:MMX_SAT_INSTR_EXEC : number of MMX saturating instructions executed event:0xb2 counters:0,1 um:mmx_uops minimum:3000 name:MMX_UOPS_EXEC : number of MMX UOPS executed event:0xb3 counters:0,1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions event:0xcd counters:0,1 um:zero minimum:500 name:MMX_ASSIST : number of EMMS instructions executed event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired # # Pentium M Specific events from A-7 # # # Power Management event:0x58 counters:0,1 um:freq minimum:3000 name:EMON_EST_TRANS : Number of Enhanced Intel SpeedStep # Errata lists EMON_THERMAL_TRIP as not accurate. See 25266507.pdf. event:0x59 counters:0,1 um:zero minimum:3000 name:EMON_THERMAL_TRIP : Duration/Occurrences in thermal trip # # BPU event:0x88 counters:0,1 um:zero minimum:3000 name:BR_INST_EXEC : Branch instructions executed (not necessarily retired) event:0x89 counters:0,1 um:zero minimum:3000 name:BR_MISSP_EXEC : Branch instructions executed that were mispredicted at execution event:0x8a counters:0,1 um:zero minimum:3000 name:BR_BAC_MISSP_EXEC : Branch instructions executed that were mispredicted at Front End (BAC) event:0x8b counters:0,1 um:zero minimum:3000 name:BR_CND_EXEC : Conditional Branch instructions executed event:0x8c counters:0,1 um:zero minimum:3000 name:BR_CND_MISSP_EXEC : Conditional Branch instructions executed that were mispredicted event:0x8d counters:0,1 um:zero minimum:3000 name:BR_IND_EXEC : Indirect Branch instructions executed event:0x8e counters:0,1 um:zero minimum:3000 name:BR_IND_MISSP_EXEC : Indirect Branch instructions executed that were mispredicted event:0x8f counters:0,1 um:zero minimum:3000 name:BR_RET_EXEC : Return Branch instructions executed event:0x90 counters:0,1 um:zero minimum:3000 name:BR_RET_MISSP_EXEC : Return Branch instructions executed that were mispredicted at Execution event:0x91 counters:0,1 um:zero minimum:3000 name:BR_RET_BAC_MISSP_EXEC :Return Branch instructions executed that were mispredicted at Front End (BAC) event:0x92 counters:0,1 um:zero minimum:3000 name:BR_CALL_EXEC : CALL instruction executed event:0x93 counters:0,1 um:zero minimum:3000 name:BR_CALL_MISSP_EXEC : CALL instruction executed and miss predicted event:0x94 counters:0,1 um:zero minimum:3000 name:BR_IND_CALL_EXEC : Indirect CALL instruction executed # # Decoder event:0xce counters:0,1 um:zero minimum:3000 name:EMON_SIMD_INSTR_RETIRED : Number of retired MMX instructions event:0xd3 counters:0,1 um:zero minimum:3000 name:EMON_SYNCH_UOPS : Sync micro-ops event:0xd7 counters:0,1 um:zero minimum:3000 name:EMON_ESP_UOPS : Total number of micro-ops event:0xda counters:0,1 um:fused minimum:3000 name:EMON_FUSED_UOPS_RET : Number of retired fused micro-ops event:0xdb counters:0,1 um:zero minimum:3000 name:EMON_UNFUSION : Number of unfusion events in the ROB, happened on a FP exception to a fused uOp # # Prefetcher event:0xf0 counters:0,1 um:zero minimum:3000 name:EMON_PREF_RQSTS_UP : Number of upward prefetches issued event:0xf8 counters:0,1 um:zero minimum:3000 name:EMON_PREF_RQSTS_DN : Number of downward prefetches issued oprofile-1.3.0/events/i386/p6_mobile/unit_masks0000664000175000017500000000262512534404406016235 00000000000000# Pentium M possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:mesi type:bitmask default:0x0f 0x08 (M)odified cache state 0x04 (E)xclusive cache state 0x02 (S)hared cache state 0x01 (I)nvalid cache state 0x0f All cache states 0x10 HW prefetched line only 0x20 all prefetched line w/o regarding mask 0x10. name:ebl type:exclusive default:0x20 0x00 self-generated transactions 0x20 any transactions name:kni_prefetch type:exclusive default:0x0 0x00 prefetch NTA 0x01 prefetch T1 0x02 prefetch T2 0x03 weakly-ordered stores # this bitmask can seems weirds but is correct, note there is no way to only # count scalar SIMD instructions name:sse_sse2_inst_retired type:exclusive default:0x0 0x00 SSE Packed Single 0x01 SSE Scalar-Single 0x02 SSE2 Packed-Double 0x03 SSE2 Scalar-Double name:mmx_uops type:mandatory default:0xf 0x0f mandatory name:mmx_instr_type_exec type:bitmask default:0x3f 0x01 MMX packed multiplies 0x02 MMX packed shifts 0x04 MMX pack operations 0x08 MMX unpack operations 0x10 MMX packed logical 0x20 MMX packed arithmetic 0x3f all of the above name:mmx_trans type:exclusive default:0x0 0x00 MMX->float operations 0x01 float->MMX operations name:freq type:exclusive default:0x0 0x00 All transitions 0x02 Only Frequency transitions name:fused type:exclusive default:0x0 0x00 All fused micro-ops 0x01 Only load+Op micro-ops 0x02 Only std+sta micro-ops oprofile-1.3.0/events/i386/haswell/0000775000175000017500000000000013323173530013771 500000000000000oprofile-1.3.0/events/i386/haswell/events0000664000175000017500000001107412534404406015145 00000000000000# # Intel "Haswell" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Haswell based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # include:i386/arch_perfmon event:0x03 counters:cpuid um:ld_blocks minimum:100003 name:ld_blocks : event:0x05 counters:cpuid um:misalign_mem_ref minimum:2000003 name:misalign_mem_ref : event:0x07 counters:cpuid um:one minimum:100003 name:ld_blocks_partial_address_alias : event:0x08 counters:cpuid um:dtlb_load_misses minimum:2000003 name:dtlb_load_misses : event:0x0d counters:cpuid um:x03 minimum:2000003 name:int_misc_recovery_cycles : event:0x0e counters:cpuid um:uops_issued minimum:2000003 name:uops_issued : event:0x24 counters:cpuid um:l2_rqsts minimum:200003 name:l2_rqsts : event:0x27 counters:cpuid um:x50 minimum:200003 name:l2_demand_rqsts_wb_hit : event:0x48 counters:2 um:l1d_pend_miss minimum:2000003 name:l1d_pend_miss : event:0x49 counters:cpuid um:dtlb_store_misses minimum:100003 name:dtlb_store_misses : event:0x4c counters:cpuid um:load_hit_pre minimum:100003 name:load_hit_pre : event:0x4f counters:cpuid um:x10 minimum:2000003 name:ept_walk_cycles : event:0x51 counters:cpuid um:one minimum:2000003 name:l1d_replacement : event:0x54 counters:cpuid um:tx_mem minimum:2000003 name:tx_mem : event:0x58 counters:cpuid um:move_elimination minimum:1000003 name:move_elimination : event:0x5c counters:cpuid um:cpl_cycles minimum:2000003 name:cpl_cycles : event:0x5d counters:cpuid um:tx_exec minimum:2000003 name:tx_exec : event:0x5e counters:cpuid um:rs_events minimum:2000003 name:rs_events : event:0x60 counters:cpuid um:offcore_requests_outstanding minimum:2000003 name:offcore_requests_outstanding : event:0x63 counters:cpuid um:lock_cycles minimum:2000003 name:lock_cycles : event:0x79 counters:0,1,2,3 um:idq minimum:2000003 name:idq : event:0x80 counters:cpuid um:icache minimum:2000003 name:icache : event:0x85 counters:cpuid um:itlb_misses minimum:100003 name:itlb_misses : event:0x87 counters:cpuid um:ild_stall minimum:2000003 name:ild_stall : event:0x88 counters:cpuid um:br_inst_exec minimum:200003 name:br_inst_exec : event:0x89 counters:cpuid um:br_misp_exec minimum:200003 name:br_misp_exec : event:0x9c counters:0,1,2,3 um:idq_uops_not_delivered minimum:2000003 name:idq_uops_not_delivered : event:0xa1 counters:cpuid um:uops_executed_port minimum:2000003 name:uops_executed_port : event:0xa2 counters:cpuid um:resource_stalls minimum:2000003 name:resource_stalls : event:0xa3 counters:2 um:cycle_activity minimum:2000003 name:cycle_activity : event:0xa8 counters:cpuid um:one minimum:2000003 name:lsd_uops : event:0xab counters:cpuid um:x02 minimum:2000003 name:dsb2mite_switches_penalty_cycles : event:0xae counters:cpuid um:one minimum:100007 name:itlb_itlb_flush : event:0xb0 counters:cpuid um:offcore_requests minimum:100003 name:offcore_requests : event:0xb1 counters:cpuid um:uops_executed minimum:2000003 name:uops_executed : event:0xbc counters:0,1,2,3 um:page_walker_loads minimum:2000003 name:page_walker_loads : event:0xbd counters:cpuid um:tlb_flush minimum:100007 name:tlb_flush : event:0xc0 counters:1 um:one minimum:2000003 name:inst_retired_prec_dist : event:0xc1 counters:cpuid um:other_assists minimum:100003 name:other_assists : event:0xc2 counters:cpuid um:uops_retired minimum:2000003 name:uops_retired : event:0xc3 counters:cpuid um:machine_clears minimum:2000003 name:machine_clears : event:0xc4 counters:cpuid um:br_inst_retired minimum:400009 name:br_inst_retired : event:0xc5 counters:cpuid um:br_misp_retired minimum:400009 name:br_misp_retired : event:0xc8 counters:cpuid um:hle_retired minimum:2000003 name:hle_retired : event:0xc9 counters:0,1,2,3 um:rtm_retired minimum:2000003 name:rtm_retired : event:0xca counters:cpuid um:fp_assist minimum:100003 name:fp_assist : event:0xcc counters:cpuid um:x20 minimum:2000003 name:rob_misc_events_lbr_inserts : event:0xd0 counters:0,1,2,3 um:mem_uops_retired minimum:2000003 name:mem_uops_retired : event:0xd1 counters:0,1,2,3 um:mem_load_uops_retired minimum:2000003 name:mem_load_uops_retired : event:0xd2 counters:0,1,2,3 um:mem_load_uops_l3_hit_retired minimum:100003 name:mem_load_uops_l3_hit_retired : event:0xd3 counters:0,1,2,3 um:mem_load_uops_l3_miss_retired minimum:100007 name:mem_load_uops_l3_miss_retired : event:0xe6 counters:cpuid um:x1f minimum:100003 name:baclears_any : event:0xf0 counters:cpuid um:l2_trans minimum:200003 name:l2_trans : event:0xf1 counters:cpuid um:l2_lines_in minimum:100003 name:l2_lines_in : event:0xf2 counters:cpuid um:l2_lines_out minimum:100003 name:l2_lines_out : oprofile-1.3.0/events/i386/haswell/unit_masks0000664000175000017500000010211712546756165016034 00000000000000# # Unit masks for the Intel "Haswell" micro architecture # # See http://ark.intel.com/ for help in identifying Haswell based CPUs # include:i386/arch_perfmon name:x02 type:mandatory default:0x2 0x2 No unit mask name:x03 type:mandatory default:0x3 0x3 No unit mask name:x10 type:mandatory default:0x10 0x10 No unit mask name:x1f type:mandatory default:0x1f 0x1f No unit mask name:x20 type:mandatory default:0x20 0x20 No unit mask name:x50 type:mandatory default:0x50 0x50 No unit mask name:ld_blocks type:exclusive default:0x2 0x2 extra: store_forward This event counts loads that followed a store to the same address, where the data could not be forwarded inside the pipeline from the store to the load. The most common reason why store forwarding would be blocked is when a load's address range overlaps with a preceding smaller uncompleted store. The penalty for blocked store forwarding is that the load must wait for the store to write its value to the cache before it can be issued. 0x8 extra: no_sr The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use name:misalign_mem_ref type:exclusive default:0x1 0x1 extra: loads Speculative cache line split load uops dispatched to L1 cache 0x2 extra: stores Speculative cache line split STA uops dispatched to L1 cache name:dtlb_load_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk Load misses in all DTLB levels that cause page walks 0x2 extra: walk_completed_4k Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (4K). 0x4 extra: walk_completed_2m_4m Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (2M/4M). 0x10 extra: walk_duration This event counts cycles when the page miss handler (PMH) is servicing page walks caused by DTLB load misses. 0x20 extra: stlb_hit_4k This event counts load operations from a 4K page that miss the first DTLB level but hit the second and do not cause page walks. 0x40 extra: stlb_hit_2m This event counts load operations from a 2M page that miss the first DTLB level but hit the second and do not cause page walks. 0x80 extra: pde_cache_miss DTLB demand load misses with low part of linear-to-physical address translation missed 0xe extra: walk_completed Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of any page size. 0x60 extra: stlb_hit Load operations that miss the first DTLB level but hit the second and do not cause page walks name:uops_issued type:exclusive default:any 0x1 extra: any This event counts the number of uops issued by the Front-end of the pipeline to the Back-end. This event is counted at the allocation stage and will count both retired and non-retired uops. 0x10 extra: flags_merge Number of flags-merge uops being allocated. Such uops considered perf sensitive; added by GSR u-arch. 0x20 extra: slow_lea Number of slow LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sources + immediate) regardless if as a result of LEA instruction or not. 0x40 extra: single_mul Number of Multiply packed/scalar single precision uops allocated 0x1 extra:cmask=1,inv stall_cycles Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for the thread 0x1 extra:cmask=1,inv,any core_stall_cycles Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for all threads name:l2_rqsts type:exclusive default:0x21 0x21 extra: demand_data_rd_miss Demand Data Read miss L2, no rejects 0x41 extra: demand_data_rd_hit Demand Data Read requests that hit L2 cache 0x30 extra: l2_pf_miss L2 prefetch requests that miss L2 cache 0x50 extra: l2_pf_hit L2 prefetch requests that hit L2 cache 0xe1 extra: all_demand_data_rd Demand Data Read requests 0xe2 extra: all_rfo RFO requests to L2 cache 0xe4 extra: all_code_rd L2 code requests 0xf8 extra: all_pf Requests from L2 hardware prefetchers 0x42 extra: rfo_hit RFO requests that hit L2 cache 0x22 extra: rfo_miss RFO requests that miss L2 cache 0x44 extra: code_rd_hit L2 cache hits when fetching instructions, code reads. 0x24 extra: code_rd_miss L2 cache misses when fetching instructions 0x27 extra: all_demand_miss Demand requests that miss L2 cache 0xe7 extra: all_demand_references Demand requests to L2 cache 0x3f extra: miss All requests that miss L2 cache 0xff extra: references All L2 requests name:l1d_pend_miss type:exclusive default:pending 0x1 extra: pending L1D miss oustandings duration in cycles 0x1 extra:cmask=1 pending_cycles Cycles with L1D load Misses outstanding. name:dtlb_store_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk Store misses in all DTLB levels that cause page walks 0x2 extra: walk_completed_4k Store miss in all TLB levels causes a page walk that completes. (4K) 0x4 extra: walk_completed_2m_4m Store misses in all DTLB levels that cause completed page walks (2M/4M) 0x10 extra: walk_duration This event counts cycles when the page miss handler (PMH) is servicing page walks caused by DTLB store misses. 0x20 extra: stlb_hit_4k This event counts store operations from a 4K page that miss the first DTLB level but hit the second and do not cause page walks. 0x40 extra: stlb_hit_2m This event counts store operations from a 2M page that miss the first DTLB level but hit the second and do not cause page walks. 0x80 extra: pde_cache_miss DTLB store misses with low part of linear-to-physical address translation missed 0xe extra: walk_completed Store misses in all DTLB levels that cause completed page walks 0x60 extra: stlb_hit Store operations that miss the first TLB level but hit the second and do not cause page walks name:load_hit_pre type:exclusive default:0x1 0x1 extra: sw_pf Not software-prefetch load dispatches that hit FB allocated for software prefetch 0x2 extra: hw_pf Not software-prefetch load dispatches that hit FB allocated for hardware prefetch name:tx_mem type:exclusive default:0x1 0x1 extra: abort_conflict Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address 0x2 extra: abort_capacity_write Number of times a transactional abort was signaled due to a data capacity limitation for transactional writes. 0x4 extra: abort_hle_store_to_elided_lock Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer 0x8 extra: abort_hle_elision_buffer_not_empty Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero. 0x10 extra: abort_hle_elision_buffer_mismatch Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer 0x20 extra: abort_hle_elision_buffer_unsupported_alignment Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer. 0x40 extra: hle_elision_buffer_full Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero. name:move_elimination type:exclusive default:0x1 0x1 extra: int_eliminated Number of integer Move Elimination candidate uops that were eliminated. 0x2 extra: simd_eliminated Number of SIMD Move Elimination candidate uops that were eliminated. 0x4 extra: int_not_eliminated Number of integer Move Elimination candidate uops that were not eliminated. 0x8 extra: simd_not_eliminated Number of SIMD Move Elimination candidate uops that were not eliminated. name:cpl_cycles type:exclusive default:ring0 0x1 extra: ring0 Unhalted core cycles when the thread is in ring 0 0x2 extra: ring123 Unhalted core cycles when thread is in rings 1, 2, or 3 0x1 extra:cmask=1,edge ring0_trans Number of intervals between processor halts while thread is in ring 0 name:tx_exec type:exclusive default:0x1 0x1 extra: misc1 Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort. 0x2 extra: misc2 Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region 0x4 extra: misc3 Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded 0x8 extra: misc4 Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region. 0x10 extra: misc5 Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region name:rs_events type:exclusive default:empty_cycles 0x1 extra: empty_cycles This event counts cycles when the Reservation Station ( RS ) is empty for the thread. The RS is a structure that buffers allocated micro-ops from the Front-end. If there are many cycles when the RS is empty, it may represent an underflow of instructions delivered from the Front-end. 0x1 extra:cmask=1,inv,edge empty_end Counts end of periods where the Reservation Station (RS) was empty. Could be useful to precisely locate Frontend Latency Bound issues. name:offcore_requests_outstanding type:exclusive default:demand_data_rd 0x1 extra: demand_data_rd Offcore outstanding Demand Data Read transactions in uncore queue. 0x2 extra: demand_code_rd Offcore outstanding code reads transactions in SuperQueue (SQ), queue to uncore, every cycle 0x4 extra: demand_rfo Offcore outstanding RFO store transactions in SuperQueue (SQ), queue to uncore 0x8 extra: all_data_rd Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore 0x1 extra:cmask=1 cycles_with_demand_data_rd Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore 0x8 extra:cmask=1 cycles_with_data_rd Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore name:lock_cycles type:exclusive default:0x1 0x1 extra: split_lock_uc_lock_duration Cycles when L1 and L2 are locked due to UC or split lock 0x2 extra: cache_lock_duration Cycles when L1D is locked name:idq type:exclusive default:0x2 0x2 extra: empty Instruction Decode Queue (IDQ) empty cycles 0x4 extra: mite_uops Uops delivered to Instruction Decode Queue (IDQ) from MITE path 0x8 extra: dsb_uops Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path 0x10 extra: ms_dsb_uops Uops initiated by Decode Stream Buffer (DSB) that are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x20 extra: ms_mite_uops Uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x30 extra: ms_uops This event counts uops delivered by the Front-end with the assistance of the microcode sequencer. Microcode assists are used for complex instructions or scenarios that can't be handled by the standard decoder. Using other instructions, if possible, will usually improve performance. 0x30 extra:cmask=1 ms_cycles This event counts cycles during which the microcode sequencer assisted the Front-end in delivering uops. Microcode assists are used for complex instructions or scenarios that can't be handled by the standard decoder. Using other instructions, if possible, will usually improve performance. 0x4 extra:cmask=1 mite_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from MITE path 0x8 extra:cmask=1 dsb_cycles Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path 0x10 extra:cmask=1 ms_dsb_cycles Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequenser (MS) is busy 0x10 extra:cmask=1,edge ms_dsb_occur Deliveries to Instruction Decode Queue (IDQ) initiated by Decode Stream Buffer (DSB) while Microcode Sequenser (MS) is busy 0x18 extra:cmask=4 all_dsb_cycles_4_uops Cycles Decode Stream Buffer (DSB) is delivering 4 Uops 0x18 extra:cmask=1 all_dsb_cycles_any_uops Cycles Decode Stream Buffer (DSB) is delivering any Uop 0x24 extra:cmask=4 all_mite_cycles_4_uops Cycles MITE is delivering 4 Uops 0x24 extra:cmask=1 all_mite_cycles_any_uops Cycles MITE is delivering any Uop 0x3c extra: mite_all_uops Uops delivered to Instruction Decode Queue (IDQ) from MITE path 0x30 extra:cmask=1,edge ms_switches Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer name:icache type:exclusive default:0x2 0x2 extra: misses This event counts Instruction Cache (ICACHE) misses. 0x4 extra: ifetch_stall Cycles where a code-fetch stalled due to L1 instruction-cache miss or an iTLB miss name:itlb_misses type:exclusive default:0x1 0x1 extra: miss_causes_a_walk Misses at all ITLB levels that cause page walks 0x2 extra: walk_completed_4k Code miss in all TLB levels causes a page walk that completes. (4K) 0x4 extra: walk_completed_2m_4m Code miss in all TLB levels causes a page walk that completes. (2M/4M) 0x10 extra: walk_duration This event counts cycles when the page miss handler (PMH) is servicing page walks caused by ITLB misses. 0x20 extra: stlb_hit_4k Core misses that miss the DTLB and hit the STLB (4K) 0x40 extra: stlb_hit_2m Code misses that miss the DTLB and hit the STLB (2M) 0xe extra: walk_completed Misses in all ITLB levels that cause completed page walks 0x60 extra: stlb_hit Operations that miss the first ITLB level but hit the second and do not cause any page walks name:ild_stall type:exclusive default:0x1 0x1 extra: lcp This event counts cycles where the decoder is stalled on an instruction with a length changing prefix (LCP). 0x4 extra: iq_full Stall cycles because IQ is full name:br_inst_exec type:exclusive default:0xff 0xff extra: all_branches Speculative and retired branches 0x41 extra: nontaken_conditional Not taken macro-conditional branches 0x81 extra: taken_conditional Taken speculative and retired macro-conditional branches 0x82 extra: taken_direct_jump Taken speculative and retired macro-conditional branch instructions excluding calls and indirects 0x84 extra: taken_indirect_jump_non_call_ret Taken speculative and retired indirect branches excluding calls and returns 0x88 extra: taken_indirect_near_return Taken speculative and retired indirect branches with return mnemonic 0x90 extra: taken_direct_near_call Taken speculative and retired direct near calls 0xa0 extra: taken_indirect_near_call Taken speculative and retired indirect calls 0xc1 extra: all_conditional Speculative and retired macro-conditional branches 0xc2 extra: all_direct_jmp Speculative and retired macro-unconditional branches excluding calls and indirects 0xc4 extra: all_indirect_jump_non_call_ret Speculative and retired indirect branches excluding calls and returns 0xc8 extra: all_indirect_near_return Speculative and retired indirect return branches. 0xd0 extra: all_direct_near_call Speculative and retired direct near calls name:br_misp_exec type:exclusive default:0xff 0xff extra: all_branches Speculative and retired mispredicted macro conditional branches 0x41 extra: nontaken_conditional Not taken speculative and retired mispredicted macro conditional branches 0x81 extra: taken_conditional Taken speculative and retired mispredicted macro conditional branches 0x84 extra: taken_indirect_jump_non_call_ret Taken speculative and retired mispredicted indirect branches excluding calls and returns 0x88 extra: taken_return_near Taken speculative and retired mispredicted indirect branches with return mnemonic 0xc1 extra: all_conditional Speculative and retired mispredicted macro conditional branches 0xc4 extra: all_indirect_jump_non_call_ret Mispredicted indirect branches excluding calls and returns 0xa0 extra: taken_indirect_near_call Taken speculative and retired mispredicted indirect calls name:idq_uops_not_delivered type:exclusive default:core 0x1 extra: core This event count the number of undelivered (unallocated) uops from the Front-end to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalled. The Front-end can allocate up to 4 uops per cycle so this event can increment 0-4 times per cycle depending on the number of unallocated uops. This event is counted on a per-core basis. 0x1 extra:cmask=4 cycles_0_uops_deliv_core This event counts the number cycles during which the Front-end allocated exactly zero uops to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalled. This event is counted on a per-core basis. 0x1 extra:cmask=3 cycles_le_1_uop_deliv_core Cycles per thread when 3 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled 0x1 extra:cmask=2 cycles_le_2_uop_deliv_core Cycles with less than 2 uops delivered by the front end. 0x1 extra:cmask=1 cycles_le_3_uop_deliv_core Cycles with less than 3 uops delivered by the front end. 0x1 extra:cmask=1,inv cycles_fe_was_ok Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stalling FE. name:uops_executed_port type:exclusive default:port_0 0x1 extra: port_0 Cycles per thread when uops are executed in port 0 0x2 extra: port_1 Cycles per thread when uops are executed in port 1 0x4 extra: port_2 Cycles per thread when uops are executed in port 2 0x8 extra: port_3 Cycles per thread when uops are executed in port 3 0x10 extra: port_4 Cycles per thread when uops are executed in port 4 0x20 extra: port_5 Cycles per thread when uops are executed in port 5 0x40 extra: port_6 Cycles per thread when uops are executed in port 6 0x80 extra: port_7 Cycles per thread when uops are executed in port 7 0x1 extra:any port_0_core Cycles per core when uops are exectuted in port 0 0x2 extra:any port_1_core Cycles per core when uops are exectuted in port 1 0x4 extra:any port_2_core Cycles per core when uops are dispatched to port 2 0x8 extra:any port_3_core Cycles per core when uops are dispatched to port 3 0x10 extra:any port_4_core Cycles per core when uops are exectuted in port 4 0x20 extra:any port_5_core Cycles per core when uops are exectuted in port 5 0x40 extra:any port_6_core Cycles per core when uops are exectuted in port 6 0x80 extra:any port_7_core Cycles per core when uops are dispatched to port 7 name:resource_stalls type:exclusive default:0x1 0x1 extra: any Resource-related stall cycles 0x4 extra: rs Cycles stalled due to no eligible RS entry available. 0x8 extra: sb This event counts cycles during which no instructions were allocated because no Store Buffers (SB) were available. 0x10 extra: rob Cycles stalled due to re-order buffer full. name:cycle_activity type:exclusive default:0x1 0x1 extra:cmask=1 cycles_l2_pending Cycles with pending L2 cache miss loads. 0x8 extra:cmask=8 cycles_l1d_pending Cycles with pending L1 cache miss loads. 0x2 extra:cmask=2 cycles_ldm_pending Cycles with pending memory loads. 0x4 extra:cmask=4 cycles_no_execute This event counts cycles during which no instructions were executed in the execution stage of the pipeline. 0x5 extra:cmask=5 stalls_l2_pending Execution stalls due to L2 cache misses. 0x6 extra:cmask=6 stalls_ldm_pending This event counts cycles during which no instructions were executed in the execution stage of the pipeline and there were memory instructions pending (waiting for data). 0xc extra:cmask=c stalls_l1d_pending Execution stalls due to L1 data cache misses name:offcore_requests type:exclusive default:0x1 0x1 extra: demand_data_rd Demand Data Read requests sent to uncore 0x2 extra: demand_code_rd Cacheable and noncachaeble code read requests 0x4 extra: demand_rfo Demand RFO requests including regular RFOs, locks, ItoM 0x8 extra: all_data_rd Demand and prefetch data reads name:uops_executed type:exclusive default:0x2 0x2 extra: core Number of uops executed on the core. Errata: HSM31 0x1 extra:cmask=1,inv stall_cycles Counts number of cycles no uops were dispatched to be executed on this thread. 0x1 extra:cmask=1 cycles_ge_1_uops_exec This events counts the cycles where at least one uop was executed. It is counted per thread. Errata: HSM31 0x1 extra:cmask=2 cycles_ge_2_uops_exec This events counts the cycles where at least two uop were executed. It is counted per thread. Errata: HSM31 0x1 extra:cmask=3 cycles_ge_3_uops_exec This events counts the cycles where at least three uop were executed. It is counted per thread. Errata: HSM31 0x1 extra:cmask=4 cycles_ge_4_uops_exec Cycles where at least 4 uops were executed per-thread Errata: HSM31 name:page_walker_loads type:exclusive default:0x11 0x11 extra: dtlb_l1 Number of DTLB page walker hits in the L1+FB 0x21 extra: itlb_l1 Number of ITLB page walker hits in the L1+FB 0x41 extra: ept_dtlb_l1 Counts the number of Extended Page Table walks from the DTLB that hit in the L1 and FB. 0x81 extra: ept_itlb_l1 Counts the number of Extended Page Table walks from the ITLB that hit in the L1 and FB. 0x12 extra: dtlb_l2 Number of DTLB page walker hits in the L2 0x22 extra: itlb_l2 Number of ITLB page walker hits in the L2 0x42 extra: ept_dtlb_l2 Counts the number of Extended Page Table walks from the DTLB that hit in the L2. 0x82 extra: ept_itlb_l2 Counts the number of Extended Page Table walks from the ITLB that hit in the L2. 0x14 extra: dtlb_l3 Number of DTLB page walker hits in the L3 + XSNP 0x24 extra: itlb_l3 Number of ITLB page walker hits in the L3 + XSNP 0x44 extra: ept_dtlb_l3 Counts the number of Extended Page Table walks from the DTLB that hit in the L3. 0x84 extra: ept_itlb_l3 Counts the number of Extended Page Table walks from the ITLB that hit in the L2. 0x18 extra: dtlb_memory Number of DTLB page walker hits in Memory 0x48 extra: ept_dtlb_memory Counts the number of Extended Page Table walks from the DTLB that hit in memory. 0x88 extra: ept_itlb_memory Counts the number of Extended Page Table walks from the ITLB that hit in memory. name:tlb_flush type:exclusive default:0x1 0x1 extra: dtlb_thread DTLB flush attempts of the thread-specific entries 0x20 extra: stlb_any STLB flush attempts name:other_assists type:exclusive default:0x8 0x8 extra: avx_to_sse Number of transitions from AVX-256 to legacy SSE when penalty applicable. Errata: HSM57 0x10 extra: sse_to_avx Number of transitions from SSE to AVX-256 when penalty applicable. Errata: HSM57 0x40 extra: any_wb_assist Number of times any microcode assist is invoked by HW upon uop writeback. name:uops_retired type:exclusive default:all 0x1 extra: all Actually retired uops. 0x1 extra: all_pebs Actually retired uops. 0x2 extra: retire_slots This event counts the number of retirement slots used each cycle. There are potentially 4 slots that can be used each cycle - meaning, 4 uops or 4 instructions could retire each cycle. 0x2 extra: retire_slots_pebs This event counts the number of retirement slots used each cycle. There are potentially 4 slots that can be used each cycle - meaning, 4 uops or 4 instructions could retire each cycle. 0x1 extra:cmask=1,inv stall_cycles Cycles without actually retired uops. 0x1 extra:cmask=a,inv total_cycles Cycles with less than 10 actually retired uops. 0x1 extra:cmask=1,inv core_stall_cycles Cycles without actually retired uops. name:machine_clears type:exclusive default:cycles 0x1 extra: cycles Cycles there was a Nuke. Account for both thread-specific and All Thread Nukes. 0x2 extra: memory_ordering This event counts the number of memory ordering machine clears detected. Memory ordering machine clears can result from memory address aliasing or snoops from another hardware thread or core to data inflight in the pipeline. Machine clears can have a significant performance impact if they are happening frequently. 0x4 extra: smc This event is incremented when self-modifying code (SMC) is detected, which causes a machine clear. Machine clears can have a significant performance impact if they are happening frequently. 0x20 extra: maskmov This event counts the number of executed Intel AVX masked load operations that refer to an illegal address range with the mask bits set to 0. 0x1 extra:cmask=1,edge count Number of machine clears (nukes) of any type. name:br_inst_retired type:exclusive default:conditional 0x1 extra: conditional Conditional branch instructions retired. 0x1 extra: conditional_pebs Conditional branch instructions retired. 0x2 extra: near_call Direct and indirect near call instructions retired. 0x2 extra: near_call_pebs Direct and indirect near call instructions retired. 0x8 extra: near_return Return instructions retired. 0x8 extra: near_return_pebs Return instructions retired. 0x10 extra: not_taken Not taken branch instructions retired. 0x20 extra: near_taken Taken branch instructions retired. 0x20 extra: near_taken_pebs Taken branch instructions retired. 0x40 extra: far_branch Far branch instructions retired. 0x4 extra:pebs all_branches_pebs All (macro) branch instructions retired. name:br_misp_retired type:exclusive default:conditional 0x1 extra: conditional Mispredicted conditional branch instructions retired. 0x1 extra: conditional_pebs Mispredicted conditional branch instructions retired. 0x4 extra:pebs all_branches_pebs This event counts all mispredicted branch instructions retired. This is a precise event. 0x20 extra: near_taken number of near branch instructions retired that were mispredicted and taken. 0x20 extra: near_taken_pebs number of near branch instructions retired that were mispredicted and taken. name:hle_retired type:exclusive default:0x1 0x1 extra: start Number of times an HLE execution started. 0x2 extra: commit Number of times an HLE execution successfully committed 0x4 extra: aborted Number of times an HLE execution aborted due to any reasons (multiple categories may count as one). 0x4 extra: aborted_pebs Number of times an HLE execution aborted due to any reasons (multiple categories may count as one). 0x8 extra: aborted_misc1 Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts). 0x10 extra: aborted_misc2 Number of times an HLE execution aborted due to uncommon conditions 0x20 extra: aborted_misc3 Number of times an HLE execution aborted due to HLE-unfriendly instructions 0x40 extra: aborted_misc4 Number of times an HLE execution aborted due to incompatible memory type 0x80 extra: aborted_misc5 Number of times an HLE execution aborted due to none of the previous 4 categories (e.g. interrupts) name:rtm_retired type:exclusive default:0x1 0x1 extra: start Number of times an RTM execution started. 0x2 extra: commit Number of times an RTM execution successfully committed 0x4 extra: aborted Number of times an RTM execution aborted due to any reasons (multiple categories may count as one). 0x4 extra: aborted_pebs Number of times an RTM execution aborted due to any reasons (multiple categories may count as one). 0x8 extra: aborted_misc1 Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts) 0x10 extra: aborted_misc2 Number of times an RTM execution aborted due to various memory events (e.g., read/write capacity and conflicts). 0x20 extra: aborted_misc3 Number of times an RTM execution aborted due to HLE-unfriendly instructions 0x40 extra: aborted_misc4 Number of times an RTM execution aborted due to incompatible memory type 0x80 extra: aborted_misc5 Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt) name:fp_assist type:exclusive default:0x1e 0x1e extra:cmask=1 any Cycles with any input/output SSE or FP assist 0x2 extra: x87_output Number of X87 assists due to output value. 0x4 extra: x87_input Number of X87 assists due to input value. 0x8 extra: simd_output Number of SIMD FP assists due to Output values 0x10 extra: simd_input Number of SIMD FP assists due to input values name:mem_uops_retired type:exclusive default:stlb_miss_loads 0x11 extra: stlb_miss_loads Load uops with true STLB miss retired to architected path. Errata: HSM30 0x11 extra: stlb_miss_loads_pebs Load uops with true STLB miss retired to architected path. Errata: HSM30 0x12 extra: stlb_miss_stores Store uops with true STLB miss retired to architected path. Errata: HSM30 0x12 extra: stlb_miss_stores_pebs Store uops with true STLB miss retired to architected path. Errata: HSM30 0x21 extra: lock_loads Load uops with locked access retired to architected path. Errata: HSM30 0x21 extra: lock_loads_pebs Load uops with locked access retired to architected path. Errata: HSM30 0x41 extra: split_loads Line-splitted load uops retired to architected path. Errata: HSM30 0x41 extra: split_loads_pebs Line-splitted load uops retired to architected path. Errata: HSM30 0x42 extra: split_stores Line-splitted store uops retired to architected path. Errata: HSM30 0x42 extra: split_stores_pebs Line-splitted store uops retired to architected path. Errata: HSM30 0x81 extra: all_loads Load uops retired to architected path with filter on bits 0 and 1 applied. Errata: HSM30 0x81 extra: all_loads_pebs Load uops retired to architected path with filter on bits 0 and 1 applied. Errata: HSM30 0x82 extra: all_stores Store uops retired to architected path with filter on bits 0 and 1 applied. Errata: HSM30 0x82 extra: all_stores_pebs Store uops retired to architected path with filter on bits 0 and 1 applied. Errata: HSM30 name:mem_load_uops_retired type:exclusive default:l1_hit 0x1 extra: l1_hit Retired load uops with L1 cache hits as data sources. Errata: HSM30 0x1 extra: l1_hit_pebs Retired load uops with L1 cache hits as data sources. Errata: HSM30 0x2 extra: l2_hit Retired load uops with L2 cache hits as data sources. Errata: HSM30 0x2 extra: l2_hit_pebs Retired load uops with L2 cache hits as data sources. Errata: HSM30 0x4 extra: l3_hit Retired load uops which data sources were data hits in L3 without snoops required. Errata: HSM26, HSM30 0x4 extra: l3_hit_pebs Retired load uops which data sources were data hits in L3 without snoops required. Errata: HSM26, HSM30 0x8 extra: l1_miss Retired load uops misses in L1 cache as data sources. Errata: HSM30 0x8 extra: l1_miss_pebs Retired load uops misses in L1 cache as data sources. Errata: HSM30 0x10 extra: l2_miss Miss in mid-level (L2) cache. Excludes Unknown data-source. Errata: HSM30 0x10 extra: l2_miss_pebs Miss in mid-level (L2) cache. Excludes Unknown data-source. Errata: HSM30 0x20 extra: l3_miss Miss in last-level (L3) cache. Excludes Unknown data-source. Errata: HSM26, HSM30 0x20 extra: l3_miss_pebs Miss in last-level (L3) cache. Excludes Unknown data-source. Errata: HSM26, HSM30 0x40 extra: hit_lfb Retired load uops which data sources were load uops missed L1 but hit FB due to preceding miss to the same cache line with data not ready. Errata: HSM30 0x40 extra: hit_lfb_pebs Retired load uops which data sources were load uops missed L1 but hit FB due to preceding miss to the same cache line with data not ready. Errata: HSM30 name:mem_load_uops_l3_hit_retired type:exclusive default:xsnp_miss 0x1 extra: xsnp_miss Retired load uops which data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Errata: HSM26, HSM30 0x1 extra: xsnp_miss_pebs Retired load uops which data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Errata: HSM26, HSM30 0x2 extra: xsnp_hit Retired load uops which data sources were L3 and cross-core snoop hits in on-pkg core cache. Errata: HSM26, HSM30 0x2 extra: xsnp_hit_pebs Retired load uops which data sources were L3 and cross-core snoop hits in on-pkg core cache. Errata: HSM26, HSM30 0x4 extra: xsnp_hitm Retired load uops which data sources were HitM responses from shared L3. Errata: HSM26, HSM30 0x4 extra: xsnp_hitm_pebs Retired load uops which data sources were HitM responses from shared L3. Errata: HSM26, HSM30 0x8 extra: xsnp_none Retired load uops which data sources were hits in L3 without snoops required. Errata: HSM26, HSM30 0x8 extra: xsnp_none_pebs Retired load uops which data sources were hits in L3 without snoops required. Errata: HSM26, HSM30 name:mem_load_uops_l3_miss_retired type:exclusive default:local_dram 0x1 extra: local_dram This event counts retired load uops where the data came from local DRAM. This does not include hardware prefetches. Errata: HSM30 0x1 extra: local_dram_pebs This event counts retired load uops where the data came from local DRAM. This does not include hardware prefetches. Errata: HSM30 name:l2_trans type:exclusive default:0x80 0x80 extra: all_requests Transactions accessing L2 pipe 0x1 extra: demand_data_rd Demand Data Read requests that access L2 cache 0x2 extra: rfo RFO requests that access L2 cache 0x4 extra: code_rd L2 cache accesses when fetching instructions 0x8 extra: all_pf L2 or L3 HW prefetches that access L2 cache 0x10 extra: l1d_wb L1D writebacks that access L2 cache 0x20 extra: l2_fill L2 fill requests that access L2 cache 0x40 extra: l2_wb L2 writebacks that access L2 cache name:l2_lines_in type:exclusive default:0x7 0x7 extra: all This event counts the number of L2 cache lines brought into the L2 cache. Lines are filled into the L2 cache when there was an L2 miss. 0x1 extra: i L2 cache lines in I state filling L2 0x2 extra: s L2 cache lines in S state filling L2 0x4 extra: e L2 cache lines in E state filling L2 name:l2_lines_out type:exclusive default:0x5 0x5 extra: demand_clean Clean L2 cache lines evicted by demand 0x6 extra: demand_dirty Dirty L2 cache lines evicted by demand oprofile-1.3.0/events/i386/core_2/0000775000175000017500000000000013323173530013503 500000000000000oprofile-1.3.0/events/i386/core_2/events0000664000175000017500000003264712534404406014670 00000000000000# Core 2 events # # Architectural events # event:0x3c counters:0,1 um:nonhlt minimum:6000 name:CPU_CLK_UNHALTED : Clock cycles when not halted event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED_ANY_P : number of instructions retired event:0x2e counters:0,1 um:core_prefetch_mesi minimum:500 name:L2_RQSTS : number of L2 cache requests event:0x2e counters:0,1 um:x41 minimum:6000 name:LLC_MISSES : L2 cache demand requests from this core that missed the L2 event:0x2e counters:0,1 um:x4f minimum:6000 name:LLC_REFS : L2 cache demand requests from this core # # Model specific events # event:0x03 counters:0,1 um:load_block minimum:500 name:LOAD_BLOCK : events pertaining to loads event:0x04 counters:0,1 um:store_block minimum:500 name:STORE_BLOCK : events pertaining to stores event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads event:0x07 counters:0,1 um:sse_prefetch minimum:500 name:SSE_PRE_EXEC : number of SSE pre-fetch/weakly ordered insns retired event:0x08 counters:0,1 um:dtlb_miss minimum:500 name:DTLB_MISSES : DTLB miss events event:0x09 counters:0,1 um:memory_dis minimum:1000 name:MEMORY_DISAMBIGUATION : Memory disambiguation reset cycles. event:0x0c counters:0,1 um:page_walks minimum:500 name:PAGE_WALKS : Page table walk events event:0x10 counters:0,1 um:zero minimum:3000 name:FLOPS : number of FP computational micro-ops executed event:0x11 counters:0,1 um:zero minimum:500 name:FP_ASSIST : number of FP assists event:0x12 counters:0,1 um:zero minimum:1000 name:MUL : number of multiplies event:0x13 counters:0,1 um:zero minimum:500 name:DIV : number of divides event:0x14 counters:0,1 um:zero minimum:1000 name:CYCLES_DIV_BUSY : cycles divider is busy event:0x18 counters:0,1 um:zero minimum:1000 name:IDLE_DURING_DIV : cycles divider is busy and all other execution units are idle. event:0x19 counters:0,1 um:delayed_bypass minimum:1000 name:DELAYED_BYPASS : Delayed bypass events event:0x21 counters:0,1 um:core minimum:500 name:L2_ADS : Cycles the L2 address bus is in use. event:0x23 counters:0,1 um:core minimum:500 name:L2_DBUS_BUSY_RD : Cycles the L2 transfers data to the core. event:0x24 counters:0,1 um:core_prefetch minimum:500 name:L2_LINES_IN : number of allocated lines in L2 event:0x25 counters:0,1 um:core minimum:500 name:L2_M_LINES_IN : number of modified lines allocated in L2 event:0x26 counters:0,1 um:core_prefetch minimum:500 name:L2_LINES_OUT : number of recovered lines from L2 event:0x27 counters:0,1 um:core_prefetch minimum:500 name:L2_M_LINES_OUT : number of modified lines removed from L2 event:0x28 counters:0,1 um:core_mesi minimum:500 name:L2_IFETCH : number of L2 cacheable instruction fetches event:0x29 counters:0,1 um:core_prefetch_mesi minimum:500 name:L2_LD : number of L2 data loads event:0x2a counters:0,1 um:core_mesi minimum:500 name:L2_ST : number of L2 data stores event:0x2b counters:0,1 um:core_mesi minimum:500 name:L2_LOCK : number of locked L2 data accesses event:0x30 counters:0,1 um:core_prefetch_mesi minimum:500 name:L2_REJECT_BUSQ : Rejected L2 cache requests event:0x32 counters:0,1 um:core minimum:500 name:L2_NO_REQ : Cycles no L2 cache requests are pending event:0x3a counters:0,1 um:zero minimum:500 name:EIST_TRANS_ALL : Intel(tm) Enhanced SpeedStep(r) Technology transitions event:0x3b counters:0,1 um:xc0 minimum:500 name:THERMAL_TRIP : Number of thermal trips event:0x40 counters:0,1 um:mesi minimum:500 name:L1D_CACHE_LD : L1 cacheable data read operations event:0x41 counters:0,1 um:mesi minimum:500 name:L1D_CACHE_ST : L1 cacheable data write operations event:0x42 counters:0,1 um:mesi minimum:500 name:L1D_CACHE_LOCK : L1 cacheable lock read operations event:0x42 counters:0,1 um:x10 minimum:500 name:L1D_CACHE_LOCK_DURATION : Duration of L1 data cacheable locked operations event:0x43 counters:0,1 um:x10 minimum:500 name:L1D_ALL_REF : All references to the L1 data cache event:0x43 counters:0,1 um:two minimum:500 name:L1D_ALL_CACHE_REF : L1 data cacheable reads and writes event:0x45 counters:0,1 um:x0f minimum:500 name:L1D_REPL : Cache lines allocated in the L1 data cache event:0x46 counters:0,1 um:zero minimum:500 name:L1D_M_REPL : Modified cache lines allocated in the L1 data cache event:0x47 counters:0,1 um:zero minimum:500 name:L1D_M_EVICT : Modified cache lines evicted from the L1 data cache event:0x48 counters:0,1 um:zero minimum:500 name:L1D_PEND_MISS : Total number of outstanding L1 data cache misses at any cycle event:0x49 counters:0,1 um:l1d_split minimum:500 name:L1D_SPLIT : Cache line split load/stores event:0x4b counters:0,1 um:sse_miss minimum:500 name:SSE_PREF_MISS : SSE instructions that missed all caches event:0x4c counters:0,1 um:zero minimum:500 name:LOAD_HIT_PRE : Load operations conflicting with a software prefetch to the same address event:0x4e counters:0,1 um:x10 minimum:500 name:L1D_PREFETCH : L1 data cache prefetch requests # event:0x60 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_REQ_OUTSTANDING : Outstanding cacheable data read bus requests duration event:0x61 counters:0,1 um:bus_agents minimum:500 name:BUS_BNR_DRV : Number of Bus Not Ready signals asserted event:0x62 counters:0,1 um:bus_agents minimum:500 name:BUS_DRDY_CLOCKS : Bus cycles when data is sent on the bus event:0x63 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_LOCK_CLOCKS : Bus cycles when a LOCK signal is asserted event:0x64 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_DATA_RCV : Bus cycles while processor receives data event:0x65 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_BRD : Burst read bus transactions event:0x66 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_RFO : number of completed read for ownership transactions event:0x67 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_WB : number of explicit writeback bus transactions event:0x68 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_IFETCH : number of instruction fetch transactions event:0x69 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_INVAL : number of invalidate transactions event:0x6a counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_PWR : number of partial write bus transactions event:0x6b counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRANS_P : number of partial bus transactions event:0x6c counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRANS_IO : number of I/O bus transactions event:0x6d counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRANS_DEF : number of completed defer transactions event:0x6e counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_BURST : number of completed burst transactions event:0x6f counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_MEM : number of completed memory transactions event:0x70 counters:0,1 um:core_and_bus_agents minimum:500 name:BUS_TRAN_ANY : number of any completed bus transactions event:0x77 counters:0,1 um:bus_agents_and_snoop minimum:500 name:EXT_SNOOP : External snoops event:0x78 counters:0,1 um:core_and_snoop minimum:500 name:CMP_SNOOP : L1 data cache is snooped by other core event:0x7a counters:0,1 um:bus_agents minimum:500 name:BUS_HIT_DRV : HIT signal asserted event:0x7b counters:0,1 um:bus_agents minimum:500 name:BUS_HITM_DRV : HITM signal asserted event:0x7d counters:0,1 um:core minimum:500 name:BUSQ_EMPTY : Bus queue is empty event:0x7e counters:0,1 um:core_and_bus_agents minimum:500 name:SNOOP_STALL_DRV : Bus stalled for snoops event:0x7f counters:0,1 um:core minimum:500 name:BUS_IO_WAIT : IO requests waiting in the bus queue event:0x80 counters:0,1 um:zero minimum:500 name:L1I_READS : number of instruction fetches event:0x81 counters:0,1 um:zero minimum:500 name:L1I_MISSES : number of instruction fetch misses event:0x82 counters:0,1 um:itlb_miss minimum:500 name:ITLB : number of ITLB misses event:0x83 counters:0,1 um:two minimum:500 name:INST_QUEUE_FULL : cycles during which the instruction queue is full event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled event:0x88 counters:0,1 um:zero minimum:3000 name:BR_INST_EXEC : Branch instructions executed (not necessarily retired) event:0x89 counters:0,1 um:zero minimum:3000 name:BR_MISSP_EXEC : Branch instructions executed that were mispredicted at execution event:0x8a counters:0,1 um:zero minimum:3000 name:BR_BAC_MISSP_EXEC : Branch instructions executed that were mispredicted at Front End (BAC) event:0x8b counters:0,1 um:zero minimum:3000 name:BR_CND_EXEC : Conditional Branch instructions executed event:0x8c counters:0,1 um:zero minimum:3000 name:BR_CND_MISSP_EXEC : Conditional Branch instructions executed that were mispredicted event:0x8d counters:0,1 um:zero minimum:3000 name:BR_IND_EXEC : Indirect Branch instructions executed event:0x8e counters:0,1 um:zero minimum:3000 name:BR_IND_MISSP_EXEC : Indirect Branch instructions executed that were mispredicted event:0x8f counters:0,1 um:zero minimum:3000 name:BR_RET_EXEC : Return Branch instructions executed event:0x90 counters:0,1 um:zero minimum:3000 name:BR_RET_MISSP_EXEC : Return Branch instructions executed that were mispredicted at Execution event:0x91 counters:0,1 um:zero minimum:3000 name:BR_RET_BAC_MISSP_EXEC :Return Branch instructions executed that were mispredicted at Front End (BAC) event:0x92 counters:0,1 um:zero minimum:3000 name:BR_CALL_EXEC : CALL instruction executed event:0x93 counters:0,1 um:zero minimum:3000 name:BR_CALL_MISSP_EXEC : CALL instruction executed and miss predicted event:0x94 counters:0,1 um:zero minimum:3000 name:BR_IND_CALL_EXEC : Indirect CALL instruction executed event:0x97 counters:0,1 um:zero minimum:3000 name:BR_TKN_BUBBLE_1 : Branch predicted taken with bubble 1 event:0x98 counters:0,1 um:zero minimum:3000 name:BR_TKN_BUBBLE_2 : Branch predicted taken with bubble 2 event:0xa0 counters:0,1 um:zero minimum:1000 name:RS_UOPS_DISPATCHED : Micro-ops dispatched for execution # Set both the CMASK and INV fields to 1 -- which causes the counter to # increment on cycles in which fewer than 1 uop dispatches. i.e. stall cycles. # It's a bit of a hack, but passes through the oprofile infrastructure just # fine. event:0x18000a0 counters:0,1 um:zero minimum:1000 name:RS_UOPS_DISPATCHED_NONE : No Micro-ops dispatched for execution event:0xaa counters:0,1 um:macro_insts minimum:500 name:MACRO_INSTS : instructions decoded event:0xab counters:0,1 um:esp minimum:500 name:ESP : ESP register events event:0xb0 counters:0,1 um:zero minimum:500 name:SIMD_UOPS_EXEC : SIMD micro-ops executed (excluding stores) event:0xb1 counters:0,1 um:zero minimum:3000 name:SIMD_SAT_UOP_EXEC : number of SIMD saturating instructions executed event:0xb3 counters:0,1 um:simd_instr_type_exec minimum:3000 name:SIMD_UOP_TYPE_EXEC : number of SIMD packing instructions event:0xc0 counters:0,1 um:inst_retired minimum:6000 name:INST_RETIRED : number of instructions retired event:0xc1 counters:0,1 um:x87_ops_retired minimum:500 name:X87_OPS_RETIRED : number of computational FP operations retired event:0xc2 counters:0,1 um:uops_retired minimum:6000 name:UOPS_RETIRED : number of UOPs retired event:0xc3 counters:0,1 um:machine_nukes minimum:500 name:MACHINE_NUKES_SMC : number of pipeline flushing events event:0xc4 counters:0,1 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise) event:0xc6 counters:0,1 um:cycles_int_masked minimum:500 name:CYCLES_INT_MASKED : cycles interrupts are disabled event:0xc7 counters:0,1 um:simd_inst_retired minimum:500 name:SIMD_INST_RETIRED : SSE/SSE2 instructions retired event:0xc8 counters:0,1 um:zero minimum:500 name:HW_INT_RCV : number of hardware interrupts received event:0xc9 counters:0 um:zero minimum:500 name:ITLB_MISS_RETIRED : Retired instructions that missed the ITLB event:0xca counters:0,1 um:simd_comp_inst_retired minimum:500 name:SIMD_COMP_INST_RETIRED : Retired computational SSE/SSE2 instructions event:0xcb counters:0 um:mem_load_retired minimum:500 name:MEM_LOAD_RETIRED : Retired loads event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions event:0xcd counters:0,1 um:zero minimum:500 name:MMX_ASSIST : number of EMMS instructions executed event:0xce counters:0,1 um:zero minimum:500 name:SIMD_INSTR_RET : number of SIMD instructions retired event:0xcf counters:0,1 um:zero minimum:500 name:SIMD_SAT_INSTR_RET : number of saturated arithmetic instructions retired event:0xd2 counters:0,1 um:rat_stalls minimum:6000 name:RAT_STALLS : Partial register stall cycles event:0xd4 counters:0,1 um:seg_regs minimum:500 name:SEG_RENAME_STALLS : Segment rename stalls event:0xd5 counters:0,1 um:seg_regs minimum:500 name:SEG_RENAMES : Segment renames event:0xdc counters:0,1 um:resource_stalls minimum:3000 name:RESOURCE_STALLS : Cycles during which resource stalls occur event:0xe0 counters:0,1 um:zero minimum:500 name:BR_INST_DECODED : number of branch instructions decoded event:0xe4 counters:0,1 um:zero minimum:500 name:BR_BOGUS : number of bogus branches event:0xe6 counters:0,1 um:zero minimum:500 name:BACLEARS : number of times BACLEAR is asserted event:0xf0 counters:0,1 um:zero minimum:3000 name:PREF_RQSTS_UP : Number of upward prefetches issued event:0xf8 counters:0,1 um:zero minimum:3000 name:PREF_RQSTS_DN : Number of downward prefetches issued oprofile-1.3.0/events/i386/core_2/unit_masks0000664000175000017500000001613012534404406015526 00000000000000# Core 2 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask #name:one type:mandatory default:0x1 # 0x1 No unit mask name:two type:mandatory default:0x2 0x2 No unit mask name:x0f type:mandatory default:0xf 0xf No unit mask name:x10 type:mandatory default:0x10 0x10 No unit mask #name:x20 type:mandatory default:0x20 # 0x20 No unit mask #name:x40 type:mandatory default:0x40 # 0x40 No unit mask name:x41 type:mandatory default:0x41 0x41 No unit mask name:x4f type:mandatory default:0x4f 0x4f No unit mask name:xc0 type:mandatory default:0xc0 0xc0 No unit mask name:nonhlt type:exclusive default:0x0 0x0 Unhalted core cycles 0x1 Unhalted bus cycles 0x2 Unhalted bus cycles of this core while the other core is halted name:mesi type:bitmask default:0x0f 0x08 (M)ESI: Modified 0x04 M(E)SI: Exclusive 0x02 ME(S)I: Shared 0x01 MES(I): Invalid name:sse_prefetch type:exclusive default:0x0 0x00 prefetch NTA instructions executed. 0x01 prefetch T1 instructions executed. 0x02 prefetch T1 and T2 instructions executed. 0x03 SSE weakly-ordered stores name:simd_instr_type_exec type:bitmask default:0x3f 0x01 SIMD packed multiplies 0x02 SIMD packed shifts 0x04 SIMD pack operations 0x08 SIMD unpack operations 0x10 SIMD packed logical 0x20 SIMD packed arithmetic 0x3f all of the above name:mmx_trans type:bitmask default:0x3 0x01 float->MMX transitions 0x02 MMX->float transitions name:sse_miss type:exclusive default:0x0 0x00 PREFETCHNTA 0x01 PREFETCHT0 0x02 PREFETCHT1/PREFETCHT2 name:load_block type:bitmask default:0x3e 0x02 extra: STA Loads blocked by a preceding store with unknown address. 0x04 extra: STD Loads blocked by a preceding store with unknown data. 0x08 extra: OVERLAP_STORE Loads that partially overlap an earlier store, or 4K aliased with a previous store. 0x10 extra: UNTIL_RETIRE Loads blocked until retirement. 0x20 extra: L1D Loads blocked by the L1 data cache. name:store_block type:bitmask default:0x0b 0x01 extra: SB_DRAIN_CYCLES Cycles while stores are blocked due to store buffer drain. 0x02 extra: ORDER Cycles while store is waiting for a preceding store to be globally observed. 0x08 extra: NOOP A store is blocked due to a conflict with an external or internal snoop. name:dtlb_miss type:bitmask default:0x0f 0x01 extra: ANY Memory accesses that missed the DTLB. 0x02 extra: MISS_LD DTLB misses due to load operations. 0x04 extra: L0_MISS_LD L0 DTLB misses due to load operations. 0x08 extra: MISS_ST TLB misses due to store operations. name:memory_dis type:exclusive default:0x01 0x01 extra: RESET Memory disambiguation reset cycles. 0x02 extra: SUCCESS Number of loads that were successfully disambiguated. name:page_walks type:exclusive default:0x02 0x01 extra: COUNT Number of page-walks executed. 0x02 extra: CYCLES Duration of page-walks in core cycles. name:delayed_bypass type:exclusive default:0x00 0x00 extra: FP Delayed bypass to FP operation. 0x01 extra: SIMD Delayed bypass to SIMD operation. 0x02 extra: LOAD Delayed bypass to load operation. name:core type:exclusive default:0x40 0xc0 All cores 0x40 This core name:core_prefetch type:bitmask default:0x70 0xc0 core: all cores 0x40 core: this core 0x30 prefetch: all inclusive 0x10 prefetch: Hardware prefetch only 0x00 prefetch: exclude hardware prefetch name:core_mesi type:bitmask default:0x4f 0xc0 core: all cores 0x40 core: this core 0x08 (M)ESI: Modified 0x04 M(E)SI: Exclusive 0x02 ME(S)I: Shared 0x01 MES(I): Invalid name:core_prefetch_mesi type:bitmask default:0x7f 0xc0 core: all cores 0x40 core: this core 0x30 prefetch: all inclusive 0x10 prefetch: Hardware prefetch only 0x00 prefetch: exclude hardware prefetch 0x08 (M)ESI: Modified 0x04 M(E)SI: Exclusive 0x02 ME(S)I: Shared 0x01 MES(I): Invalid name:l1d_split type:exclusive default:0x1 0x1 split loads 0x2 split stores name:bus_agents type:exclusive default:0x00 0x00 this agent 0x20 include all agents name:core_and_bus_agents type:bitmask default:0x40 0xc0 core: all cores 0x40 core: this core 0x00 bus: this agent 0x20 bus: include all agents name:bus_agents_and_snoop type:bitmask default:0x0b 0x00 bus: this agent 0x20 bus: include all agents 0x08 snoop: HITM snoops 0x02 snoop: HIT snoops 0x01 snoop: CLEAN snoops name:core_and_snoop type:bitmask default:0x40 0xc0 core: all cores 0x40 core: this core 0x01 snoop: CMP2I snoops 0x02 snoop: CMP2S snoops name:itlb_miss type:bitmask default:0x12 0x02 ITLB small page misses 0x10 ITLB large page misses 0x40 ITLB flushes name:macro_insts type:bitmask default:0x09 0x01 Instructions decoded 0x08 CISC Instructions decoded name:esp type:bitmask default:0x01 0x01 ESP register content synchronizations 0x02 ESP register automatic additions name:inst_retired type:bitmask default:0x00 0x00 extra: Any 0x01 extra: Loads 0x02 extra: Stores 0x04 extra: Other name:x87_ops_retired type:exclusive default:0xfe 0x01 FXCH instructions retired 0xfe Retired floating-point computational operations (precise) name:uops_retired type:bitmask default:0x0f 0x01 Fused load+op or load+indirect branch retired 0x02 Fused store address + data retired 0x04 Retired instruction pairs fused into one micro-op 0x07 Fused micro-ops retired 0x08 Non-fused micro-ops retired 0x0f Micro-ops retired name:machine_nukes type:bitmask default:0x05 0x01 Self-Modifying Code detected 0x04 Execution pipeline restart due to memory ordering conflict or memory disambiguation misprediction name:br_inst_retired type:bitmask default:0xa 0x01 predicted not-taken 0x02 mispredicted not-taken 0x04 predicted taken 0x08 mispredicted taken name:cycles_int_masked type:exclusive default:0x02 0x01 Interrupts disabled 0x02 Interrupts pending and disabled name:simd_inst_retired type:bitmask default:0x1f 0x01 Retired SSE packed-single instructions 0x02 Retired SSE scalar-single instructions 0x04 Retired SSE2 packed-double instructions 0x08 Retired SSE2 scalar-double instructions 0x10 Retired SSE2 vector integer instructions 0x1f Retired Streaming SIMD instructions (precise event) name:simd_comp_inst_retired type:bitmask default:0xf 0x01 Retired computational SSE packed-single instructions 0x02 Retired computational SSE scalar-single instructions 0x04 Retired computational SSE2 packed-double instructions 0x08 Retired computational SSE2 scalar-double instructions name:mem_load_retired type:exclusive default:0x01 0x01 Retired loads that miss the L1 data cache (precise event) 0x02 L1 data cache line missed by retired loads (precise event) 0x04 Retired loads that miss the L2 cache (precise event) 0x08 L2 cache line missed by retired loads (precise event) 0x10 Retired loads that miss the DTLB (precise event) name:rat_stalls type:bitmask default:0xf 0x01 ROB read port 0x02 Partial register 0x04 Flag 0x08 FPU status word 0x0f All RAT name:seg_regs type:bitmask default:0x0f 0x01 extra: ES 0x02 extra: DS 0x04 extra: FS 0x08 extra: GS name:resource_stalls type:bitmask default:0x0f 0x01 when the ROB is full 0x02 during which the RS is full 0x04 during which the pipeline has exceeded the load or store limit or is waiting to commit all stores 0x08 due to FPU control word write 0x10 due to branch misprediction oprofile-1.3.0/events/i386/athlon/0000775000175000017500000000000013323173530013617 500000000000000oprofile-1.3.0/events/i386/athlon/events0000664000175000017500000000527612534404406015002 00000000000000# Athlon Events # event:0x76 counters:0,1,2,3 um:zero minimum:3000 name:CPU_CLK_UNHALTED : Cycles outside of halt state event:0xc0 counters:0,1,2,3 um:zero minimum:3000 name:RETIRED_INSNS : Retired instructions (includes exceptions, interrupts, resyncs) event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_OPS : Retired Ops event:0x80 counters:0,1,2,3 um:zero minimum:500 name:ICACHE_FETCHES : Instruction cache fetches event:0x81 counters:0,1,2,3 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache misses event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses event:0x42 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_L2 : Data cache refills from L2 event:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_SYSTEM : Data cache refills from system event:0x44 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_WRITEBACKS : Data cache write backs event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCHES : Retired branches (conditional, unconditional, exceptions, interrupts) event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCHES_MISPREDICTED : Retired branches mispredicted event:0xc4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCHES : Retired taken branches event:0xc5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCHES_MISPREDICTED : Retired taken branches mispredicted event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISSES_L2_DTLD_HITS : L1 DTLB misses and L2 DTLB hits event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_AND_L2_DTLB_MISSES : L1 and L2 DTLB misses event:0x47 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_DATA_REFS : Misaligned data references event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISSES_L2_ITLB_HITS : L1 ITLB misses (and L2 ITLB hits) event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_AND_L2_ITLB_MISSES : L1 and L2 ITLB misses event:0xc6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired far control transfers event:0xc7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_RESYNC_BRANCHES : Retired resync branches (only non-control transfer branches counted) event:0xcd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED : Interrupts masked cycles (IF=0) event:0xce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_PENDING : Interrupts masked while pending cycles (INTR while IF=0) event:0xcf counters:0,1,2,3 um:zero minimum:10 name:HARDWARE_INTERRUPTS : Number of taken hardware interrupts # There are other events, but they were removed from the architecture manuals oprofile-1.3.0/events/i386/athlon/unit_masks0000664000175000017500000000043612534404406015644 00000000000000# Athlon possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask name:moesi type:bitmask default:0x1f 0x10 (M)odified cache state 0x08 (O)wner cache state 0x04 (E)xclusive cache state 0x02 (S)hared cache state 0x01 (I)nvalid cache state 0x1f All cache states oprofile-1.3.0/events/i386/silvermont/0000775000175000017500000000000013323173530014534 500000000000000oprofile-1.3.0/events/i386/silvermont/events0000664000175000017500000000256612534404406015716 00000000000000# # Intel "Silvermont" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Silvermont based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # include:i386/arch_perfmon event:0x03 counters:0,1 um:rehabq minimum:200003 name:rehabq : event:0x04 counters:0,1 um:mem_uops_retired minimum:200003 name:mem_uops_retired : event:0x05 counters:0,1 um:page_walks minimum:200003 name:page_walks : event:0x30 counters:0,1 um:zero minimum:200003 name:l2_reject_xq_all : event:0x31 counters:0,1 um:zero minimum:200003 name:core_reject_l2q_all : event:0x80 counters:0,1 um:icache minimum:200003 name:icache : event:0xc2 counters:0,1 um:uops_retired minimum:2000003 name:uops_retired : event:0xc3 counters:0,1 um:machine_clears minimum:200003 name:machine_clears : event:0xc4 counters:0,1 um:br_inst_retired minimum:200003 name:br_inst_retired : event:0xc5 counters:0,1 um:br_misp_retired minimum:200003 name:br_misp_retired : event:0xca counters:0,1 um:no_alloc_cycles minimum:200003 name:no_alloc_cycles : event:0xcb counters:0,1 um:rs_full_stall minimum:200003 name:rs_full_stall : event:0xcd counters:0,1 um:one minimum:2000003 name:cycles_div_busy_all : event:0xe6 counters:0,1 um:baclears minimum:200003 name:baclears : event:0xe7 counters:0,1 um:one minimum:200003 name:ms_decoded_ms_entry : oprofile-1.3.0/events/i386/silvermont/unit_masks0000664000175000017500000006335713124774026016600 00000000000000# # Unit masks for the Intel "Silvermont" micro architecture # # See http://ark.intel.com/ for help in identifying Silvermont based CPUs # include:i386/arch_perfmon name:rehabq type:exclusive default:ld_block_st_forward 0x1 extra: ld_block_st_forward This event counts the number of retired loads that were prohibited from receiving forwarded data from the store because of address mismatch. 0x1 extra:pebs ld_block_st_forward_pebs This event counts the number of retired loads that were prohibited from receiving forwarded data from the store because of address mismatch. 0x2 extra: ld_block_std_notready This event counts the cases where a forward was technically possible, but did not occur because the store data was not available at the right time 0x4 extra: st_splits This event counts the number of retire stores that experienced cache line boundary splits 0x8 extra: ld_splits This event counts the number of retire loads that experienced cache line boundary splits 0x8 extra:pebs ld_splits_pebs This event counts the number of retire loads that experienced cache line boundary splits 0x10 extra: lock This event counts the number of retired memory operations with lock semantics. These are either implicit locked instructions such as the XCHG instruction or instructions with an explicit LOCK prefix (0xF0). 0x20 extra: sta_full This event counts the number of retired stores that are delayed because there is not a store address buffer available. 0x40 extra: any_ld This event counts the number of load uops reissued from Rehabq 0x80 extra: any_st This event counts the number of store uops reissued from Rehabq name:mem_uops_retired type:exclusive default:0x1 0x1 extra: l1_miss_loads This event counts the number of load ops retired that miss in L1 Data cache. Note that prefetch misses will not be counted. 0x2 extra: l2_hit_loads This event counts the number of load ops retired that hit in the L2 0x2 extra:pebs l2_hit_loads_pebs This event counts the number of load ops retired that hit in the L2 0x4 extra: l2_miss_loads This event counts the number of load ops retired that miss in the L2 0x4 extra:pebs l2_miss_loads_pebs This event counts the number of load ops retired that miss in the L2 0x8 extra: dtlb_miss_loads This event counts the number of load ops retired that had DTLB miss. 0x8 extra:pebs dtlb_miss_loads_pebs This event counts the number of load ops retired that had DTLB miss. 0x10 extra: utlb_miss This event counts the number of load ops retired that had UTLB miss. 0x20 extra: hitm This event counts the number of load ops retired that got data from the other core or from the other module. 0x20 extra:pebs hitm_pebs This event counts the number of load ops retired that got data from the other core or from the other module. 0x40 extra: all_loads This event counts the number of load ops retired 0x80 extra: all_stores This event counts the number of store ops retired name:page_walks type:exclusive default:d_side_cycles 0x1 extra:edge d_side_walks This event counts when a data (D) page walk is completed or started. Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks. 0x1 extra: d_side_cycles This event counts every cycle when a D-side (walks due to a load) page walk is in progress. Page walk duration divided by number of page walks is the average duration of page-walks. 0x2 extra:edge i_side_walks This event counts when an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks. 0x2 extra: i_side_cycles This event counts every cycle when a I-side (walks due to an instruction fetch) page walk is in progress. Page walk duration divided by number of page walks is the average duration of page-walks. 0x3 extra:edge walks This event counts when a data (D) page walk or an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks. 0x3 extra: cycles This event counts every cycle when a data (D) page walk or instruction (I) page walk is in progress. Since a pagewalk implies a TLB miss, the approximate cost of a TLB miss can be determined from this event. name:icache type:exclusive default:0x3 0x3 extra: accesses This event counts all instruction fetches, including uncacheable fetches. 0x1 extra: hit This event counts all instruction fetches from the instruction cache. 0x2 extra: misses This event counts all instruction fetches that miss the Instruction cache or produce memory requests. This includes uncacheable fetches. An instruction fetch miss is counted only once and not once for every cycle it is outstanding. name:uops_retired type:exclusive default:0x10 0x10 extra: all This event counts the number of micro-ops retired. The processor decodes complex macro instructions into a sequence of simpler micro-ops. Most instructions are composed of one or two micro-ops. Some instructions are decoded into longer sequences such as repeat instructions, floating point transcendental instructions, and assists. In some cases micro-op sequences are fused or whole instructions are fused into one micro-op. See other UOPS_RETIRED events for differentiating retired fused and non-fused micro-ops. 0x1 extra: ms This event counts the number of micro-ops retired that were supplied from MSROM. name:machine_clears type:exclusive default:0x8 0x8 extra: all Machine clears happen when something happens in the machine that causes the hardware to need to take special care to get the right answer. When such a condition is signaled on an instruction, the front end of the machine is notified that it must restart, so no more instructions will be decoded from the current path. All instructions "older" than this one will be allowed to finish. This instruction and all "younger" instructions must be cleared, since they must not be allowed to complete. Essentially, the hardware waits until the problematic instruction is the oldest instruction in the machine. This means all older instructions are retired, and all pending stores (from older instructions) are completed. Then the new path of instructions from the front end are allowed to start into the machine. There are many conditions that might cause a machine clear (including the receipt of an interrupt, or a trap or a fault). All those conditions (including but not limited to MACHINE_CLEARS.MEMORY_ORDERING, MACHINE_CLEARS.SMC, and MACHINE_CLEARS.FP_ASSIST) are captured in the ANY event. In addition, some conditions can be specifically counted (i.e. SMC, MEMORY_ORDERING, FP_ASSIST). However, the sum of SMC, MEMORY_ORDERING, and FP_ASSIST machine clears will not necessarily equal the number of ANY. 0x1 extra: smc This event counts the number of times that a program writes to a code section. Self-modifying code causes a severe penalty in all Intel? architecture processors. 0x2 extra: memory_ordering This event counts the number of times that pipeline was cleared due to memory ordering issues. 0x4 extra: fp_assist This event counts the number of times that pipeline stalled due to FP operations needing assists. name:br_inst_retired type:exclusive default:jcc 0x7e extra: jcc JCC counts the number of conditional branch (JCC) instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0x7e extra:pebs jcc_pebs JCC counts the number of conditional branch (JCC) instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xfe extra: taken_jcc TAKEN_JCC counts the number of taken conditional branch (JCC) instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xfe extra:pebs taken_jcc_pebs TAKEN_JCC counts the number of taken conditional branch (JCC) instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xf9 extra: call CALL counts the number of near CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xf9 extra:pebs call_pebs CALL counts the number of near CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xfd extra: rel_call REL_CALL counts the number of near relative CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xfd extra:pebs rel_call_pebs REL_CALL counts the number of near relative CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xfb extra: ind_call IND_CALL counts the number of near indirect CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xfb extra:pebs ind_call_pebs IND_CALL counts the number of near indirect CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xf7 extra: return RETURN counts the number of near RET branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xf7 extra:pebs return_pebs RETURN counts the number of near RET branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xeb extra: non_return_ind NON_RETURN_IND counts the number of near indirect JMP and near indirect CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xeb extra:pebs non_return_ind_pebs NON_RETURN_IND counts the number of near indirect JMP and near indirect CALL branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xbf extra: far_branch FAR counts the number of far branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. 0xbf extra:pebs far_branch_pebs FAR counts the number of far branch instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns. name:br_misp_retired type:exclusive default:jcc 0x7e extra: jcc JCC counts the number of mispredicted conditional branches (JCC) instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0x7e extra:pebs jcc_pebs JCC counts the number of mispredicted conditional branches (JCC) instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xfe extra: taken_jcc TAKEN_JCC counts the number of mispredicted taken conditional branch (JCC) instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xfe extra:pebs taken_jcc_pebs TAKEN_JCC counts the number of mispredicted taken conditional branch (JCC) instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xfb extra: ind_call IND_CALL counts the number of mispredicted near indirect CALL branch instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xfb extra:pebs ind_call_pebs IND_CALL counts the number of mispredicted near indirect CALL branch instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xf7 extra: return RETURN counts the number of mispredicted near RET branch instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xf7 extra:pebs return_pebs RETURN counts the number of mispredicted near RET branch instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xeb extra: non_return_ind NON_RETURN_IND counts the number of mispredicted near indirect JMP and near indirect CALL branch instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. 0xeb extra:pebs non_return_ind_pebs NON_RETURN_IND counts the number of mispredicted near indirect JMP and near indirect CALL branch instructions retired. This event counts the number of retired branch instructions that were mispredicted by the processor, categorized by type. A branch misprediction occurs when the processor predicts that the branch would be taken, but it is not, or vice-versa. When the misprediction is discovered, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. name:no_alloc_cycles type:exclusive default:0x3f 0x3f extra: all The NO_ALLOC_CYCLES.ALL event counts the number of cycles when the front-end does not provide any instructions to be allocated for any reason. This event indicates the cycles where an allocation stalls occurs, and no UOPS are allocated in that cycle. 0x1 extra: rob_full Counts the number of cycles when no uops are allocated and the ROB is full (less than 2 entries available) 0x20 extra: rat_stall Counts the number of cycles when no uops are allocated and a RATstall is asserted. 0x50 extra: not_delivered The NO_ALLOC_CYCLES.NOT_DELIVERED event is used to measure front-end inefficiencies, i.e. when front-end of the machine is not delivering micro-ops to the back-end and the back-end is not stalled. This event can be used to identify if the machine is truly front-end bound. When this event occurs, it is an indication that the front-end of the machine is operating at less than its theoretical peak performance. Background: We can think of the processor pipeline as being divided into 2 broader parts: Front-end and Back-end. Front-end is responsible for fetching the instruction, decoding into micro-ops (uops) in machine understandable format and putting them into a micro-op queue to be consumed by back end. The back-end then takes these micro-ops, allocates the required resources. When all resources are ready, micro-ops are executed. If the back-end is not ready to accept micro-ops from the front-end, then we do not want to count these as front-end bottlenecks. However, whenever we have bottlenecks in the back-end, we will have allocation unit stalls and eventually forcing the front-end to wait until the back-end is ready to receive more UOPS. This event counts the cycles only when back-end is requesting more uops and front-end is not able to provide them. Some examples of conditions that cause front-end efficiencies are: Icache misses, ITLB misses, and decoder restrictions that limit the the front-end bandwidth. name:rs_full_stall type:exclusive default:0x1f 0x1f extra: all Counts the number of cycles the Alloc pipeline is stalled when any one of the RSs (IEC, FPC and MEC) is full. This event is a superset of all the individual RS stall event counts. 0x1 extra: mec Counts the number of cycles and allocation pipeline is stalled and is waiting for a free MEC reservation station entry. The cycles should be appropriately counted in case of the cracked ops e.g. In case of a cracked load-op, the load portion is sent to M name:baclears type:exclusive default:0x1 0x1 extra: all The BACLEARS event counts the number of times the front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction and this is corrected by the Branch Address Calculator at the front end. The BACLEARS.ANY event counts the number of baclears for any type of branch. 0x8 extra: return The BACLEARS event counts the number of times the front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction and this is corrected by the Branch Address Calculator at the front end. The BACLEARS.RETURN event counts the number of RETURN baclears. 0x10 extra: cond The BACLEARS event counts the number of times the front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction and this is corrected by the Branch Address Calculator at the front end. The BACLEARS.COND event counts the number of JCC (Jump on Condtional Code) baclears. oprofile-1.3.0/events/i386/westmere/0000775000175000017500000000000013323173530014165 500000000000000oprofile-1.3.0/events/i386/westmere/events0000664000175000017500000002200313124774026015337 00000000000000# # Intel "Westmere" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Westmere based CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # include:i386/arch_perfmon event:0x03 counters:0,1,2,3 um:x02 minimum:200000 name:LOAD_BLOCK : Loads that partially overlap an earlier store event:0x04 counters:0,1,2,3 um:x07 minimum:200000 name:SB_DRAIN : All Store buffer stall cycles event:0x05 counters:0,1,2,3 um:x02 minimum:200000 name:MISALIGN_MEM_REF : Misaligned store references event:0x06 counters:0,1,2,3 um:store_blocks minimum:200000 name:STORE_BLOCKS : Loads delayed with at-Retirement block code event:0x07 counters:0,1,2,3 um:x01 minimum:200000 name:PARTIAL_ADDRESS_ALIAS : False dependencies due to partial address aliasing event:0x08 counters:0,1,2,3 um:dtlb_load_misses minimum:200000 name:DTLB_LOAD_MISSES : DTLB load misses event:0x0b counters:0,1,2,3 um:mem_inst_retired minimum:2000000 name:MEM_INST_RETIRED : Memory instructions retired above 0 clocks (Precise Event) event:0x0c counters:0,1,2,3 um:x01 minimum:200000 name:MEM_STORE_RETIRED : Retired stores that miss the DTLB (Precise Event) event:0x0e counters:0,1,2,3 um:uops_issued minimum:2000000 name:UOPS_ISSUED : Uops issued event:0x0f counters:0,1,2,3 um:mem_uncore_retired minimum:40000 name:MEM_UNCORE_RETIRED : Load instructions retired that HIT modified data in sibling core (Precise Event) event:0x10 counters:0,1,2,3 um:fp_comp_ops_exe minimum:2000000 name:FP_COMP_OPS_EXE : MMX Uops event:0x12 counters:0,1,2,3 um:simd_int_128 minimum:200000 name:SIMD_INT_128 : 128 bit SIMD integer pack operations event:0x13 counters:0,1,2,3 um:load_dispatch minimum:2000000 name:LOAD_DISPATCH : All loads dispatched event:0x14 counters:0,1,2,3 um:arith minimum:2000000 name:ARITH : Cycles the divider is busy event:0x17 counters:0,1,2,3 um:x01 minimum:2000000 name:INST_QUEUE_WRITES : Instructions written to instruction queue. event:0x18 counters:0,1,2,3 um:x01 minimum:2000000 name:INST_DECODED : Instructions that must be decoded by decoder 0 event:0x19 counters:0,1,2,3 um:x01 minimum:2000000 name:TWO_UOP_INSTS_DECODED : Two Uop instructions decoded event:0x1e counters:0,1,2,3 um:x01 minimum:2000000 name:INST_QUEUE_WRITE_CYCLES : Cycles instructions are written to the instruction queue event:0x20 counters:0,1,2,3 um:x01 minimum:2000000 name:LSD_OVERFLOW : Loops that can't stream from the instruction queue event:0x24 counters:0,1,2,3 um:l2_rqsts minimum:200000 name:L2_RQSTS : L2 instruction fetch hits event:0x26 counters:0,1,2,3 um:l2_data_rqsts minimum:200000 name:L2_DATA_RQSTS : All L2 data requests event:0x27 counters:0,1,2,3 um:l2_write minimum:100000 name:L2_WRITE : L2 demand lock RFOs in E state event:0x28 counters:0,1,2,3 um:l1d_wb_l2 minimum:100000 name:L1D_WB_L2 : L1 writebacks to L2 in E state event:0x2e counters:0,1,2,3 um:longest_lat_cache minimum:100000 name:LONGEST_LAT_CACHE : Longest latency cache miss event:0x3c counters:0,1,2,3 um:cpu_clk_unhalted minimum:100000 name:CPU_CLK_UNHALTED : Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter) event:0x49 counters:0,1,2,3 um:dtlb_misses minimum:200000 name:DTLB_MISSES : DTLB misses event:0x4c counters:0,1 um:x01 minimum:200000 name:LOAD_HIT_PRE : Load operations conflicting with software prefetches event:0x4e counters:0,1 um:l1d_prefetch minimum:200000 name:L1D_PREFETCH : L1D hardware prefetch misses event:0x4f counters:0,1,2,3 um:x10 minimum:2000000 name:EPT : Extended Page Table walk cycles event:0x51 counters:0,1 um:l1d minimum:2000000 name:L1D : L1D cache lines replaced in M state event:0x52 counters:0,1 um:x01 minimum:2000000 name:L1D_CACHE_PREFETCH_LOCK_FB_HIT : L1D prefetch load lock accepted in fill buffer event:0x60 counters:0 um:offcore_requests_outstanding minimum:2000000 name:OFFCORE_REQUESTS_OUTSTANDING : Outstanding offcore reads event:0x63 counters:0,1 um:cache_lock_cycles minimum:2000000 name:CACHE_LOCK_CYCLES : Cycles L1D locked event:0x6c counters:0,1,2,3 um:x01 minimum:2000000 name:IO_TRANSACTIONS : I/O transactions event:0x80 counters:0,1,2,3 um:l1i minimum:2000000 name:L1I : L1I instruction fetch stall cycles event:0x82 counters:0,1,2,3 um:x01 minimum:200000 name:LARGE_ITLB : Large ITLB hit event:0x85 counters:0,1,2,3 um:itlb_misses minimum:200000 name:ITLB_MISSES : ITLB miss event:0x87 counters:0,1,2,3 um:ild_stall minimum:2000000 name:ILD_STALL : Any Instruction Length Decoder stall cycles event:0x88 counters:0,1,2,3 um:br_inst_exec minimum:200000 name:BR_INST_EXEC : Branch instructions executed event:0x89 counters:0,1,2,3 um:br_misp_exec minimum:20000 name:BR_MISP_EXEC : Mispredicted branches executed event:0xa2 counters:0,1,2,3 um:resource_stalls minimum:2000000 name:RESOURCE_STALLS : Resource related stall cycles event:0xa6 counters:0,1,2,3 um:x01 minimum:2000000 name:MACRO_INSTS_FUSED : Macro-fused instructions decoded event:0xa7 counters:0,1,2,3 um:x01 minimum:2000000 name:BACLEAR_FORCE_IQ : Instruction queue forced BACLEAR event:0xa8 counters:0,1,2,3 um:x01 minimum:2000000 name:LSD : Cycles when uops were delivered by the LSD event:0xae counters:0,1,2,3 um:x01 minimum:2000000 name:ITLB_FLUSH : ITLB flushes event:0xb0 counters:0,1,2,3 um:offcore_requests minimum:100000 name:OFFCORE_REQUESTS : All offcore requests event:0xb1 counters:0,1,2,3 um:uops_executed minimum:2000000 name:UOPS_EXECUTED : Cycles Uops executed on any port (core count) event:0xb2 counters:0,1,2,3 um:x01 minimum:100000 name:OFFCORE_REQUESTS_SQ_FULL : Offcore requests blocked due to Super Queue full event:0xb3 counters:0 um:snoopq_requests_outstanding minimum:2000000 name:SNOOPQ_REQUESTS_OUTSTANDING : Outstanding snoop code requests event:0xb4 counters:0,1,2,3 um:snoopq_requests minimum:100000 name:SNOOPQ_REQUESTS : Snoop code requests event:0xb7 counters:2 um:x01 minimum:100000 name:OFFCORE_RESPONSE_ANY_DATA_0 : REQUEST = ANY_DATA read and RESPONSE = ANY_CACHE_DRAM event:0xb8 counters:0,1,2,3 um:snoop_response minimum:100000 name:SNOOP_RESPONSE : Thread responded HIT to snoop event:0xbb counters:1 um:x01 minimum:100000 name:OFFCORE_RESPONSE_ANY_DATA_1 : REQUEST = ANY_DATA read and RESPONSE = ANY_CACHE_DRAM event:0xc0 counters:0,1,2,3 um:inst_retired minimum:2000000 name:INST_RETIRED : Instructions retired (Programmable counter and Precise Event) event:0xc2 counters:0,1,2,3 um:uops_retired minimum:2000000 name:UOPS_RETIRED : Cycles Uops are being retired event:0xc3 counters:0,1,2,3 um:machine_clears minimum:20000 name:MACHINE_CLEARS : Cycles machine clear asserted event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:200000 name:BR_INST_RETIRED : Retired branch instructions (Precise Event) event:0xc5 counters:0,1,2,3 um:br_misp_retired minimum:20000 name:BR_MISP_RETIRED : Mispredicted retired branch instructions (Precise Event) event:0xc7 counters:0,1,2,3 um:ssex_uops_retired minimum:200000 name:SSEX_UOPS_RETIRED : SIMD Packed-Double Uops retired (Precise Event) event:0xc8 counters:0,1,2,3 um:x20 minimum:200000 name:ITLB_MISS_RETIRED : Retired instructions that missed the ITLB (Precise Event) event:0xcb counters:0,1,2,3 um:mem_load_retired minimum:200000 name:MEM_LOAD_RETIRED : Retired loads that miss the DTLB (Precise Event) event:0xcc counters:0,1,2,3 um:fp_mmx_trans minimum:2000000 name:FP_MMX_TRANS : All Floating Point to and from MMX transitions event:0xd0 counters:0,1,2,3 um:x01 minimum:2000000 name:MACRO_INSTS : Instructions decoded event:0xd1 counters:0,1,2,3 um:uops_decoded minimum:2000000 name:UOPS_DECODED : Stack pointer instructions decoded event:0xd2 counters:0,1,2,3 um:rat_stalls minimum:2000000 name:RAT_STALLS : All RAT stall cycles event:0xd4 counters:0,1,2,3 um:x01 minimum:2000000 name:SEG_RENAME_STALLS : Segment rename stall cycles event:0xd5 counters:0,1,2,3 um:x01 minimum:2000000 name:ES_REG_RENAMES : ES segment renames event:0xdb counters:0,1,2,3 um:x01 minimum:2000000 name:UOP_UNFUSION : Uop unfusions due to FP exceptions event:0xe0 counters:0,1,2,3 um:x01 minimum:2000000 name:BR_INST_DECODED : Branch instructions decoded event:0xe5 counters:0,1,2,3 um:x01 minimum:2000000 name:BPU_MISSED_CALL_RET : Branch prediction unit missed call or return event:0xe6 counters:0,1,2,3 um:baclear minimum:2000000 name:BACLEAR : BACLEAR asserted with bad target address event:0xe8 counters:0,1,2,3 um:bpu_clears minimum:2000000 name:BPU_CLEARS : Early Branch Prediction Unit clears event:0xf0 counters:0,1,2,3 um:l2_transactions minimum:200000 name:L2_TRANSACTIONS : All L2 transactions event:0xf1 counters:0,1,2,3 um:l2_lines_in minimum:100000 name:L2_LINES_IN : L2 lines alloacated event:0xf2 counters:0,1,2,3 um:l2_lines_out minimum:100000 name:L2_LINES_OUT : L2 lines evicted event:0xf4 counters:0,1,2,3 um:sq_misc minimum:2000000 name:SQ_MISC : Super Queue LRU hints sent to LLC event:0xf6 counters:0,1,2,3 um:x01 minimum:2000000 name:SQ_FULL_STALL_CYCLES : Super Queue full stall cycles event:0xf7 counters:0,1,2,3 um:fp_assist minimum:20000 name:FP_ASSIST : X87 Floating point assists (Precise Event) event:0xfd counters:0,1,2,3 um:simd_int_64 minimum:200000 name:SIMD_INT_64 : SIMD integer 64 bit pack operations oprofile-1.3.0/events/i386/westmere/unit_masks0000664000175000017500000004031212534404406016207 00000000000000# # Unit masks for the Intel "Westmere" micro architecture # # See http://ark.intel.com/ for help in identifying Westmere based CPUs # include:i386/arch_perfmon name:x01 type:mandatory default:0x01 0x01 No unit mask name:x02 type:mandatory default:0x02 0x02 No unit mask name:x07 type:mandatory default:0x07 0x07 No unit mask name:x10 type:mandatory default:0x10 0x10 No unit mask name:x20 type:mandatory default:0x20 0x20 No unit mask name:arith type:bitmask default:0x01 0x01 extra: cycles_div_busy Cycles the divider is busy 0x02 extra: mul Multiply operations executed name:baclear type:bitmask default:0x01 0x01 extra: clear BACLEAR asserted, regardless of cause 0x02 extra: bad_target BACLEAR asserted with bad target address name:bpu_clears type:bitmask default:0x01 0x01 extra: early Early Branch Prediction Unit clears 0x02 extra: late Late Branch Prediction Unit clears name:br_inst_exec type:bitmask default:0x7f 0x01 extra: cond Conditional branch instructions executed 0x02 extra: direct Unconditional branches executed 0x04 extra: indirect_non_call Indirect non call branches executed 0x07 extra: non_calls All non call branches executed 0x08 extra: return_near Indirect return branches executed 0x10 extra: direct_near_call Unconditional call branches executed 0x20 extra: indirect_near_call Indirect call branches executed 0x30 extra: near_calls Call branches executed 0x40 extra: taken Taken branches executed 0x7f extra: any Branch instructions executed name:br_inst_retired type:bitmask default:0x04 0x01 extra: conditional Retired conditional branch instructions (Precise Event) 0x02 extra: near_call Retired near call instructions (Precise Event) 0x04 extra: all_branches Retired branch instructions (Precise Event) name:br_misp_exec type:bitmask default:0x7f 0x01 extra: cond Mispredicted conditional branches executed 0x02 extra: direct Mispredicted unconditional branches executed 0x04 extra: indirect_non_call Mispredicted indirect non call branches executed 0x07 extra: non_calls Mispredicted non call branches executed 0x08 extra: return_near Mispredicted return branches executed 0x10 extra: direct_near_call Mispredicted non call branches executed 0x20 extra: indirect_near_call Mispredicted indirect call branches executed 0x30 extra: near_calls Mispredicted call branches executed 0x40 extra: taken Mispredicted taken branches executed 0x7f extra: any Mispredicted branches executed name:br_misp_retired type:bitmask default:0x04 0x01 extra: conditional Mispredicted conditional retired branches (Precise Event) 0x02 extra: near_call Mispredicted near retired calls (Precise Event) 0x04 extra: all_branches Mispredicted retired branch instructions (Precise Event) name:cache_lock_cycles type:bitmask default:0x01 0x01 extra: l1d_l2 Cycles L1D and L2 locked 0x02 extra: l1d Cycles L1D locked name:cpu_clk_unhalted type:bitmask default:0x00 0x00 extra: thread_p Cycles when thread is not halted (programmable counter) 0x01 extra: ref_p Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter) name:dtlb_load_misses type:bitmask default:0x01 0x01 extra: any DTLB load misses 0x02 extra: walk_completed DTLB load miss page walks complete 0x04 extra: walk_cycles DTLB load miss page walk cycles 0x10 extra: stlb_hit DTLB second level hit 0x20 extra: pde_miss DTLB load miss caused by low part of address 0x80 extra: large_walk_completed DTLB load miss large page walks name:dtlb_misses type:bitmask default:0x01 0x01 extra: any DTLB misses 0x02 extra: walk_completed DTLB miss page walks 0x04 extra: walk_cycles DTLB miss page walk cycles 0x10 extra: stlb_hit DTLB first level misses but second level hit 0x20 extra: pde_miss DTLB misses casued by low part of address 0x80 extra: large_walk_completed DTLB miss large page walks name:fp_assist type:bitmask default:0x01 0x01 extra: all X87 Floating point assists (Precise Event) 0x02 extra: output X87 Floating point assists for invalid output value (Precise Event) 0x04 extra: input X87 Floating poiint assists for invalid input value (Precise Event) name:fp_comp_ops_exe type:bitmask default:0x01 0x01 extra: x87 Computational floating-point operations executed 0x02 extra: mmx MMX Uops 0x04 extra: sse_fp SSE and SSE2 FP Uops 0x08 extra: sse2_integer SSE2 integer Uops 0x10 extra: sse_fp_packed SSE FP packed Uops 0x20 extra: sse_fp_scalar SSE FP scalar Uops 0x40 extra: sse_single_precision SSE* FP single precision Uops 0x80 extra: sse_double_precision SSE* FP double precision Uops name:fp_mmx_trans type:bitmask default:0x03 0x01 extra: to_fp Transitions from MMX to Floating Point instructions 0x02 extra: to_mmx Transitions from Floating Point to MMX instructions 0x03 extra: any All Floating Point to and from MMX transitions name:ild_stall type:bitmask default:0x0f 0x01 extra: lcp Length Change Prefix stall cycles 0x02 extra: mru Stall cycles due to BPU MRU bypass 0x04 extra: iq_full Instruction Queue full stall cycles 0x08 extra: regen Regen stall cycles 0x0f extra: any Any Instruction Length Decoder stall cycles name:inst_retired type:bitmask default:0x01 0x01 extra: any_p Instructions retired (Programmable counter and Precise Event) 0x02 extra: x87 Retired floating-point operations (Precise Event) 0x04 extra: mmx Retired MMX instructions (Precise Event) name:itlb_misses type:bitmask default:0x01 0x01 extra: any ITLB miss 0x02 extra: walk_completed ITLB miss page walks 0x04 extra: walk_cycles ITLB miss page walk cycles 0x80 extra: large_walk_completed ITLB miss large page walks name:l1d type:bitmask default:0x01 0x01 extra: repl L1 data cache lines allocated 0x02 extra: m_repl L1D cache lines allocated in the M state 0x04 extra: m_evict L1D cache lines replaced in M state 0x08 extra: m_snoop_evict L1D snoop eviction of cache lines in M state name:l1d_prefetch type:bitmask default:0x01 0x01 extra: requests L1D hardware prefetch requests 0x02 extra: miss L1D hardware prefetch misses 0x04 extra: triggers L1D hardware prefetch requests triggered name:l1d_wb_l2 type:bitmask default:0x0f 0x01 extra: i_state L1 writebacks to L2 in I state (misses) 0x02 extra: s_state L1 writebacks to L2 in S state 0x04 extra: e_state L1 writebacks to L2 in E state 0x08 extra: m_state L1 writebacks to L2 in M state 0x0f extra: mesi All L1 writebacks to L2 name:l1i type:bitmask default:0x01 0x01 extra: hits L1I instruction fetch hits 0x02 extra: misses L1I instruction fetch misses 0x03 extra: reads L1I Instruction fetches 0x04 extra: cycles_stalled L1I instruction fetch stall cycles name:l2_data_rqsts type:bitmask default:0xff 0x01 extra: demand_i_state L2 data demand loads in I state (misses) 0x02 extra: demand_s_state L2 data demand loads in S state 0x04 extra: demand_e_state L2 data demand loads in E state 0x08 extra: demand_m_state L2 data demand loads in M state 0x0f extra: demand_mesi L2 data demand requests 0x10 extra: prefetch_i_state L2 data prefetches in the I state (misses) 0x20 extra: prefetch_s_state L2 data prefetches in the S state 0x40 extra: prefetch_e_state L2 data prefetches in E state 0x80 extra: prefetch_m_state L2 data prefetches in M state 0xf0 extra: prefetch_mesi All L2 data prefetches 0xff extra: any All L2 data requests name:l2_lines_in type:bitmask default:0x07 0x02 extra: s_state L2 lines allocated in the S state 0x04 extra: e_state L2 lines allocated in the E state 0x07 extra: any L2 lines alloacated name:l2_lines_out type:bitmask default:0x0f 0x01 extra: demand_clean L2 lines evicted by a demand request 0x02 extra: demand_dirty L2 modified lines evicted by a demand request 0x04 extra: prefetch_clean L2 lines evicted by a prefetch request 0x08 extra: prefetch_dirty L2 modified lines evicted by a prefetch request 0x0f extra: any L2 lines evicted name:l2_rqsts type:bitmask default:0x01 0x01 extra: ld_hit L2 load hits 0x02 extra: ld_miss L2 load misses 0x03 extra: loads L2 requests 0x04 extra: rfo_hit L2 RFO hits 0x08 extra: rfo_miss L2 RFO misses 0x0c extra: rfos L2 RFO requests 0x10 extra: ifetch_hit L2 instruction fetch hits 0x20 extra: ifetch_miss L2 instruction fetch misses 0x30 extra: ifetches L2 instruction fetches 0x40 extra: prefetch_hit L2 prefetch hits 0x80 extra: prefetch_miss L2 prefetch misses 0xaa extra: miss All L2 misses 0xc0 extra: prefetches All L2 prefetches 0xff extra: references All L2 requests name:l2_transactions type:bitmask default:0x80 0x01 extra: load L2 Load transactions 0x02 extra: rfo L2 RFO transactions 0x04 extra: ifetch L2 instruction fetch transactions 0x08 extra: prefetch L2 prefetch transactions 0x10 extra: l1d_wb L1D writeback to L2 transactions 0x20 extra: fill L2 fill transactions 0x40 extra: wb L2 writeback to LLC transactions 0x80 extra: any All L2 transactions name:l2_write type:bitmask default:0x01 0x01 extra: rfo_i_state L2 demand store RFOs in I state (misses) 0x02 extra: rfo_s_state L2 demand store RFOs in S state 0x08 extra: rfo_m_state L2 demand store RFOs in M state 0x0e extra: rfo_hit All L2 demand store RFOs that hit the cache 0x0f extra: rfo_mesi All L2 demand store RFOs 0x10 extra: lock_i_state L2 demand lock RFOs in I state (misses) 0x20 extra: lock_s_state L2 demand lock RFOs in S state 0x40 extra: lock_e_state L2 demand lock RFOs in E state 0x80 extra: lock_m_state L2 demand lock RFOs in M state 0xe0 extra: lock_hit All demand L2 lock RFOs that hit the cache 0xf0 extra: lock_mesi All demand L2 lock RFOs name:load_dispatch type:bitmask default:0x07 0x01 extra: rs Loads dispatched that bypass the MOB 0x02 extra: rs_delayed Loads dispatched from stage 305 0x04 extra: mob Loads dispatched from the MOB 0x07 extra: any All loads dispatched name:longest_lat_cache type:bitmask default:0x01 0x01 extra: miss Longest latency cache miss 0x02 extra: reference Longest latency cache reference name:machine_clears type:bitmask default:0x01 0x01 extra: cycles Cycles machine clear asserted 0x02 extra: mem_order Execution pipeline restart due to Memory ordering conflicts 0x04 extra: smc Self-Modifying Code detected name:mem_inst_retired type:bitmask default:0x01 0x01 extra: loads Instructions retired which contains a load (Precise Event) 0x02 extra: stores Instructions retired which contains a store (Precise Event) name:mem_load_retired type:bitmask default:0x01 0x01 extra: l1d_hit Retired loads that hit the L1 data cache (Precise Event) 0x02 extra: l2_hit Retired loads that hit the L2 cache (Precise Event) 0x04 extra: llc_unshared_hit Retired loads that hit valid versions in the LLC cache (Precise Event) 0x08 extra: other_core_l2_hit_hitm Retired loads that hit sibling core's L2 in modified or unmodified states (Precise Event) 0x10 extra: llc_miss Retired loads that miss the LLC cache (Precise Event) 0x40 extra: hit_lfb Retired loads that miss L1D and hit an previously allocated LFB (Precise Event) 0x80 extra: dtlb_miss Retired loads that miss the DTLB (Precise Event) name:mem_uncore_retired type:bitmask default:0x02 0x02 extra: local_hitm Load instructions retired that HIT modified data in sibling core (Precise Event) 0x04 extra: remote_hitm Retired loads that hit remote socket in modified state (Precise Event) 0x08 extra: local_dram_and_remote_cache_hit Load instructions retired local dram and remote cache HIT data sources (Precise Event) 0x10 extra: remote_dram Load instructions retired remote DRAM and remote home-remote cache HITM (Precise Event) 0x80 extra: uncacheable Load instructions retired IO (Precise Event) name:offcore_requests type:bitmask default:0x80 0x01 extra: demand_read_data Offcore demand data read requests 0x02 extra: demand_read_code Offcore demand code read requests 0x04 extra: demand_rfo Offcore demand RFO requests 0x08 extra: any_read Offcore read requests 0x10 extra: any_rfo Offcore RFO requests 0x40 extra: l1d_writeback Offcore L1 data cache writebacks 0x80 extra: any All offcore requests name:offcore_requests_outstanding type:bitmask default:0x08 0x01 extra: demand_read_data Outstanding offcore demand data reads 0x02 extra: demand_read_code Outstanding offcore demand code reads 0x04 extra: demand_rfo Outstanding offcore demand RFOs 0x08 extra: any_read Outstanding offcore reads name:rat_stalls type:bitmask default:0x0f 0x01 extra: flags Flag stall cycles 0x02 extra: registers Partial register stall cycles 0x04 extra: rob_read_port ROB read port stalls cycles 0x08 extra: scoreboard Scoreboard stall cycles 0x0f extra: any All RAT stall cycles name:resource_stalls type:bitmask default:0x01 0x01 extra: any Resource related stall cycles 0x02 extra: load Load buffer stall cycles 0x04 extra: rs_full Reservation Station full stall cycles 0x08 extra: store Store buffer stall cycles 0x10 extra: rob_full ROB full stall cycles 0x20 extra: fpcw FPU control word write stall cycles 0x40 extra: mxcsr MXCSR rename stall cycles 0x80 extra: other Other Resource related stall cycles name:simd_int_128 type:bitmask default:0x01 0x01 extra: packed_mpy 128 bit SIMD integer multiply operations 0x02 extra: packed_shift 128 bit SIMD integer shift operations 0x04 extra: pack 128 bit SIMD integer pack operations 0x08 extra: unpack 128 bit SIMD integer unpack operations 0x10 extra: packed_logical 128 bit SIMD integer logical operations 0x20 extra: packed_arith 128 bit SIMD integer arithmetic operations 0x40 extra: shuffle_move 128 bit SIMD integer shuffle/move operations name:simd_int_64 type:bitmask default:0x01 0x01 extra: packed_mpy SIMD integer 64 bit packed multiply operations 0x02 extra: packed_shift SIMD integer 64 bit shift operations 0x04 extra: pack SIMD integer 64 bit pack operations 0x08 extra: unpack SIMD integer 64 bit unpack operations 0x10 extra: packed_logical SIMD integer 64 bit logical operations 0x20 extra: packed_arith SIMD integer 64 bit arithmetic operations 0x40 extra: shuffle_move SIMD integer 64 bit shuffle/move operations name:snoopq_requests type:bitmask default:0x01 0x01 extra: data Snoop data requests 0x02 extra: invalidate Snoop invalidate requests 0x04 extra: code Snoop code requests name:snoopq_requests_outstanding type:bitmask default:0x01 0x01 extra: data Outstanding snoop data requests 0x02 extra: invalidate Outstanding snoop invalidate requests 0x04 extra: code Outstanding snoop code requests name:snoop_response type:bitmask default:0x01 0x01 extra: hit Thread responded HIT to snoop 0x02 extra: hite Thread responded HITE to snoop 0x04 extra: hitm Thread responded HITM to snoop name:sq_misc type:bitmask default:0x04 0x04 extra: lru_hints Super Queue LRU hints sent to LLC 0x10 extra: split_lock Super Queue lock splits across a cache line name:ssex_uops_retired type:bitmask default:0x01 0x01 extra: packed_single SIMD Packed-Single Uops retired (Precise Event) 0x02 extra: scalar_single SIMD Scalar-Single Uops retired (Precise Event) 0x04 extra: packed_double SIMD Packed-Double Uops retired (Precise Event) 0x08 extra: scalar_double SIMD Scalar-Double Uops retired (Precise Event) 0x10 extra: vector_integer SIMD Vector Integer Uops retired (Precise Event) name:store_blocks type:bitmask default:0x04 0x04 extra: at_ret Loads delayed with at-Retirement block code 0x08 extra: l1d_block Cacheable loads delayed with L1D block code name:uops_decoded type:bitmask default:0x01 0x01 extra: stall_cycles Cycles no Uops are decoded 0x02 extra: ms_cycles_active Uops decoded by Microcode Sequencer 0x04 extra: esp_folding Stack pointer instructions decoded 0x08 extra: esp_sync Stack pointer sync operations name:uops_executed type:bitmask default:0x3f 0x01 extra: port0 Uops executed on port 0 0x02 extra: port1 Uops executed on port 1 0x04 extra: port2_core Uops executed on port 2 (core count) 0x08 extra: port3_core Uops executed on port 3 (core count) 0x10 extra: port4_core Uops executed on port 4 (core count) 0x1f extra: core_active_cycles_no_port5 Cycles Uops executed on ports 0-4 (core count) 0x20 extra: port5 Uops executed on port 5 0x3f extra: core_active_cycles Cycles Uops executed on any port (core count) 0x40 extra: port015 Uops issued on ports 0, 1 or 5 0x80 extra: port234_core Uops issued on ports 2, 3 or 4 name:uops_issued type:bitmask default:0x01 0x01 extra: any Uops issued 0x02 extra: fused Fused Uops issued name:uops_retired type:bitmask default:0x01 0x01 extra: active_cycles Cycles Uops are being retired 0x02 extra: retire_slots Retirement slots used (Precise Event) 0x04 extra: macro_fused Macro-fused Uops retired (Precise Event) oprofile-1.3.0/events/i386/nehalem/0000775000175000017500000000000013323173530013743 500000000000000oprofile-1.3.0/events/i386/nehalem/events0000664000175000017500000003627013124774026015130 00000000000000# # Intel "Nehalem" microarchitecture (Core i7; Xeon 75xx etc.) core events # the uncore (memory controller/QPI) events are in separate files because # they vary between implementations (right now they are not implemented # in oprofile) # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # #event:0x3c counters:0,1,2,3 um:zero minimum:6000 name:CPU_CLK_UNHALTED : Clock cycles when not halted event:0x3c counters:0,1,2,3 um:one minimum:6000 name:UNHALTED_REFERENCE_CYCLES : Unhalted reference cycles event:0x2e counters:0,1,2,3 um:x41 minimum:6000 name:LLC_MISSES : Last level cache demand requests from this core that missed the LLC event:0x2e counters:0,1,2,3 um:x4f minimum:6000 name:LLC_REFS : Last level cache demand requests from this core event:0xc0 counters:0,1,2,3 um:inst_retired minimum:6000 name:INST_RETIRED : number of instructions retired event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1,2,3 um:br_misp_retired minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise) # event:0x02 counters:0,1,2,3 um:sb_forward minimum:6000 name:SB_FORWARD : Counts the number of store forwards. event:0x03 counters:0,1,2,3 um:load_block minimum:6000 name:LOAD_BLOCK : Counts the number of loads blocked event:0x04 counters:0,1,2,3 um:sb_drain minimum:6000 name:SB_DRAIN : Counts the cycles of store buffer drains. event:0x05 counters:0,1,2,3 um:misalign_mem_ref minimum:6000 name:MISALIGN_MEM_REF : Counts the number of misaligned load references event:0x06 counters:0,1,2,3 um:store_blocks minimum:6000 name:STORE_BLOCKS : This event counts the number of load operations delayed caused by preceding stores. event:0x07 counters:0,1,2,3 um:one minimum:6000 name:PARTIAL_ADDRESS_ALIAS : Counts false dependency due to partial address aliasing event:0x08 counters:0,1,2,3 um:dtlb_load_misses minimum:6000 name:DTLB_LOAD_MISSES : Counts dtlb page walks event:0x09 counters:0,1,2,3 um:memory_disambiguration minimum:6000 name:MEMORY_DISAMBIGURATION : Counts memory disambiguration events event:0x0B counters:0,1,2,3 um:mem_inst_retired minimum:6000 name:MEM_INST_RETIRED : Counts the number of instructions with an architecturally-visible load/store retired on the architected path. event:0x0C counters:0,1,2,3 um:mem_store_retired minimum:6000 name:MEM_STORE_RETIRED : The event counts the number of retired stores that missed the DTLB. The DTLB miss is not counted if the store operation causes a fault. Does not count prefetches. Counts both primary and secondary misses to the TLB event:0x0E counters:0,1,2,3 um:uops_issued minimum:6000 name:UOPS_ISSUED : Counts the number of Uops issued by the Register Allocation Table to the Reservation Station, i.e. the UOPs issued from the front end to the back end. event:0x0F counters:0,1,2,3 um:mem_uncore_retired minimum:6000 name:MEM_UNCORE_RETIRED : Counts number of memory load instructions retired where the memory reference hit modified data in another core event:0x10 counters:0,1,2,3 um:fp_comp_ops_exe minimum:6000 name:FP_COMP_OPS_EXE : Counts the number of FP Computational Uops Executed. event:0x12 counters:0,1,2,3 um:simd_int_128 minimum:6000 name:SIMD_INT_128 : Counts number of 128 bit SIMD integer operations. event:0x13 counters:0,1,2,3 um:load_dispatch minimum:6000 name:LOAD_DISPATCH : Counts number of loads dispatched from the Reservation Station that bypass. event:0x14 counters:0,1,2,3 um:arith minimum:6000 name:ARITH : Counts division cycles and number of multiplies. Includes integer and FP, but excludes DPPS/MPSAD. event:0x17 counters:0,1,2,3 um:one minimum:6000 name:INST_QUEUE_WRITES : Counts the number of instructions written into the instruction queue every cycle. event:0x18 counters:0,1,2,3 um:inst_decoded minimum:6000 name:INST_DECODED : Counts number of instructions that require decoder 0 to be decoded. Usually, this means that the instruction maps to more than 1 uop event:0x19 counters:0,1,2,3 um:one minimum:6000 name:TWO_UOP_INSTS_DECODED : An instruction that generates two uops was decoded event:0x1D counters:0,1,2,3 um:hw_int minimum:100 name:HW_INT : Counts hardware interrupt events. event:0x1E counters:0,1,2,3 um:one minimum:6000 name:INST_QUEUE_WRITE_CYCLES : This event counts the number of cycles during which instructions are written to the instruction queue. Dividing this counter by the number of instructions written to the instruction queue (INST_QUEUE_WRITES) yields the average number of instructions decoded each cycle. If this number is less than four and the pipe stalls, this indicates that the decoder is failing to decode enough instructions per cycle to sustain the 4-wide pipeline. event:0x24 counters:0,1,2,3 um:l2_rqsts minimum:500 name:L2_RQSTS : Counts number of L2 data loads event:0x26 counters:0,1,2,3 um:l2_data_rqsts minimum:500 name:L2_DATA_RQSTS : More L2 data loads. event:0x27 counters:0,1,2,3 um:l2_write minimum:500 name:L2_WRITE : Counts number of L2 writes event:0x28 counters:0,1,2,3 um:l1d_wb_l2 minimum:500 name:L1D_WB_L2 : Counts number of L1 writebacks to the L2. event:0x2E counters:0,1,2,3 um:longest_lat_cache minimum:6000 name:LONGEST_LAT_CACHE : Count LLC cache reference latencies. event:0x3C counters:0,1,2,3 um:cpu_clk_unhalted minimum:6000 name:CPU_CLK_UNHALTED : Counts the number of thread cycles while the thread is not in a halt state. event:0x3D counters:0,1,2,3 um:one minimum:6000 name:UOPS_DECODED_DEC0 : Counts micro-ops decoded by decoder 0. event:0x40 counters:0,1 um:l1d_cache_ld minimum:6000 name:L1D_CACHE_LD : Counts L1 data cache read requests. event:0x41 counters:0,1 um:l1d_cache_st minimum:6000 name:L1D_CACHE_ST : Counts L1 data cache stores. event:0x42 counters:0,1 um:l1d_cache_lock minimum:6000 name:L1D_CACHE_LOCK : Counts retired load locks in the L1D cache. event:0x43 counters:0,1 um:l1d_all_ref minimum:6000 name:L1D_ALL_REF : Counts all references to the L1 data cache, event:0x49 counters:0,1,2,3 um:dtlb_misses minimum:6000 name:DTLB_MISSES : Counts the number of misses in the STLB event:0x4B counters:0,1,2,3 um:sse_mem_exec minimum:6000 name:SSE_MEM_EXEC : Counts number of SSE instructions which missed the L1 data cache. event:0x4C counters:0,1,2,3 um:one minimum:6000 name:LOAD_HIT_PRE : Counts load operations sent to the L1 data cache while a previous SSE prefetch instruction to the same cache line has started prefetching but has not yet finished. event:0x4D counters:0,1,2,3 um:one minimum:6000 name:SFENCE_CYCLES : Counts store fence cycles event:0x4E counters:0,1,2,3 um:l1d_prefetch minimum:6000 name:L1D_PREFETCH : Counts number of hardware prefetch requests. event:0x4F counters:0,1,2,3 um:ept minimum:6000 name:EPT : Counts Extended Page Directory Entry accesses. The Extended Page Directory cache is used by Virtual Machine operating systems while the guest operating systems use the standard TLB caches. event:0x51 counters:0,1 um:l1d minimum:6000 name:L1D : Counts the number of lines brought from/to the L1 data cache. event:0x52 counters:0,1,2,3 um:one minimum:6000 name:L1D_CACHE_PREFETCH_LOCK_FB_HIT : Counts the number of cacheable load lock speculated instructions accepted into the fill buffer. event:0x53 counters:0,1,2,3 um:one minimum:6000 name:L1D_CACHE_LOCK_FB_HIT : Counts the number of cacheable load lock speculated or retired instructions accepted into the fill buffer. event:0x60 counters:0,1,2,3 um:offcore_requests_outstanding minimum:6000 name:OFFCORE_REQUESTS_OUTSTANDING : Counts weighted cycles of offcore requests. event:0x63 counters:0,1 um:cache_lock_cycles minimum:6000 name:CACHE_LOCK_CYCLES : Cycle count during which the L1/L2 caches are locked. A lock is asserted when there is a locked memory access, due to uncacheable memory, a locked operation that spans two cache lines, or a page walk from an uncacheable page table. event:0x6C counters:0,1,2,3 um:one minimum:6000 name:IO_TRANSACTIONS : Counts the number of completed I/O transactions. event:0x80 counters:0,1,2,3 um:l1i minimum:6000 name:L1I : Counts L1i instruction cache accesses. event:0x81 counters:0,1,2,3 um:ifu_ivc minimum:6000 name:IFU_IVC : Instruction Fetch unit events event:0x82 counters:0,1,2,3 um:large_itlb minimum:6000 name:LARGE_ITLB : Counts number of large ITLB accesses event:0x83 counters:0,1,2,3 um:one minimum:6000 name:L1I_OPPORTUNISTIC_HITS : Opportunistic hits in streaming. event:0x85 counters:0,1,2,3 um:itlb_misses minimum:6000 name:ITLB_MISSES : Counts the number of ITLB misses in various variants event:0x87 counters:0,1,2,3 um:ild_stall minimum:6000 name:ILD_STALL : Cycles Instruction Length Decoder stalls event:0x88 counters:0,1,2,3 um:br_inst_exec minimum:6000 name:BR_INST_EXEC : Counts the number of near branch instructions executed, but not necessarily retired. event:0x89 counters:0,1,2,3 um:br_misp_exec minimum:6000 name:BR_MISP_EXEC : Counts the number of mispredicted conditional near branch instructions executed, but not necessarily retired. event:0xA2 counters:0,1,2,3 um:resource_stalls minimum:6000 name:RESOURCE_STALLS : Counts the number of Allocator resource related stalls. Includes register renaming buffer entries, memory buffer entries. In addition to resource related stalls, this event counts some other events. Includes stalls arising during branch misprediction recovery, such as if retirement of the mispredicted branch is delayed and stalls arising while store buffer is draining from synchronizing operations. event:0xA6 counters:0,1,2,3 um:one minimum:6000 name:MACRO_INSTS_FUSED : Counts the number of instructions decoded that are macro-fused but not necessarily executed or retired. event:0xA7 counters:0,1,2,3 um:one minimum:6000 name:BACLEAR_FORCE_IQ : Counts number of times a BACLEAR was forced by the Instruction Queue. The IQ is also responsible for providing conditional branch prediciton direction based on a static scheme and dynamic data provided by the L2 Branch Prediction Unit. If the conditional branch target is not found in the Target Array and the IQ predicts that the branch is taken, then the IQ will force the Branch Address Calculator to issue a BACLEAR. Each BACLEAR asserted by the BAC generates approximately an 8 cycle bubble in the instruction fetch pipeline. event:0xA8 counters:0,1,2,3 um:one minimum:6000 name:LSD : Counts the number of micro-ops delivered by loop stream detector event:0xAE counters:0,1,2,3 um:one minimum:6000 name:ITLB_FLUSH : Counts the number of ITLB flushes event:0xB0 counters:0,1,2,3 um:offcore_requests minimum:6000 name:OFFCORE_REQUESTS : Counts number of offcore data requests. event:0xB1 counters:0,1,2,3 um:uops_executed minimum:6000 name:UOPS_EXECUTED : Counts number of Uops executed that were issued on various ports event:0xB2 counters:0,1,2,3 um:one minimum:6000 name:OFFCORE_REQUESTS_SQ_FULL : Counts number of cycles the SQ is full to handle off-core requests. event:0xB3 counters:0,1,2,3 um:snoopq_requests_outstanding minimum:6000 name:SNOOPQ_REQUESTS_OUTSTANDING : Counts weighted cycles of snoopq requests. event:0xB7 counters:0,1,2,3 um:one minimum:6000 name:OOF_CORE_RESPONSE_0 : Off-core Response Performance Monitoring in the Processor Core. Requires special setup. event:0xB8 counters:0,1,2,3 um:snoop_response minimum:6000 name:SNOOP_RESPONSE : Counts HIT snoop response sent by this thread in response to a snoop request. event:0xBA counters:0,1,2,3 um:pic_accesses minimum:6000 name:PIC_ACCESSES : Counts number of TPR accesses event:0xC2 counters:0,1,2,3 um:uops_retired minimum:6000 name:UOPS_RETIRED : Counts the number of micro-ops retired, (macro-fused=1, micro-fused=2, others=1; maximum count of 8 per cycle). Most instructions are composed of one or two microops. Some instructions are decoded into longer sequences such as repeat instructions, floating point transcendental instructions, and assists event:0xC3 counters:0,1,2,3 um:machine_clears minimum:6000 name:MACHINE_CLEARS : Counts the cycles machine clear is asserted. event:0xC7 counters:0,1,2,3 um:ssex_uops_retired minimum:6000 name:SSEX_UOPS_RETIRED : Counts SIMD packed single-precision floating point Uops retired. event:0xC8 counters:0,1,2,3 um:x20 minimum:6000 name:ITLB_MISS_RETIRED : Counts the number of retired instructions that missed the ITLB when the instruction was fetched. event:0xCB counters:0,1,2,3 um:mem_load_retired minimum:6000 name:MEM_LOAD_RETIRED : Counts number of retired loads. event:0xCC counters:0,1,2,3 um:fp_mmx_trans minimum:6000 name:FP_MMX_TRANS : Counts transitions between MMX and x87 state. event:0xD0 counters:0,1,2,3 um:macro_insts minimum:6000 name:MACRO_INSTS : Counts the number of instructions decoded, (but not necessarily executed or retired). event:0xD1 counters:0,1,2,3 um:uops_decoded minimum:6000 name:UOPS_DECODED : Counts the number of Uops decoded by various subsystems. event:0xD2 counters:0,1,2,3 um:rat_stalls minimum:6000 name:RAT_STALLS : Counts the number of cycles during which execution stalled due to several reason event:0xD4 counters:0,1,2,3 um:one minimum:6000 name:SEG_RENAME_STALLS : Counts the number of stall cycles due to the lack of renaming resources for the ES, DS, FS, and GS segment registers. If a segment is renamed but not retired and a second update to the same segment occurs, a stall occurs in the front-end of the pipeline until the renamed segment retires. event:0xD5 counters:0,1,2,3 um:one minimum:6000 name:ES_REG_RENAMES : Counts the number of times the ES segment register is renamed. event:0xDB counters:0,1,2,3 um:one minimum:6000 name:UOP_UNFUSION : Counts unfusion events due to floating point exception to a fused uop. event:0xE0 counters:0,1,2,3 um:one minimum:6000 name:BR_INST_DECODED : Counts the number of branch instructions decoded. event:0xE4 counters:0,1,2,3 um:one minimum:6000 name:BOGUS_BR : Counts the number of bogus branches. event:0xE5 counters:0,1,2,3 um:one minimum:6000 name:BPU_MISSED_CALL_RET : Counts number of times the Branch Prediciton Unit missed predicting a call or return branch. event:0xE6 counters:0,1,2,3 um:baclear minimum:6000 name:BACLEAR : Counts the number of times the front end is resteered, event:0xE8 counters:0,1,2,3 um:bpu_clears minimum:6000 name:BPU_CLEARS : Counts Branch Prediction Unit clears. event:0xF0 counters:0,1,2,3 um:l2_transactions minimum:6000 name:L2_TRANSACTIONS : Counts L2 transactions event:0xF1 counters:0,1,2,3 um:l2_lines_in minimum:6000 name:L2_LINES_IN : Counts the number of cache lines allocated in the L2 cache in various states. event:0xF2 counters:0,1,2,3 um:l2_lines_out minimum:6000 name:L2_LINES_OUT : Counts L2 cache lines evicted. event:0xF3 counters:0,1,2,3 um:l2_hw_prefetch minimum:6000 name:L2_HW_PREFETCH : Count L2 HW prefetcher events event:0xF4 counters:0,1,2,3 um:sq_misc minimum:6000 name:SQ_MISC : Counts events in the Super Queue below the L2. event:0xF6 counters:0,1,2,3 um:one minimum:6000 name:SQ_FULL_STALL_CYCLES : Counts cycles the Super Queue is full. Neither of the threads on this core will be able to access the uncore. event:0xF7 counters:0,1,2,3 um:fp_assist minimum:6000 name:FP_ASSIST : Counts the number of floating point operations executed that required micro-code assist intervention. event:0xF8 counters:0,1,2,3 um:one minimum:6000 name:SEGMENT_REG_LOADS : Counts number of segment register loads event:0xFD counters:0,1,2,3 um:simd_int_64 minimum:6000 name:SIMD_INT_64 : Counts number of SID integer 64 bit packed multiply operations. oprofile-1.3.0/events/i386/nehalem/unit_masks0000664000175000017500000007564213125211076015777 00000000000000# # Unit masks for the Intel "Nehalem" micro architecture # (Intel Core i7 "Bloomfield"; Xeon 75xx) # name:one type:mandatory default:0x1 0x1 No unit mask name:x41 type:mandatory default:0x41 0x41 No unit mask name:x4f type:mandatory default:0x4f 0x4f No unit mask name:sb_forward type:mandatory default:0x01 0x01 extra: any Counts the number of store forwards name:load_block type:bitmask default:0x01 0x01 extra: std Counts the number of loads blocked by a preceding store with unknown data 0x04 extra: address_offset Counts the number of loads blocked by a preceding store address name:sb_drain type:mandatory default:0x01 0x01 extra: cycles Counts the cycles of store buffer drains name:misalign_mem_ref type:bitmask default:0x03 0x01 extra: load Counts the number of misaligned load references 0x02 extra: store Counts the number of misaligned store references 0x03 extra: any Counts the number of misaligned memory references name:store_blocks type:bitmask default:0x0f 0x01 extra: not_sta This event counts the number of load operations delayed caused by preceding stores whose addresses are known but whose data is unknown, and preceding stores that conflict with the load but which incompletely overlap the load 0x02 extra: sta This event counts load operations delayed caused by preceding stores whose addresses are unknown (STA block) 0x04 extra: at_ret Counts number of loads delayed with at-Retirement block code 0x08 extra: l1d_block Cacheable loads delayed with L1D block code 0x0F any All loads delayed due to store blocks name:dtlb_load_misses type:bitmask default:0x01 0x01 extra: any Counts all load misses that cause a page walk 0x02 extra: walk_completed Counts number of completed page walks due to load miss in the STLB 0x10 extra: stlb_hit Number of cache load STLB hits 0x20 extra: pde_miss Number of DTLB cache load misses where the low part of the linear to physical address translation was missed 0x40 extra: pdp_miss Number of DTLB cache load misses where the high part of the linear to physical address translation was missed 0x80 extra: large_walk_completed Counts number of completed large page walks due to load miss in the STLB name:memory_disambiguration type:bitmask default:0x01 0x01 extra: reset Counts memory disambiguration reset cycles 0x02 extra: success Counts the number of loads that memory disambiguration succeeded 0x04 extra: watchdog Counts the number of times the memory disambiguration watchdog kicked in 0x08 extra: watch_cycles Counts the cycles that the memory disambiguration watchdog is active name:mem_inst_retired type:bitmask default:0x01 0x01 extra: loads Counts the number of instructions with an architecturally-visible store retired on the architected path 0x02 extra: stores Counts the number of instructions with an architecturally-visible store retired on the architected path name:mem_store_retired type:mandatory default:0x01 0x01 extra: dtlb_miss The event counts the number of retired stores that missed the DTLB name:uops_issued type:bitmask default:any 0x01 extra: any Counts the number of Uops issued by the Register Allocation Table to the Reservation Station, i 0x01 extra:cmask=1,inv stalled_cycles Counts the number of cycles no Uops issued by the Register Allocation Table to the Reservation Station, i 0x02 extra: fused Counts the number of fused Uops that were issued from the Register Allocation Table to the Reservation Station name:mem_uncore_retired type:bitmask default:0x02 0x02 extra: other_core_l2_hitm Counts number of memory load instructions retired where the memory reference hit modified data in a sibling core residing on the same socket 0x08 extra: remote_cache_local_home_hit Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and HIT in a remote socket's cache 0x10 extra: remote_dram Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and was remotely homed 0x20 extra: local_dram Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and required a local socket memory reference name:fp_comp_ops_exe type:bitmask default:0x01 0x01 extra: x87 Counts the number of FP Computational Uops Executed 0x02 extra: mmx Counts number of MMX Uops executed 0x04 extra: sse_fp Counts number of SSE and SSE2 FP uops executed 0x08 extra: sse2_integer Counts number of SSE2 integer uops executed 0x10 extra: sse_fp_packed Counts number of SSE FP packed uops executed 0x20 extra: sse_fp_scalar Counts number of SSE FP scalar uops executed 0x40 extra: sse_single_precision Counts number of SSE* FP single precision uops executed 0x80 extra: sse_double_precision Counts number of SSE* FP double precision uops executed name:simd_int_128 type:bitmask default:0x01 0x01 extra: packed_mpy Counts number of 128 bit SIMD integer multiply operations 0x02 extra: packed_shift Counts number of 128 bit SIMD integer shift operations 0x04 extra: pack Counts number of 128 bit SIMD integer pack operations 0x08 extra: unpack Counts number of 128 bit SIMD integer unpack operations 0x10 extra: packed_logical Counts number of 128 bit SIMD integer logical operations 0x20 extra: packed_arith Counts number of 128 bit SIMD integer arithmetic operations 0x40 extra: shuffle_move Counts number of 128 bit SIMD integer shuffle and move operations name:load_dispatch type:bitmask default:0x07 0x01 extra: rs Counts number of loads dispatched from the Reservation Station that bypass the Memory Order Buffer 0x02 extra: rs_delayed Counts the number of delayed RS dispatches at the stage latch 0x04 extra: mob Counts the number of loads dispatched from the Reservation Station to the Memory Order Buffer 0x07 extra: any Counts all loads dispatched from the Reservation Station name:arith type:bitmask default:0x01 0x01 extra: cycles_div_busy Counts the number of cycles the divider is busy executing divide or square root operations 0x02 extra: mul Counts the number of multiply operations executed name:inst_decoded type:mandatory default:0x01 0x01 extra: dec0 Counts number of instructions that require decoder 0 to be decoded name:hw_int type:bitmask default:0x01 0x01 extra: rcv Number of interrupt received 0x02 extra: cycles_masked Number of cycles interrupt are masked 0x04 extra: cycles_pending_and_masked Number of cycles interrupts are pending and masked name:l2_rqsts type:bitmask default:0x01 0x01 extra: ld_hit Counts number of loads that hit the L2 cache 0x02 extra: ld_miss Counts the number of loads that miss the L2 cache 0x03 extra: loads Counts all L2 load requests 0x04 extra: rfo_hit Counts the number of store RFO requests that hit the L2 cache 0x08 extra: rfo_miss Counts the number of store RFO requests that miss the L2 cache 0x0C rfos Counts all L2 store RFO requests 0x10 extra: ifetch_hit Counts number of instruction fetches that hit the L2 cache 0x20 extra: ifetch_miss Counts number of instruction fetches that miss the L2 cache 0x30 extra: ifetches Counts all instruction fetches 0x40 extra: prefetch_hit Counts L2 prefetch hits for both code and data 0x80 extra: prefetch_miss Counts L2 prefetch misses for both code and data 0xC0 prefetches Counts all L2 prefetches for both code and data 0xAA miss Counts all L2 misses for both code and data 0xFF references Counts all L2 requests for both code and data name:l2_data_rqsts type:bitmask default:0xff 0x01 extra: i_state Counts number of L2 data demand loads where the cache line to be loaded is in the I (invalid) state, i 0x02 extra: s_state Counts number of L2 data demand loads where the cache line to be loaded is in the S (shared) state 0x04 extra: e_state Counts number of L2 data demand loads where the cache line to be loaded is in the E (exclusive) state 0x08 extra: m_state Counts number of L2 data demand loads where the cache line to be loaded is in the M (modified) state 0x0F mesi Counts all L2 data demand requests 0x10 extra: i_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the I (invalid) state, i 0x20 extra: s_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the S (shared) state 0x40 extra: e_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the E (exclusive) state 0x80 extra: m_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the M (modified) state 0xF0 mesi Counts all L2 prefetch requests 0xFF any Counts all L2 data requests name:l2_write type:bitmask default:0x01 0x01 extra: i_state Counts number of L2 demand store RFO requests where the cache line to be loaded is in the I (invalid) state, i 0x02 extra: s_state Counts number of L2 store RFO requests where the cache line to be loaded is in the S (shared) state 0x04 extra: e_state Counts number of L2 store RFO requests where the cache line to be loaded is in the E (exclusive) state 0x08 extra: m_state Counts number of L2 store RFO requests where the cache line to be loaded is in the M (modified) state 0x0E hit Counts number of L2 store RFO requests where the cache line to be loaded is in either the S, E or M states 0x0F mesi Counts all L2 store RFO requests 0x10 extra: i_state Counts number of L2 demand lock RFO requests where the cache line to be loaded is in the I (invalid) state, i 0x20 extra: s_state Counts number of L2 lock RFO requests where the cache line to be loaded is in the S (shared) state 0x40 extra: e_state Counts number of L2 demand lock RFO requests where the cache line to be loaded is in the E (exclusive) state 0x80 extra: m_state Counts number of L2 demand lock RFO requests where the cache line to be loaded is in the M (modified) state 0xE0 hit Counts number of L2 demand lock RFO requests where the cache line to be loaded is in either the S, E, or M state 0xF0 mesi Counts all L2 demand lock RFO requests name:l1d_wb_l2 type:bitmask default:0x01 0x01 extra: i_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the I (invalid) state, i 0x02 extra: s_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the S state 0x04 extra: e_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the E (exclusive) state 0x08 extra: m_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the M (modified) state 0x0F mesi Counts all L1 writebacks to the L2 name:longest_lat_cache type:bitmask default:0x4F 0x4F reference This event counts requests originating from the core that reference a cache line in the last level cache 0x41 extra: miss This event counts each cache miss condition for references to the last level cache name:cpu_clk_unhalted type:bitmask default:0x00 0x00 extra: thread_p Counts the number of thread cycles while the thread is not in a halt state 0x01 extra: ref_p Increments at the frequency of a slower reference clock when not halted name:l1d_cache_ld type:bitmask default:0x01 0x01 extra: i_state Counts L1 data cache read requests where the cache line to be loaded is in the I (invalid) state, i 0x02 extra: s_state Counts L1 data cache read requests where the cache line to be loaded is in the S (shared) state 0x04 extra: e_state Counts L1 data cache read requests where the cache line to be loaded is in the E (exclusive) state 0x08 extra: m_state Counts L1 data cache read requests where the cache line to be loaded is in the M (modified) state 0x0F mesi Counts L1 data cache read requests name:l1d_cache_st type:bitmask default:0x01 0x01 extra: i_state Counts L1 data cache store RFO requests where the cache line to be loaded is in the I state 0x02 extra: s_state Counts L1 data cache store RFO requests where the cache line to be loaded is in the S (shared) state 0x04 extra: e_state Counts L1 data cache store RFO requests where the cache line to be loaded is in the E (exclusive) state 0x08 extra: m_state Counts L1 data cache store RFO requests where cache line to be loaded is in the M (modified) state 0x0F mesi Counts L1 data cache store RFO requests name:l1d_cache_lock type:bitmask default:0x01 0x01 extra: hit Counts retired load locks that hit in the L1 data cache or hit in an already allocated fill buffer 0x02 extra: s_state Counts L1 data cache retired load locks that hit the target cache line in the shared state 0x04 extra: e_state Counts L1 data cache retired load locks that hit the target cache line in the exclusive state 0x08 extra: m_state Counts L1 data cache retired load locks that hit the target cache line in the modified state name:l1d_all_ref type:bitmask default:0x01 0x01 extra: any Counts all references (uncached, speculated and retired) to the L1 data cache, including all loads and stores with any memory types 0x02 extra: cacheable Counts all data reads and writes (speculated and retired) from cacheable memory, including locked operations #name:l1d_pend_miss type:mandatory default:0x02 # 0x02 extra: load_buffers_full Counts cycles of L1 data cache load fill buffers full name:dtlb_misses type:bitmask default:0x01 0x01 extra: any Counts the number of misses in the STLB which causes a page walk 0x02 extra: walk_completed Counts number of misses in the STLB which resulted in a completed page walk 0x10 extra: stlb_hit Counts the number of DTLB first level misses that hit in the second level TLB 0x20 extra: pde_miss Number of DTLB cache misses where the low part of the linear to physical address translation was missed 0x40 extra: pdp_miss Number of DTLB misses where the high part of the linear to physical address translation was missed 0x80 extra: large_walk_completed Counts number of completed large page walks due to misses in the STLB name:sse_mem_exec type:bitmask default:0x01 0x01 extra: nta Counts number of SSE NTA prefetch/weakly-ordered instructions which missed the L1 data cache 0x08 extra: streaming_stores Counts number of SSE nontemporal stores name:l1d_prefetch type:bitmask default:0x01 0x01 extra: requests Counts number of hardware prefetch requests dispatched out of the prefetch FIFO 0x02 extra: miss Counts number of hardware prefetch requests that miss the L1D 0x04 extra: triggers Counts number of prefetch requests triggered by the Finite State Machine and pushed into the prefetch FIFO name:ept type:bitmask default:0x02 0x02 extra: epde_miss Counts Extended Page Directory Entry misses 0x04 extra: epdpe_hit Counts Extended Page Directory Pointer Entry hits 0x08 extra: epdpe_miss Counts Extended Page Directory Pointer Entry misses name:l1d type:bitmask default:0x01 0x01 extra: repl Counts the number of lines brought into the L1 data cache 0x02 extra: m_repl Counts the number of modified lines brought into the L1 data cache 0x04 extra: m_evict Counts the number of modified lines evicted from the L1 data cache due to replacement 0x08 extra: m_snoop_evict Counts the number of modified lines evicted from the L1 data cache due to snoop HITM intervention name:offcore_requests_outstanding type:bitmask default:0x01 0x01 extra: read_data Counts weighted cycles of offcore demand data read requests 0x02 extra: read_code Counts weighted cycles of offcore demand code read requests 0x04 extra: rfo Counts weighted cycles of offcore demand RFO requests 0x08 extra: read Counts weighted cycles of offcore read requests of any kind name:cache_lock_cycles type:bitmask default:0x01 0x01 extra: l1d_l2 Cycle count during which the L1D and L2 are locked 0x02 extra: l1d Counts the number of cycles that cacheline in the L1 data cache unit is locked name:l1i type:bitmask default:0x01 0x01 extra: hits Counts all instruction fetches that hit the L1 instruction cache 0x02 extra: misses Counts all instruction fetches that miss the L1I cache 0x03 extra: reads Counts all instruction fetches, including uncacheable fetches that bypass the L1I 0x04 extra: cycles_stalled Cycle counts for which an instruction fetch stalls due to a L1I cache miss, ITLB miss or ITLB fault name:ifu_ivc type:bitmask default:0x01 0x01 extra: full Instruction Fetche unit victim cache full 0x02 extra: l1i_eviction L1 Instruction cache evictions name:large_itlb type:mandatory default:0x01 0x01 extra: hit Counts number of large ITLB hits name:itlb_misses type:bitmask default:0x01 0x01 extra: any Counts the number of misses in all levels of the ITLB which causes a page walk 0x02 extra: walk_completed Counts number of misses in all levels of the ITLB which resulted in a completed page walk 0x04 extra: walk_cycles Counts ITLB miss page walk cycles 0x04 extra: pmh_busy_cycles Counts PMH busy cycles 0x10 extra: stlb_hit Counts the number of ITLB misses that hit in the second level TLB 0x20 extra: pde_miss Number of ITLB misses where the low part of the linear to physical address translation was missed 0x40 extra: pdp_miss Number of ITLB misses where the high part of the linear to physical address translation was missed 0x80 extra: large_walk_completed Counts number of completed large page walks due to misses in the STLB name:ild_stall type:bitmask default:0x0f 0x01 extra: lcp Cycles Instruction Length Decoder stalls due to length changing prefixes: 66, 67 or REX 0x02 extra: mru Instruction Length Decoder stall cycles due to Brand Prediction Unit (PBU) Most Recently Used (MRU) bypass 0x04 extra: iq_full Stall cycles due to a full instruction queue 0x08 extra: regen Counts the number of regen stalls 0x0F any Counts any cycles the Instruction Length Decoder is stalled name:br_inst_exec type:bitmask default:0x7f 0x01 extra: cond Counts the number of conditional near branch instructions executed, but not necessarily retired 0x02 extra: direct Counts all unconditional near branch instructions excluding calls and indirect branches 0x04 extra: indirect_non_call Counts the number of executed indirect near branch instructions that are not calls 0x07 extra: non_calls Counts all non call near branch instructions executed, but not necessarily retired 0x08 extra: return_near Counts indirect near branches that have a return mnemonic 0x10 extra: direct_near_call Counts unconditional near call branch instructions, excluding non call branch, executed 0x20 extra: indirect_near_call Counts indirect near calls, including both register and memory indirect, executed 0x30 extra: near_calls Counts all near call branches executed, but not necessarily retired 0x40 extra: taken Counts taken near branches executed, but not necessarily retired 0x7F any Counts all near executed branches (not necessarily retired) name:br_misp_exec type:bitmask default:0x7f 0x01 extra: cond Counts the number of mispredicted conditional near branch instructions executed, but not necessarily retired 0x02 extra: direct Counts mispredicted macro unconditional near branch instructions, excluding calls and indirect branches (should always be 0) 0x04 extra: indirect_non_call Counts the number of executed mispredicted indirect near branch instructions that are not calls 0x07 extra: non_calls Counts mispredicted non call near branches executed, but not necessarily retired 0x08 extra: return_near Counts mispredicted indirect branches that have a rear return mnemonic 0x10 extra: direct_near_call Counts mispredicted non-indirect near calls executed, (should always be 0) 0x20 extra: indirect_near_call Counts mispredicted indirect near calls exeucted, including both register and memory indirect 0x30 extra: near_calls Counts all mispredicted near call branches executed, but not necessarily retired 0x40 extra: taken Counts executed mispredicted near branches that are taken, but not necessarily retired 0x7F any Counts the number of mispredicted near branch instructions that were executed, but not necessarily retired name:resource_stalls type:bitmask default:0x01 0x01 extra: any Counts the number of Allocator resource related stalls 0x02 extra: load Counts the cycles of stall due to lack of load buffer for load operation 0x04 extra: rs_full This event counts the number of cycles when the number of instructions in the pipeline waiting for execution reaches the limit the processor can handle 0x08 extra: store This event counts the number of cycles that a resource related stall will occur due to the number of store instructions reaching the limit of the pipeline, (i 0x10 extra: rob_full Counts the cycles of stall due to reorder buffer full 0x20 extra: fpcw Counts the number of cycles while execution was stalled due to writing the floating-point unit (FPU) control word 0x40 extra: mxcsr Stalls due to the MXCSR register rename occurring to close to a previous MXCSR rename 0x80 extra: other Counts the number of cycles while execution was stalled due to other resource issues name:offcore_requests type:bitmask default:0x80 0x01 extra: demand_read_data Counts number of offcore demand data read requests 0x02 extra: demand_read_code Counts number of offcore demand code read requests 0x04 extra: demand_rfo Counts number of offcore demand RFO requests 0x08 extra: any_read Counts number of offcore read requests 0x10 extra: any_rfo Counts number of offcore RFO requests 0x20 extra: uncached_mem Counts number of offcore uncached memory requests 0x40 extra: l1d_writeback Counts number of L1D writebacks to the uncore 0x80 extra: any Counts all offcore requests name:uops_executed type:bitmask default:0x3f 0x01 extra: port0 Counts number of Uops executed that were issued on port 0 0x02 extra: port1 Counts number of Uops executed that were issued on port 1 0x04 extra: port2_core Counts number of Uops executed that were issued on port 2 0x08 extra: port3_core Counts number of Uops executed that were issued on port 3 0x10 extra: port4_core Counts number of Uops executed that where issued on port 4 0x20 extra: port5 Counts number of Uops executed that where issued on port 5 0x40 extra: port015 Counts number of Uops executed that where issued on port 0, 1, or 5 0x80 extra: port234 Counts number of Uops executed that where issued on port 2, 3, or 4 name:snoopq_requests_outstanding type:bitmask default:0x01 0x01 extra: data Counts weighted cycles of snoopq requests for data 0x02 extra: invalidate Counts weighted cycles of snoopq invalidate requests 0x04 extra: code Counts weighted cycles of snoopq requests for code name:snoop_response type:bitmask default:0x01 0x01 extra: hit Counts HIT snoop response sent by this thread in response to a snoop request 0x02 extra: hite Counts HIT E snoop response sent by this thread in response to a snoop request 0x04 extra: hitm Counts HIT M snoop response sent by this thread in response to a snoop request name:pic_accesses type:bitmask default:0x01 0x01 extra: tpr_reads Counts number of TPR reads 0x02 extra: tpr_writes Counts number of TPR writes name:inst_retired type:bitmask default:0x01 0x01 extra: any_p instructions retired 0x02 extra: x87 Counts the number of floating point computational operations retired: floating point computational operations executed by the assist handler and sub-operations of complex floating point instructions like transcendental instructions name:uops_retired type:bitmask default:0x01 0x01 extra: any Counts the number of micro-ops retired, (macro-fused=1, micro-fused=2, others=1; maximum count of 8 per cycle) 0x02 extra: retire_slots Counts the number of retirement slots used each cycle 0x04 extra: macro_fused Counts number of macro-fused uops retired name:machine_clears type:bitmask default:0x01 0x01 extra: cycles Counts the cycles machine clear is asserted 0x02 extra: mem_order Counts the number of machine clears due to memory order conflicts 0x04 extra: smc Counts the number of times that a program writes to a code section 0x10 extra: fusion_assist Counts the number of macro-fusion assists name:br_inst_retired type:bitmask default:0x00 0x00 extra: all_branches See Table A-1 0x01 extra: conditional Counts the number of conditional branch instructions retired 0x02 extra: near_call Counts the number of direct & indirect near unconditional calls retired 0x04 extra: all_branches Counts the number of branch instructions retired name:br_misp_retired type:bitmask default:0x00 0x00 extra: all_branches See Table A-1 0x02 extra: near_call Counts mispredicted direct & indirect near unconditional retired calls name:ssex_uops_retired type:bitmask default:0x01 0x01 extra: packed_single Counts SIMD packed single-precision floating point Uops retired 0x02 extra: scalar_single Counts SIMD calar single-precision floating point Uops retired 0x04 extra: packed_double Counts SIMD packed double-precision floating point Uops retired 0x08 extra: scalar_double Counts SIMD scalar double-precision floating point Uops retired 0x10 extra: vector_integer Counts 128-bit SIMD vector integer Uops retired name:mem_load_retired type:bitmask default:0x01 0x01 extra: l1d_hit Counts number of retired loads that hit the L1 data cache 0x02 extra: l2_hit Counts number of retired loads that hit the L2 data cache 0x04 extra: llc_unshared_hit Counts number of retired loads that hit their own, unshared lines in the LLC cache 0x08 extra: other_core_l2_hit_hitm Counts number of retired loads that hit in a sibling core's L2 (on die core) 0x10 extra: llc_miss Counts number of retired loads that miss the LLC cache 0x40 extra: hit_lfb Counts number of retired loads that miss the L1D and the address is located in an allocated line fill buffer and will soon be committed to cache 0x80 extra: dtlb_miss Counts the number of retired loads that missed the DTLB name:fp_mmx_trans type:bitmask default:0x03 0x01 extra: to_fp Counts the first floating-point instruction following any MMX instruction 0x02 extra: to_mmx Counts the first MMX instruction following a floating-point instruction 0x03 extra: any Counts all transitions from floating point to MMX instructions and from MMX instructions to floating point instructions name:macro_insts type:mandatory default:0x01 0x01 extra: decoded Counts the number of instructions decoded, (but not necessarily executed or retired) name:uops_decoded type:bitmask default:0x0e 0x02 extra: ms Counts the number of Uops decoded by the Microcode Sequencer, MS 0x04 extra: esp_folding Counts number of stack pointer (ESP) instructions decoded: push , pop , call , ret, etc 0x08 extra: esp_sync Counts number of stack pointer (ESP) sync operations where an ESP instruction is corrected by adding the ESP offset register to the current value of the ESP register name:rat_stalls type:bitmask default:0x0f 0x01 extra: flags Counts the number of cycles during which execution stalled due to several reasons, one of which is a partial flag register stall 0x02 extra: registers This event counts the number of cycles instruction execution latency became longer than the defined latency because the instruction used a register that was partially written by previous instruction 0x04 extra: rob_read_port Counts the number of cycles when ROB read port stalls occurred, which did not allow new micro-ops to enter the out-of-order pipeline 0x08 extra: scoreboard Counts the cycles where we stall due to microarchitecturally required serialization 0x0F any Counts all Register Allocation Table stall cycles due to: Cycles when ROB read port stalls occurred, which did not allow new micro-ops to enter the execution pipe name:baclear type:bitmask default:0x01 0x01 extra: clear Counts the number of times the front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction and this is corrected by the Branch Address Calculator at the front end 0x02 extra: bad_target Counts number of Branch Address Calculator clears (BACLEAR) asserted due to conditional branch instructions in which there was a target hit but the direction was wrong name:bpu_clears type:bitmask default:0x03 0x01 extra: early Counts early (normal) Branch Prediction Unit clears: BPU predicted a taken branch after incorrectly assuming that it was not taken 0x02 extra: late Counts late Branch Prediction Unit clears due to Most Recently Used conflicts 0x03 extra: any Counts all BPU clears name:l2_transactions type:bitmask default:0x80 0x01 extra: load Counts L2 load operations due to HW prefetch or demand loads 0x02 extra: rfo Counts L2 RFO operations due to HW prefetch or demand RFOs 0x04 extra: ifetch Counts L2 instruction fetch operations due to HW prefetch or demand ifetch 0x08 extra: prefetch Counts L2 prefetch operations 0x10 extra: l1d_wb Counts L1D writeback operations to the L2 0x20 extra: fill Counts L2 cache line fill operations due to load, RFO, L1D writeback or prefetch 0x40 extra: wb Counts L2 writeback operations to the LLC 0x80 extra: any Counts all L2 cache operations name:l2_lines_in type:bitmask default:0x07 0x02 extra: s_state Counts the number of cache lines allocated in the L2 cache in the S (shared) state 0x04 extra: e_state Counts the number of cache lines allocated in the L2 cache in the E (exclusive) state 0x07 extra: any Counts the number of cache lines allocated in the L2 cache name:l2_lines_out type:bitmask default:0x0f 0x01 extra: demand_clean Counts L2 clean cache lines evicted by a demand request 0x02 extra: demand_dirty Counts L2 dirty (modified) cache lines evicted by a demand request 0x04 extra: prefetch_clean Counts L2 clean cache line evicted by a prefetch request 0x08 extra: prefetch_dirty Counts L2 modified cache line evicted by a prefetch request 0x0F any Counts all L2 cache lines evicted for any reason name:l2_hw_prefetch type:bitmask default:0x01 0x01 extra: hit Count L2 HW prefetcher detector hits 0x02 extra: alloc Count L2 HW prefetcher allocations 0x04 extra: data_trigger Count L2 HW data prefetcher triggered 0x08 extra: code_trigger Count L2 HW code prefetcher triggered 0x10 extra: dca_trigger Count L2 HW DCA prefetcher triggered 0x20 extra: kick_start Count L2 HW prefetcher kick started name:sq_misc type:bitmask default:0x01 0x01 extra: promotion Counts the number of L2 secondary misses that hit the Super Queue 0x02 extra: promotion_post_go Counts the number of L2 secondary misses during the Super Queue filling L2 0x04 extra: lru_hints Counts number of Super Queue LRU hints sent to L3 0x08 extra: fill_dropped Counts the number of SQ L2 fills dropped due to L2 busy 0x10 extra: split_lock Counts the number of SQ lock splits across a cache line name:fp_assist type:bitmask default:0x01 0x01 extra: all Counts the number of floating point operations executed that required micro-code assist intervention 0x02 extra: output Counts number of floating point micro-code assist when the output value (destination register) is invalid 0x04 extra: input Counts number of floating point micro-code assist when the input value (one of the source operands to an FP instruction) is invalid name:simd_int_64 type:bitmask default:0x01 0x01 extra: packed_mpy Counts number of SID integer 64 bit packed multiply operations 0x02 extra: packed_shift Counts number of SID integer 64 bit packed shift operations 0x04 extra: pack Counts number of SID integer 64 bit pack operations 0x08 extra: unpack Counts number of SID integer 64 bit unpack operations 0x10 extra: packed_logical Counts number of SID integer 64 bit logical operations 0x20 extra: packed_arith Counts number of SID integer 64 bit arithmetic operations 0x40 extra: shuffle_move Counts number of SID integer 64 bit shift or move operations name:x20 type:mandatory default:0x20 0x20 No unit mask oprofile-1.3.0/events/i386/knightslanding/0000775000175000017500000000000013323173530015336 500000000000000oprofile-1.3.0/events/i386/knightslanding/events0000664000175000017500000000504413124774026016516 00000000000000# # Intel "Knights Landing" microarchitecture core events. # # See http://ark.intel.com/ for help in identifying Knights Landing CPUs # # Note the minimum counts are not discovered experimentally and could be likely # lowered in many cases without ill effect. # include:i386/arch_perfmon event:0x03 counters:cpuid um:recycleq minimum:20000 name:recycleq : Counts the number of retired load or store micro-ops that get pushed into the Recycle Queue event:0x04 counters:cpuid um:mem_uops_retired minimum:100000 name:mem_uops_retired : Counts the number of memory micro-ops retired. event:0x05 counters:cpuid um:page_walks minimum:500 name:page_walks : Counts the number of core cycles for page walks event:0x30 counters:cpuid um:l2_requests_reject minimum:500 name:l2_requests_reject : Counts the number of MEC requests from the L2Q that reference a cache line were rejected. event:0x31 counters:cpuid um:core_reject_l2q minimum:100 name:core_reject_l2q : Number of requests not accepted into the L2Q because of any L2 queue reject condition. event:0x80 counters:cpuid um:icache minimum:100000 name:icache : Instruction fetches event:0x86 counters:cpuid um:fetch_stall minimum:100000 name:fetch_stall : Counts the number of core cycles the instruction fetch pipe was stalls event:0x2e counters:cpuid um:l2_requests minimum:10000 name:l2_requests : L2 cache requests event:0xc2 counters:cpuid um:uops_retired minimum:100000 name:uops_retired : Retired uops event:0xc3 counters:cpuid um:machine_clears minimum:500 name:machine_clears : Counts the number of times that the machine clears at retire. event:0xc4 counters:cpuid um:br_inst_retired minimum:50000 name:br_inst_retired : Counts the number of branch instructions retired event:0xc5 counters:cpuid um:br_misp_retired minimum:5000 name:br_misp_retired : Counts the number of mispredicted branch instructions retired event:0xca counters:cpuid um:no_alloc_cycles minimum:500000 name:no_alloc_cycles : Counts the number of core cycles when no micro-ops are allocated event:0xcb counters:cpuid um:rs_full_stall minimum:100000 name:rs_full_stall : Counts the number of core cycles when the allocate stalls because the required RS is full. event:0xcd counters:cpuid um:cycles_div_busy minimum:1000 name:cycles_div_busy : Number of core cycles when divider is busy event:0xe6 counters:cpuid um:baclears minimum:10000 name:baclears : Counts the number of times Branch Target Buffer (BTB) prediction was corrected by a later branch predictor event:0xe7 counters:cpuid um:ms_decoded minimum:10000 name:ms_decoded : Microcode sequencer decode entrypoints oprofile-1.3.0/events/i386/knightslanding/unit_masks0000664000175000017500000002134313124774026017367 00000000000000# # Unit masks for the Intel "Knights Landing" micro architecture # # See http://ark.intel.com/ for help in identifying Knights Landing CPUs # include:i386/arch_perfmon name:recycleq type:exclusive default:any_ld 0x01 extra:pebs ld_block_st_forward Counts the number of occurrences a retired load gets blocked because its address partially overlaps with a store. 0x02 extra: ld_block_std_notready Counts the number of occurrences a retired load gets blocked because its address overlaps with a store whose data is not ready. 0x04 extra: st_splits Counts the number of occurrences a retired store that is a cache line split. Each split should be counted only once. 0x08 extra:pebs ld_splits Counts the number of occurrences a retired load that is a cache line split. Each split should be counted only once. 0x10 extra: lock Counts all the retired locked loads. It does not include stores because we would double count if we count stores. 0x20 extra: sta_full Counts the store micro-ops retired that were pushed in the rehad queue because the store address buffer is full. 0x40 extra: any_ld Counts any retired load that was pushed into the recycle queue for any reason. 0x80 extra: any_st Counts any retired store that was pushed into the recycle queue for any reason. name:mem_uops_retired type:exclusive default:any_loads 0x01 extra: l1_miss_loads Counts the number of load micro-ops retired that miss in L1 D cache. 0x02 extra:pebs l2_hit_loads Counts the number of load micro-ops retired that hit in the L2. 0x04 extra:pebs l2_miss_loads Counts the number of load micro-ops retired that miss in the L2. 0x08 extra:pebs dtlb_miss_loads Counts the number of load micro-ops retired that cause a DTLB miss. 0x10 extra: utlb_miss_loads Counts the number of load micro-ops retired that caused micro TLB miss. 0x20 extra:pebs hitm Counts the loads retired that get the data from the other core in the same tile in M state. 0x40 extra: any_loads Counts all the load micro-ops retired. 0x80 extra: any_stores Counts all the store micro-ops retired. name:page_walks type:exclusive default:walks 0x01 extra:edge d_side_walks Counts the total D-side page walks that are completed or started. The page walks started in the speculative path will also be counted. 0x01 extra: d_side_cycles Counts the total number of core cycles for all the D-side page walks. The cycles for page walks started in speculative path will also be included. 0x02 extra:edge i_side_walks Counts the total I-side page walks that are completed. 0x02 extra: i_side_cycles Counts the total number of core cycles for all the I-side page walks. The cycles for page walks started in speculative path will also be included. 0x03 extra:edge walks Counts the total page walks completed (I-side and D-side) 0x03 extra: cycles Counts the total number of core cycles for all the page walks. The cycles for page walks started in speculative path will also be included. name:l2_requests_reject type:mandatory default:all 0x00 extra: all Counts the number of MEC requests from the L2Q that reference a cache line excluding SW prefetches filling only to L2 cache and L1 evictions (automatically exlcudes L2HWP, UC, WC) that were rejected - Multiple repeated rejects should be counted multiple times. name:core_reject_l2q type:mandatory default:all 0x00 extra: all Counts the number of MEC requests that were not accepted into the L2Q because of any L2 queue reject condition. There is no concept of at-ret here. It might include requests due to instructions in the speculative path name:icache type:exclusive default:accesses 0x3 extra: accesses All instruction fetches including uncacheable 0x1 extra: hits All instruction fetches that hit instruction cache 0x2 extra: misses All instruction fetches that missed instruction cache (produced a memory request); counted only once, not once per outstanding cycle name:fetch_stall type:exclusive default:icache_fill_pending_cycles 0x01 extra: icache_fill_pending_cycles Counts the number of core cycles the fetch stalls because of an icache miss. This is a cumulative count of core cycles the fetch stalled for all icache misses 0x01 extra:edge icache_fill_pending_edge Counts the number of times it happens that fetch stalls because of an icache miss. name:l2_requests type:exclusive default:reference 0x41 extra: miss Counts the total number of L2 cache misses. 0x4f extra: reference Counts the total number of L2 cache references. name:uops_retired type:exclusive default:all 0x01 extra: ms Counts the number of uops retired that are from complex flows issued by the micro-sequencer 0x10 extra: all Counts the number of uops retired 0x20 extra: scalar_simd Counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro ops), division, sqrt. 0x40 extra: packed_simd Counts the number of packed SSE, AVX, AVX2, AVX-512 micro-ops (both floating point and integer) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies. name:machine_clears type:exclusive default:all 0x01 extra: smc Counts the number of times that the machine clears due to program modifying data within 1K of a recently fetched code page. 0x02 extra: memory_ordering Counts the number of times the machine clears due to memory ordering hazards. 0x04 extra: fp_assist Counts the number of floating operations retired that required microcode assists 0x08 extra: all Counts all machine clears name:br_inst_retired type:exclusive default:any 0x00 extra:pebs any Counts the number of branch instructions retired 0x7e extra:pebs jcc Counts the number of branch instructions retired that were conditional jumps. 0xfe extra:pebs taken_jcc Counts the number of branch instructions retired that were conditional jumps and predicted taken. 0xf9 extra:pebs call Counts the number of near CALL branch instructions retired. 0xfd extra:pebs rel_call Counts the number of near relative CALL branch instructions retired. 0xfb extra:pebs ind_call Counts the number of near indirect CALL branch instructions retired. 0xf7 extra:pebs return Counts the number of near RET branch instructions retired. 0xeb extra:pebs non_return_ind Counts the number of branch instructions retired that were near indirect CALL or near indirect JMP. 0xbf extra:pebs far_branch Counts the number of far branch instructions retired. name:br_misp_retired type:exclusive default:any 0x00 extra:pebs any All mispredicted branches 0x7e extra:pebs jcc Number of mispredicted conditional branch instructions retired 0xfe extra:pebs taken_jcc Number of mispredicted taken conditional branch instructions retired 0xf9 extra:pebs call Counts the number of mispredicted near CALL branch instructions retired. 0xfd extra:pebs rel_call Counts the number of mispredicted near relative CALL branch instructions retired. 0xfb extra:pebs ind_call Number of mispredicted indirect call branch instructions retired 0xf7 extra:pebs return Number of mispredicted return branch instructions retired 0xeb extra:pebs non_return_ind Number of mispredicted non-return branch instructions retired 0xbf extra:pebs far_branch Counts the number of mispredicted far branch instructions retired. name:no_alloc_cycles type:exclusive default:all 0x01 extra: rob_full Counts the number of core cycles when no micro-ops are allocated and the ROB is full 0x02 extra: mispredicts Counts the number of core cycles when no micro-ops are allocated and the alloc pipe is stalled waiting for a mispredicted branch to retire. 0x20 extra: rat_stall Counts the number of core cycles when no micro-ops are allocated and a RATstall (caused by reservation station full) is asserted. 0x7f extra: all Counts the total number of core cycles when no micro-ops are allocated for any reason. name:rs_full_stall type:exclusive default:all 0x01 extra: mec Counts the number of core cycles when allocation pipeline is stalled and is waiting for a free MEC reservation station entry. 0x1f extra: all Counts the total number of core cycles the Alloc pipeline is stalled when any one of the reservation stations is full. name:cycles_div_busy type:mandatory default:all 0x01 extra: all Cycles the number of core cycles when divider is busy, does not imply a stall waiting for the divider name:baclears type:exclusive default:all 0x01 extra: all Counts the number of times front-end resteers for any branch as a result of another branch handling mechanism in the front-end. 0x08 extra: return Counts the number of times the front-end resteers for RET branches as a result of another branch handling mechanism in the front-end. 0x10 extra: cond Counts the number of times the front-end resteers for conditional branches as a result of another branch handling mechanism in the front-end. name:ms_decoded type:mandatory default:ms_entry 0x01 extra: ms_entry Counts the number of times the MSROM starts a flow of uops. oprofile-1.3.0/events/i386/core_i7/0000775000175000017500000000000013323173530013661 500000000000000oprofile-1.3.0/events/i386/core_i7/events0000664000175000017500000000033112534404406015027 00000000000000# # Intel Core i7 "Bloomfield" / Xeon EP 75xx events # right now this is only the shared events included for the Nehalem core, # but later we'll add here the uncore events specific to this chip # include:i386/nehalem oprofile-1.3.0/events/i386/core_i7/unit_masks0000664000175000017500000000002512534404406015700 00000000000000include:i386/nehalem oprofile-1.3.0/events/i386/atom/0000775000175000017500000000000013323173530013272 500000000000000oprofile-1.3.0/events/i386/atom/events0000664000175000017500000001674612534404406014461 00000000000000# # Intel Atom (Silverthorne) events # # architectural perfmon events event:0x3c counters:0,1 um:cpu_clk_unhalted minimum:6000 name:CPU_CLK_UNHALTED : Clock cycles when not halted event:0x3c counters:0,1 um:one minimum:6000 name:UNHALTED_REFERENCE_CYCLES : Unhalted reference cycles event:0xc0 counters:0,1 um:one minimum:6000 name:INST_RETIRED : number of instructions retired event:0x2e counters:0,1 um:x41 minimum:6000 name:LLC_MISSES : Last level cache demand requests from this core that missed the LLC event:0x2e counters:0,1 um:x4f minimum:6000 name:LLC_REFS : Last level cache demand requests from this core event:0xc4 counters:0,1 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise) # event:0x02 counters:0,1 um:store_forwards minimum:6000 name:STORE_FORWARDS : Good store forwards event:0x06 counters:0,1 um:segment_reg_loads minimum:6000 name:SEGMENT_REG_LOADS : Number of segment register loads event:0x07 counters:0,1 um:simd_prefetch minimum:6000 name:PREFETCH : Streaming SIMD Extensions (SSE) Prefetch instructions executed event:0x08 counters:0,1 um:data_tlb_misses minimum:6000 name:DATA_TLB_MISSES : Memory accesses that missed the DTLB event:0x0C counters:0,1 um:page_walks minimum:6000 name:PAGE_WALKS : Page walks event:0x10 counters:0,1 um:x87_comp_ops_exe minimum:6000 name:X87_COMP_OPS_EXE : Floating point computational micro-ops event:0x11 counters:0,1 um:fp_assist minimum:6000 name:FP_ASSIST : Floating point assists event:0x12 counters:0,1 um:mul minimum:6000 name:MUL : Multiply operations event:0x13 counters:0,1 um:div minimum:6000 name:DIV : Divide operations event:0x14 counters:0,1 um:one minimum:6000 name:CYCLES_DIV_BUSY : Cycles the driver is busy event:0x21 counters:0,1 um:core minimum:6000 name:CORE : Cycles L2 address bus is in use event:0x22 counters:0,1 um:core minimum:6000 name:L2_DBUS_BUSY : Cycles the L2 cache data bus is busy event:0x24 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_IN : L2 cache misses event:0x25 counters:0,1 um:core minimum:500 name:L2_M_LINES_IN : L2 cache line modifications event:0x26 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_OUT : L2 cache lines evicted event:0x27 counters:0,1 um:core,prefetch minimum:500 name:L2_M_LINES_OUT : Modified lines evicted from the L2 cache event:0x28 counters:0,1 um:core,mesi minimum:6000 name:L2_IFETCH : L2 cacheable instruction fetch requests event:0x29 counters:0,1 um:core,prefetch,mesi minimum:6000 name:L2_LD : L2 cache reads event:0x2A counters:0,1 um:core,mesi minimum:6000 name:L2_ST : L2 store requests event:0x2B counters:0,1 um:core,mesi minimum:6000 name:L2_LOCK : L2 locked accesses event:0x2E counters:0,1 um:l2_rqsts,core,prefetch,mesi minimum:6000 name:L2_RQSTS : L2 cache requests event:0x30 counters:0,1 um:core,prefetch,mesi minimum:500 name:L2_REJECT_BUSQ : Rejected L2 cache requests event:0x32 counters:0,1 um:core minimum:6000 name:L2_NO_REQ : Cycles no L2 cache requests are pending event:0x3A counters:0,1 um:zero minimum:6000 name:EIST_TRANS : Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions event:0x3B counters:0,1 um:thermal_trip minimum:6000 name:THERMAL_TRIP : Number of thermal trips event:0x40 counters:0,1 um:l1d_cache minimum:6000 name:L1D_CACHE : L1d Cache accesses event:0x60 counters:0,1 um:core,agent minimum:6000 name:BUS_REQUEST_OUTSTANDING : Outstanding cacheable data read bus requests duration event:0x61 counters:0,1 um:agent minimum:6000 name:BUS_BNR_DRV : Number of Bus Not Ready signals asserted event:0x62 counters:0,1 um:agent minimum:6000 name:BUS_DRDY_CLOCKS : Bus cycles when data is sent on the bus event:0x63 counters:0,1 um:core,agent minimum:6000 name:BUS_LOCK_CLOCKS : Bus cycles when a LOCK signal is asserted. event:0x64 counters:0,1 um:core minimum:6000 name:BUS_DATA_RCV : Bus cycles while processor receives data event:0x65 counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_BRD : Burst read bus transactions event:0x66 counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_RFO : RFO bus transactions event:0x67 counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_WB : Explicit writeback bus transactions event:0x68 counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_IFETCH : Instruction-fetch bus transactions. event:0x69 counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_INVAL : Invalidate bus transactions event:0x6A counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_PWR : Partial write bus transaction. event:0x6B counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_P : Partial bus transactions event:0x6C counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_IO : IO bus transactions event:0x6D counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_DEF : Deferred bus transactions event:0x6E counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_BURST : Burst (full cache-line) bus transactions. event:0x6F counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_MEM : Memory bus transactions event:0x70 counters:0,1 um:core,agent minimum:500 name:BUS_TRANS_ANY : All bus transactions event:0x77 counters:0,1 um:core,mesi minimum:500 name:EXT_SNOOP : External snoops event:0x7A counters:0,1 um:agent minimum:500 name:BUS_HIT_DRV : HIT signal asserted event:0x7B counters:0,1 um:agent minimum:500 name:BUS_HITM_DRV : HITM signal asserted event:0x7D counters:0,1 um:core minimum:500 name:BUSQ_EMPTY : Bus queue is empty event:0x7E counters:0,1 um:core,agent minimum:6000 name:SNOOP_STALL_DRV : Bus stalled for snoops event:0x7F counters:0,1 um:core minimum:6000 name:BUS_IO_WAIT : IO requests waiting in the bus queue event:0x80 counters:0,1 um:icache minimum:6000 name:ICACHE : Instruction cache accesses event:0x82 counters:0,1 um:itlb minimum:6000 name:ITLB : ITLB events event:0xAA counters:0,1 um:macro_insts minimum:6000 name:MACRO_INSTS : instructions decoded event:0xB0 counters:0,1 um:simd_uops_exec minimum:6000 name:SIMD_UOPS_EXEC : SIMD micro-ops executed event:0xB1 counters:0,1 um:simd_sat_uop_exec minimum:6000 name:SIMD_SAT_UOP_EXEC : SIMD saturated arithmetic micro-ops executed event:0xB3 counters:0,1 um:simd_uop_type_exec minimum:6000 name:SIMD_UOP_TYPE_EXEC : SIMD packed microops executed event:0xC2 counters:0,1 um:uops_retired minimum:6000 name:UOPS_RETIRED : Micro-ops retired event:0xC3 counters:0,1 um:one minimum:6000 name:MACHINE_CLEARS : Self-Modifying Code detected event:0xC6 counters:0,1 um:cycles_int_masked minimum:6000 name:CYCLES_INT_MASKED : Cycles during which interrupts are disabled event:0xC7 counters:0,1 um:simd_inst_retired minimum:6000 name:SIMD_INST_RETIRED : Retired Streaming SIMD Extensions (SSE) instructions event:0xC8 counters:0,1 um:zero minimum:6000 name:HW_INT_RCV : Hardware interrupts received event:0xCA counters:0,1 um:simd_comp_inst_retired minimum:6000 name:SIMD_COMP_INST_RETIRED : Retired computational Streaming SIMD Extensions (SSE) instructions. event:0xCB counters:0,1 um:mem_load_retired minimum:6000 name:MEM_LOAD_RETIRED : Retired loads event:0xCD counters:0,1 um:zero minimum:6000 name:SIMD_ASSIST : SIMD assists invoked event:0xCE counters:0,1 um:zero minimum:6000 name:SIMD_INSTR_RETIRED : SIMD Instructions retired event:0xCF counters:0,1 um:zero minimum:6000 name:SIMD_SAT_INSTR_RETIRED : Saturated arithmetic instructions retired event:0xE0 counters:0,1 um:zero minimum:6000 name:BR_INST_DECODED : Branch instructions decoded event:0xE4 counters:0,1 um:zero minimum:6000 name:BOGUS_BR : Bogus branches event:0xE6 counters:0,1 um:one minimum:6000 name:BACLEARS : BACLEARS asserted oprofile-1.3.0/events/i386/atom/unit_masks0000664000175000017500000001425213124774026015324 00000000000000# # Intel Atom (Silverthorne) unit masks # include:i386/arch_perfmon name:store_forwards type:mandatory default:0x81 0x81 extra: good Good store forwards name:segment_reg_loads type:mandatory default:0x00 0x00 extra: any Number of segment register loads name:simd_prefetch type:bitmask default:0x01 0x01 extra: prefetcht0 Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed 0x06 extra: sw_l2 Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed 0x08 extra: prefetchnta Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed name:data_tlb_misses type:bitmask default:0x07 0x07 extra: dtlb_miss Memory accesses that missed the DTLB 0x05 extra: dtlb_miss_ld DTLB misses due to load operations 0x09 extra: l0_dtlb_miss_ld L0_DTLB misses due to load operations 0x06 extra: dtlb_miss_st DTLB misses due to store operations name:page_walks type:bitmask default:walks 0x03 extra:edge walks Number of page-walks executed 0x03 extra: cycles Duration of page-walks in core cycles name:x87_comp_ops_exe type:bitmask default:0x81 0x01 extra: s Floating point computational micro-ops executed 0x81 extra: ar Floating point computational micro-ops retired name:fp_assist type:mandatory default:0x81 0x81 extra: ar Floating point assists name:mul type:bitmask default:0x01 0x01 extra: s Multiply operations executed 0x81 extra: ar Multiply operations retired name:div type:bitmask default:0x01 0x01 extra: s Divide operations executed 0x81 extra: ar Divide operations retired name:l2_rqsts type:bitmask default:0x41 0x41 extra: i_state L2 cache demand requests from this core that missed the L2 0x4F mesi L2 cache demand requests from this core name:cpu_clk_unhalted type:bitmask default:0x00 0x00 extra: core_p Core cycles when core is not halted 0x01 extra: bus Bus cycles when core is not halted 0x02 extra: no_other Bus cycles when core is active and the other is halted name:l1d_cache type:bitmask default:0x21 0x21 extra: ld L1 Cacheable Data Reads 0x22 extra: st L1 Cacheable Data Writes name:icache type:bitmask default:0x03 0x03 extra: accesses Instruction fetches 0x02 extra: misses Icache miss name:itlb type:bitmask default:0x04 0x04 extra: flush ITLB flushes 0x02 extra: misses ITLB misses name:macro_insts type:exclusive default:0x03 0x02 extra: cisc_decoded CISC macro instructions decoded 0x03 extra: all_decoded All Instructions decoded name:simd_uops_exec type:exclusive default:0x80 0x00 extra: s SIMD micro-ops executed (excluding stores) 0x80 extra: ar SIMD micro-ops retired (excluding stores) name:simd_sat_uop_exec type:bitmask default:0x00 0x00 extra: s SIMD saturated arithmetic micro-ops executed 0x80 extra: ar SIMD saturated arithmetic micro-ops retired name:simd_uop_type_exec type:bitmask default:0x01 0x01 extra: s SIMD packed multiply microops executed 0x81 extra: ar SIMD packed multiply microops retired 0x02 extra: s SIMD packed shift micro-ops executed 0x82 extra: ar SIMD packed shift micro-ops retired 0x04 extra: s SIMD pack micro-ops executed 0x84 extra: ar SIMD pack micro-ops retired 0x08 extra: s SIMD unpack micro-ops executed 0x88 extra: ar SIMD unpack micro-ops retired 0x10 extra: s SIMD packed logical microops executed 0x90 extra: ar SIMD packed logical microops retired 0x20 extra: s SIMD packed arithmetic micro-ops executed 0xA0 ar SIMD packed arithmetic micro-ops retired name:uops_retired type:mandatory default:0x10 0x10 extra: any Micro-ops retired name:br_inst_retired type:bitmask default:0x00 0x00 extra: any Retired branch instructions 0x01 extra: pred_not_taken Retired branch instructions that were predicted not-taken 0x02 extra: mispred_not_taken Retired branch instructions that were mispredicted not-taken 0x04 extra: pred_taken Retired branch instructions that were predicted taken 0x08 extra: mispred_taken Retired branch instructions that were mispredicted taken 0x0A mispred Retired mispredicted branch instructions (precise event) 0x0C taken Retired taken branch instructions 0x0F any1 Retired branch instructions name:cycles_int_masked type:bitmask default:0x01 0x01 extra: cycles_int_masked Cycles during which interrupts are disabled 0x02 extra: cycles_int_pending_and_masked Cycles during which interrupts are pending and disabled name:simd_inst_retired type:bitmask default:0x01 0x01 extra: packed_single Retired Streaming SIMD Extensions (SSE) packed-single instructions 0x02 extra: scalar_single Retired Streaming SIMD Extensions (SSE) scalar-single instructions 0x04 extra: packed_double Retired Streaming SIMD Extensions 2 (SSE2) packed-double instructions 0x08 extra: scalar_double Retired Streaming SIMD Extensions 2 (SSE2) scalar-double instructions 0x10 extra: vector Retired Streaming SIMD Extensions 2 (SSE2) vector instructions 0x1F any Retired Streaming SIMD instructions name:simd_comp_inst_retired type:bitmask default:0x01 0x01 extra: packed_single Retired computational Streaming SIMD Extensions (SSE) packed-single instructions 0x02 extra: scalar_single Retired computational Streaming SIMD Extensions (SSE) scalar-single instructions 0x04 extra: packed_double Retired computational Streaming SIMD Extensions 2 (SSE2) packed-double instructions 0x08 extra: scalar_double Retired computational Streaming SIMD Extensions 2 (SSE2) scalar-double instructions name:mem_load_retired type:bitmask default:0x01 0x01 extra: l2_hit Retired loads that hit the L2 cache (precise event) 0x02 extra: l2_miss Retired loads that miss the L2 cache (precise event) 0x04 extra: dtlb_miss Retired loads that miss the DTLB (precise event) name:thermal_trip type:mandatory default:0xc0 0xc0 extra: thermal_trip Number of thermal trips. # 18-11 name:core type:bitmask default:0x180 0x180 extra: all All cores. 0x080 extra: this This Core. # 18-12 name:agent type:bitmask default:0x00 0x00 extra: this This agent 0x40 extra: any Include any agents # 18-13 name:prefetch type:bitmask default:0x60 0x60 extra: all All inclusive 0x20 extra: hw Hardware prefetch only 0x00 extra: exclude_hw Exclude hardware prefetch # 18-14 name:mesi type:bitmask default:0x0f 0x08 extra: modified Counts modified state 0x04 extra: exclusive Counts exclusive state 0x02 extra: shared Counts shared state 0x01 extra: invalid Counts invalid state oprofile-1.3.0/events/ppc/0000775000175000017500000000000013323173530012423 500000000000000oprofile-1.3.0/events/ppc/e6500/0000775000175000017500000000000013323173530013162 500000000000000oprofile-1.3.0/events/ppc/e6500/events0000664000175000017500000011451012534404406014335 00000000000000# e6500 Events # # Copyright (C) 2012 Freescale Semiconductor, Inc. # event:0x1 counters:0,1,2,3,4,5 um:zero minimum:100 name:CPU_CLK : Cycles event:0x2 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_INSNS : Completed Instructions (0, 1, or 2 per cycle) event:0x3 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_OPS : Completed Micro-ops event:0x5 counters:0,1,2,3,4,5 um:zero minimum:500 name:DECODED_OPS : Micro-ops decoded event:0x6 counters:0,1,2,3,4,5 um:zero minimum:500 name:TRANSITIONS_PM_EVENT : 0 to 1 transitions on the pm_event input event:0x7 counters:0,1,2,3,4,5 um:zero minimum:500 name:CPU_CLK_PM_EVENT : Processor cycles that occur when the pm_event input is asserted event:0x8 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_BRANCHES : Branch Instructions completed event:0x9 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_LOAD_OPS : Load micro-ops completed event:0xa counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_STORE_OPS : Store micro-ops completed event:0xb counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETION_REDIRECTS : Number of completion buffer redirects event:0xc counters:0,1,2,3,4,5 um:zero minimum:500 name:BRANCHES_FINISHED : Branches finished event:0xd counters:0,1,2,3,4,5 um:zero minimum:500 name:TAKEN_BRANCHES_FINISHED : Taken branches finished event:0xe counters:0,1,2,3,4,5 um:zero minimum:500 name:TAKEN_BRANCHES_FINISHED_NOT_BTB : Finished unconditional branches that miss the BTB event:0xf counters:0,1,2,3,4,5 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch instructions mispredicted due to direction, target, or IAB prediction event:0x10 counters:0,1,2,3,4,5 um:zero minimum:500 name:BRANCHES_MISPREDICTED_DIRECTION : Branches mispredicted due to direction prediction event:0x11 counters:0,1,2,3,4,5 um:zero minimum:500 name:BTB_HITS : Branches that hit in the BTB, or missed but are not taken event:0x12 counters:0,1,2,3,4,5 um:zero minimum:500 name:DECODE_STALLED : Cycles the instruction buffer was not empty, but 0 instructions decoded event:0x13 counters:0,1,2,3,4,5 um:zero minimum:500 name:ISSUE_STALLED : Cycles the SFX/CFX issue queue is not empty but 0 instructions issued event:0x14 counters:0,1,2,3,4,5 um:zero minimum:500 name:BRANCH_ISSUE_STALLED : Cycles the branch buffer is not empty but 0 instructions issued event:0x15 counters:0,1,2,3,4,5 um:zero minimum:500 name:SFX0_SCHEDULE_STALLED : Cycles SFX0 is not empty but 0 instructions scheduled event:0x16 counters:0,1,2,3,4,5 um:zero minimum:500 name:SFX1_SCHEDULE_STALLED : Cycles SFX1 is not empty but 0 instructions scheduled event:0x17 counters:0,1,2,3,4,5 um:zero minimum:500 name:CFX_SCHEDULE_STALLED : Cycles CFX is not empty but 0 instructions scheduled event:0x18 counters:0,1,2,3,4,5 um:zero minimum:500 name:LSU_SCHEDULE_STALLED : Cycles LSU is not empty but 0 instructions scheduled event:0x19 counters:0,1,2,3,4,5 um:zero minimum:500 name:BU_SCHEDULE_STALLED : Cycles BU is not empty but 0 instructions scheduled event:0x1a counters:0,1,2,3,4,5 um:zero minimum:500 name:TOTAL_TRANSLATED : Total LSU micro-ops that reach the second stage of the LSU event:0x1b counters:0,1,2,3,4,5 um:zero minimum:500 name:LOADS_TRANSLATED : Cacheable load micro-ops translated.1 (Does not include WT) event:0x1c counters:0,1,2,3,4,5 um:zero minimum:500 name:STORES_TRANSLATED : Cacheable store micro-ops translated.1 (Does not include WT) event:0x1d counters:0,1,2,3,4,5 um:zero minimum:500 name:TOUCHES_TRANSLATED : Cacheable touch instructions translated. Includes: dcbt / dcbtep dcbtst / dcbtstep icbt ct=2 event:0x1e counters:0,1,2,3,4,5 um:zero minimum:500 name:CACHEOPS_TRANSLATED : Number of dcba, dcbf, dcbst, and dcbz instructions translated (e500 traps on dcbi) event:0x1f counters:0,1,2,3,4,5 um:zero minimum:500 name:CACHEINHIBITED_ACCESSES_TRANSLATED : Number of cache inhibited accesses translated event:0x20 counters:0,1,2,3,4,5 um:zero minimum:500 name:GUARDED_LOADS_TRANSLATED : Number of guarded loads translated event:0x21 counters:0,1,2,3,4,5 um:zero minimum:500 name:WRITETHROUGH_STORES_TRANSLATED : Number of write-through stores translated event:0x22 counters:0,1,2,3,4,5 um:zero minimum:500 name:MISALIGNED_ACCESSES_TRANSLATED : Number of misaligned load or store accesses translated. event:0x23 counters:0,1,2,3,4,5 um:zero minimum:500 name:FETCH_2X4_HITS : Each fetch retrieves up to 8 instructions, but only the first 4 are required. This event increments if at least one instruction of the second 4 are actually used. event:0x24 counters:0,1,2,3,4,5 um:zero minimum:500 name:FETCH_HITS_ON_PREFETCHES : Fetch hits on instruction prefetch when the data is still in the ILFB. event:0x25 counters:0,1,2,3,4,5 um:zero minimum:500 name:GENERATED_FETCH_PREFETCHES : Number of prefetches generated. event:0x29 counters:0,1,2,3,4,5 um:zero minimum:500 name:DL1_RELOADS : This is historically used to determine dcache miss rate (along with loads/stores completed). This counts dL1 reloads for any reason. event:0x2c counters:0,1,2,3,4,5 um:zero minimum:500 name:LOAD_MISS_WITH_LOAD_QUEUE_FULL : Counts number of stalls; Com:52 counts cycles stalled. Includes: cacheable loads, CI loads, loadec, larx, touches, ibll, ibsl,ibllsl event:0x2d counters:0,1,2,3,4,5 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_REPLAYS : Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x2e counters:0,1,2,3,4,5 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_REPLAYS : Translate a store when the StQ is full. event:0x2f counters:0,1,2,3,4,5 um:zero minimum:500 name:ADDRESS_COLLISION_REPLAYS : Address collision. event:0x30 counters:0,1,2,3,4,5 um:zero minimum:500 name:DTLB_MISS_REPLAYS : Counts number of stalls; Com:56 counts cycles stalled. event:0x31 counters:0,1,2,3,4,5 um:zero minimum:500 name:DTLB_BUSY_REPLAYS : Counts number of stalls; Com:57 counts cycles stalled. event:0x32 counters:0,1,2,3,4,5 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_REPLAYS : Second part of misaligned access when first part missed in cache. event:0x34 counters:0,1,2,3,4,5 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Load miss with load queue full. event:0x35 counters:0,1,2,3,4,5 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_CYCLES : Cycles stalled on replay condition - Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x36 counters:0,1,2,3,4,5 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Translate a store when the StQ is full. event:0x37 counters:0,1,2,3,4,5 um:zero minimum:500 name:ADDRESS_COLLISION_CYCLES : Cycles stalled on replay condition - Address collision. event:0x38 counters:0,1,2,3,4,5 um:zero minimum:500 name:DTLB_MISS_CYCLES : Cycles stalled on replay condition - DTLB miss. event:0x39 counters:0,1,2,3,4,5 um:zero minimum:500 name:DTLB_BUSY_CYCLES : Cycles stalled on replay condition - DTLB busy. event:0x3a counters:0,1,2,3,4,5 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES : Cycles stalled on replay condition - Second part of misaligned access when first part missed in cache. event:0x3c counters:0,1,2,3,4,5 um:zero minimum:500 name:IL1_FETCH_RELOADS : This is historically used to determine icache miss rate (along with instructions completed) Reloads due to demand fetch. event:0x3d counters:0,1,2,3,4,5 um:zero minimum:500 name:FETCHES : Counts fetches that write at least one instruction to the Instruction Buffer. event:0x3e counters:0,1,2,3,4,5 um:zero minimum:500 name:IMMU_TLB4K_RELOADS : iMMU TLB4K reloads event:0x3f counters:0,1,2,3,4,5 um:zero minimum:500 name:IMMU_VSP_RELOADS : iMMU VSP reloads event:0x40 counters:0,1,2,3,4,5 um:zero minimum:500 name:DMMU_TLB4K_RELOADS : dMMU TLB4K reloads event:0x41 counters:0,1,2,3,4,5 um:zero minimum:500 name:DMMU_VSP_RELOADS : dMMU VSP reloads event:0x42 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2MMU_MISSES : Counts iTLB/dTLB error interrupt event:0x43 counters:0,1,2,3,4,5 um:zero minimum:500 name:TAKEN_BRANCHES : Completed branch instructions that were taken. event:0x44 counters:0,1,2,3,4,5 um:zero minimum:500 name:TAKEN_BLR : Completed blr instructions that were taken. event:0x45 counters:0,1,2,3,4,5 um:zero minimum:500 name:BTB_TARGET_MISPREDICT : Number of target mispredicts (BTB). event:0x46 counters:0,1,2,3,4,5 um:zero minimum:500 name:MISPREDICT_TARGET_BLR : Number of link stack mispredicts (LS). event:0x47 counters:0,1,2,3,4,5 um:zero minimum:500 name:TAKEN_BTB_BUT_MISS : Number of BTB misses, but taken (BTB allocates). event:0x52 counters:0,1,2,3,4,5 um:zero minimum:500 name:PMC0_OVERFLOW : Counts the number of times PMC0[32] transitioned from 1 to 0. event:0x53 counters:0,1,2,3,4,5 um:zero minimum:500 name:PMC1_OVERFLOW : Counts the number of times PMC1[32] transitioned from 1 to 0. event:0x54 counters:0,1,2,3,4,5 um:zero minimum:500 name:PMC2_OVERFLOW : Counts the number of times PMC2[32] transitioned from 1 to 0. event:0x55 counters:0,1,2,3,4,5 um:zero minimum:500 name:PMC3_OVERFLOW : Counts the number of times PMC3[32] transitioned from 1 to 0. event:0x56 counters:0,1,2,3,4,5 um:zero minimum:500 name:INTERRUPTS : Number of interrupts taken event:0x57 counters:0,1,2,3,4,5 um:zero minimum:500 name:EXTERNAL_INTERRUPTS : Number of external input interrupts taken event:0x58 counters:0,1,2,3,4,5 um:zero minimum:500 name:CRITICAL_INTERRUPTS : Number of critical input interrupts taken event:0x59 counters:0,1,2,3,4,5 um:zero minimum:500 name:SC_TRAP_INTERRUPTS : Number of system call and trap interrupts event:0x5a counters:0,1,2,3,4,5 um:zero minimum:500 name:TBL_BIT_TRANS_PMGC0 : Counts transitions of the TBL bit selected by PMGC0[TBSEL]. event:0x5b counters:0,1,2,3,4,5 um:zero minimum:500 name:PMC4_OVERFLOW : Counts the number of times PMC4[32] transitioned from 1 to 0. event:0x5c counters:0,1,2,3,4,5 um:zero minimum:500 name:PMC5_OVERFLOW : Counts the number of times PMC5[32] transitioned from 1 to 0. event:0x61 counters:0,1,2,3,4,5 um:zero minimum:500 name:L1_STASH_HIT : Stash hits in L1 Data Cache. event:0x63 counters:0,1,2,3,4,5 um:zero minimum:500 name:L1_STASH_REQ : Stash requests to L1 Data Cache. event:0x64 counters:0,1,2,3,4,5 um:zero minimum:500 name:TIMES_LSU_THREAD_PRIO_SWTICHED : Number of times the Load Store Unit thread priority switched based on resource collisions. event:0x65 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_THREAD_REQ_FPU_DENIED : Number of cycles both threads had Floating Point Unit requests and one was denied. event:0x66 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_THREAD_REQ_VPERM_DENIED : Number of cycles both threads had Altivec Permute requests and one was denied. event:0x67 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_THREAD_REQ_VGEN_DENIED : Number of cycles both threads had Altivec General requests and one was denied. event:0x68 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_THREAD_REQ_CFX_DENIED : Number of cycles both threads had Complex Fixed-Point Unit requests and one was denied. event:0x69 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_THREAD_REQ_FETCH_DENIED : Number of cycles both threads both threads made a Fetch request to the L1 Instruction Cache and one thread wins arbitration. event:0x6e counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_LSU_ISSUE_STALLED : Cycles the LSU issue queue is not empty but 0 instructions issued. event:0x6f counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_FPU_ISSUE_STALLED : Cycles the FPU issue queue is not empty but 0 instructions issued. event:0x70 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_ALTIVEC_ISSUE_STALLED : Cycles the AltiVec issue queue is not empty but 0 instructions issued. event:0x71 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_FPU_SCHEDULE_STALLED : Cycles FPU is not empty but 0 instructions scheduled. event:0x72 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VPERM_SCHEDULE_STALLED : Cycles VPERM is not empty but 0 instructions scheduled. event:0x73 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VGEN_SCHEDULE_STALLED : Cycles VGEN is not empty but 0 instructions scheduled. event:0x74 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VPU_INSTRUCTION_WAIT_FOR_OPERA : Cycles VPU instruction waits for operands. event:0x75 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VFPU_INSTRUCTION_WAIT_FOR_OPERA : Cycles VFPU instruction waits for operands. event:0x76 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VSFX_INSTRUCTION_WAIT_FOR_OPERA : Cycles VSFX instruction waits for operands event:0x77 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VCFX_INSTRUCTION_WAIT_FOR_OPERA : Cycles VCFX instruction waits for operands. event:0x7a counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_IB_EMPT : Number of cycles the Instruction Buffer is empty event:0x7b counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_IB_FULL : Number of cycles the Instruction Buffer is full enough such that fetch stops fetching. event:0x7c counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_CB_EMPT : Number of cycles the Completion Buffer is empty. event:0x7d counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_CB_FULL : Number of cycles the Completion Buffer is full enough such that decode stops. event:0x7e counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_PRESYNC_SI_IB : Number of cycles a pre-sync serialized instruction holds in the Instruction Buffer and is not decoded. event:0x7f counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_CLK_0_INSTRUCTIONS : Increments if 0 instructions (micro-ops) completed. event:0x80 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_CLK_1_INSTRUCTIONS : Increments if 1 instruction (micro-op) completed. event:0x80 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_CLK_2_INSTRUCTIONS : Increments if 2 instructions (micro-op) completed. event:0x88 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC5S : Every valid IAC5 detection. event:0x89 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC6S : Every valid IAC6 detection. event:0x8a counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC7S : Every valid IAC7 detection. event:0x8b counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC8S : Every valid IAC8 detection. event:0x8c counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC1S : Every valid IAC1 detection. event:0x8d counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC2S : Every valid IAC2 detection. event:0x8e counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC3S : Every valid IAC3 detection. event:0x8f counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_IAC4S : Every valid IAC4 detection. event:0x90 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DAC1S : Every valid DAC1 detection. event:0x91 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DAC2S : Every valid DAC2 detection. event:0x94 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT0 : Detection of a write to DEVENT SPR with DVT0 set. event:0x95 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT1 : Detection of a write to DEVENT SPR with DVT1 set. event:0x96 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT2 : Detection of a write to DEVENT SPR with DVT2 set. event:0x97 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT3 : Detection of a write to DEVENT SPR with DVT3 set. event:0x98 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT4 : Detection of a write to DEVENT SPR with DVT4 set. event:0x99 counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT5 : Detection of a write to DEVENT SPR with DVT5 set. event:0x9a counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT6 : Detection of a write to DEVENT SPR with DVT6 set. event:0x9b counters:0,1,2,3,4,5 um:zero minimum:500 name:DETECTED_DVT7 : Detection of a write to DEVENT SPR with DVT7 set. event:0x9c counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_COMPLETION_STALLED : Number of completion cycles stalled due to Nexus FIFO full. event:0xa1 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_FINISH : FPU finish. event:0xa2 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_FPU_DIV : Counts once for every cycle of divide execution. (fdivs and fdiv). event:0xa3 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_DENORM_INPUT : Counts extra cycles delay due to denormalized inputs. If there is one, this is incremented 4 times, Two operands increments it 5 times. This shows the real penalty due to denorms, not just how often they occur. event:0xa4 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_DENORM_OUTPUT : FPU denorm output. event:0xa5 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_FPSCR_FULL_STALL : FPU FPSCR stall. event:0xa6 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_PIPE_SYNC_STALL : Synchronization-op stalls: count once for each cycle that a ��break-before�� FPU is in the RS/issue stage but cannotissue. Also count once for each cycle that an FPU op is in the RS/issue stage but cannot issue due to ��break-after��: of an FPU op currently in progress. event:0xa7 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_INPUT_DATA_STALL : FPU data-ready stall: cycles in which there is an op in the RS/issue stage that cannot issue because one or more of its operands is not yet available. event:0xa8 counters:0,1,2,3,4,5 um:zero minimum:500 name:FPU_INSTRUCTIONS_GEN_FLAG : FPU instruction sets FPSCR[FEX]. event:0xac counters:0,1,2,3,4,5 um:zero minimum:500 name:PW20_CNT : Number of times the core enters the PW20 power management state. event:0xb0 counters:0,1,2,3,4,5 um:zero minimum:500 name:DECORATED_LOADS : Number of decorated loads to cache inhibited memory performed. event:0xb1 counters:0,1,2,3,4,5 um:zero minimum:500 name:DECORATED_STORES : Number of decorated stores to cache inhibited memory performed. event:0xb3 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_INSTRUCTIONS_SUCC : Number of successful stbcx., sthcx., stwcx., or stdcx. instructions. event:0xb4 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_INSTRUCTIONS_UNSUCC : Number of unsuccessful stbcx., sthcx., stwcx., or stdcx. instructions. event:0xb5 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_LSU_MICROOPS : Completed Load Store Unit micro-ops. Every micro-op that goes down the LSU pipe. Includes: GPR loads / GPR stores, FPR loads / FPR stores, VR loads / VR stores, Cache ops. Memory barriers Other LSU ops (dsn, msgsnd, mvidsplt, mviwsplt, tlbilx, tlbivax, tlbsync) event:0xb6 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_GPR_LOADS : GPR load micro-ops completed. This event only counts once for misaligns. Note that lmw that causes a fault may end up double-counting micro-ops -- once for first pass, once for second pass. event:0xb7 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_GPR_STORES : GPR store micro-ops completed. This event only counts once for misaligns. Note that stmw that causes a fault may end up double-counting micro-ops -- once for first pass, once for second pass. event:0xb8 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_CACHEOPS : Cache ops completed. Includes: dcba / dcbal, dcbf / dcbfep, dcbi, dcblc / dcblq, dcbst / dcbstep, dcbt / dcbtep / dcbtls, dcbtst / dcbtstep / dcbtstls, dcbz / dcbzep / dcbzl / dcbzlep, icbi / icbiep, icblc / icblq., icbt / icbtls event:0xb9 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_MEM_BARRIERS : Memory barriers completed. Includes: msync (sync, lwsync, elemental barriers) mbar (eieio) miso. event:0xba counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_SFX_MICROOPS : SFX micro-ops completed. event:0xbb counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_SINCLK_SFX_MICROOPS : SFX single-cycle micro-ops completed. event:0xbc counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_DBLCLK_SFX_MICROOPS : SFX double-cycle micro-ops completed. event:0xbe counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_CFX_INSTRUCTIONS : CFX instructions completed. event:0xbf counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_SFX_CFX_INSTRUCTIONS : SFX or CFX instructions completed. event:0xc0 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_FPU_INSTRUCTIONS : FPU instructions completed. event:0xc1 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_FPR_MICROOPS_LOADS : FPR load micro-ops completed. event:0xc2 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_FPR_MICROOPS_STORES : FPR store micro-ops completed. event:0xc3 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_FPR_MICROOPS_LOADS_STORES : FPR load and store micro-ops completed. event:0xc4 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_FPR_SINPRECISE_LOADS_STORES : FPR single-precision load and store micro-ops completed. event:0xc5 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_FPR_DBLPRECISE_LOADS_STORES : FPR double-precision load and store micro-ops completed. event:0xc6 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_ALTIVEC_INSTRUCTIONS : AltiVec instructions completed. (non-LSU). event:0xc7 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_ALTIVEC_VSFX_INSTRUCTIONS : AltiVec VSFX instructions completed. event:0xc8 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_ALTIVEC_VCFX_INSTRUCTIONS : AltiVec VCFX instructions completed. event:0xc9 counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_ALTIVEC_VPU_INSTRUCTIONS : AltiVec VPU instructions completed. event:0xca counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_ALTIVEC_VFPU_INSTRUCTIONS : AltiVec VFPU instructions completed. event:0xcb counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_VR_LOADS_MICROOPS : VR load micro-ops completed. event:0xcc counters:0,1,2,3,4,5 um:zero minimum:500 name:COMPLETED_VR_STORES_MICROOPS : VR store micro-ops completed. event:0xcd counters:0,1,2,3,4,5 um:zero minimum:500 name:VSCR_SAT_SET : Number of times the saturate bit flips from 0 to 1. event:0xd2 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_SFX0_IDLE : Cycles Simple Fixed Point Unit 0 is idle. event:0xd3 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_SFX1_IDLE : Cycles Simple Fixed Point Unit 1 is idle. event:0xd4 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_CFX_IDLE : Cycles Complex Fixed Point Unit is idle. event:0xd5 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_LSU_IDLE : Cycles Load Store Unit is idle. event:0xd6 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_BU_IDLE : Cycles Branch Unit is idle. event:0xd7 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_FPU_IDLE : Cycles Floating Point Unit is idle. event:0xd8 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VPU_IDLE : Cycles AltiVec Permute Unit is idle. event:0xd9 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VFPU_IDLE : Cycles AltiVec Floating Point Unit is idle. event:0xda counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VSFX_IDLE : Cycles AltiVec Simple Fixed Point Unit is idle. event:0xdb counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_VCFX_IDLE : Cycles AltiVec Complex Fixed Point Unit is idle. event:0xdd counters:0,1,2,3,4,5 um:zero minimum:500 name:L1_CACHE_MISSES : Data L1 cache misses. (Includes load, store, cache ops). event:0xde counters:0,1,2,3,4,5 um:zero minimum:500 name:L1_CACHE_LOAD_MISSES : Data L1 cache load misses. event:0xdf counters:0,1,2,3,4,5 um:zero minimum:500 name:L1_CACHE_STORE_MISSES : Data L1 cache store misses. event:0xe0 counters:0,1,2,3,4,5 um:zero minimum:500 name:LMQ_ALLOCATED_LOADS : Loads that allocate into Load Miss Queue. (Data L1 cache misses, but may not be to different cache lines). event:0xe1 counters:0,1,2,3,4,5 um:zero minimum:500 name:LOAD_THREAD_MISS_COLLISION : Number of times that this thread��s load hits a line that is valid for the other thread but not this thread. event:0xe2 counters:0,1,2,3,4,5 um:zero minimum:500 name:INTERTHREAD_STATUS_ARRAY_COLLISION : Number of times that two threads collide on status array access. event:0xe3 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_ALLOC : Number of Store Gather Buffer allocates. event:0xe4 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_GATHERS : Number of Store Gather Buffer gathers. event:0xe5 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_OVERFLOWS : Number of Store Gather Buffer overflows. (Causes SGB full condition when additional store request is made). event:0xe6 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_PROMOTIONS : Number of Store Gather Buffer promotions. event:0xe7 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_INORDER_PROMOTIONS : Number of Store Gather Buffer in-order promotions. (Also includes oldest-entry timeout condition). event:0xe8 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_OUTOFORDER_PROMOTIONS : Number of Store Gather Buffer out-of-order promotions. event:0xe9 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_HP_PROMOTIONS : Number of Store Gather Buffer high-priority promotions. (Load hits on pending store). event:0xea counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_MISO_PROMOTIONS : Number of Store Gather Buffer miso promotions. promotions. (Load hits on pending store). event:0xeb counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_WATERMARK_PROMOTIONS : Number of Store Gather Buffer watermark promotions. event:0xec counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_SGB_OVERFLOW_PROMOTIONS : Number of Store Gather Buffer overflow promotions. event:0xed counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_DLAQ_FULL : Number of cycles the DLink Age Queue is full. event:0xee counters:0,1,2,3,4,5 um:zero minimum:500 name:TIMES_DLAQ_FULL : Number of times the DLink Age Queue is full. event:0xef counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_LRSAQ_FULL : Number of cycles the Load Reservation Set Age Queue is full. event:0xf0 counters:0,1,2,3,4,5 um:zero minimum:500 name:TIMES_LRSAQ_FULL : Number of times the Load Reservation Set Age Queue is full. event:0xf1 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_FWDAQ_FULL : Number of cycles the Forward Age Queue is full. event:0xf2 counters:0,1,2,3,4,5 um:zero minimum:500 name:TIMES_FWDAQ_FULL : Number of times the Forward Age Queue is full. event:0xf3 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FWD_STQ_COLLISION_TIMES : Number of times a Store Queue collision is forwardable. The following cases are not forwardable: store address + size does not contain the load, cache-inhibited store, denormalized, floating point store, stcx, guarded load. event:0xf4 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FWD_STQ_COLLISION_TIMES_DATA_RDY : Number of times a Store Queue collision is forwardable and is ready with data to forward. event:0xf5 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FWD_STQ_COLLISION_TIMES_DATA_NORDY : Number of times a Store Queue collision is forwardable but is not ready with data to forward. event:0xf6 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_NOFWD_STQ_COLLISION_TIMES : Number of times a Store Queue collision is not forwardable and must wait until the store leaves the Store Queue. event:0xf7 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FWD_STQ_COLLISION_CLK : Number of cycles a Store Queue collision is forwardable. (Number of cycles from the detection of a forwardable Store Queue entry until the load is replayed in stg1). event:0xf8 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FWD_STQ_COLLISION_CLK_DATA_RDY : Number of cycles a Store Queue collision is forwardable and is ready with data to forward. (Number of cycles from the detection of a forwardable Store Queue entry with valid data until the load is replayed in stg1). event:0xf9 counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FWD_STQ_COLLISION_CLK_DATA_NORDY : Number of cycles a Store Queue collision is forwardable but is not ready with data to forward. (Number of cycles from the detection of a forwardable Store Queue entry without valid data until the load is replayed in stg1). event:0xfa counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_NOFWD_STQ_COLLISION_CLK : Number of cycles a Store Queue collision is not forwardable and has to wait until the store leaves the Store Queue. (Number of cycles from the detection of a non-forwardable Store Queue entry until the load is replayed in stg1). event:0xfb counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_FALSE_EA_COLLISION : Number of times the lower 12-bits of EA matched but the upper bits did not, leading to a false load-on-store replay. Cycle penalty is 4x the number of times. event:0xfc counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_LSO_BUS_COLLISION : Number of LS0 result bus collisions. Cycle penalty is 3x this measurement. event:0xfd counters:0,1,2,3,4,5 um:zero minimum:500 name:NUM_INTERTHREAD_DBLWORKD_BANK_COLLISION : Number of inter-thread double-word bank collisions. Measures when both threads attempt to access the same double-word bank. Cycle penalty is 3x this measurement. event:0xfe counters:0,1,2,3,4,5 um:zero minimum:500 name:L1_CACHE_IM : Instruction L1 cache demand fetch misses. (Includes icbtls. Does not include prefetch). event:0x100 counters:0,1,2,3,4,5 um:zero minimum:500 name:IMMU_MISSES : Counts misses in the level 1 Instruction MMU. event:0x101 counters:0,1,2,3,4,5 um:zero minimum:500 name:IMMU_TLB4K_HITS : Counts hits in the level 1 Instruction MMU TLB-4K. event:0x102 counters:0,1,2,3,4,5 um:zero minimum:500 name:IMMU_VSP_HITS : Counts hits in the level 1 Instruction MMU VSP. event:0x103 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_IMMU_HW_TABLEWALK : Counts IMMU cycles spent in hardware tablewalk. This represents the cycles from the point where the L2 MMU miss occurs to when the page table walk completes with a valid translation or exception. event:0x104 counters:0,1,2,3,4,5 um:zero minimum:500 name:DMMU_MISSES : Counts misses in the level 1 Data MMU. (Does not count replayed operations). event:0x105 counters:0,1,2,3,4,5 um:zero minimum:500 name:DMMU_TLB4K_HITS : Counts hits in the level 1 Data MMU TLB-4K. (Does not count replayed operations). event:0x106 counters:0,1,2,3,4,5 um:zero minimum:500 name:DMMU_VSP_HITS : Counts hits in the level 1 Data MMU VSP. (Does not count replayed operations). event:0x107 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_DMMU_HW_TABLEWALK : Counts DMMU cycles spent in hardware tablewalk. This represents the cycles from the point where the L2 MMU miss occurs to when the page table walk completes with a valid translation or exception. event:0x108 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2MMU_MISSES : Counts level 2 MMU misses. (Does not count misses that occur due to dcbt / dcbtst / dcba / dcbal instructions that fail translation and are no-oped. Does not count misses in L2MMU-VSP when looking up an indirect entry). event:0x109 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2MMU_4K_HITS : Counts level 2 MMU hits in L2MMU-4K. event:0x10a counters:0,1,2,3,4,5 um:zero minimum:500 name:L2MMU_VSP_HITS : Counts level 2 MMU hits in L2MMU-VSP. (Does not count indirect lookups). event:0x10b counters:0,1,2,3,4,5 um:zero minimum:500 name:L2MMU_INDIRECT_MISSES : Counts level 2 MMU indirect misses. This represents indirect entry lookups that do not have a matching indirect entry. event:0x10c counters:0,1,2,3,4,5 um:zero minimum:500 name:L2MMU_INDIRECT_VALID_MISSES : Counts level 2 MMU indirect valid misses. This occurts when the indirect entry is valid, but the corresponding PTE[V] = 0 or the premissions in the PTE are not sufficient for the requested access. event:0x10d counters:0,1,2,3,4,5 um:zero minimum:500 name:LRAT_MISSES : Counts Logical to Real Address Translation misses. This includes LRAT misses from tlbwe instructions or from page table translations. event:0x110 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_LMQ_LOSE_DLINK_DUE_SGB : Cycles the Load Miss Queue loses DLINK arbitration due to the Store Gather Buffer. event:0x111 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_SGB_LOSE_DLINK_DUE_LMQ : Cycles the Store Gather Buffer loses DLINK arbitration due to the Load Miss Queue. event:0x112 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_THREAD_LOSE_DLINK_DUE_OTHER_THREAD : Cycles thread loses DLINK arbitration due to other thread: Cycles thread loses DLINK arbitration due to other thread. event:0x116 counters:0,1,2,3,4,5 um:zero minimum:500 name:DECODE_MASK_VALUE : One mask/value pair that allows instructions to be counted in Decode. event:0x1bb counters:0,1,2,3,4,5 um:zero minimum:500 name:SHR_L2_DLINK_REQ : Number of DLINK requests made from core to Shared L2. event:0x1bc counters:0,1,2,3,4,5 um:zero minimum:500 name:SHR_L2_ILINK_REQ : Number of ILINK requests made from core to Shared L2. (Includes instruction fetches and L2MMU hardware tablewalk requests). event:0x1bd counters:0,1,2,3,4,5 um:zero minimum:500 name:SHR_L2_RLINK_REQ : Number of RLINK requests made from Shared L2 to core. (back invalidates, stashes, barriers). event:0x1be counters:0,1,2,3,4,5 um:zero minimum:500 name:SHR_L2_BLINK_REQ : Number of BLINK requests made from Shared L2 to core. (back invalidates, stashes, barriers). event:0x1bf counters:0,1,2,3,4,5 um:zero minimum:500 name:SHR_L2_CLINK_REQ : Number of CLINK requests made from Shared L2 to core. (back invalidates, stashes, barriers). event:0x1c8 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_HITS : Number of L2 Cache hits. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1c9 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_MISSES : Number of L2 Cache hits. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1ca counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_DEMAND_ACCESS : Number of L2 Cache demand accesses. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1cb counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_ACCESSES : Number of L2 Cache accesses from all sources (demand, reload, snoop, etc). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1cc counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_STORE_ALLOCATE : Number of L2 Cache store allocates. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1cd counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_INSTRUCTIONS_ACCESS : Number of L2 Cache instruction accesses. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1ce counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_DATA_ACCESS : Number of L2 Cache data accesses. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1cf counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_INSTRUCTIONS_MISSES : Number of L2 Cache instruction misses. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d0 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_DATA_MISSES : Number of L2 Cache data misses. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d1 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_HITS_PER_THREAD : Number of times this core/thread hits in the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d2 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_MISSES_PER_THREAD : Number of times this core/thread misses in the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d3 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_DEMAND_ACCESS_PER_THREAD : Number of times this core/thread makes a demand access to the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d4 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_STORE_ALLOC_PER_THREAD : Number of times a store from this core/thread allocates in the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d5 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_INSTRUCTIONS_ACCESS_PER_THREAD : Number of times an instruction from this core/thread accesses the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d6 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_DATA_ACCESS_PER_THREAD : Number of times a data operation from this core/thread accesses the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d7 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_INSTRUCTION_MISSES_PER_THREAD : Number of times an instruction from this core/thread misses in the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d8 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_DATA_MISSES_PER_THREAD : Number of times a data operation from this core/thread misses in the L2 Cache. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1d9 counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_RELOAD_FROM_CORENET : Number of L2 Cache reloads from CoreNet. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1da counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_IN_STASH_REQ : Number of incoming L2 Cache stash requests. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1db counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_STASH_REQ_DOWNGRD_TO_SNOOPS : Number of incoming L2 Cache stash requests downgraded to snoops. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1dc counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_SNOOPS_HITS : Number of L2 Cache snoop hits. Counts 0, 1, 2, 3, or 4 per cycle. event:0x1dd counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_SNOOPS_MINT : Number of L2 Cache snoops causing MINT. event:0x1de counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_SNOOPS_SINT : Number of L2 Cache snoops causing SINT. event:0x1df counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_SNOOPS_PUSHES : Number of L2 Cache snoop pushes. event:0x1e0 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_BIB_STALL : Stall for Back Invalidate Buffer entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1e2 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_RLT_STALL : Stall for Reload Table entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1e4 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_RLFQ_STALL : Stall for Reload Fold Queue entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1e6 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_DTQ_STALL : Stall for Data Transaction Queue entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1e8 counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_COB_STALL : Stall for Castout Buffer entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1ea counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_WDB_STALL : Stall for Write Data Buffer entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1ec counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_RLDB_STALL : Stall for Reload Data Buffer entry (cycles). Counts 0, 1, 2, 3, or 4 per cycle. event:0x1ee counters:0,1,2,3,4,5 um:zero minimum:500 name:CLK_SNPQ_STALL : Stall for Snoop Queue entry (cycles). event:0x1fa counters:0,1,2,3,4,5 um:zero minimum:500 name:BIU_MASTER_REQ : Master transaction starts. (Number of AOut sent to CoreNet). event:0x1fb counters:0,1,2,3,4,5 um:zero minimum:500 name:BIU_MASTER_GLOBAL_REQ : Master transaction starts that are global. (Number of AOut with M=1 sent to CoreNet). event:0x1fc counters:0,1,2,3,4,5 um:zero minimum:500 name:BIU_MASTER_DATA_SIDE_REQ : Master transaction starts that are global. (Number of AOut with M=1 sent to CoreNet). event:0x1fd counters:0,1,2,3,4,5 um:zero minimum:500 name:BIU_MASTER_INSTRUCTION_SIDE_REQ : Master instruction-side transaction starts. (Number of I-side AOut sent to CoreNet). event:0x1fe counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_STASH_REQ : Stash request on AIn matches stash IDs for core or L2. event:0x1ff counters:0,1,2,3,4,5 um:zero minimum:500 name:L2_SNOOP_REQ : Externally generated snoop requests. (Number of AIn from CoreNet not from self). oprofile-1.3.0/events/ppc/e6500/unit_masks0000664000175000017500000000012512534404406015202 00000000000000# e6500 possible unit masks # name:zero type:mandatory default:0x0 0x0 no unit mask oprofile-1.3.0/events/ppc/e500v2/0000775000175000017500000000000013323173530013344 500000000000000oprofile-1.3.0/events/ppc/e500v2/events0000664000175000017500000002615212534404406014523 00000000000000# e500 Events # event:0x1 counters:0,1,2,3 um:zero minimum:100 name:CPU_CLK : Cycles event:0x2 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_INSNS : Completed Instructions (0, 1, or 2 per cycle) event:0x3 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_OPS : Completed Micro-ops (counts 2 for load/store w/update) event:0x4 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCHES : Instruction fetches event:0x5 counters:0,1,2,3 um:zero minimum:500 name:DECODED_OPS : Micro-ops decoded event:0x8 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_BRANCHES : Branch Instructions completed event:0x9 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_LOAD_OPS : Load micro-ops completed event:0xa counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_STORE_OPS : Store micro-ops completed event:0xb counters:0,1,2,3 um:zero minimum:500 name:COMPLETION_REDIRECTS : Number of completion buffer redirects event:0xc counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_FINISHED : Branches finished event:0xd counters:0,1,2,3 um:zero minimum:500 name:TAKEN_BRANCHES_FINISHED : Taken branches finished event:0xe counters:0,1,2,3 um:zero minimum:500 name:BIFFED_BRANCHES_FINISHED : Biffed branches finished event:0xf counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch instructions mispredicted due to direction, target, or IAB prediction event:0x10 counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED_DIRECTION : Branches mispredicted due to direction prediction event:0x11 counters:0,1,2,3 um:zero minimum:500 name:BTB_HITS : Branches that hit in the BTB, or missed but are not taken event:0x12 counters:0,1,2,3 um:zero minimum:500 name:DECODE_STALLED : Cycles the instruction buffer was not empty, but 0 instructions decoded event:0x13 counters:0,1,2,3 um:zero minimum:500 name:ISSUE_STALLED : Cycles the issue buffer is not empty but 0 instructions issued event:0x14 counters:0,1,2,3 um:zero minimum:500 name:BRANCH_ISSUE_STALLED : Cycles the branch buffer is not empty but 0 instructions issued event:0x15 counters:0,1,2,3 um:zero minimum:500 name:SRS0_SCHEDULE_STALLED : Cycles SRS0 is not empty but 0 instructions scheduled event:0x16 counters:0,1,2,3 um:zero minimum:500 name:SRS1_SCHEDULE_STALLED : Cycles SRS1 is not empty but 0 instructions scheduled event:0x17 counters:0,1,2,3 um:zero minimum:500 name:VRS_SCHEDULE_STALLED : Cycles VRS is not empty but 0 instructions scheduled event:0x18 counters:0,1,2,3 um:zero minimum:500 name:LRS_SCHEDULE_STALLED : Cycles LRS is not empty but 0 instructions scheduled event:0x19 counters:0,1,2,3 um:zero minimum:500 name:BRS_SCHEDULE_STALLED : Cycles BRS is not empty but 0 instructions scheduled Load/Store, Data Cache, and dLFB Events event:0x1a counters:0,1,2,3 um:zero minimum:500 name:TOTAL_TRANSLATED : Total Ldst microops translated. event:0x1b counters:0,1,2,3 um:zero minimum:500 name:LOADS_TRANSLATED : Number of cacheable L* or EVL* microops translated. (This includes microops from load-multiple, load-update, and load-context instructions.) event:0x1c counters:0,1,2,3 um:zero minimum:500 name:STORES_TRANSLATED : Number of cacheable ST* or EVST* microops translated. (This includes microops from store-multiple, store-update, and save-context instructions.) event:0x1d counters:0,1,2,3 um:zero minimum:500 name:TOUCHES_TRANSLATED : Number of cacheable DCBT and DCBTST instructions translated (L1 only) (Does not count touches that are converted to nops i.e. exceptions, noncacheable, hid0[nopti] bit is set.) event:0x1e counters:0,1,2,3 um:zero minimum:500 name:CACHEOPS_TRANSLATED : Number of dcba, dcbf, dcbst, and dcbz instructions translated (e500 traps on dcbi) event:0x1f counters:0,1,2,3 um:zero minimum:500 name:CACHEINHIBITED_ACCESSES_TRANSLATED : Number of cache inhibited accesses translated event:0x20 counters:0,1,2,3 um:zero minimum:500 name:GUARDED_LOADS_TRANSLATED : Number of guarded loads translated event:0x21 counters:0,1,2,3 um:zero minimum:500 name:WRITETHROUGH_STORES_TRANSLATED : Number of write-through stores translated event:0x22 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES_TRANSLATED : Number of misaligned load or store accesses translated. event:0x23 counters:0,1,2,3 um:zero minimum:500 name:TOTAL_ALLOCATED_DLFB : Total allocated to dLFB event:0x24 counters:0,1,2,3 um:zero minimum:500 name:LOADS_TRANSLATED_ALLOCATED_DLFB : Loads translated and allocated to dLFB (Applies to same class of instructions as loads translated.) event:0x25 counters:0,1,2,3 um:zero minimum:500 name:STORES_COMPLETED_ALLOCATED_DLFB : Stores completed and allocated to dLFB (Applies to same class of instructions as stores translated.) event:0x26 counters:0,1,2,3 um:zero minimum:500 name:TOUCHES_TRANSLATED_ALLOCATED_DLFB : Touches translated and allocated to dLFB (Applies to same class of instructions as touches translated.) event:0x27 counters:0,1,2,3 um:zero minimum:500 name:STORES_COMPLETED : Number of cacheable ST* or EVST* microops completed. (Applies to the same class of instructions as stores translated.) event:0x28 counters:0,1,2,3 um:zero minimum:500 name:DL1_LOCKS : Number of cache lines locked in the dL1. (Counts a lock even if an overlock condition is encountered.) event:0x29 counters:0,1,2,3 um:zero minimum:500 name:DL1_RELOADS : This is historically used to determine dcache miss rate (along with loads/stores completed). This counts dL1 reloads for any reason. event:0x2a counters:0,1,2,3 um:zero minimum:500 name:DL1_CASTOUTS : dL1 castouts. Does not count castouts due to DCBF. event:0x2b counters:0,1,2,3 um:zero minimum:500 name:DETECTED_REPLAYS : Times detected replay condition - Load miss with dLFB full. event:0x2c counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_REPLAYS : Load miss with load queue full. event:0x2d counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_REPLAYS : Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x2e counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_REPLAYS : Translate a store when the StQ is full. event:0x2f counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_REPLAYS : Address collision. event:0x30 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_REPLAYS : DMMU_MISS_REPLAYS : DMMU miss. event:0x31 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_REPLAYS : DMMU_BUSY_REPLAYS : DMMU busy. event:0x32 counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_REPLAYS : Second part of misaligned access when first part missed in cache. event:0x33 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_DLFB_FULL_CYCLES : Cycles stalled on replay condition - Load miss with dLFB full. event:0x34 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Load miss with load queue full. event:0x35 counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_CYCLES : Cycles stalled on replay condition - Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x36 counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Translate a store when the StQ is full. event:0x37 counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_CYCLES : Cycles stalled on replay condition - Address collision. event:0x38 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_CYCLES : Cycles stalled on replay condition - DMMU miss. event:0x39 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_CYCLES : Cycles stalled on replay condition - DMMU busy. event:0x3a counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES : Cycles stalled on replay condition - Second part of misaligned access when first part missed in cache. event:0x3b counters:0,1,2,3 um:zero minimum:500 name:IL1_LOCKS : Number of cache lines locked in the iL1. (Counts a lock even if an overlock condition is encountered.) event:0x3c counters:0,1,2,3 um:zero minimum:500 name:IL1_FETCH_RELOADS : This is historically used to determine icache miss rate (along with instructions completed) Reloads due to demand fetch. event:0x3d counters:0,1,2,3 um:zero minimum:500 name:FETCHES : Counts the number of fetches that write at least one instruction to the instruction buffer. (With instruction fetched, can used to compute instructions-per-fetch) event:0x3e counters:0,1,2,3 um:zero minimum:500 name:IMMU_TLB4K_RELOADS : iMMU TLB4K reloads event:0x3f counters:0,1,2,3 um:zero minimum:500 name:IMMU_VSP_RELOADS : iMMU VSP reloads event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DMMU_TLB4K_RELOADS : dMMU TLB4K reloads event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DMMU_VSP_RELOADS : dMMU VSP reloads event:0x42 counters:0,1,2,3 um:zero minimum:500 name:L2MMU_MISSES : Counts iTLB/dTLB error interrupt event:0x43 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_REQUESTS : Number of master transactions. (Number of master TSs.) event:0x44 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_I_REQUESTS : Number of master I-Side transactions. (Number of master I-Side TSs.) event:0x45 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_REQUESTS : Number of master D-Side transactions. (Number of master D-Side TSs.) event:0x46 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_CASTOUT_REQUESTS : Number of master D-Side non-program-demand castout transactions. This counts replacement pushes and snoop pushes. This does not count DCBF castouts. (Number of master D-side non-program-demand castout TSs.) event:0x47 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_RETRIES : Number of transactions which were initiated by this processor which were retried on the BIU interface. (Number of master ARTRYs.) event:0x48 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_REQUESTS : Number of externally generated snoop requests. (Counts snoop TSs.) event:0x49 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_HITS : Number of snoop hits on all D-side resources regardless of the cache state (modified, exclusive, or shared) event:0x4a counters:0,1,2,3 um:zero minimum:500 name:SNOOP_PUSHES : Number of snoop pushes from all D-side resources. (Counts snoop ARTRY/WOPs.) event:0x4b counters:0,1,2,3 um:zero minimum:500 name:SNOOP_RETRIES : Number of snoop requests retried. (Counts snoop ARTRYs.) event:0x52 counters:0,1,2,3 um:zero minimum:500 name:PMC0_OVERFLOW : Counts the number of times PMC0[32] transitioned from 1 to 0. event:0x53 counters:0,1,2,3 um:zero minimum:500 name:PMC1_OVERFLOW : Counts the number of times PMC1[32] transitioned from 1 to 0. event:0x54 counters:0,1,2,3 um:zero minimum:500 name:PMC2_OVERFLOW : Counts the number of times PMC2[32] transitioned from 1 to 0. event:0x55 counters:0,1,2,3 um:zero minimum:500 name:PMC3_OVERFLOW : Counts the number of times PMC3[32] transitioned from 1 to 0. event:0x56 counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS : Number of interrupts taken event:0x57 counters:0,1,2,3 um:zero minimum:500 name:EXTERNAL_INTERRUPTS : Number of external input interrupts taken event:0x58 counters:0,1,2,3 um:zero minimum:500 name:CRITICAL_INTERRUPTS : Number of critical input interrupts taken event:0x59 counters:0,1,2,3 um:zero minimum:500 name:SC_TRAP_INTERRUPTS : Number of system call and trap interrupts oprofile-1.3.0/events/ppc/e500v2/unit_masks0000664000175000017500000000012412534404406015363 00000000000000# e500 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc/e500/0000775000175000017500000000000013323173530013074 500000000000000oprofile-1.3.0/events/ppc/e500/events0000664000175000017500000002615412534404406014255 00000000000000# e500 Events # event:0x1 counters:0,1,2,3 um:zero minimum:3000 name:CPU_CLK : Cycles event:0x2 counters:0,1,2,3 um:zero minimum:3000 name:COMPLETED_INSNS : Completed Instructions (0, 1, or 2 per cycle) event:0x3 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_OPS : Completed Micro-ops (counts 2 for load/store w/update) event:0x4 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCHES : Instruction fetches event:0x5 counters:0,1,2,3 um:zero minimum:500 name:DECODED_OPS : Micro-ops decoded event:0x8 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_BRANCHES : Branch Instructions completed event:0x9 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_LOAD_OPS : Load micro-ops completed event:0xa counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_STORE_OPS : Store micro-ops completed event:0xb counters:0,1,2,3 um:zero minimum:500 name:COMPLETION_REDIRECTS : Number of completion buffer redirects event:0xc counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_FINISHED : Branches finished event:0xd counters:0,1,2,3 um:zero minimum:500 name:TAKEN_BRANCHES_FINISHED : Taken branches finished event:0xe counters:0,1,2,3 um:zero minimum:500 name:BIFFED_BRANCHES_FINISHED : Biffed branches finished event:0xf counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch instructions mispredicted due to direction, target, or IAB prediction event:0x10 counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED_DIRECTION : Branches mispredicted due to direction prediction event:0x11 counters:0,1,2,3 um:zero minimum:500 name:BTB_HITS : Branches that hit in the BTB, or missed but are not taken event:0x12 counters:0,1,2,3 um:zero minimum:500 name:DECODE_STALLED : Cycles the instruction buffer was not empty, but 0 instructions decoded event:0x13 counters:0,1,2,3 um:zero minimum:500 name:ISSUE_STALLED : Cycles the issue buffer is not empty but 0 instructions issued event:0x14 counters:0,1,2,3 um:zero minimum:500 name:BRANCH_ISSUE_STALLED : Cycles the branch buffer is not empty but 0 instructions issued event:0x15 counters:0,1,2,3 um:zero minimum:500 name:SRS0_SCHEDULE_STALLED : Cycles SRS0 is not empty but 0 instructions scheduled event:0x16 counters:0,1,2,3 um:zero minimum:500 name:SRS1_SCHEDULE_STALLED : Cycles SRS1 is not empty but 0 instructions scheduled event:0x17 counters:0,1,2,3 um:zero minimum:500 name:VRS_SCHEDULE_STALLED : Cycles VRS is not empty but 0 instructions scheduled event:0x18 counters:0,1,2,3 um:zero minimum:500 name:LRS_SCHEDULE_STALLED : Cycles LRS is not empty but 0 instructions scheduled event:0x19 counters:0,1,2,3 um:zero minimum:500 name:BRS_SCHEDULE_STALLED : Cycles BRS is not empty but 0 instructions scheduled Load/Store, Data Cache, and dLFB Events event:0x1a counters:0,1,2,3 um:zero minimum:500 name:TOTAL_TRANSLATED : Total Ldst microops translated. event:0x1b counters:0,1,2,3 um:zero minimum:500 name:LOADS_TRANSLATED : Number of cacheable L* or EVL* microops translated. (This includes microops from load-multiple, load-update, and load-context instructions.) event:0x1c counters:0,1,2,3 um:zero minimum:500 name:STORES_TRANSLATED : Number of cacheable ST* or EVST* microops translated. (This includes microops from store-multiple, store-update, and save-context instructions.) event:0x1d counters:0,1,2,3 um:zero minimum:500 name:TOUCHES_TRANSLATED : Number of cacheable DCBT and DCBTST instructions translated (L1 only) (Does not count touches that are converted to nops i.e. exceptions, noncacheable, hid0[nopti] bit is set.) event:0x1e counters:0,1,2,3 um:zero minimum:500 name:CACHEOPS_TRANSLATED : Number of dcba, dcbf, dcbst, and dcbz instructions translated (e500 traps on dcbi) event:0x1f counters:0,1,2,3 um:zero minimum:500 name:CACHEINHIBITED_ACCESSES_TRANSLATED : Number of cache inhibited accesses translated event:0x20 counters:0,1,2,3 um:zero minimum:500 name:GUARDED_LOADS_TRANSLATED : Number of guarded loads translated event:0x21 counters:0,1,2,3 um:zero minimum:500 name:WRITETHROUGH_STORES_TRANSLATED : Number of write-through stores translated event:0x22 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES_TRANSLATED : Number of misaligned load or store accesses translated. event:0x23 counters:0,1,2,3 um:zero minimum:500 name:TOTAL_ALLOCATED_DLFB : Total allocated to dLFB event:0x24 counters:0,1,2,3 um:zero minimum:500 name:LOADS_TRANSLATED_ALLOCATED_DLFB : Loads translated and allocated to dLFB (Applies to same class of instructions as loads translated.) event:0x25 counters:0,1,2,3 um:zero minimum:500 name:STORES_COMPLETED_ALLOCATED_DLFB : Stores completed and allocated to dLFB (Applies to same class of instructions as stores translated.) event:0x26 counters:0,1,2,3 um:zero minimum:500 name:TOUCHES_TRANSLATED_ALLOCATED_DLFB : Touches translated and allocated to dLFB (Applies to same class of instructions as touches translated.) event:0x27 counters:0,1,2,3 um:zero minimum:500 name:STORES_COMPLETED : Number of cacheable ST* or EVST* microops completed. (Applies to the same class of instructions as stores translated.) event:0x28 counters:0,1,2,3 um:zero minimum:500 name:DL1_LOCKS : Number of cache lines locked in the dL1. (Counts a lock even if an overlock condition is encountered.) event:0x29 counters:0,1,2,3 um:zero minimum:500 name:DL1_RELOADS : This is historically used to determine dcache miss rate (along with loads/stores completed). This counts dL1 reloads for any reason. event:0x2a counters:0,1,2,3 um:zero minimum:500 name:DL1_CASTOUTS : dL1 castouts. Does not count castouts due to DCBF. event:0x2b counters:0,1,2,3 um:zero minimum:500 name:DETECTED_REPLAYS : Times detected replay condition - Load miss with dLFB full. event:0x2c counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_REPLAYS : Load miss with load queue full. event:0x2d counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_REPLAYS : Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x2e counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_REPLAYS : Translate a store when the StQ is full. event:0x2f counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_REPLAYS : Address collision. event:0x30 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_REPLAYS : DMMU_MISS_REPLAYS : DMMU miss. event:0x31 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_REPLAYS : DMMU_BUSY_REPLAYS : DMMU busy. event:0x32 counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_REPLAYS : Second part of misaligned access when first part missed in cache. event:0x33 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_DLFB_FULL_CYCLES : Cycles stalled on replay condition - Load miss with dLFB full. event:0x34 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Load miss with load queue full. event:0x35 counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_CYCLES : Cycles stalled on replay condition - Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x36 counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Translate a store when the StQ is full. event:0x37 counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_CYCLES : Cycles stalled on replay condition - Address collision. event:0x38 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_CYCLES : Cycles stalled on replay condition - DMMU miss. event:0x39 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_CYCLES : Cycles stalled on replay condition - DMMU busy. event:0x3a counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES : Cycles stalled on replay condition - Second part of misaligned access when first part missed in cache. event:0x3b counters:0,1,2,3 um:zero minimum:500 name:IL1_LOCKS : Number of cache lines locked in the iL1. (Counts a lock even if an overlock condition is encountered.) event:0x3c counters:0,1,2,3 um:zero minimum:500 name:IL1_FETCH_RELOADS : This is historically used to determine icache miss rate (along with instructions completed) Reloads due to demand fetch. event:0x3d counters:0,1,2,3 um:zero minimum:500 name:FETCHES : Counts the number of fetches that write at least one instruction to the instruction buffer. (With instruction fetched, can used to compute instructions-per-fetch) event:0x3e counters:0,1,2,3 um:zero minimum:500 name:IMMU_TLB4K_RELOADS : iMMU TLB4K reloads event:0x3f counters:0,1,2,3 um:zero minimum:500 name:IMMU_VSP_RELOADS : iMMU VSP reloads event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DMMU_TLB4K_RELOADS : dMMU TLB4K reloads event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DMMU_VSP_RELOADS : dMMU VSP reloads event:0x42 counters:0,1,2,3 um:zero minimum:500 name:L2MMU_MISSES : Counts iTLB/dTLB error interrupt event:0x43 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_REQUESTS : Number of master transactions. (Number of master TSs.) event:0x44 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_I_REQUESTS : Number of master I-Side transactions. (Number of master I-Side TSs.) event:0x45 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_REQUESTS : Number of master D-Side transactions. (Number of master D-Side TSs.) event:0x46 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_CASTOUT_REQUESTS : Number of master D-Side non-program-demand castout transactions. This counts replacement pushes and snoop pushes. This does not count DCBF castouts. (Number of master D-side non-program-demand castout TSs.) event:0x47 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_RETRIES : Number of transactions which were initiated by this processor which were retried on the BIU interface. (Number of master ARTRYs.) event:0x48 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_REQUESTS : Number of externally generated snoop requests. (Counts snoop TSs.) event:0x49 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_HITS : Number of snoop hits on all D-side resources regardless of the cache state (modified, exclusive, or shared) event:0x4a counters:0,1,2,3 um:zero minimum:500 name:SNOOP_PUSHES : Number of snoop pushes from all D-side resources. (Counts snoop ARTRY/WOPs.) event:0x4b counters:0,1,2,3 um:zero minimum:500 name:SNOOP_RETRIES : Number of snoop requests retried. (Counts snoop ARTRYs.) event:0x52 counters:0,1,2,3 um:zero minimum:500 name:PMC0_OVERFLOW : Counts the number of times PMC0[32] transitioned from 1 to 0. event:0x53 counters:0,1,2,3 um:zero minimum:500 name:PMC1_OVERFLOW : Counts the number of times PMC1[32] transitioned from 1 to 0. event:0x54 counters:0,1,2,3 um:zero minimum:500 name:PMC2_OVERFLOW : Counts the number of times PMC2[32] transitioned from 1 to 0. event:0x55 counters:0,1,2,3 um:zero minimum:500 name:PMC3_OVERFLOW : Counts the number of times PMC3[32] transitioned from 1 to 0. event:0x56 counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS : Number of interrupts taken event:0x57 counters:0,1,2,3 um:zero minimum:500 name:EXTERNAL_INTERRUPTS : Number of external input interrupts taken event:0x58 counters:0,1,2,3 um:zero minimum:500 name:CRITICAL_INTERRUPTS : Number of critical input interrupts taken event:0x59 counters:0,1,2,3 um:zero minimum:500 name:SC_TRAP_INTERRUPTS : Number of system call and trap interrupts oprofile-1.3.0/events/ppc/e500/unit_masks0000664000175000017500000000012412534404406015113 00000000000000# e500 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc/7450/0000775000175000017500000000000013323173530013022 500000000000000oprofile-1.3.0/events/ppc/7450/events0000664000175000017500000000652612534404406014204 00000000000000# 745x Events # event:0x1 counters:0,1,2,3 um:zero minimum:3000 name:CYCLES : Processor cycles event:0x2 counters:0,1,2,3 um:zero minimum:3000 name:COMPLETED_INSNS : Completed Instructions event:0x3 counters:0,1,2,3 um:zero minimum:3000 name:TBL_BIT_TRANSTNS : TBL Bit Transitions event:0x4 counters:0,1,2,3 um:zero minimum:3000 name:DISPATCHED_INSNS : Dispatched Instructions event:0x5 counters:0,1,2,3 um:zero minimum:3000 name:PROC_PERFMON_EXC : Process Performance Monitor Exception event:0x8 counters:0,1,3 um:zero minimum:3000 name:VPU_INSNS : VPU Instructions Completed event:0x9 counters:0,1,3 um:zero minimum:3000 name:VFPU_INSNS : VFPU Instructions Completed event:0xa counters:0,1,3 um:zero minimum:3000 name:VIU1_INSNS : VIU1 Instructions Completed event:0xb counters:0,1,3 um:zero minimum:3000 name:VIU2_INSNS : VIU2 Instructions Completed event:0xe counters:0,1 um:zero minimum:3000 name:VPU_CYCLES : Cycles a VPU Instruction event:0xf counters:0,1 um:zero minimum:3000 name:VFPU_CYCLES : Cycles a VFPU Instruction event:0x10 counters:0,1 um:zero minimum:3000 name:VIU1_CYCLES : Cycles a VIU1 Instruction event:0x11 counters:0,1 um:zero minimum:3000 name:VIU2_CYCLES : Cycles a VIU2 Instruction event:0x12 counters:2 um:zero minimum:3000 name:DTLB_MISSES : DTLB misses event:0x14 counters:0,1 um:zero minimum:3000 name:STORE_INSNS : Store Instructions event:0x15 counters:0,1 um:zero minimum:3000 name:L1_ICACHE_MISSES : L1 Instruction Cache Misses event:0x16 counters:0,1 um:zero minimum:3000 name:L1_DATA_SNOOPS : L1 Data Snoops event:0x17 counters:0,1 um:zero minimum:3000 name:UNRESOLVED_BRANCHES : Unresolved Branches event:0x1c counters:3 um:zero minimum:3000 name:MISPREDICTED_BRANCHES : Mispredicted branches event:0x1d counters:3 um:zero minimum:3000 name:FOLDED_BRANCHES : Folded branches event:0x1f counters:2 um:zero minimum:3000 name:BR_LN_STACK_MIS : Branch Link Stack Mispredicted event:0x27 counters:0 um:zero minimum:3000 name:ITLB_TABLE_CYCLES : ITLM Hardware Table Search Cycles event:0x29 counters:0 um:zero minimum:3000 name:L1_ICACHE_ACCESSES : L1 Instruction Cache Accesses event:0x2a counters:0 um:zero minimum:3000 name:INSN_BP_MATCHES : Instruction Breakpoint Matches event:0x32 counters:0 um:zero minimum:3000 name:L1_DSNOOP_HITS : L1 data snoop hits event:0x33 counters:0 um:zero minimum:3000 name:WRITETHRU_STORES : Write-through stores event:0x34 counters:0 um:zero minimum:3000 name:CACHEINH_STORES : Cache-inhibited stores event:0x35 counters:0 um:zero minimum:3000 name:L1_DLOAD_HIT : L1 data load hit event:0x36 counters:0 um:zero minimum:3000 name:L1_DTOUCH_HIT : L1 data touch hit event:0x37 counters:0 um:zero minimum:3000 name:L1_DSTORE_HIT : L1 data store hit event:0x38 counters:0 um:zero minimum:3000 name:L1_DATA_HITS : L1 data total hits event:0x40 counters:0 um:zero minimum:3000 name:ALTIVEC_LD_INSNS_COMPLETED : Altivec load instructions completed event:0x41 counters:0 um:zero minimum:3000 name:FP_STORE_INSNS_COMPLETED_LSU : Floating point store instructions completed in LSU event:0x4f counters:0 um:zero minimum:3000 name:FP_LOAD_INSNS_COMPLETED_LSU : Floating point load instructions completed in LSU event:0x50 counters:0 um:zero minimum:3000 name:FP_LDSINGLE_INSNS_COMPLETED_LSU : Floating point load single instructions completed in LSU event:0x5e counters:0 um:zero minimum:3000 name:FP_DENORMALIZED_RESULT : Floating point denormalized result oprofile-1.3.0/events/ppc/7450/unit_masks0000664000175000017500000000012412534404406015041 00000000000000# 745x possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc/e300/0000775000175000017500000000000013323173530013072 500000000000000oprofile-1.3.0/events/ppc/e300/events0000664000175000017500000001110512534404406014241 00000000000000# e300 Events # event:0x1 counters:0,1,2,3 um:zero minimum:3000 name:CPU_CLK : Cycles event:0x2 counters:0,1,2,3 um:zero minimum:3000 name:COMPLETED_INSNS : Completed Instructions (0, 1, or 2 per cycle) event:0x4 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCHES : Instruction fetches event:0x6 counters:0,1,2,3 um:zero minimum:500 name:PM_EVENT_TRANS : 0 to 1 translations on the pm_event input event:0x7 counters:0,1,2,3 um:zero minimum:500 name:PM_EVENT_CYCLES : processor bus cycle event:0x8 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_BRANCHES : Branch Instructions completed event:0x9 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_LOAD_OPS : Load micro-ops completed event:0xa counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_STORE_OPS : Store micro-ops completed event:0xc counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_FINISHED : Branches finished event:0xd counters:0,1,2,3 um:zero minimum:500 name:TAKEN_BRANCHES_FINISHED : Taken branches finished event:0xf counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch instructions mispredicted due to direction, target, or IAB prediction event:0x12 counters:0,1,2,3 um:zero minimum:500 name:DECODE_STALLED : Cycles the instruction buffer was not empty, but 0 instructions decoded event:0x13 counters:0,1,2,3 um:zero minimum:500 name:ISSUE_STALLED : Cycles the issue buffer is not empty but 0 instructions issued event:0x1f counters:0,1,2,3 um:zero minimum:500 name:CACHEINHIBITED_ACCESSES_TRANSLATED : Number of cache inhibited accesses translated event:0x3d counters:0,1,2,3 um:zero minimum:500 name:FETCHES : Counts the number of fetches that write at least one instruction to the instruction buffer. (With instruction fetched, can used to compute instructions-per-fetch) event:0x3e counters:0,1,2,3 um:zero minimum:500 name:MMU_MISSES : Counts instruction TLB miss exceptions event:0x43 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_REQUESTS : Number of master transactions. (Number of master TSs.) event:0x44 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_I_REQUESTS : Number of master I-Side transactions. (Number of master I-Side TSs.) event:0x45 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_REQUESTS : Number of master D-Side transactions. (Number of master D-Side TSs.) event:0x47 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_RETRIES : Number of transactions which were initiated by this processor which were retried on the BIU interface. (Number of master ARTRYs.) event:0x4a counters:0,1,2,3 um:zero minimum:500 name:SNOOP_PUSHES : Number of snoop pushes from all D-side resources. (Counts snoop ARTRY/WOPs.) event:0x52 counters:0,1,2,3 um:zero minimum:500 name:PMC0_OVERFLOW : Counts the number of times PMC0[32] transitioned from 1 to 0. event:0x53 counters:0,1,2,3 um:zero minimum:500 name:PMC1_OVERFLOW : Counts the number of times PMC1[32] transitioned from 1 to 0. event:0x54 counters:0,1,2,3 um:zero minimum:500 name:PMC2_OVERFLOW : Counts the number of times PMC2[32] transitioned from 1 to 0. event:0x55 counters:0,1,2,3 um:zero minimum:500 name:PMC3_OVERFLOW : Counts the number of times PMC3[32] transitioned from 1 to 0. event:0x56 counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS : Number of interrupts taken event:0x57 counters:0,1,2,3 um:zero minimum:500 name:EXTERNAL_INTERRUPTS : Number of external input interrupts taken event:0x58 counters:0,1,2,3 um:zero minimum:500 name:CRITICAL_INTERRUPTS : Number of critical input interrupts taken event:0x59 counters:0,1,2,3 um:zero minimum:500 name:SC_TRAP_INTERRUPTS : Number of system call and trap interrupts event:0x5a counters:0,1,2,3 um:zero minimum:500 name:TRANS_TBL : Counts transitions of the TBL bit selected by PMGC0[TBSEL] event:0x60 counters:0,1,2,3 um:zero minimum:500 name:I_CACHE_HIT : Number if fetches that hit in i-cache event:0x61 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTIONS_FOLDED : Number of instructions folded event:0x64 counters:0,1,2,3 um:zero minimum:500 name:STALLS_COM_BUFFER : Cycles issue stalled due to full completion buffer event:0x68 counters:0,1,2,3 um:zero minimum:500 name:STALLED_COMPLETION : Cycles that completion is stalled event:0x69 counters:0,1,2,3 um:zero minimum:500 name:STALLED_LOAD : Cycles that completion is stalled due to load event:0x6a counters:0,1,2,3 um:zero minimum:500 name:STALLED_FLOAT : Cycles that completion is stalled due to fp instruction event:0x6c counters:0,1,2,3 um:zero minimum:500 name:L_S_SPACE : Number of loads and stores to cacheable space in D cache event:0x6d counters:0,1,2,3 um:zero minimum:500 name:L_S_HIT : Number of loads and stores that hit in the D cache oprofile-1.3.0/events/ppc/e300/unit_masks0000664000175000017500000000012412534404406015111 00000000000000# e300 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc/e500mc/0000775000175000017500000000000013323173530013414 500000000000000oprofile-1.3.0/events/ppc/e500mc/events0000664000175000017500000003506712534404406014600 00000000000000# e500mc Events # # Copyright (C) 2010 Freescale Semiconductor, Inc. # event:0x1 counters:0,1,2,3 um:zero minimum:100 name:CPU_CLK : Cycles event:0x2 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_INSNS : Completed Instructions (0, 1, or 2 per cycle) event:0x3 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_OPS : Completed Micro-ops (counts 2 for load/store w/update) event:0x4 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCHES : Instruction fetches event:0x5 counters:0,1,2,3 um:zero minimum:500 name:DECODED_OPS : Micro-ops decoded event:0x8 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_BRANCHES : Branch Instructions completed event:0x9 counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_LOAD_OPS : Load micro-ops completed event:0xa counters:0,1,2,3 um:zero minimum:500 name:COMPLETED_STORE_OPS : Store micro-ops completed event:0xb counters:0,1,2,3 um:zero minimum:500 name:COMPLETION_REDIRECTS : Number of completion buffer redirects event:0xc counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_FINISHED : Branches finished event:0xd counters:0,1,2,3 um:zero minimum:500 name:TAKEN_BRANCHES_FINISHED : Taken branches finished event:0xe counters:0,1,2,3 um:zero minimum:500 name:BIFFED_BRANCHES_FINISHED : Biffed branches finished event:0xf counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch instructions mispredicted due to direction, target, or IAB prediction event:0x10 counters:0,1,2,3 um:zero minimum:500 name:BRANCHES_MISPREDICTED_DIRECTION : Branches mispredicted due to direction prediction event:0x11 counters:0,1,2,3 um:zero minimum:500 name:BTB_HITS : Branches that hit in the BTB, or missed but are not taken event:0x12 counters:0,1,2,3 um:zero minimum:500 name:DECODE_STALLED : Cycles the instruction buffer was not empty, but 0 instructions decoded event:0x13 counters:0,1,2,3 um:zero minimum:500 name:ISSUE_STALLED : Cycles the issue buffer is not empty but 0 instructions issued event:0x14 counters:0,1,2,3 um:zero minimum:500 name:BRANCH_ISSUE_STALLED : Cycles the branch buffer is not empty but 0 instructions issued event:0x15 counters:0,1,2,3 um:zero minimum:500 name:SRS0_SCHEDULE_STALLED : Cycles SRS0 is not empty but 0 instructions scheduled event:0x16 counters:0,1,2,3 um:zero minimum:500 name:SRS1_SCHEDULE_STALLED : Cycles SRS1 is not empty but 0 instructions scheduled event:0x17 counters:0,1,2,3 um:zero minimum:500 name:VRS_SCHEDULE_STALLED : Cycles VRS is not empty but 0 instructions scheduled event:0x18 counters:0,1,2,3 um:zero minimum:500 name:LRS_SCHEDULE_STALLED : Cycles LRS is not empty but 0 instructions scheduled event:0x19 counters:0,1,2,3 um:zero minimum:500 name:BRS_SCHEDULE_STALLED : Cycles BRS is not empty but 0 instructions scheduled Load/Store, Data Cache, and dLFB Events event:0x1a counters:0,1,2,3 um:zero minimum:500 name:TOTAL_TRANSLATED : Total Ldst microops translated. event:0x1b counters:0,1,2,3 um:zero minimum:500 name:LOADS_TRANSLATED : Number of cacheable L* or EVL* microops translated. (This includes microops from load-multiple, load-update, and load-context instructions.) event:0x1c counters:0,1,2,3 um:zero minimum:500 name:STORES_TRANSLATED : Number of cacheable ST* or EVST* microops translated. (This includes microops from store-multiple, store-update, and save-context instructions.) event:0x1d counters:0,1,2,3 um:zero minimum:500 name:TOUCHES_TRANSLATED : Number of cacheable DCBT and DCBTST instructions translated (L1 only) (Does not count touches that are converted to nops i.e. exceptions, noncacheable, hid0[nopti] bit is set.) event:0x1e counters:0,1,2,3 um:zero minimum:500 name:CACHEOPS_TRANSLATED : Number of dcba, dcbf, dcbst, and dcbz instructions translated (e500 traps on dcbi) event:0x1f counters:0,1,2,3 um:zero minimum:500 name:CACHEINHIBITED_ACCESSES_TRANSLATED : Number of cache inhibited accesses translated event:0x20 counters:0,1,2,3 um:zero minimum:500 name:GUARDED_LOADS_TRANSLATED : Number of guarded loads translated event:0x21 counters:0,1,2,3 um:zero minimum:500 name:WRITETHROUGH_STORES_TRANSLATED : Number of write-through stores translated event:0x22 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES_TRANSLATED : Number of misaligned load or store accesses translated. event:0x23 counters:0,1,2,3 um:zero minimum:500 name:TOTAL_ALLOCATED_DLFB : Total allocated to dLFB event:0x24 counters:0,1,2,3 um:zero minimum:500 name:LOADS_TRANSLATED_ALLOCATED_DLFB : Loads translated and allocated to dLFB (Applies to same class of instructions as loads translated.) event:0x25 counters:0,1,2,3 um:zero minimum:500 name:STORES_COMPLETED_ALLOCATED_DLFB : Stores completed and allocated to dLFB (Applies to same class of instructions as stores translated.) event:0x26 counters:0,1,2,3 um:zero minimum:500 name:TOUCHES_TRANSLATED_ALLOCATED_DLFB : Touches translated and allocated to dLFB (Applies to same class of instructions as touches translated.) event:0x27 counters:0,1,2,3 um:zero minimum:500 name:STORES_COMPLETED : Number of cacheable ST* or EVST* microops completed. (Applies to the same class of instructions as stores translated.) event:0x28 counters:0,1,2,3 um:zero minimum:500 name:DL1_LOCKS : Number of cache lines locked in the dL1. (Counts a lock even if an overlock condition is encountered.) event:0x29 counters:0,1,2,3 um:zero minimum:500 name:DL1_RELOADS : This is historically used to determine dcache miss rate (along with loads/stores completed). This counts dL1 reloads for any reason. event:0x2a counters:0,1,2,3 um:zero minimum:500 name:DL1_CASTOUTS : dL1 castouts. Does not count castouts due to DCBF. event:0x2b counters:0,1,2,3 um:zero minimum:500 name:DETECTED_REPLAYS : Times detected replay condition - Load miss with dLFB full. event:0x2c counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_REPLAYS : Load miss with load queue full. event:0x2d counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_REPLAYS : Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x2e counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_REPLAYS : Translate a store when the StQ is full. event:0x2f counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_REPLAYS : Address collision. event:0x30 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_REPLAYS : DMMU_MISS_REPLAYS : DMMU miss. event:0x31 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_REPLAYS : DMMU_BUSY_REPLAYS : DMMU busy. event:0x32 counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_REPLAYS : Second part of misaligned access when first part missed in cache. event:0x33 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_DLFB_FULL_CYCLES : Cycles stalled on replay condition - Load miss with dLFB full. event:0x34 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Load miss with load queue full. event:0x35 counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_CYCLES : Cycles stalled on replay condition - Load guarded miss when the load is not yet at the bottom of the completion buffer. event:0x36 counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Translate a store when the StQ is full. event:0x37 counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_CYCLES : Cycles stalled on replay condition - Address collision. event:0x38 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_CYCLES : Cycles stalled on replay condition - DMMU miss. event:0x39 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_CYCLES : Cycles stalled on replay condition - DMMU busy. event:0x3a counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES : Cycles stalled on replay condition - Second part of misaligned access when first part missed in cache. event:0x3b counters:0,1,2,3 um:zero minimum:500 name:IL1_LOCKS : Number of cache lines locked in the iL1. (Counts a lock even if an overlock condition is encountered.) event:0x3c counters:0,1,2,3 um:zero minimum:500 name:IL1_FETCH_RELOADS : This is historically used to determine icache miss rate (along with instructions completed) Reloads due to demand fetch. event:0x3d counters:0,1,2,3 um:zero minimum:500 name:FETCHES : Counts the number of fetches that write at least one instruction to the instruction buffer. (With instruction fetched, can used to compute instructions-per-fetch) event:0x3e counters:0,1,2,3 um:zero minimum:500 name:IMMU_TLB4K_RELOADS : iMMU TLB4K reloads event:0x3f counters:0,1,2,3 um:zero minimum:500 name:IMMU_VSP_RELOADS : iMMU VSP reloads event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DMMU_TLB4K_RELOADS : dMMU TLB4K reloads event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DMMU_VSP_RELOADS : dMMU VSP reloads event:0x42 counters:0,1,2,3 um:zero minimum:500 name:L2MMU_MISSES : Counts iTLB/dTLB error interrupt event:0x43 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_REQUESTS : Number of master transactions. (Number of master TSs.) event:0x44 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_I_REQUESTS : Number of master I-Side transactions. (Number of master I-Side TSs.) event:0x45 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_REQUESTS : Number of master D-Side transactions. (Number of master D-Side TSs.) event:0x46 counters:0,1,2,3 um:zero minimum:500 name:BIU_MASTER_D_CASTOUT_REQUESTS : Number of master D-Side non-program-demand castout transactions. This counts replacement pushes and snoop pushes. This does not count DCBF castouts. (Number of master D-side non-program-demand castout TSs.) event:0x48 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_REQUESTS : Number of externally generated snoop requests. (Counts snoop TSs.) event:0x49 counters:0,1,2,3 um:zero minimum:500 name:SNOOP_HITS : Number of snoop hits on all D-side resources regardless of the cache state (modified, exclusive, or shared) event:0x4a counters:0,1,2,3 um:zero minimum:500 name:SNOOP_PUSHES : Number of snoop pushes from all D-side resources. (Counts snoop ARTRY/WOPs.) event:0x52 counters:0,1,2,3 um:zero minimum:500 name:PMC0_OVERFLOW : Counts the number of times PMC0[32] transitioned from 1 to 0. event:0x53 counters:0,1,2,3 um:zero minimum:500 name:PMC1_OVERFLOW : Counts the number of times PMC1[32] transitioned from 1 to 0. event:0x54 counters:0,1,2,3 um:zero minimum:500 name:PMC2_OVERFLOW : Counts the number of times PMC2[32] transitioned from 1 to 0. event:0x55 counters:0,1,2,3 um:zero minimum:500 name:PMC3_OVERFLOW : Counts the number of times PMC3[32] transitioned from 1 to 0. event:0x56 counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS : Number of interrupts taken event:0x57 counters:0,1,2,3 um:zero minimum:500 name:EXTERNAL_INTERRUPTS : Number of external input interrupts taken event:0x58 counters:0,1,2,3 um:zero minimum:500 name:CRITICAL_INTERRUPTS : Number of critical input interrupts taken event:0x59 counters:0,1,2,3 um:zero minimum:500 name:SC_TRAP_INTERRUPTS : Number of system call and trap interrupts event:0x5b counters:0,1,2,3 um:zero minimum:500 name:L2_LINEFILL_REQ : Number L2 Linefill requests event:0x5c counters:0,1,2,3 um:zero minimum:500 name:L2_VICTIM_SELECT : Number L2 Victim selects event:0x6e counters:0,1,2,3 um:zero minimum:500 name:L2_ACCESS : Number L2 cache accesses event:0x6f counters:0,1,2,3 um:zero minimum:500 name:L2_HIT_ACCESS : Number L2 hit cache accesses event:0x70 counters:0,1,2,3 um:zero minimum:500 name:L2_DATA_ACCESS : Number L2 data cache accesses event:0x71 counters:0,1,2,3 um:zero minimum:500 name:L2_HIT_DATA_ACCESS : Number L2 hit data cache accesses event:0x72 counters:0,1,2,3 um:zero minimum:500 name:L2_INST_ACCESS : Number L2 instruction cache accesses event:0x73 counters:0,1,2,3 um:zero minimum:500 name:L2_HIT_INST_ACCESS : Number L2 hit instruction cache accesses event:0x74 counters:0,1,2,3 um:zero minimum:500 name:L2_ALLOC : Number L2 cache allocations event:0x75 counters:0,1,2,3 um:zero minimum:500 name:L2_DATA_ALLOC : Number L2 data cache allocations event:0x76 counters:0,1,2,3 um:zero minimum:500 name:L2_DIRTY_DATA_ALLOC : Number L2 dirty data cache allocations event:0x77 counters:0,1,2,3 um:zero minimum:500 name:L2_INST_ALLOC : Number L2 instruction cache allocations event:0x78 counters:0,1,2,3 um:zero minimum:500 name:L2_UPDATE : Number L2 cache updates event:0x79 counters:0,1,2,3 um:zero minimum:500 name:L2_CLEAN_UPDATE : Number L2 cache clean updates event:0x7a counters:0,1,2,3 um:zero minimum:500 name:L2_DIRTY_UPDATE : Number L2 cache dirty updates event:0x7b counters:0,1,2,3 um:zero minimum:500 name:L2_CLEAN_REDU_UPDATE : Number L2 cache clean redundant updates event:0x7c counters:0,1,2,3 um:zero minimum:500 name:L2_DIRTY_REDU_UPDATE : Number L2 cache dirty redundant updates event:0x7d counters:0,1,2,3 um:zero minimum:500 name:L2_LOCKS : Number L2 cache locks event:0x7e counters:0,1,2,3 um:zero minimum:500 name:L2_CASTOUT : Number L2 cache castouts event:0x7f counters:0,1,2,3 um:zero minimum:500 name:L2_HIT_DATA_DIRTY : Number L2 cache data dirty hits event:0x82 counters:0,1,2,3 um:zero minimum:500 name:L2_INV_CLEAN : Number L2 cache invalidation of clean lines event:0x83 counters:0,1,2,3 um:zero minimum:500 name:L2_INV_INCOHER : Number L2 cache invalidation of incoherent lines event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L2_INV_COHER : Number L2 cache invalidation of coherent lines event:0x94 counters:0,1,2,3 um:zero minimum:500 name:DVT0 : Detection of write to DEVENT with DVT0 set event:0x95 counters:0,1,2,3 um:zero minimum:500 name:DVT1 : Detection of write to DEVENT with DVT1 set event:0x96 counters:0,1,2,3 um:zero minimum:500 name:DVT2 : Detection of write to DEVENT with DVT2 set event:0x97 counters:0,1,2,3 um:zero minimum:500 name:DVT3 : Detection of write to DEVENT with DVT3 set event:0x98 counters:0,1,2,3 um:zero minimum:500 name:DVT4 : Detection of write to DEVENT with DVT4 set event:0x99 counters:0,1,2,3 um:zero minimum:500 name:DVT5 : Detection of write to DEVENT with DVT5 set event:0x9a counters:0,1,2,3 um:zero minimum:500 name:DVT6 : Detection of write to DEVENT with DVT6 set event:0x9b counters:0,1,2,3 um:zero minimum:500 name:DVT7 : Detection of write to DEVENT with DVT7 set event:0x9c counters:0,1,2,3 um:zero minimum:500 name:CYCLES_NEXUS_STALLED : Number of completion cycles stalled due to Nexus FIFO full event:0xb0 counters:0,1,2,3 um:zero minimum:500 name:DECORATED_LOAD : Number of decorated loads. event:0xb1 counters:0,1,2,3 um:zero minimum:500 name:DECORATED_STORE : Number of decorated stores event:0xb2 counters:0,1,2,3 um:zero minimum:500 name:LOAD_RETRY : Number of load retries event:0xb3 counters:0,1,2,3 um:zero minimum:500 name:STWCX_SUCCESS : Number of successful stwcx. instructions event:0xb4 counters:0,1,2,3 um:zero minimum:500 name:STWCX_UNSUCCESS : Number of unsuccessful stwcx. instructions oprofile-1.3.0/events/ppc/e500mc/unit_masks0000664000175000017500000000012412534404406015433 00000000000000# e500 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/0000775000175000017500000000000013323173530012611 500000000000000oprofile-1.3.0/events/mips/20K/0000775000175000017500000000000013323173530013145 500000000000000oprofile-1.3.0/events/mips/20K/events0000664000175000017500000000350312534404406014317 00000000000000# # MIPS 20K # # The 20K supports only one performance counter. # event:0x0 counters:0 um:zero minimum:500 name:CYCLES : CPU cycles event:0x1 counters:0 um:zero minimum:500 name:INSN_ISSUED : Dispatched/issued instructions event:0x2 counters:0 um:zero minimum:500 name:FETCH_GROUPS : Fetch groups entering CPU execution pipes event:0x3 counters:0 um:zero minimum:500 name:FP_INSNS_COMPLETED : Instructions completed in FPU datapath (computational event:instructions only) event:0x4 counters:0 um:zero minimum:500 name:TLB_REFILLS_TAKEN : Taken TLB refill exceptions event:0x5 counters:0 um:zero minimum:500 name:BRANCHES_MISSPREDICTED : Branches that mispredicted before completing execution event:0x6 counters:0 um:zero minimum:500 name:BRANCHES_COMPLETED : Branches that completed execution event:0x7 counters:0 um:zero minimum:500 name:JTLB_EXCEPTIONS : Taken Joint-TLB exceptions event:0x8 counters:0 um:zero minimum:500 name:REPLAY_DUE_TO_LOAD_DEPENDENT_SPEC_DISPATCH : Replays due to load-dependent speculative dispatch event:0x9 counters:0 um:zero minimum:500 name:INSN_REQ_FROM_IFU_TO_BIU : Instruction requests from the IFU to the BIU event:0xa counters:0 um:zero minimum:500 name:FPU_EXCEPTIONS_TAKEN : Taken FPU exceptions event:0xb counters:0 um:zero minimum:500 name:REPLAYS : Total number of LSU requested replays, Load-dependent speculative dispatch or FPU exception prediction replays. event:0xc counters:0 um:zero minimum:500 name:RPS_MISSPREDICTS : JR instructions that mispredicted using the Return Prediction Stack (RPS) event:0xd counters:0 um:zero minimum:500 name:JR_INSNS_COMPLETED : JR instruction that completed execution event:0xe counters:0 um:zero minimum:500 name:LSU_REPLAYS : LSU requested replays event:0xf counters:0 um:zero minimum:500 name:INSNS_COMPLETED : Instruction that completed execution (with or without exception) oprofile-1.3.0/events/mips/20K/unit_masks0000664000175000017500000000013312534404406015164 00000000000000# # MIPS 20Kc possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/loongson2/0000775000175000017500000000000013323173530014531 500000000000000oprofile-1.3.0/events/mips/loongson2/events0000664000175000017500000000530412534404406015704 00000000000000# loongson2 Events # event:0x00 counters:0 um:zero minimum:10000 name:CPU_CLK_UNHALTED : Cycles outside of haltstate event:0x01 counters:0 um:zero minimum:5000 name:BRANCH_INSTRUCTIONS : Branch instructions event:0x02 counters:0 um:zero minimum:400 name:JUMP_INSTRUCTIONS : JR instructions event:0x03 counters:0 um:zero minimum:500 name:JR31_INSTRUCTIONS : JR(rs=31) instructions event:0x04 counters:0 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache misses event:0x05 counters:0 um:zero minimum:500 name:ALU1_ISSUED : ALU1 operation issued event:0x06 counters:0 um:zero minimum:8000 name:MEM_ISSUED : Memory read/write issued event:0x07 counters:0 um:zero minimum:300 name:FALU1_ISSUED : Float ALU1 operation issued event:0x08 counters:0 um:zero minimum:200 name:BHT_BRANCH_INSTRUCTIONS : BHT prediction instructions event:0x09 counters:0 um:zero minimum:200 name:MEM_READ : Read from primary memory event:0x0a counters:0 um:zero minimum:300 name:FQUEUE_FULL : Fix queue full event:0x0b counters:0 um:zero minimum:300 name:ROQ_FULL : Reorder queue full event:0x0c counters:0 um:zero minimum:300 name:CP0_QUEUE_FULL : CP0 queue full event:0x0d counters:0 um:zero minimum:300 name:TLB_REFILL : TLB refill exception event:0x0e counters:0 um:zero minimum:5 name:EXCEPTION : Exceptions event:0x0f counters:0 um:zero minimum:300 name:INTERNAL_EXCEPTION : Internal exceptions event:0x10 counters:1 um:zero minimum:5000 name:INSTRUCTION_COMMITTED : Instruction committed event:0x11 counters:1 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch mispredicted event:0x12 counters:1 um:zero minimum:200 name:JR_MISPREDICTED : JR mispredicted event:0x13 counters:1 um:zero minimum:200 name:JR31_MISPREDICTED : JR31 mispredicted event:0x14 counters:1 um:zero minimum:500 name:DCACHE_MISSES : Data cache misses event:0x15 counters:1 um:zero minimum:500 name:ALU2_ISSUED : ALU2 operation issued event:0x16 counters:1 um:zero minimum:500 name:FALU2_ISSUED : FALU2 operation issued event:0x17 counters:1 um:zero minimum:500 name:UNCACHED_ACCESS : Uncached accesses event:0x18 counters:1 um:zero minimum:500 name:BHT_MISPREDICTED : Branch history table mispredicted event:0x19 counters:1 um:zero minimum:5000 name:MEM_WRITE : Write to memory event:0x1a counters:1 um:zero minimum:500 name:FTQ_FULL : Float queue full event:0x1b counters:1 um:zero minimum:500 name:BRANCH_QUEUE_FULL : Branch queue full event:0x1c counters:1 um:zero minimum:500 name:ITLB_MISSES : Instruction TLB misses event:0x1d counters:1 um:zero minimum:500 name:TOTAL_EXCEPTIONS : Total exceptions event:0x1e counters:1 um:zero minimum:500 name:LOAD_SPECULATION_MISSES : Load speculation misses event:0x1f counters:1 um:zero minimum:500 name:CP0Q_FORWARD_VALID : CP0 queue forward valid oprofile-1.3.0/events/mips/loongson2/unit_masks0000664000175000017500000000013112534404406016546 00000000000000# loongson2 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/r10000/0000775000175000017500000000000013323173530013433 500000000000000oprofile-1.3.0/events/mips/r10000/events0000664000175000017500000000675012534404406014614 00000000000000# # R10000 events # # The same event numbers mean different things on the two counters # event:0x00 counters:0,1 um:zero minimum:500 name:CYCLES : Cycles event:0x01 counters:0 um:zero minimum:500 name:INSTRUCTIONS_ISSUED : Instructions issued event:0x01 counters:1 um:zero minimum:500 name:INSTRUCTIONS_GRADUATED : Instructions graduated event:0x02 counters:0 um:zero minimum:500 name:LOAD_PREFETC_SYNC_CACHEOP_ISSUED : Load / prefetch / sync / CacheOp issued event:0x02 counters:1 um:zero minimum:500 name:LOAD_PREFETC_SYNC_CACHEOP_GRADUATED : Load / prefetch / sync / CacheOp graduated event:0x03 counters:0 um:zero minimum:500 name:STORES_ISSUED : Stores issued event:0x03 counters:1 um:zero minimum:500 name:STORES_GRADUATED : Stores graduated event:0x04 counters:0 um:zero minimum:500 name:STORE_COND_ISSUED : Store conditional issued event:0x04 counters:1 um:zero minimum:500 name:STORE_COND_GRADUATED : Store conditional graduated event:0x05 counters:0 um:zero minimum:500 name:FAILED_STORE_CONDITIONAL : Failed store conditional event:0x05 counters:1 um:zero minimum:500 name:FP_INSTRUCTON_GRADUATED : Floating-point instructions graduated event:0x06 counters:0 um:zero minimum:500 name:BRANCHES_RESOLVED : Branches resolved event:0x06 counters:1 um:zero minimum:500 name:QUADWORDS_WB_FROM_PRIMARY_DCACHE : Quadwords written back from primary data cache event:0x07 counters:0 um:zero minimum:500 name:QUADWORDS_WB_FROM_SCACHE : Quadwords written back from secondary cache event:0x07 counters:1 um:zero minimum:500 name:TLB_REFILL_EXCEPTIONS : TLB refill exceptions event:0x08 counters:0 um:zero minimum:500 name:CORRECTABLE_ECC_ERRORS_SCACHE : Correctable ECC errors on secondary cache data event:0x08 counters:1 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branches mispredicted event:0x09 counters:0 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction cache misses event:0x09 counters:1 um:zero minimum:500 name:SCACHE_LOAD_STORE_CACHEOP_OPERATIONS : Secondary cache load / store and cache-ops operations event:0x0a counters:0 um:zero minimum:500 name:SCACHE_MISSES_INSTRUCTION : Secondary cache misses (instruction) event:0x0a counters:1 um:zero minimum:500 name:SCACHE_MISSES_DATA : Secondary cache misses (data) event:0x0b counters:0 um:zero minimum:500 name:SCACHE_WAY_MISPREDICTED_INSN : Secondary cache way mispredicted (instruction) event:0x0b counters:1 um:zero minimum:500 name:SCACHE_WAY_MISPREDICTED_DATA : Secondary cache way mispredicted (data) event:0x0c counters:0 um:zero minimum:500 name:EXTERNAL_INTERVENTION_RQ : External intervention requests event:0x0c counters:1 um:zero minimum:500 name:EXTERNAL_INTERVENTION_RQ_HITS_SCACHE : External intervention request is determined to have hit in secondary cache event:0x0d counters:0 um:zero minimum:500 name:EXTERNAL_INVALIDATE_RQ : External invalidate requests event:0x0d counters:1 um:zero minimum:500 name:EXTERNAL_INVALIDATE_RQ_HITS_SCACHE : External invalidate request is determined to have hit in secondary cache event:0x0e counters:0 um:zero minimum:500 name:FUNCTIONAL_UNIT_COMPLETION_CYCLES : Functional unit completion cycles event:0x0e counters:1 um:zero minimum:500 name:STORES_OR_STORE_PREF_TO_CLEANEXCLUSIVE_SCACHE_BLOCKS : Stores or prefetches with store hint to CleanExclusive secondary cache blocks event:0x0f counters:0 um:zero minimum:500 name:INSTRUCTION_GRADUATED : Instructions graduated event:0x0f counters:1 um:zero minimum:500 name:STORES_OR_STORE_PREF_TO_SHD_SCACHE_BLOCKS : Stores or prefetches with store hint to Shared secondary cache blocks oprofile-1.3.0/events/mips/r10000/unit_masks0000664000175000017500000000013512534404406015454 00000000000000# # MIPS R10000 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/r12000/0000775000175000017500000000000013323173530013435 500000000000000oprofile-1.3.0/events/mips/r12000/events0000664000175000017500000000657412534404406014622 00000000000000# # R12000 events # event:0x0 counters:0,1,2,3 um:zero minimum:500 name:CYCLES : Cycles event:0x1 counters:0,1,2,3 um:zero minimum:500 name:DECODED_INSTRUCTIONS : Decoded instructions event:0x2 counters:0,1,2,3 um:zero minimum:500 name:DECODED_LOADS : Decoded loads event:0x3 counters:0,1,2,3 um:zero minimum:500 name:DECODED_STORES : Decoded stores event:0x4 counters:0,1,2,3 um:zero minimum:500 name:MISS_TABLE_OCCUPANCY : Miss Handling Table Occupancy event:0x5 counters:0,1,2,3 um:zero minimum:500 name:FAILED_STORE_CONDITIONAL : Failed store conditional event:0x6 counters:0,1,2,3 um:zero minimum:500 name:RESOLVED_BRANCH_CONDITIONAL : Resolved conditional branches event:0x7 counters:0,1,2,3 um:zero minimum:500 name:QUADWORRDS_WRITEBACK_FROM_SC : Quadwords written back from secondary cache event:0x8 counters:0,1,2,3 um:zero minimum:500 name:CORRECTABLE_ECC_ERRORS : Correctable ECC errors on secondary cache data event:0x9 counters:0,1,2,3 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache misses event:0xa counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_SECONDARY_CACHE_MISSES : Secondary cache misses (instruction) event:0xb counters:0,1,2,3 um:zero minimum:500 name:SECONDARY_CACHE_WAY_MISSPREDICTED : Secondary cache way mispredicted (instruction) event:0xc counters:0,1,2,3 um:zero minimum:500 name:INTERVENTION_REQUESTS : External intervention requests event:0xd counters:0,1,2,3 um:zero minimum:500 name:EXTERNAL_REQUESTS : External invalidate requests event:0xf counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTIONS_GRADUATED : Instructions graduated event:0x10 counters:0,1,2,3 um:zero minimum:500 name:PREFETCH_INSTRUCTIONS_EXECUTED : Executed prefetch instructions event:0x11 counters:0,1,2,3 um:zero minimum:500 name:PREFETCH_MISSES_IN_DCACHE : Primary data cache misses by prefetch instructions event:0x12 counters:0,1,2,3 um:zero minimum:500 name:GRADUATED_LOADS : Graduated loads event:0x13 counters:0,1,2,3 um:zero minimum:500 name:GRADUATED_STORES : Graduated stores event:0x14 counters:0,1,2,3 um:zero minimum:500 name:GRADUATED_STORE_CONDITIONALS : Graduated store conditionals event:0x15 counters:0,1,2,3 um:zero minimum:500 name:GRADUATED_FP_INSTRUCTIONS : Graduated floating point instructions event:0x16 counters:0,1,2,3 um:zero minimum:500 name:QUADWORDS : Quadwords written back from primary data cache event:0x17 counters:0,1,2,3 um:zero minimum:500 name:TLB_MISSES : TLB misses event:0x18 counters:0,1,2,3 um:zero minimum:500 name:MISPREDICTED_BRANCHES : Mispredicted branches event:0x19 counters:0,1,2,3 um:zero minimum:500 name:DCACHE_MISSES : Primary data cache misses event:0x1a counters:0,1,2,3 um:zero minimum:500 name:SCACHE_MISSES : Secondary cache misses (data) event:0x1b counters:0,1,2,3 um:zero minimum:500 name:SCACHE_WAY_MISPREDICTION : Misprediction from scache way prediction table (data) event:0x1c counters:0,1,2,3 um:zero minimum:500 name:STATE_OF_SCACHE_INTERVENTION_HIT : State of external intervention hit in secondary cache event:0x1d counters:0,1,2,3 um:zero minimum:500 name:STATE_OF_EXTERNAL_INVALIDATION_HIT : State of external invalidation hits in secondary cache event:0x1e counters:0,1,2,3 um:zero minimum:500 name:STORE_PREFETCH_EXCLUSIVE_TO_CLEAN_SC_BLOCK : Store/prefetch exclusive to clean block in secondary cache event:0x1f counters:0,1,2,3 um:zero minimum:500 name:STORE_PREFETCH_EXCLUSIVE_SHARED_SC_BLOCK : Store/prefetch exclusive to shared block in secondary oprofile-1.3.0/events/mips/r12000/unit_masks0000664000175000017500000000023412534404406015456 00000000000000# # MIPS R12000 possible unit masks # # We don't support the R12000 conditional count feature yet. # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/74K/0000775000175000017500000000000013323173530013156 500000000000000oprofile-1.3.0/events/mips/74K/events0000664000175000017500000003704712534404406014342 00000000000000# # MIPS 74K # # The 74K CPUs have four performance counters. # # Even/odd counters are distinguished by setting bit 10 in the event # mask. The kernel masks this bit out before writing the control # register. # # Events specific to all counters # event:0x0 counters:0,1,2,3 um:zero minimum:500 name:CYCLES : 0-0 Cycles event:0x1 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTIONS : 1-0 Instructions graduated # # Events specific to counters 0 and 2 # event:0x2 counters:0,2 um:zero minimum:500 name:PREDICTED_JR_31 : 2-0 JR $31 (return) instructions predicted including speculative instructions event:0x3 counters:0,2 um:zero minimum:500 name:REDIRECT_STALLS : 3-0 Stall cycles due to register indirect jumps (including non-predicted JR $31), ERET/WAIT instructions, and IFU determined exception event:0x4 counters:0,2 um:zero minimum:500 name:ITLB_ACCESSES : 4-0 Instruction micro-TLB accesses event:0x6 counters:0,2 um:zero minimum:500 name:ICACHE_ACCESSES : 6-0 Instruction cache accesses including speculative instructions event:0x7 counters:0,2 um:zero minimum:500 name:ICACHE_MISS_STALLS : 7-0 Instruction cache miss stall cycles event:0x8 counters:0,2 um:zero minimum:500 name:UNCACHED_IFETCH_STALLS : 8-0 Uncached instruction fetch stall cycles event:0x9 counters:0,2 um:zero minimum:500 name:IFU_REPLAYS : 9-0 Replays within the IFU due to full Instruction Buffer event:0xb counters:0,2 um:zero minimum:500 name:IFU_IDU_MISS_PRED_UPSTREAM_CYCLES : 11-0 Cycles IFU-IDU gate is closed (to prevent upstream from getting ahead) due to mispredicted branch event:0xc counters:0,2 um:zero minimum:500 name:IFU_IDU_CLOGED_DOWNSTREAM_CYCLES : 12-0 Cycles IFU-IDU gate is closed (waiting for downstream to unclog) due to MTC0/MFC0 sequence in pipe, EHB, or blocked DD, DR, or DS event:0xd counters:0,2 um:zero minimum:500 name:DDQ0_FULL_DR_STALLS : 13-0 DR stage stall cycles due to DDQ0 (ALU out-of-order dispatch queue) full event:0xe counters:0,2 um:zero minimum:500 name:ALCB_FULL_DR_STALLS : 14-0 DR stage stall cycles due to ALCB (ALU completion buffers) full event:0xf counters:0,2 um:zero minimum:500 name:CLDQ_FULL_DR_STALLS : 15-0 DR stage stall cycles due to CLDQ (data comming back from FPU) full event:0x10 counters:0,2 um:zero minimum:500 name:ALU_EMPTY_CYCLES : 16-0 DDQ0 (ALU out-of-order dispatch queue) empty cycles event:0x11 counters:0,2 um:zero minimum:500 name:ALU_OPERANDS_NOT_READY_CYCLES : 17-0 DDQ0 (ALU out-of-order dispatch queue) no issue cycles with valid instructions but operands not ready event:0x12 counters:0,2 um:zero minimum:500 name:ALU_NO_ISSUES_CYCLES : 18-0 DDQ0 (ALU out-of-order dispatch queue) no issue cycles with valid instructions due to operand(s) not available, MDU busy, or CorExt resource busy event:0x13 counters:0,2 um:zero minimum:500 name:ALU_BUBBLE_CYCLES : 19-0 DDQ0 (ALU out-of-order dispatch queue) bubbles due to MFC1 data write event:0x14 counters:0,2 um:zero minimum:500 name:SINGLE_ISSUE_CYCLES : 20-0 Either DDQ0 (ALU out-of-order dispatch queue) or DDQ1 (AGEN out-of-order dispatch queue) valid instruction issue cycles event:0x15 counters:0,2 um:zero minimum:500 name:OOO_ALU_ISSUE_CYCLES : 21-0 Out-of-order ALU issue cycles (issued instruction is not the oldest in the pool) event:0x16 counters:0,2 um:zero minimum:500 name:JALR_JALR_HB_INSNS : 22-0 Graduated JALR/JALR.HB instructions event:0x17 counters:0,2 um:zero minimum:500 name:DCACHE_LOAD_ACCESSES : 23-0 Counts all accesses to the data cache caused by load instructions event:0x18 counters:0,2 um:zero minimum:500 name:DCACHE_WRITEBACKS : 24-0 Data cache writebacks event:0x19 counters:0,2 um:zero minimum:500 name:JTLB_DATA_ACCESSES : 25-0 Joint TLB data (non-instruction) accesses event:0x1a counters:0,2 um:zero minimum:500 name:LOAD_STORE_REPLAYS : 26-0 Load/store generated replays - load/store follows too closely a matching CACHEOP event:0x1b counters:0,2 um:zero minimum:500 name:LOAD_STORE_BLOCKED_CYCLES : 27-0 Load/store graduation blocked cycles due to CP1/2 store data not ready, SYNC/SYNCI/SC/CACHEOP at the head, or FSB/LDQ/WBB/ITU FIFO full event:0x1c counters:0,2 um:zero minimum:500 name:L2_CACHE_WRITEBACKS : 28-0 L2 Cache Writebacks event:0x1d counters:0,2 um:zero minimum:500 name:L2_CACHE_MISSES : 29-0 L2 Cache Misses event:0x1e counters:0,2 um:zero minimum:500 name:FSB_FULL_STALLS : 30-0 Pipe stall cycles due to FSB full event:0x1f counters:0,2 um:zero minimum:500 name:LDQ_FULL_STALLS : 31-0 Pipe stall cycles due to LDQ full event:0x20 counters:0,2 um:zero minimum:500 name:WBB_FULL_STALLS : 32-0 Pipe stall cycles due to WBB full event:0x23 counters:0,2 um:zero minimum:500 name:LOAD_MISS_CONSUMER_REPLAYS : 35-0 Replays following optimistic issue of instruction dependent on load which missed, counted only when the dependent instruction graduates event:0x24 counters:0,2 um:zero minimum:500 name:JR_NON_31_INSNS : 36-0 jr $xx (not $31) instructions graduated (at same cost as a mispredict) event:0x25 counters:0,2 um:zero minimum:500 name:BRANCH_INSNS : 37-0 Branch instructions graduated, excluding CP1/CP2 conditional branches event:0x26 counters:0,2 um:zero minimum:500 name:BRANCH_LIKELY_INSNS : 38-0 Branch likely instructions graduated including CP1 and CP2 branch likely instructions event:0x27 counters:0,2 um:zero minimum:500 name:COND_BRANCH_INSNS : 39-0 Conditional branches graduated event:0x28 counters:0,2 um:zero minimum:500 name:INTEGER_INSNS : 40-0 Integer instructions graduated including NOP, SSNOP, MOVCI, and EHB event:0x29 counters:0,2 um:zero minimum:500 name:LOAD_INSNS : 41-0 Loads graduated including CP1 ans CP2 loads event:0x2a counters:0,2 um:zero minimum:500 name:J_JAL_INSNS : 42-0 J/JAL graduated event:0x2b counters:0,2 um:zero minimum:500 name:NOP_INSNS : 43-0 NOP instructions graduated - SLL 0, NOP, SSNOP, and EHB event:0x2c counters:0,2 um:zero minimum:500 name:DSP_INSNS : 44-0 DSP instructions graduated event:0x2d counters:0,2 um:zero minimum:500 name:DSP_BRANCH_INSNS : 45-0 DSP branch instructions graduated event:0x2e counters:0,2 um:zero minimum:500 name:UNCACHED_LOAD_INSNS : 46-0 Uncached loads graduated event:0x31 counters:0,2 um:zero minimum:500 name:EJTAG_INSN_TRIGGERS : 49-0 EJTAG instruction triggerpoints event:0x32 counters:0,2 um:zero minimum:500 name:CP1_BRANCH_MISPREDICTIONS : 50-0 CP1 branches mispredicted event:0x33 counters:0,2 um:zero minimum:500 name:SC_INSNS : 51-0 SC instructions graduated event:0x34 counters:0,2 um:zero minimum:500 name:PREFETCH_INSNS : 52-0 Prefetch instructions graduated event:0x35 counters:0,2 um:zero minimum:500 name:NO_INSN_CYCLES : 53-0 No instructions graduated cycles event:0x36 counters:0,2 um:zero minimum:500 name:ONE_INSN_CYCLES : 54-0 One instruction graduated cycles event:0x37 counters:0,2 um:zero minimum:500 name:GFIFO_BLOCKED_CYCLES : 55-0 GFIFO blocked cycles event:0x38 counters:0,2 um:zero minimum:500 name:MISPREDICTION_STALLS : 56-0 Cycles from the time of a pipe kill due to mispredict until the first new instruction graduates event:0x39 counters:0,2 um:zero minimum:500 name:MISPREDICTED_BRANCH_INSNS_CYCLES : 57-0 Mispredicted branch instruction graduation cycles without the delay slot event:0x3a counters:0,2 um:zero minimum:500 name:EXCEPTIONS_TAKEN : 58-0 Exceptions taken event:0x3b counters:0,2 um:zero minimum:500 name:COREEXTEND_EVENTS : 59-0 Implementation specific CorExtend events event:0x3e counters:0,2 um:zero minimum:500 name:ISPRAM_EVENTS : 62-0 Implementation specific ISPRAM events event:0x3f counters:0,2 um:zero minimum:500 name:L2_CACHE_SINGLE_BIT_ERRORS : 63-0 Single bit errors corrected in L2 event:0x40 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_0 : 64-0 Implementation specific system event 0 event:0x41 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_2 : 65-0 Implementation specific system event 2 event:0x42 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_4 : 66-0 Implementation specific system event 4 event:0x43 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_6 : 67-0 Implementation specific system event 6 event:0x44 counters:0,2 um:zero minimum:500 name:OCP_ALL_REQUESTS : 68-0 All OCP requests accepted event:0x45 counters:0,2 um:zero minimum:500 name:OCP_READ_REQUESTS : 69-0 OCP read requests accepted event:0x46 counters:0,2 um:zero minimum:500 name:OCP_WRITE_REQUESTS : 70-0 OCP write requests accepted event:0x4a counters:0,2 um:zero minimum:500 name:FSB_LESS_25_FULL : 74-0 FSB < 25% full event:0x4b counters:0,2 um:zero minimum:500 name:LDQ_LESS_25_FULL : 75-0 LDQ < 25% full event:0x4c counters:0,2 um:zero minimum:500 name:WBB_LESS_25_FULL : 76-0 WBB < 25% full # # Events specific to counters 1 and 3 # event:0x402 counters:1,3 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 2-1 JR $31 (return) instructions mispredicted event:0x403 counters:1,3 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 3-1 JR $31 (return) instructions not predicted event:0x404 counters:1,3 um:zero minimum:500 name:ITLB_MISSES : 4-1 Instruction micro-TLB misses event:0x405 counters:1,3 um:zero minimum:500 name:JTLB_INSN_MISSES : 5-1 Joint TLB instruction misses event:0x406 counters:1,3 um:zero minimum:500 name:ICACHE_MISSES : 6-1 Instruction cache misses, includes misses from fetch-ahead and speculation event:0x408 counters:1,3 um:zero minimum:500 name:PDTRACE_BACK_STALLS : 8-1 PDtrace back stalls event:0x409 counters:1,3 um:zero minimum:500 name:KILLED_FETCH_SLOTS : 9-1 Valid fetch slots killed due to taken branches/jumps or stalling instructions event:0x40b counters:1,3 um:zero minimum:500 name:IFU_IDU_NO_FETCH_CYCLES : 11-1 Cycles IFU-IDU gate open but no instructions fetched by IFU event:0x40d counters:1,3 um:zero minimum:500 name:DDQ1_FULL_DR_STALLS : 13-1 DR stage stall cycles due to DDQ1 (AGEN out-of-order dispatch queue) full event:0x40e counters:1,3 um:zero minimum:500 name:AGCB_FULL_DR_STALLS : 14-1 DR stage stall cycles due to AGCB (AGEN completion buffers) full event:0x40f counters:1,3 um:zero minimum:500 name:IODQ_FULL_DR_STALLS : 15-1 DR stage stall cycles due to IODQ (data comming back from IO) full event:0x410 counters:1,3 um:zero minimum:500 name:AGEN_EMPTY_CYCLES : 16-1 DDQ1 (AGEN out-of-order dispatch queue) empty cycles event:0x411 counters:1,3 um:zero minimum:500 name:AGEN_OPERANDS_NOT_READY_CYCLES : 17-1 DDQ1 (AGEN out-of-order dispatch queue) no issue cycles with valid instructions but operands not ready event:0x412 counters:1,3 um:zero minimum:500 name:AGEN_NO_ISSUES_CYCLES : 18-1 DDQ1 (AGEN out-of-order dispatch queue) no issue cycles with valid instructions due to operand(s) not available, non-issued stores blocking ready to issue loads, or non-issued CACHEOPs blocking ready to issue loads event:0x413 counters:1,3 um:zero minimum:500 name:AGEN_BUBBLE_CYCLES : 19-1 DDQ1 (AGEN out-of-order dispatch queue) bubbles due to MFC2 data write or cache access from FSB event:0x414 counters:1,3 um:zero minimum:500 name:DUAL_ISSUE_CYCLES : 20-1 Both DDQ0 (ALU out-of-order dispatch queue) and DDQ1 (AGEN out-of-order dispatch queue) valid instruction issue cycles event:0x415 counters:1,3 um:zero minimum:500 name:OOO_AGEN_ISSUE_CYCLES : 21-1 Out-of-order AGEN issue cycles (issued instruction is not the oldest in the pool) event:0x416 counters:1,3 um:zero minimum:500 name:DCACHE_LINE_REFILL_REQUESTS : 22-1 Data cache line loads (line refill requests) event:0x417 counters:1,3 um:zero minimum:500 name:DCACHE_ACCESSES : 23-1 Data cache accesses event:0x418 counters:1,3 um:zero minimum:500 name:DCACHE_MISSES : 24-1 Data cache misses event:0x419 counters:1,3 um:zero minimum:500 name:JTLB_DATA_MISSES : 25-1 Joint TLB data (non-instruction) misses event:0x41a counters:1,3 um:zero minimum:500 name:VA_TRANSALTION_CORNER_CASES : 26-1 Virtual memory address translation synonyms, homonyms, and aliases (loads/stores treated as miss in the cache) event:0x41b counters:1,3 um:zero minimum:500 name:LOAD_STORE_NO_FILL_REQUESTS : 27-1 Load/store graduations not resulting in a bus request because misses at integer pipe graduation turn into hit or merge with outstanding fill request event:0x41c counters:1,3 um:zero minimum:500 name:L2_CACHE_ACCESSES : 28-1 Accesses to the L2 cache event:0x41d counters:1,3 um:zero minimum:500 name:L2_CACHE_MISS_CYCLES : 29-1 Cycles a L2 miss is outstanding, but not necessarily stalling the pipeline event:0x41e counters:1,3 um:zero minimum:500 name:FSB_OVER_50_FULL : 30-1 FSB > 50% full event:0x41f counters:1,3 um:zero minimum:500 name:LDQ_OVER_50_FULL : 31-1 LDQ > 50% full event:0x420 counters:1,3 um:zero minimum:500 name:WBB_OVER_50_FULL : 32-1 WBB > 50% full event:0x423 counters:1,3 um:zero minimum:500 name:CP1_CP2_LOAD_INSNS : 35-1 CP1/CP2 load instructions graduated event:0x424 counters:1,3 um:zero minimum:500 name:MISPREDICTED_JR_31_INSNS : 36-1 jr $31 instructions graduated after mispredict event:0x425 counters:1,3 um:zero minimum:500 name:CP1_CP2_COND_BRANCH_INSNS : 37-1 CP1/CP2 conditional branch instructions graduated event:0x426 counters:1,3 um:zero minimum:500 name:MISPREDICTED_BRANCH_LIKELY_INSNS : 38-1 Mispredicted branch likely instructions graduated event:0x427 counters:1,3 um:zero minimum:500 name:MISPREDICTED_BRANCH_INSNS : 39-1 Mispredicted branches graduated event:0x428 counters:1,3 um:zero minimum:500 name:FPU_INSNS : 40-1 FPU instructions graduated event:0x429 counters:1,3 um:zero minimum:500 name:STORE_INSNS : 41-1 Store instructions graduated including CP1 ans CP2 stores event:0x42a counters:1,3 um:zero minimum:500 name:MIPS16_INSNS : 42-1 MIPS16 instructions graduated event:0x42b counters:1,3 um:zero minimum:500 name:NT_MUL_DIV_INSNS : 43-1 Integer multiply/divide instructions graduated event:0x42c counters:1,3 um:zero minimum:500 name:ALU_DSP_SATURATION_INSNS : 44-1 ALU-DSP graduated, result was saturated event:0x42d counters:1,3 um:zero minimum:500 name:MDU_DSP_SATURATION_INSNS : 45-1 MDU-DSP graduated, result was saturated event:0x42e counters:1,3 um:zero minimum:500 name:UNCACHED_STORE_INSNS : 46-1 Uncached stores graduated event:0x433 counters:1,3 um:zero minimum:500 name:FAILED_SC_INSNS : 51-1 SC instructions failed event:0x434 counters:1,3 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 52-1 PREFETCH instructions which did nothing, because they hit in the cache event:0x435 counters:1,3 um:zero minimum:500 name:LOAD_MISS_INSNS : 53-1 Cacheable load instructions that miss in the cache graduated event:0x436 counters:1,3 um:zero minimum:500 name:TWO_INSNS_CYCLES : 54-1 Two instructions graduated cycles event:0x437 counters:1,3 um:zero minimum:500 name:CP1_CP2_STORE_INSNS : 55-1 CP1/CP2 Store graduated event:0x43a counters:1,3 um:zero minimum:500 name:GRADUATION_REPLAYS : 58-1 Replays initiated from graduation event:0x43e counters:1,3 um:zero minimum:500 name:DSPRAM_EVENTS : 62-1 Implementation specific events from the DSPRAM block event:0x440 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_1 : 64-1 Implementation specific system event 1 event:0x441 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_3 : 65-1 Implementation specific system event 3 event:0x442 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_5 : 66-1 Implementation specific system event 5 event:0x443 counters:0,2 um:zero minimum:500 name:SYSTEM_EVENT_7 : 67-1 Implementation specific system event 7 event:0x444 counters:0,2 um:zero minimum:500 name:OCP_ALL_CACHEABLE_REQUESTS : 68-1 All OCP cacheable requests accepted event:0x445 counters:0,2 um:zero minimum:500 name:OCP_READ_CACHEABLE_REQUESTS : 69-1 OCP cacheable read request accepted event:0x446 counters:0,2 um:zero minimum:500 name:OCP_WRITE_CACHEABLE_REQUESTS : 70-1 OCP cacheable write request accepted event:0x44a counters:0,2 um:zero minimum:500 name:FSB_25_50_FULL : 74-1 FSB 25-50% full event:0x44b counters:0,2 um:zero minimum:500 name:LDQ_25_50_FULL : 75-1 LDQ 25-50% full event:0x44c counters:0,2 um:zero minimum:500 name:WBB_25_50_FULL : 76-1 WBB 25-50% full oprofile-1.3.0/events/mips/74K/unit_masks0000664000175000017500000000013212534404406015174 00000000000000# # MIPS 74K possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/vr5500/0000775000175000017500000000000013323173530013552 500000000000000oprofile-1.3.0/events/mips/vr5500/events0000664000175000017500000000212212534404406014720 00000000000000# # VR5500, VR5532 and VR7701 events # # Very similar to what the VR5432 provides. # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : Processor clock cycles event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : Instructions executed event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction event:0x3 counters:0,1 um:zero minimum:500 name:STORES : Execution of store instruction event:0x4 counters:0,1 um:zero minimum:500 name:BRANCHES : Execution of branch instruction event:0x5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : Execution of floating-point instruction event:0x6 counters:0,1 um:zero minimum:500 name:DOUBLEWORDS_FLUSHED : Doubleword flush to main memory event:0x7 counters:0,1 um:zero minimum:500 name:JTLB_REFILLS : TLB refill event:0x8 counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Data cache miss event:0x9 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache miss event:0xa counters:0,1 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch prediction miss oprofile-1.3.0/events/mips/vr5500/unit_masks0000664000175000017500000000013512534404406015573 00000000000000# # MIPS VR5500 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/5K/0000775000175000017500000000000013323173530013070 500000000000000oprofile-1.3.0/events/mips/5K/events0000664000175000017500000000421712534404406014245 00000000000000# # MIPS 5K # # As standard the CPU supports 2 performance counters. Event 0, 2, 3 and 4 # are available on both counters; the INSNS_EXECED is available on counter 0 # as event 0 and on counter 1 as event 1; the remaining are counter-specific. # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : Cycles event:0x2 counters:0,1 um:zero minimum:500 name:LOADS_EXECED : Load/pref(x)/sync/cache-ops executed event:0x3 counters:0,1 um:zero minimum:500 name:STORES_EXECED : Stores (including conditional stores) executed event:0x4 counters:0,1 um:zero minimum:500 name:COND_STORES_EXECED : Conditional stores executed # # Events specific to counter 0 # event:0x1 counters:0 um:zero minimum:500 name:INSN_FETCHED : Instructions fetched event:0x5 counters:0 um:zero minimum:500 name:FAILED_COND_STORES : Failed conditional stores event:0x6 counters:0 um:zero minimum:500 name:BRANCHES_EXECED : Branches executed event:0x7 counters:0 um:zero minimum:500 name:ITLB_MISSES : ITLB miss event:0x8 counters:0 um:zero minimum:500 name:DTLB_MISSES : DTLB miss event:0x9 counters:0 um:zero minimum:500 name:ICACHE_MISS : Instruction cache miss event:0xa counters:0 um:zero minimum:500 name:INSN_SCHEDULED : Instruction scheduled event:0xe counters:0 um:zero minimum:500 name:DUAL_ISSUED_INSNS : Dual issued instructions executed event:0xf counters:0 um:zero minimum:500 name:INSNS_EXECED : Instructions executed # # Events specific to counter 1 # event:0x1 counters:1 um:zero minimum:500 name:INSNS_EXECED : Instructions executed event:0x5 counters:1 um:zero minimum:500 name:FP_INSNS_EXECED : Floating-point instructions executed event:0x6 counters:1 um:zero minimum:500 name:DCACHE_LINE_EVICTED : Data cache line evicted event:0x7 counters:1 um:zero minimum:500 name:TLB_MISS_EXCEPTIONS : TLB miss exceptions event:0x8 counters:1 um:zero minimum:500 name:BRANCHES_MISSPREDICTED : Branch mispredicted event:0x9 counters:1 um:zero minimum:500 name:DCACHE_MISS : Data cache miss event:0xa counters:1 um:zero minimum:500 name:CONFLICT_STALL_M_STAGE : Instruction stall in M stage due to scheduling conflicts event:0xf counters:1 um:zero minimum:500 name:COP2_INSNS_EXECED : COP2 instructions executed oprofile-1.3.0/events/mips/5K/unit_masks0000664000175000017500000000013112534404406015105 00000000000000# # MIPS 5K possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/rm9000/0000775000175000017500000000000013323173530013540 500000000000000oprofile-1.3.0/events/mips/rm9000/events0000664000175000017500000000547612534404406014725 00000000000000# # RM9000 events # event:0x00 counters:0,1 um:zero minimum:500 name:CYCLES : Processor clock cycles event:0x01 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_ISSUED : Instructions issued event:0x02 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS_ISSUED : Floating-point instructions issued event:0x03 counters:0,1 um:zero minimum:500 name:INT_INSTRUCTIONS_ISSUED : Integer instructions issued event:0x04 counters:0,1 um:zero minimum:500 name:LOAD_INSTRUCTIONS_ISSUED : Load instructions issued event:0x05 counters:0,1 um:zero minimum:500 name:STORE_INSTRUCTIONS_ISSUED : Store instructions issued event:0x06 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_DUAL_ISSUED : Dual-issued instruction pairs event:0x07 counters:0,1 um:zero minimum:500 name:BRANCH_MISSPREDICTS : Branch mispredictions event:0x09 counters:0,1 um:zero minimum:500 name:STALL_CYCLES : Stall cycles event:0x0a counters:0,1 um:zero minimum:500 name:L2_CACHE_MISSES : L2 cache misses event:0x0b counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Icache misses event:0x0c counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Dcache misses event:0x0d counters:0,1 um:zero minimum:500 name:DTLB_MISSES : Data TLB misses event:0x0e counters:0,1 um:zero minimum:500 name:ITLB_MISSES : Instruction TLB misses event:0x0f counters:0,1 um:zero minimum:500 name:JTLB_INSTRUCTION_MISSES : Joint TLB instruction misses event:0x10 counters:0,1 um:zero minimum:500 name:JTLB_DATA_MISSES : Joint TLB data misses event:0x11 counters:0,1 um:zero minimum:500 name:BRANCHES_TAKEN : Branches taken event:0x12 counters:0,1 um:zero minimum:500 name:BRANCHES_ISSUED : Branch instructions issued event:0x13 counters:0,1 um:zero minimum:500 name:L2_WRITEBACKS : L2 cache writebacks event:0x14 counters:0,1 um:zero minimum:500 name:DCACHE_WRITEBACKS : Dcache writebacks event:0x15 counters:0,1 um:zero minimum:500 name:DCACHE_MISS_STALL_CYCLES : Dcache-miss stall cycles event:0x16 counters:0,1 um:zero minimum:500 name:CACHE_REMISSES : Cache remisses event:0x17 counters:0,1 um:zero minimum:500 name:FP_POSSIBLE_EXCEPTION_CYCLES : Floating-point possible exception cycles event:0x18 counters:0,1 um:zero minimum:500 name:MULTIPLIER_BUSY_SLIP_CYCLES : Slip cycles due to busy multiplier event:0x19 counters:0,1 um:zero minimum:500 name:COP0_SLIP_CYCLES : Co-processor 0 slip cycles event:0x1a counters:0,1 um:zero minimum:500 name:NONBLOCKING_LOAD_SLIP_CYCLES : Slip cycles due to pending non-blocking loads event:0x1b counters:0,1 um:zero minimum:500 name:WRITE_BUFFER_FULL_STALL_CYCLES : Stall cycles due to a full write buffer event:0x1c counters:0,1 um:zero minimum:500 name:CACHE_INSN_STALL_CYCLES : Stall cycles due to cache instructions event:0x1e counters:0,1 um:zero minimum:500 name:NONBLOCKING_LOAD_PENDING_EXCEPTION_STALL_CYCLES : Stall cycles due to pending non-blocking loads - stall start of exception oprofile-1.3.0/events/mips/rm9000/unit_masks0000664000175000017500000000013512534404406015561 00000000000000# # MIPS RM9000 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/vr5432/0000775000175000017500000000000013323173530013556 500000000000000oprofile-1.3.0/events/mips/vr5432/events0000664000175000017500000000221512534404406014727 00000000000000# # VR5432 events # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : Processor cycles (PClock) event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : (Instructions executed)/2 and truncated event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Load, prefetch/CacheOps execution (no sync) event:0x3 counters:0,1 um:zero minimum:500 name:STORES : Store execution event:0x4 counters:0,1 um:zero minimum:500 name:BRANCHES : Branch execution (no jumps or jump registers) event:0x5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : (FP instruction execution) / 2 and truncated excluding cp1 loads and stores event:0x6 counters:0,1 um:zero minimum:500 name:DOUBLEWORDS_FLUSHED : Doublewords flushed to main memory (no uncached stores) event:0x7 counters:0,1 um:zero minimum:500 name:JTLB_REFILLS : JTLB refills event:0x8 counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Data cache misses (no I-cache misses) event:0x9 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache misses (no D-cache misses) event:0xa counters:0,1 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branches mispredicted oprofile-1.3.0/events/mips/vr5432/unit_masks0000664000175000017500000000013512534404406015577 00000000000000# # MIPS VR5432 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/24K/0000775000175000017500000000000013323173530013151 500000000000000oprofile-1.3.0/events/mips/24K/events0000664000175000017500000002402612534404406014326 00000000000000# # MIPS 24K # # The 24K CPUs have two performance counters. # # Even/odd counters are distinguished by setting bit 10 in the event # mask. The kernel masks this bit out before writing the control # register. # # Events specific to both counters # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : 0-0 Cycles event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS : 1-0 Instructions completed event:0xb counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : 11-0 Data cache misses # # Events specific to counter 0 # event:0x2 counters:0 um:zero minimum:500 name:BRANCH_INSNS : 2-0 Branch instructions (whether completed or mispredicted) event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict) event:0x5 counters:0 um:zero minimum:500 name:ITLB_ACCESSES : 5-0 Instruction micro-TLB accesses event:0x6 counters:0 um:zero minimum:500 name:DTLB_ACCESSES : 6-0 Data micro-TLB accesses event:0x7 counters:0 um:zero minimum:500 name:JTLB_INSN_ACCESSES : 7-0 Joint TLB instruction accesses event:0x8 counters:0 um:zero minimum:500 name:JTLB_DATA_ACCESSES : 8-0 Joint TLB data (non-instruction) accesses event:0x9 counters:0 um:zero minimum:500 name:ICACHE_ACCESSES : 9-0 Instruction cache accesses event:0xa counters:0 um:zero minimum:500 name:DCACHE_ACCESSES : 10-0 Data cache accesses event:0xd counters:0 um:zero minimum:500 name:STORE_MISS_INSNS : 13-0 Cacheable stores that miss in the cache event:0xe counters:0 um:zero minimum:500 name:INTEGER_INSNS : 14-0 Integer instructions completed event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP) event:0x10 counters:0 um:zero minimum:500 name:J_JAL_INSNS : 16-0 J/JAL instructions completed event:0x11 counters:0 um:zero minimum:500 name:NO_OPS_INSNS : 17-0 no-ops completed, ie instructions writing $0 event:0x12 counters:0 um:zero minimum:500 name:ALL_STALLS : 18-0 Stall cycles, including ALU and IFU event:0x13 counters:0 um:zero minimum:500 name:SC_INSNS : 19-0 SC instructions completed event:0x14 counters:0 um:zero minimum:500 name:PREFETCH_INSNS : 20-0 PREFETCH instructions completed event:0x15 counters:0 um:zero minimum:500 name:L2_CACHE_WRITEBACKS : 21-0 L2 cache lines written back to memory event:0x16 counters:0 um:zero minimum:500 name:L2_CACHE_MISSES : 22-0 L2 cache accesses that missed in the cache event:0x17 counters:0 um:zero minimum:500 name:EXCEPTIONS_TAKEN : 23-0 Exceptions taken event:0x18 counters:0 um:zero minimum:500 name:CACHE_FIXUP_CYCLES : 24-0 Cache fixup cycles (specific to the 24K family microarchitecture) event:0x19 counters:0 um:zero minimum:500 name:IFU_STALLS : 25-0 IFU stall cycles event:0x1a counters:0 um:zero minimum:500 name:DSP_INSNS : 26-0 DSP instructions completed event:0x1d counters:0 um:zero minimum:500 name:ISPRAM_EVENTS : 29-0 Implementation specific ISPRAM events event:0x1e counters:0 um:zero minimum:500 name:COREEXTEND_EVENTS : 30-0 Implementation specific CorExtend events event:0x21 counters:0 um:zero minimum:500 name:UNCACHED_LOAD_INSNS : 33-0 Uncached load instructions event:0x23 counters:0 um:zero minimum:500 name:CP2_ARITH_INSNS : 35-0 CP2 arithmetic instructions completed # # Count number of cycles (most often ``stall cycles'', ie time lost), not just number of events. # event:0x25 counters:0 um:zero minimum:500 name:ICACHE_MISS_STALLS : 37-0 Stall cycles due to an instruction cache miss event:0x26 counters:0 um:zero minimum:500 name:SYNC_STALLS : 38-0 SYNC stall cycles event:0x27 counters:0 um:zero minimum:500 name:DCACHE_MISS_CYCLES : 39-0 Cycles a data cache miss is outstanding, but not necessarily stalling the pipeline event:0x28 counters:0 um:zero minimum:500 name:UNCACHED_STALLS : 40-0 Uncached stall cycles event:0x29 counters:0 um:zero minimum:500 name:MDU_STALLS : 41-0 MDU stall cycles event:0x2a counters:0 um:zero minimum:500 name:CP2_STALLS : 42-0 CP2 stall cycles event:0x2b counters:0 um:zero minimum:500 name:ISPRAM_STALLS : 43-0 ISPRAM stall cycles event:0x2c counters:0 um:zero minimum:500 name:CACHE_INSN_STALLS : 44-0 Stall cycless due to CACHE instructions event:0x2d counters:0 um:zero minimum:500 name:LOAD_USE_STALLS : 45-0 Load to use stall cycles event:0x2e counters:0 um:zero minimum:500 name:INTERLOCK_STALLS : 46-0 Stall cycles due to return data from MFC0 and RDHWR instructions event:0x30 counters:0 um:zero minimum:500 name:IFU_FB_FULL_REFETCHES : 48-0 Refetches due to cache misses while both fill buffers already allocated event:0x31 counters:0 um:zero minimum:500 name:EJTAG_INSN_TRIGGERS : 49-0 EJTAG instruction triggerpoints # # # Monitor the state of various FIFO queues in the load/store unit: # FSB (``fill/store buffer'') # LDQ (``load queue'') # WBB (``write-back buffer'') # event:0x32 counters:0 um:zero minimum:500 name:FSB_LESS_25_FULL : 50-0 FSB < 25% full event:0x33 counters:0 um:zero minimum:500 name:FSB_OVER_50_FULL : 51-0 FSB > 50% full event:0x34 counters:0 um:zero minimum:500 name:LDQ_LESS_25_FULL : 52-0 LDQ < 25% full event:0x35 counters:0 um:zero minimum:500 name:LDQ_OVER_50_FULL : 53-0 LDQ > 50% full event:0x36 counters:0 um:zero minimum:500 name:WBB_LESS_25_FULL : 54-0 WBB < 25% full event:0x37 counters:0 um:zero minimum:500 name:WBB_OVER_50_FULL : 55-0 WBB > 50% full # # Events specific to counter 1 # event:0x402 counters:1 um:zero minimum:500 name:MISPREDICTED_BRANCH_INSNS : 2-1 Branch mispredictions event:0x403 counters:1 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 3-1 JR $31 mispredictions event:0x404 counters:1 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 4-1 JR $31 not predicted (stack mismatch). event:0x405 counters:1 um:zero minimum:500 name:ITLB_MISSES : 5-1 Instruction micro-TLB misses event:0x406 counters:1 um:zero minimum:500 name:DTLB_MISSES : 6-1 Data micro-TLB misses event:0x407 counters:1 um:zero minimum:500 name:JTLB_INSN_MISSES : 7-1 Joint TLB instruction misses event:0x408 counters:1 um:zero minimum:500 name:JTLB_DATA_MISSES : 8-1 Joint TLB data (non-instruction) misses event:0x409 counters:1 um:zero minimum:500 name:ICACHE_MISSES : 9-1 Instruction cache misses event:0x40a counters:1 um:zero minimum:500 name:DCACHE_WRITEBACKS : 10-1 Data cache lines written back to memory event:0x40d counters:1 um:zero minimum:500 name:LOAD_MISS_INSNS : 13-1 Cacheable load instructions that miss in the cache event:0x40e counters:1 um:zero minimum:500 name:FPU_INSNS : 14-1 FPU instructions completed (not including loads/stores) event:0x40f counters:1 um:zero minimum:500 name:STORE_INSNS : 15-1 Stores completed (including FP) event:0x410 counters:1 um:zero minimum:500 name:MIPS16_INSNS : 16-1 MIPS16 instructions completed event:0x411 counters:1 um:zero minimum:500 name:INT_MUL_DIV_INSNS : 17-1 Integer multiply/divide instructions completed event:0x412 counters:1 um:zero minimum:500 name:REPLAYED_INSNS : 18-1 Replayed instructions event:0x413 counters:1 um:zero minimum:500 name:SC_INSNS_FAILED : 19-1 SC instructions completed, but store failed (because the link bit had been cleared) event:0x414 counters:1 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 20-1 PREFETCH instructions completed with cache hit event:0x415 counters:1 um:zero minimum:500 name:L2_CACHE_ACCESSES : 21-1 Accesses to the L2 cache event:0x416 counters:1 um:zero minimum:500 name:L2_CACHE_SINGLE_BIT_ERRORS : 22-1 Single bit errors corrected in L2 event:0x419 counters:1 um:zero minimum:500 name:ALU_STALLS : 25-1 ALU stall cycles event:0x41a counters:1 um:zero minimum:500 name:ALU_DSP_SATURATION_INSNS : 26-1 ALU-DSP saturation instructions event:0x41b counters:1 um:zero minimum:500 name:MDU_DSP_SATURATION_INSNS : 27-1 MDU-DSP saturation instructions event:0x41c counters:1 um:zero minimum:500 name:CP2_EVENTS : 28-1 Implementation specific CP2 events event:0x41d counters:1 um:zero minimum:500 name:DSPRAM_EVENTS : 29-1 Implementation specific DSPRAM events event:0x421 counters:1 um:zero minimum:500 name:UNCACHED_STORE_INSNS : 33-1 Uncached store instructions event:0x423 counters:1 um:zero minimum:500 name:CP2_TO_FROM_INSNS : 35-1 CP2 to/from instructions (moves, control, loads, stores) # # Count number of cycles (most often ``stall cycles'', ie time lost), not just number of events. # event:0x425 counters:1 um:zero minimum:500 name:DCACHE_MISS_STALLS : 37-1 Stall cycles due to a data cache miss event:0x426 counters:1 um:zero minimum:500 name:FSB_INDEX_CONFLICT_STALLS : 38-1 FSB (fill/store buffer) index conflict stall cycles event:0x427 counters:1 um:zero minimum:500 name:L2_CACHE_MISS_CYCLES : 39-1 Cycles a L2 miss is outstanding, but not necessarily stalling the pipeline event:0x429 counters:1 um:zero minimum:500 name:FPU_STALLS : 41-1 FPU stall cycles event:0x42a counters:1 um:zero minimum:500 name:COREEXTEND_STALLS : 42-1 CorExtend stall cycles event:0x42b counters:1 um:zero minimum:500 name:DSPRAM_STALLS : 43-1 DSPRAM stall cycles event:0x42d counters:1 um:zero minimum:500 name:ALU_TO_AGEN_STALLS : 45-1 ALU to AGEN stall cycles event:0x42e counters:1 um:zero minimum:500 name:MISPREDICTION_STALLS : 46-1 Branch mispredict stall cycles event:0x430 counters:1 um:zero minimum:500 name:FB_ENTRY_ALLOCATED_CYCLES : 48-1 Cycles while at least one IFU fill buffer is allocated event:0x431 counters:1 um:zero minimum:500 name:EJTAG_DATA_TRIGGERS : 49-1 EJTAG Data triggerpoints # # Monitor the state of various FIFO queues in the load/store unit: # FSB (``fill/store buffer'') # LDQ (``load queue'') # WBB (``write-back buffer'') # Some count events, others count stall cycles. # event:0x432 counters:1 um:zero minimum:500 name:FSB_25_50_FULL : 50-1 FSB 25-50% full event:0x433 counters:1 um:zero minimum:500 name:FSB_FULL_STALLS : 51-1 FSB full pipeline stall cycles event:0x434 counters:1 um:zero minimum:500 name:LDQ_25_50_FULL : 52-1 LDQ 25-50% full event:0x435 counters:1 um:zero minimum:500 name:LDQ_FULL_STALLS : 53-1 LDQ full pipeline stall cycles event:0x436 counters:1 um:zero minimum:500 name:WBB_25_50_FULL : 54-1 WBB 25-50% full event:0x437 counters:1 um:zero minimum:500 name:WBB_FULL_STALLS : 55-1 WBB full pipeline stall cycles oprofile-1.3.0/events/mips/24K/unit_masks0000664000175000017500000000013212534404406015167 00000000000000# # MIPS 24K possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/1004K/0000775000175000017500000000000013323173530013310 500000000000000oprofile-1.3.0/events/mips/1004K/events0000664000175000017500000003205612534404406014467 00000000000000# # MIPS 1004K # # The 1004K CPUs have two performance counters. # # Even/odd counters are distinguished by setting bit 10 in the event # mask. The kernel masks this bit out before writing the control # register. # # Events specific to both counters # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : 0-0 Cycles event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS : 1-0 Instructions completed event:0xb counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : 11-0 Data cache misses # # Events specific to counter 0 # event:0x2 counters:0 um:zero minimum:500 name:BRANCH_INSNS : 2-0 Branch instructions (whether completed or mispredicted) event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict) event:0x5 counters:0 um:zero minimum:500 name:ITLB_ACCESSES : 5-0 Instruction micro-TLB accesses event:0x6 counters:0 um:zero minimum:500 name:DTLB_ACCESSES : 6-0 Data micro-TLB accesses event:0x7 counters:0 um:zero minimum:500 name:JTLB_INSN_ACCESSES : 7-0 Joint TLB instruction accesses event:0x8 counters:0 um:zero minimum:500 name:JTLB_DATA_ACCESSES : 8-0 Joint TLB data (non-instruction) accesses event:0x9 counters:0 um:zero minimum:500 name:ICACHE_ACCESSES : 9-0 Instruction cache accesses event:0xa counters:0 um:zero minimum:500 name:DCACHE_ACCESSES : 10-0 Data cache accesses event:0xd counters:0 um:zero minimum:500 name:STORE_MISS_INSNS : 13-0 Cacheable stores that miss in the cache event:0xe counters:0 um:zero minimum:500 name:INTEGER_INSNS : 14-0 Integer instructions completed event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP) event:0x10 counters:0 um:zero minimum:500 name:J_JAL_INSNS : 16-0 J/JAL instructions completed event:0x11 counters:0 um:zero minimum:500 name:NO_OPS_INSNS : 17-0 no-ops completed, ie instructions writing $0 event:0x12 counters:0 um:zero minimum:500 name:ALL_STALLS : 18-0 Stall cycles, including ALU and IFU event:0x13 counters:0 um:zero minimum:500 name:SC_INSNS : 19-0 SC instructions completed event:0x14 counters:0 um:zero minimum:500 name:PREFETCH_INSNS : 20-0 PREFETCH instructions completed event:0x15 counters:0 um:zero minimum:500 name:L2_CACHE_WRITEBACKS : 21-0 L2 cache lines written back to memory event:0x16 counters:0 um:zero minimum:500 name:L2_CACHE_MISSES : 22-0 L2 cache accesses that missed in the cache event:0x17 counters:0 um:zero minimum:500 name:EXCEPTIONS_TAKEN : 23-0 Exceptions taken event:0x18 counters:0 um:zero minimum:500 name:CACHE_FIXUP_CYCLES : 24-0 Cache fixup cycles (specific to the 34K family microarchitecture) event:0x19 counters:0 um:zero minimum:500 name:IFU_STALLS : 25-0 IFU stall cycles event:0x1a counters:0 um:zero minimum:500 name:DSP_INSNS : 26-0 DSP instructions completed event:0x1c counters:0 um:zero minimum:500 name:POLICY_EVENTS : 28-0 Implementation specific policy manager events event:0x1d counters:0 um:zero minimum:500 name:ISPRAM_EVENTS : 29-0 Implementation specific ISPRAM events event:0x1e counters:0 um:zero minimum:500 name:COREEXTEND_EVENTS : 30-0 Implementation specific CorExtend events event:0x1f counters:0 um:zero minimum:500 name:YIELD_EVENTS : 31-0 Implementation specific yield events event:0x20 counters:0 um:zero minimum:500 name:ITC_LOADS : 32-0 ITC Loads event:0x21 counters:0 um:zero minimum:500 name:UNCACHED_LOAD_INSNS : 33-0 Uncached load instructions event:0x22 counters:0 um:zero minimum:500 name:FORK_INSNS : 34-0 Fork instructions completed event:0x23 counters:0 um:zero minimum:500 name:CP2_ARITH_INSNS : 35-0 CP2 arithmetic instructions completed event:0x24 counters:0 um:zero minimum:500 name:INTERVENTION_STALLS : 36-0 Cache coherence intervention processing stall cycles # # Count number of cycles (most often ``stall cycles'', ie time lost), not just number of events. # event:0x25 counters:0 um:zero minimum:500 name:ICACHE_MISS_STALLS : 37-0 Stall cycles due to an instruction cache miss event:0x27 counters:0 um:zero minimum:500 name:DCACHE_MISS_CYCLES : 39-0 Cycles a data cache miss is outstanding, but not necessarily stalling the pipeline event:0x28 counters:0 um:zero minimum:500 name:UNCACHED_STALLS : 40-0 Uncached stall cycles event:0x29 counters:0 um:zero minimum:500 name:MDU_STALLS : 41-0 MDU stall cycles event:0x2a counters:0 um:zero minimum:500 name:CP2_STALLS : 42-0 CP2 stall cycles event:0x2b counters:0 um:zero minimum:500 name:ISPRAM_STALLS : 43-0 ISPRAM stall cycles event:0x2c counters:0 um:zero minimum:500 name:CACHE_INSN_STALLS : 44-0 Stall cycless due to CACHE instructions event:0x2d counters:0 um:zero minimum:500 name:LOAD_USE_STALLS : 45-0 Load to use stall cycles event:0x2e counters:0 um:zero minimum:500 name:INTERLOCK_STALLS : 46-0 Stall cycles due to return data from MFC0, RDHWR, and MFTR instructions event:0x2f counters:0 um:zero minimum:500 name:RELAX_STALLS : 47-0 Low power stall cycles (operations) as requested by the policy manager event:0x30 counters:0 um:zero minimum:500 name:IFU_FB_FULL_REFETCHES : 48-0 Refetches due to cache misses while both fill buffers already allocated event:0x31 counters:0 um:zero minimum:500 name:EJTAG_INSN_TRIGGERS : 49-0 EJTAG instruction triggerpoints # # # Monitor the state of various FIFO queues in the load/store unit: # FSB (``fill/store buffer'') # LDQ (``load queue'') # WBB (``write-back buffer'') # Some count events, others count stall cycles. # event:0x32 counters:0 um:zero minimum:500 name:FSB_LESS_25_FULL : 50-0 FSB < 25% full event:0x33 counters:0 um:zero minimum:500 name:FSB_OVER_50_FULL : 51-0 FSB > 50% full event:0x34 counters:0 um:zero minimum:500 name:LDQ_LESS_25_FULL : 52-0 LDQ < 25% full event:0x35 counters:0 um:zero minimum:500 name:LDQ_OVER_50_FULL : 53-0 LDQ > 50% full event:0x36 counters:0 um:zero minimum:500 name:WBB_LESS_25_FULL : 54-0 WBB < 25% full event:0x37 counters:0 um:zero minimum:500 name:WBB_OVER_50_FULL : 55-0 WBB > 50% full event:0x38 counters:0 um:zero minimum:500 name:INTERVENTION_HIT_COUNT : 56-0 External interventions that hit in the cache event:0x39 counters:0 um:zero minimum:500 name:INVALIDATE_INTERVENTION_COUNT : 57-0 External invalidate (i.e. leaving a cache line in the invalid state) interventions event:0x3a counters:0 um:zero minimum:500 name:EVICTION_COUNT : 58-0 Cache lines written back due to cache replacement or non-coherent cache operation event:0x3b counters:0 um:zero minimum:500 name:MESI_INVAL_COUNT : 59-0 MESI protocol transitions into invalid state event:0x3c counters:0 um:zero minimum:500 name:MESI_MODIFIED_COUNT : 60-0 MESI protocol transitions into modified state event:0x3d counters:0 um:zero minimum:500 name:SELF_INTERVENTION_LATENCY : 61-0 Latency from miss detection to self intervention event:0x3e counters:0 um:zero minimum:500 name:READ_RESPONSE_LATENCY : 62-0 Read latency from miss detection until critical dword of response is returned # # Events specific to counter 1 # event:0x402 counters:1 um:zero minimum:500 name:MISPREDICTED_BRANCH_INSNS : 2-1 Branch mispredictions event:0x403 counters:1 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 3-1 JR $31 mispredictions event:0x404 counters:1 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 4-1 JR $31 not predicted (stack mismatch). event:0x405 counters:1 um:zero minimum:500 name:ITLB_MISSES : 5-1 Instruction micro-TLB misses event:0x406 counters:1 um:zero minimum:500 name:DTLB_MISSES : 6-1 Data micro-TLB misses event:0x407 counters:1 um:zero minimum:500 name:JTLB_INSN_MISSES : 7-1 Joint TLB instruction misses event:0x408 counters:1 um:zero minimum:500 name:JTLB_DATA_MISSES : 8-1 Joint TLB data (non-instruction) misses event:0x409 counters:1 um:zero minimum:500 name:ICACHE_MISSES : 9-1 Instruction cache misses event:0x40a counters:1 um:zero minimum:500 name:DCACHE_WRITEBACKS : 10-1 Data cache lines written back to memory event:0x40d counters:1 um:zero minimum:500 name:LOAD_MISS_INSNS : 13-1 Cacheable load instructions that miss in the cache event:0x40e counters:1 um:zero minimum:500 name:FPU_INSNS : 14-1 FPU instructions completed (not including loads/stores) event:0x40f counters:1 um:zero minimum:500 name:STORE_INSNS : 15-1 Stores completed (including FP) event:0x410 counters:1 um:zero minimum:500 name:MIPS16_INSNS : 16-1 MIPS16 instructions completed event:0x411 counters:1 um:zero minimum:500 name:INT_MUL_DIV_INSNS : 17-1 Integer multiply/divide instructions completed event:0x412 counters:1 um:zero minimum:500 name:REPLAYED_INSNS : 18-1 Replayed instructions event:0x413 counters:1 um:zero minimum:500 name:SC_INSNS_FAILED : 19-1 SC instructions completed, but store failed (because the link bit had been cleared) event:0x414 counters:1 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 20-1 PREFETCH instructions completed with cache hit event:0x415 counters:1 um:zero minimum:500 name:L2_CACHE_ACCESSES : 21-1 Accesses to the L2 cache event:0x416 counters:1 um:zero minimum:500 name:L2_CACHE_SINGLE_BIT_ERRORS : 22-1 Single bit errors corrected in L2 event:0x417 counters:1 um:zero minimum:500 name:SINGLE_THREADED_CYCLES : 23-1 Cycles while one and only one TC is eligible for scheduling event:0x418 counters:1 um:zero minimum:500 name:REFETCHED_INSNS : 24-1 Replayed instructions sent back to IFU to be refetched event:0x419 counters:1 um:zero minimum:500 name:ALU_STALLS : 25-1 ALU stall cycles event:0x41a counters:1 um:zero minimum:500 name:ALU_DSP_SATURATION_INSNS : 26-1 ALU-DSP saturation instructions event:0x41b counters:1 um:zero minimum:500 name:MDU_DSP_SATURATION_INSNS : 27-1 MDU-DSP saturation instructions event:0x41c counters:1 um:zero minimum:500 name:CP2_EVENTS : 28-1 Implementation specific CP2 events event:0x41d counters:1 um:zero minimum:500 name:DSPRAM_EVENTS : 29-1 Implementation specific DSPRAM events event:0x41f counters:1 um:zero minimum:500 name:ITC_EVENT : 31-1 Implementation specific yield event event:0x421 counters:1 um:zero minimum:500 name:UNCACHED_STORE_INSNS : 33-1 Uncached store instructions event:0x423 counters:1 um:zero minimum:500 name:CP2_TO_FROM_INSNS : 35-1 CP2 to/from instructions (moves, control, loads, stores) event:0x424 counters:1 um:zero minimum:500 name:INTERVENTION_MISS_STALLS : 36-1 Cache coherence intervention processing stall cycles due to an earlier miss # # Count number of cycles (most often ``stall cycles'', ie time lost), not just number of events. # event:0x425 counters:1 um:zero minimum:500 name:DCACHE_MISS_STALLS : 37-1 Stall cycles due to a data cache miss event:0x426 counters:1 um:zero minimum:500 name:FSB_INDEX_CONFLICT_STALLS : 38-1 FSB (fill/store buffer) index conflict stall cycles event:0x427 counters:1 um:zero minimum:500 name:L2_CACHE_MISS_CYCLES : 39-1 Cycles a L2 miss is outstanding, but not necessarily stalling the pipeline event:0x428 counters:1 um:zero minimum:500 name:ITC_STALLS : 40-1 ITC stall cycles event:0x429 counters:1 um:zero minimum:500 name:FPU_STALLS : 41-1 FPU stall cycles event:0x42a counters:1 um:zero minimum:500 name:COREEXTEND_STALLS : 42-1 CorExtend stall cycles event:0x42b counters:1 um:zero minimum:500 name:DSPRAM_STALLS : 43-1 DSPRAM stall cycles event:0x42d counters:1 um:zero minimum:500 name:ALU_TO_AGEN_STALLS : 45-1 ALU to AGEN stall cycles event:0x42e counters:1 um:zero minimum:500 name:MISPREDICTION_STALLS : 46-1 Branch mispredict stall cycles event:0x430 counters:1 um:zero minimum:500 name:FB_ENTRY_ALLOCATED_CYCLES : 48-1 Cycles while at least one IFU fill buffer is allocated event:0x431 counters:1 um:zero minimum:500 name:EJTAG_DATA_TRIGGERS : 49-1 EJTAG Data triggerpoints # # Monitor the state of various FIFO queues in the load/store unit: # FSB (``fill/store buffer'') # LDQ (``load queue'') # WBB (``write-back buffer'') # Some count events, others count stall cycles. # event:0x432 counters:1 um:zero minimum:500 name:FSB_25_50_FULL : 50-1 FSB 25-50% full event:0x433 counters:1 um:zero minimum:500 name:FSB_FULL_STALLS : 51-1 FSB full pipeline stall cycles event:0x434 counters:1 um:zero minimum:500 name:LDQ_25_50_FULL : 52-1 LDQ 25-50% full event:0x435 counters:1 um:zero minimum:500 name:LDQ_FULL_STALLS : 53-1 LDQ full pipeline stall cycles event:0x436 counters:1 um:zero minimum:500 name:WBB_25_50_FULL : 54-1 WBB 25-50% full event:0x437 counters:1 um:zero minimum:500 name:WBB_FULL_STALLS : 55-1 WBB full pipeline stall cycles event:0x438 counters:1 um:zero minimum:500 name:INTERVENTION_COUNT : 56-1 External interventions event:0x439 counters:1 um:zero minimum:500 name:INVALIDATE_INTERVENTION_HIT_COUNT : 57-1 External invalidate interventions that hit in the cache event:0x43a counters:1 um:zero minimum:500 name:WRITEBACK_COUNT : 58-1 Cache lines written back due to cache replacement or any cache operation (non-coherent, self, or external coherent) event:0x43b counters:1 um:zero minimum:500 name:MESI_EXCLUSIVE_COUNT : 59-1 MESI protocol transitions into exclusive state event:0x43c counters:1 um:zero minimum:500 name:MESI_SHARED_COUNT : 60-1 MESI protocol transitions into shared state event:0x43d counters:1 um:zero minimum:500 name:SELF_INTERVENTION_COUNT : 61-1 Self intervention requests on miss detection event:0x43e counters:1 um:zero minimum:500 name:READ_RESPONSE_COUNT : 62-1 Read requests on miss detection oprofile-1.3.0/events/mips/1004K/unit_masks0000664000175000017500000000013412534404406015330 00000000000000# # MIPS 1004K possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/25K/0000775000175000017500000000000013323173530013152 500000000000000oprofile-1.3.0/events/mips/25K/events0000664000175000017500000001063412534404406014327 00000000000000# # MIPS 25Kf # # The 25Kf has two performance counters # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : CPU cycles event:0x1 counters:0,1 um:zero minimum:500 name:INSN_ISSUED : Dispatched/issued instructions event:0x2 counters:0,1 um:zero minimum:500 name:FP_INSNS_ISSUED : FPU instructions issued event:0x3 counters:0,1 um:zero minimum:500 name:INT_INSNS_ISSUED : Integer instructions issued event:0x4 counters:0,1 um:zero minimum:500 name:LOAD_INSNS_ISSUED : Load instructions issued event:0x5 counters:0,1 um:zero minimum:500 name:STORE_INSNS_ISSUED : Store instructions issued event:0x6 counters:0,1 um:zero minimum:500 name:BRANCHES_JUMPS_ISSUED : Branch/Jump instructions issued event:0x7 counters:0,1 um:zero minimum:500 name:DUAL_ISSUED_PAIRS : Dual-issued pairs event:0x8 counters:0,1 um:zero minimum:500 name:INSNS_COMPLETE : Instruction that completed execution (with or without exception) event:0x9 counters:0,1 um:zero minimum:500 name:FETCH_GROUPS_IN_PIPE : Fetch groups entering CPU execution pipes # # FPU: # event:0xa counters:0,1 um:zero minimum:500 name:INSN_FP_DATAPATH_COMPLETED : Instructions completed in FPU datapath (computational instructions only) event:0xb counters:0,1 um:zero minimum:500 name:FP_EXCEPTIONS_TAKEN : Taken FPU exceptions event:0xc counters:0,1 um:zero minimum:500 name:FP_EXCEPTION_PREDICTED : Predicted FPU exceptions # # Branch/Jump Prediction: # event:0xd counters:0,1 um:zero minimum:500 name:BRANCHES_MISSPREDICTED : Branches that mispredicted before completing execution event:0xe counters:0,1 um:zero minimum:500 name:BRANCHES_COMPLETED : Branches that completed execution event:0xf counters:0,1 um:zero minimum:500 name:JR_RPD_MISSPREDICTED : JR instructions that mispredicted using the Return Prediction Stack event:0x10 counters:0,1 um:zero minimum:500 name:JR_COMPLETED : JR instruction that completed execution # # Memory Management: # event:0x11 counters:0,1 um:zero minimum:500 name:UTLB_MISSES : U-TLB misses event:0x12 counters:0,1 um:zero minimum:500 name:JTLB_MISSES_IFETCH : Raw count of Joint-TLB misses for instruction fetch event:0x13 counters:0,1 um:zero minimum:500 name:JTLB_MISSES_LOADS_STORES : Raw count of Joint-TLB misses for loads/stores event:0x14 counters:0,1 um:zero minimum:500 name:JTLB_EXCEPTIONS : Refill, Invalid and Modified TLB exceptions # # Machine Check # event:0x15 counters:0,1 um:zero minimum:500 name:JTLB_IFETCH_REFILL_EXCEPTIONS : Joint-TLB refill exceptions due to instruction fetch event:0x16 counters:0,1 um:zero minimum:500 name:JTLB_DATA_ACCESS_REFILL_EXCEPTIONS : Joint-TLB refill exceptions due to data access event:0x17 counters:0,1 um:zero minimum:500 name:JTLB_REFILL_EXCEPTIONS : total Joint-TLB Instruction exceptions (refill) # # I-Cache Efficiency: # event:0x18 counters:0,1 um:zero minimum:500 name:INSNS_FETCHED_FROM_ICACHE : Total number of instructions fetched from the I-Cache event:0x19 counters:0,1 um:zero minimum:500 name:INSN_REQ_FROM_IFU_BIU : instruction requests from the IFU to the BIU event:0x1a counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : I-Cache miss # # D-Cache Efficiency: # event:0x1b counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : D-Cache miss event:0x1c counters:0,1 um:zero minimum:500 name:DCACHE_WRITEBACKS : D-Cache number of write-backs event:0x1d counters:0,1 um:zero minimum:500 name:CACHEABLE_DCACHE_REQUEST : number of cacheable requests to D-Cache # # Level 2 Cache Efficiency: # event:0x1e counters:0,1 um:zero minimum:500 name:L2_MISSES : L2 Cache miss event:0x1f counters:0,1 um:zero minimum:500 name:L2_WBACKS : L2 Cache number of write-backs event:0x20 counters:0,1 um:zero minimum:500 name:CACHEABLE_L2_REQS : Number of cacheable requests to L2 # # Replays: # event:0x21 counters:0,1 um:zero minimum:500 name:REPLAYS_LSU_LOAD_DEP_FPU : LSU requested replays, load-dependent speculative dispatch, FPU exception prediction event:0x22 counters:0,1 um:zero minimum:500 name:LSU_REQ_REPLAYS : LSU requested replays event:0x23 counters:0,1 um:zero minimum:500 name:REPLAYS_LOAD_DEP_DISPATCH : replays due to load-dependent speculative dispatch event:0x24 counters:0,1 um:zero minimum:500 name:REPLAYS_WBB_FULL : replays due to WBB full event:0x25 counters:0,1 um:zero minimum:500 name:FSB_FULL_REPLAYS : replays due to FSB full # # Misc: # event:0x26 counters:0,1 um:zero minimum:500 name:ICACHE_PSEUDO_HITS : I-Cache pseudo-hits event:0x27 counters:0,1 um:zero minimum:500 name:LOAD_STORE_ISSUED : Load/store instructions issued oprofile-1.3.0/events/mips/25K/unit_masks0000664000175000017500000000013312534404406015171 00000000000000# # MIPS 25Kf possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/34K/0000775000175000017500000000000013323173530013152 500000000000000oprofile-1.3.0/events/mips/34K/events0000664000175000017500000002603112534404406014325 00000000000000# # MIPS 34K # # The 34K CPUs have two performance counters. # # Even/odd counters are distinguished by setting bit 10 in the event # mask. The kernel masks this bit out before writing the control # register. # # Events specific to both counters # event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : 0-0 Cycles event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS : 1-0 Instructions completed event:0xb counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : 11-0 Data cache misses # # Events specific to counter 0 # event:0x2 counters:0 um:zero minimum:500 name:BRANCH_INSNS : 2-0 Branch instructions (whether completed or mispredicted) event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict) event:0x5 counters:0 um:zero minimum:500 name:ITLB_ACCESSES : 5-0 Instruction micro-TLB accesses event:0x6 counters:0 um:zero minimum:500 name:DTLB_ACCESSES : 6-0 Data micro-TLB accesses event:0x7 counters:0 um:zero minimum:500 name:JTLB_INSN_ACCESSES : 7-0 Joint TLB instruction accesses event:0x8 counters:0 um:zero minimum:500 name:JTLB_DATA_ACCESSES : 8-0 Joint TLB data (non-instruction) accesses event:0x9 counters:0 um:zero minimum:500 name:ICACHE_ACCESSES : 9-0 Instruction cache accesses event:0xa counters:0 um:zero minimum:500 name:DCACHE_ACCESSES : 10-0 Data cache accesses event:0xd counters:0 um:zero minimum:500 name:STORE_MISS_INSNS : 13-0 Cacheable stores that miss in the cache event:0xe counters:0 um:zero minimum:500 name:INTEGER_INSNS : 14-0 Integer instructions completed event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP) event:0x10 counters:0 um:zero minimum:500 name:J_JAL_INSNS : 16-0 J/JAL instructions completed event:0x11 counters:0 um:zero minimum:500 name:NO_OPS_INSNS : 17-0 no-ops completed, ie instructions writing $0 event:0x12 counters:0 um:zero minimum:500 name:ALL_STALLS : 18-0 Stall cycles, including ALU and IFU event:0x13 counters:0 um:zero minimum:500 name:SC_INSNS : 19-0 SC instructions completed event:0x14 counters:0 um:zero minimum:500 name:PREFETCH_INSNS : 20-0 PREFETCH instructions completed event:0x15 counters:0 um:zero minimum:500 name:L2_CACHE_WRITEBACKS : 21-0 L2 cache lines written back to memory event:0x16 counters:0 um:zero minimum:500 name:L2_CACHE_MISSES : 22-0 L2 cache accesses that missed in the cache event:0x17 counters:0 um:zero minimum:500 name:EXCEPTIONS_TAKEN : 23-0 Exceptions taken event:0x18 counters:0 um:zero minimum:500 name:CACHE_FIXUP_CYCLES : 24-0 Cache fixup cycles (specific to the 34K family microarchitecture) event:0x19 counters:0 um:zero minimum:500 name:IFU_STALLS : 25-0 IFU stall cycles event:0x1a counters:0 um:zero minimum:500 name:DSP_INSNS : 26-0 DSP instructions completed event:0x1c counters:0 um:zero minimum:500 name:POLICY_EVENTS : 28-0 Implementation specific policy manager events event:0x1d counters:0 um:zero minimum:500 name:ISPRAM_EVENTS : 29-0 Implementation specific ISPRAM events event:0x1e counters:0 um:zero minimum:500 name:COREEXTEND_EVENTS : 30-0 Implementation specific CorExtend events event:0x1f counters:0 um:zero minimum:500 name:YIELD_EVENTS : 31-0 Implementation specific yield events event:0x20 counters:0 um:zero minimum:500 name:ITC_LOADS : 32-0 ITC Loads event:0x21 counters:0 um:zero minimum:500 name:UNCACHED_LOAD_INSNS : 33-0 Uncached load instructions event:0x22 counters:0 um:zero minimum:500 name:FORK_INSNS : 34-0 Fork instructions completed event:0x23 counters:0 um:zero minimum:500 name:CP2_ARITH_INSNS : 35-0 CP2 arithmetic instructions completed # # Count number of cycles (most often ``stall cycles'', ie time lost), not just number of events. # event:0x25 counters:0 um:zero minimum:500 name:ICACHE_MISS_STALLS : 37-0 Stall cycles due to an instruction cache miss event:0x27 counters:0 um:zero minimum:500 name:DCACHE_MISS_CYCLES : 39-0 Cycles a data cache miss is outstanding, but not necessarily stalling the pipeline event:0x28 counters:0 um:zero minimum:500 name:UNCACHED_STALLS : 40-0 Uncached stall cycles event:0x29 counters:0 um:zero minimum:500 name:MDU_STALLS : 41-0 MDU stall cycles event:0x2a counters:0 um:zero minimum:500 name:CP2_STALLS : 42-0 CP2 stall cycles event:0x2b counters:0 um:zero minimum:500 name:ISPRAM_STALLS : 43-0 ISPRAM stall cycles event:0x2c counters:0 um:zero minimum:500 name:CACHE_INSN_STALLS : 44-0 Stall cycless due to CACHE instructions event:0x2d counters:0 um:zero minimum:500 name:LOAD_USE_STALLS : 45-0 Load to use stall cycles event:0x2e counters:0 um:zero minimum:500 name:INTERLOCK_STALLS : 46-0 Stall cycles due to return data from MFC0, RDHWR, and MFTR instructions event:0x2f counters:0 um:zero minimum:500 name:RELAX_STALLS : 47-0 Low power stall cycles (operations) as requested by the policy manager event:0x30 counters:0 um:zero minimum:500 name:IFU_FB_FULL_REFETCHES : 48-0 Refetches due to cache misses while both fill buffers already allocated event:0x31 counters:0 um:zero minimum:500 name:EJTAG_INSN_TRIGGERS : 49-0 EJTAG instruction triggerpoints # # # Monitor the state of various FIFO queues in the load/store unit: # FSB (``fill/store buffer'') # LDQ (``load queue'') # WBB (``write-back buffer'') # event:0x32 counters:0 um:zero minimum:500 name:FSB_LESS_25_FULL : 50-0 FSB < 25% full event:0x33 counters:0 um:zero minimum:500 name:FSB_OVER_50_FULL : 51-0 FSB > 50% full event:0x34 counters:0 um:zero minimum:500 name:LDQ_LESS_25_FULL : 52-0 LDQ < 25% full event:0x35 counters:0 um:zero minimum:500 name:LDQ_OVER_50_FULL : 53-0 LDQ > 50% full event:0x36 counters:0 um:zero minimum:500 name:WBB_LESS_25_FULL : 54-0 WBB < 25% full event:0x37 counters:0 um:zero minimum:500 name:WBB_OVER_50_FULL : 55-0 WBB > 50% full event:0x3e counters:0 um:zero minimum:500 name:READ_RESPONSE_LATENCY : 62-0 Read latency from miss detection until critical dword of response is returned # # Events specific to counter 1 # event:0x402 counters:1 um:zero minimum:500 name:MISPREDICTED_BRANCH_INSNS : 2-1 Branch mispredictions event:0x403 counters:1 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 3-1 JR $31 mispredictions event:0x404 counters:1 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 4-1 JR $31 not predicted (stack mismatch). event:0x405 counters:1 um:zero minimum:500 name:ITLB_MISSES : 5-1 Instruction micro-TLB misses event:0x406 counters:1 um:zero minimum:500 name:DTLB_MISSES : 6-1 Data micro-TLB misses event:0x407 counters:1 um:zero minimum:500 name:JTLB_INSN_MISSES : 7-1 Joint TLB instruction misses event:0x408 counters:1 um:zero minimum:500 name:JTLB_DATA_MISSES : 8-1 Joint TLB data (non-instruction) misses event:0x409 counters:1 um:zero minimum:500 name:ICACHE_MISSES : 9-1 Instruction cache misses event:0x40a counters:1 um:zero minimum:500 name:DCACHE_WRITEBACKS : 10-1 Data cache lines written back to memory event:0x40d counters:1 um:zero minimum:500 name:LOAD_MISS_INSNS : 13-1 Cacheable load instructions that miss in the cache event:0x40e counters:1 um:zero minimum:500 name:FPU_INSNS : 14-1 FPU instructions completed (not including loads/stores) event:0x40f counters:1 um:zero minimum:500 name:STORE_INSNS : 15-1 Stores completed (including FP) event:0x410 counters:1 um:zero minimum:500 name:MIPS16_INSNS : 16-1 MIPS16 instructions completed event:0x411 counters:1 um:zero minimum:500 name:INT_MUL_DIV_INSNS : 17-1 Integer multiply/divide instructions completed event:0x412 counters:1 um:zero minimum:500 name:REPLAYED_INSNS : 18-1 Replayed instructions event:0x413 counters:1 um:zero minimum:500 name:SC_INSNS_FAILED : 19-1 SC instructions completed, but store failed (because the link bit had been cleared) event:0x414 counters:1 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 20-1 PREFETCH instructions completed with cache hit event:0x415 counters:1 um:zero minimum:500 name:L2_CACHE_ACCESSES : 21-1 Accesses to the L2 cache event:0x416 counters:1 um:zero minimum:500 name:L2_CACHE_SINGLE_BIT_ERRORS : 22-1 Single bit errors corrected in L2 event:0x417 counters:1 um:zero minimum:500 name:SINGLE_THREADED_CYCLES : 23-1 Cycles while one and only one TC is eligible for scheduling event:0x418 counters:1 um:zero minimum:500 name:REFETCHED_INSNS : 24-1 Replayed instructions sent back to IFU to be refetched event:0x419 counters:1 um:zero minimum:500 name:ALU_STALLS : 25-1 ALU stall cycles event:0x41a counters:1 um:zero minimum:500 name:ALU_DSP_SATURATION_INSNS : 26-1 ALU-DSP saturation instructions event:0x41b counters:1 um:zero minimum:500 name:MDU_DSP_SATURATION_INSNS : 27-1 MDU-DSP saturation instructions event:0x41c counters:1 um:zero minimum:500 name:CP2_EVENTS : 28-1 Implementation specific CP2 events event:0x41d counters:1 um:zero minimum:500 name:DSPRAM_EVENTS : 29-1 Implementation specific DSPRAM events event:0x41f counters:1 um:zero minimum:500 name:ITC_EVENT : 31-1 Implementation specific yield event event:0x421 counters:1 um:zero minimum:500 name:UNCACHED_STORE_INSNS : 33-1 Uncached store instructions event:0x423 counters:1 um:zero minimum:500 name:CP2_TO_FROM_INSNS : 35-1 CP2 to/from instructions (moves, control, loads, stores) # # Count number of cycles (most often ``stall cycles'', ie time lost), not just number of events. # event:0x425 counters:1 um:zero minimum:500 name:DCACHE_MISS_STALLS : 37-1 Stall cycles due to a data cache miss event:0x427 counters:1 um:zero minimum:500 name:L2_CACHE_MISS_CYCLES : 39-1 Cycles a L2 miss is outstanding, but not necessarily stalling the pipeline event:0x428 counters:1 um:zero minimum:500 name:ITC_STALLS : 40-1 ITC stall cycles event:0x429 counters:1 um:zero minimum:500 name:FPU_STALLS : 41-1 FPU stall cycles event:0x42a counters:1 um:zero minimum:500 name:COREEXTEND_STALLS : 42-1 CorExtend stall cycles event:0x42b counters:1 um:zero minimum:500 name:DSPRAM_STALLS : 43-1 DSPRAM stall cycles event:0x42d counters:1 um:zero minimum:500 name:ALU_TO_AGEN_STALLS : 45-1 ALU to AGEN stall cycles event:0x42e counters:1 um:zero minimum:500 name:MISPREDICTION_STALLS : 46-1 Branch mispredict stall cycles event:0x430 counters:1 um:zero minimum:500 name:FB_ENTRY_ALLOCATED_CYCLES : 48-1 Cycles while at least one IFU fill buffer is allocated event:0x431 counters:1 um:zero minimum:500 name:EJTAG_DATA_TRIGGERS : 49-1 EJTAG Data triggerpoints # # Monitor the state of various FIFO queues in the load/store unit: # FSB (``fill/store buffer'') # LDQ (``load queue'') # WBB (``write-back buffer'') # Some count events, others count stall cycles. # event:0x432 counters:1 um:zero minimum:500 name:FSB_25_50_FULL : 50-1 FSB 25-50% full event:0x433 counters:1 um:zero minimum:500 name:FSB_FULL_STALLS : 51-1 FSB full pipeline stall cycles event:0x434 counters:1 um:zero minimum:500 name:LDQ_25_50_FULL : 52-1 LDQ 25-50% full event:0x435 counters:1 um:zero minimum:500 name:LDQ_FULL_STALLS : 53-1 LDQ full pipeline stall cycles event:0x436 counters:1 um:zero minimum:500 name:WBB_25_50_FULL : 54-1 WBB 25-50% full event:0x437 counters:1 um:zero minimum:500 name:WBB_FULL_STALLS : 55-1 WBB full pipeline stall cycles event:0x43e counters:1 um:zero minimum:500 name:READ_RESPONSE_COUNT : 62-1 Read requests on miss detection oprofile-1.3.0/events/mips/34K/unit_masks0000664000175000017500000000013212534404406015170 00000000000000# # MIPS 34K possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/sb1/0000775000175000017500000000000013323173530013276 500000000000000oprofile-1.3.0/events/mips/sb1/events0000664000175000017500000001164112534404406014452 00000000000000# # Sibyte SB1 events # event:0x10 counters:0,1,2,3 um:zero minimum:500 name:CYCLES :Elapsed cycles # Execution Counts and Instruction Slotting event:0x28 counters:1,2,3 um:zero minimum:500 name:ISSUE_L0 :Issue to L0 event:0x29 counters:1,2,3 um:zero minimum:500 name:ISSUE_L1 :Issue to L0 event:0x2a counters:1,2,3 um:zero minimum:500 name:ISSUE_E0 :Issue to E0 event:0x2b counters:1,2,3 um:zero minimum:500 name:ISSUE_E1 :Issue to E1 # Explaining Sub-Peak Performance: Pipeline Traps event:0x2f counters:1,2,3 um:zero minimum:500 name:BRANCH_MISSPREDICTS :Branch mispredicts event:0x1d counters:1,2,3 um:zero minimum:500 name:MBOX_REPLAY :MBOX replay event:0x1c counters:1,2,3 um:zero minimum:500 name:DCFIFO :DCFIFO event:0x1e counters:1,2,3 um:zero minimum:500 name:DATA_DEPENDENCY_REPLAY :Data dependency replay event:0x1b counters:1,2,3 um:zero minimum:500 name:DCACHE_FILL_REPLAY :Dcache fill replay event:0x1f counters:1,2,3 um:zero minimum:500 name:ANY_REPLAY :Any replay except mispredict # Explaining Sub-Peak Performance: static and dynamic stalls event:0x20 counters:1,2,3 um:zero minimum:500 name:MAX_ISSUE :Max issue event:0x21 counters:1,2,3 um:zero minimum:500 name:NO_VALID_INSN :No valid instr to issue event:0x22 counters:1,2,3 um:zero minimum:500 name:CONSUMER_WAITING_FOR_LOAD :load consumer waiting for dfill event:0x23 counters:1,2,3 um:zero minimum:500 name:NOT_DATA_READY :Not data ready event:0x24 counters:1,2,3 um:zero minimum:500 name:RESOURCE_CONSTRAINT :Resource (L0/1 E0/1) constraint event:0x25 counters:1,2,3 um:zero minimum:500 name:ISSUE_CONFLICT_DUE_IMISS :issue conflict due to imiss using LS0 event:0x26 counters:1,2,3 um:zero minimum:500 name:ISSUE_CONFLICT_DUE_DFILL :issue conflict due to dfill using LS0/1 # Grouping Co-issued Instructions event:0x27 counters:1,2,3 um:zero minimum:500 name:INSN_STAGE4 :One or more instructions survives stage 4 # Branch information event:0x2c counters:1,2,3 um:zero minimum:500 name:BRANCH_STAGE4 :Branch survived stage 4 event:0x2d counters:1,2,3 um:zero minimum:500 name:BRANCH_REALLY_TAKEN :Conditional branch was really taken event:0x2e counters:1,2,3 um:zero minimum:500 name:BRANCH_PREDICTED_TAKEN :Predicted taken conditional branch # Cache access event:0x1 counters:1,2,3 um:zero minimum:500 name:RQ_LENGTH :Read queue length event:0x2 counters:1,2,3 um:zero minimum:500 name:UNCACHED_RQ_LENGTH :Number of valid uncached entries in read queue event:0x3 counters:1,2,3 um:zero minimum:500 name:DCACHE_READ_MISS :Dcache read results in a miss event:0xa counters:1,2,3 um:zero minimum:500 name:DCACHE_FILLED_SHD_NONC_EXC :Dcache is filled (shared, nonc, exclusive) event:0xb counters:1,2,3 um:zero minimum:500 name:DCACHE_FILL_SHARED_LINE :Dcache is filled with shared line event:0xc counters:1,2,3 um:zero minimum:500 name:DCACHE_READ_MISS :Dcache read results in a miss event:0xf counters:1,2,3 um:zero minimum:500 name:WRITEBACK_RETURNS :Number of instruction returns event:0xd counters:1,2,3 um:zero minimum:500 name:VICTIM_WRITEBACK :A writeback occurs due to replacement event:0x7 counters:1,2,3 um:zero minimum:500 name:UPGRADE_SHARED_TO_EXCLUSIVE :A line is upgraded from shared to exclusive event:0x6 counters:1,2,3 um:zero minimum:500 name:LD_ST_HITS_PREFETCH_IN_QUEUE :Load/store hits prefetch in read queue event:0x5 counters:1,2,3 um:zero minimum:500 name:PREFETCH_HITS_CACHE_OR_READ_Q :Prefetch hits in cache or read queue event:0x4 counters:1,2,3 um:zero minimum:500 name:READ_HITS_READ_Q :Read hits in read queue # BIU event:0x11 counters:1,2,3 um:zero minimum:500 name:BIU_STALLS_ON_ZB_ADDR_BUS :BIU stalls on ZB addr bus event:0x12 counters:1,2,3 um:zero minimum:500 name:BIU_STALLS_ON_ZB_DATA_BUS :BIU stalls on ZB data bus event:0x13 counters:1,2,3 um:zero minimum:500 name:READ_RQ_SENT_TO_ABUS :Requests sent to ZB Abus event:0x14 counters:1,2,3 um:zero minimum:500 name:READ_RQ_NOPS_SENT_TO_ABUS :Read requests and NOPs sent to ZB Abus event:0x15 counters:1,2,3 um:zero minimum:500 name:READ_RQ_SENT_TO_ABUS :Read requests sent to ZB Abus event:0x16 counters:1,2,3 um:zero minimum:500 name:MBOX_RQ_WHEN_BIU_BUSY :MBOX requests to BIU when BIU busy # Multiprocessor event:0x1a counters:1,2,3 um:zero minimum:500 name:STORE_COND_FAILED :Failed store conditional event:0x16 counters:1,2,3 um:zero minimum:500 name:SNOOP_RQ_HITS :Snoop request hits anywhere event:0x17 counters:1,2,3 um:zero minimum:500 name:SNOOP_ADDR_Q_FULL :Snoop address queue is full event:0x18 counters:1,2,3 um:zero minimum:500 name:R_RESP_OTHER_CORE :Read response comes from the other core event:0x19 counters:1,2,3 um:zero minimum:500 name:R_RESP_OTHER_CORE_D_MOD :Read response comes from the other core with D_MOD set # Instruction Counts event:0x8 counters:1,2,3 um:zero minimum:500 name:LOAD_SURVIVED_STAGE4 :Load survived stage 4 event:0x9 counters:1,2,3 um:zero minimum:500 name:STORE_SURVIVED_STAGE4 :Store survived stage 4 event:0x0 counters:1,2,3 um:zero minimum:500 name:INSN_SURVIVED_STAGE7 :Instruction survived stage 7 oprofile-1.3.0/events/mips/sb1/unit_masks0000664000175000017500000000013412534404406015316 00000000000000# # Sibyte SB1 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/mips/rm7000/0000775000175000017500000000000013323173530013536 500000000000000oprofile-1.3.0/events/mips/rm7000/events0000664000175000017500000000605512534404406014715 00000000000000# # RM7000 events # event:0x00 counters:0,1 um:zero minimum:500 name:CYCLES : Clock cycles event:0x01 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_ISSUED : Total instructions issued event:0x02 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS_ISSUED : Floating-point instructions issued event:0x03 counters:0,1 um:zero minimum:500 name:INTEGER_INSTRUCTIONS_ISSUED : Integer instructions issued event:0x04 counters:0,1 um:zero minimum:500 name:LOAD_INSTRUCTIONS_ISSUED : Load instructions issued event:0x05 counters:0,1 um:zero minimum:500 name:STORE_INSTRUCTIONS_ISSUED : Store instructions issued event:0x06 counters:0,1 um:zero minimum:500 name:DUAL_ISSUED_PAIRS : Dual issued pairs event:0x07 counters:0,1 um:zero minimum:500 name:BRANCH_PREFETCHES : Branch prefetches event:0x08 counters:0,1 um:zero minimum:500 name:EXTERNAL_CACHE_MISSES : External Cache Misses event:0x09 counters:0,1 um:zero minimum:500 name:STALL_CYCLES : Stall cycles event:0x0a counters:0,1 um:zero minimum:500 name:SCACHE_MISSES : Secondary cache misses event:0x0b counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache misses event:0x0c counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Data cache misses event:0x0d counters:0,1 um:zero minimum:500 name:DTLB_MISSES : Data TLB misses event:0x0e counters:0,1 um:zero minimum:500 name:ITLB_MISSES : Instruction TLB misses event:0x0f counters:0,1 um:zero minimum:500 name:JTLB_INSTRUCTION_MISSES : Joint TLB instruction misses event:0x10 counters:0,1 um:zero minimum:500 name:JTLB_DATA_MISSES : Joint TLB data misses event:0x11 counters:0,1 um:zero minimum:500 name:BRANCHES_TAKEN : Branches taken event:0x12 counters:0,1 um:zero minimum:500 name:BRANCHES_ISSUED : Branches issued event:0x13 counters:0,1 um:zero minimum:500 name:SCACHE_WRITEBACKS : Secondary cache writebacks event:0x14 counters:0,1 um:zero minimum:500 name:PCACHE_WRITEBACKS : Primary cache writebacks event:0x15 counters:0,1 um:zero minimum:500 name:DCACHE_MISS_STALL_CYCLES : Dcache miss stall cycles (cycles where both cache miss tokens taken and a third try is requested) event:0x16 counters:0,1 um:zero minimum:500 name:CACHE_MISSES : Cache misses event:0x17 counters:0,1 um:zero minimum:500 name:FP_EXCEPTION_STALL_CYCLES : FP possible exception cycles event:0x18 counters:0,1 um:zero minimum:500 name:SLIP_CYCLES_DUE_MULTIPLIER_BUSY : Slip Cycles due to multiplier busy event:0x19 counters:0,1 um:zero minimum:500 name:COP0_SLIP_CYCLES : Coprocessor 0 slip cycles event:0x1a counters:0,1 um:zero minimum:500 name:SLIP_CYCLES_PENDING_NON_BLKING_LOAD : Slip cycles due to pending non-blocking loads event:0x1c counters:0,1 um:zero minimum:500 name:WRITE_BUFFER_FULL_STALL_CYCLES : Write buffer full stall cycles event:0x1d counters:0,1 um:zero minimum:500 name:CACHE_INSTRUCTION_STALL_CYCLES : Cache instruction stall cycles event:0x1e counters:0,1 um:zero minimum:500 name:MULTIPLIER_STALL_CYCLES : Multiplier stall cycles event:0x1f counters:0,1 um:zero minimum:500 name:STALL_CYCLES_PENDING_NON_BLKING_LOAD : Stall cycles due to pending non-blocking loads - stall start of exception oprofile-1.3.0/events/mips/rm7000/unit_masks0000664000175000017500000000013512534404406015557 00000000000000# # MIPS RM7000 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/0000775000175000017500000000000013323173530012575 500000000000000oprofile-1.3.0/events/ppc64/power6/0000775000175000017500000000000013323173530014017 500000000000000oprofile-1.3.0/events/ppc64/power6/events0000664000175000017500000033737112534404406015206 00000000000000#PPC64 POWER6 events # # Copyright OProfile authors # Copyright (c) International Business Machines, 2007. # Contributed by Dave Nomura . # # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously when # using legacy opcontrol to do profiling. When profiling with operf, # events from different groups may be specified, and the Linux Performance # Events Kernel Subsystem code will handle the necessary multiplexing. # # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:3 um:zero minimum:10000 name:CYCLES : Processor Cycles #Group 1 pm_utilization, CPI and utilization data event:0X0010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Run cycles event:0X0011 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_utilization) Instructions completed event:0X0012 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP1 : (Group 1 pm_utilization) Instructions dispatched event:0X0013 counters:3 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_utilization) Processor cycles #Group 2 pm_utilization_capacity, CPU utilization and capacity event:0X0020 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_CYC_GRP2 : (Group 2 pm_utilization_capacity) One of the threads in run cycles event:0X0021 counters:1 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_utilization_capacity) Processor cycles event:0X0022 counters:2 um:zero minimum:1000 name:PM_THRD_CONC_RUN_INST_GRP2 : (Group 2 pm_utilization_capacity) Concurrent run instructions event:0X0023 counters:3 um:zero minimum:1000 name:PM_RUN_PURR_GRP2 : (Group 2 pm_utilization_capacity) Run PURR Event #Group 3 pm_branch, Branch operations event:0X0030 counters:0 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP3 : (Group 3 pm_branch) A conditional branch was predicted, CR prediction event:0X0031 counters:1 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP3 : (Group 3 pm_branch) Branch mispredictions due to CR bit setting event:0X0032 counters:2 um:zero minimum:1000 name:PM_BR_PRED_GRP3 : (Group 3 pm_branch) A conditional branch was predicted event:0X0033 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_COUNT_GRP3 : (Group 3 pm_branch) Branch misprediction due to count prediction #Group 4 pm_branch2, Branch operations event:0X0040 counters:0 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP4 : (Group 4 pm_branch2) Branch count cache prediction event:0X0041 counters:1 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP4 : (Group 4 pm_branch2) A conditional branch was predicted, link stack event:0X0042 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_CCACHE_GRP4 : (Group 4 pm_branch2) Branch misprediction due to count cache prediction event:0X0043 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP4 : (Group 4 pm_branch2) Branch mispredictions due to target address #Group 5 pm_branch3, Branch operations event:0X0050 counters:0 um:zero minimum:1000 name:PM_BR_PRED_GRP5 : (Group 5 pm_branch3) A conditional branch was predicted event:0X0051 counters:1 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP5 : (Group 5 pm_branch3) A conditional branch was predicted, CR prediction event:0X0052 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP5 : (Group 5 pm_branch3) Branch count cache prediction event:0X0053 counters:3 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP5 : (Group 5 pm_branch3) A conditional branch was predicted, link stack #Group 6 pm_branch4, Branch operations event:0X0060 counters:0 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP6 : (Group 6 pm_branch4) Branch mispredictions due to CR bit setting event:0X0061 counters:1 um:zero minimum:1000 name:PM_BR_MPRED_COUNT_GRP6 : (Group 6 pm_branch4) Branch misprediction due to count prediction event:0X0062 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP6 : (Group 6 pm_branch4) Branch mispredictions due to target address event:0X0063 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_CCACHE_GRP6 : (Group 6 pm_branch4) Branch misprediction due to count cache prediction #Group 7 pm_branch5, Branch operations event:0X0070 counters:0 um:zero minimum:1000 name:PM_BR_PRED_GRP7 : (Group 7 pm_branch5) A conditional branch was predicted event:0X0071 counters:1 um:zero minimum:1000 name:PM_BR_TAKEN_GRP7 : (Group 7 pm_branch5) Branches taken event:0X0072 counters:2 um:zero minimum:1000 name:PM_BRU_FIN_GRP7 : (Group 7 pm_branch5) BRU produced a result event:0X0073 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP7 : (Group 7 pm_branch5) Branches incorrectly predicted #Group 8 pm_dsource, Data source event:0X0080 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP8 : (Group 8 pm_dsource) Data loaded from L2 event:0X0081 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L21_GRP8 : (Group 8 pm_dsource) Data loaded from private L2 other core event:0X0082 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP8 : (Group 8 pm_dsource) Data loaded missed L2 event:0X0083 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP8 : (Group 8 pm_dsource) Data loaded from private L3 miss #Group 9 pm_dsource2, Data sources event:0X0090 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP9 : (Group 9 pm_dsource2) Data loaded from L3.5 modified event:0X0091 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_GRP9 : (Group 9 pm_dsource2) Data loaded from L3.5 shared event:0X0092 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP9 : (Group 9 pm_dsource2) Data loaded from L3 event:0X0093 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP9 : (Group 9 pm_dsource2) Data loaded from private L3 miss #Group 10 pm_dsource3, Data sources event:0X00A0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP10 : (Group 10 pm_dsource3) Data loaded from L3.5 modified event:0X00A1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_GRP10 : (Group 10 pm_dsource3) Data loaded from L3.5 shared event:0X00A2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP10 : (Group 10 pm_dsource3) Data loaded from L2.5 modified event:0X00A3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP10 : (Group 10 pm_dsource3) Data loaded from L2.5 shared #Group 11 pm_dsource4, Data sources event:0X00B0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_GRP11 : (Group 11 pm_dsource4) Data loaded from remote L2 or L3 modified event:0X00B1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_GRP11 : (Group 11 pm_dsource4) Data loaded from remote L2 or L3 shared event:0X00B2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_SHR_GRP11 : (Group 11 pm_dsource4) Data loaded from distant L2 or L3 shared event:0X00B3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP11 : (Group 11 pm_dsource4) Data loaded from distant L2 or L3 modified #Group 12 pm_dsource5, Data sources event:0X00C0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_MEM_DP_GRP12 : (Group 12 pm_dsource5) Data loaded from double pump memory event:0X00C1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_GRP12 : (Group 12 pm_dsource5) Data loaded from distant memory event:0X00C2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP12 : (Group 12 pm_dsource5) Data loaded from remote memory event:0X00C3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP12 : (Group 12 pm_dsource5) Data loaded from local memory #Group 13 pm_dlatencies, Data latencies event:0X00D0 counters:0 um:zero minimum:1000 name:PM_LD_MISS_L1_CYC_GRP13 : (Group 13 pm_dlatencies) L1 data load miss cycles event:0X00D1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_CYC_GRP13 : (Group 13 pm_dlatencies) Load latency from remote L2 or L3 shared event:0X00D2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP13 : (Group 13 pm_dlatencies) Processor cycles event:0X00D3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_CYC_GRP13 : (Group 13 pm_dlatencies) Load latency from L2.5 modified #Group 14 pm_dlatencies2, Data latencies event:0X00E0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP14 : (Group 14 pm_dlatencies2) Instructions completed event:0X00E1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_CYC_GRP14 : (Group 14 pm_dlatencies2) Load latency from local memory event:0X00E2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP14 : (Group 14 pm_dlatencies2) Processor cycles event:0X00E3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_CYC_GRP14 : (Group 14 pm_dlatencies2) Load latency from distant L2 or L3 modified #Group 15 pm_dlatencies3, Data latencies event:0X00F0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_dlatencies3) Instructions completed event:0X00F1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_CYC_GRP15 : (Group 15 pm_dlatencies3) Load latency from distant memory event:0X00F2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP15 : (Group 15 pm_dlatencies3) Data loaded from remote memory event:0X00F3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_CYC_GRP15 : (Group 15 pm_dlatencies3) Load latency from remote memory #Group 16 pm_dlatencies4, Data latencies event:0X0100 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP16 : (Group 16 pm_dlatencies4) Data loaded from L3.5 modified event:0X0101 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_SHR_CYC_GRP16 : (Group 16 pm_dlatencies4) Load latency from distant L2 or L3 shared event:0X0102 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_SHR_GRP16 : (Group 16 pm_dlatencies4) Data loaded from distant L2 or L3 shared event:0X0103 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_CYC_GRP16 : (Group 16 pm_dlatencies4) Load latency from L3.5 modified #Group 17 pm_dlatencies5, Data latencies event:0X0110 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_GRP17 : (Group 17 pm_dlatencies5) Data loaded from remote L2 or L3 modified event:0X0111 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L3_CYC_GRP17 : (Group 17 pm_dlatencies5) Load latency from L3 event:0X0112 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP17 : (Group 17 pm_dlatencies5) Data loaded from L3 event:0X0113 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_CYC_GRP17 : (Group 17 pm_dlatencies5) Load latency from remote L2 or L3 modified #Group 18 pm_dlatencies6, Data latencies event:0X0120 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_MEM_DP_GRP18 : (Group 18 pm_dlatencies6) Data loaded from double pump memory event:0X0121 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_CYC_GRP18 : (Group 18 pm_dlatencies6) Load latency from L2.5 shared event:0X0122 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP18 : (Group 18 pm_dlatencies6) Data loaded from L2.5 modified event:0X0123 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_MEM_DP_CYC_GRP18 : (Group 18 pm_dlatencies6) Load latency from double pump memory #Group 19 pm_dlatencies7, Data latencies event:0X0130 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP19 : (Group 19 pm_dlatencies7) Data loaded from L2 event:0X0131 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L2_CYC_GRP19 : (Group 19 pm_dlatencies7) Load latency from L2 event:0X0132 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP19 : (Group 19 pm_dlatencies7) Instructions dispatched event:0X0133 counters:3 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP19 : (Group 19 pm_dlatencies7) L1 reload data source valid #Group 20 pm_dlatencies8, Data latencies event:0X0140 counters:0 um:zero minimum:1000 name:PM_FLUSH_GRP20 : (Group 20 pm_dlatencies8) Flushes event:0X0141 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L21_GRP20 : (Group 20 pm_dlatencies8) Data loaded from private L2 other core event:0X0142 counters:2 um:zero minimum:10000 name:PM_CYC_GRP20 : (Group 20 pm_dlatencies8) Processor cycles event:0X0143 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L21_CYC_GRP20 : (Group 20 pm_dlatencies8) Load latency from private L2 other core #Group 21 pm_dlatencies9, Data latencies event:0X0150 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP21 : (Group 21 pm_dlatencies9) Cycles at least one instruction dispatched event:0X0151 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_CYC_GRP21 : (Group 21 pm_dlatencies9) Load latency from local memory event:0X0152 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP21 : (Group 21 pm_dlatencies9) Instructions dispatched event:0X0153 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP21 : (Group 21 pm_dlatencies9) Data loaded from local memory #Group 22 pm_dlatencies10, Data latencies event:0X0160 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP22 : (Group 22 pm_dlatencies10) Data loaded from L3.5 modified event:0X0161 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_CYC_GRP22 : (Group 22 pm_dlatencies10) Load latency from L3.5 shared event:0X0162 counters:2 um:zero minimum:10000 name:PM_CYC_GRP22 : (Group 22 pm_dlatencies10) Processor cycles event:0X0163 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_CYC_GRP22 : (Group 22 pm_dlatencies10) Load latency from L3.5 modified #Group 23 pm_isource, Instruction sources event:0X0170 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP23 : (Group 23 pm_isource) Instructions fetched from L2 event:0X0171 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L21_GRP23 : (Group 23 pm_isource) Instruction fetched from private L2 other core event:0X0172 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L25_MOD_GRP23 : (Group 23 pm_isource) Instruction fetched from L2.5 modified event:0X0173 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP23 : (Group 23 pm_isource) Instructions fetched missed L2 #Group 24 pm_isource2, Instruction sources event:0X0180 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L35_MOD_GRP24 : (Group 24 pm_isource2) Instruction fetched from L3.5 modified event:0X0181 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L35_SHR_GRP24 : (Group 24 pm_isource2) Instruction fetched from L3.5 shared event:0X0182 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP24 : (Group 24 pm_isource2) Instruction fetched from L3 event:0X0183 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L25_SHR_GRP24 : (Group 24 pm_isource2) Instruction fetched from L2.5 shared #Group 25 pm_isource3, Instruction sources event:0X0190 counters:0 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_MOD_GRP25 : (Group 25 pm_isource3) Instruction fetched from remote L2 or L3 modified event:0X0191 counters:1 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_SHR_GRP25 : (Group 25 pm_isource3) Instruction fetched from remote L2 or L3 shared event:0X0192 counters:2 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_SHR_GRP25 : (Group 25 pm_isource3) Instruction fetched from distant L2 or L3 shared event:0X0193 counters:3 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_MOD_GRP25 : (Group 25 pm_isource3) Instruction fetched from distant L2 or L3 modified #Group 26 pm_isource4, Instruction sources event:0X01A0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_MEM_DP_GRP26 : (Group 26 pm_isource4) Instruction fetched from double pump memory event:0X01A1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_DMEM_GRP26 : (Group 26 pm_isource4) Instruction fetched from distant memory event:0X01A2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_RMEM_GRP26 : (Group 26 pm_isource4) Instruction fetched from remote memory event:0X01A3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP26 : (Group 26 pm_isource4) Instruction fetched from local memory #Group 27 pm_isource5, Instruction sources event:0X01B0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP27 : (Group 27 pm_isource5) Instructions fetched from L2 event:0X01B1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L21_GRP27 : (Group 27 pm_isource5) Instruction fetched from private L2 other core event:0X01B2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L3MISS_GRP27 : (Group 27 pm_isource5) Instruction fetched missed L3 event:0X01B3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP27 : (Group 27 pm_isource5) Instructions fetched missed L2 #Group 28 pm_pteg, PTEG sources event:0X01C0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP28 : (Group 28 pm_pteg) PTEG loaded from L2 event:0X01C1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L21_GRP28 : (Group 28 pm_pteg) PTEG loaded from private L2 other core event:0X01C2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L25_MOD_GRP28 : (Group 28 pm_pteg) PTEG loaded from L2.5 modified event:0X01C3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L25_SHR_GRP28 : (Group 28 pm_pteg) PTEG loaded from L2.5 shared #Group 29 pm_pteg2, PTEG sources event:0X01D0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2MISS_GRP29 : (Group 29 pm_pteg2) PTEG loaded from L2 miss event:0X01D1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L21_GRP29 : (Group 29 pm_pteg2) PTEG loaded from private L2 other core event:0X01D2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L3_GRP29 : (Group 29 pm_pteg2) PTEG loaded from L3 event:0X01D3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_DL2L3_MOD_GRP29 : (Group 29 pm_pteg2) PTEG loaded from distant L2 or L3 modified #Group 30 pm_pteg3, PTEG sources event:0X01E0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L35_MOD_GRP30 : (Group 30 pm_pteg3) PTEG loaded from L3.5 modified event:0X01E1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L35_SHR_GRP30 : (Group 30 pm_pteg3) PTEG loaded from L3.5 shared event:0X01E2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L3MISS_GRP30 : (Group 30 pm_pteg3) PTEG loaded from L3 miss event:0X01E3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP30 : (Group 30 pm_pteg3) PTEG loaded from local memory #Group 31 pm_pteg4, PTEG sources event:0X01F0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_MEM_DP_GRP31 : (Group 31 pm_pteg4) PTEG loaded from double pump memory event:0X01F1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_DMEM_GRP31 : (Group 31 pm_pteg4) PTEG loaded from distant memory event:0X01F2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP31 : (Group 31 pm_pteg4) PTEG loaded from remote memory event:0X01F3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP31 : (Group 31 pm_pteg4) PTEG loaded from local memory #Group 32 pm_pteg5, PTEG sources event:0X0200 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_RL2L3_MOD_GRP32 : (Group 32 pm_pteg5) PTEG loaded from remote L2 or L3 modified event:0X0201 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_RL2L3_SHR_GRP32 : (Group 32 pm_pteg5) PTEG loaded from remote L2 or L3 shared event:0X0202 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_DL2L3_SHR_GRP32 : (Group 32 pm_pteg5) PTEG loaded from distant L2 or L3 shared event:0X0203 counters:3 um:zero minimum:1000 name:PM_PTEG_RELOAD_VALID_GRP32 : (Group 32 pm_pteg5) TLB reload valid #Group 33 pm_data_tablewalk, Data tablewalks event:0X0210 counters:0 um:zero minimum:1000 name:PM_DATA_PTEG_1ST_HALF_GRP33 : (Group 33 pm_data_tablewalk) Data table walk matched in first half primary PTEG event:0X0211 counters:1 um:zero minimum:1000 name:PM_DATA_PTEG_2ND_HALF_GRP33 : (Group 33 pm_data_tablewalk) Data table walk matched in second half primary PTEG event:0X0212 counters:2 um:zero minimum:1000 name:PM_DATA_PTEG_SECONDARY_GRP33 : (Group 33 pm_data_tablewalk) Data table walk matched in secondary PTEG event:0X0213 counters:3 um:zero minimum:1000 name:PM_TLB_REF_GRP33 : (Group 33 pm_data_tablewalk) TLB reference #Group 34 pm_inst_tablewalk, Instruction tablewalks event:0X0220 counters:0 um:zero minimum:1000 name:PM_INST_PTEG_1ST_HALF_GRP34 : (Group 34 pm_inst_tablewalk) Instruction table walk matched in first half primary PTEG event:0X0221 counters:1 um:zero minimum:1000 name:PM_INST_PTEG_2ND_HALF_GRP34 : (Group 34 pm_inst_tablewalk) Instruction table walk matched in second half primary PTEG event:0X0222 counters:2 um:zero minimum:1000 name:PM_INST_PTEG_SECONDARY_GRP34 : (Group 34 pm_inst_tablewalk) Instruction table walk matched in secondary PTEG event:0X0223 counters:3 um:zero minimum:1000 name:PM_INST_TABLEWALK_CYC_GRP34 : (Group 34 pm_inst_tablewalk) Cycles doing instruction tablewalks #Group 35 pm_freq, Frequency events event:0X0230 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_THERMAL_GRP35 : (Group 35 pm_freq) DISP unit held due to thermal condition event:0X0231 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP35 : (Group 35 pm_freq) DISP unit held due to Power Management event:0X0232 counters:2 um:zero minimum:1000 name:PM_FREQ_DOWN_GRP35 : (Group 35 pm_freq) Frequency is being slewed down due to Power Management event:0X0233 counters:3 um:zero minimum:1000 name:PM_FREQ_UP_GRP35 : (Group 35 pm_freq) Frequency is being slewed up due to Power Management #Group 36 pm_disp_wait, Dispatch stalls event:0X0240 counters:0 um:zero minimum:1000 name:PM_L1_ICACHE_MISS_GRP36 : (Group 36 pm_disp_wait) L1 I cache miss count event:0X0241 counters:1 um:zero minimum:1000 name:PM_DPU_WT_IC_MISS_GRP36 : (Group 36 pm_disp_wait) Cycles DISP unit is stalled due to I cache miss event:0X0242 counters:2 um:zero minimum:1000 name:PM_DPU_WT_GRP36 : (Group 36 pm_disp_wait) Cycles DISP unit is stalled waiting for instructions event:0X0243 counters:3 um:zero minimum:1000 name:PM_DPU_WT_BR_MPRED_GRP36 : (Group 36 pm_disp_wait) Cycles DISP unit is stalled due to branch misprediction #Group 37 pm_disp_held, Dispatch held conditions event:0X0250 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_THERMAL_GRP37 : (Group 37 pm_disp_held) DISP unit held due to thermal condition event:0X0251 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP37 : (Group 37 pm_disp_held) DISP unit held due to Power Management event:0X0252 counters:2 um:zero minimum:1000 name:PM_THERMAL_MAX_GRP37 : (Group 37 pm_disp_held) Processor in thermal MAX event:0X0253 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_SMT_GRP37 : (Group 37 pm_disp_held) DISP unit held due to SMT conflicts #Group 38 pm_disp_held2, Dispatch held conditions event:0X0260 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_GPR_GRP38 : (Group 38 pm_disp_held2) DISP unit held due to GPR dependencies event:0X0261 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_GRP38 : (Group 38 pm_disp_held2) DISP unit held event:0X0262 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_CW_GRP38 : (Group 38 pm_disp_held2) DISP unit held due to cache writes event:0X0263 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_FPQ_GRP38 : (Group 38 pm_disp_held2) DISP unit held due to FPU issue queue full #Group 39 pm_disp_held3, Dispatch held conditions event:0X0270 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_XER_GRP39 : (Group 39 pm_disp_held3) DISP unit held due to XER dependency event:0X0271 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_ISYNC_GRP39 : (Group 39 pm_disp_held3) DISP unit held due to ISYNC event:0X0272 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_STCX_CR_GRP39 : (Group 39 pm_disp_held3) DISP unit held due to STCX updating CR event:0X0273 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_RU_WQ_GRP39 : (Group 39 pm_disp_held3) DISP unit held due to RU FXU write queue full #Group 40 pm_disp_held4, Dispatch held conditions event:0X0280 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_FPU_CR_GRP40 : (Group 40 pm_disp_held4) DISP unit held due to FPU updating CR event:0X0281 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_LSU_GRP40 : (Group 40 pm_disp_held4) DISP unit held due to LSU move or invalidate SLB and SR event:0X0282 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_ITLB_ISLB_GRP40 : (Group 40 pm_disp_held4) DISP unit held due to SLB or TLB invalidates event:0X0283 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_FXU_MULTI_GRP40 : (Group 40 pm_disp_held4) DISP unit held due to FXU multicycle #Group 41 pm_disp_held5, Dispatch held conditions event:0X0290 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_FP_FX_MULT_GRP41 : (Group 41 pm_disp_held5) DISP unit held due to non fixed multiple/divide after fixed multiply/divide event:0X0291 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_MULT_GPR_GRP41 : (Group 41 pm_disp_held5) DISP unit held due to multiple/divide multiply/divide GPR dependencies event:0X0292 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_COMPLETION_GRP41 : (Group 41 pm_disp_held5) DISP unit held due to completion holding dispatch event:0X0293 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_GPR_GRP41 : (Group 41 pm_disp_held5) DISP unit held due to GPR dependencies #Group 42 pm_disp_held6, Dispatch held conditions event:0X02A0 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_INT_GRP42 : (Group 42 pm_disp_held6) DISP unit held due to exception event:0X02A1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_XTHRD_GRP42 : (Group 42 pm_disp_held6) DISP unit held due to cross thread resource conflicts event:0X02A2 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_LLA_END_GRP42 : (Group 42 pm_disp_held6) DISP unit held due to load look ahead ended event:0X02A3 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_RESTART_GRP42 : (Group 42 pm_disp_held6) DISP unit held after restart coming #Group 43 pm_disp_held7, Dispatch held conditions event:0X02B0 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_FXU_SOPS_GRP43 : (Group 43 pm_disp_held7) DISP unit held due to FXU slow ops (mtmsr, scv, rfscv) event:0X02B1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_THRD_PRIO_GRP43 : (Group 43 pm_disp_held7) DISP unit held due to lower priority thread event:0X02B2 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_SPR_GRP43 : (Group 43 pm_disp_held7) DISP unit held due to MTSPR/MFSPR event:0X02B3 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_CR_LOGICAL_GRP43 : (Group 43 pm_disp_held7) DISP unit held due to CR, LR or CTR updated by CR logical, MTCRF, MTLR or MTCTR #Group 44 pm_disp_held8, Dispatch held conditions event:0X02C0 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_ISYNC_GRP44 : (Group 44 pm_disp_held8) DISP unit held due to ISYNC event:0X02C1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_STCX_CR_GRP44 : (Group 44 pm_disp_held8) DISP unit held due to STCX updating CR event:0X02C2 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_RU_WQ_GRP44 : (Group 44 pm_disp_held8) DISP unit held due to RU FXU write queue full event:0X02C3 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_FPU_CR_GRP44 : (Group 44 pm_disp_held8) DISP unit held due to FPU updating CR #Group 45 pm_disp_held9, Dispatch held conditions event:0X02D0 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_ISYNC_GRP45 : (Group 45 pm_disp_held9) DISP unit held due to ISYNC event:0X02D1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_FPU_CR_GRP45 : (Group 45 pm_disp_held9) DISP unit held due to FPU updating CR event:0X02D2 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_MULT_GPR_GRP45 : (Group 45 pm_disp_held9) DISP unit held due to multiple/divide multiply/divide GPR dependencies event:0X02D3 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_COMPLETION_GRP45 : (Group 45 pm_disp_held9) DISP unit held due to completion holding dispatch #Group 46 pm_sync, Sync events event:0X02E0 counters:0 um:zero minimum:1000 name:PM_LWSYNC_GRP46 : (Group 46 pm_sync) Isync instruction completed event:0X02E1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP46 : (Group 46 pm_sync) Processor cycles event:0X02E2 counters:2 um:zero minimum:1000 name:PM_SYNC_CYC_GRP46 : (Group 46 pm_sync) Sync duration event:0X02E3 counters:3 um:zero minimum:1000 name:PM_DPU_HELD_LSU_SOPS_GRP46 : (Group 46 pm_sync) DISP unit held due to LSU slow ops (sync, tlbie, stcx) #Group 47 pm_L1_ref, L1 references event:0X02F0 counters:0 um:zero minimum:1000 name:PM_LD_REF_L1_BOTH_GRP47 : (Group 47 pm_L1_ref) Both units L1 D cache load reference event:0X02F1 counters:1 um:zero minimum:1000 name:PM_LD_REF_L1_GRP47 : (Group 47 pm_L1_ref) L1 D cache load references event:0X02F2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP47 : (Group 47 pm_L1_ref) L1 D cache store references event:0X02F3 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_BOTH_GRP47 : (Group 47 pm_L1_ref) Both units L1 D cache store reference #Group 48 pm_L1_ldst, L1 load/store ref/miss event:0X0300 counters:0 um:zero minimum:1000 name:PM_ST_REF_L1_GRP48 : (Group 48 pm_L1_ldst) L1 D cache store references event:0X0301 counters:1 um:zero minimum:1000 name:PM_LD_REF_L1_GRP48 : (Group 48 pm_L1_ldst) L1 D cache load references event:0X0302 counters:2 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP48 : (Group 48 pm_L1_ldst) L1 D cache store misses event:0X0303 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP48 : (Group 48 pm_L1_ldst) L1 D cache load misses #Group 49 pm_streams, Streams event:0X0310 counters:0 um:zero minimum:1000 name:PM_DC_PREF_OUT_OF_STREAMS_GRP49 : (Group 49 pm_streams) D cache out of streams event:0X0311 counters:1 um:zero minimum:1000 name:PM_DC_PREF_STREAM_ALLOC_GRP49 : (Group 49 pm_streams) D cache new prefetch stream allocated event:0X0312 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP49 : (Group 49 pm_streams) L1 cache data prefetches event:0X0313 counters:3 um:zero minimum:1000 name:PM_IBUF_FULL_CYC_GRP49 : (Group 49 pm_streams) Cycles instruction buffer full #Group 50 pm_flush, Flushes event:0X0320 counters:0 um:zero minimum:1000 name:PM_FLUSH_GRP50 : (Group 50 pm_flush) Flushes event:0X0321 counters:1 um:zero minimum:1000 name:PM_FLUSH_ASYNC_GRP50 : (Group 50 pm_flush) Flush caused by asynchronous exception event:0X0322 counters:2 um:zero minimum:1000 name:PM_FLUSH_FPU_GRP50 : (Group 50 pm_flush) Flush caused by FPU exception event:0X0323 counters:3 um:zero minimum:1000 name:PM_FLUSH_FXU_GRP50 : (Group 50 pm_flush) Flush caused by FXU exception #Group 51 pm_prefetch, I cache Prefetches event:0X0330 counters:0 um:zero minimum:1000 name:PM_IC_REQ_GRP51 : (Group 51 pm_prefetch) I cache demand of prefetch request event:0X0331 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP51 : (Group 51 pm_prefetch) Instruction prefetch requests event:0X0332 counters:2 um:zero minimum:1000 name:PM_IC_RELOAD_SHR_GRP51 : (Group 51 pm_prefetch) I cache line reloading to be shared by threads event:0X0333 counters:3 um:zero minimum:1000 name:PM_IC_PREF_WRITE_GRP51 : (Group 51 pm_prefetch) Instruction prefetch written into I cache #Group 52 pm_stcx, STCX event:0X0340 counters:0 um:zero minimum:1000 name:PM_STCX_GRP52 : (Group 52 pm_stcx) STCX executed event:0X0341 counters:1 um:zero minimum:1000 name:PM_STCX_CANCEL_GRP52 : (Group 52 pm_stcx) stcx cancel by core event:0X0342 counters:2 um:zero minimum:1000 name:PM_STCX_FAIL_GRP52 : (Group 52 pm_stcx) STCX failed event:0X0343 counters:3 um:zero minimum:1000 name:PM_LARX_GRP52 : (Group 52 pm_stcx) Larx executed #Group 53 pm_larx, LARX event:0X0350 counters:0 um:zero minimum:1000 name:PM_LARX_GRP53 : (Group 53 pm_larx) Larx executed event:0X0351 counters:1 um:zero minimum:1000 name:PM_LARX_L1HIT_GRP53 : (Group 53 pm_larx) larx hits in L1 event:0X0352 counters:2 um:zero minimum:1000 name:PM_STCX_GRP53 : (Group 53 pm_larx) STCX executed event:0X0353 counters:3 um:zero minimum:1000 name:PM_STCX_FAIL_GRP53 : (Group 53 pm_larx) STCX failed #Group 54 pm_thread_cyc, Thread cycles event:0X0360 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_CYC_GRP54 : (Group 54 pm_thread_cyc) One of the threads in run cycles event:0X0361 counters:1 um:zero minimum:1000 name:PM_THRD_GRP_CMPL_BOTH_CYC_GRP54 : (Group 54 pm_thread_cyc) Cycles group completed by both threads event:0X0362 counters:2 um:zero minimum:1000 name:PM_THRD_CONC_RUN_INST_GRP54 : (Group 54 pm_thread_cyc) Concurrent run instructions event:0X0363 counters:3 um:zero minimum:1000 name:PM_THRD_BOTH_RUN_CYC_GRP54 : (Group 54 pm_thread_cyc) Both threads in run cycles #Group 55 pm_misc, Misc event:0X0370 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP55 : (Group 55 pm_misc) One or more PPC instruction completed event:0X0371 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP55 : (Group 55 pm_misc) Hypervisor Cycles event:0X0372 counters:2 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP55 : (Group 55 pm_misc) Threshold timeout event:0X0373 counters:3 um:zero minimum:1000 name:PM_THRD_LLA_BOTH_CYC_GRP55 : (Group 55 pm_misc) Both threads in Load Look Ahead #Group 56 pm_misc2, Misc event:0X0380 counters:0 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP56 : (Group 56 pm_misc2) Cycles MSR(EE) bit off and external interrupt pending event:0X0381 counters:1 um:zero minimum:1000 name:PM_EXT_INT_GRP56 : (Group 56 pm_misc2) External interrupts event:0X0382 counters:2 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP56 : (Group 56 pm_misc2) Time Base bit transition event:0X0383 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP56 : (Group 56 pm_misc2) No instructions fetched #Group 57 pm_misc3, Misc event:0X0390 counters:0 um:zero minimum:1000 name:PM_ST_FIN_GRP57 : (Group 57 pm_misc3) Store instructions finished event:0X0391 counters:1 um:zero minimum:1000 name:PM_THRD_L2MISS_GRP57 : (Group 57 pm_misc3) Thread in L2 miss event:0X0392 counters:2 um:zero minimum:10000 name:PM_CYC_GRP57 : (Group 57 pm_misc3) Processor cycles event:0X0393 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP57 : (Group 57 pm_misc3) Instructions completed #Group 58 pm_tlb_slb, TLB and SLB events event:0X03A0 counters:0 um:zero minimum:1000 name:PM_ISLB_MISS_GRP58 : (Group 58 pm_tlb_slb) Instruction SLB misses event:0X03A1 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP58 : (Group 58 pm_tlb_slb) Data SLB misses event:0X03A2 counters:2 um:zero minimum:1000 name:PM_TLB_REF_GRP58 : (Group 58 pm_tlb_slb) TLB reference event:0X03A3 counters:3 um:zero minimum:1000 name:PM_ITLB_REF_GRP58 : (Group 58 pm_tlb_slb) Instruction TLB reference #Group 59 pm_slb_miss, SLB Misses event:0X03B0 counters:0 um:zero minimum:1000 name:PM_ISLB_MISS_GRP59 : (Group 59 pm_slb_miss) Instruction SLB misses event:0X03B1 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP59 : (Group 59 pm_slb_miss) Data SLB misses event:0X03B2 counters:2 um:zero minimum:1000 name:PM_IERAT_MISS_GRP59 : (Group 59 pm_slb_miss) IERAT miss count event:0X03B3 counters:3 um:zero minimum:1000 name:PM_SLB_MISS_GRP59 : (Group 59 pm_slb_miss) SLB misses #Group 60 pm_rejects, Reject events event:0X03C0 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_L2_CORR_GRP60 : (Group 60 pm_rejects) LSU reject due to L2 correctable error event:0X03C1 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_DERAT_MPRED_GRP60 : (Group 60 pm_rejects) LSU reject due to mispredicted DERAT event:0X03C2 counters:2 um:zero minimum:1000 name:PM_LSU_REJECT_FAST_GRP60 : (Group 60 pm_rejects) LSU fast reject event:0X03C3 counters:3 um:zero minimum:1000 name:PM_LSU_REJECT_GRP60 : (Group 60 pm_rejects) LSU reject #Group 61 pm_rejects2, Reject events event:0X03D0 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_LHS_GRP61 : (Group 61 pm_rejects2) Load hit store reject event:0X03D1 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_LHS_BOTH_GRP61 : (Group 61 pm_rejects2) Load hit store reject both units event:0X03D2 counters:2 um:zero minimum:1000 name:PM_LSU_REJECT_EXTERN_GRP61 : (Group 61 pm_rejects2) LSU external reject request event:0X03D3 counters:3 um:zero minimum:1000 name:PM_LSU_REJECT_STEAL_GRP61 : (Group 61 pm_rejects2) LSU reject due to steal #Group 62 pm_rejects3, Reject events event:0X03E0 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_STQ_FULL_GRP62 : (Group 62 pm_rejects3) LSU reject due to store queue full event:0X03E1 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_SLOW_GRP62 : (Group 62 pm_rejects3) LSU slow reject event:0X03E2 counters:2 um:zero minimum:1000 name:PM_LSU_REJECT_NO_SCRATCH_GRP62 : (Group 62 pm_rejects3) LSU reject due to scratch register not available event:0X03E3 counters:3 um:zero minimum:1000 name:PM_LSU_REJECT_PARTIAL_SECTOR_GRP62 : (Group 62 pm_rejects3) LSU reject due to partial sector valid #Group 63 pm_rejects4, Unaligned store rejects event:0X03F0 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_UST_BOTH_GRP63 : (Group 63 pm_rejects4) Unaligned store reject both units event:0X03F1 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_UST_GRP63 : (Group 63 pm_rejects4) Unaligned store reject event:0X03F2 counters:2 um:zero minimum:1000 name:PM_LSU0_REJECT_UST_GRP63 : (Group 63 pm_rejects4) LSU0 unaligned store reject event:0X03F3 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_UST_GRP63 : (Group 63 pm_rejects4) LSU1 unaligned store reject #Group 64 pm_rejects5, Unaligned load rejects event:0X0400 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_ULD_GRP64 : (Group 64 pm_rejects5) Unaligned load reject event:0X0401 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_ULD_BOTH_GRP64 : (Group 64 pm_rejects5) Unaligned load reject both units event:0X0402 counters:2 um:zero minimum:1000 name:PM_LSU0_REJECT_ULD_GRP64 : (Group 64 pm_rejects5) LSU0 unaligned load reject event:0X0403 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_ULD_GRP64 : (Group 64 pm_rejects5) LSU1 unaligned load reject #Group 65 pm_rejects6, Set mispredictions rejects event:0X0410 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_SET_MPRED_GRP65 : (Group 65 pm_rejects6) LSU0 reject due to mispredicted set event:0X0411 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_SET_MPRED_GRP65 : (Group 65 pm_rejects6) LSU1 reject due to mispredicted set event:0X0412 counters:2 um:zero minimum:1000 name:PM_LSU_REJECT_SET_MPRED_GRP65 : (Group 65 pm_rejects6) LSU reject due to mispredicted set event:0X0413 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP65 : (Group 65 pm_rejects6) Cycles SRQ empty #Group 66 pm_rejects_unit, Unaligned reject events by unit event:0X0420 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_ULD_GRP66 : (Group 66 pm_rejects_unit) LSU0 unaligned load reject event:0X0421 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_UST_GRP66 : (Group 66 pm_rejects_unit) LSU1 unaligned store reject event:0X0422 counters:2 um:zero minimum:1000 name:PM_LSU0_REJECT_UST_GRP66 : (Group 66 pm_rejects_unit) LSU0 unaligned store reject event:0X0423 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_ULD_GRP66 : (Group 66 pm_rejects_unit) LSU1 unaligned load reject #Group 67 pm_rejects_unit2, Reject events by unit event:0X0430 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_GRP67 : (Group 67 pm_rejects_unit2) LSU0 reject event:0X0431 counters:1 um:zero minimum:1000 name:PM_LSU0_REJECT_DERAT_MPRED_GRP67 : (Group 67 pm_rejects_unit2) LSU0 reject due to mispredicted DERAT event:0X0432 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_GRP67 : (Group 67 pm_rejects_unit2) LSU1 reject event:0X0433 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_NO_SCRATCH_GRP67 : (Group 67 pm_rejects_unit2) LSU1 reject due to scratch register not available #Group 68 pm_rejects_unit3, Reject events by unit event:0X0440 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_EXTERN_GRP68 : (Group 68 pm_rejects_unit3) LSU0 external reject request event:0X0441 counters:1 um:zero minimum:1000 name:PM_LSU0_REJECT_L2_CORR_GRP68 : (Group 68 pm_rejects_unit3) LSU0 reject due to L2 correctable error event:0X0442 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_EXTERN_GRP68 : (Group 68 pm_rejects_unit3) LSU1 external reject request event:0X0443 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_L2_CORR_GRP68 : (Group 68 pm_rejects_unit3) LSU1 reject due to L2 correctable error #Group 69 pm_rejects_unit4, Reject events by unit event:0X0450 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_NO_SCRATCH_GRP69 : (Group 69 pm_rejects_unit4) LSU0 reject due to scratch register not available event:0X0451 counters:1 um:zero minimum:1000 name:PM_LSU0_REJECT_PARTIAL_SECTOR_GRP69 : (Group 69 pm_rejects_unit4) LSU0 reject due to partial sector valid event:0X0452 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_NO_SCRATCH_GRP69 : (Group 69 pm_rejects_unit4) LSU1 reject due to scratch register not available event:0X0453 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_PARTIAL_SECTOR_GRP69 : (Group 69 pm_rejects_unit4) LSU1 reject due to partial sector valid #Group 70 pm_rejects_unit5, Reject events by unit event:0X0460 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_LHS_GRP70 : (Group 70 pm_rejects_unit5) LSU0 load hit store reject event:0X0461 counters:1 um:zero minimum:1000 name:PM_LSU0_DERAT_MISS_GRP70 : (Group 70 pm_rejects_unit5) LSU0 DERAT misses event:0X0462 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_LHS_GRP70 : (Group 70 pm_rejects_unit5) LSU1 load hit store reject event:0X0463 counters:3 um:zero minimum:1000 name:PM_LSU1_DERAT_MISS_GRP70 : (Group 70 pm_rejects_unit5) LSU1 DERAT misses #Group 71 pm_rejects_unit6, Reject events by unit event:0X0470 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_STQ_FULL_GRP71 : (Group 71 pm_rejects_unit6) LSU0 reject due to store queue full event:0X0471 counters:1 um:zero minimum:1000 name:PM_LSU0_REJECT_GRP71 : (Group 71 pm_rejects_unit6) LSU0 reject event:0X0472 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_STQ_FULL_GRP71 : (Group 71 pm_rejects_unit6) LSU1 reject due to store queue full event:0X0473 counters:3 um:zero minimum:1000 name:PM_LSU1_REJECT_GRP71 : (Group 71 pm_rejects_unit6) LSU1 reject #Group 72 pm_rejects_unit7, Reject events by unit event:0X0480 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_DERAT_MPRED_GRP72 : (Group 72 pm_rejects_unit7) LSU0 reject due to mispredicted DERAT event:0X0481 counters:1 um:zero minimum:1000 name:PM_LSU0_DERAT_MISS_GRP72 : (Group 72 pm_rejects_unit7) LSU0 DERAT misses event:0X0482 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_DERAT_MPRED_GRP72 : (Group 72 pm_rejects_unit7) LSU1 reject due to mispredicted DERAT event:0X0483 counters:3 um:zero minimum:1000 name:PM_LSU1_DERAT_MISS_GRP72 : (Group 72 pm_rejects_unit7) LSU1 DERAT misses #Group 73 pm_ldf, Floating Point loads event:0X0490 counters:0 um:zero minimum:1000 name:PM_LSU_LDF_BOTH_GRP73 : (Group 73 pm_ldf) Both LSU units executed Floating Point load instruction event:0X0491 counters:1 um:zero minimum:1000 name:PM_LSU_LDF_GRP73 : (Group 73 pm_ldf) LSU executed Floating Point load instruction event:0X0492 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP73 : (Group 73 pm_ldf) LSU0 executed Floating Point load instruction event:0X0493 counters:3 um:zero minimum:1000 name:PM_LSU1_LDF_GRP73 : (Group 73 pm_ldf) LSU1 executed Floating Point load instruction #Group 74 pm_lsu_misc, LSU events event:0X04A0 counters:0 um:zero minimum:1000 name:PM_LSU0_NCLD_GRP74 : (Group 74 pm_lsu_misc) LSU0 non-cacheable loads event:0X04A1 counters:1 um:zero minimum:1000 name:PM_LSU0_NCST_GRP74 : (Group 74 pm_lsu_misc) LSU0 non-cachable stores event:0X04A2 counters:2 um:zero minimum:1000 name:PM_LSU_ST_CHAINED_GRP74 : (Group 74 pm_lsu_misc) number of chained stores event:0X04A3 counters:3 um:zero minimum:1000 name:PM_LSU_BOTH_BUS_GRP74 : (Group 74 pm_lsu_misc) Both data return buses busy simultaneously #Group 75 pm_lsu_lmq, LSU LMQ events event:0X04B0 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP75 : (Group 75 pm_lsu_lmq) Cycles LMQ full event:0X04B1 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP75 : (Group 75 pm_lsu_lmq) Cycles LMQ and SRQ empty event:0X04B2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_BOTH_CYC_GRP75 : (Group 75 pm_lsu_lmq) Cycles both threads LMQ and SRQ empty event:0X04B3 counters:3 um:zero minimum:1000 name:PM_LSU0_REJECT_L2MISS_GRP75 : (Group 75 pm_lsu_lmq) LSU0 L2 miss reject #Group 76 pm_lsu_flush_derat_miss, LSU flush and DERAT misses event:0X04C0 counters:0 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_CYC_GRP76 : (Group 76 pm_lsu_flush_derat_miss) DERAT miss latency event:0X04C1 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP76 : (Group 76 pm_lsu_flush_derat_miss) DERAT misses event:0X04C2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_ALIGN_GRP76 : (Group 76 pm_lsu_flush_derat_miss) Flush caused by alignement exception event:0X04C3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_DSI_GRP76 : (Group 76 pm_lsu_flush_derat_miss) Flush caused by DSI #Group 77 pm_lla, Look Load Ahead events event:0X04D0 counters:0 um:zero minimum:1000 name:PM_INST_DISP_LLA_GRP77 : (Group 77 pm_lla) Instruction dispatched under load look ahead event:0X04D1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_LLA_END_GRP77 : (Group 77 pm_lla) DISP unit held due to load look ahead ended event:0X04D2 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP77 : (Group 77 pm_lla) Instructions dispatched event:0X04D3 counters:3 um:zero minimum:1000 name:PM_THRD_LLA_BOTH_CYC_GRP77 : (Group 77 pm_lla) Both threads in Load Look Ahead #Group 78 pm_gct, GCT events event:0X04E0 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP78 : (Group 78 pm_gct) Cycles no GCT slot allocated event:0X04E1 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP78 : (Group 78 pm_gct) Cycles GCT empty event:0X04E2 counters:2 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP78 : (Group 78 pm_gct) Cycles GCT full event:0X04E3 counters:3 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP78 : (Group 78 pm_gct) Cycles at least 1 instruction fetched #Group 79 pm_smt_priorities, Thread priority events event:0X04F0 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_0_CYC_GRP79 : (Group 79 pm_smt_priorities) Cycles thread running at priority level 0 event:0X04F1 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_1_CYC_GRP79 : (Group 79 pm_smt_priorities) Cycles thread running at priority level 1 event:0X04F2 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_2_CYC_GRP79 : (Group 79 pm_smt_priorities) Cycles thread running at priority level 2 event:0X04F3 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_3_CYC_GRP79 : (Group 79 pm_smt_priorities) Cycles thread running at priority level 3 #Group 80 pm_smt_priorities2, Thread priority events event:0X0500 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_7_CYC_GRP80 : (Group 80 pm_smt_priorities2) Cycles thread running at priority level 7 event:0X0501 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_6_CYC_GRP80 : (Group 80 pm_smt_priorities2) Cycles thread running at priority level 6 event:0X0502 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_5_CYC_GRP80 : (Group 80 pm_smt_priorities2) Cycles thread running at priority level 5 event:0X0503 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_4_CYC_GRP80 : (Group 80 pm_smt_priorities2) Cycles thread running at priority level 4 #Group 81 pm_smt_priorities3, Thread priority differences events event:0X0510 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_0_CYC_GRP81 : (Group 81 pm_smt_priorities3) Cycles no thread priority difference event:0X0511 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_1or2_CYC_GRP81 : (Group 81 pm_smt_priorities3) Cycles thread priority difference is 1 or 2 event:0X0512 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_3or4_CYC_GRP81 : (Group 81 pm_smt_priorities3) Cycles thread priority difference is 3 or 4 event:0X0513 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_5or6_CYC_GRP81 : (Group 81 pm_smt_priorities3) Cycles thread priority difference is 5 or 6 #Group 82 pm_smt_priorities4, Thread priority differences events event:0X0520 counters:0 um:zero minimum:1000 name:PM_THRD_SEL_T0_GRP82 : (Group 82 pm_smt_priorities4) Decode selected thread 0 event:0X0521 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus1or2_CYC_GRP82 : (Group 82 pm_smt_priorities4) Cycles thread priority difference is -1 or -2 event:0X0522 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus3or4_CYC_GRP82 : (Group 82 pm_smt_priorities4) Cycles thread priority difference is -3 or -4 event:0X0523 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus5or6_CYC_GRP82 : (Group 82 pm_smt_priorities4) Cycles thread priority difference is -5 or -6 #Group 83 pm_fxu, FXU events event:0X0530 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP83 : (Group 83 pm_fxu) FXU idle event:0X0531 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP83 : (Group 83 pm_fxu) FXU busy event:0X0532 counters:2 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP83 : (Group 83 pm_fxu) FXU0 busy FXU1 idle event:0X0533 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP83 : (Group 83 pm_fxu) FXU1 busy FXU0 idle #Group 84 pm_fxu2, FXU events event:0X0540 counters:0 um:zero minimum:1000 name:PM_FXU_PIPELINED_MULT_DIV_GRP84 : (Group 84 pm_fxu2) Fix point multiply/divide pipelined event:0X0541 counters:1 um:zero minimum:1000 name:PM_IFU_FIN_GRP84 : (Group 84 pm_fxu2) IFU finished an instruction event:0X0542 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP84 : (Group 84 pm_fxu2) FXU0 produced a result event:0X0543 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP84 : (Group 84 pm_fxu2) FXU1 produced a result #Group 85 pm_vmx, VMX events event:0X0550 counters:0 um:zero minimum:1000 name:PM_VMX_COMPLEX_ISUED_GRP85 : (Group 85 pm_vmx) VMX instruction issued to complex event:0X0551 counters:1 um:zero minimum:1000 name:PM_VMX_FLOAT_ISSUED_GRP85 : (Group 85 pm_vmx) VMX instruction issued to float event:0X0552 counters:2 um:zero minimum:1000 name:PM_VMX_SIMPLE_ISSUED_GRP85 : (Group 85 pm_vmx) VMX instruction issued to simple event:0X0553 counters:3 um:zero minimum:1000 name:PM_VMX_PERMUTE_ISSUED_GRP85 : (Group 85 pm_vmx) VMX instruction issued to permute #Group 86 pm_vmx2, VMX events event:0X0560 counters:0 um:zero minimum:1000 name:PM_VMX0_INST_ISSUED_GRP86 : (Group 86 pm_vmx2) VMX0 instruction issued event:0X0561 counters:1 um:zero minimum:1000 name:PM_VMX1_INST_ISSUED_GRP86 : (Group 86 pm_vmx2) VMX1 instruction issued event:0X0562 counters:2 um:zero minimum:1000 name:PM_VMX0_LD_ISSUED_GRP86 : (Group 86 pm_vmx2) VMX0 load issued event:0X0563 counters:3 um:zero minimum:1000 name:PM_VMX1_LD_ISSUED_GRP86 : (Group 86 pm_vmx2) VMX1 load issued #Group 87 pm_vmx3, VMX events event:0X0570 counters:0 um:zero minimum:1000 name:PM_VMX0_LD_ISSUED_GRP87 : (Group 87 pm_vmx3) VMX0 load issued event:0X0571 counters:1 um:zero minimum:1000 name:PM_VMX0_LD_WRBACK_GRP87 : (Group 87 pm_vmx3) VMX0 load writeback valid event:0X0572 counters:2 um:zero minimum:1000 name:PM_VMX1_LD_ISSUED_GRP87 : (Group 87 pm_vmx3) VMX1 load issued event:0X0573 counters:3 um:zero minimum:1000 name:PM_VMX1_LD_WRBACK_GRP87 : (Group 87 pm_vmx3) VMX1 load writeback valid #Group 88 pm_vmx4, VMX events event:0X0580 counters:0 um:zero minimum:1000 name:PM_VMX_FLOAT_MULTICYCLE_GRP88 : (Group 88 pm_vmx4) VMX multi-cycle floating point instruction issued event:0X0581 counters:1 um:zero minimum:1000 name:PM_VMX_RESULT_SAT_0_1_GRP88 : (Group 88 pm_vmx4) VMX valid result with sat bit is set (0->1) event:0X0582 counters:2 um:zero minimum:1000 name:PM_VMX_RESULT_SAT_1_GRP88 : (Group 88 pm_vmx4) VMX valid result with sat=1 event:0X0583 counters:3 um:zero minimum:1000 name:PM_VMX_ST_ISSUED_GRP88 : (Group 88 pm_vmx4) VMX store issued #Group 89 pm_vmx5, VMX events event:0X0590 counters:0 um:zero minimum:1000 name:PM_VMX_ST_ISSUED_GRP89 : (Group 89 pm_vmx5) VMX store issued event:0X0591 counters:1 um:zero minimum:1000 name:PM_VMX0_STALL_GRP89 : (Group 89 pm_vmx5) VMX0 stall event:0X0592 counters:2 um:zero minimum:1000 name:PM_VMX1_STALL_GRP89 : (Group 89 pm_vmx5) VMX1 stall event:0X0593 counters:3 um:zero minimum:1000 name:PM_VMX_FLOAT_MULTICYCLE_GRP89 : (Group 89 pm_vmx5) VMX multi-cycle floating point instruction issued #Group 90 pm_dfu, DFU events event:0X05A0 counters:0 um:zero minimum:1000 name:PM_DFU_ADD_GRP90 : (Group 90 pm_dfu) DFU add type instruction event:0X05A1 counters:1 um:zero minimum:1000 name:PM_DFU_ADD_SHIFTED_BOTH_GRP90 : (Group 90 pm_dfu) DFU add type with both operands shifted event:0X05A2 counters:2 um:zero minimum:1000 name:PM_DFU_BACK2BACK_GRP90 : (Group 90 pm_dfu) DFU back to back operations executed event:0X05A3 counters:3 um:zero minimum:1000 name:PM_DFU_CONV_GRP90 : (Group 90 pm_dfu) DFU convert from fixed op #Group 91 pm_dfu2, DFU events event:0X05B0 counters:0 um:zero minimum:1000 name:PM_DFU_ENC_BCD_DPD_GRP91 : (Group 91 pm_dfu2) DFU Encode BCD to DPD event:0X05B1 counters:1 um:zero minimum:1000 name:PM_DFU_EXP_EQ_GRP91 : (Group 91 pm_dfu2) DFU operand exponents are equal for add type event:0X05B2 counters:2 um:zero minimum:1000 name:PM_DFU_FIN_GRP91 : (Group 91 pm_dfu2) DFU instruction finish event:0X05B3 counters:3 um:zero minimum:1000 name:PM_DFU_SUBNORM_GRP91 : (Group 91 pm_dfu2) DFU result is a subnormal #Group 92 pm_fab, Fabric events event:0X05C0 counters:0 um:zero minimum:1000 name:PM_FAB_CMD_ISSUED_GRP92 : (Group 92 pm_fab) Fabric command issued event:0X05C1 counters:1 um:zero minimum:1000 name:PM_FAB_CMD_RETRIED_GRP92 : (Group 92 pm_fab) Fabric command retried event:0X05C2 counters:2 um:zero minimum:1000 name:PM_FAB_DCLAIM_GRP92 : (Group 92 pm_fab) Dclaim operation, locally mastered event:0X05C3 counters:3 um:zero minimum:1000 name:PM_FAB_DMA_GRP92 : (Group 92 pm_fab) DMA operation, locally mastered #Group 93 pm_fab2, Fabric events event:0X05D0 counters:0 um:zero minimum:1000 name:PM_FAB_NODE_PUMP_GRP93 : (Group 93 pm_fab2) Node pump operation, locally mastered event:0X05D1 counters:1 um:zero minimum:1000 name:PM_FAB_RETRY_NODE_PUMP_GRP93 : (Group 93 pm_fab2) Retry of a node pump, locally mastered event:0X05D2 counters:2 um:zero minimum:1000 name:PM_FAB_RETRY_SYS_PUMP_GRP93 : (Group 93 pm_fab2) Retry of a system pump, locally mastered event:0X05D3 counters:3 um:zero minimum:1000 name:PM_FAB_SYS_PUMP_GRP93 : (Group 93 pm_fab2) System pump operation, locally mastered #Group 94 pm_fab3, Fabric events event:0X05E0 counters:0 um:zero minimum:1000 name:PM_FAB_CMD_ISSUED_GRP94 : (Group 94 pm_fab3) Fabric command issued event:0X05E1 counters:1 um:zero minimum:1000 name:PM_FAB_CMD_RETRIED_GRP94 : (Group 94 pm_fab3) Fabric command retried event:0X05E2 counters:2 um:zero minimum:1000 name:PM_FAB_ADDR_COLLISION_GRP94 : (Group 94 pm_fab3) local node launch collision with off-node address event:0X05E3 counters:3 um:zero minimum:1000 name:PM_FAB_MMIO_GRP94 : (Group 94 pm_fab3) MMIO operation, locally mastered #Group 95 pm_mem_dblpump, Double pump event:0X05F0 counters:0 um:zero minimum:1000 name:PM_MEM_DP_RQ_GLOB_LOC_GRP95 : (Group 95 pm_mem_dblpump) Memory read queue marking cache line double pump state from global to local event:0X05F1 counters:1 um:zero minimum:1000 name:PM_MEM_DP_RQ_LOC_GLOB_GRP95 : (Group 95 pm_mem_dblpump) Memory read queue marking cache line double pump state from local to global event:0X05F2 counters:2 um:zero minimum:1000 name:PM_MEM_DP_CL_WR_GLOB_GRP95 : (Group 95 pm_mem_dblpump) cache line write setting double pump state to global event:0X05F3 counters:3 um:zero minimum:1000 name:PM_MEM_DP_CL_WR_LOC_GRP95 : (Group 95 pm_mem_dblpump) cache line write setting double pump state to local #Group 96 pm_mem0_dblpump, MCS0 Double pump event:0X0600 counters:0 um:zero minimum:1000 name:PM_MEM0_DP_RQ_GLOB_LOC_GRP96 : (Group 96 pm_mem0_dblpump) Memory read queue marking cache line double pump state from global to local side 0 event:0X0601 counters:1 um:zero minimum:1000 name:PM_MEM0_DP_RQ_LOC_GLOB_GRP96 : (Group 96 pm_mem0_dblpump) Memory read queue marking cache line double pump state from local to global side 0 event:0X0602 counters:2 um:zero minimum:1000 name:PM_MEM0_DP_CL_WR_GLOB_GRP96 : (Group 96 pm_mem0_dblpump) cacheline write setting dp to global side 0 event:0X0603 counters:3 um:zero minimum:1000 name:PM_MEM0_DP_CL_WR_LOC_GRP96 : (Group 96 pm_mem0_dblpump) cacheline write setting dp to local side 0 #Group 97 pm_mem1_dblpump, MCS1 Double pump event:0X0610 counters:0 um:zero minimum:1000 name:PM_MEM1_DP_RQ_GLOB_LOC_GRP97 : (Group 97 pm_mem1_dblpump) Memory read queue marking cache line double pump state from global to local side 1 event:0X0611 counters:1 um:zero minimum:1000 name:PM_MEM1_DP_RQ_LOC_GLOB_GRP97 : (Group 97 pm_mem1_dblpump) Memory read queue marking cache line double pump state from local to global side 1 event:0X0612 counters:2 um:zero minimum:1000 name:PM_MEM1_DP_CL_WR_GLOB_GRP97 : (Group 97 pm_mem1_dblpump) cacheline write setting dp to global side 1 event:0X0613 counters:3 um:zero minimum:1000 name:PM_MEM1_DP_CL_WR_LOC_GRP97 : (Group 97 pm_mem1_dblpump) cacheline write setting dp to local side 1 #Group 98 pm_gxo, GX outbound event:0X0620 counters:0 um:zero minimum:1000 name:PM_GXO_CYC_BUSY_GRP98 : (Group 98 pm_gxo) Outbound GX bus utilizations (# of cycles in use) event:0X0621 counters:1 um:zero minimum:1000 name:PM_GXO_ADDR_CYC_BUSY_GRP98 : (Group 98 pm_gxo) Outbound GX address utilization (# of cycles address out is valid) event:0X0622 counters:2 um:zero minimum:1000 name:PM_GXO_DATA_CYC_BUSY_GRP98 : (Group 98 pm_gxo) Outbound GX Data utilization (# of cycles data out is valid) event:0X0623 counters:3 um:zero minimum:1000 name:PM_GXI_CYC_BUSY_GRP98 : (Group 98 pm_gxo) Inbound GX bus utilizations (# of cycles in use) #Group 99 pm_gxi, GX inbound event:0X0630 counters:0 um:zero minimum:1000 name:PM_GXI_CYC_BUSY_GRP99 : (Group 99 pm_gxi) Inbound GX bus utilizations (# of cycles in use) event:0X0631 counters:1 um:zero minimum:1000 name:PM_GXI_ADDR_CYC_BUSY_GRP99 : (Group 99 pm_gxi) Inbound GX address utilization (# of cycle address is in valid) event:0X0632 counters:2 um:zero minimum:1000 name:PM_GXI_DATA_CYC_BUSY_GRP99 : (Group 99 pm_gxi) Inbound GX Data utilization (# of cycle data in is valid) event:0X0633 counters:3 um:zero minimum:1000 name:PM_GXO_CYC_BUSY_GRP99 : (Group 99 pm_gxi) Outbound GX bus utilizations (# of cycles in use) #Group 100 pm_gx_dma, DMA events event:0X0640 counters:0 um:zero minimum:1000 name:PM_GXO_CYC_BUSY_GRP100 : (Group 100 pm_gx_dma) Outbound GX bus utilizations (# of cycles in use) event:0X0641 counters:1 um:zero minimum:1000 name:PM_GXI_CYC_BUSY_GRP100 : (Group 100 pm_gx_dma) Inbound GX bus utilizations (# of cycles in use) event:0X0642 counters:2 um:zero minimum:1000 name:PM_GX_DMA_READ_GRP100 : (Group 100 pm_gx_dma) DMA Read Request event:0X0643 counters:3 um:zero minimum:1000 name:PM_GX_DMA_WRITE_GRP100 : (Group 100 pm_gx_dma) All DMA Write Requests (including dma wrt lgcy) #Group 101 pm_L1_misc, L1 misc events event:0X0650 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP101 : (Group 101 pm_L1_misc) Instruction fetched from L1 event:0X0651 counters:1 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP101 : (Group 101 pm_L1_misc) Cycles writing to instruction L1 event:0X0652 counters:2 um:zero minimum:1000 name:PM_NO_ITAG_CYC_GRP101 : (Group 101 pm_L1_misc) Cyles no ITAG available event:0X0653 counters:3 um:zero minimum:1000 name:PM_INST_IMC_MATCH_CMPL_GRP101 : (Group 101 pm_L1_misc) IMC matched instructions completed #Group 102 pm_L2_data, L2 load and store data event:0X0660 counters:0 um:zero minimum:1000 name:PM_L2_LD_REQ_DATA_GRP102 : (Group 102 pm_L2_data) L2 data load requests event:0X0661 counters:1 um:zero minimum:1000 name:PM_L2_LD_MISS_DATA_GRP102 : (Group 102 pm_L2_data) L2 data load misses event:0X0662 counters:2 um:zero minimum:1000 name:PM_L2_ST_REQ_DATA_GRP102 : (Group 102 pm_L2_data) L2 data store requests event:0X0663 counters:3 um:zero minimum:1000 name:PM_L2_ST_MISS_DATA_GRP102 : (Group 102 pm_L2_data) L2 data store misses #Group 103 pm_L2_ld_inst, L2 Load instructions event:0X0670 counters:0 um:zero minimum:1000 name:PM_L2_LD_REQ_INST_GRP103 : (Group 103 pm_L2_ld_inst) L2 instruction load requests event:0X0671 counters:1 um:zero minimum:1000 name:PM_L2_LD_MISS_INST_GRP103 : (Group 103 pm_L2_ld_inst) L2 instruction load misses event:0X0672 counters:2 um:zero minimum:1000 name:PM_L2_MISS_GRP103 : (Group 103 pm_L2_ld_inst) L2 cache misses event:0X0673 counters:3 um:zero minimum:1000 name:PM_L2_PREF_LD_GRP103 : (Group 103 pm_L2_ld_inst) L2 cache prefetches #Group 104 pm_L2_castout_invalidate, L2 castout and invalidate events event:0X0680 counters:0 um:zero minimum:1000 name:PM_L2_CASTOUT_MOD_GRP104 : (Group 104 pm_L2_castout_invalidate) L2 castouts - Modified (M, Mu, Me) event:0X0681 counters:1 um:zero minimum:1000 name:PM_L2_CASTOUT_SHR_GRP104 : (Group 104 pm_L2_castout_invalidate) L2 castouts - Shared (T, Te, Si, S) event:0X0682 counters:2 um:zero minimum:1000 name:PM_IC_INV_L2_GRP104 : (Group 104 pm_L2_castout_invalidate) L1 I cache entries invalidated from L2 event:0X0683 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP104 : (Group 104 pm_L2_castout_invalidate) L1 D cache entries invalidated from L2 #Group 105 pm_L2_ldst_reqhit, L2 load and store requests and hits event:0X0690 counters:0 um:zero minimum:1000 name:PM_LD_REQ_L2_GRP105 : (Group 105 pm_L2_ldst_reqhit) L2 load requests event:0X0691 counters:1 um:zero minimum:1000 name:PM_LD_HIT_L2_GRP105 : (Group 105 pm_L2_ldst_reqhit) L2 D cache load hits event:0X0692 counters:2 um:zero minimum:1000 name:PM_ST_REQ_L2_GRP105 : (Group 105 pm_L2_ldst_reqhit) L2 store requests event:0X0693 counters:3 um:zero minimum:1000 name:PM_ST_HIT_L2_GRP105 : (Group 105 pm_L2_ldst_reqhit) L2 D cache store hits #Group 106 pm_L2_ld_data_slice, L2 data loads by slice event:0X06A0 counters:0 um:zero minimum:1000 name:PM_L2SA_LD_REQ_DATA_GRP106 : (Group 106 pm_L2_ld_data_slice) L2 slice A data load requests event:0X06A1 counters:1 um:zero minimum:1000 name:PM_L2SA_LD_MISS_DATA_GRP106 : (Group 106 pm_L2_ld_data_slice) L2 slice A data load misses event:0X06A2 counters:2 um:zero minimum:1000 name:PM_L2SB_LD_REQ_DATA_GRP106 : (Group 106 pm_L2_ld_data_slice) L2 slice B data load requests event:0X06A3 counters:3 um:zero minimum:1000 name:PM_L2SB_LD_MISS_DATA_GRP106 : (Group 106 pm_L2_ld_data_slice) L2 slice B data load misses #Group 107 pm_L2_ld_inst_slice, L2 instruction loads by slice event:0X06B0 counters:0 um:zero minimum:1000 name:PM_L2SA_LD_REQ_INST_GRP107 : (Group 107 pm_L2_ld_inst_slice) L2 slice A instruction load requests event:0X06B1 counters:1 um:zero minimum:1000 name:PM_L2SA_LD_MISS_INST_GRP107 : (Group 107 pm_L2_ld_inst_slice) L2 slice A instruction load misses event:0X06B2 counters:2 um:zero minimum:1000 name:PM_L2SB_LD_REQ_INST_GRP107 : (Group 107 pm_L2_ld_inst_slice) L2 slice B instruction load requests event:0X06B3 counters:3 um:zero minimum:1000 name:PM_L2SB_LD_MISS_INST_GRP107 : (Group 107 pm_L2_ld_inst_slice) L2 slice B instruction load misses #Group 108 pm_L2_st_slice, L2 slice stores by slice event:0X06C0 counters:0 um:zero minimum:1000 name:PM_L2SA_ST_REQ_GRP108 : (Group 108 pm_L2_st_slice) L2 slice A store requests event:0X06C1 counters:1 um:zero minimum:1000 name:PM_L2SA_ST_MISS_GRP108 : (Group 108 pm_L2_st_slice) L2 slice A store misses event:0X06C2 counters:2 um:zero minimum:1000 name:PM_L2SB_ST_REQ_GRP108 : (Group 108 pm_L2_st_slice) L2 slice B store requests event:0X06C3 counters:3 um:zero minimum:1000 name:PM_L2SB_ST_MISS_GRP108 : (Group 108 pm_L2_st_slice) L2 slice B store misses #Group 109 pm_L2miss_slice, L2 misses by slice event:0X06D0 counters:0 um:zero minimum:1000 name:PM_L2SA_MISS_GRP109 : (Group 109 pm_L2miss_slice) L2 slice A misses event:0X06D1 counters:1 um:zero minimum:1000 name:PM_L2_MISS_GRP109 : (Group 109 pm_L2miss_slice) L2 cache misses event:0X06D2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP109 : (Group 109 pm_L2miss_slice) Data loaded missed L2 event:0X06D3 counters:3 um:zero minimum:1000 name:PM_L2SB_MISS_GRP109 : (Group 109 pm_L2miss_slice) L2 slice B misses #Group 110 pm_L2_castout_slice, L2 castouts by slice event:0X06E0 counters:0 um:zero minimum:1000 name:PM_L2SA_CASTOUT_MOD_GRP110 : (Group 110 pm_L2_castout_slice) L2 slice A castouts - Modified event:0X06E1 counters:1 um:zero minimum:1000 name:PM_L2SA_CASTOUT_SHR_GRP110 : (Group 110 pm_L2_castout_slice) L2 slice A castouts - Shared event:0X06E2 counters:2 um:zero minimum:1000 name:PM_L2SB_CASTOUT_MOD_GRP110 : (Group 110 pm_L2_castout_slice) L2 slice B castouts - Modified event:0X06E3 counters:3 um:zero minimum:1000 name:PM_L2SB_CASTOUT_SHR_GRP110 : (Group 110 pm_L2_castout_slice) L2 slice B castouts - Shared #Group 111 pm_L2_invalidate_slice, L2 invalidate by slice event:0X06F0 counters:0 um:zero minimum:1000 name:PM_L2SA_IC_INV_GRP111 : (Group 111 pm_L2_invalidate_slice) L2 slice A I cache invalidate event:0X06F1 counters:1 um:zero minimum:1000 name:PM_L2SA_DC_INV_GRP111 : (Group 111 pm_L2_invalidate_slice) L2 slice A D cache invalidate event:0X06F2 counters:2 um:zero minimum:1000 name:PM_L2SB_IC_INV_GRP111 : (Group 111 pm_L2_invalidate_slice) L2 slice B I cache invalidate event:0X06F3 counters:3 um:zero minimum:1000 name:PM_L2SB_DC_INV_GRP111 : (Group 111 pm_L2_invalidate_slice) L2 slice B D cache invalidate #Group 112 pm_L2_ld_reqhit_slice, L2 load requests and hist by slice event:0X0700 counters:0 um:zero minimum:1000 name:PM_L2SA_LD_REQ_GRP112 : (Group 112 pm_L2_ld_reqhit_slice) L2 slice A load requests event:0X0701 counters:1 um:zero minimum:1000 name:PM_L2SA_LD_HIT_GRP112 : (Group 112 pm_L2_ld_reqhit_slice) L2 slice A load hits event:0X0702 counters:2 um:zero minimum:1000 name:PM_L2SB_LD_REQ_GRP112 : (Group 112 pm_L2_ld_reqhit_slice) L2 slice B load requests event:0X0703 counters:3 um:zero minimum:1000 name:PM_L2SB_LD_HIT_GRP112 : (Group 112 pm_L2_ld_reqhit_slice) L2 slice B load hits #Group 113 pm_L2_st_reqhit_slice, L2 store requests and hist by slice event:0X0710 counters:0 um:zero minimum:1000 name:PM_L2SA_ST_REQ_GRP113 : (Group 113 pm_L2_st_reqhit_slice) L2 slice A store requests event:0X0711 counters:1 um:zero minimum:1000 name:PM_L2SA_ST_HIT_GRP113 : (Group 113 pm_L2_st_reqhit_slice) L2 slice A store hits event:0X0712 counters:2 um:zero minimum:1000 name:PM_L2SB_ST_REQ_GRP113 : (Group 113 pm_L2_st_reqhit_slice) L2 slice B store requests event:0X0713 counters:3 um:zero minimum:1000 name:PM_L2SB_ST_HIT_GRP113 : (Group 113 pm_L2_st_reqhit_slice) L2 slice B store hits #Group 114 pm_L2_redir_pref, L2 redirect and prefetch event:0X0720 counters:0 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BHT_REDIRECT_GRP114 : (Group 114 pm_L2_redir_pref) L2 I cache demand request due to BHT redirect event:0X0721 counters:1 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BR_REDIRECT_GRP114 : (Group 114 pm_L2_redir_pref) L2 I cache demand request due to branch redirect event:0X0722 counters:2 um:zero minimum:1000 name:PM_L2_PREF_ST_GRP114 : (Group 114 pm_L2_redir_pref) L2 cache prefetches event:0X0723 counters:3 um:zero minimum:1000 name:PM_L2_PREF_LD_GRP114 : (Group 114 pm_L2_redir_pref) L2 cache prefetches #Group 115 pm_L3_SliceA, L3 slice A events event:0X0730 counters:0 um:zero minimum:1000 name:PM_L3SA_REF_GRP115 : (Group 115 pm_L3_SliceA) L3 slice A references event:0X0731 counters:1 um:zero minimum:1000 name:PM_L3SA_HIT_GRP115 : (Group 115 pm_L3_SliceA) L3 slice A hits event:0X0732 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP115 : (Group 115 pm_L3_SliceA) Data loaded from L3 event:0X0733 counters:3 um:zero minimum:1000 name:PM_L3SA_MISS_GRP115 : (Group 115 pm_L3_SliceA) L3 slice A misses #Group 116 pm_L3_SliceB, L3 slice B events event:0X0740 counters:0 um:zero minimum:1000 name:PM_L3SB_REF_GRP116 : (Group 116 pm_L3_SliceB) L3 slice B references event:0X0741 counters:1 um:zero minimum:1000 name:PM_L3SB_HIT_GRP116 : (Group 116 pm_L3_SliceB) L3 slice B hits event:0X0742 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP116 : (Group 116 pm_L3_SliceB) Data loaded from L3 event:0X0743 counters:3 um:zero minimum:1000 name:PM_L3SB_MISS_GRP116 : (Group 116 pm_L3_SliceB) L3 slice B misses #Group 117 pm_fpu_issue, FPU issue events event:0X0750 counters:0 um:zero minimum:1000 name:PM_FPU_ISSUE_0_GRP117 : (Group 117 pm_fpu_issue) FPU issue 0 per cycle event:0X0751 counters:1 um:zero minimum:1000 name:PM_FPU_ISSUE_1_GRP117 : (Group 117 pm_fpu_issue) FPU issue 1 per cycle event:0X0752 counters:2 um:zero minimum:1000 name:PM_FPU_ISSUE_2_GRP117 : (Group 117 pm_fpu_issue) FPU issue 2 per cycle event:0X0753 counters:3 um:zero minimum:1000 name:PM_FPU_ISSUE_STEERING_GRP117 : (Group 117 pm_fpu_issue) FPU issue steering #Group 118 pm_fpu_issue2, FPU issue events event:0X0760 counters:0 um:zero minimum:1000 name:PM_FPU_ISSUE_OOO_GRP118 : (Group 118 pm_fpu_issue2) FPU issue out-of-order event:0X0761 counters:1 um:zero minimum:1000 name:PM_FPU_ISSUE_ST_FOLDED_GRP118 : (Group 118 pm_fpu_issue2) FPU issue a folded store event:0X0762 counters:2 um:zero minimum:1000 name:PM_FPU_ISSUE_DIV_SQRT_OVERLAP_GRP118 : (Group 118 pm_fpu_issue2) FPU divide/sqrt overlapped with other divide/sqrt event:0X0763 counters:3 um:zero minimum:1000 name:PM_FPU_ISSUE_STALL_ST_GRP118 : (Group 118 pm_fpu_issue2) FPU issue stalled due to store #Group 119 pm_fpu_issue3, FPU issue events event:0X0770 counters:0 um:zero minimum:1000 name:PM_FPU_ISSUE_STALL_THRD_GRP119 : (Group 119 pm_fpu_issue3) FPU issue stalled due to thread resource conflict event:0X0771 counters:1 um:zero minimum:1000 name:PM_FPU_ISSUE_STALL_FPR_GRP119 : (Group 119 pm_fpu_issue3) FPU issue stalled due to FPR dependencies event:0X0772 counters:2 um:zero minimum:1000 name:PM_FPU_ISSUE_DIV_SQRT_OVERLAP_GRP119 : (Group 119 pm_fpu_issue3) FPU divide/sqrt overlapped with other divide/sqrt event:0X0773 counters:3 um:zero minimum:1000 name:PM_FPU_ISSUE_STALL_ST_GRP119 : (Group 119 pm_fpu_issue3) FPU issue stalled due to store #Group 120 pm_fpu0_flop, FPU0 flop events event:0X0780 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP120 : (Group 120 pm_fpu0_flop) FPU0 executed add, mult, sub, cmp or sel instruction event:0X0781 counters:1 um:zero minimum:1000 name:PM_FPU0_FMA_GRP120 : (Group 120 pm_fpu0_flop) FPU0 executed multiply-add instruction event:0X0782 counters:2 um:zero minimum:1000 name:PM_FPU0_FSQRT_FDIV_GRP120 : (Group 120 pm_fpu0_flop) FPU0 executed FSQRT or FDIV instruction event:0X0783 counters:3 um:zero minimum:1000 name:PM_FPU0_STF_GRP120 : (Group 120 pm_fpu0_flop) FPU0 executed store instruction #Group 121 pm_fpu0_misc, FPU0 events event:0X0790 counters:0 um:zero minimum:1000 name:PM_FPU0_FLOP_GRP121 : (Group 121 pm_fpu0_misc) FPU0 executed 1FLOP, FMA, FSQRT or FDIV instruction event:0X0791 counters:1 um:zero minimum:1000 name:PM_FPU0_FXDIV_GRP121 : (Group 121 pm_fpu0_misc) FPU0 executed fixed point division event:0X0792 counters:2 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP121 : (Group 121 pm_fpu0_misc) FPU0 received denormalized data event:0X0793 counters:3 um:zero minimum:1000 name:PM_FPU0_SINGLE_GRP121 : (Group 121 pm_fpu0_misc) FPU0 executed single precision instruction #Group 122 pm_fpu0_misc2, FPU0 events event:0X07A0 counters:0 um:zero minimum:1000 name:PM_FPU0_FIN_GRP122 : (Group 122 pm_fpu0_misc2) FPU0 produced a result event:0X07A1 counters:1 um:zero minimum:1000 name:PM_FPU0_FEST_GRP122 : (Group 122 pm_fpu0_misc2) FPU0 executed FEST instruction event:0X07A2 counters:2 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP122 : (Group 122 pm_fpu0_misc2) FPU0 executed FPSCR instruction event:0X07A3 counters:3 um:zero minimum:1000 name:PM_FPU0_FXMULT_GRP122 : (Group 122 pm_fpu0_misc2) FPU0 executed fixed point multiplication #Group 123 pm_fpu0_misc3, FPU0 events event:0X07B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FCONV_GRP123 : (Group 123 pm_fpu0_misc3) FPU0 executed FCONV instruction event:0X07B1 counters:1 um:zero minimum:1000 name:PM_FPU0_FRSP_GRP123 : (Group 123 pm_fpu0_misc3) FPU0 executed FRSP instruction event:0X07B2 counters:2 um:zero minimum:1000 name:PM_FPU0_ST_FOLDED_GRP123 : (Group 123 pm_fpu0_misc3) FPU0 folded store event:0X07B3 counters:3 um:zero minimum:1000 name:PM_FPU0_FEST_GRP123 : (Group 123 pm_fpu0_misc3) FPU0 executed FEST instruction #Group 124 pm_fpu1_flop, FPU1 flop events event:0X07C0 counters:0 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP124 : (Group 124 pm_fpu1_flop) FPU1 executed add, mult, sub, cmp or sel instruction event:0X07C1 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP124 : (Group 124 pm_fpu1_flop) FPU1 executed multiply-add instruction event:0X07C2 counters:2 um:zero minimum:1000 name:PM_FPU1_FSQRT_FDIV_GRP124 : (Group 124 pm_fpu1_flop) FPU1 executed FSQRT or FDIV instruction event:0X07C3 counters:3 um:zero minimum:1000 name:PM_FPU1_STF_GRP124 : (Group 124 pm_fpu1_flop) FPU1 executed store instruction #Group 125 pm_fpu1_misc, FPU1 events event:0X07D0 counters:0 um:zero minimum:1000 name:PM_FPU1_FLOP_GRP125 : (Group 125 pm_fpu1_misc) FPU1 executed 1FLOP, FMA, FSQRT or FDIV instruction event:0X07D1 counters:1 um:zero minimum:1000 name:PM_FPU1_FXDIV_GRP125 : (Group 125 pm_fpu1_misc) FPU1 executed fixed point division event:0X07D2 counters:2 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP125 : (Group 125 pm_fpu1_misc) FPU1 received denormalized data event:0X07D3 counters:3 um:zero minimum:1000 name:PM_FPU1_SINGLE_GRP125 : (Group 125 pm_fpu1_misc) FPU1 executed single precision instruction #Group 126 pm_fpu1_misc2, FPU1 events event:0X07E0 counters:0 um:zero minimum:1000 name:PM_FPU1_FIN_GRP126 : (Group 126 pm_fpu1_misc2) FPU1 produced a result event:0X07E1 counters:1 um:zero minimum:1000 name:PM_FPU1_FEST_GRP126 : (Group 126 pm_fpu1_misc2) FPU1 executed FEST instruction event:0X07E2 counters:2 um:zero minimum:1000 name:PM_FPU1_FPSCR_GRP126 : (Group 126 pm_fpu1_misc2) FPU1 executed FPSCR instruction event:0X07E3 counters:3 um:zero minimum:1000 name:PM_FPU1_FXMULT_GRP126 : (Group 126 pm_fpu1_misc2) FPU1 executed fixed point multiplication #Group 127 pm_fpu1_misc3, FPU1 events event:0X07F0 counters:0 um:zero minimum:1000 name:PM_FPU1_FCONV_GRP127 : (Group 127 pm_fpu1_misc3) FPU1 executed FCONV instruction event:0X07F1 counters:1 um:zero minimum:1000 name:PM_FPU1_FRSP_GRP127 : (Group 127 pm_fpu1_misc3) FPU1 executed FRSP instruction event:0X07F2 counters:2 um:zero minimum:1000 name:PM_FPU1_ST_FOLDED_GRP127 : (Group 127 pm_fpu1_misc3) FPU1 folded store event:0X07F3 counters:3 um:zero minimum:1000 name:PM_FPU1_FEST_GRP127 : (Group 127 pm_fpu1_misc3) FPU1 executed FEST instruction #Group 128 pm_fpu_flop, FPU flop events event:0X0800 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP128 : (Group 128 pm_fpu_flop) FPU executed one flop instruction event:0X0801 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP128 : (Group 128 pm_fpu_flop) FPU executed multiply-add instruction event:0X0802 counters:2 um:zero minimum:1000 name:PM_FPU_FSQRT_FDIV_GRP128 : (Group 128 pm_fpu_flop) FPU executed FSQRT or FDIV instruction event:0X0803 counters:3 um:zero minimum:1000 name:PM_FPU_FLOP_GRP128 : (Group 128 pm_fpu_flop) FPU executed 1FLOP, FMA, FSQRT or FDIV instruction #Group 129 pm_fpu_misc, FPU events event:0X0810 counters:0 um:zero minimum:1000 name:PM_FPU_FIN_GRP129 : (Group 129 pm_fpu_misc) FPU produced a result event:0X0811 counters:1 um:zero minimum:1000 name:PM_FPU_FRSP_GRP129 : (Group 129 pm_fpu_misc) FPU executed FRSP instruction event:0X0812 counters:2 um:zero minimum:1000 name:PM_FPU_FPSCR_GRP129 : (Group 129 pm_fpu_misc) FPU executed FPSCR instruction event:0X0813 counters:3 um:zero minimum:1000 name:PM_FPU_FXMULT_GRP129 : (Group 129 pm_fpu_misc) FPU executed fixed point multiplication #Group 130 pm_fpu_misc2, FPU events event:0X0820 counters:0 um:zero minimum:1000 name:PM_FPU_FXDIV_GRP130 : (Group 130 pm_fpu_misc2) FPU executed fixed point division event:0X0821 counters:1 um:zero minimum:1000 name:PM_FPU_DENORM_GRP130 : (Group 130 pm_fpu_misc2) FPU received denormalized data event:0X0822 counters:2 um:zero minimum:1000 name:PM_FPU_STF_GRP130 : (Group 130 pm_fpu_misc2) FPU executed store instruction event:0X0823 counters:3 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP130 : (Group 130 pm_fpu_misc2) FPU executed single precision instruction #Group 131 pm_fpu_misc3, FPU events event:0X0830 counters:0 um:zero minimum:1000 name:PM_FPU_FCONV_GRP131 : (Group 131 pm_fpu_misc3) FPU executed FCONV instruction event:0X0831 counters:1 um:zero minimum:1000 name:PM_FPU_FRSP_GRP131 : (Group 131 pm_fpu_misc3) FPU executed FRSP instruction event:0X0832 counters:2 um:zero minimum:1000 name:PM_FPU_ST_FOLDED_GRP131 : (Group 131 pm_fpu_misc3) FPU folded store event:0X0833 counters:3 um:zero minimum:1000 name:PM_FPU_FEST_GRP131 : (Group 131 pm_fpu_misc3) FPU executed FEST instruction #Group 132 pm_purr, PURR events event:0X0840 counters:0 um:zero minimum:1000 name:PM_PURR_GRP132 : (Group 132 pm_purr) PURR Event event:0X0841 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP132 : (Group 132 pm_purr) Run cycles event:0X0842 counters:2 um:zero minimum:10000 name:PM_CYC_GRP132 : (Group 132 pm_purr) Processor cycles event:0X0843 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP132 : (Group 132 pm_purr) Instructions completed #Group 133 pm_suspend, SUSPENDED events event:0X0850 counters:0 um:zero minimum:1000 name:PM_SUSPENDED_GRP133 : (Group 133 pm_suspend) Suspended event:0X0851 counters:1 um:zero minimum:10000 name:PM_CYC_GRP133 : (Group 133 pm_suspend) Processor cycles event:0X0852 counters:2 um:zero minimum:1000 name:PM_SYNC_CYC_GRP133 : (Group 133 pm_suspend) Sync duration event:0X0853 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP133 : (Group 133 pm_suspend) Instructions completed #Group 134 pm_dcache, D cache event:0X0860 counters:0 um:zero minimum:1000 name:PM_LD_MISS_L1_CYC_GRP134 : (Group 134 pm_dcache) L1 data load miss cycles event:0X0861 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP134 : (Group 134 pm_dcache) DERAT misses event:0X0862 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP134 : (Group 134 pm_dcache) L1 D cache load misses event:0X0863 counters:3 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_CYC_GRP134 : (Group 134 pm_dcache) DERAT miss latency #Group 135 pm_derat_miss, DERAT miss event:0X0870 counters:0 um:zero minimum:1000 name:PM_DERAT_MISS_4K_GRP135 : (Group 135 pm_derat_miss) DERAT misses for 4K page event:0X0871 counters:1 um:zero minimum:1000 name:PM_DERAT_MISS_64K_GRP135 : (Group 135 pm_derat_miss) DERAT misses for 64K page event:0X0872 counters:2 um:zero minimum:1000 name:PM_DERAT_MISS_16M_GRP135 : (Group 135 pm_derat_miss) DERAT misses for 16M page event:0X0873 counters:3 um:zero minimum:1000 name:PM_DERAT_MISS_16G_GRP135 : (Group 135 pm_derat_miss) DERAT misses for 16G page #Group 136 pm_derat_ref, DERAT ref event:0X0880 counters:0 um:zero minimum:1000 name:PM_DERAT_REF_4K_GRP136 : (Group 136 pm_derat_ref) DERAT reference for 4K page event:0X0881 counters:1 um:zero minimum:1000 name:PM_DERAT_REF_64K_GRP136 : (Group 136 pm_derat_ref) DERAT reference for 64K page event:0X0882 counters:2 um:zero minimum:1000 name:PM_DERAT_REF_16M_GRP136 : (Group 136 pm_derat_ref) DERAT reference for 16M page event:0X0883 counters:3 um:zero minimum:1000 name:PM_DERAT_REF_16G_GRP136 : (Group 136 pm_derat_ref) DERAT reference for 16G page #Group 137 pm_ierat_miss, IERAT miss event:0X0890 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_16G_GRP137 : (Group 137 pm_ierat_miss) IERAT misses for 16G page event:0X0891 counters:1 um:zero minimum:1000 name:PM_IERAT_MISS_16M_GRP137 : (Group 137 pm_ierat_miss) IERAT misses for 16M page event:0X0892 counters:2 um:zero minimum:1000 name:PM_IERAT_MISS_64K_GRP137 : (Group 137 pm_ierat_miss) IERAT misses for 64K page event:0X0893 counters:3 um:zero minimum:1000 name:PM_IERAT_MISS_4K_GRP137 : (Group 137 pm_ierat_miss) IERAT misses for 4K page #Group 138 pm_mrk_br, Marked Branch events event:0X08A0 counters:0 um:zero minimum:1000 name:PM_MRK_BR_TAKEN_GRP138 : (Group 138 pm_mrk_br) Marked branch taken event:0X08A1 counters:1 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP138 : (Group 138 pm_mrk_br) Marked L1 D cache load misses event:0X08A2 counters:2 um:zero minimum:1000 name:PM_MRK_BR_MPRED_GRP138 : (Group 138 pm_mrk_br) Marked branch mispredicted event:0X08A3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP138 : (Group 138 pm_mrk_br) Instructions completed #Group 139 pm_mrk_dsource, Marked data sources event:0X08B0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP139 : (Group 139 pm_mrk_dsource) Instructions completed event:0X08B1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DMEM_GRP139 : (Group 139 pm_mrk_dsource) Marked data loaded from distant memory event:0X08B2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DL2L3_SHR_GRP139 : (Group 139 pm_mrk_dsource) Marked data loaded from distant L2 or L3 shared event:0X08B3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DL2L3_MOD_GRP139 : (Group 139 pm_mrk_dsource) Marked data loaded from distant L2 or L3 modified #Group 140 pm_mrk_dsource2, Marked data sources event:0X08C0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP140 : (Group 140 pm_mrk_dsource2) Marked data loaded from L2 event:0X08C1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L21_GRP140 : (Group 140 pm_mrk_dsource2) Marked data loaded from private L2 other core event:0X08C2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP140 : (Group 140 pm_mrk_dsource2) Marked data loaded from L2.5 modified event:0X08C3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP140 : (Group 140 pm_mrk_dsource2) Instructions completed #Group 141 pm_mrk_dsource3, Marked data sources event:0X08D0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP141 : (Group 141 pm_mrk_dsource3) Marked data loaded missed L2 event:0X08D1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP141 : (Group 141 pm_mrk_dsource3) Instructions completed event:0X08D2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP141 : (Group 141 pm_mrk_dsource3) Marked data loaded from L3 event:0X08D3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP141 : (Group 141 pm_mrk_dsource3) Marked data loaded from L2.5 shared #Group 142 pm_mrk_dsource4, Marked data sources event:0X08E0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_GRP142 : (Group 142 pm_mrk_dsource4) Marked data loaded from L3.5 modified event:0X08E1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_GRP142 : (Group 142 pm_mrk_dsource4) Marked data loaded from L3.5 shared event:0X08E2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3MISS_GRP142 : (Group 142 pm_mrk_dsource4) Marked data loaded from L3 miss event:0X08E3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP142 : (Group 142 pm_mrk_dsource4) Instructions completed #Group 143 pm_mrk_dsource5, Marked data sources event:0X08F0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_MEM_DP_GRP143 : (Group 143 pm_mrk_dsource5) Marked data loaded from double pump memory event:0X08F1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_SHR_GRP143 : (Group 143 pm_mrk_dsource5) Marked data loaded from remote L2 or L3 shared event:0X08F2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP143 : (Group 143 pm_mrk_dsource5) Instructions completed event:0X08F3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_GRP143 : (Group 143 pm_mrk_dsource5) Marked data loaded from local memory #Group 144 pm_mrk_dsource6, Marked data sources event:0X0900 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_MOD_GRP144 : (Group 144 pm_mrk_dsource6) Marked data loaded from remote L2 or L3 modified event:0X0901 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_SHR_GRP144 : (Group 144 pm_mrk_dsource6) Marked data loaded from remote L2 or L3 shared event:0X0902 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_GRP144 : (Group 144 pm_mrk_dsource6) Marked data loaded from remote memory event:0X0903 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP144 : (Group 144 pm_mrk_dsource6) Instructions completed #Group 145 pm_mrk_rejects, Marked rejects event:0X0910 counters:0 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_ULD_GRP145 : (Group 145 pm_mrk_rejects) Marked unaligned load reject event:0X0911 counters:1 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_UST_GRP145 : (Group 145 pm_mrk_rejects) Marked unaligned store reject event:0X0912 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP145 : (Group 145 pm_mrk_rejects) Instructions completed event:0X0913 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_LHS_GRP145 : (Group 145 pm_mrk_rejects) Marked load hit store reject #Group 146 pm_mrk_rejects2, Marked rejects LSU0 event:0X0920 counters:0 um:zero minimum:1000 name:PM_MRK_LSU0_REJECT_LHS_GRP146 : (Group 146 pm_mrk_rejects2) LSU0 marked load hit store reject event:0X0921 counters:1 um:zero minimum:1000 name:PM_MRK_LSU0_REJECT_ULD_GRP146 : (Group 146 pm_mrk_rejects2) LSU0 marked unaligned load reject event:0X0922 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_REJECT_UST_GRP146 : (Group 146 pm_mrk_rejects2) LSU0 marked unaligned store reject event:0X0923 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP146 : (Group 146 pm_mrk_rejects2) Instructions completed #Group 147 pm_mrk_rejects3, Marked rejects LSU1 event:0X0930 counters:0 um:zero minimum:1000 name:PM_MRK_LSU1_REJECT_LHS_GRP147 : (Group 147 pm_mrk_rejects3) LSU1 marked load hit store reject event:0X0931 counters:1 um:zero minimum:1000 name:PM_MRK_LSU1_REJECT_ULD_GRP147 : (Group 147 pm_mrk_rejects3) LSU1 marked unaligned load reject event:0X0932 counters:2 um:zero minimum:1000 name:PM_MRK_LSU1_REJECT_UST_GRP147 : (Group 147 pm_mrk_rejects3) LSU1 marked unaligned store reject event:0X0933 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP147 : (Group 147 pm_mrk_rejects3) Instructions completed #Group 148 pm_mrk_inst, Marked instruction events event:0X0940 counters:0 um:zero minimum:1000 name:PM_MRK_INST_ISSUED_GRP148 : (Group 148 pm_mrk_inst) Marked instruction issued event:0X0941 counters:1 um:zero minimum:1000 name:PM_MRK_INST_DISP_GRP148 : (Group 148 pm_mrk_inst) Marked instruction dispatched event:0X0942 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP148 : (Group 148 pm_mrk_inst) Marked instruction finished event:0X0943 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP148 : (Group 148 pm_mrk_inst) Instructions completed #Group 149 pm_mrk_fpu_fin, Marked Floating Point instructions finished event:0X0950 counters:0 um:zero minimum:1000 name:PM_MRK_FPU0_FIN_GRP149 : (Group 149 pm_mrk_fpu_fin) Marked instruction FPU0 processing finished event:0X0951 counters:1 um:zero minimum:1000 name:PM_MRK_FPU1_FIN_GRP149 : (Group 149 pm_mrk_fpu_fin) Marked instruction FPU1 processing finished event:0X0952 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP149 : (Group 149 pm_mrk_fpu_fin) Marked instruction FPU processing finished event:0X0953 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP149 : (Group 149 pm_mrk_fpu_fin) Instructions completed #Group 150 pm_mrk_misc, Marked misc events event:0X0960 counters:0 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_ULD_GRP150 : (Group 150 pm_mrk_misc) Marked unaligned load reject event:0X0961 counters:1 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP150 : (Group 150 pm_mrk_misc) Marked instruction FXU processing finished event:0X0962 counters:2 um:zero minimum:1000 name:PM_MRK_DFU_FIN_GRP150 : (Group 150 pm_mrk_misc) DFU marked instruction finish event:0X0963 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP150 : (Group 150 pm_mrk_misc) Instructions completed #Group 151 pm_mrk_misc2, Marked misc events event:0X0970 counters:0 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP151 : (Group 151 pm_mrk_misc2) Marked STCX failed event:0X0971 counters:1 um:zero minimum:1000 name:PM_MRK_IFU_FIN_GRP151 : (Group 151 pm_mrk_misc2) Marked instruction IFU processing finished event:0X0972 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP151 : (Group 151 pm_mrk_misc2) Instructions completed event:0X0973 counters:3 um:zero minimum:1000 name:PM_MRK_INST_TIMEO_GRP151 : (Group 151 pm_mrk_misc2) Marked Instruction finish timeout #Group 152 pm_mrk_misc3, Marked misc events event:0X0980 counters:0 um:zero minimum:1000 name:PM_MRK_VMX_ST_ISSUED_GRP152 : (Group 152 pm_mrk_misc3) Marked VMX store issued event:0X0981 counters:1 um:zero minimum:1000 name:PM_MRK_LSU0_REJECT_L2MISS_GRP152 : (Group 152 pm_mrk_misc3) LSU0 marked L2 miss reject event:0X0982 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP152 : (Group 152 pm_mrk_misc3) Instructions completed event:0X0983 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_DERAT_MISS_GRP152 : (Group 152 pm_mrk_misc3) Marked DERAT miss #Group 153 pm_mrk_misc4, Marked misc events event:0X0990 counters:0 um:zero minimum:10000 name:PM_CYC_GRP153 : (Group 153 pm_mrk_misc4) Processor cycles event:0X0991 counters:1 um:zero minimum:10000 name:PM_CYC_GRP153 : (Group 153 pm_mrk_misc4) Processor cycles event:0X0992 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP153 : (Group 153 pm_mrk_misc4) Instructions completed event:0X0993 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP153 : (Group 153 pm_mrk_misc4) Marked instruction LSU processing finished #Group 154 pm_mrk_st, Marked stores events event:0X09A0 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP154 : (Group 154 pm_mrk_st) Marked store instruction completed event:0X09A1 counters:1 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP154 : (Group 154 pm_mrk_st) Marked store sent to GPS event:0X09A2 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP154 : (Group 154 pm_mrk_st) Marked store completed with intervention event:0X09A3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP154 : (Group 154 pm_mrk_st) Instructions completed #Group 155 pm_mrk_pteg, Marked PTEG event:0X09B0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L2_GRP155 : (Group 155 pm_mrk_pteg) Marked PTEG loaded from L2.5 modified event:0X09B1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_DMEM_GRP155 : (Group 155 pm_mrk_pteg) Marked PTEG loaded from distant memory event:0X09B2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_DL2L3_SHR_GRP155 : (Group 155 pm_mrk_pteg) Marked PTEG loaded from distant L2 or L3 shared event:0X09B3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP155 : (Group 155 pm_mrk_pteg) Instructions completed #Group 156 pm_mrk_pteg2, Marked PTEG event:0X09C0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP156 : (Group 156 pm_mrk_pteg2) Instructions completed event:0X09C1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L21_GRP156 : (Group 156 pm_mrk_pteg2) Marked PTEG loaded from private L2 other core event:0X09C2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L25_MOD_GRP156 : (Group 156 pm_mrk_pteg2) Marked PTEG loaded from L2.5 modified event:0X09C3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_DL2L3_MOD_GRP156 : (Group 156 pm_mrk_pteg2) Marked PTEG loaded from distant L2 or L3 modified #Group 157 pm_mrk_pteg3, Marked PTEG event:0X09D0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L35_MOD_GRP157 : (Group 157 pm_mrk_pteg3) Marked PTEG loaded from L3.5 modified event:0X09D1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L35_SHR_GRP157 : (Group 157 pm_mrk_pteg3) Marked PTEG loaded from L3.5 shared event:0X09D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP157 : (Group 157 pm_mrk_pteg3) Instructions completed event:0X09D3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L25_SHR_GRP157 : (Group 157 pm_mrk_pteg3) Marked PTEG loaded from L2.5 shared #Group 158 pm_mrk_pteg4, Marked PTEG event:0X09E0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_MEM_DP_GRP158 : (Group 158 pm_mrk_pteg4) Marked PTEG loaded from double pump memory event:0X09E1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP158 : (Group 158 pm_mrk_pteg4) Instructions completed event:0X09E2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L3_GRP158 : (Group 158 pm_mrk_pteg4) Marked PTEG loaded from L3 event:0X09E3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L2MISS_GRP158 : (Group 158 pm_mrk_pteg4) Marked PTEG loaded from L2 miss #Group 159 pm_mrk_pteg5, Marked PTEG event:0X09F0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_RL2L3_MOD_GRP159 : (Group 159 pm_mrk_pteg5) Marked PTEG loaded from remote L2 or L3 modified event:0X09F1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP159 : (Group 159 pm_mrk_pteg5) Instructions completed event:0X09F2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L3MISS_GRP159 : (Group 159 pm_mrk_pteg5) Marked PTEG loaded from L3 miss event:0X09F3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_LMEM_GRP159 : (Group 159 pm_mrk_pteg5) Marked PTEG loaded from local memory #Group 160 pm_mrk_pteg6, Marked PTEG event:0X0A00 counters:0 um:zero minimum:10000 name:PM_CYC_GRP160 : (Group 160 pm_mrk_pteg6) Processor cycles event:0X0A01 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_RL2L3_SHR_GRP160 : (Group 160 pm_mrk_pteg6) Marked PTEG loaded from remote L2 or L3 shared event:0X0A02 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_RMEM_GRP160 : (Group 160 pm_mrk_pteg6) Marked PTEG loaded from remote memory event:0X0A03 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP160 : (Group 160 pm_mrk_pteg6) Instructions completed #Group 161 pm_mrk_vmx, Marked VMX event:0X0A10 counters:0 um:zero minimum:1000 name:PM_MRK_VMX_COMPLEX_ISSUED_GRP161 : (Group 161 pm_mrk_vmx) Marked VMX instruction issued to complex event:0X0A11 counters:1 um:zero minimum:1000 name:PM_MRK_VMX_FLOAT_ISSUED_GRP161 : (Group 161 pm_mrk_vmx) Marked VMX instruction issued to float event:0X0A12 counters:2 um:zero minimum:1000 name:PM_MRK_VMX_PERMUTE_ISSUED_GRP161 : (Group 161 pm_mrk_vmx) Marked VMX instruction issued to permute event:0X0A13 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP161 : (Group 161 pm_mrk_vmx) Instructions completed #Group 162 pm_mrk_vmx2, Marked VMX event:0X0A20 counters:0 um:zero minimum:1000 name:PM_MRK_VMX0_LD_WRBACK_GRP162 : (Group 162 pm_mrk_vmx2) Marked VMX0 load writeback valid event:0X0A21 counters:1 um:zero minimum:1000 name:PM_MRK_VMX1_LD_WRBACK_GRP162 : (Group 162 pm_mrk_vmx2) Marked VMX1 load writeback valid event:0X0A22 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_GRP162 : (Group 162 pm_mrk_vmx2) Marked Data TLB reference event:0X0A23 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP162 : (Group 162 pm_mrk_vmx2) Instructions completed #Group 163 pm_mrk_vmx3, Marked VMX event:0X0A30 counters:0 um:zero minimum:1000 name:PM_MRK_VMX_SIMPLE_ISSUED_GRP163 : (Group 163 pm_mrk_vmx3) Marked VMX instruction issued to simple event:0X0A31 counters:1 um:zero minimum:1000 name:PM_VMX_SIMPLE_ISSUED_GRP163 : (Group 163 pm_mrk_vmx3) VMX instruction issued to simple event:0X0A32 counters:2 um:zero minimum:10000 name:PM_CYC_GRP163 : (Group 163 pm_mrk_vmx3) Processor cycles event:0X0A33 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP163 : (Group 163 pm_mrk_vmx3) Instructions completed #Group 164 pm_mrk_fp, Marked FP events event:0X0A40 counters:0 um:zero minimum:1000 name:PM_MRK_FPU0_FIN_GRP164 : (Group 164 pm_mrk_fp) Marked instruction FPU0 processing finished event:0X0A41 counters:1 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP164 : (Group 164 pm_mrk_fp) Marked instruction FPU processing finished event:0X0A42 counters:2 um:zero minimum:1000 name:PM_MRK_FPU1_FIN_GRP164 : (Group 164 pm_mrk_fp) Marked instruction FPU1 processing finished event:0X0A43 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP164 : (Group 164 pm_mrk_fp) Instructions completed #Group 165 pm_mrk_derat_ref, Marked DERAT ref event:0X0A50 counters:0 um:zero minimum:1000 name:PM_MRK_DERAT_REF_64K_GRP165 : (Group 165 pm_mrk_derat_ref) Marked DERAT reference for 64K page event:0X0A51 counters:1 um:zero minimum:1000 name:PM_MRK_DERAT_REF_4K_GRP165 : (Group 165 pm_mrk_derat_ref) Marked DERAT reference for 4K page event:0X0A52 counters:2 um:zero minimum:1000 name:PM_MRK_DERAT_REF_16M_GRP165 : (Group 165 pm_mrk_derat_ref) Marked DERAT reference for 16M page event:0X0A53 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP165 : (Group 165 pm_mrk_derat_ref) Instructions completed #Group 166 pm_mrk_derat_miss, Marked DERAT miss event:0X0A60 counters:0 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_64K_GRP166 : (Group 166 pm_mrk_derat_miss) Marked DERAT misses for 64K page event:0X0A61 counters:1 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_4K_GRP166 : (Group 166 pm_mrk_derat_miss) Marked DERAT misses for 4K page event:0X0A62 counters:2 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_16M_GRP166 : (Group 166 pm_mrk_derat_miss) Marked DERAT misses for 16M page event:0X0A63 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP166 : (Group 166 pm_mrk_derat_miss) Instructions completed #Group 167 pm_dcache_edge, D cache - edge event:0X0A70 counters:0 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP167 : (Group 167 pm_dcache_edge) L1 D cache load misses event:0X0A71 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP167 : (Group 167 pm_dcache_edge) DERAT misses event:0X0A72 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP167 : (Group 167 pm_dcache_edge) L1 D cache load misses event:0X0A73 counters:3 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP167 : (Group 167 pm_dcache_edge) DERAT misses #Group 168 pm_lsu_lmq_edge, LSU LMQ events - edge event:0X0A80 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP168 : (Group 168 pm_lsu_lmq_edge) Cycles LMQ full event:0X0A81 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_COUNT_GRP168 : (Group 168 pm_lsu_lmq_edge) Periods LMQ and SRQ empty event:0X0A82 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_BOTH_COUNT_GRP168 : (Group 168 pm_lsu_lmq_edge) Periods both threads LMQ and SRQ empty event:0X0A83 counters:3 um:zero minimum:1000 name:PM_LSU0_REJECT_L2MISS_GRP168 : (Group 168 pm_lsu_lmq_edge) LSU0 L2 miss reject #Group 169 pm_gct_edge, GCT events - edge event:0X0A90 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_COUNT_GRP169 : (Group 169 pm_gct_edge) Periods no GCT slot allocated event:0X0A91 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_COUNT_GRP169 : (Group 169 pm_gct_edge) Periods GCT empty event:0X0A92 counters:2 um:zero minimum:1000 name:PM_GCT_FULL_COUNT_GRP169 : (Group 169 pm_gct_edge) Periods GCT full event:0X0A93 counters:3 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP169 : (Group 169 pm_gct_edge) Cycles at least 1 instruction fetched #Group 170 pm_freq_edge, Frequency events - edge event:0X0AA0 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_THERMAL_COUNT_GRP170 : (Group 170 pm_freq_edge) Periods DISP unit held due to thermal condition event:0X0AA1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_COUNT_GRP170 : (Group 170 pm_freq_edge) Periods DISP unit held due to Power Management event:0X0AA2 counters:2 um:zero minimum:1000 name:PM_FREQ_DOWN_GRP170 : (Group 170 pm_freq_edge) Frequency is being slewed down due to Power Management event:0X0AA3 counters:3 um:zero minimum:1000 name:PM_FREQ_UP_GRP170 : (Group 170 pm_freq_edge) Frequency is being slewed up due to Power Management #Group 171 pm_disp_wait_edge, Dispatch stalls - edge event:0X0AB0 counters:0 um:zero minimum:1000 name:PM_L1_ICACHE_MISS_GRP171 : (Group 171 pm_disp_wait_edge) L1 I cache miss count event:0X0AB1 counters:1 um:zero minimum:1000 name:PM_DPU_WT_IC_MISS_COUNT_GRP171 : (Group 171 pm_disp_wait_edge) Periods DISP unit is stalled due to I cache miss event:0X0AB2 counters:2 um:zero minimum:1000 name:PM_DPU_WT_COUNT_GRP171 : (Group 171 pm_disp_wait_edge) Periods DISP unit is stalled waiting for instructions event:0X0AB3 counters:3 um:zero minimum:1000 name:PM_DPU_WT_BR_MPRED_COUNT_GRP171 : (Group 171 pm_disp_wait_edge) Periods DISP unit is stalled due to branch misprediction #Group 172 pm_edge1, EDGE event group event:0X0AC0 counters:0 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP172 : (Group 172 pm_edge1) L1 D cache load misses event:0X0AC1 counters:1 um:zero minimum:1000 name:PM_DPU_WT_IC_MISS_GRP172 : (Group 172 pm_edge1) Cycles DISP unit is stalled due to I cache miss event:0X0AC2 counters:2 um:zero minimum:1000 name:PM_LLA_COUNT_GRP172 : (Group 172 pm_edge1) Transitions into Load Look Ahead mode event:0X0AC3 counters:3 um:zero minimum:1000 name:PM_LLA_CYC_GRP172 : (Group 172 pm_edge1) Load Look Ahead Active #Group 173 pm_edge2, EDGE event group event:0X0AD0 counters:0 um:zero minimum:1000 name:PM_0INST_FETCH_COUNT_GRP173 : (Group 173 pm_edge2) Periods with no instructions fetched event:0X0AD1 counters:1 um:zero minimum:1000 name:PM_0INST_FETCH_GRP173 : (Group 173 pm_edge2) No instructions fetched event:0X0AD2 counters:2 um:zero minimum:1000 name:PM_IBUF_FULL_COUNT_GRP173 : (Group 173 pm_edge2) Periods instruction buffer full event:0X0AD3 counters:3 um:zero minimum:1000 name:PM_IBUF_FULL_CYC_GRP173 : (Group 173 pm_edge2) Cycles instruction buffer full #Group 174 pm_edge3, EDGE event group event:0X0AE0 counters:0 um:zero minimum:1000 name:PM_RUN_COUNT_GRP174 : (Group 174 pm_edge3) Run Periods event:0X0AE1 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP174 : (Group 174 pm_edge3) Run cycles event:0X0AE2 counters:2 um:zero minimum:1000 name:PM_INST_TABLEWALK_COUNT_GRP174 : (Group 174 pm_edge3) Periods doing instruction tablewalks event:0X0AE3 counters:3 um:zero minimum:1000 name:PM_INST_TABLEWALK_CYC_GRP174 : (Group 174 pm_edge3) Cycles doing instruction tablewalks #Group 175 pm_edge4, EDGE event group event:0X0AF0 counters:0 um:zero minimum:1000 name:PM_GCT_FULL_COUNT_GRP175 : (Group 175 pm_edge4) Periods GCT full event:0X0AF1 counters:1 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP175 : (Group 175 pm_edge4) Cycles GCT full event:0X0AF2 counters:2 um:zero minimum:1000 name:PM_NO_ITAG_COUNT_GRP175 : (Group 175 pm_edge4) Periods no ITAG available event:0X0AF3 counters:3 um:zero minimum:1000 name:PM_NO_ITAG_CYC_GRP175 : (Group 175 pm_edge4) Cyles no ITAG available #Group 176 pm_edge5, EDGE event group event:0X0B00 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_COUNT_GRP176 : (Group 176 pm_edge5) Periods one of the threads in run cycles event:0X0B01 counters:1 um:zero minimum:1000 name:PM_HV_COUNT_GRP176 : (Group 176 pm_edge5) Hypervisor Periods event:0X0B02 counters:2 um:zero minimum:1000 name:PM_SYNC_COUNT_GRP176 : (Group 176 pm_edge5) SYNC instructions completed event:0X0B03 counters:3 um:zero minimum:1000 name:PM_SYNC_CYC_GRP176 : (Group 176 pm_edge5) Sync duration #Group 177 pm_noedge5, EDGE event group event:0X0B10 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_CYC_GRP177 : (Group 177 pm_noedge5) One of the threads in run cycles event:0X0B11 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP177 : (Group 177 pm_noedge5) Hypervisor Cycles event:0X0B12 counters:2 um:zero minimum:1000 name:PM_SYNC_COUNT_GRP177 : (Group 177 pm_noedge5) SYNC instructions completed event:0X0B13 counters:3 um:zero minimum:1000 name:PM_SYNC_CYC_GRP177 : (Group 177 pm_noedge5) Sync duration #Group 178 pm_edge6, EDGE event group event:0X0B20 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_THERMAL_COUNT_GRP178 : (Group 178 pm_edge6) Periods DISP unit held due to thermal condition event:0X0B21 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_COUNT_GRP178 : (Group 178 pm_edge6) Periods DISP unit held event:0X0B22 counters:2 um:zero minimum:1000 name:PM_DPU_WT_COUNT_GRP178 : (Group 178 pm_edge6) Periods DISP unit is stalled waiting for instructions event:0X0B23 counters:3 um:zero minimum:1000 name:PM_DPU_WT_BR_MPRED_COUNT_GRP178 : (Group 178 pm_edge6) Periods DISP unit is stalled due to branch misprediction #Group 179 pm_noedge6, EDGE event group event:0X0B30 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_THERMAL_GRP179 : (Group 179 pm_noedge6) DISP unit held due to thermal condition event:0X0B31 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_GRP179 : (Group 179 pm_noedge6) DISP unit held event:0X0B32 counters:2 um:zero minimum:1000 name:PM_DPU_WT_GRP179 : (Group 179 pm_noedge6) Cycles DISP unit is stalled waiting for instructions event:0X0B33 counters:3 um:zero minimum:1000 name:PM_DPU_WT_BR_MPRED_GRP179 : (Group 179 pm_noedge6) Cycles DISP unit is stalled due to branch misprediction #Group 180 pm_edge7, EDGE event group event:0X0B40 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_COUNT_GRP180 : (Group 180 pm_edge7) Periods no GCT slot allocated event:0X0B41 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_COUNT_GRP180 : (Group 180 pm_edge7) Periods GCT empty event:0X0B42 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_BOTH_COUNT_GRP180 : (Group 180 pm_edge7) Periods both threads LMQ and SRQ empty event:0X0B43 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_COUNT_GRP180 : (Group 180 pm_edge7) Periods SRQ empty #Group 181 pm_noedge7, NOEDGE event group event:0X0B50 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP181 : (Group 181 pm_noedge7) Cycles no GCT slot allocated event:0X0B51 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP181 : (Group 181 pm_noedge7) Cycles GCT empty event:0X0B52 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_BOTH_CYC_GRP181 : (Group 181 pm_noedge7) Cycles both threads LMQ and SRQ empty event:0X0B53 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP181 : (Group 181 pm_noedge7) Cycles SRQ empty #Group 182 pm_edge8, EDGE event group event:0X0B60 counters:0 um:zero minimum:1000 name:PM_SYNC_COUNT_GRP182 : (Group 182 pm_edge8) SYNC instructions completed event:0X0B61 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_COUNT_GRP182 : (Group 182 pm_edge8) Periods LMQ and SRQ empty event:0X0B62 counters:2 um:zero minimum:1000 name:PM_SYNC_CYC_GRP182 : (Group 182 pm_edge8) Sync duration event:0X0B63 counters:3 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP182 : (Group 182 pm_edge8) DERAT misses #Group 183 pm_noedge8, NOEDGE event group event:0X0B70 counters:0 um:zero minimum:1000 name:PM_SYNC_CYC_GRP183 : (Group 183 pm_noedge8) Sync duration event:0X0B71 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP183 : (Group 183 pm_noedge8) Cycles LMQ and SRQ empty event:0X0B72 counters:2 um:zero minimum:1000 name:PM_SYNC_COUNT_GRP183 : (Group 183 pm_noedge8) SYNC instructions completed event:0X0B73 counters:3 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_CYC_GRP183 : (Group 183 pm_noedge8) DERAT miss latency #Group 184 pm_edge9, EDGE event group event:0X0B80 counters:0 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP184 : (Group 184 pm_edge9) L1 D cache store misses event:0X0B81 counters:1 um:zero minimum:1000 name:PM_DPU_WT_IC_MISS_COUNT_GRP184 : (Group 184 pm_edge9) Periods DISP unit is stalled due to I cache miss event:0X0B82 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP184 : (Group 184 pm_edge9) L1 D cache load misses event:0X0B83 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP184 : (Group 184 pm_edge9) L1 D cache load references #Group 185 pm_edge10, EDGE event group event:0X0B90 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_COMPLETION_GRP185 : (Group 185 pm_edge10) DISP unit held due to completion holding dispatch event:0X0B91 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_COUNT_GRP185 : (Group 185 pm_edge10) Periods DISP unit held due to Power Management event:0X0B92 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_CR_LOGICAL_GRP185 : (Group 185 pm_edge10) DISP unit held due to CR, LR or CTR updated by CR logical, MTCRF, MTLR or MTCTR event:0X0B93 counters:3 um:zero minimum:1000 name:PM_THRD_BOTH_RUN_COUNT_GRP185 : (Group 185 pm_edge10) Periods both threads in run cycles #Group 186 pm_noedge10, NOEDGE event group event:0X0BA0 counters:0 um:zero minimum:1000 name:PM_DPU_HELD_COMPLETION_GRP186 : (Group 186 pm_noedge10) DISP unit held due to completion holding dispatch event:0X0BA1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP186 : (Group 186 pm_noedge10) DISP unit held due to Power Management event:0X0BA2 counters:2 um:zero minimum:1000 name:PM_DPU_HELD_CR_LOGICAL_GRP186 : (Group 186 pm_noedge10) DISP unit held due to CR, LR or CTR updated by CR logical, MTCRF, MTLR or MTCTR event:0X0BA3 counters:3 um:zero minimum:1000 name:PM_THRD_BOTH_RUN_CYC_GRP186 : (Group 186 pm_noedge10) Both threads in run cycles #Group 187 pm_hpm1, HPM group event:0X0BB0 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP187 : (Group 187 pm_hpm1) FPU executed one flop instruction event:0X0BB1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP187 : (Group 187 pm_hpm1) FPU executed multiply-add instruction event:0X0BB2 counters:2 um:zero minimum:1000 name:PM_FPU_FSQRT_FDIV_GRP187 : (Group 187 pm_hpm1) FPU executed FSQRT or FDIV instruction event:0X0BB3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP187 : (Group 187 pm_hpm1) Processor cycles #Group 188 pm_hpm2, HPM group event:0X0BC0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP188 : (Group 188 pm_hpm2) Instructions completed event:0X0BC1 counters:1 um:zero minimum:1000 name:PM_LSU_LDF_GRP188 : (Group 188 pm_hpm2) LSU executed Floating Point load instruction event:0X0BC2 counters:2 um:zero minimum:1000 name:PM_FPU_STF_GRP188 : (Group 188 pm_hpm2) FPU executed store instruction event:0X0BC3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP188 : (Group 188 pm_hpm2) Processor cycles #Group 189 pm_hpm3, HPM group event:0X0BD0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP189 : (Group 189 pm_hpm3) Processor cycles event:0X0BD1 counters:1 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP189 : (Group 189 pm_hpm3) L1 D cache load misses event:0X0BD2 counters:2 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP189 : (Group 189 pm_hpm3) L1 D cache store misses event:0X0BD3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP189 : (Group 189 pm_hpm3) Instructions completed #Group 190 pm_hpm4, HPM group event:0X0BE0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP190 : (Group 190 pm_hpm4) Instructions completed event:0X0BE1 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP190 : (Group 190 pm_hpm4) Instructions dispatched event:0X0BE2 counters:2 um:zero minimum:1000 name:PM_LD_REF_L1_GRP190 : (Group 190 pm_hpm4) L1 D cache load references event:0X0BE3 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_GRP190 : (Group 190 pm_hpm4) L1 D cache store references #Group 191 pm_hpm5, HPM group event:0X0BF0 counters:0 um:zero minimum:1000 name:PM_FPU_FIN_GRP191 : (Group 191 pm_hpm5) FPU produced a result event:0X0BF1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP191 : (Group 191 pm_hpm5) Processor cycles event:0X0BF2 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP191 : (Group 191 pm_hpm5) FXU0 produced a result event:0X0BF3 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP191 : (Group 191 pm_hpm5) FXU1 produced a result #Group 192 pm_hpm6, HPM group event:0X0C00 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP192 : (Group 192 pm_hpm6) Data loaded from L2 event:0X0C01 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L21_GRP192 : (Group 192 pm_hpm6) Data loaded from private L2 other core event:0X0C02 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP192 : (Group 192 pm_hpm6) Data loaded from L2.5 modified event:0X0C03 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP192 : (Group 192 pm_hpm6) Data loaded from L2.5 shared #Group 193 pm_hpm7, HPM group event:0X0C10 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP193 : (Group 193 pm_hpm7) Data loaded from L3.5 modified event:0X0C11 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_GRP193 : (Group 193 pm_hpm7) Data loaded from L3.5 shared event:0X0C12 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP193 : (Group 193 pm_hpm7) Data loaded from L3 event:0X0C13 counters:3 um:zero minimum:10000 name:PM_CYC_GRP193 : (Group 193 pm_hpm7) Processor cycles #Group 194 pm_hpm8, HPM group event:0X0C20 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP194 : (Group 194 pm_hpm8) FPU executed one flop instruction event:0X0C21 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP194 : (Group 194 pm_hpm8) FPU executed multiply-add instruction event:0X0C22 counters:2 um:zero minimum:1000 name:PM_FPU_STF_GRP194 : (Group 194 pm_hpm8) FPU executed store instruction event:0X0C23 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP194 : (Group 194 pm_hpm8) L1 D cache load misses #Group 195 pm_hpm9, HPM group event:0X0C30 counters:0 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP195 : (Group 195 pm_hpm9) L1 D cache load misses event:0X0C31 counters:1 um:zero minimum:10000 name:PM_CYC_GRP195 : (Group 195 pm_hpm9) Processor cycles event:0X0C32 counters:2 um:zero minimum:1000 name:PM_LSU_LDF_GRP195 : (Group 195 pm_hpm9) LSU executed Floating Point load instruction event:0X0C33 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP195 : (Group 195 pm_hpm9) L1 D cache store misses #Group 196 pm_hpm10, HPM group event:0X0C40 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP196 : (Group 196 pm_hpm10) Instructions completed event:0X0C41 counters:1 um:zero minimum:1000 name:PM_L2_MISS_GRP196 : (Group 196 pm_hpm10) L2 cache misses event:0X0C42 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L3MISS_GRP196 : (Group 196 pm_hpm10) Instruction fetched missed L3 event:0X0C43 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP196 : (Group 196 pm_hpm10) Data loaded from private L3 miss #Group 197 pm_mrk_derat_ref2, Marked DERAT ref event:0X0C50 counters:0 um:zero minimum:1000 name:PM_MRK_DERAT_REF_64K_GRP197 : (Group 197 pm_mrk_derat_ref2) Marked DERAT reference for 64K page event:0X0C51 counters:1 um:zero minimum:1000 name:PM_MRK_DERAT_REF_4K_GRP197 : (Group 197 pm_mrk_derat_ref2) Marked DERAT reference for 4K page event:0X0C52 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP197 : (Group 197 pm_mrk_derat_ref2) Instructions completed event:0X0C53 counters:3 um:zero minimum:1000 name:PM_MRK_DERAT_REF_16G_GRP197 : (Group 197 pm_mrk_derat_ref2) Marked DERAT reference for 16G page #Group 198 pm_mrk_derat_miss2, Marked DERAT miss event:0X0C60 counters:0 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_64K_GRP198 : (Group 198 pm_mrk_derat_miss2) Marked DERAT misses for 64K page event:0X0C61 counters:1 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_4K_GRP198 : (Group 198 pm_mrk_derat_miss2) Marked DERAT misses for 4K page event:0X0C62 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP198 : (Group 198 pm_mrk_derat_miss2) Instructions completed event:0X0C63 counters:3 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_16G_GRP198 : (Group 198 pm_mrk_derat_miss2) Marked DERAT misses for 16G page oprofile-1.3.0/events/ppc64/power6/event_mappings0000664000175000017500000020016712534404406016711 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2007. # Contributed by Dave Nomura . # #Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 #Group 1 pm_utilization, CPI and utilization data event:0X0010 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X0011 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X0012 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X0013 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 #Group 2 pm_utilization_capacity, CPU utilization and capacity event:0X0020 mmcr0:0X00000000 mmcr1:0X00000000FA1EF4F4 mmcra:0X00000000 event:0X0021 mmcr0:0X00000000 mmcr1:0X00000000FA1EF4F4 mmcra:0X00000000 event:0X0022 mmcr0:0X00000000 mmcr1:0X00000000FA1EF4F4 mmcra:0X00000000 event:0X0023 mmcr0:0X00000000 mmcr1:0X00000000FA1EF4F4 mmcra:0X00000000 #Group 3 pm_branch, Branch operations event:0X0030 mmcr0:0X00000000 mmcr1:0X04000000A2A8808A mmcra:0X00000000 event:0X0031 mmcr0:0X00000000 mmcr1:0X04000000A2A8808A mmcra:0X00000000 event:0X0032 mmcr0:0X00000000 mmcr1:0X04000000A2A8808A mmcra:0X00000000 event:0X0033 mmcr0:0X00000000 mmcr1:0X04000000A2A8808A mmcra:0X00000000 #Group 4 pm_branch2, Branch operations event:0X0040 mmcr0:0X00000000 mmcr1:0X04000000A4A68E8C mmcra:0X00000000 event:0X0041 mmcr0:0X00000000 mmcr1:0X04000000A4A68E8C mmcra:0X00000000 event:0X0042 mmcr0:0X00000000 mmcr1:0X04000000A4A68E8C mmcra:0X00000000 event:0X0043 mmcr0:0X00000000 mmcr1:0X04000000A4A68E8C mmcra:0X00000000 #Group 5 pm_branch3, Branch operations event:0X0050 mmcr0:0X00000000 mmcr1:0X04000000A0A28486 mmcra:0X00000000 event:0X0051 mmcr0:0X00000000 mmcr1:0X04000000A0A28486 mmcra:0X00000000 event:0X0052 mmcr0:0X00000000 mmcr1:0X04000000A0A28486 mmcra:0X00000000 event:0X0053 mmcr0:0X00000000 mmcr1:0X04000000A0A28486 mmcra:0X00000000 #Group 6 pm_branch4, Branch operations event:0X0060 mmcr0:0X00000000 mmcr1:0X04000000A8AA8C8E mmcra:0X00000000 event:0X0061 mmcr0:0X00000000 mmcr1:0X04000000A8AA8C8E mmcra:0X00000000 event:0X0062 mmcr0:0X00000000 mmcr1:0X04000000A8AA8C8E mmcra:0X00000000 event:0X0063 mmcr0:0X00000000 mmcr1:0X04000000A8AA8C8E mmcra:0X00000000 #Group 7 pm_branch5, Branch operations event:0X0070 mmcr0:0X00000000 mmcr1:0X04040000A052C652 mmcra:0X00000000 event:0X0071 mmcr0:0X00000000 mmcr1:0X04040000A052C652 mmcra:0X00000000 event:0X0072 mmcr0:0X00000000 mmcr1:0X04040000A052C652 mmcra:0X00000000 event:0X0073 mmcr0:0X00000000 mmcr1:0X04040000A052C652 mmcra:0X00000000 #Group 8 pm_dsource, Data source event:0X0080 mmcr0:0X00000000 mmcr1:0X0000000058585656 mmcra:0X00000000 event:0X0081 mmcr0:0X00000000 mmcr1:0X0000000058585656 mmcra:0X00000000 event:0X0082 mmcr0:0X00000000 mmcr1:0X0000000058585656 mmcra:0X00000000 event:0X0083 mmcr0:0X00000000 mmcr1:0X0000000058585656 mmcra:0X00000000 #Group 9 pm_dsource2, Data sources event:0X0090 mmcr0:0X00000000 mmcr1:0X000000005A5A5856 mmcra:0X00000000 event:0X0091 mmcr0:0X00000000 mmcr1:0X000000005A5A5856 mmcra:0X00000000 event:0X0092 mmcr0:0X00000000 mmcr1:0X000000005A5A5856 mmcra:0X00000000 event:0X0093 mmcr0:0X00000000 mmcr1:0X000000005A5A5856 mmcra:0X00000000 #Group 10 pm_dsource3, Data sources event:0X00A0 mmcr0:0X00000000 mmcr1:0X000000005A5A5A5A mmcra:0X00000000 event:0X00A1 mmcr0:0X00000000 mmcr1:0X000000005A5A5A5A mmcra:0X00000000 event:0X00A2 mmcr0:0X00000000 mmcr1:0X000000005A5A5A5A mmcra:0X00000000 event:0X00A3 mmcr0:0X00000000 mmcr1:0X000000005A5A5A5A mmcra:0X00000000 #Group 11 pm_dsource4, Data sources event:0X00B0 mmcr0:0X00000000 mmcr1:0X000000005C5C5C5C mmcra:0X00000000 event:0X00B1 mmcr0:0X00000000 mmcr1:0X000000005C5C5C5C mmcra:0X00000000 event:0X00B2 mmcr0:0X00000000 mmcr1:0X000000005C5C5C5C mmcra:0X00000000 event:0X00B3 mmcr0:0X00000000 mmcr1:0X000000005C5C5C5C mmcra:0X00000000 #Group 12 pm_dsource5, Data sources event:0X00C0 mmcr0:0X00000000 mmcr1:0X000000005E5E5E5E mmcra:0X00000000 event:0X00C1 mmcr0:0X00000000 mmcr1:0X000000005E5E5E5E mmcra:0X00000000 event:0X00C2 mmcr0:0X00000000 mmcr1:0X000000005E5E5E5E mmcra:0X00000000 event:0X00C3 mmcr0:0X00000000 mmcr1:0X000000005E5E5E5E mmcra:0X00000000 #Group 13 pm_dlatencies, Data latencies event:0X00D0 mmcr0:0X00000000 mmcr1:0X000000000C281E24 mmcra:0X00000000 event:0X00D1 mmcr0:0X00000000 mmcr1:0X000000000C281E24 mmcra:0X00000000 event:0X00D2 mmcr0:0X00000000 mmcr1:0X000000000C281E24 mmcra:0X00000000 event:0X00D3 mmcr0:0X00000000 mmcr1:0X000000000C281E24 mmcra:0X00000000 #Group 14 pm_dlatencies2, Data latencies event:0X00E0 mmcr0:0X00000000 mmcr1:0X00000000022C1E2A mmcra:0X00000000 event:0X00E1 mmcr0:0X00000000 mmcr1:0X00000000022C1E2A mmcra:0X00000000 event:0X00E2 mmcr0:0X00000000 mmcr1:0X00000000022C1E2A mmcra:0X00000000 event:0X00E3 mmcr0:0X00000000 mmcr1:0X00000000022C1E2A mmcra:0X00000000 #Group 15 pm_dlatencies3, Data latencies event:0X00F0 mmcr0:0X00000000 mmcr1:0X00000000022E5E2C mmcra:0X00000000 event:0X00F1 mmcr0:0X00000000 mmcr1:0X00000000022E5E2C mmcra:0X00000000 event:0X00F2 mmcr0:0X00000000 mmcr1:0X00000000022E5E2C mmcra:0X00000000 event:0X00F3 mmcr0:0X00000000 mmcr1:0X00000000022E5E2C mmcra:0X00000000 #Group 16 pm_dlatencies4, Data latencies event:0X0100 mmcr0:0X00000000 mmcr1:0X000000005A2A5C26 mmcra:0X00000000 event:0X0101 mmcr0:0X00000000 mmcr1:0X000000005A2A5C26 mmcra:0X00000000 event:0X0102 mmcr0:0X00000000 mmcr1:0X000000005A2A5C26 mmcra:0X00000000 event:0X0103 mmcr0:0X00000000 mmcr1:0X000000005A2A5C26 mmcra:0X00000000 #Group 17 pm_dlatencies5, Data latencies event:0X0110 mmcr0:0X00000000 mmcr1:0X000000005C225828 mmcra:0X00000000 event:0X0111 mmcr0:0X00000000 mmcr1:0X000000005C225828 mmcra:0X00000000 event:0X0112 mmcr0:0X00000000 mmcr1:0X000000005C225828 mmcra:0X00000000 event:0X0113 mmcr0:0X00000000 mmcr1:0X000000005C225828 mmcra:0X00000000 #Group 18 pm_dlatencies6, Data latencies event:0X0120 mmcr0:0X00000000 mmcr1:0X000000005E245A2E mmcra:0X00000000 event:0X0121 mmcr0:0X00000000 mmcr1:0X000000005E245A2E mmcra:0X00000000 event:0X0122 mmcr0:0X00000000 mmcr1:0X000000005E245A2E mmcra:0X00000000 event:0X0123 mmcr0:0X00000000 mmcr1:0X000000005E245A2E mmcra:0X00000000 #Group 19 pm_dlatencies7, Data latencies event:0X0130 mmcr0:0X00000000 mmcr1:0X000000005820120E mmcra:0X00000000 event:0X0131 mmcr0:0X00000000 mmcr1:0X000000005820120E mmcra:0X00000000 event:0X0132 mmcr0:0X00000000 mmcr1:0X000000005820120E mmcra:0X00000000 event:0X0133 mmcr0:0X00000000 mmcr1:0X000000005820120E mmcra:0X00000000 #Group 20 pm_dlatencies8, Data latencies event:0X0140 mmcr0:0X00000000 mmcr1:0X0000000010581E20 mmcra:0X00000000 event:0X0141 mmcr0:0X00000000 mmcr1:0X0000000010581E20 mmcra:0X00000000 event:0X0142 mmcr0:0X00000000 mmcr1:0X0000000010581E20 mmcra:0X00000000 event:0X0143 mmcr0:0X00000000 mmcr1:0X0000000010581E20 mmcra:0X00000000 #Group 21 pm_dlatencies9, Data latencies event:0X0150 mmcr0:0X00000000 mmcr1:0X00000000122C125E mmcra:0X00000000 event:0X0151 mmcr0:0X00000000 mmcr1:0X00000000122C125E mmcra:0X00000000 event:0X0152 mmcr0:0X00000000 mmcr1:0X00000000122C125E mmcra:0X00000000 event:0X0153 mmcr0:0X00000000 mmcr1:0X00000000122C125E mmcra:0X00000000 #Group 22 pm_dlatencies10, Data latencies event:0X0160 mmcr0:0X00000000 mmcr1:0X000000005A261E26 mmcra:0X00000000 event:0X0161 mmcr0:0X00000000 mmcr1:0X000000005A261E26 mmcra:0X00000000 event:0X0162 mmcr0:0X00000000 mmcr1:0X000000005A261E26 mmcra:0X00000000 event:0X0163 mmcr0:0X00000000 mmcr1:0X000000005A261E26 mmcra:0X00000000 #Group 23 pm_isource, Instruction sources event:0X0170 mmcr0:0X00000000 mmcr1:0X0040000040404654 mmcra:0X00000000 event:0X0171 mmcr0:0X00000000 mmcr1:0X0040000040404654 mmcra:0X00000000 event:0X0172 mmcr0:0X00000000 mmcr1:0X0040000040404654 mmcra:0X00000000 event:0X0173 mmcr0:0X00000000 mmcr1:0X0040000040404654 mmcra:0X00000000 #Group 24 pm_isource2, Instruction sources event:0X0180 mmcr0:0X00000000 mmcr1:0X0040000046464046 mmcra:0X00000000 event:0X0181 mmcr0:0X00000000 mmcr1:0X0040000046464046 mmcra:0X00000000 event:0X0182 mmcr0:0X00000000 mmcr1:0X0040000046464046 mmcra:0X00000000 event:0X0183 mmcr0:0X00000000 mmcr1:0X0040000046464046 mmcra:0X00000000 #Group 25 pm_isource3, Instruction sources event:0X0190 mmcr0:0X00000000 mmcr1:0X0040000044444444 mmcra:0X00000000 event:0X0191 mmcr0:0X00000000 mmcr1:0X0040000044444444 mmcra:0X00000000 event:0X0192 mmcr0:0X00000000 mmcr1:0X0040000044444444 mmcra:0X00000000 event:0X0193 mmcr0:0X00000000 mmcr1:0X0040000044444444 mmcra:0X00000000 #Group 26 pm_isource4, Instruction sources event:0X01A0 mmcr0:0X00000000 mmcr1:0X0040000042424242 mmcra:0X00000000 event:0X01A1 mmcr0:0X00000000 mmcr1:0X0040000042424242 mmcra:0X00000000 event:0X01A2 mmcr0:0X00000000 mmcr1:0X0040000042424242 mmcra:0X00000000 event:0X01A3 mmcr0:0X00000000 mmcr1:0X0040000042424242 mmcra:0X00000000 #Group 27 pm_isource5, Instruction sources event:0X01B0 mmcr0:0X00000000 mmcr1:0X0040000040405454 mmcra:0X00000000 event:0X01B1 mmcr0:0X00000000 mmcr1:0X0040000040405454 mmcra:0X00000000 event:0X01B2 mmcr0:0X00000000 mmcr1:0X0040000040405454 mmcra:0X00000000 event:0X01B3 mmcr0:0X00000000 mmcr1:0X0040000040405454 mmcra:0X00000000 #Group 28 pm_pteg, PTEG sources event:0X01C0 mmcr0:0X00000000 mmcr1:0X0001000048484E4E mmcra:0X00000000 event:0X01C1 mmcr0:0X00000000 mmcr1:0X0001000048484E4E mmcra:0X00000000 event:0X01C2 mmcr0:0X00000000 mmcr1:0X0001000048484E4E mmcra:0X00000000 event:0X01C3 mmcr0:0X00000000 mmcr1:0X0001000048484E4E mmcra:0X00000000 #Group 29 pm_pteg2, PTEG sources event:0X01D0 mmcr0:0X00000000 mmcr1:0X000100002848484C mmcra:0X00000000 event:0X01D1 mmcr0:0X00000000 mmcr1:0X000100002848484C mmcra:0X00000000 event:0X01D2 mmcr0:0X00000000 mmcr1:0X000100002848484C mmcra:0X00000000 event:0X01D3 mmcr0:0X00000000 mmcr1:0X000100002848484C mmcra:0X00000000 #Group 30 pm_pteg3, PTEG sources event:0X01E0 mmcr0:0X00000000 mmcr1:0X000100004E4E284A mmcra:0X00000000 event:0X01E1 mmcr0:0X00000000 mmcr1:0X000100004E4E284A mmcra:0X00000000 event:0X01E2 mmcr0:0X00000000 mmcr1:0X000100004E4E284A mmcra:0X00000000 event:0X01E3 mmcr0:0X00000000 mmcr1:0X000100004E4E284A mmcra:0X00000000 #Group 31 pm_pteg4, PTEG sources event:0X01F0 mmcr0:0X00000000 mmcr1:0X000100004A4A4A4A mmcra:0X00000000 event:0X01F1 mmcr0:0X00000000 mmcr1:0X000100004A4A4A4A mmcra:0X00000000 event:0X01F2 mmcr0:0X00000000 mmcr1:0X000100004A4A4A4A mmcra:0X00000000 event:0X01F3 mmcr0:0X00000000 mmcr1:0X000100004A4A4A4A mmcra:0X00000000 #Group 32 pm_pteg5, PTEG sources event:0X0200 mmcr0:0X00000000 mmcr1:0X000100004C4C4CC8 mmcra:0X00000000 event:0X0201 mmcr0:0X00000000 mmcr1:0X000100004C4C4CC8 mmcra:0X00000000 event:0X0202 mmcr0:0X00000000 mmcr1:0X000100004C4C4CC8 mmcra:0X00000000 event:0X0203 mmcr0:0X00000000 mmcr1:0X000100004C4C4CC8 mmcra:0X00000000 #Group 33 pm_data_tablewalk, Data tablewalks event:0X0210 mmcr0:0X00000000 mmcr1:0X09900000A0A284E8 mmcra:0X00000000 event:0X0211 mmcr0:0X00000000 mmcr1:0X09900000A0A284E8 mmcra:0X00000000 event:0X0212 mmcr0:0X00000000 mmcr1:0X09900000A0A284E8 mmcra:0X00000000 event:0X0213 mmcr0:0X00000000 mmcr1:0X09900000A0A284E8 mmcra:0X00000000 #Group 34 pm_inst_tablewalk, Instruction tablewalks event:0X0220 mmcr0:0X00000000 mmcr1:0X09900000A8AA8CEA mmcra:0X00000000 event:0X0221 mmcr0:0X00000000 mmcr1:0X09900000A8AA8CEA mmcra:0X00000000 event:0X0222 mmcr0:0X00000000 mmcr1:0X09900000A8AA8CEA mmcra:0X00000000 event:0X0223 mmcr0:0X00000000 mmcr1:0X09900000A8AA8CEA mmcra:0X00000000 #Group 35 pm_freq, Frequency events event:0X0230 mmcr0:0X00000000 mmcr1:0X000000002A3C3C3C mmcra:0X00000000 event:0X0231 mmcr0:0X00000000 mmcr1:0X000000002A3C3C3C mmcra:0X00000000 event:0X0232 mmcr0:0X00000000 mmcr1:0X000000002A3C3C3C mmcra:0X00000000 event:0X0233 mmcr0:0X00000000 mmcr1:0X000000002A3C3C3C mmcra:0X00000000 #Group 36 pm_disp_wait, Dispatch stalls event:0X0240 mmcr0:0X00000000 mmcr1:0X00000000560C040C mmcra:0X00000000 event:0X0241 mmcr0:0X00000000 mmcr1:0X00000000560C040C mmcra:0X00000000 event:0X0242 mmcr0:0X00000000 mmcr1:0X00000000560C040C mmcra:0X00000000 event:0X0243 mmcr0:0X00000000 mmcr1:0X00000000560C040C mmcra:0X00000000 #Group 37 pm_disp_held, Dispatch held conditions event:0X0250 mmcr0:0X00000000 mmcr1:0X200000002A3C2AA2 mmcra:0X00000000 event:0X0251 mmcr0:0X00000000 mmcr1:0X200000002A3C2AA2 mmcra:0X00000000 event:0X0252 mmcr0:0X00000000 mmcr1:0X200000002A3C2AA2 mmcra:0X00000000 event:0X0253 mmcr0:0X00000000 mmcr1:0X200000002A3C2AA2 mmcra:0X00000000 #Group 38 pm_disp_held2, Dispatch held conditions event:0X0260 mmcr0:0X00000000 mmcr1:0X200000008004A4A6 mmcra:0X00000000 event:0X0261 mmcr0:0X00000000 mmcr1:0X200000008004A4A6 mmcra:0X00000000 event:0X0262 mmcr0:0X00000000 mmcr1:0X200000008004A4A6 mmcra:0X00000000 event:0X0263 mmcr0:0X00000000 mmcr1:0X200000008004A4A6 mmcra:0X00000000 #Group 39 pm_disp_held3, Dispatch held conditions event:0X0270 mmcr0:0X00000000 mmcr1:0X20000000888AACAE mmcra:0X00000000 event:0X0271 mmcr0:0X00000000 mmcr1:0X20000000888AACAE mmcra:0X00000000 event:0X0272 mmcr0:0X00000000 mmcr1:0X20000000888AACAE mmcra:0X00000000 event:0X0273 mmcr0:0X00000000 mmcr1:0X20000000888AACAE mmcra:0X00000000 #Group 40 pm_disp_held4, Dispatch held conditions event:0X0280 mmcr0:0X00000000 mmcr1:0X02000000A0A28486 mmcra:0X00000000 event:0X0281 mmcr0:0X00000000 mmcr1:0X02000000A0A28486 mmcra:0X00000000 event:0X0282 mmcr0:0X00000000 mmcr1:0X02000000A0A28486 mmcra:0X00000000 event:0X0283 mmcr0:0X00000000 mmcr1:0X02000000A0A28486 mmcra:0X00000000 #Group 41 pm_disp_held5, Dispatch held conditions event:0X0290 mmcr0:0X00000000 mmcr1:0X22000000A8AA8CA0 mmcra:0X00000000 event:0X0291 mmcr0:0X00000000 mmcr1:0X22000000A8AA8CA0 mmcra:0X00000000 event:0X0292 mmcr0:0X00000000 mmcr1:0X22000000A8AA8CA0 mmcra:0X00000000 event:0X0293 mmcr0:0X00000000 mmcr1:0X22000000A8AA8CA0 mmcra:0X00000000 #Group 42 pm_disp_held6, Dispatch held conditions event:0X02A0 mmcr0:0X00000000 mmcr1:0X33000000A882A4A6 mmcra:0X00000000 event:0X02A1 mmcr0:0X00000000 mmcr1:0X33000000A882A4A6 mmcra:0X00000000 event:0X02A2 mmcr0:0X00000000 mmcr1:0X33000000A882A4A6 mmcra:0X00000000 event:0X02A3 mmcr0:0X00000000 mmcr1:0X33000000A882A4A6 mmcra:0X00000000 #Group 43 pm_disp_held7, Dispatch held conditions event:0X02B0 mmcr0:0X00000000 mmcr1:0X30000000888AACAE mmcra:0X00000000 event:0X02B1 mmcr0:0X00000000 mmcr1:0X30000000888AACAE mmcra:0X00000000 event:0X02B2 mmcr0:0X00000000 mmcr1:0X30000000888AACAE mmcra:0X00000000 event:0X02B3 mmcr0:0X00000000 mmcr1:0X30000000888AACAE mmcra:0X00000000 #Group 44 pm_disp_held8, Dispatch held conditions event:0X02C0 mmcr0:0X00000000 mmcr1:0X220000008A8CAE80 mmcra:0X00000000 event:0X02C1 mmcr0:0X00000000 mmcr1:0X220000008A8CAE80 mmcra:0X00000000 event:0X02C2 mmcr0:0X00000000 mmcr1:0X220000008A8CAE80 mmcra:0X00000000 event:0X02C3 mmcr0:0X00000000 mmcr1:0X220000008A8CAE80 mmcra:0X00000000 #Group 45 pm_disp_held9, Dispatch held conditions event:0X02D0 mmcr0:0X00000000 mmcr1:0X220000008AA08A8C mmcra:0X00000000 event:0X02D1 mmcr0:0X00000000 mmcr1:0X220000008AA08A8C mmcra:0X00000000 event:0X02D2 mmcr0:0X00000000 mmcr1:0X220000008AA08A8C mmcra:0X00000000 event:0X02D3 mmcr0:0X00000000 mmcr1:0X220000008AA08A8C mmcra:0X00000000 #Group 46 pm_sync, Sync events event:0X02E0 mmcr0:0X00000000 mmcr1:0X38900000AE1EECA0 mmcra:0X00000000 event:0X02E1 mmcr0:0X00000000 mmcr1:0X38900000AE1EECA0 mmcra:0X00000000 event:0X02E2 mmcr0:0X00000000 mmcr1:0X38900000AE1EECA0 mmcra:0X00000000 event:0X02E3 mmcr0:0X00000000 mmcr1:0X38900000AE1EECA0 mmcra:0X00000000 #Group 47 pm_L1_ref, L1 references event:0X02F0 mmcr0:0X00000000 mmcr1:0X80000000368AA63A mmcra:0X00000000 event:0X02F1 mmcr0:0X00000000 mmcr1:0X80000000368AA63A mmcra:0X00000000 event:0X02F2 mmcr0:0X00000000 mmcr1:0X80000000368AA63A mmcra:0X00000000 event:0X02F3 mmcr0:0X00000000 mmcr1:0X80000000368AA63A mmcra:0X00000000 #Group 48 pm_L1_ldst, L1 load/store ref/miss event:0X0300 mmcr0:0X00000000 mmcr1:0X800000003230A8A0 mmcra:0X00000000 event:0X0301 mmcr0:0X00000000 mmcr1:0X800000003230A8A0 mmcra:0X00000000 event:0X0302 mmcr0:0X00000000 mmcr1:0X800000003230A8A0 mmcra:0X00000000 event:0X0303 mmcr0:0X00000000 mmcr1:0X800000003230A8A0 mmcra:0X00000000 #Group 49 pm_streams, Streams event:0X0310 mmcr0:0X00000000 mmcr1:0X48000000A0A284A4 mmcra:0X00000000 event:0X0311 mmcr0:0X00000000 mmcr1:0X48000000A0A284A4 mmcra:0X00000000 event:0X0312 mmcr0:0X00000000 mmcr1:0X48000000A0A284A4 mmcra:0X00000000 event:0X0313 mmcr0:0X00000000 mmcr1:0X48000000A0A284A4 mmcra:0X00000000 #Group 50 pm_flush, Flushes event:0X0320 mmcr0:0X00000000 mmcr1:0X0022000010CACCCA mmcra:0X00000000 event:0X0321 mmcr0:0X00000000 mmcr1:0X0022000010CACCCA mmcra:0X00000000 event:0X0322 mmcr0:0X00000000 mmcr1:0X0022000010CACCCA mmcra:0X00000000 event:0X0323 mmcr0:0X00000000 mmcr1:0X0022000010CACCCA mmcra:0X00000000 #Group 51 pm_prefetch, I cache Prefetches event:0X0330 mmcr0:0X00000000 mmcr1:0X400400008A8CAEC0 mmcra:0X00000000 event:0X0331 mmcr0:0X00000000 mmcr1:0X400400008A8CAEC0 mmcra:0X00000000 event:0X0332 mmcr0:0X00000000 mmcr1:0X400400008A8CAEC0 mmcra:0X00000000 event:0X0333 mmcr0:0X00000000 mmcr1:0X400400008A8CAEC0 mmcra:0X00000000 #Group 52 pm_stcx, STCX event:0X0340 mmcr0:0X00000000 mmcr1:0X00080000E6ECCECA mmcra:0X00000000 event:0X0341 mmcr0:0X00000000 mmcr1:0X00080000E6ECCECA mmcra:0X00000000 event:0X0342 mmcr0:0X00000000 mmcr1:0X00080000E6ECCECA mmcra:0X00000000 event:0X0343 mmcr0:0X00000000 mmcr1:0X00080000E6ECCECA mmcra:0X00000000 #Group 53 pm_larx, LARX event:0X0350 mmcr0:0X00000000 mmcr1:0X00080000EAE2C6CE mmcra:0X00000000 event:0X0351 mmcr0:0X00000000 mmcr1:0X00080000EAE2C6CE mmcra:0X00000000 event:0X0352 mmcr0:0X00000000 mmcr1:0X00080000EAE2C6CE mmcra:0X00000000 event:0X0353 mmcr0:0X00000000 mmcr1:0X00080000EAE2C6CE mmcra:0X00000000 #Group 54 pm_thread_cyc, Thread cycles event:0X0360 mmcr0:0X00000000 mmcr1:0X0000000016182604 mmcra:0X00000000 event:0X0361 mmcr0:0X00000000 mmcr1:0X0000000016182604 mmcra:0X00000000 event:0X0362 mmcr0:0X00000000 mmcr1:0X0000000016182604 mmcra:0X00000000 event:0X0363 mmcr0:0X00000000 mmcr1:0X0000000016182604 mmcra:0X00000000 #Group 55 pm_misc, Misc event:0X0370 mmcr0:0X00000000 mmcr1:0X0000000004161808 mmcra:0X00000001 event:0X0371 mmcr0:0X00000000 mmcr1:0X0000000004161808 mmcra:0X00000001 event:0X0372 mmcr0:0X00000000 mmcr1:0X0000000004161808 mmcra:0X00000001 event:0X0373 mmcr0:0X00000000 mmcr1:0X0000000004161808 mmcra:0X00000001 #Group 56 pm_misc2, Misc event:0X0380 mmcr0:0X00000000 mmcr1:0X40020000EEF8F8A0 mmcra:0X00000000 event:0X0381 mmcr0:0X00000000 mmcr1:0X40020000EEF8F8A0 mmcra:0X00000000 event:0X0382 mmcr0:0X00000000 mmcr1:0X40020000EEF8F8A0 mmcra:0X00000000 event:0X0383 mmcr0:0X00000000 mmcr1:0X40020000EEF8F8A0 mmcra:0X00000000 #Group 57 pm_misc3, Misc event:0X0390 mmcr0:0X00000000 mmcr1:0X0300000054A01E02 mmcra:0X00000000 event:0X0391 mmcr0:0X00000000 mmcr1:0X0300000054A01E02 mmcra:0X00000000 event:0X0392 mmcr0:0X00000000 mmcr1:0X0300000054A01E02 mmcra:0X00000000 event:0X0393 mmcr0:0X00000000 mmcr1:0X0300000054A01E02 mmcra:0X00000000 #Group 58 pm_tlb_slb, TLB and SLB events event:0X03A0 mmcr0:0X00000000 mmcr1:0X00980000E0E8E8E2 mmcra:0X00000000 event:0X03A1 mmcr0:0X00000000 mmcr1:0X00980000E0E8E8E2 mmcra:0X00000000 event:0X03A2 mmcr0:0X00000000 mmcr1:0X00980000E0E8E8E2 mmcra:0X00000000 event:0X03A3 mmcr0:0X00000000 mmcr1:0X00980000E0E8E8E2 mmcra:0X00000000 #Group 59 pm_slb_miss, SLB Misses event:0X03B0 mmcr0:0X00000000 mmcr1:0X00480001E0E8EE32 mmcra:0X00000000 event:0X03B1 mmcr0:0X00000000 mmcr1:0X00480001E0E8EE32 mmcra:0X00000000 event:0X03B2 mmcr0:0X00000000 mmcr1:0X00480001E0E8EE32 mmcra:0X00000000 event:0X03B3 mmcr0:0X00000000 mmcr1:0X00480001E0E8EE32 mmcra:0X00000000 #Group 60 pm_rejects, Reject events event:0X03C0 mmcr0:0X00000000 mmcr1:0XAA00000034303E30 mmcra:0X00000000 event:0X03C1 mmcr0:0X00000000 mmcr1:0XAA00000034303E30 mmcra:0X00000000 event:0X03C2 mmcr0:0X00000000 mmcr1:0XAA00000034303E30 mmcra:0X00000000 event:0X03C3 mmcr0:0X00000000 mmcr1:0XAA00000034303E30 mmcra:0X00000000 #Group 61 pm_rejects2, Reject events event:0X03D0 mmcr0:0X00000000 mmcr1:0X9A000000323830AC mmcra:0X00000000 event:0X03D1 mmcr0:0X00000000 mmcr1:0X9A000000323830AC mmcra:0X00000000 event:0X03D2 mmcr0:0X00000000 mmcr1:0X9A000000323830AC mmcra:0X00000000 event:0X03D3 mmcr0:0X00000000 mmcr1:0X9A000000323830AC mmcra:0X00000000 #Group 62 pm_rejects3, Reject events event:0X03E0 mmcr0:0X00000000 mmcr1:0XAA000000303E3234 mmcra:0X00000000 event:0X03E1 mmcr0:0X00000000 mmcr1:0XAA000000303E3234 mmcra:0X00000000 event:0X03E2 mmcr0:0X00000000 mmcr1:0XAA000000303E3234 mmcra:0X00000000 event:0X03E3 mmcr0:0X00000000 mmcr1:0XAA000000303E3234 mmcra:0X00000000 #Group 63 pm_rejects4, Unaligned store rejects event:0X03F0 mmcr0:0X00000000 mmcr1:0X900000003630A2AA mmcra:0X00000000 event:0X03F1 mmcr0:0X00000000 mmcr1:0X900000003630A2AA mmcra:0X00000000 event:0X03F2 mmcr0:0X00000000 mmcr1:0X900000003630A2AA mmcra:0X00000000 event:0X03F3 mmcr0:0X00000000 mmcr1:0X900000003630A2AA mmcra:0X00000000 #Group 64 pm_rejects5, Unaligned load rejects event:0X0400 mmcr0:0X00000000 mmcr1:0X900000003036A0A8 mmcra:0X00000000 event:0X0401 mmcr0:0X00000000 mmcr1:0X900000003036A0A8 mmcra:0X00000000 event:0X0402 mmcr0:0X00000000 mmcr1:0X900000003036A0A8 mmcra:0X00000000 event:0X0403 mmcr0:0X00000000 mmcr1:0X900000003036A0A8 mmcra:0X00000000 #Group 65 pm_rejects6, Set mispredictions rejects event:0X0410 mmcr0:0X00000000 mmcr1:0XA0000000848C341C mmcra:0X00000000 event:0X0411 mmcr0:0X00000000 mmcr1:0XA0000000848C341C mmcra:0X00000000 event:0X0412 mmcr0:0X00000000 mmcr1:0XA0000000848C341C mmcra:0X00000000 event:0X0413 mmcr0:0X00000000 mmcr1:0XA0000000848C341C mmcra:0X00000000 #Group 66 pm_rejects_unit, Unaligned reject events by unit event:0X0420 mmcr0:0X00000000 mmcr1:0X90000000808AA2A8 mmcra:0X00000000 event:0X0421 mmcr0:0X00000000 mmcr1:0X90000000808AA2A8 mmcra:0X00000000 event:0X0422 mmcr0:0X00000000 mmcr1:0X90000000808AA2A8 mmcra:0X00000000 event:0X0423 mmcr0:0X00000000 mmcr1:0X90000000808AA2A8 mmcra:0X00000000 #Group 67 pm_rejects_unit2, Reject events by unit event:0X0430 mmcr0:0X00000000 mmcr1:0XAA000000A6828E8A mmcra:0X00000000 event:0X0431 mmcr0:0X00000000 mmcr1:0XAA000000A6828E8A mmcra:0X00000000 event:0X0432 mmcr0:0X00000000 mmcr1:0XAA000000A6828E8A mmcra:0X00000000 event:0X0433 mmcr0:0X00000000 mmcr1:0XAA000000A6828E8A mmcra:0X00000000 #Group 68 pm_rejects_unit3, Reject events by unit event:0X0440 mmcr0:0X00000000 mmcr1:0X0A000000A4A08C88 mmcra:0X00000000 event:0X0441 mmcr0:0X00000000 mmcr1:0X0A000000A4A08C88 mmcra:0X00000000 event:0X0442 mmcr0:0X00000000 mmcr1:0X0A000000A4A08C88 mmcra:0X00000000 event:0X0443 mmcr0:0X00000000 mmcr1:0X0A000000A4A08C88 mmcra:0X00000000 #Group 69 pm_rejects_unit4, Reject events by unit event:0X0450 mmcr0:0X00000000 mmcr1:0XAA000000A2868AAE mmcra:0X00000000 event:0X0451 mmcr0:0X00000000 mmcr1:0XAA000000A2868AAE mmcra:0X00000000 event:0X0452 mmcr0:0X00000000 mmcr1:0XAA000000A2868AAE mmcra:0X00000000 event:0X0453 mmcr0:0X00000000 mmcr1:0XAA000000A2868AAE mmcra:0X00000000 #Group 70 pm_rejects_unit5, Reject events by unit event:0X0460 mmcr0:0X00000000 mmcr1:0X9900000086A6AE8E mmcra:0X00000000 event:0X0461 mmcr0:0X00000000 mmcr1:0X9900000086A6AE8E mmcra:0X00000000 event:0X0462 mmcr0:0X00000000 mmcr1:0X9900000086A6AE8E mmcra:0X00000000 event:0X0463 mmcr0:0X00000000 mmcr1:0X9900000086A6AE8E mmcra:0X00000000 #Group 71 pm_rejects_unit6, Reject events by unit event:0X0470 mmcr0:0X00000000 mmcr1:0XAA00000080A6A88E mmcra:0X00000000 event:0X0471 mmcr0:0X00000000 mmcr1:0XAA00000080A6A88E mmcra:0X00000000 event:0X0472 mmcr0:0X00000000 mmcr1:0XAA00000080A6A88E mmcra:0X00000000 event:0X0473 mmcr0:0X00000000 mmcr1:0XAA00000080A6A88E mmcra:0X00000000 #Group 72 pm_rejects_unit7, Reject events by unit event:0X0480 mmcr0:0X00000000 mmcr1:0XA900000082A6AA8E mmcra:0X00000000 event:0X0481 mmcr0:0X00000000 mmcr1:0XA900000082A6AA8E mmcra:0X00000000 event:0X0482 mmcr0:0X00000000 mmcr1:0XA900000082A6AA8E mmcra:0X00000000 event:0X0483 mmcr0:0X00000000 mmcr1:0XA900000082A6AA8E mmcra:0X00000000 #Group 73 pm_ldf, Floating Point loads event:0X0490 mmcr0:0X00000000 mmcr1:0X800000003832A4AC mmcra:0X00000000 event:0X0491 mmcr0:0X00000000 mmcr1:0X800000003832A4AC mmcra:0X00000000 event:0X0492 mmcr0:0X00000000 mmcr1:0X800000003832A4AC mmcra:0X00000000 event:0X0493 mmcr0:0X00000000 mmcr1:0X800000003832A4AC mmcra:0X00000000 #Group 74 pm_lsu_misc, LSU events event:0X04A0 mmcr0:0X00000000 mmcr1:0X08800000CACCEE8A mmcra:0X00000000 event:0X04A1 mmcr0:0X00000000 mmcr1:0X08800000CACCEE8A mmcra:0X00000000 event:0X04A2 mmcr0:0X00000000 mmcr1:0X08800000CACCEE8A mmcra:0X00000000 event:0X04A3 mmcr0:0X00000000 mmcr1:0X08800000CACCEE8A mmcra:0X00000000 #Group 75 pm_lsu_lmq, LSU LMQ events event:0X04B0 mmcr0:0X00000000 mmcr1:0X98000000AC1C1CA4 mmcra:0X00000000 event:0X04B1 mmcr0:0X00000000 mmcr1:0X98000000AC1C1CA4 mmcra:0X00000000 event:0X04B2 mmcr0:0X00000000 mmcr1:0X98000000AC1C1CA4 mmcra:0X00000000 event:0X04B3 mmcr0:0X00000000 mmcr1:0X98000000AC1C1CA4 mmcra:0X00000000 #Group 76 pm_lsu_flush_derat_miss, LSU flush and DERAT misses event:0X04C0 mmcr0:0X00000000 mmcr1:0X00200000FC0EECEE mmcra:0X00000000 event:0X04C1 mmcr0:0X00000000 mmcr1:0X00200000FC0EECEE mmcra:0X00000000 event:0X04C2 mmcr0:0X00000000 mmcr1:0X00200000FC0EECEE mmcra:0X00000000 event:0X04C3 mmcr0:0X00000000 mmcr1:0X00200000FC0EECEE mmcra:0X00000000 #Group 77 pm_lla, Look Load Ahead events event:0X04D0 mmcr0:0X00000000 mmcr1:0X33000000A2841208 mmcra:0X00000000 event:0X04D1 mmcr0:0X00000000 mmcr1:0X33000000A2841208 mmcra:0X00000000 event:0X04D2 mmcr0:0X00000000 mmcr1:0X33000000A2841208 mmcra:0X00000000 event:0X04D3 mmcr0:0X00000000 mmcr1:0X33000000A2841208 mmcra:0X00000000 #Group 78 pm_gct, GCT events event:0X04E0 mmcr0:0X00000000 mmcr1:0X404000000808A6E8 mmcra:0X00000000 event:0X04E1 mmcr0:0X00000000 mmcr1:0X404000000808A6E8 mmcra:0X00000000 event:0X04E2 mmcr0:0X00000000 mmcr1:0X404000000808A6E8 mmcra:0X00000000 event:0X04E3 mmcr0:0X00000000 mmcr1:0X404000000808A6E8 mmcra:0X00000000 #Group 79 pm_smt_priorities, Thread priority events event:0X04F0 mmcr0:0X00000000 mmcr1:0X0020000040404040 mmcra:0X00000000 event:0X04F1 mmcr0:0X00000000 mmcr1:0X0020000040404040 mmcra:0X00000000 event:0X04F2 mmcr0:0X00000000 mmcr1:0X0020000040404040 mmcra:0X00000000 event:0X04F3 mmcr0:0X00000000 mmcr1:0X0020000040404040 mmcra:0X00000000 #Group 80 pm_smt_priorities2, Thread priority events event:0X0500 mmcr0:0X00000000 mmcr1:0X0020000046464646 mmcra:0X00000000 event:0X0501 mmcr0:0X00000000 mmcr1:0X0020000046464646 mmcra:0X00000000 event:0X0502 mmcr0:0X00000000 mmcr1:0X0020000046464646 mmcra:0X00000000 event:0X0503 mmcr0:0X00000000 mmcr1:0X0020000046464646 mmcra:0X00000000 #Group 81 pm_smt_priorities3, Thread priority differences events event:0X0510 mmcr0:0X00000000 mmcr1:0X0002000040404040 mmcra:0X00000000 event:0X0511 mmcr0:0X00000000 mmcr1:0X0002000040404040 mmcra:0X00000000 event:0X0512 mmcr0:0X00000000 mmcr1:0X0002000040404040 mmcra:0X00000000 event:0X0513 mmcr0:0X00000000 mmcr1:0X0002000040404040 mmcra:0X00000000 #Group 82 pm_smt_priorities4, Thread priority differences events event:0X0520 mmcr0:0X00000000 mmcr1:0X03020000A6464646 mmcra:0X00000000 event:0X0521 mmcr0:0X00000000 mmcr1:0X03020000A6464646 mmcra:0X00000000 event:0X0522 mmcr0:0X00000000 mmcr1:0X03020000A6464646 mmcra:0X00000000 event:0X0523 mmcr0:0X00000000 mmcr1:0X03020000A6464646 mmcra:0X00000000 #Group 83 pm_fxu, FXU events event:0X0530 mmcr0:0X00000000 mmcr1:0X0000000050505050 mmcra:0X00000000 event:0X0531 mmcr0:0X00000000 mmcr1:0X0000000050505050 mmcra:0X00000000 event:0X0532 mmcr0:0X00000000 mmcr1:0X0000000050505050 mmcra:0X00000000 event:0X0533 mmcr0:0X00000000 mmcr1:0X0000000050505050 mmcra:0X00000000 #Group 84 pm_fxu2, FXU events event:0X0540 mmcr0:0X00000000 mmcr1:0X02040000AEE41616 mmcra:0X00000000 event:0X0541 mmcr0:0X00000000 mmcr1:0X02040000AEE41616 mmcra:0X00000000 event:0X0542 mmcr0:0X00000000 mmcr1:0X02040000AEE41616 mmcra:0X00000000 event:0X0543 mmcr0:0X00000000 mmcr1:0X02040000AEE41616 mmcra:0X00000000 #Group 85 pm_vmx, VMX events event:0X0550 mmcr0:0X00000000 mmcr1:0X700000008480A2A6 mmcra:0X00000000 event:0X0551 mmcr0:0X00000000 mmcr1:0X700000008480A2A6 mmcra:0X00000000 event:0X0552 mmcr0:0X00000000 mmcr1:0X700000008480A2A6 mmcra:0X00000000 event:0X0553 mmcr0:0X00000000 mmcr1:0X700000008480A2A6 mmcra:0X00000000 #Group 86 pm_vmx2, VMX events event:0X0560 mmcr0:0X00000000 mmcr1:0X600000008088A2AA mmcra:0X00000000 event:0X0561 mmcr0:0X00000000 mmcr1:0X600000008088A2AA mmcra:0X00000000 event:0X0562 mmcr0:0X00000000 mmcr1:0X600000008088A2AA mmcra:0X00000000 event:0X0563 mmcr0:0X00000000 mmcr1:0X600000008088A2AA mmcra:0X00000000 #Group 87 pm_vmx3, VMX events event:0X0570 mmcr0:0X00000000 mmcr1:0X600000008284AAAC mmcra:0X00000000 event:0X0571 mmcr0:0X00000000 mmcr1:0X600000008284AAAC mmcra:0X00000000 event:0X0572 mmcr0:0X00000000 mmcr1:0X600000008284AAAC mmcra:0X00000000 event:0X0573 mmcr0:0X00000000 mmcr1:0X600000008284AAAC mmcra:0X00000000 #Group 88 pm_vmx4, VMX events event:0X0580 mmcr0:0X00000000 mmcr1:0XB0000000828EA6A0 mmcra:0X00000000 event:0X0581 mmcr0:0X00000000 mmcr1:0XB0000000828EA6A0 mmcra:0X00000000 event:0X0582 mmcr0:0X00000000 mmcr1:0XB0000000828EA6A0 mmcra:0X00000000 event:0X0583 mmcr0:0X00000000 mmcr1:0XB0000000828EA6A0 mmcra:0X00000000 #Group 89 pm_vmx5, VMX events event:0X0590 mmcr0:0X00000000 mmcr1:0XB00000008084ACA2 mmcra:0X00000000 event:0X0591 mmcr0:0X00000000 mmcr1:0XB00000008084ACA2 mmcra:0X00000000 event:0X0592 mmcr0:0X00000000 mmcr1:0XB00000008084ACA2 mmcra:0X00000000 event:0X0593 mmcr0:0X00000000 mmcr1:0XB00000008084ACA2 mmcra:0X00000000 #Group 90 pm_dfu, DFU events event:0X05A0 mmcr0:0X00000000 mmcr1:0XE00000008C88A2AE mmcra:0X00000000 event:0X05A1 mmcr0:0X00000000 mmcr1:0XE00000008C88A2AE mmcra:0X00000000 event:0X05A2 mmcr0:0X00000000 mmcr1:0XE00000008C88A2AE mmcra:0X00000000 event:0X05A3 mmcr0:0X00000000 mmcr1:0XE00000008C88A2AE mmcra:0X00000000 #Group 91 pm_dfu2, DFU events event:0X05B0 mmcr0:0X00000000 mmcr1:0XE00000008A84A0A6 mmcra:0X00000000 event:0X05B1 mmcr0:0X00000000 mmcr1:0XE00000008A84A0A6 mmcra:0X00000000 event:0X05B2 mmcr0:0X00000000 mmcr1:0XE00000008A84A0A6 mmcra:0X00000000 event:0X05B3 mmcr0:0X00000000 mmcr1:0XE00000008A84A0A6 mmcra:0X00000000 #Group 92 pm_fab, Fabric events event:0X05C0 mmcr0:0X00000000 mmcr1:0X500020003030A4AC mmcra:0X00000000 event:0X05C1 mmcr0:0X00000000 mmcr1:0X500020003030A4AC mmcra:0X00000000 event:0X05C2 mmcr0:0X00000000 mmcr1:0X500020003030A4AC mmcra:0X00000000 event:0X05C3 mmcr0:0X00000000 mmcr1:0X500020003030A4AC mmcra:0X00000000 #Group 93 pm_fab2, Fabric events event:0X05D0 mmcr0:0X00000000 mmcr1:0X50002000888AA2A0 mmcra:0X00000000 event:0X05D1 mmcr0:0X00000000 mmcr1:0X50002000888AA2A0 mmcra:0X00000000 event:0X05D2 mmcr0:0X00000000 mmcr1:0X50002000888AA2A0 mmcra:0X00000000 event:0X05D3 mmcr0:0X00000000 mmcr1:0X50002000888AA2A0 mmcra:0X00000000 #Group 94 pm_fab3, Fabric events event:0X05E0 mmcr0:0X00000000 mmcr1:0X500020003030AEA6 mmcra:0X00000000 event:0X05E1 mmcr0:0X00000000 mmcr1:0X500020003030AEA6 mmcra:0X00000000 event:0X05E2 mmcr0:0X00000000 mmcr1:0X500020003030AEA6 mmcra:0X00000000 event:0X05E3 mmcr0:0X00000000 mmcr1:0X500020003030AEA6 mmcra:0X00000000 #Group 95 pm_mem_dblpump, Double pump event:0X05F0 mmcr0:0X00000000 mmcr1:0X5000400030303434 mmcra:0X00000000 event:0X05F1 mmcr0:0X00000000 mmcr1:0X5000400030303434 mmcra:0X00000000 event:0X05F2 mmcr0:0X00000000 mmcr1:0X5000400030303434 mmcra:0X00000000 event:0X05F3 mmcr0:0X00000000 mmcr1:0X5000400030303434 mmcra:0X00000000 #Group 96 pm_mem0_dblpump, MCS0 Double pump event:0X0600 mmcr0:0X00000000 mmcr1:0X500040008082A4A6 mmcra:0X00000000 event:0X0601 mmcr0:0X00000000 mmcr1:0X500040008082A4A6 mmcra:0X00000000 event:0X0602 mmcr0:0X00000000 mmcr1:0X500040008082A4A6 mmcra:0X00000000 event:0X0603 mmcr0:0X00000000 mmcr1:0X500040008082A4A6 mmcra:0X00000000 #Group 97 pm_mem1_dblpump, MCS1 Double pump event:0X0610 mmcr0:0X00000000 mmcr1:0X50004000888AACAE mmcra:0X00000000 event:0X0611 mmcr0:0X00000000 mmcr1:0X50004000888AACAE mmcra:0X00000000 event:0X0612 mmcr0:0X00000000 mmcr1:0X50004000888AACAE mmcra:0X00000000 event:0X0613 mmcr0:0X00000000 mmcr1:0X50004000888AACAE mmcra:0X00000000 #Group 98 pm_gxo, GX outbound event:0X0620 mmcr0:0X00000000 mmcr1:0X500060008082A4A6 mmcra:0X00000000 event:0X0621 mmcr0:0X00000000 mmcr1:0X500060008082A4A6 mmcra:0X00000000 event:0X0622 mmcr0:0X00000000 mmcr1:0X500060008082A4A6 mmcra:0X00000000 event:0X0623 mmcr0:0X00000000 mmcr1:0X500060008082A4A6 mmcra:0X00000000 #Group 99 pm_gxi, GX inbound event:0X0630 mmcr0:0X00000000 mmcr1:0X500060008688AAA0 mmcra:0X00000000 event:0X0631 mmcr0:0X00000000 mmcr1:0X500060008688AAA0 mmcra:0X00000000 event:0X0632 mmcr0:0X00000000 mmcr1:0X500060008688AAA0 mmcra:0X00000000 event:0X0633 mmcr0:0X00000000 mmcr1:0X500060008688AAA0 mmcra:0X00000000 #Group 100 pm_gx_dma, DMA events event:0X0640 mmcr0:0X00000000 mmcr1:0X500060008086ACAE mmcra:0X00000000 event:0X0641 mmcr0:0X00000000 mmcr1:0X500060008086ACAE mmcra:0X00000000 event:0X0642 mmcr0:0X00000000 mmcr1:0X500060008086ACAE mmcra:0X00000000 event:0X0643 mmcr0:0X00000000 mmcr1:0X500060008086ACAE mmcra:0X00000000 #Group 101 pm_L1_misc, L1 misc events event:0X0650 mmcr0:0X00000000 mmcr1:0X4004000082E2A80A mmcra:0X00000000 event:0X0651 mmcr0:0X00000000 mmcr1:0X4004000082E2A80A mmcra:0X00000000 event:0X0652 mmcr0:0X00000000 mmcr1:0X4004000082E2A80A mmcra:0X00000000 event:0X0653 mmcr0:0X00000000 mmcr1:0X4004000082E2A80A mmcra:0X00000000 #Group 102 pm_L2_data, L2 load and store data event:0X0660 mmcr0:0X00000000 mmcr1:0X5000800030303434 mmcra:0X00000000 event:0X0661 mmcr0:0X00000000 mmcr1:0X5000800030303434 mmcra:0X00000000 event:0X0662 mmcr0:0X00000000 mmcr1:0X5000800030303434 mmcra:0X00000000 event:0X0663 mmcr0:0X00000000 mmcr1:0X5000800030303434 mmcra:0X00000000 #Group 103 pm_L2_ld_inst, L2 Load instructions event:0X0670 mmcr0:0X00000000 mmcr1:0X5800A00030303486 mmcra:0X00000000 event:0X0671 mmcr0:0X00000000 mmcr1:0X5800A00030303486 mmcra:0X00000000 event:0X0672 mmcr0:0X00000000 mmcr1:0X5800A00030303486 mmcra:0X00000000 event:0X0673 mmcr0:0X00000000 mmcr1:0X5800A00030303486 mmcra:0X00000000 #Group 104 pm_L2_castout_invalidate, L2 castout and invalidate events event:0X0680 mmcr0:0X00000000 mmcr1:0X5000C00030303434 mmcra:0X00000000 event:0X0681 mmcr0:0X00000000 mmcr1:0X5000C00030303434 mmcra:0X00000000 event:0X0682 mmcr0:0X00000000 mmcr1:0X5000C00030303434 mmcra:0X00000000 event:0X0683 mmcr0:0X00000000 mmcr1:0X5000C00030303434 mmcra:0X00000000 #Group 105 pm_L2_ldst_reqhit, L2 load and store requests and hits event:0X0690 mmcr0:0X00000000 mmcr1:0X5000E00030303434 mmcra:0X00000000 event:0X0691 mmcr0:0X00000000 mmcr1:0X5000E00030303434 mmcra:0X00000000 event:0X0692 mmcr0:0X00000000 mmcr1:0X5000E00030303434 mmcra:0X00000000 event:0X0693 mmcr0:0X00000000 mmcr1:0X5000E00030303434 mmcra:0X00000000 #Group 106 pm_L2_ld_data_slice, L2 data loads by slice event:0X06A0 mmcr0:0X00000000 mmcr1:0X500080008082A8AA mmcra:0X00000000 event:0X06A1 mmcr0:0X00000000 mmcr1:0X500080008082A8AA mmcra:0X00000000 event:0X06A2 mmcr0:0X00000000 mmcr1:0X500080008082A8AA mmcra:0X00000000 event:0X06A3 mmcr0:0X00000000 mmcr1:0X500080008082A8AA mmcra:0X00000000 #Group 107 pm_L2_ld_inst_slice, L2 instruction loads by slice event:0X06B0 mmcr0:0X00000000 mmcr1:0X5000A0008082A8AA mmcra:0X00000000 event:0X06B1 mmcr0:0X00000000 mmcr1:0X5000A0008082A8AA mmcra:0X00000000 event:0X06B2 mmcr0:0X00000000 mmcr1:0X5000A0008082A8AA mmcra:0X00000000 event:0X06B3 mmcr0:0X00000000 mmcr1:0X5000A0008082A8AA mmcra:0X00000000 #Group 108 pm_L2_st_slice, L2 slice stores by slice event:0X06C0 mmcr0:0X00000000 mmcr1:0X500080008486ACAE mmcra:0X00000000 event:0X06C1 mmcr0:0X00000000 mmcr1:0X500080008486ACAE mmcra:0X00000000 event:0X06C2 mmcr0:0X00000000 mmcr1:0X500080008486ACAE mmcra:0X00000000 event:0X06C3 mmcr0:0X00000000 mmcr1:0X500080008486ACAE mmcra:0X00000000 #Group 109 pm_L2miss_slice, L2 misses by slice event:0X06D0 mmcr0:0X00000000 mmcr1:0X5000A000843256AC mmcra:0X00000000 event:0X06D1 mmcr0:0X00000000 mmcr1:0X5000A000843256AC mmcra:0X00000000 event:0X06D2 mmcr0:0X00000000 mmcr1:0X5000A000843256AC mmcra:0X00000000 event:0X06D3 mmcr0:0X00000000 mmcr1:0X5000A000843256AC mmcra:0X00000000 #Group 110 pm_L2_castout_slice, L2 castouts by slice event:0X06E0 mmcr0:0X00000000 mmcr1:0X5000C0008082A8AA mmcra:0X00000000 event:0X06E1 mmcr0:0X00000000 mmcr1:0X5000C0008082A8AA mmcra:0X00000000 event:0X06E2 mmcr0:0X00000000 mmcr1:0X5000C0008082A8AA mmcra:0X00000000 event:0X06E3 mmcr0:0X00000000 mmcr1:0X5000C0008082A8AA mmcra:0X00000000 #Group 111 pm_L2_invalidate_slice, L2 invalidate by slice event:0X06F0 mmcr0:0X00000000 mmcr1:0X5000C0008486ACAE mmcra:0X00000000 event:0X06F1 mmcr0:0X00000000 mmcr1:0X5000C0008486ACAE mmcra:0X00000000 event:0X06F2 mmcr0:0X00000000 mmcr1:0X5000C0008486ACAE mmcra:0X00000000 event:0X06F3 mmcr0:0X00000000 mmcr1:0X5000C0008486ACAE mmcra:0X00000000 #Group 112 pm_L2_ld_reqhit_slice, L2 load requests and hist by slice event:0X0700 mmcr0:0X00000000 mmcr1:0X5000E0008082A8AA mmcra:0X00000000 event:0X0701 mmcr0:0X00000000 mmcr1:0X5000E0008082A8AA mmcra:0X00000000 event:0X0702 mmcr0:0X00000000 mmcr1:0X5000E0008082A8AA mmcra:0X00000000 event:0X0703 mmcr0:0X00000000 mmcr1:0X5000E0008082A8AA mmcra:0X00000000 #Group 113 pm_L2_st_reqhit_slice, L2 store requests and hist by slice event:0X0710 mmcr0:0X00000000 mmcr1:0X5000E0008486ACAE mmcra:0X00000000 event:0X0711 mmcr0:0X00000000 mmcr1:0X5000E0008486ACAE mmcra:0X00000000 event:0X0712 mmcr0:0X00000000 mmcr1:0X5000E0008486ACAE mmcra:0X00000000 event:0X0713 mmcr0:0X00000000 mmcr1:0X5000E0008486ACAE mmcra:0X00000000 #Group 114 pm_L2_redir_pref, L2 redirect and prefetch event:0X0720 mmcr0:0X00000000 mmcr1:0X08400000CACC8886 mmcra:0X00000000 event:0X0721 mmcr0:0X00000000 mmcr1:0X08400000CACC8886 mmcra:0X00000000 event:0X0722 mmcr0:0X00000000 mmcr1:0X08400000CACC8886 mmcra:0X00000000 event:0X0723 mmcr0:0X00000000 mmcr1:0X08400000CACC8886 mmcra:0X00000000 #Group 115 pm_L3_SliceA, L3 slice A events event:0X0730 mmcr0:0X00000000 mmcr1:0X50000000303058A4 mmcra:0X00000000 event:0X0731 mmcr0:0X00000000 mmcr1:0X50000000303058A4 mmcra:0X00000000 event:0X0732 mmcr0:0X00000000 mmcr1:0X50000000303058A4 mmcra:0X00000000 event:0X0733 mmcr0:0X00000000 mmcr1:0X50000000303058A4 mmcra:0X00000000 #Group 116 pm_L3_SliceB, L3 slice B events event:0X0740 mmcr0:0X00000000 mmcr1:0X50000000888A58AC mmcra:0X00000000 event:0X0741 mmcr0:0X00000000 mmcr1:0X50000000888A58AC mmcra:0X00000000 event:0X0742 mmcr0:0X00000000 mmcr1:0X50000000888A58AC mmcra:0X00000000 event:0X0743 mmcr0:0X00000000 mmcr1:0X50000000888A58AC mmcra:0X00000000 #Group 117 pm_fpu_issue, FPU issue events event:0X0750 mmcr0:0X00000000 mmcr1:0X00300000C6C8EAE4 mmcra:0X00000000 event:0X0751 mmcr0:0X00000000 mmcr1:0X00300000C6C8EAE4 mmcra:0X00000000 event:0X0752 mmcr0:0X00000000 mmcr1:0X00300000C6C8EAE4 mmcra:0X00000000 event:0X0753 mmcr0:0X00000000 mmcr1:0X00300000C6C8EAE4 mmcra:0X00000000 #Group 118 pm_fpu_issue2, FPU issue events event:0X0760 mmcr0:0X00000000 mmcr1:0X00300000C0C2ECEE mmcra:0X00000000 event:0X0761 mmcr0:0X00000000 mmcr1:0X00300000C0C2ECEE mmcra:0X00000000 event:0X0762 mmcr0:0X00000000 mmcr1:0X00300000C0C2ECEE mmcra:0X00000000 event:0X0763 mmcr0:0X00000000 mmcr1:0X00300000C0C2ECEE mmcra:0X00000000 #Group 119 pm_fpu_issue3, FPU issue events event:0X0770 mmcr0:0X00000000 mmcr1:0X00330000E0E2ECEE mmcra:0X00000000 event:0X0771 mmcr0:0X00000000 mmcr1:0X00330000E0E2ECEE mmcra:0X00000000 event:0X0772 mmcr0:0X00000000 mmcr1:0X00330000E0E2ECEE mmcra:0X00000000 event:0X0773 mmcr0:0X00000000 mmcr1:0X00330000E0E2ECEE mmcra:0X00000000 #Group 120 pm_fpu0_flop, FPU0 flop events event:0X0780 mmcr0:0X00000000 mmcr1:0XCC0000008082A484 mmcra:0X00000000 event:0X0781 mmcr0:0X00000000 mmcr1:0XCC0000008082A484 mmcra:0X00000000 event:0X0782 mmcr0:0X00000000 mmcr1:0XCC0000008082A484 mmcra:0X00000000 event:0X0783 mmcr0:0X00000000 mmcr1:0XCC0000008082A484 mmcra:0X00000000 #Group 121 pm_fpu0_misc, FPU0 events event:0X0790 mmcr0:0X00000000 mmcr1:0XCC00000086A08286 mmcra:0X00000000 event:0X0791 mmcr0:0X00000000 mmcr1:0XCC00000086A08286 mmcra:0X00000000 event:0X0792 mmcr0:0X00000000 mmcr1:0XCC00000086A08286 mmcra:0X00000000 event:0X0793 mmcr0:0X00000000 mmcr1:0XCC00000086A08286 mmcra:0X00000000 #Group 122 pm_fpu0_misc2, FPU0 events event:0X07A0 mmcr0:0X00000000 mmcr1:0XDD00000080A6A4A6 mmcra:0X00000000 event:0X07A1 mmcr0:0X00000000 mmcr1:0XDD00000080A6A4A6 mmcra:0X00000000 event:0X07A2 mmcr0:0X00000000 mmcr1:0XDD00000080A6A4A6 mmcra:0X00000000 event:0X07A3 mmcr0:0X00000000 mmcr1:0XDD00000080A6A4A6 mmcra:0X00000000 #Group 123 pm_fpu0_misc3, FPU0 events event:0X07B0 mmcr0:0X00000000 mmcr1:0X0D000000A0A28486 mmcra:0X00000000 event:0X07B1 mmcr0:0X00000000 mmcr1:0X0D000000A0A28486 mmcra:0X00000000 event:0X07B2 mmcr0:0X00000000 mmcr1:0X0D000000A0A28486 mmcra:0X00000000 event:0X07B3 mmcr0:0X00000000 mmcr1:0X0D000000A0A28486 mmcra:0X00000000 #Group 124 pm_fpu1_flop, FPU1 flop events event:0X07C0 mmcr0:0X00000000 mmcr1:0XCC000000888AAC8C mmcra:0X00000000 event:0X07C1 mmcr0:0X00000000 mmcr1:0XCC000000888AAC8C mmcra:0X00000000 event:0X07C2 mmcr0:0X00000000 mmcr1:0XCC000000888AAC8C mmcra:0X00000000 event:0X07C3 mmcr0:0X00000000 mmcr1:0XCC000000888AAC8C mmcra:0X00000000 #Group 125 pm_fpu1_misc, FPU1 events event:0X07D0 mmcr0:0X00000000 mmcr1:0XCC0000008EA88A8E mmcra:0X00000000 event:0X07D1 mmcr0:0X00000000 mmcr1:0XCC0000008EA88A8E mmcra:0X00000000 event:0X07D2 mmcr0:0X00000000 mmcr1:0XCC0000008EA88A8E mmcra:0X00000000 event:0X07D3 mmcr0:0X00000000 mmcr1:0XCC0000008EA88A8E mmcra:0X00000000 #Group 126 pm_fpu1_misc2, FPU1 events event:0X07E0 mmcr0:0X00000000 mmcr1:0XDD00000088AEACAE mmcra:0X00000000 event:0X07E1 mmcr0:0X00000000 mmcr1:0XDD00000088AEACAE mmcra:0X00000000 event:0X07E2 mmcr0:0X00000000 mmcr1:0XDD00000088AEACAE mmcra:0X00000000 event:0X07E3 mmcr0:0X00000000 mmcr1:0XDD00000088AEACAE mmcra:0X00000000 #Group 127 pm_fpu1_misc3, FPU1 events event:0X07F0 mmcr0:0X00000000 mmcr1:0X0D000000A8AA8C8E mmcra:0X00000000 event:0X07F1 mmcr0:0X00000000 mmcr1:0X0D000000A8AA8C8E mmcra:0X00000000 event:0X07F2 mmcr0:0X00000000 mmcr1:0X0D000000A8AA8C8E mmcra:0X00000000 event:0X07F3 mmcr0:0X00000000 mmcr1:0X0D000000A8AA8C8E mmcra:0X00000000 #Group 128 pm_fpu_flop, FPU flop events event:0X0800 mmcr0:0X00000000 mmcr1:0XC000000030303434 mmcra:0X00000000 event:0X0801 mmcr0:0X00000000 mmcr1:0XC000000030303434 mmcra:0X00000000 event:0X0802 mmcr0:0X00000000 mmcr1:0XC000000030303434 mmcra:0X00000000 event:0X0803 mmcr0:0X00000000 mmcr1:0XC000000030303434 mmcra:0X00000000 #Group 129 pm_fpu_misc, FPU events event:0X0810 mmcr0:0X00000000 mmcr1:0XDD00000030343434 mmcra:0X00000000 event:0X0811 mmcr0:0X00000000 mmcr1:0XDD00000030343434 mmcra:0X00000000 event:0X0812 mmcr0:0X00000000 mmcr1:0XDD00000030343434 mmcra:0X00000000 event:0X0813 mmcr0:0X00000000 mmcr1:0XDD00000030343434 mmcra:0X00000000 #Group 130 pm_fpu_misc2, FPU events event:0X0820 mmcr0:0X00000000 mmcr1:0X0C00000034343030 mmcra:0X00000000 event:0X0821 mmcr0:0X00000000 mmcr1:0X0C00000034343030 mmcra:0X00000000 event:0X0822 mmcr0:0X00000000 mmcr1:0X0C00000034343030 mmcra:0X00000000 event:0X0823 mmcr0:0X00000000 mmcr1:0X0C00000034343030 mmcra:0X00000000 #Group 131 pm_fpu_misc3, FPU events event:0X0830 mmcr0:0X00000000 mmcr1:0X0D00000034343030 mmcra:0X00000000 event:0X0831 mmcr0:0X00000000 mmcr1:0X0D00000034343030 mmcra:0X00000000 event:0X0832 mmcr0:0X00000000 mmcr1:0X0D00000034343030 mmcra:0X00000000 event:0X0833 mmcr0:0X00000000 mmcr1:0X0D00000034343030 mmcra:0X00000000 #Group 132 pm_purr, PURR events event:0X0840 mmcr0:0X00000000 mmcr1:0X000000000EF41E02 mmcra:0X00000000 event:0X0841 mmcr0:0X00000000 mmcr1:0X000000000EF41E02 mmcra:0X00000000 event:0X0842 mmcr0:0X00000000 mmcr1:0X000000000EF41E02 mmcra:0X00000000 event:0X0843 mmcr0:0X00000000 mmcr1:0X000000000EF41E02 mmcra:0X00000000 #Group 133 pm_suspend, SUSPENDED events event:0X0850 mmcr0:0X00000000 mmcr1:0X00900000001EEC02 mmcra:0X00000000 event:0X0851 mmcr0:0X00000000 mmcr1:0X00900000001EEC02 mmcra:0X00000000 event:0X0852 mmcr0:0X00000000 mmcr1:0X00900000001EEC02 mmcra:0X00000000 event:0X0853 mmcr0:0X00000000 mmcr1:0X00900000001EEC02 mmcra:0X00000000 #Group 134 pm_dcache, D cache event:0X0860 mmcr0:0X00000000 mmcr1:0X000000000C0E0C06 mmcra:0X00000000 event:0X0861 mmcr0:0X00000000 mmcr1:0X000000000C0E0C06 mmcra:0X00000000 event:0X0862 mmcr0:0X00000000 mmcr1:0X000000000C0E0C06 mmcra:0X00000000 event:0X0863 mmcr0:0X00000000 mmcr1:0X000000000C0E0C06 mmcra:0X00000000 #Group 135 pm_derat_miss, DERAT miss event:0X0870 mmcr0:0X00000000 mmcr1:0X0090000F40404040 mmcra:0X00000000 event:0X0871 mmcr0:0X00000000 mmcr1:0X0090000F40404040 mmcra:0X00000000 event:0X0872 mmcr0:0X00000000 mmcr1:0X0090000F40404040 mmcra:0X00000000 event:0X0873 mmcr0:0X00000000 mmcr1:0X0090000F40404040 mmcra:0X00000000 #Group 136 pm_derat_ref, DERAT ref event:0X0880 mmcr0:0X00000000 mmcr1:0X0080000F40404040 mmcra:0X00000000 event:0X0881 mmcr0:0X00000000 mmcr1:0X0080000F40404040 mmcra:0X00000000 event:0X0882 mmcr0:0X00000000 mmcr1:0X0080000F40404040 mmcra:0X00000000 event:0X0883 mmcr0:0X00000000 mmcr1:0X0080000F40404040 mmcra:0X00000000 #Group 137 pm_ierat_miss, IERAT miss event:0X0890 mmcr0:0X00000000 mmcr1:0X0090000F46464646 mmcra:0X00000000 event:0X0891 mmcr0:0X00000000 mmcr1:0X0090000F46464646 mmcra:0X00000000 event:0X0892 mmcr0:0X00000000 mmcr1:0X0090000F46464646 mmcra:0X00000000 event:0X0893 mmcr0:0X00000000 mmcr1:0X0090000F46464646 mmcra:0X00000000 #Group 138 pm_mrk_br, Marked Branch events event:0X08A0 mmcr0:0X00000000 mmcr1:0X0000000052565202 mmcra:0X00000001 event:0X08A1 mmcr0:0X00000000 mmcr1:0X0000000052565202 mmcra:0X00000001 event:0X08A2 mmcr0:0X00000000 mmcr1:0X0000000052565202 mmcra:0X00000001 event:0X08A3 mmcr0:0X00000000 mmcr1:0X0000000052565202 mmcra:0X00000001 #Group 139 pm_mrk_dsource, Marked data sources event:0X08B0 mmcr0:0X00000000 mmcr1:0X00000000024A4C4C mmcra:0X00000001 event:0X08B1 mmcr0:0X00000000 mmcr1:0X00000000024A4C4C mmcra:0X00000001 event:0X08B2 mmcr0:0X00000000 mmcr1:0X00000000024A4C4C mmcra:0X00000001 event:0X08B3 mmcr0:0X00000000 mmcr1:0X00000000024A4C4C mmcra:0X00000001 #Group 140 pm_mrk_dsource2, Marked data sources event:0X08C0 mmcr0:0X00000000 mmcr1:0X0000000048484E02 mmcra:0X00000001 event:0X08C1 mmcr0:0X00000000 mmcr1:0X0000000048484E02 mmcra:0X00000001 event:0X08C2 mmcr0:0X00000000 mmcr1:0X0000000048484E02 mmcra:0X00000001 event:0X08C3 mmcr0:0X00000000 mmcr1:0X0000000048484E02 mmcra:0X00000001 #Group 141 pm_mrk_dsource3, Marked data sources event:0X08D0 mmcr0:0X00000000 mmcr1:0X000000002802484E mmcra:0X00000001 event:0X08D1 mmcr0:0X00000000 mmcr1:0X000000002802484E mmcra:0X00000001 event:0X08D2 mmcr0:0X00000000 mmcr1:0X000000002802484E mmcra:0X00000001 event:0X08D3 mmcr0:0X00000000 mmcr1:0X000000002802484E mmcra:0X00000001 #Group 142 pm_mrk_dsource4, Marked data sources event:0X08E0 mmcr0:0X00000000 mmcr1:0X000000004E4E2802 mmcra:0X00000001 event:0X08E1 mmcr0:0X00000000 mmcr1:0X000000004E4E2802 mmcra:0X00000001 event:0X08E2 mmcr0:0X00000000 mmcr1:0X000000004E4E2802 mmcra:0X00000001 event:0X08E3 mmcr0:0X00000000 mmcr1:0X000000004E4E2802 mmcra:0X00000001 #Group 143 pm_mrk_dsource5, Marked data sources event:0X08F0 mmcr0:0X00000000 mmcr1:0X000000004A4C024A mmcra:0X00000001 event:0X08F1 mmcr0:0X00000000 mmcr1:0X000000004A4C024A mmcra:0X00000001 event:0X08F2 mmcr0:0X00000000 mmcr1:0X000000004A4C024A mmcra:0X00000001 event:0X08F3 mmcr0:0X00000000 mmcr1:0X000000004A4C024A mmcra:0X00000001 #Group 144 pm_mrk_dsource6, Marked data sources event:0X0900 mmcr0:0X00000000 mmcr1:0X000000004C4C4A02 mmcra:0X00000001 event:0X0901 mmcr0:0X00000000 mmcr1:0X000000004C4C4A02 mmcra:0X00000001 event:0X0902 mmcr0:0X00000000 mmcr1:0X000000004C4C4A02 mmcra:0X00000001 event:0X0903 mmcr0:0X00000000 mmcr1:0X000000004C4C4A02 mmcra:0X00000001 #Group 145 pm_mrk_rejects, Marked rejects event:0X0910 mmcr0:0X00000000 mmcr1:0X0009000D34340230 mmcra:0X00000001 event:0X0911 mmcr0:0X00000000 mmcr1:0X0009000D34340230 mmcra:0X00000001 event:0X0912 mmcr0:0X00000000 mmcr1:0X0009000D34340230 mmcra:0X00000001 event:0X0913 mmcr0:0X00000000 mmcr1:0X0009000D34340230 mmcra:0X00000001 #Group 146 pm_mrk_rejects2, Marked rejects LSU0 event:0X0920 mmcr0:0X00000000 mmcr1:0X00090000E6E0C202 mmcra:0X00000001 event:0X0921 mmcr0:0X00000000 mmcr1:0X00090000E6E0C202 mmcra:0X00000001 event:0X0922 mmcr0:0X00000000 mmcr1:0X00090000E6E0C202 mmcra:0X00000001 event:0X0923 mmcr0:0X00000000 mmcr1:0X00090000E6E0C202 mmcra:0X00000001 #Group 147 pm_mrk_rejects3, Marked rejects LSU1 event:0X0930 mmcr0:0X00000000 mmcr1:0X00090000EEE8CA02 mmcra:0X00000001 event:0X0931 mmcr0:0X00000000 mmcr1:0X00090000EEE8CA02 mmcra:0X00000001 event:0X0932 mmcr0:0X00000000 mmcr1:0X00090000EEE8CA02 mmcra:0X00000001 event:0X0933 mmcr0:0X00000000 mmcr1:0X00090000EEE8CA02 mmcra:0X00000001 #Group 148 pm_mrk_inst, Marked instruction events event:0X0940 mmcr0:0X00000000 mmcr1:0X000000001C100A02 mmcra:0X00000001 event:0X0941 mmcr0:0X00000000 mmcr1:0X000000001C100A02 mmcra:0X00000001 event:0X0942 mmcr0:0X00000000 mmcr1:0X000000001C100A02 mmcra:0X00000001 event:0X0943 mmcr0:0X00000000 mmcr1:0X000000001C100A02 mmcra:0X00000001 #Group 149 pm_mrk_fpu_fin, Marked Floating Point instructions finished event:0X0950 mmcr0:0X00000000 mmcr1:0XD0000000828A1A02 mmcra:0X00000001 event:0X0951 mmcr0:0X00000000 mmcr1:0XD0000000828A1A02 mmcra:0X00000001 event:0X0952 mmcr0:0X00000000 mmcr1:0XD0000000828A1A02 mmcra:0X00000001 event:0X0953 mmcr0:0X00000000 mmcr1:0XD0000000828A1A02 mmcra:0X00000001 #Group 150 pm_mrk_misc, Marked misc events event:0X0960 mmcr0:0X00000000 mmcr1:0X00090008341A0802 mmcra:0X00000001 event:0X0961 mmcr0:0X00000000 mmcr1:0X00090008341A0802 mmcra:0X00000001 event:0X0962 mmcr0:0X00000000 mmcr1:0X00090008341A0802 mmcra:0X00000001 event:0X0963 mmcr0:0X00000000 mmcr1:0X00090008341A0802 mmcra:0X00000001 #Group 151 pm_mrk_misc2, Marked misc events event:0X0970 mmcr0:0X00000000 mmcr1:0X00080000E40A023E mmcra:0X00000001 event:0X0971 mmcr0:0X00000000 mmcr1:0X00080000E40A023E mmcra:0X00000001 event:0X0972 mmcr0:0X00000000 mmcr1:0X00080000E40A023E mmcra:0X00000001 event:0X0973 mmcr0:0X00000000 mmcr1:0X00080000E40A023E mmcra:0X00000001 #Group 152 pm_mrk_misc3, Marked misc events event:0X0980 mmcr0:0X00000000 mmcr1:0XB009000088E40212 mmcra:0X00000001 event:0X0981 mmcr0:0X00000000 mmcr1:0XB009000088E40212 mmcra:0X00000001 event:0X0982 mmcr0:0X00000000 mmcr1:0XB009000088E40212 mmcra:0X00000001 event:0X0983 mmcr0:0X00000000 mmcr1:0XB009000088E40212 mmcra:0X00000001 #Group 153 pm_mrk_misc4, Marked misc events event:0X0990 mmcr0:0X00000000 mmcr1:0X000000001E1E021A mmcra:0X00000001 event:0X0991 mmcr0:0X00000000 mmcr1:0X000000001E1E021A mmcra:0X00000001 event:0X0992 mmcr0:0X00000000 mmcr1:0X000000001E1E021A mmcra:0X00000001 event:0X0993 mmcr0:0X00000000 mmcr1:0X000000001E1E021A mmcra:0X00000001 #Group 154 pm_mrk_st, Marked stores events event:0X09A0 mmcr0:0X00000000 mmcr1:0X0000000006060602 mmcra:0X00000001 event:0X09A1 mmcr0:0X00000000 mmcr1:0X0000000006060602 mmcra:0X00000001 event:0X09A2 mmcr0:0X00000000 mmcr1:0X0000000006060602 mmcra:0X00000001 event:0X09A3 mmcr0:0X00000000 mmcr1:0X0000000006060602 mmcra:0X00000001 #Group 155 pm_mrk_pteg, Marked PTEG event:0X09B0 mmcr0:0X00000000 mmcr1:0X0010000040424402 mmcra:0X00000001 event:0X09B1 mmcr0:0X00000000 mmcr1:0X0010000040424402 mmcra:0X00000001 event:0X09B2 mmcr0:0X00000000 mmcr1:0X0010000040424402 mmcra:0X00000001 event:0X09B3 mmcr0:0X00000000 mmcr1:0X0010000040424402 mmcra:0X00000001 #Group 156 pm_mrk_pteg2, Marked PTEG event:0X09C0 mmcr0:0X00000000 mmcr1:0X0010000002404644 mmcra:0X00000001 event:0X09C1 mmcr0:0X00000000 mmcr1:0X0010000002404644 mmcra:0X00000001 event:0X09C2 mmcr0:0X00000000 mmcr1:0X0010000002404644 mmcra:0X00000001 event:0X09C3 mmcr0:0X00000000 mmcr1:0X0010000002404644 mmcra:0X00000001 #Group 157 pm_mrk_pteg3, Marked PTEG event:0X09D0 mmcr0:0X00000000 mmcr1:0X0010000046460246 mmcra:0X00000001 event:0X09D1 mmcr0:0X00000000 mmcr1:0X0010000046460246 mmcra:0X00000001 event:0X09D2 mmcr0:0X00000000 mmcr1:0X0010000046460246 mmcra:0X00000001 event:0X09D3 mmcr0:0X00000000 mmcr1:0X0010000046460246 mmcra:0X00000001 #Group 158 pm_mrk_pteg4, Marked PTEG event:0X09E0 mmcr0:0X00000000 mmcr1:0X0010000042024054 mmcra:0X00000001 event:0X09E1 mmcr0:0X00000000 mmcr1:0X0010000042024054 mmcra:0X00000001 event:0X09E2 mmcr0:0X00000000 mmcr1:0X0010000042024054 mmcra:0X00000001 event:0X09E3 mmcr0:0X00000000 mmcr1:0X0010000042024054 mmcra:0X00000001 #Group 159 pm_mrk_pteg5, Marked PTEG event:0X09F0 mmcr0:0X00000000 mmcr1:0X0010000044025442 mmcra:0X00000001 event:0X09F1 mmcr0:0X00000000 mmcr1:0X0010000044025442 mmcra:0X00000001 event:0X09F2 mmcr0:0X00000000 mmcr1:0X0010000044025442 mmcra:0X00000001 event:0X09F3 mmcr0:0X00000000 mmcr1:0X0010000044025442 mmcra:0X00000001 #Group 160 pm_mrk_pteg6, Marked PTEG event:0X0A00 mmcr0:0X00000000 mmcr1:0X001000001E444202 mmcra:0X00000001 event:0X0A01 mmcr0:0X00000000 mmcr1:0X001000001E444202 mmcra:0X00000001 event:0X0A02 mmcr0:0X00000000 mmcr1:0X001000001E444202 mmcra:0X00000001 event:0X0A03 mmcr0:0X00000000 mmcr1:0X001000001E444202 mmcra:0X00000001 #Group 161 pm_mrk_vmx, Marked VMX event:0X0A10 mmcr0:0X00000000 mmcr1:0X700000008C88AE02 mmcra:0X00000001 event:0X0A11 mmcr0:0X00000000 mmcr1:0X700000008C88AE02 mmcra:0X00000001 event:0X0A12 mmcr0:0X00000000 mmcr1:0X700000008C88AE02 mmcra:0X00000001 event:0X0A13 mmcr0:0X00000000 mmcr1:0X700000008C88AE02 mmcra:0X00000001 #Group 162 pm_mrk_vmx2, Marked VMX event:0X0A20 mmcr0:0X00000000 mmcr1:0X60900000868EE002 mmcra:0X00000001 event:0X0A21 mmcr0:0X00000000 mmcr1:0X60900000868EE002 mmcra:0X00000001 event:0X0A22 mmcr0:0X00000000 mmcr1:0X60900000868EE002 mmcra:0X00000001 event:0X0A23 mmcr0:0X00000000 mmcr1:0X60900000868EE002 mmcra:0X00000001 #Group 163 pm_mrk_vmx3, Marked VMX event:0X0A30 mmcr0:0X00000000 mmcr1:0X700000008A821E02 mmcra:0X00000001 event:0X0A31 mmcr0:0X00000000 mmcr1:0X700000008A821E02 mmcra:0X00000001 event:0X0A32 mmcr0:0X00000000 mmcr1:0X700000008A821E02 mmcra:0X00000001 event:0X0A33 mmcr0:0X00000000 mmcr1:0X700000008A821E02 mmcra:0X00000001 #Group 164 pm_mrk_fp, Marked FP events event:0X0A40 mmcr0:0X00000000 mmcr1:0XD00000008230AA02 mmcra:0X00000001 event:0X0A41 mmcr0:0X00000000 mmcr1:0XD00000008230AA02 mmcra:0X00000001 event:0X0A42 mmcr0:0X00000000 mmcr1:0XD00000008230AA02 mmcra:0X00000001 event:0X0A43 mmcr0:0X00000000 mmcr1:0XD00000008230AA02 mmcra:0X00000001 #Group 165 pm_mrk_derat_ref, Marked DERAT ref event:0X0A50 mmcr0:0X00000000 mmcr1:0X0080000044444402 mmcra:0X00000001 event:0X0A51 mmcr0:0X00000000 mmcr1:0X0080000044444402 mmcra:0X00000001 event:0X0A52 mmcr0:0X00000000 mmcr1:0X0080000044444402 mmcra:0X00000001 event:0X0A53 mmcr0:0X00000000 mmcr1:0X0080000044444402 mmcra:0X00000001 #Group 166 pm_mrk_derat_miss, Marked DERAT miss event:0X0A60 mmcr0:0X00000000 mmcr1:0X0090000044444402 mmcra:0X00000001 event:0X0A61 mmcr0:0X00000000 mmcr1:0X0090000044444402 mmcra:0X00000001 event:0X0A62 mmcr0:0X00000000 mmcr1:0X0090000044444402 mmcra:0X00000001 event:0X0A63 mmcr0:0X00000000 mmcr1:0X0090000044444402 mmcra:0X00000001 #Group 167 pm_dcache_edge, D cache - edge event:0X0A70 mmcr0:0X00000000 mmcr1:0X000000000D0E0C07 mmcra:0X00000000 event:0X0A71 mmcr0:0X00000000 mmcr1:0X000000000D0E0C07 mmcra:0X00000000 event:0X0A72 mmcr0:0X00000000 mmcr1:0X000000000D0E0C07 mmcra:0X00000000 event:0X0A73 mmcr0:0X00000000 mmcr1:0X000000000D0E0C07 mmcra:0X00000000 #Group 168 pm_lsu_lmq_edge, LSU LMQ events - edge event:0X0A80 mmcr0:0X00000000 mmcr1:0X98000000AC1D1DA4 mmcra:0X00000000 event:0X0A81 mmcr0:0X00000000 mmcr1:0X98000000AC1D1DA4 mmcra:0X00000000 event:0X0A82 mmcr0:0X00000000 mmcr1:0X98000000AC1D1DA4 mmcra:0X00000000 event:0X0A83 mmcr0:0X00000000 mmcr1:0X98000000AC1D1DA4 mmcra:0X00000000 #Group 169 pm_gct_edge, GCT events - edge event:0X0A90 mmcr0:0X00000000 mmcr1:0X404000000909A7E8 mmcra:0X00000000 event:0X0A91 mmcr0:0X00000000 mmcr1:0X404000000909A7E8 mmcra:0X00000000 event:0X0A92 mmcr0:0X00000000 mmcr1:0X404000000909A7E8 mmcra:0X00000000 event:0X0A93 mmcr0:0X00000000 mmcr1:0X404000000909A7E8 mmcra:0X00000000 #Group 170 pm_freq_edge, Frequency events - edge event:0X0AA0 mmcr0:0X00000000 mmcr1:0X000000002B3D3C3C mmcra:0X00000000 event:0X0AA1 mmcr0:0X00000000 mmcr1:0X000000002B3D3C3C mmcra:0X00000000 event:0X0AA2 mmcr0:0X00000000 mmcr1:0X000000002B3D3C3C mmcra:0X00000000 event:0X0AA3 mmcr0:0X00000000 mmcr1:0X000000002B3D3C3C mmcra:0X00000000 #Group 171 pm_disp_wait_edge, Dispatch stalls - edge event:0X0AB0 mmcr0:0X00000000 mmcr1:0X00000000560D050D mmcra:0X00000000 event:0X0AB1 mmcr0:0X00000000 mmcr1:0X00000000560D050D mmcra:0X00000000 event:0X0AB2 mmcr0:0X00000000 mmcr1:0X00000000560D050D mmcra:0X00000000 event:0X0AB3 mmcr0:0X00000000 mmcr1:0X00000000560D050D mmcra:0X00000000 #Group 172 pm_edge1, EDGE event group event:0X0AC0 mmcr0:0X00000000 mmcr1:0X000006300D0C1F1E mmcra:0X00000000 event:0X0AC1 mmcr0:0X00000000 mmcr1:0X000006300D0C1F1E mmcra:0X00000000 event:0X0AC2 mmcr0:0X00000000 mmcr1:0X000006300D0C1F1E mmcra:0X00000000 event:0X0AC3 mmcr0:0X00000000 mmcr1:0X000006300D0C1F1E mmcra:0X00000000 #Group 173 pm_edge2, EDGE event group event:0X0AD0 mmcr0:0X00000000 mmcr1:0X400000008180A5A4 mmcra:0X00000000 event:0X0AD1 mmcr0:0X00000000 mmcr1:0X400000008180A5A4 mmcra:0X00000000 event:0X0AD2 mmcr0:0X00000000 mmcr1:0X400000008180A5A4 mmcra:0X00000000 event:0X0AD3 mmcr0:0X00000000 mmcr1:0X400000008180A5A4 mmcra:0X00000000 #Group 174 pm_edge3, EDGE event group event:0X0AE0 mmcr0:0X00000000 mmcr1:0X009000000BF4EBEA mmcra:0X00000000 event:0X0AE1 mmcr0:0X00000000 mmcr1:0X009000000BF4EBEA mmcra:0X00000000 event:0X0AE2 mmcr0:0X00000000 mmcr1:0X009000000BF4EBEA mmcra:0X00000000 event:0X0AE3 mmcr0:0X00000000 mmcr1:0X009000000BF4EBEA mmcra:0X00000000 #Group 175 pm_edge4, EDGE event group event:0X0AF0 mmcr0:0X00000000 mmcr1:0X400000008786A9A8 mmcra:0X00000000 event:0X0AF1 mmcr0:0X00000000 mmcr1:0X400000008786A9A8 mmcra:0X00000000 event:0X0AF2 mmcr0:0X00000000 mmcr1:0X400000008786A9A8 mmcra:0X00000000 event:0X0AF3 mmcr0:0X00000000 mmcr1:0X400000008786A9A8 mmcra:0X00000000 #Group 176 pm_edge5, EDGE event group event:0X0B00 mmcr0:0X00000000 mmcr1:0X00900000FB17EDEC mmcra:0X00000000 event:0X0B01 mmcr0:0X00000000 mmcr1:0X00900000FB17EDEC mmcra:0X00000000 event:0X0B02 mmcr0:0X00000000 mmcr1:0X00900000FB17EDEC mmcra:0X00000000 event:0X0B03 mmcr0:0X00000000 mmcr1:0X00900000FB17EDEC mmcra:0X00000000 #Group 177 pm_noedge5, EDGE event group event:0X0B10 mmcr0:0X00000000 mmcr1:0X00900000FA16EDEC mmcra:0X00000000 event:0X0B11 mmcr0:0X00000000 mmcr1:0X00900000FA16EDEC mmcra:0X00000000 event:0X0B12 mmcr0:0X00000000 mmcr1:0X00900000FA16EDEC mmcra:0X00000000 event:0X0B13 mmcr0:0X00000000 mmcr1:0X00900000FA16EDEC mmcra:0X00000000 #Group 178 pm_edge6, EDGE event group event:0X0B20 mmcr0:0X00000000 mmcr1:0X000000002B05050D mmcra:0X00000000 event:0X0B21 mmcr0:0X00000000 mmcr1:0X000000002B05050D mmcra:0X00000000 event:0X0B22 mmcr0:0X00000000 mmcr1:0X000000002B05050D mmcra:0X00000000 event:0X0B23 mmcr0:0X00000000 mmcr1:0X000000002B05050D mmcra:0X00000000 #Group 179 pm_noedge6, EDGE event group event:0X0B30 mmcr0:0X00000000 mmcr1:0X000000002A04040C mmcra:0X00000000 event:0X0B31 mmcr0:0X00000000 mmcr1:0X000000002A04040C mmcra:0X00000000 event:0X0B32 mmcr0:0X00000000 mmcr1:0X000000002A04040C mmcra:0X00000000 event:0X0B33 mmcr0:0X00000000 mmcr1:0X000000002A04040C mmcra:0X00000000 #Group 180 pm_edge7, EDGE event group event:0X0B40 mmcr0:0X00000000 mmcr1:0X0000000009091D1D mmcra:0X00000000 event:0X0B41 mmcr0:0X00000000 mmcr1:0X0000000009091D1D mmcra:0X00000000 event:0X0B42 mmcr0:0X00000000 mmcr1:0X0000000009091D1D mmcra:0X00000000 event:0X0B43 mmcr0:0X00000000 mmcr1:0X0000000009091D1D mmcra:0X00000000 #Group 181 pm_noedge7, NOEDGE event group event:0X0B50 mmcr0:0X00000000 mmcr1:0X0000000008081C1C mmcra:0X00000000 event:0X0B51 mmcr0:0X00000000 mmcr1:0X0000000008081C1C mmcra:0X00000000 event:0X0B52 mmcr0:0X00000000 mmcr1:0X0000000008081C1C mmcra:0X00000000 event:0X0B53 mmcr0:0X00000000 mmcr1:0X0000000008081C1C mmcra:0X00000000 #Group 182 pm_edge8, EDGE event group event:0X0B60 mmcr0:0X00000000 mmcr1:0X00900000CD1DEC07 mmcra:0X00000000 event:0X0B61 mmcr0:0X00000000 mmcr1:0X00900000CD1DEC07 mmcra:0X00000000 event:0X0B62 mmcr0:0X00000000 mmcr1:0X00900000CD1DEC07 mmcra:0X00000000 event:0X0B63 mmcr0:0X00000000 mmcr1:0X00900000CD1DEC07 mmcra:0X00000000 #Group 183 pm_noedge8, NOEDGE event group event:0X0B70 mmcr0:0X00000000 mmcr1:0X00900000CC1CED06 mmcra:0X00000000 event:0X0B71 mmcr0:0X00000000 mmcr1:0X00900000CC1CED06 mmcra:0X00000000 event:0X0B72 mmcr0:0X00000000 mmcr1:0X00900000CC1CED06 mmcra:0X00000000 event:0X0B73 mmcr0:0X00000000 mmcr1:0X00900000CC1CED06 mmcra:0X00000000 #Group 184 pm_edge9, EDGE event group event:0X0B80 mmcr0:0X00000000 mmcr1:0X80000000880D0CA2 mmcra:0X00000000 event:0X0B81 mmcr0:0X00000000 mmcr1:0X80000000880D0CA2 mmcra:0X00000000 event:0X0B82 mmcr0:0X00000000 mmcr1:0X80000000880D0CA2 mmcra:0X00000000 event:0X0B83 mmcr0:0X00000000 mmcr1:0X80000000880D0CA2 mmcra:0X00000000 #Group 185 pm_edge10, EDGE event group event:0X0B90 mmcr0:0X00000000 mmcr1:0X32000000AC3DAE05 mmcra:0X00000000 event:0X0B91 mmcr0:0X00000000 mmcr1:0X32000000AC3DAE05 mmcra:0X00000000 event:0X0B92 mmcr0:0X00000000 mmcr1:0X32000000AC3DAE05 mmcra:0X00000000 event:0X0B93 mmcr0:0X00000000 mmcr1:0X32000000AC3DAE05 mmcra:0X00000000 #Group 186 pm_noedge10, NOEDGE event group event:0X0BA0 mmcr0:0X00000000 mmcr1:0X32000000AC3CAE04 mmcra:0X00000000 event:0X0BA1 mmcr0:0X00000000 mmcr1:0X32000000AC3CAE04 mmcra:0X00000000 event:0X0BA2 mmcr0:0X00000000 mmcr1:0X32000000AC3CAE04 mmcra:0X00000000 event:0X0BA3 mmcr0:0X00000000 mmcr1:0X32000000AC3CAE04 mmcra:0X00000000 #Group 187 pm_hpm1, HPM group event:0X0BB0 mmcr0:0X00000000 mmcr1:0XC00000003030341E mmcra:0X00000000 event:0X0BB1 mmcr0:0X00000000 mmcr1:0XC00000003030341E mmcra:0X00000000 event:0X0BB2 mmcr0:0X00000000 mmcr1:0XC00000003030341E mmcra:0X00000000 event:0X0BB3 mmcr0:0X00000000 mmcr1:0XC00000003030341E mmcra:0X00000000 #Group 188 pm_hpm2, HPM group event:0X0BC0 mmcr0:0X00000000 mmcr1:0X8C0000000232301E mmcra:0X00000000 event:0X0BC1 mmcr0:0X00000000 mmcr1:0X8C0000000232301E mmcra:0X00000000 event:0X0BC2 mmcr0:0X00000000 mmcr1:0X8C0000000232301E mmcra:0X00000000 event:0X0BC3 mmcr0:0X00000000 mmcr1:0X8C0000000232301E mmcra:0X00000000 #Group 189 pm_hpm3, HPM group event:0X0BD0 mmcr0:0X00000000 mmcr1:0X800000001E80F002 mmcra:0X00000000 event:0X0BD1 mmcr0:0X00000000 mmcr1:0X800000001E80F002 mmcra:0X00000000 event:0X0BD2 mmcr0:0X00000000 mmcr1:0X800000001E80F002 mmcra:0X00000000 event:0X0BD3 mmcr0:0X00000000 mmcr1:0X800000001E80F002 mmcra:0X00000000 #Group 190 pm_hpm4, HPM group event:0X0BE0 mmcr0:0X00000000 mmcr1:0X800000000212A234 mmcra:0X00000000 event:0X0BE1 mmcr0:0X00000000 mmcr1:0X800000000212A234 mmcra:0X00000000 event:0X0BE2 mmcr0:0X00000000 mmcr1:0X800000000212A234 mmcra:0X00000000 event:0X0BE3 mmcr0:0X00000000 mmcr1:0X800000000212A234 mmcra:0X00000000 #Group 191 pm_hpm5, HPM group event:0X0BF0 mmcr0:0X00000000 mmcr1:0XD0000000301E1616 mmcra:0X00000000 event:0X0BF1 mmcr0:0X00000000 mmcr1:0XD0000000301E1616 mmcra:0X00000000 event:0X0BF2 mmcr0:0X00000000 mmcr1:0XD0000000301E1616 mmcra:0X00000000 event:0X0BF3 mmcr0:0X00000000 mmcr1:0XD0000000301E1616 mmcra:0X00000000 #Group 192 pm_hpm6, HPM group event:0X0C00 mmcr0:0X00000000 mmcr1:0X0000000058585A5A mmcra:0X00000000 event:0X0C01 mmcr0:0X00000000 mmcr1:0X0000000058585A5A mmcra:0X00000000 event:0X0C02 mmcr0:0X00000000 mmcr1:0X0000000058585A5A mmcra:0X00000000 event:0X0C03 mmcr0:0X00000000 mmcr1:0X0000000058585A5A mmcra:0X00000000 #Group 193 pm_hpm7, HPM group event:0X0C10 mmcr0:0X00000000 mmcr1:0X000000005A5A581E mmcra:0X00000000 event:0X0C11 mmcr0:0X00000000 mmcr1:0X000000005A5A581E mmcra:0X00000000 event:0X0C12 mmcr0:0X00000000 mmcr1:0X000000005A5A581E mmcra:0X00000000 event:0X0C13 mmcr0:0X00000000 mmcr1:0X000000005A5A581E mmcra:0X00000000 #Group 194 pm_hpm8, HPM group event:0X0C20 mmcr0:0X00000000 mmcr1:0XCC000000303030F0 mmcra:0X00000000 event:0X0C21 mmcr0:0X00000000 mmcr1:0XCC000000303030F0 mmcra:0X00000000 event:0X0C22 mmcr0:0X00000000 mmcr1:0XCC000000303030F0 mmcra:0X00000000 event:0X0C23 mmcr0:0X00000000 mmcr1:0XCC000000303030F0 mmcra:0X00000000 #Group 195 pm_hpm9, HPM group event:0X0C30 mmcr0:0X00000000 mmcr1:0X80000000801E34A8 mmcra:0X00000000 event:0X0C31 mmcr0:0X00000000 mmcr1:0X80000000801E34A8 mmcra:0X00000000 event:0X0C32 mmcr0:0X00000000 mmcr1:0X80000000801E34A8 mmcra:0X00000000 event:0X0C33 mmcr0:0X00000000 mmcr1:0X80000000801E34A8 mmcra:0X00000000 #Group 196 pm_hpm10, HPM group event:0X0C40 mmcr0:0X00000000 mmcr1:0X5040A00002325456 mmcra:0X00000000 event:0X0C41 mmcr0:0X00000000 mmcr1:0X5040A00002325456 mmcra:0X00000000 event:0X0C42 mmcr0:0X00000000 mmcr1:0X5040A00002325456 mmcra:0X00000000 event:0X0C43 mmcr0:0X00000000 mmcr1:0X5040A00002325456 mmcra:0X00000000 #Group 197 pm_mrk_derat_ref2, Marked DERAT ref event:0X0C50 mmcr0:0X00000000 mmcr1:0X0080000044440244 mmcra:0X00000001 event:0X0C51 mmcr0:0X00000000 mmcr1:0X0080000044440244 mmcra:0X00000001 event:0X0C52 mmcr0:0X00000000 mmcr1:0X0080000044440244 mmcra:0X00000001 event:0X0C53 mmcr0:0X00000000 mmcr1:0X0080000044440244 mmcra:0X00000001 #Group 198 pm_mrk_derat_miss2, Marked DERAT miss event:0X0C60 mmcr0:0X00000000 mmcr1:0X0090000044440244 mmcra:0X00000001 event:0X0C61 mmcr0:0X00000000 mmcr1:0X0090000044440244 mmcra:0X00000001 event:0X0C62 mmcr0:0X00000000 mmcr1:0X0090000044440244 mmcra:0X00000001 event:0X0C63 mmcr0:0X00000000 mmcr1:0X0090000044440244 mmcra:0X00000001 oprofile-1.3.0/events/ppc64/power6/unit_masks0000664000175000017500000000034612534404406016044 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2006. # Contributed by Dave Nomura . # # ppc64 POWER6 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power8/0000775000175000017500000000000013323173530014021 500000000000000oprofile-1.3.0/events/ppc64/power8/events0000664000175000017500000047131212672614363015212 00000000000000 # Copyright OProfile authors # Copyright (c) International Business Machines, 2013. # Contributed by Maynard Johnson . # # IBM POWER8 Events include:ppc64/architected_events_v1 # note 1. 11/12/2015 # # These event requires the cache selector bits to be set to a non-zero # value in the processor performance counter setup register. On Power 8, this # register is only writable by the hypervisor. So the kernel must reject any # event where the lower three cache selector bits (bits 22:20) are not equal # to 0. If/when an API is implemented to allow the kernel to request the # hypervisor write the register with the required value, these events can be # re-added to the list of supported events. The issue is documented in the # powerpc kernel file arch/powerpc/perf/power8-pmu.c in function power8_get_constraint() # where the cache bits are ANDed with 0x7 if the unit is between 6 and 9. If # cache bits are not zero, the function returns -1 to reject the event. # # note 2. # # To use all of the events listed in this file, you must have OProfile # complied with the libpfm 4.6 or newer library. Libpfm 4.5 supports a # subset of these events. event:0x1f05e counters:0 um:zero minimum:100000 name:PM_1LPAR_CYC : Number of cycles in single lpar mode. event:0x2006e counters:1 um:zero minimum:10000 name:PM_2LPAR_CYC : Number of cycles in 2 lpar mode. event:0x4e05e counters:3 um:zero minimum:100000 name:PM_4LPAR_CYC : Number of cycles in 4 LPAR mode. event:0x610050 counters:0 um:zero minimum:10000 name:PM_ALL_CHIP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate (I or d) event:0x520050 counters:1 um:zero minimum:10000 name:PM_ALL_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x620052 counters:1 um:zero minimum:10000 name:PM_ALL_GRP_PUMP_MPRED : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro event:0x610052 counters:0 um:zero minimum:10000 name:PM_ALL_GRP_PUMP_MPRED_RTY : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x610054 counters:0 um:zero minimum:10000 name:PM_ALL_PUMP_CPRED : Pump prediction correct. Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x640052 counters:3 um:zero minimum:10000 name:PM_ALL_PUMP_MPRED : Pump Mis prediction Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x630050 counters:2 um:zero minimum:10000 name:PM_ALL_SYS_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x630052 counters:2 um:zero minimum:10000 name:PM_ALL_SYS_PUMP_MPRED : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or event:0x640050 counters:3 um:zero minimum:10000 name:PM_ALL_SYS_PUMP_MPRED_RTY : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x2505e counters:1 um:zero minimum:10000 name:PM_BACK_BR_CMPL : Branch instruction completed with a target address less than current instruction address. event:0x4082 counters:0,1,2,3 um:zero minimum:10000 name:PM_BANK_CONFLICT : Read blocked due to interleave conflict. The ifar logic will detect an interleave conflict and kill the data that was read that cycle. event:0x10068 counters:0 um:zero minimum:10000 name:PM_BRU_FIN : Branch Instruction Finished . event:0x20036 counters:1 um:zero minimum:10000 name:PM_BR_2PATH : two path branch. event:0x5086 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_BC_8 : Pairable BC+8 branch that has not been converted to a Resolve Finished in the BRU pipeline event:0x5084 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_BC_8_CONV : Pairable BC+8 branch that was converted to a Resolve Finished in the BRU pipeline. event:0x40060 counters:3 um:zero minimum:10000 name:PM_BR_CMPL : Branch Instruction completed. event:0x40ac counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_CCACHE : Conditional Branch Completed that was Mispredicted due to the Count Cache Target Prediction event:0x40b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_CR : Conditional Branch Completed that was Mispredicted due to the BHT Direction Prediction (taken/not taken). event:0x40ae counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_LSTACK : Conditional Branch Completed that was Mispredicted due to the Link Stack Target Prediction event:0x40ba counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_TA : Conditional Branch Completed that was Mispredicted due to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that resolved Taken set this event. event:0x10138 counters:0 um:zero minimum:10000 name:PM_BR_MRK_2PATH : marked two path branch. event:0x409c counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_BR0 : Conditional Branch Completed on BR0 (1st branch in group) in which the HW predicted the Direction or Target event:0x409e counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_BR1 : Conditional Branch Completed on BR1 (2nd branch in group) in which the HW predicted the Direction or Target. Note: BR1 can only be used in Single Thread Mode. In all of the SMT modes, only one branch can complete, thus BR1 is unused. event:0x489c counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_BR_CMPL : IFU event:0x40a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CCACHE_BR0 : Conditional Branch Completed on BR0 that used the Count Cache for Target Prediction event:0x40a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CCACHE_BR1 : Conditional Branch Completed on BR1 that used the Count Cache for Target Prediction event:0x48a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CCACHE_CMPL : IFU event:0x40b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CR_BR0 : Conditional Branch Completed on BR0 that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and bra event:0x40b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CR_BR1 : Conditional Branch Completed on BR1 that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and bra event:0x48b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CR_CMPL : IFU event:0x40a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_LSTACK_BR0 : Conditional Branch Completed on BR0 that used the Link Stack for Target Prediction event:0x40aa counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_LSTACK_BR1 : Conditional Branch Completed on BR1 that used the Link Stack for Target Prediction event:0x48a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_LSTACK_CMPL : IFU event:0x40b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_TA_BR0 : Conditional Branch Completed on BR0 that had its target address predicted. Only XL-form branches set this event. event:0x40b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_TA_BR1 : Conditional Branch Completed on BR1 that had its target address predicted. Only XL-form branches set this event. event:0x48b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_TA_CMPL : IFU event:0x40a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_UNCOND_BR0 : Unconditional Branch Completed on BR0. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was coverted to a Resolve. event:0x40a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_UNCOND_BR1 : Unconditional Branch Completed on BR1. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was coverted to a Resolve. event:0x48a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_UNCOND_CMPL : IFU event:0x3094 counters:0,1,2,3 um:zero minimum:10000 name:PM_CASTOUT_ISSUED : Castouts issued event:0x3096 counters:0,1,2,3 um:zero minimum:10000 name:PM_CASTOUT_ISSUED_GPR : Castouts issued GPR event:0x10050 counters:0 um:zero minimum:10000 name:PM_CHIP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate (I or d). event:0x2090 counters:0,1,2,3 um:zero minimum:10000 name:PM_CLB_HELD : CLB Hold: Any Reason event:0x4000a counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL : Completion stall. event:0x4d018 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_BRU : Completion stall due to a Branch Unit. event:0x2d018 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_BRU_CRU : Completion stall due to IFU. event:0x30026 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_COQ_FULL : Completion stall due to CO q full. event:0x2c012 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DCACHE_MISS : Completion stall by Dcache miss. event:0x2c018 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L21_L31 : Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3). event:0x2c016 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L2L3 : Completion stall by Dcache miss which resolved in L2/L3. event:0x4c016 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L2L3_CONFLICT : Completion stall due to cache miss resolving in core's L2/L3 with a conflict. event:0x4c01a counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L3MISS : Completion stall due to cache miss resolving missed the L3. event:0x4c018 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_LMEM : Completion stall due to cache miss resolving in core's Local Memory. event:0x2c01c counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_REMOTE : Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3). event:0x4c012 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_ERAT_MISS : Completion stall due to LSU reject ERAT miss. event:0x30038 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_FLUSH : completion stall due to flush by own thread. event:0x4d016 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_FXLONG : Completion stall due to a long latency fixed point instruction. event:0x2d016 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_FXU : Completion stall due to FXU. event:0x30036 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_HWSYNC : completion stall due to hwsync. event:0x4d014 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_LOAD_FINISH : Completion stall due to a Load finish. event:0x2c010 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_LSU : Completion stall by LSU instruction. event:0x10036 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_LWSYNC : completion stall due to isync/lwsync. event:0x30028 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_MEM_ECC_DELAY : Completion stall due to mem ECC delay. event:0x2e01c counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_NO_NTF : Completion stall due to nop. event:0x2e01e counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_NTCG_FLUSH : Completion stall due to reject (load hit store). event:0x30006 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_OTHER_CMPL : Instructions core completed while this thread was stalled. event:0x4c010 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_REJECT : Completion stall due to LSU reject. event:0x2c01a counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_REJECT_LHS : Completion stall due to reject (load hit store). event:0x4c014 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_REJ_LMQ_FULL : Completion stall due to LSU reject LMQ full. event:0x4d010 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_SCALAR : Completion stall due to VSU scalar instruction. event:0x2d010 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_SCALAR_LONG : Completion stall due to VSU scalar long latency instruction. event:0x2c014 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_STORE : Completion stall by stores. event:0x4c01c counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_ST_FWD : Completion stall due to store forward. event:0x1001c counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_THRD : Completion stall due to thread conflict. event:0x2d014 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_VECTOR : Completion stall due to VSU vector instruction. event:0x4d012 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_VECTOR_LONG : Completion stall due to VSU vector long instruction. event:0x2d012 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_VSU : Completion stall due to VSU instruction. event:0x16083 counters:0 um:zero minimum:10000 name:PM_CO0_ALLOC : 0.0 event:0x16082 counters:0 um:zero minimum:10000 name:PM_CO0_BUSY : CO mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point) ## note 1 event:0x517082 counters:0 um:zero minimum:10000 name:PM_CO_DISP_FAIL : CO dispatch failed due to all CO machines being busy ## note 1 event:0x527084 counters:1 um:zero minimum:10000 name:PM_CO_TM_SC_FOOTPRINT : L2 did a cleanifdirty CO to the L3 (ie created an SC line in the L3) event:0x3608a counters:2 um:zero minimum:10000 name:PM_CO_USAGE : Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 CO machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running event:0x40066 counters:3 um:zero minimum:10000 name:PM_CRU_FIN : IFU Finished a (non-branch) instruction. event:0x61c050 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_CHIP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for a demand load event:0x64c048 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_DL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c048 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_DL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c04c counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_DL4 : The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c04c counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_DMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c042 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L2 : The processor's data cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c046 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L21_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c046 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L21_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c04e counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L2MISS_MOD : The processor's data cache was reloaded from a localtion other than the local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c040 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L2_DISP_CONFLICT_LDHITST : The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c040 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L2_DISP_CONFLICT_OTHER : The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c040 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L2_MEPF : The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c040 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L2_NO_CONFLICT : The processor's data cache was reloaded from local core's L2 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c042 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L3 : The processor's data cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c044 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L31_ECO_MOD : The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c044 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L31_ECO_SHR : The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c044 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L31_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c046 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L31_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c04e counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L3MISS_MOD : The processor's data cache was reloaded from a localtion other than the local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c042 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L3_DISP_CONFLICT : The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c042 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L3_MEPF : The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c044 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_L3_NO_CONFLICT : The processor's data cache was reloaded from local core's L3 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c04c counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_LL4 : The processor's data cache was reloaded from the local chip's L4 cache due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c048 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_LMEM : The processor's data cache was reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c04c counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_MEMORY : The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x64c04a counters:3 um:zero minimum:10000 name:PM_DATA_ALL_FROM_OFF_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c048 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_ON_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c046 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_RL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x61c04a counters:0 um:zero minimum:10000 name:PM_DATA_ALL_FROM_RL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c04a counters:1 um:zero minimum:10000 name:PM_DATA_ALL_FROM_RL4 : The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x63c04a counters:2 um:zero minimum:10000 name:PM_DATA_ALL_FROM_RMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 event:0x62c050 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for a demand load event:0x62c052 counters:1 um:zero minimum:10000 name:PM_DATA_ALL_GRP_PUMP_MPRED : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro event:0x61c052 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_GRP_PUMP_MPRED_RTY : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor a demand load event:0x61c054 counters:0 um:zero minimum:10000 name:PM_DATA_ALL_PUMP_CPRED : Pump prediction correct. Counts across all types of pumps for a demand load event:0x64c052 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_PUMP_MPRED : Pump Mis prediction Counts across all types of pumpsfor a demand load event:0x63c050 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_SYS_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was system pump for a demand load event:0x63c052 counters:2 um:zero minimum:10000 name:PM_DATA_ALL_SYS_PUMP_MPRED : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or event:0x64c050 counters:3 um:zero minimum:10000 name:PM_DATA_ALL_SYS_PUMP_MPRED_RTY : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for a demand load event:0x1c050 counters:0 um:zero minimum:10000 name:PM_DATA_CHIP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for a demand load. event:0x4c048 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_DL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c048 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_DL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c04c counters:2 um:zero minimum:10000 name:PM_DATA_FROM_DL4 : The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x4c04c counters:3 um:zero minimum:10000 name:PM_DATA_FROM_DMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c042 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L2 : The processor's data cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x4c046 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L21_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c046 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L21_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c04e counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L2MISS_MOD : The processor's data cache was reloaded from a localtion other than the local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c040 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST : The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x4c040 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L2_DISP_CONFLICT_OTHER : The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c040 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L2_MEPF : The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c040 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L2_NO_CONFLICT : The processor's data cache was reloaded from local core's L2 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1 . event:0x4c042 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L3 : The processor's data cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x4c044 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L31_ECO_MOD : The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c044 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L31_ECO_SHR : The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c044 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L31_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c046 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L31_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x4c04e counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L3MISS_MOD : The processor's data cache was reloaded from a localtion other than the local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c042 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L3_DISP_CONFLICT : The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c042 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L3_MEPF : The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c044 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L3_NO_CONFLICT : The processor's data cache was reloaded from local core's L3 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c04c counters:0 um:zero minimum:10000 name:PM_DATA_FROM_LL4 : The processor's data cache was reloaded from the local chip's L4 cache due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c048 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_LMEM : The processor's data cache was reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c04c counters:1 um:zero minimum:10000 name:PM_DATA_FROM_MEMORY : The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x4c04a counters:3 um:zero minimum:10000 name:PM_DATA_FROM_OFF_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c048 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_ON_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c046 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_RL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x1c04a counters:0 um:zero minimum:10000 name:PM_DATA_FROM_RL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c04a counters:1 um:zero minimum:10000 name:PM_DATA_FROM_RL4 : The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x3c04a counters:2 um:zero minimum:10000 name:PM_DATA_FROM_RMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1. event:0x2c050 counters:1 um:zero minimum:10000 name:PM_DATA_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for a demand load. event:0x2c052 counters:1 um:zero minimum:10000 name:PM_DATA_GRP_PUMP_MPRED : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro event:0x1c052 counters:0 um:zero minimum:10000 name:PM_DATA_GRP_PUMP_MPRED_RTY : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor a demand load. event:0x1c054 counters:0 um:zero minimum:10000 name:PM_DATA_PUMP_CPRED : Pump prediction correct. Counts across all types of pumps for a demand load. event:0x4c052 counters:3 um:zero minimum:10000 name:PM_DATA_PUMP_MPRED : Pump Mis prediction Counts across all types of pumpsfor a demand load. event:0x3c050 counters:2 um:zero minimum:10000 name:PM_DATA_SYS_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was system pump for a demand load. event:0x3c052 counters:2 um:zero minimum:10000 name:PM_DATA_SYS_PUMP_MPRED : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or event:0x4c050 counters:3 um:zero minimum:10000 name:PM_DATA_SYS_PUMP_MPRED_RTY : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for a demand load. event:0x3001a counters:2 um:zero minimum:10000 name:PM_DATA_TABLEWALK_CYC : Data Tablewalk Active. event:0xe0bc counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_COLLISIONS : DATA Cache collisions42 event:0x1e050 counters:0 um:zero minimum:10000 name:PM_DC_PREF_STREAM_ALLOC : Stream marked valid. The stream could have been allocated through the hardware prefetch mechanism or through software. This is combined ls0 and ls1. event:0x2e050 counters:1 um:zero minimum:10000 name:PM_DC_PREF_STREAM_CONF : A demand load referenced a line in an active prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software. Combine up + down. event:0x4e050 counters:3 um:zero minimum:10000 name:PM_DC_PREF_STREAM_FUZZY_CONF : A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up). event:0x3e050 counters:2 um:zero minimum:10000 name:PM_DC_PREF_STREAM_STRIDED_CONF : A demand load referenced a line in an active strided prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.. event:0x4c054 counters:3 um:zero minimum:10000 name:PM_DERAT_MISS_16G : Data ERAT Miss (Data TLB Access) page size 16G. event:0x3c054 counters:2 um:zero minimum:10000 name:PM_DERAT_MISS_16M : Data ERAT Miss (Data TLB Access) page size 16M. event:0x1c056 counters:0 um:zero minimum:10000 name:PM_DERAT_MISS_4K : Data ERAT Miss (Data TLB Access) page size 4K. event:0x2c054 counters:1 um:zero minimum:10000 name:PM_DERAT_MISS_64K : Data ERAT Miss (Data TLB Access) page size 64K. event:0xb0ba counters:0,1,2,3 um:zero minimum:10000 name:PM_DFU : Finish DFU (all finish) event:0xb0be counters:0,1,2,3 um:zero minimum:10000 name:PM_DFU_DCFFIX : Convert from fixed opcode finish (dcffix,dcffixq) event:0xb0bc counters:0,1,2,3 um:zero minimum:10000 name:PM_DFU_DENBCD : BCD->DPD opcode finish (denbcd, denbcdq) event:0xb0b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DFU_MC : Finish DFU multicycle event:0x2092 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_BAL : Dispatch/CLB Hold: Balance event:0x2094 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_RES : Dispatch/CLB Hold: Resource event:0x20a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_SB : Dispatch/CLB Hold: Scoreboard event:0x2098 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_SYNC : Dispatch/CLB Hold: Sync type instruction event:0x2096 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_TLBIE : Dispatch Hold: Due to TLBIE event:0x10006 counters:0 um:zero minimum:10000 name:PM_DISP_HELD : Dispatch Held. event:0x20006 counters:1 um:zero minimum:10000 name:PM_DISP_HELD_IQ_FULL : Dispatch held due to Issue q full. event:0x1002a counters:0 um:zero minimum:10000 name:PM_DISP_HELD_MAP_FULL : Dispatch held due to Mapper full. event:0x30018 counters:2 um:zero minimum:10000 name:PM_DISP_HELD_SRQ_FULL : Dispatch held due SRQ no room. event:0x4003c counters:3 um:zero minimum:10000 name:PM_DISP_HELD_SYNC_HOLD : Dispatch held due to SYNC hold. event:0x30a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_HOLD_GCT_FULL : Dispatch Hold Due to no space in the GCT event:0x30008 counters:2 um:zero minimum:10000 name:PM_DISP_WT : Dispatched Starved (not held, nothing to dispatch). event:0x4e048 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_DL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request. event:0x3e048 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_DL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request. event:0x3e04c counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_DL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a data side request. event:0x4e04c counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_DMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a data side request. event:0x1e042 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L2 : A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request. event:0x4e046 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L21_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a data side request. event:0x3e046 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L21_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a data side request. event:0x1e04e counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L2MISS : A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a data side request. event:0x3e040 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST : A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a data side request. event:0x4e040 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L2_DISP_CONFLICT_OTHER : A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a data side request. event:0x2e040 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_L2_MEPF : A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request. event:0x1e040 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L2_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request. event:0x4e042 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L3 : A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request. event:0x4e044 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_ECO_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a data side request. event:0x3e044 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_ECO_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data side request. event:0x2e044 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a data side request. event:0x1e046 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data side request. event:0x4e04e counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L3MISS : A Page Table Entry was loaded into the TLB from a localtion other than the local core's L3 due to a data side request. event:0x3e042 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L3_DISP_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request. event:0x2e042 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_L3_MEPF : A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request. event:0x1e044 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L3_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request. event:0x1e04c counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_LL4 : A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request. event:0x2e048 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_LMEM : A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request. event:0x2e04c counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_MEMORY : A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request. event:0x4e04a counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_OFF_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request. event:0x1e048 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_ON_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request. event:0x2e046 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_RL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. event:0x1e04a counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_RL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. event:0x2e04a counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_RL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request. event:0x3e04a counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_RMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a data side request. event:0xd094 counters:0,1,2,3 um:zero minimum:10000 name:PM_DSLB_MISS : Data SLB Miss - Total of all segment sizesData SLB misses event:0x1c058 counters:0 um:zero minimum:10000 name:PM_DTLB_MISS_16G : Data TLB Miss page size 16G. event:0x4c056 counters:3 um:zero minimum:10000 name:PM_DTLB_MISS_16M : Data TLB Miss page size 16M. event:0x2c056 counters:1 um:zero minimum:10000 name:PM_DTLB_MISS_4K : Data TLB Miss page size 4k. event:0x3c056 counters:2 um:zero minimum:10000 name:PM_DTLB_MISS_64K : Data TLB Miss page size 64K. event:0x50a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_EAT_FORCE_MISPRED : XL-form branch was mispredicted due to the predicted target address missing from EAT. The EAT forces a mispredict in this case since there is no predicated target to validate. This is a rare case that may occur when the EAT is full and a branch is event:0x4084 counters:0,1,2,3 um:zero minimum:10000 name:PM_EAT_FULL_CYC : Cycles No room in EATSet on bank conflict and case where no ibuffers available. event:0x2080 counters:0,1,2,3 um:zero minimum:10000 name:PM_EE_OFF_EXT_INT : Ee off and external interrupt event:0x20b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_FAV_TBEGIN : Dispatch time Favored tbegin event:0xa0ae counters:0,1,2,3 um:zero minimum:10000 name:PM_FLOP_SUM_SCALAR : flops summary scalar instructions event:0xa0ac counters:0,1,2,3 um:zero minimum:10000 name:PM_FLOP_SUM_VEC : flops summary vector instructions event:0x2084 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_BR_MPRED : Flush caused by branch mispredict event:0x30012 counters:2 um:zero minimum:10000 name:PM_FLUSH_COMPLETION : Completion Flush. event:0x2082 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP : Dispatch flush event:0x208c counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP_SB : Dispatch Flush: Scoreboard event:0x2088 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP_SYNC : Dispatch Flush: Sync event:0x208a counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP_TLBIE : Dispatch Flush: TLBIE event:0x208e counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_LSU : Flush initiated by LSU event:0x2086 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_PARTIAL : Partial flush event:0xa0b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_FPU0_FCONV : Convert instruction executed event:0xa0b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_FPU0_FEST : Estimate instruction executed event:0xa0b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_FPU0_FRSP : Round to single precision instruction executed event:0xa0b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_FPU1_FCONV : Convert instruction executed event:0xa0ba counters:0,1,2,3 um:zero minimum:10000 name:PM_FPU1_FEST : Estimate instruction executed event:0xa0b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_FPU1_FRSP : Round to single precision instruction executed event:0x3000c counters:2 um:zero minimum:10000 name:PM_FREQ_DOWN : Frequency is being slewed down due to Power Management. event:0x4000c counters:3 um:zero minimum:10000 name:PM_FREQ_UP : Frequency is being slewed up due to Power Management. event:0x50b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_TOC_GRP0_1 : One pair of instructions fused with TOC in Group0 event:0x50ae counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_TOC_GRP0_2 : Two pairs of instructions fused with TOCin Group0 event:0x50ac counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_TOC_GRP0_3 : Three pairs of instructions fused with TOC in Group0 event:0x50b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_TOC_GRP1_1 : One pair of instructions fused with TOX in Group1 event:0x50b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_VSX_GRP0_1 : One pair of instructions fused with VSX in Group0 event:0x50b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_VSX_GRP0_2 : Two pairs of instructions fused with VSX in Group0 event:0x50b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_VSX_GRP0_3 : Three pairs of instructions fused with VSX in Group0 event:0x50ba counters:0,1,2,3 um:zero minimum:10000 name:PM_FUSION_VSX_GRP1_1 : One pair of instructions fused with VSX in Group1 event:0x3000e counters:2 um:zero minimum:10000 name:PM_FXU0_BUSY_FXU1_IDLE : fxu0 busy and fxu1 idle. event:0x10004 counters:0 um:zero minimum:10000 name:PM_FXU0_FIN : FXU0 Finished. event:0x4000e counters:3 um:zero minimum:10000 name:PM_FXU1_BUSY_FXU0_IDLE : fxu0 idle and fxu1 busy. . event:0x40004 counters:3 um:zero minimum:10000 name:PM_FXU1_FIN : FXU1 Finished. event:0x2000e counters:1 um:zero minimum:10000 name:PM_FXU_BUSY : fxu0 busy and fxu1 busy.. event:0x1000e counters:0 um:zero minimum:10000 name:PM_FXU_IDLE : fxu0 idle and fxu1 idle. event:0x20008 counters:1 um:zero minimum:10000 name:PM_GCT_EMPTY_CYC : No itags assigned either thread (GCT Empty). event:0x30a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_MERGE : Group dispatched on a merged GCT empty. GCT entries can be merged only within the same thread event:0x4d01e counters:3 um:zero minimum:10000 name:PM_GCT_NOSLOT_BR_MPRED : Gct empty for this thread due to branch mispred. event:0x4d01a counters:3 um:zero minimum:10000 name:PM_GCT_NOSLOT_BR_MPRED_ICMISS : Gct empty for this thread due to Icache Miss and branch mispred. event:0x2d01e counters:1 um:zero minimum:10000 name:PM_GCT_NOSLOT_DISP_HELD_ISSQ : Gct empty for this thread due to dispatch hold on this thread due to Issue q full. event:0x4d01c counters:3 um:zero minimum:10000 name:PM_GCT_NOSLOT_DISP_HELD_MAP : Gct empty for this thread due to dispatch hold on this thread due to Mapper full. event:0x2e010 counters:1 um:zero minimum:10000 name:PM_GCT_NOSLOT_DISP_HELD_OTHER : Gct empty for this thread due to dispatch hold on this thread due to sync. event:0x2d01c counters:1 um:zero minimum:10000 name:PM_GCT_NOSLOT_DISP_HELD_SRQ : Gct empty for this thread due to dispatch hold on this thread due to SRQ full. event:0x4e010 counters:3 um:zero minimum:10000 name:PM_GCT_NOSLOT_IC_L3MISS : Gct empty for this thread due to icach l3 miss. event:0x2d01a counters:1 um:zero minimum:10000 name:PM_GCT_NOSLOT_IC_MISS : Gct empty for this thread due to Icache Miss. event:0x20a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_UTIL_11_14_ENTRIES : GCT Utilization 11-14 entries event:0x20a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_UTIL_15_17_ENTRIES : GCT Utilization 15-17 entries event:0x20a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_UTIL_18_ENTRIES : GCT Utilization 18+ entries event:0x209c counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_UTIL_1_2_ENTRIES : GCT Utilization 1-2 entries event:0x209e counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_UTIL_3_6_ENTRIES : GCT Utilization 3-6 entries event:0x20a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_GCT_UTIL_7_10_ENTRIES : GCT Utilization 7-10 entries event:0x1000a counters:0 um:zero minimum:10000 name:PM_GRP_BR_MPRED_NONSPEC : Group experienced Non-speculative br mispredicct. event:0x30004 counters:2 um:zero minimum:100000 name:PM_GRP_CMPL : group completed. event:0x3000a counters:2 um:zero minimum:100000 name:PM_GRP_DISP : dispatch_success (Group Dispatched). event:0x1000c counters:0 um:zero minimum:10000 name:PM_GRP_IC_MISS_NONSPEC : Group experi enced Non-specu lative I cache miss. event:0x10130 counters:0 um:zero minimum:10000 name:PM_GRP_MRK : Instruction marked in idu. event:0x509c counters:0,1,2,3 um:zero minimum:10000 name:PM_GRP_NON_FULL_GROUP : GROUPs where we did not have 6 non branch instructions in the group(ST mode), in SMT mode 3 non branches event:0x20050 counters:1 um:zero minimum:10000 name:PM_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate). event:0x20052 counters:1 um:zero minimum:10000 name:PM_GRP_PUMP_MPRED : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro event:0x10052 counters:0 um:zero minimum:10000 name:PM_GRP_PUMP_MPRED_RTY : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate). event:0x50a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_GRP_TERM_2ND_BRANCH : There were enough instructions in the Ibuffer, but 2nd branch ends group event:0x50a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_GRP_TERM_FPU_AFTER_BR : There were enough instructions in the Ibuffer, but FPU OP IN same group after a branch terminates a group, cant do partial flushes event:0x509e counters:0,1,2,3 um:zero minimum:10000 name:PM_GRP_TERM_NOINST : Do not fill every slot in the group, Not enough instructions in the Ibuffer. This includes cases where the group started with enough instructions, but some got knocked out by a cache miss or branch redirect (which would also empty the Ibuffer). event:0x50a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_GRP_TERM_OTHER : There were enough instructions in the Ibuffer, but the group terminated early for some other reason, most likely due to a First or Last. event:0x50a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_GRP_TERM_SLOT_LIMIT : There were enough instructions in the Ibuffer, but 3 src RA/RB/RC , 2 way crack caused a group termination event:0x2000a counters:1 um:zero minimum:10000 name:PM_HV_CYC : cycles in hypervisor mode . event:0x4086 counters:0,1,2,3 um:zero minimum:10000 name:PM_IBUF_FULL_CYC : Cycles No room in ibufffully qualified tranfer (if5 valid). event:0x10018 counters:0 um:zero minimum:10000 name:PM_IC_DEMAND_CYC : Demand ifetch pending. event:0x4098 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_DEMAND_L2_BHT_REDIRECT : L2 I cache demand request due to BHT redirect, branch redirect ( 2 bubbles 3 cycles) event:0x409a counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_DEMAND_L2_BR_REDIRECT : L2 I cache demand request due to branch Mispredict ( 15 cycle path) event:0x4088 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_DEMAND_REQ : Demand Instruction fetch request event:0x508a counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_INVALIDATE : Ic line invalidated event:0x4092 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_CANCEL_HIT : Prefetch Canceled due to icache hit event:0x4094 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_CANCEL_L2 : L2 Squashed request event:0x4090 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_CANCEL_PAGE : Prefetch Canceled due to page boundary event:0x408a counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_REQ : Instruction prefetch requests event:0x408e counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_WRITE : Instruction prefetch written into IL1 event:0x4096 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_RELOAD_PRIVATE : Reloading line was brought in private for a specific thread. Most lines are brought in shared for all eight thrreads. If RA does not match then invalidates and then brings it shared to other thread. In P7 line brought in private , then line was inv event:0x4006a counters:3 um:zero minimum:10000 name:PM_IERAT_RELOAD_16M : IERAT Reloaded (Miss) for a 16M page. event:0x20064 counters:1 um:zero minimum:10000 name:PM_IERAT_RELOAD_4K : IERAT Reloaded (Miss) for a 4k page. event:0x3006a counters:2 um:zero minimum:10000 name:PM_IERAT_RELOAD_64K : IERAT Reloaded (Miss) for a 64k page. event:0x3405e counters:2 um:zero minimum:10000 name:PM_IFETCH_THROTTLE : Cycles instruction fecth was throttled in IFU. event:0x5088 counters:0,1,2,3 um:zero minimum:10000 name:PM_IFU_L2_TOUCH : L2 touch to update MRU on a line event:0x514050 counters:0 um:zero minimum:10000 name:PM_INST_ALL_CHIP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for an instruction fetch event:0x544048 counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_DL2L3_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x534048 counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_DL2L3_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x53404c counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_DL4 : The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x54404c counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_DMEM : The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x514042 counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_L2 : The processor's Instruction cache was reloaded from local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x544046 counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_L21_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x534046 counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_L21_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x51404e counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_L2MISS : The processor's Instruction cache was reloaded from a localtion other than the local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x534040 counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_L2_DISP_CONFLICT_LDHITST : The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x544040 counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_L2_DISP_CONFLICT_OTHER : The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x524040 counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_L2_MEPF : The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x514040 counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_L2_NO_CONFLICT : The processor's Instruction cache was reloaded from local core's L2 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x544042 counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_L3 : The processor's Instruction cache was reloaded from local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x544044 counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_L31_ECO_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x534044 counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_L31_ECO_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x524044 counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_L31_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x514046 counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_L31_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x54404e counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_L3MISS_MOD : The processor's Instruction cache was reloaded from a localtion other than the local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x534042 counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_L3_DISP_CONFLICT : The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x524042 counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_L3_MEPF : The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x514044 counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_L3_NO_CONFLICT : The processor's Instruction cache was reloaded from local core's L3 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x51404c counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_LL4 : The processor's Instruction cache was reloaded from the local chip's L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x524048 counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_LMEM : The processor's Instruction cache was reloaded from the local chip's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x52404c counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_MEMORY : The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x54404a counters:3 um:zero minimum:10000 name:PM_INST_ALL_FROM_OFF_CHIP_CACHE : The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x514048 counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_ON_CHIP_CACHE : The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x524046 counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_RL2L3_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x51404a counters:0 um:zero minimum:10000 name:PM_INST_ALL_FROM_RL2L3_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x52404a counters:1 um:zero minimum:10000 name:PM_INST_ALL_FROM_RL4 : The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x53404a counters:2 um:zero minimum:10000 name:PM_INST_ALL_FROM_RMEM : The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 event:0x524050 counters:1 um:zero minimum:10000 name:PM_INST_ALL_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for an instruction fetch event:0x524052 counters:1 um:zero minimum:10000 name:PM_INST_ALL_GRP_PUMP_MPRED : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro event:0x514052 counters:0 um:zero minimum:10000 name:PM_INST_ALL_GRP_PUMP_MPRED_RTY : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor an instruction fetch event:0x514054 counters:0 um:zero minimum:10000 name:PM_INST_ALL_PUMP_CPRED : Pump prediction correct. Counts across all types of pumpsfor an instruction fetch event:0x544052 counters:3 um:zero minimum:10000 name:PM_INST_ALL_PUMP_MPRED : Pump Mis prediction Counts across all types of pumpsfor an instruction fetch event:0x534050 counters:2 um:zero minimum:10000 name:PM_INST_ALL_SYS_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was system pump for an instruction fetch event:0x534052 counters:2 um:zero minimum:10000 name:PM_INST_ALL_SYS_PUMP_MPRED : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or event:0x544050 counters:3 um:zero minimum:10000 name:PM_INST_ALL_SYS_PUMP_MPRED_RTY : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for an instruction fetch event:0x14050 counters:0 um:zero minimum:10000 name:PM_INST_CHIP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for an instruction fetch. event:0x2 counters:0,1,2,3 um:zero minimum:100000 name:PM_INST_CMPL : PPC Instructions Finished (completed). event:0x44048 counters:3 um:zero minimum:10000 name:PM_INST_FROM_DL2L3_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x34048 counters:2 um:zero minimum:10000 name:PM_INST_FROM_DL2L3_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x3404c counters:2 um:zero minimum:10000 name:PM_INST_FROM_DL4 : The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x4404c counters:3 um:zero minimum:10000 name:PM_INST_FROM_DMEM : The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x4080 counters:0,1,2,3 um:zero minimum:10000 name:PM_INST_FROM_L1 : Instruction fetches from L1 event:0x14042 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L2 : The processor's Instruction cache was reloaded from local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x44046 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L21_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x34046 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L21_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x1404e counters:0 um:zero minimum:10000 name:PM_INST_FROM_L2MISS : The processor's Instruction cache was reloaded from a localtion other than the local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x34040 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L2_DISP_CONFLICT_LDHITST : The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x44040 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L2_DISP_CONFLICT_OTHER : The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x24040 counters:1 um:zero minimum:10000 name:PM_INST_FROM_L2_MEPF : The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x14040 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L2_NO_CONFLICT : The processor's Instruction cache was reloaded from local core's L2 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x44042 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L3 : The processor's Instruction cache was reloaded from local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x44044 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L31_ECO_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x34044 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L31_ECO_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x24044 counters:1 um:zero minimum:10000 name:PM_INST_FROM_L31_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x14046 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L31_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x4404e counters:3 um:zero minimum:10000 name:PM_INST_FROM_L3MISS_MOD : The processor's Instruction cache was reloaded from a localtion other than the local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x34042 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L3_DISP_CONFLICT : The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x24042 counters:1 um:zero minimum:10000 name:PM_INST_FROM_L3_MEPF : The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x14044 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L3_NO_CONFLICT : The processor's Instruction cache was reloaded from local core's L3 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x1404c counters:0 um:zero minimum:10000 name:PM_INST_FROM_LL4 : The processor's Instruction cache was reloaded from the local chip's L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x24048 counters:1 um:zero minimum:10000 name:PM_INST_FROM_LMEM : The processor's Instruction cache was reloaded from the local chip's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x2404c counters:1 um:zero minimum:10000 name:PM_INST_FROM_MEMORY : The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x4404a counters:3 um:zero minimum:10000 name:PM_INST_FROM_OFF_CHIP_CACHE : The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x14048 counters:0 um:zero minimum:10000 name:PM_INST_FROM_ON_CHIP_CACHE : The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x24046 counters:1 um:zero minimum:10000 name:PM_INST_FROM_RL2L3_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x1404a counters:0 um:zero minimum:10000 name:PM_INST_FROM_RL2L3_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x2404a counters:1 um:zero minimum:10000 name:PM_INST_FROM_RL4 : The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x3404a counters:2 um:zero minimum:10000 name:PM_INST_FROM_RMEM : The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1 . event:0x24050 counters:1 um:zero minimum:10000 name:PM_INST_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for an instruction fetch. event:0x24052 counters:1 um:zero minimum:10000 name:PM_INST_GRP_PUMP_MPRED : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro event:0x14052 counters:0 um:zero minimum:10000 name:PM_INST_GRP_PUMP_MPRED_RTY : Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor an instruction fetch. event:0x1003a counters:0 um:zero minimum:10000 name:PM_INST_IMC_MATCH_CMPL : IMC Match Count. event:0x30016 counters:2 um:zero minimum:10000 name:PM_INST_IMC_MATCH_DISP : IMC Matches dispatched. event:0x14054 counters:0 um:zero minimum:10000 name:PM_INST_PUMP_CPRED : Pump prediction correct. Counts across all types of pumpsfor an instruction fetch. event:0x44052 counters:3 um:zero minimum:10000 name:PM_INST_PUMP_MPRED : Pump Mis prediction Counts across all types of pumpsfor an instruction fetch. event:0x34050 counters:2 um:zero minimum:10000 name:PM_INST_SYS_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was system pump for an instruction fetch. event:0x34052 counters:2 um:zero minimum:10000 name:PM_INST_SYS_PUMP_MPRED : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or event:0x44050 counters:3 um:zero minimum:10000 name:PM_INST_SYS_PUMP_MPRED_RTY : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for an instruction fetch. event:0x10014 counters:0 um:zero minimum:100000 name:PM_IOPS_CMPL : IOPS Completed. event:0x30014 counters:2 um:zero minimum:100000 name:PM_IOPS_DISP : IOPS dispatched. event:0x45048 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_DL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request. event:0x35048 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_DL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request. event:0x3504c counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_DL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a instruction side request. event:0x4504c counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_DMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a instruction side request. event:0x15042 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L2 : A Page Table Entry was loaded into the TLB from local core's L2 due to a instruction side request. event:0x45046 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L21_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a instruction side request. event:0x35046 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L21_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a instruction side request. event:0x1504e counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L2MISS : A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a instruction side request. event:0x35040 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L2_DISP_CONFLICT_LDHITST : A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a instruction side request. event:0x45040 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L2_DISP_CONFLICT_OTHER : A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a instruction side request. event:0x25040 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_L2_MEPF : A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a instruction side request. event:0x15040 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L2_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a instruction side request. event:0x45042 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L3 : A Page Table Entry was loaded into the TLB from local core's L3 due to a instruction side request. event:0x45044 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_ECO_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a instruction side request. event:0x35044 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_ECO_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a instruction side request. event:0x25044 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a instruction side request. event:0x15046 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a instruction side request. event:0x4504e counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L3MISS : A Page Table Entry was loaded into the TLB from a localtion other than the local core's L3 due to a instruction side request. event:0x35042 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L3_DISP_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a instruction side request. event:0x25042 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_L3_MEPF : A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a instruction side request. event:0x15044 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L3_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a instruction side request. event:0x1504c counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_LL4 : A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a instruction side request. event:0x25048 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_LMEM : A Page Table Entry was loaded into the TLB from the local chip's Memory due to a instruction side request. event:0x2504c counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_MEMORY : A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a instruction side request. event:0x4504a counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_OFF_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a instruction side request. event:0x15048 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_ON_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a instruction side request. event:0x25046 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_RL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request. event:0x1504a counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_RL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request. event:0x2504a counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_RL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a instruction side request. event:0x3504a counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_RMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a instruction side request. ## note 1 event:0x617082 counters:0 um:zero minimum:10000 name:PM_ISIDE_DISP : All i-side dispatch attempts ## note 1 event:0x627084 counters:1 um:zero minimum:10000 name:PM_ISIDE_DISP_FAIL : All i-side dispatch attempts that failed due to a addr collision with another machine ## note 1 event:0x627086 counters:1 um:zero minimum:10000 name:PM_ISIDE_DISP_FAIL_OTHER : All i-side dispatch attempts that failed due to a reason other than addrs collision event:0x4608e counters:3 um:zero minimum:10000 name:PM_ISIDE_L2MEMACC : valid when first beat of data comes in for an i-side fetch where data came from mem(or L4) ## note 1 event:0x44608e counters:3 um:zero minimum:10000 name:PM_ISIDE_MRU_TOUCH : Iside L2 MRU touch event:0xd096 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISLB_MISS : I SLB Miss. event:0x30ac counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_FX0 : FX0 ISU reject event:0x30ae counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_FX1 : FX1 ISU reject event:0x38ac counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REF_FXU : ISU event:0x30b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_LS0 : LS0 ISU reject event:0x30b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_LS1 : LS1 ISU reject event:0x30b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_LS2 : LS2 ISU reject event:0x30b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_LS3 : LS3 ISU reject event:0x309c counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJECTS_ALL : All isu rejects could be more than 1 per cycle event:0x30a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJECT_RES_NA : ISU reject due to resource not available event:0x309e counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJECT_SAR_BYPASS : Reject because of SAR bypass event:0x30a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJECT_SRC_NA : ISU reject due to source not available event:0x30a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_VS0 : VS0 ISU reject event:0x30aa counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_VS1 : VS1 ISU reject event:0x38a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU_REJ_VSU : ISU event:0x30b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISYNC : Isync count per thread event:0x200301ea counters:2 um:L1_latency minimum:10000 name:PM_L1MISS_LAT_EXC_1024 : Reload latency exceeded 1024 cyc event:0x200401ec counters:3 um:L1_latency minimum:10000 name:PM_L1MISS_LAT_EXC_2048 : Reload latency exceeded 2048 cyc event:0x200101e8 counters:0 um:L1_latency minimum:10000 name:PM_L1MISS_LAT_EXC_256 : Reload latency exceeded 256 cyc event:0x200201e6 counters:1 um:L1_latency minimum:10000 name:PM_L1MISS_LAT_EXC_32 : Reload latency exceeded 32 cyc event:0x26086 counters:1 um:zero minimum:10000 name:PM_L1PF_L2MEMACC : valid when first beat of data comes in for an L1pref where data came from mem(or L4) event:0x1002c counters:0 um:zero minimum:10000 name:PM_L1_DCACHE_RELOADED_ALL : L1 data cache reloaded for demand or prefetch . event:0x408c counters:0,1,2,3 um:zero minimum:10000 name:PM_L1_DEMAND_WRITE : Instruction Demand sectors wriittent into IL1 event:0x40012 counters:3 um:zero minimum:10000 name:PM_L1_ICACHE_RELOADED_ALL : Counts all Icache reloads includes demand, prefetchm prefetch turned into demand and demand turned into prefetch. event:0x30068 counters:2 um:zero minimum:10000 name:PM_L1_ICACHE_RELOADED_PREF : Counts all Icache prefetch reloads ( includes demand turned into prefetch). ## note 1 event:0x417080 counters:0 um:zero minimum:10000 name:PM_L2_CASTOUT_MOD : L2 Castouts - Modified (M, Mu, Me) ## note 1 event:0x417082 counters:0 um:zero minimum:10000 name:PM_L2_CASTOUT_SHR : L2 Castouts - Shared (T, Te, Si, S) event:0x27084 counters:1 um:zero minimum:10000 name:PM_L2_CHIP_PUMP : RC requests that were local on chip pump attempts ## note 1 event:0x427086 counters:1 um:zero minimum:10000 name:PM_L2_DC_INV : Dcache invalidates from L2 ## note 1 event:0x44608c counters:3 um:zero minimum:10000 name:PM_L2_DISP_ALL_L2MISS : All successful Ld/St dispatches for this thread that were an L2miss. ## note 1 event:0x64608e counters:3 um:zero minimum:10000 name:PM_L2_GROUP_PUMP : RC requests that were on Node Pump attempts ## note 1 event:0x626084 counters:1 um:zero minimum:10000 name:PM_L2_GRP_GUESS_CORRECT : L2 guess grp and guess was correct (data intra-6chip AND ^on-chip) ## note 1 event:0x626086 counters:1 um:zero minimum:10000 name:PM_L2_GRP_GUESS_WRONG : L2 guess grp and guess was not correct (ie data on-chip OR beyond-6chip) ## note 1 event:0x427084 counters:1 um:zero minimum:10000 name:PM_L2_IC_INV : Icache Invalidates from L2 ## note 1 event:0x436088 counters:2 um:zero minimum:10000 name:PM_L2_INST : All successful I-side dispatches for this thread (excludes i_l2mru_tch reqs) ## note 1 event:0x43608a counters:2 um:zero minimum:10000 name:PM_L2_INST_MISS : All successful i-side dispatches that were an L2miss for this thread (excludes i_l2mru_tch reqs) ## note 1 event:0x416080 counters:0 um:zero minimum:10000 name:PM_L2_LD : All successful D-side Load dispatches for this thread ## note 1 event:0x437088 counters:2 um:zero minimum:10000 name:PM_L2_LD_DISP : All successful load dispatches ## note 1 event:0x43708a counters:2 um:zero minimum:10000 name:PM_L2_LD_HIT : All successful load dispatches that were L2 hits ## note 1 event:0x426084 counters:1 um:zero minimum:10000 name:PM_L2_LD_MISS : All successful D-Side Load dispatches that were an L2miss for this thread ## note 1 event:0x616080 counters:0 um:zero minimum:10000 name:PM_L2_LOC_GUESS_CORRECT : L2 guess loc and guess was correct (ie data local) ## note 1 event:0x616082 counters:0 um:zero minimum:10000 name:PM_L2_LOC_GUESS_WRONG : L2 guess loc and guess was not correct (ie data not on chip) ## note 1 event:0x516080 counters:0 um:zero minimum:10000 name:PM_L2_RCLD_DISP : L2 RC load dispatch attempt ## note 1 event:0x516082 counters:0 um:zero minimum:10000 name:PM_L2_RCLD_DISP_FAIL_ADDR : L2 RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ ## note 1 event:0x526084 counters:1 um:zero minimum:10000 name:PM_L2_RCLD_DISP_FAIL_OTHER : L2 RC load dispatch attempt failed due to other reasons ## note 1 event:0x536088 counters:2 um:zero minimum:10000 name:PM_L2_RCST_DISP : L2 RC store dispatch attempt ## note 1 event:0x53608a counters:2 um:zero minimum:10000 name:PM_L2_RCST_DISP_FAIL_ADDR : L2 RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ ## note 1 event:0x54608c counters:3 um:zero minimum:10000 name:PM_L2_RCST_DISP_FAIL_OTHER : L2 RC store dispatch attempt failed due to other reasons ## note 1 event:0x537088 counters:2 um:zero minimum:10000 name:PM_L2_RC_ST_DONE : RC did st to line that was Tx or Sx ## note 1 event:0x63708a counters:2 um:zero minimum:10000 name:PM_L2_RTY_LD : RC retries on PB for any load from core event:0x3708a counters:2 um:zero minimum:10000 name:PM_L2_RTY_ST : RC retries on PB for any store from core ## note 1 event:0x54708c counters:3 um:zero minimum:10000 name:PM_L2_SN_M_RD_DONE : SNP dispatched for a read and was M ## note 1 event:0x54708e counters:3 um:zero minimum:10000 name:PM_L2_SN_M_WR_DONE : SNP dispatched for a write and was M ## note 1 event:0x53708a counters:2 um:zero minimum:10000 name:PM_L2_SN_SX_I_DONE : SNP dispatched and went from Sx or Tx to Ix event:0x17080 counters:0 um:zero minimum:10000 name:PM_L2_ST : All successful D-side store dispatches for this thread ## note 1 event:0x44708c counters:3 um:zero minimum:10000 name:PM_L2_ST_DISP : All successful store dispatches ## note 1 event:0x44708e counters:3 um:zero minimum:10000 name:PM_L2_ST_HIT : All successful store dispatches that were L2Hits event:0x17082 counters:0 um:zero minimum:10000 name:PM_L2_ST_MISS : All successful D-side store dispatches for this thread that were L2 Miss ## note 1 event:0x636088 counters:2 um:zero minimum:10000 name:PM_L2_SYS_GUESS_CORRECT : L2 guess sys and guess was correct (ie data beyond-6chip) ## note 1 event:0x63608a counters:2 um:zero minimum:10000 name:PM_L2_SYS_GUESS_WRONG : L2 guess sys and guess was not correct (ie data ^beyond-6chip) event:0x37088 counters:2 um:zero minimum:10000 name:PM_L2_SYS_PUMP : RC requests that were system pump attempts event:0x1e05e counters:0 um:zero minimum:10000 name:PM_L2_TM_REQ_ABORT : TM abort. event:0x3e05c counters:2 um:zero minimum:10000 name:PM_L2_TM_ST_ABORT_SISTER : TM marked store abort. ## note 1 event:0x23808a counters:2 um:zero minimum:10000 name:PM_L3_CINJ : l3 ci of cache inject ## note 1 event:0x128084 counters:1 um:zero minimum:10000 name:PM_L3_CI_HIT : L3 Castins Hit (total count ## note 1 event:0x128086 counters:1 um:zero minimum:10000 name:PM_L3_CI_MISS : L3 castins miss (total count event:0x819082 counters:0 um:zero minimum:10000 name:PM_L3_CI_USAGE : rotating sample of 16 CI or CO actives ## note 1 event:0x438088 counters:2 um:zero minimum:10000 name:PM_L3_CO : l3 castout occuring ( does not include casthrough or log writes (cinj/dmaw) event:0x83908b counters:2 um:zero minimum:10000 name:PM_L3_CO0_ALLOC : 0.0 event:0x83908a counters:2 um:zero minimum:10000 name:PM_L3_CO0_BUSY : lifetime, sample of CO machine 0 valid event:0x28086 counters:1 um:zero minimum:10000 name:PM_L3_CO_L31 : L3 CO to L3.1 OR of port 0 and 1 ( lossy) ## note 1 event:0x238088 counters:2 um:zero minimum:10000 name:PM_L3_CO_LCO : Total L3 castouts occurred on LCO event:0x28084 counters:1 um:zero minimum:10000 name:PM_L3_CO_MEM : L3 CO to memory OR of port 0 and 1 ( lossy) event:0x18082 counters:0 um:zero minimum:10000 name:PM_L3_CO_MEPF : L3 CO of line in Mep state ( includes casthrough) ## note 1 event:0xb19082 counters:0 um:zero minimum:10000 name:PM_L3_GRP_GUESS_CORRECT : Initial scope=group and data from same group (near) (pred successful) ## note 1 event:0xb3908a counters:2 um:zero minimum:10000 name:PM_L3_GRP_GUESS_WRONG_HIGH : Initial scope=group but data from local node. Predition too high ## note 1 event:0xb39088 counters:2 um:zero minimum:10000 name:PM_L3_GRP_GUESS_WRONG_LOW : Initial scope=group but data from outside group (far or rem). Prediction too Low ## note 1 event:0x218080 counters:0 um:zero minimum:10000 name:PM_L3_HIT : L3 Hits ## note 1 event:0x138088 counters:2 um:zero minimum:10000 name:PM_L3_L2_CO_HIT : L2 castout hits ## note 1 event:0x13808a counters:2 um:zero minimum:10000 name:PM_L3_L2_CO_MISS : L2 castout miss ## note 1 event:0x14808c counters:3 um:zero minimum:10000 name:PM_L3_LAT_CI_HIT : L3 Lateral Castins Hit ## note 1 event:0x14808e counters:3 um:zero minimum:10000 name:PM_L3_LAT_CI_MISS : L3 Lateral Castins Miss ## note 1 event:0x228084 counters:1 um:zero minimum:10000 name:PM_L3_LD_HIT : L3 demand LD Hits ## note 1 event:0x228086 counters:1 um:zero minimum:10000 name:PM_L3_LD_MISS : L3 demand LD Miss event:0x1e052 counters:0 um:zero minimum:10000 name:PM_L3_LD_PREF : L3 Load Prefetches. ## note 1 event:0xb19080 counters:0 um:zero minimum:10000 name:PM_L3_LOC_GUESS_CORRECT : initial scope=node/chip and data from local node (local) (pred successful) ## note 1 event:0xb29086 counters:1 um:zero minimum:10000 name:PM_L3_LOC_GUESS_WRONG : Initial scope=node but data from out side local node (near or far or rem). Prediction too Low ## note 1 event:0x218082 counters:0 um:zero minimum:10000 name:PM_L3_MISS : L3 Misses ## note 1 event:0x54808c counters:3 um:zero minimum:10000 name:PM_L3_P0_CO_L31 : l3 CO to L3.1 (lco) port 0 ## note 1 event:0x538088 counters:2 um:zero minimum:10000 name:PM_L3_P0_CO_MEM : l3 CO to memory port 0 ## note 1 event:0x929084 counters:1 um:zero minimum:10000 name:PM_L3_P0_CO_RTY : L3 CO received retry port 0 ## note 1 event:0xa29084 counters:1 um:zero minimum:10000 name:PM_L3_P0_GRP_PUMP : L3 pf sent with grp scope port 0 ## note 1 event:0x528084 counters:1 um:zero minimum:10000 name:PM_L3_P0_LCO_DATA : lco sent with data port 0 ## note 1 event:0x518080 counters:0 um:zero minimum:10000 name:PM_L3_P0_LCO_NO_DATA : dataless l3 lco sent port 0 ## note 1 event:0xa4908c counters:3 um:zero minimum:10000 name:PM_L3_P0_LCO_RTY : L3 LCO received retry port 0 ## note 1 event:0xa19080 counters:0 um:zero minimum:10000 name:PM_L3_P0_NODE_PUMP : L3 pf sent with nodal scope port 0 ## note 1 event:0x919080 counters:0 um:zero minimum:10000 name:PM_L3_P0_PF_RTY : L3 PF received retry port 0 ## note 1 event:0x939088 counters:2 um:zero minimum:10000 name:PM_L3_P0_SN_HIT : L3 snoop hit port 0 ## note 1 event:0x118080 counters:0 um:zero minimum:10000 name:PM_L3_P0_SN_INV : Port0 snooper detects someone doing a store to a line thats Sx ## note 1 event:0x94908c counters:3 um:zero minimum:10000 name:PM_L3_P0_SN_MISS : L3 snoop miss port 0 ## note 1 event:0xa39088 counters:2 um:zero minimum:10000 name:PM_L3_P0_SYS_PUMP : L3 pf sent with sys scope port 0 ## note 1 event:0x54808e counters:3 um:zero minimum:10000 name:PM_L3_P1_CO_L31 : l3 CO to L3.1 (lco) port 1 ## note 1 event:0x53808a counters:2 um:zero minimum:10000 name:PM_L3_P1_CO_MEM : l3 CO to memory port 1 ## note 1 event:0x929086 counters:1 um:zero minimum:10000 name:PM_L3_P1_CO_RTY : L3 CO received retry port 1 ## note 1 event:0xa29086 counters:1 um:zero minimum:10000 name:PM_L3_P1_GRP_PUMP : L3 pf sent with grp scope port 1 ## note 1 event:0x528086 counters:1 um:zero minimum:10000 name:PM_L3_P1_LCO_DATA : lco sent with data port 1 ## note 1 event:0x518082 counters:0 um:zero minimum:10000 name:PM_L3_P1_LCO_NO_DATA : dataless l3 lco sent port 1 ## note 1 event:0xa4908e counters:3 um:zero minimum:10000 name:PM_L3_P1_LCO_RTY : L3 LCO received retry port 1 ## note 1 event:0xa19082 counters:0 um:zero minimum:10000 name:PM_L3_P1_NODE_PUMP : L3 pf sent with nodal scope port 1 ## note 1 event:0x919082 counters:0 um:zero minimum:10000 name:PM_L3_P1_PF_RTY : L3 PF received retry port 1 ## note 1 event:0x93908a counters:2 um:zero minimum:10000 name:PM_L3_P1_SN_HIT : L3 snoop hit port 1 ## note 1 event:0x118082 counters:0 um:zero minimum:10000 name:PM_L3_P1_SN_INV : Port1 snooper detects someone doing a store to a line thats Sx ## note 1 event:0x94908e counters:3 um:zero minimum:10000 name:PM_L3_P1_SN_MISS : L3 snoop miss port 1 ## note 1 event:0xa3908a counters:2 um:zero minimum:10000 name:PM_L3_P1_SYS_PUMP : L3 pf sent with sys scope port 1 event:0x84908d counters:3 um:zero minimum:10000 name:PM_L3_PF0_ALLOC : 0.0 event:0x84908c counters:3 um:zero minimum:10000 name:PM_L3_PF0_BUSY : lifetime, sample of PF machine 0 valid ## note 1 event:0x428084 counters:1 um:zero minimum:10000 name:PM_L3_PF_HIT_L3 : l3 pf hit in l3 event:0x18080 counters:0 um:zero minimum:10000 name:PM_L3_PF_MISS_L3 : L3 Prefetch missed in L3 event:0x3808a counters:2 um:zero minimum:10000 name:PM_L3_PF_OFF_CHIP_CACHE : L3 Prefetch from Off chip cache event:0x4808e counters:3 um:zero minimum:10000 name:PM_L3_PF_OFF_CHIP_MEM : L3 Prefetch from Off chip memory event:0x38088 counters:2 um:zero minimum:10000 name:PM_L3_PF_ON_CHIP_CACHE : L3 Prefetch from On chip cache event:0x4808c counters:3 um:zero minimum:10000 name:PM_L3_PF_ON_CHIP_MEM : L3 Prefetch from On chip memory event:0x829084 counters:1 um:zero minimum:10000 name:PM_L3_PF_USAGE : rotating sample of 32 PF actives event:0x4e052 counters:3 um:zero minimum:10000 name:PM_L3_PREF_ALL : Total HW L3 prefetches(Load+store). event:0x84908f counters:3 um:zero minimum:10000 name:PM_L3_RD0_ALLOC : 0.0 event:0x84908e counters:3 um:zero minimum:10000 name:PM_L3_RD0_BUSY : lifetime, sample of RD machine 0 valid event:0x829086 counters:1 um:zero minimum:10000 name:PM_L3_RD_USAGE : rotating sample of 16 RD actives event:0x839089 counters:2 um:zero minimum:10000 name:PM_L3_SN0_ALLOC : 0.0 event:0x839088 counters:2 um:zero minimum:10000 name:PM_L3_SN0_BUSY : lifetime, sample of snooper machine 0 valid event:0x819080 counters:0 um:zero minimum:10000 name:PM_L3_SN_USAGE : rotating sample of 8 snoop valids event:0x2e052 counters:1 um:zero minimum:10000 name:PM_L3_ST_PREF : L3 store Prefetches. event:0x3e052 counters:2 um:zero minimum:10000 name:PM_L3_SW_PREF : Data stream touchto L3. ## note 1 event:0xb29084 counters:1 um:zero minimum:10000 name:PM_L3_SYS_GUESS_CORRECT : Initial scope=system and data from outside group (far or rem)(pred successful) ## note 1 event:0xb4908c counters:3 um:zero minimum:10000 name:PM_L3_SYS_GUESS_WRONG : Initial scope=system but data from local or near. Predction too high ## note 1 event:0x24808e counters:3 um:zero minimum:10000 name:PM_L3_TRANS_PF : L3 Transient prefetch event:0x18081 counters:0 um:zero minimum:10000 name:PM_L3_WI0_ALLOC : 0.0 ## note 1 event:0x418080 counters:0 um:zero minimum:10000 name:PM_L3_WI0_BUSY : lifetime, sample of Write Inject machine 0 valid ## note 1 event:0x418082 counters:0 um:zero minimum:10000 name:PM_L3_WI_USAGE : rotating sample of 8 WI actives event:0x3c058 counters:2 um:zero minimum:10000 name:PM_LARX_FIN : Larx finished . event:0x1002e counters:0 um:zero minimum:10000 name:PM_LD_CMPL : count of Loads completed. event:0x10062 counters:0 um:zero minimum:10000 name:PM_LD_L3MISS_PEND_CYC : Cycles L3 miss was pending for this thread. event:0x100ee counters:0 um:zero minimum:10000 name:PM_LD_REF_L1 : Load Ref count combined for all units. event:0xc080 counters:0,1,2,3 um:zero minimum:10000 name:PM_LD_REF_L1_LSU0 : LS0 L1 D cache load references counted at finish, gated by rejectLSU0 L1 D cache load references event:0xc082 counters:0,1,2,3 um:zero minimum:10000 name:PM_LD_REF_L1_LSU1 : LS1 L1 D cache load references counted at finish, gated by rejectLSU1 L1 D cache load references event:0xc094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LD_REF_L1_LSU2 : LS2 L1 D cache load references counted at finish, gated by reject42 event:0xc096 counters:0,1,2,3 um:zero minimum:10000 name:PM_LD_REF_L1_LSU3 : LS3 L1 D cache load references counted at finish, gated by reject42 event:0x509a counters:0,1,2,3 um:zero minimum:10000 name:PM_LINK_STACK_INVALID_PTR : A flush were LS ptr is invalid, results in a pop , A lot of interrupts between push and pops event:0x5098 counters:0,1,2,3 um:zero minimum:10000 name:PM_LINK_STACK_WRONG_ADD_PRED : Link stack predicts wrong address, because of link stack design limitation. event:0xe080 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_ERAT_MISS_PREF : LS0 Erat miss due to prefetch42 event:0xd0b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_L1_PREF : LS0 L1 cache data prefetches42 event:0xc098 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_L1_SW_PREF : Software L1 Prefetches, including SW Transient Prefetches42 event:0xe082 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_ERAT_MISS_PREF : LS1 Erat miss due to prefetch42 event:0xd0ba counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_L1_PREF : LS1 L1 cache data prefetches42 event:0xc09a counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_L1_SW_PREF : Software L1 Prefetches, including SW Transient Prefetches42 event:0xc0b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_FLUSH_LRQ : LS0 Flush: LRQLSU0 LRQ flushes event:0xc0b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_FLUSH_SRQ : LS0 Flush: SRQLSU0 SRQ lhs flushes event:0xc0a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_FLUSH_ULD : LS0 Flush: Unaligned LoadLSU0 unaligned load flushes event:0xc0ac counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_FLUSH_UST : LS0 Flush: Unaligned StoreLSU0 unaligned store flushes event:0xf088 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_L1_CAM_CANCEL : ls0 l1 tm cam cancel42 event:0x1e056 counters:0 um:zero minimum:10000 name:PM_LSU0_LARX_FIN : . event:0xd08c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_LMQ_LHR_MERGE : LS0 Load Merged with another cacheline request42 event:0xc08c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_NCLD : LS0 Non-cachable Loads counted at finishLSU0 non-cacheable loads event:0xe090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_PRIMARY_ERAT_HIT : Primary ERAT hit42 event:0x1e05a counters:0 um:zero minimum:10000 name:PM_LSU0_REJECT : LSU0 reject . event:0xc09c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_SRQ_STFWD : LS0 SRQ forwarded data to a loadLSU0 SRQ store forwarded event:0xf084 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_STORE_REJECT : ls0 store reject42 event:0xe0a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_TMA_REQ_L2 : addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42 event:0xe098 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_TM_L1_HIT : Load tm hit in L142 event:0xe0a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_TM_L1_MISS : Load tm L1 miss42 event:0xc0b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_FLUSH_LRQ : LS1 Flush: LRQLSU1 LRQ flushes event:0xc0ba counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_FLUSH_SRQ : LS1 Flush: SRQLSU1 SRQ lhs flushes event:0xc0a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_FLUSH_ULD : LS 1 Flush: Unaligned LoadLSU1 unaligned load flushes event:0xc0ae counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_FLUSH_UST : LS1 Flush: Unaligned StoreLSU1 unaligned store flushes event:0xf08a counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_L1_CAM_CANCEL : ls1 l1 tm cam cancel42 event:0x2e056 counters:1 um:zero minimum:10000 name:PM_LSU1_LARX_FIN : Larx finished in LSU pipe1. event:0xd08e counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_LMQ_LHR_MERGE : LS1 Load Merge with another cacheline request42 event:0xc08e counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_NCLD : LS1 Non-cachable Loads counted at finishLSU1 non-cacheable loads event:0xe092 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_PRIMARY_ERAT_HIT : Primary ERAT hit42 event:0x2e05a counters:1 um:zero minimum:10000 name:PM_LSU1_REJECT : LSU1 reject . event:0xc09e counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_SRQ_STFWD : LS1 SRQ forwarded data to a loadLSU1 SRQ store forwarded event:0xf086 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_STORE_REJECT : ls1 store reject42 event:0xe0aa counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_TMA_REQ_L2 : addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42 event:0xe09a counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_TM_L1_HIT : Load tm hit in L142 event:0xe0a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_TM_L1_MISS : Load tm L1 miss42 event:0xc0b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_FLUSH_LRQ : LS02Flush: LRQ42 event:0xc0bc counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_FLUSH_SRQ : LS2 Flush: SRQ42 event:0xc0a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_FLUSH_ULD : LS3 Flush: Unaligned Load42 event:0xf08c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_L1_CAM_CANCEL : ls2 l1 tm cam cancel42 event:0x3e056 counters:2 um:zero minimum:10000 name:PM_LSU2_LARX_FIN : Larx finished in LSU pipe2. event:0xc084 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_LDF : LS2 Scalar Loads42 event:0xc088 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_LDX : LS0 Vector Loads42 event:0xd090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_LMQ_LHR_MERGE : LS0 Load Merged with another cacheline request42 event:0xe094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_PRIMARY_ERAT_HIT : Primary ERAT hit42 event:0x3e05a counters:2 um:zero minimum:10000 name:PM_LSU2_REJECT : LSU2 reject . event:0xc0a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_SRQ_STFWD : LS2 SRQ forwarded data to a load42 event:0xe0ac counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_TMA_REQ_L2 : addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42 event:0xe09c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_TM_L1_HIT : Load tm hit in L142 event:0xe0a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_TM_L1_MISS : Load tm L1 miss42 event:0xc0b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_FLUSH_LRQ : LS3 Flush: LRQ42 event:0xc0be counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_FLUSH_SRQ : LS13 Flush: SRQ42 event:0xc0aa counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_FLUSH_ULD : LS 14Flush: Unaligned Load42 event:0xf08e counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_L1_CAM_CANCEL : ls3 l1 tm cam cancel42 event:0x4e056 counters:3 um:zero minimum:10000 name:PM_LSU3_LARX_FIN : Larx finished in LSU pipe3. event:0xc086 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_LDF : LS3 Scalar Loads 42 event:0xc08a counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_LDX : LS1 Vector Loads42 event:0xd092 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_LMQ_LHR_MERGE : LS1 Load Merge with another cacheline request42 event:0xe096 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_PRIMARY_ERAT_HIT : Primary ERAT hit42 event:0x4e05a counters:3 um:zero minimum:10000 name:PM_LSU3_REJECT : LSU3 reject . event:0xc0a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_SRQ_STFWD : LS3 SRQ forwarded data to a load42 event:0xe0ae counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_TMA_REQ_L2 : addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42 event:0xe09e counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_TM_L1_HIT : Load tm hit in L142 event:0xe0a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_TM_L1_MISS : Load tm L1 miss42 event:0xe880 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_ERAT_MISS_PREF : LSU event:0x30066 counters:2 um:zero minimum:10000 name:PM_LSU_FIN : LSU Finished an instruction (up to 2 per cycle). event:0xc8ac counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_UST : LSU event:0xd0a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FOUR_TABLEWALK_CYC : Cycles when four tablewalks pending on this thread42 event:0x10066 counters:0 um:zero minimum:10000 name:PM_LSU_FX_FIN : LSU Finished a FX operation (up to 2 per cycle. event:0xd8b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_L1_PREF : LSU event:0xc898 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_L1_SW_PREF : LSU event:0xc884 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LDF : LSU event:0xc888 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LDX : LSU event:0xd0a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LMQ_FULL_CYC : LMQ fullCycles LMQ full, event:0xd0a1 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LMQ_S0_ALLOC : 0.0 event:0xd0a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LMQ_S0_VALID : Slot 0 of LMQ validLMQ slot 0 valid event:0x3001c counters:2 um:zero minimum:10000 name:PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC : ALL threads lsu empty (lmq and srq empty). Issue HW016541 event:0x2003e counters:1 um:zero minimum:10000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC : LSU empty (lmq and srq empty). event:0xd09f counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LRQ_S0_ALLOC : 0.0 event:0xd09e counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LRQ_S0_VALID : Slot 0 of LRQ validLRQ slot 0 valid event:0xf091 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LRQ_S43_ALLOC : 0.0 event:0xf090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LRQ_S43_VALID : LRQ slot 43 was busy42 event:0x30162 counters:2 um:zero minimum:10000 name:PM_LSU_MRK_DERAT_MISS : DERAT Reloaded (Miss). event:0xc88c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_NCLD : LSU event:0xc092 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_NCST : Non-cachable Stores sent to nest42 event:0x10064 counters:0 um:zero minimum:10000 name:PM_LSU_REJECT : LSU Reject (up to 4 per cycle). event:0x2e05c counters:1 um:zero minimum:10000 name:PM_LSU_REJECT_ERAT_MISS : LSU Reject due to ERAT (up to 4 per cycles). event:0x4e05c counters:3 um:zero minimum:10000 name:PM_LSU_REJECT_LHS : LSU Reject due to LHS (up to 4 per cycle). event:0x1e05c counters:0 um:zero minimum:10000 name:PM_LSU_REJECT_LMQ_FULL : LSU reject due to LMQ full ( 4 per cycle). event:0xd082 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SET_MPRED : Line already in cache at reload time42 event:0x40008 counters:3 um:zero minimum:10000 name:PM_LSU_SRQ_EMPTY_CYC : All threads srq empty. event:0x1001a counters:0 um:zero minimum:10000 name:PM_LSU_SRQ_FULL_CYC : SRQ is Full. event:0xd09d counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SRQ_S0_ALLOC : 0.0 event:0xd09c counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SRQ_S0_VALID : Slot 0 of SRQ validSRQ slot 0 valid event:0xf093 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SRQ_S39_ALLOC : 0.0 event:0xf092 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SRQ_S39_VALID : SRQ slot 39 was busy42 event:0xd09b counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SRQ_SYNC : 0.0 event:0xd09a counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_SRQ_SYNC_CYC : A sync is in the SRQ (edge detect to count)SRQ sync duration event:0xf084 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_STORE_REJECT : LSU event:0xd0a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_TWO_TABLEWALK_CYC : Cycles when two tablewalks pending on this thread42 event:0x5094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LWSYNC : threaded version, IC Misses where we got EA dir hit but no sector valids were on. ICBI took line out event:0x209a counters:0,1,2,3 um:zero minimum:10000 name:PM_LWSYNC_HELD : LWSYNC held at dispatch event:0x4c058 counters:3 um:zero minimum:10000 name:PM_MEM_CO : Memory castouts from this lpar. event:0x10058 counters:0 um:zero minimum:10000 name:PM_MEM_LOC_THRESH_IFU : Local Memory above threshold for IFU speculation control. event:0x40056 counters:3 um:zero minimum:10000 name:PM_MEM_LOC_THRESH_LSU_HIGH : Local memory above threshold for LSU medium. event:0x1c05e counters:0 um:zero minimum:10000 name:PM_MEM_LOC_THRESH_LSU_MED : Local memory above theshold for data prefetch. event:0x2c058 counters:1 um:zero minimum:10000 name:PM_MEM_PREF : Memory prefetch for this lpar. event:0x10056 counters:0 um:zero minimum:10000 name:PM_MEM_READ : Reads from Memory from this lpar (includes data/inst/xlate/l1prefetch/inst prefetch). event:0x3c05e counters:2 um:zero minimum:10000 name:PM_MEM_RWITM : Memory rwitm for this lpar. event:0x3515e counters:2 um:zero minimum:100 name:PM_MRK_BACK_BR_CMPL : Marked branch instruction completed with a target address less than current instruction address. event:0x2013a counters:1 um:zero minimum:100 name:PM_MRK_BRU_FIN : bru marked instr finish. event:0x1016e counters:0 um:zero minimum:100 name:PM_MRK_BR_CMPL : Branch Instruction completed. event:0x3013a counters:2 um:zero minimum:100 name:PM_MRK_CRU_FIN : IFU non-branch marked instruction finished. event:0x4d148 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load. event:0x2d128 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_MOD_CYC : Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load. event:0x3d148 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load. event:0x2c128 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_SHR_CYC : Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load. event:0x3d14c counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL4 : The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a marked load. event:0x2c12c counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL4_CYC : Duration in cycles to reload from another chip's L4 on a different Node or Group (Distant) due to a marked load. event:0x4d14c counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_DMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a marked load. event:0x2d12c counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_DMEM_CYC : Duration in cycles to reload from another chip's memory on the same Node or Group (Distant) due to a marked load. event:0x1d142 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2 : The processor's data cache was reloaded from local core's L2 due to a marked load. event:0x4d146 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a marked load. event:0x2d126 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_MOD_CYC : Duration in cycles to reload with Modified (M) data from another core's L2 on the same chip due to a marked load. event:0x3d146 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a marked load. event:0x2c126 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_SHR_CYC : Duration in cycles to reload with Shared (S) data from another core's L2 on the same chip due to a marked load. event:0x4c12e counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2MISS_CYC : Duration in cycles to reload from a localtion other than the local core's L2 due to a marked load. event:0x4c122 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_CYC : Duration in cycles to reload from local core's L2 due to a marked load. event:0x3d140 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST : The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a marked load. event:0x2c120 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC : Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load. event:0x4d140 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER : The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a marked load. event:0x2d120 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER_CYC : Duration in cycles to reload from local core's L2 with dispatch conflict due to a marked load. event:0x2d140 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_MEPF : The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load. event:0x4d120 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_MEPF_CYC : Duration in cycles to reload from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load. event:0x1d140 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_NO_CONFLICT : The processor's data cache was reloaded from local core's L2 without conflict due to a marked load. event:0x4c120 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_NO_CONFLICT_CYC : Duration in cycles to reload from local core's L2 without conflict due to a marked load. event:0x4d142 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3 : The processor's data cache was reloaded from local core's L3 due to a marked load. event:0x4d144 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_MOD : The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a marked load. event:0x2d124 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_MOD_CYC : Duration in cycles to reload with Modified (M) data from another core's ECO L3 on the same chip due to a marked load. event:0x3d144 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_SHR : The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a marked load. event:0x2c124 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_SHR_CYC : Duration in cycles to reload with Shared (S) data from another core's ECO L3 on the same chip due to a marked load. event:0x2d144 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a marked load. event:0x4d124 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_MOD_CYC : Duration in cycles to reload with Modified (M) data from another core's L3 on the same chip due to a marked load. event:0x1d146 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a marked load. event:0x4c126 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_SHR_CYC : Duration in cycles to reload with Shared (S) data from another core's L3 on the same chip due to a marked load. event:0x2d12e counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3MISS_CYC : Duration in cycles to reload from a localtion other than the local core's L3 due to a marked load. event:0x2d122 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_CYC : Duration in cycles to reload from local core's L3 due to a marked load. event:0x3d142 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_DISP_CONFLICT : The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a marked load. event:0x2c122 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_DISP_CONFLICT_CYC : Duration in cycles to reload from local core's L3 with dispatch conflict due to a marked load. event:0x2d142 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_MEPF : The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load. event:0x4d122 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_MEPF_CYC : Duration in cycles to reload from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load. event:0x1d144 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_NO_CONFLICT : The processor's data cache was reloaded from local core's L3 without conflict due to a marked load. event:0x4c124 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_NO_CONFLICT_CYC : Duration in cycles to reload from local core's L3 without conflict due to a marked load. event:0x1d14c counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_LL4 : The processor's data cache was reloaded from the local chip's L4 cache due to a marked load. event:0x4c12c counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_LL4_CYC : Duration in cycles to reload from the local chip's L4 cache due to a marked load. event:0x2d148 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_LMEM : The processor's data cache was reloaded from the local chip's Memory due to a marked load. event:0x4d128 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_LMEM_CYC : Duration in cycles to reload from the local chip's Memory due to a marked load. event:0x2d14c counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_MEMORY : The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load. event:0x4d12c counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_MEMORY_CYC : Duration in cycles to reload from a memory location including L4 from local remote or distant due to a marked load. event:0x4d14a counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_OFF_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load. event:0x2d12a counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_OFF_CHIP_CACHE_CYC : Duration in cycles to reload either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load. event:0x1d148 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_ON_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a marked load. event:0x4c128 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_ON_CHIP_CACHE_CYC : Duration in cycles to reload either shared or modified data from another core's L2/L3 on the same chip due to a marked load. event:0x2d146 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load. event:0x4d126 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_MOD_CYC : Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load. event:0x1d14a counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load. event:0x4c12a counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_SHR_CYC : Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load. event:0x2d14a counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL4 : The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a marked load. event:0x4d12a counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL4_CYC : Duration in cycles to reload from another chip's L4 on the same Node or Group ( Remote) due to a marked load. event:0x3d14a counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_RMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a marked load. event:0x2c12a counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_RMEM_CYC : Duration in cycles to reload from another chip's memory on the same Node or Group ( Remote) due to a marked load. event:0x40118 counters:3 um:zero minimum:100 name:PM_MRK_DCACHE_RELOAD_INTV : Combined Intervention event. event:0x4d154 counters:3 um:zero minimum:100 name:PM_MRK_DERAT_MISS_16G : Marked Data ERAT Miss (Data TLB Access) page size 16G. event:0x3d154 counters:2 um:zero minimum:100 name:PM_MRK_DERAT_MISS_16M : Marked Data ERAT Miss (Data TLB Access) page size 16M. event:0x1d156 counters:0 um:zero minimum:100 name:PM_MRK_DERAT_MISS_4K : Marked Data ERAT Miss (Data TLB Access) page size 4K. event:0x2d154 counters:1 um:zero minimum:100 name:PM_MRK_DERAT_MISS_64K : Marked Data ERAT Miss (Data TLB Access) page size 64K. event:0x20132 counters:1 um:zero minimum:100 name:PM_MRK_DFU_FIN : Decimal Unit marked Instruction Finish. event:0x4f148 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request. event:0x3f148 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request. event:0x3f14c counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a marked data side request. event:0x4f14c counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a marked data side request. event:0x1f142 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2 : A Page Table Entry was loaded into the TLB from local core's L2 due to a marked data side request. event:0x4f146 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L21_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a marked data side request. event:0x3f146 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L21_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a marked data side request. event:0x1f14e counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2MISS : A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a marked data side request. event:0x3f140 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST : A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a marked data side request. event:0x4f140 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_OTHER : A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a marked data side request. event:0x2f140 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2_MEPF : A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked data side request. event:0x1f140 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a marked data side request. event:0x4f142 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3 : A Page Table Entry was loaded into the TLB from local core's L3 due to a marked data side request. event:0x4f144 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_ECO_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a marked data side request. event:0x3f144 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_ECO_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marked data side request. event:0x2f144 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a marked data side request. event:0x1f146 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a marked data side request. event:0x4f14e counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3MISS : A Page Table Entry was loaded into the TLB from a localtion other than the local core's L3 due to a marked data side request. event:0x3f142 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3_DISP_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a marked data side request. event:0x2f142 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3_MEPF : A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked data side request. event:0x1f144 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a marked data side request. event:0x1f14c counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_LL4 : A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a marked data side request. event:0x2f148 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_LMEM : A Page Table Entry was loaded into the TLB from the local chip's Memory due to a marked data side request. event:0x2f14c counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_MEMORY : A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a marked data side request. event:0x4f14a counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_OFF_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked data side request. event:0x1f148 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_ON_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a marked data side request. event:0x2f146 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request. event:0x1f14a counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request. event:0x2f14a counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a marked data side request. event:0x3f14a counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a marked data side request. event:0x1d158 counters:0 um:zero minimum:100 name:PM_MRK_DTLB_MISS_16G : Marked Data TLB Miss page size 16G. event:0x4d156 counters:3 um:zero minimum:100 name:PM_MRK_DTLB_MISS_16M : Marked Data TLB Miss page size 16M. event:0x2d156 counters:1 um:zero minimum:100 name:PM_MRK_DTLB_MISS_4K : Marked Data TLB Miss page size 4k. event:0x3d156 counters:2 um:zero minimum:100 name:PM_MRK_DTLB_MISS_64K : Marked Data TLB Miss page size 64K. event:0x40154 counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_BKILL : Marked store had to do a bkill. event:0x2f150 counters:1 um:zero minimum:100 name:PM_MRK_FAB_RSP_BKILL_CYC : cycles L2 RC took for a bkill. event:0x3015e counters:2 um:zero minimum:100 name:PM_MRK_FAB_RSP_CLAIM_RTY : Sampled store did a rwitm and got a rty. event:0x30154 counters:2 um:zero minimum:100 name:PM_MRK_FAB_RSP_DCLAIM : Marked store had to do a dclaim. event:0x2f152 counters:1 um:zero minimum:100 name:PM_MRK_FAB_RSP_DCLAIM_CYC : cycles L2 RC took for a dclaim. event:0x30156 counters:2 um:zero minimum:100 name:PM_MRK_FAB_RSP_MATCH : ttype and cresp matched as specified in MMCR1. event:0x4f152 counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_MATCH_CYC : cresp/ttype match cycles. event:0x4015e counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_RD_RTY : Sampled L2 reads retry count. event:0x1015e counters:0 um:zero minimum:100 name:PM_MRK_FAB_RSP_RD_T_INTV : Sampled Read got a T intervention. event:0x4f150 counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_RWITM_CYC : cycles L2 RC took for a rwitm. event:0x2015e counters:1 um:zero minimum:100 name:PM_MRK_FAB_RSP_RWITM_RTY : Sampled store did a rwitm and got a rty. event:0x3012e counters:2 um:zero minimum:100 name:PM_MRK_FILT_MATCH : Marked filter Match. event:0x1013c counters:0 um:zero minimum:100 name:PM_MRK_FIN_STALL_CYC : Marked instruction Finish Stall cycles (marked finish after NTC) (use edge detect to count #). event:0x20134 counters:1 um:zero minimum:100 name:PM_MRK_FXU_FIN : fxu marked instr finish. event:0x40130 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL : marked instruction finished (completed). event:0x4013a counters:3 um:zero minimum:100 name:PM_MRK_GRP_IC_MISS : Marked Group experienced I cache miss. event:0x3013c counters:2 um:zero minimum:100 name:PM_MRK_GRP_NTC : Marked group ntc cycles. event:0x20130 counters:1 um:zero minimum:100 name:PM_MRK_INST_DECODED : marked instruction decoded. Name from ISU? event:0x30130 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN : marked instr finish any unit . event:0x10132 counters:0 um:zero minimum:1000 name:PM_MRK_INST_ISSUED : Marked instruction issued. event:0x40134 counters:3 um:zero minimum:100 name:PM_MRK_INST_TIMEO : marked Instruction finish timeout (instruction lost). event:0x20114 counters:1 um:zero minimum:100 name:PM_MRK_L2_RC_DISP : Marked Instruction RC dispatched in L2. event:0x3012a counters:2 um:zero minimum:100 name:PM_MRK_L2_RC_DONE : Marked RC done. event:0x40116 counters:3 um:zero minimum:100 name:PM_MRK_LARX_FIN : Larx finished . event:0x1013f counters:0 um:zero minimum:100 name:PM_MRK_LD_MISS_EXPOSED : Marked Load exposed Miss (use edge detect to count #) event:0x1013e counters:0 um:zero minimum:100 name:PM_MRK_LD_MISS_EXPOSED_CYC : Marked Load exposed Miss (use edge detect to count #). event:0x4013e counters:3 um:zero minimum:100 name:PM_MRK_LD_MISS_L1_CYC : Marked ld latency. event:0x40132 counters:3 um:zero minimum:100 name:PM_MRK_LSU_FIN : lsu marked instr finish. event:0xd180 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH : Flush: (marked) : All Cases42 event:0xd188 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_LRQ : Flush: (marked) LRQMarked LRQ flushes event:0xd18a counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_SRQ : Flush: (marked) SRQMarked SRQ lhs flushes event:0xd184 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_ULD : Flush: (marked) Unaligned LoadMarked unaligned load flushes event:0xd186 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_UST : Flush: (marked) Unaligned StoreMarked unaligned store flushes event:0x40164 counters:3 um:zero minimum:100 name:PM_MRK_LSU_REJECT : LSU marked reject (up to 2 per cycle). event:0x30164 counters:2 um:zero minimum:100 name:PM_MRK_LSU_REJECT_ERAT_MISS : LSU marked reject due to ERAT (up to 2 per cycle). event:0x20112 counters:1 um:zero minimum:100 name:PM_MRK_NTF_FIN : Marked next to finish instruction finished. event:0x1d15e counters:0 um:zero minimum:1000 name:PM_MRK_RUN_CYC : Marked run cycles. event:0x1d15a counters:0 um:zero minimum:100 name:PM_MRK_SRC_PREF_TRACK_EFF : Marked src pref track was effective. event:0x3d15a counters:2 um:zero minimum:100 name:PM_MRK_SRC_PREF_TRACK_INEFF : Prefetch tracked was ineffective for marked src. event:0x4d15c counters:3 um:zero minimum:100 name:PM_MRK_SRC_PREF_TRACK_MOD : Prefetch tracked was moderate for marked src. event:0x1d15c counters:0 um:zero minimum:100 name:PM_MRK_SRC_PREF_TRACK_MOD_L2 : Marked src Prefetch Tracked was moderate (source L2). event:0x3d15c counters:2 um:zero minimum:100 name:PM_MRK_SRC_PREF_TRACK_MOD_L3 : Prefetch tracked was moderate (L3 hit) for marked src. event:0x3013e counters:2 um:zero minimum:100 name:PM_MRK_STALL_CMPLU_CYC : Marked Group Completion Stall cycles (use edge detect to count #). event:0x3e158 counters:2 um:zero minimum:100 name:PM_MRK_STCX_FAIL : marked stcx failed. event:0x30134 counters:2 um:zero minimum:100 name:PM_MRK_ST_CMPL_INT : marked store complete (data home) with intervention. event:0x3f150 counters:2 um:zero minimum:100 name:PM_MRK_ST_DRAIN_TO_L2DISP_CYC : cycles to drain st from core to L2. event:0x3012c counters:2 um:zero minimum:100 name:PM_MRK_ST_FWD : Marked st forwards. event:0x1f150 counters:0 um:zero minimum:100 name:PM_MRK_ST_L2DISP_TO_CMPL_CYC : cycles from L2 rc disp to l2 rc completion. event:0x20138 counters:1 um:zero minimum:100 name:PM_MRK_ST_NEST : Marked store sent to nest. event:0x1c15a counters:0 um:zero minimum:100 name:PM_MRK_TGT_PREF_TRACK_EFF : Marked target pref track was effective. event:0x3c15a counters:2 um:zero minimum:100 name:PM_MRK_TGT_PREF_TRACK_INEFF : Prefetch tracked was ineffective for marked target. event:0x4c15c counters:3 um:zero minimum:100 name:PM_MRK_TGT_PREF_TRACK_MOD : Prefetch tracked was moderate for marked target. event:0x1c15c counters:0 um:zero minimum:100 name:PM_MRK_TGT_PREF_TRACK_MOD_L2 : Marked target Prefetch Tracked was moderate (source L2). event:0x3c15c counters:2 um:zero minimum:100 name:PM_MRK_TGT_PREF_TRACK_MOD_L3 : Prefetch tracked was moderate (L3 hit) for marked target. event:0x30132 counters:2 um:zero minimum:100 name:PM_MRK_VSU_FIN : vsu (fpu) marked instr finish. event:0x3d15e counters:2 um:zero minimum:10000 name:PM_MULT_MRK : mult marked instr. event:0x20b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_NESTED_TEND : Completion time nested tend event:0x3006e counters:2 um:zero minimum:10000 name:PM_NEST_REF_CLK : Nest reference clocks. event:0x20b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_NON_FAV_TBEGIN : Dispatch time non favored tbegin ## note 1 event:0x328084 counters:1 um:zero minimum:10000 name:PM_NON_TM_RST_SC : non tm snp rst tm sc event:0x2001a counters:1 um:zero minimum:10000 name:PM_NTCG_ALL_FIN : Ccycles after all instructions have finished to group completed. event:0x20ac counters:0,1,2,3 um:zero minimum:10000 name:PM_OUTER_TBEGIN : Completion time outer tbegin event:0x20ae counters:0,1,2,3 um:zero minimum:10000 name:PM_OUTER_TEND : Completion time outer tend event:0x20010 counters:1 um:zero minimum:10000 name:PM_PMC1_OVERFLOW : Overflow from counter 1. event:0x30010 counters:2 um:zero minimum:10000 name:PM_PMC2_OVERFLOW : Overflow from counter 2. event:0x30020 counters:2 um:zero minimum:10000 name:PM_PMC2_REWIND : PMC2 Rewind Event (did not match condition). event:0x10022 counters:0 um:zero minimum:10000 name:PM_PMC2_SAVED : PMC2 Rewind Value saved (matched condition). event:0x40010 counters:3 um:zero minimum:10000 name:PM_PMC3_OVERFLOW : Overflow from counter 3. event:0x10010 counters:0 um:zero minimum:10000 name:PM_PMC4_OVERFLOW : Overflow from counter 4. event:0x10020 counters:0 um:zero minimum:10000 name:PM_PMC4_REWIND : PMC4 Rewind Event (did not match condition). event:0x30022 counters:2 um:zero minimum:10000 name:PM_PMC4_SAVED : PMC4 Rewind Value saved (matched condition). event:0x10024 counters:0 um:zero minimum:10000 name:PM_PMC5_OVERFLOW : Overflow from counter 5. event:0x30024 counters:2 um:zero minimum:10000 name:PM_PMC6_OVERFLOW : Overflow from counter 6. event:0x2005a counters:1 um:zero minimum:10000 name:PM_PREF_TRACKED : Total number of Prefetch Operations that were tracked. event:0x1005a counters:0 um:zero minimum:10000 name:PM_PREF_TRACK_EFF : Prefetch Tracked was effective. event:0x3005a counters:2 um:zero minimum:10000 name:PM_PREF_TRACK_INEFF : Prefetch tracked was ineffective. event:0x4005a counters:3 um:zero minimum:10000 name:PM_PREF_TRACK_MOD : Prefetch tracked was moderate. event:0x1005c counters:0 um:zero minimum:10000 name:PM_PREF_TRACK_MOD_L2 : Prefetch Tracked was moderate (source L2). event:0x3005c counters:2 um:zero minimum:10000 name:PM_PREF_TRACK_MOD_L3 : Prefetch tracked was moderate (L3). event:0x40014 counters:3 um:zero minimum:10000 name:PM_PROBE_NOP_DISP : ProbeNops dispatched. event:0xe084 counters:0,1,2,3 um:zero minimum:10000 name:PM_PTE_PREFETCH : PTE prefetches42 event:0x10054 counters:0 um:zero minimum:10000 name:PM_PUMP_CPRED : Pump prediction correct. Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate). event:0x40052 counters:3 um:zero minimum:10000 name:PM_PUMP_MPRED : Pump Mis prediction Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate). event:0x16081 counters:0 um:zero minimum:10000 name:PM_RC0_ALLOC : 0.0 event:0x16080 counters:0 um:zero minimum:10000 name:PM_RC0_BUSY : RC mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point) event:0x200301ea counters:2 um:rc_machine minimum:10000 name:PM_RC_LIFETIME_EXC_1024 : Reload latency exceeded 1024 cyc event:0x200401ec counters:3 um:rc_machine minimum:10000 name:PM_RC_LIFETIME_EXC_2048 : Threshold counter exceeded a value of 2048 event:0x200101e8 counters:0 um:rc_machine minimum:10000 name:PM_RC_LIFETIME_EXC_256 : Threshold counter exceed a count of 256 event:0x200201e6 counters:1 um:rc_machine minimum:10000 name:PM_RC_LIFETIME_EXC_32 : Reload latency exceeded 32 cyc event:0x36088 counters:2 um:zero minimum:10000 name:PM_RC_USAGE : Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 RC machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running ## note 1 event:0x34808e counters:3 um:zero minimum:10000 name:PM_RD_CLEARING_SC : rd clearing sc ## note 1 event:0x34808c counters:3 um:zero minimum:10000 name:PM_RD_FORMING_SC : rd forming sc ## note 1 event:0x428086 counters:1 um:zero minimum:10000 name:PM_RD_HIT_PF : rd machine hit l3 pf machine event:0x20004 counters:1 um:zero minimum:10000 name:PM_REAL_SRQ_FULL : Out of real srq entries. event:0x3006c counters:2 um:zero minimum:10000 name:PM_RUN_CYC_SMT2_MODE : Cycles run latch is set and core is in SMT2 mode. event:0x2006a counters:1 um:zero minimum:10000 name:PM_RUN_CYC_SMT2_SHRD_MODE : Cycles run latch is set and core is in SMT2-shared mode. event:0x1006a counters:0 um:zero minimum:100000 name:PM_RUN_CYC_SMT2_SPLIT_MODE : Cycles run latch is set and core is in SMT2-split mode. event:0x2006c counters:1 um:zero minimum:10000 name:PM_RUN_CYC_SMT4_MODE : Cycles run latch is set and core is in SMT4 mode. event:0x4006c counters:3 um:zero minimum:100000 name:PM_RUN_CYC_SMT8_MODE : Cycles run latch is set and core is in SMT8 mode. event:0x1006c counters:0 um:zero minimum:100000 name:PM_RUN_CYC_ST_MODE : Cycles run latch is set and core is in ST mode. event:0x10008 counters:0 um:zero minimum:10000 name:PM_RUN_SPURR : Run SPURR. event:0xf082 counters:0,1,2,3 um:zero minimum:10000 name:PM_SEC_ERAT_HIT : secondary ERAT Hit42 event:0x508c counters:0,1,2,3 um:zero minimum:10000 name:PM_SHL_CREATED : Store-Hit-Load Table Entry Created event:0x508e counters:0,1,2,3 um:zero minimum:10000 name:PM_SHL_ST_CONVERT : Store-Hit-Load Table Read Hit with entry Enabled event:0x5090 counters:0,1,2,3 um:zero minimum:10000 name:PM_SHL_ST_DISABLE : Store-Hit-Load Table Read Hit with entry Disabled (entry was disabled due to the entry shown to not prevent the flush) event:0x26085 counters:1 um:zero minimum:10000 name:PM_SN0_ALLOC : 0.0 event:0x26084 counters:1 um:zero minimum:10000 name:PM_SN0_BUSY : SN mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point) event:0xd0b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_SNOOP_TLBIE : TLBIE snoopSnoop TLBIE ## note 1 event:0x338088 counters:2 um:zero minimum:10000 name:PM_SNP_TM_HIT_M : snp tm st hit m mu ## note 1 event:0x33808a counters:2 um:zero minimum:10000 name:PM_SNP_TM_HIT_T : snp tm_st_hit t tn te event:0x4608c counters:3 um:zero minimum:10000 name:PM_SN_USAGE : Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 SN machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running event:0x10028 counters:0 um:zero minimum:10000 name:PM_STALL_END_GCT_EMPTY : Count ended because GCT went empty. event:0x1e058 counters:0 um:zero minimum:10000 name:PM_STCX_FAIL : stcx failed . event:0xc090 counters:0,1,2,3 um:zero minimum:10000 name:PM_STCX_LSU : STCX executed reported at sent to nest42 ## note 1 event:0x717080 counters:0 um:zero minimum:10000 name:PM_ST_CAUSED_FAIL : Non TM St caused any thread to fail event:0x20016 counters:1 um:zero minimum:10000 name:PM_ST_CMPL : Store completion count. event:0x20018 counters:1 um:zero minimum:10000 name:PM_ST_FWD : Store forwards that finished. event:0x0 counters:0,1,2,3 um:zero minimum:10000 name:PM_SUSPENDED : Counter OFF. event:0x3090 counters:0,1,2,3 um:zero minimum:10000 name:PM_SWAP_CANCEL : SWAP cancel , rtag not available event:0x3092 counters:0,1,2,3 um:zero minimum:10000 name:PM_SWAP_CANCEL_GPR : SWAP cancel , rtag not available for gpr event:0x308c counters:0,1,2,3 um:zero minimum:10000 name:PM_SWAP_COMPLETE : swap cast in completed event:0x308e counters:0,1,2,3 um:zero minimum:10000 name:PM_SWAP_COMPLETE_GPR : swap cast in completed fpr gpr event:0x15152 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_BR_LINK : Marked Branch and link branch that can cause a synchronous interrupt. event:0x1515c counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_BR_MPRED : Marked Branch mispredict that can cause a synchronous interrupt. event:0x15156 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_FX_DIVIDE : Marked fixed point divide that can cause a synchronous interrupt. event:0x15158 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_L2HIT : Marked L2 Hits that can throw a synchronous interrupt. event:0x1515a counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_L2MISS : Marked L2 Miss that can throw a synchronous interrupt. event:0x15154 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_L3MISS : Marked L3 misses that can throw a synchronous interrupt. event:0x15150 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_PROBE_NOP : Marked probeNops which can cause synchronous interrupts. event:0x30050 counters:2 um:zero minimum:10000 name:PM_SYS_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate). event:0x30052 counters:2 um:zero minimum:10000 name:PM_SYS_PUMP_MPRED : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or event:0x40050 counters:3 um:zero minimum:10000 name:PM_SYS_PUMP_MPRED_RTY : Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate). event:0x10026 counters:0 um:zero minimum:10000 name:PM_TABLEWALK_CYC : Tablewalk Active. event:0xe086 counters:0,1,2,3 um:zero minimum:10000 name:PM_TABLEWALK_CYC_PREF : tablewalk qualified for pte prefetches42 event:0x20b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_TABORT_TRECLAIM : Completion time tabortnoncd, tabortcd, treclaim event:0xe0ba counters:0,1,2,3 um:zero minimum:10000 name:PM_TEND_PEND_CYC : TEND latency per thread42 event:0x2000c counters:1 um:zero minimum:100000 name:PM_THRD_ALL_RUN_CYC : All Threads in Run_cycles (was both threads in run_cycles). event:0x10012 counters:0 um:zero minimum:10000 name:PM_THRD_GRP_CMPL_BOTH_CYC : Two threads finished same cycle (gated by run latch). event:0x40bc counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_0_1_CYC : Cycles thread running at priority level 0 or 1 event:0x40be counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_2_3_CYC : Cycles thread running at priority level 2 or 3 event:0x5080 counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_4_5_CYC : Cycles thread running at priority level 4 or 5 event:0x5082 counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_6_7_CYC : Cycles thread running at priority level 6 or 7 event:0x3098 counters:0,1,2,3 um:zero minimum:10000 name:PM_THRD_REBAL_CYC : cycles rebalance was active event:0x4016e counters:3 um:zero minimum:10000 name:PM_THRESH_NOT_MET : Threshold counter did not meet threshold. event:0x30058 counters:2 um:zero minimum:10000 name:PM_TLBIE_FIN : tlbie finished. event:0x20066 counters:1 um:zero minimum:10000 name:PM_TLB_MISS : TLB Miss (I + D). event:0x20b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_BEGIN_ALL : Tm any tbegin ## note 1 event:0x318082 counters:0 um:zero minimum:10000 name:PM_TM_CAM_OVERFLOW : l3 tm cam overflow during L2 co of SC ## note 1 event:0x74708c counters:3 um:zero minimum:10000 name:PM_TM_CAP_OVERFLOW : TM Footprint Capactiy Overflow event:0x20ba counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_END_ALL : Tm any tend event:0x3086 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_CONF_NON_TM : TEXAS fail reason @ completion event:0x3088 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_CON_TM : TEXAS fail reason @ completion event:0xe0b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_DISALLOW : TM fail disallow42 event:0x3084 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_FOOTPRINT_OVERFLOW : TEXAS fail reason @ completion event:0xe0b8 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_NON_TX_CONFLICT : Non transactional conflict from LSU whtver gets repoted to texas42 event:0x308a counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_SELF : TEXAS fail reason @ completion event:0xe0b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_TLBIE : TLBIE hit bloom filter42 event:0xe0b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_TX_CONFLICT : Transactional conflict from LSU, whatever gets reported to texas 42 ## note 1 event:0x727086 counters:1 um:zero minimum:10000 name:PM_TM_FAV_CAUSED_FAIL : TM Load (fav) caused another thread to fail ## note 1 event:0x717082 counters:0 um:zero minimum:10000 name:PM_TM_LD_CAUSED_FAIL : Non TM Ld caused any thread to fail ## note 1 event:0x727084 counters:1 um:zero minimum:10000 name:PM_TM_LD_CONF : TM Load (fav or non-fav) ran into conflict (failed) ## note 1 event:0x328086 counters:1 um:zero minimum:10000 name:PM_TM_RST_SC : tm snp rst tm sc ## note 1 event:0x318080 counters:0 um:zero minimum:10000 name:PM_TM_SC_CO : l3 castout tm Sc line ## note 1 event:0x73708a counters:2 um:zero minimum:10000 name:PM_TM_ST_CAUSED_FAIL : TM Store (fav or non-fav) caused another thread to fail ## note 1 event:0x737088 counters:2 um:zero minimum:10000 name:PM_TM_ST_CONF : TM Store (fav or non-fav) ran into conflict (failed) event:0x20bc counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_TBEGIN : Tm nested tbegin event:0x10060 counters:0 um:zero minimum:10000 name:PM_TM_TRANS_RUN_CYC : run cycles in transactional state. event:0x30060 counters:2 um:zero minimum:10000 name:PM_TM_TRANS_RUN_INST : Instructions completed in transactional state. event:0x3080 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_TRESUME : Tm resume event:0x20be counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_TSUSPEND : Tm suspend event:0x2e012 counters:1 um:zero minimum:10000 name:PM_TM_TX_PASS_RUN_CYC : run cycles spent in successful transactions. event:0x4e014 counters:3 um:zero minimum:10000 name:PM_TM_TX_PASS_RUN_INST : run instructions spent in successful transactions. event:0xe08c counters:0,1,2,3 um:zero minimum:10000 name:PM_UP_PREF_L3 : Micropartition prefetch42 event:0xe08e counters:0,1,2,3 um:zero minimum:10000 name:PM_UP_PREF_POINTER : Micrpartition pointer prefetches42 event:0xa0a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_16FLOP : Sixteen flops operation (SP vector versions of fdiv,fsqrt) event:0xa080 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_1FLOP : one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finishedDecode into 1,2,4 FLOP according to instr IOP, multiplied by #vector elements according to route( eg x1, x2, x4) Only if instr sends finish to ISU event:0xa098 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_2FLOP : two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions) event:0xa09c counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_4FLOP : four flops operation (scalar fdiv, fsqrt, DP vector version of fmadd, fnmadd, fmsub, fnmsub, SP vector versions of single flop instructions) event:0xa0a0 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_8FLOP : eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub) event:0xb0a4 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_COMPLEX_ISSUED : Complex VMX instruction issued event:0xb0b4 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_CY_ISSUED : Cryptographic instruction RFC02196 Issued event:0xb0a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_DD_ISSUED : 64BIT Decimal Issued event:0xa08c counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_DP_2FLOP : DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg event:0xa090 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_DP_FMA : DP vector version of fmadd,fnmadd,fmsub,fnmsub event:0xa094 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_DP_FSQRT_FDIV : DP vector versions of fdiv,fsqrt event:0xb0ac counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_DQ_ISSUED : 128BIT Decimal Issued event:0xb0b0 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_EX_ISSUED : Direct move 32/64b VRFtoGPR RFC02206 Issued event:0xa0bc counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_FIN : VSU0 Finished an instruction event:0xa084 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_FMA : two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only! event:0xb098 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_FPSCR : Move to/from FPSCR type instruction issued on Pipe 0 event:0xa088 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_FSQRT_FDIV : four flops operation (fdiv,fsqrt) Scalar Instructions only! event:0xb090 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_PERMUTE_ISSUED : Permute VMX Instruction Issued event:0xb088 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_SCALAR_DP_ISSUED : Double Precision scalar instruction issued on Pipe0 event:0xb094 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_SIMPLE_ISSUED : Simple VMX instruction issued event:0xa0a8 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_SINGLE : FPU single precision event:0xb09c counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_SQ : Store Vector Issued event:0xb08c counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_STF : FPU store (SP or DP) issued on Pipe0 event:0xb080 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_VECTOR_DP_ISSUED : Double Precision vector instruction issued on Pipe0 event:0xb084 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU0_VECTOR_SP_ISSUED : Single Precision vector instruction issued (executed) event:0xa0a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_16FLOP : Sixteen flops operation (SP vector versions of fdiv,fsqrt) event:0xa082 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_1FLOP : one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished event:0xa09a counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_2FLOP : two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions) event:0xa09e counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_4FLOP : four flops operation (scalar fdiv, fsqrt, DP vector version of fmadd, fnmadd, fmsub, fnmsub, SP vector versions of single flop instructions) event:0xa0a2 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_8FLOP : eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub) event:0xb0a6 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_COMPLEX_ISSUED : Complex VMX instruction issued event:0xb0b6 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_CY_ISSUED : Cryptographic instruction RFC02196 Issued event:0xb0aa counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_DD_ISSUED : 64BIT Decimal Issued event:0xa08e counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_DP_2FLOP : DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg event:0xa092 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_DP_FMA : DP vector version of fmadd,fnmadd,fmsub,fnmsub event:0xa096 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_DP_FSQRT_FDIV : DP vector versions of fdiv,fsqrt event:0xb0ae counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_DQ_ISSUED : 128BIT Decimal Issued event:0xb0b2 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_EX_ISSUED : Direct move 32/64b VRFtoGPR RFC02206 Issued event:0xa0be counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_FIN : VSU1 Finished an instruction event:0xa086 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_FMA : two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only! event:0xb09a counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_FPSCR : Move to/from FPSCR type instruction issued on Pipe 0 event:0xa08a counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_FSQRT_FDIV : four flops operation (fdiv,fsqrt) Scalar Instructions only! event:0xb092 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_PERMUTE_ISSUED : Permute VMX Instruction Issued event:0xb08a counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_SCALAR_DP_ISSUED : Double Precision scalar instruction issued on Pipe1 event:0xb096 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_SIMPLE_ISSUED : Simple VMX instruction issued event:0xa0aa counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_SINGLE : FPU single precision event:0xb09e counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_SQ : Store Vector Issued event:0xb08e counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_STF : FPU store (SP or DP) issued on Pipe1 event:0xb082 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_VECTOR_DP_ISSUED : Double Precision vector instruction issued on Pipe1 event:0xb086 counters:0,1,2,3 um:zero minimum:10000 name:PM_VSU1_VECTOR_SP_ISSUED : Single Precision vector instruction issued (executed) oprofile-1.3.0/events/ppc64/power8/unit_masks0000664000175000017500000000131112635014401016031 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2013. # Contributed by Maynard Johnson . # # ppc64 POWER8 possible unit masks # # NOTE: The 'rc_machine' and 'L1_latency' unit masks are for internal use only, # to workaround oprofile's 32-bit limitation for event codes. # See libpe_utils/op_pe_utils.cpp:_get_event_code for how these codes are # used. # name:zero type:mandatory default:0x0 0x0 No unit mask name:rc_machine type:mandatory default:0xde 0xde Thresholdable start/stop for rc machine for sampled instruction name:L1_latency type:mandatory default:0x67 0x67 Thresholdable start/stop for L1 sampled instruction load miss/reload oprofile-1.3.0/events/ppc64/architected_events_v1/0000775000175000017500000000000013323173530017046 500000000000000oprofile-1.3.0/events/ppc64/architected_events_v1/events0000664000175000017500000001323112546756165020236 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2013. # Contributed by Maynard Johnson . # # IBM Power Architected Events -- Version 1: Power ISA 2.07 # Manually add CYCLES for backward compatibility for default event event:0x100f0 counters:0 um:zero minimum:100000 name:CYCLES : Cycles event:0x100f2 counters:0 um:zero minimum:100000 name:PM_1PLUS_PPC_CMPL : 1 or more ppc insts finished (completed). event:0x400f2 counters:3 um:zero minimum:100000 name:PM_1PLUS_PPC_DISP : Cycles at least one Instr Dispatched. Could be a group with only microcode. Issue HW016521 event:0x100fa counters:0 um:zero minimum:100000 name:PM_ANY_THRD_RUN_CYC : Any thread in run_cycles (was one thread in run_cycles). event:0x400f6 counters:3 um:zero minimum:10000 name:PM_BR_MPRED_CMPL : Number of Branch Mispredicts. event:0x200fa counters:1 um:zero minimum:10000 name:PM_BR_TAKEN_CMPL : Branch Taken. event:0x1e counters:0,1,2,3 um:zero minimum:100000 name:PM_CYC : Cycles . event:0x200fe counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L2MISS : Demand LD - L2 Miss (not L2 hit). event:0x300fe counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L3MISS : Demand LD - L3 Miss (not L2 hit and not L3 hit). event:0x400fe counters:3 um:zero minimum:10000 name:PM_DATA_FROM_MEM : Data cache reload from memory (including L4). event:0x300fc counters:2 um:zero minimum:10000 name:PM_DTLB_MISS : Data PTEG Reloaded (DTLB Miss). event:0x200f8 counters:1 um:zero minimum:10000 name:PM_EXT_INT : external interrupt. event:0x100f4 counters:0 um:zero minimum:10000 name:PM_FLOP : Floating Point Operations Finished. event:0x400f8 counters:3 um:zero minimum:10000 name:PM_FLUSH : Flush (any type). event:0x100f8 counters:0 um:zero minimum:10000 name:PM_GCT_NOSLOT_CYC : Pipeline empty (No itags assigned , no GCT slots used). event:0x100f6 counters:0 um:zero minimum:10000 name:PM_IERAT_RELOAD : IERAT Reloaded (Miss). event:0x200f2 counters:1 um:zero minimum:100000 name:PM_INST_DISP : PPC Dispatched. event:0x300fa counters:2 um:zero minimum:10000 name:PM_INST_FROM_L3MISS : Inst from L3 miss. event:0x400fc counters:3 um:zero minimum:10000 name:PM_ITLB_MISS : ITLB Reloaded. event:0x300f6 counters:2 um:zero minimum:10000 name:PM_L1_DCACHE_RELOAD_VALID : DL1 reloaded due to Demand Load . event:0x200fd counters:1 um:zero minimum:10000 name:PM_L1_ICACHE_MISS : Demand iCache Miss. event:0x3e054 counters:2 um:zero minimum:10000 name:PM_LD_MISS_L1 : Load Missed L1. event:0x200f6 counters:1 um:zero minimum:10000 name:PM_LSU_DERAT_MISS : DERAT Reloaded (Miss). event:0x301e4 counters:2 um:zero minimum:100 name:PM_MRK_BR_MPRED_CMPL : Marked Branch Mispredicted. event:0x101e2 counters:0 um:zero minimum:100 name:PM_MRK_BR_TAKEN_CMPL : Marked Branch Taken. event:0x401e8 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2MISS : Data cache reload L2 miss. event:0x201e4 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3MISS : The processor's data cache was reloaded from a localtion other than the local core's L3 due to a marked load. event:0x201e0 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_MEM : The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load. event:0x301e6 counters:2 um:zero minimum:100 name:PM_MRK_DERAT_MISS : Erat Miss (TLB Access) All page sizes. event:0x401e4 counters:3 um:zero minimum:100 name:PM_MRK_DTLB_MISS : Marked dtlb miss. event:0x401e0 counters:3 um:zero minimum:100 name:PM_MRK_INST_CMPL : marked instruction completed. event:0x101e0 counters:0 um:zero minimum:100 name:PM_MRK_INST_DISP : Marked Instruction dispatched. event:0x401e6 counters:3 um:zero minimum:100 name:PM_MRK_INST_FROM_L3MISS : n/a event:0x101e4 counters:0 um:zero minimum:100 name:PM_MRK_L1_ICACHE_MISS : Marked L1 Icache Miss. event:0x101ea counters:0 um:zero minimum:100 name:PM_MRK_L1_RELOAD_VALID : Marked demand reload. event:0x201e2 counters:1 um:zero minimum:100 name:PM_MRK_LD_MISS_L1 : Marked DL1 Demand Miss counted at exec time. event:0x10134 counters:0 um:zero minimum:100 name:PM_MRK_ST_CMPL : Marked store completed. event:0x600f4 counters:5 um:zero minimum:100000 name:PM_RUN_CYC : Run_cycles. event:0x500fa counters:4 um:zero minimum:100000 name:PM_RUN_INST_CMPL : Run_Instructions. event:0x400f4 counters:3 um:zero minimum:10000 name:PM_RUN_PURR : Run_PURR. event:0x200f0 counters:1 um:zero minimum:10000 name:PM_ST_FIN : Store Instructions Finished (store sent to nest). event:0x300f0 counters:2 um:zero minimum:10000 name:PM_ST_MISS_L1 : Store Missed L1. event:0x300f8 counters:2 um:zero minimum:10000 name:PM_TB_BIT_TRANS : timebase event. event:0x300f4 counters:2 um:zero minimum:100000 name:PM_THRD_CONC_RUN_INST : Concurrent Run Instructions. event:0x301ea counters:2 um:zero minimum:1000 name:PM_THRESH_EXC_1024 : Threshold counter exceeded a value of 1024. event:0x401ea counters:3 um:zero minimum:1000 name:PM_THRESH_EXC_128 : Threshold counter exceeded a value of 128. event:0x401ec counters:3 um:zero minimum:1000 name:PM_THRESH_EXC_2048 : Threshold counter exceeded a value of 2048. event:0x101e8 counters:0 um:zero minimum:1000 name:PM_THRESH_EXC_256 : Threshold counter exceed a count of 256. event:0x201e6 counters:1 um:zero minimum:1000 name:PM_THRESH_EXC_32 : Threshold counter exceeded a value of 32. event:0x101e6 counters:0 um:zero minimum:1000 name:PM_THRESH_EXC_4096 : Threshold counter exceed a count of 4096. event:0x201e8 counters:1 um:zero minimum:1000 name:PM_THRESH_EXC_512 : Threshold counter exceeded a value of 512. event:0x301e8 counters:2 um:zero minimum:1000 name:PM_THRESH_EXC_64 : Threshold counter exceeded a value of 64. event:0x101ec counters:0 um:zero minimum:10000 name:PM_THRESH_MET : threshold exceeded. oprofile-1.3.0/events/ppc64/architected_events_v1/unit_masks0000664000175000017500000000037312534404406021073 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2013. # Contributed by Maynard Johnson . # # ppc64 compat mode version 1 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/970MP/0000775000175000017500000000000013323173530013351 500000000000000oprofile-1.3.0/events/ppc64/970MP/events0000664000175000017500000014536612534404406014541 00000000000000#PPC64 PowerPC970MP events # # Copyright OProfile authors # Copyright (c) International Business Machines, 2007. # Contributed by Dave Nomura . # # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously. # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:1 um:zero minimum:10000 name:CYCLES : Processor Cycles #Group 1 pm_slice0, Time Slice 0 event:0X0010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_slice0) Run cycles event:0X0011 counters:1 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles event:0X0012 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP1 : (Group 1 pm_slice0) Completion stopped event:0X0013 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_slice0) Instructions completed event:0X0014 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP1 : (Group 1 pm_slice0) One or more PPC instruction completed event:0X0015 counters:5 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles event:0X0016 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP1 : (Group 1 pm_slice0) Group completed event:0X0017 counters:7 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP1 : (Group 1 pm_slice0) Group dispatch rejected #Group 2 pm_eprof, Group for use with eprof event:0X0020 counters:0 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycles event:0X0021 counters:1 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycles event:0X0022 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP2 : (Group 2 pm_eprof) L1 D cache load misses event:0X0023 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP2 : (Group 2 pm_eprof) L1 D cache entries invalidated from L2 event:0X0024 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP2 : (Group 2 pm_eprof) Instructions dispatched event:0X0025 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP2 : (Group 2 pm_eprof) Instructions completed event:0X0026 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP2 : (Group 2 pm_eprof) L1 D cache store references event:0X0027 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP2 : (Group 2 pm_eprof) L1 D cache load references #Group 3 pm_basic, Basic performance indicators event:0X0030 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_basic) Instructions completed event:0X0031 counters:1 um:zero minimum:10000 name:PM_CYC_GRP3 : (Group 3 pm_basic) Processor cycles event:0X0032 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP3 : (Group 3 pm_basic) L1 D cache load misses event:0X0033 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP3 : (Group 3 pm_basic) L1 D cache entries invalidated from L2 event:0X0034 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP3 : (Group 3 pm_basic) Instructions dispatched event:0X0035 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_basic) Instructions completed event:0X0036 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP3 : (Group 3 pm_basic) L1 D cache store references event:0X0037 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP3 : (Group 3 pm_basic) L1 D cache load references #Group 4 pm_lsu, Information on the Load Store Unit event:0X0040 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP4 : (Group 4 pm_lsu) LRQ unaligned load flushes event:0X0041 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP4 : (Group 4 pm_lsu) SRQ unaligned store flushes event:0X0042 counters:2 um:zero minimum:10000 name:PM_CYC_GRP4 : (Group 4 pm_lsu) Processor cycles event:0X0043 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP4 : (Group 4 pm_lsu) Instructions completed event:0X0044 counters:4 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP4 : (Group 4 pm_lsu) SRQ flushes event:0X0045 counters:5 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP4 : (Group 4 pm_lsu) LRQ flushes event:0X0046 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP4 : (Group 4 pm_lsu) L1 D cache store references event:0X0047 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP4 : (Group 4 pm_lsu) L1 D cache load references #Group 5 pm_fpu1, Floating Point events event:0X0050 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP5 : (Group 5 pm_fpu1) FPU executed FDIV instruction event:0X0051 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP5 : (Group 5 pm_fpu1) FPU executed multiply-add instruction event:0X0052 counters:2 um:zero minimum:1000 name:PM_FPU_FEST_GRP5 : (Group 5 pm_fpu1) FPU executed FEST instruction event:0X0053 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP5 : (Group 5 pm_fpu1) FPU produced a result event:0X0054 counters:4 um:zero minimum:10000 name:PM_CYC_GRP5 : (Group 5 pm_fpu1) Processor cycles event:0X0055 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP5 : (Group 5 pm_fpu1) FPU executed FSQRT instruction event:0X0056 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP5 : (Group 5 pm_fpu1) Instructions completed event:0X0057 counters:7 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP5 : (Group 5 pm_fpu1) FPU executing FMOV or FEST instructions #Group 6 pm_fpu2, Floating Point events event:0X0060 counters:0 um:zero minimum:1000 name:PM_FPU_DENORM_GRP6 : (Group 6 pm_fpu2) FPU received denormalized data event:0X0061 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP6 : (Group 6 pm_fpu2) FPU stalled in pipe3 event:0X0062 counters:2 um:zero minimum:10000 name:PM_CYC_GRP6 : (Group 6 pm_fpu2) Processor cycles event:0X0063 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP6 : (Group 6 pm_fpu2) Instructions completed event:0X0064 counters:4 um:zero minimum:1000 name:PM_FPU_ALL_GRP6 : (Group 6 pm_fpu2) FPU executed add, mult, sub, cmp or sel instruction event:0X0065 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP6 : (Group 6 pm_fpu2) FPU executed store instruction event:0X0066 counters:6 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP6 : (Group 6 pm_fpu2) FPU executed FRSP or FCONV instructions event:0X0067 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP6 : (Group 6 pm_fpu2) LSU executed Floating Point load instruction #Group 7 pm_isu_rename, ISU Rename Pool Events event:0X0070 counters:0 um:zero minimum:1000 name:PM_XER_MAP_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles XER mapper full event:0X0071 counters:1 um:zero minimum:1000 name:PM_CR_MAP_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles CR logical operation mapper full event:0X0072 counters:2 um:zero minimum:1000 name:PM_CRQ_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles CR issue queue full event:0X0073 counters:3 um:zero minimum:1000 name:PM_GRP_DISP_BLK_SB_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles group dispatch blocked by scoreboard event:0X0074 counters:4 um:zero minimum:1000 name:PM_LR_CTR_MAP_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles LR/CTR mapper full event:0X0075 counters:5 um:zero minimum:1000 name:PM_INST_DISP_GRP7 : (Group 7 pm_isu_rename) Instructions dispatched event:0X0076 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP7 : (Group 7 pm_isu_rename) Instructions completed event:0X0077 counters:7 um:zero minimum:10000 name:PM_CYC_GRP7 : (Group 7 pm_isu_rename) Processor cycles #Group 8 pm_isu_queues1, ISU Rename Pool Events event:0X0080 counters:0 um:zero minimum:1000 name:PM_FPU0_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FPU0 issue queue full event:0X0081 counters:1 um:zero minimum:1000 name:PM_FPU1_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FPU1 issue queue full event:0X0082 counters:2 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FXU0/LS0 queue full event:0X0083 counters:3 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FXU1/LS1 queue full event:0X0084 counters:4 um:zero minimum:10000 name:PM_CYC_GRP8 : (Group 8 pm_isu_queues1) Processor cycles event:0X0085 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP8 : (Group 8 pm_isu_queues1) Instructions completed event:0X0086 counters:6 um:zero minimum:1000 name:PM_LSU_LRQ_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles LRQ full event:0X0087 counters:7 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles SRQ full #Group 9 pm_isu_flow, ISU Instruction Flow Events event:0X0090 counters:0 um:zero minimum:1000 name:PM_INST_DISP_GRP9 : (Group 9 pm_isu_flow) Instructions dispatched event:0X0091 counters:1 um:zero minimum:10000 name:PM_CYC_GRP9 : (Group 9 pm_isu_flow) Processor cycles event:0X0092 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP9 : (Group 9 pm_isu_flow) FXU0 produced a result event:0X0093 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP9 : (Group 9 pm_isu_flow) FXU1 produced a result event:0X0094 counters:4 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP9 : (Group 9 pm_isu_flow) Group dispatch valid event:0X0095 counters:5 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP9 : (Group 9 pm_isu_flow) Group dispatch rejected event:0X0096 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP9 : (Group 9 pm_isu_flow) Instructions completed event:0X0097 counters:7 um:zero minimum:10000 name:PM_CYC_GRP9 : (Group 9 pm_isu_flow) Processor cycles #Group 10 pm_isu_work, ISU Indicators of Work Blockage event:0X00A0 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP10 : (Group 10 pm_isu_work) Cycles GCT empty event:0X00A1 counters:1 um:zero minimum:1000 name:PM_WORK_HELD_GRP10 : (Group 10 pm_isu_work) Work held event:0X00A2 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP10 : (Group 10 pm_isu_work) Completion stopped event:0X00A3 counters:3 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP10 : (Group 10 pm_isu_work) Cycles MSR(EE) bit off and external interrupt pending event:0X00A4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP10 : (Group 10 pm_isu_work) Processor cycles event:0X00A5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP10 : (Group 10 pm_isu_work) Instructions completed event:0X00A6 counters:6 um:zero minimum:1000 name:PM_EE_OFF_GRP10 : (Group 10 pm_isu_work) Cycles MSR(EE) bit off event:0X00A7 counters:7 um:zero minimum:1000 name:PM_EXT_INT_GRP10 : (Group 10 pm_isu_work) External interrupts #Group 11 pm_fpu3, Floating Point events by unit event:0X00B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP11 : (Group 11 pm_fpu3) FPU0 executed FDIV instruction event:0X00B1 counters:1 um:zero minimum:1000 name:PM_FPU1_FDIV_GRP11 : (Group 11 pm_fpu3) FPU1 executed FDIV instruction event:0X00B2 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP11 : (Group 11 pm_fpu3) FPU0 executed FRSP or FCONV instructions event:0X00B3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP11 : (Group 11 pm_fpu3) FPU1 executed FRSP or FCONV instructions event:0X00B4 counters:4 um:zero minimum:1000 name:PM_FPU0_FMA_GRP11 : (Group 11 pm_fpu3) FPU0 executed multiply-add instruction event:0X00B5 counters:5 um:zero minimum:1000 name:PM_FPU1_FMA_GRP11 : (Group 11 pm_fpu3) FPU1 executed multiply-add instruction event:0X00B6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP11 : (Group 11 pm_fpu3) Instructions completed event:0X00B7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP11 : (Group 11 pm_fpu3) Processor cycles #Group 12 pm_fpu4, Floating Point events by unit event:0X00C0 counters:0 um:zero minimum:1000 name:PM_FPU0_FSQRT_GRP12 : (Group 12 pm_fpu4) FPU0 executed FSQRT instruction event:0X00C1 counters:1 um:zero minimum:1000 name:PM_FPU1_FSQRT_GRP12 : (Group 12 pm_fpu4) FPU1 executed FSQRT instruction event:0X00C2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP12 : (Group 12 pm_fpu4) FPU0 produced a result event:0X00C3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP12 : (Group 12 pm_fpu4) FPU1 produced a result event:0X00C4 counters:4 um:zero minimum:1000 name:PM_FPU0_ALL_GRP12 : (Group 12 pm_fpu4) FPU0 executed add, mult, sub, cmp or sel instruction event:0X00C5 counters:5 um:zero minimum:1000 name:PM_FPU1_ALL_GRP12 : (Group 12 pm_fpu4) FPU1 executed add, mult, sub, cmp or sel instruction event:0X00C6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP12 : (Group 12 pm_fpu4) Instructions completed event:0X00C7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP12 : (Group 12 pm_fpu4) Processor cycles #Group 13 pm_fpu5, Floating Point events by unit event:0X00D0 counters:0 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP13 : (Group 13 pm_fpu5) FPU0 received denormalized data event:0X00D1 counters:1 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP13 : (Group 13 pm_fpu5) FPU1 received denormalized data event:0X00D2 counters:2 um:zero minimum:1000 name:PM_FPU0_FMOV_FEST_GRP13 : (Group 13 pm_fpu5) FPU0 executed FMOV or FEST instructions event:0X00D3 counters:3 um:zero minimum:1000 name:PM_FPU1_FMOV_FEST_GRP13 : (Group 13 pm_fpu5) FPU1 executing FMOV or FEST instructions event:0X00D4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP13 : (Group 13 pm_fpu5) Processor cycles event:0X00D5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP13 : (Group 13 pm_fpu5) Instructions completed event:0X00D6 counters:6 um:zero minimum:1000 name:PM_FPU0_FEST_GRP13 : (Group 13 pm_fpu5) FPU0 executed FEST instruction event:0X00D7 counters:7 um:zero minimum:1000 name:PM_FPU1_FEST_GRP13 : (Group 13 pm_fpu5) FPU1 executed FEST instruction #Group 14 pm_fpu7, Floating Point events by unit event:0X00E0 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP14 : (Group 14 pm_fpu7) FPU0 stalled in pipe3 event:0X00E1 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP14 : (Group 14 pm_fpu7) FPU1 stalled in pipe3 event:0X00E2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP14 : (Group 14 pm_fpu7) FPU0 produced a result event:0X00E3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP14 : (Group 14 pm_fpu7) FPU1 produced a result event:0X00E4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP14 : (Group 14 pm_fpu7) Processor cycles event:0X00E5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP14 : (Group 14 pm_fpu7) Instructions completed event:0X00E6 counters:6 um:zero minimum:10000 name:PM_CYC_GRP14 : (Group 14 pm_fpu7) Processor cycles event:0X00E7 counters:7 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP14 : (Group 14 pm_fpu7) FPU0 executed FPSCR instruction #Group 15 pm_lsu_flush, LSU Flush Events event:0X00F0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP15 : (Group 15 pm_lsu_flush) LSU0 LRQ flushes event:0X00F1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP15 : (Group 15 pm_lsu_flush) LSU1 LRQ flushes event:0X00F2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_lsu_flush) Processor cycles event:0X00F3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_lsu_flush) Processor cycles event:0X00F4 counters:4 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP15 : (Group 15 pm_lsu_flush) LSU0 SRQ flushes event:0X00F5 counters:5 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP15 : (Group 15 pm_lsu_flush) LSU1 SRQ flushes event:0X00F6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_lsu_flush) Instructions completed event:0X00F7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_lsu_flush) Processor cycles #Group 16 pm_lsu_load1, LSU Load Events event:0X0100 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU0 unaligned load flushes event:0X0101 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU1 unaligned load flushes event:0X0102 counters:2 um:zero minimum:1000 name:PM_LD_REF_L1_LSU0_GRP16 : (Group 16 pm_lsu_load1) LSU0 L1 D cache load references event:0X0103 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_LSU1_GRP16 : (Group 16 pm_lsu_load1) LSU1 L1 D cache load references event:0X0104 counters:4 um:zero minimum:10000 name:PM_CYC_GRP16 : (Group 16 pm_lsu_load1) Processor cycles event:0X0105 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP16 : (Group 16 pm_lsu_load1) Instructions completed event:0X0106 counters:6 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP16 : (Group 16 pm_lsu_load1) LSU0 L1 D cache load misses event:0X0107 counters:7 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP16 : (Group 16 pm_lsu_load1) LSU1 L1 D cache load misses #Group 17 pm_lsu_store1, LSU Store Events event:0X0110 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU0 unaligned store flushes event:0X0111 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU1 unaligned store flushes event:0X0112 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP17 : (Group 17 pm_lsu_store1) LSU0 L1 D cache store references event:0X0113 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP17 : (Group 17 pm_lsu_store1) LSU1 L1 D cache store references event:0X0114 counters:4 um:zero minimum:10000 name:PM_CYC_GRP17 : (Group 17 pm_lsu_store1) Processor cycles event:0X0115 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP17 : (Group 17 pm_lsu_store1) Instructions completed event:0X0116 counters:6 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP17 : (Group 17 pm_lsu_store1) L1 D cache store misses event:0X0117 counters:7 um:zero minimum:1000 name:PM_DC_INV_L2_GRP17 : (Group 17 pm_lsu_store1) L1 D cache entries invalidated from L2 #Group 18 pm_lsu_store2, LSU Store Events event:0X0120 counters:0 um:zero minimum:1000 name:PM_LSU0_SRQ_STFWD_GRP18 : (Group 18 pm_lsu_store2) LSU0 SRQ store forwarded event:0X0121 counters:1 um:zero minimum:1000 name:PM_LSU1_SRQ_STFWD_GRP18 : (Group 18 pm_lsu_store2) LSU1 SRQ store forwarded event:0X0122 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP18 : (Group 18 pm_lsu_store2) LSU0 L1 D cache store references event:0X0123 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP18 : (Group 18 pm_lsu_store2) LSU1 L1 D cache store references event:0X0124 counters:4 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP18 : (Group 18 pm_lsu_store2) LSU0 busy event:0X0125 counters:5 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_lsu_store2) Processor cycles event:0X0126 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP18 : (Group 18 pm_lsu_store2) Instructions completed event:0X0127 counters:7 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_lsu_store2) Processor cycles #Group 19 pm_lsu7, Information on the Load Store Unit event:0X0130 counters:0 um:zero minimum:1000 name:PM_LSU0_DERAT_MISS_GRP19 : (Group 19 pm_lsu7) LSU0 DERAT misses event:0X0131 counters:1 um:zero minimum:1000 name:PM_LSU1_DERAT_MISS_GRP19 : (Group 19 pm_lsu7) LSU1 DERAT misses event:0X0132 counters:2 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles event:0X0133 counters:3 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles event:0X0134 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP19 : (Group 19 pm_lsu7) Instructions completed event:0X0135 counters:5 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles event:0X0136 counters:6 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP19 : (Group 19 pm_lsu7) L1 reload data source valid event:0X0137 counters:7 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles #Group 20 pm_misc, Misc Events for testing event:0X0140 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP20 : (Group 20 pm_misc) Cycles GCT empty event:0X0141 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP20 : (Group 20 pm_misc) Cycles LMQ and SRQ empty event:0X0142 counters:2 um:zero minimum:1000 name:PM_HV_CYC_GRP20 : (Group 20 pm_misc) Hypervisor Cycles event:0X0143 counters:3 um:zero minimum:10000 name:PM_CYC_GRP20 : (Group 20 pm_misc) Processor cycles event:0X0144 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP20 : (Group 20 pm_misc) One or more PPC instruction completed event:0X0145 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP20 : (Group 20 pm_misc) Instructions completed event:0X0146 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP20 : (Group 20 pm_misc) Group completed event:0X0147 counters:7 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP20 : (Group 20 pm_misc) Time Base bit transition #Group 21 pm_pe_bench1, PE Benchmarker group for FP analysis event:0X0150 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP21 : (Group 21 pm_pe_bench1) FPU executed FDIV instruction event:0X0151 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP21 : (Group 21 pm_pe_bench1) FPU executed multiply-add instruction event:0X0152 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP21 : (Group 21 pm_pe_bench1) FXU produced a result event:0X0153 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP21 : (Group 21 pm_pe_bench1) FPU produced a result event:0X0154 counters:4 um:zero minimum:10000 name:PM_CYC_GRP21 : (Group 21 pm_pe_bench1) Processor cycles event:0X0155 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP21 : (Group 21 pm_pe_bench1) FPU executed FSQRT instruction event:0X0156 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP21 : (Group 21 pm_pe_bench1) Instructions completed event:0X0157 counters:7 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP21 : (Group 21 pm_pe_bench1) FPU executing FMOV or FEST instructions #Group 22 pm_pe_bench4, PE Benchmarker group for L1 and TLB event:0X0160 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP22 : (Group 22 pm_pe_bench4) Data TLB misses event:0X0161 counters:1 um:zero minimum:1000 name:PM_ITLB_MISS_GRP22 : (Group 22 pm_pe_bench4) Instruction TLB misses event:0X0162 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache load misses event:0X0163 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache store misses event:0X0164 counters:4 um:zero minimum:10000 name:PM_CYC_GRP22 : (Group 22 pm_pe_bench4) Processor cycles event:0X0165 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP22 : (Group 22 pm_pe_bench4) Instructions completed event:0X0166 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache store references event:0X0167 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache load references #Group 23 pm_hpmcount1, Hpmcount group for L1 and TLB behavior event:0X0170 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP23 : (Group 23 pm_hpmcount1) Data TLB misses event:0X0171 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP23 : (Group 23 pm_hpmcount1) Cycles LMQ and SRQ empty event:0X0172 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache load misses event:0X0173 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache store misses event:0X0174 counters:4 um:zero minimum:10000 name:PM_CYC_GRP23 : (Group 23 pm_hpmcount1) Processor cycles event:0X0175 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP23 : (Group 23 pm_hpmcount1) Instructions completed event:0X0176 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache store references event:0X0177 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache load references #Group 24 pm_hpmcount2, Hpmcount group for computation event:0X0180 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP24 : (Group 24 pm_hpmcount2) FPU executed FDIV instruction event:0X0181 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP24 : (Group 24 pm_hpmcount2) FPU executed multiply-add instruction event:0X0182 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP24 : (Group 24 pm_hpmcount2) FPU0 produced a result event:0X0183 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP24 : (Group 24 pm_hpmcount2) FPU1 produced a result event:0X0184 counters:4 um:zero minimum:10000 name:PM_CYC_GRP24 : (Group 24 pm_hpmcount2) Processor cycles event:0X0185 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP24 : (Group 24 pm_hpmcount2) FPU executed store instruction event:0X0186 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP24 : (Group 24 pm_hpmcount2) Instructions completed event:0X0187 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP24 : (Group 24 pm_hpmcount2) LSU executed Floating Point load instruction #Group 25 pm_l1andbr, L1 misses and branch misspredict analysis event:0X0190 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP25 : (Group 25 pm_l1andbr) Instructions completed event:0X0191 counters:1 um:zero minimum:10000 name:PM_CYC_GRP25 : (Group 25 pm_l1andbr) Processor cycles event:0X0192 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP25 : (Group 25 pm_l1andbr) L1 D cache load misses event:0X0193 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP25 : (Group 25 pm_l1andbr) Branches issued event:0X0194 counters:4 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP25 : (Group 25 pm_l1andbr) LSU0 busy event:0X0195 counters:5 um:zero minimum:10000 name:PM_CYC_GRP25 : (Group 25 pm_l1andbr) Processor cycles event:0X0196 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP25 : (Group 25 pm_l1andbr) Branch mispredictions due to CR bit setting event:0X0197 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP25 : (Group 25 pm_l1andbr) Branch mispredictions due to target address #Group 26 pm_imix, Instruction mix: loads, stores and branches event:0X01A0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP26 : (Group 26 pm_imix) Instructions completed event:0X01A1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP26 : (Group 26 pm_imix) Processor cycles event:0X01A2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP26 : (Group 26 pm_imix) L1 D cache load misses event:0X01A3 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP26 : (Group 26 pm_imix) Branches issued event:0X01A4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP26 : (Group 26 pm_imix) Processor cycles event:0X01A5 counters:5 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP26 : (Group 26 pm_imix) LSU0 busy event:0X01A6 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP26 : (Group 26 pm_imix) L1 D cache store references event:0X01A7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP26 : (Group 26 pm_imix) L1 D cache load references #Group 27 pm_branch, SLB and branch misspredict analysis event:0X01B0 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP27 : (Group 27 pm_branch) Run cycles event:0X01B1 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP27 : (Group 27 pm_branch) Data SLB misses event:0X01B2 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP27 : (Group 27 pm_branch) Branches issued event:0X01B3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP27 : (Group 27 pm_branch) Branch mispredictions due to CR bit setting event:0X01B4 counters:4 um:zero minimum:1000 name:PM_ISLB_MISS_GRP27 : (Group 27 pm_branch) Instruction SLB misses event:0X01B5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP27 : (Group 27 pm_branch) Processor cycles event:0X01B6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP27 : (Group 27 pm_branch) Instructions completed event:0X01B7 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP27 : (Group 27 pm_branch) Branch mispredictions due to target address #Group 28 pm_data, data source and LMQ event:0X01C0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP28 : (Group 28 pm_data) Data loaded from L2 event:0X01C1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP28 : (Group 28 pm_data) Data loaded from memory event:0X01C2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_data) Instructions completed event:0X01C3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP28 : (Group 28 pm_data) Processor cycles event:0X01C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_data) Instructions completed event:0X01C5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP28 : (Group 28 pm_data) Processor cycles event:0X01C6 counters:6 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP28 : (Group 28 pm_data) LMQ slot 0 allocated event:0X01C7 counters:7 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP28 : (Group 28 pm_data) LMQ slot 0 valid #Group 29 pm_tlb, TLB and LRQ plus data prefetch event:0X01D0 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP29 : (Group 29 pm_tlb) Data TLB misses event:0X01D1 counters:1 um:zero minimum:1000 name:PM_ITLB_MISS_GRP29 : (Group 29 pm_tlb) Instruction TLB misses event:0X01D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP29 : (Group 29 pm_tlb) Instructions completed event:0X01D3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP29 : (Group 29 pm_tlb) Processor cycles event:0X01D4 counters:4 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP29 : (Group 29 pm_tlb) LRQ slot 0 allocated event:0X01D5 counters:5 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP29 : (Group 29 pm_tlb) LRQ slot 0 valid event:0X01D6 counters:6 um:zero minimum:1000 name:PM_L1_PREF_GRP29 : (Group 29 pm_tlb) L1 cache data prefetches event:0X01D7 counters:7 um:zero minimum:1000 name:PM_L2_PREF_GRP29 : (Group 29 pm_tlb) L2 cache prefetches #Group 30 pm_isource, inst source and tablewalk event:0X01E0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP30 : (Group 30 pm_isource) Instructions fetched from L2 event:0X01E1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP30 : (Group 30 pm_isource) Instruction fetched from memory event:0X01E2 counters:2 um:zero minimum:1000 name:PM_HV_CYC_GRP30 : (Group 30 pm_isource) Hypervisor Cycles event:0X01E3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP30 : (Group 30 pm_isource) Instructions completed event:0X01E4 counters:4 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP30 : (Group 30 pm_isource) Cycles doing data tablewalks event:0X01E5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP30 : (Group 30 pm_isource) Processor cycles event:0X01E6 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP30 : (Group 30 pm_isource) Group completed event:0X01E7 counters:7 um:zero minimum:1000 name:PM_DC_INV_L2_GRP30 : (Group 30 pm_isource) L1 D cache entries invalidated from L2 #Group 31 pm_sync, Sync and SRQ event:0X01F0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP31 : (Group 31 pm_sync) SRQ slot 0 allocated event:0X01F1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP31 : (Group 31 pm_sync) SRQ slot 0 valid event:0X01F2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP31 : (Group 31 pm_sync) L1 D cache load misses event:0X01F3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP31 : (Group 31 pm_sync) SRQ sync duration event:0X01F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_sync) Instructions completed event:0X01F5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_sync) Instructions completed event:0X01F6 counters:6 um:zero minimum:10000 name:PM_CYC_GRP31 : (Group 31 pm_sync) Processor cycles event:0X01F7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP31 : (Group 31 pm_sync) L1 D cache load references #Group 32 pm_ierat, IERAT event:0X0200 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP32 : (Group 32 pm_ierat) Instruction fetched from L1 event:0X0201 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_ierat) Instructions completed event:0X0202 counters:2 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP32 : (Group 32 pm_ierat) Translation written to ierat event:0X0203 counters:3 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_ierat) Processor cycles event:0X0204 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_ierat) Instructions completed event:0X0205 counters:5 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_ierat) Processor cycles event:0X0206 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_ierat) Instructions completed event:0X0207 counters:7 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_ierat) Processor cycles #Group 33 pm_derat, DERAT event:0X0210 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP33 : (Group 33 pm_derat) Cycles GCT empty event:0X0211 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP33 : (Group 33 pm_derat) Group dispatch valid event:0X0212 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP33 : (Group 33 pm_derat) L1 reload data source valid event:0X0213 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP33 : (Group 33 pm_derat) Instructions completed event:0X0214 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP33 : (Group 33 pm_derat) Instructions dispatched event:0X0215 counters:5 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP33 : (Group 33 pm_derat) DERAT misses event:0X0216 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP33 : (Group 33 pm_derat) L1 D cache store references event:0X0217 counters:7 um:zero minimum:10000 name:PM_CYC_GRP33 : (Group 33 pm_derat) Processor cycles #Group 34 pm_mark1, Information on marked instructions event:0X0220 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP34 : (Group 34 pm_mark1) Marked L1 D cache load misses event:0X0221 counters:1 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP34 : (Group 34 pm_mark1) Threshold timeout event:0X0222 counters:2 um:zero minimum:10000 name:PM_CYC_GRP34 : (Group 34 pm_mark1) Processor cycles event:0X0223 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP34 : (Group 34 pm_mark1) Marked group completed event:0X0224 counters:4 um:zero minimum:1000 name:PM_GRP_MRK_GRP34 : (Group 34 pm_mark1) Group marked in IDU event:0X0225 counters:5 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP34 : (Group 34 pm_mark1) Marked group issued event:0X0226 counters:6 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP34 : (Group 34 pm_mark1) Marked instruction finished event:0X0227 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP34 : (Group 34 pm_mark1) Instructions completed #Group 35 pm_mark2, Marked Instructions Processing Flow event:0X0230 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP35 : (Group 35 pm_mark2) Marked group dispatched event:0X0231 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction BRU processing finished event:0X0232 counters:2 um:zero minimum:10000 name:PM_CYC_GRP35 : (Group 35 pm_mark2) Processor cycles event:0X0233 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction CRU processing finished event:0X0234 counters:4 um:zero minimum:1000 name:PM_GRP_MRK_GRP35 : (Group 35 pm_mark2) Group marked in IDU event:0X0235 counters:5 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction FXU processing finished event:0X0236 counters:6 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction FPU processing finished event:0X0237 counters:7 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction LSU processing finished #Group 36 pm_mark3, Marked Stores Processing Flow event:0X0240 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP36 : (Group 36 pm_mark3) Marked store instruction completed event:0X0241 counters:1 um:zero minimum:10000 name:PM_CYC_GRP36 : (Group 36 pm_mark3) Processor cycles event:0X0242 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP36 : (Group 36 pm_mark3) Marked store completed with intervention event:0X0243 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP36 : (Group 36 pm_mark3) Marked group completed event:0X0244 counters:4 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP36 : (Group 36 pm_mark3) Marked group completion timeout event:0X0245 counters:5 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP36 : (Group 36 pm_mark3) Marked store sent to GPS event:0X0246 counters:6 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP36 : (Group 36 pm_mark3) Marked instruction valid in SRQ event:0X0247 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP36 : (Group 36 pm_mark3) Instructions completed #Group 37 pm_lsu_mark1, Load Store Unit Marked Events event:0X0250 counters:0 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP37 : (Group 37 pm_lsu_mark1) Marked L1 D cache store misses event:0X0251 counters:1 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP37 : (Group 37 pm_lsu_mark1) Marked IMR reloaded event:0X0252 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned store flushes event:0X0253 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned store flushes event:0X0254 counters:4 um:zero minimum:10000 name:PM_CYC_GRP37 : (Group 37 pm_lsu_mark1) Processor cycles event:0X0255 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP37 : (Group 37 pm_lsu_mark1) Instructions completed event:0X0256 counters:6 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned load flushes event:0X0257 counters:7 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned load flushes #Group 38 pm_lsu_mark2, Load Store Unit Marked Events event:0X0260 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU0_GRP38 : (Group 38 pm_lsu_mark2) LSU0 L1 D cache load misses event:0X0261 counters:1 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU1_GRP38 : (Group 38 pm_lsu_mark2) LSU1 L1 D cache load misses event:0X0262 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_LRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU0 marked LRQ flushes event:0X0263 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_LRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU1 marked LRQ flushes event:0X0264 counters:4 um:zero minimum:10000 name:PM_CYC_GRP38 : (Group 38 pm_lsu_mark2) Processor cycles event:0X0265 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP38 : (Group 38 pm_lsu_mark2) Instructions completed event:0X0266 counters:6 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_SRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU0 marked SRQ flushes event:0X0267 counters:7 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_SRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU1 marked SRQ flushes #Group 39 pm_fxu1, Fixed Point events by unit event:0X0270 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP39 : (Group 39 pm_fxu1) Instructions completed event:0X0271 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP39 : (Group 39 pm_fxu1) Instructions completed event:0X0272 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP39 : (Group 39 pm_fxu1) FXU produced a result event:0X0273 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP39 : (Group 39 pm_fxu1) FXU1 busy FXU0 idle event:0X0274 counters:4 um:zero minimum:1000 name:PM_FXU_IDLE_GRP39 : (Group 39 pm_fxu1) FXU idle event:0X0275 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP39 : (Group 39 pm_fxu1) FXU busy event:0X0276 counters:6 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP39 : (Group 39 pm_fxu1) FXU0 busy FXU1 idle event:0X0277 counters:7 um:zero minimum:10000 name:PM_CYC_GRP39 : (Group 39 pm_fxu1) Processor cycles #Group 40 pm_fxu2, Fixed Point events by unit event:0X0280 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP40 : (Group 40 pm_fxu2) Instructions completed event:0X0281 counters:1 um:zero minimum:10000 name:PM_CYC_GRP40 : (Group 40 pm_fxu2) Processor cycles event:0X0282 counters:2 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP40 : (Group 40 pm_fxu2) Cycles FXU1/LS1 queue full event:0X0283 counters:3 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP40 : (Group 40 pm_fxu2) Cycles FXU0/LS0 queue full event:0X0284 counters:4 um:zero minimum:1000 name:PM_FXU_IDLE_GRP40 : (Group 40 pm_fxu2) FXU idle event:0X0285 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP40 : (Group 40 pm_fxu2) FXU busy event:0X0286 counters:6 um:zero minimum:1000 name:PM_FXU0_FIN_GRP40 : (Group 40 pm_fxu2) FXU0 produced a result event:0X0287 counters:7 um:zero minimum:1000 name:PM_FXU1_FIN_GRP40 : (Group 40 pm_fxu2) FXU1 produced a result #Group 41 pm_ifu, pm_ifu event:0X0290 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP41 : (Group 41 pm_ifu) Instruction fetched from L1 event:0X0291 counters:1 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP41 : (Group 41 pm_ifu) Instruction fetched from memory event:0X0292 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP41 : (Group 41 pm_ifu) Instructions fetched from prefetch event:0X0293 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP41 : (Group 41 pm_ifu) No instructions fetched event:0X0294 counters:4 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP41 : (Group 41 pm_ifu) Cycles at least 1 instruction fetched event:0X0295 counters:5 um:zero minimum:1000 name:PM_INST_FROM_L25_MOD_GRP41 : (Group 41 pm_ifu) Instruction fetched from L2.5 modified event:0X0296 counters:6 um:zero minimum:10000 name:PM_CYC_GRP41 : (Group 41 pm_ifu) Processor cycles event:0X0297 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP41 : (Group 41 pm_ifu) Instructions completed #Group 42 pm_cpi_stack1, CPI stack analysis event:0X02A0 counters:0 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP42 : (Group 42 pm_cpi_stack1) LSU0 busy event:0X02A1 counters:1 um:zero minimum:1000 name:PM_LSU1_BUSY_GRP42 : (Group 42 pm_cpi_stack1) LSU1 busy event:0X02A2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP42 : (Group 42 pm_cpi_stack1) Flush initiated by LSU event:0X02A3 counters:3 um:zero minimum:1000 name:PM_FLUSH_LSU_BR_MPRED_GRP42 : (Group 42 pm_cpi_stack1) Flush caused by LSU or branch mispredict event:0X02A4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP42 : (Group 42 pm_cpi_stack1) Completion stall caused by LSU instruction event:0X02A5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP42 : (Group 42 pm_cpi_stack1) Instructions completed event:0X02A6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP42 : (Group 42 pm_cpi_stack1) Completion stall caused by ERAT miss event:0X02A7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP42 : (Group 42 pm_cpi_stack1) Processor cycles #Group 43 pm_cpi_stack2, CPI stack analysis event:0X02B0 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_OTHER_GRP43 : (Group 43 pm_cpi_stack2) Completion stall caused by other reason event:0X02B1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP43 : (Group 43 pm_cpi_stack2) Instructions completed event:0X02B2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP43 : (Group 43 pm_cpi_stack2) L1 D cache load misses event:0X02B3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP43 : (Group 43 pm_cpi_stack2) Processor cycles event:0X02B4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP43 : (Group 43 pm_cpi_stack2) Completion stall caused by D cache miss event:0X02B5 counters:5 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP43 : (Group 43 pm_cpi_stack2) DERAT misses event:0X02B6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP43 : (Group 43 pm_cpi_stack2) Completion stall caused by reject event:0X02B7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP43 : (Group 43 pm_cpi_stack2) L1 D cache load references #Group 44 pm_cpi_stack3, CPI stack analysis event:0X02C0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP44 : (Group 44 pm_cpi_stack3) Instructions completed event:0X02C1 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_SRQ_FULL_GRP44 : (Group 44 pm_cpi_stack3) GCT empty caused by SRQ full event:0X02C2 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP44 : (Group 44 pm_cpi_stack3) FXU produced a result event:0X02C3 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP44 : (Group 44 pm_cpi_stack3) FPU produced a result event:0X02C4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP44 : (Group 44 pm_cpi_stack3) Completion stall caused by FXU instruction event:0X02C5 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP44 : (Group 44 pm_cpi_stack3) FXU busy event:0X02C6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP44 : (Group 44 pm_cpi_stack3) Completion stall caused by DIV instruction event:0X02C7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP44 : (Group 44 pm_cpi_stack3) Processor cycles #Group 45 pm_cpi_stack4, CPI stack analysis event:0X02D0 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP45 : (Group 45 pm_cpi_stack4) FPU executed FDIV instruction event:0X02D1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP45 : (Group 45 pm_cpi_stack4) FPU executed multiply-add instruction event:0X02D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP45 : (Group 45 pm_cpi_stack4) Instructions completed event:0X02D3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP45 : (Group 45 pm_cpi_stack4) IOPS instructions completed event:0X02D4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_FDIV_GRP45 : (Group 45 pm_cpi_stack4) Completion stall caused by FDIV or FQRT instruction event:0X02D5 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP45 : (Group 45 pm_cpi_stack4) FPU executed FSQRT instruction event:0X02D6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_FPU_GRP45 : (Group 45 pm_cpi_stack4) Completion stall caused by FPU instruction event:0X02D7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP45 : (Group 45 pm_cpi_stack4) Processor cycles #Group 46 pm_cpi_stack5, CPI stack analysis event:0X02E0 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP46 : (Group 46 pm_cpi_stack5) Cycles GCT empty event:0X02E1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP46 : (Group 46 pm_cpi_stack5) Instructions completed event:0X02E2 counters:2 um:zero minimum:1000 name:PM_FLUSH_BR_MPRED_GRP46 : (Group 46 pm_cpi_stack5) Flush caused by branch mispredict event:0X02E3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP46 : (Group 46 pm_cpi_stack5) Branch mispredictions due to target address event:0X02E4 counters:4 um:zero minimum:1000 name:PM_GCT_EMPTY_IC_MISS_GRP46 : (Group 46 pm_cpi_stack5) GCT empty due to I cache miss event:0X02E5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP46 : (Group 46 pm_cpi_stack5) Processor cycles event:0X02E6 counters:6 um:zero minimum:1000 name:PM_GCT_EMPTY_BR_MPRED_GRP46 : (Group 46 pm_cpi_stack5) GCT empty due to branch mispredict event:0X02E7 counters:7 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP46 : (Group 46 pm_cpi_stack5) Cycles writing to instruction L1 #Group 47 pm_data2, data source and LMQ event:0X02F0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP47 : (Group 47 pm_data2) Instructions completed event:0X02F1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP47 : (Group 47 pm_data2) Instructions completed event:0X02F2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP47 : (Group 47 pm_data2) Processor cycles event:0X02F3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP47 : (Group 47 pm_data2) Processor cycles event:0X02F4 counters:4 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP47 : (Group 47 pm_data2) Data loaded from L2.5 shared event:0X02F5 counters:5 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP47 : (Group 47 pm_data2) Data loaded from L2.5 modified event:0X02F6 counters:6 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP47 : (Group 47 pm_data2) LMQ slot 0 allocated event:0X02F7 counters:7 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP47 : (Group 47 pm_data2) LMQ slot 0 valid #Group 48 pm_fetch_branch, Instruction fetch and branch events event:0X0300 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP48 : (Group 48 pm_fetch_branch) Instructions fetched from L2 event:0X0301 counters:1 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP48 : (Group 48 pm_fetch_branch) Instruction fetched from memory event:0X0302 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP48 : (Group 48 pm_fetch_branch) Instructions fetched from prefetch event:0X0303 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP48 : (Group 48 pm_fetch_branch) Branches issued event:0X0304 counters:4 um:zero minimum:10000 name:PM_CYC_GRP48 : (Group 48 pm_fetch_branch) Processor cycles event:0X0305 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP48 : (Group 48 pm_fetch_branch) Instructions completed event:0X0306 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP48 : (Group 48 pm_fetch_branch) Branch mispredictions due to CR bit setting event:0X0307 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP48 : (Group 48 pm_fetch_branch) Branch mispredictions due to target address #Group 49 pm_l1l2_miss, L1 and L2 miss events event:0X0310 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP49 : (Group 49 pm_l1l2_miss) Data loaded from L2 event:0X0311 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP49 : (Group 49 pm_l1l2_miss) Data loaded from memory event:0X0312 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP49 : (Group 49 pm_l1l2_miss) Instructions completed event:0X0313 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP49 : (Group 49 pm_l1l2_miss) LSU0 L1 D cache load misses event:0X0314 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP49 : (Group 49 pm_l1l2_miss) One or more PPC instruction completed event:0X0315 counters:5 um:zero minimum:10000 name:PM_CYC_GRP49 : (Group 49 pm_l1l2_miss) Processor cycles event:0X0316 counters:6 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP49 : (Group 49 pm_l1l2_miss) LSU1 L1 D cache load misses event:0X0317 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP49 : (Group 49 pm_l1l2_miss) L1 D cache load references #Group 50 pm_data_from, Data From L2 instructions event:0X0320 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP50 : (Group 50 pm_data_from) Data loaded from L2 event:0X0321 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP50 : (Group 50 pm_data_from) Data loaded from memory event:0X0322 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP50 : (Group 50 pm_data_from) Instructions completed event:0X0323 counters:3 um:zero minimum:10000 name:PM_CYC_GRP50 : (Group 50 pm_data_from) Processor cycles event:0X0324 counters:4 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP50 : (Group 50 pm_data_from) Data loaded from L2.5 shared event:0X0325 counters:5 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP50 : (Group 50 pm_data_from) Data loaded from L2.5 modified event:0X0326 counters:6 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP50 : (Group 50 pm_data_from) LSU1 L1 D cache load misses event:0X0327 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP50 : (Group 50 pm_data_from) L1 D cache load references #Group 51 pm_mark_data_from, Marked Data From L2 instructions event:0X0330 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP51 : (Group 51 pm_mark_data_from) Marked data loaded from L2 event:0X0331 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_MEM_GRP51 : (Group 51 pm_mark_data_from) Marked data loaded from memory event:0X0332 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP51 : (Group 51 pm_mark_data_from) Instructions completed event:0X0333 counters:3 um:zero minimum:10000 name:PM_CYC_GRP51 : (Group 51 pm_mark_data_from) Processor cycles event:0X0334 counters:4 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP51 : (Group 51 pm_mark_data_from) Marked data loaded from L2.5 shared event:0X0335 counters:5 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP51 : (Group 51 pm_mark_data_from) Marked data loaded from L2.5 modified event:0X0336 counters:6 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP51 : (Group 51 pm_mark_data_from) Marked instruction finished event:0X0337 counters:7 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP51 : (Group 51 pm_mark_data_from) Marked L1 reload data source valid oprofile-1.3.0/events/ppc64/970MP/event_mappings0000664000175000017500000007656512534404406016260 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2007. # Contributed by Dave Nomura . # #Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X0400C51F mmcr1:0X000000000A46F18C mmcra:0X00002001 #Group 1 pm_slice0, Time Slice 0 event:0X0010 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0011 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0012 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0013 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0014 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0015 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0016 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 event:0X0017 mmcr0:0X0000051F mmcr1:0X000000000A46F18C mmcra:0X00002000 #Group 2 pm_eprof, Group for use with eprof event:0X0020 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0021 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0022 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0023 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0024 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0025 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0026 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0027 mmcr0:0X00000F1F mmcr1:0X4003001005F09000 mmcra:0X00002000 #Group 3 pm_basic, Basic performance indicators event:0X0030 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0031 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0032 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0033 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0034 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0035 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0036 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 event:0X0037 mmcr0:0X0000091F mmcr1:0X4003001005F09000 mmcra:0X00002000 #Group 4 pm_lsu, Information on the Load Store Unit event:0X0040 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0041 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0042 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0043 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0044 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0045 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0046 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 event:0X0047 mmcr0:0X00000001 mmcr1:0X000F00007A400000 mmcra:0X00002000 #Group 5 pm_fpu1, Floating Point events event:0X0050 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0051 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0052 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0053 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0054 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0055 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0056 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 event:0X0057 mmcr0:0X00000001 mmcr1:0X00000000001E0480 mmcra:0X00002000 #Group 6 pm_fpu2, Floating Point events event:0X0060 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0061 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0062 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0063 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0064 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0065 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0066 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 event:0X0067 mmcr0:0X00000001 mmcr1:0X000020E87A400000 mmcra:0X00002000 #Group 7 pm_isu_rename, ISU Rename Pool Events event:0X0070 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0071 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0072 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0073 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0074 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0075 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0076 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 event:0X0077 mmcr0:0X00001229 mmcr1:0X400000218E6D84BC mmcra:0X00002000 #Group 8 pm_isu_queues1, ISU Rename Pool Events event:0X0080 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0081 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0082 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0083 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0084 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0085 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0086 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 event:0X0087 mmcr0:0X0000132F mmcr1:0X40000000851E994C mmcra:0X00002000 #Group 9 pm_isu_flow, ISU Instruction Flow Events event:0X0090 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0091 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0092 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0093 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0094 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0095 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0096 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 event:0X0097 mmcr0:0X0000181F mmcr1:0X400000B3D7B7C4BC mmcra:0X00002000 #Group 10 pm_isu_work, ISU Indicators of Work Blockage event:0X00A0 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A1 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A2 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A3 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A4 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A5 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A6 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 event:0X00A7 mmcr0:0X00000403 mmcr1:0X400000050FDE9D88 mmcra:0X00002000 #Group 11 pm_fpu3, Floating Point events by unit event:0X00B0 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B1 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B2 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B3 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B4 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B5 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B6 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 event:0X00B7 mmcr0:0X00001029 mmcr1:0X000000008D6354BC mmcra:0X00002000 #Group 12 pm_fpu4, Floating Point events by unit event:0X00C0 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C1 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C2 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C3 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C4 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C5 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C6 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 event:0X00C7 mmcr0:0X0000122D mmcr1:0X000000009DE774BC mmcra:0X00002000 #Group 13 pm_fpu5, Floating Point events by unit event:0X00D0 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D1 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D2 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D3 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D4 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D5 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D6 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 event:0X00D7 mmcr0:0X00001839 mmcr1:0X000000C0851E9958 mmcra:0X00002000 #Group 14 pm_fpu7, Floating Point events by unit event:0X00E0 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E1 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E2 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E3 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E4 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E5 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E6 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 event:0X00E7 mmcr0:0X0000193B mmcr1:0X000000C89DDE97E0 mmcra:0X00002000 #Group 15 pm_lsu_flush, LSU Flush Events event:0X00F0 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F1 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F2 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F3 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F4 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F5 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F6 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 event:0X00F7 mmcr0:0X0000122D mmcr1:0X000C00007BE774BC mmcra:0X00002000 #Group 16 pm_lsu_load1, LSU Load Events event:0X0100 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0101 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0102 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0103 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0104 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0105 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0106 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 event:0X0107 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000 #Group 17 pm_lsu_store1, LSU Store Events event:0X0110 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0111 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0112 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0113 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0114 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0115 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0116 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 event:0X0117 mmcr0:0X0000112B mmcr1:0X000F00008D5E99DC mmcra:0X00002000 #Group 18 pm_lsu_store2, LSU Store Events event:0X0120 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0121 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0122 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0123 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0124 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0125 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0126 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 event:0X0127 mmcr0:0X00001839 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002000 #Group 19 pm_lsu7, Information on the Load Store Unit event:0X0130 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0131 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0132 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0133 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0134 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0135 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0136 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 event:0X0137 mmcr0:0X0000122D mmcr1:0X000830047BD2FE3C mmcra:0X00002000 #Group 20 pm_misc, Misc Events for testing event:0X0140 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0141 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0142 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0143 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0144 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0145 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0146 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 event:0X0147 mmcr0:0X00000405 mmcr1:0X0000000023C69194 mmcra:0X00002000 #Group 21 pm_pe_bench1, PE Benchmarker group for FP analysis event:0X0150 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0151 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0152 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0153 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0154 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0155 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0156 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 event:0X0157 mmcr0:0X00000001 mmcr1:0X10001002001E0480 mmcra:0X00002000 #Group 22 pm_pe_bench4, PE Benchmarker group for L1 and TLB event:0X0160 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0161 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0162 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0163 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0164 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0165 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0166 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0167 mmcr0:0X00001421 mmcr1:0X000B000004DE9000 mmcra:0X00002000 #Group 23 pm_hpmcount1, Hpmcount group for L1 and TLB behavior event:0X0170 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0171 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0172 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0173 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0174 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0175 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0176 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 event:0X0177 mmcr0:0X00001405 mmcr1:0X000B000004DE9000 mmcra:0X00002000 #Group 24 pm_hpmcount2, Hpmcount group for computation event:0X0180 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0181 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0182 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0183 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0184 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0185 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0186 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 event:0X0187 mmcr0:0X00000001 mmcr1:0X000020289DDE0480 mmcra:0X00002000 #Group 25 pm_l1andbr, L1 misses and branch misspredict analysis event:0X0190 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0191 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0192 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0193 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0194 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0195 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0196 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 event:0X0197 mmcr0:0X0000091F mmcr1:0X8003C01D0676FD6C mmcra:0X00002000 #Group 26 pm_imix, Instruction mix: loads, stores and branches event:0X01A0 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A1 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A2 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A3 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A4 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A5 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A6 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 event:0X01A7 mmcr0:0X0000091F mmcr1:0X8003C021065FB000 mmcra:0X00002000 #Group 27 pm_branch, SLB and branch misspredict analysis event:0X01B0 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B1 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B2 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B3 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B4 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B5 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B6 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 event:0X01B7 mmcr0:0X0000052B mmcr1:0X8008000BCEA2F4EC mmcra:0X00002000 #Group 28 pm_data, data source and LMQ event:0X01C0 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C1 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C2 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C3 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C4 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C5 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C6 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 event:0X01C7 mmcr0:0X0000070F mmcr1:0X0000300C4BD2FF74 mmcra:0X00002000 #Group 29 pm_tlb, TLB and LRQ plus data prefetch event:0X01D0 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D1 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D2 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D3 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D4 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D5 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D6 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 event:0X01D7 mmcr0:0X00001421 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002000 #Group 30 pm_isource, inst source and tablewalk event:0X01E0 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E1 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E2 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E3 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E4 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E5 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E6 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 event:0X01E7 mmcr0:0X0000060D mmcr1:0X800B00C0226EF1DC mmcra:0X00002000 #Group 31 pm_sync, Sync and SRQ event:0X01F0 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F1 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F2 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F3 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F4 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F5 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F6 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 event:0X01F7 mmcr0:0X00001D33 mmcr1:0X0003E0C107529780 mmcra:0X00002000 #Group 32 pm_ierat, IERAT event:0X0200 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0201 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0202 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0203 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0204 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0205 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0206 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 event:0X0207 mmcr0:0X00000D13 mmcr1:0X80000082C3D2F4BC mmcra:0X00002000 #Group 33 pm_derat, DERAT event:0X0210 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0211 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0212 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0213 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0214 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0215 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0216 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 event:0X0217 mmcr0:0X00000437 mmcr1:0X100B7052E274003C mmcra:0X00002000 #Group 34 pm_mark1, Information on marked instructions event:0X0220 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0221 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0222 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0223 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0224 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0225 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0226 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X0227 mmcr0:0X00000007 mmcr1:0X00008080790852A4 mmcra:0X00002001 #Group 35 pm_mark2, Marked Instructions Processing Flow event:0X0230 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0231 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0232 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0233 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0234 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0235 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0236 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X0237 mmcr0:0X0000020B mmcr1:0X0000000079484210 mmcra:0X00002001 #Group 36 pm_mark3, Marked Stores Processing Flow event:0X0240 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0241 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0242 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0243 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0244 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0245 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0246 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X0247 mmcr0:0X0000031F mmcr1:0X00203004190A3F24 mmcra:0X00002001 #Group 37 pm_lsu_mark1, Load Store Unit Marked Events event:0X0250 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0251 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0252 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0253 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0254 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0255 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0256 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X0257 mmcr0:0X00001B35 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 #Group 38 pm_lsu_mark2, Load Store Unit Marked Events event:0X0260 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0261 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0262 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0263 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0264 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0265 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0266 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X0267 mmcr0:0X00001839 mmcr1:0X000280C0959E99DC mmcra:0X00002001 #Group 39 pm_fxu1, Fixed Point events by unit event:0X0270 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0271 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0272 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0273 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0274 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0275 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0276 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 event:0X0277 mmcr0:0X00000913 mmcr1:0X100010020084213C mmcra:0X00002000 #Group 40 pm_fxu2, Fixed Point events by unit event:0X0280 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0281 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0282 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0283 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0284 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0285 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0286 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 event:0X0287 mmcr0:0X0000091F mmcr1:0X4000000CA4042D78 mmcra:0X00002000 #Group 41 pm_ifu, pm_ifu event:0X0290 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0291 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0292 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0293 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0294 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0295 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0296 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 event:0X0297 mmcr0:0X00000D0D mmcr1:0X800000F06B7867A4 mmcra:0X00002000 #Group 42 pm_cpi_stack1, CPI stack analysis event:0X02A0 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A1 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A2 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A3 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A4 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A5 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A6 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 event:0X02A7 mmcr0:0X00001B3F mmcr1:0X4000C0C0ADD6963D mmcra:0X00002000 #Group 43 pm_cpi_stack2, CPI stack analysis event:0X02B0 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B1 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B2 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B3 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B4 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B5 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B6 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 event:0X02B7 mmcr0:0X00000B13 mmcr1:0X000B000003D60583 mmcra:0X00002000 #Group 44 pm_cpi_stack3, CPI stack analysis event:0X02C0 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C1 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C2 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C3 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C4 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C5 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C6 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 event:0X02C7 mmcr0:0X00000917 mmcr1:0X10001002001625BE mmcra:0X00002000 #Group 45 pm_cpi_stack4, CPI stack analysis event:0X02D0 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D1 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D2 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D3 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D4 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D5 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D6 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 event:0X02D7 mmcr0:0X00000001 mmcr1:0X00000000485805BD mmcra:0X00002000 #Group 46 pm_cpi_stack5, CPI stack analysis event:0X02E0 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E1 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E2 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E3 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E4 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E5 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E6 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 event:0X02E7 mmcr0:0X00000413 mmcr1:0X90014009B6D8F672 mmcra:0X00002000 #Group 47 pm_data2, data source and LMQ event:0X02F0 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F1 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F2 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F3 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F4 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F5 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F6 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 event:0X02F7 mmcr0:0X00000913 mmcr1:0X0000300C7BCE7F74 mmcra:0X00002000 #Group 48 pm_fetch_branch, Instruction fetch and branch events event:0X0300 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0301 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0302 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0303 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0304 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0305 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0306 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 event:0X0307 mmcr0:0X0000060D mmcr1:0X800000CD6E5E9D6C mmcra:0X00002000 #Group 49 pm_l1l2_miss, L1 and L2 miss events event:0X0310 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0311 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0312 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0313 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0314 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0315 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0316 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 event:0X0317 mmcr0:0X0000070F mmcr1:0X000330004C86FB00 mmcra:0X00002000 #Group 50 pm_data_from, Data From L2 instructions event:0X0320 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0321 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0322 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0323 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0324 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0325 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0326 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 event:0X0327 mmcr0:0X0000070F mmcr1:0X000330004BCE7B00 mmcra:0X00002000 #Group 51 pm_mark_data_from, Marked Data From L2 instructions event:0X0330 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0331 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0332 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0333 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0334 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0335 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0336 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 event:0X0337 mmcr0:0X0000070F mmcr1:0X002030084BCE72F0 mmcra:0X00002001 oprofile-1.3.0/events/ppc64/970MP/unit_masks0000664000175000017500000000034512534404406015375 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2006. # Contributed by Dave Nomura . # # ppc64 970 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power7/0000775000175000017500000000000013323173530014020 500000000000000oprofile-1.3.0/events/ppc64/power7/events0000664000175000017500000117673412534404406015214 00000000000000#PPC64 POWER7 events # # Copyright OProfile authors # Copyright (c) International Business Machines, 2009, 2011. # Contributed by Maynard Johnson . # # # Only events within the same group can be selected simultaneously when # using legacy opcontrol to do profiling. When profiling with operf, # events from different groups may be specified, and the Linux Performance # Events Kernel Subsystem code will handle the necessary multiplexing. # # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:0 um:zero minimum:10000 name:CYCLES : Processor Cycles #Group 1 pm_utilization, CPI and utilization data event:0X0010 counters:0 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_utilization) Processor Cycles event:0X0011 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0012 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP1 : (Group 1 pm_utilization) Number of PowerPC instructions successfully dispatched. event:0X0013 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_utilization) Number of PowerPC Instructions that completed. event:0X0014 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP1 : (Group 1 pm_utilization) Number of run instructions completed. event:0X0015 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 2 pm_branch1, Branch operations event:0X0020 counters:0 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP2 : (Group 2 pm_branch1) The count value of a Branch and Count instruction was predicted event:0X0021 counters:1 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP2 : (Group 2 pm_branch1) The target address of a Branch to Link instruction was predicted by the link stack. event:0X0022 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_CCACHE_GRP2 : (Group 2 pm_branch1) A branch instruction target was incorrectly predicted by the count cache. This will result in a branch redirect flush if not overwritten by a flush of an older instruction. event:0X0023 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP2 : (Group 2 pm_branch1) A branch instruction target was incorrectly predicted. This will result in a branch mispredict flush unless a flush is detected from an older instruction. event:0X0024 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP2 : (Group 2 pm_branch1) Number of run instructions completed. event:0X0025 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP2 : (Group 2 pm_branch1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 3 pm_branch2, Branch operations event:0X0030 counters:0 um:zero minimum:1000 name:PM_BR_PRED_GRP3 : (Group 3 pm_branch2) A branch prediction was made. This could have been a target prediction, a condition prediction, or both event:0X0031 counters:1 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP3 : (Group 3 pm_branch2) A conditional branch instruction was predicted as taken or not taken. event:0X0032 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP3 : (Group 3 pm_branch2) The count value of a Branch and Count instruction was predicted event:0X0033 counters:3 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP3 : (Group 3 pm_branch2) The target address of a Branch to Link instruction was predicted by the link stack. event:0X0034 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP3 : (Group 3 pm_branch2) Number of run instructions completed. event:0X0035 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP3 : (Group 3 pm_branch2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 4 pm_branch3, Branch operations event:0X0040 counters:0 um:zero minimum:1000 name:PM_BRU_FIN_GRP4 : (Group 4 pm_branch3) The Branch execution unit finished an instruction event:0X0041 counters:1 um:zero minimum:1000 name:PM_BR_TAKEN_GRP4 : (Group 4 pm_branch3) A branch instruction was taken. This could have been a conditional branch or an unconditional branch event:0X0042 counters:2 um:zero minimum:1000 name:PM_BR_PRED_GRP4 : (Group 4 pm_branch3) A branch prediction was made. This could have been a target prediction, a condition prediction, or both event:0X0043 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP4 : (Group 4 pm_branch3) A branch instruction was incorrectly predicted. This could have been a target prediction, a condition prediction, or both event:0X0044 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP4 : (Group 4 pm_branch3) Number of run instructions completed. event:0X0045 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP4 : (Group 4 pm_branch3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 5 pm_branch4, Branch operations event:0X0050 counters:0 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP5 : (Group 5 pm_branch4) A conditional branch instruction was incorrectly predicted as taken or not taken. The branch execution unit detects a branch mispredict because the CR value is opposite of the predicted value. This will result in a branch redirect flush if not overfidden by a flush of an older instruction. event:0X0051 counters:1 um:zero minimum:1000 name:PM_BR_UNCOND_GRP5 : (Group 5 pm_branch4) An unconditional branch was executed. event:0X0052 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP5 : (Group 5 pm_branch4) A branch instruction target was incorrectly predicted. This will result in a branch mispredict flush unless a flush is detected from an older instruction. event:0X0053 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_CCACHE_GRP5 : (Group 5 pm_branch4) A branch instruction target was incorrectly predicted by the count cache. This will result in a branch redirect flush if not overwritten by a flush of an older instruction. event:0X0054 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP5 : (Group 5 pm_branch4) Number of run instructions completed. event:0X0055 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP5 : (Group 5 pm_branch4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 6 pm_branch5, Branch operations event:0X0060 counters:0 um:zero minimum:1000 name:PM_BR_PRED_CR_TA_GRP6 : (Group 6 pm_branch5) Both the condition (taken or not taken) and the target address of a branch instruction was predicted. event:0X0061 counters:1 um:zero minimum:1000 name:PM_BR_MPRED_CR_TA_GRP6 : (Group 6 pm_branch5) Branch mispredict - taken/not taken and target event:0X0062 counters:2 um:zero minimum:1000 name:PM_BR_PRED_GRP6 : (Group 6 pm_branch5) A branch prediction was made. This could have been a target prediction, a condition prediction, or both event:0X0063 counters:3 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP6 : (Group 6 pm_branch5) A conditional branch instruction was predicted as taken or not taken. event:0X0064 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP6 : (Group 6 pm_branch5) Number of run instructions completed. event:0X0065 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP6 : (Group 6 pm_branch5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 7 pm_branch6, Branch operations event:0X0070 counters:0 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP7 : (Group 7 pm_branch6) The count value of a Branch and Count instruction was predicted event:0X0071 counters:1 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP7 : (Group 7 pm_branch6) The target address of a Branch to Link instruction was predicted by the link stack. event:0X0072 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP7 : (Group 7 pm_branch6) A conditional branch instruction was predicted as taken or not taken. event:0X0073 counters:3 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP7 : (Group 7 pm_branch6) The target address of a branch instruction was predicted. event:0X0074 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP7 : (Group 7 pm_branch6) Number of run instructions completed. event:0X0075 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP7 : (Group 7 pm_branch6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 8 pm_branch7, Branch operations event:0X0080 counters:0 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP8 : (Group 8 pm_branch7) A conditional branch instruction was incorrectly predicted as taken or not taken. The branch execution unit detects a branch mispredict because the CR value is opposite of the predicted value. This will result in a branch redirect flush if not overfidden by a flush of an older instruction. event:0X0081 counters:1 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP8 : (Group 8 pm_branch7) A conditional branch instruction was predicted as taken or not taken. event:0X0082 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP8 : (Group 8 pm_branch7) The count value of a Branch and Count instruction was predicted event:0X0083 counters:3 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP8 : (Group 8 pm_branch7) The target address of a Branch to Link instruction was predicted by the link stack. event:0X0084 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP8 : (Group 8 pm_branch7) Number of run instructions completed. event:0X0085 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP8 : (Group 8 pm_branch7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 9 pm_branch8, Branch operations event:0X0090 counters:0 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP9 : (Group 9 pm_branch8) A branch instruction target was incorrectly predicted. This will result in a branch mispredict flush unless a flush is detected from an older instruction. event:0X0091 counters:1 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP9 : (Group 9 pm_branch8) A conditional branch instruction was predicted as taken or not taken. event:0X0092 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP9 : (Group 9 pm_branch8) The count value of a Branch and Count instruction was predicted event:0X0093 counters:3 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP9 : (Group 9 pm_branch8) The target address of a Branch to Link instruction was predicted by the link stack. event:0X0094 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP9 : (Group 9 pm_branch8) Number of run instructions completed. event:0X0095 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP9 : (Group 9 pm_branch8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 10 pm_branch9, Branch operations event:0X00A0 counters:0 um:zero minimum:1000 name:PM_BR_MPRED_CCACHE_GRP10 : (Group 10 pm_branch9) A branch instruction target was incorrectly predicted by the count cache. This will result in a branch redirect flush if not overwritten by a flush of an older instruction. event:0X00A1 counters:1 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP10 : (Group 10 pm_branch9) A conditional branch instruction was predicted as taken or not taken. event:0X00A2 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CCACHE_GRP10 : (Group 10 pm_branch9) The count value of a Branch and Count instruction was predicted event:0X00A3 counters:3 um:zero minimum:1000 name:PM_BR_PRED_LSTACK_GRP10 : (Group 10 pm_branch9) The target address of a Branch to Link instruction was predicted by the link stack. event:0X00A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP10 : (Group 10 pm_branch9) Number of run instructions completed. event:0X00A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP10 : (Group 10 pm_branch9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 11 pm_slb_miss, SLB Misses event:0X00B0 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_GRP11 : (Group 11 pm_slb_miss) A translation request missed the Instruction Effective to Real Address Translation (ERAT) table event:0X00B1 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP11 : (Group 11 pm_slb_miss) A SLB miss for a data request occurred. SLB misses trap to the operating system to resolve. event:0X00B2 counters:2 um:zero minimum:1000 name:PM_ISLB_MISS_GRP11 : (Group 11 pm_slb_miss) A SLB miss for an instruction fetch as occurred event:0X00B3 counters:3 um:zero minimum:1000 name:PM_SLB_MISS_GRP11 : (Group 11 pm_slb_miss) Total of all Segment Lookaside Buffer (SLB) misses, Instructions + Data. event:0X00B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP11 : (Group 11 pm_slb_miss) Number of run instructions completed. event:0X00B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP11 : (Group 11 pm_slb_miss) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 12 pm_tlb_miss, TLB Misses event:0X00C0 counters:0 um:zero minimum:1000 name:PM_BTAC_MISS_GRP12 : (Group 12 pm_tlb_miss) BTAC Mispredicted event:0X00C1 counters:1 um:zero minimum:1000 name:PM_TLB_MISS_GRP12 : (Group 12 pm_tlb_miss) Total of Data TLB mises + Instruction TLB misses event:0X00C2 counters:2 um:zero minimum:1000 name:PM_DTLB_MISS_GRP12 : (Group 12 pm_tlb_miss) Data TLB misses, all page sizes. event:0X00C3 counters:3 um:zero minimum:1000 name:PM_ITLB_MISS_GRP12 : (Group 12 pm_tlb_miss) A TLB miss for an Instruction Fetch has occurred event:0X00C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP12 : (Group 12 pm_tlb_miss) Number of run instructions completed. event:0X00C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP12 : (Group 12 pm_tlb_miss) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 13 pm_dtlb_miss, DTLB Misses event:0X00D0 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_16G_GRP13 : (Group 13 pm_dtlb_miss) Data TLB references to 16GB pages that missed the TLB. Page size is determined at TLB reload time. event:0X00D1 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_4K_GRP13 : (Group 13 pm_dtlb_miss) Data TLB references to 4KB pages that missed the TLB. Page size is determined at TLB reload time. event:0X00D2 counters:2 um:zero minimum:1000 name:PM_DTLB_MISS_64K_GRP13 : (Group 13 pm_dtlb_miss) Data TLB references to 64KB pages that missed the TLB. Page size is determined at TLB reload time. event:0X00D3 counters:3 um:zero minimum:1000 name:PM_DTLB_MISS_16M_GRP13 : (Group 13 pm_dtlb_miss) Data TLB references to 16MB pages that missed the TLB. Page size is determined at TLB reload time. event:0X00D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP13 : (Group 13 pm_dtlb_miss) Number of run instructions completed. event:0X00D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP13 : (Group 13 pm_dtlb_miss) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 14 pm_derat_miss1, DERAT misses event:0X00E0 counters:0 um:zero minimum:1000 name:PM_DERAT_MISS_4K_GRP14 : (Group 14 pm_derat_miss1) A data request (load or store) missed the ERAT for 4K page and resulted in an ERAT reload. event:0X00E1 counters:1 um:zero minimum:1000 name:PM_DERAT_MISS_64K_GRP14 : (Group 14 pm_derat_miss1) A data request (load or store) missed the ERAT for 64K page and resulted in an ERAT reload. event:0X00E2 counters:2 um:zero minimum:1000 name:PM_DERAT_MISS_16M_GRP14 : (Group 14 pm_derat_miss1) A data request (load or store) missed the ERAT for 16M page and resulted in an ERAT reload. event:0X00E3 counters:3 um:zero minimum:1000 name:PM_DERAT_MISS_16G_GRP14 : (Group 14 pm_derat_miss1) A data request (load or store) missed the ERAT for 16G page and resulted in an ERAT reload. event:0X00E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP14 : (Group 14 pm_derat_miss1) Number of run instructions completed. event:0X00E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP14 : (Group 14 pm_derat_miss1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 15 pm_derat_miss2, DERAT misses event:0X00F0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_derat_miss2) Number of PowerPC Instructions that completed. event:0X00F1 counters:1 um:zero minimum:1000 name:PM_DERAT_MISS_64K_GRP15 : (Group 15 pm_derat_miss2) A data request (load or store) missed the ERAT for 64K page and resulted in an ERAT reload. event:0X00F2 counters:2 um:zero minimum:1000 name:PM_DERAT_MISS_16M_GRP15 : (Group 15 pm_derat_miss2) A data request (load or store) missed the ERAT for 16M page and resulted in an ERAT reload. event:0X00F3 counters:3 um:zero minimum:1000 name:PM_DERAT_MISS_16G_GRP15 : (Group 15 pm_derat_miss2) A data request (load or store) missed the ERAT for 16G page and resulted in an ERAT reload. event:0X00F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP15 : (Group 15 pm_derat_miss2) Number of run instructions completed. event:0X00F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP15 : (Group 15 pm_derat_miss2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 16 pm_misc_miss1, Misses event:0X0100 counters:0 um:zero minimum:1000 name:PM_DSLB_MISS_GRP16 : (Group 16 pm_misc_miss1) A SLB miss for a data request occurred. SLB misses trap to the operating system to resolve. event:0X0101 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP16 : (Group 16 pm_misc_miss1) The processor's Data Cache was reloaded but not from the local L2. event:0X0102 counters:2 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP16 : (Group 16 pm_misc_miss1) Total D-ERAT Misses. Requests that miss the Derat are rejected and retried until the request hits in the Erat. This may result in multiple erat misses for the same instruction. Combined Unit 0 + 1. event:0X0103 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP16 : (Group 16 pm_misc_miss1) Load references that miss the Level 1 Data cache. Combined unit 0 + 1. event:0X0104 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP16 : (Group 16 pm_misc_miss1) Number of run instructions completed. event:0X0105 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP16 : (Group 16 pm_misc_miss1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 17 pm_misc_miss2, Misses event:0X0110 counters:0 um:zero minimum:10000 name:PM_CYC_GRP17 : (Group 17 pm_misc_miss2) Processor Cycles event:0X0111 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L3MISS_GRP17 : (Group 17 pm_misc_miss2) Page Table Entry was loaded into the ERAT from beyond the L3 due to a demand load or store. event:0X0112 counters:2 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP17 : (Group 17 pm_misc_miss2) Total D-ERAT Misses. Requests that miss the Derat are rejected and retried until the request hits in the Erat. This may result in multiple erat misses for the same instruction. Combined Unit 0 + 1. event:0X0113 counters:3 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP17 : (Group 17 pm_misc_miss2) Number of run instructions completed. event:0X0114 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP17 : (Group 17 pm_misc_miss2) Number of run instructions completed. event:0X0115 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP17 : (Group 17 pm_misc_miss2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 18 pm_misc_miss3, Misses event:0X0120 counters:0 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_misc_miss3) Processor Cycles event:0X0121 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L3MISS_GRP18 : (Group 18 pm_misc_miss3) Page Table Entry was loaded into the ERAT from beyond the L3 due to a demand load or store. event:0X0122 counters:2 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP18 : (Group 18 pm_misc_miss3) Total D-ERAT Misses. Requests that miss the Derat are rejected and retried until the request hits in the Erat. This may result in multiple erat misses for the same instruction. Combined Unit 0 + 1. event:0X0123 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L2MISS_GRP18 : (Group 18 pm_misc_miss3) A Page Table Entry was loaded into the TLB but not from the local L2. event:0X0124 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP18 : (Group 18 pm_misc_miss3) Number of run instructions completed. event:0X0125 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP18 : (Group 18 pm_misc_miss3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 19 pm_misc_miss4, Misses event:0X0130 counters:0 um:zero minimum:1000 name:PM_DSLB_MISS_GRP19 : (Group 19 pm_misc_miss4) A SLB miss for a data request occurred. SLB misses trap to the operating system to resolve. event:0X0131 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L3MISS_GRP19 : (Group 19 pm_misc_miss4) An instruction fetch group was fetched from beyond L3. Fetch groups can contain up to 8 instructions. event:0X0132 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP19 : (Group 19 pm_misc_miss4) Number of PowerPC Instructions that completed. event:0X0133 counters:3 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP19 : (Group 19 pm_misc_miss4) Number of run instructions completed. event:0X0134 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP19 : (Group 19 pm_misc_miss4) Number of run instructions completed. event:0X0135 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP19 : (Group 19 pm_misc_miss4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 20 pm_misc_miss5, Misses event:0X0140 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_GRP20 : (Group 20 pm_misc_miss5) A translation request missed the Instruction Effective to Real Address Translation (ERAT) table event:0X0141 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP20 : (Group 20 pm_misc_miss5) A SLB miss for a data request occurred. SLB misses trap to the operating system to resolve. event:0X0142 counters:2 um:zero minimum:1000 name:PM_ISLB_MISS_GRP20 : (Group 20 pm_misc_miss5) A SLB miss for an instruction fetch as occurred event:0X0143 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP20 : (Group 20 pm_misc_miss5) Number of PowerPC Instructions that completed. event:0X0144 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP20 : (Group 20 pm_misc_miss5) Number of run instructions completed. event:0X0145 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP20 : (Group 20 pm_misc_miss5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 21 pm_pteg1, PTEG sources event:0X0150 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP21 : (Group 21 pm_pteg1) A Page Table Entry was loaded into the ERAT from the local L2 due to a demand load or store. event:0X0151 counters:1 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L3_GRP21 : (Group 21 pm_pteg1) Instruction PTEG loaded from L3 event:0X0152 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L21_MOD_GRP21 : (Group 21 pm_pteg1) PTEG loaded from another L2 on same chip modified event:0X0153 counters:3 um:zero minimum:1000 name:PM_INST_PTEG_FROM_DL2L3_MOD_GRP21 : (Group 21 pm_pteg1) Instruction PTEG loaded from distant L2 or L3 modified event:0X0154 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP21 : (Group 21 pm_pteg1) Number of run instructions completed. event:0X0155 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP21 : (Group 21 pm_pteg1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 22 pm_pteg2, PTEG sources event:0X0160 counters:0 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L2_GRP22 : (Group 22 pm_pteg2) Instruction PTEG loaded from L2 event:0X0161 counters:1 um:zero minimum:1000 name:PM_INST_PTEG_FROM_RL2L3_SHR_GRP22 : (Group 22 pm_pteg2) Instruction PTEG loaded from remote L2 or L3 shared event:0X0162 counters:2 um:zero minimum:1000 name:PM_INST_PTEG_FROM_DL2L3_SHR_GRP22 : (Group 22 pm_pteg2) Instruction PTEG loaded from remote L2 or L3 shared event:0X0163 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_DL2L3_MOD_GRP22 : (Group 22 pm_pteg2) A Page Table Entry was loaded into the ERAT with modified (M) data from an L2 or L3 on a distant module due to a demand load or store. event:0X0164 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP22 : (Group 22 pm_pteg2) Number of run instructions completed. event:0X0165 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP22 : (Group 22 pm_pteg2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 23 pm_pteg3, PTEG sources event:0X0170 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L31_MOD_GRP23 : (Group 23 pm_pteg3) PTEG loaded from another L3 on same chip modified event:0X0171 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L3MISS_GRP23 : (Group 23 pm_pteg3) Page Table Entry was loaded into the ERAT from beyond the L3 due to a demand load or store. event:0X0172 counters:2 um:zero minimum:1000 name:PM_INST_PTEG_FROM_RMEM_GRP23 : (Group 23 pm_pteg3) Instruction PTEG loaded from remote memory event:0X0173 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP23 : (Group 23 pm_pteg3) A Page Table Entry was loaded into the TLB from memory attached to the same module this processor is located on. event:0X0174 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP23 : (Group 23 pm_pteg3) Number of run instructions completed. event:0X0175 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP23 : (Group 23 pm_pteg3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 24 pm_pteg4, PTEG sources event:0X0180 counters:0 um:zero minimum:1000 name:PM_INST_PTEG_FROM_RL2L3_MOD_GRP24 : (Group 24 pm_pteg4) Instruction PTEG loaded from remote L2 or L3 modified event:0X0181 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_DMEM_GRP24 : (Group 24 pm_pteg4) A Page Table Entry was loaded into the ERAT with data from memory attached to a distant module due to a demand load or store. event:0X0182 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP24 : (Group 24 pm_pteg4) A Page Table Entry was loaded into the TLB from memory attached to a different module than this processor is located on. event:0X0183 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP24 : (Group 24 pm_pteg4) A Page Table Entry was loaded into the TLB from memory attached to the same module this processor is located on. event:0X0184 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP24 : (Group 24 pm_pteg4) Number of run instructions completed. event:0X0185 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP24 : (Group 24 pm_pteg4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 25 pm_pteg5, PTEG sources event:0X0190 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_RL2L3_MOD_GRP25 : (Group 25 pm_pteg5) A Page Table Entry was loaded into the ERAT with modified (M) data from an L2 or L3 on a remote module due to a demand load or store. event:0X0191 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L31_SHR_GRP25 : (Group 25 pm_pteg5) PTEG loaded from another L3 on same chip shared event:0X0192 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_DL2L3_SHR_GRP25 : (Group 25 pm_pteg5) A Page Table Entry was loaded into the ERAT with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load or store. event:0X0193 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L21_SHR_GRP25 : (Group 25 pm_pteg5) PTEG loaded from another L2 on same chip shared event:0X0194 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP25 : (Group 25 pm_pteg5) Number of run instructions completed. event:0X0195 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP25 : (Group 25 pm_pteg5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 26 pm_pteg6, PTEG sources event:0X01A0 counters:0 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L31_MOD_GRP26 : (Group 26 pm_pteg6) Instruction PTEG loaded from another L3 on same chip modified event:0X01A1 counters:1 um:zero minimum:1000 name:PM_INST_PTEG_FROM_DMEM_GRP26 : (Group 26 pm_pteg6) Instruction PTEG loaded from distant memory event:0X01A2 counters:2 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L21_MOD_GRP26 : (Group 26 pm_pteg6) Instruction PTEG loaded from another L2 on same chip modified event:0X01A3 counters:3 um:zero minimum:1000 name:PM_INST_PTEG_FROM_LMEM_GRP26 : (Group 26 pm_pteg6) Instruction PTEG loaded from local memory event:0X01A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP26 : (Group 26 pm_pteg6) Number of run instructions completed. event:0X01A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP26 : (Group 26 pm_pteg6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 27 pm_pteg7, PTEG sources event:0X01B0 counters:0 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L31_MOD_GRP27 : (Group 27 pm_pteg7) Instruction PTEG loaded from another L3 on same chip modified event:0X01B1 counters:1 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L31_SHR_GRP27 : (Group 27 pm_pteg7) Instruction PTEG loaded from another L3 on same chip shared event:0X01B2 counters:2 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L21_MOD_GRP27 : (Group 27 pm_pteg7) Instruction PTEG loaded from another L2 on same chip modified event:0X01B3 counters:3 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L21_SHR_GRP27 : (Group 27 pm_pteg7) Instruction PTEG loaded from another L2 on same chip shared event:0X01B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP27 : (Group 27 pm_pteg7) Number of run instructions completed. event:0X01B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP27 : (Group 27 pm_pteg7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 28 pm_pteg8, PTEG sources event:0X01C0 counters:0 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L2_GRP28 : (Group 28 pm_pteg8) Instruction PTEG loaded from L2 event:0X01C1 counters:1 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L3MISS_GRP28 : (Group 28 pm_pteg8) Instruction PTEG loaded from L3 miss event:0X01C2 counters:2 um:zero minimum:1000 name:PM_INST_PTEG_FROM_RMEM_GRP28 : (Group 28 pm_pteg8) Instruction PTEG loaded from remote memory event:0X01C3 counters:3 um:zero minimum:1000 name:PM_INST_PTEG_FROM_L2MISS_GRP28 : (Group 28 pm_pteg8) Instruction PTEG loaded from L2 miss event:0X01C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP28 : (Group 28 pm_pteg8) Number of run instructions completed. event:0X01C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP28 : (Group 28 pm_pteg8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 29 pm_pteg9, PTEG sources event:0X01D0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP29 : (Group 29 pm_pteg9) A Page Table Entry was loaded into the ERAT from the local L2 due to a demand load or store. event:0X01D1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L3_GRP29 : (Group 29 pm_pteg9) A Page Table Entry was loaded into the TLB from the local L3 due to a demand load. event:0X01D2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP29 : (Group 29 pm_pteg9) A Page Table Entry was loaded into the TLB from memory attached to a different module than this processor is located on. event:0X01D3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L2MISS_GRP29 : (Group 29 pm_pteg9) A Page Table Entry was loaded into the TLB but not from the local L2. event:0X01D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP29 : (Group 29 pm_pteg9) Number of run instructions completed. event:0X01D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP29 : (Group 29 pm_pteg9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 30 pm_pteg10, PTEG sources event:0X01E0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP30 : (Group 30 pm_pteg10) A Page Table Entry was loaded into the ERAT from the local L2 due to a demand load or store. event:0X01E1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L3_GRP30 : (Group 30 pm_pteg10) A Page Table Entry was loaded into the TLB from the local L3 due to a demand load. event:0X01E2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP30 : (Group 30 pm_pteg10) Number of PowerPC Instructions that completed. event:0X01E3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP30 : (Group 30 pm_pteg10) Processor Cycles event:0X01E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP30 : (Group 30 pm_pteg10) Number of run instructions completed. event:0X01E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP30 : (Group 30 pm_pteg10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 31 pm_pteg11, PTEG sources event:0X01F0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_RL2L3_MOD_GRP31 : (Group 31 pm_pteg11) A Page Table Entry was loaded into the ERAT with modified (M) data from an L2 or L3 on a remote module due to a demand load or store. event:0X01F1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_RL2L3_SHR_GRP31 : (Group 31 pm_pteg11) A Page Table Entry was loaded into the ERAT with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load or store. event:0X01F2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_pteg11) Number of PowerPC Instructions that completed. event:0X01F3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_DL2L3_MOD_GRP31 : (Group 31 pm_pteg11) A Page Table Entry was loaded into the ERAT with modified (M) data from an L2 or L3 on a distant module due to a demand load or store. event:0X01F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP31 : (Group 31 pm_pteg11) Number of run instructions completed. event:0X01F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP31 : (Group 31 pm_pteg11) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 32 pm_pteg12, PTEG sources event:0X0200 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_pteg12) Number of PowerPC Instructions that completed. event:0X0201 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_DMEM_GRP32 : (Group 32 pm_pteg12) A Page Table Entry was loaded into the ERAT with data from memory attached to a distant module due to a demand load or store. event:0X0202 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP32 : (Group 32 pm_pteg12) A Page Table Entry was loaded into the TLB from memory attached to a different module than this processor is located on. event:0X0203 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP32 : (Group 32 pm_pteg12) A Page Table Entry was loaded into the TLB from memory attached to the same module this processor is located on. event:0X0204 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP32 : (Group 32 pm_pteg12) Number of run instructions completed. event:0X0205 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP32 : (Group 32 pm_pteg12) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 33 pm_freq1, Frequency events event:0X0210 counters:0 um:zero minimum:1000 name:PM_POWER_EVENT1_GRP33 : (Group 33 pm_freq1) Power Management Event 1 event:0X0211 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP33 : (Group 33 pm_freq1) Cycles that Instruction Dispatch was held due to power management. More than one hold condition can exist at the same time event:0X0212 counters:2 um:zero minimum:1000 name:PM_FREQ_DOWN_GRP33 : (Group 33 pm_freq1) Processor frequency was slowed down due to power management event:0X0213 counters:3 um:zero minimum:1000 name:PM_FREQ_UP_GRP33 : (Group 33 pm_freq1) Processor frequency was sped up due to power management event:0X0214 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP33 : (Group 33 pm_freq1) Number of run instructions completed. event:0X0215 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP33 : (Group 33 pm_freq1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 34 pm_freq2, Frequency events event:0X0220 counters:0 um:zero minimum:1000 name:PM_POWER_EVENT1_GRP34 : (Group 34 pm_freq2) Power Management Event 1 event:0X0221 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP34 : (Group 34 pm_freq2) Cycles that Instruction Dispatch was held due to power management. More than one hold condition can exist at the same time event:0X0222 counters:2 um:zero minimum:1000 name:PM_DISP_HELD_THERMAL_GRP34 : (Group 34 pm_freq2) Dispatch Held due to Thermal event:0X0223 counters:3 um:zero minimum:1000 name:PM_FREQ_UP_GRP34 : (Group 34 pm_freq2) Processor frequency was sped up due to power management event:0X0224 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP34 : (Group 34 pm_freq2) Number of run instructions completed. event:0X0225 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP34 : (Group 34 pm_freq2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 35 pm_L1_ref, L1 references event:0X0230 counters:0 um:zero minimum:1000 name:PM_LD_REF_L1_GRP35 : (Group 35 pm_L1_ref) L1 D cache load references counted at finish event:0X0231 counters:1 um:zero minimum:1000 name:PM_LD_REF_L1_LSU0_GRP35 : (Group 35 pm_L1_ref) Load references to Level 1 Data Cache, by unit 0. event:0X0232 counters:2 um:zero minimum:1000 name:PM_LD_REF_L1_LSU1_GRP35 : (Group 35 pm_L1_ref) Load references to Level 1 Data Cache, by unit 1. event:0X0233 counters:3 um:zero minimum:1000 name:PM_LSU_TWO_TABLEWALK_CYC_GRP35 : (Group 35 pm_L1_ref) Cycles when two tablewalks pending on this thread event:0X0234 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP35 : (Group 35 pm_L1_ref) Number of run instructions completed. event:0X0235 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP35 : (Group 35 pm_L1_ref) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 36 pm_flush1, Flushes event:0X0240 counters:0 um:zero minimum:1000 name:PM_FLUSH_DISP_SYNC_GRP36 : (Group 36 pm_flush1) Dispatch Flush: Sync event:0X0241 counters:1 um:zero minimum:1000 name:PM_FLUSH_DISP_TLBIE_GRP36 : (Group 36 pm_flush1) Dispatch Flush: TLBIE event:0X0242 counters:2 um:zero minimum:1000 name:PM_FLUSH_DISP_SB_GRP36 : (Group 36 pm_flush1) Dispatch Flush: Scoreboard event:0X0243 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP36 : (Group 36 pm_flush1) Flushes occurred including LSU and Branch flushes. event:0X0244 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP36 : (Group 36 pm_flush1) Number of run instructions completed. event:0X0245 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP36 : (Group 36 pm_flush1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 37 pm_flush2, Flushes event:0X0250 counters:0 um:zero minimum:1000 name:PM_FLUSH_PARTIAL_GRP37 : (Group 37 pm_flush2) Partial flush event:0X0251 counters:1 um:zero minimum:1000 name:PM_FLUSH_DISP_GRP37 : (Group 37 pm_flush2) Dispatch flush event:0X0252 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP37 : (Group 37 pm_flush2) A flush was initiated by the Load Store Unit. event:0X0253 counters:3 um:zero minimum:1000 name:PM_LSU_PARTIAL_CDF_GRP37 : (Group 37 pm_flush2) A partial cacheline was returned from the L3 event:0X0254 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP37 : (Group 37 pm_flush2) Number of run instructions completed. event:0X0255 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP37 : (Group 37 pm_flush2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 38 pm_flush, Flushes event:0X0260 counters:0 um:zero minimum:1000 name:PM_FLUSH_DISP_GRP38 : (Group 38 pm_flush) Dispatch flush event:0X0261 counters:1 um:zero minimum:10000 name:PM_CYC_GRP38 : (Group 38 pm_flush) Processor Cycles event:0X0262 counters:2 um:zero minimum:1000 name:PM_FLUSH_COMPLETION_GRP38 : (Group 38 pm_flush) Completion Flush event:0X0263 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP38 : (Group 38 pm_flush) Flushes occurred including LSU and Branch flushes. event:0X0264 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP38 : (Group 38 pm_flush) Number of run instructions completed. event:0X0265 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP38 : (Group 38 pm_flush) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 39 pm_lsu_flush1, LSU Flush event:0X0270 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP39 : (Group 39 pm_lsu_flush1) A load was flushed because it was unaligned (crossed a 64byte boundary, or 32 byte if it missed the L1). Combined Unit 0 + 1. event:0X0271 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP39 : (Group 39 pm_lsu_flush1) A store was flushed because it was unaligned (crossed a 4K boundary). Combined Unit 0 + 1. event:0X0272 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP39 : (Group 39 pm_lsu_flush1) Load Hit Load or Store Hit Load flush. A younger load was flushed because it executed before an older store and they had overlapping data OR two loads executed out of order and they have byte overlap and there was a snoop in between to an overlapped byte. Combined Unit 0 + 1. event:0X0273 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP39 : (Group 39 pm_lsu_flush1) Load Hit Store flush. A younger load was flushed because it hits (overlaps) an older store that is already in the SRQ or in the same group. If the real addresses match but the effective addresses do not, an alias condition exists that prevents store forwarding. If the load and store are in the same group the load must be flushed to separate the two instructions. Combined Unit 0 + 1. event:0X0274 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP39 : (Group 39 pm_lsu_flush1) Number of run instructions completed. event:0X0275 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP39 : (Group 39 pm_lsu_flush1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 40 pm_lsu_flush2, LSU Flush ULD event:0X0280 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP40 : (Group 40 pm_lsu_flush2) A load was flushed because it was unaligned (crossed a 64byte boundary, or 32 byte if it missed the L1). Combined Unit 0 + 1. event:0X0281 counters:1 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP40 : (Group 40 pm_lsu_flush2) A load was flushed from unit 0 because it was unaligned (crossed a 64 byte boundary, or 32 byte if it missed the L1) event:0X0282 counters:2 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP40 : (Group 40 pm_lsu_flush2) A load was flushed from unit 1 because it was unaligned (crossed a 64 byte boundary, or 32 byte if it missed the L1). event:0X0283 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP40 : (Group 40 pm_lsu_flush2) Flushes occurred including LSU and Branch flushes. event:0X0284 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP40 : (Group 40 pm_lsu_flush2) Number of run instructions completed. event:0X0285 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP40 : (Group 40 pm_lsu_flush2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 41 pm_lsu_flush3, LSU Flush UST event:0X0290 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP41 : (Group 41 pm_lsu_flush3) A store was flushed because it was unaligned (crossed a 4K boundary). Combined Unit 0 + 1. event:0X0291 counters:1 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP41 : (Group 41 pm_lsu_flush3) A store was flushed from unit 0 because it was unaligned (crossed a 4K boundary). event:0X0292 counters:2 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP41 : (Group 41 pm_lsu_flush3) A store was flushed from unit 1 because it was unaligned (crossed a 4K boundary) event:0X0293 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP41 : (Group 41 pm_lsu_flush3) Flushes occurred including LSU and Branch flushes. event:0X0294 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP41 : (Group 41 pm_lsu_flush3) Number of run instructions completed. event:0X0295 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP41 : (Group 41 pm_lsu_flush3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 42 pm_lsu_flush4, LSU Flush LRQ event:0X02A0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP42 : (Group 42 pm_lsu_flush4) Load Hit Load or Store Hit Load flush. A younger load was flushed because it executed before an older store and they had overlapping data OR two loads executed out of order and they have byte overlap and there was a snoop in between to an overlapped byte. Combined Unit 0 + 1. event:0X02A1 counters:1 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP42 : (Group 42 pm_lsu_flush4) Load Hit Load or Store Hit Load flush. A younger load was flushed from unit 0 because it executed before an older store and they had overlapping data OR two loads executed out of order and they have byte overlap and there was a snoop in between to an overlapped byte. event:0X02A2 counters:2 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP42 : (Group 42 pm_lsu_flush4) Load Hit Load or Store Hit Load flush. A younger load was flushed from unit 1 because it executed before an older store and they had overlapping data OR two loads executed out of order and they have byte overlap and there was a snoop in between to an overlapped byte. event:0X02A3 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP42 : (Group 42 pm_lsu_flush4) Flushes occurred including LSU and Branch flushes. event:0X02A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP42 : (Group 42 pm_lsu_flush4) Number of run instructions completed. event:0X02A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP42 : (Group 42 pm_lsu_flush4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 43 pm_lsu_flush5, LSU Flush SRQ event:0X02B0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP43 : (Group 43 pm_lsu_flush5) Load Hit Store flush. A younger load was flushed because it hits (overlaps) an older store that is already in the SRQ or in the same group. If the real addresses match but the effective addresses do not, an alias condition exists that prevents store forwarding. If the load and store are in the same group the load must be flushed to separate the two instructions. Combined Unit 0 + 1. event:0X02B1 counters:1 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP43 : (Group 43 pm_lsu_flush5) Load Hit Store flush. A younger load was flushed from unit 0 because it hits (overlaps) an older store that is already in the SRQ or in the same group. If the real addresses match but the effective addresses do not, an alias condition exists that prevents store forwarding. If the load and store are in the same group the load must be flushed to separate the two instructions. event:0X02B2 counters:2 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP43 : (Group 43 pm_lsu_flush5) Load Hit Store flush. A younger load was flushed from unit 1 because it hits (overlaps) an older store that is already in the SRQ or in the same group. If the real addresses match but the effective addresses do not, an alias condition exists that prevents store forwarding. If the load and store are in the same group the load must be flushed to separate the two instructions. event:0X02B3 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP43 : (Group 43 pm_lsu_flush5) Flushes occurred including LSU and Branch flushes. event:0X02B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP43 : (Group 43 pm_lsu_flush5) Number of run instructions completed. event:0X02B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP43 : (Group 43 pm_lsu_flush5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 44 pm_prefetch, I cache Prefetches event:0X02C0 counters:0 um:zero minimum:1000 name:PM_IC_DEMAND_CYC_GRP44 : (Group 44 pm_prefetch) Cycles when a demand ifetch was pending event:0X02C1 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP44 : (Group 44 pm_prefetch) An instruction prefetch request has been made. event:0X02C2 counters:2 um:zero minimum:1000 name:PM_IC_RELOAD_SHR_GRP44 : (Group 44 pm_prefetch) An Instruction Cache request was made by this thread and the cache line was already in the cache for the other thread. The line is marked valid for all threads. event:0X02C3 counters:3 um:zero minimum:1000 name:PM_IC_PREF_WRITE_GRP44 : (Group 44 pm_prefetch) Number of Instruction Cache entries written because of prefetch. Prefetch entries are marked least recently used and are candidates for eviction if they are not needed to satify a demand fetch. event:0X02C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP44 : (Group 44 pm_prefetch) Number of run instructions completed. event:0X02C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP44 : (Group 44 pm_prefetch) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 45 pm_thread_cyc1, Thread cycles event:0X02D0 counters:0 um:zero minimum:1000 name:PM_ANY_THRD_RUN_CYC_GRP45 : (Group 45 pm_thread_cyc1) One of threads in run_cycles event:0X02D1 counters:1 um:zero minimum:1000 name:PM_THRD_ALL_RUN_CYC_GRP45 : (Group 45 pm_thread_cyc1) Cycles when all threads had their run latches set. Operating systems use the run latch to indicate when they are doing useful work. event:0X02D2 counters:2 um:zero minimum:1000 name:PM_THRD_CONC_RUN_INST_GRP45 : (Group 45 pm_thread_cyc1) Instructions completed by this thread when both threads had their run latches set. event:0X02D3 counters:3 um:zero minimum:1000 name:PM_THRD_4_RUN_CYC_GRP45 : (Group 45 pm_thread_cyc1) 4 thread in Run Cycles event:0X02D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP45 : (Group 45 pm_thread_cyc1) Number of run instructions completed. event:0X02D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP45 : (Group 45 pm_thread_cyc1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 46 pm_thread_cyc2, Thread cycles event:0X02E0 counters:0 um:zero minimum:1000 name:PM_THRD_GRP_CMPL_BOTH_CYC_GRP46 : (Group 46 pm_thread_cyc2) Cycles that both threads completed. event:0X02E1 counters:1 um:zero minimum:1000 name:PM_THRD_ALL_RUN_CYC_GRP46 : (Group 46 pm_thread_cyc2) Cycles when all threads had their run latches set. Operating systems use the run latch to indicate when they are doing useful work. event:0X02E2 counters:2 um:zero minimum:1000 name:PM_THRD_CONC_RUN_INST_GRP46 : (Group 46 pm_thread_cyc2) Instructions completed by this thread when both threads had their run latches set. event:0X02E3 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_0_1_CYC_GRP46 : (Group 46 pm_thread_cyc2) Cycles thread running at priority level 0 or 1 event:0X02E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP46 : (Group 46 pm_thread_cyc2) Number of run instructions completed. event:0X02E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP46 : (Group 46 pm_thread_cyc2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 47 pm_thread_cyc3, Thread cycles event:0X02F0 counters:0 um:zero minimum:1000 name:PM_THRD_3_CONC_RUN_INST_GRP47 : (Group 47 pm_thread_cyc3) 3 thread Concurrent Run Instructions event:0X02F1 counters:1 um:zero minimum:1000 name:PM_THRD_2_RUN_CYC_GRP47 : (Group 47 pm_thread_cyc3) 2 thread in Run Cycles event:0X02F2 counters:2 um:zero minimum:1000 name:PM_THRD_3_RUN_CYC_GRP47 : (Group 47 pm_thread_cyc3) 3 thread in Run Cycles event:0X02F3 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_4_5_CYC_GRP47 : (Group 47 pm_thread_cyc3) Cycles thread running at priority level 4 or 5 event:0X02F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP47 : (Group 47 pm_thread_cyc3) Number of run instructions completed. event:0X02F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP47 : (Group 47 pm_thread_cyc3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 48 pm_thread_cyc4, Thread cycles event:0X0300 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_2_3_CYC_GRP48 : (Group 48 pm_thread_cyc4) Cycles thread running at priority level 2 or 3 event:0X0301 counters:1 um:zero minimum:1000 name:PM_THRD_4_CONC_RUN_INST_GRP48 : (Group 48 pm_thread_cyc4) 4 thread Concurrent Run Instructions event:0X0302 counters:2 um:zero minimum:1000 name:PM_1THRD_CON_RUN_INSTR_GRP48 : (Group 48 pm_thread_cyc4) 1 thread Concurrent Run Instructions event:0X0303 counters:3 um:zero minimum:1000 name:PM_THRD_2_CONC_RUN_INSTR_GRP48 : (Group 48 pm_thread_cyc4) 2 thread Concurrent Run Instructions event:0X0304 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP48 : (Group 48 pm_thread_cyc4) Number of run instructions completed. event:0X0305 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP48 : (Group 48 pm_thread_cyc4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 49 pm_thread_cyc5, Thread cycles event:0X0310 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_0_1_CYC_GRP49 : (Group 49 pm_thread_cyc5) Cycles thread running at priority level 0 or 1 event:0X0311 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_2_3_CYC_GRP49 : (Group 49 pm_thread_cyc5) Cycles thread running at priority level 2 or 3 event:0X0312 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_4_5_CYC_GRP49 : (Group 49 pm_thread_cyc5) Cycles thread running at priority level 4 or 5 event:0X0313 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_6_7_CYC_GRP49 : (Group 49 pm_thread_cyc5) Cycles thread running at priority level 6 or 7 event:0X0314 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP49 : (Group 49 pm_thread_cyc5) Number of run instructions completed. event:0X0315 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP49 : (Group 49 pm_thread_cyc5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 50 pm_thread_cyc6, Thread cycles event:0X0320 counters:0 um:zero minimum:1000 name:PM_THRD_1_RUN_CYC_GRP50 : (Group 50 pm_thread_cyc6) At least one thread has set its run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. This event does not respect FCWAIT. event:0X0321 counters:1 um:zero minimum:1000 name:PM_THRD_ALL_RUN_CYC_GRP50 : (Group 50 pm_thread_cyc6) Cycles when all threads had their run latches set. Operating systems use the run latch to indicate when they are doing useful work. event:0X0322 counters:2 um:zero minimum:1000 name:PM_THRD_CONC_RUN_INST_GRP50 : (Group 50 pm_thread_cyc6) Instructions completed by this thread when both threads had their run latches set. event:0X0323 counters:3 um:zero minimum:1000 name:PM_THRD_4_RUN_CYC_GRP50 : (Group 50 pm_thread_cyc6) 4 thread in Run Cycles event:0X0324 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP50 : (Group 50 pm_thread_cyc6) Number of run instructions completed. event:0X0325 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP50 : (Group 50 pm_thread_cyc6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 51 pm_fxu1, FXU events event:0X0330 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP51 : (Group 51 pm_fxu1) FXU0 and FXU1 are both idle. event:0X0331 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP51 : (Group 51 pm_fxu1) Cycles when both FXU0 and FXU1 are busy. event:0X0332 counters:2 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP51 : (Group 51 pm_fxu1) FXU0 is busy while FXU1 was idle event:0X0333 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP51 : (Group 51 pm_fxu1) FXU0 was idle while FXU1 was busy event:0X0334 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP51 : (Group 51 pm_fxu1) Number of run instructions completed. event:0X0335 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP51 : (Group 51 pm_fxu1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 52 pm_fxu2, FXU events event:0X0340 counters:0 um:zero minimum:1000 name:PM_FXU0_FIN_GRP52 : (Group 52 pm_fxu2) The Fixed Point unit 0 finished an instruction and produced a result. Instructions that finish may not necessary complete. event:0X0341 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP52 : (Group 52 pm_fxu2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0342 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP52 : (Group 52 pm_fxu2) Number of PowerPC Instructions that completed. event:0X0343 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP52 : (Group 52 pm_fxu2) The Fixed Point unit 1 finished an instruction and produced a result. Instructions that finish may not necessary complete. event:0X0344 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP52 : (Group 52 pm_fxu2) Number of run instructions completed. event:0X0345 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP52 : (Group 52 pm_fxu2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 53 pm_fxu3, FXU events event:0X0350 counters:0 um:zero minimum:10000 name:PM_CYC_GRP53 : (Group 53 pm_fxu3) Processor Cycles event:0X0351 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP53 : (Group 53 pm_fxu3) Cycles when both FXU0 and FXU1 are busy. event:0X0352 counters:2 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP53 : (Group 53 pm_fxu3) FXU0 is busy while FXU1 was idle event:0X0353 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP53 : (Group 53 pm_fxu3) FXU0 was idle while FXU1 was busy event:0X0354 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP53 : (Group 53 pm_fxu3) Number of run instructions completed. event:0X0355 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP53 : (Group 53 pm_fxu3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 54 pm_fxu4, FXU events event:0X0360 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP54 : (Group 54 pm_fxu4) FXU0 and FXU1 are both idle. event:0X0361 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP54 : (Group 54 pm_fxu4) Cycles when both FXU0 and FXU1 are busy. event:0X0362 counters:2 um:zero minimum:10000 name:PM_CYC_GRP54 : (Group 54 pm_fxu4) Processor Cycles event:0X0363 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP54 : (Group 54 pm_fxu4) Number of PowerPC Instructions that completed. event:0X0364 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP54 : (Group 54 pm_fxu4) Number of run instructions completed. event:0X0365 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP54 : (Group 54 pm_fxu4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 55 pm_L2_RCLD, L2 RC load events event:0X0370 counters:0 um:zero minimum:1000 name:PM_L2_RCLD_DISP_GRP55 : (Group 55 pm_L2_RCLD) L2 RC load dispatch attempt event:0X0371 counters:1 um:zero minimum:1000 name:PM_L2_RCLD_DISP_FAIL_OTHER_GRP55 : (Group 55 pm_L2_RCLD) L2 RC load dispatch attempt failed due to other reasons event:0X0372 counters:2 um:zero minimum:1000 name:PM_L2_RCST_DISP_GRP55 : (Group 55 pm_L2_RCLD) L2 RC store dispatch attempt event:0X0373 counters:3 um:zero minimum:1000 name:PM_L2_RCLD_BUSY_RC_FULL_GRP55 : (Group 55 pm_L2_RCLD) L2 activated Busy to the core for loads due to all RC full event:0X0374 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP55 : (Group 55 pm_L2_RCLD) Number of run instructions completed. event:0X0375 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP55 : (Group 55 pm_L2_RCLD) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 56 pm_L2_RC, RC related events event:0X0380 counters:0 um:zero minimum:1000 name:PM_L2_CO_FAIL_BUSY_GRP56 : (Group 56 pm_L2_RC) L2 RC Cast Out dispatch attempt failed due to all CO machines busy event:0X0381 counters:1 um:zero minimum:10000 name:PM_CYC_GRP56 : (Group 56 pm_L2_RC) Processor Cycles event:0X0382 counters:2 um:zero minimum:1000 name:PM_L2_RC_ST_DONE_GRP56 : (Group 56 pm_L2_RC) RC did st to line that was Tx or Sx event:0X0383 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP56 : (Group 56 pm_L2_RC) Number of PowerPC Instructions that completed. event:0X0384 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP56 : (Group 56 pm_L2_RC) Number of run instructions completed. event:0X0385 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP56 : (Group 56 pm_L2_RC) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 57 pm_L2_RCST, L2 RC Store Events event:0X0390 counters:0 um:zero minimum:1000 name:PM_L2_RCLD_DISP_GRP57 : (Group 57 pm_L2_RCST) L2 RC load dispatch attempt event:0X0391 counters:1 um:zero minimum:1000 name:PM_L2_RCLD_DISP_FAIL_OTHER_GRP57 : (Group 57 pm_L2_RCST) L2 RC load dispatch attempt failed due to other reasons event:0X0392 counters:2 um:zero minimum:1000 name:PM_L2_RCST_DISP_FAIL_ADDR_GRP57 : (Group 57 pm_L2_RCST) L2 RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0393 counters:3 um:zero minimum:1000 name:PM_L2_RCST_DISP_FAIL_OTHER_GRP57 : (Group 57 pm_L2_RCST) L2 RC store dispatch attempt failed due to other reasons event:0X0394 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP57 : (Group 57 pm_L2_RCST) Number of run instructions completed. event:0X0395 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP57 : (Group 57 pm_L2_RCST) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 58 pm_L2_ldst_1, L2 load/store event:0X03A0 counters:0 um:zero minimum:1000 name:PM_L2_ST_GRP58 : (Group 58 pm_L2_ldst_1) Data Store Count event:0X03A1 counters:1 um:zero minimum:1000 name:PM_L2_LD_MISS_GRP58 : (Group 58 pm_L2_ldst_1) Data Load Miss event:0X03A2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP58 : (Group 58 pm_L2_ldst_1) Number of PowerPC Instructions that completed. event:0X03A3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP58 : (Group 58 pm_L2_ldst_1) Processor Cycles event:0X03A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP58 : (Group 58 pm_L2_ldst_1) Number of run instructions completed. event:0X03A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP58 : (Group 58 pm_L2_ldst_1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 59 pm_L2_ldst_2, L2 load/store event:0X03B0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP59 : (Group 59 pm_L2_ldst_2) Number of PowerPC Instructions that completed. event:0X03B1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP59 : (Group 59 pm_L2_ldst_2) Processor Cycles event:0X03B2 counters:2 um:zero minimum:1000 name:PM_L2_LD_HIT_GRP59 : (Group 59 pm_L2_ldst_2) A load request (data or instruction) hit in the L2 directory. Includes speculative, prefetched, and demand requests. This event includes all requests to this L2 from all sources. Total for all slices event:0X03B3 counters:3 um:zero minimum:1000 name:PM_L2_ST_HIT_GRP59 : (Group 59 pm_L2_ldst_2) A store request hit in the L2 directory. This event includes all requests to this L2 from all sources. Total for all slices. event:0X03B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP59 : (Group 59 pm_L2_ldst_2) Number of run instructions completed. event:0X03B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP59 : (Group 59 pm_L2_ldst_2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 60 pm_L2_ldst_3, L2 load/store event:0X03C0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP60 : (Group 60 pm_L2_ldst_3) Number of PowerPC Instructions that completed. event:0X03C1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP60 : (Group 60 pm_L2_ldst_3) Processor Cycles event:0X03C2 counters:2 um:zero minimum:1000 name:PM_L2_LD_DISP_GRP60 : (Group 60 pm_L2_ldst_3) All successful load dispatches event:0X03C3 counters:3 um:zero minimum:1000 name:PM_L2_ST_DISP_GRP60 : (Group 60 pm_L2_ldst_3) All successful store dispatches event:0X03C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP60 : (Group 60 pm_L2_ldst_3) Number of run instructions completed. event:0X03C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP60 : (Group 60 pm_L2_ldst_3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 61 pm_L2_RCSTLD, L2 RC Load/Store Events event:0X03D0 counters:0 um:zero minimum:1000 name:PM_L2_RCLD_DISP_FAIL_ADDR_GRP61 : (Group 61 pm_L2_RCSTLD) L2 RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X03D1 counters:1 um:zero minimum:1000 name:PM_L2_RCST_BUSY_RC_FULL_GRP61 : (Group 61 pm_L2_RCSTLD) L2 activated Busy to the core for stores due to all RC full event:0X03D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP61 : (Group 61 pm_L2_RCSTLD) Number of PowerPC Instructions that completed. event:0X03D3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP61 : (Group 61 pm_L2_RCSTLD) Processor Cycles event:0X03D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP61 : (Group 61 pm_L2_RCSTLD) Number of run instructions completed. event:0X03D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP61 : (Group 61 pm_L2_RCSTLD) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 62 pm_nest1, Nest Events event:0X03E0 counters:0 um:zero minimum:1000 name:PM_PB_NODE_PUMP_GRP62 : (Group 62 pm_nest1) Nest events (MC0/MC1/PB/GX), Pair0 Bit0 event:0X03E1 counters:1 um:zero minimum:1000 name:PM_PB_SYS_PUMP_GRP62 : (Group 62 pm_nest1) Nest events (MC0/MC1/PB/GX), Pair1 Bit0 event:0X03E2 counters:2 um:zero minimum:1000 name:PM_PB_RETRY_NODE_PUMP_GRP62 : (Group 62 pm_nest1) Nest events (MC0/MC1/PB/GX), Pair2 Bit0 event:0X03E3 counters:3 um:zero minimum:1000 name:PM_PB_RETRY_SYS_PUMP_GRP62 : (Group 62 pm_nest1) Nest events (MC0/MC1/PB/GX), Pair3 Bit0 event:0X03E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP62 : (Group 62 pm_nest1) Number of run instructions completed. event:0X03E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP62 : (Group 62 pm_nest1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 63 pm_nest2, Nest Events event:0X03F0 counters:0 um:zero minimum:1000 name:PM_MEM0_RQ_DISP_GRP63 : (Group 63 pm_nest2) Nest events (MC0/MC1/PB/GX), Pair0 Bit1 event:0X03F1 counters:1 um:zero minimum:1000 name:PM_MEM0_PREFETCH_DISP_GRP63 : (Group 63 pm_nest2) Nest events (MC0/MC1/PB/GX), Pair1 Bit1 event:0X03F2 counters:2 um:zero minimum:1000 name:PM_MEM0_PB_RD_CL_GRP63 : (Group 63 pm_nest2) Nest events (MC0/MC1/PB/GX), Pair2 Bit1 event:0X03F3 counters:3 um:zero minimum:1000 name:PM_MEM0_WQ_DISP_GRP63 : (Group 63 pm_nest2) Nest events (MC0/MC1/PB/GX), Pair3 Bit1 event:0X03F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP63 : (Group 63 pm_nest2) Number of run instructions completed. event:0X03F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP63 : (Group 63 pm_nest2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 64 pm_nest3, Nest Events event:0X0400 counters:0 um:zero minimum:1000 name:PM_NEST_PAIR0_ADD_GRP64 : (Group 64 pm_nest3) Nest events (MC0/MC1/PB/GX), Pair0 ADD event:0X0401 counters:1 um:zero minimum:1000 name:PM_NEST_PAIR1_ADD_GRP64 : (Group 64 pm_nest3) Nest events (MC0/MC1/PB/GX), Pair1 ADD event:0X0402 counters:2 um:zero minimum:1000 name:PM_NEST_PAIR2_ADD_GRP64 : (Group 64 pm_nest3) Nest events (MC0/MC1/PB/GX), Pair2 ADD event:0X0403 counters:3 um:zero minimum:1000 name:PM_NEST_PAIR3_ADD_GRP64 : (Group 64 pm_nest3) Nest events (MC0/MC1/PB/GX), Pair3 ADD event:0X0404 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP64 : (Group 64 pm_nest3) Number of run instructions completed. event:0X0405 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP64 : (Group 64 pm_nest3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 65 pm_nest4, Nest Events event:0X0410 counters:0 um:zero minimum:1000 name:PM_NEST_PAIR0_AND_GRP65 : (Group 65 pm_nest4) Nest events (MC0/MC1/PB/GX), Pair0 AND event:0X0411 counters:1 um:zero minimum:1000 name:PM_NEST_PAIR1_AND_GRP65 : (Group 65 pm_nest4) Nest events (MC0/MC1/PB/GX), Pair1 AND event:0X0412 counters:2 um:zero minimum:1000 name:PM_NEST_PAIR2_AND_GRP65 : (Group 65 pm_nest4) Nest events (MC0/MC1/PB/GX), Pair2 AND event:0X0413 counters:3 um:zero minimum:1000 name:PM_NEST_PAIR3_AND_GRP65 : (Group 65 pm_nest4) Nest events (MC0/MC1/PB/GX), Pair3 AND event:0X0414 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP65 : (Group 65 pm_nest4) Number of run instructions completed. event:0X0415 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP65 : (Group 65 pm_nest4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 66 pm_L2_redir_pref, L2 redirect and prefetch event:0X0420 counters:0 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BHT_REDIRECT_GRP66 : (Group 66 pm_L2_redir_pref) A demand (not prefetch) miss to the instruction cache was sent to the L2 as a result of a branch prediction redirect (CR mispredict). event:0X0421 counters:1 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BR_REDIRECT_GRP66 : (Group 66 pm_L2_redir_pref) A demand (not prefetch) miss to the instruction cache was sent to the L2 as a result of a branch prediction redirect (either ALL mispredicted or Target). event:0X0422 counters:2 um:zero minimum:1000 name:PM_IC_DEMAND_REQ_GRP66 : (Group 66 pm_L2_redir_pref) Demand Instruction fetch request event:0X0423 counters:3 um:zero minimum:1000 name:PM_IC_BANK_CONFLICT_GRP66 : (Group 66 pm_L2_redir_pref) Read blocked due to interleave conflict. event:0X0424 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP66 : (Group 66 pm_L2_redir_pref) Number of run instructions completed. event:0X0425 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP66 : (Group 66 pm_L2_redir_pref) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 67 pm_dlatencies1, Data latencies event:0X0430 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP67 : (Group 67 pm_dlatencies1) The processor's Data Cache was reloaded from the local L2 due to a demand load. event:0X0431 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP67 : (Group 67 pm_dlatencies1) Number of PowerPC instructions successfully dispatched. event:0X0432 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP67 : (Group 67 pm_dlatencies1) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0433 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP67 : (Group 67 pm_dlatencies1) A group containing at least one PPC instruction was dispatched. For microcoded instructions that span multiple groups, this will only occur once. event:0X0434 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP67 : (Group 67 pm_dlatencies1) Number of run instructions completed. event:0X0435 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP67 : (Group 67 pm_dlatencies1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 68 pm_dlatencies2, Data latencies event:0X0440 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP68 : (Group 68 pm_dlatencies2) The processor's Data Cache was reloaded from the local L3 due to a demand load. event:0X0441 counters:1 um:zero minimum:10000 name:PM_CYC_GRP68 : (Group 68 pm_dlatencies2) Processor Cycles event:0X0442 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP68 : (Group 68 pm_dlatencies2) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0443 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP68 : (Group 68 pm_dlatencies2) Number of PowerPC Instructions that completed. event:0X0444 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP68 : (Group 68 pm_dlatencies2) Number of run instructions completed. event:0X0445 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP68 : (Group 68 pm_dlatencies2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 69 pm_dlatencies3, Data latencies event:0X0450 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_GRP69 : (Group 69 pm_dlatencies3) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a remote module due to a demand load event:0X0451 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_GRP69 : (Group 69 pm_dlatencies3) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load event:0X0452 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP69 : (Group 69 pm_dlatencies3) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0453 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP69 : (Group 69 pm_dlatencies3) Number of PowerPC Instructions that completed. event:0X0454 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP69 : (Group 69 pm_dlatencies3) Number of run instructions completed. event:0X0455 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP69 : (Group 69 pm_dlatencies3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 70 pm_rejects1, Reject event event:0X0460 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_GRP70 : (Group 70 pm_rejects1) The Load Store Unit rejected an instruction. Combined Unit 0 + 1 event:0X0461 counters:1 um:zero minimum:1000 name:PM_LSU0_REJECT_LHS_GRP70 : (Group 70 pm_rejects1) Load Store Unit 0 rejected a load instruction that had an address overlap with an older store in the store queue. The store must be committed and de-allocated from the Store Queue before the load can execute successfully. event:0X0462 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_LHS_GRP70 : (Group 70 pm_rejects1) Load Store Unit 1 rejected a load instruction that had an address overlap with an older store in the store queue. The store must be committed and de-allocated from the Store Queue before the load can execute successfully. event:0X0463 counters:3 um:zero minimum:1000 name:PM_LSU_REJECT_LHS_GRP70 : (Group 70 pm_rejects1) The Load Store Unit rejected a load instruction that had an address overlap with an older store in the store queue. The store must be committed and de-allocated from the Store Queue before the load can execute successfully. Combined Unit 0 + 1 event:0X0464 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP70 : (Group 70 pm_rejects1) Number of run instructions completed. event:0X0465 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP70 : (Group 70 pm_rejects1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 71 pm_rejects2, Reject events event:0X0470 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_GRP71 : (Group 71 pm_rejects2) The Load Store Unit rejected an instruction. Combined Unit 0 + 1 event:0X0471 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_ERAT_MISS_GRP71 : (Group 71 pm_rejects2) Total cycles the Load Store Unit is busy rejecting instructions due to an ERAT miss. Combined unit 0 + 1. Requests that miss the Derat are rejected and retried until the request hits in the Erat. event:0X0472 counters:2 um:zero minimum:1000 name:PM_LSU_REJECT_SET_MPRED_GRP71 : (Group 71 pm_rejects2) The Load Store Unit rejected an instruction because the cache set was improperly predicted. This is a fast reject and will be immediately redispatched. Combined Unit 0 + 1 event:0X0473 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP71 : (Group 71 pm_rejects2) The Store Request Queue is empty event:0X0474 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP71 : (Group 71 pm_rejects2) Number of run instructions completed. event:0X0475 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP71 : (Group 71 pm_rejects2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 72 pm_rejects3, Set mispredictions rejects event:0X0480 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_SET_MPRED_GRP72 : (Group 72 pm_rejects3) The Load Store Unit rejected an instruction because the cache set was improperly predicted. This is a fast reject and will be immediately redispatched. Combined Unit 0 + 1 event:0X0481 counters:1 um:zero minimum:1000 name:PM_LSU_SET_MPRED_GRP72 : (Group 72 pm_rejects3) Line already in cache at reload time event:0X0482 counters:2 um:zero minimum:10000 name:PM_CYC_GRP72 : (Group 72 pm_rejects3) Processor Cycles event:0X0483 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP72 : (Group 72 pm_rejects3) Number of PowerPC Instructions that completed. event:0X0484 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP72 : (Group 72 pm_rejects3) Number of run instructions completed. event:0X0485 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP72 : (Group 72 pm_rejects3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 73 pm_lsu_reject, LSU Reject Event event:0X0490 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_LMQ_FULL_GRP73 : (Group 73 pm_lsu_reject) Total cycles the Load Store Unit is busy rejecting instructions because the Load Miss Queue was full. The LMQ has eight entries. If all the eight entries are full, subsequent load instructions are rejected. Combined unit 0 + 1. event:0X0491 counters:1 um:zero minimum:1000 name:PM_LSU0_REJECT_LMQ_FULL_GRP73 : (Group 73 pm_lsu_reject) Total cycles the Load Store Unit 0 is busy rejecting instructions because the Load Miss Queue was full. The LMQ has eight entries. If all eight entries are full, subsequent load instructions are rejected. event:0X0492 counters:2 um:zero minimum:1000 name:PM_LSU1_REJECT_LMQ_FULL_GRP73 : (Group 73 pm_lsu_reject) Total cycles the Load Store Unit 1 is busy rejecting instructions because the Load Miss Queue was full. The LMQ has eight entries. If all eight entries are full, subsequent load instructions are rejected. event:0X0493 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP73 : (Group 73 pm_lsu_reject) Number of PowerPC Instructions that completed. event:0X0494 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP73 : (Group 73 pm_lsu_reject) Number of run instructions completed. event:0X0495 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP73 : (Group 73 pm_lsu_reject) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 74 pm_lsu_ncld, Non cachable loads event:0X04A0 counters:0 um:zero minimum:1000 name:PM_LSU_NCLD_GRP74 : (Group 74 pm_lsu_ncld) A non-cacheable load was executed. Combined Unit 0 + 1. event:0X04A1 counters:1 um:zero minimum:1000 name:PM_LSU0_NCLD_GRP74 : (Group 74 pm_lsu_ncld) A non-cacheable load was executed by unit 0. event:0X04A2 counters:2 um:zero minimum:1000 name:PM_LSU1_NCLD_GRP74 : (Group 74 pm_lsu_ncld) A non-cacheable load was executed by Unit 0. event:0X04A3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP74 : (Group 74 pm_lsu_ncld) Number of PowerPC Instructions that completed. event:0X04A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP74 : (Group 74 pm_lsu_ncld) Number of run instructions completed. event:0X04A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP74 : (Group 74 pm_lsu_ncld) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 75 pm_gct1, GCT events event:0X04B0 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP75 : (Group 75 pm_gct1) Cycles when the Global Completion Table has no slots from this thread. event:0X04B1 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP75 : (Group 75 pm_gct1) Cycles when the Global Completion Table was completely empty. No thread had an entry allocated. event:0X04B2 counters:2 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP75 : (Group 75 pm_gct1) The Global Completion Table is completely full. event:0X04B3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP75 : (Group 75 pm_gct1) Processor Cycles event:0X04B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP75 : (Group 75 pm_gct1) Number of run instructions completed. event:0X04B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP75 : (Group 75 pm_gct1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 76 pm_gct2, GCT Events event:0X04C0 counters:0 um:zero minimum:1000 name:PM_GCT_UTIL_1_TO_2_SLOTS_GRP76 : (Group 76 pm_gct2) GCT Utilization 1-2 entries event:0X04C1 counters:1 um:zero minimum:1000 name:PM_GCT_UTIL_3_TO_6_SLOTS_GRP76 : (Group 76 pm_gct2) GCT Utilization 3-6 entries event:0X04C2 counters:2 um:zero minimum:1000 name:PM_GCT_UTIL_7_TO_10_SLOTS_GRP76 : (Group 76 pm_gct2) GCT Utilization 7-10 entries event:0X04C3 counters:3 um:zero minimum:1000 name:PM_GCT_UTIL_11_PLUS_SLOTS_GRP76 : (Group 76 pm_gct2) GCT Utilization 11+ entries event:0X04C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP76 : (Group 76 pm_gct2) Number of run instructions completed. event:0X04C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP76 : (Group 76 pm_gct2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 77 pm_L2_castout_invalidate_1, L2 castout and invalidate events event:0X04D0 counters:0 um:zero minimum:1000 name:PM_L2_CASTOUT_MOD_GRP77 : (Group 77 pm_L2_castout_invalidate_1) An L2 line in the Modified state was castout. Total for all slices. event:0X04D1 counters:1 um:zero minimum:1000 name:PM_L2_DC_INV_GRP77 : (Group 77 pm_L2_castout_invalidate_1) The L2 invalidated a line in processor's data cache. This is caused by the L2 line being cast out or invalidated. Total for all slices event:0X04D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP77 : (Group 77 pm_L2_castout_invalidate_1) Number of PowerPC Instructions that completed. event:0X04D3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP77 : (Group 77 pm_L2_castout_invalidate_1) Processor Cycles event:0X04D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP77 : (Group 77 pm_L2_castout_invalidate_1) Number of run instructions completed. event:0X04D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP77 : (Group 77 pm_L2_castout_invalidate_1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 78 pm_L2_castout_invalidate_2, L2 castout and invalidate events event:0X04E0 counters:0 um:zero minimum:1000 name:PM_L2_CASTOUT_SHR_GRP78 : (Group 78 pm_L2_castout_invalidate_2) An L2 line in the Shared state was castout. Total for all slices. event:0X04E1 counters:1 um:zero minimum:1000 name:PM_L2_IC_INV_GRP78 : (Group 78 pm_L2_castout_invalidate_2) Icache Invalidates from L2 event:0X04E2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP78 : (Group 78 pm_L2_castout_invalidate_2) Number of PowerPC Instructions that completed. event:0X04E3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP78 : (Group 78 pm_L2_castout_invalidate_2) Processor Cycles event:0X04E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP78 : (Group 78 pm_L2_castout_invalidate_2) Number of run instructions completed. event:0X04E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP78 : (Group 78 pm_L2_castout_invalidate_2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 79 pm_disp_held1, Dispatch held conditions event:0X04F0 counters:0 um:zero minimum:1000 name:PM_DISP_HELD_GRP79 : (Group 79 pm_disp_held1) Dispatch Held event:0X04F1 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP79 : (Group 79 pm_disp_held1) Cycles that Instruction Dispatch was held due to power management. More than one hold condition can exist at the same time event:0X04F2 counters:2 um:zero minimum:1000 name:PM_DISP_HELD_THERMAL_GRP79 : (Group 79 pm_disp_held1) Dispatch Held due to Thermal event:0X04F3 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP79 : (Group 79 pm_disp_held1) A group containing at least one PPC instruction was dispatched. For microcoded instructions that span multiple groups, this will only occur once. event:0X04F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP79 : (Group 79 pm_disp_held1) Number of run instructions completed. event:0X04F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP79 : (Group 79 pm_disp_held1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 80 pm_disp_held2, Dispatch held conditions event:0X0500 counters:0 um:zero minimum:1000 name:PM_THERMAL_WARN_GRP80 : (Group 80 pm_disp_held2) Processor in Thermal Warning event:0X0501 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP80 : (Group 80 pm_disp_held2) Cycles that Instruction Dispatch was held due to power management. More than one hold condition can exist at the same time event:0X0502 counters:2 um:zero minimum:1000 name:PM_DISP_HELD_THERMAL_GRP80 : (Group 80 pm_disp_held2) Dispatch Held due to Thermal event:0X0503 counters:3 um:zero minimum:1000 name:PM_THERMAL_MAX_GRP80 : (Group 80 pm_disp_held2) The processor experienced a thermal overload condition. This bit is sticky, it remains set until cleared by software. event:0X0504 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP80 : (Group 80 pm_disp_held2) Number of run instructions completed. event:0X0505 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP80 : (Group 80 pm_disp_held2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 81 pm_disp_clb_held, Display CLB held conditions event:0X0510 counters:0 um:zero minimum:1000 name:PM_DISP_CLB_HELD_BAL_GRP81 : (Group 81 pm_disp_clb_held) Dispatch/CLB Hold: Balance event:0X0511 counters:1 um:zero minimum:1000 name:PM_DISP_CLB_HELD_RES_GRP81 : (Group 81 pm_disp_clb_held) Dispatch/CLB Hold: Resource event:0X0512 counters:2 um:zero minimum:1000 name:PM_DISP_CLB_HELD_TLBIE_GRP81 : (Group 81 pm_disp_clb_held) Dispatch Hold: Due to TLBIE event:0X0513 counters:3 um:zero minimum:1000 name:PM_DISP_CLB_HELD_SYNC_GRP81 : (Group 81 pm_disp_clb_held) Dispatch/CLB Hold: Sync type instruction event:0X0514 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP81 : (Group 81 pm_disp_clb_held) Number of run instructions completed. event:0X0515 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP81 : (Group 81 pm_disp_clb_held) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 82 pm_power, Power Events event:0X0520 counters:0 um:zero minimum:1000 name:PM_POWER_EVENT1_GRP82 : (Group 82 pm_power) Power Management Event 1 event:0X0521 counters:1 um:zero minimum:1000 name:PM_POWER_EVENT2_GRP82 : (Group 82 pm_power) Power Management Event 2 event:0X0522 counters:2 um:zero minimum:1000 name:PM_POWER_EVENT3_GRP82 : (Group 82 pm_power) Power Management Event 3 event:0X0523 counters:3 um:zero minimum:1000 name:PM_POWER_EVENT4_GRP82 : (Group 82 pm_power) Power Management Event 4 event:0X0524 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP82 : (Group 82 pm_power) Number of run instructions completed. event:0X0525 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP82 : (Group 82 pm_power) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 83 pm_dispatch1, Groups and instructions dispatched event:0X0530 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP83 : (Group 83 pm_dispatch1) A group containing at least one PPC instruction completed. For microcoded instructions that span multiple groups, this will only occur once. event:0X0531 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP83 : (Group 83 pm_dispatch1) Number of PowerPC instructions successfully dispatched. event:0X0532 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_GRP83 : (Group 83 pm_dispatch1) A group was dispatched event:0X0533 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP83 : (Group 83 pm_dispatch1) A group containing at least one PPC instruction was dispatched. For microcoded instructions that span multiple groups, this will only occur once. event:0X0534 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP83 : (Group 83 pm_dispatch1) Number of run instructions completed. event:0X0535 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP83 : (Group 83 pm_dispatch1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 84 pm_dispatch2, Groups and instructions dispatched event:0X0540 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP84 : (Group 84 pm_dispatch2) A group containing at least one PPC instruction completed. For microcoded instructions that span multiple groups, this will only occur once. event:0X0541 counters:1 um:zero minimum:10000 name:PM_CYC_GRP84 : (Group 84 pm_dispatch2) Processor Cycles event:0X0542 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP84 : (Group 84 pm_dispatch2) Number of PowerPC Instructions that completed. event:0X0543 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP84 : (Group 84 pm_dispatch2) A group containing at least one PPC instruction was dispatched. For microcoded instructions that span multiple groups, this will only occur once. event:0X0544 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP84 : (Group 84 pm_dispatch2) Number of run instructions completed. event:0X0545 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP84 : (Group 84 pm_dispatch2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 85 pm_ic, I cache operations event:0X0550 counters:0 um:zero minimum:1000 name:PM_IC_REQ_ALL_GRP85 : (Group 85 pm_ic) Icache requests, prefetch + demand event:0X0551 counters:1 um:zero minimum:1000 name:PM_IC_WRITE_ALL_GRP85 : (Group 85 pm_ic) Icache sectors written, prefetch + demand event:0X0552 counters:2 um:zero minimum:1000 name:PM_IC_PREF_CANCEL_ALL_GRP85 : (Group 85 pm_ic) Prefetch Canceled due to page boundary or icache hit event:0X0553 counters:3 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BR_ALL_GRP85 : (Group 85 pm_ic) L2 I cache demand request due to BHT or redirect event:0X0554 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP85 : (Group 85 pm_ic) Number of run instructions completed. event:0X0555 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP85 : (Group 85 pm_ic) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 86 pm_ic_pref_cancel, Instruction pre-fetched cancelled event:0X0560 counters:0 um:zero minimum:1000 name:PM_IC_PREF_CANCEL_PAGE_GRP86 : (Group 86 pm_ic_pref_cancel) Prefetch Canceled due to page boundary event:0X0561 counters:1 um:zero minimum:1000 name:PM_IC_PREF_CANCEL_HIT_GRP86 : (Group 86 pm_ic_pref_cancel) Prefetch Canceled due to icache hit event:0X0562 counters:2 um:zero minimum:1000 name:PM_IC_PREF_CANCEL_L2_GRP86 : (Group 86 pm_ic_pref_cancel) L2 Squashed request event:0X0563 counters:3 um:zero minimum:1000 name:PM_IC_PREF_CANCEL_ALL_GRP86 : (Group 86 pm_ic_pref_cancel) Prefetch Canceled due to page boundary or icache hit event:0X0564 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP86 : (Group 86 pm_ic_pref_cancel) Number of run instructions completed. event:0X0565 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP86 : (Group 86 pm_ic_pref_cancel) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 87 pm_ic_miss, Icache and Ierat miss events event:0X0570 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_GRP87 : (Group 87 pm_ic_miss) A translation request missed the Instruction Effective to Real Address Translation (ERAT) table event:0X0571 counters:1 um:zero minimum:1000 name:PM_L1_ICACHE_MISS_GRP87 : (Group 87 pm_ic_miss) An instruction fetch request missed the L1 cache. event:0X0572 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP87 : (Group 87 pm_ic_miss) Number of PowerPC Instructions that completed. event:0X0573 counters:3 um:zero minimum:10000 name:PM_CYC_GRP87 : (Group 87 pm_ic_miss) Processor Cycles event:0X0574 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP87 : (Group 87 pm_ic_miss) Number of run instructions completed. event:0X0575 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP87 : (Group 87 pm_ic_miss) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 88 pm_cpi_stack1, CPI stack breakdown event:0X0580 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP88 : (Group 88 pm_cpi_stack1) The processor's Data Cache was reloaded from the local L2 due to a demand load. event:0X0581 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP88 : (Group 88 pm_cpi_stack1) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes suffered a Data Cache Miss. Data Cache Miss has higher priority than any other Load/Store delay, so if an instruction encounters multiple delays only the Data Cache Miss will be reported and the entire delay period will be charged to Data Cache Miss. This is a subset of PM_CMPLU_STALL_LSU. event:0X0582 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP88 : (Group 88 pm_cpi_stack1) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0583 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP88 : (Group 88 pm_cpi_stack1) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes suffered an ERAT miss. This is a subset of PM_CMPLU_STALL_REJECT. event:0X0584 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP88 : (Group 88 pm_cpi_stack1) Number of run instructions completed. event:0X0585 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP88 : (Group 88 pm_cpi_stack1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 89 pm_cpi_stack2, CPI stack breakdown event:0X0590 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP89 : (Group 89 pm_cpi_stack2) FXU0 and FXU1 are both idle. event:0X0591 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP89 : (Group 89 pm_cpi_stack2) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes was a fixed point instruction. event:0X0592 counters:2 um:zero minimum:1000 name:PM_GRP_CMPL_GRP89 : (Group 89 pm_cpi_stack2) A group completed. Microcoded instructions that span multiple groups will generate this event once per group. event:0X0593 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP89 : (Group 89 pm_cpi_stack2) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes was a fixed point divide instruction. This is a subset of PM_CMPLU_STALL_FXU. event:0X0594 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP89 : (Group 89 pm_cpi_stack2) Number of run instructions completed. event:0X0595 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP89 : (Group 89 pm_cpi_stack2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 90 pm_cpi_stack3, CPI stack breakdown event:0X05A0 counters:0 um:zero minimum:1000 name:PM_TABLEWALK_CYC_GRP90 : (Group 90 pm_cpi_stack3) Cycles doing instruction or data tablewalks event:0X05A1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP90 : (Group 90 pm_cpi_stack3) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes was a load/store instruction. event:0X05A2 counters:2 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP90 : (Group 90 pm_cpi_stack3) Cycles a translation tablewalk is active. While a tablewalk is active any request attempting to access the TLB will be rejected and retried. event:0X05A3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP90 : (Group 90 pm_cpi_stack3) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes suffered a load/store reject. This is a subset of PM_CMPLU_STALL_LSU. event:0X05A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP90 : (Group 90 pm_cpi_stack3) Number of run instructions completed. event:0X05A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP90 : (Group 90 pm_cpi_stack3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 91 pm_cpi_stack4, CPI stack breakdown event:0X05B0 counters:0 um:zero minimum:1000 name:PM_FLOP_GRP91 : (Group 91 pm_cpi_stack4) A floating point operation has completed event:0X05B1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_SCALAR_LONG_GRP91 : (Group 91 pm_cpi_stack4) Completion stall caused by long latency scalar instruction event:0X05B2 counters:2 um:zero minimum:1000 name:PM_MRK_STALL_CMPLU_CYC_GRP91 : (Group 91 pm_cpi_stack4) Marked Group Completion Stall cycles event:0X05B3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_SCALAR_GRP91 : (Group 91 pm_cpi_stack4) Completion stall caused by FPU instruction event:0X05B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP91 : (Group 91 pm_cpi_stack4) Number of run instructions completed. event:0X05B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP91 : (Group 91 pm_cpi_stack4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 92 pm_cpi_stack5, CPI stack breakdown event:0X05C0 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_END_GCT_NOSLOT_GRP92 : (Group 92 pm_cpi_stack5) Count ended because GCT went empty event:0X05C1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_VECTOR_GRP92 : (Group 92 pm_cpi_stack5) Completion stall caused by Vector instruction event:0X05C2 counters:2 um:zero minimum:1000 name:PM_MRK_STALL_CMPLU_CYC_COUNT_GRP92 : (Group 92 pm_cpi_stack5) Marked Group Completion Stall cycles (use edge detect to count #) event:0X05C3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_GRP92 : (Group 92 pm_cpi_stack5) No groups completed, GCT not empty event:0X05C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP92 : (Group 92 pm_cpi_stack5) Number of run instructions completed. event:0X05C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP92 : (Group 92 pm_cpi_stack5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 93 pm_cpi_stack6, CPI stack breakdown event:0X05D0 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_THRD_GRP93 : (Group 93 pm_cpi_stack6) Completion Stalled due to thread conflict. Group ready to complete but it was another thread's turn event:0X05D1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DFU_GRP93 : (Group 93 pm_cpi_stack6) Completion stall caused by Decimal Floating Point Unit event:0X05D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP93 : (Group 93 pm_cpi_stack6) Number of PowerPC Instructions that completed. event:0X05D3 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_IC_MISS_GRP93 : (Group 93 pm_cpi_stack6) No slot in GCT caused by branch mispredict or I cache miss event:0X05D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP93 : (Group 93 pm_cpi_stack6) Number of run instructions completed. event:0X05D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP93 : (Group 93 pm_cpi_stack6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 94 pm_cpi_stack7, CPI stack breakdown event:0X05E0 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP94 : (Group 94 pm_cpi_stack7) Cycles when the Global Completion Table has no slots from this thread. event:0X05E1 counters:1 um:zero minimum:1000 name:PM_GCT_NOSLOT_IC_MISS_GRP94 : (Group 94 pm_cpi_stack7) Cycles when the Global Completion Table has no slots from this thread because of an Instruction Cache miss. event:0X05E2 counters:2 um:zero minimum:1000 name:PM_IOPS_DISP_GRP94 : (Group 94 pm_cpi_stack7) IOPS dispatched event:0X05E3 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_GRP94 : (Group 94 pm_cpi_stack7) Cycles when the Global Completion Table has no slots from this thread because of a branch misprediction. event:0X05E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP94 : (Group 94 pm_cpi_stack7) Number of run instructions completed. event:0X05E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP94 : (Group 94 pm_cpi_stack7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 95 pm_cpi_stack8, CPI stack breakdown event:0X05F0 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP95 : (Group 95 pm_cpi_stack8) A group containing at least one PPC instruction completed. For microcoded instructions that span multiple groups, this will only occur once. event:0X05F1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_STORE_GRP95 : (Group 95 pm_cpi_stack8) Completion stall due to store instruction event:0X05F2 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP95 : (Group 95 pm_cpi_stack8) Number of PowerPC instructions successfully dispatched. event:0X05F3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_VECTOR_LONG_GRP95 : (Group 95 pm_cpi_stack8) completion stall due to long latency vector instruction event:0X05F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP95 : (Group 95 pm_cpi_stack8) Number of run instructions completed. event:0X05F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP95 : (Group 95 pm_cpi_stack8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 96 pm_cpi_stack9, CPI stack breakdown event:0X0600 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_THRD_GRP96 : (Group 96 pm_cpi_stack9) Completion Stalled due to thread conflict. Group ready to complete but it was another thread's turn event:0X0601 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DFU_GRP96 : (Group 96 pm_cpi_stack9) Completion stall caused by Decimal Floating Point Unit event:0X0602 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP96 : (Group 96 pm_cpi_stack9) Number of PowerPC Instructions that completed. event:0X0603 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_COUNT_GRP96 : (Group 96 pm_cpi_stack9) Count of Cycles where a thread was not completing any groups , when the group completion table had entries for that thread. event:0X0604 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP96 : (Group 96 pm_cpi_stack9) Number of run instructions completed. event:0X0605 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP96 : (Group 96 pm_cpi_stack9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 97 pm_cpi_stack10, CPI stack breakdown event:0X0610 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP97 : (Group 97 pm_cpi_stack10) A group containing at least one PPC instruction completed. For microcoded instructions that span multiple groups, this will only occur once. event:0X0611 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP97 : (Group 97 pm_cpi_stack10) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes suffered a Data Cache Miss. Data Cache Miss has higher priority than any other Load/Store delay, so if an instruction encounters multiple delays only the Data Cache Miss will be reported and the entire delay period will be charged to Data Cache Miss. This is a subset of PM_CMPLU_STALL_LSU. event:0X0612 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP97 : (Group 97 pm_cpi_stack10) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0613 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP97 : (Group 97 pm_cpi_stack10) Following a completion stall (any period when no groups completed) the last instruction to finish before completion resumes suffered an ERAT miss. This is a subset of PM_CMPLU_STALL_REJECT. event:0X0614 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP97 : (Group 97 pm_cpi_stack10) Number of run instructions completed. event:0X0615 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP97 : (Group 97 pm_cpi_stack10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 98 pm_dsource1, Data source information event:0X0620 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP98 : (Group 98 pm_dsource1) The processor's Data Cache was reloaded from the local L2 due to a demand load. event:0X0621 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP98 : (Group 98 pm_dsource1) The processor's Data Cache was reloaded from the local L3 due to a demand load. event:0X0622 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP98 : (Group 98 pm_dsource1) The processor's Data Cache was reloaded from memory attached to a different module than this processor is located on. event:0X0623 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP98 : (Group 98 pm_dsource1) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X0624 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP98 : (Group 98 pm_dsource1) Number of run instructions completed. event:0X0625 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP98 : (Group 98 pm_dsource1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 99 pm_dsource2, Data source information event:0X0630 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP99 : (Group 99 pm_dsource2) The processor's Data Cache was reloaded from the local L3 due to a demand load. event:0X0631 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L31_SHR_GRP99 : (Group 99 pm_dsource2) Data loaded from another L3 on same chip shared event:0X0632 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP99 : (Group 99 pm_dsource2) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X0633 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP99 : (Group 99 pm_dsource2) The processor's Data Cache was reloaded but not from the local L2. event:0X0634 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP99 : (Group 99 pm_dsource2) Number of run instructions completed. event:0X0635 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP99 : (Group 99 pm_dsource2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 100 pm_dsource3, Data source information event:0X0640 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_GRP100 : (Group 100 pm_dsource3) The processor's Data Cache was reloaded with data from memory attached to a distant module due to a demand load event:0X0641 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP100 : (Group 100 pm_dsource3) The processor's Data Cache was reloaded from beyond L3 due to a demand load event:0X0642 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L21_MOD_GRP100 : (Group 100 pm_dsource3) Data loaded from another L2 on same chip modified event:0X0643 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP100 : (Group 100 pm_dsource3) The processor's Data Cache was reloaded but not from the local L2. event:0X0644 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP100 : (Group 100 pm_dsource3) Number of run instructions completed. event:0X0645 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP100 : (Group 100 pm_dsource3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 101 pm_dsource4, Data source information event:0X0650 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L31_MOD_GRP101 : (Group 101 pm_dsource4) Data loaded from another L3 on same chip modified event:0X0651 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_GRP101 : (Group 101 pm_dsource4) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load event:0X0652 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP101 : (Group 101 pm_dsource4) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a demand load event:0X0653 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP101 : (Group 101 pm_dsource4) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a demand load event:0X0654 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP101 : (Group 101 pm_dsource4) Number of run instructions completed. event:0X0655 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP101 : (Group 101 pm_dsource4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 102 pm_dsource5, Data source information event:0X0660 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L31_SHR_GRP102 : (Group 102 pm_dsource5) Data loaded from another L3 on same chip shared event:0X0661 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_GRP102 : (Group 102 pm_dsource5) The processor's Data Cache was reloaded with data from memory attached to a distant module due to a demand load event:0X0662 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_SHR_GRP102 : (Group 102 pm_dsource5) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a distant module due to a demand load event:0X0663 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L21_SHR_GRP102 : (Group 102 pm_dsource5) Data loaded from another L2 on same chip shared event:0X0664 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP102 : (Group 102 pm_dsource5) Number of run instructions completed. event:0X0665 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP102 : (Group 102 pm_dsource5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 103 pm_dsource6, Data source information event:0X0670 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_GRP103 : (Group 103 pm_dsource6) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a remote module due to a demand load event:0X0671 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_GRP103 : (Group 103 pm_dsource6) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load event:0X0672 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L21_SHR_GRP103 : (Group 103 pm_dsource6) Data loaded from another L2 on same chip shared event:0X0673 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP103 : (Group 103 pm_dsource6) The processor's Data Cache was reloaded but not from the local L2. event:0X0674 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP103 : (Group 103 pm_dsource6) Number of run instructions completed. event:0X0675 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP103 : (Group 103 pm_dsource6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 104 pm_dsource7, Data source information event:0X0680 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_GRP104 : (Group 104 pm_dsource7) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load event:0X0681 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP104 : (Group 104 pm_dsource7) The processor's Data Cache was reloaded from beyond L3 due to a demand load event:0X0682 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP104 : (Group 104 pm_dsource7) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a demand load event:0X0683 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP104 : (Group 104 pm_dsource7) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a demand load event:0X0684 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP104 : (Group 104 pm_dsource7) Number of run instructions completed. event:0X0685 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP104 : (Group 104 pm_dsource7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 105 pm_dsource8, Data source information event:0X0690 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP105 : (Group 105 pm_dsource8) Number of PowerPC Instructions that completed. event:0X0691 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP105 : (Group 105 pm_dsource8) The processor's Data Cache was reloaded from the local L3 due to a demand load. event:0X0692 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP105 : (Group 105 pm_dsource8) The processor's Data Cache was reloaded from beyond L3 due to a demand load event:0X0693 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP105 : (Group 105 pm_dsource8) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X0694 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP105 : (Group 105 pm_dsource8) Number of run instructions completed. event:0X0695 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP105 : (Group 105 pm_dsource8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 106 pm_dsource9, Data source information event:0X06A0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP106 : (Group 106 pm_dsource9) The processor's Data Cache was reloaded from the local L2 due to a demand load. event:0X06A1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP106 : (Group 106 pm_dsource9) The processor's Data Cache was reloaded but not from the local L2. event:0X06A2 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP106 : (Group 106 pm_dsource9) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X06A3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP106 : (Group 106 pm_dsource9) Load references that miss the Level 1 Data cache. Combined unit 0 + 1. event:0X06A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP106 : (Group 106 pm_dsource9) Number of run instructions completed. event:0X06A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP106 : (Group 106 pm_dsource9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 107 pm_dsource10, Data source information event:0X06B0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_GRP107 : (Group 107 pm_dsource10) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a remote module due to a demand load event:0X06B1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_SHR_GRP107 : (Group 107 pm_dsource10) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a remote module due to a demand load event:0X06B2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_SHR_GRP107 : (Group 107 pm_dsource10) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a distant module due to a demand load event:0X06B3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP107 : (Group 107 pm_dsource10) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a demand load event:0X06B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP107 : (Group 107 pm_dsource10) Number of run instructions completed. event:0X06B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP107 : (Group 107 pm_dsource10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 108 pm_dsource11, Data source information event:0X06C0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP108 : (Group 108 pm_dsource11) The processor's Data Cache was reloaded from the local L2 due to a demand load. event:0X06C1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP108 : (Group 108 pm_dsource11) The processor's Data Cache was reloaded but not from the local L2. event:0X06C2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L3MISS_GRP108 : (Group 108 pm_dsource11) The processor's Data Cache was reloaded from beyond L3 due to a demand load event:0X06C3 counters:3 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP108 : (Group 108 pm_dsource11) Number of run instructions completed. event:0X06C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP108 : (Group 108 pm_dsource11) Number of run instructions completed. event:0X06C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP108 : (Group 108 pm_dsource11) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 109 pm_dsource12, Data source information event:0X06D0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_RL2L3_MOD_GRP109 : (Group 109 pm_dsource12) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a remote module due to a demand load event:0X06D1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_GRP109 : (Group 109 pm_dsource12) The processor's Data Cache was reloaded with data from memory attached to a distant module due to a demand load event:0X06D2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP109 : (Group 109 pm_dsource12) The processor's Data Cache was reloaded from memory attached to a different module than this processor is located on. event:0X06D3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP109 : (Group 109 pm_dsource12) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X06D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP109 : (Group 109 pm_dsource12) Number of run instructions completed. event:0X06D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP109 : (Group 109 pm_dsource12) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 110 pm_dsource13, Data source information event:0X06E0 counters:0 um:zero minimum:1000 name:PM_DERAT_MISS_4K_GRP110 : (Group 110 pm_dsource13) A data request (load or store) missed the ERAT for 4K page and resulted in an ERAT reload. event:0X06E1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP110 : (Group 110 pm_dsource13) Number of PowerPC Instructions that completed. event:0X06E2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_SHR_GRP110 : (Group 110 pm_dsource13) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a distant module due to a demand load event:0X06E3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_DL2L3_MOD_GRP110 : (Group 110 pm_dsource13) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a demand load event:0X06E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP110 : (Group 110 pm_dsource13) Number of run instructions completed. event:0X06E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP110 : (Group 110 pm_dsource13) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 111 pm_dsource14, Data source information event:0X06F0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_GRP111 : (Group 111 pm_dsource14) The processor's Data Cache was reloaded with data from memory attached to a distant module due to a demand load event:0X06F1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP111 : (Group 111 pm_dsource14) Number of PowerPC Instructions that completed. event:0X06F2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP111 : (Group 111 pm_dsource14) The processor's Data Cache was reloaded from memory attached to a different module than this processor is located on. event:0X06F3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP111 : (Group 111 pm_dsource14) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X06F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP111 : (Group 111 pm_dsource14) Number of run instructions completed. event:0X06F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP111 : (Group 111 pm_dsource14) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 112 pm_dsource15, Data source information event:0X0700 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_DMEM_GRP112 : (Group 112 pm_dsource15) The processor's Data Cache was reloaded with data from memory attached to a distant module due to a demand load event:0X0701 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP112 : (Group 112 pm_dsource15) Number of PowerPC Instructions that completed. event:0X0702 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP112 : (Group 112 pm_dsource15) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0703 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP112 : (Group 112 pm_dsource15) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X0704 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP112 : (Group 112 pm_dsource15) Number of run instructions completed. event:0X0705 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP112 : (Group 112 pm_dsource15) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 113 pm_isource1, Instruction source information event:0X0710 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP113 : (Group 113 pm_isource1) An instruction fetch group was fetched from L2. Fetch Groups can contain up to 8 instructions event:0X0711 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP113 : (Group 113 pm_isource1) An instruction fetch group was fetched from L3. Fetch Groups can contain up to 8 instructions event:0X0712 counters:2 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP113 : (Group 113 pm_isource1) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X0713 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP113 : (Group 113 pm_isource1) An instruction fetch group was fetched from beyond the local L2. event:0X0714 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP113 : (Group 113 pm_isource1) Number of run instructions completed. event:0X0715 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP113 : (Group 113 pm_isource1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 114 pm_isource2, Instruction source information event:0X0720 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP114 : (Group 114 pm_isource2) An instruction fetch group was fetched from L3. Fetch Groups can contain up to 8 instructions event:0X0721 counters:1 um:zero minimum:1000 name:PM_INST_FROM_DMEM_GRP114 : (Group 114 pm_isource2) An instruction fetch group was fetched from memory attached to a distant module. Fetch groups can contain up to 8 instructions event:0X0722 counters:2 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_MOD_GRP114 : (Group 114 pm_isource2) An instruction fetch group was fetched with modified (M) data from an L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X0723 counters:3 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP114 : (Group 114 pm_isource2) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X0724 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP114 : (Group 114 pm_isource2) Number of run instructions completed. event:0X0725 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP114 : (Group 114 pm_isource2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 115 pm_isource3, Instruction source information event:0X0730 counters:0 um:zero minimum:1000 name:PM_INST_FROM_DMEM_GRP115 : (Group 115 pm_isource3) An instruction fetch group was fetched from memory attached to a distant module. Fetch groups can contain up to 8 instructions event:0X0731 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L3MISS_GRP115 : (Group 115 pm_isource3) An instruction fetch group was fetched from beyond L3. Fetch groups can contain up to 8 instructions. event:0X0732 counters:2 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_SHR_GRP115 : (Group 115 pm_isource3) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X0733 counters:3 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_MOD_GRP115 : (Group 115 pm_isource3) An instruction fetch group was fetched with modified (M) data from an L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X0734 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP115 : (Group 115 pm_isource3) Number of run instructions completed. event:0X0735 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP115 : (Group 115 pm_isource3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 116 pm_isource4, Instruction source information event:0X0740 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L31_MOD_GRP116 : (Group 116 pm_isource4) Instruction fetched from another L3 on same chip modified event:0X0741 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L31_SHR_GRP116 : (Group 116 pm_isource4) Instruction fetched from another L3 on same chip shared event:0X0742 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L21_MOD_GRP116 : (Group 116 pm_isource4) Instruction fetched from another L2 on same chip modified event:0X0743 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L21_SHR_GRP116 : (Group 116 pm_isource4) Instruction fetched from another L2 on same chip shared event:0X0744 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP116 : (Group 116 pm_isource4) Number of run instructions completed. event:0X0745 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP116 : (Group 116 pm_isource4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 117 pm_isource5, Instruction source information event:0X0750 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L31_SHR_GRP117 : (Group 117 pm_isource5) Instruction fetched from another L3 on same chip shared event:0X0751 counters:1 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_SHR_GRP117 : (Group 117 pm_isource5) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a remote module. Fetch groups can contain up to 8 instructions event:0X0752 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L21_SHR_GRP117 : (Group 117 pm_isource5) Instruction fetched from another L2 on same chip shared event:0X0753 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP117 : (Group 117 pm_isource5) An instruction fetch group was fetched from beyond the local L2. event:0X0754 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP117 : (Group 117 pm_isource5) Number of run instructions completed. event:0X0755 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP117 : (Group 117 pm_isource5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 118 pm_isource6, Instruction source information event:0X0760 counters:0 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP118 : (Group 118 pm_isource6) An instruction fetch group was fetched from the prefetch buffer. Fetch groups can contain up to 8 instructions event:0X0761 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L3MISS_GRP118 : (Group 118 pm_isource6) An instruction fetch group was fetched from beyond L3. Fetch groups can contain up to 8 instructions. event:0X0762 counters:2 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP118 : (Group 118 pm_isource6) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X0763 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP118 : (Group 118 pm_isource6) An instruction fetch group was fetched from beyond the local L2. event:0X0764 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP118 : (Group 118 pm_isource6) Number of run instructions completed. event:0X0765 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP118 : (Group 118 pm_isource6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 119 pm_isource7, Instruction source information event:0X0770 counters:0 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_MOD_GRP119 : (Group 119 pm_isource7) An instruction fetch group was fetched with modified (M) data from an L2 or L3 on a remote module. Fetch groups can contain up to 8 instructions event:0X0771 counters:1 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_SHR_GRP119 : (Group 119 pm_isource7) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a remote module. Fetch groups can contain up to 8 instructions event:0X0772 counters:2 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_SHR_GRP119 : (Group 119 pm_isource7) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X0773 counters:3 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_MOD_GRP119 : (Group 119 pm_isource7) An instruction fetch group was fetched with modified (M) data from an L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X0774 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP119 : (Group 119 pm_isource7) Number of run instructions completed. event:0X0775 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP119 : (Group 119 pm_isource7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 120 pm_isource8, Instruction source information event:0X0780 counters:0 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_SHR_GRP120 : (Group 120 pm_isource8) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a remote module. Fetch groups can contain up to 8 instructions event:0X0781 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L3MISS_GRP120 : (Group 120 pm_isource8) An instruction fetch group was fetched from beyond L3. Fetch groups can contain up to 8 instructions. event:0X0782 counters:2 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP120 : (Group 120 pm_isource8) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X0783 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP120 : (Group 120 pm_isource8) An instruction fetch group was fetched from beyond the local L2. event:0X0784 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP120 : (Group 120 pm_isource8) Number of run instructions completed. event:0X0785 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP120 : (Group 120 pm_isource8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 121 pm_isource9, Instruction source information event:0X0790 counters:0 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP121 : (Group 121 pm_isource9) An instruction fetch group was fetched from the prefetch buffer. Fetch groups can contain up to 8 instructions event:0X0791 counters:1 um:zero minimum:1000 name:PM_INST_FROM_DMEM_GRP121 : (Group 121 pm_isource9) An instruction fetch group was fetched from memory attached to a distant module. Fetch groups can contain up to 8 instructions event:0X0792 counters:2 um:zero minimum:1000 name:PM_INST_FROM_RMEM_GRP121 : (Group 121 pm_isource9) An instruction fetch group was fetched from memory attached to a different module than this processor is located on. Fetch groups can contain up to 8 instructions event:0X0793 counters:3 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP121 : (Group 121 pm_isource9) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X0794 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP121 : (Group 121 pm_isource9) Number of run instructions completed. event:0X0795 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP121 : (Group 121 pm_isource9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 122 pm_isource10, Instruction source information event:0X07A0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP122 : (Group 122 pm_isource10) An instruction fetch group was fetched from L2. Fetch Groups can contain up to 8 instructions event:0X07A1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP122 : (Group 122 pm_isource10) An instruction fetch group was fetched from L3. Fetch Groups can contain up to 8 instructions event:0X07A2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP122 : (Group 122 pm_isource10) Number of PowerPC Instructions that completed. event:0X07A3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP122 : (Group 122 pm_isource10) Processor Cycles event:0X07A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP122 : (Group 122 pm_isource10) Number of run instructions completed. event:0X07A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP122 : (Group 122 pm_isource10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 123 pm_isource11, Instruction source information event:0X07B0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_MOD_GRP123 : (Group 123 pm_isource11) An instruction fetch group was fetched with modified (M) data from an L2 or L3 on a remote module. Fetch groups can contain up to 8 instructions event:0X07B1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_RL2L3_SHR_GRP123 : (Group 123 pm_isource11) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a remote module. Fetch groups can contain up to 8 instructions event:0X07B2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP123 : (Group 123 pm_isource11) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X07B3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP123 : (Group 123 pm_isource11) Number of PowerPC Instructions that completed. event:0X07B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP123 : (Group 123 pm_isource11) Number of run instructions completed. event:0X07B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP123 : (Group 123 pm_isource11) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 124 pm_isource12, Instruction source information event:0X07C0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP124 : (Group 124 pm_isource12) Processor Cycles event:0X07C1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP124 : (Group 124 pm_isource12) Number of PowerPC Instructions that completed. event:0X07C2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_SHR_GRP124 : (Group 124 pm_isource12) An instruction fetch group was fetched with shared (S) data from the L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X07C3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_DL2L3_MOD_GRP124 : (Group 124 pm_isource12) An instruction fetch group was fetched with modified (M) data from an L2 or L3 on a distant module. Fetch groups can contain up to 8 instructions event:0X07C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP124 : (Group 124 pm_isource12) Number of run instructions completed. event:0X07C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP124 : (Group 124 pm_isource12) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 125 pm_isource13, Instruction source information event:0X07D0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_DMEM_GRP125 : (Group 125 pm_isource13) An instruction fetch group was fetched from memory attached to a distant module. Fetch groups can contain up to 8 instructions event:0X07D1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP125 : (Group 125 pm_isource13) Number of PowerPC Instructions that completed. event:0X07D2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_RMEM_GRP125 : (Group 125 pm_isource13) An instruction fetch group was fetched from memory attached to a different module than this processor is located on. Fetch groups can contain up to 8 instructions event:0X07D3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP125 : (Group 125 pm_isource13) An instruction fetch group was fetched from memory attached to the same module this processor is located on. Fetch groups can contain up to 8 instructions event:0X07D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP125 : (Group 125 pm_isource13) Number of run instructions completed. event:0X07D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP125 : (Group 125 pm_isource13) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 126 pm_prefetch1, Prefetch events event:0X07E0 counters:0 um:zero minimum:1000 name:PM_LSU_DC_PREF_STREAM_ALLOC_GRP126 : (Group 126 pm_prefetch1) D cache new prefetch stream allocated event:0X07E1 counters:1 um:zero minimum:1000 name:PM_L3_PREF_LDST_GRP126 : (Group 126 pm_prefetch1) L3 cache prefetches LD + ST event:0X07E2 counters:2 um:zero minimum:1000 name:PM_LSU_DC_PREF_STREAM_CONFIRM_GRP126 : (Group 126 pm_prefetch1) Dcache new prefetch stream confirmed event:0X07E3 counters:3 um:zero minimum:1000 name:PM_L1_PREF_GRP126 : (Group 126 pm_prefetch1) A request to prefetch data into the L1 was made event:0X07E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP126 : (Group 126 pm_prefetch1) Number of run instructions completed. event:0X07E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP126 : (Group 126 pm_prefetch1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 127 pm_prefetch2, Prefetch events event:0X07F0 counters:0 um:zero minimum:1000 name:PM_LSU_DC_PREF_STRIDED_STREAM_CONFIRM_GRP127 : (Group 127 pm_prefetch2) Dcache Strided prefetch stream confirmed (software + hardware) event:0X07F1 counters:1 um:zero minimum:1000 name:PM_LD_REF_L1_GRP127 : (Group 127 pm_prefetch2) L1 D cache load references counted at finish event:0X07F2 counters:2 um:zero minimum:1000 name:PM_LSU_FIN_GRP127 : (Group 127 pm_prefetch2) LSU Finished an instruction (up to 2 per cycle) event:0X07F3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP127 : (Group 127 pm_prefetch2) Load references that miss the Level 1 Data cache. Combined unit 0 + 1. event:0X07F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP127 : (Group 127 pm_prefetch2) Number of run instructions completed. event:0X07F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP127 : (Group 127 pm_prefetch2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 128 pm_vsu0, VSU Execution event:0X0800 counters:0 um:zero minimum:1000 name:PM_VSU0_1FLOP_GRP128 : (Group 128 pm_vsu0) one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg, xsadd, xsmul, xssub, xscmp, xssel, xsabs, xsnabs, xsre, xssqrte, xsneg) operation finished event:0X0801 counters:1 um:zero minimum:1000 name:PM_VSU1_1FLOP_GRP128 : (Group 128 pm_vsu0) one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg, xsadd, xsmul, xssub, xscmp, xssel, xsabs, xsnabs, xsre, xssqrte, xsneg) operation finished event:0X0802 counters:2 um:zero minimum:1000 name:PM_VSU0_2FLOP_GRP128 : (Group 128 pm_vsu0) two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions) event:0X0803 counters:3 um:zero minimum:1000 name:PM_VSU1_2FLOP_GRP128 : (Group 128 pm_vsu0) two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions) event:0X0804 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP128 : (Group 128 pm_vsu0) Number of run instructions completed. event:0X0805 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP128 : (Group 128 pm_vsu0) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 129 pm_vsu1, VSU Execution event:0X0810 counters:0 um:zero minimum:1000 name:PM_VSU0_4FLOP_GRP129 : (Group 129 pm_vsu1) four flops operation (scalar fdiv, fsqrt; DP vector version of fmadd, fnmadd, fmsub, fnmsub; SP vector versions of single flop instructions) event:0X0811 counters:1 um:zero minimum:1000 name:PM_VSU1_4FLOP_GRP129 : (Group 129 pm_vsu1) four flops operation (scalar fdiv, fsqrt; DP vector version of fmadd, fnmadd, fmsub, fnmsub; SP vector versions of single flop instructions) event:0X0812 counters:2 um:zero minimum:1000 name:PM_VSU0_8FLOP_GRP129 : (Group 129 pm_vsu1) eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub) event:0X0813 counters:3 um:zero minimum:1000 name:PM_VSU1_8FLOP_GRP129 : (Group 129 pm_vsu1) eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub) event:0X0814 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP129 : (Group 129 pm_vsu1) Number of run instructions completed. event:0X0815 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP129 : (Group 129 pm_vsu1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 130 pm_vsu2, VSU Execution event:0X0820 counters:0 um:zero minimum:1000 name:PM_VSU_2FLOP_GRP130 : (Group 130 pm_vsu2) two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions) event:0X0821 counters:1 um:zero minimum:1000 name:PM_VSU_2FLOP_DOUBLE_GRP130 : (Group 130 pm_vsu2) DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg event:0X0822 counters:2 um:zero minimum:1000 name:PM_VSU0_2FLOP_DOUBLE_GRP130 : (Group 130 pm_vsu2) two flop DP vector operation (xvadddp, xvmuldp, xvsubdp, xvcmpdp, xvseldp, xvabsdp, xvnabsdp, xvredp ,xvsqrtedp, vxnegdp) event:0X0823 counters:3 um:zero minimum:1000 name:PM_VSU1_2FLOP_DOUBLE_GRP130 : (Group 130 pm_vsu2) two flop DP vector operation (xvadddp, xvmuldp, xvsubdp, xvcmpdp, xvseldp, xvabsdp, xvnabsdp, xvredp ,xvsqrtedp, vxnegdp) event:0X0824 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP130 : (Group 130 pm_vsu2) Number of run instructions completed. event:0X0825 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP130 : (Group 130 pm_vsu2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 131 pm_vsu3, VSU Execution event:0X0830 counters:0 um:zero minimum:1000 name:PM_VSU0_FMA_GRP131 : (Group 131 pm_vsu3) two flops operation (fmadd, fnmadd, fmsub, fnmsub, xsmadd, xsnmadd, xsmsub, xsnmsub) Scalar instructions only! event:0X0831 counters:1 um:zero minimum:1000 name:PM_VSU1_FMA_GRP131 : (Group 131 pm_vsu3) two flops operation (fmadd, fnmadd, fmsub, fnmsub, xsmadd, xsnmadd, xsmsub, xsnmsub) Scalar instructions only! event:0X0832 counters:2 um:zero minimum:1000 name:PM_VSU_FMA_GRP131 : (Group 131 pm_vsu3) two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only! event:0X0833 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP131 : (Group 131 pm_vsu3) Number of PowerPC Instructions that completed. event:0X0834 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP131 : (Group 131 pm_vsu3) Number of run instructions completed. event:0X0835 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP131 : (Group 131 pm_vsu3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 132 pm_vsu4, VSU Execution event:0X0840 counters:0 um:zero minimum:1000 name:PM_VSU0_FMA_DOUBLE_GRP132 : (Group 132 pm_vsu4) four flop DP vector operations (xvmadddp, xvnmadddp, xvmsubdp, xvmsubdp) event:0X0841 counters:1 um:zero minimum:1000 name:PM_VSU1_FMA_DOUBLE_GRP132 : (Group 132 pm_vsu4) four flop DP vector operations (xvmadddp, xvnmadddp, xvmsubdp, xvmsubdp) event:0X0842 counters:2 um:zero minimum:1000 name:PM_VSU_FMA_DOUBLE_GRP132 : (Group 132 pm_vsu4) DP vector version of fmadd,fnmadd,fmsub,fnmsub event:0X0843 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP132 : (Group 132 pm_vsu4) Number of PowerPC Instructions that completed. event:0X0844 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP132 : (Group 132 pm_vsu4) Number of run instructions completed. event:0X0845 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP132 : (Group 132 pm_vsu4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 133 pm_vsu5, VSU Execution event:0X0850 counters:0 um:zero minimum:1000 name:PM_VSU_VECTOR_DOUBLE_ISSUED_GRP133 : (Group 133 pm_vsu5) Double Precision vector instruction issued on Pipe0 event:0X0851 counters:1 um:zero minimum:1000 name:PM_VSU0_VECT_DOUBLE_ISSUED_GRP133 : (Group 133 pm_vsu5) Double Precision vector instruction issued on Pipe0 event:0X0852 counters:2 um:zero minimum:1000 name:PM_VSU1_VECT_DOUBLE_ISSUED_GRP133 : (Group 133 pm_vsu5) Double Precision vector instruction issued on Pipe1 event:0X0853 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP133 : (Group 133 pm_vsu5) Number of PowerPC Instructions that completed. event:0X0854 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP133 : (Group 133 pm_vsu5) Number of run instructions completed. event:0X0855 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP133 : (Group 133 pm_vsu5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 134 pm_vsu6, VSU Execution event:0X0860 counters:0 um:zero minimum:1000 name:PM_VSU_DENORM_GRP134 : (Group 134 pm_vsu6) Vector or Scalar denorm operand event:0X0861 counters:1 um:zero minimum:1000 name:PM_VSU0_DENORM_GRP134 : (Group 134 pm_vsu6) VSU0 received denormalized data event:0X0862 counters:2 um:zero minimum:1000 name:PM_VSU1_DENORM_GRP134 : (Group 134 pm_vsu6) VSU1 received denormalized data event:0X0863 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP134 : (Group 134 pm_vsu6) Number of PowerPC Instructions that completed. event:0X0864 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP134 : (Group 134 pm_vsu6) Number of run instructions completed. event:0X0865 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP134 : (Group 134 pm_vsu6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 135 pm_vsu7, VSU Execution event:0X0870 counters:0 um:zero minimum:1000 name:PM_VSU_FIN_GRP135 : (Group 135 pm_vsu7) VSU0 Finished an instruction event:0X0871 counters:1 um:zero minimum:1000 name:PM_VSU0_FIN_GRP135 : (Group 135 pm_vsu7) VSU0 Finished an instruction event:0X0872 counters:2 um:zero minimum:1000 name:PM_VSU1_FIN_GRP135 : (Group 135 pm_vsu7) VSU1 Finished an instruction event:0X0873 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP135 : (Group 135 pm_vsu7) Number of PowerPC Instructions that completed. event:0X0874 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP135 : (Group 135 pm_vsu7) Number of run instructions completed. event:0X0875 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP135 : (Group 135 pm_vsu7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 136 pm_vsu8, VSU Execution event:0X0880 counters:0 um:zero minimum:1000 name:PM_VSU_STF_GRP136 : (Group 136 pm_vsu8) FPU store (SP or DP) issued on Pipe0 event:0X0881 counters:1 um:zero minimum:1000 name:PM_VSU0_STF_GRP136 : (Group 136 pm_vsu8) FPU store (SP or DP) issued on Pipe0 event:0X0882 counters:2 um:zero minimum:1000 name:PM_VSU1_STF_GRP136 : (Group 136 pm_vsu8) FPU store (SP or DP) issued on Pipe1 event:0X0883 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP136 : (Group 136 pm_vsu8) Number of PowerPC Instructions that completed. event:0X0884 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP136 : (Group 136 pm_vsu8) Number of run instructions completed. event:0X0885 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP136 : (Group 136 pm_vsu8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 137 pm_vsu9, VSU Execution event:0X0890 counters:0 um:zero minimum:1000 name:PM_VSU_SINGLE_GRP137 : (Group 137 pm_vsu9) Vector or Scalar single precision event:0X0891 counters:1 um:zero minimum:1000 name:PM_VSU0_SINGLE_GRP137 : (Group 137 pm_vsu9) VSU0 executed single precision instruction event:0X0892 counters:2 um:zero minimum:1000 name:PM_VSU1_SINGLE_GRP137 : (Group 137 pm_vsu9) VSU1 executed single precision instruction event:0X0893 counters:3 um:zero minimum:1000 name:PM_VSU0_16FLOP_GRP137 : (Group 137 pm_vsu9) Sixteen flops operation (SP vector versions of fdiv,fsqrt) event:0X0894 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP137 : (Group 137 pm_vsu9) Number of run instructions completed. event:0X0895 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP137 : (Group 137 pm_vsu9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 138 pm_vsu10, VSU Execution event:0X08A0 counters:0 um:zero minimum:1000 name:PM_VSU_FSQRT_FDIV_GRP138 : (Group 138 pm_vsu10) DP vector versions of fdiv,fsqrt event:0X08A1 counters:1 um:zero minimum:1000 name:PM_VSU0_FSQRT_FDIV_GRP138 : (Group 138 pm_vsu10) four flops operation (fdiv,fsqrt,xsdiv,xssqrt) Scalar Instructions only! event:0X08A2 counters:2 um:zero minimum:1000 name:PM_VSU1_FSQRT_FDIV_GRP138 : (Group 138 pm_vsu10) four flops operation (fdiv,fsqrt,xsdiv,xssqrt) Scalar Instructions only! event:0X08A3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP138 : (Group 138 pm_vsu10) Number of PowerPC Instructions that completed. event:0X08A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP138 : (Group 138 pm_vsu10) Number of run instructions completed. event:0X08A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP138 : (Group 138 pm_vsu10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 139 pm_vsu11, VSU Execution event:0X08B0 counters:0 um:zero minimum:1000 name:PM_VSU_FSQRT_FDIV_DOUBLE_GRP139 : (Group 139 pm_vsu11) DP vector versions of fdiv,fsqrt event:0X08B1 counters:1 um:zero minimum:1000 name:PM_VSU0_FSQRT_FDIV_DOUBLE_GRP139 : (Group 139 pm_vsu11) eight flop DP vector operations (xvfdivdp, xvsqrtdp event:0X08B2 counters:2 um:zero minimum:1000 name:PM_VSU1_FSQRT_FDIV_DOUBLE_GRP139 : (Group 139 pm_vsu11) eight flop DP vector operations (xvfdivdp, xvsqrtdp event:0X08B3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP139 : (Group 139 pm_vsu11) Number of PowerPC Instructions that completed. event:0X08B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP139 : (Group 139 pm_vsu11) Number of run instructions completed. event:0X08B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP139 : (Group 139 pm_vsu11) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 140 pm_vsu12, VSU Execution event:0X08C0 counters:0 um:zero minimum:1000 name:PM_VSU_SCALAR_DOUBLE_ISSUED_GRP140 : (Group 140 pm_vsu12) Double Precision scalar instruction issued on Pipe0 event:0X08C1 counters:1 um:zero minimum:1000 name:PM_VSU0_SCAL_DOUBLE_ISSUED_GRP140 : (Group 140 pm_vsu12) Double Precision scalar instruction issued on Pipe0 event:0X08C2 counters:2 um:zero minimum:1000 name:PM_VSU1_SCAL_DOUBLE_ISSUED_GRP140 : (Group 140 pm_vsu12) Double Precision scalar instruction issued on Pipe1 event:0X08C3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP140 : (Group 140 pm_vsu12) Number of PowerPC Instructions that completed. event:0X08C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP140 : (Group 140 pm_vsu12) Number of run instructions completed. event:0X08C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP140 : (Group 140 pm_vsu12) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 141 pm_vsu13, VSU Execution event:0X08D0 counters:0 um:zero minimum:1000 name:PM_VSU_SCALAR_SINGLE_ISSUED_GRP141 : (Group 141 pm_vsu13) Single Precision scalar instruction issued on Pipe0 event:0X08D1 counters:1 um:zero minimum:1000 name:PM_VSU0_SCAL_SINGLE_ISSUED_GRP141 : (Group 141 pm_vsu13) Single Precision scalar instruction issued on Pipe0 event:0X08D2 counters:2 um:zero minimum:1000 name:PM_VSU1_SCAL_SINGLE_ISSUED_GRP141 : (Group 141 pm_vsu13) Single Precision scalar instruction issued on Pipe1 event:0X08D3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP141 : (Group 141 pm_vsu13) Number of PowerPC Instructions that completed. event:0X08D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP141 : (Group 141 pm_vsu13) Number of run instructions completed. event:0X08D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP141 : (Group 141 pm_vsu13) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 142 pm_vsu14, VSU Execution event:0X08E0 counters:0 um:zero minimum:1000 name:PM_VSU_1FLOP_GRP142 : (Group 142 pm_vsu14) one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished event:0X08E1 counters:1 um:zero minimum:1000 name:PM_VSU_4FLOP_GRP142 : (Group 142 pm_vsu14) four flops operation (scalar fdiv, fsqrt; DP vector version of fmadd, fnmadd, fmsub, fnmsub; SP vector versions of single flop instructions) event:0X08E2 counters:2 um:zero minimum:1000 name:PM_VSU_8FLOP_GRP142 : (Group 142 pm_vsu14) eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub) event:0X08E3 counters:3 um:zero minimum:1000 name:PM_VSU_2FLOP_GRP142 : (Group 142 pm_vsu14) two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions) event:0X08E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP142 : (Group 142 pm_vsu14) Number of run instructions completed. event:0X08E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP142 : (Group 142 pm_vsu14) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 143 pm_vsu15, VSU Execution event:0X08F0 counters:0 um:zero minimum:1000 name:PM_VSU_VECTOR_SINGLE_ISSUED_GRP143 : (Group 143 pm_vsu15) Single Precision vector instruction issued (executed) event:0X08F1 counters:1 um:zero minimum:1000 name:PM_VSU0_VECTOR_SP_ISSUED_GRP143 : (Group 143 pm_vsu15) Single Precision vector instruction issued (executed) event:0X08F2 counters:2 um:zero minimum:1000 name:PM_VSU0_FPSCR_GRP143 : (Group 143 pm_vsu15) Move to/from FPSCR type instruction issued on Pipe 0 event:0X08F3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP143 : (Group 143 pm_vsu15) Number of PowerPC Instructions that completed. event:0X08F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP143 : (Group 143 pm_vsu15) Number of run instructions completed. event:0X08F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP143 : (Group 143 pm_vsu15) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 144 pm_vsu16, VSU Execution event:0X0900 counters:0 um:zero minimum:1000 name:PM_VSU_SIMPLE_ISSUED_GRP144 : (Group 144 pm_vsu16) Simple VMX instruction issued event:0X0901 counters:1 um:zero minimum:1000 name:PM_VSU0_SIMPLE_ISSUED_GRP144 : (Group 144 pm_vsu16) Simple VMX instruction issued event:0X0902 counters:2 um:zero minimum:1000 name:PM_VSU0_COMPLEX_ISSUED_GRP144 : (Group 144 pm_vsu16) Complex VMX instruction issued event:0X0903 counters:3 um:zero minimum:1000 name:PM_VMX_RESULT_SAT_1_GRP144 : (Group 144 pm_vsu16) Valid result with sat=1 event:0X0904 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP144 : (Group 144 pm_vsu16) Number of run instructions completed. event:0X0905 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP144 : (Group 144 pm_vsu16) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 145 pm_vsu17, VSU Execution event:0X0910 counters:0 um:zero minimum:1000 name:PM_VSU1_DD_ISSUED_GRP145 : (Group 145 pm_vsu17) 64BIT Decimal Issued on Pipe1 event:0X0911 counters:1 um:zero minimum:1000 name:PM_VSU1_DQ_ISSUED_GRP145 : (Group 145 pm_vsu17) 128BIT Decimal Issued on Pipe1 event:0X0912 counters:2 um:zero minimum:1000 name:PM_VSU1_PERMUTE_ISSUED_GRP145 : (Group 145 pm_vsu17) Permute VMX Instruction Issued event:0X0913 counters:3 um:zero minimum:1000 name:PM_VSU1_SQ_GRP145 : (Group 145 pm_vsu17) Store Vector Issued on Pipe1 event:0X0914 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP145 : (Group 145 pm_vsu17) Number of run instructions completed. event:0X0915 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP145 : (Group 145 pm_vsu17) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 146 pm_vsu18, VSU Execution event:0X0920 counters:0 um:zero minimum:1000 name:PM_VSU_FCONV_GRP146 : (Group 146 pm_vsu18) Convert instruction executed event:0X0921 counters:1 um:zero minimum:1000 name:PM_VSU0_FCONV_GRP146 : (Group 146 pm_vsu18) Convert instruction executed event:0X0922 counters:2 um:zero minimum:1000 name:PM_VSU1_FCONV_GRP146 : (Group 146 pm_vsu18) Convert instruction executed event:0X0923 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP146 : (Group 146 pm_vsu18) Number of PowerPC Instructions that completed. event:0X0924 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP146 : (Group 146 pm_vsu18) Number of run instructions completed. event:0X0925 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP146 : (Group 146 pm_vsu18) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 147 pm_vsu19, VSU Execution event:0X0930 counters:0 um:zero minimum:1000 name:PM_VSU_FRSP_GRP147 : (Group 147 pm_vsu19) Round to single precision instruction executed event:0X0931 counters:1 um:zero minimum:1000 name:PM_VSU0_FRSP_GRP147 : (Group 147 pm_vsu19) Round to single precision instruction executed event:0X0932 counters:2 um:zero minimum:1000 name:PM_VSU1_FRSP_GRP147 : (Group 147 pm_vsu19) Round to single precision instruction executed event:0X0933 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP147 : (Group 147 pm_vsu19) Number of PowerPC Instructions that completed. event:0X0934 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP147 : (Group 147 pm_vsu19) Number of run instructions completed. event:0X0935 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP147 : (Group 147 pm_vsu19) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 148 pm_vsu20, VSU Execution event:0X0940 counters:0 um:zero minimum:1000 name:PM_VSU_FEST_GRP148 : (Group 148 pm_vsu20) Estimate instruction executed event:0X0941 counters:1 um:zero minimum:1000 name:PM_VSU0_FEST_GRP148 : (Group 148 pm_vsu20) Estimate instruction executed event:0X0942 counters:2 um:zero minimum:1000 name:PM_VSU1_FEST_GRP148 : (Group 148 pm_vsu20) Estimate instruction executed event:0X0943 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP148 : (Group 148 pm_vsu20) Number of PowerPC Instructions that completed. event:0X0944 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP148 : (Group 148 pm_vsu20) Number of run instructions completed. event:0X0945 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP148 : (Group 148 pm_vsu20) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 149 pm_vsu21, VSU Execution event:0X0950 counters:0 um:zero minimum:1000 name:PM_BRU_FIN_GRP149 : (Group 149 pm_vsu21) The Branch execution unit finished an instruction event:0X0951 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP149 : (Group 149 pm_vsu21) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0952 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP149 : (Group 149 pm_vsu21) Number of PowerPC Instructions that completed. event:0X0953 counters:3 um:zero minimum:1000 name:PM_VSU_FIN_GRP149 : (Group 149 pm_vsu21) VSU0 Finished an instruction event:0X0954 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP149 : (Group 149 pm_vsu21) Number of run instructions completed. event:0X0955 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP149 : (Group 149 pm_vsu21) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 150 pm_vsu22, VSU Execution event:0X0960 counters:0 um:zero minimum:1000 name:PM_LSU_LDF_GRP150 : (Group 150 pm_vsu22) LSU executed Floating Point load instruction. Combined Unit 0 + 1. event:0X0961 counters:1 um:zero minimum:1000 name:PM_VSU_STF_GRP150 : (Group 150 pm_vsu22) FPU store (SP or DP) issued on Pipe0 event:0X0962 counters:2 um:zero minimum:1000 name:PM_VSU_FMA_GRP150 : (Group 150 pm_vsu22) two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only! event:0X0963 counters:3 um:zero minimum:1000 name:PM_VSU_1FLOP_GRP150 : (Group 150 pm_vsu22) one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished event:0X0964 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP150 : (Group 150 pm_vsu22) Number of run instructions completed. event:0X0965 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP150 : (Group 150 pm_vsu22) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 151 pm_vsu23, VSU Execution event:0X0970 counters:0 um:zero minimum:1000 name:PM_VSU_FSQRT_FDIV_GRP151 : (Group 151 pm_vsu23) DP vector versions of fdiv,fsqrt event:0X0971 counters:1 um:zero minimum:1000 name:PM_VSU_FIN_GRP151 : (Group 151 pm_vsu23) VSU0 Finished an instruction event:0X0972 counters:2 um:zero minimum:1000 name:PM_VSU_FMA_GRP151 : (Group 151 pm_vsu23) two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only! event:0X0973 counters:3 um:zero minimum:1000 name:PM_VSU_1FLOP_GRP151 : (Group 151 pm_vsu23) one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished event:0X0974 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP151 : (Group 151 pm_vsu23) Number of run instructions completed. event:0X0975 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP151 : (Group 151 pm_vsu23) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 152 pm_vsu24, VSU Execution event:0X0980 counters:0 um:zero minimum:1000 name:PM_FLOP_GRP152 : (Group 152 pm_vsu24) A floating point operation has completed event:0X0981 counters:1 um:zero minimum:1000 name:PM_VSU_FIN_GRP152 : (Group 152 pm_vsu24) VSU0 Finished an instruction event:0X0982 counters:2 um:zero minimum:1000 name:PM_VSU_FEST_GRP152 : (Group 152 pm_vsu24) Estimate instruction executed event:0X0983 counters:3 um:zero minimum:1000 name:PM_VSU_1FLOP_GRP152 : (Group 152 pm_vsu24) one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished event:0X0984 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP152 : (Group 152 pm_vsu24) Number of run instructions completed. event:0X0985 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP152 : (Group 152 pm_vsu24) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 153 pm_vsu25, VSU Execution event:0X0990 counters:0 um:zero minimum:1000 name:PM_VSU_STF_GRP153 : (Group 153 pm_vsu25) FPU store (SP or DP) issued on Pipe0 event:0X0991 counters:1 um:zero minimum:1000 name:PM_VSU_FIN_GRP153 : (Group 153 pm_vsu25) VSU0 Finished an instruction event:0X0992 counters:2 um:zero minimum:1000 name:PM_VSU_FRSP_GRP153 : (Group 153 pm_vsu25) Round to single precision instruction executed event:0X0993 counters:3 um:zero minimum:1000 name:PM_VSU_FCONV_GRP153 : (Group 153 pm_vsu25) Convert instruction executed event:0X0994 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP153 : (Group 153 pm_vsu25) Number of run instructions completed. event:0X0995 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP153 : (Group 153 pm_vsu25) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 154 pm_lsu1, LSU LMQ SRQ events event:0X09A0 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP154 : (Group 154 pm_lsu1) The Load Miss Queue was full. event:0X09A1 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP154 : (Group 154 pm_lsu1) Cycles when both the LMQ and SRQ are empty (LSU is idle) event:0X09A2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC_GRP154 : (Group 154 pm_lsu1) ALL threads lsu empty (lmq and srq empty) event:0X09A3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP154 : (Group 154 pm_lsu1) The Store Request Queue is empty event:0X09A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP154 : (Group 154 pm_lsu1) Number of run instructions completed. event:0X09A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP154 : (Group 154 pm_lsu1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 155 pm_lsu2, LSU events event:0X09B0 counters:0 um:zero minimum:1000 name:PM_LSU_FX_FIN_GRP155 : (Group 155 pm_lsu2) LSU Finished a FX operation (up to 2 per cycle) event:0X09B1 counters:1 um:zero minimum:1000 name:PM_LSU_NCST_GRP155 : (Group 155 pm_lsu2) Non-cachable Stores sent to nest event:0X09B2 counters:2 um:zero minimum:1000 name:PM_LSU_FIN_GRP155 : (Group 155 pm_lsu2) LSU Finished an instruction (up to 2 per cycle) event:0X09B3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP155 : (Group 155 pm_lsu2) A flush was initiated by the Load Store Unit. event:0X09B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP155 : (Group 155 pm_lsu2) Number of run instructions completed. event:0X09B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP155 : (Group 155 pm_lsu2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 156 pm_lsu_lmq, LSU LMQ Events event:0X09C0 counters:0 um:zero minimum:1000 name:PM_LSU0_LMQ_LHR_MERGE_GRP156 : (Group 156 pm_lsu_lmq) LS0 Load Merged with another cacheline request event:0X09C1 counters:1 um:zero minimum:1000 name:PM_LSU1_LMQ_LHR_MERGE_GRP156 : (Group 156 pm_lsu_lmq) LS1 Load Merge with another cacheline request event:0X09C2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP156 : (Group 156 pm_lsu_lmq) This signal is asserted every cycle that the Load Request Queue slot zero is valid. The SRQ is 32 entries long and is allocated round-robin. In SMT mode the LRQ is split between the two threads (16 entries each). event:0X09C3 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP156 : (Group 156 pm_lsu_lmq) The Load Miss Queue was full. event:0X09C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP156 : (Group 156 pm_lsu_lmq) Number of run instructions completed. event:0X09C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP156 : (Group 156 pm_lsu_lmq) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 157 pm_lsu_srq1, Store Request Queue Info event:0X09D0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_STFWD_GRP157 : (Group 157 pm_lsu_srq1) Data from a store instruction was forwarded to a load. A load that misses L1 but becomes a store forward is treated as a load miss and it causes the DL1 load miss event to be counted. It does not go into the LMQ. If a load that hits L1 but becomes a store forward, then it's not treated as a load miss. Combined Unit 0 + 1. event:0X09D1 counters:1 um:zero minimum:1000 name:PM_LSU0_SRQ_STFWD_GRP157 : (Group 157 pm_lsu_srq1) Data from a store instruction was forwarded to a load on unit 0. A load that misses L1 but becomes a store forward is treated as a load miss and it causes the DL1 load miss event to be counted. It does not go into the LMQ. If a load that hits L1 but becomes a store forward, then it's not treated as a load miss. event:0X09D2 counters:2 um:zero minimum:1000 name:PM_LSU1_SRQ_STFWD_GRP157 : (Group 157 pm_lsu_srq1) Data from a store instruction was forwarded to a load on unit 1. A load that misses L1 but becomes a store forward is treated as a load miss and it causes the DL1 load miss event to be counted. It does not go into the LMQ. If a load that hits L1 but becomes a store forward, then it's not treated as a load miss. event:0X09D3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP157 : (Group 157 pm_lsu_srq1) Number of PowerPC Instructions that completed. event:0X09D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP157 : (Group 157 pm_lsu_srq1) Number of run instructions completed. event:0X09D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP157 : (Group 157 pm_lsu_srq1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 158 pm_lsu_srq2, Store Request Queue Info event:0X09E0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP158 : (Group 158 pm_lsu_srq2) Cycles that a sync instruction is active in the Store Request Queue. event:0X09E1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_COUNT_GRP158 : (Group 158 pm_lsu_srq2) SRQ sync count (edge of PM_LSU_SRQ_SYNC_CYC) event:0X09E2 counters:2 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP158 : (Group 158 pm_lsu_srq2) This signal is asserted every cycle that the Store Request Queue slot zero is valid. The SRQ is 32 entries long and is allocated round-robin. In SMT mode the SRQ is split between the two threads (16 entries each). event:0X09E3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP158 : (Group 158 pm_lsu_srq2) Number of PowerPC Instructions that completed. event:0X09E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP158 : (Group 158 pm_lsu_srq2) Number of run instructions completed. event:0X09E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP158 : (Group 158 pm_lsu_srq2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 159 pm_lsu_s0_valid, LSU Events event:0X09F0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP159 : (Group 159 pm_lsu_s0_valid) This signal is asserted every cycle that the Store Request Queue slot zero is valid. The SRQ is 32 entries long and is allocated round-robin. In SMT mode the SRQ is split between the two threads (16 entries each). event:0X09F1 counters:1 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP159 : (Group 159 pm_lsu_s0_valid) This signal is asserted every cycle that the Load Request Queue slot zero is valid. The SRQ is 32 entries long and is allocated round-robin. In SMT mode the LRQ is split between the two threads (16 entries each). event:0X09F2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP159 : (Group 159 pm_lsu_s0_valid) This signal is asserted every cycle that the Load Request Queue slot zero is valid. The SRQ is 32 entries long and is allocated round-robin. In SMT mode the LRQ is split between the two threads (16 entries each). event:0X09F3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP159 : (Group 159 pm_lsu_s0_valid) Number of PowerPC Instructions that completed. event:0X09F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP159 : (Group 159 pm_lsu_s0_valid) Number of run instructions completed. event:0X09F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP159 : (Group 159 pm_lsu_s0_valid) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 160 pm_lsu_s0_alloc, LSU Events event:0X0A00 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP160 : (Group 160 pm_lsu_s0_alloc) Slot 0 of LMQ valid event:0X0A01 counters:1 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP160 : (Group 160 pm_lsu_s0_alloc) Slot 0 of LRQ valid event:0X0A02 counters:2 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP160 : (Group 160 pm_lsu_s0_alloc) Slot 0 of SRQ valid event:0X0A03 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP160 : (Group 160 pm_lsu_s0_alloc) Number of PowerPC Instructions that completed. event:0X0A04 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP160 : (Group 160 pm_lsu_s0_alloc) Number of run instructions completed. event:0X0A05 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP160 : (Group 160 pm_lsu_s0_alloc) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 161 pm_l1_pref, L1 pref Events event:0X0A10 counters:0 um:zero minimum:1000 name:PM_L1_PREF_GRP161 : (Group 161 pm_l1_pref) A request to prefetch data into the L1 was made event:0X0A11 counters:1 um:zero minimum:1000 name:PM_LSU0_L1_PREF_GRP161 : (Group 161 pm_l1_pref) LS0 L1 cache data prefetches event:0X0A12 counters:2 um:zero minimum:1000 name:PM_LSU1_L1_PREF_GRP161 : (Group 161 pm_l1_pref) LS1 L1 cache data prefetches event:0X0A13 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP161 : (Group 161 pm_l1_pref) Number of PowerPC Instructions that completed. event:0X0A14 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP161 : (Group 161 pm_l1_pref) Number of run instructions completed. event:0X0A15 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP161 : (Group 161 pm_l1_pref) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 162 pm_l2_guess_1, L2_Guess_events event:0X0A20 counters:0 um:zero minimum:1000 name:PM_L2_LOC_GUESS_CORRECT_GRP162 : (Group 162 pm_l2_guess_1) L2 guess loc and guess was correct (ie data local) event:0X0A21 counters:1 um:zero minimum:1000 name:PM_L2_LOC_GUESS_WRONG_GRP162 : (Group 162 pm_l2_guess_1) L2 guess loc and guess was not correct (ie data remote) event:0X0A22 counters:2 um:zero minimum:10000 name:PM_CYC_GRP162 : (Group 162 pm_l2_guess_1) Processor Cycles event:0X0A23 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP162 : (Group 162 pm_l2_guess_1) Number of PowerPC Instructions that completed. event:0X0A24 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP162 : (Group 162 pm_l2_guess_1) Number of run instructions completed. event:0X0A25 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP162 : (Group 162 pm_l2_guess_1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 163 pm_l2_guess_2, L2_Guess_events event:0X0A30 counters:0 um:zero minimum:1000 name:PM_L2_GLOB_GUESS_CORRECT_GRP163 : (Group 163 pm_l2_guess_2) L2 guess glb and guess was correct (ie data remote) event:0X0A31 counters:1 um:zero minimum:1000 name:PM_L2_GLOB_GUESS_WRONG_GRP163 : (Group 163 pm_l2_guess_2) L2 guess glb and guess was not correct (ie data local) event:0X0A32 counters:2 um:zero minimum:10000 name:PM_CYC_GRP163 : (Group 163 pm_l2_guess_2) Processor Cycles event:0X0A33 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP163 : (Group 163 pm_l2_guess_2) Number of PowerPC Instructions that completed. event:0X0A34 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP163 : (Group 163 pm_l2_guess_2) Number of run instructions completed. event:0X0A35 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP163 : (Group 163 pm_l2_guess_2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 164 pm_misc1, Misc events event:0X0A40 counters:0 um:zero minimum:1000 name:PM_INST_IMC_MATCH_CMPL_GRP164 : (Group 164 pm_misc1) Number of instructions resulting from the marked instructions expansion that completed. event:0X0A41 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP164 : (Group 164 pm_misc1) An instruction fetch group was fetched from L1. Fetch Groups can contain up to 8 instructions event:0X0A42 counters:2 um:zero minimum:1000 name:PM_INST_IMC_MATCH_DISP_GRP164 : (Group 164 pm_misc1) IMC Matches dispatched event:0X0A43 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP164 : (Group 164 pm_misc1) Number of PowerPC Instructions that completed. event:0X0A44 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP164 : (Group 164 pm_misc1) Number of run instructions completed. event:0X0A45 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP164 : (Group 164 pm_misc1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 165 pm_misc2, Misc events event:0X0A50 counters:0 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP165 : (Group 165 pm_misc2) Cycles when an interrupt due to an external exception is pending but external exceptions were masked. event:0X0A51 counters:1 um:zero minimum:1000 name:PM_EXT_INT_GRP165 : (Group 165 pm_misc2) An interrupt due to an external exception occurred event:0X0A52 counters:2 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP165 : (Group 165 pm_misc2) When the selected time base bit (as specified in MMCR0[TBSEL])transitions from 0 to 1 event:0X0A53 counters:3 um:zero minimum:10000 name:PM_CYC_GRP165 : (Group 165 pm_misc2) Processor Cycles event:0X0A54 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP165 : (Group 165 pm_misc2) Number of run instructions completed. event:0X0A55 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP165 : (Group 165 pm_misc2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 166 pm_misc3, Misc events event:0X0A60 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP166 : (Group 166 pm_misc3) A group containing at least one PPC instruction completed. For microcoded instructions that span multiple groups, this will only occur once. event:0X0A61 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP166 : (Group 166 pm_misc3) Cycles when the processor is executing in Hypervisor (MSR[HV] = 1 and MSR[PR]=0) event:0X0A62 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP166 : (Group 166 pm_misc3) Number of PowerPC instructions successfully dispatched. event:0X0A63 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP166 : (Group 166 pm_misc3) A group containing at least one PPC instruction was dispatched. For microcoded instructions that span multiple groups, this will only occur once. event:0X0A64 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP166 : (Group 166 pm_misc3) Number of run instructions completed. event:0X0A65 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP166 : (Group 166 pm_misc3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 167 pm_misc4, Misc events event:0X0A70 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_NONSPEC_GRP167 : (Group 167 pm_misc4) Number of groups, counted at completion, that have encountered an instruction cache miss. event:0X0A71 counters:1 um:zero minimum:1000 name:PM_GCT_NOSLOT_IC_MISS_GRP167 : (Group 167 pm_misc4) Cycles when the Global Completion Table has no slots from this thread because of an Instruction Cache miss. event:0X0A72 counters:2 um:zero minimum:10000 name:PM_CYC_GRP167 : (Group 167 pm_misc4) Processor Cycles event:0X0A73 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_IC_MISS_GRP167 : (Group 167 pm_misc4) No slot in GCT caused by branch mispredict or I cache miss event:0X0A74 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP167 : (Group 167 pm_misc4) Number of run instructions completed. event:0X0A75 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP167 : (Group 167 pm_misc4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 168 pm_misc5, Misc events event:0X0A80 counters:0 um:zero minimum:1000 name:PM_GRP_BR_MPRED_NONSPEC_GRP168 : (Group 168 pm_misc5) Group experienced non-speculative branch redirect event:0X0A81 counters:1 um:zero minimum:1000 name:PM_BR_MPRED_CR_TA_GRP168 : (Group 168 pm_misc5) Branch mispredict - taken/not taken and target event:0X0A82 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_CCACHE_GRP168 : (Group 168 pm_misc5) A branch instruction target was incorrectly predicted by the count cache. This will result in a branch redirect flush if not overwritten by a flush of an older instruction. event:0X0A83 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP168 : (Group 168 pm_misc5) A branch instruction was incorrectly predicted. This could have been a target prediction, a condition prediction, or both event:0X0A84 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP168 : (Group 168 pm_misc5) Number of run instructions completed. event:0X0A85 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP168 : (Group 168 pm_misc5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 169 pm_misc6, Misc events event:0X0A90 counters:0 um:zero minimum:1000 name:PM_L1_DEMAND_WRITE_GRP169 : (Group 169 pm_misc6) Instruction Demand sectors wriittent into IL1 event:0X0A91 counters:1 um:zero minimum:1000 name:PM_IC_PREF_WRITE_GRP169 : (Group 169 pm_misc6) Number of Instruction Cache entries written because of prefetch. Prefetch entries are marked least recently used and are candidates for eviction if they are not needed to satify a demand fetch. event:0X0A92 counters:2 um:zero minimum:1000 name:PM_IC_WRITE_ALL_GRP169 : (Group 169 pm_misc6) Icache sectors written, prefetch + demand event:0X0A93 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP169 : (Group 169 pm_misc6) Number of PowerPC Instructions that completed. event:0X0A94 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP169 : (Group 169 pm_misc6) Number of run instructions completed. event:0X0A95 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP169 : (Group 169 pm_misc6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 170 pm_misc7, Misc events event:0X0AA0 counters:0 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP170 : (Group 170 pm_misc7) The threshold timer expired event:0X0AA1 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP170 : (Group 170 pm_misc7) Cycles when the processor is executing in Hypervisor (MSR[HV] = 1 and MSR[PR]=0) event:0X0AA2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP170 : (Group 170 pm_misc7) Processor Cycles event:0X0AA3 counters:3 um:zero minimum:1000 name:PM_IFU_FIN_GRP170 : (Group 170 pm_misc7) The Instruction Fetch Unit finished an instruction event:0X0AA4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP170 : (Group 170 pm_misc7) Number of run instructions completed. event:0X0AA5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP170 : (Group 170 pm_misc7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 171 pm_misc8, Misc events event:0X0AB0 counters:0 um:zero minimum:1000 name:PM_BR_MPRED_LSTACK_GRP171 : (Group 171 pm_misc8) Branch Mispredict due to Link Stack event:0X0AB1 counters:1 um:zero minimum:1000 name:PM_EXT_INT_GRP171 : (Group 171 pm_misc8) An interrupt due to an external exception occurred event:0X0AB2 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP171 : (Group 171 pm_misc8) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0AB3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP171 : (Group 171 pm_misc8) A branch instruction was incorrectly predicted. This could have been a target prediction, a condition prediction, or both event:0X0AB4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP171 : (Group 171 pm_misc8) Number of run instructions completed. event:0X0AB5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP171 : (Group 171 pm_misc8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 172 pm_misc9, Misc events event:0X0AC0 counters:0 um:zero minimum:1000 name:PM_FLUSH_BR_MPRED_GRP172 : (Group 172 pm_misc9) A flush was caused by a branch mispredict. event:0X0AC1 counters:1 um:zero minimum:1000 name:PM_FLUSH_PARTIAL_GRP172 : (Group 172 pm_misc9) Partial flush event:0X0AC2 counters:2 um:zero minimum:1000 name:PM_LSU_SET_MPRED_GRP172 : (Group 172 pm_misc9) Line already in cache at reload time event:0X0AC3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP172 : (Group 172 pm_misc9) A branch instruction was incorrectly predicted. This could have been a target prediction, a condition prediction, or both event:0X0AC4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP172 : (Group 172 pm_misc9) Number of run instructions completed. event:0X0AC5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP172 : (Group 172 pm_misc9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 173 pm_misc10, Misc events event:0X0AD0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP173 : (Group 173 pm_misc10) Cycles the Store Request Queue is full. event:0X0AD1 counters:1 um:zero minimum:1000 name:PM_LSU_DC_PREF_STREAM_ALLOC_GRP173 : (Group 173 pm_misc10) D cache new prefetch stream allocated event:0X0AD2 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP173 : (Group 173 pm_misc10) A request to prefetch data into the L1 was made event:0X0AD3 counters:3 um:zero minimum:1000 name:PM_IBUF_FULL_CYC_GRP173 : (Group 173 pm_misc10) Cycles with the Instruction Buffer was full. The Instruction Buffer is a circular queue of 64 instructions per thread, organized as 16 groups of 4 instructions. event:0X0AD4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP173 : (Group 173 pm_misc10) Number of run instructions completed. event:0X0AD5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP173 : (Group 173 pm_misc10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 174 pm_misc11, Misc events event:0X0AE0 counters:0 um:zero minimum:1000 name:PM_FLOP_GRP174 : (Group 174 pm_misc11) A floating point operation has completed event:0X0AE1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP174 : (Group 174 pm_misc11) Processor Cycles event:0X0AE2 counters:2 um:zero minimum:1000 name:PM_GRP_CMPL_GRP174 : (Group 174 pm_misc11) A group completed. Microcoded instructions that span multiple groups will generate this event once per group. event:0X0AE3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP174 : (Group 174 pm_misc11) Number of PowerPC Instructions that completed. event:0X0AE4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP174 : (Group 174 pm_misc11) Number of run instructions completed. event:0X0AE5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP174 : (Group 174 pm_misc11) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 175 pm_misc_12, Misc Events event:0X0AF0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP175 : (Group 175 pm_misc_12) Number of PowerPC Instructions that completed. event:0X0AF1 counters:1 um:zero minimum:1000 name:PM_ST_FIN_GRP175 : (Group 175 pm_misc_12) Store requests sent to the nest. event:0X0AF2 counters:2 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP175 : (Group 175 pm_misc_12) When the selected time base bit (as specified in MMCR0[TBSEL])transitions from 0 to 1 event:0X0AF3 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP175 : (Group 175 pm_misc_12) Flushes occurred including LSU and Branch flushes. event:0X0AF4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP175 : (Group 175 pm_misc_12) Number of run instructions completed. event:0X0AF5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP175 : (Group 175 pm_misc_12) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 176 pm_misc_13, Misc Events event:0X0B00 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP176 : (Group 176 pm_misc_13) Cycles when the Global Completion Table has no slots from this thread. event:0X0B01 counters:1 um:zero minimum:1000 name:PM_ST_FIN_GRP176 : (Group 176 pm_misc_13) Store requests sent to the nest. event:0X0B02 counters:2 um:zero minimum:1000 name:PM_DTLB_MISS_GRP176 : (Group 176 pm_misc_13) Data TLB misses, all page sizes. event:0X0B03 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP176 : (Group 176 pm_misc_13) A branch instruction was incorrectly predicted. This could have been a target prediction, a condition prediction, or both event:0X0B04 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP176 : (Group 176 pm_misc_13) Number of run instructions completed. event:0X0B05 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP176 : (Group 176 pm_misc_13) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 177 pm_misc_14, Misc Events event:0X0B10 counters:0 um:zero minimum:10000 name:PM_CYC_GRP177 : (Group 177 pm_misc_14) Processor Cycles event:0X0B11 counters:1 um:zero minimum:10000 name:PM_CYC_GRP177 : (Group 177 pm_misc_14) Processor Cycles event:0X0B12 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP177 : (Group 177 pm_misc_14) Number of PowerPC Instructions that completed. event:0X0B13 counters:3 um:zero minimum:1000 name:PM_IFU_FIN_GRP177 : (Group 177 pm_misc_14) The Instruction Fetch Unit finished an instruction event:0X0B14 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP177 : (Group 177 pm_misc_14) Number of run instructions completed. event:0X0B15 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP177 : (Group 177 pm_misc_14) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 178 pm_misc_15, Misc Events event:0X0B20 counters:0 um:zero minimum:1000 name:PM_LSU_DCACHE_RELOAD_VALID_GRP178 : (Group 178 pm_misc_15) count per sector of lines reloaded in L1 (demand + prefetch) event:0X0B21 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_STORE_GRP178 : (Group 178 pm_misc_15) Completion stall due to store instruction event:0X0B22 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP178 : (Group 178 pm_misc_15) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0B23 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_VECTOR_LONG_GRP178 : (Group 178 pm_misc_15) completion stall due to long latency vector instruction event:0X0B24 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP178 : (Group 178 pm_misc_15) Number of run instructions completed. event:0X0B25 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP178 : (Group 178 pm_misc_15) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 179 pm_misc_16, Misc Events event:0X0B30 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_END_GCT_NOSLOT_GRP179 : (Group 179 pm_misc_16) Count ended because GCT went empty event:0X0B31 counters:1 um:zero minimum:1000 name:PM_LSU0_L1_SW_PREF_GRP179 : (Group 179 pm_misc_16) LSU0 Software L1 Prefetches, including SW Transient Prefetches event:0X0B32 counters:2 um:zero minimum:1000 name:PM_LSU1_L1_SW_PREF_GRP179 : (Group 179 pm_misc_16) LSU1 Software L1 Prefetches, including SW Transient Prefetches event:0X0B33 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_IFU_GRP179 : (Group 179 pm_misc_16) Completion stall due to IFU event:0X0B34 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP179 : (Group 179 pm_misc_16) Number of run instructions completed. event:0X0B35 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP179 : (Group 179 pm_misc_16) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 180 pm_misc_17, Misc Events event:0X0B40 counters:0 um:zero minimum:1000 name:PM_BRU_FIN_GRP180 : (Group 180 pm_misc_17) The Branch execution unit finished an instruction event:0X0B41 counters:1 um:zero minimum:1000 name:PM_ST_FIN_GRP180 : (Group 180 pm_misc_17) Store requests sent to the nest. event:0X0B42 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_DL2L3_SHR_GRP180 : (Group 180 pm_misc_17) A Page Table Entry was loaded into the ERAT from memory attached to a different module than this processor is located on due to a marked load or store. event:0X0B43 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_BRU_GRP180 : (Group 180 pm_misc_17) Completion stall due to BRU event:0X0B44 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP180 : (Group 180 pm_misc_17) Number of run instructions completed. event:0X0B45 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP180 : (Group 180 pm_misc_17) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 181 pm_suspend, SUSPENDED events event:0X0B50 counters:0 um:zero minimum:1000 name:PM_SUSPENDED_GRP181 : (Group 181 pm_suspend) The counter is suspended (does not count) event:0X0B51 counters:1 um:zero minimum:10000 name:PM_CYC_GRP181 : (Group 181 pm_suspend) Processor Cycles event:0X0B52 counters:2 um:zero minimum:1000 name:PM_LWSYNC_GRP181 : (Group 181 pm_suspend) lwsync count (easier to use than IMC) event:0X0B53 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP181 : (Group 181 pm_suspend) Number of PowerPC Instructions that completed. event:0X0B54 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP181 : (Group 181 pm_suspend) Number of run instructions completed. event:0X0B55 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP181 : (Group 181 pm_suspend) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 182 pm_iops, Internal Operations events event:0X0B60 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP182 : (Group 182 pm_iops) Number of internal operations that completed. event:0X0B61 counters:1 um:zero minimum:10000 name:PM_CYC_GRP182 : (Group 182 pm_iops) Processor Cycles event:0X0B62 counters:2 um:zero minimum:1000 name:PM_IOPS_DISP_GRP182 : (Group 182 pm_iops) IOPS dispatched event:0X0B63 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP182 : (Group 182 pm_iops) Number of PowerPC Instructions that completed. event:0X0B64 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP182 : (Group 182 pm_iops) Number of run instructions completed. event:0X0B65 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP182 : (Group 182 pm_iops) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 183 pm_sync, sync event:0X0B70 counters:0 um:zero minimum:1000 name:PM_LWSYNC_GRP183 : (Group 183 pm_sync) lwsync count (easier to use than IMC) event:0X0B71 counters:1 um:zero minimum:10000 name:PM_CYC_GRP183 : (Group 183 pm_sync) Processor Cycles event:0X0B72 counters:2 um:zero minimum:1000 name:PM_LWSYNC_HELD_GRP183 : (Group 183 pm_sync) Cycles a LWSYNC instruction was held at dispatch. LWSYNC instructions are held at dispatch until all previous loads are done and all previous stores have issued. LWSYNC enters the Store Request Queue and is sent to the storage subsystem but does not wait for a response. event:0X0B73 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP183 : (Group 183 pm_sync) Number of PowerPC Instructions that completed. event:0X0B74 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP183 : (Group 183 pm_sync) Number of run instructions completed. event:0X0B75 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP183 : (Group 183 pm_sync) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 184 pm_seg, Segment events event:0X0B80 counters:0 um:zero minimum:10000 name:PM_CYC_GRP184 : (Group 184 pm_seg) Processor Cycles event:0X0B81 counters:1 um:zero minimum:1000 name:PM_SEG_EXCEPTION_GRP184 : (Group 184 pm_seg) ISEG + DSEG Exception event:0X0B82 counters:2 um:zero minimum:1000 name:PM_ISEG_GRP184 : (Group 184 pm_seg) ISEG Exception event:0X0B83 counters:3 um:zero minimum:1000 name:PM_DSEG_GRP184 : (Group 184 pm_seg) DSEG Exception event:0X0B84 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP184 : (Group 184 pm_seg) Number of run instructions completed. event:0X0B85 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP184 : (Group 184 pm_seg) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 185 pm_l3_hit, L3 Hit Events event:0X0B90 counters:0 um:zero minimum:1000 name:PM_L3_HIT_GRP185 : (Group 185 pm_l3_hit) L3 Hits event:0X0B91 counters:1 um:zero minimum:1000 name:PM_L3_LD_HIT_GRP185 : (Group 185 pm_l3_hit) L3 demand LD Hits event:0X0B92 counters:2 um:zero minimum:1000 name:PM_L3_PREF_HIT_GRP185 : (Group 185 pm_l3_hit) L3 Prefetch Directory Hit event:0X0B93 counters:3 um:zero minimum:1000 name:PM_L3_CO_L31_GRP185 : (Group 185 pm_l3_hit) L3 Castouts to L3.1 event:0X0B94 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP185 : (Group 185 pm_l3_hit) Number of run instructions completed. event:0X0B95 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP185 : (Group 185 pm_l3_hit) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 186 pm_shl, Shell Events event:0X0BA0 counters:0 um:zero minimum:1000 name:PM_SHL_DEALLOCATED_GRP186 : (Group 186 pm_shl) SHL Table entry deallocated event:0X0BA1 counters:1 um:zero minimum:1000 name:PM_SHL_CREATED_GRP186 : (Group 186 pm_shl) SHL table entry Created event:0X0BA2 counters:2 um:zero minimum:1000 name:PM_SHL_MERGED_GRP186 : (Group 186 pm_shl) SHL table entry merged with existing event:0X0BA3 counters:3 um:zero minimum:1000 name:PM_SHL_MATCH_GRP186 : (Group 186 pm_shl) SHL Table Match event:0X0BA4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP186 : (Group 186 pm_shl) Number of run instructions completed. event:0X0BA5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP186 : (Group 186 pm_shl) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 187 pm_l3_pref, L3 Prefetch events event:0X0BB0 counters:0 um:zero minimum:1000 name:PM_L3_PREF_LD_GRP187 : (Group 187 pm_l3_pref) L3 cache LD prefetches event:0X0BB1 counters:1 um:zero minimum:1000 name:PM_L3_PREF_ST_GRP187 : (Group 187 pm_l3_pref) L3 cache ST prefetches event:0X0BB2 counters:2 um:zero minimum:1000 name:PM_L3_PREF_LDST_GRP187 : (Group 187 pm_l3_pref) L3 cache prefetches LD + ST event:0X0BB3 counters:3 um:zero minimum:1000 name:PM_L1_PREF_GRP187 : (Group 187 pm_l3_pref) A request to prefetch data into the L1 was made event:0X0BB4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP187 : (Group 187 pm_l3_pref) Number of run instructions completed. event:0X0BB5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP187 : (Group 187 pm_l3_pref) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 188 pm_l3, L3 events event:0X0BC0 counters:0 um:zero minimum:1000 name:PM_L3_MISS_GRP188 : (Group 188 pm_l3) L3 Misses event:0X0BC1 counters:1 um:zero minimum:1000 name:PM_L3_LD_MISS_GRP188 : (Group 188 pm_l3) L3 demand LD Miss event:0X0BC2 counters:2 um:zero minimum:1000 name:PM_L3_PREF_MISS_GRP188 : (Group 188 pm_l3) L3 Prefetch Directory Miss event:0X0BC3 counters:3 um:zero minimum:1000 name:PM_L3_CO_MEM_GRP188 : (Group 188 pm_l3) L3 Castouts to Memory event:0X0BC4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP188 : (Group 188 pm_l3) Number of run instructions completed. event:0X0BC5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP188 : (Group 188 pm_l3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 189 pm_streams1, Streams event:0X0BD0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP189 : (Group 189 pm_streams1) Processor Cycles event:0X0BD1 counters:1 um:zero minimum:1000 name:PM_LSU_DC_PREF_STREAM_CONFIRM_GRP189 : (Group 189 pm_streams1) Dcache new prefetch stream confirmed event:0X0BD2 counters:2 um:zero minimum:1000 name:PM_LSU0_DC_PREF_STREAM_CONFIRM_GRP189 : (Group 189 pm_streams1) LS0 Dcache prefetch stream confirmed event:0X0BD3 counters:3 um:zero minimum:1000 name:PM_LSU1_DC_PREF_STREAM_CONFIRM_GRP189 : (Group 189 pm_streams1) LS1 'Dcache prefetch stream confirmed event:0X0BD4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP189 : (Group 189 pm_streams1) Number of run instructions completed. event:0X0BD5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP189 : (Group 189 pm_streams1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 190 pm_streams2, Streams event:0X0BE0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP190 : (Group 190 pm_streams2) Processor Cycles event:0X0BE1 counters:1 um:zero minimum:1000 name:PM_LSU_DC_PREF_STRIDED_STREAM_CONFIRM_GRP190 : (Group 190 pm_streams2) Dcache Strided prefetch stream confirmed (software + hardware) event:0X0BE2 counters:2 um:zero minimum:1000 name:PM_LSU0_DC_PREF_STREAM_CONFIRM_STRIDE_GRP190 : (Group 190 pm_streams2) LS0 Dcache Strided prefetch stream confirmed event:0X0BE3 counters:3 um:zero minimum:1000 name:PM_LSU1_DC_PREF_STREAM_CONFIRM_STRIDE_GRP190 : (Group 190 pm_streams2) LS1 Dcache Strided prefetch stream confirmed event:0X0BE4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP190 : (Group 190 pm_streams2) Number of run instructions completed. event:0X0BE5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP190 : (Group 190 pm_streams2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 191 pm_streams3, Streams event:0X0BF0 counters:0 um:zero minimum:1000 name:PM_DC_PREF_DST_GRP191 : (Group 191 pm_streams3) A prefetch stream was started using the DST instruction. event:0X0BF1 counters:1 um:zero minimum:1000 name:PM_LSU_DC_PREF_STREAM_ALLOC_GRP191 : (Group 191 pm_streams3) D cache new prefetch stream allocated event:0X0BF2 counters:2 um:zero minimum:1000 name:PM_LSU0_DC_PREF_STREAM_ALLOC_GRP191 : (Group 191 pm_streams3) LS0 D cache new prefetch stream allocated event:0X0BF3 counters:3 um:zero minimum:1000 name:PM_LSU1_DC_PREF_STREAM_ALLOC_GRP191 : (Group 191 pm_streams3) LS 1 D cache new prefetch stream allocated event:0X0BF4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP191 : (Group 191 pm_streams3) Number of run instructions completed. event:0X0BF5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP191 : (Group 191 pm_streams3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 192 pm_larx, LARX event:0X0C00 counters:0 um:zero minimum:1000 name:PM_LARX_LSU0_GRP192 : (Group 192 pm_larx) A larx (lwarx or ldarx) was executed on side 0 event:0X0C01 counters:1 um:zero minimum:1000 name:PM_LARX_LSU1_GRP192 : (Group 192 pm_larx) A larx (lwarx or ldarx) was executed on side 1 event:0X0C02 counters:2 um:zero minimum:10000 name:PM_CYC_GRP192 : (Group 192 pm_larx) Processor Cycles event:0X0C03 counters:3 um:zero minimum:1000 name:PM_LARX_LSU_GRP192 : (Group 192 pm_larx) Larx Finished event:0X0C04 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP192 : (Group 192 pm_larx) Number of run instructions completed. event:0X0C05 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP192 : (Group 192 pm_larx) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 193 pm_ldf, Floating Point loads event:0X0C10 counters:0 um:zero minimum:10000 name:PM_CYC_GRP193 : (Group 193 pm_ldf) Processor Cycles event:0X0C11 counters:1 um:zero minimum:1000 name:PM_LSU_LDF_GRP193 : (Group 193 pm_ldf) LSU executed Floating Point load instruction. Combined Unit 0 + 1. event:0X0C12 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP193 : (Group 193 pm_ldf) A floating point load was executed by LSU0 event:0X0C13 counters:3 um:zero minimum:1000 name:PM_LSU1_LDF_GRP193 : (Group 193 pm_ldf) A floating point load was executed by LSU1 event:0X0C14 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP193 : (Group 193 pm_ldf) Number of run instructions completed. event:0X0C15 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP193 : (Group 193 pm_ldf) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 194 pm_ldx, Vector Load event:0X0C20 counters:0 um:zero minimum:10000 name:PM_CYC_GRP194 : (Group 194 pm_ldx) Processor Cycles event:0X0C21 counters:1 um:zero minimum:1000 name:PM_LSU_LDX_GRP194 : (Group 194 pm_ldx) All Vector loads (vsx vector + vmx vector) event:0X0C22 counters:2 um:zero minimum:1000 name:PM_LSU0_LDX_GRP194 : (Group 194 pm_ldx) LS0 Vector Loads event:0X0C23 counters:3 um:zero minimum:1000 name:PM_LSU1_LDX_GRP194 : (Group 194 pm_ldx) LS1 Vector Loads event:0X0C24 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP194 : (Group 194 pm_ldx) Number of run instructions completed. event:0X0C25 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP194 : (Group 194 pm_ldx) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 195 pm_l2_ld_st, L2 load and store events event:0X0C30 counters:0 um:zero minimum:1000 name:PM_L2_LD_GRP195 : (Group 195 pm_l2_ld_st) Data Load Count event:0X0C31 counters:1 um:zero minimum:1000 name:PM_L2_ST_MISS_GRP195 : (Group 195 pm_l2_ld_st) Data Store Miss event:0X0C32 counters:2 um:zero minimum:1000 name:PM_L3_PREF_HIT_GRP195 : (Group 195 pm_l2_ld_st) L3 Prefetch Directory Hit event:0X0C33 counters:3 um:zero minimum:10000 name:PM_CYC_GRP195 : (Group 195 pm_l2_ld_st) Processor Cycles event:0X0C34 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP195 : (Group 195 pm_l2_ld_st) Number of run instructions completed. event:0X0C35 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP195 : (Group 195 pm_l2_ld_st) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 196 pm_stcx, STCX event:0X0C40 counters:0 um:zero minimum:1000 name:PM_LARX_LSU_GRP196 : (Group 196 pm_stcx) Larx Finished event:0X0C41 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_LHS_GRP196 : (Group 196 pm_stcx) The Load Store Unit rejected a load instruction that had an address overlap with an older store in the store queue. The store must be committed and de-allocated from the Store Queue before the load can execute successfully. Combined Unit 0 + 1 event:0X0C42 counters:2 um:zero minimum:1000 name:PM_STCX_CMPL_GRP196 : (Group 196 pm_stcx) Conditional stores with reservation completed event:0X0C43 counters:3 um:zero minimum:1000 name:PM_STCX_FAIL_GRP196 : (Group 196 pm_stcx) A stcx (stwcx or stdcx) failed event:0X0C44 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP196 : (Group 196 pm_stcx) Number of run instructions completed. event:0X0C45 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP196 : (Group 196 pm_stcx) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 197 pm_btac, BTAC event:0X0C50 counters:0 um:zero minimum:1000 name:PM_BTAC_HIT_GRP197 : (Group 197 pm_btac) BTAC Correct Prediction event:0X0C51 counters:1 um:zero minimum:1000 name:PM_BTAC_MISS_GRP197 : (Group 197 pm_btac) BTAC Mispredicted event:0X0C52 counters:2 um:zero minimum:1000 name:PM_STCX_CMPL_GRP197 : (Group 197 pm_btac) Conditional stores with reservation completed event:0X0C53 counters:3 um:zero minimum:1000 name:PM_STCX_FAIL_GRP197 : (Group 197 pm_btac) A stcx (stwcx or stdcx) failed event:0X0C54 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP197 : (Group 197 pm_btac) Number of run instructions completed. event:0X0C55 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP197 : (Group 197 pm_btac) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 198 pm_br_bc, Branch BC events event:0X0C60 counters:0 um:zero minimum:1000 name:PM_BC_PLUS_8_CONV_GRP198 : (Group 198 pm_br_bc) BC+8 Converted event:0X0C61 counters:1 um:zero minimum:1000 name:PM_BC_PLUS_8_RSLV_TAKEN_GRP198 : (Group 198 pm_br_bc) BC+8 Resolve outcome was Taken, resulting in the conditional instruction being canceled event:0X0C62 counters:2 um:zero minimum:10000 name:PM_CYC_GRP198 : (Group 198 pm_br_bc) Processor Cycles event:0X0C63 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP198 : (Group 198 pm_br_bc) Number of PowerPC Instructions that completed. event:0X0C64 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP198 : (Group 198 pm_br_bc) Number of run instructions completed. event:0X0C65 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP198 : (Group 198 pm_br_bc) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 199 pm_inst_imc, inst imc events event:0X0C70 counters:0 um:zero minimum:1000 name:PM_INST_IMC_MATCH_CMPL_GRP199 : (Group 199 pm_inst_imc) Number of instructions resulting from the marked instructions expansion that completed. event:0X0C71 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP199 : (Group 199 pm_inst_imc) Number of PowerPC instructions successfully dispatched. event:0X0C72 counters:2 um:zero minimum:1000 name:PM_INST_IMC_MATCH_DISP_GRP199 : (Group 199 pm_inst_imc) IMC Matches dispatched event:0X0C73 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP199 : (Group 199 pm_inst_imc) Number of PowerPC Instructions that completed. event:0X0C74 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP199 : (Group 199 pm_inst_imc) Number of run instructions completed. event:0X0C75 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP199 : (Group 199 pm_inst_imc) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 200 pm_l2_misc1, L2 load/store Miss events event:0X0C80 counters:0 um:zero minimum:1000 name:PM_L2_LDST_GRP200 : (Group 200 pm_l2_misc1) Data Load+Store Count event:0X0C81 counters:1 um:zero minimum:1000 name:PM_L2_LDST_MISS_GRP200 : (Group 200 pm_l2_misc1) Data Load+Store Miss event:0X0C82 counters:2 um:zero minimum:1000 name:PM_L2_INST_MISS_GRP200 : (Group 200 pm_l2_misc1) Instruction Load Misses event:0X0C83 counters:3 um:zero minimum:1000 name:PM_L2_DISP_ALL_GRP200 : (Group 200 pm_l2_misc1) All successful LD/ST dispatches for this thread(i+d) event:0X0C84 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP200 : (Group 200 pm_l2_misc1) Number of run instructions completed. event:0X0C85 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP200 : (Group 200 pm_l2_misc1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 201 pm_l2_misc2, L2 Events event:0X0C90 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP201 : (Group 201 pm_l2_misc2) Number of PowerPC Instructions that completed. event:0X0C91 counters:1 um:zero minimum:10000 name:PM_CYC_GRP201 : (Group 201 pm_l2_misc2) Processor Cycles event:0X0C92 counters:2 um:zero minimum:1000 name:PM_L2_INST_GRP201 : (Group 201 pm_l2_misc2) Instruction Load Count event:0X0C93 counters:3 um:zero minimum:1000 name:PM_L2_DISP_ALL_GRP201 : (Group 201 pm_l2_misc2) All successful LD/ST dispatches for this thread(i+d) event:0X0C94 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP201 : (Group 201 pm_l2_misc2) Number of run instructions completed. event:0X0C95 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP201 : (Group 201 pm_l2_misc2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 202 pm_l2_misc3, L2 Events event:0X0CA0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP202 : (Group 202 pm_l2_misc3) Number of PowerPC Instructions that completed. event:0X0CA1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP202 : (Group 202 pm_l2_misc3) Processor Cycles event:0X0CA2 counters:2 um:zero minimum:1000 name:PM_L2_SYS_PUMP_GRP202 : (Group 202 pm_l2_misc3) RC req that was a global (aka system) pump attempt event:0X0CA3 counters:3 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP202 : (Group 202 pm_l2_misc3) Number of run instructions completed. event:0X0CA4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP202 : (Group 202 pm_l2_misc3) Number of run instructions completed. event:0X0CA5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP202 : (Group 202 pm_l2_misc3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 203 pm_l2_misc4, L2 Events event:0X0CB0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP203 : (Group 203 pm_l2_misc4) Number of PowerPC Instructions that completed. event:0X0CB1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP203 : (Group 203 pm_l2_misc4) Processor Cycles event:0X0CB2 counters:2 um:zero minimum:1000 name:PM_L2_SN_SX_I_DONE_GRP203 : (Group 203 pm_l2_misc4) SNP dispatched and went from Sx or Tx to Ix event:0X0CB3 counters:3 um:zero minimum:1000 name:PM_L2_SN_M_WR_DONE_GRP203 : (Group 203 pm_l2_misc4) SNP dispatched for a write and was M event:0X0CB4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP203 : (Group 203 pm_l2_misc4) Number of run instructions completed. event:0X0CB5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP203 : (Group 203 pm_l2_misc4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 204 pm_l2_misc5, L2 Events event:0X0CC0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP204 : (Group 204 pm_l2_misc5) Number of PowerPC Instructions that completed. event:0X0CC1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP204 : (Group 204 pm_l2_misc5) Processor Cycles event:0X0CC2 counters:2 um:zero minimum:1000 name:PM_L2_NODE_PUMP_GRP204 : (Group 204 pm_l2_misc5) RC req that was a local (aka node) pump attempt event:0X0CC3 counters:3 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP204 : (Group 204 pm_l2_misc5) Number of run instructions completed. event:0X0CC4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP204 : (Group 204 pm_l2_misc5) Number of run instructions completed. event:0X0CC5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP204 : (Group 204 pm_l2_misc5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 205 pm_l2_misc6, L2 Events event:0X0CD0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP205 : (Group 205 pm_l2_misc6) Number of PowerPC Instructions that completed. event:0X0CD1 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP205 : (Group 205 pm_l2_misc6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0CD2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP205 : (Group 205 pm_l2_misc6) Processor Cycles event:0X0CD3 counters:3 um:zero minimum:1000 name:PM_L2_SN_M_RD_DONE_GRP205 : (Group 205 pm_l2_misc6) SNP dispatched for a read and was M event:0X0CD4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP205 : (Group 205 pm_l2_misc6) Number of run instructions completed. event:0X0CD5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP205 : (Group 205 pm_l2_misc6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 206 pm_ierat, IERAT Events event:0X0CE0 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_GRP206 : (Group 206 pm_ierat) A translation request missed the Instruction Effective to Real Address Translation (ERAT) table event:0X0CE1 counters:1 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_16MPLUS_GRP206 : (Group 206 pm_ierat) large page 16M+ event:0X0CE2 counters:2 um:zero minimum:1000 name:PM_IERAT_WR_64K_GRP206 : (Group 206 pm_ierat) large page 64k event:0X0CE3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP206 : (Group 206 pm_ierat) Number of PowerPC Instructions that completed. event:0X0CE4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP206 : (Group 206 pm_ierat) Number of run instructions completed. event:0X0CE5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP206 : (Group 206 pm_ierat) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 207 pm_disp_clb, Dispatch CLB Events event:0X0CF0 counters:0 um:zero minimum:1000 name:PM_DISP_CLB_HELD_GRP207 : (Group 207 pm_disp_clb) CLB Hold: Any Reason event:0X0CF1 counters:1 um:zero minimum:1000 name:PM_DISP_CLB_HELD_SB_GRP207 : (Group 207 pm_disp_clb) Dispatch/CLB Hold: Scoreboard event:0X0CF2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP207 : (Group 207 pm_disp_clb) Processor Cycles event:0X0CF3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP207 : (Group 207 pm_disp_clb) Number of PowerPC Instructions that completed. event:0X0CF4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP207 : (Group 207 pm_disp_clb) Number of run instructions completed. event:0X0CF5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP207 : (Group 207 pm_disp_clb) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 208 pm_dpu, DPU Events event:0X0D00 counters:0 um:zero minimum:10000 name:PM_CYC_GRP208 : (Group 208 pm_dpu) Processor Cycles event:0X0D01 counters:1 um:zero minimum:1000 name:PM_DPU_HELD_POWER_GRP208 : (Group 208 pm_dpu) Cycles that Instruction Dispatch was held due to power management. More than one hold condition can exist at the same time event:0X0D02 counters:2 um:zero minimum:1000 name:PM_DISP_WT_GRP208 : (Group 208 pm_dpu) Dispatched Starved (not held, nothing to dispatch) event:0X0D03 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP208 : (Group 208 pm_dpu) Number of PowerPC Instructions that completed. event:0X0D04 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP208 : (Group 208 pm_dpu) Number of run instructions completed. event:0X0D05 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP208 : (Group 208 pm_dpu) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 209 pm_cpu_util, Basic CPU utilization event:0X0D10 counters:0 um:zero minimum:1000 name:PM_RUN_SPURR_GRP209 : (Group 209 pm_cpu_util) Run SPURR event:0X0D11 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP209 : (Group 209 pm_cpu_util) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0D12 counters:2 um:zero minimum:10000 name:PM_CYC_GRP209 : (Group 209 pm_cpu_util) Processor Cycles event:0X0D13 counters:3 um:zero minimum:1000 name:PM_RUN_PURR_GRP209 : (Group 209 pm_cpu_util) The Processor Utilization of Resources Register was incremented while the run latch was set. The PURR registers will be incremented roughly in the ratio in which the instructions are dispatched from the two threads. event:0X0D14 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP209 : (Group 209 pm_cpu_util) Number of run instructions completed. event:0X0D15 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP209 : (Group 209 pm_cpu_util) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 210 pm_overflow1, Overflow events event:0X0D20 counters:0 um:zero minimum:1000 name:PM_PMC4_OVERFLOW_GRP210 : (Group 210 pm_overflow1) Overflows from PMC4 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D21 counters:1 um:zero minimum:1000 name:PM_PMC1_OVERFLOW_GRP210 : (Group 210 pm_overflow1) Overflows from PMC1 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D22 counters:2 um:zero minimum:1000 name:PM_PMC2_OVERFLOW_GRP210 : (Group 210 pm_overflow1) Overflows from PMC2 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D23 counters:3 um:zero minimum:1000 name:PM_PMC3_OVERFLOW_GRP210 : (Group 210 pm_overflow1) Overflows from PMC3 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D24 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP210 : (Group 210 pm_overflow1) Number of run instructions completed. event:0X0D25 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP210 : (Group 210 pm_overflow1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 211 pm_overflow2, Overflow events event:0X0D30 counters:0 um:zero minimum:1000 name:PM_PMC5_OVERFLOW_GRP211 : (Group 211 pm_overflow2) Overflows from PMC5 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D31 counters:1 um:zero minimum:1000 name:PM_PMC1_OVERFLOW_GRP211 : (Group 211 pm_overflow2) Overflows from PMC1 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D32 counters:2 um:zero minimum:1000 name:PM_PMC6_OVERFLOW_GRP211 : (Group 211 pm_overflow2) Overflows from PMC6 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D33 counters:3 um:zero minimum:1000 name:PM_PMC3_OVERFLOW_GRP211 : (Group 211 pm_overflow2) Overflows from PMC3 are counted. This effectively widens the PMC. The Overflow from the original PMC will not trigger an exception even if the PMU is configured to generate exceptions on overflow. event:0X0D34 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP211 : (Group 211 pm_overflow2) Number of run instructions completed. event:0X0D35 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP211 : (Group 211 pm_overflow2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 212 pm_rewind, Rewind events event:0X0D40 counters:0 um:zero minimum:1000 name:PM_PMC4_REWIND_GRP212 : (Group 212 pm_rewind) PMC4 was counting speculatively. The speculative condition was not met and the counter was restored to its previous value. event:0X0D41 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP212 : (Group 212 pm_rewind) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0D42 counters:2 um:zero minimum:1000 name:PM_PMC2_REWIND_GRP212 : (Group 212 pm_rewind) PMC2 was counting speculatively. The speculative condition was not met and the counter was restored to its previous value. event:0X0D43 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP212 : (Group 212 pm_rewind) Number of PowerPC Instructions that completed. event:0X0D44 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP212 : (Group 212 pm_rewind) Number of run instructions completed. event:0X0D45 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP212 : (Group 212 pm_rewind) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 213 pm_saved, Saved Events event:0X0D50 counters:0 um:zero minimum:1000 name:PM_PMC2_SAVED_GRP213 : (Group 213 pm_saved) PMC2 was counting speculatively. The speculative condition was met and the counter value was committed by copying it to the backup register. event:0X0D51 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP213 : (Group 213 pm_saved) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0D52 counters:2 um:zero minimum:1000 name:PM_PMC4_SAVED_GRP213 : (Group 213 pm_saved) PMC4 was counting speculatively. The speculative condition was met and the counter value was committed by copying it to the backup register. event:0X0D53 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP213 : (Group 213 pm_saved) Number of PowerPC Instructions that completed. event:0X0D54 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP213 : (Group 213 pm_saved) Number of run instructions completed. event:0X0D55 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP213 : (Group 213 pm_saved) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 214 pm_tlbie, TLBIE Events event:0X0D60 counters:0 um:zero minimum:1000 name:PM_FLUSH_DISP_TLBIE_GRP214 : (Group 214 pm_tlbie) Dispatch Flush: TLBIE event:0X0D61 counters:1 um:zero minimum:1000 name:PM_DISP_CLB_HELD_TLBIE_GRP214 : (Group 214 pm_tlbie) Dispatch Hold: Due to TLBIE event:0X0D62 counters:2 um:zero minimum:1000 name:PM_SNOOP_TLBIE_GRP214 : (Group 214 pm_tlbie) A tlbie was snooped from another processor. event:0X0D63 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP214 : (Group 214 pm_tlbie) Number of PowerPC Instructions that completed. event:0X0D64 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP214 : (Group 214 pm_tlbie) Number of run instructions completed. event:0X0D65 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP214 : (Group 214 pm_tlbie) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 215 pm_id_miss_erat_l1, Instruction/Data miss from ERAT/L1 cache event:0X0D70 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_GRP215 : (Group 215 pm_id_miss_erat_l1) A translation request missed the Instruction Effective to Real Address Translation (ERAT) table event:0X0D71 counters:1 um:zero minimum:1000 name:PM_L1_ICACHE_MISS_GRP215 : (Group 215 pm_id_miss_erat_l1) An instruction fetch request missed the L1 cache. event:0X0D72 counters:2 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP215 : (Group 215 pm_id_miss_erat_l1) A store missed the dcache. Combined Unit 0 + 1. event:0X0D73 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP215 : (Group 215 pm_id_miss_erat_l1) Load references that miss the Level 1 Data cache. Combined unit 0 + 1. event:0X0D74 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP215 : (Group 215 pm_id_miss_erat_l1) Number of run instructions completed. event:0X0D75 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP215 : (Group 215 pm_id_miss_erat_l1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 216 pm_id_miss_erat_tlab, Instruction/Data miss from ERAT/TLB event:0X0D80 counters:0 um:zero minimum:10000 name:PM_CYC_GRP216 : (Group 216 pm_id_miss_erat_tlab) Processor Cycles event:0X0D81 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP216 : (Group 216 pm_id_miss_erat_tlab) Total D-ERAT Misses. Requests that miss the Derat are rejected and retried until the request hits in the Erat. This may result in multiple erat misses for the same instruction. Combined Unit 0 + 1. event:0X0D82 counters:2 um:zero minimum:1000 name:PM_DTLB_MISS_GRP216 : (Group 216 pm_id_miss_erat_tlab) Data TLB misses, all page sizes. event:0X0D83 counters:3 um:zero minimum:1000 name:PM_ITLB_MISS_GRP216 : (Group 216 pm_id_miss_erat_tlab) A TLB miss for an Instruction Fetch has occurred event:0X0D84 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP216 : (Group 216 pm_id_miss_erat_tlab) Number of run instructions completed. event:0X0D85 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP216 : (Group 216 pm_id_miss_erat_tlab) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 217 pm_compat_utilization1, Basic CPU utilization event:0X0D90 counters:0 um:zero minimum:1000 name:PM_ANY_THRD_RUN_CYC_GRP217 : (Group 217 pm_compat_utilization1) One of threads in run_cycles event:0X0D91 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP217 : (Group 217 pm_compat_utilization1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0D92 counters:2 um:zero minimum:10000 name:PM_CYC_GRP217 : (Group 217 pm_compat_utilization1) Processor Cycles event:0X0D93 counters:3 um:zero minimum:1000 name:PM_RUN_PURR_GRP217 : (Group 217 pm_compat_utilization1) The Processor Utilization of Resources Register was incremented while the run latch was set. The PURR registers will be incremented roughly in the ratio in which the instructions are dispatched from the two threads. event:0X0D94 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP217 : (Group 217 pm_compat_utilization1) Number of run instructions completed. event:0X0D95 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP217 : (Group 217 pm_compat_utilization1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 218 pm_compat_utilization2, CPI and utilization data event:0X0DA0 counters:0 um:zero minimum:1000 name:PM_FLOP_GRP218 : (Group 218 pm_compat_utilization2) A floating point operation has completed event:0X0DA1 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP218 : (Group 218 pm_compat_utilization2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0DA2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP218 : (Group 218 pm_compat_utilization2) Processor Cycles event:0X0DA3 counters:3 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP218 : (Group 218 pm_compat_utilization2) Number of run instructions completed. event:0X0DA4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP218 : (Group 218 pm_compat_utilization2) Number of run instructions completed. event:0X0DA5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP218 : (Group 218 pm_compat_utilization2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 219 pm_compat_cpi_1plus_ppc, Misc CPI and utilization data event:0X0DB0 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP219 : (Group 219 pm_compat_cpi_1plus_ppc) A group containing at least one PPC instruction completed. For microcoded instructions that span multiple groups, this will only occur once. event:0X0DB1 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP219 : (Group 219 pm_compat_cpi_1plus_ppc) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X0DB2 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP219 : (Group 219 pm_compat_cpi_1plus_ppc) Number of PowerPC instructions successfully dispatched. event:0X0DB3 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP219 : (Group 219 pm_compat_cpi_1plus_ppc) A group containing at least one PPC instruction was dispatched. For microcoded instructions that span multiple groups, this will only occur once. event:0X0DB4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP219 : (Group 219 pm_compat_cpi_1plus_ppc) Number of run instructions completed. event:0X0DB5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP219 : (Group 219 pm_compat_cpi_1plus_ppc) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 220 pm_compat_l1_dcache_load_store_miss, L1 D-Cache load/store miss event:0X0DC0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP220 : (Group 220 pm_compat_l1_dcache_load_store_miss) Number of PowerPC Instructions that completed. event:0X0DC1 counters:1 um:zero minimum:1000 name:PM_ST_FIN_GRP220 : (Group 220 pm_compat_l1_dcache_load_store_miss) Store requests sent to the nest. event:0X0DC2 counters:2 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP220 : (Group 220 pm_compat_l1_dcache_load_store_miss) A store missed the dcache. Combined Unit 0 + 1. event:0X0DC3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP220 : (Group 220 pm_compat_l1_dcache_load_store_miss) Load references that miss the Level 1 Data cache. Combined unit 0 + 1. event:0X0DC4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP220 : (Group 220 pm_compat_l1_dcache_load_store_miss) Number of run instructions completed. event:0X0DC5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP220 : (Group 220 pm_compat_l1_dcache_load_store_miss) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 221 pm_compat_l1_cache_load, L1 Cache loads event:0X0DD0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP221 : (Group 221 pm_compat_l1_cache_load) Number of PowerPC Instructions that completed. event:0X0DD1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP221 : (Group 221 pm_compat_l1_cache_load) The processor's Data Cache was reloaded but not from the local L2. event:0X0DD2 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP221 : (Group 221 pm_compat_l1_cache_load) The data source information is valid,the data cache has been reloaded. Prior to POWER5+ this included data cache reloads due to prefetch activity. With POWER5+ this now only includes reloads due to demand loads. event:0X0DD3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP221 : (Group 221 pm_compat_l1_cache_load) Load references that miss the Level 1 Data cache. Combined unit 0 + 1. event:0X0DD4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP221 : (Group 221 pm_compat_l1_cache_load) Number of run instructions completed. event:0X0DD5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP221 : (Group 221 pm_compat_l1_cache_load) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 222 pm_compat_instruction_directory, Instruction Directory event:0X0DE0 counters:0 um:zero minimum:1000 name:PM_IERAT_MISS_GRP222 : (Group 222 pm_compat_instruction_directory) A translation request missed the Instruction Effective to Real Address Translation (ERAT) table event:0X0DE1 counters:1 um:zero minimum:1000 name:PM_L1_ICACHE_MISS_GRP222 : (Group 222 pm_compat_instruction_directory) An instruction fetch request missed the L1 cache. event:0X0DE2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP222 : (Group 222 pm_compat_instruction_directory) Number of PowerPC Instructions that completed. event:0X0DE3 counters:3 um:zero minimum:1000 name:PM_ITLB_MISS_GRP222 : (Group 222 pm_compat_instruction_directory) A TLB miss for an Instruction Fetch has occurred event:0X0DE4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP222 : (Group 222 pm_compat_instruction_directory) Number of run instructions completed. event:0X0DE5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP222 : (Group 222 pm_compat_instruction_directory) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 223 pm_compat_suspend, Suspend Events event:0X0DF0 counters:0 um:zero minimum:1000 name:PM_SUSPENDED_GRP223 : (Group 223 pm_compat_suspend) The counter is suspended (does not count) event:0X0DF1 counters:1 um:zero minimum:1000 name:PM_SUSPENDED_GRP223 : (Group 223 pm_compat_suspend) The counter is suspended (does not count) event:0X0DF2 counters:2 um:zero minimum:1000 name:PM_SUSPENDED_GRP223 : (Group 223 pm_compat_suspend) The counter is suspended (does not count) event:0X0DF3 counters:3 um:zero minimum:1000 name:PM_SUSPENDED_GRP223 : (Group 223 pm_compat_suspend) The counter is suspended (does not count) event:0X0DF4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP223 : (Group 223 pm_compat_suspend) Number of run instructions completed. event:0X0DF5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP223 : (Group 223 pm_compat_suspend) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 224 pm_compat_misc_events1, Misc Events event:0X0E00 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP224 : (Group 224 pm_compat_misc_events1) Number of PowerPC Instructions that completed. event:0X0E01 counters:1 um:zero minimum:1000 name:PM_EXT_INT_GRP224 : (Group 224 pm_compat_misc_events1) An interrupt due to an external exception occurred event:0X0E02 counters:2 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP224 : (Group 224 pm_compat_misc_events1) When the selected time base bit (as specified in MMCR0[TBSEL])transitions from 0 to 1 event:0X0E03 counters:3 um:zero minimum:10000 name:PM_CYC_GRP224 : (Group 224 pm_compat_misc_events1) Processor Cycles event:0X0E04 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP224 : (Group 224 pm_compat_misc_events1) Number of run instructions completed. event:0X0E05 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP224 : (Group 224 pm_compat_misc_events1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 225 pm_compat_misc_events2, Misc Events event:0X0E10 counters:0 um:zero minimum:1000 name:PM_INST_IMC_MATCH_CMPL_GRP225 : (Group 225 pm_compat_misc_events2) Number of instructions resulting from the marked instructions expansion that completed. event:0X0E11 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP225 : (Group 225 pm_compat_misc_events2) Number of PowerPC instructions successfully dispatched. event:0X0E12 counters:2 um:zero minimum:1000 name:PM_THRD_CONC_RUN_INST_GRP225 : (Group 225 pm_compat_misc_events2) Instructions completed by this thread when both threads had their run latches set. event:0X0E13 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP225 : (Group 225 pm_compat_misc_events2) Flushes occurred including LSU and Branch flushes. event:0X0E14 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP225 : (Group 225 pm_compat_misc_events2) Number of run instructions completed. event:0X0E15 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP225 : (Group 225 pm_compat_misc_events2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 226 pm_compat_misc_events3, Misc Events event:0X0E20 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP226 : (Group 226 pm_compat_misc_events3) Cycles when the Global Completion Table has no slots from this thread. event:0X0E21 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP226 : (Group 226 pm_compat_misc_events3) Number of PowerPC instructions successfully dispatched. event:0X0E22 counters:2 um:zero minimum:10000 name:PM_CYC_GRP226 : (Group 226 pm_compat_misc_events3) Processor Cycles event:0X0E23 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_GRP226 : (Group 226 pm_compat_misc_events3) A branch instruction was incorrectly predicted. This could have been a target prediction, a condition prediction, or both event:0X0E24 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP226 : (Group 226 pm_compat_misc_events3) Number of run instructions completed. event:0X0E25 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP226 : (Group 226 pm_compat_misc_events3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 227 pm_mrk_br, Marked Branch events event:0X0E30 counters:0 um:zero minimum:1000 name:PM_MRK_BR_TAKEN_GRP227 : (Group 227 pm_mrk_br) A marked branch was taken event:0X0E31 counters:1 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP227 : (Group 227 pm_mrk_br) Marked L1 D cache load misses event:0X0E32 counters:2 um:zero minimum:1000 name:PM_MRK_BR_MPRED_GRP227 : (Group 227 pm_mrk_br) A marked branch was mispredicted event:0X0E33 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP227 : (Group 227 pm_mrk_br) Number of PowerPC Instructions that completed. event:0X0E34 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP227 : (Group 227 pm_mrk_br) Number of run instructions completed. event:0X0E35 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP227 : (Group 227 pm_mrk_br) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 228 pm_mrk_dsource1, Marked data sources event:0X0E40 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DMEM_GRP228 : (Group 228 pm_mrk_dsource1) The processor's Data Cache was reloaded with data from memory attached to a distant module due to a marked load. event:0X0E41 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DMEM_CYC_GRP228 : (Group 228 pm_mrk_dsource1) Marked ld latency Data Source 1110 (Distant Memory) event:0X0E42 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP228 : (Group 228 pm_mrk_dsource1) Number of PowerPC Instructions that completed. event:0X0E43 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP228 : (Group 228 pm_mrk_dsource1) DL1 was reloaded from beyond L2 due to a marked demand load. event:0X0E44 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP228 : (Group 228 pm_mrk_dsource1) Number of run instructions completed. event:0X0E45 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP228 : (Group 228 pm_mrk_dsource1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 229 pm_mrk_dsource2, Marked data sources event:0X0E50 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_EXPOSED_CYC_GRP229 : (Group 229 pm_mrk_dsource2) Marked Load exposed Miss event:0X0E51 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP229 : (Group 229 pm_mrk_dsource2) Number of PowerPC Instructions that completed. event:0X0E52 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L21_MOD_GRP229 : (Group 229 pm_mrk_dsource2) Marked data loaded from another L2 on same chip modified event:0X0E53 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L21_MOD_CYC_GRP229 : (Group 229 pm_mrk_dsource2) Marked ld latency Data source 0101 (L2.1 M same chip) event:0X0E54 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP229 : (Group 229 pm_mrk_dsource2) Number of run instructions completed. event:0X0E55 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP229 : (Group 229 pm_mrk_dsource2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 230 pm_mrk_dsource3, Marked data sources event:0X0E60 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP230 : (Group 230 pm_mrk_dsource3) The processor's Data Cache was reloaded from the local L3 due to a marked load. event:0X0E61 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3MISS_GRP230 : (Group 230 pm_mrk_dsource3) DL1 was reloaded from beyond L3 due to a marked load. event:0X0E62 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP230 : (Group 230 pm_mrk_dsource3) Number of PowerPC Instructions that completed. event:0X0E63 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_CYC_GRP230 : (Group 230 pm_mrk_dsource3) Cycles a marked load waited for data from this level of the storage system. Counting begins when a marked load misses the data cache and ends when the data is reloaded into the data cache. To calculate average latency divide this count by the number of marked misses to the same level. event:0X0E64 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP230 : (Group 230 pm_mrk_dsource3) Number of run instructions completed. event:0X0E65 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP230 : (Group 230 pm_mrk_dsource3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 231 pm_mrk_dsource4, Marked data sources event:0X0E70 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP231 : (Group 231 pm_mrk_dsource4) Number of PowerPC Instructions that completed. event:0X0E71 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_CYC_GRP231 : (Group 231 pm_mrk_dsource4) Cycles a marked load waited for data from this level of the storage system. Counting begins when a marked load misses the data cache and ends when the data is reloaded into the data cache. To calculate average latency divide this count by the number of marked misses to the same level. event:0X0E72 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_GRP231 : (Group 231 pm_mrk_dsource4) The processor's Data Cache was reloaded due to a marked load from memory attached to the same module this processor is located on. event:0X0E73 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP231 : (Group 231 pm_mrk_dsource4) The processor's Data Cache was reloaded from memory attached to the same module this processor is located on. event:0X0E74 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP231 : (Group 231 pm_mrk_dsource4) Number of run instructions completed. event:0X0E75 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP231 : (Group 231 pm_mrk_dsource4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 232 pm_mrk_dsource5, Marked data sources event:0X0E80 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L31_MOD_GRP232 : (Group 232 pm_mrk_dsource5) Marked data loaded from another L3 on same chip modified event:0X0E81 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP232 : (Group 232 pm_mrk_dsource5) Number of PowerPC Instructions that completed. event:0X0E82 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP232 : (Group 232 pm_mrk_dsource5) One of the execution units finished a marked instruction. Instructions that finish may not necessary complete event:0X0E83 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L31_MOD_CYC_GRP232 : (Group 232 pm_mrk_dsource5) Marked ld latency Data source 0111 (L3.1 M same chip) event:0X0E84 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP232 : (Group 232 pm_mrk_dsource5) Number of run instructions completed. event:0X0E85 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP232 : (Group 232 pm_mrk_dsource5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 233 pm_mrk_dsource6, Marked data sources event:0X0E90 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_EXPOSED_CYC_COUNT_GRP233 : (Group 233 pm_mrk_dsource6) Marked Load exposed Miss (use edge detect to count #) event:0X0E91 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L21_SHR_CYC_GRP233 : (Group 233 pm_mrk_dsource6) Marked load latency Data source 0100 (L2.1 S) event:0X0E92 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L21_SHR_GRP233 : (Group 233 pm_mrk_dsource6) Marked data loaded from another L2 on same chip shared event:0X0E93 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP233 : (Group 233 pm_mrk_dsource6) Number of PowerPC Instructions that completed. event:0X0E94 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP233 : (Group 233 pm_mrk_dsource6) Number of run instructions completed. event:0X0E95 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP233 : (Group 233 pm_mrk_dsource6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 234 pm_mrk_dsource7, Marked data sources event:0X0EA0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP234 : (Group 234 pm_mrk_dsource7) The processor's Data Cache was reloaded from the local L2 due to a marked load. event:0X0EA1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_CYC_GRP234 : (Group 234 pm_mrk_dsource7) Cycles a marked load waited for data from this level of the storage system. Counting begins when a marked load misses the data cache and ends when the data is reloaded into the data cache. To calculate average latency divide this count by the number of marked misses to the same level. event:0X0EA2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP234 : (Group 234 pm_mrk_dsource7) Number of PowerPC Instructions that completed. event:0X0EA3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP234 : (Group 234 pm_mrk_dsource7) DL1 was reloaded from beyond L2 due to a marked demand load. event:0X0EA4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP234 : (Group 234 pm_mrk_dsource7) Number of run instructions completed. event:0X0EA5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP234 : (Group 234 pm_mrk_dsource7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 235 pm_mrk_dsource8, Marked data sources event:0X0EB0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_MOD_GRP235 : (Group 235 pm_mrk_dsource8) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a remote module due to a marked load. event:0X0EB1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3MISS_GRP235 : (Group 235 pm_mrk_dsource8) DL1 was reloaded from beyond L3 due to a marked load. event:0X0EB2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP235 : (Group 235 pm_mrk_dsource8) Number of PowerPC Instructions that completed. event:0X0EB3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_MOD_CYC_GRP235 : (Group 235 pm_mrk_dsource8) Marked ld latency Data source 1001 (L2.5/L3.5 M same 4 chip node) event:0X0EB4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP235 : (Group 235 pm_mrk_dsource8) Number of run instructions completed. event:0X0EB5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP235 : (Group 235 pm_mrk_dsource8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 236 pm_mrk_dsource9, Marked data sources event:0X0EC0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP236 : (Group 236 pm_mrk_dsource9) Number of PowerPC Instructions that completed. event:0X0EC1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DL2L3_SHR_CYC_GRP236 : (Group 236 pm_mrk_dsource9) Marked ld latency Data Source 1010 (Distant L2.75/L3.75 S) event:0X0EC2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DL2L3_SHR_GRP236 : (Group 236 pm_mrk_dsource9) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a distant module due to a marked load. event:0X0EC3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP236 : (Group 236 pm_mrk_dsource9) DL1 was reloaded from beyond L2 due to a marked demand load. event:0X0EC4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP236 : (Group 236 pm_mrk_dsource9) Number of run instructions completed. event:0X0EC5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP236 : (Group 236 pm_mrk_dsource9) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 237 pm_mrk_dsource10, Marked data sources event:0X0ED0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_SHR_GRP237 : (Group 237 pm_mrk_dsource10) The processor's Data Cache was reloaded with shared (T or SL) data from an L2 or L3 on a remote module due to a marked load event:0X0ED1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RL2L3_SHR_CYC_GRP237 : (Group 237 pm_mrk_dsource10) Marked load latency Data Source 1000 (Remote L2.5/L3.5 S) event:0X0ED2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP237 : (Group 237 pm_mrk_dsource10) The processor's Data Cache was reloaded from memory attached to a different module than this processor is located on. event:0X0ED3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP237 : (Group 237 pm_mrk_dsource10) Number of PowerPC Instructions that completed. event:0X0ED4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP237 : (Group 237 pm_mrk_dsource10) Number of run instructions completed. event:0X0ED5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP237 : (Group 237 pm_mrk_dsource10) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 238 pm_mrk_dsource11, Marked data sources event:0X0EE0 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_EXPOSED_CYC_GRP238 : (Group 238 pm_mrk_dsource11) Marked Load exposed Miss event:0X0EE1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP238 : (Group 238 pm_mrk_dsource11) Number of PowerPC Instructions that completed. event:0X0EE2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_GRP238 : (Group 238 pm_mrk_dsource11) The processor's Data Cache was reloaded due to a marked load from memory attached to a different module than this processor is located on. event:0X0EE3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_CYC_GRP238 : (Group 238 pm_mrk_dsource11) Cycles a marked load waited for data from this level of the storage system. Counting begins when a marked load misses the data cache and ends when the data is reloaded into the data cache. To calculate average latency divide this count by the number of marked misses to the same level. event:0X0EE4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP238 : (Group 238 pm_mrk_dsource11) Number of run instructions completed. event:0X0EE5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP238 : (Group 238 pm_mrk_dsource11) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 239 pm_mrk_dsource12, Marked data sources event:0X0EF0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L31_SHR_GRP239 : (Group 239 pm_mrk_dsource12) Marked data loaded from another L3 on same chip shared event:0X0EF1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L31_SHR_CYC_GRP239 : (Group 239 pm_mrk_dsource12) Marked load latency Data source 0110 (L3.1 S) event:0X0EF2 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP239 : (Group 239 pm_mrk_dsource12) One of the execution units finished a marked instruction. Instructions that finish may not necessary complete event:0X0EF3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP239 : (Group 239 pm_mrk_dsource12) Number of PowerPC Instructions that completed. event:0X0EF4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP239 : (Group 239 pm_mrk_dsource12) Number of run instructions completed. event:0X0EF5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP239 : (Group 239 pm_mrk_dsource12) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 240 pm_mrk_dsource13, Marked data sources event:0X0F00 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_EXPOSED_CYC_COUNT_GRP240 : (Group 240 pm_mrk_dsource13) Marked Load exposed Miss (use edge detect to count #) event:0X0F01 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP240 : (Group 240 pm_mrk_dsource13) Number of PowerPC Instructions that completed. event:0X0F02 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DL2L3_MOD_GRP240 : (Group 240 pm_mrk_dsource13) The processor's Data Cache was reloaded with modified (M) data from an L2 or L3 on a distant module due to a marked load. event:0X0F03 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_DL2L3_MOD_CYC_GRP240 : (Group 240 pm_mrk_dsource13) Marked ld latency Data source 1011 (L2.75/L3.75 M different 4 chip node) event:0X0F04 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP240 : (Group 240 pm_mrk_dsource13) Number of run instructions completed. event:0X0F05 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP240 : (Group 240 pm_mrk_dsource13) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 241 pm_mrk_lsu_flush1, Marked LSU Flush event:0X0F10 counters:0 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_ULD_GRP241 : (Group 241 pm_mrk_lsu_flush1) A marked load was flushed because it was unaligned (crossed a 64byte boundary, or 32 byte if it missed the L1) event:0X0F11 counters:1 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_UST_GRP241 : (Group 241 pm_mrk_lsu_flush1) A marked store was flushed because it was unaligned event:0X0F12 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP241 : (Group 241 pm_mrk_lsu_flush1) Number of PowerPC Instructions that completed. event:0X0F13 counters:3 um:zero minimum:10000 name:PM_CYC_GRP241 : (Group 241 pm_mrk_lsu_flush1) Processor Cycles event:0X0F14 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP241 : (Group 241 pm_mrk_lsu_flush1) Number of run instructions completed. event:0X0F15 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP241 : (Group 241 pm_mrk_lsu_flush1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 242 pm_mrk_lsu_flush2, Marked LSU Flush event:0X0F20 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP242 : (Group 242 pm_mrk_lsu_flush2) Number of PowerPC Instructions that completed. event:0X0F21 counters:1 um:zero minimum:10000 name:PM_CYC_GRP242 : (Group 242 pm_mrk_lsu_flush2) Processor Cycles event:0X0F22 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP242 : (Group 242 pm_mrk_lsu_flush2) Load Hit Load or Store Hit Load flush. A marked load was flushed because it executed before an older store and they had overlapping data OR two loads executed out of order and they have byte overlap and there was a snoop in between to an overlapped byte. event:0X0F23 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP242 : (Group 242 pm_mrk_lsu_flush2) Load Hit Store flush. A marked load was flushed because it hits (overlaps) an older store that is already in the SRQ or in the same group. If the real addresses match but the effective addresses do not, an alias condition exists that prevents store forwarding. If the load and store are in the same group the load must be flushed to separate the two instructions. event:0X0F24 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP242 : (Group 242 pm_mrk_lsu_flush2) Number of run instructions completed. event:0X0F25 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP242 : (Group 242 pm_mrk_lsu_flush2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 243 pm_mrk_rejects, Marked rejects event:0X0F30 counters:0 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_LHS_GRP243 : (Group 243 pm_mrk_rejects) The Load Store Unit rejected a marked load instruction that had an address overlap with an older store in the store queue. The store must be committed and de-allocated from the Store Queue before the load can execute successfully event:0X0F31 counters:1 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_GRP243 : (Group 243 pm_mrk_rejects) Marked flush initiated by LSU event:0X0F32 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP243 : (Group 243 pm_mrk_rejects) Number of PowerPC Instructions that completed. event:0X0F33 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_GRP243 : (Group 243 pm_mrk_rejects) LSU marked reject (up to 2 per cycle) event:0X0F34 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP243 : (Group 243 pm_mrk_rejects) Number of run instructions completed. event:0X0F35 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP243 : (Group 243 pm_mrk_rejects) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 244 pm_mrk_inst, Marked instruction events event:0X0F40 counters:0 um:zero minimum:1000 name:PM_MRK_INST_ISSUED_GRP244 : (Group 244 pm_mrk_inst) A marked instruction was issued to an execution unit. event:0X0F41 counters:1 um:zero minimum:1000 name:PM_MRK_INST_DISP_GRP244 : (Group 244 pm_mrk_inst) A marked instruction was dispatched event:0X0F42 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP244 : (Group 244 pm_mrk_inst) One of the execution units finished a marked instruction. Instructions that finish may not necessary complete event:0X0F43 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP244 : (Group 244 pm_mrk_inst) Number of PowerPC Instructions that completed. event:0X0F44 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP244 : (Group 244 pm_mrk_inst) Number of run instructions completed. event:0X0F45 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP244 : (Group 244 pm_mrk_inst) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 245 pm_mrk_st, Marked stores events event:0X0F50 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP245 : (Group 245 pm_mrk_st) A sampled store has completed (data home) event:0X0F51 counters:1 um:zero minimum:1000 name:PM_MRK_ST_NEST_GRP245 : (Group 245 pm_mrk_st) A sampled store has been sent to the memory subsystem event:0X0F52 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP245 : (Group 245 pm_mrk_st) A marked store previously sent to the memory subsystem completed (data home) after requiring intervention event:0X0F53 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP245 : (Group 245 pm_mrk_st) Number of PowerPC Instructions that completed. event:0X0F54 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP245 : (Group 245 pm_mrk_st) Number of run instructions completed. event:0X0F55 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP245 : (Group 245 pm_mrk_st) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 246 pm_mrk_dtlb_miss1, Marked Data TLB Miss event:0X0F60 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP246 : (Group 246 pm_mrk_dtlb_miss1) Number of PowerPC Instructions that completed. event:0X0F61 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP246 : (Group 246 pm_mrk_dtlb_miss1) Data TLB references to 4KB pages by a marked instruction that missed the TLB. Page size is determined at TLB reload time. event:0X0F62 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_64K_GRP246 : (Group 246 pm_mrk_dtlb_miss1) Data TLB references to 64KB pages by a marked instruction that missed the TLB. Page size is determined at TLB reload time. event:0X0F63 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16M_GRP246 : (Group 246 pm_mrk_dtlb_miss1) Data TLB references to 16M pages by a marked instruction that missed the TLB. Page size is determined at TLB reload time. event:0X0F64 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP246 : (Group 246 pm_mrk_dtlb_miss1) Number of run instructions completed. event:0X0F65 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP246 : (Group 246 pm_mrk_dtlb_miss1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 247 pm_mrk_dtlb_miss2, Marked Data TLB Miss event:0X0F70 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16G_GRP247 : (Group 247 pm_mrk_dtlb_miss2) Data TLB references to 16GB pages by a marked instruction that missed the TLB. Page size is determined at TLB reload time. event:0X0F71 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP247 : (Group 247 pm_mrk_dtlb_miss2) Data TLB references to 4KB pages by a marked instruction that missed the TLB. Page size is determined at TLB reload time. event:0X0F72 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_64K_GRP247 : (Group 247 pm_mrk_dtlb_miss2) Data TLB references to 64KB pages by a marked instruction that missed the TLB. Page size is determined at TLB reload time. event:0X0F73 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP247 : (Group 247 pm_mrk_dtlb_miss2) Number of PowerPC Instructions that completed. event:0X0F74 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP247 : (Group 247 pm_mrk_dtlb_miss2) Number of run instructions completed. event:0X0F75 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP247 : (Group 247 pm_mrk_dtlb_miss2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 248 pm_mrk_derat_miss1, Marked DERAT Miss events event:0X0F80 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP248 : (Group 248 pm_mrk_derat_miss1) Number of PowerPC Instructions that completed. event:0X0F81 counters:1 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_64K_GRP248 : (Group 248 pm_mrk_derat_miss1) A marked data request (load or store) missed the ERAT for 64K page and resulted in an ERAT reload. event:0X0F82 counters:2 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_16M_GRP248 : (Group 248 pm_mrk_derat_miss1) A marked data request (load or store) missed the ERAT for 16M page and resulted in an ERAT reload. event:0X0F83 counters:3 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_16G_GRP248 : (Group 248 pm_mrk_derat_miss1) A marked data request (load or store) missed the ERAT for 16G page and resulted in an ERAT reload. event:0X0F84 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP248 : (Group 248 pm_mrk_derat_miss1) Number of run instructions completed. event:0X0F85 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP248 : (Group 248 pm_mrk_derat_miss1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 249 pm_mrk_derat_miss2, Marked DERAT Miss events event:0X0F90 counters:0 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_4K_GRP249 : (Group 249 pm_mrk_derat_miss2) A marked data request (load or store) missed the ERAT for 4K page and resulted in an ERAT reload. event:0X0F91 counters:1 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_64K_GRP249 : (Group 249 pm_mrk_derat_miss2) A marked data request (load or store) missed the ERAT for 64K page and resulted in an ERAT reload. event:0X0F92 counters:2 um:zero minimum:1000 name:PM_MRK_DERAT_MISS_16M_GRP249 : (Group 249 pm_mrk_derat_miss2) A marked data request (load or store) missed the ERAT for 16M page and resulted in an ERAT reload. event:0X0F93 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP249 : (Group 249 pm_mrk_derat_miss2) Number of PowerPC Instructions that completed. event:0X0F94 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP249 : (Group 249 pm_mrk_derat_miss2) Number of run instructions completed. event:0X0F95 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP249 : (Group 249 pm_mrk_derat_miss2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 250 pm_mrk_misc_miss, marked Miss Events event:0X0FA0 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_EXPOSED_CYC_GRP250 : (Group 250 pm_mrk_misc_miss) Marked Load exposed Miss event:0X0FA1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP250 : (Group 250 pm_mrk_misc_miss) Number of PowerPC Instructions that completed. event:0X0FA2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_DERAT_MISS_GRP250 : (Group 250 pm_mrk_misc_miss) Marked DERAT Miss event:0X0FA3 counters:3 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_CYC_GRP250 : (Group 250 pm_mrk_misc_miss) L1 data load miss cycles event:0X0FA4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP250 : (Group 250 pm_mrk_misc_miss) Number of run instructions completed. event:0X0FA5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP250 : (Group 250 pm_mrk_misc_miss) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 251 pm_mrk_pteg1, Marked PTEG event:0X0FB0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP251 : (Group 251 pm_mrk_pteg1) Number of PowerPC Instructions that completed. event:0X0FB1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_DMEM_GRP251 : (Group 251 pm_mrk_pteg1) A Page Table Entry was loaded into the ERAT from memory attached to a different module than this processor is located on due to a marked load or store. event:0X0FB2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L21_MOD_GRP251 : (Group 251 pm_mrk_pteg1) Marked PTEG loaded from another L2 on same chip modified event:0X0FB3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L21_SHR_GRP251 : (Group 251 pm_mrk_pteg1) Marked PTEG loaded from another L2 on same chip shared event:0X0FB4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP251 : (Group 251 pm_mrk_pteg1) Number of run instructions completed. event:0X0FB5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP251 : (Group 251 pm_mrk_pteg1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 252 pm_mrk_pteg2, Marked PTEG event:0X0FC0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L2_GRP252 : (Group 252 pm_mrk_pteg2) A Page Table Entry was loaded into the ERAT from the local L2 due to a marked load or store. event:0X0FC1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_RL2L3_SHR_GRP252 : (Group 252 pm_mrk_pteg2) A Page Table Entry was loaded into the ERAT from memory attached to a different module than this processor is located on due to a marked load or store. event:0X0FC2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_RMEM_GRP252 : (Group 252 pm_mrk_pteg2) A Page Table Entry was loaded into the ERAT. POWER6 does not have a TLB event:0X0FC3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP252 : (Group 252 pm_mrk_pteg2) Number of PowerPC Instructions that completed. event:0X0FC4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP252 : (Group 252 pm_mrk_pteg2) Number of run instructions completed. event:0X0FC5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP252 : (Group 252 pm_mrk_pteg2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 253 pm_mrk_pteg3, Marked PTEG event:0X0FD0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP253 : (Group 253 pm_mrk_pteg3) Number of PowerPC Instructions that completed. event:0X0FD1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L31_SHR_GRP253 : (Group 253 pm_mrk_pteg3) Marked PTEG loaded from another L3 on same chip shared event:0X0FD2 counters:2 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L21_MOD_GRP253 : (Group 253 pm_mrk_pteg3) Marked PTEG loaded from another L2 on same chip modified event:0X0FD3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_DL2L3_MOD_GRP253 : (Group 253 pm_mrk_pteg3) A Page Table Entry was loaded into the ERAT with modified (M) data from an L2 or L3 on a distant module due to a marked load or store. event:0X0FD4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP253 : (Group 253 pm_mrk_pteg3) Number of run instructions completed. event:0X0FD5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP253 : (Group 253 pm_mrk_pteg3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 254 pm_mrk_pteg4, Marked PTEG event:0X0FE0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L31_MOD_GRP254 : (Group 254 pm_mrk_pteg4) Marked PTEG loaded from another L3 on same chip modified event:0X0FE1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L3_GRP254 : (Group 254 pm_mrk_pteg4) A Page Table Entry was loaded into the ERAT from the local L3 due to a marked load or store. event:0X0FE2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP254 : (Group 254 pm_mrk_pteg4) Number of PowerPC Instructions that completed. event:0X0FE3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L2MISS_GRP254 : (Group 254 pm_mrk_pteg4) A Page Table Entry was loaded into the ERAT but not from the local L2 due to a marked load or store. event:0X0FE4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP254 : (Group 254 pm_mrk_pteg4) Number of run instructions completed. event:0X0FE5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP254 : (Group 254 pm_mrk_pteg4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 255 pm_mrk_pteg5, Marked PTEG event:0X0FF0 counters:0 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_RL2L3_MOD_GRP255 : (Group 255 pm_mrk_pteg5) A Page Table Entry was loaded into the ERAT with shared (T or SL) data from an L2 or L3 on a remote module due to a marked load or store. event:0X0FF1 counters:1 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_L3MISS_GRP255 : (Group 255 pm_mrk_pteg5) A Page Table Entry was loaded into the ERAT from beyond the L3 due to a marked load or store event:0X0FF2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP255 : (Group 255 pm_mrk_pteg5) Number of PowerPC Instructions that completed. event:0X0FF3 counters:3 um:zero minimum:1000 name:PM_MRK_PTEG_FROM_LMEM_GRP255 : (Group 255 pm_mrk_pteg5) A Page Table Entry was loaded into the ERAT from memory attached to the same module this processor is located on due to a marked load or store. event:0X0FF4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP255 : (Group 255 pm_mrk_pteg5) Number of run instructions completed. event:0X0FF5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP255 : (Group 255 pm_mrk_pteg5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 256 pm_mrk_misc1, Marked misc events event:0X1000 counters:0 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP256 : (Group 256 pm_mrk_misc1) A marked stcx (stwcx or stdcx) failed event:0X1001 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP256 : (Group 256 pm_mrk_misc1) Number of PowerPC Instructions that completed. event:0X1002 counters:2 um:zero minimum:1000 name:PM_MRK_IFU_FIN_GRP256 : (Group 256 pm_mrk_misc1) The Instruction Fetch Unit finished a marked instruction. event:0X1003 counters:3 um:zero minimum:1000 name:PM_MRK_INST_TIMEO_GRP256 : (Group 256 pm_mrk_misc1) The number of instructions finished since the last progress indicator from a marked instruction exceeded the threshold. The marked instruction was flushed. event:0X1004 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP256 : (Group 256 pm_mrk_misc1) Number of run instructions completed. event:0X1005 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP256 : (Group 256 pm_mrk_misc1) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 257 pm_mrk_misc2, Marked misc events event:0X1010 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP257 : (Group 257 pm_mrk_misc2) Number of PowerPC Instructions that completed. event:0X1011 counters:1 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP257 : (Group 257 pm_mrk_misc2) One of the Fixed Point Units finished a marked instruction. Instructions that finish may not necessary complete. event:0X1012 counters:2 um:zero minimum:1000 name:PM_MRK_IFU_FIN_GRP257 : (Group 257 pm_mrk_misc2) The Instruction Fetch Unit finished a marked instruction. event:0X1013 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP257 : (Group 257 pm_mrk_misc2) One of the Load/Store Units finished a marked instruction. Instructions that finish may not necessary complete event:0X1014 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP257 : (Group 257 pm_mrk_misc2) Number of run instructions completed. event:0X1015 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP257 : (Group 257 pm_mrk_misc2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 258 pm_mrk_misc3, Marked misc events event:0X1020 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP258 : (Group 258 pm_mrk_misc3) Number of PowerPC Instructions that completed. event:0X1021 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP258 : (Group 258 pm_mrk_misc3) The branch unit finished a marked instruction. Instructions that finish may not necessary complete. event:0X1022 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_PARTIAL_CDF_GRP258 : (Group 258 pm_mrk_misc3) A partial cacheline was returned from the L3 for a marked load event:0X1023 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP258 : (Group 258 pm_mrk_misc3) One of the Load/Store Units finished a marked instruction. Instructions that finish may not necessary complete event:0X1024 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP258 : (Group 258 pm_mrk_misc3) Number of run instructions completed. event:0X1025 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP258 : (Group 258 pm_mrk_misc3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 259 pm_mrk_misc4, Marked misc events event:0X1030 counters:0 um:zero minimum:1000 name:PM_MRK_FIN_STALL_CYC_GRP259 : (Group 259 pm_mrk_misc4) Marked instruction Finish Stall cycles (marked finish after NTC) event:0X1031 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP259 : (Group 259 pm_mrk_misc4) Number of PowerPC Instructions that completed. event:0X1032 counters:2 um:zero minimum:1000 name:PM_MRK_VSU_FIN_GRP259 : (Group 259 pm_mrk_misc4) vsu (fpu) marked instr finish event:0X1033 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_IC_MISS_GRP259 : (Group 259 pm_mrk_misc4) A group containing a marked (sampled) instruction experienced an instruction cache miss. event:0X1034 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP259 : (Group 259 pm_mrk_misc4) Number of run instructions completed. event:0X1035 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP259 : (Group 259 pm_mrk_misc4) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 260 pm_mrk_misc5, Marked misc events event:0X1040 counters:0 um:zero minimum:1000 name:PM_MRK_FIN_STALL_CYC_COUNT_GRP260 : (Group 260 pm_mrk_misc5) Marked instruction Finish Stall cycles (marked finish after NTC) (use edge detect to count #) event:0X1041 counters:1 um:zero minimum:1000 name:PM_MRK_DFU_FIN_GRP260 : (Group 260 pm_mrk_misc5) The Decimal Floating Point Unit finished a marked instruction. event:0X1042 counters:2 um:zero minimum:1000 name:PM_MRK_STALL_CMPLU_CYC_COUNT_GRP260 : (Group 260 pm_mrk_misc5) Marked Group Completion Stall cycles (use edge detect to count #) event:0X1043 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP260 : (Group 260 pm_mrk_misc5) Number of PowerPC Instructions that completed. event:0X1044 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP260 : (Group 260 pm_mrk_misc5) Number of run instructions completed. event:0X1045 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP260 : (Group 260 pm_mrk_misc5) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 261 pm_mrk_misc6, Marked misc events event:0X1050 counters:0 um:zero minimum:1000 name:PM_GRP_MRK_CYC_GRP261 : (Group 261 pm_mrk_misc6) cycles IDU marked instruction before dispatch event:0X1051 counters:1 um:zero minimum:10000 name:PM_RUN_CYC_GRP261 : (Group 261 pm_mrk_misc6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. event:0X1052 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP261 : (Group 261 pm_mrk_misc6) Number of PowerPC Instructions that completed. event:0X1053 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP261 : (Group 261 pm_mrk_misc6) A group containing a sampled instruction completed. Microcoded instructions that span multiple groups will generate this event once per group. event:0X1054 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP261 : (Group 261 pm_mrk_misc6) Number of run instructions completed. event:0X1055 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP261 : (Group 261 pm_mrk_misc6) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 262 pm_mrk_misc7, Marked misc events event:0X1060 counters:0 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_LHS_GRP262 : (Group 262 pm_mrk_misc7) The Load Store Unit rejected a marked load instruction that had an address overlap with an older store in the store queue. The store must be committed and de-allocated from the Store Queue before the load can execute successfully event:0X1061 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP262 : (Group 262 pm_mrk_misc7) Number of PowerPC Instructions that completed. event:0X1062 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_ERAT_MISS_GRP262 : (Group 262 pm_mrk_misc7) LSU marked reject due to ERAT (up to 2 per cycle) event:0X1063 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_REJECT_GRP262 : (Group 262 pm_mrk_misc7) LSU marked reject (up to 2 per cycle) event:0X1064 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP262 : (Group 262 pm_mrk_misc7) Number of run instructions completed. event:0X1065 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP262 : (Group 262 pm_mrk_misc7) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 263 pm_mrk_misc8, Marked misc events event:0X1070 counters:0 um:zero minimum:10000 name:PM_CYC_GRP263 : (Group 263 pm_mrk_misc8) Processor Cycles event:0X1071 counters:1 um:zero minimum:10000 name:PM_CYC_GRP263 : (Group 263 pm_mrk_misc8) Processor Cycles event:0X1072 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP263 : (Group 263 pm_mrk_misc8) Number of PowerPC Instructions that completed. event:0X1073 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP263 : (Group 263 pm_mrk_misc8) One of the Load/Store Units finished a marked instruction. Instructions that finish may not necessary complete event:0X1074 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP263 : (Group 263 pm_mrk_misc8) Number of run instructions completed. event:0X1075 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP263 : (Group 263 pm_mrk_misc8) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 264 pm_gct_noslot, GCT no slot events ###### DO NOT REMOVE ###### # Manually added group event:0X1080 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_EDGE_COUNT_GRP264 : (Group 264 pm_gct_noslot) Number of distinct occurrences when the Global Completion Table has no slots from this thread. event:0X1081 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP264 : (Group 264 pm_gct_noslot) Cycles when the Global Completion Table was completely empty. No thread had an entry allocated. event:0X1082 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP264 : (Group 264 pm_gct_noslot) Number of PowerPC Instructions that completed. event:0X1083 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_EDGE_COUNT_GRP264 : (Group 264 pm_gct_noslot) Number of distinct occurrences when the Global Completion Table has no slots from this thread because of a branch misprediction. event:0X1084 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP264 : (Group 264 pm_gct_noslot) Number of run instructions completed. event:0X1085 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP264 : (Group 264 pm_gct_noslot) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 265 pm_cmplu_stall, CMPLU stall events ###### DO NOT REMOVE ###### event:0X1090 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_THRD_EDGE_COUNT_GRP265 : (Group 265 pm_cmplu_stall) Number of distinct occurrences when completion stalled due to thread conflict. Group ready to complete but it was another thread's turn event:0X1091 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DFU_GRP265 : (Group 265 pm_cmplu_stall) Completion stall caused by Decimal Floating Point Unit event:0X1092 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP265 : (Group 265 pm_cmplu_stall) Number of PowerPC Instructions that completed. event:0X1093 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_IC_MISS_GRP265 : (Group 265 pm_cmplu_stall) No slot in GCT caused by branch mispredict or I cache miss event:0X1094 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP265 : (Group 265 pm_cmplu_stall) Number of run instructions completed. event:0X1095 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP265 : (Group 265 pm_cmplu_stall) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 266 pm_cmplu_stall2, CMPLU stall (vector) ###### DO NOT REMOVE ###### event:0X10A0 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_END_GCT_NOSLOT_GRP266 : (Group 266 pm_cmplu_stall2) Count ended because GCT went empty event:0X10A1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_VECTOR_EDGE_COUNT_GRP266 : (Group 266 pm_cmplu_stall2) Number of distinct occurrences when completion stalled caused by Vector instruction event:0X10A2 counters:2 um:zero minimum:1000 name:PM_MRK_STALL_CMPLU_CYC_COUNT_GRP266 : (Group 266 pm_cmplu_stall2) Marked Group Completion Stall cycles (use edge detect to count #) event:0X10A3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_EDGE_COUNT_GRP266 : (Group 266 pm_cmplu_stall2) Number of distinct occurrences when no groups completed, GCT not empty event:0X10A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP266 : (Group 266 pm_cmplu_stall2) Number of run instructions completed. event:0X10A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP266 : (Group 266 pm_cmplu_stall2) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 267 pm_cmplu_stall3, CMPLU stall (scalar) ###### DO NOT REMOVE ###### event:0X10B0 counters:0 um:zero minimum:1000 name:PM_FLOP_GRP267 : (Group 267 pm_cmplu_stall3) A floating point operation has completed event:0X10B1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_SCALAR_LONG_GRP267 : (Group 267 pm_cmplu_stall3) Completion stall caused by long latency scalar instruction event:0X10B2 counters:2 um:zero minimum:1000 name:PM_MRK_STALL_CMPLU_CYC_GRP267 : (Group 267 pm_cmplu_stall3) Marked Group Completion Stall cycles event:0X10B3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_SCALAR_EDGE_COUNT_GRP267 : (Group 267 pm_cmplu_stall3) Number of distinct occurrences when completion stalled caused by FPU instruction event:0X10B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP267 : (Group 267 pm_cmplu_stall3) Number of run instructions completed. event:0X10B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP267 : (Group 267 pm_cmplu_stall3) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. #Group 268 pm_cmplu_ifu, IFU stall event:0X10C0 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_END_GCT_NOSLOT_GRP268 : (Group 268 pm_cmplu_ifu) Count ended because GCT went empty event:0X10C1 counters:1 um:zero minimum:1000 name:PM_LSU0_L1_SW_PREF_GRP268 : (Group 268 pm_cmplu_ifu) LSU0 Software L1 Prefetches, including SW Transient Prefetches event:0X10C2 counters:2 um:zero minimum:1000 name:PM_LSU1_L1_SW_PREF_GRP268 : (Group 268 pm_cmplu_ifu) LSU1 Software L1 Prefetches, including SW Transient Prefetches event:0X10C3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_IFU_EDGE_COUNT_GRP268 : (Group 268 pm_cmplu_ifu) Number of distinct occurrences when completion stalled due to IFU event:0X10C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP268 : (Group 268 pm_cmplu_ifu) Number of run instructions completed. event:0X10C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP268 : (Group 268 pm_cmplu_ifu) Processor Cycles gated by the run latch. Operating systems use the run latch to indicate when they are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filters out the idle loop. oprofile-1.3.0/events/ppc64/power7/event_mappings0000664000175000017500000037111712534404406016716 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2009, 2011. # Contributed by Maynard Johnson . # #Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 #Group 1 pm_utilization, CPI and utilization data event:0X0010 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 event:0X0011 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 event:0X0012 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 event:0X0013 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 event:0X0014 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 event:0X0015 mmcr0:0X00000000 mmcr1:0X000000001EF4F202 mmcra:0X00000000 #Group 2 pm_branch1, Branch operations event:0X0020 mmcr0:0X00000000 mmcr1:0X44440000A0A2A4AE mmcra:0X00000000 event:0X0021 mmcr0:0X00000000 mmcr1:0X44440000A0A2A4AE mmcra:0X00000000 event:0X0022 mmcr0:0X00000000 mmcr1:0X44440000A0A2A4AE mmcra:0X00000000 event:0X0023 mmcr0:0X00000000 mmcr1:0X44440000A0A2A4AE mmcra:0X00000000 event:0X0024 mmcr0:0X00000000 mmcr1:0X44440000A0A2A4AE mmcra:0X00000000 event:0X0025 mmcr0:0X00000000 mmcr1:0X44440000A0A2A4AE mmcra:0X00000000 #Group 3 pm_branch2, Branch operations event:0X0030 mmcr0:0X00000000 mmcr1:0X444400009CA8A0A2 mmcra:0X00000000 event:0X0031 mmcr0:0X00000000 mmcr1:0X444400009CA8A0A2 mmcra:0X00000000 event:0X0032 mmcr0:0X00000000 mmcr1:0X444400009CA8A0A2 mmcra:0X00000000 event:0X0033 mmcr0:0X00000000 mmcr1:0X444400009CA8A0A2 mmcra:0X00000000 event:0X0034 mmcr0:0X00000000 mmcr1:0X444400009CA8A0A2 mmcra:0X00000000 event:0X0035 mmcr0:0X00000000 mmcr1:0X444400009CA8A0A2 mmcra:0X00000000 #Group 4 pm_branch3, Branch operations event:0X0040 mmcr0:0X00000000 mmcr1:0X0040000068049CF6 mmcra:0X00000000 event:0X0041 mmcr0:0X00000000 mmcr1:0X0040000068049CF6 mmcra:0X00000000 event:0X0042 mmcr0:0X00000000 mmcr1:0X0040000068049CF6 mmcra:0X00000000 event:0X0043 mmcr0:0X00000000 mmcr1:0X0040000068049CF6 mmcra:0X00000000 event:0X0044 mmcr0:0X00000000 mmcr1:0X0040000068049CF6 mmcra:0X00000000 event:0X0045 mmcr0:0X00000000 mmcr1:0X0040000068049CF6 mmcra:0X00000000 #Group 5 pm_branch4, Branch operations event:0X0050 mmcr0:0X00000000 mmcr1:0X44440000AC9EAEA4 mmcra:0X00000000 event:0X0051 mmcr0:0X00000000 mmcr1:0X44440000AC9EAEA4 mmcra:0X00000000 event:0X0052 mmcr0:0X00000000 mmcr1:0X44440000AC9EAEA4 mmcra:0X00000000 event:0X0053 mmcr0:0X00000000 mmcr1:0X44440000AC9EAEA4 mmcra:0X00000000 event:0X0054 mmcr0:0X00000000 mmcr1:0X44440000AC9EAEA4 mmcra:0X00000000 event:0X0055 mmcr0:0X00000000 mmcr1:0X44440000AC9EAEA4 mmcra:0X00000000 #Group 6 pm_branch5, Branch operations event:0X0060 mmcr0:0X00000000 mmcr1:0X4444000CAAAE9CA8 mmcra:0X00000000 event:0X0061 mmcr0:0X00000000 mmcr1:0X4444000CAAAE9CA8 mmcra:0X00000000 event:0X0062 mmcr0:0X00000000 mmcr1:0X4444000CAAAE9CA8 mmcra:0X00000000 event:0X0063 mmcr0:0X00000000 mmcr1:0X4444000CAAAE9CA8 mmcra:0X00000000 event:0X0064 mmcr0:0X00000000 mmcr1:0X4444000CAAAE9CA8 mmcra:0X00000000 event:0X0065 mmcr0:0X00000000 mmcr1:0X4444000CAAAE9CA8 mmcra:0X00000000 #Group 7 pm_branch6, Branch operations event:0X0070 mmcr0:0X00000000 mmcr1:0X44440000A0A2A8AA mmcra:0X00000000 event:0X0071 mmcr0:0X00000000 mmcr1:0X44440000A0A2A8AA mmcra:0X00000000 event:0X0072 mmcr0:0X00000000 mmcr1:0X44440000A0A2A8AA mmcra:0X00000000 event:0X0073 mmcr0:0X00000000 mmcr1:0X44440000A0A2A8AA mmcra:0X00000000 event:0X0074 mmcr0:0X00000000 mmcr1:0X44440000A0A2A8AA mmcra:0X00000000 event:0X0075 mmcr0:0X00000000 mmcr1:0X44440000A0A2A8AA mmcra:0X00000000 #Group 8 pm_branch7, Branch operations event:0X0080 mmcr0:0X00000000 mmcr1:0X44440000ACA8A0A2 mmcra:0X00000000 event:0X0081 mmcr0:0X00000000 mmcr1:0X44440000ACA8A0A2 mmcra:0X00000000 event:0X0082 mmcr0:0X00000000 mmcr1:0X44440000ACA8A0A2 mmcra:0X00000000 event:0X0083 mmcr0:0X00000000 mmcr1:0X44440000ACA8A0A2 mmcra:0X00000000 event:0X0084 mmcr0:0X00000000 mmcr1:0X44440000ACA8A0A2 mmcra:0X00000000 event:0X0085 mmcr0:0X00000000 mmcr1:0X44440000ACA8A0A2 mmcra:0X00000000 #Group 9 pm_branch8, Branch operations event:0X0090 mmcr0:0X00000000 mmcr1:0X44440000AEA8A0A2 mmcra:0X00000000 event:0X0091 mmcr0:0X00000000 mmcr1:0X44440000AEA8A0A2 mmcra:0X00000000 event:0X0092 mmcr0:0X00000000 mmcr1:0X44440000AEA8A0A2 mmcra:0X00000000 event:0X0093 mmcr0:0X00000000 mmcr1:0X44440000AEA8A0A2 mmcra:0X00000000 event:0X0094 mmcr0:0X00000000 mmcr1:0X44440000AEA8A0A2 mmcra:0X00000000 event:0X0095 mmcr0:0X00000000 mmcr1:0X44440000AEA8A0A2 mmcra:0X00000000 #Group 10 pm_branch9, Branch operations event:0X00A0 mmcr0:0X00000000 mmcr1:0X44440000A4A8A0A2 mmcra:0X00000000 event:0X00A1 mmcr0:0X00000000 mmcr1:0X44440000A4A8A0A2 mmcra:0X00000000 event:0X00A2 mmcr0:0X00000000 mmcr1:0X44440000A4A8A0A2 mmcra:0X00000000 event:0X00A3 mmcr0:0X00000000 mmcr1:0X44440000A4A8A0A2 mmcra:0X00000000 event:0X00A4 mmcr0:0X00000000 mmcr1:0X44440000A4A8A0A2 mmcra:0X00000000 event:0X00A5 mmcr0:0X00000000 mmcr1:0X44440000A4A8A0A2 mmcra:0X00000000 #Group 11 pm_slb_miss, SLB Misses event:0X00B0 mmcr0:0X00000000 mmcr1:0X0DDD0001F6909290 mmcra:0X00000000 event:0X00B1 mmcr0:0X00000000 mmcr1:0X0DDD0001F6909290 mmcra:0X00000000 event:0X00B2 mmcr0:0X00000000 mmcr1:0X0DDD0001F6909290 mmcra:0X00000000 event:0X00B3 mmcr0:0X00000000 mmcr1:0X0DDD0001F6909290 mmcra:0X00000000 event:0X00B4 mmcr0:0X00000000 mmcr1:0X0DDD0001F6909290 mmcra:0X00000000 event:0X00B5 mmcr0:0X00000000 mmcr1:0X0DDD0001F6909290 mmcra:0X00000000 #Group 12 pm_tlb_miss, TLB Misses event:0X00C0 mmcr0:0X00000000 mmcr1:0X500000008866FCFC mmcra:0X00000000 event:0X00C1 mmcr0:0X00000000 mmcr1:0X500000008866FCFC mmcra:0X00000000 event:0X00C2 mmcr0:0X00000000 mmcr1:0X500000008866FCFC mmcra:0X00000000 event:0X00C3 mmcr0:0X00000000 mmcr1:0X500000008866FCFC mmcra:0X00000000 event:0X00C4 mmcr0:0X00000000 mmcr1:0X500000008866FCFC mmcra:0X00000000 event:0X00C5 mmcr0:0X00000000 mmcr1:0X500000008866FCFC mmcra:0X00000000 #Group 13 pm_dtlb_miss, DTLB Misses event:0X00D0 mmcr0:0X00000000 mmcr1:0XCCCC00005E5E5E5E mmcra:0X00000000 event:0X00D1 mmcr0:0X00000000 mmcr1:0XCCCC00005E5E5E5E mmcra:0X00000000 event:0X00D2 mmcr0:0X00000000 mmcr1:0XCCCC00005E5E5E5E mmcra:0X00000000 event:0X00D3 mmcr0:0X00000000 mmcr1:0XCCCC00005E5E5E5E mmcra:0X00000000 event:0X00D4 mmcr0:0X00000000 mmcr1:0XCCCC00005E5E5E5E mmcra:0X00000000 event:0X00D5 mmcr0:0X00000000 mmcr1:0XCCCC00005E5E5E5E mmcra:0X00000000 #Group 14 pm_derat_miss1, DERAT misses event:0X00E0 mmcr0:0X00000000 mmcr1:0XCCCC00005C5C5C5C mmcra:0X00000000 event:0X00E1 mmcr0:0X00000000 mmcr1:0XCCCC00005C5C5C5C mmcra:0X00000000 event:0X00E2 mmcr0:0X00000000 mmcr1:0XCCCC00005C5C5C5C mmcra:0X00000000 event:0X00E3 mmcr0:0X00000000 mmcr1:0XCCCC00005C5C5C5C mmcra:0X00000000 event:0X00E4 mmcr0:0X00000000 mmcr1:0XCCCC00005C5C5C5C mmcra:0X00000000 event:0X00E5 mmcr0:0X00000000 mmcr1:0XCCCC00005C5C5C5C mmcra:0X00000000 #Group 15 pm_derat_miss2, DERAT misses event:0X00F0 mmcr0:0X00000000 mmcr1:0X0CCC0000025C5C5C mmcra:0X00000000 event:0X00F1 mmcr0:0X00000000 mmcr1:0X0CCC0000025C5C5C mmcra:0X00000000 event:0X00F2 mmcr0:0X00000000 mmcr1:0X0CCC0000025C5C5C mmcra:0X00000000 event:0X00F3 mmcr0:0X00000000 mmcr1:0X0CCC0000025C5C5C mmcra:0X00000000 event:0X00F4 mmcr0:0X00000000 mmcr1:0X0CCC0000025C5C5C mmcra:0X00000000 event:0X00F5 mmcr0:0X00000000 mmcr1:0X0CCC0000025C5C5C mmcra:0X00000000 #Group 16 pm_misc_miss1, Misses event:0X0100 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000 event:0X0101 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000 event:0X0102 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000 event:0X0103 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000 event:0X0104 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000 event:0X0105 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000 #Group 17 pm_misc_miss2, Misses event:0X0110 mmcr0:0X00000000 mmcr1:0X0CC000001E585AFA mmcra:0X00000000 event:0X0111 mmcr0:0X00000000 mmcr1:0X0CC000001E585AFA mmcra:0X00000000 event:0X0112 mmcr0:0X00000000 mmcr1:0X0CC000001E585AFA mmcra:0X00000000 event:0X0113 mmcr0:0X00000000 mmcr1:0X0CC000001E585AFA mmcra:0X00000000 event:0X0114 mmcr0:0X00000000 mmcr1:0X0CC000001E585AFA mmcra:0X00000000 event:0X0115 mmcr0:0X00000000 mmcr1:0X0CC000001E585AFA mmcra:0X00000000 #Group 18 pm_misc_miss3, Misses event:0X0120 mmcr0:0X00000000 mmcr1:0X0CCC00001E585A58 mmcra:0X00000000 event:0X0121 mmcr0:0X00000000 mmcr1:0X0CCC00001E585A58 mmcra:0X00000000 event:0X0122 mmcr0:0X00000000 mmcr1:0X0CCC00001E585A58 mmcra:0X00000000 event:0X0123 mmcr0:0X00000000 mmcr1:0X0CCC00001E585A58 mmcra:0X00000000 event:0X0124 mmcr0:0X00000000 mmcr1:0X0CCC00001E585A58 mmcra:0X00000000 event:0X0125 mmcr0:0X00000000 mmcr1:0X0CCC00001E585A58 mmcra:0X00000000 #Group 19 pm_misc_miss4, Misses event:0X0130 mmcr0:0X00000000 mmcr1:0XD4000000904802FA mmcra:0X00000000 event:0X0131 mmcr0:0X00000000 mmcr1:0XD4000000904802FA mmcra:0X00000000 event:0X0132 mmcr0:0X00000000 mmcr1:0XD4000000904802FA mmcra:0X00000000 event:0X0133 mmcr0:0X00000000 mmcr1:0XD4000000904802FA mmcra:0X00000000 event:0X0134 mmcr0:0X00000000 mmcr1:0XD4000000904802FA mmcra:0X00000000 event:0X0135 mmcr0:0X00000000 mmcr1:0XD4000000904802FA mmcra:0X00000000 #Group 20 pm_misc_miss5, Misses event:0X0140 mmcr0:0X00000000 mmcr1:0X0DD00000F6909202 mmcra:0X00000000 event:0X0141 mmcr0:0X00000000 mmcr1:0X0DD00000F6909202 mmcra:0X00000000 event:0X0142 mmcr0:0X00000000 mmcr1:0X0DD00000F6909202 mmcra:0X00000000 event:0X0143 mmcr0:0X00000000 mmcr1:0X0DD00000F6909202 mmcra:0X00000000 event:0X0144 mmcr0:0X00000000 mmcr1:0X0DD00000F6909202 mmcra:0X00000000 event:0X0145 mmcr0:0X00000000 mmcr1:0X0DD00000F6909202 mmcra:0X00000000 #Group 21 pm_pteg1, PTEG sources event:0X0150 mmcr0:0X00000000 mmcr1:0XCECE000050505654 mmcra:0X00000000 event:0X0151 mmcr0:0X00000000 mmcr1:0XCECE000050505654 mmcra:0X00000000 event:0X0152 mmcr0:0X00000000 mmcr1:0XCECE000050505654 mmcra:0X00000000 event:0X0153 mmcr0:0X00000000 mmcr1:0XCECE000050505654 mmcra:0X00000000 event:0X0154 mmcr0:0X00000000 mmcr1:0XCECE000050505654 mmcra:0X00000000 event:0X0155 mmcr0:0X00000000 mmcr1:0XCECE000050505654 mmcra:0X00000000 #Group 22 pm_pteg2, PTEG sources event:0X0160 mmcr0:0X00000000 mmcr1:0XEEEC000050545454 mmcra:0X00000000 event:0X0161 mmcr0:0X00000000 mmcr1:0XEEEC000050545454 mmcra:0X00000000 event:0X0162 mmcr0:0X00000000 mmcr1:0XEEEC000050545454 mmcra:0X00000000 event:0X0163 mmcr0:0X00000000 mmcr1:0XEEEC000050545454 mmcra:0X00000000 event:0X0164 mmcr0:0X00000000 mmcr1:0XEEEC000050545454 mmcra:0X00000000 event:0X0165 mmcr0:0X00000000 mmcr1:0XEEEC000050545454 mmcra:0X00000000 #Group 23 pm_pteg3, PTEG sources event:0X0170 mmcr0:0X00000000 mmcr1:0XCCEC000054585252 mmcra:0X00000000 event:0X0171 mmcr0:0X00000000 mmcr1:0XCCEC000054585252 mmcra:0X00000000 event:0X0172 mmcr0:0X00000000 mmcr1:0XCCEC000054585252 mmcra:0X00000000 event:0X0173 mmcr0:0X00000000 mmcr1:0XCCEC000054585252 mmcra:0X00000000 event:0X0174 mmcr0:0X00000000 mmcr1:0XCCEC000054585252 mmcra:0X00000000 event:0X0175 mmcr0:0X00000000 mmcr1:0XCCEC000054585252 mmcra:0X00000000 #Group 24 pm_pteg4, PTEG sources event:0X0180 mmcr0:0X00000000 mmcr1:0XECCC000052525252 mmcra:0X00000000 event:0X0181 mmcr0:0X00000000 mmcr1:0XECCC000052525252 mmcra:0X00000000 event:0X0182 mmcr0:0X00000000 mmcr1:0XECCC000052525252 mmcra:0X00000000 event:0X0183 mmcr0:0X00000000 mmcr1:0XECCC000052525252 mmcra:0X00000000 event:0X0184 mmcr0:0X00000000 mmcr1:0XECCC000052525252 mmcra:0X00000000 event:0X0185 mmcr0:0X00000000 mmcr1:0XECCC000052525252 mmcra:0X00000000 #Group 25 pm_pteg5, PTEG sources event:0X0190 mmcr0:0X00000000 mmcr1:0XCCCC000052565456 mmcra:0X00000000 event:0X0191 mmcr0:0X00000000 mmcr1:0XCCCC000052565456 mmcra:0X00000000 event:0X0192 mmcr0:0X00000000 mmcr1:0XCCCC000052565456 mmcra:0X00000000 event:0X0193 mmcr0:0X00000000 mmcr1:0XCCCC000052565456 mmcra:0X00000000 event:0X0194 mmcr0:0X00000000 mmcr1:0XCCCC000052565456 mmcra:0X00000000 event:0X0195 mmcr0:0X00000000 mmcr1:0XCCCC000052565456 mmcra:0X00000000 #Group 26 pm_pteg6, PTEG sources event:0X01A0 mmcr0:0X00000000 mmcr1:0XEEEE000054525652 mmcra:0X00000000 event:0X01A1 mmcr0:0X00000000 mmcr1:0XEEEE000054525652 mmcra:0X00000000 event:0X01A2 mmcr0:0X00000000 mmcr1:0XEEEE000054525652 mmcra:0X00000000 event:0X01A3 mmcr0:0X00000000 mmcr1:0XEEEE000054525652 mmcra:0X00000000 event:0X01A4 mmcr0:0X00000000 mmcr1:0XEEEE000054525652 mmcra:0X00000000 event:0X01A5 mmcr0:0X00000000 mmcr1:0XEEEE000054525652 mmcra:0X00000000 #Group 27 pm_pteg7, PTEG sources event:0X01B0 mmcr0:0X00000000 mmcr1:0XEEEE000054565656 mmcra:0X00000000 event:0X01B1 mmcr0:0X00000000 mmcr1:0XEEEE000054565656 mmcra:0X00000000 event:0X01B2 mmcr0:0X00000000 mmcr1:0XEEEE000054565656 mmcra:0X00000000 event:0X01B3 mmcr0:0X00000000 mmcr1:0XEEEE000054565656 mmcra:0X00000000 event:0X01B4 mmcr0:0X00000000 mmcr1:0XEEEE000054565656 mmcra:0X00000000 event:0X01B5 mmcr0:0X00000000 mmcr1:0XEEEE000054565656 mmcra:0X00000000 #Group 28 pm_pteg8, PTEG sources event:0X01C0 mmcr0:0X00000000 mmcr1:0XEEEE000050585258 mmcra:0X00000000 event:0X01C1 mmcr0:0X00000000 mmcr1:0XEEEE000050585258 mmcra:0X00000000 event:0X01C2 mmcr0:0X00000000 mmcr1:0XEEEE000050585258 mmcra:0X00000000 event:0X01C3 mmcr0:0X00000000 mmcr1:0XEEEE000050585258 mmcra:0X00000000 event:0X01C4 mmcr0:0X00000000 mmcr1:0XEEEE000050585258 mmcra:0X00000000 event:0X01C5 mmcr0:0X00000000 mmcr1:0XEEEE000050585258 mmcra:0X00000000 #Group 29 pm_pteg9, PTEG sources event:0X01D0 mmcr0:0X00000000 mmcr1:0XCCCC000050505258 mmcra:0X00000000 event:0X01D1 mmcr0:0X00000000 mmcr1:0XCCCC000050505258 mmcra:0X00000000 event:0X01D2 mmcr0:0X00000000 mmcr1:0XCCCC000050505258 mmcra:0X00000000 event:0X01D3 mmcr0:0X00000000 mmcr1:0XCCCC000050505258 mmcra:0X00000000 event:0X01D4 mmcr0:0X00000000 mmcr1:0XCCCC000050505258 mmcra:0X00000000 event:0X01D5 mmcr0:0X00000000 mmcr1:0XCCCC000050505258 mmcra:0X00000000 #Group 30 pm_pteg10, PTEG sources event:0X01E0 mmcr0:0X00000000 mmcr1:0XCC0000005050021E mmcra:0X00000000 event:0X01E1 mmcr0:0X00000000 mmcr1:0XCC0000005050021E mmcra:0X00000000 event:0X01E2 mmcr0:0X00000000 mmcr1:0XCC0000005050021E mmcra:0X00000000 event:0X01E3 mmcr0:0X00000000 mmcr1:0XCC0000005050021E mmcra:0X00000000 event:0X01E4 mmcr0:0X00000000 mmcr1:0XCC0000005050021E mmcra:0X00000000 event:0X01E5 mmcr0:0X00000000 mmcr1:0XCC0000005050021E mmcra:0X00000000 #Group 31 pm_pteg11, PTEG sources event:0X01F0 mmcr0:0X00000000 mmcr1:0XCC0C000052540254 mmcra:0X00000000 event:0X01F1 mmcr0:0X00000000 mmcr1:0XCC0C000052540254 mmcra:0X00000000 event:0X01F2 mmcr0:0X00000000 mmcr1:0XCC0C000052540254 mmcra:0X00000000 event:0X01F3 mmcr0:0X00000000 mmcr1:0XCC0C000052540254 mmcra:0X00000000 event:0X01F4 mmcr0:0X00000000 mmcr1:0XCC0C000052540254 mmcra:0X00000000 event:0X01F5 mmcr0:0X00000000 mmcr1:0XCC0C000052540254 mmcra:0X00000000 #Group 32 pm_pteg12, PTEG sources event:0X0200 mmcr0:0X00000000 mmcr1:0X0CCC000002525252 mmcra:0X00000000 event:0X0201 mmcr0:0X00000000 mmcr1:0X0CCC000002525252 mmcra:0X00000000 event:0X0202 mmcr0:0X00000000 mmcr1:0X0CCC000002525252 mmcra:0X00000000 event:0X0203 mmcr0:0X00000000 mmcr1:0X0CCC000002525252 mmcra:0X00000000 event:0X0204 mmcr0:0X00000000 mmcr1:0X0CCC000002525252 mmcra:0X00000000 event:0X0205 mmcr0:0X00000000 mmcr1:0X0CCC000002525252 mmcra:0X00000000 #Group 33 pm_freq1, Frequency events event:0X0210 mmcr0:0X00000000 mmcr1:0X000000006E060C0C mmcra:0X00000000 event:0X0211 mmcr0:0X00000000 mmcr1:0X000000006E060C0C mmcra:0X00000000 event:0X0212 mmcr0:0X00000000 mmcr1:0X000000006E060C0C mmcra:0X00000000 event:0X0213 mmcr0:0X00000000 mmcr1:0X000000006E060C0C mmcra:0X00000000 event:0X0214 mmcr0:0X00000000 mmcr1:0X000000006E060C0C mmcra:0X00000000 event:0X0215 mmcr0:0X00000000 mmcr1:0X000000006E060C0C mmcra:0X00000000 #Group 34 pm_freq2, Frequency events event:0X0220 mmcr0:0X00000000 mmcr1:0X000000006E06060C mmcra:0X00000000 event:0X0221 mmcr0:0X00000000 mmcr1:0X000000006E06060C mmcra:0X00000000 event:0X0222 mmcr0:0X00000000 mmcr1:0X000000006E06060C mmcra:0X00000000 event:0X0223 mmcr0:0X00000000 mmcr1:0X000000006E06060C mmcra:0X00000000 event:0X0224 mmcr0:0X00000000 mmcr1:0X000000006E06060C mmcra:0X00000000 event:0X0225 mmcr0:0X00000000 mmcr1:0X000000006E06060C mmcra:0X00000000 #Group 35 pm_L1_ref, L1 references event:0X0230 mmcr0:0X00000000 mmcr1:0XCCCD0008808082A6 mmcra:0X00000000 event:0X0231 mmcr0:0X00000000 mmcr1:0XCCCD0008808082A6 mmcra:0X00000000 event:0X0232 mmcr0:0X00000000 mmcr1:0XCCCD0008808082A6 mmcra:0X00000000 event:0X0233 mmcr0:0X00000000 mmcr1:0XCCCD0008808082A6 mmcra:0X00000000 event:0X0234 mmcr0:0X00000000 mmcr1:0XCCCD0008808082A6 mmcra:0X00000000 event:0X0235 mmcr0:0X00000000 mmcr1:0XCCCD0008808082A6 mmcra:0X00000000 #Group 36 pm_flush1, Flushes event:0X0240 mmcr0:0X00000000 mmcr1:0X22200000888A8CF8 mmcra:0X00000000 event:0X0241 mmcr0:0X00000000 mmcr1:0X22200000888A8CF8 mmcra:0X00000000 event:0X0242 mmcr0:0X00000000 mmcr1:0X22200000888A8CF8 mmcra:0X00000000 event:0X0243 mmcr0:0X00000000 mmcr1:0X22200000888A8CF8 mmcra:0X00000000 event:0X0244 mmcr0:0X00000000 mmcr1:0X22200000888A8CF8 mmcra:0X00000000 event:0X0245 mmcr0:0X00000000 mmcr1:0X22200000888A8CF8 mmcra:0X00000000 #Group 37 pm_flush2, Flushes event:0X0250 mmcr0:0X00000000 mmcr1:0X222C000086828EAA mmcra:0X00000000 event:0X0251 mmcr0:0X00000000 mmcr1:0X222C000086828EAA mmcra:0X00000000 event:0X0252 mmcr0:0X00000000 mmcr1:0X222C000086828EAA mmcra:0X00000000 event:0X0253 mmcr0:0X00000000 mmcr1:0X222C000086828EAA mmcra:0X00000000 event:0X0254 mmcr0:0X00000000 mmcr1:0X222C000086828EAA mmcra:0X00000000 event:0X0255 mmcr0:0X00000000 mmcr1:0X222C000086828EAA mmcra:0X00000000 #Group 38 pm_flush, Flushes event:0X0260 mmcr0:0X00000000 mmcr1:0X20000000821E12F8 mmcra:0X00000000 event:0X0261 mmcr0:0X00000000 mmcr1:0X20000000821E12F8 mmcra:0X00000000 event:0X0262 mmcr0:0X00000000 mmcr1:0X20000000821E12F8 mmcra:0X00000000 event:0X0263 mmcr0:0X00000000 mmcr1:0X20000000821E12F8 mmcra:0X00000000 event:0X0264 mmcr0:0X00000000 mmcr1:0X20000000821E12F8 mmcra:0X00000000 event:0X0265 mmcr0:0X00000000 mmcr1:0X20000000821E12F8 mmcra:0X00000000 #Group 39 pm_lsu_flush1, LSU Flush event:0X0270 mmcr0:0X00000000 mmcr1:0XCCCC000FB0B4B8BC mmcra:0X00000000 event:0X0271 mmcr0:0X00000000 mmcr1:0XCCCC000FB0B4B8BC mmcra:0X00000000 event:0X0272 mmcr0:0X00000000 mmcr1:0XCCCC000FB0B4B8BC mmcra:0X00000000 event:0X0273 mmcr0:0X00000000 mmcr1:0XCCCC000FB0B4B8BC mmcra:0X00000000 event:0X0274 mmcr0:0X00000000 mmcr1:0XCCCC000FB0B4B8BC mmcra:0X00000000 event:0X0275 mmcr0:0X00000000 mmcr1:0XCCCC000FB0B4B8BC mmcra:0X00000000 #Group 40 pm_lsu_flush2, LSU Flush ULD event:0X0280 mmcr0:0X00000000 mmcr1:0XCCC00008B0B0B2F8 mmcra:0X00000000 event:0X0281 mmcr0:0X00000000 mmcr1:0XCCC00008B0B0B2F8 mmcra:0X00000000 event:0X0282 mmcr0:0X00000000 mmcr1:0XCCC00008B0B0B2F8 mmcra:0X00000000 event:0X0283 mmcr0:0X00000000 mmcr1:0XCCC00008B0B0B2F8 mmcra:0X00000000 event:0X0284 mmcr0:0X00000000 mmcr1:0XCCC00008B0B0B2F8 mmcra:0X00000000 event:0X0285 mmcr0:0X00000000 mmcr1:0XCCC00008B0B0B2F8 mmcra:0X00000000 #Group 41 pm_lsu_flush3, LSU Flush UST event:0X0290 mmcr0:0X00000000 mmcr1:0XCCC00008B4B4B6F8 mmcra:0X00000000 event:0X0291 mmcr0:0X00000000 mmcr1:0XCCC00008B4B4B6F8 mmcra:0X00000000 event:0X0292 mmcr0:0X00000000 mmcr1:0XCCC00008B4B4B6F8 mmcra:0X00000000 event:0X0293 mmcr0:0X00000000 mmcr1:0XCCC00008B4B4B6F8 mmcra:0X00000000 event:0X0294 mmcr0:0X00000000 mmcr1:0XCCC00008B4B4B6F8 mmcra:0X00000000 event:0X0295 mmcr0:0X00000000 mmcr1:0XCCC00008B4B4B6F8 mmcra:0X00000000 #Group 42 pm_lsu_flush4, LSU Flush LRQ event:0X02A0 mmcr0:0X00000000 mmcr1:0XCCC00008B8B8BAF8 mmcra:0X00000000 event:0X02A1 mmcr0:0X00000000 mmcr1:0XCCC00008B8B8BAF8 mmcra:0X00000000 event:0X02A2 mmcr0:0X00000000 mmcr1:0XCCC00008B8B8BAF8 mmcra:0X00000000 event:0X02A3 mmcr0:0X00000000 mmcr1:0XCCC00008B8B8BAF8 mmcra:0X00000000 event:0X02A4 mmcr0:0X00000000 mmcr1:0XCCC00008B8B8BAF8 mmcra:0X00000000 event:0X02A5 mmcr0:0X00000000 mmcr1:0XCCC00008B8B8BAF8 mmcra:0X00000000 #Group 43 pm_lsu_flush5, LSU Flush SRQ event:0X02B0 mmcr0:0X00000000 mmcr1:0XCCC00008BCBCBEF8 mmcra:0X00000000 event:0X02B1 mmcr0:0X00000000 mmcr1:0XCCC00008BCBCBEF8 mmcra:0X00000000 event:0X02B2 mmcr0:0X00000000 mmcr1:0XCCC00008BCBCBEF8 mmcra:0X00000000 event:0X02B3 mmcr0:0X00000000 mmcr1:0XCCC00008BCBCBEF8 mmcra:0X00000000 event:0X02B4 mmcr0:0X00000000 mmcr1:0XCCC00008BCBCBEF8 mmcra:0X00000000 event:0X02B5 mmcr0:0X00000000 mmcr1:0XCCC00008BCBCBEF8 mmcra:0X00000000 #Group 44 pm_prefetch, I cache Prefetches event:0X02C0 mmcr0:0X00000000 mmcr1:0X04440000188A968E mmcra:0X00000000 event:0X02C1 mmcr0:0X00000000 mmcr1:0X04440000188A968E mmcra:0X00000000 event:0X02C2 mmcr0:0X00000000 mmcr1:0X04440000188A968E mmcra:0X00000000 event:0X02C3 mmcr0:0X00000000 mmcr1:0X04440000188A968E mmcra:0X00000000 event:0X02C4 mmcr0:0X00000000 mmcr1:0X04440000188A968E mmcra:0X00000000 event:0X02C5 mmcr0:0X00000000 mmcr1:0X04440000188A968E mmcra:0X00000000 #Group 45 pm_thread_cyc1, Thread cycles event:0X02D0 mmcr0:0X00000000 mmcr1:0X00000000FA0CF460 mmcra:0X00000000 event:0X02D1 mmcr0:0X00000000 mmcr1:0X00000000FA0CF460 mmcra:0X00000000 event:0X02D2 mmcr0:0X00000000 mmcr1:0X00000000FA0CF460 mmcra:0X00000000 event:0X02D3 mmcr0:0X00000000 mmcr1:0X00000000FA0CF460 mmcra:0X00000000 event:0X02D4 mmcr0:0X00000000 mmcr1:0X00000000FA0CF460 mmcra:0X00000000 event:0X02D5 mmcr0:0X00000000 mmcr1:0X00000000FA0CF460 mmcra:0X00000000 #Group 46 pm_thread_cyc2, Thread cycles event:0X02E0 mmcr0:0X00000000 mmcr1:0X00040000120CF4B0 mmcra:0X00000000 event:0X02E1 mmcr0:0X00000000 mmcr1:0X00040000120CF4B0 mmcra:0X00000000 event:0X02E2 mmcr0:0X00000000 mmcr1:0X00040000120CF4B0 mmcra:0X00000000 event:0X02E3 mmcr0:0X00000000 mmcr1:0X00040000120CF4B0 mmcra:0X00000000 event:0X02E4 mmcr0:0X00000000 mmcr1:0X00040000120CF4B0 mmcra:0X00000000 event:0X02E5 mmcr0:0X00000000 mmcr1:0X00040000120CF4B0 mmcra:0X00000000 #Group 47 pm_thread_cyc3, Thread cycles event:0X02F0 mmcr0:0X00000000 mmcr1:0X00040000626060B4 mmcra:0X00000000 event:0X02F1 mmcr0:0X00000000 mmcr1:0X00040000626060B4 mmcra:0X00000000 event:0X02F2 mmcr0:0X00000000 mmcr1:0X00040000626060B4 mmcra:0X00000000 event:0X02F3 mmcr0:0X00000000 mmcr1:0X00040000626060B4 mmcra:0X00000000 event:0X02F4 mmcr0:0X00000000 mmcr1:0X00040000626060B4 mmcra:0X00000000 event:0X02F5 mmcr0:0X00000000 mmcr1:0X00040000626060B4 mmcra:0X00000000 #Group 48 pm_thread_cyc4, Thread cycles event:0X0300 mmcr0:0X00000000 mmcr1:0X40000000B2626262 mmcra:0X00000000 event:0X0301 mmcr0:0X00000000 mmcr1:0X40000000B2626262 mmcra:0X00000000 event:0X0302 mmcr0:0X00000000 mmcr1:0X40000000B2626262 mmcra:0X00000000 event:0X0303 mmcr0:0X00000000 mmcr1:0X40000000B2626262 mmcra:0X00000000 event:0X0304 mmcr0:0X00000000 mmcr1:0X40000000B2626262 mmcra:0X00000000 event:0X0305 mmcr0:0X00000000 mmcr1:0X40000000B2626262 mmcra:0X00000000 #Group 49 pm_thread_cyc5, Thread cycles event:0X0310 mmcr0:0X00000000 mmcr1:0X44440000B0B2B4B6 mmcra:0X00000000 event:0X0311 mmcr0:0X00000000 mmcr1:0X44440000B0B2B4B6 mmcra:0X00000000 event:0X0312 mmcr0:0X00000000 mmcr1:0X44440000B0B2B4B6 mmcra:0X00000000 event:0X0313 mmcr0:0X00000000 mmcr1:0X44440000B0B2B4B6 mmcra:0X00000000 event:0X0314 mmcr0:0X00000000 mmcr1:0X44440000B0B2B4B6 mmcra:0X00000000 event:0X0315 mmcr0:0X00000000 mmcr1:0X44440000B0B2B4B6 mmcra:0X00000000 #Group 50 pm_thread_cyc6, Thread cycles event:0X0320 mmcr0:0X00000000 mmcr1:0X00000000600CF460 mmcra:0X00000000 event:0X0321 mmcr0:0X00000000 mmcr1:0X00000000600CF460 mmcra:0X00000000 event:0X0322 mmcr0:0X00000000 mmcr1:0X00000000600CF460 mmcra:0X00000000 event:0X0323 mmcr0:0X00000000 mmcr1:0X00000000600CF460 mmcra:0X00000000 event:0X0324 mmcr0:0X00000000 mmcr1:0X00000000600CF460 mmcra:0X00000000 event:0X0325 mmcr0:0X00000000 mmcr1:0X00000000600CF460 mmcra:0X00000000 #Group 51 pm_fxu1, FXU events event:0X0330 mmcr0:0X00000000 mmcr1:0X000000000E0E0E0E mmcra:0X00000000 event:0X0331 mmcr0:0X00000000 mmcr1:0X000000000E0E0E0E mmcra:0X00000000 event:0X0332 mmcr0:0X00000000 mmcr1:0X000000000E0E0E0E mmcra:0X00000000 event:0X0333 mmcr0:0X00000000 mmcr1:0X000000000E0E0E0E mmcra:0X00000000 event:0X0334 mmcr0:0X00000000 mmcr1:0X000000000E0E0E0E mmcra:0X00000000 event:0X0335 mmcr0:0X00000000 mmcr1:0X000000000E0E0E0E mmcra:0X00000000 #Group 52 pm_fxu2, FXU events event:0X0340 mmcr0:0X00000000 mmcr1:0X0000000004F40204 mmcra:0X00000000 event:0X0341 mmcr0:0X00000000 mmcr1:0X0000000004F40204 mmcra:0X00000000 event:0X0342 mmcr0:0X00000000 mmcr1:0X0000000004F40204 mmcra:0X00000000 event:0X0343 mmcr0:0X00000000 mmcr1:0X0000000004F40204 mmcra:0X00000000 event:0X0344 mmcr0:0X00000000 mmcr1:0X0000000004F40204 mmcra:0X00000000 event:0X0345 mmcr0:0X00000000 mmcr1:0X0000000004F40204 mmcra:0X00000000 #Group 53 pm_fxu3, FXU events event:0X0350 mmcr0:0X00000000 mmcr1:0X000000001E0E0E0E mmcra:0X00000000 event:0X0351 mmcr0:0X00000000 mmcr1:0X000000001E0E0E0E mmcra:0X00000000 event:0X0352 mmcr0:0X00000000 mmcr1:0X000000001E0E0E0E mmcra:0X00000000 event:0X0353 mmcr0:0X00000000 mmcr1:0X000000001E0E0E0E mmcra:0X00000000 event:0X0354 mmcr0:0X00000000 mmcr1:0X000000001E0E0E0E mmcra:0X00000000 event:0X0355 mmcr0:0X00000000 mmcr1:0X000000001E0E0E0E mmcra:0X00000000 #Group 54 pm_fxu4, FXU events event:0X0360 mmcr0:0X00000000 mmcr1:0X000000000E0E1E02 mmcra:0X00000000 event:0X0361 mmcr0:0X00000000 mmcr1:0X000000000E0E1E02 mmcra:0X00000000 event:0X0362 mmcr0:0X00000000 mmcr1:0X000000000E0E1E02 mmcra:0X00000000 event:0X0363 mmcr0:0X00000000 mmcr1:0X000000000E0E1E02 mmcra:0X00000000 event:0X0364 mmcr0:0X00000000 mmcr1:0X000000000E0E1E02 mmcra:0X00000000 event:0X0365 mmcr0:0X00000000 mmcr1:0X000000000E0E1E02 mmcra:0X00000000 #Group 55 pm_L2_RCLD, L2 RC load events event:0X0370 mmcr0:0X00000000 mmcr1:0X6666400080808082 mmcra:0X00000000 event:0X0371 mmcr0:0X00000000 mmcr1:0X6666400080808082 mmcra:0X00000000 event:0X0372 mmcr0:0X00000000 mmcr1:0X6666400080808082 mmcra:0X00000000 event:0X0373 mmcr0:0X00000000 mmcr1:0X6666400080808082 mmcra:0X00000000 event:0X0374 mmcr0:0X00000000 mmcr1:0X6666400080808082 mmcra:0X00000000 event:0X0375 mmcr0:0X00000000 mmcr1:0X6666400080808082 mmcra:0X00000000 #Group 56 pm_L2_RC, RC related events event:0X0380 mmcr0:0X00000000 mmcr1:0X60606000821E8002 mmcra:0X00000000 event:0X0381 mmcr0:0X00000000 mmcr1:0X60606000821E8002 mmcra:0X00000000 event:0X0382 mmcr0:0X00000000 mmcr1:0X60606000821E8002 mmcra:0X00000000 event:0X0383 mmcr0:0X00000000 mmcr1:0X60606000821E8002 mmcra:0X00000000 event:0X0384 mmcr0:0X00000000 mmcr1:0X60606000821E8002 mmcra:0X00000000 event:0X0385 mmcr0:0X00000000 mmcr1:0X60606000821E8002 mmcra:0X00000000 #Group 57 pm_L2_RCST, L2 RC Store Events event:0X0390 mmcr0:0X00000000 mmcr1:0X6666400080808280 mmcra:0X00000000 event:0X0391 mmcr0:0X00000000 mmcr1:0X6666400080808280 mmcra:0X00000000 event:0X0392 mmcr0:0X00000000 mmcr1:0X6666400080808280 mmcra:0X00000000 event:0X0393 mmcr0:0X00000000 mmcr1:0X6666400080808280 mmcra:0X00000000 event:0X0394 mmcr0:0X00000000 mmcr1:0X6666400080808280 mmcra:0X00000000 event:0X0395 mmcr0:0X00000000 mmcr1:0X6666400080808280 mmcra:0X00000000 #Group 58 pm_L2_ldst_1, L2 load/store event:0X03A0 mmcr0:0X00000000 mmcr1:0X660000008280021E mmcra:0X00000000 event:0X03A1 mmcr0:0X00000000 mmcr1:0X660000008280021E mmcra:0X00000000 event:0X03A2 mmcr0:0X00000000 mmcr1:0X660000008280021E mmcra:0X00000000 event:0X03A3 mmcr0:0X00000000 mmcr1:0X660000008280021E mmcra:0X00000000 event:0X03A4 mmcr0:0X00000000 mmcr1:0X660000008280021E mmcra:0X00000000 event:0X03A5 mmcr0:0X00000000 mmcr1:0X660000008280021E mmcra:0X00000000 #Group 59 pm_L2_ldst_2, L2 load/store event:0X03B0 mmcr0:0X00000000 mmcr1:0X00662000021E8282 mmcra:0X00000000 event:0X03B1 mmcr0:0X00000000 mmcr1:0X00662000021E8282 mmcra:0X00000000 event:0X03B2 mmcr0:0X00000000 mmcr1:0X00662000021E8282 mmcra:0X00000000 event:0X03B3 mmcr0:0X00000000 mmcr1:0X00662000021E8282 mmcra:0X00000000 event:0X03B4 mmcr0:0X00000000 mmcr1:0X00662000021E8282 mmcra:0X00000000 event:0X03B5 mmcr0:0X00000000 mmcr1:0X00662000021E8282 mmcra:0X00000000 #Group 60 pm_L2_ldst_3, L2 load/store event:0X03C0 mmcr0:0X00000000 mmcr1:0X00662000021E8080 mmcra:0X00000000 event:0X03C1 mmcr0:0X00000000 mmcr1:0X00662000021E8080 mmcra:0X00000000 event:0X03C2 mmcr0:0X00000000 mmcr1:0X00662000021E8080 mmcra:0X00000000 event:0X03C3 mmcr0:0X00000000 mmcr1:0X00662000021E8080 mmcra:0X00000000 event:0X03C4 mmcr0:0X00000000 mmcr1:0X00662000021E8080 mmcra:0X00000000 event:0X03C5 mmcr0:0X00000000 mmcr1:0X00662000021E8080 mmcra:0X00000000 #Group 61 pm_L2_RCSTLD, L2 RC Load/Store Events event:0X03D0 mmcr0:0X00000000 mmcr1:0X660040008282021E mmcra:0X00000000 event:0X03D1 mmcr0:0X00000000 mmcr1:0X660040008282021E mmcra:0X00000000 event:0X03D2 mmcr0:0X00000000 mmcr1:0X660040008282021E mmcra:0X00000000 event:0X03D3 mmcr0:0X00000000 mmcr1:0X660040008282021E mmcra:0X00000000 event:0X03D4 mmcr0:0X00000000 mmcr1:0X660040008282021E mmcra:0X00000000 event:0X03D5 mmcr0:0X00000000 mmcr1:0X660040008282021E mmcra:0X00000000 #Group 62 pm_nest1, Nest Events event:0X03E0 mmcr0:0X00000000 mmcr1:0X0000000081818181 mmcra:0X00000000 event:0X03E1 mmcr0:0X00000000 mmcr1:0X0000000081818181 mmcra:0X00000000 event:0X03E2 mmcr0:0X00000000 mmcr1:0X0000000081818181 mmcra:0X00000000 event:0X03E3 mmcr0:0X00000000 mmcr1:0X0000000081818181 mmcra:0X00000000 event:0X03E4 mmcr0:0X00000000 mmcr1:0X0000000081818181 mmcra:0X00000000 event:0X03E5 mmcr0:0X00000000 mmcr1:0X0000000081818181 mmcra:0X00000000 #Group 63 pm_nest2, Nest Events event:0X03F0 mmcr0:0X00000000 mmcr1:0X0000000083838383 mmcra:0X00000000 event:0X03F1 mmcr0:0X00000000 mmcr1:0X0000000083838383 mmcra:0X00000000 event:0X03F2 mmcr0:0X00000000 mmcr1:0X0000000083838383 mmcra:0X00000000 event:0X03F3 mmcr0:0X00000000 mmcr1:0X0000000083838383 mmcra:0X00000000 event:0X03F4 mmcr0:0X00000000 mmcr1:0X0000000083838383 mmcra:0X00000000 event:0X03F5 mmcr0:0X00000000 mmcr1:0X0000000083838383 mmcra:0X00000000 #Group 64 pm_nest3, Nest Events event:0X0400 mmcr0:0X00000000 mmcr1:0X0000000F81818181 mmcra:0X00000000 event:0X0401 mmcr0:0X00000000 mmcr1:0X0000000F81818181 mmcra:0X00000000 event:0X0402 mmcr0:0X00000000 mmcr1:0X0000000F81818181 mmcra:0X00000000 event:0X0403 mmcr0:0X00000000 mmcr1:0X0000000F81818181 mmcra:0X00000000 event:0X0404 mmcr0:0X00000000 mmcr1:0X0000000F81818181 mmcra:0X00000000 event:0X0405 mmcr0:0X00000000 mmcr1:0X0000000F81818181 mmcra:0X00000000 #Group 65 pm_nest4, Nest Events event:0X0410 mmcr0:0X00000000 mmcr1:0X0000000F83838383 mmcra:0X00000000 event:0X0411 mmcr0:0X00000000 mmcr1:0X0000000F83838383 mmcra:0X00000000 event:0X0412 mmcr0:0X00000000 mmcr1:0X0000000F83838383 mmcra:0X00000000 event:0X0413 mmcr0:0X00000000 mmcr1:0X0000000F83838383 mmcra:0X00000000 event:0X0414 mmcr0:0X00000000 mmcr1:0X0000000F83838383 mmcra:0X00000000 event:0X0415 mmcr0:0X00000000 mmcr1:0X0000000F83838383 mmcra:0X00000000 #Group 66 pm_L2_redir_pref, L2 redirect and prefetch event:0X0420 mmcr0:0X00000000 mmcr1:0X44440000989A8882 mmcra:0X00000000 event:0X0421 mmcr0:0X00000000 mmcr1:0X44440000989A8882 mmcra:0X00000000 event:0X0422 mmcr0:0X00000000 mmcr1:0X44440000989A8882 mmcra:0X00000000 event:0X0423 mmcr0:0X00000000 mmcr1:0X44440000989A8882 mmcra:0X00000000 event:0X0424 mmcr0:0X00000000 mmcr1:0X44440000989A8882 mmcra:0X00000000 event:0X0425 mmcr0:0X00000000 mmcr1:0X44440000989A8882 mmcra:0X00000000 #Group 67 pm_dlatencies1, Data latencies event:0X0430 mmcr0:0X00000000 mmcr1:0XC000000040F2F6F2 mmcra:0X00000000 event:0X0431 mmcr0:0X00000000 mmcr1:0XC000000040F2F6F2 mmcra:0X00000000 event:0X0432 mmcr0:0X00000000 mmcr1:0XC000000040F2F6F2 mmcra:0X00000000 event:0X0433 mmcr0:0X00000000 mmcr1:0XC000000040F2F6F2 mmcra:0X00000000 event:0X0434 mmcr0:0X00000000 mmcr1:0XC000000040F2F6F2 mmcra:0X00000000 event:0X0435 mmcr0:0X00000000 mmcr1:0XC000000040F2F6F2 mmcra:0X00000000 #Group 68 pm_dlatencies2, Data latencies event:0X0440 mmcr0:0X00000000 mmcr1:0XC0000000481EF602 mmcra:0X00000000 event:0X0441 mmcr0:0X00000000 mmcr1:0XC0000000481EF602 mmcra:0X00000000 event:0X0442 mmcr0:0X00000000 mmcr1:0XC0000000481EF602 mmcra:0X00000000 event:0X0443 mmcr0:0X00000000 mmcr1:0XC0000000481EF602 mmcra:0X00000000 event:0X0444 mmcr0:0X00000000 mmcr1:0XC0000000481EF602 mmcra:0X00000000 event:0X0445 mmcr0:0X00000000 mmcr1:0XC0000000481EF602 mmcra:0X00000000 #Group 69 pm_dlatencies3, Data latencies event:0X0450 mmcr0:0X00000000 mmcr1:0XCC0000004244F602 mmcra:0X00000000 event:0X0451 mmcr0:0X00000000 mmcr1:0XCC0000004244F602 mmcra:0X00000000 event:0X0452 mmcr0:0X00000000 mmcr1:0XCC0000004244F602 mmcra:0X00000000 event:0X0453 mmcr0:0X00000000 mmcr1:0XCC0000004244F602 mmcra:0X00000000 event:0X0454 mmcr0:0X00000000 mmcr1:0XCC0000004244F602 mmcra:0X00000000 event:0X0455 mmcr0:0X00000000 mmcr1:0XCC0000004244F602 mmcra:0X00000000 #Group 70 pm_rejects1, Reject event event:0X0460 mmcr0:0X00000000 mmcr1:0X0CCC000164ACAEAC mmcra:0X00000000 event:0X0461 mmcr0:0X00000000 mmcr1:0X0CCC000164ACAEAC mmcra:0X00000000 event:0X0462 mmcr0:0X00000000 mmcr1:0X0CCC000164ACAEAC mmcra:0X00000000 event:0X0463 mmcr0:0X00000000 mmcr1:0X0CCC000164ACAEAC mmcra:0X00000000 event:0X0464 mmcr0:0X00000000 mmcr1:0X0CCC000164ACAEAC mmcra:0X00000000 event:0X0465 mmcr0:0X00000000 mmcr1:0X0CCC000164ACAEAC mmcra:0X00000000 #Group 71 pm_rejects2, Reject events event:0X0470 mmcr0:0X00000000 mmcr1:0X00C000026464A808 mmcra:0X00000000 event:0X0471 mmcr0:0X00000000 mmcr1:0X00C000026464A808 mmcra:0X00000000 event:0X0472 mmcr0:0X00000000 mmcr1:0X00C000026464A808 mmcra:0X00000000 event:0X0473 mmcr0:0X00000000 mmcr1:0X00C000026464A808 mmcra:0X00000000 event:0X0474 mmcr0:0X00000000 mmcr1:0X00C000026464A808 mmcra:0X00000000 event:0X0475 mmcr0:0X00000000 mmcr1:0X00C000026464A808 mmcra:0X00000000 #Group 72 pm_rejects3, Set mispredictions rejects event:0X0480 mmcr0:0X00000000 mmcr1:0XCC000008A8A81E02 mmcra:0X00000000 event:0X0481 mmcr0:0X00000000 mmcr1:0XCC000008A8A81E02 mmcra:0X00000000 event:0X0482 mmcr0:0X00000000 mmcr1:0XCC000008A8A81E02 mmcra:0X00000000 event:0X0483 mmcr0:0X00000000 mmcr1:0XCC000008A8A81E02 mmcra:0X00000000 event:0X0484 mmcr0:0X00000000 mmcr1:0XCC000008A8A81E02 mmcra:0X00000000 event:0X0485 mmcr0:0X00000000 mmcr1:0XCC000008A8A81E02 mmcra:0X00000000 #Group 73 pm_lsu_reject, LSU Reject Event event:0X0490 mmcr0:0X00000000 mmcr1:0XCCC00008A4A4A602 mmcra:0X00000000 event:0X0491 mmcr0:0X00000000 mmcr1:0XCCC00008A4A4A602 mmcra:0X00000000 event:0X0492 mmcr0:0X00000000 mmcr1:0XCCC00008A4A4A602 mmcra:0X00000000 event:0X0493 mmcr0:0X00000000 mmcr1:0XCCC00008A4A4A602 mmcra:0X00000000 event:0X0494 mmcr0:0X00000000 mmcr1:0XCCC00008A4A4A602 mmcra:0X00000000 event:0X0495 mmcr0:0X00000000 mmcr1:0XCCC00008A4A4A602 mmcra:0X00000000 #Group 74 pm_lsu_ncld, Non cachable loads event:0X04A0 mmcr0:0X00000000 mmcr1:0XCCC000088C8C8E02 mmcra:0X00000000 event:0X04A1 mmcr0:0X00000000 mmcr1:0XCCC000088C8C8E02 mmcra:0X00000000 event:0X04A2 mmcr0:0X00000000 mmcr1:0XCCC000088C8C8E02 mmcra:0X00000000 event:0X04A3 mmcr0:0X00000000 mmcr1:0XCCC000088C8C8E02 mmcra:0X00000000 event:0X04A4 mmcr0:0X00000000 mmcr1:0XCCC000088C8C8E02 mmcra:0X00000000 event:0X04A5 mmcr0:0X00000000 mmcr1:0XCCC000088C8C8E02 mmcra:0X00000000 #Group 75 pm_gct1, GCT events event:0X04B0 mmcr0:0X00000000 mmcr1:0X00400000F808861E mmcra:0X00000000 event:0X04B1 mmcr0:0X00000000 mmcr1:0X00400000F808861E mmcra:0X00000000 event:0X04B2 mmcr0:0X00000000 mmcr1:0X00400000F808861E mmcra:0X00000000 event:0X04B3 mmcr0:0X00000000 mmcr1:0X00400000F808861E mmcra:0X00000000 event:0X04B4 mmcr0:0X00000000 mmcr1:0X00400000F808861E mmcra:0X00000000 event:0X04B5 mmcr0:0X00000000 mmcr1:0X00400000F808861E mmcra:0X00000000 #Group 76 pm_gct2, GCT Events event:0X04C0 mmcr0:0X00000000 mmcr1:0X222200009C9EA0A2 mmcra:0X00000000 event:0X04C1 mmcr0:0X00000000 mmcr1:0X222200009C9EA0A2 mmcra:0X00000000 event:0X04C2 mmcr0:0X00000000 mmcr1:0X222200009C9EA0A2 mmcra:0X00000000 event:0X04C3 mmcr0:0X00000000 mmcr1:0X222200009C9EA0A2 mmcra:0X00000000 event:0X04C4 mmcr0:0X00000000 mmcr1:0X222200009C9EA0A2 mmcra:0X00000000 event:0X04C5 mmcr0:0X00000000 mmcr1:0X222200009C9EA0A2 mmcra:0X00000000 #Group 77 pm_L2_castout_invalidate_1, L2 castout and invalidate events event:0X04D0 mmcr0:0X00000000 mmcr1:0X660020008082021E mmcra:0X00000000 event:0X04D1 mmcr0:0X00000000 mmcr1:0X660020008082021E mmcra:0X00000000 event:0X04D2 mmcr0:0X00000000 mmcr1:0X660020008082021E mmcra:0X00000000 event:0X04D3 mmcr0:0X00000000 mmcr1:0X660020008082021E mmcra:0X00000000 event:0X04D4 mmcr0:0X00000000 mmcr1:0X660020008082021E mmcra:0X00000000 event:0X04D5 mmcr0:0X00000000 mmcr1:0X660020008082021E mmcra:0X00000000 #Group 78 pm_L2_castout_invalidate_2, L2 castout and invalidate events event:0X04E0 mmcr0:0X00000000 mmcr1:0X660020008280021E mmcra:0X00000000 event:0X04E1 mmcr0:0X00000000 mmcr1:0X660020008280021E mmcra:0X00000000 event:0X04E2 mmcr0:0X00000000 mmcr1:0X660020008280021E mmcra:0X00000000 event:0X04E3 mmcr0:0X00000000 mmcr1:0X660020008280021E mmcra:0X00000000 event:0X04E4 mmcr0:0X00000000 mmcr1:0X660020008280021E mmcra:0X00000000 event:0X04E5 mmcr0:0X00000000 mmcr1:0X660020008280021E mmcra:0X00000000 #Group 79 pm_disp_held1, Dispatch held conditions event:0X04F0 mmcr0:0X00000000 mmcr1:0X00000000060606F2 mmcra:0X00000000 event:0X04F1 mmcr0:0X00000000 mmcr1:0X00000000060606F2 mmcra:0X00000000 event:0X04F2 mmcr0:0X00000000 mmcr1:0X00000000060606F2 mmcra:0X00000000 event:0X04F3 mmcr0:0X00000000 mmcr1:0X00000000060606F2 mmcra:0X00000000 event:0X04F4 mmcr0:0X00000000 mmcr1:0X00000000060606F2 mmcra:0X00000000 event:0X04F5 mmcr0:0X00000000 mmcr1:0X00000000060606F2 mmcra:0X00000000 #Group 80 pm_disp_held2, Dispatch held conditions event:0X0500 mmcr0:0X00000000 mmcr1:0X0000000016060606 mmcra:0X00000000 event:0X0501 mmcr0:0X00000000 mmcr1:0X0000000016060606 mmcra:0X00000000 event:0X0502 mmcr0:0X00000000 mmcr1:0X0000000016060606 mmcra:0X00000000 event:0X0503 mmcr0:0X00000000 mmcr1:0X0000000016060606 mmcra:0X00000000 event:0X0504 mmcr0:0X00000000 mmcr1:0X0000000016060606 mmcra:0X00000000 event:0X0505 mmcr0:0X00000000 mmcr1:0X0000000016060606 mmcra:0X00000000 #Group 81 pm_disp_clb_held, Display CLB held conditions event:0X0510 mmcr0:0X00000000 mmcr1:0X2222000092949698 mmcra:0X00000000 event:0X0511 mmcr0:0X00000000 mmcr1:0X2222000092949698 mmcra:0X00000000 event:0X0512 mmcr0:0X00000000 mmcr1:0X2222000092949698 mmcra:0X00000000 event:0X0513 mmcr0:0X00000000 mmcr1:0X2222000092949698 mmcra:0X00000000 event:0X0514 mmcr0:0X00000000 mmcr1:0X2222000092949698 mmcra:0X00000000 event:0X0515 mmcr0:0X00000000 mmcr1:0X2222000092949698 mmcra:0X00000000 #Group 82 pm_power, Power Events event:0X0520 mmcr0:0X00000000 mmcr1:0X000000006E6E6E6E mmcra:0X00000000 event:0X0521 mmcr0:0X00000000 mmcr1:0X000000006E6E6E6E mmcra:0X00000000 event:0X0522 mmcr0:0X00000000 mmcr1:0X000000006E6E6E6E mmcra:0X00000000 event:0X0523 mmcr0:0X00000000 mmcr1:0X000000006E6E6E6E mmcra:0X00000000 event:0X0524 mmcr0:0X00000000 mmcr1:0X000000006E6E6E6E mmcra:0X00000000 event:0X0525 mmcr0:0X00000000 mmcr1:0X000000006E6E6E6E mmcra:0X00000000 #Group 83 pm_dispatch1, Groups and instructions dispatched event:0X0530 mmcr0:0X00000000 mmcr1:0X00000000F2F20AF2 mmcra:0X00000000 event:0X0531 mmcr0:0X00000000 mmcr1:0X00000000F2F20AF2 mmcra:0X00000000 event:0X0532 mmcr0:0X00000000 mmcr1:0X00000000F2F20AF2 mmcra:0X00000000 event:0X0533 mmcr0:0X00000000 mmcr1:0X00000000F2F20AF2 mmcra:0X00000000 event:0X0534 mmcr0:0X00000000 mmcr1:0X00000000F2F20AF2 mmcra:0X00000000 event:0X0535 mmcr0:0X00000000 mmcr1:0X00000000F2F20AF2 mmcra:0X00000000 #Group 84 pm_dispatch2, Groups and instructions dispatched event:0X0540 mmcr0:0X00000000 mmcr1:0X00000000F21E02F2 mmcra:0X00000000 event:0X0541 mmcr0:0X00000000 mmcr1:0X00000000F21E02F2 mmcra:0X00000000 event:0X0542 mmcr0:0X00000000 mmcr1:0X00000000F21E02F2 mmcra:0X00000000 event:0X0543 mmcr0:0X00000000 mmcr1:0X00000000F21E02F2 mmcra:0X00000000 event:0X0544 mmcr0:0X00000000 mmcr1:0X00000000F21E02F2 mmcra:0X00000000 event:0X0545 mmcr0:0X00000000 mmcr1:0X00000000F21E02F2 mmcra:0X00000000 #Group 85 pm_ic, I cache operations event:0X0550 mmcr0:0X00000000 mmcr1:0X4444000F888C9098 mmcra:0X00000000 event:0X0551 mmcr0:0X00000000 mmcr1:0X4444000F888C9098 mmcra:0X00000000 event:0X0552 mmcr0:0X00000000 mmcr1:0X4444000F888C9098 mmcra:0X00000000 event:0X0553 mmcr0:0X00000000 mmcr1:0X4444000F888C9098 mmcra:0X00000000 event:0X0554 mmcr0:0X00000000 mmcr1:0X4444000F888C9098 mmcra:0X00000000 event:0X0555 mmcr0:0X00000000 mmcr1:0X4444000F888C9098 mmcra:0X00000000 #Group 86 pm_ic_pref_cancel, Instruction pre-fetched cancelled event:0X0560 mmcr0:0X00000000 mmcr1:0X4444000190929490 mmcra:0X00000000 event:0X0561 mmcr0:0X00000000 mmcr1:0X4444000190929490 mmcra:0X00000000 event:0X0562 mmcr0:0X00000000 mmcr1:0X4444000190929490 mmcra:0X00000000 event:0X0563 mmcr0:0X00000000 mmcr1:0X4444000190929490 mmcra:0X00000000 event:0X0564 mmcr0:0X00000000 mmcr1:0X4444000190929490 mmcra:0X00000000 event:0X0565 mmcr0:0X00000000 mmcr1:0X4444000190929490 mmcra:0X00000000 #Group 87 pm_ic_miss, Icache and Ierat miss events event:0X0570 mmcr0:0X00000000 mmcr1:0X00000000F6FC021E mmcra:0X00000000 event:0X0571 mmcr0:0X00000000 mmcr1:0X00000000F6FC021E mmcra:0X00000000 event:0X0572 mmcr0:0X00000000 mmcr1:0X00000000F6FC021E mmcra:0X00000000 event:0X0573 mmcr0:0X00000000 mmcr1:0X00000000F6FC021E mmcra:0X00000000 event:0X0574 mmcr0:0X00000000 mmcr1:0X00000000F6FC021E mmcra:0X00000000 event:0X0575 mmcr0:0X00000000 mmcr1:0X00000000F6FC021E mmcra:0X00000000 #Group 88 pm_cpi_stack1, CPI stack breakdown event:0X0580 mmcr0:0X00000000 mmcr1:0XC00000004016F618 mmcra:0X00000000 event:0X0581 mmcr0:0X00000000 mmcr1:0XC00000004016F618 mmcra:0X00000000 event:0X0582 mmcr0:0X00000000 mmcr1:0XC00000004016F618 mmcra:0X00000000 event:0X0583 mmcr0:0X00000000 mmcr1:0XC00000004016F618 mmcra:0X00000000 event:0X0584 mmcr0:0X00000000 mmcr1:0XC00000004016F618 mmcra:0X00000000 event:0X0585 mmcr0:0X00000000 mmcr1:0XC00000004016F618 mmcra:0X00000000 #Group 89 pm_cpi_stack2, CPI stack breakdown event:0X0590 mmcr0:0X00000000 mmcr1:0X000000000E140414 mmcra:0X00000000 event:0X0591 mmcr0:0X00000000 mmcr1:0X000000000E140414 mmcra:0X00000000 event:0X0592 mmcr0:0X00000000 mmcr1:0X000000000E140414 mmcra:0X00000000 event:0X0593 mmcr0:0X00000000 mmcr1:0X000000000E140414 mmcra:0X00000000 event:0X0594 mmcr0:0X00000000 mmcr1:0X000000000E140414 mmcra:0X00000000 event:0X0595 mmcr0:0X00000000 mmcr1:0X000000000E140414 mmcra:0X00000000 #Group 90 pm_cpi_stack3, CPI stack breakdown event:0X05A0 mmcr0:0X00000000 mmcr1:0X0000000026121A16 mmcra:0X00000000 event:0X05A1 mmcr0:0X00000000 mmcr1:0X0000000026121A16 mmcra:0X00000000 event:0X05A2 mmcr0:0X00000000 mmcr1:0X0000000026121A16 mmcra:0X00000000 event:0X05A3 mmcr0:0X00000000 mmcr1:0X0000000026121A16 mmcra:0X00000000 event:0X05A4 mmcr0:0X00000000 mmcr1:0X0000000026121A16 mmcra:0X00000000 event:0X05A5 mmcr0:0X00000000 mmcr1:0X0000000026121A16 mmcra:0X00000000 #Group 91 pm_cpi_stack4, CPI stack breakdown event:0X05B0 mmcr0:0X00000000 mmcr1:0X00000000F4183E12 mmcra:0X00000000 event:0X05B1 mmcr0:0X00000000 mmcr1:0X00000000F4183E12 mmcra:0X00000000 event:0X05B2 mmcr0:0X00000000 mmcr1:0X00000000F4183E12 mmcra:0X00000000 event:0X05B3 mmcr0:0X00000000 mmcr1:0X00000000F4183E12 mmcra:0X00000000 event:0X05B4 mmcr0:0X00000000 mmcr1:0X00000000F4183E12 mmcra:0X00000000 event:0X05B5 mmcr0:0X00000000 mmcr1:0X00000000F4183E12 mmcra:0X00000000 #Group 92 pm_cpi_stack5, CPI stack breakdown event:0X05C0 mmcr0:0X00000000 mmcr1:0X00000000281C3F0A mmcra:0X00000000 event:0X05C1 mmcr0:0X00000000 mmcr1:0X00000000281C3F0A mmcra:0X00000000 event:0X05C2 mmcr0:0X00000000 mmcr1:0X00000000281C3F0A mmcra:0X00000000 event:0X05C3 mmcr0:0X00000000 mmcr1:0X00000000281C3F0A mmcra:0X00000000 event:0X05C4 mmcr0:0X00000000 mmcr1:0X00000000281C3F0A mmcra:0X00000000 event:0X05C5 mmcr0:0X00000000 mmcr1:0X00000000281C3F0A mmcra:0X00000000 #Group 93 pm_cpi_stack6, CPI stack breakdown event:0X05D0 mmcr0:0X00000000 mmcr1:0X000000001C3C021C mmcra:0X00000000 event:0X05D1 mmcr0:0X00000000 mmcr1:0X000000001C3C021C mmcra:0X00000000 event:0X05D2 mmcr0:0X00000000 mmcr1:0X000000001C3C021C mmcra:0X00000000 event:0X05D3 mmcr0:0X00000000 mmcr1:0X000000001C3C021C mmcra:0X00000000 event:0X05D4 mmcr0:0X00000000 mmcr1:0X000000001C3C021C mmcra:0X00000000 event:0X05D5 mmcr0:0X00000000 mmcr1:0X000000001C3C021C mmcra:0X00000000 #Group 94 pm_cpi_stack7, CPI stack breakdown event:0X05E0 mmcr0:0X00000000 mmcr1:0X00000000F81A141A mmcra:0X00000000 event:0X05E1 mmcr0:0X00000000 mmcr1:0X00000000F81A141A mmcra:0X00000000 event:0X05E2 mmcr0:0X00000000 mmcr1:0X00000000F81A141A mmcra:0X00000000 event:0X05E3 mmcr0:0X00000000 mmcr1:0X00000000F81A141A mmcra:0X00000000 event:0X05E4 mmcr0:0X00000000 mmcr1:0X00000000F81A141A mmcra:0X00000000 event:0X05E5 mmcr0:0X00000000 mmcr1:0X00000000F81A141A mmcra:0X00000000 #Group 95 pm_cpi_stack8, CPI stack breakdown event:0X05F0 mmcr0:0X00000000 mmcr1:0X00000000F24AF24A mmcra:0X00000000 event:0X05F1 mmcr0:0X00000000 mmcr1:0X00000000F24AF24A mmcra:0X00000000 event:0X05F2 mmcr0:0X00000000 mmcr1:0X00000000F24AF24A mmcra:0X00000000 event:0X05F3 mmcr0:0X00000000 mmcr1:0X00000000F24AF24A mmcra:0X00000000 event:0X05F4 mmcr0:0X00000000 mmcr1:0X00000000F24AF24A mmcra:0X00000000 event:0X05F5 mmcr0:0X00000000 mmcr1:0X00000000F24AF24A mmcra:0X00000000 #Group 96 pm_cpi_stack9, CPI stack breakdown event:0X0600 mmcr0:0X00000000 mmcr1:0X000000001C3C020B mmcra:0X00000000 event:0X0601 mmcr0:0X00000000 mmcr1:0X000000001C3C020B mmcra:0X00000000 event:0X0602 mmcr0:0X00000000 mmcr1:0X000000001C3C020B mmcra:0X00000000 event:0X0603 mmcr0:0X00000000 mmcr1:0X000000001C3C020B mmcra:0X00000000 event:0X0604 mmcr0:0X00000000 mmcr1:0X000000001C3C020B mmcra:0X00000000 event:0X0605 mmcr0:0X00000000 mmcr1:0X000000001C3C020B mmcra:0X00000000 #Group 97 pm_cpi_stack10, CPI stack breakdown event:0X0610 mmcr0:0X00000000 mmcr1:0X00000000F216F618 mmcra:0X00000000 event:0X0611 mmcr0:0X00000000 mmcr1:0X00000000F216F618 mmcra:0X00000000 event:0X0612 mmcr0:0X00000000 mmcr1:0X00000000F216F618 mmcra:0X00000000 event:0X0613 mmcr0:0X00000000 mmcr1:0X00000000F216F618 mmcra:0X00000000 event:0X0614 mmcr0:0X00000000 mmcr1:0X00000000F216F618 mmcra:0X00000000 event:0X0615 mmcr0:0X00000000 mmcr1:0X00000000F216F618 mmcra:0X00000000 #Group 98 pm_dsource1, Data source information event:0X0620 mmcr0:0X00000000 mmcr1:0XCCCC000040404242 mmcra:0X00000000 event:0X0621 mmcr0:0X00000000 mmcr1:0XCCCC000040404242 mmcra:0X00000000 event:0X0622 mmcr0:0X00000000 mmcr1:0XCCCC000040404242 mmcra:0X00000000 event:0X0623 mmcr0:0X00000000 mmcr1:0XCCCC000040404242 mmcra:0X00000000 event:0X0624 mmcr0:0X00000000 mmcr1:0XCCCC000040404242 mmcra:0X00000000 event:0X0625 mmcr0:0X00000000 mmcr1:0XCCCC000040404242 mmcra:0X00000000 #Group 99 pm_dsource2, Data source information event:0X0630 mmcr0:0X00000000 mmcr1:0XCCCC000048464A48 mmcra:0X00000000 event:0X0631 mmcr0:0X00000000 mmcr1:0XCCCC000048464A48 mmcra:0X00000000 event:0X0632 mmcr0:0X00000000 mmcr1:0XCCCC000048464A48 mmcra:0X00000000 event:0X0633 mmcr0:0X00000000 mmcr1:0XCCCC000048464A48 mmcra:0X00000000 event:0X0634 mmcr0:0X00000000 mmcr1:0XCCCC000048464A48 mmcra:0X00000000 event:0X0635 mmcr0:0X00000000 mmcr1:0XCCCC000048464A48 mmcra:0X00000000 #Group 100 pm_dsource3, Data source information event:0X0640 mmcr0:0X00000000 mmcr1:0XCCCC00004A484648 mmcra:0X00000000 event:0X0641 mmcr0:0X00000000 mmcr1:0XCCCC00004A484648 mmcra:0X00000000 event:0X0642 mmcr0:0X00000000 mmcr1:0XCCCC00004A484648 mmcra:0X00000000 event:0X0643 mmcr0:0X00000000 mmcr1:0XCCCC00004A484648 mmcra:0X00000000 event:0X0644 mmcr0:0X00000000 mmcr1:0XCCCC00004A484648 mmcra:0X00000000 event:0X0645 mmcr0:0X00000000 mmcr1:0XCCCC00004A484648 mmcra:0X00000000 #Group 101 pm_dsource4, Data source information event:0X0650 mmcr0:0X00000000 mmcr1:0XCCCC000044444C44 mmcra:0X00000000 event:0X0651 mmcr0:0X00000000 mmcr1:0XCCCC000044444C44 mmcra:0X00000000 event:0X0652 mmcr0:0X00000000 mmcr1:0XCCCC000044444C44 mmcra:0X00000000 event:0X0653 mmcr0:0X00000000 mmcr1:0XCCCC000044444C44 mmcra:0X00000000 event:0X0654 mmcr0:0X00000000 mmcr1:0XCCCC000044444C44 mmcra:0X00000000 event:0X0655 mmcr0:0X00000000 mmcr1:0XCCCC000044444C44 mmcra:0X00000000 #Group 102 pm_dsource5, Data source information event:0X0660 mmcr0:0X00000000 mmcr1:0XCCCC00004E424446 mmcra:0X00000000 event:0X0661 mmcr0:0X00000000 mmcr1:0XCCCC00004E424446 mmcra:0X00000000 event:0X0662 mmcr0:0X00000000 mmcr1:0XCCCC00004E424446 mmcra:0X00000000 event:0X0663 mmcr0:0X00000000 mmcr1:0XCCCC00004E424446 mmcra:0X00000000 event:0X0664 mmcr0:0X00000000 mmcr1:0XCCCC00004E424446 mmcra:0X00000000 event:0X0665 mmcr0:0X00000000 mmcr1:0XCCCC00004E424446 mmcra:0X00000000 #Group 103 pm_dsource6, Data source information event:0X0670 mmcr0:0X00000000 mmcr1:0XCCCC000042444E48 mmcra:0X00000000 event:0X0671 mmcr0:0X00000000 mmcr1:0XCCCC000042444E48 mmcra:0X00000000 event:0X0672 mmcr0:0X00000000 mmcr1:0XCCCC000042444E48 mmcra:0X00000000 event:0X0673 mmcr0:0X00000000 mmcr1:0XCCCC000042444E48 mmcra:0X00000000 event:0X0674 mmcr0:0X00000000 mmcr1:0XCCCC000042444E48 mmcra:0X00000000 event:0X0675 mmcr0:0X00000000 mmcr1:0XCCCC000042444E48 mmcra:0X00000000 #Group 104 pm_dsource7, Data source information event:0X0680 mmcr0:0X00000000 mmcr1:0XCCCC00004C484C44 mmcra:0X00000000 event:0X0681 mmcr0:0X00000000 mmcr1:0XCCCC00004C484C44 mmcra:0X00000000 event:0X0682 mmcr0:0X00000000 mmcr1:0XCCCC00004C484C44 mmcra:0X00000000 event:0X0683 mmcr0:0X00000000 mmcr1:0XCCCC00004C484C44 mmcra:0X00000000 event:0X0684 mmcr0:0X00000000 mmcr1:0XCCCC00004C484C44 mmcra:0X00000000 event:0X0685 mmcr0:0X00000000 mmcr1:0XCCCC00004C484C44 mmcra:0X00000000 #Group 105 pm_dsource8, Data source information event:0X0690 mmcr0:0X00000000 mmcr1:0X0C0C00000240FE42 mmcra:0X00000000 event:0X0691 mmcr0:0X00000000 mmcr1:0X0C0C00000240FE42 mmcra:0X00000000 event:0X0692 mmcr0:0X00000000 mmcr1:0X0C0C00000240FE42 mmcra:0X00000000 event:0X0693 mmcr0:0X00000000 mmcr1:0X0C0C00000240FE42 mmcra:0X00000000 event:0X0694 mmcr0:0X00000000 mmcr1:0X0C0C00000240FE42 mmcra:0X00000000 event:0X0695 mmcr0:0X00000000 mmcr1:0X0C0C00000240FE42 mmcra:0X00000000 #Group 106 pm_dsource9, Data source information event:0X06A0 mmcr0:0X00000000 mmcr1:0XC000000040FEF6F0 mmcra:0X00000000 event:0X06A1 mmcr0:0X00000000 mmcr1:0XC000000040FEF6F0 mmcra:0X00000000 event:0X06A2 mmcr0:0X00000000 mmcr1:0XC000000040FEF6F0 mmcra:0X00000000 event:0X06A3 mmcr0:0X00000000 mmcr1:0XC000000040FEF6F0 mmcra:0X00000000 event:0X06A4 mmcr0:0X00000000 mmcr1:0XC000000040FEF6F0 mmcra:0X00000000 event:0X06A5 mmcr0:0X00000000 mmcr1:0XC000000040FEF6F0 mmcra:0X00000000 #Group 107 pm_dsource10, Data source information event:0X06B0 mmcr0:0X00000000 mmcr1:0XCCCC000042444444 mmcra:0X00000000 event:0X06B1 mmcr0:0X00000000 mmcr1:0XCCCC000042444444 mmcra:0X00000000 event:0X06B2 mmcr0:0X00000000 mmcr1:0XCCCC000042444444 mmcra:0X00000000 event:0X06B3 mmcr0:0X00000000 mmcr1:0XCCCC000042444444 mmcra:0X00000000 event:0X06B4 mmcr0:0X00000000 mmcr1:0XCCCC000042444444 mmcra:0X00000000 event:0X06B5 mmcr0:0X00000000 mmcr1:0XCCCC000042444444 mmcra:0X00000000 #Group 108 pm_dsource11, Data source information event:0X06C0 mmcr0:0X00000000 mmcr1:0XC000000040FEFEFA mmcra:0X00000000 event:0X06C1 mmcr0:0X00000000 mmcr1:0XC000000040FEFEFA mmcra:0X00000000 event:0X06C2 mmcr0:0X00000000 mmcr1:0XC000000040FEFEFA mmcra:0X00000000 event:0X06C3 mmcr0:0X00000000 mmcr1:0XC000000040FEFEFA mmcra:0X00000000 event:0X06C4 mmcr0:0X00000000 mmcr1:0XC000000040FEFEFA mmcra:0X00000000 event:0X06C5 mmcr0:0X00000000 mmcr1:0XC000000040FEFEFA mmcra:0X00000000 #Group 109 pm_dsource12, Data source information event:0X06D0 mmcr0:0X00000000 mmcr1:0XCCCC000042424242 mmcra:0X00000000 event:0X06D1 mmcr0:0X00000000 mmcr1:0XCCCC000042424242 mmcra:0X00000000 event:0X06D2 mmcr0:0X00000000 mmcr1:0XCCCC000042424242 mmcra:0X00000000 event:0X06D3 mmcr0:0X00000000 mmcr1:0XCCCC000042424242 mmcra:0X00000000 event:0X06D4 mmcr0:0X00000000 mmcr1:0XCCCC000042424242 mmcra:0X00000000 event:0X06D5 mmcr0:0X00000000 mmcr1:0XCCCC000042424242 mmcra:0X00000000 #Group 110 pm_dsource13, Data source information event:0X06E0 mmcr0:0X00000000 mmcr1:0XC0CC00005C024444 mmcra:0X00000000 event:0X06E1 mmcr0:0X00000000 mmcr1:0XC0CC00005C024444 mmcra:0X00000000 event:0X06E2 mmcr0:0X00000000 mmcr1:0XC0CC00005C024444 mmcra:0X00000000 event:0X06E3 mmcr0:0X00000000 mmcr1:0XC0CC00005C024444 mmcra:0X00000000 event:0X06E4 mmcr0:0X00000000 mmcr1:0XC0CC00005C024444 mmcra:0X00000000 event:0X06E5 mmcr0:0X00000000 mmcr1:0XC0CC00005C024444 mmcra:0X00000000 #Group 111 pm_dsource14, Data source information event:0X06F0 mmcr0:0X00000000 mmcr1:0XC0CC00004A024242 mmcra:0X00000000 event:0X06F1 mmcr0:0X00000000 mmcr1:0XC0CC00004A024242 mmcra:0X00000000 event:0X06F2 mmcr0:0X00000000 mmcr1:0XC0CC00004A024242 mmcra:0X00000000 event:0X06F3 mmcr0:0X00000000 mmcr1:0XC0CC00004A024242 mmcra:0X00000000 event:0X06F4 mmcr0:0X00000000 mmcr1:0XC0CC00004A024242 mmcra:0X00000000 event:0X06F5 mmcr0:0X00000000 mmcr1:0XC0CC00004A024242 mmcra:0X00000000 #Group 112 pm_dsource15, Data source information event:0X0700 mmcr0:0X00000000 mmcr1:0XC00C00004A02F642 mmcra:0X00000000 event:0X0701 mmcr0:0X00000000 mmcr1:0XC00C00004A02F642 mmcra:0X00000000 event:0X0702 mmcr0:0X00000000 mmcr1:0XC00C00004A02F642 mmcra:0X00000000 event:0X0703 mmcr0:0X00000000 mmcr1:0XC00C00004A02F642 mmcra:0X00000000 event:0X0704 mmcr0:0X00000000 mmcr1:0XC00C00004A02F642 mmcra:0X00000000 event:0X0705 mmcr0:0X00000000 mmcr1:0XC00C00004A02F642 mmcra:0X00000000 #Group 113 pm_isource1, Instruction source information event:0X0710 mmcr0:0X00000000 mmcr1:0X4444000040404A48 mmcra:0X00000000 event:0X0711 mmcr0:0X00000000 mmcr1:0X4444000040404A48 mmcra:0X00000000 event:0X0712 mmcr0:0X00000000 mmcr1:0X4444000040404A48 mmcra:0X00000000 event:0X0713 mmcr0:0X00000000 mmcr1:0X4444000040404A48 mmcra:0X00000000 event:0X0714 mmcr0:0X00000000 mmcr1:0X4444000040404A48 mmcra:0X00000000 event:0X0715 mmcr0:0X00000000 mmcr1:0X4444000040404A48 mmcra:0X00000000 #Group 114 pm_isource2, Instruction source information event:0X0720 mmcr0:0X00000000 mmcr1:0X4444000048424C42 mmcra:0X00000000 event:0X0721 mmcr0:0X00000000 mmcr1:0X4444000048424C42 mmcra:0X00000000 event:0X0722 mmcr0:0X00000000 mmcr1:0X4444000048424C42 mmcra:0X00000000 event:0X0723 mmcr0:0X00000000 mmcr1:0X4444000048424C42 mmcra:0X00000000 event:0X0724 mmcr0:0X00000000 mmcr1:0X4444000048424C42 mmcra:0X00000000 event:0X0725 mmcr0:0X00000000 mmcr1:0X4444000048424C42 mmcra:0X00000000 #Group 115 pm_isource3, Instruction source information event:0X0730 mmcr0:0X00000000 mmcr1:0X444400004A484444 mmcra:0X00000000 event:0X0731 mmcr0:0X00000000 mmcr1:0X444400004A484444 mmcra:0X00000000 event:0X0732 mmcr0:0X00000000 mmcr1:0X444400004A484444 mmcra:0X00000000 event:0X0733 mmcr0:0X00000000 mmcr1:0X444400004A484444 mmcra:0X00000000 event:0X0734 mmcr0:0X00000000 mmcr1:0X444400004A484444 mmcra:0X00000000 event:0X0735 mmcr0:0X00000000 mmcr1:0X444400004A484444 mmcra:0X00000000 #Group 116 pm_isource4, Instruction source information event:0X0740 mmcr0:0X00000000 mmcr1:0X4444000044464646 mmcra:0X00000000 event:0X0741 mmcr0:0X00000000 mmcr1:0X4444000044464646 mmcra:0X00000000 event:0X0742 mmcr0:0X00000000 mmcr1:0X4444000044464646 mmcra:0X00000000 event:0X0743 mmcr0:0X00000000 mmcr1:0X4444000044464646 mmcra:0X00000000 event:0X0744 mmcr0:0X00000000 mmcr1:0X4444000044464646 mmcra:0X00000000 event:0X0745 mmcr0:0X00000000 mmcr1:0X4444000044464646 mmcra:0X00000000 #Group 117 pm_isource5, Instruction source information event:0X0750 mmcr0:0X00000000 mmcr1:0X444400004E444E48 mmcra:0X00000000 event:0X0751 mmcr0:0X00000000 mmcr1:0X444400004E444E48 mmcra:0X00000000 event:0X0752 mmcr0:0X00000000 mmcr1:0X444400004E444E48 mmcra:0X00000000 event:0X0753 mmcr0:0X00000000 mmcr1:0X444400004E444E48 mmcra:0X00000000 event:0X0754 mmcr0:0X00000000 mmcr1:0X444400004E444E48 mmcra:0X00000000 event:0X0755 mmcr0:0X00000000 mmcr1:0X444400004E444E48 mmcra:0X00000000 #Group 118 pm_isource6, Instruction source information event:0X0760 mmcr0:0X00000000 mmcr1:0X4444000046484A48 mmcra:0X00000000 event:0X0761 mmcr0:0X00000000 mmcr1:0X4444000046484A48 mmcra:0X00000000 event:0X0762 mmcr0:0X00000000 mmcr1:0X4444000046484A48 mmcra:0X00000000 event:0X0763 mmcr0:0X00000000 mmcr1:0X4444000046484A48 mmcra:0X00000000 event:0X0764 mmcr0:0X00000000 mmcr1:0X4444000046484A48 mmcra:0X00000000 event:0X0765 mmcr0:0X00000000 mmcr1:0X4444000046484A48 mmcra:0X00000000 #Group 119 pm_isource7, Instruction source information event:0X0770 mmcr0:0X00000000 mmcr1:0X4444000042444444 mmcra:0X00000000 event:0X0771 mmcr0:0X00000000 mmcr1:0X4444000042444444 mmcra:0X00000000 event:0X0772 mmcr0:0X00000000 mmcr1:0X4444000042444444 mmcra:0X00000000 event:0X0773 mmcr0:0X00000000 mmcr1:0X4444000042444444 mmcra:0X00000000 event:0X0774 mmcr0:0X00000000 mmcr1:0X4444000042444444 mmcra:0X00000000 event:0X0775 mmcr0:0X00000000 mmcr1:0X4444000042444444 mmcra:0X00000000 #Group 120 pm_isource8, Instruction source information event:0X0780 mmcr0:0X00000000 mmcr1:0X444400004C484A48 mmcra:0X00000000 event:0X0781 mmcr0:0X00000000 mmcr1:0X444400004C484A48 mmcra:0X00000000 event:0X0782 mmcr0:0X00000000 mmcr1:0X444400004C484A48 mmcra:0X00000000 event:0X0783 mmcr0:0X00000000 mmcr1:0X444400004C484A48 mmcra:0X00000000 event:0X0784 mmcr0:0X00000000 mmcr1:0X444400004C484A48 mmcra:0X00000000 event:0X0785 mmcr0:0X00000000 mmcr1:0X444400004C484A48 mmcra:0X00000000 #Group 121 pm_isource9, Instruction source information event:0X0790 mmcr0:0X00000000 mmcr1:0X4444000046424242 mmcra:0X00000000 event:0X0791 mmcr0:0X00000000 mmcr1:0X4444000046424242 mmcra:0X00000000 event:0X0792 mmcr0:0X00000000 mmcr1:0X4444000046424242 mmcra:0X00000000 event:0X0793 mmcr0:0X00000000 mmcr1:0X4444000046424242 mmcra:0X00000000 event:0X0794 mmcr0:0X00000000 mmcr1:0X4444000046424242 mmcra:0X00000000 event:0X0795 mmcr0:0X00000000 mmcr1:0X4444000046424242 mmcra:0X00000000 #Group 122 pm_isource10, Instruction source information event:0X07A0 mmcr0:0X00000000 mmcr1:0X440000004040021E mmcra:0X00000000 event:0X07A1 mmcr0:0X00000000 mmcr1:0X440000004040021E mmcra:0X00000000 event:0X07A2 mmcr0:0X00000000 mmcr1:0X440000004040021E mmcra:0X00000000 event:0X07A3 mmcr0:0X00000000 mmcr1:0X440000004040021E mmcra:0X00000000 event:0X07A4 mmcr0:0X00000000 mmcr1:0X440000004040021E mmcra:0X00000000 event:0X07A5 mmcr0:0X00000000 mmcr1:0X440000004040021E mmcra:0X00000000 #Group 123 pm_isource11, Instruction source information event:0X07B0 mmcr0:0X00000000 mmcr1:0X4440000042444A02 mmcra:0X00000000 event:0X07B1 mmcr0:0X00000000 mmcr1:0X4440000042444A02 mmcra:0X00000000 event:0X07B2 mmcr0:0X00000000 mmcr1:0X4440000042444A02 mmcra:0X00000000 event:0X07B3 mmcr0:0X00000000 mmcr1:0X4440000042444A02 mmcra:0X00000000 event:0X07B4 mmcr0:0X00000000 mmcr1:0X4440000042444A02 mmcra:0X00000000 event:0X07B5 mmcr0:0X00000000 mmcr1:0X4440000042444A02 mmcra:0X00000000 #Group 124 pm_isource12, Instruction source information event:0X07C0 mmcr0:0X00000000 mmcr1:0X004400001E024444 mmcra:0X00000000 event:0X07C1 mmcr0:0X00000000 mmcr1:0X004400001E024444 mmcra:0X00000000 event:0X07C2 mmcr0:0X00000000 mmcr1:0X004400001E024444 mmcra:0X00000000 event:0X07C3 mmcr0:0X00000000 mmcr1:0X004400001E024444 mmcra:0X00000000 event:0X07C4 mmcr0:0X00000000 mmcr1:0X004400001E024444 mmcra:0X00000000 event:0X07C5 mmcr0:0X00000000 mmcr1:0X004400001E024444 mmcra:0X00000000 #Group 125 pm_isource13, Instruction source information event:0X07D0 mmcr0:0X00000000 mmcr1:0X404400004A024242 mmcra:0X00000000 event:0X07D1 mmcr0:0X00000000 mmcr1:0X404400004A024242 mmcra:0X00000000 event:0X07D2 mmcr0:0X00000000 mmcr1:0X404400004A024242 mmcra:0X00000000 event:0X07D3 mmcr0:0X00000000 mmcr1:0X404400004A024242 mmcra:0X00000000 event:0X07D4 mmcr0:0X00000000 mmcr1:0X404400004A024242 mmcra:0X00000000 event:0X07D5 mmcr0:0X00000000 mmcr1:0X404400004A024242 mmcra:0X00000000 #Group 126 pm_prefetch1, Prefetch events event:0X07E0 mmcr0:0X00000000 mmcr1:0XDDDD000FA8ACB4B8 mmcra:0X00000000 event:0X07E1 mmcr0:0X00000000 mmcr1:0XDDDD000FA8ACB4B8 mmcra:0X00000000 event:0X07E2 mmcr0:0X00000000 mmcr1:0XDDDD000FA8ACB4B8 mmcra:0X00000000 event:0X07E3 mmcr0:0X00000000 mmcr1:0XDDDD000FA8ACB4B8 mmcra:0X00000000 event:0X07E4 mmcr0:0X00000000 mmcr1:0XDDDD000FA8ACB4B8 mmcra:0X00000000 event:0X07E5 mmcr0:0X00000000 mmcr1:0XDDDD000FA8ACB4B8 mmcra:0X00000000 #Group 127 pm_prefetch2, Prefetch events event:0X07F0 mmcr0:0X00000000 mmcr1:0XDC00000CBC8066F0 mmcra:0X00000000 event:0X07F1 mmcr0:0X00000000 mmcr1:0XDC00000CBC8066F0 mmcra:0X00000000 event:0X07F2 mmcr0:0X00000000 mmcr1:0XDC00000CBC8066F0 mmcra:0X00000000 event:0X07F3 mmcr0:0X00000000 mmcr1:0XDC00000CBC8066F0 mmcra:0X00000000 event:0X07F4 mmcr0:0X00000000 mmcr1:0XDC00000CBC8066F0 mmcra:0X00000000 event:0X07F5 mmcr0:0X00000000 mmcr1:0XDC00000CBC8066F0 mmcra:0X00000000 #Group 128 pm_vsu0, VSU Execution event:0X0800 mmcr0:0X00000000 mmcr1:0XAAAA00008082989A mmcra:0X00000000 event:0X0801 mmcr0:0X00000000 mmcr1:0XAAAA00008082989A mmcra:0X00000000 event:0X0802 mmcr0:0X00000000 mmcr1:0XAAAA00008082989A mmcra:0X00000000 event:0X0803 mmcr0:0X00000000 mmcr1:0XAAAA00008082989A mmcra:0X00000000 event:0X0804 mmcr0:0X00000000 mmcr1:0XAAAA00008082989A mmcra:0X00000000 event:0X0805 mmcr0:0X00000000 mmcr1:0XAAAA00008082989A mmcra:0X00000000 #Group 129 pm_vsu1, VSU Execution event:0X0810 mmcr0:0X00000000 mmcr1:0XAAAA00009C9EA0A2 mmcra:0X00000000 event:0X0811 mmcr0:0X00000000 mmcr1:0XAAAA00009C9EA0A2 mmcra:0X00000000 event:0X0812 mmcr0:0X00000000 mmcr1:0XAAAA00009C9EA0A2 mmcra:0X00000000 event:0X0813 mmcr0:0X00000000 mmcr1:0XAAAA00009C9EA0A2 mmcra:0X00000000 event:0X0814 mmcr0:0X00000000 mmcr1:0XAAAA00009C9EA0A2 mmcra:0X00000000 event:0X0815 mmcr0:0X00000000 mmcr1:0XAAAA00009C9EA0A2 mmcra:0X00000000 #Group 130 pm_vsu2, VSU Execution event:0X0820 mmcr0:0X00000000 mmcr1:0XAAAA000C988C8C8E mmcra:0X00000000 event:0X0821 mmcr0:0X00000000 mmcr1:0XAAAA000C988C8C8E mmcra:0X00000000 event:0X0822 mmcr0:0X00000000 mmcr1:0XAAAA000C988C8C8E mmcra:0X00000000 event:0X0823 mmcr0:0X00000000 mmcr1:0XAAAA000C988C8C8E mmcra:0X00000000 event:0X0824 mmcr0:0X00000000 mmcr1:0XAAAA000C988C8C8E mmcra:0X00000000 event:0X0825 mmcr0:0X00000000 mmcr1:0XAAAA000C988C8C8E mmcra:0X00000000 #Group 131 pm_vsu3, VSU Execution event:0X0830 mmcr0:0X00000000 mmcr1:0XAAA0000284868402 mmcra:0X00000000 event:0X0831 mmcr0:0X00000000 mmcr1:0XAAA0000284868402 mmcra:0X00000000 event:0X0832 mmcr0:0X00000000 mmcr1:0XAAA0000284868402 mmcra:0X00000000 event:0X0833 mmcr0:0X00000000 mmcr1:0XAAA0000284868402 mmcra:0X00000000 event:0X0834 mmcr0:0X00000000 mmcr1:0XAAA0000284868402 mmcra:0X00000000 event:0X0835 mmcr0:0X00000000 mmcr1:0XAAA0000284868402 mmcra:0X00000000 #Group 132 pm_vsu4, VSU Execution event:0X0840 mmcr0:0X00000000 mmcr1:0XAAA0000290929002 mmcra:0X00000000 event:0X0841 mmcr0:0X00000000 mmcr1:0XAAA0000290929002 mmcra:0X00000000 event:0X0842 mmcr0:0X00000000 mmcr1:0XAAA0000290929002 mmcra:0X00000000 event:0X0843 mmcr0:0X00000000 mmcr1:0XAAA0000290929002 mmcra:0X00000000 event:0X0844 mmcr0:0X00000000 mmcr1:0XAAA0000290929002 mmcra:0X00000000 event:0X0845 mmcr0:0X00000000 mmcr1:0XAAA0000290929002 mmcra:0X00000000 #Group 133 pm_vsu5, VSU Execution event:0X0850 mmcr0:0X00000000 mmcr1:0XBBB0000880808202 mmcra:0X00000000 event:0X0851 mmcr0:0X00000000 mmcr1:0XBBB0000880808202 mmcra:0X00000000 event:0X0852 mmcr0:0X00000000 mmcr1:0XBBB0000880808202 mmcra:0X00000000 event:0X0853 mmcr0:0X00000000 mmcr1:0XBBB0000880808202 mmcra:0X00000000 event:0X0854 mmcr0:0X00000000 mmcr1:0XBBB0000880808202 mmcra:0X00000000 event:0X0855 mmcr0:0X00000000 mmcr1:0XBBB0000880808202 mmcra:0X00000000 #Group 134 pm_vsu6, VSU Execution event:0X0860 mmcr0:0X00000000 mmcr1:0XAAA00008ACACAE02 mmcra:0X00000000 event:0X0861 mmcr0:0X00000000 mmcr1:0XAAA00008ACACAE02 mmcra:0X00000000 event:0X0862 mmcr0:0X00000000 mmcr1:0XAAA00008ACACAE02 mmcra:0X00000000 event:0X0863 mmcr0:0X00000000 mmcr1:0XAAA00008ACACAE02 mmcra:0X00000000 event:0X0864 mmcr0:0X00000000 mmcr1:0XAAA00008ACACAE02 mmcra:0X00000000 event:0X0865 mmcr0:0X00000000 mmcr1:0XAAA00008ACACAE02 mmcra:0X00000000 #Group 135 pm_vsu7, VSU Execution event:0X0870 mmcr0:0X00000000 mmcr1:0XAAA00008BCBCBE02 mmcra:0X00000000 event:0X0871 mmcr0:0X00000000 mmcr1:0XAAA00008BCBCBE02 mmcra:0X00000000 event:0X0872 mmcr0:0X00000000 mmcr1:0XAAA00008BCBCBE02 mmcra:0X00000000 event:0X0873 mmcr0:0X00000000 mmcr1:0XAAA00008BCBCBE02 mmcra:0X00000000 event:0X0874 mmcr0:0X00000000 mmcr1:0XAAA00008BCBCBE02 mmcra:0X00000000 event:0X0875 mmcr0:0X00000000 mmcr1:0XAAA00008BCBCBE02 mmcra:0X00000000 #Group 136 pm_vsu8, VSU Execution event:0X0880 mmcr0:0X00000000 mmcr1:0XBBB000088C8C8E02 mmcra:0X00000000 event:0X0881 mmcr0:0X00000000 mmcr1:0XBBB000088C8C8E02 mmcra:0X00000000 event:0X0882 mmcr0:0X00000000 mmcr1:0XBBB000088C8C8E02 mmcra:0X00000000 event:0X0883 mmcr0:0X00000000 mmcr1:0XBBB000088C8C8E02 mmcra:0X00000000 event:0X0884 mmcr0:0X00000000 mmcr1:0XBBB000088C8C8E02 mmcra:0X00000000 event:0X0885 mmcr0:0X00000000 mmcr1:0XBBB000088C8C8E02 mmcra:0X00000000 #Group 137 pm_vsu9, VSU Execution event:0X0890 mmcr0:0X00000000 mmcr1:0XAAAA0008A8A8AAA4 mmcra:0X00000000 event:0X0891 mmcr0:0X00000000 mmcr1:0XAAAA0008A8A8AAA4 mmcra:0X00000000 event:0X0892 mmcr0:0X00000000 mmcr1:0XAAAA0008A8A8AAA4 mmcra:0X00000000 event:0X0893 mmcr0:0X00000000 mmcr1:0XAAAA0008A8A8AAA4 mmcra:0X00000000 event:0X0894 mmcr0:0X00000000 mmcr1:0XAAAA0008A8A8AAA4 mmcra:0X00000000 event:0X0895 mmcr0:0X00000000 mmcr1:0XAAAA0008A8A8AAA4 mmcra:0X00000000 #Group 138 pm_vsu10, VSU Execution event:0X08A0 mmcr0:0X00000000 mmcr1:0XAAA0000888888A02 mmcra:0X00000000 event:0X08A1 mmcr0:0X00000000 mmcr1:0XAAA0000888888A02 mmcra:0X00000000 event:0X08A2 mmcr0:0X00000000 mmcr1:0XAAA0000888888A02 mmcra:0X00000000 event:0X08A3 mmcr0:0X00000000 mmcr1:0XAAA0000888888A02 mmcra:0X00000000 event:0X08A4 mmcr0:0X00000000 mmcr1:0XAAA0000888888A02 mmcra:0X00000000 event:0X08A5 mmcr0:0X00000000 mmcr1:0XAAA0000888888A02 mmcra:0X00000000 #Group 139 pm_vsu11, VSU Execution event:0X08B0 mmcr0:0X00000000 mmcr1:0XAAA0000894949602 mmcra:0X00000000 event:0X08B1 mmcr0:0X00000000 mmcr1:0XAAA0000894949602 mmcra:0X00000000 event:0X08B2 mmcr0:0X00000000 mmcr1:0XAAA0000894949602 mmcra:0X00000000 event:0X08B3 mmcr0:0X00000000 mmcr1:0XAAA0000894949602 mmcra:0X00000000 event:0X08B4 mmcr0:0X00000000 mmcr1:0XAAA0000894949602 mmcra:0X00000000 event:0X08B5 mmcr0:0X00000000 mmcr1:0XAAA0000894949602 mmcra:0X00000000 #Group 140 pm_vsu12, VSU Execution event:0X08C0 mmcr0:0X00000000 mmcr1:0XBBB0000888888A02 mmcra:0X00000000 event:0X08C1 mmcr0:0X00000000 mmcr1:0XBBB0000888888A02 mmcra:0X00000000 event:0X08C2 mmcr0:0X00000000 mmcr1:0XBBB0000888888A02 mmcra:0X00000000 event:0X08C3 mmcr0:0X00000000 mmcr1:0XBBB0000888888A02 mmcra:0X00000000 event:0X08C4 mmcr0:0X00000000 mmcr1:0XBBB0000888888A02 mmcra:0X00000000 event:0X08C5 mmcr0:0X00000000 mmcr1:0XBBB0000888888A02 mmcra:0X00000000 #Group 141 pm_vsu13, VSU Execution event:0X08D0 mmcr0:0X00000000 mmcr1:0XBBB0000884848602 mmcra:0X00000000 event:0X08D1 mmcr0:0X00000000 mmcr1:0XBBB0000884848602 mmcra:0X00000000 event:0X08D2 mmcr0:0X00000000 mmcr1:0XBBB0000884848602 mmcra:0X00000000 event:0X08D3 mmcr0:0X00000000 mmcr1:0XBBB0000884848602 mmcra:0X00000000 event:0X08D4 mmcr0:0X00000000 mmcr1:0XBBB0000884848602 mmcra:0X00000000 event:0X08D5 mmcr0:0X00000000 mmcr1:0XBBB0000884848602 mmcra:0X00000000 #Group 142 pm_vsu14, VSU Execution event:0X08E0 mmcr0:0X00000000 mmcr1:0XAAAA000F809CA098 mmcra:0X00000000 event:0X08E1 mmcr0:0X00000000 mmcr1:0XAAAA000F809CA098 mmcra:0X00000000 event:0X08E2 mmcr0:0X00000000 mmcr1:0XAAAA000F809CA098 mmcra:0X00000000 event:0X08E3 mmcr0:0X00000000 mmcr1:0XAAAA000F809CA098 mmcra:0X00000000 event:0X08E4 mmcr0:0X00000000 mmcr1:0XAAAA000F809CA098 mmcra:0X00000000 event:0X08E5 mmcr0:0X00000000 mmcr1:0XAAAA000F809CA098 mmcra:0X00000000 #Group 143 pm_vsu15, VSU Execution event:0X08F0 mmcr0:0X00000000 mmcr1:0XBBB0000890909C02 mmcra:0X00000000 event:0X08F1 mmcr0:0X00000000 mmcr1:0XBBB0000890909C02 mmcra:0X00000000 event:0X08F2 mmcr0:0X00000000 mmcr1:0XBBB0000890909C02 mmcra:0X00000000 event:0X08F3 mmcr0:0X00000000 mmcr1:0XBBB0000890909C02 mmcra:0X00000000 event:0X08F4 mmcr0:0X00000000 mmcr1:0XBBB0000890909C02 mmcra:0X00000000 event:0X08F5 mmcr0:0X00000000 mmcr1:0XBBB0000890909C02 mmcra:0X00000000 #Group 144 pm_vsu16, VSU Execution event:0X0900 mmcr0:0X00000000 mmcr1:0XBBBB0008949496A0 mmcra:0X00000000 event:0X0901 mmcr0:0X00000000 mmcr1:0XBBBB0008949496A0 mmcra:0X00000000 event:0X0902 mmcr0:0X00000000 mmcr1:0XBBBB0008949496A0 mmcra:0X00000000 event:0X0903 mmcr0:0X00000000 mmcr1:0XBBBB0008949496A0 mmcra:0X00000000 event:0X0904 mmcr0:0X00000000 mmcr1:0XBBBB0008949496A0 mmcra:0X00000000 event:0X0905 mmcr0:0X00000000 mmcr1:0XBBBB0008949496A0 mmcra:0X00000000 #Group 145 pm_vsu17, VSU Execution event:0X0910 mmcr0:0X00000000 mmcr1:0XBBBB0000989A929E mmcra:0X00000000 event:0X0911 mmcr0:0X00000000 mmcr1:0XBBBB0000989A929E mmcra:0X00000000 event:0X0912 mmcr0:0X00000000 mmcr1:0XBBBB0000989A929E mmcra:0X00000000 event:0X0913 mmcr0:0X00000000 mmcr1:0XBBBB0000989A929E mmcra:0X00000000 event:0X0914 mmcr0:0X00000000 mmcr1:0XBBBB0000989A929E mmcra:0X00000000 event:0X0915 mmcr0:0X00000000 mmcr1:0XBBBB0000989A929E mmcra:0X00000000 #Group 146 pm_vsu18, VSU Execution event:0X0920 mmcr0:0X00000000 mmcr1:0XAAA00008B0B0B202 mmcra:0X00000000 event:0X0921 mmcr0:0X00000000 mmcr1:0XAAA00008B0B0B202 mmcra:0X00000000 event:0X0922 mmcr0:0X00000000 mmcr1:0XAAA00008B0B0B202 mmcra:0X00000000 event:0X0923 mmcr0:0X00000000 mmcr1:0XAAA00008B0B0B202 mmcra:0X00000000 event:0X0924 mmcr0:0X00000000 mmcr1:0XAAA00008B0B0B202 mmcra:0X00000000 event:0X0925 mmcr0:0X00000000 mmcr1:0XAAA00008B0B0B202 mmcra:0X00000000 #Group 147 pm_vsu19, VSU Execution event:0X0930 mmcr0:0X00000000 mmcr1:0XAAA00008B4B4B602 mmcra:0X00000000 event:0X0931 mmcr0:0X00000000 mmcr1:0XAAA00008B4B4B602 mmcra:0X00000000 event:0X0932 mmcr0:0X00000000 mmcr1:0XAAA00008B4B4B602 mmcra:0X00000000 event:0X0933 mmcr0:0X00000000 mmcr1:0XAAA00008B4B4B602 mmcra:0X00000000 event:0X0934 mmcr0:0X00000000 mmcr1:0XAAA00008B4B4B602 mmcra:0X00000000 event:0X0935 mmcr0:0X00000000 mmcr1:0XAAA00008B4B4B602 mmcra:0X00000000 #Group 148 pm_vsu20, VSU Execution event:0X0940 mmcr0:0X00000000 mmcr1:0XAAA00008B8B8BA02 mmcra:0X00000000 event:0X0941 mmcr0:0X00000000 mmcr1:0XAAA00008B8B8BA02 mmcra:0X00000000 event:0X0942 mmcr0:0X00000000 mmcr1:0XAAA00008B8B8BA02 mmcra:0X00000000 event:0X0943 mmcr0:0X00000000 mmcr1:0XAAA00008B8B8BA02 mmcra:0X00000000 event:0X0944 mmcr0:0X00000000 mmcr1:0XAAA00008B8B8BA02 mmcra:0X00000000 event:0X0945 mmcr0:0X00000000 mmcr1:0XAAA00008B8B8BA02 mmcra:0X00000000 #Group 149 pm_vsu21, VSU Execution event:0X0950 mmcr0:0X00000000 mmcr1:0X000A000168F402BC mmcra:0X00000000 event:0X0951 mmcr0:0X00000000 mmcr1:0X000A000168F402BC mmcra:0X00000000 event:0X0952 mmcr0:0X00000000 mmcr1:0X000A000168F402BC mmcra:0X00000000 event:0X0953 mmcr0:0X00000000 mmcr1:0X000A000168F402BC mmcra:0X00000000 event:0X0954 mmcr0:0X00000000 mmcr1:0X000A000168F402BC mmcra:0X00000000 event:0X0955 mmcr0:0X00000000 mmcr1:0X000A000168F402BC mmcra:0X00000000 #Group 150 pm_vsu22, VSU Execution event:0X0960 mmcr0:0X00000000 mmcr1:0XCBAA000F848C8480 mmcra:0X00000000 event:0X0961 mmcr0:0X00000000 mmcr1:0XCBAA000F848C8480 mmcra:0X00000000 event:0X0962 mmcr0:0X00000000 mmcr1:0XCBAA000F848C8480 mmcra:0X00000000 event:0X0963 mmcr0:0X00000000 mmcr1:0XCBAA000F848C8480 mmcra:0X00000000 event:0X0964 mmcr0:0X00000000 mmcr1:0XCBAA000F848C8480 mmcra:0X00000000 event:0X0965 mmcr0:0X00000000 mmcr1:0XCBAA000F848C8480 mmcra:0X00000000 #Group 151 pm_vsu23, VSU Execution event:0X0970 mmcr0:0X00000000 mmcr1:0XAAAA000F88BC8480 mmcra:0X00000000 event:0X0971 mmcr0:0X00000000 mmcr1:0XAAAA000F88BC8480 mmcra:0X00000000 event:0X0972 mmcr0:0X00000000 mmcr1:0XAAAA000F88BC8480 mmcra:0X00000000 event:0X0973 mmcr0:0X00000000 mmcr1:0XAAAA000F88BC8480 mmcra:0X00000000 event:0X0974 mmcr0:0X00000000 mmcr1:0XAAAA000F88BC8480 mmcra:0X00000000 event:0X0975 mmcr0:0X00000000 mmcr1:0XAAAA000F88BC8480 mmcra:0X00000000 #Group 152 pm_vsu24, VSU Execution event:0X0980 mmcr0:0X00000000 mmcr1:0X0AAA0007F4BCB880 mmcra:0X00000000 event:0X0981 mmcr0:0X00000000 mmcr1:0X0AAA0007F4BCB880 mmcra:0X00000000 event:0X0982 mmcr0:0X00000000 mmcr1:0X0AAA0007F4BCB880 mmcra:0X00000000 event:0X0983 mmcr0:0X00000000 mmcr1:0X0AAA0007F4BCB880 mmcra:0X00000000 event:0X0984 mmcr0:0X00000000 mmcr1:0X0AAA0007F4BCB880 mmcra:0X00000000 event:0X0985 mmcr0:0X00000000 mmcr1:0X0AAA0007F4BCB880 mmcra:0X00000000 #Group 153 pm_vsu25, VSU Execution event:0X0990 mmcr0:0X00000000 mmcr1:0XBAAA000F8CBCB4B0 mmcra:0X00000000 event:0X0991 mmcr0:0X00000000 mmcr1:0XBAAA000F8CBCB4B0 mmcra:0X00000000 event:0X0992 mmcr0:0X00000000 mmcr1:0XBAAA000F8CBCB4B0 mmcra:0X00000000 event:0X0993 mmcr0:0X00000000 mmcr1:0XBAAA000F8CBCB4B0 mmcra:0X00000000 event:0X0994 mmcr0:0X00000000 mmcr1:0XBAAA000F8CBCB4B0 mmcra:0X00000000 event:0X0995 mmcr0:0X00000000 mmcr1:0XBAAA000F8CBCB4B0 mmcra:0X00000000 #Group 154 pm_lsu1, LSU LMQ SRQ events event:0X09A0 mmcr0:0X00000000 mmcr1:0XD0000000A43E1C08 mmcra:0X00000000 event:0X09A1 mmcr0:0X00000000 mmcr1:0XD0000000A43E1C08 mmcra:0X00000000 event:0X09A2 mmcr0:0X00000000 mmcr1:0XD0000000A43E1C08 mmcra:0X00000000 event:0X09A3 mmcr0:0X00000000 mmcr1:0XD0000000A43E1C08 mmcra:0X00000000 event:0X09A4 mmcr0:0X00000000 mmcr1:0XD0000000A43E1C08 mmcra:0X00000000 event:0X09A5 mmcr0:0X00000000 mmcr1:0XD0000000A43E1C08 mmcra:0X00000000 #Group 155 pm_lsu2, LSU events event:0X09B0 mmcr0:0X00000000 mmcr1:0X0C0200006690668E mmcra:0X00000000 event:0X09B1 mmcr0:0X00000000 mmcr1:0X0C0200006690668E mmcra:0X00000000 event:0X09B2 mmcr0:0X00000000 mmcr1:0X0C0200006690668E mmcra:0X00000000 event:0X09B3 mmcr0:0X00000000 mmcr1:0X0C0200006690668E mmcra:0X00000000 event:0X09B4 mmcr0:0X00000000 mmcr1:0X0C0200006690668E mmcra:0X00000000 event:0X09B5 mmcr0:0X00000000 mmcr1:0X0C0200006690668E mmcra:0X00000000 #Group 156 pm_lsu_lmq, LSU LMQ Events event:0X09C0 mmcr0:0X00000000 mmcr1:0XDDDD0000989AA0A4 mmcra:0X00000000 event:0X09C1 mmcr0:0X00000000 mmcr1:0XDDDD0000989AA0A4 mmcra:0X00000000 event:0X09C2 mmcr0:0X00000000 mmcr1:0XDDDD0000989AA0A4 mmcra:0X00000000 event:0X09C3 mmcr0:0X00000000 mmcr1:0XDDDD0000989AA0A4 mmcra:0X00000000 event:0X09C4 mmcr0:0X00000000 mmcr1:0XDDDD0000989AA0A4 mmcra:0X00000000 event:0X09C5 mmcr0:0X00000000 mmcr1:0XDDDD0000989AA0A4 mmcra:0X00000000 #Group 157 pm_lsu_srq1, Store Request Queue Info event:0X09D0 mmcr0:0X00000000 mmcr1:0XCCC00008A0A0A202 mmcra:0X00000000 event:0X09D1 mmcr0:0X00000000 mmcr1:0XCCC00008A0A0A202 mmcra:0X00000000 event:0X09D2 mmcr0:0X00000000 mmcr1:0XCCC00008A0A0A202 mmcra:0X00000000 event:0X09D3 mmcr0:0X00000000 mmcr1:0XCCC00008A0A0A202 mmcra:0X00000000 event:0X09D4 mmcr0:0X00000000 mmcr1:0XCCC00008A0A0A202 mmcra:0X00000000 event:0X09D5 mmcr0:0X00000000 mmcr1:0XCCC00008A0A0A202 mmcra:0X00000000 #Group 158 pm_lsu_srq2, Store Request Queue Info event:0X09E0 mmcr0:0X00000000 mmcr1:0XDDD0000096979C02 mmcra:0X00000000 event:0X09E1 mmcr0:0X00000000 mmcr1:0XDDD0000096979C02 mmcra:0X00000000 event:0X09E2 mmcr0:0X00000000 mmcr1:0XDDD0000096979C02 mmcra:0X00000000 event:0X09E3 mmcr0:0X00000000 mmcr1:0XDDD0000096979C02 mmcra:0X00000000 event:0X09E4 mmcr0:0X00000000 mmcr1:0XDDD0000096979C02 mmcra:0X00000000 event:0X09E5 mmcr0:0X00000000 mmcr1:0XDDD0000096979C02 mmcra:0X00000000 #Group 159 pm_lsu_s0_valid, LSU Events event:0X09F0 mmcr0:0X00000000 mmcr1:0XDDD000009C9EA002 mmcra:0X00000000 event:0X09F1 mmcr0:0X00000000 mmcr1:0XDDD000009C9EA002 mmcra:0X00000000 event:0X09F2 mmcr0:0X00000000 mmcr1:0XDDD000009C9EA002 mmcra:0X00000000 event:0X09F3 mmcr0:0X00000000 mmcr1:0XDDD000009C9EA002 mmcra:0X00000000 event:0X09F4 mmcr0:0X00000000 mmcr1:0XDDD000009C9EA002 mmcra:0X00000000 event:0X09F5 mmcr0:0X00000000 mmcr1:0XDDD000009C9EA002 mmcra:0X00000000 #Group 160 pm_lsu_s0_alloc, LSU Events event:0X0A00 mmcr0:0X00000000 mmcr1:0XDDD00000A19F9D02 mmcra:0X00000000 event:0X0A01 mmcr0:0X00000000 mmcr1:0XDDD00000A19F9D02 mmcra:0X00000000 event:0X0A02 mmcr0:0X00000000 mmcr1:0XDDD00000A19F9D02 mmcra:0X00000000 event:0X0A03 mmcr0:0X00000000 mmcr1:0XDDD00000A19F9D02 mmcra:0X00000000 event:0X0A04 mmcr0:0X00000000 mmcr1:0XDDD00000A19F9D02 mmcra:0X00000000 event:0X0A05 mmcr0:0X00000000 mmcr1:0XDDD00000A19F9D02 mmcra:0X00000000 #Group 161 pm_l1_pref, L1 pref Events event:0X0A10 mmcr0:0X00000000 mmcr1:0XDDD00008B8B8BA02 mmcra:0X00000000 event:0X0A11 mmcr0:0X00000000 mmcr1:0XDDD00008B8B8BA02 mmcra:0X00000000 event:0X0A12 mmcr0:0X00000000 mmcr1:0XDDD00008B8B8BA02 mmcra:0X00000000 event:0X0A13 mmcr0:0X00000000 mmcr1:0XDDD00008B8B8BA02 mmcra:0X00000000 event:0X0A14 mmcr0:0X00000000 mmcr1:0XDDD00008B8B8BA02 mmcra:0X00000000 event:0X0A15 mmcr0:0X00000000 mmcr1:0XDDD00008B8B8BA02 mmcra:0X00000000 #Group 162 pm_l2_guess_1, L2_Guess_events event:0X0A20 mmcr0:0X00000000 mmcr1:0X6600800080801E02 mmcra:0X00000000 event:0X0A21 mmcr0:0X00000000 mmcr1:0X6600800080801E02 mmcra:0X00000000 event:0X0A22 mmcr0:0X00000000 mmcr1:0X6600800080801E02 mmcra:0X00000000 event:0X0A23 mmcr0:0X00000000 mmcr1:0X6600800080801E02 mmcra:0X00000000 event:0X0A24 mmcr0:0X00000000 mmcr1:0X6600800080801E02 mmcra:0X00000000 event:0X0A25 mmcr0:0X00000000 mmcr1:0X6600800080801E02 mmcra:0X00000000 #Group 163 pm_l2_guess_2, L2_Guess_events event:0X0A30 mmcr0:0X00000000 mmcr1:0X6600800082821E02 mmcra:0X00000000 event:0X0A31 mmcr0:0X00000000 mmcr1:0X6600800082821E02 mmcra:0X00000000 event:0X0A32 mmcr0:0X00000000 mmcr1:0X6600800082821E02 mmcra:0X00000000 event:0X0A33 mmcr0:0X00000000 mmcr1:0X6600800082821E02 mmcra:0X00000000 event:0X0A34 mmcr0:0X00000000 mmcr1:0X6600800082821E02 mmcra:0X00000000 event:0X0A35 mmcr0:0X00000000 mmcr1:0X6600800082821E02 mmcra:0X00000000 #Group 164 pm_misc1, Misc events event:0X0A40 mmcr0:0X00000000 mmcr1:0X04000000F0801602 mmcra:0X00000000 event:0X0A41 mmcr0:0X00000000 mmcr1:0X04000000F0801602 mmcra:0X00000000 event:0X0A42 mmcr0:0X00000000 mmcr1:0X04000000F0801602 mmcra:0X00000000 event:0X0A43 mmcr0:0X00000000 mmcr1:0X04000000F0801602 mmcra:0X00000000 event:0X0A44 mmcr0:0X00000000 mmcr1:0X04000000F0801602 mmcra:0X00000000 event:0X0A45 mmcr0:0X00000000 mmcr1:0X04000000F0801602 mmcra:0X00000000 #Group 165 pm_misc2, Misc events event:0X0A50 mmcr0:0X00000000 mmcr1:0X2000000080F8F81E mmcra:0X00000000 event:0X0A51 mmcr0:0X00000000 mmcr1:0X2000000080F8F81E mmcra:0X00000000 event:0X0A52 mmcr0:0X00000000 mmcr1:0X2000000080F8F81E mmcra:0X00000000 event:0X0A53 mmcr0:0X00000000 mmcr1:0X2000000080F8F81E mmcra:0X00000000 event:0X0A54 mmcr0:0X00000000 mmcr1:0X2000000080F8F81E mmcra:0X00000000 event:0X0A55 mmcr0:0X00000000 mmcr1:0X2000000080F8F81E mmcra:0X00000000 #Group 166 pm_misc3, Misc events event:0X0A60 mmcr0:0X00000000 mmcr1:0X00000000F20AF2F2 mmcra:0X00000000 event:0X0A61 mmcr0:0X00000000 mmcr1:0X00000000F20AF2F2 mmcra:0X00000000 event:0X0A62 mmcr0:0X00000000 mmcr1:0X00000000F20AF2F2 mmcra:0X00000000 event:0X0A63 mmcr0:0X00000000 mmcr1:0X00000000F20AF2F2 mmcra:0X00000000 event:0X0A64 mmcr0:0X00000000 mmcr1:0X00000000F20AF2F2 mmcra:0X00000000 event:0X0A65 mmcr0:0X00000000 mmcr1:0X00000000F20AF2F2 mmcra:0X00000000 #Group 167 pm_misc4, Misc events event:0X0A70 mmcr0:0X00000000 mmcr1:0X000000000C1A1E1C mmcra:0X00000000 event:0X0A71 mmcr0:0X00000000 mmcr1:0X000000000C1A1E1C mmcra:0X00000000 event:0X0A72 mmcr0:0X00000000 mmcr1:0X000000000C1A1E1C mmcra:0X00000000 event:0X0A73 mmcr0:0X00000000 mmcr1:0X000000000C1A1E1C mmcra:0X00000000 event:0X0A74 mmcr0:0X00000000 mmcr1:0X000000000C1A1E1C mmcra:0X00000000 event:0X0A75 mmcr0:0X00000000 mmcr1:0X000000000C1A1E1C mmcra:0X00000000 #Group 168 pm_misc5, Misc events event:0X0A80 mmcr0:0X00000000 mmcr1:0X044000040AAEA4F6 mmcra:0X00000000 event:0X0A81 mmcr0:0X00000000 mmcr1:0X044000040AAEA4F6 mmcra:0X00000000 event:0X0A82 mmcr0:0X00000000 mmcr1:0X044000040AAEA4F6 mmcra:0X00000000 event:0X0A83 mmcr0:0X00000000 mmcr1:0X044000040AAEA4F6 mmcra:0X00000000 event:0X0A84 mmcr0:0X00000000 mmcr1:0X044000040AAEA4F6 mmcra:0X00000000 event:0X0A85 mmcr0:0X00000000 mmcr1:0X044000040AAEA4F6 mmcra:0X00000000 #Group 169 pm_misc6, Misc events event:0X0A90 mmcr0:0X00000000 mmcr1:0X444000028C8E8C02 mmcra:0X00000000 event:0X0A91 mmcr0:0X00000000 mmcr1:0X444000028C8E8C02 mmcra:0X00000000 event:0X0A92 mmcr0:0X00000000 mmcr1:0X444000028C8E8C02 mmcra:0X00000000 event:0X0A93 mmcr0:0X00000000 mmcr1:0X444000028C8E8C02 mmcra:0X00000000 event:0X0A94 mmcr0:0X00000000 mmcr1:0X444000028C8E8C02 mmcra:0X00000000 event:0X0A95 mmcr0:0X00000000 mmcr1:0X444000028C8E8C02 mmcra:0X00000000 #Group 170 pm_misc7, Misc events event:0X0AA0 mmcr0:0X00000000 mmcr1:0X00000000380A1E66 mmcra:0X00000000 event:0X0AA1 mmcr0:0X00000000 mmcr1:0X00000000380A1E66 mmcra:0X00000000 event:0X0AA2 mmcr0:0X00000000 mmcr1:0X00000000380A1E66 mmcra:0X00000000 event:0X0AA3 mmcr0:0X00000000 mmcr1:0X00000000380A1E66 mmcra:0X00000000 event:0X0AA4 mmcr0:0X00000000 mmcr1:0X00000000380A1E66 mmcra:0X00000000 event:0X0AA5 mmcr0:0X00000000 mmcr1:0X00000000380A1E66 mmcra:0X00000000 #Group 171 pm_misc8, Misc events event:0X0AB0 mmcr0:0X00000000 mmcr1:0X40000000A6F8F6F6 mmcra:0X00000000 event:0X0AB1 mmcr0:0X00000000 mmcr1:0X40000000A6F8F6F6 mmcra:0X00000000 event:0X0AB2 mmcr0:0X00000000 mmcr1:0X40000000A6F8F6F6 mmcra:0X00000000 event:0X0AB3 mmcr0:0X00000000 mmcr1:0X40000000A6F8F6F6 mmcra:0X00000000 event:0X0AB4 mmcr0:0X00000000 mmcr1:0X40000000A6F8F6F6 mmcra:0X00000000 event:0X0AB5 mmcr0:0X00000000 mmcr1:0X40000000A6F8F6F6 mmcra:0X00000000 #Group 172 pm_misc9, Misc events event:0X0AC0 mmcr0:0X00000000 mmcr1:0X22C000008486A8F6 mmcra:0X00000000 event:0X0AC1 mmcr0:0X00000000 mmcr1:0X22C000008486A8F6 mmcra:0X00000000 event:0X0AC2 mmcr0:0X00000000 mmcr1:0X22C000008486A8F6 mmcra:0X00000000 event:0X0AC3 mmcr0:0X00000000 mmcr1:0X22C000008486A8F6 mmcra:0X00000000 event:0X0AC4 mmcr0:0X00000000 mmcr1:0X22C000008486A8F6 mmcra:0X00000000 event:0X0AC5 mmcr0:0X00000000 mmcr1:0X22C000008486A8F6 mmcra:0X00000000 #Group 173 pm_misc10, Misc events event:0X0AD0 mmcr0:0X00000000 mmcr1:0X0DD400061AA8B884 mmcra:0X00000000 event:0X0AD1 mmcr0:0X00000000 mmcr1:0X0DD400061AA8B884 mmcra:0X00000000 event:0X0AD2 mmcr0:0X00000000 mmcr1:0X0DD400061AA8B884 mmcra:0X00000000 event:0X0AD3 mmcr0:0X00000000 mmcr1:0X0DD400061AA8B884 mmcra:0X00000000 event:0X0AD4 mmcr0:0X00000000 mmcr1:0X0DD400061AA8B884 mmcra:0X00000000 event:0X0AD5 mmcr0:0X00000000 mmcr1:0X0DD400061AA8B884 mmcra:0X00000000 #Group 174 pm_misc11, Misc events event:0X0AE0 mmcr0:0X00000000 mmcr1:0X00000000F41E0402 mmcra:0X00000000 event:0X0AE1 mmcr0:0X00000000 mmcr1:0X00000000F41E0402 mmcra:0X00000000 event:0X0AE2 mmcr0:0X00000000 mmcr1:0X00000000F41E0402 mmcra:0X00000000 event:0X0AE3 mmcr0:0X00000000 mmcr1:0X00000000F41E0402 mmcra:0X00000000 event:0X0AE4 mmcr0:0X00000000 mmcr1:0X00000000F41E0402 mmcra:0X00000000 event:0X0AE5 mmcr0:0X00000000 mmcr1:0X00000000F41E0402 mmcra:0X00000000 #Group 175 pm_misc_12, Misc Events event:0X0AF0 mmcr0:0X00000000 mmcr1:0X0000000002F0F8F8 mmcra:0X00000000 event:0X0AF1 mmcr0:0X00000000 mmcr1:0X0000000002F0F8F8 mmcra:0X00000000 event:0X0AF2 mmcr0:0X00000000 mmcr1:0X0000000002F0F8F8 mmcra:0X00000000 event:0X0AF3 mmcr0:0X00000000 mmcr1:0X0000000002F0F8F8 mmcra:0X00000000 event:0X0AF4 mmcr0:0X00000000 mmcr1:0X0000000002F0F8F8 mmcra:0X00000000 event:0X0AF5 mmcr0:0X00000000 mmcr1:0X0000000002F0F8F8 mmcra:0X00000000 #Group 176 pm_misc_13, Misc Events event:0X0B00 mmcr0:0X00000000 mmcr1:0X00000000F8F0FCF6 mmcra:0X00000000 event:0X0B01 mmcr0:0X00000000 mmcr1:0X00000000F8F0FCF6 mmcra:0X00000000 event:0X0B02 mmcr0:0X00000000 mmcr1:0X00000000F8F0FCF6 mmcra:0X00000000 event:0X0B03 mmcr0:0X00000000 mmcr1:0X00000000F8F0FCF6 mmcra:0X00000000 event:0X0B04 mmcr0:0X00000000 mmcr1:0X00000000F8F0FCF6 mmcra:0X00000000 event:0X0B05 mmcr0:0X00000000 mmcr1:0X00000000F8F0FCF6 mmcra:0X00000000 #Group 177 pm_misc_14, Misc Events event:0X0B10 mmcr0:0X00000000 mmcr1:0X000000001E1E0266 mmcra:0X00000000 event:0X0B11 mmcr0:0X00000000 mmcr1:0X000000001E1E0266 mmcra:0X00000000 event:0X0B12 mmcr0:0X00000000 mmcr1:0X000000001E1E0266 mmcra:0X00000000 event:0X0B13 mmcr0:0X00000000 mmcr1:0X000000001E1E0266 mmcra:0X00000000 event:0X0B14 mmcr0:0X00000000 mmcr1:0X000000001E1E0266 mmcra:0X00000000 event:0X0B15 mmcr0:0X00000000 mmcr1:0X000000001E1E0266 mmcra:0X00000000 #Group 178 pm_misc_15, Misc Events event:0X0B20 mmcr0:0X00000000 mmcr1:0XD0000000A24AF64A mmcra:0X00000000 event:0X0B21 mmcr0:0X00000000 mmcr1:0XD0000000A24AF64A mmcra:0X00000000 event:0X0B22 mmcr0:0X00000000 mmcr1:0XD0000000A24AF64A mmcra:0X00000000 event:0X0B23 mmcr0:0X00000000 mmcr1:0XD0000000A24AF64A mmcra:0X00000000 event:0X0B24 mmcr0:0X00000000 mmcr1:0XD0000000A24AF64A mmcra:0X00000000 event:0X0B25 mmcr0:0X00000000 mmcr1:0XD0000000A24AF64A mmcra:0X00000000 #Group 179 pm_misc_16, Misc Events event:0X0B30 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4C mmcra:0X00000000 event:0X0B31 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4C mmcra:0X00000000 event:0X0B32 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4C mmcra:0X00000000 event:0X0B33 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4C mmcra:0X00000000 event:0X0B34 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4C mmcra:0X00000000 event:0X0B35 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4C mmcra:0X00000000 #Group 180 pm_misc_17, Misc Events event:0X0B40 mmcr0:0X00000000 mmcr1:0X00D0000068F0544E mmcra:0X00000000 event:0X0B41 mmcr0:0X00000000 mmcr1:0X00D0000068F0544E mmcra:0X00000000 event:0X0B42 mmcr0:0X00000000 mmcr1:0X00D0000068F0544E mmcra:0X00000000 event:0X0B43 mmcr0:0X00000000 mmcr1:0X00D0000068F0544E mmcra:0X00000000 event:0X0B44 mmcr0:0X00000000 mmcr1:0X00D0000068F0544E mmcra:0X00000000 event:0X0B45 mmcr0:0X00000000 mmcr1:0X00D0000068F0544E mmcra:0X00000000 #Group 181 pm_suspend, SUSPENDED events event:0X0B50 mmcr0:0X00000000 mmcr1:0X00D00000001E9402 mmcra:0X00000000 event:0X0B51 mmcr0:0X00000000 mmcr1:0X00D00000001E9402 mmcra:0X00000000 event:0X0B52 mmcr0:0X00000000 mmcr1:0X00D00000001E9402 mmcra:0X00000000 event:0X0B53 mmcr0:0X00000000 mmcr1:0X00D00000001E9402 mmcra:0X00000000 event:0X0B54 mmcr0:0X00000000 mmcr1:0X00D00000001E9402 mmcra:0X00000000 event:0X0B55 mmcr0:0X00000000 mmcr1:0X00D00000001E9402 mmcra:0X00000000 #Group 182 pm_iops, Internal Operations events event:0X0B60 mmcr0:0X00000000 mmcr1:0X00000000141E1402 mmcra:0X00000000 event:0X0B61 mmcr0:0X00000000 mmcr1:0X00000000141E1402 mmcra:0X00000000 event:0X0B62 mmcr0:0X00000000 mmcr1:0X00000000141E1402 mmcra:0X00000000 event:0X0B63 mmcr0:0X00000000 mmcr1:0X00000000141E1402 mmcra:0X00000000 event:0X0B64 mmcr0:0X00000000 mmcr1:0X00000000141E1402 mmcra:0X00000000 event:0X0B65 mmcr0:0X00000000 mmcr1:0X00000000141E1402 mmcra:0X00000000 #Group 183 pm_sync, sync event:0X0B70 mmcr0:0X00000000 mmcr1:0XD0200000941E9A02 mmcra:0X00000000 event:0X0B71 mmcr0:0X00000000 mmcr1:0XD0200000941E9A02 mmcra:0X00000000 event:0X0B72 mmcr0:0X00000000 mmcr1:0XD0200000941E9A02 mmcra:0X00000000 event:0X0B73 mmcr0:0X00000000 mmcr1:0XD0200000941E9A02 mmcra:0X00000000 event:0X0B74 mmcr0:0X00000000 mmcr1:0XD0200000941E9A02 mmcra:0X00000000 event:0X0B75 mmcr0:0X00000000 mmcr1:0XD0200000941E9A02 mmcra:0X00000000 #Group 184 pm_seg, Segment events event:0X0B80 mmcr0:0X00000000 mmcr1:0X022200041EA4A4A6 mmcra:0X00000000 event:0X0B81 mmcr0:0X00000000 mmcr1:0X022200041EA4A4A6 mmcra:0X00000000 event:0X0B82 mmcr0:0X00000000 mmcr1:0X022200041EA4A4A6 mmcra:0X00000000 event:0X0B83 mmcr0:0X00000000 mmcr1:0X022200041EA4A4A6 mmcra:0X00000000 event:0X0B84 mmcr0:0X00000000 mmcr1:0X022200041EA4A4A6 mmcra:0X00000000 event:0X0B85 mmcr0:0X00000000 mmcr1:0X022200041EA4A4A6 mmcra:0X00000000 #Group 185 pm_l3_hit, L3 Hit Events event:0X0B90 mmcr0:0X00000000 mmcr1:0XFFFF000080808080 mmcra:0X00000000 event:0X0B91 mmcr0:0X00000000 mmcr1:0XFFFF000080808080 mmcra:0X00000000 event:0X0B92 mmcr0:0X00000000 mmcr1:0XFFFF000080808080 mmcra:0X00000000 event:0X0B93 mmcr0:0X00000000 mmcr1:0XFFFF000080808080 mmcra:0X00000000 event:0X0B94 mmcr0:0X00000000 mmcr1:0XFFFF000080808080 mmcra:0X00000000 event:0X0B95 mmcr0:0X00000000 mmcr1:0XFFFF000080808080 mmcra:0X00000000 #Group 186 pm_shl, Shell Events event:0X0BA0 mmcr0:0X00000000 mmcr1:0X5555000080828486 mmcra:0X00000000 event:0X0BA1 mmcr0:0X00000000 mmcr1:0X5555000080828486 mmcra:0X00000000 event:0X0BA2 mmcr0:0X00000000 mmcr1:0X5555000080828486 mmcra:0X00000000 event:0X0BA3 mmcr0:0X00000000 mmcr1:0X5555000080828486 mmcra:0X00000000 event:0X0BA4 mmcr0:0X00000000 mmcr1:0X5555000080828486 mmcra:0X00000000 event:0X0BA5 mmcr0:0X00000000 mmcr1:0X5555000080828486 mmcra:0X00000000 #Group 187 pm_l3_pref, L3 Prefetch events event:0X0BB0 mmcr0:0X00000000 mmcr1:0XDDDD0003ACAEACB8 mmcra:0X00000000 event:0X0BB1 mmcr0:0X00000000 mmcr1:0XDDDD0003ACAEACB8 mmcra:0X00000000 event:0X0BB2 mmcr0:0X00000000 mmcr1:0XDDDD0003ACAEACB8 mmcra:0X00000000 event:0X0BB3 mmcr0:0X00000000 mmcr1:0XDDDD0003ACAEACB8 mmcra:0X00000000 event:0X0BB4 mmcr0:0X00000000 mmcr1:0XDDDD0003ACAEACB8 mmcra:0X00000000 event:0X0BB5 mmcr0:0X00000000 mmcr1:0XDDDD0003ACAEACB8 mmcra:0X00000000 #Group 188 pm_l3, L3 events event:0X0BC0 mmcr0:0X00000000 mmcr1:0XFFFF000082828282 mmcra:0X00000000 event:0X0BC1 mmcr0:0X00000000 mmcr1:0XFFFF000082828282 mmcra:0X00000000 event:0X0BC2 mmcr0:0X00000000 mmcr1:0XFFFF000082828282 mmcra:0X00000000 event:0X0BC3 mmcr0:0X00000000 mmcr1:0XFFFF000082828282 mmcra:0X00000000 event:0X0BC4 mmcr0:0X00000000 mmcr1:0XFFFF000082828282 mmcra:0X00000000 event:0X0BC5 mmcr0:0X00000000 mmcr1:0XFFFF000082828282 mmcra:0X00000000 #Group 189 pm_streams1, Streams event:0X0BD0 mmcr0:0X00000000 mmcr1:0X0DDD00041EB4B4B6 mmcra:0X00000000 event:0X0BD1 mmcr0:0X00000000 mmcr1:0X0DDD00041EB4B4B6 mmcra:0X00000000 event:0X0BD2 mmcr0:0X00000000 mmcr1:0X0DDD00041EB4B4B6 mmcra:0X00000000 event:0X0BD3 mmcr0:0X00000000 mmcr1:0X0DDD00041EB4B4B6 mmcra:0X00000000 event:0X0BD4 mmcr0:0X00000000 mmcr1:0X0DDD00041EB4B4B6 mmcra:0X00000000 event:0X0BD5 mmcr0:0X00000000 mmcr1:0X0DDD00041EB4B4B6 mmcra:0X00000000 #Group 190 pm_streams2, Streams event:0X0BE0 mmcr0:0X00000000 mmcr1:0X0DDD00041EBCBCBE mmcra:0X00000000 event:0X0BE1 mmcr0:0X00000000 mmcr1:0X0DDD00041EBCBCBE mmcra:0X00000000 event:0X0BE2 mmcr0:0X00000000 mmcr1:0X0DDD00041EBCBCBE mmcra:0X00000000 event:0X0BE3 mmcr0:0X00000000 mmcr1:0X0DDD00041EBCBCBE mmcra:0X00000000 event:0X0BE4 mmcr0:0X00000000 mmcr1:0X0DDD00041EBCBCBE mmcra:0X00000000 event:0X0BE5 mmcr0:0X00000000 mmcr1:0X0DDD00041EBCBCBE mmcra:0X00000000 #Group 191 pm_streams3, Streams event:0X0BF0 mmcr0:0X00000000 mmcr1:0XDDDD0004B0A8A8AA mmcra:0X00000000 event:0X0BF1 mmcr0:0X00000000 mmcr1:0XDDDD0004B0A8A8AA mmcra:0X00000000 event:0X0BF2 mmcr0:0X00000000 mmcr1:0XDDDD0004B0A8A8AA mmcra:0X00000000 event:0X0BF3 mmcr0:0X00000000 mmcr1:0XDDDD0004B0A8A8AA mmcra:0X00000000 event:0X0BF4 mmcr0:0X00000000 mmcr1:0XDDDD0004B0A8A8AA mmcra:0X00000000 event:0X0BF5 mmcr0:0X00000000 mmcr1:0XDDDD0004B0A8A8AA mmcra:0X00000000 #Group 192 pm_larx, LARX event:0X0C00 mmcr0:0X00000000 mmcr1:0XCC0C000194961E94 mmcra:0X00000000 event:0X0C01 mmcr0:0X00000000 mmcr1:0XCC0C000194961E94 mmcra:0X00000000 event:0X0C02 mmcr0:0X00000000 mmcr1:0XCC0C000194961E94 mmcra:0X00000000 event:0X0C03 mmcr0:0X00000000 mmcr1:0XCC0C000194961E94 mmcra:0X00000000 event:0X0C04 mmcr0:0X00000000 mmcr1:0XCC0C000194961E94 mmcra:0X00000000 event:0X0C05 mmcr0:0X00000000 mmcr1:0XCC0C000194961E94 mmcra:0X00000000 #Group 193 pm_ldf, Floating Point loads event:0X0C10 mmcr0:0X00000000 mmcr1:0X0CCC00041E848486 mmcra:0X00000000 event:0X0C11 mmcr0:0X00000000 mmcr1:0X0CCC00041E848486 mmcra:0X00000000 event:0X0C12 mmcr0:0X00000000 mmcr1:0X0CCC00041E848486 mmcra:0X00000000 event:0X0C13 mmcr0:0X00000000 mmcr1:0X0CCC00041E848486 mmcra:0X00000000 event:0X0C14 mmcr0:0X00000000 mmcr1:0X0CCC00041E848486 mmcra:0X00000000 event:0X0C15 mmcr0:0X00000000 mmcr1:0X0CCC00041E848486 mmcra:0X00000000 #Group 194 pm_ldx, Vector Load event:0X0C20 mmcr0:0X00000000 mmcr1:0X0CCC00041E88888A mmcra:0X00000000 event:0X0C21 mmcr0:0X00000000 mmcr1:0X0CCC00041E88888A mmcra:0X00000000 event:0X0C22 mmcr0:0X00000000 mmcr1:0X0CCC00041E88888A mmcra:0X00000000 event:0X0C23 mmcr0:0X00000000 mmcr1:0X0CCC00041E88888A mmcra:0X00000000 event:0X0C24 mmcr0:0X00000000 mmcr1:0X0CCC00041E88888A mmcra:0X00000000 event:0X0C25 mmcr0:0X00000000 mmcr1:0X0CCC00041E88888A mmcra:0X00000000 #Group 195 pm_l2_ld_st, L2 load and store events event:0X0C30 mmcr0:0X00000000 mmcr1:0X66F000008082801E mmcra:0X00000000 event:0X0C31 mmcr0:0X00000000 mmcr1:0X66F000008082801E mmcra:0X00000000 event:0X0C32 mmcr0:0X00000000 mmcr1:0X66F000008082801E mmcra:0X00000000 event:0X0C33 mmcr0:0X00000000 mmcr1:0X66F000008082801E mmcra:0X00000000 event:0X0C34 mmcr0:0X00000000 mmcr1:0X66F000008082801E mmcra:0X00000000 event:0X0C35 mmcr0:0X00000000 mmcr1:0X66F000008082801E mmcra:0X00000000 #Group 196 pm_stcx, STCX event:0X0C40 mmcr0:0X00000000 mmcr1:0XCCCC000C94AC989A mmcra:0X00000000 event:0X0C41 mmcr0:0X00000000 mmcr1:0XCCCC000C94AC989A mmcra:0X00000000 event:0X0C42 mmcr0:0X00000000 mmcr1:0XCCCC000C94AC989A mmcra:0X00000000 event:0X0C43 mmcr0:0X00000000 mmcr1:0XCCCC000C94AC989A mmcra:0X00000000 event:0X0C44 mmcr0:0X00000000 mmcr1:0XCCCC000C94AC989A mmcra:0X00000000 event:0X0C45 mmcr0:0X00000000 mmcr1:0XCCCC000C94AC989A mmcra:0X00000000 #Group 197 pm_btac, BTAC event:0X0C50 mmcr0:0X00000000 mmcr1:0X55CC00008A88989A mmcra:0X00000000 event:0X0C51 mmcr0:0X00000000 mmcr1:0X55CC00008A88989A mmcra:0X00000000 event:0X0C52 mmcr0:0X00000000 mmcr1:0X55CC00008A88989A mmcra:0X00000000 event:0X0C53 mmcr0:0X00000000 mmcr1:0X55CC00008A88989A mmcra:0X00000000 event:0X0C54 mmcr0:0X00000000 mmcr1:0X55CC00008A88989A mmcra:0X00000000 event:0X0C55 mmcr0:0X00000000 mmcr1:0X55CC00008A88989A mmcra:0X00000000 #Group 198 pm_br_bc, Branch BC events event:0X0C60 mmcr0:0X00000000 mmcr1:0X44000000B8BA1E02 mmcra:0X00000000 event:0X0C61 mmcr0:0X00000000 mmcr1:0X44000000B8BA1E02 mmcra:0X00000000 event:0X0C62 mmcr0:0X00000000 mmcr1:0X44000000B8BA1E02 mmcra:0X00000000 event:0X0C63 mmcr0:0X00000000 mmcr1:0X44000000B8BA1E02 mmcra:0X00000000 event:0X0C64 mmcr0:0X00000000 mmcr1:0X44000000B8BA1E02 mmcra:0X00000000 event:0X0C65 mmcr0:0X00000000 mmcr1:0X44000000B8BA1E02 mmcra:0X00000000 #Group 199 pm_inst_imc, inst imc events event:0X0C70 mmcr0:0X00000000 mmcr1:0X00000000F0F21602 mmcra:0X00000000 event:0X0C71 mmcr0:0X00000000 mmcr1:0X00000000F0F21602 mmcra:0X00000000 event:0X0C72 mmcr0:0X00000000 mmcr1:0X00000000F0F21602 mmcra:0X00000000 event:0X0C73 mmcr0:0X00000000 mmcr1:0X00000000F0F21602 mmcra:0X00000000 event:0X0C74 mmcr0:0X00000000 mmcr1:0X00000000F0F21602 mmcra:0X00000000 event:0X0C75 mmcr0:0X00000000 mmcr1:0X00000000F0F21602 mmcra:0X00000000 #Group 200 pm_l2_misc1, L2 load/store Miss events event:0X0C80 mmcr0:0X00000000 mmcr1:0X6666000C80808280 mmcra:0X00000000 event:0X0C81 mmcr0:0X00000000 mmcr1:0X6666000C80808280 mmcra:0X00000000 event:0X0C82 mmcr0:0X00000000 mmcr1:0X6666000C80808280 mmcra:0X00000000 event:0X0C83 mmcr0:0X00000000 mmcr1:0X6666000C80808280 mmcra:0X00000000 event:0X0C84 mmcr0:0X00000000 mmcr1:0X6666000C80808280 mmcra:0X00000000 event:0X0C85 mmcr0:0X00000000 mmcr1:0X6666000C80808280 mmcra:0X00000000 #Group 201 pm_l2_misc2, L2 Events event:0X0C90 mmcr0:0X00000000 mmcr1:0X00660000021E8080 mmcra:0X00000000 event:0X0C91 mmcr0:0X00000000 mmcr1:0X00660000021E8080 mmcra:0X00000000 event:0X0C92 mmcr0:0X00000000 mmcr1:0X00660000021E8080 mmcra:0X00000000 event:0X0C93 mmcr0:0X00000000 mmcr1:0X00660000021E8080 mmcra:0X00000000 event:0X0C94 mmcr0:0X00000000 mmcr1:0X00660000021E8080 mmcra:0X00000000 event:0X0C95 mmcr0:0X00000000 mmcr1:0X00660000021E8080 mmcra:0X00000000 #Group 202 pm_l2_misc3, L2 Events event:0X0CA0 mmcr0:0X00000000 mmcr1:0X00608000021E82FA mmcra:0X00000000 event:0X0CA1 mmcr0:0X00000000 mmcr1:0X00608000021E82FA mmcra:0X00000000 event:0X0CA2 mmcr0:0X00000000 mmcr1:0X00608000021E82FA mmcra:0X00000000 event:0X0CA3 mmcr0:0X00000000 mmcr1:0X00608000021E82FA mmcra:0X00000000 event:0X0CA4 mmcr0:0X00000000 mmcr1:0X00608000021E82FA mmcra:0X00000000 event:0X0CA5 mmcr0:0X00000000 mmcr1:0X00608000021E82FA mmcra:0X00000000 #Group 203 pm_l2_misc4, L2 Events event:0X0CB0 mmcr0:0X00000000 mmcr1:0X00666000021E8282 mmcra:0X00000000 event:0X0CB1 mmcr0:0X00000000 mmcr1:0X00666000021E8282 mmcra:0X00000000 event:0X0CB2 mmcr0:0X00000000 mmcr1:0X00666000021E8282 mmcra:0X00000000 event:0X0CB3 mmcr0:0X00000000 mmcr1:0X00666000021E8282 mmcra:0X00000000 event:0X0CB4 mmcr0:0X00000000 mmcr1:0X00666000021E8282 mmcra:0X00000000 event:0X0CB5 mmcr0:0X00000000 mmcr1:0X00666000021E8282 mmcra:0X00000000 #Group 204 pm_l2_misc5, L2 Events event:0X0CC0 mmcr0:0X00000000 mmcr1:0X00608000021E80FA mmcra:0X00000000 event:0X0CC1 mmcr0:0X00000000 mmcr1:0X00608000021E80FA mmcra:0X00000000 event:0X0CC2 mmcr0:0X00000000 mmcr1:0X00608000021E80FA mmcra:0X00000000 event:0X0CC3 mmcr0:0X00000000 mmcr1:0X00608000021E80FA mmcra:0X00000000 event:0X0CC4 mmcr0:0X00000000 mmcr1:0X00608000021E80FA mmcra:0X00000000 event:0X0CC5 mmcr0:0X00000000 mmcr1:0X00608000021E80FA mmcra:0X00000000 #Group 205 pm_l2_misc6, L2 Events event:0X0CD0 mmcr0:0X00000000 mmcr1:0X0006600002F41E80 mmcra:0X00000000 event:0X0CD1 mmcr0:0X00000000 mmcr1:0X0006600002F41E80 mmcra:0X00000000 event:0X0CD2 mmcr0:0X00000000 mmcr1:0X0006600002F41E80 mmcra:0X00000000 event:0X0CD3 mmcr0:0X00000000 mmcr1:0X0006600002F41E80 mmcra:0X00000000 event:0X0CD4 mmcr0:0X00000000 mmcr1:0X0006600002F41E80 mmcra:0X00000000 event:0X0CD5 mmcr0:0X00000000 mmcr1:0X0006600002F41E80 mmcra:0X00000000 #Group 206 pm_ierat, IERAT Events event:0X0CE0 mmcr0:0X00000000 mmcr1:0X04400000F6BCBE02 mmcra:0X00000000 event:0X0CE1 mmcr0:0X00000000 mmcr1:0X04400000F6BCBE02 mmcra:0X00000000 event:0X0CE2 mmcr0:0X00000000 mmcr1:0X04400000F6BCBE02 mmcra:0X00000000 event:0X0CE3 mmcr0:0X00000000 mmcr1:0X04400000F6BCBE02 mmcra:0X00000000 event:0X0CE4 mmcr0:0X00000000 mmcr1:0X04400000F6BCBE02 mmcra:0X00000000 event:0X0CE5 mmcr0:0X00000000 mmcr1:0X04400000F6BCBE02 mmcra:0X00000000 #Group 207 pm_disp_clb, Dispatch CLB Events event:0X0CF0 mmcr0:0X00000000 mmcr1:0X2200000090A81E02 mmcra:0X00000000 event:0X0CF1 mmcr0:0X00000000 mmcr1:0X2200000090A81E02 mmcra:0X00000000 event:0X0CF2 mmcr0:0X00000000 mmcr1:0X2200000090A81E02 mmcra:0X00000000 event:0X0CF3 mmcr0:0X00000000 mmcr1:0X2200000090A81E02 mmcra:0X00000000 event:0X0CF4 mmcr0:0X00000000 mmcr1:0X2200000090A81E02 mmcra:0X00000000 event:0X0CF5 mmcr0:0X00000000 mmcr1:0X2200000090A81E02 mmcra:0X00000000 #Group 208 pm_dpu, DPU Events event:0X0D00 mmcr0:0X00000000 mmcr1:0X000000001E060802 mmcra:0X00000000 event:0X0D01 mmcr0:0X00000000 mmcr1:0X000000001E060802 mmcra:0X00000000 event:0X0D02 mmcr0:0X00000000 mmcr1:0X000000001E060802 mmcra:0X00000000 event:0X0D03 mmcr0:0X00000000 mmcr1:0X000000001E060802 mmcra:0X00000000 event:0X0D04 mmcr0:0X00000000 mmcr1:0X000000001E060802 mmcra:0X00000000 event:0X0D05 mmcr0:0X00000000 mmcr1:0X000000001E060802 mmcra:0X00000000 #Group 209 pm_cpu_util, Basic CPU utilization event:0X0D10 mmcr0:0X00000000 mmcr1:0X0000000008F41EF4 mmcra:0X00000000 event:0X0D11 mmcr0:0X00000000 mmcr1:0X0000000008F41EF4 mmcra:0X00000000 event:0X0D12 mmcr0:0X00000000 mmcr1:0X0000000008F41EF4 mmcra:0X00000000 event:0X0D13 mmcr0:0X00000000 mmcr1:0X0000000008F41EF4 mmcra:0X00000000 event:0X0D14 mmcr0:0X00000000 mmcr1:0X0000000008F41EF4 mmcra:0X00000000 event:0X0D15 mmcr0:0X00000000 mmcr1:0X0000000008F41EF4 mmcra:0X00000000 #Group 210 pm_overflow1, Overflow events event:0X0D20 mmcr0:0X00000000 mmcr1:0X0000000010101010 mmcra:0X00000000 event:0X0D21 mmcr0:0X00000000 mmcr1:0X0000000010101010 mmcra:0X00000000 event:0X0D22 mmcr0:0X00000000 mmcr1:0X0000000010101010 mmcra:0X00000000 event:0X0D23 mmcr0:0X00000000 mmcr1:0X0000000010101010 mmcra:0X00000000 event:0X0D24 mmcr0:0X00000000 mmcr1:0X0000000010101010 mmcra:0X00000000 event:0X0D25 mmcr0:0X00000000 mmcr1:0X0000000010101010 mmcra:0X00000000 #Group 211 pm_overflow2, Overflow events event:0X0D30 mmcr0:0X00000000 mmcr1:0X0000000024102410 mmcra:0X00000000 event:0X0D31 mmcr0:0X00000000 mmcr1:0X0000000024102410 mmcra:0X00000000 event:0X0D32 mmcr0:0X00000000 mmcr1:0X0000000024102410 mmcra:0X00000000 event:0X0D33 mmcr0:0X00000000 mmcr1:0X0000000024102410 mmcra:0X00000000 event:0X0D34 mmcr0:0X00000000 mmcr1:0X0000000024102410 mmcra:0X00000000 event:0X0D35 mmcr0:0X00000000 mmcr1:0X0000000024102410 mmcra:0X00000000 #Group 212 pm_rewind, Rewind events event:0X0D40 mmcr0:0X00000000 mmcr1:0X0000000020F42002 mmcra:0X00000000 event:0X0D41 mmcr0:0X00000000 mmcr1:0X0000000020F42002 mmcra:0X00000000 event:0X0D42 mmcr0:0X00000000 mmcr1:0X0000000020F42002 mmcra:0X00000000 event:0X0D43 mmcr0:0X00000000 mmcr1:0X0000000020F42002 mmcra:0X00000000 event:0X0D44 mmcr0:0X00000000 mmcr1:0X0000000020F42002 mmcra:0X00000000 event:0X0D45 mmcr0:0X00000000 mmcr1:0X0000000020F42002 mmcra:0X00000000 #Group 213 pm_saved, Saved Events event:0X0D50 mmcr0:0X00000000 mmcr1:0X0000000022F42202 mmcra:0X00000000 event:0X0D51 mmcr0:0X00000000 mmcr1:0X0000000022F42202 mmcra:0X00000000 event:0X0D52 mmcr0:0X00000000 mmcr1:0X0000000022F42202 mmcra:0X00000000 event:0X0D53 mmcr0:0X00000000 mmcr1:0X0000000022F42202 mmcra:0X00000000 event:0X0D54 mmcr0:0X00000000 mmcr1:0X0000000022F42202 mmcra:0X00000000 event:0X0D55 mmcr0:0X00000000 mmcr1:0X0000000022F42202 mmcra:0X00000000 #Group 214 pm_tlbie, TLBIE Events event:0X0D60 mmcr0:0X00000000 mmcr1:0X22D000008A96B202 mmcra:0X00000000 event:0X0D61 mmcr0:0X00000000 mmcr1:0X22D000008A96B202 mmcra:0X00000000 event:0X0D62 mmcr0:0X00000000 mmcr1:0X22D000008A96B202 mmcra:0X00000000 event:0X0D63 mmcr0:0X00000000 mmcr1:0X22D000008A96B202 mmcra:0X00000000 event:0X0D64 mmcr0:0X00000000 mmcr1:0X22D000008A96B202 mmcra:0X00000000 event:0X0D65 mmcr0:0X00000000 mmcr1:0X22D000008A96B202 mmcra:0X00000000 #Group 215 pm_id_miss_erat_l1, Instruction/Data miss from ERAT/L1 cache event:0X0D70 mmcr0:0X00000000 mmcr1:0X00000000F6FCF0F0 mmcra:0X00000000 event:0X0D71 mmcr0:0X00000000 mmcr1:0X00000000F6FCF0F0 mmcra:0X00000000 event:0X0D72 mmcr0:0X00000000 mmcr1:0X00000000F6FCF0F0 mmcra:0X00000000 event:0X0D73 mmcr0:0X00000000 mmcr1:0X00000000F6FCF0F0 mmcra:0X00000000 event:0X0D74 mmcr0:0X00000000 mmcr1:0X00000000F6FCF0F0 mmcra:0X00000000 event:0X0D75 mmcr0:0X00000000 mmcr1:0X00000000F6FCF0F0 mmcra:0X00000000 #Group 216 pm_id_miss_erat_tlab, Instruction/Data miss from ERAT/TLB event:0X0D80 mmcr0:0X00000000 mmcr1:0X000000001EF6FCFC mmcra:0X00000000 event:0X0D81 mmcr0:0X00000000 mmcr1:0X000000001EF6FCFC mmcra:0X00000000 event:0X0D82 mmcr0:0X00000000 mmcr1:0X000000001EF6FCFC mmcra:0X00000000 event:0X0D83 mmcr0:0X00000000 mmcr1:0X000000001EF6FCFC mmcra:0X00000000 event:0X0D84 mmcr0:0X00000000 mmcr1:0X000000001EF6FCFC mmcra:0X00000000 event:0X0D85 mmcr0:0X00000000 mmcr1:0X000000001EF6FCFC mmcra:0X00000000 #Group 217 pm_compat_utilization1, Basic CPU utilization event:0X0D90 mmcr0:0X00000000 mmcr1:0X00000000FAF41EF4 mmcra:0X00000000 event:0X0D91 mmcr0:0X00000000 mmcr1:0X00000000FAF41EF4 mmcra:0X00000000 event:0X0D92 mmcr0:0X00000000 mmcr1:0X00000000FAF41EF4 mmcra:0X00000000 event:0X0D93 mmcr0:0X00000000 mmcr1:0X00000000FAF41EF4 mmcra:0X00000000 event:0X0D94 mmcr0:0X00000000 mmcr1:0X00000000FAF41EF4 mmcra:0X00000000 event:0X0D95 mmcr0:0X00000000 mmcr1:0X00000000FAF41EF4 mmcra:0X00000000 #Group 218 pm_compat_utilization2, CPI and utilization data event:0X0DA0 mmcr0:0X00000000 mmcr1:0X00000000F4F41EFA mmcra:0X00000000 event:0X0DA1 mmcr0:0X00000000 mmcr1:0X00000000F4F41EFA mmcra:0X00000000 event:0X0DA2 mmcr0:0X00000000 mmcr1:0X00000000F4F41EFA mmcra:0X00000000 event:0X0DA3 mmcr0:0X00000000 mmcr1:0X00000000F4F41EFA mmcra:0X00000000 event:0X0DA4 mmcr0:0X00000000 mmcr1:0X00000000F4F41EFA mmcra:0X00000000 event:0X0DA5 mmcr0:0X00000000 mmcr1:0X00000000F4F41EFA mmcra:0X00000000 #Group 219 pm_compat_cpi_1plus_ppc, Misc CPI and utilization data event:0X0DB0 mmcr0:0X00000000 mmcr1:0X00000000F2F4F2F2 mmcra:0X00000000 event:0X0DB1 mmcr0:0X00000000 mmcr1:0X00000000F2F4F2F2 mmcra:0X00000000 event:0X0DB2 mmcr0:0X00000000 mmcr1:0X00000000F2F4F2F2 mmcra:0X00000000 event:0X0DB3 mmcr0:0X00000000 mmcr1:0X00000000F2F4F2F2 mmcra:0X00000000 event:0X0DB4 mmcr0:0X00000000 mmcr1:0X00000000F2F4F2F2 mmcra:0X00000000 event:0X0DB5 mmcr0:0X00000000 mmcr1:0X00000000F2F4F2F2 mmcra:0X00000000 #Group 220 pm_compat_l1_dcache_load_store_miss, L1 D-Cache load/store miss event:0X0DC0 mmcr0:0X00000000 mmcr1:0X0000000002F0F0F0 mmcra:0X00000000 event:0X0DC1 mmcr0:0X00000000 mmcr1:0X0000000002F0F0F0 mmcra:0X00000000 event:0X0DC2 mmcr0:0X00000000 mmcr1:0X0000000002F0F0F0 mmcra:0X00000000 event:0X0DC3 mmcr0:0X00000000 mmcr1:0X0000000002F0F0F0 mmcra:0X00000000 event:0X0DC4 mmcr0:0X00000000 mmcr1:0X0000000002F0F0F0 mmcra:0X00000000 event:0X0DC5 mmcr0:0X00000000 mmcr1:0X0000000002F0F0F0 mmcra:0X00000000 #Group 221 pm_compat_l1_cache_load, L1 Cache loads event:0X0DD0 mmcr0:0X00000000 mmcr1:0X0000000002FEF6F0 mmcra:0X00000000 event:0X0DD1 mmcr0:0X00000000 mmcr1:0X0000000002FEF6F0 mmcra:0X00000000 event:0X0DD2 mmcr0:0X00000000 mmcr1:0X0000000002FEF6F0 mmcra:0X00000000 event:0X0DD3 mmcr0:0X00000000 mmcr1:0X0000000002FEF6F0 mmcra:0X00000000 event:0X0DD4 mmcr0:0X00000000 mmcr1:0X0000000002FEF6F0 mmcra:0X00000000 event:0X0DD5 mmcr0:0X00000000 mmcr1:0X0000000002FEF6F0 mmcra:0X00000000 #Group 222 pm_compat_instruction_directory, Instruction Directory event:0X0DE0 mmcr0:0X00000000 mmcr1:0X00000000F6FC02FC mmcra:0X00000000 event:0X0DE1 mmcr0:0X00000000 mmcr1:0X00000000F6FC02FC mmcra:0X00000000 event:0X0DE2 mmcr0:0X00000000 mmcr1:0X00000000F6FC02FC mmcra:0X00000000 event:0X0DE3 mmcr0:0X00000000 mmcr1:0X00000000F6FC02FC mmcra:0X00000000 event:0X0DE4 mmcr0:0X00000000 mmcr1:0X00000000F6FC02FC mmcra:0X00000000 event:0X0DE5 mmcr0:0X00000000 mmcr1:0X00000000F6FC02FC mmcra:0X00000000 #Group 223 pm_compat_suspend, Suspend Events event:0X0DF0 mmcr0:0X00000000 mmcr1:0X0000000000000000 mmcra:0X00000000 event:0X0DF1 mmcr0:0X00000000 mmcr1:0X0000000000000000 mmcra:0X00000000 event:0X0DF2 mmcr0:0X00000000 mmcr1:0X0000000000000000 mmcra:0X00000000 event:0X0DF3 mmcr0:0X00000000 mmcr1:0X0000000000000000 mmcra:0X00000000 event:0X0DF4 mmcr0:0X00000000 mmcr1:0X0000000000000000 mmcra:0X00000000 event:0X0DF5 mmcr0:0X00000000 mmcr1:0X0000000000000000 mmcra:0X00000000 #Group 224 pm_compat_misc_events1, Misc Events event:0X0E00 mmcr0:0X00000000 mmcr1:0X0000000002F8F81E mmcra:0X00000000 event:0X0E01 mmcr0:0X00000000 mmcr1:0X0000000002F8F81E mmcra:0X00000000 event:0X0E02 mmcr0:0X00000000 mmcr1:0X0000000002F8F81E mmcra:0X00000000 event:0X0E03 mmcr0:0X00000000 mmcr1:0X0000000002F8F81E mmcra:0X00000000 event:0X0E04 mmcr0:0X00000000 mmcr1:0X0000000002F8F81E mmcra:0X00000000 event:0X0E05 mmcr0:0X00000000 mmcr1:0X0000000002F8F81E mmcra:0X00000000 #Group 225 pm_compat_misc_events2, Misc Events event:0X0E10 mmcr0:0X00000000 mmcr1:0X00000000F0F2F4F8 mmcra:0X00000000 event:0X0E11 mmcr0:0X00000000 mmcr1:0X00000000F0F2F4F8 mmcra:0X00000000 event:0X0E12 mmcr0:0X00000000 mmcr1:0X00000000F0F2F4F8 mmcra:0X00000000 event:0X0E13 mmcr0:0X00000000 mmcr1:0X00000000F0F2F4F8 mmcra:0X00000000 event:0X0E14 mmcr0:0X00000000 mmcr1:0X00000000F0F2F4F8 mmcra:0X00000000 event:0X0E15 mmcr0:0X00000000 mmcr1:0X00000000F0F2F4F8 mmcra:0X00000000 #Group 226 pm_compat_misc_events3, Misc Events event:0X0E20 mmcr0:0X00000000 mmcr1:0X00000000F8F21EF6 mmcra:0X00000000 event:0X0E21 mmcr0:0X00000000 mmcr1:0X00000000F8F21EF6 mmcra:0X00000000 event:0X0E22 mmcr0:0X00000000 mmcr1:0X00000000F8F21EF6 mmcra:0X00000000 event:0X0E23 mmcr0:0X00000000 mmcr1:0X00000000F8F21EF6 mmcra:0X00000000 event:0X0E24 mmcr0:0X00000000 mmcr1:0X00000000F8F21EF6 mmcra:0X00000000 event:0X0E25 mmcr0:0X00000000 mmcr1:0X00000000F8F21EF6 mmcra:0X00000000 #Group 227 pm_mrk_br, Marked Branch events event:0X0E30 mmcr0:0X00000000 mmcr1:0X0000000036363602 mmcra:0X00000001 event:0X0E31 mmcr0:0X00000000 mmcr1:0X0000000036363602 mmcra:0X00000001 event:0X0E32 mmcr0:0X00000000 mmcr1:0X0000000036363602 mmcra:0X00000001 event:0X0E33 mmcr0:0X00000000 mmcr1:0X0000000036363602 mmcra:0X00000001 event:0X0E34 mmcr0:0X00000000 mmcr1:0X0000000036363602 mmcra:0X00000001 event:0X0E35 mmcr0:0X00000000 mmcr1:0X0000000036363602 mmcra:0X00000001 #Group 228 pm_mrk_dsource1, Marked data sources event:0X0E40 mmcr0:0X00000000 mmcr1:0XD00D00004A2E0248 mmcra:0X00000001 event:0X0E41 mmcr0:0X00000000 mmcr1:0XD00D00004A2E0248 mmcra:0X00000001 event:0X0E42 mmcr0:0X00000000 mmcr1:0XD00D00004A2E0248 mmcra:0X00000001 event:0X0E43 mmcr0:0X00000000 mmcr1:0XD00D00004A2E0248 mmcra:0X00000001 event:0X0E44 mmcr0:0X00000000 mmcr1:0XD00D00004A2E0248 mmcra:0X00000001 event:0X0E45 mmcr0:0X00000000 mmcr1:0XD00D00004A2E0248 mmcra:0X00000001 #Group 229 pm_mrk_dsource2, Marked data sources event:0X0E50 mmcr0:0X00000000 mmcr1:0X00D000003E024624 mmcra:0X00000001 event:0X0E51 mmcr0:0X00000000 mmcr1:0X00D000003E024624 mmcra:0X00000001 event:0X0E52 mmcr0:0X00000000 mmcr1:0X00D000003E024624 mmcra:0X00000001 event:0X0E53 mmcr0:0X00000000 mmcr1:0X00D000003E024624 mmcra:0X00000001 event:0X0E54 mmcr0:0X00000000 mmcr1:0X00D000003E024624 mmcra:0X00000001 event:0X0E55 mmcr0:0X00000000 mmcr1:0X00D000003E024624 mmcra:0X00000001 #Group 230 pm_mrk_dsource3, Marked data sources event:0X0E60 mmcr0:0X00000000 mmcr1:0XDD00000048480220 mmcra:0X00000001 event:0X0E61 mmcr0:0X00000000 mmcr1:0XDD00000048480220 mmcra:0X00000001 event:0X0E62 mmcr0:0X00000000 mmcr1:0XDD00000048480220 mmcra:0X00000001 event:0X0E63 mmcr0:0X00000000 mmcr1:0XDD00000048480220 mmcra:0X00000001 event:0X0E64 mmcr0:0X00000000 mmcr1:0XDD00000048480220 mmcra:0X00000001 event:0X0E65 mmcr0:0X00000000 mmcr1:0XDD00000048480220 mmcra:0X00000001 #Group 231 pm_mrk_dsource4, Marked data sources event:0X0E70 mmcr0:0X00000000 mmcr1:0X00DC0000022C4A42 mmcra:0X00000001 event:0X0E71 mmcr0:0X00000000 mmcr1:0X00DC0000022C4A42 mmcra:0X00000001 event:0X0E72 mmcr0:0X00000000 mmcr1:0X00DC0000022C4A42 mmcra:0X00000001 event:0X0E73 mmcr0:0X00000000 mmcr1:0X00DC0000022C4A42 mmcra:0X00000001 event:0X0E74 mmcr0:0X00000000 mmcr1:0X00DC0000022C4A42 mmcra:0X00000001 event:0X0E75 mmcr0:0X00000000 mmcr1:0X00DC0000022C4A42 mmcra:0X00000001 #Group 232 pm_mrk_dsource5, Marked data sources event:0X0E80 mmcr0:0X00000000 mmcr1:0XD000000044023026 mmcra:0X00000001 event:0X0E81 mmcr0:0X00000000 mmcr1:0XD000000044023026 mmcra:0X00000001 event:0X0E82 mmcr0:0X00000000 mmcr1:0XD000000044023026 mmcra:0X00000001 event:0X0E83 mmcr0:0X00000000 mmcr1:0XD000000044023026 mmcra:0X00000001 event:0X0E84 mmcr0:0X00000000 mmcr1:0XD000000044023026 mmcra:0X00000001 event:0X0E85 mmcr0:0X00000000 mmcr1:0XD000000044023026 mmcra:0X00000001 #Group 233 pm_mrk_dsource6, Marked data sources event:0X0E90 mmcr0:0X00000000 mmcr1:0X00D000003F244E02 mmcra:0X00000001 event:0X0E91 mmcr0:0X00000000 mmcr1:0X00D000003F244E02 mmcra:0X00000001 event:0X0E92 mmcr0:0X00000000 mmcr1:0X00D000003F244E02 mmcra:0X00000001 event:0X0E93 mmcr0:0X00000000 mmcr1:0X00D000003F244E02 mmcra:0X00000001 event:0X0E94 mmcr0:0X00000000 mmcr1:0X00D000003F244E02 mmcra:0X00000001 event:0X0E95 mmcr0:0X00000000 mmcr1:0X00D000003F244E02 mmcra:0X00000001 #Group 234 pm_mrk_dsource7, Marked data sources event:0X0EA0 mmcr0:0X00000000 mmcr1:0XD00D000040200248 mmcra:0X00000001 event:0X0EA1 mmcr0:0X00000000 mmcr1:0XD00D000040200248 mmcra:0X00000001 event:0X0EA2 mmcr0:0X00000000 mmcr1:0XD00D000040200248 mmcra:0X00000001 event:0X0EA3 mmcr0:0X00000000 mmcr1:0XD00D000040200248 mmcra:0X00000001 event:0X0EA4 mmcr0:0X00000000 mmcr1:0XD00D000040200248 mmcra:0X00000001 event:0X0EA5 mmcr0:0X00000000 mmcr1:0XD00D000040200248 mmcra:0X00000001 #Group 235 pm_mrk_dsource8, Marked data sources event:0X0EB0 mmcr0:0X00000000 mmcr1:0XDD00000042480228 mmcra:0X00000001 event:0X0EB1 mmcr0:0X00000000 mmcr1:0XDD00000042480228 mmcra:0X00000001 event:0X0EB2 mmcr0:0X00000000 mmcr1:0XDD00000042480228 mmcra:0X00000001 event:0X0EB3 mmcr0:0X00000000 mmcr1:0XDD00000042480228 mmcra:0X00000001 event:0X0EB4 mmcr0:0X00000000 mmcr1:0XDD00000042480228 mmcra:0X00000001 event:0X0EB5 mmcr0:0X00000000 mmcr1:0XDD00000042480228 mmcra:0X00000001 #Group 236 pm_mrk_dsource9, Marked data sources event:0X0EC0 mmcr0:0X00000000 mmcr1:0X00DD0000022A4448 mmcra:0X00000001 event:0X0EC1 mmcr0:0X00000000 mmcr1:0X00DD0000022A4448 mmcra:0X00000001 event:0X0EC2 mmcr0:0X00000000 mmcr1:0X00DD0000022A4448 mmcra:0X00000001 event:0X0EC3 mmcr0:0X00000000 mmcr1:0X00DD0000022A4448 mmcra:0X00000001 event:0X0EC4 mmcr0:0X00000000 mmcr1:0X00DD0000022A4448 mmcra:0X00000001 event:0X0EC5 mmcr0:0X00000000 mmcr1:0X00DD0000022A4448 mmcra:0X00000001 #Group 237 pm_mrk_dsource10, Marked data sources event:0X0ED0 mmcr0:0X00000000 mmcr1:0XD0C000004C284202 mmcra:0X00000001 event:0X0ED1 mmcr0:0X00000000 mmcr1:0XD0C000004C284202 mmcra:0X00000001 event:0X0ED2 mmcr0:0X00000000 mmcr1:0XD0C000004C284202 mmcra:0X00000001 event:0X0ED3 mmcr0:0X00000000 mmcr1:0XD0C000004C284202 mmcra:0X00000001 event:0X0ED4 mmcr0:0X00000000 mmcr1:0XD0C000004C284202 mmcra:0X00000001 event:0X0ED5 mmcr0:0X00000000 mmcr1:0XD0C000004C284202 mmcra:0X00000001 #Group 238 pm_mrk_dsource11, Marked data sources event:0X0EE0 mmcr0:0X00000000 mmcr1:0X00D000003E02422C mmcra:0X00000001 event:0X0EE1 mmcr0:0X00000000 mmcr1:0X00D000003E02422C mmcra:0X00000001 event:0X0EE2 mmcr0:0X00000000 mmcr1:0X00D000003E02422C mmcra:0X00000001 event:0X0EE3 mmcr0:0X00000000 mmcr1:0X00D000003E02422C mmcra:0X00000001 event:0X0EE4 mmcr0:0X00000000 mmcr1:0X00D000003E02422C mmcra:0X00000001 event:0X0EE5 mmcr0:0X00000000 mmcr1:0X00D000003E02422C mmcra:0X00000001 #Group 239 pm_mrk_dsource12, Marked data sources event:0X0EF0 mmcr0:0X00000000 mmcr1:0XD00000004E263002 mmcra:0X00000001 event:0X0EF1 mmcr0:0X00000000 mmcr1:0XD00000004E263002 mmcra:0X00000001 event:0X0EF2 mmcr0:0X00000000 mmcr1:0XD00000004E263002 mmcra:0X00000001 event:0X0EF3 mmcr0:0X00000000 mmcr1:0XD00000004E263002 mmcra:0X00000001 event:0X0EF4 mmcr0:0X00000000 mmcr1:0XD00000004E263002 mmcra:0X00000001 event:0X0EF5 mmcr0:0X00000000 mmcr1:0XD00000004E263002 mmcra:0X00000001 #Group 240 pm_mrk_dsource13, Marked data sources event:0X0F00 mmcr0:0X00000000 mmcr1:0X00D000003F024C2A mmcra:0X00000001 event:0X0F01 mmcr0:0X00000000 mmcr1:0X00D000003F024C2A mmcra:0X00000001 event:0X0F02 mmcr0:0X00000000 mmcr1:0X00D000003F024C2A mmcra:0X00000001 event:0X0F03 mmcr0:0X00000000 mmcr1:0X00D000003F024C2A mmcra:0X00000001 event:0X0F04 mmcr0:0X00000000 mmcr1:0X00D000003F024C2A mmcra:0X00000001 event:0X0F05 mmcr0:0X00000000 mmcr1:0X00D000003F024C2A mmcra:0X00000001 #Group 241 pm_mrk_lsu_flush1, Marked LSU Flush event:0X0F10 mmcr0:0X00000000 mmcr1:0XDD0000008486021E mmcra:0X00000001 event:0X0F11 mmcr0:0X00000000 mmcr1:0XDD0000008486021E mmcra:0X00000001 event:0X0F12 mmcr0:0X00000000 mmcr1:0XDD0000008486021E mmcra:0X00000001 event:0X0F13 mmcr0:0X00000000 mmcr1:0XDD0000008486021E mmcra:0X00000001 event:0X0F14 mmcr0:0X00000000 mmcr1:0XDD0000008486021E mmcra:0X00000001 event:0X0F15 mmcr0:0X00000000 mmcr1:0XDD0000008486021E mmcra:0X00000001 #Group 242 pm_mrk_lsu_flush2, Marked LSU Flush event:0X0F20 mmcr0:0X00000000 mmcr1:0X00DD0000021E888A mmcra:0X00000001 event:0X0F21 mmcr0:0X00000000 mmcr1:0X00DD0000021E888A mmcra:0X00000001 event:0X0F22 mmcr0:0X00000000 mmcr1:0X00DD0000021E888A mmcra:0X00000001 event:0X0F23 mmcr0:0X00000000 mmcr1:0X00DD0000021E888A mmcra:0X00000001 event:0X0F24 mmcr0:0X00000000 mmcr1:0X00DD0000021E888A mmcra:0X00000001 event:0X0F25 mmcr0:0X00000000 mmcr1:0X00DD0000021E888A mmcra:0X00000001 #Group 243 pm_mrk_rejects, Marked rejects event:0X0F30 mmcr0:0X00000000 mmcr1:0XDD000000828C0264 mmcra:0X00000001 event:0X0F31 mmcr0:0X00000000 mmcr1:0XDD000000828C0264 mmcra:0X00000001 event:0X0F32 mmcr0:0X00000000 mmcr1:0XDD000000828C0264 mmcra:0X00000001 event:0X0F33 mmcr0:0X00000000 mmcr1:0XDD000000828C0264 mmcra:0X00000001 event:0X0F34 mmcr0:0X00000000 mmcr1:0XDD000000828C0264 mmcra:0X00000001 event:0X0F35 mmcr0:0X00000000 mmcr1:0XDD000000828C0264 mmcra:0X00000001 #Group 244 pm_mrk_inst, Marked instruction events event:0X0F40 mmcr0:0X00000000 mmcr1:0X0000000032303002 mmcra:0X00000001 event:0X0F41 mmcr0:0X00000000 mmcr1:0X0000000032303002 mmcra:0X00000001 event:0X0F42 mmcr0:0X00000000 mmcr1:0X0000000032303002 mmcra:0X00000001 event:0X0F43 mmcr0:0X00000000 mmcr1:0X0000000032303002 mmcra:0X00000001 event:0X0F44 mmcr0:0X00000000 mmcr1:0X0000000032303002 mmcra:0X00000001 event:0X0F45 mmcr0:0X00000000 mmcr1:0X0000000032303002 mmcra:0X00000001 #Group 245 pm_mrk_st, Marked stores events event:0X0F50 mmcr0:0X00000000 mmcr1:0X0000000034343402 mmcra:0X00000001 event:0X0F51 mmcr0:0X00000000 mmcr1:0X0000000034343402 mmcra:0X00000001 event:0X0F52 mmcr0:0X00000000 mmcr1:0X0000000034343402 mmcra:0X00000001 event:0X0F53 mmcr0:0X00000000 mmcr1:0X0000000034343402 mmcra:0X00000001 event:0X0F54 mmcr0:0X00000000 mmcr1:0X0000000034343402 mmcra:0X00000001 event:0X0F55 mmcr0:0X00000000 mmcr1:0X0000000034343402 mmcra:0X00000001 #Group 246 pm_mrk_dtlb_miss1, Marked Data TLB Miss event:0X0F60 mmcr0:0X00000000 mmcr1:0X0DDD0000025E5E5E mmcra:0X00000001 event:0X0F61 mmcr0:0X00000000 mmcr1:0X0DDD0000025E5E5E mmcra:0X00000001 event:0X0F62 mmcr0:0X00000000 mmcr1:0X0DDD0000025E5E5E mmcra:0X00000001 event:0X0F63 mmcr0:0X00000000 mmcr1:0X0DDD0000025E5E5E mmcra:0X00000001 event:0X0F64 mmcr0:0X00000000 mmcr1:0X0DDD0000025E5E5E mmcra:0X00000001 event:0X0F65 mmcr0:0X00000000 mmcr1:0X0DDD0000025E5E5E mmcra:0X00000001 #Group 247 pm_mrk_dtlb_miss2, Marked Data TLB Miss event:0X0F70 mmcr0:0X00000000 mmcr1:0XDDD000005E5E5E02 mmcra:0X00000001 event:0X0F71 mmcr0:0X00000000 mmcr1:0XDDD000005E5E5E02 mmcra:0X00000001 event:0X0F72 mmcr0:0X00000000 mmcr1:0XDDD000005E5E5E02 mmcra:0X00000001 event:0X0F73 mmcr0:0X00000000 mmcr1:0XDDD000005E5E5E02 mmcra:0X00000001 event:0X0F74 mmcr0:0X00000000 mmcr1:0XDDD000005E5E5E02 mmcra:0X00000001 event:0X0F75 mmcr0:0X00000000 mmcr1:0XDDD000005E5E5E02 mmcra:0X00000001 #Group 248 pm_mrk_derat_miss1, Marked DERAT Miss events event:0X0F80 mmcr0:0X00000000 mmcr1:0X0DDD0000025C5C5C mmcra:0X00000001 event:0X0F81 mmcr0:0X00000000 mmcr1:0X0DDD0000025C5C5C mmcra:0X00000001 event:0X0F82 mmcr0:0X00000000 mmcr1:0X0DDD0000025C5C5C mmcra:0X00000001 event:0X0F83 mmcr0:0X00000000 mmcr1:0X0DDD0000025C5C5C mmcra:0X00000001 event:0X0F84 mmcr0:0X00000000 mmcr1:0X0DDD0000025C5C5C mmcra:0X00000001 event:0X0F85 mmcr0:0X00000000 mmcr1:0X0DDD0000025C5C5C mmcra:0X00000001 #Group 249 pm_mrk_derat_miss2, Marked DERAT Miss events event:0X0F90 mmcr0:0X00000000 mmcr1:0XDDD000005C5C5C02 mmcra:0X00000001 event:0X0F91 mmcr0:0X00000000 mmcr1:0XDDD000005C5C5C02 mmcra:0X00000001 event:0X0F92 mmcr0:0X00000000 mmcr1:0XDDD000005C5C5C02 mmcra:0X00000001 event:0X0F93 mmcr0:0X00000000 mmcr1:0XDDD000005C5C5C02 mmcra:0X00000001 event:0X0F94 mmcr0:0X00000000 mmcr1:0XDDD000005C5C5C02 mmcra:0X00000001 event:0X0F95 mmcr0:0X00000000 mmcr1:0XDDD000005C5C5C02 mmcra:0X00000001 #Group 250 pm_mrk_misc_miss, marked Miss Events event:0X0FA0 mmcr0:0X00000000 mmcr1:0X00D000003E025A3E mmcra:0X00000001 event:0X0FA1 mmcr0:0X00000000 mmcr1:0X00D000003E025A3E mmcra:0X00000001 event:0X0FA2 mmcr0:0X00000000 mmcr1:0X00D000003E025A3E mmcra:0X00000001 event:0X0FA3 mmcr0:0X00000000 mmcr1:0X00D000003E025A3E mmcra:0X00000001 event:0X0FA4 mmcr0:0X00000000 mmcr1:0X00D000003E025A3E mmcra:0X00000001 event:0X0FA5 mmcr0:0X00000000 mmcr1:0X00D000003E025A3E mmcra:0X00000001 #Group 251 pm_mrk_pteg1, Marked PTEG event:0X0FB0 mmcr0:0X00000000 mmcr1:0X0DDD000002525656 mmcra:0X00000001 event:0X0FB1 mmcr0:0X00000000 mmcr1:0X0DDD000002525656 mmcra:0X00000001 event:0X0FB2 mmcr0:0X00000000 mmcr1:0X0DDD000002525656 mmcra:0X00000001 event:0X0FB3 mmcr0:0X00000000 mmcr1:0X0DDD000002525656 mmcra:0X00000001 event:0X0FB4 mmcr0:0X00000000 mmcr1:0X0DDD000002525656 mmcra:0X00000001 event:0X0FB5 mmcr0:0X00000000 mmcr1:0X0DDD000002525656 mmcra:0X00000001 #Group 252 pm_mrk_pteg2, Marked PTEG event:0X0FC0 mmcr0:0X00000000 mmcr1:0XDDD0000050545202 mmcra:0X00000001 event:0X0FC1 mmcr0:0X00000000 mmcr1:0XDDD0000050545202 mmcra:0X00000001 event:0X0FC2 mmcr0:0X00000000 mmcr1:0XDDD0000050545202 mmcra:0X00000001 event:0X0FC3 mmcr0:0X00000000 mmcr1:0XDDD0000050545202 mmcra:0X00000001 event:0X0FC4 mmcr0:0X00000000 mmcr1:0XDDD0000050545202 mmcra:0X00000001 event:0X0FC5 mmcr0:0X00000000 mmcr1:0XDDD0000050545202 mmcra:0X00000001 #Group 253 pm_mrk_pteg3, Marked PTEG event:0X0FD0 mmcr0:0X00000000 mmcr1:0X0DDD000002565654 mmcra:0X00000001 event:0X0FD1 mmcr0:0X00000000 mmcr1:0X0DDD000002565654 mmcra:0X00000001 event:0X0FD2 mmcr0:0X00000000 mmcr1:0X0DDD000002565654 mmcra:0X00000001 event:0X0FD3 mmcr0:0X00000000 mmcr1:0X0DDD000002565654 mmcra:0X00000001 event:0X0FD4 mmcr0:0X00000000 mmcr1:0X0DDD000002565654 mmcra:0X00000001 event:0X0FD5 mmcr0:0X00000000 mmcr1:0X0DDD000002565654 mmcra:0X00000001 #Group 254 pm_mrk_pteg4, Marked PTEG event:0X0FE0 mmcr0:0X00000000 mmcr1:0XDD0D000054500258 mmcra:0X00000001 event:0X0FE1 mmcr0:0X00000000 mmcr1:0XDD0D000054500258 mmcra:0X00000001 event:0X0FE2 mmcr0:0X00000000 mmcr1:0XDD0D000054500258 mmcra:0X00000001 event:0X0FE3 mmcr0:0X00000000 mmcr1:0XDD0D000054500258 mmcra:0X00000001 event:0X0FE4 mmcr0:0X00000000 mmcr1:0XDD0D000054500258 mmcra:0X00000001 event:0X0FE5 mmcr0:0X00000000 mmcr1:0XDD0D000054500258 mmcra:0X00000001 #Group 255 pm_mrk_pteg5, Marked PTEG event:0X0FF0 mmcr0:0X00000000 mmcr1:0XDD0D000052580252 mmcra:0X00000001 event:0X0FF1 mmcr0:0X00000000 mmcr1:0XDD0D000052580252 mmcra:0X00000001 event:0X0FF2 mmcr0:0X00000000 mmcr1:0XDD0D000052580252 mmcra:0X00000001 event:0X0FF3 mmcr0:0X00000000 mmcr1:0XDD0D000052580252 mmcra:0X00000001 event:0X0FF4 mmcr0:0X00000000 mmcr1:0XDD0D000052580252 mmcra:0X00000001 event:0X0FF5 mmcr0:0X00000000 mmcr1:0XDD0D000052580252 mmcra:0X00000001 #Group 256 pm_mrk_misc1, Marked misc events event:0X1000 mmcr0:0X00000000 mmcr1:0XD00000008E023A34 mmcra:0X00000001 event:0X1001 mmcr0:0X00000000 mmcr1:0XD00000008E023A34 mmcra:0X00000001 event:0X1002 mmcr0:0X00000000 mmcr1:0XD00000008E023A34 mmcra:0X00000001 event:0X1003 mmcr0:0X00000000 mmcr1:0XD00000008E023A34 mmcra:0X00000001 event:0X1004 mmcr0:0X00000000 mmcr1:0XD00000008E023A34 mmcra:0X00000001 event:0X1005 mmcr0:0X00000000 mmcr1:0XD00000008E023A34 mmcra:0X00000001 #Group 257 pm_mrk_misc2, Marked misc events event:0X1010 mmcr0:0X00000000 mmcr1:0X0000000002383A32 mmcra:0X00000001 event:0X1011 mmcr0:0X00000000 mmcr1:0X0000000002383A32 mmcra:0X00000001 event:0X1012 mmcr0:0X00000000 mmcr1:0X0000000002383A32 mmcra:0X00000001 event:0X1013 mmcr0:0X00000000 mmcr1:0X0000000002383A32 mmcra:0X00000001 event:0X1014 mmcr0:0X00000000 mmcr1:0X0000000002383A32 mmcra:0X00000001 event:0X1015 mmcr0:0X00000000 mmcr1:0X0000000002383A32 mmcra:0X00000001 #Group 258 pm_mrk_misc3, Marked misc events event:0X1020 mmcr0:0X00000000 mmcr1:0X00D00000023A8032 mmcra:0X00000001 event:0X1021 mmcr0:0X00000000 mmcr1:0X00D00000023A8032 mmcra:0X00000001 event:0X1022 mmcr0:0X00000000 mmcr1:0X00D00000023A8032 mmcra:0X00000001 event:0X1023 mmcr0:0X00000000 mmcr1:0X00D00000023A8032 mmcra:0X00000001 event:0X1024 mmcr0:0X00000000 mmcr1:0X00D00000023A8032 mmcra:0X00000001 event:0X1025 mmcr0:0X00000000 mmcr1:0X00D00000023A8032 mmcra:0X00000001 #Group 259 pm_mrk_misc4, Marked misc events event:0X1030 mmcr0:0X00000000 mmcr1:0X000000003C023238 mmcra:0X00000001 event:0X1031 mmcr0:0X00000000 mmcr1:0X000000003C023238 mmcra:0X00000001 event:0X1032 mmcr0:0X00000000 mmcr1:0X000000003C023238 mmcra:0X00000001 event:0X1033 mmcr0:0X00000000 mmcr1:0X000000003C023238 mmcra:0X00000001 event:0X1034 mmcr0:0X00000000 mmcr1:0X000000003C023238 mmcra:0X00000001 event:0X1035 mmcr0:0X00000000 mmcr1:0X000000003C023238 mmcra:0X00000001 #Group 260 pm_mrk_misc5, Marked misc events event:0X1040 mmcr0:0X00000000 mmcr1:0X000000003D323F02 mmcra:0X00000001 event:0X1041 mmcr0:0X00000000 mmcr1:0X000000003D323F02 mmcra:0X00000001 event:0X1042 mmcr0:0X00000000 mmcr1:0X000000003D323F02 mmcra:0X00000001 event:0X1043 mmcr0:0X00000000 mmcr1:0X000000003D323F02 mmcra:0X00000001 event:0X1044 mmcr0:0X00000000 mmcr1:0X000000003D323F02 mmcra:0X00000001 event:0X1045 mmcr0:0X00000000 mmcr1:0X000000003D323F02 mmcra:0X00000001 #Group 261 pm_mrk_misc6, Marked misc events event:0X1050 mmcr0:0X00000000 mmcr1:0X0000000030F40230 mmcra:0X00000001 event:0X1051 mmcr0:0X00000000 mmcr1:0X0000000030F40230 mmcra:0X00000001 event:0X1052 mmcr0:0X00000000 mmcr1:0X0000000030F40230 mmcra:0X00000001 event:0X1053 mmcr0:0X00000000 mmcr1:0X0000000030F40230 mmcra:0X00000001 event:0X1054 mmcr0:0X00000000 mmcr1:0X0000000030F40230 mmcra:0X00000001 event:0X1055 mmcr0:0X00000000 mmcr1:0X0000000030F40230 mmcra:0X00000001 #Group 262 pm_mrk_misc7, Marked misc events event:0X1060 mmcr0:0X00000000 mmcr1:0XD000000082026464 mmcra:0X00000001 event:0X1061 mmcr0:0X00000000 mmcr1:0XD000000082026464 mmcra:0X00000001 event:0X1062 mmcr0:0X00000000 mmcr1:0XD000000082026464 mmcra:0X00000001 event:0X1063 mmcr0:0X00000000 mmcr1:0XD000000082026464 mmcra:0X00000001 event:0X1064 mmcr0:0X00000000 mmcr1:0XD000000082026464 mmcra:0X00000001 event:0X1065 mmcr0:0X00000000 mmcr1:0XD000000082026464 mmcra:0X00000001 #Group 263 pm_mrk_misc8, Marked misc events event:0X1070 mmcr0:0X00000000 mmcr1:0X000000001E1E0232 mmcra:0X00000001 event:0X1071 mmcr0:0X00000000 mmcr1:0X000000001E1E0232 mmcra:0X00000001 event:0X1072 mmcr0:0X00000000 mmcr1:0X000000001E1E0232 mmcra:0X00000001 event:0X1073 mmcr0:0X00000000 mmcr1:0X000000001E1E0232 mmcra:0X00000001 event:0X1074 mmcr0:0X00000000 mmcr1:0X000000001E1E0232 mmcra:0X00000001 event:0X1075 mmcr0:0X00000000 mmcr1:0X000000001E1E0232 mmcra:0X00000001 #Group 264 pm_gct_noslot, GCT no slot events ###### DO NOT REMOVE ###### # Manually added group event:0X1080 mmcr0:0X00000000 mmcr1:0X00400000F908021B mmcra:0X00000000 event:0X1081 mmcr0:0X00000000 mmcr1:0X00400000F908021B mmcra:0X00000000 event:0X1082 mmcr0:0X00000000 mmcr1:0X00400000F908021B mmcra:0X00000000 event:0X1083 mmcr0:0X00000000 mmcr1:0X00400000F908021B mmcra:0X00000000 event:0X1084 mmcr0:0X00000000 mmcr1:0X00400000F908021B mmcra:0X00000000 event:0X1085 mmcr0:0X00000000 mmcr1:0X00400000F908021B mmcra:0X00000000 #Group 265 pm_cmplu_stall, CMPLU stall events ###### DO NOT REMOVE ###### event:0X1090 mmcr0:0X00000000 mmcr1:0X000000001D3C021C mmcra:0X00000000 event:0X1091 mmcr0:0X00000000 mmcr1:0X000000001D3C021C mmcra:0X00000000 event:0X1092 mmcr0:0X00000000 mmcr1:0X000000001D3C021C mmcra:0X00000000 event:0X1093 mmcr0:0X00000000 mmcr1:0X000000001D3C021C mmcra:0X00000000 event:0X1094 mmcr0:0X00000000 mmcr1:0X000000001D3C021C mmcra:0X00000000 event:0X1095 mmcr0:0X00000000 mmcr1:0X000000001D3C021C mmcra:0X00000000 #Group 266 pm_cmplu_stall2, CMPLU stall (with vector) ###### DO NOT REMOVE ###### event:0X10A0 mmcr0:0X00000000 mmcr1:0X00000000281D3F0B mmcra:0X00000000 event:0X10A1 mmcr0:0X00000000 mmcr1:0X00000000281D3F0B mmcra:0X00000000 event:0X10A2 mmcr0:0X00000000 mmcr1:0X00000000281D3F0B mmcra:0X00000000 event:0X10A3 mmcr0:0X00000000 mmcr1:0X00000000281D3F0B mmcra:0X00000000 event:0X10A4 mmcr0:0X00000000 mmcr1:0X00000000281D3F0B mmcra:0X00000000 event:0X10A5 mmcr0:0X00000000 mmcr1:0X00000000281D3F0B mmcra:0X00000000 #Group 267 pm_cmplu_stall3, CMPLU stall (scalar) ###### DO NOT REMOVE ###### event:0X10B0 mmcr0:0X00000000 mmcr1:0X00000000F4183E13 mmcra:0X00000000 event:0X10B1 mmcr0:0X00000000 mmcr1:0X00000000F4183E13 mmcra:0X00000000 event:0X10B2 mmcr0:0X00000000 mmcr1:0X00000000F4183E13 mmcra:0X00000000 event:0X10B3 mmcr0:0X00000000 mmcr1:0X00000000F4183E13 mmcra:0X00000000 event:0X10B4 mmcr0:0X00000000 mmcr1:0X00000000F4183E13 mmcra:0X00000000 event:0X10B5 mmcr0:0X00000000 mmcr1:0X00000000F4183E13 mmcra:0X00000000 #Group 268 pm_cmplu_ifu, IFU stall ###### DO NOT REMOVE ###### event:0X10C0 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4D mmcra:0X00000000 event:0X10C1 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4D mmcra:0X00000000 event:0X10C2 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4D mmcra:0X00000000 event:0X10C3 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4D mmcra:0X00000000 event:0X10C4 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4D mmcra:0X00000000 event:0X10C5 mmcr0:0X00000000 mmcr1:0X0CC00000289C9E4D mmcra:0X00000000 oprofile-1.3.0/events/ppc64/power7/unit_masks0000664000175000017500000000035412534404406016044 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2009. # Contributed by Maynard Johnson . # # ppc64 POWER7 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power5/0000775000175000017500000000000013323173530014016 500000000000000oprofile-1.3.0/events/ppc64/power5/events0000664000175000017500000035157312534404406015205 00000000000000#PPC64 POWER5 events # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously when # using legacy opcontrol to do profiling. When profiling with operf, # events from different groups may be specified, and the Linux Performance # Events Kernel Subsystem code will handle the necessary multiplexing. # # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:3 um:zero minimum:10000 name:CYCLES : Processor Cycles using continuous sampling #Group 1 pm_utilization, CPI and utilization data event:0X010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Run cycles event:0X011 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP1 : (Group 1 pm_utilization) IOPS instructions completed event:0X012 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP1 : (Group 1 pm_utilization) Instructions dispatched event:0X013 counters:3 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_utilization) Processor cycles event:0X014 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_utilization) Instructions completed event:0X015 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Run cycles #Group 2 pm_completion, Completion and cycle counts event:0X020 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP2 : (Group 2 pm_completion) One or more PPC instruction completed event:0X021 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP2 : (Group 2 pm_completion) Cycles GCT empty event:0X022 counters:2 um:zero minimum:1000 name:PM_GRP_CMPL_GRP2 : (Group 2 pm_completion) Group completed event:0X023 counters:3 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_completion) Processor cycles event:0X024 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP2 : (Group 2 pm_completion) Instructions completed event:0X025 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP2 : (Group 2 pm_completion) Run cycles #Group 3 pm_group_dispatch, Group dispatch events event:0X030 counters:0 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP3 : (Group 3 pm_group_dispatch) Group dispatch valid event:0X031 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP3 : (Group 3 pm_group_dispatch) Group dispatch rejected event:0X032 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_BLK_SB_CYC_GRP3 : (Group 3 pm_group_dispatch) Cycles group dispatch blocked by scoreboard event:0X033 counters:3 um:zero minimum:1000 name:PM_INST_DISP_GRP3 : (Group 3 pm_group_dispatch) Instructions dispatched event:0X034 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_group_dispatch) Instructions completed event:0X035 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP3 : (Group 3 pm_group_dispatch) Run cycles #Group 4 pm_clb1, CLB fullness event:0X040 counters:0 um:zero minimum:1000 name:PM_0INST_CLB_CYC_GRP4 : (Group 4 pm_clb1) Cycles no instructions in CLB event:0X041 counters:1 um:zero minimum:1000 name:PM_2INST_CLB_CYC_GRP4 : (Group 4 pm_clb1) Cycles 2 instructions in CLB event:0X042 counters:2 um:zero minimum:1000 name:PM_CLB_EMPTY_CYC_GRP4 : (Group 4 pm_clb1) Cycles CLB empty event:0X043 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP4 : (Group 4 pm_clb1) Marked load latency from L3.5 modified event:0X044 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP4 : (Group 4 pm_clb1) Instructions completed event:0X045 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP4 : (Group 4 pm_clb1) Run cycles #Group 5 pm_clb2, CLB fullness event:0X050 counters:0 um:zero minimum:1000 name:PM_5INST_CLB_CYC_GRP5 : (Group 5 pm_clb2) Cycles 5 instructions in CLB event:0X051 counters:1 um:zero minimum:1000 name:PM_6INST_CLB_CYC_GRP5 : (Group 5 pm_clb2) Cycles 6 instructions in CLB event:0X052 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP5 : (Group 5 pm_clb2) Marked instruction valid in SRQ event:0X053 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP5 : (Group 5 pm_clb2) IOPS instructions completed event:0X054 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP5 : (Group 5 pm_clb2) Instructions completed event:0X055 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP5 : (Group 5 pm_clb2) Run cycles #Group 6 pm_gct_empty, GCT empty reasons event:0X060 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP6 : (Group 6 pm_gct_empty) Cycles no GCT slot allocated event:0X061 counters:1 um:zero minimum:1000 name:PM_GCT_NOSLOT_IC_MISS_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by I cache miss event:0X062 counters:2 um:zero minimum:1000 name:PM_GCT_NOSLOT_SRQ_FULL_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by SRQ full event:0X063 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by branch mispredict event:0X064 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP6 : (Group 6 pm_gct_empty) Instructions completed event:0X065 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP6 : (Group 6 pm_gct_empty) Run cycles #Group 7 pm_gct_usage, GCT Usage event:0X070 counters:0 um:zero minimum:1000 name:PM_GCT_USAGE_00to59_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT less than 60% full event:0X071 counters:1 um:zero minimum:1000 name:PM_GCT_USAGE_60to79_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT 60-79% full event:0X072 counters:2 um:zero minimum:1000 name:PM_GCT_USAGE_80to99_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT 80-99% full event:0X073 counters:3 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT full event:0X074 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP7 : (Group 7 pm_gct_usage) Instructions completed event:0X075 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP7 : (Group 7 pm_gct_usage) Run cycles #Group 8 pm_lsu1, LSU LRQ and LMQ events event:0X080 counters:0 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP8 : (Group 8 pm_lsu1) LRQ slot 0 allocated event:0X081 counters:1 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP8 : (Group 8 pm_lsu1) LRQ slot 0 valid event:0X082 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP8 : (Group 8 pm_lsu1) LMQ slot 0 allocated event:0X083 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP8 : (Group 8 pm_lsu1) LMQ slot 0 valid event:0X084 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP8 : (Group 8 pm_lsu1) Instructions completed event:0X085 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP8 : (Group 8 pm_lsu1) Run cycles #Group 9 pm_lsu2, LSU SRQ events event:0X090 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP9 : (Group 9 pm_lsu2) SRQ slot 0 allocated event:0X091 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP9 : (Group 9 pm_lsu2) SRQ slot 0 valid event:0X092 counters:2 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP9 : (Group 9 pm_lsu2) SRQ sync duration event:0X093 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP9 : (Group 9 pm_lsu2) Cycles SRQ full event:0X094 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP9 : (Group 9 pm_lsu2) Instructions completed event:0X095 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP9 : (Group 9 pm_lsu2) Run cycles #Group 10 pm_lsu3, LSU SRQ and LMQ events event:0X0A0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_STFWD_GRP10 : (Group 10 pm_lsu3) SRQ store forwarded event:0X0A1 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP10 : (Group 10 pm_lsu3) Cycles LMQ and SRQ empty event:0X0A2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_LHR_MERGE_GRP10 : (Group 10 pm_lsu3) LMQ LHR merges event:0X0A3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP10 : (Group 10 pm_lsu3) Cycles SRQ empty event:0X0A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP10 : (Group 10 pm_lsu3) Instructions completed event:0X0A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP10 : (Group 10 pm_lsu3) Run cycles #Group 11 pm_prefetch1, Prefetch stream allocation event:0X0B0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP11 : (Group 11 pm_prefetch1) Instructions fetched missed L2 event:0X0B1 counters:1 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP11 : (Group 11 pm_prefetch1) Cycles at least 1 instruction fetched event:0X0B2 counters:2 um:zero minimum:1000 name:PM_DC_PREF_STREAM_ALLOC_BLK_GRP11 : (Group 11 pm_prefetch1) D cache out of prefech streams event:0X0B3 counters:3 um:zero minimum:1000 name:PM_DC_PREF_STREAM_ALLOC_GRP11 : (Group 11 pm_prefetch1) D cache new prefetch stream allocated event:0X0B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP11 : (Group 11 pm_prefetch1) Instructions completed event:0X0B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP11 : (Group 11 pm_prefetch1) Run cycles #Group 12 pm_prefetch2, Prefetch events event:0X0C0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP12 : (Group 12 pm_prefetch2) IOPS instructions completed event:0X0C1 counters:1 um:zero minimum:1000 name:PM_CLB_FULL_CYC_GRP12 : (Group 12 pm_prefetch2) Cycles CLB full event:0X0C2 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP12 : (Group 12 pm_prefetch2) L1 cache data prefetches event:0X0C3 counters:3 um:zero minimum:1000 name:PM_IC_PREF_INSTALL_GRP12 : (Group 12 pm_prefetch2) Instruction prefetched installed in prefetch event:0X0C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP12 : (Group 12 pm_prefetch2) Instructions completed event:0X0C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP12 : (Group 12 pm_prefetch2) Run cycles #Group 13 pm_prefetch3, L2 prefetch and misc events event:0X0D0 counters:0 um:zero minimum:1000 name:PM_LSU_BUSY_REJECT_GRP13 : (Group 13 pm_prefetch3) LSU busy due to reject event:0X0D1 counters:1 um:zero minimum:1000 name:PM_1INST_CLB_CYC_GRP13 : (Group 13 pm_prefetch3) Cycles 1 instruction in CLB event:0X0D2 counters:2 um:zero minimum:1000 name:PM_L2_PREF_GRP13 : (Group 13 pm_prefetch3) L2 cache prefetches event:0X0D3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP13 : (Group 13 pm_prefetch3) IOPS instructions completed event:0X0D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP13 : (Group 13 pm_prefetch3) Instructions completed event:0X0D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP13 : (Group 13 pm_prefetch3) Run cycles #Group 14 pm_prefetch4, Misc prefetch and reject events event:0X0E0 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_SRQ_LHS_GRP14 : (Group 14 pm_prefetch4) LSU0 SRQ rejects event:0X0E1 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_SRQ_LHS_GRP14 : (Group 14 pm_prefetch4) LSU1 SRQ rejects event:0X0E2 counters:2 um:zero minimum:1000 name:PM_DC_PREF_DST_GRP14 : (Group 14 pm_prefetch4) DST (Data Stream Touch) stream start event:0X0E3 counters:3 um:zero minimum:1000 name:PM_L2_PREF_GRP14 : (Group 14 pm_prefetch4) L2 cache prefetches event:0X0E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP14 : (Group 14 pm_prefetch4) Instructions completed event:0X0E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP14 : (Group 14 pm_prefetch4) Run cycles #Group 15 pm_lsu_reject1, LSU reject events event:0X0F0 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_ERAT_MISS_GRP15 : (Group 15 pm_lsu_reject1) LSU reject due to ERAT miss event:0X0F1 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_LMQ_FULL_GRP15 : (Group 15 pm_lsu_reject1) LSU reject due to LMQ full or missed data coming event:0X0F2 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP15 : (Group 15 pm_lsu_reject1) Flush caused by thread GCT imbalance event:0X0F3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP15 : (Group 15 pm_lsu_reject1) Marked SRQ flushes event:0X0F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_lsu_reject1) Instructions completed event:0X0F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP15 : (Group 15 pm_lsu_reject1) Run cycles #Group 16 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision event:0X100 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_RELOAD_CDF_GRP16 : (Group 16 pm_lsu_reject2) LSU0 reject due to reload CDF or tag update collision event:0X101 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_RELOAD_CDF_GRP16 : (Group 16 pm_lsu_reject2) LSU1 reject due to reload CDF or tag update collision event:0X102 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP16 : (Group 16 pm_lsu_reject2) IOPS instructions completed event:0X103 counters:3 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP16 : (Group 16 pm_lsu_reject2) Cycles writing to instruction L1 event:0X104 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP16 : (Group 16 pm_lsu_reject2) Instructions completed event:0X105 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP16 : (Group 16 pm_lsu_reject2) Run cycles #Group 17 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions event:0X110 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_ERAT_MISS_GRP17 : (Group 17 pm_lsu_reject3) LSU0 reject due to ERAT miss event:0X111 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_ERAT_MISS_GRP17 : (Group 17 pm_lsu_reject3) LSU1 reject due to ERAT miss event:0X112 counters:2 um:zero minimum:1000 name:PM_LWSYNC_HELD_GRP17 : (Group 17 pm_lsu_reject3) LWSYNC held at dispatch event:0X113 counters:3 um:zero minimum:1000 name:PM_TLBIE_HELD_GRP17 : (Group 17 pm_lsu_reject3) TLBIE held at dispatch event:0X114 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP17 : (Group 17 pm_lsu_reject3) Instructions completed event:0X115 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP17 : (Group 17 pm_lsu_reject3) Run cycles #Group 18 pm_lsu_reject4, LSU0/1 reject LMQ full event:0X120 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_LMQ_FULL_GRP18 : (Group 18 pm_lsu_reject4) LSU0 reject due to LMQ full or missed data coming event:0X121 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_LMQ_FULL_GRP18 : (Group 18 pm_lsu_reject4) LSU1 reject due to LMQ full or missed data coming event:0X122 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP18 : (Group 18 pm_lsu_reject4) IOPS instructions completed event:0X123 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP18 : (Group 18 pm_lsu_reject4) Branches issued event:0X124 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP18 : (Group 18 pm_lsu_reject4) Instructions completed event:0X125 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP18 : (Group 18 pm_lsu_reject4) Run cycles #Group 19 pm_lsu_reject5, LSU misc reject and flush events event:0X130 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_SRQ_LHS_GRP19 : (Group 19 pm_lsu_reject5) LSU SRQ rejects event:0X131 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_RELOAD_CDF_GRP19 : (Group 19 pm_lsu_reject5) LSU reject due to reload CDF or tag update collision event:0X132 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP19 : (Group 19 pm_lsu_reject5) Flush initiated by LSU event:0X133 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP19 : (Group 19 pm_lsu_reject5) Flushes event:0X134 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP19 : (Group 19 pm_lsu_reject5) Instructions completed event:0X135 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP19 : (Group 19 pm_lsu_reject5) Run cycles #Group 20 pm_flush1, Misc flush events event:0X140 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP20 : (Group 20 pm_flush1) IOPS instructions completed event:0X141 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP20 : (Group 20 pm_flush1) SRQ unaligned store flushes event:0X142 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP20 : (Group 20 pm_flush1) Flush caused by thread GCT imbalance event:0X143 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP20 : (Group 20 pm_flush1) L1 D cache entries invalidated from L2 event:0X144 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP20 : (Group 20 pm_flush1) Instructions completed event:0X145 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP20 : (Group 20 pm_flush1) Run cycles #Group 21 pm_flush2, Flushes due to scoreboard and sync event:0X150 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP21 : (Group 21 pm_flush2) Instruction TLB misses event:0X151 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP21 : (Group 21 pm_flush2) IOPS instructions completed event:0X152 counters:2 um:zero minimum:1000 name:PM_FLUSH_SB_GRP21 : (Group 21 pm_flush2) Flush caused by scoreboard operation event:0X153 counters:3 um:zero minimum:1000 name:PM_FLUSH_SYNC_GRP21 : (Group 21 pm_flush2) Flush caused by sync event:0X154 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP21 : (Group 21 pm_flush2) Instructions completed event:0X155 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP21 : (Group 21 pm_flush2) Run cycles #Group 22 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events event:0X160 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) SRQ flushes event:0X161 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) LRQ flushes event:0X162 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) IOPS instructions completed event:0X163 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) Flush initiated by LSU event:0X164 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) Instructions completed event:0X165 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) Run cycles #Group 23 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ event:0X170 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP23 : (Group 23 pm_lsu_flush_lrq) LSU0 LRQ flushes event:0X171 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP23 : (Group 23 pm_lsu_flush_lrq) LSU1 LRQ flushes event:0X172 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP23 : (Group 23 pm_lsu_flush_lrq) Flush initiated by LSU event:0X173 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP23 : (Group 23 pm_lsu_flush_lrq) IOPS instructions completed event:0X174 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP23 : (Group 23 pm_lsu_flush_lrq) Instructions completed event:0X175 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP23 : (Group 23 pm_lsu_flush_lrq) Run cycles #Group 24 pm_lsu_flush_srq, LSU0/1 flush due to SRQ event:0X180 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP24 : (Group 24 pm_lsu_flush_srq) LSU0 SRQ flushes event:0X181 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP24 : (Group 24 pm_lsu_flush_srq) LSU1 SRQ flushes event:0X182 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP24 : (Group 24 pm_lsu_flush_srq) IOPS instructions completed event:0X183 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP24 : (Group 24 pm_lsu_flush_srq) Flush initiated by LSU event:0X184 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP24 : (Group 24 pm_lsu_flush_srq) Instructions completed event:0X185 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP24 : (Group 24 pm_lsu_flush_srq) Run cycles #Group 25 pm_lsu_flush_unaligned, LSU flush due to unaligned data event:0X190 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP25 : (Group 25 pm_lsu_flush_unaligned) LRQ unaligned load flushes event:0X191 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP25 : (Group 25 pm_lsu_flush_unaligned) SRQ unaligned store flushes event:0X192 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP25 : (Group 25 pm_lsu_flush_unaligned) Branches issued event:0X193 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP25 : (Group 25 pm_lsu_flush_unaligned) IOPS instructions completed event:0X194 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP25 : (Group 25 pm_lsu_flush_unaligned) Instructions completed event:0X195 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP25 : (Group 25 pm_lsu_flush_unaligned) Run cycles #Group 26 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load event:0X1A0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_uld) LSU0 unaligned load flushes event:0X1A1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_uld) LSU1 unaligned load flushes event:0X1A2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP26 : (Group 26 pm_lsu_flush_uld) Flush initiated by LSU event:0X1A3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP26 : (Group 26 pm_lsu_flush_uld) IOPS instructions completed event:0X1A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP26 : (Group 26 pm_lsu_flush_uld) Instructions completed event:0X1A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP26 : (Group 26 pm_lsu_flush_uld) Run cycles #Group 27 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store event:0X1B0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP27 : (Group 27 pm_lsu_flush_ust) LSU0 unaligned store flushes event:0X1B1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP27 : (Group 27 pm_lsu_flush_ust) LSU1 unaligned store flushes event:0X1B2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP27 : (Group 27 pm_lsu_flush_ust) IOPS instructions completed event:0X1B3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP27 : (Group 27 pm_lsu_flush_ust) Flush initiated by LSU event:0X1B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP27 : (Group 27 pm_lsu_flush_ust) Instructions completed event:0X1B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP27 : (Group 27 pm_lsu_flush_ust) Run cycles #Group 28 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full event:0X1C0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_FULL_GRP28 : (Group 28 pm_lsu_flush_full) Flush caused by LRQ full event:0X1C1 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP28 : (Group 28 pm_lsu_flush_full) IOPS instructions completed event:0X1C2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP28 : (Group 28 pm_lsu_flush_full) Marked LRQ flushes event:0X1C3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_FULL_GRP28 : (Group 28 pm_lsu_flush_full) Flush caused by SRQ full event:0X1C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_lsu_flush_full) Instructions completed event:0X1C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP28 : (Group 28 pm_lsu_flush_full) Run cycles #Group 29 pm_lsu_stall1, LSU Stalls event:0X1D0 counters:0 um:zero minimum:1000 name:PM_GRP_MRK_GRP29 : (Group 29 pm_lsu_stall1) Group marked in IDU event:0X1D1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP29 : (Group 29 pm_lsu_stall1) Completion stall caused by LSU instruction event:0X1D2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP29 : (Group 29 pm_lsu_stall1) IOPS instructions completed event:0X1D3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP29 : (Group 29 pm_lsu_stall1) Completion stall caused by reject event:0X1D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP29 : (Group 29 pm_lsu_stall1) Instructions completed event:0X1D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP29 : (Group 29 pm_lsu_stall1) Run cycles #Group 30 pm_lsu_stall2, LSU Stalls event:0X1E0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP30 : (Group 30 pm_lsu_stall2) IOPS instructions completed event:0X1E1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP30 : (Group 30 pm_lsu_stall2) Completion stall caused by D cache miss event:0X1E2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP30 : (Group 30 pm_lsu_stall2) Processor cycles event:0X1E3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP30 : (Group 30 pm_lsu_stall2) Completion stall caused by ERAT miss event:0X1E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP30 : (Group 30 pm_lsu_stall2) Instructions completed event:0X1E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP30 : (Group 30 pm_lsu_stall2) Run cycles #Group 31 pm_fxu_stall, FXU Stalls event:0X1F0 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_BR_REDIR_NONSPEC_GRP31 : (Group 31 pm_fxu_stall) Group experienced non-speculative I cache miss or branch redirect event:0X1F1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP31 : (Group 31 pm_fxu_stall) Completion stall caused by FXU instruction event:0X1F2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP31 : (Group 31 pm_fxu_stall) IOPS instructions completed event:0X1F3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP31 : (Group 31 pm_fxu_stall) Completion stall caused by DIV instruction event:0X1F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_fxu_stall) Instructions completed event:0X1F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP31 : (Group 31 pm_fxu_stall) Run cycles #Group 32 pm_fpu_stall, FPU Stalls event:0X200 counters:0 um:zero minimum:1000 name:PM_FPU_FULL_CYC_GRP32 : (Group 32 pm_fpu_stall) Cycles FPU issue queue full event:0X201 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FDIV_GRP32 : (Group 32 pm_fpu_stall) Completion stall caused by FDIV or FQRT instruction event:0X202 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP32 : (Group 32 pm_fpu_stall) IOPS instructions completed event:0X203 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_FPU_GRP32 : (Group 32 pm_fpu_stall) Completion stall caused by FPU instruction event:0X204 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_fpu_stall) Instructions completed event:0X205 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP32 : (Group 32 pm_fpu_stall) Run cycles #Group 33 pm_queue_full, BRQ LRQ LMQ queue full event:0X210 counters:0 um:zero minimum:1000 name:PM_LARX_LSU0_GRP33 : (Group 33 pm_queue_full) Larx executed on LSU0 event:0X211 counters:1 um:zero minimum:1000 name:PM_BRQ_FULL_CYC_GRP33 : (Group 33 pm_queue_full) Cycles branch queue full event:0X212 counters:2 um:zero minimum:1000 name:PM_LSU_LRQ_FULL_CYC_GRP33 : (Group 33 pm_queue_full) Cycles LRQ full event:0X213 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP33 : (Group 33 pm_queue_full) Cycles LMQ full event:0X214 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP33 : (Group 33 pm_queue_full) Instructions completed event:0X215 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP33 : (Group 33 pm_queue_full) Run cycles #Group 34 pm_issueq_full, FPU FX full event:0X220 counters:0 um:zero minimum:1000 name:PM_FPU0_FULL_CYC_GRP34 : (Group 34 pm_issueq_full) Cycles FPU0 issue queue full event:0X221 counters:1 um:zero minimum:1000 name:PM_FPU1_FULL_CYC_GRP34 : (Group 34 pm_issueq_full) Cycles FPU1 issue queue full event:0X222 counters:2 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP34 : (Group 34 pm_issueq_full) Cycles FXU0/LS0 queue full event:0X223 counters:3 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP34 : (Group 34 pm_issueq_full) Cycles FXU1/LS1 queue full event:0X224 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP34 : (Group 34 pm_issueq_full) Instructions completed event:0X225 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP34 : (Group 34 pm_issueq_full) Run cycles #Group 35 pm_mapper_full1, CR CTR GPR mapper full event:0X230 counters:0 um:zero minimum:1000 name:PM_CR_MAP_FULL_CYC_GRP35 : (Group 35 pm_mapper_full1) Cycles CR logical operation mapper full event:0X231 counters:1 um:zero minimum:1000 name:PM_LR_CTR_MAP_FULL_CYC_GRP35 : (Group 35 pm_mapper_full1) Cycles LR/CTR mapper full event:0X232 counters:2 um:zero minimum:1000 name:PM_GPR_MAP_FULL_CYC_GRP35 : (Group 35 pm_mapper_full1) Cycles GPR mapper full event:0X233 counters:3 um:zero minimum:1000 name:PM_CRQ_FULL_CYC_GRP35 : (Group 35 pm_mapper_full1) Cycles CR issue queue full event:0X234 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP35 : (Group 35 pm_mapper_full1) Instructions completed event:0X235 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP35 : (Group 35 pm_mapper_full1) Run cycles #Group 36 pm_mapper_full2, FPR XER mapper full event:0X240 counters:0 um:zero minimum:1000 name:PM_FPR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full2) Cycles FPR mapper full event:0X241 counters:1 um:zero minimum:1000 name:PM_XER_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full2) Cycles XER mapper full event:0X242 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP36 : (Group 36 pm_mapper_full2) Marked data loaded missed L2 event:0X243 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP36 : (Group 36 pm_mapper_full2) IOPS instructions completed event:0X244 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP36 : (Group 36 pm_mapper_full2) Instructions completed event:0X245 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP36 : (Group 36 pm_mapper_full2) Run cycles #Group 37 pm_misc_load, Non-cachable loads and stcx events event:0X250 counters:0 um:zero minimum:1000 name:PM_STCX_FAIL_GRP37 : (Group 37 pm_misc_load) STCX failed event:0X251 counters:1 um:zero minimum:1000 name:PM_STCX_PASS_GRP37 : (Group 37 pm_misc_load) Stcx passes event:0X252 counters:2 um:zero minimum:1000 name:PM_LSU0_NCLD_GRP37 : (Group 37 pm_misc_load) LSU0 non-cacheable loads event:0X253 counters:3 um:zero minimum:1000 name:PM_LSU1_NCLD_GRP37 : (Group 37 pm_misc_load) LSU1 non-cacheable loads event:0X254 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP37 : (Group 37 pm_misc_load) Instructions completed event:0X255 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP37 : (Group 37 pm_misc_load) Run cycles #Group 38 pm_ic_demand, ICache demand from BR redirect event:0X260 counters:0 um:zero minimum:1000 name:PM_LSU0_BUSY_REJECT_GRP38 : (Group 38 pm_ic_demand) LSU0 busy due to reject event:0X261 counters:1 um:zero minimum:1000 name:PM_LSU1_BUSY_REJECT_GRP38 : (Group 38 pm_ic_demand) LSU1 busy due to reject event:0X262 counters:2 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BHT_REDIRECT_GRP38 : (Group 38 pm_ic_demand) L2 I cache demand request due to BHT redirect event:0X263 counters:3 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BR_REDIRECT_GRP38 : (Group 38 pm_ic_demand) L2 I cache demand request due to branch redirect event:0X264 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP38 : (Group 38 pm_ic_demand) Instructions completed event:0X265 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP38 : (Group 38 pm_ic_demand) Run cycles #Group 39 pm_ic_pref, ICache prefetch event:0X270 counters:0 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP39 : (Group 39 pm_ic_pref) Translation written to ierat event:0X271 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP39 : (Group 39 pm_ic_pref) Instruction prefetch requests event:0X272 counters:2 um:zero minimum:1000 name:PM_IC_PREF_INSTALL_GRP39 : (Group 39 pm_ic_pref) Instruction prefetched installed in prefetch event:0X273 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP39 : (Group 39 pm_ic_pref) No instructions fetched event:0X274 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP39 : (Group 39 pm_ic_pref) Instructions completed event:0X275 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP39 : (Group 39 pm_ic_pref) Run cycles #Group 40 pm_ic_miss, ICache misses event:0X280 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_NONSPEC_GRP40 : (Group 40 pm_ic_miss) Group experienced non-speculative I cache miss event:0X281 counters:1 um:zero minimum:1000 name:PM_GRP_IC_MISS_GRP40 : (Group 40 pm_ic_miss) Group experienced I cache miss event:0X282 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP40 : (Group 40 pm_ic_miss) L1 reload data source valid event:0X283 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP40 : (Group 40 pm_ic_miss) IOPS instructions completed event:0X284 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP40 : (Group 40 pm_ic_miss) Instructions completed event:0X285 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP40 : (Group 40 pm_ic_miss) Run cycles #Group 41 pm_branch_miss, Branch mispredict, TLB and SLB misses event:0X290 counters:0 um:zero minimum:1000 name:PM_TLB_MISS_GRP41 : (Group 41 pm_branch_miss) TLB misses event:0X291 counters:1 um:zero minimum:1000 name:PM_SLB_MISS_GRP41 : (Group 41 pm_branch_miss) SLB misses event:0X292 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP41 : (Group 41 pm_branch_miss) Branch mispredictions due to CR bit setting event:0X293 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP41 : (Group 41 pm_branch_miss) Branch mispredictions due to target address event:0X294 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP41 : (Group 41 pm_branch_miss) Instructions completed event:0X295 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP41 : (Group 41 pm_branch_miss) Run cycles #Group 42 pm_branch1, Branch operations event:0X2A0 counters:0 um:zero minimum:1000 name:PM_BR_UNCOND_GRP42 : (Group 42 pm_branch1) Unconditional branch event:0X2A1 counters:1 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP42 : (Group 42 pm_branch1) A conditional branch was predicted, target prediction event:0X2A2 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP42 : (Group 42 pm_branch1) A conditional branch was predicted, CR prediction event:0X2A3 counters:3 um:zero minimum:1000 name:PM_BR_PRED_CR_TA_GRP42 : (Group 42 pm_branch1) A conditional branch was predicted, CR and target prediction event:0X2A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP42 : (Group 42 pm_branch1) Instructions completed event:0X2A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP42 : (Group 42 pm_branch1) Run cycles #Group 43 pm_branch2, Branch operations event:0X2B0 counters:0 um:zero minimum:1000 name:PM_GRP_BR_REDIR_NONSPEC_GRP43 : (Group 43 pm_branch2) Group experienced non-speculative branch redirect event:0X2B1 counters:1 um:zero minimum:1000 name:PM_GRP_BR_REDIR_GRP43 : (Group 43 pm_branch2) Group experienced branch redirect event:0X2B2 counters:2 um:zero minimum:1000 name:PM_FLUSH_BR_MPRED_GRP43 : (Group 43 pm_branch2) Flush caused by branch mispredict event:0X2B3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP43 : (Group 43 pm_branch2) IOPS instructions completed event:0X2B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP43 : (Group 43 pm_branch2) Instructions completed event:0X2B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP43 : (Group 43 pm_branch2) Run cycles #Group 44 pm_L1_tlbmiss, L1 load and TLB misses event:0X2C0 counters:0 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP44 : (Group 44 pm_L1_tlbmiss) Cycles doing data tablewalks event:0X2C1 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP44 : (Group 44 pm_L1_tlbmiss) Data TLB misses event:0X2C2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP44 : (Group 44 pm_L1_tlbmiss) L1 D cache load misses event:0X2C3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP44 : (Group 44 pm_L1_tlbmiss) L1 D cache load references event:0X2C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP44 : (Group 44 pm_L1_tlbmiss) Instructions completed event:0X2C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP44 : (Group 44 pm_L1_tlbmiss) Run cycles #Group 45 pm_L1_DERAT_miss, L1 store and DERAT misses event:0X2D0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP45 : (Group 45 pm_L1_DERAT_miss) Data loaded from L2 event:0X2D1 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP45 : (Group 45 pm_L1_DERAT_miss) DERAT misses event:0X2D2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP45 : (Group 45 pm_L1_DERAT_miss) L1 D cache store references event:0X2D3 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP45 : (Group 45 pm_L1_DERAT_miss) L1 D cache store misses event:0X2D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP45 : (Group 45 pm_L1_DERAT_miss) Instructions completed event:0X2D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP45 : (Group 45 pm_L1_DERAT_miss) Run cycles #Group 46 pm_L1_slbmiss, L1 load and SLB misses event:0X2E0 counters:0 um:zero minimum:1000 name:PM_DSLB_MISS_GRP46 : (Group 46 pm_L1_slbmiss) Data SLB misses event:0X2E1 counters:1 um:zero minimum:1000 name:PM_ISLB_MISS_GRP46 : (Group 46 pm_L1_slbmiss) Instruction SLB misses event:0X2E2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP46 : (Group 46 pm_L1_slbmiss) LSU0 L1 D cache load misses event:0X2E3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP46 : (Group 46 pm_L1_slbmiss) LSU1 L1 D cache load misses event:0X2E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP46 : (Group 46 pm_L1_slbmiss) Instructions completed event:0X2E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP46 : (Group 46 pm_L1_slbmiss) Run cycles #Group 47 pm_L1_dtlbmiss_4K, L1 load references and 4K Data TLB references and misses event:0X2F0 counters:0 um:zero minimum:1000 name:PM_DTLB_REF_4K_GRP47 : (Group 47 pm_L1_dtlbmiss_4K) Data TLB reference for 4K page event:0X2F1 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_4K_GRP47 : (Group 47 pm_L1_dtlbmiss_4K) Data TLB miss for 4K page event:0X2F2 counters:2 um:zero minimum:1000 name:PM_LD_REF_L1_LSU0_GRP47 : (Group 47 pm_L1_dtlbmiss_4K) LSU0 L1 D cache load references event:0X2F3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_LSU1_GRP47 : (Group 47 pm_L1_dtlbmiss_4K) LSU1 L1 D cache load references event:0X2F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP47 : (Group 47 pm_L1_dtlbmiss_4K) Instructions completed event:0X2F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP47 : (Group 47 pm_L1_dtlbmiss_4K) Run cycles #Group 48 pm_L1_dtlbmiss_16M, L1 store references and 16M Data TLB references and misses event:0X300 counters:0 um:zero minimum:1000 name:PM_DTLB_REF_16M_GRP48 : (Group 48 pm_L1_dtlbmiss_16M) Data TLB reference for 16M page event:0X301 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_16M_GRP48 : (Group 48 pm_L1_dtlbmiss_16M) Data TLB miss for 16M page event:0X302 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP48 : (Group 48 pm_L1_dtlbmiss_16M) LSU0 L1 D cache store references event:0X303 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP48 : (Group 48 pm_L1_dtlbmiss_16M) LSU1 L1 D cache store references event:0X304 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP48 : (Group 48 pm_L1_dtlbmiss_16M) Instructions completed event:0X305 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP48 : (Group 48 pm_L1_dtlbmiss_16M) Run cycles #Group 49 pm_dsource1, L3 cache and memory data access event:0X310 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP49 : (Group 49 pm_dsource1) Data loaded from L3 event:0X311 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP49 : (Group 49 pm_dsource1) Data loaded from local memory event:0X312 counters:2 um:zero minimum:1000 name:PM_FLUSH_GRP49 : (Group 49 pm_dsource1) Flushes event:0X313 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP49 : (Group 49 pm_dsource1) IOPS instructions completed event:0X314 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP49 : (Group 49 pm_dsource1) Instructions completed event:0X315 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP49 : (Group 49 pm_dsource1) Run cycles #Group 50 pm_dsource2, L3 cache and memory data access event:0X320 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP50 : (Group 50 pm_dsource2) Data loaded from L3 event:0X321 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP50 : (Group 50 pm_dsource2) Data loaded from local memory event:0X322 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP50 : (Group 50 pm_dsource2) Data loaded missed L2 event:0X323 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP50 : (Group 50 pm_dsource2) Data loaded from remote memory event:0X324 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP50 : (Group 50 pm_dsource2) Instructions completed event:0X325 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP50 : (Group 50 pm_dsource2) Run cycles #Group 51 pm_dsource_L2, L2 cache data access event:0X330 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP51 : (Group 51 pm_dsource_L2) Data loaded from L2.5 shared event:0X331 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP51 : (Group 51 pm_dsource_L2) Data loaded from L2.5 modified event:0X332 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L275_SHR_GRP51 : (Group 51 pm_dsource_L2) Data loaded from L2.75 shared event:0X333 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP51 : (Group 51 pm_dsource_L2) Data loaded from L2.75 modified event:0X334 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP51 : (Group 51 pm_dsource_L2) Instructions completed event:0X335 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP51 : (Group 51 pm_dsource_L2) Run cycles #Group 52 pm_dsource_L3, L3 cache data access event:0X340 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_GRP52 : (Group 52 pm_dsource_L3) Data loaded from L3.5 shared event:0X341 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP52 : (Group 52 pm_dsource_L3) Data loaded from L3.5 modified event:0X342 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L375_SHR_GRP52 : (Group 52 pm_dsource_L3) Data loaded from L3.75 shared event:0X343 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L375_MOD_GRP52 : (Group 52 pm_dsource_L3) Data loaded from L3.75 modified event:0X344 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP52 : (Group 52 pm_dsource_L3) Instructions completed event:0X345 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP52 : (Group 52 pm_dsource_L3) Run cycles #Group 53 pm_isource1, Instruction source information event:0X350 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP53 : (Group 53 pm_isource1) Instruction fetched from L3 event:0X351 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP53 : (Group 53 pm_isource1) Instruction fetched from L1 event:0X352 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP53 : (Group 53 pm_isource1) Instructions fetched from prefetch event:0X353 counters:3 um:zero minimum:1000 name:PM_INST_FROM_RMEM_GRP53 : (Group 53 pm_isource1) Instruction fetched from remote memory event:0X354 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP53 : (Group 53 pm_isource1) Instructions completed event:0X355 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP53 : (Group 53 pm_isource1) Run cycles #Group 54 pm_isource2, Instruction source information event:0X360 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP54 : (Group 54 pm_isource2) Instructions fetched from L2 event:0X361 counters:1 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP54 : (Group 54 pm_isource2) Instruction fetched from local memory event:0X362 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP54 : (Group 54 pm_isource2) IOPS instructions completed event:0X363 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP54 : (Group 54 pm_isource2) No instructions fetched event:0X364 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP54 : (Group 54 pm_isource2) Instructions completed event:0X365 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP54 : (Group 54 pm_isource2) Run cycles #Group 55 pm_isource_L2, L2 instruction source information event:0X370 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L25_SHR_GRP55 : (Group 55 pm_isource_L2) Instruction fetched from L2.5 shared event:0X371 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L25_MOD_GRP55 : (Group 55 pm_isource_L2) Instruction fetched from L2.5 modified event:0X372 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L275_SHR_GRP55 : (Group 55 pm_isource_L2) Instruction fetched from L2.75 shared event:0X373 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L275_MOD_GRP55 : (Group 55 pm_isource_L2) Instruction fetched from L2.75 modified event:0X374 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP55 : (Group 55 pm_isource_L2) Instructions completed event:0X375 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP55 : (Group 55 pm_isource_L2) Run cycles #Group 56 pm_isource_L3, L3 instruction source information event:0X380 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L35_SHR_GRP56 : (Group 56 pm_isource_L3) Instruction fetched from L3.5 shared event:0X381 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L35_MOD_GRP56 : (Group 56 pm_isource_L3) Instruction fetched from L3.5 modified event:0X382 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L375_SHR_GRP56 : (Group 56 pm_isource_L3) Instruction fetched from L3.75 shared event:0X383 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L375_MOD_GRP56 : (Group 56 pm_isource_L3) Instruction fetched from L3.75 modified event:0X384 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP56 : (Group 56 pm_isource_L3) Instructions completed event:0X385 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP56 : (Group 56 pm_isource_L3) Run cycles #Group 57 pm_pteg_source1, PTEG source information event:0X390 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L25_SHR_GRP57 : (Group 57 pm_pteg_source1) PTEG loaded from L2.5 shared event:0X391 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L25_MOD_GRP57 : (Group 57 pm_pteg_source1) PTEG loaded from L2.5 modified event:0X392 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L275_SHR_GRP57 : (Group 57 pm_pteg_source1) PTEG loaded from L2.75 shared event:0X393 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L275_MOD_GRP57 : (Group 57 pm_pteg_source1) PTEG loaded from L2.75 modified event:0X394 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP57 : (Group 57 pm_pteg_source1) Instructions completed event:0X395 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP57 : (Group 57 pm_pteg_source1) Run cycles #Group 58 pm_pteg_source2, PTEG source information event:0X3A0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L35_SHR_GRP58 : (Group 58 pm_pteg_source2) PTEG loaded from L3.5 shared event:0X3A1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L35_MOD_GRP58 : (Group 58 pm_pteg_source2) PTEG loaded from L3.5 modified event:0X3A2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L375_SHR_GRP58 : (Group 58 pm_pteg_source2) PTEG loaded from L3.75 shared event:0X3A3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L375_MOD_GRP58 : (Group 58 pm_pteg_source2) PTEG loaded from L3.75 modified event:0X3A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP58 : (Group 58 pm_pteg_source2) Instructions completed event:0X3A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP58 : (Group 58 pm_pteg_source2) Run cycles #Group 59 pm_pteg_source3, PTEG source information event:0X3B0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP59 : (Group 59 pm_pteg_source3) PTEG loaded from L2 event:0X3B1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP59 : (Group 59 pm_pteg_source3) PTEG loaded from local memory event:0X3B2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L2MISS_GRP59 : (Group 59 pm_pteg_source3) PTEG loaded from L2 miss event:0X3B3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP59 : (Group 59 pm_pteg_source3) PTEG loaded from remote memory event:0X3B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP59 : (Group 59 pm_pteg_source3) Instructions completed event:0X3B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP59 : (Group 59 pm_pteg_source3) Run cycles #Group 60 pm_pteg_source4, L3 PTEG and group disptach events event:0X3C0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L3_GRP60 : (Group 60 pm_pteg_source4) PTEG loaded from L3 event:0X3C1 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_GRP60 : (Group 60 pm_pteg_source4) Group dispatches event:0X3C2 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_SUCCESS_GRP60 : (Group 60 pm_pteg_source4) Group dispatch success event:0X3C3 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP60 : (Group 60 pm_pteg_source4) L1 D cache entries invalidated from L2 event:0X3C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP60 : (Group 60 pm_pteg_source4) Instructions completed event:0X3C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP60 : (Group 60 pm_pteg_source4) Run cycles #Group 61 pm_L2SA_ld, L2 slice A load events event:0X3D0 counters:0 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_GRP61 : (Group 61 pm_L2SA_ld) L2 Slice A RC load dispatch attempt event:0X3D1 counters:1 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_RC_FULL_GRP61 : (Group 61 pm_L2SA_ld) L2 Slice A RC load dispatch attempt failed due to all RC full event:0X3D2 counters:2 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_ADDR_GRP61 : (Group 61 pm_L2SA_ld) L2 Slice A RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X3D3 counters:3 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_OTHER_GRP61 : (Group 61 pm_L2SA_ld) L2 Slice A RC load dispatch attempt failed due to other reasons event:0X3D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP61 : (Group 61 pm_L2SA_ld) Instructions completed event:0X3D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP61 : (Group 61 pm_L2SA_ld) Run cycles #Group 62 pm_L2SA_st, L2 slice A store events event:0X3E0 counters:0 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_GRP62 : (Group 62 pm_L2SA_st) L2 Slice A RC store dispatch attempt event:0X3E1 counters:1 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_RC_FULL_GRP62 : (Group 62 pm_L2SA_st) L2 Slice A RC store dispatch attempt failed due to all RC full event:0X3E2 counters:2 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_ADDR_GRP62 : (Group 62 pm_L2SA_st) L2 Slice A RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X3E3 counters:3 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_OTHER_GRP62 : (Group 62 pm_L2SA_st) L2 Slice A RC store dispatch attempt failed due to other reasons event:0X3E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP62 : (Group 62 pm_L2SA_st) Instructions completed event:0X3E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP62 : (Group 62 pm_L2SA_st) Run cycles #Group 63 pm_L2SA_st2, L2 slice A store events event:0X3F0 counters:0 um:zero minimum:1000 name:PM_L2SA_RC_DISP_FAIL_CO_BUSY_GRP63 : (Group 63 pm_L2SA_st2) L2 Slice A RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X3F1 counters:1 um:zero minimum:1000 name:PM_L2SA_ST_REQ_GRP63 : (Group 63 pm_L2SA_st2) L2 slice A store requests event:0X3F2 counters:2 um:zero minimum:1000 name:PM_L2SA_RC_DISP_FAIL_CO_BUSY_ALL_GRP63 : (Group 63 pm_L2SA_st2) L2 Slice A RC dispatch attempt failed due to all CO busy event:0X3F3 counters:3 um:zero minimum:1000 name:PM_L2SA_ST_HIT_GRP63 : (Group 63 pm_L2SA_st2) L2 slice A store hits event:0X3F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP63 : (Group 63 pm_L2SA_st2) Instructions completed event:0X3F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP63 : (Group 63 pm_L2SA_st2) Run cycles #Group 64 pm_L2SB_ld, L2 slice B load events event:0X400 counters:0 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_GRP64 : (Group 64 pm_L2SB_ld) L2 Slice B RC load dispatch attempt event:0X401 counters:1 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_RC_FULL_GRP64 : (Group 64 pm_L2SB_ld) L2 Slice B RC load dispatch attempt failed due to all RC full event:0X402 counters:2 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_ADDR_GRP64 : (Group 64 pm_L2SB_ld) L2 Slice B RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X403 counters:3 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_OTHER_GRP64 : (Group 64 pm_L2SB_ld) L2 Slice B RC load dispatch attempt failed due to other reasons event:0X404 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP64 : (Group 64 pm_L2SB_ld) Instructions completed event:0X405 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP64 : (Group 64 pm_L2SB_ld) Run cycles #Group 65 pm_L2SB_st, L2 slice B store events event:0X410 counters:0 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_GRP65 : (Group 65 pm_L2SB_st) L2 Slice B RC store dispatch attempt event:0X411 counters:1 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_RC_FULL_GRP65 : (Group 65 pm_L2SB_st) L2 Slice B RC store dispatch attempt failed due to all RC full event:0X412 counters:2 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_ADDR_GRP65 : (Group 65 pm_L2SB_st) L2 Slice B RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X413 counters:3 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_OTHER_GRP65 : (Group 65 pm_L2SB_st) L2 Slice B RC store dispatch attempt failed due to other reasons event:0X414 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP65 : (Group 65 pm_L2SB_st) Instructions completed event:0X415 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP65 : (Group 65 pm_L2SB_st) Run cycles #Group 66 pm_L2SB_st2, L2 slice B store events event:0X420 counters:0 um:zero minimum:1000 name:PM_L2SB_RC_DISP_FAIL_CO_BUSY_GRP66 : (Group 66 pm_L2SB_st2) L2 Slice B RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X421 counters:1 um:zero minimum:1000 name:PM_L2SB_ST_REQ_GRP66 : (Group 66 pm_L2SB_st2) L2 slice B store requests event:0X422 counters:2 um:zero minimum:1000 name:PM_L2SB_RC_DISP_FAIL_CO_BUSY_ALL_GRP66 : (Group 66 pm_L2SB_st2) L2 Slice B RC dispatch attempt failed due to all CO busy event:0X423 counters:3 um:zero minimum:1000 name:PM_L2SB_ST_HIT_GRP66 : (Group 66 pm_L2SB_st2) L2 slice B store hits event:0X424 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP66 : (Group 66 pm_L2SB_st2) Instructions completed event:0X425 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP66 : (Group 66 pm_L2SB_st2) Run cycles #Group 67 pm_L2SB_ld, L2 slice C load events event:0X430 counters:0 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice C RC load dispatch attempt event:0X431 counters:1 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_RC_FULL_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice C RC load dispatch attempt failed due to all RC full event:0X432 counters:2 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_ADDR_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice C RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X433 counters:3 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_OTHER_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice C RC load dispatch attempt failed due to other reasons event:0X434 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP67 : (Group 67 pm_L2SB_ld) Instructions completed event:0X435 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP67 : (Group 67 pm_L2SB_ld) Run cycles #Group 68 pm_L2SB_st, L2 slice C store events event:0X440 counters:0 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_GRP68 : (Group 68 pm_L2SB_st) L2 Slice C RC store dispatch attempt event:0X441 counters:1 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_RC_FULL_GRP68 : (Group 68 pm_L2SB_st) L2 Slice C RC store dispatch attempt failed due to all RC full event:0X442 counters:2 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_ADDR_GRP68 : (Group 68 pm_L2SB_st) L2 Slice C RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X443 counters:3 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_OTHER_GRP68 : (Group 68 pm_L2SB_st) L2 Slice C RC store dispatch attempt failed due to other reasons event:0X444 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP68 : (Group 68 pm_L2SB_st) Instructions completed event:0X445 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP68 : (Group 68 pm_L2SB_st) Run cycles #Group 69 pm_L2SB_st2, L2 slice C store events event:0X450 counters:0 um:zero minimum:1000 name:PM_L2SC_RC_DISP_FAIL_CO_BUSY_GRP69 : (Group 69 pm_L2SB_st2) L2 Slice C RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X451 counters:1 um:zero minimum:1000 name:PM_L2SC_ST_REQ_GRP69 : (Group 69 pm_L2SB_st2) L2 slice C store requests event:0X452 counters:2 um:zero minimum:1000 name:PM_L2SC_RC_DISP_FAIL_CO_BUSY_ALL_GRP69 : (Group 69 pm_L2SB_st2) L2 Slice C RC dispatch attempt failed due to all CO busy event:0X453 counters:3 um:zero minimum:1000 name:PM_L2SC_ST_HIT_GRP69 : (Group 69 pm_L2SB_st2) L2 slice C store hits event:0X454 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP69 : (Group 69 pm_L2SB_st2) Instructions completed event:0X455 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP69 : (Group 69 pm_L2SB_st2) Run cycles #Group 70 pm_L3SA_trans, L3 slice A state transistions event:0X460 counters:0 um:zero minimum:1000 name:PM_L3SA_MOD_TAG_GRP70 : (Group 70 pm_L3SA_trans) L3 slice A transition from modified to TAG event:0X461 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP70 : (Group 70 pm_L3SA_trans) IOPS instructions completed event:0X462 counters:2 um:zero minimum:1000 name:PM_L3SA_MOD_INV_GRP70 : (Group 70 pm_L3SA_trans) L3 slice A transition from modified to invalid event:0X463 counters:3 um:zero minimum:1000 name:PM_L3SA_SHR_INV_GRP70 : (Group 70 pm_L3SA_trans) L3 slice A transition from shared to invalid event:0X464 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP70 : (Group 70 pm_L3SA_trans) Instructions completed event:0X465 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP70 : (Group 70 pm_L3SA_trans) Run cycles #Group 71 pm_L3SB_trans, L3 slice B state transistions event:0X470 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP71 : (Group 71 pm_L3SB_trans) IOPS instructions completed event:0X471 counters:1 um:zero minimum:1000 name:PM_L3SB_MOD_TAG_GRP71 : (Group 71 pm_L3SB_trans) L3 slice B transition from modified to TAG event:0X472 counters:2 um:zero minimum:1000 name:PM_L3SB_MOD_INV_GRP71 : (Group 71 pm_L3SB_trans) L3 slice B transition from modified to invalid event:0X473 counters:3 um:zero minimum:1000 name:PM_L3SB_SHR_INV_GRP71 : (Group 71 pm_L3SB_trans) L3 slice B transition from shared to invalid event:0X474 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP71 : (Group 71 pm_L3SB_trans) Instructions completed event:0X475 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP71 : (Group 71 pm_L3SB_trans) Run cycles #Group 72 pm_L3SC_trans, L3 slice C state transistions event:0X480 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP72 : (Group 72 pm_L3SC_trans) IOPS instructions completed event:0X481 counters:1 um:zero minimum:1000 name:PM_L3SC_MOD_TAG_GRP72 : (Group 72 pm_L3SC_trans) L3 slice C transition from modified to TAG event:0X482 counters:2 um:zero minimum:1000 name:PM_L3SC_MOD_INV_GRP72 : (Group 72 pm_L3SC_trans) L3 slice C transition from modified to invalid event:0X483 counters:3 um:zero minimum:1000 name:PM_L3SC_SHR_INV_GRP72 : (Group 72 pm_L3SC_trans) L3 slice C transition from shared to invalid event:0X484 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP72 : (Group 72 pm_L3SC_trans) Instructions completed event:0X485 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP72 : (Group 72 pm_L3SC_trans) Run cycles #Group 73 pm_L2SA_trans, L2 slice A state transistions event:0X490 counters:0 um:zero minimum:1000 name:PM_L2SA_MOD_TAG_GRP73 : (Group 73 pm_L2SA_trans) L2 slice A transition from modified to tagged event:0X491 counters:1 um:zero minimum:1000 name:PM_L2SA_SHR_MOD_GRP73 : (Group 73 pm_L2SA_trans) L2 slice A transition from shared to modified event:0X492 counters:2 um:zero minimum:1000 name:PM_L2SA_MOD_INV_GRP73 : (Group 73 pm_L2SA_trans) L2 slice A transition from modified to invalid event:0X493 counters:3 um:zero minimum:1000 name:PM_L2SA_SHR_INV_GRP73 : (Group 73 pm_L2SA_trans) L2 slice A transition from shared to invalid event:0X494 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP73 : (Group 73 pm_L2SA_trans) Instructions completed event:0X495 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP73 : (Group 73 pm_L2SA_trans) Run cycles #Group 74 pm_L2SB_trans, L2 slice B state transistions event:0X4A0 counters:0 um:zero minimum:1000 name:PM_L2SB_MOD_TAG_GRP74 : (Group 74 pm_L2SB_trans) L2 slice B transition from modified to tagged event:0X4A1 counters:1 um:zero minimum:1000 name:PM_L2SB_SHR_MOD_GRP74 : (Group 74 pm_L2SB_trans) L2 slice B transition from shared to modified event:0X4A2 counters:2 um:zero minimum:1000 name:PM_L2SB_MOD_INV_GRP74 : (Group 74 pm_L2SB_trans) L2 slice B transition from modified to invalid event:0X4A3 counters:3 um:zero minimum:1000 name:PM_L2SB_SHR_INV_GRP74 : (Group 74 pm_L2SB_trans) L2 slice B transition from shared to invalid event:0X4A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP74 : (Group 74 pm_L2SB_trans) Instructions completed event:0X4A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP74 : (Group 74 pm_L2SB_trans) Run cycles #Group 75 pm_L2SC_trans, L2 slice C state transistions event:0X4B0 counters:0 um:zero minimum:1000 name:PM_L2SC_MOD_TAG_GRP75 : (Group 75 pm_L2SC_trans) L2 slice C transition from modified to tagged event:0X4B1 counters:1 um:zero minimum:1000 name:PM_L2SC_SHR_MOD_GRP75 : (Group 75 pm_L2SC_trans) L2 slice C transition from shared to modified event:0X4B2 counters:2 um:zero minimum:1000 name:PM_L2SC_MOD_INV_GRP75 : (Group 75 pm_L2SC_trans) L2 slice C transition from modified to invalid event:0X4B3 counters:3 um:zero minimum:1000 name:PM_L2SC_SHR_INV_GRP75 : (Group 75 pm_L2SC_trans) L2 slice C transition from shared to invalid event:0X4B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP75 : (Group 75 pm_L2SC_trans) Instructions completed event:0X4B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP75 : (Group 75 pm_L2SC_trans) Run cycles #Group 76 pm_L3SAB_retry, L3 slice A/B snoop retry and all CI/CO busy event:0X4C0 counters:0 um:zero minimum:1000 name:PM_L3SA_ALL_BUSY_GRP76 : (Group 76 pm_L3SAB_retry) L3 slice A active for every cycle all CI/CO machines busy event:0X4C1 counters:1 um:zero minimum:1000 name:PM_L3SB_ALL_BUSY_GRP76 : (Group 76 pm_L3SAB_retry) L3 slice B active for every cycle all CI/CO machines busy event:0X4C2 counters:2 um:zero minimum:1000 name:PM_L3SA_SNOOP_RETRY_GRP76 : (Group 76 pm_L3SAB_retry) L3 slice A snoop retries event:0X4C3 counters:3 um:zero minimum:1000 name:PM_L3SB_SNOOP_RETRY_GRP76 : (Group 76 pm_L3SAB_retry) L3 slice B snoop retries event:0X4C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP76 : (Group 76 pm_L3SAB_retry) Instructions completed event:0X4C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP76 : (Group 76 pm_L3SAB_retry) Run cycles #Group 77 pm_L3SAB_hit, L3 slice A/B hit and reference event:0X4D0 counters:0 um:zero minimum:1000 name:PM_L3SA_REF_GRP77 : (Group 77 pm_L3SAB_hit) L3 slice A references event:0X4D1 counters:1 um:zero minimum:1000 name:PM_L3SB_REF_GRP77 : (Group 77 pm_L3SAB_hit) L3 slice B references event:0X4D2 counters:2 um:zero minimum:1000 name:PM_L3SA_HIT_GRP77 : (Group 77 pm_L3SAB_hit) L3 slice A hits event:0X4D3 counters:3 um:zero minimum:1000 name:PM_L3SB_HIT_GRP77 : (Group 77 pm_L3SAB_hit) L3 slice B hits event:0X4D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP77 : (Group 77 pm_L3SAB_hit) Instructions completed event:0X4D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP77 : (Group 77 pm_L3SAB_hit) Run cycles #Group 78 pm_L3SC_retry_hit, L3 slice C hit & snoop retry event:0X4E0 counters:0 um:zero minimum:1000 name:PM_L3SC_ALL_BUSY_GRP78 : (Group 78 pm_L3SC_retry_hit) L3 slice C active for every cycle all CI/CO machines busy event:0X4E1 counters:1 um:zero minimum:1000 name:PM_L3SC_REF_GRP78 : (Group 78 pm_L3SC_retry_hit) L3 slice C references event:0X4E2 counters:2 um:zero minimum:1000 name:PM_L3SC_SNOOP_RETRY_GRP78 : (Group 78 pm_L3SC_retry_hit) L3 slice C snoop retries event:0X4E3 counters:3 um:zero minimum:1000 name:PM_L3SC_HIT_GRP78 : (Group 78 pm_L3SC_retry_hit) L3 Slice C hits event:0X4E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP78 : (Group 78 pm_L3SC_retry_hit) Instructions completed event:0X4E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP78 : (Group 78 pm_L3SC_retry_hit) Run cycles #Group 79 pm_fpu1, Floating Point events event:0X4F0 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP79 : (Group 79 pm_fpu1) FPU executed FDIV instruction event:0X4F1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP79 : (Group 79 pm_fpu1) FPU executed multiply-add instruction event:0X4F2 counters:2 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP79 : (Group 79 pm_fpu1) FPU executing FMOV or FEST instructions event:0X4F3 counters:3 um:zero minimum:1000 name:PM_FPU_FEST_GRP79 : (Group 79 pm_fpu1) FPU executed FEST instruction event:0X4F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP79 : (Group 79 pm_fpu1) Instructions completed event:0X4F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP79 : (Group 79 pm_fpu1) Run cycles #Group 80 pm_fpu2, Floating Point events event:0X500 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP80 : (Group 80 pm_fpu2) FPU executed one flop instruction event:0X501 counters:1 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP80 : (Group 80 pm_fpu2) FPU executed FSQRT instruction event:0X502 counters:2 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP80 : (Group 80 pm_fpu2) FPU executed FRSP or FCONV instructions event:0X503 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP80 : (Group 80 pm_fpu2) FPU produced a result event:0X504 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP80 : (Group 80 pm_fpu2) Instructions completed event:0X505 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP80 : (Group 80 pm_fpu2) Run cycles #Group 81 pm_fpu3, Floating point events event:0X510 counters:0 um:zero minimum:1000 name:PM_FPU_DENORM_GRP81 : (Group 81 pm_fpu3) FPU received denormalized data event:0X511 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP81 : (Group 81 pm_fpu3) FPU stalled in pipe3 event:0X512 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP81 : (Group 81 pm_fpu3) FPU0 produced a result event:0X513 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP81 : (Group 81 pm_fpu3) FPU1 produced a result event:0X514 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP81 : (Group 81 pm_fpu3) Instructions completed event:0X515 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP81 : (Group 81 pm_fpu3) Run cycles #Group 82 pm_fpu4, Floating point events event:0X520 counters:0 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP82 : (Group 82 pm_fpu4) FPU executed single precision instruction event:0X521 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP82 : (Group 82 pm_fpu4) FPU executed store instruction event:0X522 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP82 : (Group 82 pm_fpu4) IOPS instructions completed event:0X523 counters:3 um:zero minimum:1000 name:PM_LSU_LDF_GRP82 : (Group 82 pm_fpu4) LSU executed Floating Point load instruction event:0X524 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP82 : (Group 82 pm_fpu4) Instructions completed event:0X525 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP82 : (Group 82 pm_fpu4) Run cycles #Group 83 pm_fpu5, Floating point events by unit event:0X530 counters:0 um:zero minimum:1000 name:PM_FPU0_FSQRT_GRP83 : (Group 83 pm_fpu5) FPU0 executed FSQRT instruction event:0X531 counters:1 um:zero minimum:1000 name:PM_FPU1_FSQRT_GRP83 : (Group 83 pm_fpu5) FPU1 executed FSQRT instruction event:0X532 counters:2 um:zero minimum:1000 name:PM_FPU0_FEST_GRP83 : (Group 83 pm_fpu5) FPU0 executed FEST instruction event:0X533 counters:3 um:zero minimum:1000 name:PM_FPU1_FEST_GRP83 : (Group 83 pm_fpu5) FPU1 executed FEST instruction event:0X534 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP83 : (Group 83 pm_fpu5) Instructions completed event:0X535 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP83 : (Group 83 pm_fpu5) Run cycles #Group 84 pm_fpu6, Floating point events by unit event:0X540 counters:0 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP84 : (Group 84 pm_fpu6) FPU0 received denormalized data event:0X541 counters:1 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP84 : (Group 84 pm_fpu6) FPU1 received denormalized data event:0X542 counters:2 um:zero minimum:1000 name:PM_FPU0_FMOV_FEST_GRP84 : (Group 84 pm_fpu6) FPU0 executed FMOV or FEST instructions event:0X543 counters:3 um:zero minimum:1000 name:PM_FPU1_FMOV_FEST_GRP84 : (Group 84 pm_fpu6) FPU1 executing FMOV or FEST instructions event:0X544 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP84 : (Group 84 pm_fpu6) Instructions completed event:0X545 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP84 : (Group 84 pm_fpu6) Run cycles #Group 85 pm_fpu7, Floating point events by unit event:0X550 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP85 : (Group 85 pm_fpu7) FPU0 executed FDIV instruction event:0X551 counters:1 um:zero minimum:1000 name:PM_FPU1_FDIV_GRP85 : (Group 85 pm_fpu7) FPU1 executed FDIV instruction event:0X552 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP85 : (Group 85 pm_fpu7) FPU0 executed FRSP or FCONV instructions event:0X553 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP85 : (Group 85 pm_fpu7) FPU1 executed FRSP or FCONV instructions event:0X554 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP85 : (Group 85 pm_fpu7) Instructions completed event:0X555 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP85 : (Group 85 pm_fpu7) Run cycles #Group 86 pm_fpu8, Floating point events by unit event:0X560 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP86 : (Group 86 pm_fpu8) FPU0 stalled in pipe3 event:0X561 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP86 : (Group 86 pm_fpu8) FPU1 stalled in pipe3 event:0X562 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP86 : (Group 86 pm_fpu8) IOPS instructions completed event:0X563 counters:3 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP86 : (Group 86 pm_fpu8) FPU0 executed FPSCR instruction event:0X564 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP86 : (Group 86 pm_fpu8) Instructions completed event:0X565 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP86 : (Group 86 pm_fpu8) Run cycles #Group 87 pm_fpu9, Floating point events by unit event:0X570 counters:0 um:zero minimum:1000 name:PM_FPU0_SINGLE_GRP87 : (Group 87 pm_fpu9) FPU0 executed single precision instruction event:0X571 counters:1 um:zero minimum:1000 name:PM_FPU1_SINGLE_GRP87 : (Group 87 pm_fpu9) FPU1 executed single precision instruction event:0X572 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP87 : (Group 87 pm_fpu9) LSU0 executed Floating Point load instruction event:0X573 counters:3 um:zero minimum:1000 name:PM_LSU1_LDF_GRP87 : (Group 87 pm_fpu9) LSU1 executed Floating Point load instruction event:0X574 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP87 : (Group 87 pm_fpu9) Instructions completed event:0X575 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP87 : (Group 87 pm_fpu9) Run cycles #Group 88 pm_fpu10, Floating point events by unit event:0X580 counters:0 um:zero minimum:1000 name:PM_FPU0_FMA_GRP88 : (Group 88 pm_fpu10) FPU0 executed multiply-add instruction event:0X581 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP88 : (Group 88 pm_fpu10) FPU1 executed multiply-add instruction event:0X582 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP88 : (Group 88 pm_fpu10) IOPS instructions completed event:0X583 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP88 : (Group 88 pm_fpu10) FPU1 executed FRSP or FCONV instructions event:0X584 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP88 : (Group 88 pm_fpu10) Instructions completed event:0X585 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP88 : (Group 88 pm_fpu10) Run cycles #Group 89 pm_fpu11, Floating point events by unit event:0X590 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP89 : (Group 89 pm_fpu11) FPU0 executed add, mult, sub, cmp or sel instruction event:0X591 counters:1 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP89 : (Group 89 pm_fpu11) FPU1 executed add, mult, sub, cmp or sel instruction event:0X592 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP89 : (Group 89 pm_fpu11) FPU0 produced a result event:0X593 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP89 : (Group 89 pm_fpu11) IOPS instructions completed event:0X594 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP89 : (Group 89 pm_fpu11) Instructions completed event:0X595 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP89 : (Group 89 pm_fpu11) Run cycles #Group 90 pm_fpu12, Floating point events by unit event:0X5A0 counters:0 um:zero minimum:1000 name:PM_FPU0_STF_GRP90 : (Group 90 pm_fpu12) FPU0 executed store instruction event:0X5A1 counters:1 um:zero minimum:1000 name:PM_FPU1_STF_GRP90 : (Group 90 pm_fpu12) FPU1 executed store instruction event:0X5A2 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP90 : (Group 90 pm_fpu12) LSU0 executed Floating Point load instruction event:0X5A3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP90 : (Group 90 pm_fpu12) IOPS instructions completed event:0X5A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP90 : (Group 90 pm_fpu12) Instructions completed event:0X5A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP90 : (Group 90 pm_fpu12) Run cycles #Group 91 pm_fxu1, Fixed Point events event:0X5B0 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP91 : (Group 91 pm_fxu1) FXU idle event:0X5B1 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP91 : (Group 91 pm_fxu1) FXU busy event:0X5B2 counters:2 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP91 : (Group 91 pm_fxu1) FXU0 busy FXU1 idle event:0X5B3 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP91 : (Group 91 pm_fxu1) FXU1 busy FXU0 idle event:0X5B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP91 : (Group 91 pm_fxu1) Instructions completed event:0X5B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP91 : (Group 91 pm_fxu1) Run cycles #Group 92 pm_fxu2, Fixed Point events event:0X5C0 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP92 : (Group 92 pm_fxu2) Marked group dispatched event:0X5C1 counters:1 um:zero minimum:1000 name:PM_MRK_GRP_BR_REDIR_GRP92 : (Group 92 pm_fxu2) Group experienced marked branch redirect event:0X5C2 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP92 : (Group 92 pm_fxu2) FXU produced a result event:0X5C3 counters:3 um:zero minimum:1000 name:PM_FXLS_FULL_CYC_GRP92 : (Group 92 pm_fxu2) Cycles FXLS queue is full event:0X5C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP92 : (Group 92 pm_fxu2) Instructions completed event:0X5C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP92 : (Group 92 pm_fxu2) Run cycles #Group 93 pm_fxu3, Fixed Point events event:0X5D0 counters:0 um:zero minimum:1000 name:PM_3INST_CLB_CYC_GRP93 : (Group 93 pm_fxu3) Cycles 3 instructions in CLB event:0X5D1 counters:1 um:zero minimum:1000 name:PM_4INST_CLB_CYC_GRP93 : (Group 93 pm_fxu3) Cycles 4 instructions in CLB event:0X5D2 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP93 : (Group 93 pm_fxu3) FXU0 produced a result event:0X5D3 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP93 : (Group 93 pm_fxu3) FXU1 produced a result event:0X5D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP93 : (Group 93 pm_fxu3) Instructions completed event:0X5D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP93 : (Group 93 pm_fxu3) Run cycles #Group 94 pm_smt_priorities1, Thread priority events event:0X5E0 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_4_CYC_GRP94 : (Group 94 pm_smt_priorities1) Cycles thread running at priority level 4 event:0X5E1 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_7_CYC_GRP94 : (Group 94 pm_smt_priorities1) Cycles thread running at priority level 7 event:0X5E2 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_0_CYC_GRP94 : (Group 94 pm_smt_priorities1) Cycles no thread priority difference event:0X5E3 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_1or2_CYC_GRP94 : (Group 94 pm_smt_priorities1) Cycles thread priority difference is 1 or 2 event:0X5E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP94 : (Group 94 pm_smt_priorities1) Instructions completed event:0X5E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP94 : (Group 94 pm_smt_priorities1) Run cycles #Group 95 pm_smt_priorities2, Thread priority events event:0X5F0 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_3_CYC_GRP95 : (Group 95 pm_smt_priorities2) Cycles thread running at priority level 3 event:0X5F1 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_6_CYC_GRP95 : (Group 95 pm_smt_priorities2) Cycles thread running at priority level 6 event:0X5F2 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_3or4_CYC_GRP95 : (Group 95 pm_smt_priorities2) Cycles thread priority difference is 3 or 4 event:0X5F3 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_5or6_CYC_GRP95 : (Group 95 pm_smt_priorities2) Cycles thread priority difference is 5 or 6 event:0X5F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP95 : (Group 95 pm_smt_priorities2) Instructions completed event:0X5F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP95 : (Group 95 pm_smt_priorities2) Run cycles #Group 96 pm_smt_priorities3, Thread priority events event:0X600 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_2_CYC_GRP96 : (Group 96 pm_smt_priorities3) Cycles thread running at priority level 2 event:0X601 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_5_CYC_GRP96 : (Group 96 pm_smt_priorities3) Cycles thread running at priority level 5 event:0X602 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus1or2_CYC_GRP96 : (Group 96 pm_smt_priorities3) Cycles thread priority difference is -1 or -2 event:0X603 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus3or4_CYC_GRP96 : (Group 96 pm_smt_priorities3) Cycles thread priority difference is -3 or -4 event:0X604 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP96 : (Group 96 pm_smt_priorities3) Instructions completed event:0X605 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP96 : (Group 96 pm_smt_priorities3) Run cycles #Group 97 pm_smt_priorities4, Thread priority events event:0X610 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_1_CYC_GRP97 : (Group 97 pm_smt_priorities4) Cycles thread running at priority level 1 event:0X611 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP97 : (Group 97 pm_smt_priorities4) Hypervisor Cycles event:0X612 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus5or6_CYC_GRP97 : (Group 97 pm_smt_priorities4) Cycles thread priority difference is -5 or -6 event:0X613 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP97 : (Group 97 pm_smt_priorities4) IOPS instructions completed event:0X614 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP97 : (Group 97 pm_smt_priorities4) Instructions completed event:0X615 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP97 : (Group 97 pm_smt_priorities4) Run cycles #Group 98 pm_smt_both, Thread common events event:0X620 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_CYC_GRP98 : (Group 98 pm_smt_both) One of the threads in run cycles event:0X621 counters:1 um:zero minimum:1000 name:PM_THRD_GRP_CMPL_BOTH_CYC_GRP98 : (Group 98 pm_smt_both) Cycles group completed by both threads event:0X622 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP98 : (Group 98 pm_smt_both) IOPS instructions completed event:0X623 counters:3 um:zero minimum:1000 name:PM_THRD_L2MISS_BOTH_CYC_GRP98 : (Group 98 pm_smt_both) Cycles both threads in L2 misses event:0X624 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP98 : (Group 98 pm_smt_both) Instructions completed event:0X625 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP98 : (Group 98 pm_smt_both) Run cycles #Group 99 pm_smt_selection, Thread selection event:0X630 counters:0 um:zero minimum:1000 name:PM_SNOOP_TLBIE_GRP99 : (Group 99 pm_smt_selection) Snoop TLBIE event:0X631 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP99 : (Group 99 pm_smt_selection) IOPS instructions completed event:0X632 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_T0_GRP99 : (Group 99 pm_smt_selection) Decode selected thread 0 event:0X633 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_T1_GRP99 : (Group 99 pm_smt_selection) Decode selected thread 1 event:0X634 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP99 : (Group 99 pm_smt_selection) Instructions completed event:0X635 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP99 : (Group 99 pm_smt_selection) Run cycles #Group 100 pm_smt_selectover1, Thread selection overide event:0X640 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP100 : (Group 100 pm_smt_selectover1) IOPS instructions completed event:0X641 counters:1 um:zero minimum:1000 name:PM_0INST_CLB_CYC_GRP100 : (Group 100 pm_smt_selectover1) Cycles no instructions in CLB event:0X642 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_OVER_CLB_EMPTY_GRP100 : (Group 100 pm_smt_selectover1) Thread selection overides caused by CLB empty event:0X643 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_OVER_GCT_IMBAL_GRP100 : (Group 100 pm_smt_selectover1) Thread selection overides caused by GCT imbalance event:0X644 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP100 : (Group 100 pm_smt_selectover1) Instructions completed event:0X645 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP100 : (Group 100 pm_smt_selectover1) Run cycles #Group 101 pm_smt_selectover2, Thread selection overide event:0X650 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP101 : (Group 101 pm_smt_selectover2) IOPS instructions completed event:0X651 counters:1 um:zero minimum:10000 name:PM_CYC_GRP101 : (Group 101 pm_smt_selectover2) Processor cycles event:0X652 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_OVER_ISU_HOLD_GRP101 : (Group 101 pm_smt_selectover2) Thread selection overides caused by ISU holds event:0X653 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_OVER_L2MISS_GRP101 : (Group 101 pm_smt_selectover2) Thread selection overides caused by L2 misses event:0X654 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP101 : (Group 101 pm_smt_selectover2) Instructions completed event:0X655 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP101 : (Group 101 pm_smt_selectover2) Run cycles #Group 102 pm_fabric1, Fabric events event:0X660 counters:0 um:zero minimum:1000 name:PM_FAB_CMD_ISSUED_GRP102 : (Group 102 pm_fabric1) Fabric command issued event:0X661 counters:1 um:zero minimum:1000 name:PM_FAB_DCLAIM_ISSUED_GRP102 : (Group 102 pm_fabric1) dclaim issued event:0X662 counters:2 um:zero minimum:1000 name:PM_FAB_CMD_RETRIED_GRP102 : (Group 102 pm_fabric1) Fabric command retried event:0X663 counters:3 um:zero minimum:1000 name:PM_FAB_DCLAIM_RETRIED_GRP102 : (Group 102 pm_fabric1) dclaim retried event:0X664 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP102 : (Group 102 pm_fabric1) Instructions completed event:0X665 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP102 : (Group 102 pm_fabric1) Run cycles #Group 103 pm_fabric2, Fabric data movement event:0X670 counters:0 um:zero minimum:1000 name:PM_FAB_P1toM1_SIDECAR_EMPTY_GRP103 : (Group 103 pm_fabric2) P1 to M1 sidecar empty event:0X671 counters:1 um:zero minimum:1000 name:PM_FAB_HOLDtoVN_EMPTY_GRP103 : (Group 103 pm_fabric2) Hold buffer to VN empty event:0X672 counters:2 um:zero minimum:1000 name:PM_FAB_P1toVNorNN_SIDECAR_EMPTY_GRP103 : (Group 103 pm_fabric2) P1 to VN/NN sidecar empty event:0X673 counters:3 um:zero minimum:1000 name:PM_FAB_VBYPASS_EMPTY_GRP103 : (Group 103 pm_fabric2) Vertical bypass buffer empty event:0X674 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP103 : (Group 103 pm_fabric2) Instructions completed event:0X675 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP103 : (Group 103 pm_fabric2) Run cycles #Group 104 pm_fabric3, Fabric data movement event:0X680 counters:0 um:zero minimum:1000 name:PM_FAB_PNtoNN_DIRECT_GRP104 : (Group 104 pm_fabric3) PN to NN beat went straight to its destination event:0X681 counters:1 um:zero minimum:1000 name:PM_FAB_PNtoVN_DIRECT_GRP104 : (Group 104 pm_fabric3) PN to VN beat went straight to its destination event:0X682 counters:2 um:zero minimum:1000 name:PM_FAB_PNtoNN_SIDECAR_GRP104 : (Group 104 pm_fabric3) PN to NN beat went to sidecar first event:0X683 counters:3 um:zero minimum:1000 name:PM_FAB_PNtoVN_SIDECAR_GRP104 : (Group 104 pm_fabric3) PN to VN beat went to sidecar first event:0X684 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP104 : (Group 104 pm_fabric3) Instructions completed event:0X685 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP104 : (Group 104 pm_fabric3) Run cycles #Group 105 pm_fabric4, Fabric data movement event:0X690 counters:0 um:zero minimum:1000 name:PM_FAB_M1toP1_SIDECAR_EMPTY_GRP105 : (Group 105 pm_fabric4) M1 to P1 sidecar empty event:0X691 counters:1 um:zero minimum:1000 name:PM_FAB_HOLDtoNN_EMPTY_GRP105 : (Group 105 pm_fabric4) Hold buffer to NN empty event:0X692 counters:2 um:zero minimum:1000 name:PM_EE_OFF_GRP105 : (Group 105 pm_fabric4) Cycles MSR(EE) bit off event:0X693 counters:3 um:zero minimum:1000 name:PM_FAB_M1toVNorNN_SIDECAR_EMPTY_GRP105 : (Group 105 pm_fabric4) M1 to VN/NN sidecar empty event:0X694 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP105 : (Group 105 pm_fabric4) Instructions completed event:0X695 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP105 : (Group 105 pm_fabric4) Run cycles #Group 106 pm_snoop1, Snoop retry event:0X6A0 counters:0 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_QFULL_GRP106 : (Group 106 pm_snoop1) Snoop read retry due to read queue full event:0X6A1 counters:1 um:zero minimum:1000 name:PM_SNOOP_DCLAIM_RETRY_QFULL_GRP106 : (Group 106 pm_snoop1) Snoop dclaim/flush retry due to write/dclaim queues full event:0X6A2 counters:2 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_QFULL_GRP106 : (Group 106 pm_snoop1) Snoop read retry due to read queue full event:0X6A3 counters:3 um:zero minimum:1000 name:PM_SNOOP_PARTIAL_RTRY_QFULL_GRP106 : (Group 106 pm_snoop1) Snoop partial write retry due to partial-write queues full event:0X6A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP106 : (Group 106 pm_snoop1) Instructions completed event:0X6A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP106 : (Group 106 pm_snoop1) Run cycles #Group 107 pm_snoop2, Snoop read retry event:0X6B0 counters:0 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_RQ_GRP107 : (Group 107 pm_snoop2) Snoop read retry due to collision with active read queue event:0X6B1 counters:1 um:zero minimum:1000 name:PM_SNOOP_RETRY_1AHEAD_GRP107 : (Group 107 pm_snoop2) Snoop retry due to one ahead collision event:0X6B2 counters:2 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_WQ_GRP107 : (Group 107 pm_snoop2) Snoop read retry due to collision with active write queue event:0X6B3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP107 : (Group 107 pm_snoop2) IOPS instructions completed event:0X6B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP107 : (Group 107 pm_snoop2) Instructions completed event:0X6B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP107 : (Group 107 pm_snoop2) Run cycles #Group 108 pm_snoop3, Snoop write retry event:0X6C0 counters:0 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_RQ_GRP108 : (Group 108 pm_snoop3) Snoop write/dclaim retry due to collision with active read queue event:0X6C1 counters:1 um:zero minimum:1000 name:PM_MEM_HI_PRIO_WR_CMPL_GRP108 : (Group 108 pm_snoop3) High priority write completed event:0X6C2 counters:2 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_WQ_GRP108 : (Group 108 pm_snoop3) Snoop write/dclaim retry due to collision with active write queue event:0X6C3 counters:3 um:zero minimum:1000 name:PM_MEM_LO_PRIO_WR_CMPL_GRP108 : (Group 108 pm_snoop3) Low priority write completed event:0X6C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP108 : (Group 108 pm_snoop3) Instructions completed event:0X6C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP108 : (Group 108 pm_snoop3) Run cycles #Group 109 pm_snoop4, Snoop partial write retry event:0X6D0 counters:0 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_RQ_GRP109 : (Group 109 pm_snoop4) Snoop partial-write retry due to collision with active read queue event:0X6D1 counters:1 um:zero minimum:1000 name:PM_MEM_HI_PRIO_PW_CMPL_GRP109 : (Group 109 pm_snoop4) High priority partial-write completed event:0X6D2 counters:2 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_WQ_PWQ_GRP109 : (Group 109 pm_snoop4) Snoop partial-write retry due to collision with active write or partial-write queue event:0X6D3 counters:3 um:zero minimum:1000 name:PM_MEM_LO_PRIO_PW_CMPL_GRP109 : (Group 109 pm_snoop4) Low priority partial-write completed event:0X6D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP109 : (Group 109 pm_snoop4) Instructions completed event:0X6D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP109 : (Group 109 pm_snoop4) Run cycles #Group 110 pm_mem_rq, Memory read queue dispatch event:0X6E0 counters:0 um:zero minimum:1000 name:PM_MEM_RQ_DISP_GRP110 : (Group 110 pm_mem_rq) Memory read queue dispatched event:0X6E1 counters:1 um:zero minimum:1000 name:PM_MEM_RQ_DISP_BUSY8to15_GRP110 : (Group 110 pm_mem_rq) Memory read queue dispatched with 8-15 queues busy event:0X6E2 counters:2 um:zero minimum:1000 name:PM_MEM_RQ_DISP_BUSY1to7_GRP110 : (Group 110 pm_mem_rq) Memory read queue dispatched with 1-7 queues busy event:0X6E3 counters:3 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP110 : (Group 110 pm_mem_rq) Cycles MSR(EE) bit off and external interrupt pending event:0X6E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP110 : (Group 110 pm_mem_rq) Instructions completed event:0X6E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP110 : (Group 110 pm_mem_rq) Run cycles #Group 111 pm_mem_read, Memory read complete and cancel event:0X6F0 counters:0 um:zero minimum:1000 name:PM_MEM_READ_CMPL_GRP111 : (Group 111 pm_mem_read) Memory read completed or canceled event:0X6F1 counters:1 um:zero minimum:1000 name:PM_MEM_FAST_PATH_RD_CMPL_GRP111 : (Group 111 pm_mem_read) Fast path memory read completed event:0X6F2 counters:2 um:zero minimum:1000 name:PM_MEM_SPEC_RD_CANCEL_GRP111 : (Group 111 pm_mem_read) Speculative memory read canceled event:0X6F3 counters:3 um:zero minimum:1000 name:PM_EXT_INT_GRP111 : (Group 111 pm_mem_read) External interrupts event:0X6F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP111 : (Group 111 pm_mem_read) Instructions completed event:0X6F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP111 : (Group 111 pm_mem_read) Run cycles #Group 112 pm_mem_wq, Memory write queue dispatch event:0X700 counters:0 um:zero minimum:1000 name:PM_MEM_WQ_DISP_WRITE_GRP112 : (Group 112 pm_mem_wq) Memory write queue dispatched due to write event:0X701 counters:1 um:zero minimum:1000 name:PM_MEM_WQ_DISP_BUSY1to7_GRP112 : (Group 112 pm_mem_wq) Memory write queue dispatched with 1-7 queues busy event:0X702 counters:2 um:zero minimum:1000 name:PM_MEM_WQ_DISP_DCLAIM_GRP112 : (Group 112 pm_mem_wq) Memory write queue dispatched due to dclaim/flush event:0X703 counters:3 um:zero minimum:1000 name:PM_MEM_WQ_DISP_BUSY8to15_GRP112 : (Group 112 pm_mem_wq) Memory write queue dispatched with 8-15 queues busy event:0X704 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP112 : (Group 112 pm_mem_wq) Instructions completed event:0X705 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP112 : (Group 112 pm_mem_wq) Run cycles #Group 113 pm_mem_pwq, Memory partial write queue event:0X710 counters:0 um:zero minimum:1000 name:PM_MEM_PWQ_DISP_GRP113 : (Group 113 pm_mem_pwq) Memory partial-write queue dispatched event:0X711 counters:1 um:zero minimum:1000 name:PM_MEM_PWQ_DISP_BUSY2or3_GRP113 : (Group 113 pm_mem_pwq) Memory partial-write queue dispatched with 2-3 queues busy event:0X712 counters:2 um:zero minimum:1000 name:PM_MEM_PW_GATH_GRP113 : (Group 113 pm_mem_pwq) Memory partial-write gathered event:0X713 counters:3 um:zero minimum:1000 name:PM_MEM_PW_CMPL_GRP113 : (Group 113 pm_mem_pwq) Memory partial-write completed event:0X714 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP113 : (Group 113 pm_mem_pwq) Instructions completed event:0X715 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP113 : (Group 113 pm_mem_pwq) Run cycles #Group 114 pm_threshold, Thresholding event:0X720 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP114 : (Group 114 pm_threshold) Marked group dispatched event:0X721 counters:1 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP114 : (Group 114 pm_threshold) Marked IMR reloaded event:0X722 counters:2 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP114 : (Group 114 pm_threshold) Threshold timeout event:0X723 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP114 : (Group 114 pm_threshold) Marked instruction LSU processing finished event:0X724 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP114 : (Group 114 pm_threshold) Instructions completed event:0X725 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP114 : (Group 114 pm_threshold) Run cycles #Group 115 pm_mrk_grp1, Marked group events event:0X730 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP115 : (Group 115 pm_mrk_grp1) Marked group dispatched event:0X731 counters:1 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP115 : (Group 115 pm_mrk_grp1) Marked L1 D cache store misses event:0X732 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP115 : (Group 115 pm_mrk_grp1) Marked instruction finished event:0X733 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP115 : (Group 115 pm_mrk_grp1) Marked group completed event:0X734 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP115 : (Group 115 pm_mrk_grp1) Instructions completed event:0X735 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP115 : (Group 115 pm_mrk_grp1) Run cycles #Group 116 pm_mrk_grp2, Marked group events event:0X740 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP116 : (Group 116 pm_mrk_grp2) Marked group issued event:0X741 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP116 : (Group 116 pm_mrk_grp2) Marked instruction BRU processing finished event:0X742 counters:2 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP116 : (Group 116 pm_mrk_grp2) Marked L1 reload data source valid event:0X743 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_IC_MISS_GRP116 : (Group 116 pm_mrk_grp2) Group experienced marked I cache miss event:0X744 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP116 : (Group 116 pm_mrk_grp2) Instructions completed event:0X745 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP116 : (Group 116 pm_mrk_grp2) Run cycles #Group 117 pm_mrk_dsource1, Marked data from event:0X750 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP117 : (Group 117 pm_mrk_dsource1) Marked data loaded from L2 event:0X751 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_CYC_GRP117 : (Group 117 pm_mrk_dsource1) Marked load latency from L2 event:0X752 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP117 : (Group 117 pm_mrk_dsource1) Marked data loaded from L2.5 modified event:0X753 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_CYC_GRP117 : (Group 117 pm_mrk_dsource1) Marked load latency from L2.5 modified event:0X754 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP117 : (Group 117 pm_mrk_dsource1) Instructions completed event:0X755 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP117 : (Group 117 pm_mrk_dsource1) Run cycles #Group 118 pm_mrk_dsource2, Marked data from event:0X760 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP118 : (Group 118 pm_mrk_dsource2) Marked data loaded from L2.5 shared event:0X761 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_CYC_GRP118 : (Group 118 pm_mrk_dsource2) Marked load latency from L2.5 shared event:0X762 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP118 : (Group 118 pm_mrk_dsource2) IOPS instructions completed event:0X763 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP118 : (Group 118 pm_mrk_dsource2) FPU produced a result event:0X764 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP118 : (Group 118 pm_mrk_dsource2) Instructions completed event:0X765 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP118 : (Group 118 pm_mrk_dsource2) Run cycles #Group 119 pm_mrk_dsource3, Marked data from event:0X770 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP119 : (Group 119 pm_mrk_dsource3) Marked data loaded from L3 event:0X771 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_CYC_GRP119 : (Group 119 pm_mrk_dsource3) Marked load latency from L3 event:0X772 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_GRP119 : (Group 119 pm_mrk_dsource3) Marked data loaded from L3.5 modified event:0X773 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP119 : (Group 119 pm_mrk_dsource3) Marked load latency from L3.5 modified event:0X774 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP119 : (Group 119 pm_mrk_dsource3) Instructions completed event:0X775 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP119 : (Group 119 pm_mrk_dsource3) Run cycles #Group 120 pm_mrk_dsource4, Marked data from event:0X780 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_GRP120 : (Group 120 pm_mrk_dsource4) Marked data loaded from remote memory event:0X781 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP120 : (Group 120 pm_mrk_dsource4) Marked load latency from L2.75 shared event:0X782 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_GRP120 : (Group 120 pm_mrk_dsource4) Marked data loaded from L2.75 shared event:0X783 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_CYC_GRP120 : (Group 120 pm_mrk_dsource4) Marked load latency from remote memory event:0X784 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP120 : (Group 120 pm_mrk_dsource4) Instructions completed event:0X785 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP120 : (Group 120 pm_mrk_dsource4) Run cycles #Group 121 pm_mrk_dsource5, Marked data from event:0X790 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_GRP121 : (Group 121 pm_mrk_dsource5) Marked data loaded from L3.5 shared event:0X791 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_CYC_GRP121 : (Group 121 pm_mrk_dsource5) Marked load latency from L3.5 shared event:0X792 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_GRP121 : (Group 121 pm_mrk_dsource5) Marked data loaded from local memory event:0X793 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_CYC_GRP121 : (Group 121 pm_mrk_dsource5) Marked load latency from local memory event:0X794 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP121 : (Group 121 pm_mrk_dsource5) Instructions completed event:0X795 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP121 : (Group 121 pm_mrk_dsource5) Run cycles #Group 122 pm_mrk_dsource6, Marked data from event:0X7A0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP122 : (Group 122 pm_mrk_dsource6) Marked data loaded from L2.75 modified event:0X7A1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP122 : (Group 122 pm_mrk_dsource6) Marked load latency from L2.75 shared event:0X7A2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP122 : (Group 122 pm_mrk_dsource6) IOPS instructions completed event:0X7A3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_CYC_GRP122 : (Group 122 pm_mrk_dsource6) Marked load latency from L2.75 modified event:0X7A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP122 : (Group 122 pm_mrk_dsource6) Instructions completed event:0X7A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP122 : (Group 122 pm_mrk_dsource6) Run cycles #Group 123 pm_mrk_dsource7, Marked data from event:0X7B0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_GRP123 : (Group 123 pm_mrk_dsource7) Marked data loaded from L3.75 modified event:0X7B1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_CYC_GRP123 : (Group 123 pm_mrk_dsource7) Marked load latency from L3.75 shared event:0X7B2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_GRP123 : (Group 123 pm_mrk_dsource7) Marked data loaded from L3.75 shared event:0X7B3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_CYC_GRP123 : (Group 123 pm_mrk_dsource7) Marked load latency from L3.75 modified event:0X7B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP123 : (Group 123 pm_mrk_dsource7) Instructions completed event:0X7B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP123 : (Group 123 pm_mrk_dsource7) Run cycles #Group 124 pm_mrk_lbmiss, Marked TLB and SLB misses event:0X7C0 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP124 : (Group 124 pm_mrk_lbmiss) Marked Data TLB misses for 4K page event:0X7C1 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16M_GRP124 : (Group 124 pm_mrk_lbmiss) Marked Data TLB misses for 16M page event:0X7C2 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_GRP124 : (Group 124 pm_mrk_lbmiss) Marked Data TLB misses event:0X7C3 counters:3 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP124 : (Group 124 pm_mrk_lbmiss) Marked Data SLB misses event:0X7C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP124 : (Group 124 pm_mrk_lbmiss) Instructions completed event:0X7C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP124 : (Group 124 pm_mrk_lbmiss) Run cycles #Group 125 pm_mrk_lbref, Marked TLB and SLB references event:0X7D0 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP125 : (Group 125 pm_mrk_lbref) Marked Data TLB reference for 4K page event:0X7D1 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP125 : (Group 125 pm_mrk_lbref) Marked Data TLB reference for 16M page event:0X7D2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP125 : (Group 125 pm_mrk_lbref) IOPS instructions completed event:0X7D3 counters:3 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP125 : (Group 125 pm_mrk_lbref) Marked Data SLB misses event:0X7D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP125 : (Group 125 pm_mrk_lbref) Instructions completed event:0X7D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP125 : (Group 125 pm_mrk_lbref) Run cycles #Group 126 pm_mrk_lsmiss, Marked load and store miss event:0X7E0 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP126 : (Group 126 pm_mrk_lsmiss) Marked L1 D cache load misses event:0X7E1 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP126 : (Group 126 pm_mrk_lsmiss) IOPS instructions completed event:0X7E2 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP126 : (Group 126 pm_mrk_lsmiss) Marked store completed with intervention event:0X7E3 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP126 : (Group 126 pm_mrk_lsmiss) Marked instruction CRU processing finished event:0X7E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP126 : (Group 126 pm_mrk_lsmiss) Instructions completed event:0X7E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP126 : (Group 126 pm_mrk_lsmiss) Run cycles #Group 127 pm_mrk_ulsflush, Mark unaligned load and store flushes event:0X7F0 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP127 : (Group 127 pm_mrk_ulsflush) Marked store instruction completed event:0X7F1 counters:1 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP127 : (Group 127 pm_mrk_ulsflush) Marked L1 D cache store misses event:0X7F2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_UST_GRP127 : (Group 127 pm_mrk_ulsflush) Marked unaligned store flushes event:0X7F3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_ULD_GRP127 : (Group 127 pm_mrk_ulsflush) Marked unaligned load flushes event:0X7F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP127 : (Group 127 pm_mrk_ulsflush) Instructions completed event:0X7F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP127 : (Group 127 pm_mrk_ulsflush) Run cycles #Group 128 pm_mrk_misc, Misc marked instructions event:0X800 counters:0 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP128 : (Group 128 pm_mrk_misc) Marked STCX failed event:0X801 counters:1 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP128 : (Group 128 pm_mrk_misc) Marked store sent to GPS event:0X802 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP128 : (Group 128 pm_mrk_misc) Marked instruction FPU processing finished event:0X803 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP128 : (Group 128 pm_mrk_misc) Marked group completion timeout event:0X804 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP128 : (Group 128 pm_mrk_misc) Instructions completed event:0X805 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP128 : (Group 128 pm_mrk_misc) Run cycles #Group 129 pm_lsref_L1, Load/Store operations and L1 activity event:0X810 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP129 : (Group 129 pm_lsref_L1) Data loaded from L2 event:0X811 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP129 : (Group 129 pm_lsref_L1) Instruction fetched from L1 event:0X812 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP129 : (Group 129 pm_lsref_L1) L1 D cache store references event:0X813 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP129 : (Group 129 pm_lsref_L1) L1 D cache load references event:0X814 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP129 : (Group 129 pm_lsref_L1) Instructions completed event:0X815 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP129 : (Group 129 pm_lsref_L1) Run cycles #Group 130 pm_lsref_L2L3, Load/Store operations and L2,L3 activity event:0X820 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP130 : (Group 130 pm_lsref_L2L3) Data loaded from L3 event:0X821 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP130 : (Group 130 pm_lsref_L2L3) Data loaded from local memory event:0X822 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP130 : (Group 130 pm_lsref_L2L3) L1 D cache store references event:0X823 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP130 : (Group 130 pm_lsref_L2L3) L1 D cache load references event:0X824 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP130 : (Group 130 pm_lsref_L2L3) Instructions completed event:0X825 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP130 : (Group 130 pm_lsref_L2L3) Run cycles #Group 131 pm_lsref_tlbmiss, Load/Store operations and TLB misses event:0X830 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP131 : (Group 131 pm_lsref_tlbmiss) Instruction TLB misses event:0X831 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP131 : (Group 131 pm_lsref_tlbmiss) Data TLB misses event:0X832 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP131 : (Group 131 pm_lsref_tlbmiss) L1 D cache store references event:0X833 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP131 : (Group 131 pm_lsref_tlbmiss) L1 D cache load references event:0X834 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP131 : (Group 131 pm_lsref_tlbmiss) Instructions completed event:0X835 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP131 : (Group 131 pm_lsref_tlbmiss) Run cycles #Group 132 pm_Dmiss, Data cache misses event:0X840 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP132 : (Group 132 pm_Dmiss) Data loaded from L3 event:0X841 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP132 : (Group 132 pm_Dmiss) Data loaded from local memory event:0X842 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP132 : (Group 132 pm_Dmiss) L1 D cache load misses event:0X843 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP132 : (Group 132 pm_Dmiss) L1 D cache store misses event:0X844 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP132 : (Group 132 pm_Dmiss) Instructions completed event:0X845 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP132 : (Group 132 pm_Dmiss) Run cycles #Group 133 pm_prefetchX, Prefetch events event:0X850 counters:0 um:zero minimum:10000 name:PM_CYC_GRP133 : (Group 133 pm_prefetchX) Processor cycles event:0X851 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP133 : (Group 133 pm_prefetchX) Instruction prefetch requests event:0X852 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP133 : (Group 133 pm_prefetchX) L1 cache data prefetches event:0X853 counters:3 um:zero minimum:1000 name:PM_L2_PREF_GRP133 : (Group 133 pm_prefetchX) L2 cache prefetches event:0X854 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP133 : (Group 133 pm_prefetchX) Instructions completed event:0X855 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP133 : (Group 133 pm_prefetchX) Run cycles #Group 134 pm_branchX, Branch operations event:0X860 counters:0 um:zero minimum:1000 name:PM_BR_UNCOND_GRP134 : (Group 134 pm_branchX) Unconditional branch event:0X861 counters:1 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP134 : (Group 134 pm_branchX) A conditional branch was predicted, target prediction event:0X862 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP134 : (Group 134 pm_branchX) A conditional branch was predicted, CR prediction event:0X863 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP134 : (Group 134 pm_branchX) Branches issued event:0X864 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP134 : (Group 134 pm_branchX) Instructions completed event:0X865 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP134 : (Group 134 pm_branchX) Run cycles #Group 135 pm_fpuX1, Floating point events by unit event:0X870 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP135 : (Group 135 pm_fpuX1) FPU0 stalled in pipe3 event:0X871 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP135 : (Group 135 pm_fpuX1) FPU1 stalled in pipe3 event:0X872 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP135 : (Group 135 pm_fpuX1) FPU0 produced a result event:0X873 counters:3 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP135 : (Group 135 pm_fpuX1) FPU0 executed FPSCR instruction event:0X874 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP135 : (Group 135 pm_fpuX1) Instructions completed event:0X875 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP135 : (Group 135 pm_fpuX1) Run cycles #Group 136 pm_fpuX2, Floating point events by unit event:0X880 counters:0 um:zero minimum:1000 name:PM_FPU0_FMA_GRP136 : (Group 136 pm_fpuX2) FPU0 executed multiply-add instruction event:0X881 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP136 : (Group 136 pm_fpuX2) FPU1 executed multiply-add instruction event:0X882 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP136 : (Group 136 pm_fpuX2) FPU0 executed FRSP or FCONV instructions event:0X883 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP136 : (Group 136 pm_fpuX2) FPU1 executed FRSP or FCONV instructions event:0X884 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP136 : (Group 136 pm_fpuX2) Instructions completed event:0X885 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP136 : (Group 136 pm_fpuX2) Run cycles #Group 137 pm_fpuX3, Floating point events by unit event:0X890 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP137 : (Group 137 pm_fpuX3) FPU0 executed add, mult, sub, cmp or sel instruction event:0X891 counters:1 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP137 : (Group 137 pm_fpuX3) FPU1 executed add, mult, sub, cmp or sel instruction event:0X892 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP137 : (Group 137 pm_fpuX3) FPU0 produced a result event:0X893 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP137 : (Group 137 pm_fpuX3) FPU1 produced a result event:0X894 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP137 : (Group 137 pm_fpuX3) Instructions completed event:0X895 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP137 : (Group 137 pm_fpuX3) Run cycles #Group 138 pm_fpuX4, Floating point and L1 events event:0X8A0 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP138 : (Group 138 pm_fpuX4) FPU executed one flop instruction event:0X8A1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP138 : (Group 138 pm_fpuX4) FPU executed multiply-add instruction event:0X8A2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP138 : (Group 138 pm_fpuX4) L1 D cache store references event:0X8A3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP138 : (Group 138 pm_fpuX4) L1 D cache load references event:0X8A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP138 : (Group 138 pm_fpuX4) Instructions completed event:0X8A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP138 : (Group 138 pm_fpuX4) Run cycles #Group 139 pm_fpuX5, Floating point events event:0X8B0 counters:0 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP139 : (Group 139 pm_fpuX5) FPU executed single precision instruction event:0X8B1 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP139 : (Group 139 pm_fpuX5) FPU executed store instruction event:0X8B2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP139 : (Group 139 pm_fpuX5) FPU0 produced a result event:0X8B3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP139 : (Group 139 pm_fpuX5) FPU1 produced a result event:0X8B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP139 : (Group 139 pm_fpuX5) Instructions completed event:0X8B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP139 : (Group 139 pm_fpuX5) Run cycles #Group 140 pm_fpuX6, Floating point events event:0X8C0 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP140 : (Group 140 pm_fpuX6) FPU executed FDIV instruction event:0X8C1 counters:1 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP140 : (Group 140 pm_fpuX6) FPU executed FSQRT instruction event:0X8C2 counters:2 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP140 : (Group 140 pm_fpuX6) FPU executed FRSP or FCONV instructions event:0X8C3 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP140 : (Group 140 pm_fpuX6) FPU produced a result event:0X8C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP140 : (Group 140 pm_fpuX6) Instructions completed event:0X8C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP140 : (Group 140 pm_fpuX6) Run cycles #Group 141 pm_hpmcount1, HPM group for set 1 event:0X8D0 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP141 : (Group 141 pm_hpmcount1) FPU executed one flop instruction event:0X8D1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP141 : (Group 141 pm_hpmcount1) Processor cycles event:0X8D2 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP141 : (Group 141 pm_hpmcount1) Marked instruction FPU processing finished event:0X8D3 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP141 : (Group 141 pm_hpmcount1) FPU produced a result event:0X8D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP141 : (Group 141 pm_hpmcount1) Instructions completed event:0X8D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP141 : (Group 141 pm_hpmcount1) Run cycles #Group 142 pm_hpmcount2, HPM group for set 2 event:0X8E0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP142 : (Group 142 pm_hpmcount2) Processor cycles event:0X8E1 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP142 : (Group 142 pm_hpmcount2) FPU executed store instruction event:0X8E2 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP142 : (Group 142 pm_hpmcount2) Instructions dispatched event:0X8E3 counters:3 um:zero minimum:1000 name:PM_LSU_LDF_GRP142 : (Group 142 pm_hpmcount2) LSU executed Floating Point load instruction event:0X8E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP142 : (Group 142 pm_hpmcount2) Instructions completed event:0X8E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP142 : (Group 142 pm_hpmcount2) Run cycles #Group 143 pm_hpmcount3, HPM group for set 3 event:0X8F0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP143 : (Group 143 pm_hpmcount3) Processor cycles event:0X8F1 counters:1 um:zero minimum:1000 name:PM_INST_DISP_ATTEMPT_GRP143 : (Group 143 pm_hpmcount3) Instructions dispatch attempted event:0X8F2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP143 : (Group 143 pm_hpmcount3) L1 D cache load misses event:0X8F3 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP143 : (Group 143 pm_hpmcount3) L1 D cache store misses event:0X8F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP143 : (Group 143 pm_hpmcount3) Instructions completed event:0X8F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP143 : (Group 143 pm_hpmcount3) Run cycles #Group 144 pm_hpmcount4, HPM group for set 7 event:0X900 counters:0 um:zero minimum:1000 name:PM_TLB_MISS_GRP144 : (Group 144 pm_hpmcount4) TLB misses event:0X901 counters:1 um:zero minimum:10000 name:PM_CYC_GRP144 : (Group 144 pm_hpmcount4) Processor cycles event:0X902 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP144 : (Group 144 pm_hpmcount4) L1 D cache store references event:0X903 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP144 : (Group 144 pm_hpmcount4) L1 D cache load references event:0X904 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP144 : (Group 144 pm_hpmcount4) Instructions completed event:0X905 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP144 : (Group 144 pm_hpmcount4) Run cycles #Group 145 pm_hpmcount5, HPM group for set 9 event:0X910 counters:0 um:zero minimum:10000 name:PM_CYC_GRP145 : (Group 145 pm_hpmcount5) Processor cycles event:0X911 counters:1 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP145 : (Group 145 pm_hpmcount5) Marked instruction FXU processing finished event:0X912 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP145 : (Group 145 pm_hpmcount5) FXU produced a result event:0X913 counters:3 um:zero minimum:1000 name:PM_FXU0_FIN_GRP145 : (Group 145 pm_hpmcount5) FXU0 produced a result event:0X914 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP145 : (Group 145 pm_hpmcount5) Instructions completed event:0X915 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP145 : (Group 145 pm_hpmcount5) Run cycles #Group 146 pm_eprof1, Group for use with eprof event:0X920 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP146 : (Group 146 pm_eprof1) Instructions completed event:0X921 counters:1 um:zero minimum:10000 name:PM_CYC_GRP146 : (Group 146 pm_eprof1) Processor cycles event:0X922 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP146 : (Group 146 pm_eprof1) L1 D cache load misses event:0X923 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP146 : (Group 146 pm_eprof1) L1 D cache entries invalidated from L2 event:0X924 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP146 : (Group 146 pm_eprof1) Instructions completed event:0X925 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP146 : (Group 146 pm_eprof1) Run cycles #Group 147 pm_eprof2, Group for use with eprof event:0X930 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP147 : (Group 147 pm_eprof2) Marked L1 D cache load misses event:0X931 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP147 : (Group 147 pm_eprof2) Instructions completed event:0X932 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP147 : (Group 147 pm_eprof2) L1 D cache store references event:0X933 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP147 : (Group 147 pm_eprof2) L1 D cache load references event:0X934 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP147 : (Group 147 pm_eprof2) Instructions completed event:0X935 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP147 : (Group 147 pm_eprof2) Run cycles #Group 148 pm_eprof3, Group for use with eprof event:0X940 counters:0 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP148 : (Group 148 pm_eprof3) Marked L1 D cache store misses event:0X941 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP148 : (Group 148 pm_eprof3) Instructions completed event:0X942 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP148 : (Group 148 pm_eprof3) Instructions dispatched event:0X943 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP148 : (Group 148 pm_eprof3) L1 D cache store misses event:0X944 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP148 : (Group 148 pm_eprof3) Instructions completed event:0X945 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP148 : (Group 148 pm_eprof3) Run cycles oprofile-1.3.0/events/ppc64/power5/event_mappings0000664000175000017500000021171412534404406016710 00000000000000#Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 #Group 1 pm_utilization, CPI and utilization data event:0X010 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X011 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X012 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X013 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X014 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 event:0X015 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 #Group 2 pm_completion, Completion and cycle counts event:0X020 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X021 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X022 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X023 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X024 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X025 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 #Group 3 pm_group_dispatch, Group dispatch events event:0X030 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X031 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X032 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X033 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X034 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X035 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 #Group 4 pm_clb1, CLB fullness event:0X040 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X041 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X042 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X043 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X044 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X045 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 #Group 5 pm_clb2, CLB fullness event:0X050 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X051 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X052 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X053 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X054 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X055 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 #Group 6 pm_gct_empty, GCT empty reasons event:0X060 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X061 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X062 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X063 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X064 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X065 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 #Group 7 pm_gct_usage, GCT Usage event:0X070 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X071 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X072 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X073 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X074 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X075 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 #Group 8 pm_lsu1, LSU LRQ and LMQ events event:0X080 mmcr0:0X00000000 mmcr1:0X000F000FCCC4CCCA mmcra:0X00000000 event:0X081 mmcr0:0X00000000 mmcr1:0X000F000FCCC4CCCA mmcra:0X00000000 event:0X082 mmcr0:0X00000000 mmcr1:0X000F000FCCC4CCCA mmcra:0X00000000 event:0X083 mmcr0:0X00000000 mmcr1:0X000F000FCCC4CCCA mmcra:0X00000000 event:0X084 mmcr0:0X00000000 mmcr1:0X000F000FCCC4CCCA mmcra:0X00000000 event:0X085 mmcr0:0X00000000 mmcr1:0X000F000FCCC4CCCA mmcra:0X00000000 #Group 9 pm_lsu2, LSU SRQ events event:0X090 mmcr0:0X00000000 mmcr1:0X400E000ECAC2CA86 mmcra:0X00000000 event:0X091 mmcr0:0X00000000 mmcr1:0X400E000ECAC2CA86 mmcra:0X00000000 event:0X092 mmcr0:0X00000000 mmcr1:0X400E000ECAC2CA86 mmcra:0X00000000 event:0X093 mmcr0:0X00000000 mmcr1:0X400E000ECAC2CA86 mmcra:0X00000000 event:0X094 mmcr0:0X00000000 mmcr1:0X400E000ECAC2CA86 mmcra:0X00000000 event:0X095 mmcr0:0X00000000 mmcr1:0X400E000ECAC2CA86 mmcra:0X00000000 #Group 10 pm_lsu3, LSU SRQ and LMQ events event:0X0A0 mmcr0:0X00000000 mmcr1:0X010F000A102ACA2A mmcra:0X00000000 event:0X0A1 mmcr0:0X00000000 mmcr1:0X010F000A102ACA2A mmcra:0X00000000 event:0X0A2 mmcr0:0X00000000 mmcr1:0X010F000A102ACA2A mmcra:0X00000000 event:0X0A3 mmcr0:0X00000000 mmcr1:0X010F000A102ACA2A mmcra:0X00000000 event:0X0A4 mmcr0:0X00000000 mmcr1:0X010F000A102ACA2A mmcra:0X00000000 event:0X0A5 mmcr0:0X00000000 mmcr1:0X010F000A102ACA2A mmcra:0X00000000 #Group 11 pm_prefetch1, Prefetch stream allocation event:0X0B0 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X0B1 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X0B2 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X0B3 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X0B4 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X0B5 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 #Group 12 pm_prefetch2, Prefetch events event:0X0C0 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0C1 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0C2 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0C3 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0C4 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0C5 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 #Group 13 pm_prefetch3, L2 prefetch and misc events event:0X0D0 mmcr0:0X00000000 mmcr1:0X047C000820828602 mmcra:0X00000001 event:0X0D1 mmcr0:0X00000000 mmcr1:0X047C000820828602 mmcra:0X00000001 event:0X0D2 mmcr0:0X00000000 mmcr1:0X047C000820828602 mmcra:0X00000001 event:0X0D3 mmcr0:0X00000000 mmcr1:0X047C000820828602 mmcra:0X00000001 event:0X0D4 mmcr0:0X00000000 mmcr1:0X047C000820828602 mmcra:0X00000001 event:0X0D5 mmcr0:0X00000000 mmcr1:0X047C000820828602 mmcra:0X00000001 #Group 14 pm_prefetch4, Misc prefetch and reject events event:0X0E0 mmcr0:0X00000000 mmcr1:0X063E000EC0C8CC86 mmcra:0X00000000 event:0X0E1 mmcr0:0X00000000 mmcr1:0X063E000EC0C8CC86 mmcra:0X00000000 event:0X0E2 mmcr0:0X00000000 mmcr1:0X063E000EC0C8CC86 mmcra:0X00000000 event:0X0E3 mmcr0:0X00000000 mmcr1:0X063E000EC0C8CC86 mmcra:0X00000000 event:0X0E4 mmcr0:0X00000000 mmcr1:0X063E000EC0C8CC86 mmcra:0X00000000 event:0X0E5 mmcr0:0X00000000 mmcr1:0X063E000EC0C8CC86 mmcra:0X00000000 #Group 15 pm_lsu_reject1, LSU reject events event:0X0F0 mmcr0:0X00000000 mmcr1:0XC22C000E2010C610 mmcra:0X00000001 event:0X0F1 mmcr0:0X00000000 mmcr1:0XC22C000E2010C610 mmcra:0X00000001 event:0X0F2 mmcr0:0X00000000 mmcr1:0XC22C000E2010C610 mmcra:0X00000001 event:0X0F3 mmcr0:0X00000000 mmcr1:0XC22C000E2010C610 mmcra:0X00000001 event:0X0F4 mmcr0:0X00000000 mmcr1:0XC22C000E2010C610 mmcra:0X00000001 event:0X0F5 mmcr0:0X00000000 mmcr1:0XC22C000E2010C610 mmcra:0X00000001 #Group 16 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision event:0X100 mmcr0:0X00000000 mmcr1:0X820C000DC4CC02CE mmcra:0X00000001 event:0X101 mmcr0:0X00000000 mmcr1:0X820C000DC4CC02CE mmcra:0X00000001 event:0X102 mmcr0:0X00000000 mmcr1:0X820C000DC4CC02CE mmcra:0X00000001 event:0X103 mmcr0:0X00000000 mmcr1:0X820C000DC4CC02CE mmcra:0X00000001 event:0X104 mmcr0:0X00000000 mmcr1:0X820C000DC4CC02CE mmcra:0X00000001 event:0X105 mmcr0:0X00000000 mmcr1:0X820C000DC4CC02CE mmcra:0X00000001 #Group 17 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions event:0X110 mmcr0:0X00000000 mmcr1:0X420C000FC6CEC0C8 mmcra:0X00000000 event:0X111 mmcr0:0X00000000 mmcr1:0X420C000FC6CEC0C8 mmcra:0X00000000 event:0X112 mmcr0:0X00000000 mmcr1:0X420C000FC6CEC0C8 mmcra:0X00000000 event:0X113 mmcr0:0X00000000 mmcr1:0X420C000FC6CEC0C8 mmcra:0X00000000 event:0X114 mmcr0:0X00000000 mmcr1:0X420C000FC6CEC0C8 mmcra:0X00000000 event:0X115 mmcr0:0X00000000 mmcr1:0X420C000FC6CEC0C8 mmcra:0X00000000 #Group 18 pm_lsu_reject4, LSU0/1 reject LMQ full event:0X120 mmcr0:0X00000000 mmcr1:0X820C000DC2CA02C8 mmcra:0X00000001 event:0X121 mmcr0:0X00000000 mmcr1:0X820C000DC2CA02C8 mmcra:0X00000001 event:0X122 mmcr0:0X00000000 mmcr1:0X820C000DC2CA02C8 mmcra:0X00000001 event:0X123 mmcr0:0X00000000 mmcr1:0X820C000DC2CA02C8 mmcra:0X00000001 event:0X124 mmcr0:0X00000000 mmcr1:0X820C000DC2CA02C8 mmcra:0X00000001 event:0X125 mmcr0:0X00000000 mmcr1:0X820C000DC2CA02C8 mmcra:0X00000001 #Group 19 pm_lsu_reject5, LSU misc reject and flush events event:0X130 mmcr0:0X00000000 mmcr1:0X420C000C10208A8E mmcra:0X00000000 event:0X131 mmcr0:0X00000000 mmcr1:0X420C000C10208A8E mmcra:0X00000000 event:0X132 mmcr0:0X00000000 mmcr1:0X420C000C10208A8E mmcra:0X00000000 event:0X133 mmcr0:0X00000000 mmcr1:0X420C000C10208A8E mmcra:0X00000000 event:0X134 mmcr0:0X00000000 mmcr1:0X420C000C10208A8E mmcra:0X00000000 event:0X135 mmcr0:0X00000000 mmcr1:0X420C000C10208A8E mmcra:0X00000000 #Group 20 pm_flush1, Misc flush events event:0X140 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X141 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X142 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X143 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X144 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X145 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 #Group 21 pm_flush2, Flushes due to scoreboard and sync event:0X150 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X151 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X152 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X153 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X154 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X155 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 #Group 22 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events event:0X160 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X161 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X162 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X163 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X164 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X165 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 #Group 23 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ event:0X170 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X171 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X172 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X173 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X174 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X175 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 #Group 24 pm_lsu_flush_srq, LSU0/1 flush due to SRQ event:0X180 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X181 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X182 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X183 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X184 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X185 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 #Group 25 pm_lsu_flush_unaligned, LSU flush due to unaligned data event:0X190 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X191 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X192 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X193 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X194 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X195 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 #Group 26 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load event:0X1A0 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1A1 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1A2 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1A3 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1A4 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1A5 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 #Group 27 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store event:0X1B0 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1B1 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1B2 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1B3 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1B4 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1B5 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 #Group 28 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full event:0X1C0 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1C1 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1C2 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1C3 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1C4 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1C5 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 #Group 29 pm_lsu_stall1, LSU Stalls event:0X1D0 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1D1 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1D2 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1D3 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1D4 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1D5 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 #Group 30 pm_lsu_stall2, LSU Stalls event:0X1E0 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1E1 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1E2 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1E3 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1E4 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1E5 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 #Group 31 pm_fxu_stall, FXU Stalls event:0X1F0 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X1F1 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X1F2 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X1F3 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X1F4 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X1F5 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 #Group 32 pm_fpu_stall, FPU Stalls event:0X200 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X201 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X202 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X203 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X204 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X205 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 #Group 33 pm_queue_full, BRQ LRQ LMQ queue full event:0X210 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X211 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X212 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X213 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X214 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X215 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 #Group 34 pm_issueq_full, FPU FX full event:0X220 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X221 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X222 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X223 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X224 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X225 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 #Group 35 pm_mapper_full1, CR CTR GPR mapper full event:0X230 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X231 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X232 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X233 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X234 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X235 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 #Group 36 pm_mapper_full2, FPR XER mapper full event:0X240 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X241 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X242 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X243 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X244 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X245 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 #Group 37 pm_misc_load, Non-cachable loads and stcx events event:0X250 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X251 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X252 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X253 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X254 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X255 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 #Group 38 pm_ic_demand, ICache demand from BR redirect event:0X260 mmcr0:0X00000000 mmcr1:0X800C000FC6CEC0C2 mmcra:0X00000000 event:0X261 mmcr0:0X00000000 mmcr1:0X800C000FC6CEC0C2 mmcra:0X00000000 event:0X262 mmcr0:0X00000000 mmcr1:0X800C000FC6CEC0C2 mmcra:0X00000000 event:0X263 mmcr0:0X00000000 mmcr1:0X800C000FC6CEC0C2 mmcra:0X00000000 event:0X264 mmcr0:0X00000000 mmcr1:0X800C000FC6CEC0C2 mmcra:0X00000000 event:0X265 mmcr0:0X00000000 mmcr1:0X800C000FC6CEC0C2 mmcra:0X00000000 #Group 39 pm_ic_pref, ICache prefetch event:0X270 mmcr0:0X00000000 mmcr1:0X8000000CCECC8E1A mmcra:0X00000000 event:0X271 mmcr0:0X00000000 mmcr1:0X8000000CCECC8E1A mmcra:0X00000000 event:0X272 mmcr0:0X00000000 mmcr1:0X8000000CCECC8E1A mmcra:0X00000000 event:0X273 mmcr0:0X00000000 mmcr1:0X8000000CCECC8E1A mmcra:0X00000000 event:0X274 mmcr0:0X00000000 mmcr1:0X8000000CCECC8E1A mmcra:0X00000000 event:0X275 mmcr0:0X00000000 mmcr1:0X8000000CCECC8E1A mmcra:0X00000000 #Group 40 pm_ic_miss, ICache misses event:0X280 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X281 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X282 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X283 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X284 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X285 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 #Group 41 pm_branch_miss, Branch mispredict, TLB and SLB misses event:0X290 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X291 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X292 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X293 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X294 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X295 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 #Group 42 pm_branch1, Branch operations event:0X2A0 mmcr0:0X00000000 mmcr1:0X800000030E0E0E0E mmcra:0X00000000 event:0X2A1 mmcr0:0X00000000 mmcr1:0X800000030E0E0E0E mmcra:0X00000000 event:0X2A2 mmcr0:0X00000000 mmcr1:0X800000030E0E0E0E mmcra:0X00000000 event:0X2A3 mmcr0:0X00000000 mmcr1:0X800000030E0E0E0E mmcra:0X00000000 event:0X2A4 mmcr0:0X00000000 mmcr1:0X800000030E0E0E0E mmcra:0X00000000 event:0X2A5 mmcr0:0X00000000 mmcr1:0X800000030E0E0E0E mmcra:0X00000000 #Group 43 pm_branch2, Branch operations event:0X2B0 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2B1 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2B2 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2B3 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2B4 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2B5 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 #Group 44 pm_L1_tlbmiss, L1 load and TLB misses event:0X2C0 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2C1 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2C2 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2C3 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2C4 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2C5 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 #Group 45 pm_L1_DERAT_miss, L1 store and DERAT misses event:0X2D0 mmcr0:0X00000000 mmcr1:0X00B300000E202086 mmcra:0X00000000 event:0X2D1 mmcr0:0X00000000 mmcr1:0X00B300000E202086 mmcra:0X00000000 event:0X2D2 mmcr0:0X00000000 mmcr1:0X00B300000E202086 mmcra:0X00000000 event:0X2D3 mmcr0:0X00000000 mmcr1:0X00B300000E202086 mmcra:0X00000000 event:0X2D4 mmcr0:0X00000000 mmcr1:0X00B300000E202086 mmcra:0X00000000 event:0X2D5 mmcr0:0X00000000 mmcr1:0X00B300000E202086 mmcra:0X00000000 #Group 46 pm_L1_slbmiss, L1 load and SLB misses event:0X2E0 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2E1 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2E2 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2E3 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2E4 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2E5 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 #Group 47 pm_L1_dtlbmiss_4K, L1 load references and 4K Data TLB references and misses event:0X2F0 mmcr0:0X00000000 mmcr1:0X08F0000084808088 mmcra:0X00000000 event:0X2F1 mmcr0:0X00000000 mmcr1:0X08F0000084808088 mmcra:0X00000000 event:0X2F2 mmcr0:0X00000000 mmcr1:0X08F0000084808088 mmcra:0X00000000 event:0X2F3 mmcr0:0X00000000 mmcr1:0X08F0000084808088 mmcra:0X00000000 event:0X2F4 mmcr0:0X00000000 mmcr1:0X08F0000084808088 mmcra:0X00000000 event:0X2F5 mmcr0:0X00000000 mmcr1:0X08F0000084808088 mmcra:0X00000000 #Group 48 pm_L1_dtlbmiss_16M, L1 store references and 16M Data TLB references and misses event:0X300 mmcr0:0X00000000 mmcr1:0X08F000008C88828A mmcra:0X00000000 event:0X301 mmcr0:0X00000000 mmcr1:0X08F000008C88828A mmcra:0X00000000 event:0X302 mmcr0:0X00000000 mmcr1:0X08F000008C88828A mmcra:0X00000000 event:0X303 mmcr0:0X00000000 mmcr1:0X08F000008C88828A mmcra:0X00000000 event:0X304 mmcr0:0X00000000 mmcr1:0X08F000008C88828A mmcra:0X00000000 event:0X305 mmcr0:0X00000000 mmcr1:0X08F000008C88828A mmcra:0X00000000 #Group 49 pm_dsource1, L3 cache and memory data access event:0X310 mmcr0:0X00000000 mmcr1:0X400300001C0E8E02 mmcra:0X00000001 event:0X311 mmcr0:0X00000000 mmcr1:0X400300001C0E8E02 mmcra:0X00000001 event:0X312 mmcr0:0X00000000 mmcr1:0X400300001C0E8E02 mmcra:0X00000001 event:0X313 mmcr0:0X00000000 mmcr1:0X400300001C0E8E02 mmcra:0X00000001 event:0X314 mmcr0:0X00000000 mmcr1:0X400300001C0E8E02 mmcra:0X00000001 event:0X315 mmcr0:0X00000000 mmcr1:0X400300001C0E8E02 mmcra:0X00000001 #Group 50 pm_dsource2, L3 cache and memory data access event:0X320 mmcr0:0X00000000 mmcr1:0X000300031C0E360E mmcra:0X00000000 event:0X321 mmcr0:0X00000000 mmcr1:0X000300031C0E360E mmcra:0X00000000 event:0X322 mmcr0:0X00000000 mmcr1:0X000300031C0E360E mmcra:0X00000000 event:0X323 mmcr0:0X00000000 mmcr1:0X000300031C0E360E mmcra:0X00000000 event:0X324 mmcr0:0X00000000 mmcr1:0X000300031C0E360E mmcra:0X00000000 event:0X325 mmcr0:0X00000000 mmcr1:0X000300031C0E360E mmcra:0X00000000 #Group 51 pm_dsource_L2, L2 cache data access event:0X330 mmcr0:0X00000000 mmcr1:0X000300032E2E2E2E mmcra:0X00000000 event:0X331 mmcr0:0X00000000 mmcr1:0X000300032E2E2E2E mmcra:0X00000000 event:0X332 mmcr0:0X00000000 mmcr1:0X000300032E2E2E2E mmcra:0X00000000 event:0X333 mmcr0:0X00000000 mmcr1:0X000300032E2E2E2E mmcra:0X00000000 event:0X334 mmcr0:0X00000000 mmcr1:0X000300032E2E2E2E mmcra:0X00000000 event:0X335 mmcr0:0X00000000 mmcr1:0X000300032E2E2E2E mmcra:0X00000000 #Group 52 pm_dsource_L3, L3 cache data access event:0X340 mmcr0:0X00000000 mmcr1:0X000300033C3C3C3C mmcra:0X00000000 event:0X341 mmcr0:0X00000000 mmcr1:0X000300033C3C3C3C mmcra:0X00000000 event:0X342 mmcr0:0X00000000 mmcr1:0X000300033C3C3C3C mmcra:0X00000000 event:0X343 mmcr0:0X00000000 mmcr1:0X000300033C3C3C3C mmcra:0X00000000 event:0X344 mmcr0:0X00000000 mmcr1:0X000300033C3C3C3C mmcra:0X00000000 event:0X345 mmcr0:0X00000000 mmcr1:0X000300033C3C3C3C mmcra:0X00000000 #Group 53 pm_isource1, Instruction source information event:0X350 mmcr0:0X00000000 mmcr1:0X8000000C1A1A1A0C mmcra:0X00000000 event:0X351 mmcr0:0X00000000 mmcr1:0X8000000C1A1A1A0C mmcra:0X00000000 event:0X352 mmcr0:0X00000000 mmcr1:0X8000000C1A1A1A0C mmcra:0X00000000 event:0X353 mmcr0:0X00000000 mmcr1:0X8000000C1A1A1A0C mmcra:0X00000000 event:0X354 mmcr0:0X00000000 mmcr1:0X8000000C1A1A1A0C mmcra:0X00000000 event:0X355 mmcr0:0X00000000 mmcr1:0X8000000C1A1A1A0C mmcra:0X00000000 #Group 54 pm_isource2, Instruction source information event:0X360 mmcr0:0X00000000 mmcr1:0X8000000C0C0C021A mmcra:0X00000001 event:0X361 mmcr0:0X00000000 mmcr1:0X8000000C0C0C021A mmcra:0X00000001 event:0X362 mmcr0:0X00000000 mmcr1:0X8000000C0C0C021A mmcra:0X00000001 event:0X363 mmcr0:0X00000000 mmcr1:0X8000000C0C0C021A mmcra:0X00000001 event:0X364 mmcr0:0X00000000 mmcr1:0X8000000C0C0C021A mmcra:0X00000001 event:0X365 mmcr0:0X00000000 mmcr1:0X8000000C0C0C021A mmcra:0X00000001 #Group 55 pm_isource_L2, L2 instruction source information event:0X370 mmcr0:0X00000000 mmcr1:0X8000000C2C2C2C2C mmcra:0X00000000 event:0X371 mmcr0:0X00000000 mmcr1:0X8000000C2C2C2C2C mmcra:0X00000000 event:0X372 mmcr0:0X00000000 mmcr1:0X8000000C2C2C2C2C mmcra:0X00000000 event:0X373 mmcr0:0X00000000 mmcr1:0X8000000C2C2C2C2C mmcra:0X00000000 event:0X374 mmcr0:0X00000000 mmcr1:0X8000000C2C2C2C2C mmcra:0X00000000 event:0X375 mmcr0:0X00000000 mmcr1:0X8000000C2C2C2C2C mmcra:0X00000000 #Group 56 pm_isource_L3, L3 instruction source information event:0X380 mmcr0:0X00000000 mmcr1:0X8000000C3A3A3A3A mmcra:0X00000000 event:0X381 mmcr0:0X00000000 mmcr1:0X8000000C3A3A3A3A mmcra:0X00000000 event:0X382 mmcr0:0X00000000 mmcr1:0X8000000C3A3A3A3A mmcra:0X00000000 event:0X383 mmcr0:0X00000000 mmcr1:0X8000000C3A3A3A3A mmcra:0X00000000 event:0X384 mmcr0:0X00000000 mmcr1:0X8000000C3A3A3A3A mmcra:0X00000000 event:0X385 mmcr0:0X00000000 mmcr1:0X8000000C3A3A3A3A mmcra:0X00000000 #Group 57 pm_pteg_source1, PTEG source information event:0X390 mmcr0:0X00000000 mmcr1:0X000200032E2E2E2E mmcra:0X00000000 event:0X391 mmcr0:0X00000000 mmcr1:0X000200032E2E2E2E mmcra:0X00000000 event:0X392 mmcr0:0X00000000 mmcr1:0X000200032E2E2E2E mmcra:0X00000000 event:0X393 mmcr0:0X00000000 mmcr1:0X000200032E2E2E2E mmcra:0X00000000 event:0X394 mmcr0:0X00000000 mmcr1:0X000200032E2E2E2E mmcra:0X00000000 event:0X395 mmcr0:0X00000000 mmcr1:0X000200032E2E2E2E mmcra:0X00000000 #Group 58 pm_pteg_source2, PTEG source information event:0X3A0 mmcr0:0X00000000 mmcr1:0X000200033C3C3C3C mmcra:0X00000000 event:0X3A1 mmcr0:0X00000000 mmcr1:0X000200033C3C3C3C mmcra:0X00000000 event:0X3A2 mmcr0:0X00000000 mmcr1:0X000200033C3C3C3C mmcra:0X00000000 event:0X3A3 mmcr0:0X00000000 mmcr1:0X000200033C3C3C3C mmcra:0X00000000 event:0X3A4 mmcr0:0X00000000 mmcr1:0X000200033C3C3C3C mmcra:0X00000000 event:0X3A5 mmcr0:0X00000000 mmcr1:0X000200033C3C3C3C mmcra:0X00000000 #Group 59 pm_pteg_source3, PTEG source information event:0X3B0 mmcr0:0X00000000 mmcr1:0X000200030E0E360E mmcra:0X00000000 event:0X3B1 mmcr0:0X00000000 mmcr1:0X000200030E0E360E mmcra:0X00000000 event:0X3B2 mmcr0:0X00000000 mmcr1:0X000200030E0E360E mmcra:0X00000000 event:0X3B3 mmcr0:0X00000000 mmcr1:0X000200030E0E360E mmcra:0X00000000 event:0X3B4 mmcr0:0X00000000 mmcr1:0X000200030E0E360E mmcra:0X00000000 event:0X3B5 mmcr0:0X00000000 mmcr1:0X000200030E0E360E mmcra:0X00000000 #Group 60 pm_pteg_source4, L3 PTEG and group disptach events event:0X3C0 mmcr0:0X00000000 mmcr1:0X003200001C04048E mmcra:0X00000000 event:0X3C1 mmcr0:0X00000000 mmcr1:0X003200001C04048E mmcra:0X00000000 event:0X3C2 mmcr0:0X00000000 mmcr1:0X003200001C04048E mmcra:0X00000000 event:0X3C3 mmcr0:0X00000000 mmcr1:0X003200001C04048E mmcra:0X00000000 event:0X3C4 mmcr0:0X00000000 mmcr1:0X003200001C04048E mmcra:0X00000000 event:0X3C5 mmcr0:0X00000000 mmcr1:0X003200001C04048E mmcra:0X00000000 #Group 61 pm_L2SA_ld, L2 slice A load events event:0X3D0 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X3D1 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X3D2 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X3D3 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X3D4 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X3D5 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 #Group 62 pm_L2SA_st, L2 slice A store events event:0X3E0 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X3E1 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X3E2 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X3E3 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X3E4 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X3E5 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 #Group 63 pm_L2SA_st2, L2 slice A store events event:0X3F0 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X3F1 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X3F2 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X3F3 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X3F4 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X3F5 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 #Group 64 pm_L2SB_ld, L2 slice B load events event:0X400 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X401 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X402 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X403 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X404 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X405 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 #Group 65 pm_L2SB_st, L2 slice B store events event:0X410 mmcr0:0X00000000 mmcr1:0X3055800582C282C2 mmcra:0X00000000 event:0X411 mmcr0:0X00000000 mmcr1:0X3055800582C282C2 mmcra:0X00000000 event:0X412 mmcr0:0X00000000 mmcr1:0X3055800582C282C2 mmcra:0X00000000 event:0X413 mmcr0:0X00000000 mmcr1:0X3055800582C282C2 mmcra:0X00000000 event:0X414 mmcr0:0X00000000 mmcr1:0X3055800582C282C2 mmcra:0X00000000 event:0X415 mmcr0:0X00000000 mmcr1:0X3055800582C282C2 mmcra:0X00000000 #Group 66 pm_L2SB_st2, L2 slice B store events event:0X420 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X421 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X422 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X423 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X424 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X425 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 #Group 67 pm_L2SB_ld, L2 slice C load events event:0X430 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X431 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X432 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X433 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X434 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X435 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 #Group 68 pm_L2SB_st, L2 slice C store events event:0X440 mmcr0:0X00000000 mmcr1:0X3055800584C484C4 mmcra:0X00000000 event:0X441 mmcr0:0X00000000 mmcr1:0X3055800584C484C4 mmcra:0X00000000 event:0X442 mmcr0:0X00000000 mmcr1:0X3055800584C484C4 mmcra:0X00000000 event:0X443 mmcr0:0X00000000 mmcr1:0X3055800584C484C4 mmcra:0X00000000 event:0X444 mmcr0:0X00000000 mmcr1:0X3055800584C484C4 mmcra:0X00000000 event:0X445 mmcr0:0X00000000 mmcr1:0X3055800584C484C4 mmcra:0X00000000 #Group 69 pm_L2SB_st2, L2 slice C store events event:0X450 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X451 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X452 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X453 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X454 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X455 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 #Group 70 pm_L3SA_trans, L3 slice A state transistions event:0X460 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X461 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X462 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X463 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X464 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X465 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 #Group 71 pm_L3SB_trans, L3 slice B state transistions event:0X470 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X471 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X472 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X473 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X474 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X475 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 #Group 72 pm_L3SC_trans, L3 slice C state transistions event:0X480 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X481 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X482 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X483 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X484 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X485 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 #Group 73 pm_L2SA_trans, L2 slice A state transistions event:0X490 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X491 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X492 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X493 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X494 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X495 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 #Group 74 pm_L2SB_trans, L2 slice B state transistions event:0X4A0 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4A1 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4A2 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4A3 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4A4 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4A5 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 #Group 75 pm_L2SC_trans, L2 slice C state transistions event:0X4B0 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4B1 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4B2 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4B3 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4B4 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4B5 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 #Group 76 pm_L3SAB_retry, L3 slice A/B snoop retry and all CI/CO busy event:0X4C0 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4C1 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4C2 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4C3 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4C4 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4C5 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 #Group 77 pm_L3SAB_hit, L3 slice A/B hit and reference event:0X4D0 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X4D1 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X4D2 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X4D3 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X4D4 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X4D5 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 #Group 78 pm_L3SC_retry_hit, L3 slice C hit & snoop retry event:0X4E0 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X4E1 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X4E2 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X4E3 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X4E4 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X4E5 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 #Group 79 pm_fpu1, Floating Point events event:0X4F0 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X4F1 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X4F2 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X4F3 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X4F4 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X4F5 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 #Group 80 pm_fpu2, Floating Point events event:0X500 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X501 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X502 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X503 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X504 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X505 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 #Group 81 pm_fpu3, Floating point events event:0X510 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X511 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X512 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X513 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X514 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X515 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 #Group 82 pm_fpu4, Floating point events event:0X520 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X521 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X522 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X523 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X524 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X525 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 #Group 83 pm_fpu5, Floating point events by unit event:0X530 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X531 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X532 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X533 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X534 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X535 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 #Group 84 pm_fpu6, Floating point events by unit event:0X540 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X541 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X542 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X543 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X544 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X545 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 #Group 85 pm_fpu7, Floating point events by unit event:0X550 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X551 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X552 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X553 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X554 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X555 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 #Group 86 pm_fpu8, Floating point events by unit event:0X560 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X561 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X562 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X563 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X564 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X565 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 #Group 87 pm_fpu9, Floating point events by unit event:0X570 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X571 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X572 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X573 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X574 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X575 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 #Group 88 pm_fpu10, Floating point events by unit event:0X580 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X581 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X582 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X583 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X584 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X585 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 #Group 89 pm_fpu11, Floating point events by unit event:0X590 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X591 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X592 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X593 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X594 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X595 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 #Group 90 pm_fpu12, Floating point events by unit event:0X5A0 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5A1 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5A2 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5A3 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5A4 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5A5 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 #Group 91 pm_fxu1, Fixed Point events event:0X5B0 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5B1 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5B2 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5B3 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5B4 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5B5 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 #Group 92 pm_fxu2, Fixed Point events event:0X5C0 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5C1 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5C2 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5C3 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5C4 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5C5 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 #Group 93 pm_fxu3, Fixed Point events event:0X5D0 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X5D1 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X5D2 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X5D3 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X5D4 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X5D5 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 #Group 94 pm_smt_priorities1, Thread priority events event:0X5E0 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X5E1 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X5E2 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X5E3 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X5E4 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X5E5 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 #Group 95 pm_smt_priorities2, Thread priority events event:0X5F0 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X5F1 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X5F2 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X5F3 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X5F4 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X5F5 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 #Group 96 pm_smt_priorities3, Thread priority events event:0X600 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X601 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X602 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X603 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X604 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X605 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 #Group 97 pm_smt_priorities4, Thread priority events event:0X610 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X611 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X612 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X613 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X614 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X615 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 #Group 98 pm_smt_both, Thread common events event:0X620 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X621 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X622 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X623 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X624 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X625 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 #Group 99 pm_smt_selection, Thread selection event:0X630 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X631 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X632 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X633 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X634 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X635 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 #Group 100 pm_smt_selectover1, Thread selection overide event:0X640 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X641 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X642 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X643 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X644 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X645 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 #Group 101 pm_smt_selectover2, Thread selection overide event:0X650 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X651 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X652 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X653 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X654 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X655 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 #Group 102 pm_fabric1, Fabric events event:0X660 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X661 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X662 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X663 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X664 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X665 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 #Group 103 pm_fabric2, Fabric data movement event:0X670 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X671 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X672 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X673 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X674 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X675 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 #Group 104 pm_fabric3, Fabric data movement event:0X680 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X681 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X682 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X683 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X684 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X685 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 #Group 105 pm_fabric4, Fabric data movement event:0X690 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X691 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X692 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X693 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X694 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X695 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 #Group 106 pm_snoop1, Snoop retry event:0X6A0 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6A1 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6A2 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6A3 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6A4 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6A5 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 #Group 107 pm_snoop2, Snoop read retry event:0X6B0 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6B1 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6B2 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6B3 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6B4 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6B5 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 #Group 108 pm_snoop3, Snoop write retry event:0X6C0 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6C1 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6C2 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6C3 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6C4 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6C5 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 #Group 109 pm_snoop4, Snoop partial write retry event:0X6D0 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X6D1 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X6D2 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X6D3 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X6D4 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X6D5 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 #Group 110 pm_mem_rq, Memory read queue dispatch event:0X6E0 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X6E1 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X6E2 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X6E3 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X6E4 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X6E5 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 #Group 111 pm_mem_read, Memory read complete and cancel event:0X6F0 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X6F1 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X6F2 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X6F3 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X6F4 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X6F5 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 #Group 112 pm_mem_wq, Memory write queue dispatch event:0X700 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X701 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X702 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X703 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X704 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X705 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 #Group 113 pm_mem_pwq, Memory partial write queue event:0X710 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X711 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X712 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X713 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X714 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X715 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 #Group 114 pm_threshold, Thresholding event:0X720 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X721 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X722 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X723 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X724 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X725 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 #Group 115 pm_mrk_grp1, Marked group events event:0X730 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X731 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X732 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X733 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X734 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X735 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 #Group 116 pm_mrk_grp2, Marked group events event:0X740 mmcr0:0X00000000 mmcr1:0X410300022A0AC822 mmcra:0X00000001 event:0X741 mmcr0:0X00000000 mmcr1:0X410300022A0AC822 mmcra:0X00000001 event:0X742 mmcr0:0X00000000 mmcr1:0X410300022A0AC822 mmcra:0X00000001 event:0X743 mmcr0:0X00000000 mmcr1:0X410300022A0AC822 mmcra:0X00000001 event:0X744 mmcr0:0X00000000 mmcr1:0X410300022A0AC822 mmcra:0X00000001 event:0X745 mmcr0:0X00000000 mmcr1:0X410300022A0AC822 mmcra:0X00000001 #Group 117 pm_mrk_dsource1, Marked data from event:0X750 mmcr0:0X00000000 mmcr1:0X010B00030E404444 mmcra:0X00000001 event:0X751 mmcr0:0X00000000 mmcr1:0X010B00030E404444 mmcra:0X00000001 event:0X752 mmcr0:0X00000000 mmcr1:0X010B00030E404444 mmcra:0X00000001 event:0X753 mmcr0:0X00000000 mmcr1:0X010B00030E404444 mmcra:0X00000001 event:0X754 mmcr0:0X00000000 mmcr1:0X010B00030E404444 mmcra:0X00000001 event:0X755 mmcr0:0X00000000 mmcr1:0X010B00030E404444 mmcra:0X00000001 #Group 118 pm_mrk_dsource2, Marked data from event:0X760 mmcr0:0X00000000 mmcr1:0X010B00002E440210 mmcra:0X00000001 event:0X761 mmcr0:0X00000000 mmcr1:0X010B00002E440210 mmcra:0X00000001 event:0X762 mmcr0:0X00000000 mmcr1:0X010B00002E440210 mmcra:0X00000001 event:0X763 mmcr0:0X00000000 mmcr1:0X010B00002E440210 mmcra:0X00000001 event:0X764 mmcr0:0X00000000 mmcr1:0X010B00002E440210 mmcra:0X00000001 event:0X765 mmcr0:0X00000000 mmcr1:0X010B00002E440210 mmcra:0X00000001 #Group 119 pm_mrk_dsource3, Marked data from event:0X770 mmcr0:0X00000000 mmcr1:0X010B00031C484C4C mmcra:0X00000001 event:0X771 mmcr0:0X00000000 mmcr1:0X010B00031C484C4C mmcra:0X00000001 event:0X772 mmcr0:0X00000000 mmcr1:0X010B00031C484C4C mmcra:0X00000001 event:0X773 mmcr0:0X00000000 mmcr1:0X010B00031C484C4C mmcra:0X00000001 event:0X774 mmcr0:0X00000000 mmcr1:0X010B00031C484C4C mmcra:0X00000001 event:0X775 mmcr0:0X00000000 mmcr1:0X010B00031C484C4C mmcra:0X00000001 #Group 120 pm_mrk_dsource4, Marked data from event:0X780 mmcr0:0X00000000 mmcr1:0X010B000342462E42 mmcra:0X00000001 event:0X781 mmcr0:0X00000000 mmcr1:0X010B000342462E42 mmcra:0X00000001 event:0X782 mmcr0:0X00000000 mmcr1:0X010B000342462E42 mmcra:0X00000001 event:0X783 mmcr0:0X00000000 mmcr1:0X010B000342462E42 mmcra:0X00000001 event:0X784 mmcr0:0X00000000 mmcr1:0X010B000342462E42 mmcra:0X00000001 event:0X785 mmcr0:0X00000000 mmcr1:0X010B000342462E42 mmcra:0X00000001 #Group 121 pm_mrk_dsource5, Marked data from event:0X790 mmcr0:0X00000000 mmcr1:0X010B00033C4C4040 mmcra:0X00000001 event:0X791 mmcr0:0X00000000 mmcr1:0X010B00033C4C4040 mmcra:0X00000001 event:0X792 mmcr0:0X00000000 mmcr1:0X010B00033C4C4040 mmcra:0X00000001 event:0X793 mmcr0:0X00000000 mmcr1:0X010B00033C4C4040 mmcra:0X00000001 event:0X794 mmcr0:0X00000000 mmcr1:0X010B00033C4C4040 mmcra:0X00000001 event:0X795 mmcr0:0X00000000 mmcr1:0X010B00033C4C4040 mmcra:0X00000001 #Group 122 pm_mrk_dsource6, Marked data from event:0X7A0 mmcr0:0X00000000 mmcr1:0X010B000146460246 mmcra:0X00000001 event:0X7A1 mmcr0:0X00000000 mmcr1:0X010B000146460246 mmcra:0X00000001 event:0X7A2 mmcr0:0X00000000 mmcr1:0X010B000146460246 mmcra:0X00000001 event:0X7A3 mmcr0:0X00000000 mmcr1:0X010B000146460246 mmcra:0X00000001 event:0X7A4 mmcr0:0X00000000 mmcr1:0X010B000146460246 mmcra:0X00000001 event:0X7A5 mmcr0:0X00000000 mmcr1:0X010B000146460246 mmcra:0X00000001 #Group 123 pm_mrk_dsource7, Marked data from event:0X7B0 mmcr0:0X00000000 mmcr1:0X010B00034E4E3C4E mmcra:0X00000001 event:0X7B1 mmcr0:0X00000000 mmcr1:0X010B00034E4E3C4E mmcra:0X00000001 event:0X7B2 mmcr0:0X00000000 mmcr1:0X010B00034E4E3C4E mmcra:0X00000001 event:0X7B3 mmcr0:0X00000000 mmcr1:0X010B00034E4E3C4E mmcra:0X00000001 event:0X7B4 mmcr0:0X00000000 mmcr1:0X010B00034E4E3C4E mmcra:0X00000001 event:0X7B5 mmcr0:0X00000000 mmcr1:0X010B00034E4E3C4E mmcra:0X00000001 #Group 124 pm_mrk_lbmiss, Marked TLB and SLB misses event:0X7C0 mmcr0:0X00000000 mmcr1:0X0CF00000828A8C8E mmcra:0X00000001 event:0X7C1 mmcr0:0X00000000 mmcr1:0X0CF00000828A8C8E mmcra:0X00000001 event:0X7C2 mmcr0:0X00000000 mmcr1:0X0CF00000828A8C8E mmcra:0X00000001 event:0X7C3 mmcr0:0X00000000 mmcr1:0X0CF00000828A8C8E mmcra:0X00000001 event:0X7C4 mmcr0:0X00000000 mmcr1:0X0CF00000828A8C8E mmcra:0X00000001 event:0X7C5 mmcr0:0X00000000 mmcr1:0X0CF00000828A8C8E mmcra:0X00000001 #Group 125 pm_mrk_lbref, Marked TLB and SLB references event:0X7D0 mmcr0:0X00000000 mmcr1:0X0CF00000868E028E mmcra:0X00000001 event:0X7D1 mmcr0:0X00000000 mmcr1:0X0CF00000868E028E mmcra:0X00000001 event:0X7D2 mmcr0:0X00000000 mmcr1:0X0CF00000868E028E mmcra:0X00000001 event:0X7D3 mmcr0:0X00000000 mmcr1:0X0CF00000868E028E mmcra:0X00000001 event:0X7D4 mmcr0:0X00000000 mmcr1:0X0CF00000868E028E mmcra:0X00000001 event:0X7D5 mmcr0:0X00000000 mmcr1:0X0CF00000868E028E mmcra:0X00000001 #Group 126 pm_mrk_lsmiss, Marked load and store miss event:0X7E0 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X7E1 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X7E2 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X7E3 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X7E4 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X7E5 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 #Group 127 pm_mrk_ulsflush, Mark unaligned load and store flushes event:0X7F0 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X7F1 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X7F2 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X7F3 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X7F4 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X7F5 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 #Group 128 pm_mrk_misc, Misc marked instructions event:0X800 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X801 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X802 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X803 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X804 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X805 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 #Group 129 pm_lsref_L1, Load/Store operations and L1 activity event:0X810 mmcr0:0X00000000 mmcr1:0X803300040E1A2020 mmcra:0X00000000 event:0X811 mmcr0:0X00000000 mmcr1:0X803300040E1A2020 mmcra:0X00000000 event:0X812 mmcr0:0X00000000 mmcr1:0X803300040E1A2020 mmcra:0X00000000 event:0X813 mmcr0:0X00000000 mmcr1:0X803300040E1A2020 mmcra:0X00000000 event:0X814 mmcr0:0X00000000 mmcr1:0X803300040E1A2020 mmcra:0X00000000 event:0X815 mmcr0:0X00000000 mmcr1:0X803300040E1A2020 mmcra:0X00000000 #Group 130 pm_lsref_L2L3, Load/Store operations and L2,L3 activity event:0X820 mmcr0:0X00000000 mmcr1:0X003300001C0E2020 mmcra:0X00000000 event:0X821 mmcr0:0X00000000 mmcr1:0X003300001C0E2020 mmcra:0X00000000 event:0X822 mmcr0:0X00000000 mmcr1:0X003300001C0E2020 mmcra:0X00000000 event:0X823 mmcr0:0X00000000 mmcr1:0X003300001C0E2020 mmcra:0X00000000 event:0X824 mmcr0:0X00000000 mmcr1:0X003300001C0E2020 mmcra:0X00000000 event:0X825 mmcr0:0X00000000 mmcr1:0X003300001C0E2020 mmcra:0X00000000 #Group 131 pm_lsref_tlbmiss, Load/Store operations and TLB misses event:0X830 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X831 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X832 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X833 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X834 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X835 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 #Group 132 pm_Dmiss, Data cache misses event:0X840 mmcr0:0X00000000 mmcr1:0X003300001C0E1086 mmcra:0X00000000 event:0X841 mmcr0:0X00000000 mmcr1:0X003300001C0E1086 mmcra:0X00000000 event:0X842 mmcr0:0X00000000 mmcr1:0X003300001C0E1086 mmcra:0X00000000 event:0X843 mmcr0:0X00000000 mmcr1:0X003300001C0E1086 mmcra:0X00000000 event:0X844 mmcr0:0X00000000 mmcr1:0X003300001C0E1086 mmcra:0X00000000 event:0X845 mmcr0:0X00000000 mmcr1:0X003300001C0E1086 mmcra:0X00000000 #Group 133 pm_prefetchX, Prefetch events event:0X850 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X851 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X852 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X853 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X854 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X855 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 #Group 134 pm_branchX, Branch operations event:0X860 mmcr0:0X00000000 mmcr1:0X800000030E0E0EC8 mmcra:0X00000000 event:0X861 mmcr0:0X00000000 mmcr1:0X800000030E0E0EC8 mmcra:0X00000000 event:0X862 mmcr0:0X00000000 mmcr1:0X800000030E0E0EC8 mmcra:0X00000000 event:0X863 mmcr0:0X00000000 mmcr1:0X800000030E0E0EC8 mmcra:0X00000000 event:0X864 mmcr0:0X00000000 mmcr1:0X800000030E0E0EC8 mmcra:0X00000000 event:0X865 mmcr0:0X00000000 mmcr1:0X800000030E0E0EC8 mmcra:0X00000000 #Group 135 pm_fpuX1, Floating point events by unit event:0X870 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X871 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X872 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X873 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X874 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X875 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 #Group 136 pm_fpuX2, Floating point events by unit event:0X880 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X881 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X882 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X883 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X884 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X885 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 #Group 137 pm_fpuX3, Floating point events by unit event:0X890 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X891 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X892 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X893 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X894 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X895 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 #Group 138 pm_fpuX4, Floating point and L1 events event:0X8A0 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8A1 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8A2 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8A3 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8A4 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8A5 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 #Group 139 pm_fpuX5, Floating point events event:0X8B0 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X8B1 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X8B2 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X8B3 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X8B4 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X8B5 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 #Group 140 pm_fpuX6, Floating point events event:0X8C0 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X8C1 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X8C2 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X8C3 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X8C4 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X8C5 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 #Group 141 pm_hpmcount1, HPM group for set 1 event:0X8D0 mmcr0:0X00000000 mmcr1:0X00000000201E2810 mmcra:0X00000000 event:0X8D1 mmcr0:0X00000000 mmcr1:0X00000000201E2810 mmcra:0X00000000 event:0X8D2 mmcr0:0X00000000 mmcr1:0X00000000201E2810 mmcra:0X00000000 event:0X8D3 mmcr0:0X00000000 mmcr1:0X00000000201E2810 mmcra:0X00000000 event:0X8D4 mmcr0:0X00000000 mmcr1:0X00000000201E2810 mmcra:0X00000000 event:0X8D5 mmcr0:0X00000000 mmcr1:0X00000000201E2810 mmcra:0X00000000 #Group 142 pm_hpmcount2, HPM group for set 2 event:0X8E0 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X8E1 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X8E2 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X8E3 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X8E4 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X8E5 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 #Group 143 pm_hpmcount3, HPM group for set 3 event:0X8F0 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X8F1 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X8F2 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X8F3 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X8F4 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X8F5 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 #Group 144 pm_hpmcount4, HPM group for set 7 event:0X900 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X901 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X902 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X903 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X904 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X905 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 #Group 145 pm_hpmcount5, HPM group for set 9 event:0X910 mmcr0:0X00000000 mmcr1:0X400000031E2810C4 mmcra:0X00000000 event:0X911 mmcr0:0X00000000 mmcr1:0X400000031E2810C4 mmcra:0X00000000 event:0X912 mmcr0:0X00000000 mmcr1:0X400000031E2810C4 mmcra:0X00000000 event:0X913 mmcr0:0X00000000 mmcr1:0X400000031E2810C4 mmcra:0X00000000 event:0X914 mmcr0:0X00000000 mmcr1:0X400000031E2810C4 mmcra:0X00000000 event:0X915 mmcr0:0X00000000 mmcr1:0X400000031E2810C4 mmcra:0X00000000 #Group 146 pm_eprof1, Group for use with eprof event:0X920 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X921 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X922 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X923 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X924 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X925 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 #Group 147 pm_eprof2, Group for use with eprof event:0X930 mmcr0:0X00000000 mmcr1:0X0038000810122020 mmcra:0X00000000 event:0X931 mmcr0:0X00000000 mmcr1:0X0038000810122020 mmcra:0X00000000 event:0X932 mmcr0:0X00000000 mmcr1:0X0038000810122020 mmcra:0X00000000 event:0X933 mmcr0:0X00000000 mmcr1:0X0038000810122020 mmcra:0X00000000 event:0X934 mmcr0:0X00000000 mmcr1:0X0038000810122020 mmcra:0X00000000 event:0X935 mmcr0:0X00000000 mmcr1:0X0038000810122020 mmcra:0X00000000 #Group 148 pm_eprof3, Group for use with eprof event:0X940 mmcr0:0X00000000 mmcr1:0X00380008C6121286 mmcra:0X00000000 event:0X941 mmcr0:0X00000000 mmcr1:0X00380008C6121286 mmcra:0X00000000 event:0X942 mmcr0:0X00000000 mmcr1:0X00380008C6121286 mmcra:0X00000000 event:0X943 mmcr0:0X00000000 mmcr1:0X00380008C6121286 mmcra:0X00000000 event:0X944 mmcr0:0X00000000 mmcr1:0X00380008C6121286 mmcra:0X00000000 event:0X945 mmcr0:0X00000000 mmcr1:0X00380008C6121286 mmcra:0X00000000 oprofile-1.3.0/events/ppc64/power5/unit_masks0000664000175000017500000000013412534404406016036 00000000000000# ppc64 POWER5 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power5+/0000775000175000017500000000000013323173530014071 500000000000000oprofile-1.3.0/events/ppc64/power5+/events0000664000175000017500000036300712534404406015253 00000000000000#PPC64 Power5+ events # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously when # using legacy opcontrol to do profiling. When profiling with operf, # events from different groups may be specified, and the Linux Performance # Events Kernel Subsystem code will handle the necessary multiplexing. # # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:3 um:zero minimum:10000 name:CYCLES : Processor Cycles using continuous sampling #Group 1 pm_utilization, CPI and utilization data event:0X010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Run cycles event:0X011 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_utilization) Instructions completed event:0X012 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP1 : (Group 1 pm_utilization) Instructions dispatched event:0X013 counters:3 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_utilization) Processor cycles event:0X014 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP1 : (Group 1 pm_utilization) Run instructions completed event:0X015 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Run cycles #Group 2 pm_completion, Completion and cycle counts event:0X020 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP2 : (Group 2 pm_completion) One or more PPC instruction completed event:0X021 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP2 : (Group 2 pm_completion) Cycles GCT empty event:0X022 counters:2 um:zero minimum:1000 name:PM_GRP_CMPL_GRP2 : (Group 2 pm_completion) Group completed event:0X023 counters:3 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_completion) Processor cycles event:0X024 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP2 : (Group 2 pm_completion) Run instructions completed event:0X025 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP2 : (Group 2 pm_completion) Run cycles #Group 3 pm_group_dispatch, Group dispatch events event:0X030 counters:0 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP3 : (Group 3 pm_group_dispatch) Group dispatch valid event:0X031 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP3 : (Group 3 pm_group_dispatch) Group dispatch rejected event:0X032 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_BLK_SB_CYC_GRP3 : (Group 3 pm_group_dispatch) Cycles group dispatch blocked by scoreboard event:0X033 counters:3 um:zero minimum:1000 name:PM_INST_DISP_GRP3 : (Group 3 pm_group_dispatch) Instructions dispatched event:0X034 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP3 : (Group 3 pm_group_dispatch) Run instructions completed event:0X035 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP3 : (Group 3 pm_group_dispatch) Run cycles #Group 4 pm_clb1, CLB fullness event:0X040 counters:0 um:zero minimum:1000 name:PM_0INST_CLB_CYC_GRP4 : (Group 4 pm_clb1) Cycles no instructions in CLB event:0X041 counters:1 um:zero minimum:1000 name:PM_2INST_CLB_CYC_GRP4 : (Group 4 pm_clb1) Cycles 2 instructions in CLB event:0X042 counters:2 um:zero minimum:1000 name:PM_CLB_EMPTY_CYC_GRP4 : (Group 4 pm_clb1) Cycles CLB empty event:0X043 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP4 : (Group 4 pm_clb1) Marked load latency from L3.5 modified event:0X044 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP4 : (Group 4 pm_clb1) Run instructions completed event:0X045 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP4 : (Group 4 pm_clb1) Run cycles #Group 5 pm_clb2, CLB fullness event:0X050 counters:0 um:zero minimum:1000 name:PM_5INST_CLB_CYC_GRP5 : (Group 5 pm_clb2) Cycles 5 instructions in CLB event:0X051 counters:1 um:zero minimum:1000 name:PM_6INST_CLB_CYC_GRP5 : (Group 5 pm_clb2) Cycles 6 instructions in CLB event:0X052 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP5 : (Group 5 pm_clb2) Marked instruction valid in SRQ event:0X053 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP5 : (Group 5 pm_clb2) IOPS instructions completed event:0X054 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP5 : (Group 5 pm_clb2) Run instructions completed event:0X055 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP5 : (Group 5 pm_clb2) Run cycles #Group 6 pm_gct_empty, GCT empty reasons event:0X060 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP6 : (Group 6 pm_gct_empty) Cycles no GCT slot allocated event:0X061 counters:1 um:zero minimum:1000 name:PM_GCT_NOSLOT_IC_MISS_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by I cache miss event:0X062 counters:2 um:zero minimum:1000 name:PM_GCT_NOSLOT_SRQ_FULL_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by SRQ full event:0X063 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by branch mispredict event:0X064 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP6 : (Group 6 pm_gct_empty) Run instructions completed event:0X065 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP6 : (Group 6 pm_gct_empty) Run cycles #Group 7 pm_gct_usage, GCT Usage event:0X070 counters:0 um:zero minimum:1000 name:PM_GCT_USAGE_00to59_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT less than 60% full event:0X071 counters:1 um:zero minimum:1000 name:PM_GCT_USAGE_60to79_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT 60-79% full event:0X072 counters:2 um:zero minimum:1000 name:PM_GCT_USAGE_80to99_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT 80-99% full event:0X073 counters:3 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT full event:0X074 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP7 : (Group 7 pm_gct_usage) Run instructions completed event:0X075 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP7 : (Group 7 pm_gct_usage) Run cycles #Group 8 pm_lsu1, LSU LRQ and LMQ events event:0X080 counters:0 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP8 : (Group 8 pm_lsu1) LRQ slot 0 allocated event:0X081 counters:1 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP8 : (Group 8 pm_lsu1) LRQ slot 0 valid event:0X082 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP8 : (Group 8 pm_lsu1) LMQ slot 0 allocated event:0X083 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP8 : (Group 8 pm_lsu1) LMQ slot 0 valid event:0X084 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP8 : (Group 8 pm_lsu1) Run instructions completed event:0X085 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP8 : (Group 8 pm_lsu1) Run cycles #Group 9 pm_lsu2, LSU SRQ events event:0X090 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP9 : (Group 9 pm_lsu2) SRQ slot 0 allocated event:0X091 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP9 : (Group 9 pm_lsu2) SRQ slot 0 valid event:0X092 counters:2 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP9 : (Group 9 pm_lsu2) SRQ sync duration event:0X093 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP9 : (Group 9 pm_lsu2) Cycles SRQ full event:0X094 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP9 : (Group 9 pm_lsu2) Run instructions completed event:0X095 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP9 : (Group 9 pm_lsu2) Run cycles #Group 10 pm_lsu3, LSU SRQ and LMQ events event:0X0A0 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_LHR_MERGE_GRP10 : (Group 10 pm_lsu3) LMQ LHR merges event:0X0A1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_STFWD_GRP10 : (Group 10 pm_lsu3) SRQ store forwarded event:0X0A2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP10 : (Group 10 pm_lsu3) Cycles LMQ and SRQ empty event:0X0A3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP10 : (Group 10 pm_lsu3) Cycles SRQ empty event:0X0A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP10 : (Group 10 pm_lsu3) Run instructions completed event:0X0A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP10 : (Group 10 pm_lsu3) Run cycles #Group 11 pm_lsu4, LSU SRQ and LMQ events event:0X0B0 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP11 : (Group 11 pm_lsu4) Cycles LMQ full event:0X0B1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP11 : (Group 11 pm_lsu4) Cycles SRQ full event:0X0B2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP11 : (Group 11 pm_lsu4) Cycles LMQ and SRQ empty event:0X0B3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP11 : (Group 11 pm_lsu4) Cycles SRQ empty event:0X0B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP11 : (Group 11 pm_lsu4) Run instructions completed event:0X0B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP11 : (Group 11 pm_lsu4) Run cycles #Group 12 pm_prefetch1, Prefetch stream allocation event:0X0C0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP12 : (Group 12 pm_prefetch1) Instructions fetched missed L2 event:0X0C1 counters:1 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP12 : (Group 12 pm_prefetch1) Cycles at least 1 instruction fetched event:0X0C2 counters:2 um:zero minimum:1000 name:PM_DC_OUT_OF_STREAMS_GRP12 : (Group 12 pm_prefetch1) LSU Data prefetch out of streams event:0X0C3 counters:3 um:zero minimum:1000 name:PM_DC_PREF_STREAM_ALLOC_GRP12 : (Group 12 pm_prefetch1) D cache new prefetch stream allocated event:0X0C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP12 : (Group 12 pm_prefetch1) Run instructions completed event:0X0C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP12 : (Group 12 pm_prefetch1) Run cycles #Group 13 pm_prefetch2, Prefetch events event:0X0D0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP13 : (Group 13 pm_prefetch2) IOPS instructions completed event:0X0D1 counters:1 um:zero minimum:1000 name:PM_CLB_FULL_CYC_GRP13 : (Group 13 pm_prefetch2) Cycles CLB full event:0X0D2 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP13 : (Group 13 pm_prefetch2) L1 cache data prefetches event:0X0D3 counters:3 um:zero minimum:1000 name:PM_IC_PREF_INSTALL_GRP13 : (Group 13 pm_prefetch2) Instruction prefetched installed in prefetch event:0X0D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP13 : (Group 13 pm_prefetch2) Run instructions completed event:0X0D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP13 : (Group 13 pm_prefetch2) Run cycles #Group 14 pm_prefetch3, L2 prefetch and misc events event:0X0E0 counters:0 um:zero minimum:1000 name:PM_1INST_CLB_CYC_GRP14 : (Group 14 pm_prefetch3) Cycles 1 instruction in CLB event:0X0E1 counters:1 um:zero minimum:1000 name:PM_LSU_BUSY_REJECT_GRP14 : (Group 14 pm_prefetch3) LSU busy due to reject event:0X0E2 counters:2 um:zero minimum:1000 name:PM_L2_PREF_GRP14 : (Group 14 pm_prefetch3) L2 cache prefetches event:0X0E3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP14 : (Group 14 pm_prefetch3) IOPS instructions completed event:0X0E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP14 : (Group 14 pm_prefetch3) Run instructions completed event:0X0E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP14 : (Group 14 pm_prefetch3) Run cycles #Group 15 pm_prefetch4, Misc prefetch and reject events event:0X0F0 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_SRQ_LHS_GRP15 : (Group 15 pm_prefetch4) LSU0 SRQ rejects event:0X0F1 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_SRQ_LHS_GRP15 : (Group 15 pm_prefetch4) LSU1 SRQ rejects event:0X0F2 counters:2 um:zero minimum:1000 name:PM_DC_PREF_DST_GRP15 : (Group 15 pm_prefetch4) DST (Data Stream Touch) stream start event:0X0F3 counters:3 um:zero minimum:1000 name:PM_L2_PREF_GRP15 : (Group 15 pm_prefetch4) L2 cache prefetches event:0X0F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP15 : (Group 15 pm_prefetch4) Run instructions completed event:0X0F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP15 : (Group 15 pm_prefetch4) Run cycles #Group 16 pm_lsu_reject1, LSU reject events event:0X100 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_ERAT_MISS_GRP16 : (Group 16 pm_lsu_reject1) LSU reject due to ERAT miss event:0X101 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_LMQ_FULL_GRP16 : (Group 16 pm_lsu_reject1) LSU reject due to LMQ full or missed data coming event:0X102 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP16 : (Group 16 pm_lsu_reject1) Flush caused by thread GCT imbalance event:0X103 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP16 : (Group 16 pm_lsu_reject1) Marked SRQ flushes event:0X104 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP16 : (Group 16 pm_lsu_reject1) Run instructions completed event:0X105 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP16 : (Group 16 pm_lsu_reject1) Run cycles #Group 17 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision event:0X110 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_RELOAD_CDF_GRP17 : (Group 17 pm_lsu_reject2) LSU0 reject due to reload CDF or tag update collision event:0X111 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_RELOAD_CDF_GRP17 : (Group 17 pm_lsu_reject2) LSU1 reject due to reload CDF or tag update collision event:0X112 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP17 : (Group 17 pm_lsu_reject2) IOPS instructions completed event:0X113 counters:3 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP17 : (Group 17 pm_lsu_reject2) Cycles writing to instruction L1 event:0X114 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP17 : (Group 17 pm_lsu_reject2) Run instructions completed event:0X115 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP17 : (Group 17 pm_lsu_reject2) Run cycles #Group 18 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions event:0X120 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_ERAT_MISS_GRP18 : (Group 18 pm_lsu_reject3) LSU0 reject due to ERAT miss event:0X121 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_ERAT_MISS_GRP18 : (Group 18 pm_lsu_reject3) LSU1 reject due to ERAT miss event:0X122 counters:2 um:zero minimum:1000 name:PM_LWSYNC_HELD_GRP18 : (Group 18 pm_lsu_reject3) LWSYNC held at dispatch event:0X123 counters:3 um:zero minimum:1000 name:PM_TLBIE_HELD_GRP18 : (Group 18 pm_lsu_reject3) TLBIE held at dispatch event:0X124 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP18 : (Group 18 pm_lsu_reject3) Run instructions completed event:0X125 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP18 : (Group 18 pm_lsu_reject3) Run cycles #Group 19 pm_lsu_reject4, LSU0/1 reject LMQ full event:0X130 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_LMQ_FULL_GRP19 : (Group 19 pm_lsu_reject4) LSU0 reject due to LMQ full or missed data coming event:0X131 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_LMQ_FULL_GRP19 : (Group 19 pm_lsu_reject4) LSU1 reject due to LMQ full or missed data coming event:0X132 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP19 : (Group 19 pm_lsu_reject4) IOPS instructions completed event:0X133 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP19 : (Group 19 pm_lsu_reject4) Branches issued event:0X134 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP19 : (Group 19 pm_lsu_reject4) Run instructions completed event:0X135 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP19 : (Group 19 pm_lsu_reject4) Run cycles #Group 20 pm_lsu_reject5, LSU misc reject and flush events event:0X140 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_SRQ_LHS_GRP20 : (Group 20 pm_lsu_reject5) LSU SRQ rejects event:0X141 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_RELOAD_CDF_GRP20 : (Group 20 pm_lsu_reject5) LSU reject due to reload CDF or tag update collision event:0X142 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP20 : (Group 20 pm_lsu_reject5) Flush initiated by LSU event:0X143 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP20 : (Group 20 pm_lsu_reject5) Flushes event:0X144 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP20 : (Group 20 pm_lsu_reject5) Run instructions completed event:0X145 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP20 : (Group 20 pm_lsu_reject5) Run cycles #Group 21 pm_flush1, Misc flush events event:0X150 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP21 : (Group 21 pm_flush1) IOPS instructions completed event:0X151 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP21 : (Group 21 pm_flush1) SRQ unaligned store flushes event:0X152 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP21 : (Group 21 pm_flush1) Flush caused by thread GCT imbalance event:0X153 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP21 : (Group 21 pm_flush1) L1 D cache entries invalidated from L2 event:0X154 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP21 : (Group 21 pm_flush1) Run instructions completed event:0X155 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP21 : (Group 21 pm_flush1) Run cycles #Group 22 pm_flush2, Flushes due to scoreboard and sync event:0X160 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP22 : (Group 22 pm_flush2) Instruction TLB misses event:0X161 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP22 : (Group 22 pm_flush2) IOPS instructions completed event:0X162 counters:2 um:zero minimum:1000 name:PM_FLUSH_SB_GRP22 : (Group 22 pm_flush2) Flush caused by scoreboard operation event:0X163 counters:3 um:zero minimum:1000 name:PM_FLUSH_SYNC_GRP22 : (Group 22 pm_flush2) Flush caused by sync event:0X164 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP22 : (Group 22 pm_flush2) Run instructions completed event:0X165 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP22 : (Group 22 pm_flush2) Run cycles #Group 23 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events event:0X170 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) SRQ flushes event:0X171 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) LRQ flushes event:0X172 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) IOPS instructions completed event:0X173 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) Flush initiated by LSU event:0X174 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) Run instructions completed event:0X175 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) Run cycles #Group 24 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ event:0X180 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP24 : (Group 24 pm_lsu_flush_lrq) LSU0 LRQ flushes event:0X181 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP24 : (Group 24 pm_lsu_flush_lrq) LSU1 LRQ flushes event:0X182 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP24 : (Group 24 pm_lsu_flush_lrq) Flush initiated by LSU event:0X183 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP24 : (Group 24 pm_lsu_flush_lrq) IOPS instructions completed event:0X184 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP24 : (Group 24 pm_lsu_flush_lrq) Run instructions completed event:0X185 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP24 : (Group 24 pm_lsu_flush_lrq) Run cycles #Group 25 pm_lsu_flush_srq, LSU0/1 flush due to SRQ event:0X190 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP25 : (Group 25 pm_lsu_flush_srq) LSU0 SRQ flushes event:0X191 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP25 : (Group 25 pm_lsu_flush_srq) LSU1 SRQ flushes event:0X192 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP25 : (Group 25 pm_lsu_flush_srq) IOPS instructions completed event:0X193 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP25 : (Group 25 pm_lsu_flush_srq) Flush initiated by LSU event:0X194 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP25 : (Group 25 pm_lsu_flush_srq) Run instructions completed event:0X195 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP25 : (Group 25 pm_lsu_flush_srq) Run cycles #Group 26 pm_lsu_flush_unaligned, LSU flush due to unaligned data event:0X1A0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_unaligned) LRQ unaligned load flushes event:0X1A1 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP26 : (Group 26 pm_lsu_flush_unaligned) SRQ unaligned store flushes event:0X1A2 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP26 : (Group 26 pm_lsu_flush_unaligned) Branches issued event:0X1A3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP26 : (Group 26 pm_lsu_flush_unaligned) IOPS instructions completed event:0X1A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP26 : (Group 26 pm_lsu_flush_unaligned) Run instructions completed event:0X1A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP26 : (Group 26 pm_lsu_flush_unaligned) Run cycles #Group 27 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load event:0X1B0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP27 : (Group 27 pm_lsu_flush_uld) LSU0 unaligned load flushes event:0X1B1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP27 : (Group 27 pm_lsu_flush_uld) LSU1 unaligned load flushes event:0X1B2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP27 : (Group 27 pm_lsu_flush_uld) Flush initiated by LSU event:0X1B3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP27 : (Group 27 pm_lsu_flush_uld) IOPS instructions completed event:0X1B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP27 : (Group 27 pm_lsu_flush_uld) Run instructions completed event:0X1B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP27 : (Group 27 pm_lsu_flush_uld) Run cycles #Group 28 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store event:0X1C0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP28 : (Group 28 pm_lsu_flush_ust) LSU0 unaligned store flushes event:0X1C1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP28 : (Group 28 pm_lsu_flush_ust) LSU1 unaligned store flushes event:0X1C2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP28 : (Group 28 pm_lsu_flush_ust) IOPS instructions completed event:0X1C3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP28 : (Group 28 pm_lsu_flush_ust) Flush initiated by LSU event:0X1C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP28 : (Group 28 pm_lsu_flush_ust) Run instructions completed event:0X1C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP28 : (Group 28 pm_lsu_flush_ust) Run cycles #Group 29 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full event:0X1D0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_FULL_GRP29 : (Group 29 pm_lsu_flush_full) Flush caused by LRQ full event:0X1D1 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP29 : (Group 29 pm_lsu_flush_full) IOPS instructions completed event:0X1D2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP29 : (Group 29 pm_lsu_flush_full) Marked LRQ flushes event:0X1D3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_FULL_GRP29 : (Group 29 pm_lsu_flush_full) Flush caused by SRQ full event:0X1D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP29 : (Group 29 pm_lsu_flush_full) Run instructions completed event:0X1D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP29 : (Group 29 pm_lsu_flush_full) Run cycles #Group 30 pm_lsu_stall1, LSU Stalls event:0X1E0 counters:0 um:zero minimum:1000 name:PM_GRP_MRK_GRP30 : (Group 30 pm_lsu_stall1) Group marked in IDU event:0X1E1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP30 : (Group 30 pm_lsu_stall1) Completion stall caused by LSU instruction event:0X1E2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP30 : (Group 30 pm_lsu_stall1) IOPS instructions completed event:0X1E3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP30 : (Group 30 pm_lsu_stall1) Completion stall caused by reject event:0X1E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP30 : (Group 30 pm_lsu_stall1) Run instructions completed event:0X1E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP30 : (Group 30 pm_lsu_stall1) Run cycles #Group 31 pm_lsu_stall2, LSU Stalls event:0X1F0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP31 : (Group 31 pm_lsu_stall2) IOPS instructions completed event:0X1F1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP31 : (Group 31 pm_lsu_stall2) Completion stall caused by D cache miss event:0X1F2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP31 : (Group 31 pm_lsu_stall2) Processor cycles event:0X1F3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP31 : (Group 31 pm_lsu_stall2) Completion stall caused by ERAT miss event:0X1F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP31 : (Group 31 pm_lsu_stall2) Run instructions completed event:0X1F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP31 : (Group 31 pm_lsu_stall2) Run cycles #Group 32 pm_fxu_stall, FXU Stalls event:0X200 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_BR_REDIR_NONSPEC_GRP32 : (Group 32 pm_fxu_stall) Group experienced non-speculative I cache miss or branch redirect event:0X201 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP32 : (Group 32 pm_fxu_stall) Completion stall caused by FXU instruction event:0X202 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP32 : (Group 32 pm_fxu_stall) IOPS instructions completed event:0X203 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP32 : (Group 32 pm_fxu_stall) Completion stall caused by DIV instruction event:0X204 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP32 : (Group 32 pm_fxu_stall) Run instructions completed event:0X205 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP32 : (Group 32 pm_fxu_stall) Run cycles #Group 33 pm_fpu_stall, FPU Stalls event:0X210 counters:0 um:zero minimum:1000 name:PM_FPU_FULL_CYC_GRP33 : (Group 33 pm_fpu_stall) Cycles FPU issue queue full event:0X211 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FDIV_GRP33 : (Group 33 pm_fpu_stall) Completion stall caused by FDIV or FQRT instruction event:0X212 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP33 : (Group 33 pm_fpu_stall) IOPS instructions completed event:0X213 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_FPU_GRP33 : (Group 33 pm_fpu_stall) Completion stall caused by FPU instruction event:0X214 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP33 : (Group 33 pm_fpu_stall) Run instructions completed event:0X215 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP33 : (Group 33 pm_fpu_stall) Run cycles #Group 34 pm_queue_full, BRQ LRQ LMQ queue full event:0X220 counters:0 um:zero minimum:1000 name:PM_LARX_LSU0_GRP34 : (Group 34 pm_queue_full) Larx executed on LSU0 event:0X221 counters:1 um:zero minimum:1000 name:PM_BRQ_FULL_CYC_GRP34 : (Group 34 pm_queue_full) Cycles branch queue full event:0X222 counters:2 um:zero minimum:1000 name:PM_LSU_LRQ_FULL_CYC_GRP34 : (Group 34 pm_queue_full) Cycles LRQ full event:0X223 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP34 : (Group 34 pm_queue_full) Cycles LMQ full event:0X224 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP34 : (Group 34 pm_queue_full) Run instructions completed event:0X225 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP34 : (Group 34 pm_queue_full) Run cycles #Group 35 pm_issueq_full, FPU FX full event:0X230 counters:0 um:zero minimum:1000 name:PM_FPU0_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FPU0 issue queue full event:0X231 counters:1 um:zero minimum:1000 name:PM_FPU1_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FPU1 issue queue full event:0X232 counters:2 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FXU0/LS0 queue full event:0X233 counters:3 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FXU1/LS1 queue full event:0X234 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP35 : (Group 35 pm_issueq_full) Run instructions completed event:0X235 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP35 : (Group 35 pm_issueq_full) Run cycles #Group 36 pm_mapper_full1, CR CTR GPR mapper full event:0X240 counters:0 um:zero minimum:1000 name:PM_CR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles CR logical operation mapper full event:0X241 counters:1 um:zero minimum:1000 name:PM_LR_CTR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles LR/CTR mapper full event:0X242 counters:2 um:zero minimum:1000 name:PM_GPR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles GPR mapper full event:0X243 counters:3 um:zero minimum:1000 name:PM_CRQ_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles CR issue queue full event:0X244 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP36 : (Group 36 pm_mapper_full1) Run instructions completed event:0X245 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP36 : (Group 36 pm_mapper_full1) Run cycles #Group 37 pm_mapper_full2, FPR XER mapper full event:0X250 counters:0 um:zero minimum:1000 name:PM_FPR_MAP_FULL_CYC_GRP37 : (Group 37 pm_mapper_full2) Cycles FPR mapper full event:0X251 counters:1 um:zero minimum:1000 name:PM_XER_MAP_FULL_CYC_GRP37 : (Group 37 pm_mapper_full2) Cycles XER mapper full event:0X252 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP37 : (Group 37 pm_mapper_full2) Marked data loaded missed L2 event:0X253 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP37 : (Group 37 pm_mapper_full2) IOPS instructions completed event:0X254 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP37 : (Group 37 pm_mapper_full2) Run instructions completed event:0X255 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP37 : (Group 37 pm_mapper_full2) Run cycles #Group 38 pm_misc_load, Non-cachable loads and stcx events event:0X260 counters:0 um:zero minimum:1000 name:PM_STCX_FAIL_GRP38 : (Group 38 pm_misc_load) STCX failed event:0X261 counters:1 um:zero minimum:1000 name:PM_STCX_PASS_GRP38 : (Group 38 pm_misc_load) Stcx passes event:0X262 counters:2 um:zero minimum:1000 name:PM_LSU0_NCLD_GRP38 : (Group 38 pm_misc_load) LSU0 non-cacheable loads event:0X263 counters:3 um:zero minimum:1000 name:PM_LSU1_NCLD_GRP38 : (Group 38 pm_misc_load) LSU1 non-cacheable loads event:0X264 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP38 : (Group 38 pm_misc_load) Run instructions completed event:0X265 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP38 : (Group 38 pm_misc_load) Run cycles #Group 39 pm_ic_demand, ICache demand from BR redirect event:0X270 counters:0 um:zero minimum:1000 name:PM_LSU0_BUSY_REJECT_GRP39 : (Group 39 pm_ic_demand) LSU0 busy due to reject event:0X271 counters:1 um:zero minimum:1000 name:PM_LSU1_BUSY_REJECT_GRP39 : (Group 39 pm_ic_demand) LSU1 busy due to reject event:0X272 counters:2 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BHT_REDIRECT_GRP39 : (Group 39 pm_ic_demand) L2 I cache demand request due to BHT redirect event:0X273 counters:3 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BR_REDIRECT_GRP39 : (Group 39 pm_ic_demand) L2 I cache demand request due to branch redirect event:0X274 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP39 : (Group 39 pm_ic_demand) Run instructions completed event:0X275 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP39 : (Group 39 pm_ic_demand) Run cycles #Group 40 pm_ic_pref, ICache prefetch event:0X280 counters:0 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP40 : (Group 40 pm_ic_pref) Translation written to ierat event:0X281 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP40 : (Group 40 pm_ic_pref) Instruction prefetch requests event:0X282 counters:2 um:zero minimum:1000 name:PM_IC_PREF_INSTALL_GRP40 : (Group 40 pm_ic_pref) Instruction prefetched installed in prefetch event:0X283 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP40 : (Group 40 pm_ic_pref) No instructions fetched event:0X284 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP40 : (Group 40 pm_ic_pref) Run instructions completed event:0X285 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP40 : (Group 40 pm_ic_pref) Run cycles #Group 41 pm_ic_miss, ICache misses event:0X290 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_NONSPEC_GRP41 : (Group 41 pm_ic_miss) Group experienced non-speculative I cache miss event:0X291 counters:1 um:zero minimum:1000 name:PM_GRP_IC_MISS_GRP41 : (Group 41 pm_ic_miss) Group experienced I cache miss event:0X292 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP41 : (Group 41 pm_ic_miss) L1 reload data source valid event:0X293 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP41 : (Group 41 pm_ic_miss) IOPS instructions completed event:0X294 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP41 : (Group 41 pm_ic_miss) Run instructions completed event:0X295 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP41 : (Group 41 pm_ic_miss) Run cycles #Group 42 pm_branch_miss, Branch mispredict, TLB and SLB misses event:0X2A0 counters:0 um:zero minimum:1000 name:PM_TLB_MISS_GRP42 : (Group 42 pm_branch_miss) TLB misses event:0X2A1 counters:1 um:zero minimum:1000 name:PM_SLB_MISS_GRP42 : (Group 42 pm_branch_miss) SLB misses event:0X2A2 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP42 : (Group 42 pm_branch_miss) Branch mispredictions due to CR bit setting event:0X2A3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP42 : (Group 42 pm_branch_miss) Branch mispredictions due to target address event:0X2A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP42 : (Group 42 pm_branch_miss) Run instructions completed event:0X2A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP42 : (Group 42 pm_branch_miss) Run cycles #Group 43 pm_branch1, Branch operations event:0X2B0 counters:0 um:zero minimum:1000 name:PM_BR_UNCOND_GRP43 : (Group 43 pm_branch1) Unconditional branch event:0X2B1 counters:1 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP43 : (Group 43 pm_branch1) A conditional branch was predicted, target prediction event:0X2B2 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP43 : (Group 43 pm_branch1) A conditional branch was predicted, CR prediction event:0X2B3 counters:3 um:zero minimum:1000 name:PM_BR_PRED_CR_TA_GRP43 : (Group 43 pm_branch1) A conditional branch was predicted, CR and target prediction event:0X2B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP43 : (Group 43 pm_branch1) Run instructions completed event:0X2B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP43 : (Group 43 pm_branch1) Run cycles #Group 44 pm_branch2, Branch operations event:0X2C0 counters:0 um:zero minimum:1000 name:PM_GRP_BR_REDIR_NONSPEC_GRP44 : (Group 44 pm_branch2) Group experienced non-speculative branch redirect event:0X2C1 counters:1 um:zero minimum:1000 name:PM_GRP_BR_REDIR_GRP44 : (Group 44 pm_branch2) Group experienced branch redirect event:0X2C2 counters:2 um:zero minimum:1000 name:PM_FLUSH_BR_MPRED_GRP44 : (Group 44 pm_branch2) Flush caused by branch mispredict event:0X2C3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP44 : (Group 44 pm_branch2) IOPS instructions completed event:0X2C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP44 : (Group 44 pm_branch2) Run instructions completed event:0X2C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP44 : (Group 44 pm_branch2) Run cycles #Group 45 pm_L1_tlbmiss, L1 load and TLB misses event:0X2D0 counters:0 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP45 : (Group 45 pm_L1_tlbmiss) Cycles doing data tablewalks event:0X2D1 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP45 : (Group 45 pm_L1_tlbmiss) Data TLB misses event:0X2D2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP45 : (Group 45 pm_L1_tlbmiss) L1 D cache load misses event:0X2D3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP45 : (Group 45 pm_L1_tlbmiss) L1 D cache load references event:0X2D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP45 : (Group 45 pm_L1_tlbmiss) Run instructions completed event:0X2D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP45 : (Group 45 pm_L1_tlbmiss) Run cycles #Group 46 pm_L1_DERAT_miss, L1 store and DERAT misses event:0X2E0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP46 : (Group 46 pm_L1_DERAT_miss) Data loaded from L2 event:0X2E1 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP46 : (Group 46 pm_L1_DERAT_miss) DERAT misses event:0X2E2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP46 : (Group 46 pm_L1_DERAT_miss) L1 D cache store references event:0X2E3 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP46 : (Group 46 pm_L1_DERAT_miss) L1 D cache store misses event:0X2E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP46 : (Group 46 pm_L1_DERAT_miss) Run instructions completed event:0X2E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP46 : (Group 46 pm_L1_DERAT_miss) Run cycles #Group 47 pm_L1_slbmiss, L1 load and SLB misses event:0X2F0 counters:0 um:zero minimum:1000 name:PM_DSLB_MISS_GRP47 : (Group 47 pm_L1_slbmiss) Data SLB misses event:0X2F1 counters:1 um:zero minimum:1000 name:PM_ISLB_MISS_GRP47 : (Group 47 pm_L1_slbmiss) Instruction SLB misses event:0X2F2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP47 : (Group 47 pm_L1_slbmiss) LSU0 L1 D cache load misses event:0X2F3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP47 : (Group 47 pm_L1_slbmiss) LSU1 L1 D cache load misses event:0X2F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP47 : (Group 47 pm_L1_slbmiss) Run instructions completed event:0X2F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP47 : (Group 47 pm_L1_slbmiss) Run cycles #Group 48 pm_dtlbref, Data TLB references event:0X300 counters:0 um:zero minimum:1000 name:PM_DTLB_REF_4K_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 4K page event:0X301 counters:1 um:zero minimum:1000 name:PM_DTLB_REF_64K_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 64K page event:0X302 counters:2 um:zero minimum:1000 name:PM_DTLB_REF_16M_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 16M page event:0X303 counters:3 um:zero minimum:1000 name:PM_DTLB_REF_16G_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 16G page event:0X304 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP48 : (Group 48 pm_dtlbref) Run instructions completed event:0X305 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP48 : (Group 48 pm_dtlbref) Run cycles #Group 49 pm_dtlbmiss, Data TLB misses event:0X310 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_4K_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 4K page event:0X311 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_64K_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 64K page event:0X312 counters:2 um:zero minimum:1000 name:PM_DTLB_MISS_16M_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 16M page event:0X313 counters:3 um:zero minimum:1000 name:PM_DTLB_MISS_16G_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 16G page event:0X314 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP49 : (Group 49 pm_dtlbmiss) Run instructions completed event:0X315 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP49 : (Group 49 pm_dtlbmiss) Run cycles #Group 50 pm_dtlb, Data TLB references and misses event:0X320 counters:0 um:zero minimum:1000 name:PM_DTLB_REF_GRP50 : (Group 50 pm_dtlb) Data TLB references event:0X321 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP50 : (Group 50 pm_dtlb) Data TLB misses event:0X322 counters:2 um:zero minimum:10000 name:PM_CYC_GRP50 : (Group 50 pm_dtlb) Processor cycles event:0X323 counters:3 um:zero minimum:10000 name:PM_CYC_GRP50 : (Group 50 pm_dtlb) Processor cycles event:0X324 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP50 : (Group 50 pm_dtlb) Run instructions completed event:0X325 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP50 : (Group 50 pm_dtlb) Run cycles #Group 51 pm_L1_refmiss, L1 load references and misses and store references and misses event:0X330 counters:0 um:zero minimum:1000 name:PM_LD_REF_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache load references event:0X331 counters:1 um:zero minimum:1000 name:PM_ST_REF_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache store references event:0X332 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache load misses event:0X333 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache store misses event:0X334 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP51 : (Group 51 pm_L1_refmiss) Run instructions completed event:0X335 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP51 : (Group 51 pm_L1_refmiss) Run cycles #Group 52 pm_dsource1, L3 cache and memory data access event:0X340 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP52 : (Group 52 pm_dsource1) Data loaded from L3 event:0X341 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP52 : (Group 52 pm_dsource1) Data loaded from local memory event:0X342 counters:2 um:zero minimum:1000 name:PM_FLUSH_GRP52 : (Group 52 pm_dsource1) Flushes event:0X343 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP52 : (Group 52 pm_dsource1) IOPS instructions completed event:0X344 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP52 : (Group 52 pm_dsource1) Run instructions completed event:0X345 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP52 : (Group 52 pm_dsource1) Run cycles #Group 53 pm_dsource2, L3 cache and memory data access event:0X350 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP53 : (Group 53 pm_dsource2) Data loaded from L3 event:0X351 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP53 : (Group 53 pm_dsource2) Data loaded from local memory event:0X352 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP53 : (Group 53 pm_dsource2) Data loaded missed L2 event:0X353 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP53 : (Group 53 pm_dsource2) Data loaded from remote memory event:0X354 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP53 : (Group 53 pm_dsource2) Run instructions completed event:0X355 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP53 : (Group 53 pm_dsource2) Run cycles #Group 54 pm_dsource_L2, L2 cache data access event:0X360 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.5 shared event:0X361 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.5 modified event:0X362 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L275_SHR_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.75 shared event:0X363 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.75 modified event:0X364 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP54 : (Group 54 pm_dsource_L2) Run instructions completed event:0X365 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP54 : (Group 54 pm_dsource_L2) Run cycles #Group 55 pm_dsource_L3, L3 cache data access event:0X370 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.5 shared event:0X371 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.5 modified event:0X372 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L375_SHR_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.75 shared event:0X373 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L375_MOD_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.75 modified event:0X374 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP55 : (Group 55 pm_dsource_L3) Run instructions completed event:0X375 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP55 : (Group 55 pm_dsource_L3) Run cycles #Group 56 pm_isource1, Instruction source information event:0X380 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP56 : (Group 56 pm_isource1) Instruction fetched from L3 event:0X381 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP56 : (Group 56 pm_isource1) Instruction fetched from L1 event:0X382 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP56 : (Group 56 pm_isource1) Instructions fetched from prefetch event:0X383 counters:3 um:zero minimum:1000 name:PM_INST_FROM_RMEM_GRP56 : (Group 56 pm_isource1) Instruction fetched from remote memory event:0X384 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP56 : (Group 56 pm_isource1) Run instructions completed event:0X385 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP56 : (Group 56 pm_isource1) Run cycles #Group 57 pm_isource2, Instruction source information event:0X390 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP57 : (Group 57 pm_isource2) Instructions fetched from L2 event:0X391 counters:1 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP57 : (Group 57 pm_isource2) Instruction fetched from local memory event:0X392 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP57 : (Group 57 pm_isource2) IOPS instructions completed event:0X393 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP57 : (Group 57 pm_isource2) No instructions fetched event:0X394 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP57 : (Group 57 pm_isource2) Run instructions completed event:0X395 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP57 : (Group 57 pm_isource2) Run cycles #Group 58 pm_isource_L2, L2 instruction source information event:0X3A0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L25_SHR_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.5 shared event:0X3A1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L25_MOD_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.5 modified event:0X3A2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L275_SHR_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.75 shared event:0X3A3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L275_MOD_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.75 modified event:0X3A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP58 : (Group 58 pm_isource_L2) Run instructions completed event:0X3A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP58 : (Group 58 pm_isource_L2) Run cycles #Group 59 pm_isource_L3, L3 instruction source information event:0X3B0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP59 : (Group 59 pm_isource_L3) Instructions fetched missed L2 event:0X3B1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L35_MOD_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.5 modified event:0X3B2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L375_SHR_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.75 shared event:0X3B3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L375_MOD_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.75 modified event:0X3B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP59 : (Group 59 pm_isource_L3) Run instructions completed event:0X3B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP59 : (Group 59 pm_isource_L3) Run cycles #Group 60 pm_pteg_source1, PTEG source information event:0X3C0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L25_SHR_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.5 shared event:0X3C1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L25_MOD_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.5 modified event:0X3C2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L275_SHR_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.75 shared event:0X3C3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L275_MOD_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.75 modified event:0X3C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP60 : (Group 60 pm_pteg_source1) Run instructions completed event:0X3C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP60 : (Group 60 pm_pteg_source1) Run cycles #Group 61 pm_pteg_source2, PTEG source information event:0X3D0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L35_SHR_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.5 shared event:0X3D1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L35_MOD_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.5 modified event:0X3D2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L375_SHR_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.75 shared event:0X3D3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L375_MOD_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.75 modified event:0X3D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP61 : (Group 61 pm_pteg_source2) Run instructions completed event:0X3D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP61 : (Group 61 pm_pteg_source2) Run cycles #Group 62 pm_pteg_source3, PTEG source information event:0X3E0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from L2 event:0X3E1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from local memory event:0X3E2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L2MISS_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from L2 miss event:0X3E3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from remote memory event:0X3E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP62 : (Group 62 pm_pteg_source3) Run instructions completed event:0X3E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP62 : (Group 62 pm_pteg_source3) Run cycles #Group 63 pm_pteg_source4, L3 PTEG and group disptach events event:0X3F0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L3_GRP63 : (Group 63 pm_pteg_source4) PTEG loaded from L3 event:0X3F1 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_GRP63 : (Group 63 pm_pteg_source4) Group dispatches event:0X3F2 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_SUCCESS_GRP63 : (Group 63 pm_pteg_source4) Group dispatch success event:0X3F3 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP63 : (Group 63 pm_pteg_source4) L1 D cache entries invalidated from L2 event:0X3F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP63 : (Group 63 pm_pteg_source4) Run instructions completed event:0X3F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP63 : (Group 63 pm_pteg_source4) Run cycles #Group 64 pm_L2SA_ld, L2 slice A load events event:0X400 counters:0 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_GRP64 : (Group 64 pm_L2SA_ld) L2 Slice A RC load dispatch attempt event:0X401 counters:1 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_RC_FULL_GRP64 : (Group 64 pm_L2SA_ld) L2 Slice A RC load dispatch attempt failed due to all RC full event:0X402 counters:2 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_ADDR_GRP64 : (Group 64 pm_L2SA_ld) L2 Slice A RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X403 counters:3 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_OTHER_GRP64 : (Group 64 pm_L2SA_ld) L2 Slice A RC load dispatch attempt failed due to other reasons event:0X404 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP64 : (Group 64 pm_L2SA_ld) Run instructions completed event:0X405 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP64 : (Group 64 pm_L2SA_ld) Run cycles #Group 65 pm_L2SA_st, L2 slice A store events event:0X410 counters:0 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_GRP65 : (Group 65 pm_L2SA_st) L2 Slice A RC store dispatch attempt event:0X411 counters:1 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_RC_FULL_GRP65 : (Group 65 pm_L2SA_st) L2 Slice A RC store dispatch attempt failed due to all RC full event:0X412 counters:2 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_ADDR_GRP65 : (Group 65 pm_L2SA_st) L2 Slice A RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X413 counters:3 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_OTHER_GRP65 : (Group 65 pm_L2SA_st) L2 Slice A RC store dispatch attempt failed due to other reasons event:0X414 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP65 : (Group 65 pm_L2SA_st) Run instructions completed event:0X415 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP65 : (Group 65 pm_L2SA_st) Run cycles #Group 66 pm_L2SA_st2, L2 slice A store events event:0X420 counters:0 um:zero minimum:1000 name:PM_L2SA_RC_DISP_FAIL_CO_BUSY_GRP66 : (Group 66 pm_L2SA_st2) L2 Slice A RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X421 counters:1 um:zero minimum:1000 name:PM_L2SA_ST_REQ_GRP66 : (Group 66 pm_L2SA_st2) L2 slice A store requests event:0X422 counters:2 um:zero minimum:1000 name:PM_L2SA_RC_DISP_FAIL_CO_BUSY_ALL_GRP66 : (Group 66 pm_L2SA_st2) L2 Slice A RC dispatch attempt failed due to all CO busy event:0X423 counters:3 um:zero minimum:1000 name:PM_L2SA_ST_HIT_GRP66 : (Group 66 pm_L2SA_st2) L2 slice A store hits event:0X424 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP66 : (Group 66 pm_L2SA_st2) Run instructions completed event:0X425 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP66 : (Group 66 pm_L2SA_st2) Run cycles #Group 67 pm_L2SB_ld, L2 slice B load events event:0X430 counters:0 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice B RC load dispatch attempt event:0X431 counters:1 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_RC_FULL_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice B RC load dispatch attempt failed due to all RC full event:0X432 counters:2 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_ADDR_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice B RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X433 counters:3 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_OTHER_GRP67 : (Group 67 pm_L2SB_ld) L2 Slice B RC load dispatch attempt failed due to other reasons event:0X434 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP67 : (Group 67 pm_L2SB_ld) Run instructions completed event:0X435 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP67 : (Group 67 pm_L2SB_ld) Run cycles #Group 68 pm_L2SB_st, L2 slice B store events event:0X440 counters:0 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_GRP68 : (Group 68 pm_L2SB_st) L2 Slice B RC store dispatch attempt event:0X441 counters:1 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_RC_FULL_GRP68 : (Group 68 pm_L2SB_st) L2 Slice B RC store dispatch attempt failed due to all RC full event:0X442 counters:2 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_ADDR_GRP68 : (Group 68 pm_L2SB_st) L2 Slice B RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X443 counters:3 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_OTHER_GRP68 : (Group 68 pm_L2SB_st) L2 Slice B RC store dispatch attempt failed due to other reasons event:0X444 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP68 : (Group 68 pm_L2SB_st) Run instructions completed event:0X445 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP68 : (Group 68 pm_L2SB_st) Run cycles #Group 69 pm_L2SB_st2, L2 slice B store events event:0X450 counters:0 um:zero minimum:1000 name:PM_L2SB_RC_DISP_FAIL_CO_BUSY_GRP69 : (Group 69 pm_L2SB_st2) L2 Slice B RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X451 counters:1 um:zero minimum:1000 name:PM_L2SB_ST_REQ_GRP69 : (Group 69 pm_L2SB_st2) L2 slice B store requests event:0X452 counters:2 um:zero minimum:1000 name:PM_L2SB_RC_DISP_FAIL_CO_BUSY_ALL_GRP69 : (Group 69 pm_L2SB_st2) L2 Slice B RC dispatch attempt failed due to all CO busy event:0X453 counters:3 um:zero minimum:1000 name:PM_L2SB_ST_HIT_GRP69 : (Group 69 pm_L2SB_st2) L2 slice B store hits event:0X454 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP69 : (Group 69 pm_L2SB_st2) Run instructions completed event:0X455 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP69 : (Group 69 pm_L2SB_st2) Run cycles #Group 70 pm_L2SB_ld, L2 slice C load events event:0X460 counters:0 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_GRP70 : (Group 70 pm_L2SB_ld) L2 Slice C RC load dispatch attempt event:0X461 counters:1 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_RC_FULL_GRP70 : (Group 70 pm_L2SB_ld) L2 Slice C RC load dispatch attempt failed due to all RC full event:0X462 counters:2 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_ADDR_GRP70 : (Group 70 pm_L2SB_ld) L2 Slice C RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X463 counters:3 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_OTHER_GRP70 : (Group 70 pm_L2SB_ld) L2 Slice C RC load dispatch attempt failed due to other reasons event:0X464 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP70 : (Group 70 pm_L2SB_ld) Run instructions completed event:0X465 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP70 : (Group 70 pm_L2SB_ld) Run cycles #Group 71 pm_L2SB_st, L2 slice C store events event:0X470 counters:0 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_GRP71 : (Group 71 pm_L2SB_st) L2 Slice C RC store dispatch attempt event:0X471 counters:1 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_RC_FULL_GRP71 : (Group 71 pm_L2SB_st) L2 Slice C RC store dispatch attempt failed due to all RC full event:0X472 counters:2 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_ADDR_GRP71 : (Group 71 pm_L2SB_st) L2 Slice C RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X473 counters:3 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_OTHER_GRP71 : (Group 71 pm_L2SB_st) L2 Slice C RC store dispatch attempt failed due to other reasons event:0X474 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP71 : (Group 71 pm_L2SB_st) Run instructions completed event:0X475 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP71 : (Group 71 pm_L2SB_st) Run cycles #Group 72 pm_L2SB_st2, L2 slice C store events event:0X480 counters:0 um:zero minimum:1000 name:PM_L2SC_RC_DISP_FAIL_CO_BUSY_GRP72 : (Group 72 pm_L2SB_st2) L2 Slice C RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X481 counters:1 um:zero minimum:1000 name:PM_L2SC_ST_REQ_GRP72 : (Group 72 pm_L2SB_st2) L2 slice C store requests event:0X482 counters:2 um:zero minimum:1000 name:PM_L2SC_RC_DISP_FAIL_CO_BUSY_ALL_GRP72 : (Group 72 pm_L2SB_st2) L2 Slice C RC dispatch attempt failed due to all CO busy event:0X483 counters:3 um:zero minimum:1000 name:PM_L2SC_ST_HIT_GRP72 : (Group 72 pm_L2SB_st2) L2 slice C store hits event:0X484 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP72 : (Group 72 pm_L2SB_st2) Run instructions completed event:0X485 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP72 : (Group 72 pm_L2SB_st2) Run cycles #Group 73 pm_L3SA_trans, L3 slice A state transistions event:0X490 counters:0 um:zero minimum:1000 name:PM_L3SA_MOD_TAG_GRP73 : (Group 73 pm_L3SA_trans) L3 slice A transition from modified to TAG event:0X491 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP73 : (Group 73 pm_L3SA_trans) IOPS instructions completed event:0X492 counters:2 um:zero minimum:1000 name:PM_L3SA_MOD_INV_GRP73 : (Group 73 pm_L3SA_trans) L3 slice A transition from modified to invalid event:0X493 counters:3 um:zero minimum:1000 name:PM_L3SA_SHR_INV_GRP73 : (Group 73 pm_L3SA_trans) L3 slice A transition from shared to invalid event:0X494 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP73 : (Group 73 pm_L3SA_trans) Run instructions completed event:0X495 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP73 : (Group 73 pm_L3SA_trans) Run cycles #Group 74 pm_L3SB_trans, L3 slice B state transistions event:0X4A0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP74 : (Group 74 pm_L3SB_trans) IOPS instructions completed event:0X4A1 counters:1 um:zero minimum:1000 name:PM_L3SB_MOD_TAG_GRP74 : (Group 74 pm_L3SB_trans) L3 slice B transition from modified to TAG event:0X4A2 counters:2 um:zero minimum:1000 name:PM_L3SB_MOD_INV_GRP74 : (Group 74 pm_L3SB_trans) L3 slice B transition from modified to invalid event:0X4A3 counters:3 um:zero minimum:1000 name:PM_L3SB_SHR_INV_GRP74 : (Group 74 pm_L3SB_trans) L3 slice B transition from shared to invalid event:0X4A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP74 : (Group 74 pm_L3SB_trans) Run instructions completed event:0X4A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP74 : (Group 74 pm_L3SB_trans) Run cycles #Group 75 pm_L3SC_trans, L3 slice C state transistions event:0X4B0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP75 : (Group 75 pm_L3SC_trans) IOPS instructions completed event:0X4B1 counters:1 um:zero minimum:1000 name:PM_L3SC_MOD_TAG_GRP75 : (Group 75 pm_L3SC_trans) L3 slice C transition from modified to TAG event:0X4B2 counters:2 um:zero minimum:1000 name:PM_L3SC_MOD_INV_GRP75 : (Group 75 pm_L3SC_trans) L3 slice C transition from modified to invalid event:0X4B3 counters:3 um:zero minimum:1000 name:PM_L3SC_SHR_INV_GRP75 : (Group 75 pm_L3SC_trans) L3 slice C transition from shared to invalid event:0X4B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP75 : (Group 75 pm_L3SC_trans) Run instructions completed event:0X4B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP75 : (Group 75 pm_L3SC_trans) Run cycles #Group 76 pm_L2SA_trans, L2 slice A state transistions event:0X4C0 counters:0 um:zero minimum:1000 name:PM_L2SA_MOD_TAG_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from modified to tagged event:0X4C1 counters:1 um:zero minimum:1000 name:PM_L2SA_SHR_MOD_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from shared to modified event:0X4C2 counters:2 um:zero minimum:1000 name:PM_L2SA_MOD_INV_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from modified to invalid event:0X4C3 counters:3 um:zero minimum:1000 name:PM_L2SA_SHR_INV_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from shared to invalid event:0X4C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP76 : (Group 76 pm_L2SA_trans) Run instructions completed event:0X4C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP76 : (Group 76 pm_L2SA_trans) Run cycles #Group 77 pm_L2SB_trans, L2 slice B state transistions event:0X4D0 counters:0 um:zero minimum:1000 name:PM_L2SB_MOD_TAG_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from modified to tagged event:0X4D1 counters:1 um:zero minimum:1000 name:PM_L2SB_SHR_MOD_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from shared to modified event:0X4D2 counters:2 um:zero minimum:1000 name:PM_L2SB_MOD_INV_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from modified to invalid event:0X4D3 counters:3 um:zero minimum:1000 name:PM_L2SB_SHR_INV_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from shared to invalid event:0X4D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP77 : (Group 77 pm_L2SB_trans) Run instructions completed event:0X4D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP77 : (Group 77 pm_L2SB_trans) Run cycles #Group 78 pm_L2SC_trans, L2 slice C state transistions event:0X4E0 counters:0 um:zero minimum:1000 name:PM_L2SC_MOD_TAG_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from modified to tagged event:0X4E1 counters:1 um:zero minimum:1000 name:PM_L2SC_SHR_MOD_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from shared to modified event:0X4E2 counters:2 um:zero minimum:1000 name:PM_L2SC_MOD_INV_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from modified to invalid event:0X4E3 counters:3 um:zero minimum:1000 name:PM_L2SC_SHR_INV_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from shared to invalid event:0X4E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP78 : (Group 78 pm_L2SC_trans) Run instructions completed event:0X4E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP78 : (Group 78 pm_L2SC_trans) Run cycles #Group 79 pm_L3SAB_retry, L3 slice A/B snoop retry and all CI/CO busy event:0X4F0 counters:0 um:zero minimum:1000 name:PM_L3SA_ALL_BUSY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice A active for every cycle all CI/CO machines busy event:0X4F1 counters:1 um:zero minimum:1000 name:PM_L3SB_ALL_BUSY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice B active for every cycle all CI/CO machines busy event:0X4F2 counters:2 um:zero minimum:1000 name:PM_L3SA_SNOOP_RETRY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice A snoop retries event:0X4F3 counters:3 um:zero minimum:1000 name:PM_L3SB_SNOOP_RETRY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice B snoop retries event:0X4F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP79 : (Group 79 pm_L3SAB_retry) Run instructions completed event:0X4F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP79 : (Group 79 pm_L3SAB_retry) Run cycles #Group 80 pm_L3SAB_hit, L3 slice A/B hit and reference event:0X500 counters:0 um:zero minimum:1000 name:PM_L3SA_REF_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice A references event:0X501 counters:1 um:zero minimum:1000 name:PM_L3SB_REF_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice B references event:0X502 counters:2 um:zero minimum:1000 name:PM_L3SA_HIT_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice A hits event:0X503 counters:3 um:zero minimum:1000 name:PM_L3SB_HIT_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice B hits event:0X504 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP80 : (Group 80 pm_L3SAB_hit) Run instructions completed event:0X505 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP80 : (Group 80 pm_L3SAB_hit) Run cycles #Group 81 pm_L3SC_retry_hit, L3 slice C hit & snoop retry event:0X510 counters:0 um:zero minimum:1000 name:PM_L3SC_ALL_BUSY_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C active for every cycle all CI/CO machines busy event:0X511 counters:1 um:zero minimum:1000 name:PM_L3SC_REF_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C references event:0X512 counters:2 um:zero minimum:1000 name:PM_L3SC_SNOOP_RETRY_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C snoop retries event:0X513 counters:3 um:zero minimum:1000 name:PM_L3SC_HIT_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 Slice C hits event:0X514 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP81 : (Group 81 pm_L3SC_retry_hit) Run instructions completed event:0X515 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP81 : (Group 81 pm_L3SC_retry_hit) Run cycles #Group 82 pm_fpu1, Floating Point events event:0X520 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP82 : (Group 82 pm_fpu1) FPU executed FDIV instruction event:0X521 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP82 : (Group 82 pm_fpu1) FPU executed multiply-add instruction event:0X522 counters:2 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP82 : (Group 82 pm_fpu1) FPU executing FMOV or FEST instructions event:0X523 counters:3 um:zero minimum:1000 name:PM_FPU_FEST_GRP82 : (Group 82 pm_fpu1) FPU executed FEST instruction event:0X524 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP82 : (Group 82 pm_fpu1) Run instructions completed event:0X525 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP82 : (Group 82 pm_fpu1) Run cycles #Group 83 pm_fpu2, Floating Point events event:0X530 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP83 : (Group 83 pm_fpu2) FPU executed one flop instruction event:0X531 counters:1 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP83 : (Group 83 pm_fpu2) FPU executed FSQRT instruction event:0X532 counters:2 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP83 : (Group 83 pm_fpu2) FPU executed FRSP or FCONV instructions event:0X533 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP83 : (Group 83 pm_fpu2) FPU produced a result event:0X534 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP83 : (Group 83 pm_fpu2) Run instructions completed event:0X535 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP83 : (Group 83 pm_fpu2) Run cycles #Group 84 pm_fpu3, Floating point events event:0X540 counters:0 um:zero minimum:1000 name:PM_FPU_DENORM_GRP84 : (Group 84 pm_fpu3) FPU received denormalized data event:0X541 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP84 : (Group 84 pm_fpu3) FPU stalled in pipe3 event:0X542 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP84 : (Group 84 pm_fpu3) FPU0 produced a result event:0X543 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP84 : (Group 84 pm_fpu3) FPU1 produced a result event:0X544 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP84 : (Group 84 pm_fpu3) Run instructions completed event:0X545 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP84 : (Group 84 pm_fpu3) Run cycles #Group 85 pm_fpu4, Floating point events event:0X550 counters:0 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP85 : (Group 85 pm_fpu4) FPU executed single precision instruction event:0X551 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP85 : (Group 85 pm_fpu4) FPU executed store instruction event:0X552 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP85 : (Group 85 pm_fpu4) IOPS instructions completed event:0X553 counters:3 um:zero minimum:1000 name:PM_LSU_LDF_GRP85 : (Group 85 pm_fpu4) LSU executed Floating Point load instruction event:0X554 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP85 : (Group 85 pm_fpu4) Run instructions completed event:0X555 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP85 : (Group 85 pm_fpu4) Run cycles #Group 86 pm_fpu5, Floating point events by unit event:0X560 counters:0 um:zero minimum:1000 name:PM_FPU0_FSQRT_GRP86 : (Group 86 pm_fpu5) FPU0 executed FSQRT instruction event:0X561 counters:1 um:zero minimum:1000 name:PM_FPU1_FSQRT_GRP86 : (Group 86 pm_fpu5) FPU1 executed FSQRT instruction event:0X562 counters:2 um:zero minimum:1000 name:PM_FPU0_FEST_GRP86 : (Group 86 pm_fpu5) FPU0 executed FEST instruction event:0X563 counters:3 um:zero minimum:1000 name:PM_FPU1_FEST_GRP86 : (Group 86 pm_fpu5) FPU1 executed FEST instruction event:0X564 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP86 : (Group 86 pm_fpu5) Run instructions completed event:0X565 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP86 : (Group 86 pm_fpu5) Run cycles #Group 87 pm_fpu6, Floating point events by unit event:0X570 counters:0 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP87 : (Group 87 pm_fpu6) FPU0 received denormalized data event:0X571 counters:1 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP87 : (Group 87 pm_fpu6) FPU1 received denormalized data event:0X572 counters:2 um:zero minimum:1000 name:PM_FPU0_FMOV_FEST_GRP87 : (Group 87 pm_fpu6) FPU0 executed FMOV or FEST instructions event:0X573 counters:3 um:zero minimum:1000 name:PM_FPU1_FMOV_FEST_GRP87 : (Group 87 pm_fpu6) FPU1 executing FMOV or FEST instructions event:0X574 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP87 : (Group 87 pm_fpu6) Run instructions completed event:0X575 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP87 : (Group 87 pm_fpu6) Run cycles #Group 88 pm_fpu7, Floating point events by unit event:0X580 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP88 : (Group 88 pm_fpu7) FPU0 executed FDIV instruction event:0X581 counters:1 um:zero minimum:1000 name:PM_FPU1_FDIV_GRP88 : (Group 88 pm_fpu7) FPU1 executed FDIV instruction event:0X582 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP88 : (Group 88 pm_fpu7) FPU0 executed FRSP or FCONV instructions event:0X583 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP88 : (Group 88 pm_fpu7) FPU1 executed FRSP or FCONV instructions event:0X584 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP88 : (Group 88 pm_fpu7) Run instructions completed event:0X585 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP88 : (Group 88 pm_fpu7) Run cycles #Group 89 pm_fpu8, Floating point events by unit event:0X590 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP89 : (Group 89 pm_fpu8) FPU0 stalled in pipe3 event:0X591 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP89 : (Group 89 pm_fpu8) FPU1 stalled in pipe3 event:0X592 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP89 : (Group 89 pm_fpu8) IOPS instructions completed event:0X593 counters:3 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP89 : (Group 89 pm_fpu8) FPU0 executed FPSCR instruction event:0X594 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP89 : (Group 89 pm_fpu8) Run instructions completed event:0X595 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP89 : (Group 89 pm_fpu8) Run cycles #Group 90 pm_fpu9, Floating point events by unit event:0X5A0 counters:0 um:zero minimum:1000 name:PM_FPU0_SINGLE_GRP90 : (Group 90 pm_fpu9) FPU0 executed single precision instruction event:0X5A1 counters:1 um:zero minimum:1000 name:PM_FPU1_SINGLE_GRP90 : (Group 90 pm_fpu9) FPU1 executed single precision instruction event:0X5A2 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP90 : (Group 90 pm_fpu9) LSU0 executed Floating Point load instruction event:0X5A3 counters:3 um:zero minimum:1000 name:PM_LSU1_LDF_GRP90 : (Group 90 pm_fpu9) LSU1 executed Floating Point load instruction event:0X5A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP90 : (Group 90 pm_fpu9) Run instructions completed event:0X5A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP90 : (Group 90 pm_fpu9) Run cycles #Group 91 pm_fpu10, Floating point events by unit event:0X5B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FMA_GRP91 : (Group 91 pm_fpu10) FPU0 executed multiply-add instruction event:0X5B1 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP91 : (Group 91 pm_fpu10) FPU1 executed multiply-add instruction event:0X5B2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP91 : (Group 91 pm_fpu10) IOPS instructions completed event:0X5B3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP91 : (Group 91 pm_fpu10) FPU1 executed FRSP or FCONV instructions event:0X5B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP91 : (Group 91 pm_fpu10) Run instructions completed event:0X5B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP91 : (Group 91 pm_fpu10) Run cycles #Group 92 pm_fpu11, Floating point events by unit event:0X5C0 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP92 : (Group 92 pm_fpu11) FPU0 executed add, mult, sub, cmp or sel instruction event:0X5C1 counters:1 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP92 : (Group 92 pm_fpu11) FPU1 executed add, mult, sub, cmp or sel instruction event:0X5C2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP92 : (Group 92 pm_fpu11) FPU0 produced a result event:0X5C3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP92 : (Group 92 pm_fpu11) IOPS instructions completed event:0X5C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP92 : (Group 92 pm_fpu11) Run instructions completed event:0X5C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP92 : (Group 92 pm_fpu11) Run cycles #Group 93 pm_fpu12, Floating point events by unit event:0X5D0 counters:0 um:zero minimum:1000 name:PM_FPU0_STF_GRP93 : (Group 93 pm_fpu12) FPU0 executed store instruction event:0X5D1 counters:1 um:zero minimum:1000 name:PM_FPU1_STF_GRP93 : (Group 93 pm_fpu12) FPU1 executed store instruction event:0X5D2 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP93 : (Group 93 pm_fpu12) LSU0 executed Floating Point load instruction event:0X5D3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP93 : (Group 93 pm_fpu12) IOPS instructions completed event:0X5D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP93 : (Group 93 pm_fpu12) Run instructions completed event:0X5D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP93 : (Group 93 pm_fpu12) Run cycles #Group 94 pm_fxu1, Fixed Point events event:0X5E0 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP94 : (Group 94 pm_fxu1) FXU idle event:0X5E1 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP94 : (Group 94 pm_fxu1) FXU busy event:0X5E2 counters:2 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP94 : (Group 94 pm_fxu1) FXU0 busy FXU1 idle event:0X5E3 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP94 : (Group 94 pm_fxu1) FXU1 busy FXU0 idle event:0X5E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP94 : (Group 94 pm_fxu1) Run instructions completed event:0X5E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP94 : (Group 94 pm_fxu1) Run cycles #Group 95 pm_fxu2, Fixed Point events event:0X5F0 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP95 : (Group 95 pm_fxu2) Marked group dispatched event:0X5F1 counters:1 um:zero minimum:1000 name:PM_MRK_GRP_BR_REDIR_GRP95 : (Group 95 pm_fxu2) Group experienced marked branch redirect event:0X5F2 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP95 : (Group 95 pm_fxu2) FXU produced a result event:0X5F3 counters:3 um:zero minimum:1000 name:PM_FXLS_FULL_CYC_GRP95 : (Group 95 pm_fxu2) Cycles FXLS queue is full event:0X5F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP95 : (Group 95 pm_fxu2) Run instructions completed event:0X5F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP95 : (Group 95 pm_fxu2) Run cycles #Group 96 pm_fxu3, Fixed Point events event:0X600 counters:0 um:zero minimum:1000 name:PM_3INST_CLB_CYC_GRP96 : (Group 96 pm_fxu3) Cycles 3 instructions in CLB event:0X601 counters:1 um:zero minimum:1000 name:PM_4INST_CLB_CYC_GRP96 : (Group 96 pm_fxu3) Cycles 4 instructions in CLB event:0X602 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP96 : (Group 96 pm_fxu3) FXU0 produced a result event:0X603 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP96 : (Group 96 pm_fxu3) FXU1 produced a result event:0X604 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP96 : (Group 96 pm_fxu3) Run instructions completed event:0X605 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP96 : (Group 96 pm_fxu3) Run cycles #Group 97 pm_smt_priorities1, Thread priority events event:0X610 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_4_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles thread running at priority level 4 event:0X611 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_7_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles thread running at priority level 7 event:0X612 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_0_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles no thread priority difference event:0X613 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_1or2_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles thread priority difference is 1 or 2 event:0X614 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP97 : (Group 97 pm_smt_priorities1) Run instructions completed event:0X615 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP97 : (Group 97 pm_smt_priorities1) Run cycles #Group 98 pm_smt_priorities2, Thread priority events event:0X620 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_3_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread running at priority level 3 event:0X621 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_6_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread running at priority level 6 event:0X622 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_3or4_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread priority difference is 3 or 4 event:0X623 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_5or6_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread priority difference is 5 or 6 event:0X624 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP98 : (Group 98 pm_smt_priorities2) Run instructions completed event:0X625 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP98 : (Group 98 pm_smt_priorities2) Run cycles #Group 99 pm_smt_priorities3, Thread priority events event:0X630 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_2_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread running at priority level 2 event:0X631 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_5_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread running at priority level 5 event:0X632 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus1or2_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread priority difference is -1 or -2 event:0X633 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus3or4_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread priority difference is -3 or -4 event:0X634 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP99 : (Group 99 pm_smt_priorities3) Run instructions completed event:0X635 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP99 : (Group 99 pm_smt_priorities3) Run cycles #Group 100 pm_smt_priorities4, Thread priority events event:0X640 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_1_CYC_GRP100 : (Group 100 pm_smt_priorities4) Cycles thread running at priority level 1 event:0X641 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP100 : (Group 100 pm_smt_priorities4) Hypervisor Cycles event:0X642 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus5or6_CYC_GRP100 : (Group 100 pm_smt_priorities4) Cycles thread priority difference is -5 or -6 event:0X643 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP100 : (Group 100 pm_smt_priorities4) IOPS instructions completed event:0X644 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP100 : (Group 100 pm_smt_priorities4) Run instructions completed event:0X645 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP100 : (Group 100 pm_smt_priorities4) Run cycles #Group 101 pm_smt_both, Thread common events event:0X650 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_CYC_GRP101 : (Group 101 pm_smt_both) One of the threads in run cycles event:0X651 counters:1 um:zero minimum:1000 name:PM_THRD_GRP_CMPL_BOTH_CYC_GRP101 : (Group 101 pm_smt_both) Cycles group completed by both threads event:0X652 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP101 : (Group 101 pm_smt_both) IOPS instructions completed event:0X653 counters:3 um:zero minimum:1000 name:PM_THRD_L2MISS_BOTH_CYC_GRP101 : (Group 101 pm_smt_both) Cycles both threads in L2 misses event:0X654 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP101 : (Group 101 pm_smt_both) Run instructions completed event:0X655 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP101 : (Group 101 pm_smt_both) Run cycles #Group 102 pm_smt_selection, Thread selection event:0X660 counters:0 um:zero minimum:1000 name:PM_SNOOP_TLBIE_GRP102 : (Group 102 pm_smt_selection) Snoop TLBIE event:0X661 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP102 : (Group 102 pm_smt_selection) IOPS instructions completed event:0X662 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_T0_GRP102 : (Group 102 pm_smt_selection) Decode selected thread 0 event:0X663 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_T1_GRP102 : (Group 102 pm_smt_selection) Decode selected thread 1 event:0X664 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP102 : (Group 102 pm_smt_selection) Run instructions completed event:0X665 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP102 : (Group 102 pm_smt_selection) Run cycles #Group 103 pm_smt_selectover1, Thread selection overide event:0X670 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP103 : (Group 103 pm_smt_selectover1) IOPS instructions completed event:0X671 counters:1 um:zero minimum:1000 name:PM_0INST_CLB_CYC_GRP103 : (Group 103 pm_smt_selectover1) Cycles no instructions in CLB event:0X672 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_OVER_CLB_EMPTY_GRP103 : (Group 103 pm_smt_selectover1) Thread selection overides caused by CLB empty event:0X673 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_OVER_GCT_IMBAL_GRP103 : (Group 103 pm_smt_selectover1) Thread selection overides caused by GCT imbalance event:0X674 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP103 : (Group 103 pm_smt_selectover1) Run instructions completed event:0X675 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP103 : (Group 103 pm_smt_selectover1) Run cycles #Group 104 pm_smt_selectover2, Thread selection overide event:0X680 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP104 : (Group 104 pm_smt_selectover2) IOPS instructions completed event:0X681 counters:1 um:zero minimum:10000 name:PM_CYC_GRP104 : (Group 104 pm_smt_selectover2) Processor cycles event:0X682 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_OVER_ISU_HOLD_GRP104 : (Group 104 pm_smt_selectover2) Thread selection overides caused by ISU holds event:0X683 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_OVER_L2MISS_GRP104 : (Group 104 pm_smt_selectover2) Thread selection overides caused by L2 misses event:0X684 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP104 : (Group 104 pm_smt_selectover2) Run instructions completed event:0X685 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP104 : (Group 104 pm_smt_selectover2) Run cycles #Group 105 pm_fabric1, Fabric events event:0X690 counters:0 um:zero minimum:1000 name:PM_FAB_CMD_ISSUED_GRP105 : (Group 105 pm_fabric1) Fabric command issued event:0X691 counters:1 um:zero minimum:1000 name:PM_FAB_DCLAIM_ISSUED_GRP105 : (Group 105 pm_fabric1) dclaim issued event:0X692 counters:2 um:zero minimum:1000 name:PM_FAB_CMD_RETRIED_GRP105 : (Group 105 pm_fabric1) Fabric command retried event:0X693 counters:3 um:zero minimum:1000 name:PM_FAB_DCLAIM_RETRIED_GRP105 : (Group 105 pm_fabric1) dclaim retried event:0X694 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP105 : (Group 105 pm_fabric1) Run instructions completed event:0X695 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP105 : (Group 105 pm_fabric1) Run cycles #Group 106 pm_fabric2, Fabric data movement event:0X6A0 counters:0 um:zero minimum:1000 name:PM_FAB_P1toM1_SIDECAR_EMPTY_GRP106 : (Group 106 pm_fabric2) P1 to M1 sidecar empty event:0X6A1 counters:1 um:zero minimum:1000 name:PM_FAB_HOLDtoVN_EMPTY_GRP106 : (Group 106 pm_fabric2) Hold buffer to VN empty event:0X6A2 counters:2 um:zero minimum:1000 name:PM_FAB_P1toVNorNN_SIDECAR_EMPTY_GRP106 : (Group 106 pm_fabric2) P1 to VN/NN sidecar empty event:0X6A3 counters:3 um:zero minimum:1000 name:PM_FAB_VBYPASS_EMPTY_GRP106 : (Group 106 pm_fabric2) Vertical bypass buffer empty event:0X6A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP106 : (Group 106 pm_fabric2) Run instructions completed event:0X6A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP106 : (Group 106 pm_fabric2) Run cycles #Group 107 pm_fabric3, Fabric data movement event:0X6B0 counters:0 um:zero minimum:1000 name:PM_FAB_PNtoNN_DIRECT_GRP107 : (Group 107 pm_fabric3) PN to NN beat went straight to its destination event:0X6B1 counters:1 um:zero minimum:1000 name:PM_FAB_PNtoVN_DIRECT_GRP107 : (Group 107 pm_fabric3) PN to VN beat went straight to its destination event:0X6B2 counters:2 um:zero minimum:1000 name:PM_FAB_PNtoNN_SIDECAR_GRP107 : (Group 107 pm_fabric3) PN to NN beat went to sidecar first event:0X6B3 counters:3 um:zero minimum:1000 name:PM_FAB_PNtoVN_SIDECAR_GRP107 : (Group 107 pm_fabric3) PN to VN beat went to sidecar first event:0X6B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP107 : (Group 107 pm_fabric3) Run instructions completed event:0X6B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP107 : (Group 107 pm_fabric3) Run cycles #Group 108 pm_fabric4, Fabric data movement event:0X6C0 counters:0 um:zero minimum:1000 name:PM_FAB_M1toP1_SIDECAR_EMPTY_GRP108 : (Group 108 pm_fabric4) M1 to P1 sidecar empty event:0X6C1 counters:1 um:zero minimum:1000 name:PM_FAB_HOLDtoNN_EMPTY_GRP108 : (Group 108 pm_fabric4) Hold buffer to NN empty event:0X6C2 counters:2 um:zero minimum:1000 name:PM_EE_OFF_GRP108 : (Group 108 pm_fabric4) Cycles MSR(EE) bit off event:0X6C3 counters:3 um:zero minimum:1000 name:PM_FAB_M1toVNorNN_SIDECAR_EMPTY_GRP108 : (Group 108 pm_fabric4) M1 to VN/NN sidecar empty event:0X6C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP108 : (Group 108 pm_fabric4) Run instructions completed event:0X6C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP108 : (Group 108 pm_fabric4) Run cycles #Group 109 pm_snoop1, Snoop retry event:0X6D0 counters:0 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop read retry due to read queue full event:0X6D1 counters:1 um:zero minimum:1000 name:PM_SNOOP_DCLAIM_RETRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop dclaim/flush retry due to write/dclaim queues full event:0X6D2 counters:2 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop read retry due to read queue full event:0X6D3 counters:3 um:zero minimum:1000 name:PM_SNOOP_PARTIAL_RTRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop partial write retry due to partial-write queues full event:0X6D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP109 : (Group 109 pm_snoop1) Run instructions completed event:0X6D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP109 : (Group 109 pm_snoop1) Run cycles #Group 110 pm_snoop2, Snoop read retry event:0X6E0 counters:0 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_RQ_GRP110 : (Group 110 pm_snoop2) Snoop read retry due to collision with active read queue event:0X6E1 counters:1 um:zero minimum:1000 name:PM_SNOOP_RETRY_1AHEAD_GRP110 : (Group 110 pm_snoop2) Snoop retry due to one ahead collision event:0X6E2 counters:2 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_WQ_GRP110 : (Group 110 pm_snoop2) Snoop read retry due to collision with active write queue event:0X6E3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP110 : (Group 110 pm_snoop2) IOPS instructions completed event:0X6E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP110 : (Group 110 pm_snoop2) Run instructions completed event:0X6E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP110 : (Group 110 pm_snoop2) Run cycles #Group 111 pm_snoop3, Snoop write retry event:0X6F0 counters:0 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_RQ_GRP111 : (Group 111 pm_snoop3) Snoop write/dclaim retry due to collision with active read queue event:0X6F1 counters:1 um:zero minimum:1000 name:PM_MEM_HI_PRIO_WR_CMPL_GRP111 : (Group 111 pm_snoop3) High priority write completed event:0X6F2 counters:2 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_WQ_GRP111 : (Group 111 pm_snoop3) Snoop write/dclaim retry due to collision with active write queue event:0X6F3 counters:3 um:zero minimum:1000 name:PM_MEM_LO_PRIO_WR_CMPL_GRP111 : (Group 111 pm_snoop3) Low priority write completed event:0X6F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP111 : (Group 111 pm_snoop3) Run instructions completed event:0X6F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP111 : (Group 111 pm_snoop3) Run cycles #Group 112 pm_snoop4, Snoop partial write retry event:0X700 counters:0 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_RQ_GRP112 : (Group 112 pm_snoop4) Snoop partial-write retry due to collision with active read queue event:0X701 counters:1 um:zero minimum:1000 name:PM_MEM_HI_PRIO_PW_CMPL_GRP112 : (Group 112 pm_snoop4) High priority partial-write completed event:0X702 counters:2 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_WQ_PWQ_GRP112 : (Group 112 pm_snoop4) Snoop partial-write retry due to collision with active write or partial-write queue event:0X703 counters:3 um:zero minimum:1000 name:PM_MEM_LO_PRIO_PW_CMPL_GRP112 : (Group 112 pm_snoop4) Low priority partial-write completed event:0X704 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP112 : (Group 112 pm_snoop4) Run instructions completed event:0X705 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP112 : (Group 112 pm_snoop4) Run cycles #Group 113 pm_mem_rq, Memory read queue dispatch event:0X710 counters:0 um:zero minimum:1000 name:PM_MEM_RQ_DISP_GRP113 : (Group 113 pm_mem_rq) Memory read queue dispatched event:0X711 counters:1 um:zero minimum:1000 name:PM_MEM_RQ_DISP_BUSY8to15_GRP113 : (Group 113 pm_mem_rq) Memory read queue dispatched with 8-15 queues busy event:0X712 counters:2 um:zero minimum:1000 name:PM_MEM_RQ_DISP_BUSY1to7_GRP113 : (Group 113 pm_mem_rq) Memory read queue dispatched with 1-7 queues busy event:0X713 counters:3 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP113 : (Group 113 pm_mem_rq) Cycles MSR(EE) bit off and external interrupt pending event:0X714 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP113 : (Group 113 pm_mem_rq) Run instructions completed event:0X715 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP113 : (Group 113 pm_mem_rq) Run cycles #Group 114 pm_mem_read, Memory read complete and cancel event:0X720 counters:0 um:zero minimum:1000 name:PM_MEM_READ_CMPL_GRP114 : (Group 114 pm_mem_read) Memory read completed or canceled event:0X721 counters:1 um:zero minimum:1000 name:PM_MEM_FAST_PATH_RD_CMPL_GRP114 : (Group 114 pm_mem_read) Fast path memory read completed event:0X722 counters:2 um:zero minimum:1000 name:PM_MEM_SPEC_RD_CANCEL_GRP114 : (Group 114 pm_mem_read) Speculative memory read canceled event:0X723 counters:3 um:zero minimum:1000 name:PM_EXT_INT_GRP114 : (Group 114 pm_mem_read) External interrupts event:0X724 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP114 : (Group 114 pm_mem_read) Run instructions completed event:0X725 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP114 : (Group 114 pm_mem_read) Run cycles #Group 115 pm_mem_wq, Memory write queue dispatch event:0X730 counters:0 um:zero minimum:1000 name:PM_MEM_WQ_DISP_WRITE_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched due to write event:0X731 counters:1 um:zero minimum:1000 name:PM_MEM_WQ_DISP_BUSY1to7_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched with 1-7 queues busy event:0X732 counters:2 um:zero minimum:1000 name:PM_MEM_WQ_DISP_DCLAIM_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched due to dclaim/flush event:0X733 counters:3 um:zero minimum:1000 name:PM_MEM_WQ_DISP_BUSY8to15_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched with 8-15 queues busy event:0X734 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP115 : (Group 115 pm_mem_wq) Run instructions completed event:0X735 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP115 : (Group 115 pm_mem_wq) Run cycles #Group 116 pm_mem_pwq, Memory partial write queue event:0X740 counters:0 um:zero minimum:1000 name:PM_MEM_PWQ_DISP_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write queue dispatched event:0X741 counters:1 um:zero minimum:1000 name:PM_MEM_PWQ_DISP_BUSY2or3_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write queue dispatched with 2-3 queues busy event:0X742 counters:2 um:zero minimum:1000 name:PM_MEM_PW_GATH_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write gathered event:0X743 counters:3 um:zero minimum:1000 name:PM_MEM_PW_CMPL_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write completed event:0X744 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP116 : (Group 116 pm_mem_pwq) Run instructions completed event:0X745 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP116 : (Group 116 pm_mem_pwq) Run cycles #Group 117 pm_threshold, Thresholding event:0X750 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP117 : (Group 117 pm_threshold) Marked group dispatched event:0X751 counters:1 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP117 : (Group 117 pm_threshold) Marked IMR reloaded event:0X752 counters:2 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP117 : (Group 117 pm_threshold) Threshold timeout event:0X753 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP117 : (Group 117 pm_threshold) Marked instruction LSU processing finished event:0X754 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP117 : (Group 117 pm_threshold) Run instructions completed event:0X755 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP117 : (Group 117 pm_threshold) Run cycles #Group 118 pm_mrk_grp1, Marked group events event:0X760 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP118 : (Group 118 pm_mrk_grp1) Marked group dispatched event:0X761 counters:1 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP118 : (Group 118 pm_mrk_grp1) Marked L1 D cache store misses event:0X762 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP118 : (Group 118 pm_mrk_grp1) Marked instruction finished event:0X763 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP118 : (Group 118 pm_mrk_grp1) Marked group completed event:0X764 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP118 : (Group 118 pm_mrk_grp1) Run instructions completed event:0X765 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP118 : (Group 118 pm_mrk_grp1) Run cycles #Group 119 pm_mrk_grp2, Marked group events event:0X770 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP119 : (Group 119 pm_mrk_grp2) Marked group issued event:0X771 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP119 : (Group 119 pm_mrk_grp2) Marked instruction BRU processing finished event:0X772 counters:2 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP119 : (Group 119 pm_mrk_grp2) Marked L1 reload data source valid event:0X773 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_IC_MISS_GRP119 : (Group 119 pm_mrk_grp2) Group experienced marked I cache miss event:0X774 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP119 : (Group 119 pm_mrk_grp2) Run instructions completed event:0X775 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP119 : (Group 119 pm_mrk_grp2) Run cycles #Group 120 pm_mrk_dsource1, Marked data from event:0X780 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP120 : (Group 120 pm_mrk_dsource1) Marked data loaded from L2 event:0X781 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_CYC_GRP120 : (Group 120 pm_mrk_dsource1) Marked load latency from L2 event:0X782 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP120 : (Group 120 pm_mrk_dsource1) Marked data loaded from L2.5 modified event:0X783 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_CYC_GRP120 : (Group 120 pm_mrk_dsource1) Marked load latency from L2.5 modified event:0X784 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP120 : (Group 120 pm_mrk_dsource1) Run instructions completed event:0X785 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP120 : (Group 120 pm_mrk_dsource1) Run cycles #Group 121 pm_mrk_dsource2, Marked data from event:0X790 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP121 : (Group 121 pm_mrk_dsource2) Marked data loaded from L2.5 shared event:0X791 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_CYC_GRP121 : (Group 121 pm_mrk_dsource2) Marked load latency from L2.5 shared event:0X792 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP121 : (Group 121 pm_mrk_dsource2) IOPS instructions completed event:0X793 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP121 : (Group 121 pm_mrk_dsource2) FPU produced a result event:0X794 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP121 : (Group 121 pm_mrk_dsource2) Run instructions completed event:0X795 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP121 : (Group 121 pm_mrk_dsource2) Run cycles #Group 122 pm_mrk_dsource3, Marked data from event:0X7A0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP122 : (Group 122 pm_mrk_dsource3) Marked data loaded from L3 event:0X7A1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_CYC_GRP122 : (Group 122 pm_mrk_dsource3) Marked load latency from L3 event:0X7A2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_GRP122 : (Group 122 pm_mrk_dsource3) Marked data loaded from L3.5 modified event:0X7A3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP122 : (Group 122 pm_mrk_dsource3) Marked load latency from L3.5 modified event:0X7A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP122 : (Group 122 pm_mrk_dsource3) Run instructions completed event:0X7A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP122 : (Group 122 pm_mrk_dsource3) Run cycles #Group 123 pm_mrk_dsource4, Marked data from event:0X7B0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_GRP123 : (Group 123 pm_mrk_dsource4) Marked data loaded from remote memory event:0X7B1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP123 : (Group 123 pm_mrk_dsource4) Marked load latency from L2.75 shared event:0X7B2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_GRP123 : (Group 123 pm_mrk_dsource4) Marked data loaded from L2.75 shared event:0X7B3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_CYC_GRP123 : (Group 123 pm_mrk_dsource4) Marked load latency from remote memory event:0X7B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP123 : (Group 123 pm_mrk_dsource4) Run instructions completed event:0X7B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP123 : (Group 123 pm_mrk_dsource4) Run cycles #Group 124 pm_mrk_dsource5, Marked data from event:0X7C0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_GRP124 : (Group 124 pm_mrk_dsource5) Marked data loaded from L3.5 shared event:0X7C1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_CYC_GRP124 : (Group 124 pm_mrk_dsource5) Marked load latency from L3.5 shared event:0X7C2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_GRP124 : (Group 124 pm_mrk_dsource5) Marked data loaded from local memory event:0X7C3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_CYC_GRP124 : (Group 124 pm_mrk_dsource5) Marked load latency from local memory event:0X7C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP124 : (Group 124 pm_mrk_dsource5) Run instructions completed event:0X7C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP124 : (Group 124 pm_mrk_dsource5) Run cycles #Group 125 pm_mrk_dsource6, Marked data from event:0X7D0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP125 : (Group 125 pm_mrk_dsource6) Marked data loaded from L2.75 modified event:0X7D1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP125 : (Group 125 pm_mrk_dsource6) Marked load latency from L2.75 shared event:0X7D2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP125 : (Group 125 pm_mrk_dsource6) IOPS instructions completed event:0X7D3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_CYC_GRP125 : (Group 125 pm_mrk_dsource6) Marked load latency from L2.75 modified event:0X7D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP125 : (Group 125 pm_mrk_dsource6) Run instructions completed event:0X7D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP125 : (Group 125 pm_mrk_dsource6) Run cycles #Group 126 pm_mrk_dsource7, Marked data from event:0X7E0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_GRP126 : (Group 126 pm_mrk_dsource7) Marked data loaded from L3.75 modified event:0X7E1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_CYC_GRP126 : (Group 126 pm_mrk_dsource7) Marked load latency from L3.75 shared event:0X7E2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_GRP126 : (Group 126 pm_mrk_dsource7) Marked data loaded from L3.75 shared event:0X7E3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_CYC_GRP126 : (Group 126 pm_mrk_dsource7) Marked load latency from L3.75 modified event:0X7E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP126 : (Group 126 pm_mrk_dsource7) Run instructions completed event:0X7E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP126 : (Group 126 pm_mrk_dsource7) Run cycles #Group 127 pm_mrk_dtlbref, Marked data TLB references event:0X7F0 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 4K page event:0X7F1 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_REF_64K_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 64K page event:0X7F2 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 16M page event:0X7F3 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16G_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 16G page event:0X7F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP127 : (Group 127 pm_mrk_dtlbref) Run instructions completed event:0X7F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP127 : (Group 127 pm_mrk_dtlbref) Run cycles #Group 128 pm_mrk_dtlbmiss, Marked data TLB misses event:0X800 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 4K page event:0X801 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_64K_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 64K page event:0X802 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16M_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 16M page event:0X803 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16G_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 16G page event:0X804 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP128 : (Group 128 pm_mrk_dtlbmiss) Run instructions completed event:0X805 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP128 : (Group 128 pm_mrk_dtlbmiss) Run cycles #Group 129 pm_mrk_dtlb_dslb, Marked data TLB references and misses and marked data SLB misses event:0X810 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Marked Data TLB reference event:0X811 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Marked Data TLB misses event:0X812 counters:2 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Marked Data SLB misses event:0X813 counters:3 um:zero minimum:10000 name:PM_CYC_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Processor cycles event:0X814 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Run instructions completed event:0X815 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Run cycles #Group 130 pm_mrk_lbref, Marked TLB and SLB references event:0X820 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP130 : (Group 130 pm_mrk_lbref) Marked Data TLB reference for 4K page event:0X821 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP130 : (Group 130 pm_mrk_lbref) IOPS instructions completed event:0X822 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP130 : (Group 130 pm_mrk_lbref) Marked Data TLB reference for 16M page event:0X823 counters:3 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP130 : (Group 130 pm_mrk_lbref) Marked Data SLB misses event:0X824 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP130 : (Group 130 pm_mrk_lbref) Run instructions completed event:0X825 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP130 : (Group 130 pm_mrk_lbref) Run cycles #Group 131 pm_mrk_lsmiss, Marked load and store miss event:0X830 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP131 : (Group 131 pm_mrk_lsmiss) Marked L1 D cache load misses event:0X831 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP131 : (Group 131 pm_mrk_lsmiss) IOPS instructions completed event:0X832 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP131 : (Group 131 pm_mrk_lsmiss) Marked store completed with intervention event:0X833 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP131 : (Group 131 pm_mrk_lsmiss) Marked instruction CRU processing finished event:0X834 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP131 : (Group 131 pm_mrk_lsmiss) Run instructions completed event:0X835 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP131 : (Group 131 pm_mrk_lsmiss) Run cycles #Group 132 pm_mrk_ulsflush, Mark unaligned load and store flushes event:0X840 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP132 : (Group 132 pm_mrk_ulsflush) Marked store instruction completed event:0X841 counters:1 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP132 : (Group 132 pm_mrk_ulsflush) Marked L1 D cache store misses event:0X842 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_UST_GRP132 : (Group 132 pm_mrk_ulsflush) Marked unaligned store flushes event:0X843 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_ULD_GRP132 : (Group 132 pm_mrk_ulsflush) Marked unaligned load flushes event:0X844 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP132 : (Group 132 pm_mrk_ulsflush) Run instructions completed event:0X845 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP132 : (Group 132 pm_mrk_ulsflush) Run cycles #Group 133 pm_mrk_misc, Misc marked instructions event:0X850 counters:0 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP133 : (Group 133 pm_mrk_misc) Marked STCX failed event:0X851 counters:1 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP133 : (Group 133 pm_mrk_misc) Marked store sent to GPS event:0X852 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP133 : (Group 133 pm_mrk_misc) Marked instruction FPU processing finished event:0X853 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP133 : (Group 133 pm_mrk_misc) Marked group completion timeout event:0X854 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP133 : (Group 133 pm_mrk_misc) Run instructions completed event:0X855 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP133 : (Group 133 pm_mrk_misc) Run cycles #Group 134 pm_lsref_L1, Load/Store operations and L1 activity event:0X860 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP134 : (Group 134 pm_lsref_L1) Data loaded from L2 event:0X861 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP134 : (Group 134 pm_lsref_L1) Instruction fetched from L1 event:0X862 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP134 : (Group 134 pm_lsref_L1) L1 D cache store references event:0X863 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP134 : (Group 134 pm_lsref_L1) L1 D cache load references event:0X864 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP134 : (Group 134 pm_lsref_L1) Run instructions completed event:0X865 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP134 : (Group 134 pm_lsref_L1) Run cycles #Group 135 pm_lsref_L2L3, Load/Store operations and L2,L3 activity event:0X870 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP135 : (Group 135 pm_lsref_L2L3) Data loaded from L3 event:0X871 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP135 : (Group 135 pm_lsref_L2L3) Data loaded from local memory event:0X872 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP135 : (Group 135 pm_lsref_L2L3) L1 D cache store references event:0X873 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP135 : (Group 135 pm_lsref_L2L3) L1 D cache load references event:0X874 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP135 : (Group 135 pm_lsref_L2L3) Run instructions completed event:0X875 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP135 : (Group 135 pm_lsref_L2L3) Run cycles #Group 136 pm_lsref_tlbmiss, Load/Store operations and TLB misses event:0X880 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP136 : (Group 136 pm_lsref_tlbmiss) Instruction TLB misses event:0X881 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP136 : (Group 136 pm_lsref_tlbmiss) Data TLB misses event:0X882 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP136 : (Group 136 pm_lsref_tlbmiss) L1 D cache store references event:0X883 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP136 : (Group 136 pm_lsref_tlbmiss) L1 D cache load references event:0X884 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP136 : (Group 136 pm_lsref_tlbmiss) Run instructions completed event:0X885 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP136 : (Group 136 pm_lsref_tlbmiss) Run cycles #Group 137 pm_Dmiss, Data cache misses event:0X890 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP137 : (Group 137 pm_Dmiss) Data loaded from L3 event:0X891 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP137 : (Group 137 pm_Dmiss) Data loaded from local memory event:0X892 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP137 : (Group 137 pm_Dmiss) L1 D cache load misses event:0X893 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP137 : (Group 137 pm_Dmiss) L1 D cache store misses event:0X894 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP137 : (Group 137 pm_Dmiss) Run instructions completed event:0X895 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP137 : (Group 137 pm_Dmiss) Run cycles #Group 138 pm_prefetchX, Prefetch events event:0X8A0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP138 : (Group 138 pm_prefetchX) Processor cycles event:0X8A1 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP138 : (Group 138 pm_prefetchX) Instruction prefetch requests event:0X8A2 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP138 : (Group 138 pm_prefetchX) L1 cache data prefetches event:0X8A3 counters:3 um:zero minimum:1000 name:PM_L2_PREF_GRP138 : (Group 138 pm_prefetchX) L2 cache prefetches event:0X8A4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP138 : (Group 138 pm_prefetchX) Run instructions completed event:0X8A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP138 : (Group 138 pm_prefetchX) Run cycles #Group 139 pm_branchX, Branch operations event:0X8B0 counters:0 um:zero minimum:1000 name:PM_BR_UNCOND_GRP139 : (Group 139 pm_branchX) Unconditional branch event:0X8B1 counters:1 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP139 : (Group 139 pm_branchX) A conditional branch was predicted, target prediction event:0X8B2 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP139 : (Group 139 pm_branchX) A conditional branch was predicted, CR prediction event:0X8B3 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP139 : (Group 139 pm_branchX) Branches issued event:0X8B4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP139 : (Group 139 pm_branchX) Run instructions completed event:0X8B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP139 : (Group 139 pm_branchX) Run cycles #Group 140 pm_fpuX1, Floating point events by unit event:0X8C0 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP140 : (Group 140 pm_fpuX1) FPU0 stalled in pipe3 event:0X8C1 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP140 : (Group 140 pm_fpuX1) FPU1 stalled in pipe3 event:0X8C2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP140 : (Group 140 pm_fpuX1) FPU0 produced a result event:0X8C3 counters:3 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP140 : (Group 140 pm_fpuX1) FPU0 executed FPSCR instruction event:0X8C4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP140 : (Group 140 pm_fpuX1) Run instructions completed event:0X8C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP140 : (Group 140 pm_fpuX1) Run cycles #Group 141 pm_fpuX2, Floating point events by unit event:0X8D0 counters:0 um:zero minimum:1000 name:PM_FPU0_FMA_GRP141 : (Group 141 pm_fpuX2) FPU0 executed multiply-add instruction event:0X8D1 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP141 : (Group 141 pm_fpuX2) FPU1 executed multiply-add instruction event:0X8D2 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP141 : (Group 141 pm_fpuX2) FPU0 executed FRSP or FCONV instructions event:0X8D3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP141 : (Group 141 pm_fpuX2) FPU1 executed FRSP or FCONV instructions event:0X8D4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP141 : (Group 141 pm_fpuX2) Run instructions completed event:0X8D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP141 : (Group 141 pm_fpuX2) Run cycles #Group 142 pm_fpuX3, Floating point events by unit event:0X8E0 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP142 : (Group 142 pm_fpuX3) FPU0 executed add, mult, sub, cmp or sel instruction event:0X8E1 counters:1 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP142 : (Group 142 pm_fpuX3) FPU1 executed add, mult, sub, cmp or sel instruction event:0X8E2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP142 : (Group 142 pm_fpuX3) FPU0 produced a result event:0X8E3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP142 : (Group 142 pm_fpuX3) FPU1 produced a result event:0X8E4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP142 : (Group 142 pm_fpuX3) Run instructions completed event:0X8E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP142 : (Group 142 pm_fpuX3) Run cycles #Group 143 pm_fpuX4, Floating point and L1 events event:0X8F0 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP143 : (Group 143 pm_fpuX4) FPU executed one flop instruction event:0X8F1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP143 : (Group 143 pm_fpuX4) FPU executed multiply-add instruction event:0X8F2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP143 : (Group 143 pm_fpuX4) L1 D cache store references event:0X8F3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP143 : (Group 143 pm_fpuX4) L1 D cache load references event:0X8F4 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP143 : (Group 143 pm_fpuX4) Run instructions completed event:0X8F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP143 : (Group 143 pm_fpuX4) Run cycles #Group 144 pm_fpuX5, Floating point events event:0X900 counters:0 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP144 : (Group 144 pm_fpuX5) FPU executed single precision instruction event:0X901 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP144 : (Group 144 pm_fpuX5) FPU executed store instruction event:0X902 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP144 : (Group 144 pm_fpuX5) FPU0 produced a result event:0X903 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP144 : (Group 144 pm_fpuX5) FPU1 produced a result event:0X904 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP144 : (Group 144 pm_fpuX5) Run instructions completed event:0X905 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP144 : (Group 144 pm_fpuX5) Run cycles #Group 145 pm_fpuX6, Floating point events event:0X910 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP145 : (Group 145 pm_fpuX6) FPU executed FDIV instruction event:0X911 counters:1 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP145 : (Group 145 pm_fpuX6) FPU executed FSQRT instruction event:0X912 counters:2 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP145 : (Group 145 pm_fpuX6) FPU executed FRSP or FCONV instructions event:0X913 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP145 : (Group 145 pm_fpuX6) FPU produced a result event:0X914 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP145 : (Group 145 pm_fpuX6) Run instructions completed event:0X915 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP145 : (Group 145 pm_fpuX6) Run cycles #Group 146 pm_fpuX7, Floating point events event:0X920 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP146 : (Group 146 pm_fpuX7) FPU executed one flop instruction event:0X921 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP146 : (Group 146 pm_fpuX7) FPU executed multiply-add instruction event:0X922 counters:2 um:zero minimum:1000 name:PM_FPU_STF_GRP146 : (Group 146 pm_fpuX7) FPU executed store instruction event:0X923 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP146 : (Group 146 pm_fpuX7) FPU produced a result event:0X924 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP146 : (Group 146 pm_fpuX7) Run instructions completed event:0X925 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP146 : (Group 146 pm_fpuX7) Run cycles #Group 147 pm_hpmcount1, HPM group for set 1 event:0X930 counters:0 um:zero minimum:10000 name:PM_CYC_GRP147 : (Group 147 pm_hpmcount1) Processor cycles event:0X931 counters:1 um:zero minimum:1000 name:PM_FXU_FIN_GRP147 : (Group 147 pm_hpmcount1) FXU produced a result event:0X932 counters:2 um:zero minimum:10000 name:PM_CYC_GRP147 : (Group 147 pm_hpmcount1) Processor cycles event:0X933 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP147 : (Group 147 pm_hpmcount1) FPU produced a result event:0X934 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP147 : (Group 147 pm_hpmcount1) Run instructions completed event:0X935 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP147 : (Group 147 pm_hpmcount1) Run cycles #Group 148 pm_hpmcount2, HPM group for set 2 event:0X940 counters:0 um:zero minimum:10000 name:PM_CYC_GRP148 : (Group 148 pm_hpmcount2) Processor cycles event:0X941 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP148 : (Group 148 pm_hpmcount2) FPU executed store instruction event:0X942 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP148 : (Group 148 pm_hpmcount2) Instructions dispatched event:0X943 counters:3 um:zero minimum:1000 name:PM_LSU_LDF_GRP148 : (Group 148 pm_hpmcount2) LSU executed Floating Point load instruction event:0X944 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP148 : (Group 148 pm_hpmcount2) Run instructions completed event:0X945 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP148 : (Group 148 pm_hpmcount2) Run cycles #Group 149 pm_hpmcount3, HPM group for set 3 event:0X950 counters:0 um:zero minimum:10000 name:PM_CYC_GRP149 : (Group 149 pm_hpmcount3) Processor cycles event:0X951 counters:1 um:zero minimum:1000 name:PM_INST_DISP_GRP149 : (Group 149 pm_hpmcount3) Instructions dispatched event:0X952 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP149 : (Group 149 pm_hpmcount3) L1 D cache load misses event:0X953 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP149 : (Group 149 pm_hpmcount3) L1 D cache store misses event:0X954 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP149 : (Group 149 pm_hpmcount3) Run instructions completed event:0X955 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP149 : (Group 149 pm_hpmcount3) Run cycles #Group 150 pm_hpmcount4, HPM group for set 7 event:0X960 counters:0 um:zero minimum:1000 name:PM_TLB_MISS_GRP150 : (Group 150 pm_hpmcount4) TLB misses event:0X961 counters:1 um:zero minimum:10000 name:PM_CYC_GRP150 : (Group 150 pm_hpmcount4) Processor cycles event:0X962 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP150 : (Group 150 pm_hpmcount4) L1 D cache store references event:0X963 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP150 : (Group 150 pm_hpmcount4) L1 D cache load references event:0X964 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP150 : (Group 150 pm_hpmcount4) Run instructions completed event:0X965 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP150 : (Group 150 pm_hpmcount4) Run cycles #Group 151 pm_flop, Floating point operations event:0X970 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP151 : (Group 151 pm_flop) FPU executed FDIV instruction event:0X971 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP151 : (Group 151 pm_flop) FPU executed multiply-add instruction event:0X972 counters:2 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP151 : (Group 151 pm_flop) FPU executed FSQRT instruction event:0X973 counters:3 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP151 : (Group 151 pm_flop) FPU executed one flop instruction event:0X974 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP151 : (Group 151 pm_flop) Run instructions completed event:0X975 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP151 : (Group 151 pm_flop) Run cycles #Group 152 pm_eprof1, Group for use with eprof event:0X980 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP152 : (Group 152 pm_eprof1) Instructions completed event:0X981 counters:1 um:zero minimum:10000 name:PM_CYC_GRP152 : (Group 152 pm_eprof1) Processor cycles event:0X982 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP152 : (Group 152 pm_eprof1) L1 D cache load misses event:0X983 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP152 : (Group 152 pm_eprof1) L1 D cache entries invalidated from L2 event:0X984 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP152 : (Group 152 pm_eprof1) Run instructions completed event:0X985 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP152 : (Group 152 pm_eprof1) Run cycles #Group 153 pm_eprof2, Group for use with eprof event:0X990 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP153 : (Group 153 pm_eprof2) Instructions completed event:0X991 counters:1 um:zero minimum:1000 name:PM_ST_REF_L1_GRP153 : (Group 153 pm_eprof2) L1 D cache store references event:0X992 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP153 : (Group 153 pm_eprof2) Instructions dispatched event:0X993 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP153 : (Group 153 pm_eprof2) L1 D cache load references event:0X994 counters:4 um:zero minimum:1000 name:PM_RUN_INST_CMPL_GRP153 : (Group 153 pm_eprof2) Run instructions completed event:0X995 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP153 : (Group 153 pm_eprof2) Run cycles oprofile-1.3.0/events/ppc64/power5+/event_mappings0000664000175000017500000021641212534404406016763 00000000000000#Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 #Group 1 pm_utilization, CPI and utilization data event:0X010 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X011 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X012 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X013 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X014 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X015 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 #Group 2 pm_completion, Completion and cycle counts event:0X020 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X021 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X022 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X023 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X024 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X025 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 #Group 3 pm_group_dispatch, Group dispatch events event:0X030 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X031 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X032 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X033 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X034 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X035 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 #Group 4 pm_clb1, CLB fullness event:0X040 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X041 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X042 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X043 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X044 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X045 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 #Group 5 pm_clb2, CLB fullness event:0X050 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X051 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X052 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X053 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X054 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X055 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 #Group 6 pm_gct_empty, GCT empty reasons event:0X060 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X061 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X062 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X063 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X064 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X065 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 #Group 7 pm_gct_usage, GCT Usage event:0X070 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X071 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X072 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X073 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X074 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X075 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 #Group 8 pm_lsu1, LSU LRQ and LMQ events event:0X080 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X081 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X082 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X083 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X084 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X085 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 #Group 9 pm_lsu2, LSU SRQ events event:0X090 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X091 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X092 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X093 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X094 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X095 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 #Group 10 pm_lsu3, LSU SRQ and LMQ events event:0X0A0 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X0A1 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X0A2 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X0A3 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X0A4 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X0A5 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 #Group 11 pm_lsu4, LSU SRQ and LMQ events event:0X0B0 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X0B1 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X0B2 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X0B3 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X0B4 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X0B5 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 #Group 12 pm_prefetch1, Prefetch stream allocation event:0X0C0 mmcr0:0X00000000 mmcr1:0X8432000D3AC884CE mmcra:0X00000000 event:0X0C1 mmcr0:0X00000000 mmcr1:0X8432000D3AC884CE mmcra:0X00000000 event:0X0C2 mmcr0:0X00000000 mmcr1:0X8432000D3AC884CE mmcra:0X00000000 event:0X0C3 mmcr0:0X00000000 mmcr1:0X8432000D3AC884CE mmcra:0X00000000 event:0X0C4 mmcr0:0X00000000 mmcr1:0X8432000D3AC884CE mmcra:0X00000000 event:0X0C5 mmcr0:0X00000000 mmcr1:0X8432000D3AC884CE mmcra:0X00000000 #Group 13 pm_prefetch2, Prefetch events event:0X0D0 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0D1 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0D2 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0D3 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0D4 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X0D5 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 #Group 14 pm_prefetch3, L2 prefetch and misc events event:0X0E0 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X0E1 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X0E2 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X0E3 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X0E4 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X0E5 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 #Group 15 pm_prefetch4, Misc prefetch and reject events event:0X0F0 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X0F1 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X0F2 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X0F3 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X0F4 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X0F5 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 #Group 16 pm_lsu_reject1, LSU reject events event:0X100 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X101 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X102 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X103 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X104 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X105 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 #Group 17 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision event:0X110 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X111 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X112 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X113 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X114 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X115 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 #Group 18 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions event:0X120 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X121 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X122 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X123 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X124 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X125 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 #Group 19 pm_lsu_reject4, LSU0/1 reject LMQ full event:0X130 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X131 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X132 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X133 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X134 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X135 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 #Group 20 pm_lsu_reject5, LSU misc reject and flush events event:0X140 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X141 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X142 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X143 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X144 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X145 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 #Group 21 pm_flush1, Misc flush events event:0X150 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X151 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X152 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X153 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X154 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X155 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 #Group 22 pm_flush2, Flushes due to scoreboard and sync event:0X160 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X161 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X162 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X163 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X164 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X165 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 #Group 23 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events event:0X170 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X171 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X172 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X173 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X174 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X175 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 #Group 24 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ event:0X180 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X181 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X182 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X183 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X184 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X185 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 #Group 25 pm_lsu_flush_srq, LSU0/1 flush due to SRQ event:0X190 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X191 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X192 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X193 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X194 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X195 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 #Group 26 pm_lsu_flush_unaligned, LSU flush due to unaligned data event:0X1A0 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X1A1 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X1A2 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X1A3 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X1A4 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X1A5 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 #Group 27 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load event:0X1B0 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1B1 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1B2 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1B3 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1B4 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X1B5 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 #Group 28 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store event:0X1C0 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1C1 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1C2 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1C3 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1C4 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X1C5 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 #Group 29 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full event:0X1D0 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1D1 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1D2 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1D3 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1D4 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X1D5 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 #Group 30 pm_lsu_stall1, LSU Stalls event:0X1E0 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1E1 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1E2 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1E3 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1E4 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X1E5 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 #Group 31 pm_lsu_stall2, LSU Stalls event:0X1F0 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1F1 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1F2 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1F3 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1F4 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X1F5 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 #Group 32 pm_fxu_stall, FXU Stalls event:0X200 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X201 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X202 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X203 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X204 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 event:0X205 mmcr0:0X00000000 mmcr1:0X4000000822320232 mmcra:0X00000001 #Group 33 pm_fpu_stall, FPU Stalls event:0X210 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X211 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X212 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X213 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X214 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X215 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 #Group 34 pm_queue_full, BRQ LRQ LMQ queue full event:0X220 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X221 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X222 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X223 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X224 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X225 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 #Group 35 pm_issueq_full, FPU FX full event:0X230 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X231 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X232 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X233 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X234 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X235 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 #Group 36 pm_mapper_full1, CR CTR GPR mapper full event:0X240 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X241 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X242 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X243 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X244 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X245 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 #Group 37 pm_mapper_full2, FPR XER mapper full event:0X250 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X251 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X252 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X253 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X254 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X255 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 #Group 38 pm_misc_load, Non-cachable loads and stcx events event:0X260 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X261 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X262 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X263 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X264 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X265 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 #Group 39 pm_ic_demand, ICache demand from BR redirect event:0X270 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X271 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X272 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X273 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X274 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X275 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 #Group 40 pm_ic_pref, ICache prefetch event:0X280 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X281 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X282 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X283 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X284 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X285 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 #Group 41 pm_ic_miss, ICache misses event:0X290 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X291 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X292 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X293 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X294 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X295 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 #Group 42 pm_branch_miss, Branch mispredict, TLB and SLB misses event:0X2A0 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X2A1 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X2A2 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X2A3 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X2A4 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X2A5 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 #Group 43 pm_branch1, Branch operations event:0X2B0 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X2B1 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X2B2 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X2B3 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X2B4 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X2B5 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 #Group 44 pm_branch2, Branch operations event:0X2C0 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2C1 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2C2 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2C3 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2C4 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 event:0X2C5 mmcr0:0X00000000 mmcr1:0X4000000CCACC8C02 mmcra:0X00000001 #Group 45 pm_L1_tlbmiss, L1 load and TLB misses event:0X2D0 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2D1 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2D2 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2D3 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2D4 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X2D5 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 #Group 46 pm_L1_DERAT_miss, L1 store and DERAT misses event:0X2E0 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X2E1 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X2E2 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X2E3 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X2E4 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X2E5 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 #Group 47 pm_L1_slbmiss, L1 load and SLB misses event:0X2F0 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2F1 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2F2 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2F3 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2F4 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X2F5 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 #Group 48 pm_dtlbref, Data TLB references event:0X300 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X301 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X302 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X303 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X304 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X305 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 #Group 49 pm_dtlbmiss, Data TLB misses event:0X310 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X311 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X312 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X313 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X314 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X315 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 #Group 50 pm_dtlb, Data TLB references and misses event:0X320 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X321 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X322 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X323 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X324 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X325 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 #Group 51 pm_L1_refmiss, L1 load references and misses and store references and misses event:0X330 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X331 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X332 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X333 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X334 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X335 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 #Group 52 pm_dsource1, L3 cache and memory data access event:0X340 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X341 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X342 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X343 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X344 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X345 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 #Group 53 pm_dsource2, L3 cache and memory data access event:0X350 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X351 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X352 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X353 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X354 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X355 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 #Group 54 pm_dsource_L2, L2 cache data access event:0X360 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X361 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X362 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X363 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X364 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X365 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 #Group 55 pm_dsource_L3, L3 cache data access event:0X370 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X371 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X372 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X373 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X374 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X375 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 #Group 56 pm_isource1, Instruction source information event:0X380 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X381 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X382 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X383 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X384 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X385 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 #Group 57 pm_isource2, Instruction source information event:0X390 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X391 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X392 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X393 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X394 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X395 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 #Group 58 pm_isource_L2, L2 instruction source information event:0X3A0 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X3A1 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X3A2 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X3A3 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X3A4 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X3A5 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 #Group 59 pm_isource_L3, L3 instruction source information event:0X3B0 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X3B1 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X3B2 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X3B3 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X3B4 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X3B5 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 #Group 60 pm_pteg_source1, PTEG source information event:0X3C0 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X3C1 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X3C2 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X3C3 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X3C4 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X3C5 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 #Group 61 pm_pteg_source2, PTEG source information event:0X3D0 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X3D1 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X3D2 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X3D3 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X3D4 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X3D5 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 #Group 62 pm_pteg_source3, PTEG source information event:0X3E0 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X3E1 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X3E2 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X3E3 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X3E4 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X3E5 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 #Group 63 pm_pteg_source4, L3 PTEG and group disptach events event:0X3F0 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X3F1 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X3F2 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X3F3 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X3F4 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X3F5 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 #Group 64 pm_L2SA_ld, L2 slice A load events event:0X400 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X401 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X402 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X403 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X404 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X405 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 #Group 65 pm_L2SA_st, L2 slice A store events event:0X410 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X411 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X412 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X413 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X414 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X415 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 #Group 66 pm_L2SA_st2, L2 slice A store events event:0X420 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X421 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X422 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X423 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X424 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X425 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 #Group 67 pm_L2SB_ld, L2 slice B load events event:0X430 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X431 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X432 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X433 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X434 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X435 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 #Group 68 pm_L2SB_st, L2 slice B store events event:0X440 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X441 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X442 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X443 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X444 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X445 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 #Group 69 pm_L2SB_st2, L2 slice B store events event:0X450 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X451 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X452 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X453 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X454 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X455 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 #Group 70 pm_L2SB_ld, L2 slice C load events event:0X460 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X461 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X462 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X463 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X464 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X465 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 #Group 71 pm_L2SB_st, L2 slice C store events event:0X470 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X471 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X472 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X473 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X474 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X475 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 #Group 72 pm_L2SB_st2, L2 slice C store events event:0X480 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X481 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X482 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X483 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X484 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X485 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 #Group 73 pm_L3SA_trans, L3 slice A state transistions event:0X490 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X491 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X492 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X493 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X494 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X495 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 #Group 74 pm_L3SB_trans, L3 slice B state transistions event:0X4A0 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X4A1 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X4A2 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X4A3 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X4A4 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X4A5 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 #Group 75 pm_L3SC_trans, L3 slice C state transistions event:0X4B0 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X4B1 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X4B2 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X4B3 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X4B4 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X4B5 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 #Group 76 pm_L2SA_trans, L2 slice A state transistions event:0X4C0 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X4C1 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X4C2 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X4C3 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X4C4 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X4C5 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 #Group 77 pm_L2SB_trans, L2 slice B state transistions event:0X4D0 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4D1 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4D2 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4D3 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4D4 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X4D5 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 #Group 78 pm_L2SC_trans, L2 slice C state transistions event:0X4E0 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4E1 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4E2 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4E3 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4E4 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X4E5 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 #Group 79 pm_L3SAB_retry, L3 slice A/B snoop retry and all CI/CO busy event:0X4F0 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4F1 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4F2 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4F3 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4F4 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X4F5 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 #Group 80 pm_L3SAB_hit, L3 slice A/B hit and reference event:0X500 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X501 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X502 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X503 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X504 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X505 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 #Group 81 pm_L3SC_retry_hit, L3 slice C hit & snoop retry event:0X510 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X511 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X512 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X513 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X514 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X515 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 #Group 82 pm_fpu1, Floating Point events event:0X520 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X521 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X522 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X523 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X524 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X525 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 #Group 83 pm_fpu2, Floating Point events event:0X530 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X531 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X532 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X533 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X534 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X535 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 #Group 84 pm_fpu3, Floating point events event:0X540 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X541 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X542 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X543 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X544 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X545 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 #Group 85 pm_fpu4, Floating point events event:0X550 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X551 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X552 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X553 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X554 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X555 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 #Group 86 pm_fpu5, Floating point events by unit event:0X560 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X561 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X562 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X563 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X564 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X565 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 #Group 87 pm_fpu6, Floating point events by unit event:0X570 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X571 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X572 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X573 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X574 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X575 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 #Group 88 pm_fpu7, Floating point events by unit event:0X580 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X581 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X582 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X583 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X584 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X585 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 #Group 89 pm_fpu8, Floating point events by unit event:0X590 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X591 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X592 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X593 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X594 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X595 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 #Group 90 pm_fpu9, Floating point events by unit event:0X5A0 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X5A1 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X5A2 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X5A3 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X5A4 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X5A5 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 #Group 91 pm_fpu10, Floating point events by unit event:0X5B0 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X5B1 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X5B2 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X5B3 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X5B4 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X5B5 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 #Group 92 pm_fpu11, Floating point events by unit event:0X5C0 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X5C1 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X5C2 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X5C3 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X5C4 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X5C5 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 #Group 93 pm_fpu12, Floating point events by unit event:0X5D0 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5D1 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5D2 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5D3 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5D4 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X5D5 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 #Group 94 pm_fxu1, Fixed Point events event:0X5E0 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5E1 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5E2 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5E3 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5E4 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X5E5 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 #Group 95 pm_fxu2, Fixed Point events event:0X5F0 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5F1 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5F2 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5F3 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5F4 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X5F5 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 #Group 96 pm_fxu3, Fixed Point events event:0X600 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X601 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X602 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X603 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X604 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X605 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 #Group 97 pm_smt_priorities1, Thread priority events event:0X610 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X611 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X612 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X613 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X614 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X615 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 #Group 98 pm_smt_priorities2, Thread priority events event:0X620 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X621 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X622 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X623 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X624 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X625 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 #Group 99 pm_smt_priorities3, Thread priority events event:0X630 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X631 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X632 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X633 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X634 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X635 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 #Group 100 pm_smt_priorities4, Thread priority events event:0X640 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X641 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X642 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X643 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X644 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X645 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 #Group 101 pm_smt_both, Thread common events event:0X650 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X651 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X652 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X653 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X654 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X655 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 #Group 102 pm_smt_selection, Thread selection event:0X660 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X661 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X662 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X663 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X664 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X665 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 #Group 103 pm_smt_selectover1, Thread selection overide event:0X670 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X671 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X672 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X673 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X674 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X675 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 #Group 104 pm_smt_selectover2, Thread selection overide event:0X680 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X681 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X682 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X683 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X684 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X685 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 #Group 105 pm_fabric1, Fabric events event:0X690 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X691 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X692 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X693 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X694 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X695 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 #Group 106 pm_fabric2, Fabric data movement event:0X6A0 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X6A1 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X6A2 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X6A3 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X6A4 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X6A5 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 #Group 107 pm_fabric3, Fabric data movement event:0X6B0 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X6B1 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X6B2 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X6B3 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X6B4 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X6B5 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 #Group 108 pm_fabric4, Fabric data movement event:0X6C0 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X6C1 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X6C2 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X6C3 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X6C4 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X6C5 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 #Group 109 pm_snoop1, Snoop retry event:0X6D0 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6D1 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6D2 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6D3 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6D4 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X6D5 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 #Group 110 pm_snoop2, Snoop read retry event:0X6E0 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6E1 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6E2 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6E3 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6E4 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X6E5 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 #Group 111 pm_snoop3, Snoop write retry event:0X6F0 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6F1 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6F2 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6F3 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6F4 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X6F5 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 #Group 112 pm_snoop4, Snoop partial write retry event:0X700 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X701 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X702 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X703 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X704 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 event:0X705 mmcr0:0X00000000 mmcr1:0X30550E058CCC8CCC mmcra:0X00000000 #Group 113 pm_mem_rq, Memory read queue dispatch event:0X710 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X711 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X712 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X713 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X714 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X715 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 #Group 114 pm_mem_read, Memory read complete and cancel event:0X720 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X721 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X722 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X723 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X724 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X725 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 #Group 115 pm_mem_wq, Memory write queue dispatch event:0X730 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X731 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X732 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X733 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X734 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X735 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 #Group 116 pm_mem_pwq, Memory partial write queue event:0X740 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X741 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X742 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X743 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X744 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X745 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 #Group 117 pm_threshold, Thresholding event:0X750 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X751 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X752 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X753 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X754 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X755 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 #Group 118 pm_mrk_grp1, Marked group events event:0X760 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X761 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X762 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X763 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X764 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X765 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 #Group 119 pm_mrk_grp2, Marked group events event:0X770 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X771 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X772 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X773 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X774 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X775 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 #Group 120 pm_mrk_dsource1, Marked data from event:0X780 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X781 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X782 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X783 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X784 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X785 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 #Group 121 pm_mrk_dsource2, Marked data from event:0X790 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X791 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X792 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X793 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X794 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X795 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 #Group 122 pm_mrk_dsource3, Marked data from event:0X7A0 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X7A1 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X7A2 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X7A3 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X7A4 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X7A5 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 #Group 123 pm_mrk_dsource4, Marked data from event:0X7B0 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X7B1 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X7B2 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X7B3 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X7B4 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X7B5 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 #Group 124 pm_mrk_dsource5, Marked data from event:0X7C0 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X7C1 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X7C2 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X7C3 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X7C4 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X7C5 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 #Group 125 pm_mrk_dsource6, Marked data from event:0X7D0 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X7D1 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X7D2 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X7D3 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X7D4 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X7D5 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 #Group 126 pm_mrk_dsource7, Marked data from event:0X7E0 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X7E1 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X7E2 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X7E3 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X7E4 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X7E5 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 #Group 127 pm_mrk_dtlbref, Marked data TLB references event:0X7F0 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X7F1 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X7F2 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X7F3 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X7F4 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X7F5 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 #Group 128 pm_mrk_dtlbmiss, Marked data TLB misses event:0X800 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X801 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X802 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X803 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X804 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X805 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 #Group 129 pm_mrk_dtlb_dslb, Marked data TLB references and misses and marked data SLB misses event:0X810 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X811 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X812 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X813 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X814 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X815 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 #Group 130 pm_mrk_lbref, Marked TLB and SLB references event:0X820 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X821 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X822 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X823 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X824 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X825 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 #Group 131 pm_mrk_lsmiss, Marked load and store miss event:0X830 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X831 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X832 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X833 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X834 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X835 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 #Group 132 pm_mrk_ulsflush, Mark unaligned load and store flushes event:0X840 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X841 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X842 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X843 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X844 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X845 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 #Group 133 pm_mrk_misc, Misc marked instructions event:0X850 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X851 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X852 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X853 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X854 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X855 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 #Group 134 pm_lsref_L1, Load/Store operations and L1 activity event:0X860 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X861 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X862 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X863 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X864 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X865 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 #Group 135 pm_lsref_L2L3, Load/Store operations and L2,L3 activity event:0X870 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X871 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X872 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X873 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X874 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X875 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 #Group 136 pm_lsref_tlbmiss, Load/Store operations and TLB misses event:0X880 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X881 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X882 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X883 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X884 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X885 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 #Group 137 pm_Dmiss, Data cache misses event:0X890 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X891 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X892 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X893 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X894 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X895 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 #Group 138 pm_prefetchX, Prefetch events event:0X8A0 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X8A1 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X8A2 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X8A3 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X8A4 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X8A5 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 #Group 139 pm_branchX, Branch operations event:0X8B0 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X8B1 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X8B2 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X8B3 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X8B4 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X8B5 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 #Group 140 pm_fpuX1, Floating point events by unit event:0X8C0 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X8C1 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X8C2 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X8C3 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X8C4 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X8C5 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 #Group 141 pm_fpuX2, Floating point events by unit event:0X8D0 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X8D1 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X8D2 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X8D3 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X8D4 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X8D5 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 #Group 142 pm_fpuX3, Floating point events by unit event:0X8E0 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X8E1 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X8E2 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X8E3 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X8E4 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X8E5 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 #Group 143 pm_fpuX4, Floating point and L1 events event:0X8F0 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8F1 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8F2 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8F3 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8F4 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X8F5 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 #Group 144 pm_fpuX5, Floating point events event:0X900 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X901 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X902 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X903 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X904 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X905 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 #Group 145 pm_fpuX6, Floating point events event:0X910 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X911 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X912 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X913 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X914 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X915 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 #Group 146 pm_fpuX7, Floating point events event:0X920 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X921 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X922 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X923 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X924 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X925 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 #Group 147 pm_hpmcount1, HPM group for set 1 event:0X930 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X931 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X932 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X933 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X934 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X935 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 #Group 148 pm_hpmcount2, HPM group for set 2 event:0X940 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X941 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X942 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X943 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X944 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 event:0X945 mmcr0:0X00000000 mmcr1:0X043000041E201220 mmcra:0X00000000 #Group 149 pm_hpmcount3, HPM group for set 3 event:0X950 mmcr0:0X00000000 mmcr1:0X403000041EC01086 mmcra:0X00000000 event:0X951 mmcr0:0X00000000 mmcr1:0X403000041EC01086 mmcra:0X00000000 event:0X952 mmcr0:0X00000000 mmcr1:0X403000041EC01086 mmcra:0X00000000 event:0X953 mmcr0:0X00000000 mmcr1:0X403000041EC01086 mmcra:0X00000000 event:0X954 mmcr0:0X00000000 mmcr1:0X403000041EC01086 mmcra:0X00000000 event:0X955 mmcr0:0X00000000 mmcr1:0X403000041EC01086 mmcra:0X00000000 #Group 150 pm_hpmcount4, HPM group for set 7 event:0X960 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X961 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X962 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X963 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X964 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X965 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 #Group 151 pm_flop, Floating point operations event:0X970 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X971 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X972 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X973 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X974 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X975 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 #Group 152 pm_eprof1, Group for use with eprof event:0X980 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X981 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X982 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X983 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X984 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X985 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 #Group 153 pm_eprof2, Group for use with eprof event:0X990 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X991 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X992 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X993 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X994 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X995 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 oprofile-1.3.0/events/ppc64/power5+/unit_masks0000664000175000017500000000013512534404406016112 00000000000000# ppc64 Power5+ possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power4/0000775000175000017500000000000013323173530014015 500000000000000oprofile-1.3.0/events/ppc64/power4/events0000664000175000017500000017511112534404406015174 00000000000000#PPC64 POWER4 events # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously. # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:1 um:zero minimum:10000 name:CYCLES : Processor Cycles #Group 1 pm_slice0, Time Slice 0 event:0X010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_slice0) Run cycles event:0X011 counters:1 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles event:0X012 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP1 : (Group 1 pm_slice0) Completion stopped event:0X013 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_slice0) Instructions completed event:0X014 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP1 : (Group 1 pm_slice0) One or more PPC instruction completed event:0X015 counters:5 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles event:0X016 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP1 : (Group 1 pm_slice0) Group completed event:0X017 counters:7 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP1 : (Group 1 pm_slice0) Group dispatch rejected #Group 2 pm_eprof, Group for use with eprof event:0X020 counters:0 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycles event:0X021 counters:1 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycles event:0X022 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP2 : (Group 2 pm_eprof) L1 D cache load misses event:0X023 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP2 : (Group 2 pm_eprof) L1 D cache entries invalidated from L2 event:0X024 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP2 : (Group 2 pm_eprof) Instructions dispatched event:0X025 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP2 : (Group 2 pm_eprof) Instructions completed event:0X026 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP2 : (Group 2 pm_eprof) L1 D cache store references event:0X027 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP2 : (Group 2 pm_eprof) L1 D cache load references #Group 3 pm_basic, Basic performance indicators event:0X030 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_basic) Instructions completed event:0X031 counters:1 um:zero minimum:10000 name:PM_CYC_GRP3 : (Group 3 pm_basic) Processor cycles event:0X032 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP3 : (Group 3 pm_basic) L1 D cache load misses event:0X033 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP3 : (Group 3 pm_basic) L1 D cache entries invalidated from L2 event:0X034 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP3 : (Group 3 pm_basic) Instructions dispatched event:0X035 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_basic) Instructions completed event:0X036 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP3 : (Group 3 pm_basic) L1 D cache store references event:0X037 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP3 : (Group 3 pm_basic) L1 D cache load references #Group 4 pm_ifu, IFU events event:0X040 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP4 : (Group 4 pm_ifu) Instructions completed event:0X041 counters:1 um:zero minimum:1000 name:PM_BIQ_IDU_FULL_CYC_GRP4 : (Group 4 pm_ifu) Cycles BIQ or IDU full event:0X042 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP4 : (Group 4 pm_ifu) Branches issued event:0X043 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP4 : (Group 4 pm_ifu) Branch mispredictions due CR bit setting event:0X044 counters:4 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP4 : (Group 4 pm_ifu) Cycles at least 1 instruction fetched event:0X045 counters:5 um:zero minimum:10000 name:PM_CYC_GRP4 : (Group 4 pm_ifu) Processor cycles event:0X046 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP4 : (Group 4 pm_ifu) Branch mispredictions due to target address event:0X047 counters:7 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP4 : (Group 4 pm_ifu) Cycles writing to instruction L1 #Group 5 pm_isu, ISU Queue full events event:0X050 counters:0 um:zero minimum:1000 name:PM_FPR_MAP_FULL_CYC_GRP5 : (Group 5 pm_isu) Cycles FPR mapper full event:0X051 counters:1 um:zero minimum:1000 name:PM_BRQ_FULL_CYC_GRP5 : (Group 5 pm_isu) Cycles branch queue full event:0X052 counters:2 um:zero minimum:1000 name:PM_GPR_MAP_FULL_CYC_GRP5 : (Group 5 pm_isu) Cycles GPR mapper full event:0X053 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP5 : (Group 5 pm_isu) Instructions completed event:0X054 counters:4 um:zero minimum:1000 name:PM_FPU_FULL_CYC_GRP5 : (Group 5 pm_isu) Cycles FPU issue queue full event:0X055 counters:5 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP5 : (Group 5 pm_isu) Cycles GCT full event:0X056 counters:6 um:zero minimum:10000 name:PM_CYC_GRP5 : (Group 5 pm_isu) Processor cycles event:0X057 counters:7 um:zero minimum:1000 name:PM_FXLS_FULL_CYC_GRP5 : (Group 5 pm_isu) Cycles FXLS queue is full #Group 6 pm_lsource, Information on data source event:0X060 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP6 : (Group 6 pm_lsource) Data loaded from L3 event:0X061 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP6 : (Group 6 pm_lsource) Data loaded from memory event:0X062 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L35_GRP6 : (Group 6 pm_lsource) Data loaded from L3.5 event:0X063 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP6 : (Group 6 pm_lsource) Data loaded from L2 event:0X064 counters:4 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP6 : (Group 6 pm_lsource) Data loaded from L2.5 shared event:0X065 counters:5 um:zero minimum:1000 name:PM_DATA_FROM_L275_SHR_GRP6 : (Group 6 pm_lsource) Data loaded from L2.75 shared event:0X066 counters:6 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP6 : (Group 6 pm_lsource) Data loaded from L2.75 modified event:0X067 counters:7 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP6 : (Group 6 pm_lsource) Data loaded from L2.5 modified #Group 7 pm_isource, Instruction Source information event:0X070 counters:0 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP7 : (Group 7 pm_isource) Instruction fetched from memory event:0X071 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L25_L275_GRP7 : (Group 7 pm_isource) Instruction fetched from L2.5/L2.75 event:0X072 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP7 : (Group 7 pm_isource) Instructions fetched from L2 event:0X073 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L35_GRP7 : (Group 7 pm_isource) Instructions fetched from L3.5 event:0X074 counters:4 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP7 : (Group 7 pm_isource) Instruction fetched from L3 event:0X075 counters:5 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP7 : (Group 7 pm_isource) Instruction fetched from L1 event:0X076 counters:6 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP7 : (Group 7 pm_isource) Instructions fetched from prefetch event:0X077 counters:7 um:zero minimum:1000 name:PM_0INST_FETCH_GRP7 : (Group 7 pm_isource) No instructions fetched #Group 8 pm_lsu, Information on the Load Store Unit event:0X080 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP8 : (Group 8 pm_lsu) LRQ unaligned load flushes event:0X081 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP8 : (Group 8 pm_lsu) SRQ unaligned store flushes event:0X082 counters:2 um:zero minimum:10000 name:PM_CYC_GRP8 : (Group 8 pm_lsu) Processor cycles event:0X083 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP8 : (Group 8 pm_lsu) Instructions completed event:0X084 counters:4 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP8 : (Group 8 pm_lsu) SRQ flushes event:0X085 counters:5 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP8 : (Group 8 pm_lsu) LRQ flushes event:0X086 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP8 : (Group 8 pm_lsu) L1 D cache store references event:0X087 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP8 : (Group 8 pm_lsu) L1 D cache load references #Group 9 pm_xlate1, Translation Events event:0X090 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP9 : (Group 9 pm_xlate1) Instruction TLB misses event:0X091 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP9 : (Group 9 pm_xlate1) Data TLB misses event:0X092 counters:2 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP9 : (Group 9 pm_xlate1) Cycles doing data tablewalks event:0X093 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP9 : (Group 9 pm_xlate1) LMQ slot 0 valid event:0X094 counters:4 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP9 : (Group 9 pm_xlate1) Translation written to ierat event:0X095 counters:5 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP9 : (Group 9 pm_xlate1) DERAT misses event:0X096 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP9 : (Group 9 pm_xlate1) Instructions completed event:0X097 counters:7 um:zero minimum:10000 name:PM_CYC_GRP9 : (Group 9 pm_xlate1) Processor cycles #Group 10 pm_xlate2, Translation Events event:0X0A0 counters:0 um:zero minimum:1000 name:PM_ISLB_MISS_GRP10 : (Group 10 pm_xlate2) Instruction SLB misses event:0X0A1 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP10 : (Group 10 pm_xlate2) Data SLB misses event:0X0A2 counters:2 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP10 : (Group 10 pm_xlate2) SRQ sync duration event:0X0A3 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP10 : (Group 10 pm_xlate2) LMQ slot 0 allocated event:0X0A4 counters:4 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP10 : (Group 10 pm_xlate2) Translation written to ierat event:0X0A5 counters:5 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP10 : (Group 10 pm_xlate2) DERAT misses event:0X0A6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP10 : (Group 10 pm_xlate2) Instructions completed event:0X0A7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP10 : (Group 10 pm_xlate2) Processor cycles #Group 11 pm_gps1, L3 Events event:0X0B0 counters:0 um:zero minimum:1000 name:PM_L3B0_DIR_REF_GRP11 : (Group 11 pm_gps1) L3 bank 0 directory references event:0X0B1 counters:1 um:zero minimum:1000 name:PM_L3B0_DIR_MIS_GRP11 : (Group 11 pm_gps1) L3 bank 0 directory misses event:0X0B2 counters:2 um:zero minimum:1000 name:PM_FAB_CMD_ISSUED_GRP11 : (Group 11 pm_gps1) Fabric command issued event:0X0B3 counters:3 um:zero minimum:1000 name:PM_FAB_CMD_RETRIED_GRP11 : (Group 11 pm_gps1) Fabric command retried event:0X0B4 counters:4 um:zero minimum:1000 name:PM_L3B1_DIR_REF_GRP11 : (Group 11 pm_gps1) L3 bank 1 directory references event:0X0B5 counters:5 um:zero minimum:1000 name:PM_L3B1_DIR_MIS_GRP11 : (Group 11 pm_gps1) L3 bank 1 directory misses event:0X0B6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP11 : (Group 11 pm_gps1) Instructions completed event:0X0B7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP11 : (Group 11 pm_gps1) Processor cycles #Group 12 pm_l2a, L2 SliceA events event:0X0C0 counters:0 um:zero minimum:1000 name:PM_L2SA_MOD_TAG_GRP12 : (Group 12 pm_l2a) L2 slice A transition from modified to tagged event:0X0C1 counters:1 um:zero minimum:1000 name:PM_L2SA_SHR_INV_GRP12 : (Group 12 pm_l2a) L2 slice A transition from shared to invalid event:0X0C2 counters:2 um:zero minimum:1000 name:PM_L2SA_ST_REQ_GRP12 : (Group 12 pm_l2a) L2 slice A store requests event:0X0C3 counters:3 um:zero minimum:1000 name:PM_L2SA_ST_HIT_GRP12 : (Group 12 pm_l2a) L2 slice A store hits event:0X0C4 counters:4 um:zero minimum:1000 name:PM_L2SA_SHR_MOD_GRP12 : (Group 12 pm_l2a) L2 slice A transition from shared to modified event:0X0C5 counters:5 um:zero minimum:1000 name:PM_L2SA_MOD_INV_GRP12 : (Group 12 pm_l2a) L2 slice A transition from modified to invalid event:0X0C6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP12 : (Group 12 pm_l2a) Instructions completed event:0X0C7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP12 : (Group 12 pm_l2a) Processor cycles #Group 13 pm_l2b, L2 SliceB events event:0X0D0 counters:0 um:zero minimum:1000 name:PM_L2SB_MOD_TAG_GRP13 : (Group 13 pm_l2b) L2 slice B transition from modified to tagged event:0X0D1 counters:1 um:zero minimum:1000 name:PM_L2SB_SHR_INV_GRP13 : (Group 13 pm_l2b) L2 slice B transition from shared to invalid event:0X0D2 counters:2 um:zero minimum:1000 name:PM_L2SB_ST_REQ_GRP13 : (Group 13 pm_l2b) L2 slice B store requests event:0X0D3 counters:3 um:zero minimum:1000 name:PM_L2SB_ST_HIT_GRP13 : (Group 13 pm_l2b) L2 slice B store hits event:0X0D4 counters:4 um:zero minimum:1000 name:PM_L2SB_SHR_MOD_GRP13 : (Group 13 pm_l2b) L2 slice B transition from shared to modified event:0X0D5 counters:5 um:zero minimum:1000 name:PM_L2SB_MOD_INV_GRP13 : (Group 13 pm_l2b) L2 slice B transition from modified to invalid event:0X0D6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP13 : (Group 13 pm_l2b) Instructions completed event:0X0D7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP13 : (Group 13 pm_l2b) Processor cycles #Group 14 pm_l2c, L2 SliceC events event:0X0E0 counters:0 um:zero minimum:1000 name:PM_L2SC_MOD_TAG_GRP14 : (Group 14 pm_l2c) L2 slice C transition from modified to tagged event:0X0E1 counters:1 um:zero minimum:1000 name:PM_L2SC_SHR_INV_GRP14 : (Group 14 pm_l2c) L2 slice C transition from shared to invalid event:0X0E2 counters:2 um:zero minimum:1000 name:PM_L2SC_ST_REQ_GRP14 : (Group 14 pm_l2c) L2 slice C store requests event:0X0E3 counters:3 um:zero minimum:1000 name:PM_L2SC_ST_HIT_GRP14 : (Group 14 pm_l2c) L2 slice C store hits event:0X0E4 counters:4 um:zero minimum:1000 name:PM_L2SC_SHR_MOD_GRP14 : (Group 14 pm_l2c) L2 slice C transition from shared to modified event:0X0E5 counters:5 um:zero minimum:1000 name:PM_L2SC_MOD_INV_GRP14 : (Group 14 pm_l2c) L2 slice C transition from modified to invalid event:0X0E6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP14 : (Group 14 pm_l2c) Instructions completed event:0X0E7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP14 : (Group 14 pm_l2c) Processor cycles #Group 15 pm_fpu1, Floating Point events event:0X0F0 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP15 : (Group 15 pm_fpu1) FPU executed FDIV instruction event:0X0F1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP15 : (Group 15 pm_fpu1) FPU executed multiply-add instruction event:0X0F2 counters:2 um:zero minimum:1000 name:PM_FPU_FEST_GRP15 : (Group 15 pm_fpu1) FPU executed FEST instruction event:0X0F3 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP15 : (Group 15 pm_fpu1) FPU produced a result event:0X0F4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_fpu1) Processor cycles event:0X0F5 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP15 : (Group 15 pm_fpu1) FPU executed FSQRT instruction event:0X0F6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_fpu1) Instructions completed event:0X0F7 counters:7 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP15 : (Group 15 pm_fpu1) FPU executing FMOV or FEST instructions #Group 16 pm_fpu2, Floating Point events event:0X100 counters:0 um:zero minimum:1000 name:PM_FPU_DENORM_GRP16 : (Group 16 pm_fpu2) FPU received denormalized data event:0X101 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP16 : (Group 16 pm_fpu2) FPU stalled in pipe3 event:0X102 counters:2 um:zero minimum:10000 name:PM_CYC_GRP16 : (Group 16 pm_fpu2) Processor cycles event:0X103 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP16 : (Group 16 pm_fpu2) Instructions completed event:0X104 counters:4 um:zero minimum:1000 name:PM_FPU_ALL_GRP16 : (Group 16 pm_fpu2) FPU executed add, mult, sub, cmp or sel instruction event:0X105 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP16 : (Group 16 pm_fpu2) FPU executed store instruction event:0X106 counters:6 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP16 : (Group 16 pm_fpu2) FPU executed FRSP or FCONV instructions event:0X107 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP16 : (Group 16 pm_fpu2) LSU executed Floating Point load instruction #Group 17 pm_idu1, Instruction Decode Unit events event:0X110 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP17 : (Group 17 pm_idu1) Instructions completed event:0X111 counters:1 um:zero minimum:10000 name:PM_CYC_GRP17 : (Group 17 pm_idu1) Processor cycles event:0X112 counters:2 um:zero minimum:1000 name:PM_1INST_CLB_CYC_GRP17 : (Group 17 pm_idu1) Cycles 1 instruction in CLB event:0X113 counters:3 um:zero minimum:1000 name:PM_2INST_CLB_CYC_GRP17 : (Group 17 pm_idu1) Cycles 2 instructions in CLB event:0X114 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP17 : (Group 17 pm_idu1) One or more PPC instruction completed event:0X115 counters:5 um:zero minimum:10000 name:PM_CYC_GRP17 : (Group 17 pm_idu1) Processor cycles event:0X116 counters:6 um:zero minimum:1000 name:PM_3INST_CLB_CYC_GRP17 : (Group 17 pm_idu1) Cycles 3 instructions in CLB event:0X117 counters:7 um:zero minimum:1000 name:PM_4INST_CLB_CYC_GRP17 : (Group 17 pm_idu1) Cycles 4 instructions in CLB #Group 18 pm_idu2, Instruction Decode Unit events event:0X120 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP18 : (Group 18 pm_idu2) Instructions completed event:0X121 counters:1 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_idu2) Processor cycles event:0X122 counters:2 um:zero minimum:1000 name:PM_5INST_CLB_CYC_GRP18 : (Group 18 pm_idu2) Cycles 5 instructions in CLB event:0X123 counters:3 um:zero minimum:1000 name:PM_6INST_CLB_CYC_GRP18 : (Group 18 pm_idu2) Cycles 6 instructions in CLB event:0X124 counters:4 um:zero minimum:1000 name:PM_GRP_DISP_SUCCESS_GRP18 : (Group 18 pm_idu2) Group dispatch success event:0X125 counters:5 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_idu2) Processor cycles event:0X126 counters:6 um:zero minimum:1000 name:PM_7INST_CLB_CYC_GRP18 : (Group 18 pm_idu2) Cycles 7 instructions in CLB event:0X127 counters:7 um:zero minimum:1000 name:PM_8INST_CLB_CYC_GRP18 : (Group 18 pm_idu2) Cycles 8 instructions in CLB #Group 19 pm_isu_rename, ISU Rename Pool Events event:0X130 counters:0 um:zero minimum:1000 name:PM_XER_MAP_FULL_CYC_GRP19 : (Group 19 pm_isu_rename) Cycles XER mapper full event:0X131 counters:1 um:zero minimum:1000 name:PM_CR_MAP_FULL_CYC_GRP19 : (Group 19 pm_isu_rename) Cycles CR logical operation mapper full event:0X132 counters:2 um:zero minimum:1000 name:PM_CRQ_FULL_CYC_GRP19 : (Group 19 pm_isu_rename) Cycles CR issue queue full event:0X133 counters:3 um:zero minimum:1000 name:PM_GRP_DISP_BLK_SB_CYC_GRP19 : (Group 19 pm_isu_rename) Cycles group dispatch blocked by scoreboard event:0X134 counters:4 um:zero minimum:1000 name:PM_LR_CTR_MAP_FULL_CYC_GRP19 : (Group 19 pm_isu_rename) Cycles LR/CTR mapper full event:0X135 counters:5 um:zero minimum:1000 name:PM_INST_DISP_GRP19 : (Group 19 pm_isu_rename) Instructions dispatched event:0X136 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP19 : (Group 19 pm_isu_rename) Instructions completed event:0X137 counters:7 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_isu_rename) Processor cycles #Group 20 pm_isu_queues1, ISU Queue Full Events event:0X140 counters:0 um:zero minimum:1000 name:PM_FPU0_FULL_CYC_GRP20 : (Group 20 pm_isu_queues1) Cycles FPU0 issue queue full event:0X141 counters:1 um:zero minimum:1000 name:PM_FPU1_FULL_CYC_GRP20 : (Group 20 pm_isu_queues1) Cycles FPU1 issue queue full event:0X142 counters:2 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP20 : (Group 20 pm_isu_queues1) Cycles FXU0/LS0 queue full event:0X143 counters:3 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP20 : (Group 20 pm_isu_queues1) Cycles FXU1/LS1 queue full event:0X144 counters:4 um:zero minimum:10000 name:PM_CYC_GRP20 : (Group 20 pm_isu_queues1) Processor cycles event:0X145 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP20 : (Group 20 pm_isu_queues1) Instructions completed event:0X146 counters:6 um:zero minimum:1000 name:PM_LSU_LRQ_FULL_CYC_GRP20 : (Group 20 pm_isu_queues1) Cycles LRQ full event:0X147 counters:7 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP20 : (Group 20 pm_isu_queues1) Cycles SRQ full #Group 21 pm_isu_flow, ISU Instruction Flow Events event:0X150 counters:0 um:zero minimum:1000 name:PM_INST_DISP_GRP21 : (Group 21 pm_isu_flow) Instructions dispatched event:0X151 counters:1 um:zero minimum:10000 name:PM_CYC_GRP21 : (Group 21 pm_isu_flow) Processor cycles event:0X152 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP21 : (Group 21 pm_isu_flow) FXU0 produced a result event:0X153 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP21 : (Group 21 pm_isu_flow) FXU1 produced a result event:0X154 counters:4 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP21 : (Group 21 pm_isu_flow) Group dispatch valid event:0X155 counters:5 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP21 : (Group 21 pm_isu_flow) Group dispatch rejected event:0X156 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP21 : (Group 21 pm_isu_flow) Instructions completed event:0X157 counters:7 um:zero minimum:10000 name:PM_CYC_GRP21 : (Group 21 pm_isu_flow) Processor cycles #Group 22 pm_isu_work, ISU Indicators of Work Blockage event:0X160 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP22 : (Group 22 pm_isu_work) Cycles GCT empty event:0X161 counters:1 um:zero minimum:1000 name:PM_WORK_HELD_GRP22 : (Group 22 pm_isu_work) Work held event:0X162 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP22 : (Group 22 pm_isu_work) Completion stopped event:0X163 counters:3 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP22 : (Group 22 pm_isu_work) Cycles MSR(EE) bit off and external interrupt pending event:0X164 counters:4 um:zero minimum:10000 name:PM_CYC_GRP22 : (Group 22 pm_isu_work) Processor cycles event:0X165 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP22 : (Group 22 pm_isu_work) Instructions completed event:0X166 counters:6 um:zero minimum:1000 name:PM_EE_OFF_GRP22 : (Group 22 pm_isu_work) Cycles MSR(EE) bit off event:0X167 counters:7 um:zero minimum:1000 name:PM_EXT_INT_GRP22 : (Group 22 pm_isu_work) External interrupts #Group 23 pm_serialize, LSU Serializing Events event:0X170 counters:0 um:zero minimum:1000 name:PM_SNOOP_TLBIE_GRP23 : (Group 23 pm_serialize) Snoop TLBIE event:0X171 counters:1 um:zero minimum:1000 name:PM_STCX_FAIL_GRP23 : (Group 23 pm_serialize) STCX failed event:0X172 counters:2 um:zero minimum:1000 name:PM_STCX_PASS_GRP23 : (Group 23 pm_serialize) Stcx passes event:0X173 counters:3 um:zero minimum:10000 name:PM_CYC_GRP23 : (Group 23 pm_serialize) Processor cycles event:0X174 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP23 : (Group 23 pm_serialize) One or more PPC instruction completed event:0X175 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP23 : (Group 23 pm_serialize) Instructions completed event:0X176 counters:6 um:zero minimum:1000 name:PM_LARX_LSU0_GRP23 : (Group 23 pm_serialize) Larx executed on LSU0 event:0X177 counters:7 um:zero minimum:1000 name:PM_LARX_LSU1_GRP23 : (Group 23 pm_serialize) Larx executed on LSU1 #Group 24 pm_lsubusy, LSU Busy Events event:0X180 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP24 : (Group 24 pm_lsubusy) SRQ slot 0 valid event:0X181 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP24 : (Group 24 pm_lsubusy) SRQ slot 0 allocated event:0X182 counters:2 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP24 : (Group 24 pm_lsubusy) LSU0 busy event:0X183 counters:3 um:zero minimum:1000 name:PM_LSU1_BUSY_GRP24 : (Group 24 pm_lsubusy) LSU1 busy event:0X184 counters:4 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP24 : (Group 24 pm_lsubusy) LRQ slot 0 valid event:0X185 counters:5 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP24 : (Group 24 pm_lsubusy) LRQ slot 0 allocated event:0X186 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP24 : (Group 24 pm_lsubusy) Instructions completed event:0X187 counters:7 um:zero minimum:10000 name:PM_CYC_GRP24 : (Group 24 pm_lsubusy) Processor cycles #Group 25 pm_lsource2, Information on data source event:0X190 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP25 : (Group 25 pm_lsource2) Instructions completed event:0X191 counters:1 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP25 : (Group 25 pm_lsource2) L1 reload data source valid event:0X192 counters:2 um:zero minimum:10000 name:PM_CYC_GRP25 : (Group 25 pm_lsource2) Processor cycles event:0X193 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP25 : (Group 25 pm_lsource2) Data loaded from L2 event:0X194 counters:4 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP25 : (Group 25 pm_lsource2) Data loaded from L2.5 shared event:0X195 counters:5 um:zero minimum:1000 name:PM_DATA_FROM_L275_SHR_GRP25 : (Group 25 pm_lsource2) Data loaded from L2.75 shared event:0X196 counters:6 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP25 : (Group 25 pm_lsource2) Data loaded from L2.75 modified event:0X197 counters:7 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP25 : (Group 25 pm_lsource2) Data loaded from L2.5 modified #Group 26 pm_lsource3, Information on data source event:0X1A0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP26 : (Group 26 pm_lsource3) Data loaded from L3 event:0X1A1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP26 : (Group 26 pm_lsource3) Data loaded from memory event:0X1A2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L35_GRP26 : (Group 26 pm_lsource3) Data loaded from L3.5 event:0X1A3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP26 : (Group 26 pm_lsource3) Data loaded from L2 event:0X1A4 counters:4 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP26 : (Group 26 pm_lsource3) L1 reload data source valid event:0X1A5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP26 : (Group 26 pm_lsource3) Processor cycles event:0X1A6 counters:6 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP26 : (Group 26 pm_lsource3) Data loaded from L2.75 modified event:0X1A7 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP26 : (Group 26 pm_lsource3) Instructions completed #Group 27 pm_isource2, Instruction Source information event:0X1B0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP27 : (Group 27 pm_isource2) Instructions completed event:0X1B1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP27 : (Group 27 pm_isource2) Processor cycles event:0X1B2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP27 : (Group 27 pm_isource2) Instructions fetched from L2 event:0X1B3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L35_GRP27 : (Group 27 pm_isource2) Instructions fetched from L3.5 event:0X1B4 counters:4 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP27 : (Group 27 pm_isource2) Instruction fetched from L3 event:0X1B5 counters:5 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP27 : (Group 27 pm_isource2) Instruction fetched from L1 event:0X1B6 counters:6 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP27 : (Group 27 pm_isource2) Instructions fetched from prefetch event:0X1B7 counters:7 um:zero minimum:1000 name:PM_0INST_FETCH_GRP27 : (Group 27 pm_isource2) No instructions fetched #Group 28 pm_isource3, Instruction Source information event:0X1C0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP28 : (Group 28 pm_isource3) Instruction fetched from memory event:0X1C1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L25_L275_GRP28 : (Group 28 pm_isource3) Instruction fetched from L2.5/L2.75 event:0X1C2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP28 : (Group 28 pm_isource3) Instructions fetched from L2 event:0X1C3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L35_GRP28 : (Group 28 pm_isource3) Instructions fetched from L3.5 event:0X1C4 counters:4 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP28 : (Group 28 pm_isource3) Instruction fetched from L3 event:0X1C5 counters:5 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP28 : (Group 28 pm_isource3) Instruction fetched from L1 event:0X1C6 counters:6 um:zero minimum:10000 name:PM_CYC_GRP28 : (Group 28 pm_isource3) Processor cycles event:0X1C7 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_isource3) Instructions completed #Group 29 pm_fpu3, Floating Point events by unit event:0X1D0 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP29 : (Group 29 pm_fpu3) FPU0 executed FDIV instruction event:0X1D1 counters:1 um:zero minimum:1000 name:PM_FPU1_FDIV_GRP29 : (Group 29 pm_fpu3) FPU1 executed FDIV instruction event:0X1D2 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP29 : (Group 29 pm_fpu3) FPU0 executed FRSP or FCONV instructions event:0X1D3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP29 : (Group 29 pm_fpu3) FPU1 executed FRSP or FCONV instructions event:0X1D4 counters:4 um:zero minimum:1000 name:PM_FPU0_FMA_GRP29 : (Group 29 pm_fpu3) FPU0 executed multiply-add instruction event:0X1D5 counters:5 um:zero minimum:1000 name:PM_FPU1_FMA_GRP29 : (Group 29 pm_fpu3) FPU1 executed multiply-add instruction event:0X1D6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP29 : (Group 29 pm_fpu3) Instructions completed event:0X1D7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP29 : (Group 29 pm_fpu3) Processor cycles #Group 30 pm_fpu4, Floating Point events by unit event:0X1E0 counters:0 um:zero minimum:1000 name:PM_FPU0_FSQRT_GRP30 : (Group 30 pm_fpu4) FPU0 executed FSQRT instruction event:0X1E1 counters:1 um:zero minimum:1000 name:PM_FPU1_FSQRT_GRP30 : (Group 30 pm_fpu4) FPU1 executed FSQRT instruction event:0X1E2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP30 : (Group 30 pm_fpu4) FPU0 produced a result event:0X1E3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP30 : (Group 30 pm_fpu4) FPU1 produced a result event:0X1E4 counters:4 um:zero minimum:1000 name:PM_FPU0_ALL_GRP30 : (Group 30 pm_fpu4) FPU0 executed add, mult, sub, cmp or sel instruction event:0X1E5 counters:5 um:zero minimum:1000 name:PM_FPU1_ALL_GRP30 : (Group 30 pm_fpu4) FPU1 executed add, mult, sub, cmp or sel instruction event:0X1E6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP30 : (Group 30 pm_fpu4) Instructions completed event:0X1E7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP30 : (Group 30 pm_fpu4) Processor cycles #Group 31 pm_fpu5, Floating Point events by unit event:0X1F0 counters:0 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP31 : (Group 31 pm_fpu5) FPU0 received denormalized data event:0X1F1 counters:1 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP31 : (Group 31 pm_fpu5) FPU1 received denormalized data event:0X1F2 counters:2 um:zero minimum:1000 name:PM_FPU0_FMOV_FEST_GRP31 : (Group 31 pm_fpu5) FPU0 executed FMOV or FEST instructions event:0X1F3 counters:3 um:zero minimum:1000 name:PM_FPU1_FMOV_FEST_GRP31 : (Group 31 pm_fpu5) FPU1 executing FMOV or FEST instructions event:0X1F4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP31 : (Group 31 pm_fpu5) Processor cycles event:0X1F5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_fpu5) Instructions completed event:0X1F6 counters:6 um:zero minimum:1000 name:PM_FPU0_FEST_GRP31 : (Group 31 pm_fpu5) FPU0 executed FEST instruction event:0X1F7 counters:7 um:zero minimum:1000 name:PM_FPU1_FEST_GRP31 : (Group 31 pm_fpu5) FPU1 executed FEST instruction #Group 32 pm_fpu6, Floating Point events by unit event:0X200 counters:0 um:zero minimum:1000 name:PM_FPU0_SINGLE_GRP32 : (Group 32 pm_fpu6) FPU0 executed single precision instruction event:0X201 counters:1 um:zero minimum:1000 name:PM_FPU1_SINGLE_GRP32 : (Group 32 pm_fpu6) FPU1 executed single precision instruction event:0X202 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP32 : (Group 32 pm_fpu6) LSU0 executed Floating Point load instruction event:0X203 counters:3 um:zero minimum:1000 name:PM_LSU1_LDF_GRP32 : (Group 32 pm_fpu6) LSU1 executed Floating Point load instruction event:0X204 counters:4 um:zero minimum:1000 name:PM_FPU0_STF_GRP32 : (Group 32 pm_fpu6) FPU0 executed store instruction event:0X205 counters:5 um:zero minimum:1000 name:PM_FPU1_STF_GRP32 : (Group 32 pm_fpu6) FPU1 executed store instruction event:0X206 counters:6 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_fpu6) Processor cycles event:0X207 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_fpu6) Instructions completed #Group 33 pm_fpu7, Floating Point events by unit event:0X210 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP33 : (Group 33 pm_fpu7) FPU0 stalled in pipe3 event:0X211 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP33 : (Group 33 pm_fpu7) FPU1 stalled in pipe3 event:0X212 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP33 : (Group 33 pm_fpu7) FPU0 produced a result event:0X213 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP33 : (Group 33 pm_fpu7) FPU1 produced a result event:0X214 counters:4 um:zero minimum:10000 name:PM_CYC_GRP33 : (Group 33 pm_fpu7) Processor cycles event:0X215 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP33 : (Group 33 pm_fpu7) Instructions completed event:0X216 counters:6 um:zero minimum:10000 name:PM_CYC_GRP33 : (Group 33 pm_fpu7) Processor cycles event:0X217 counters:7 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP33 : (Group 33 pm_fpu7) FPU0 executed FPSCR instruction #Group 34 pm_fxu, Fix Point Unit events event:0X220 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP34 : (Group 34 pm_fxu) Instructions completed event:0X221 counters:1 um:zero minimum:10000 name:PM_CYC_GRP34 : (Group 34 pm_fxu) Processor cycles event:0X222 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP34 : (Group 34 pm_fxu) FXU produced a result event:0X223 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP34 : (Group 34 pm_fxu) FXU1 busy FXU0 idle event:0X224 counters:4 um:zero minimum:1000 name:PM_FXU_IDLE_GRP34 : (Group 34 pm_fxu) FXU idle event:0X225 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP34 : (Group 34 pm_fxu) FXU busy event:0X226 counters:6 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP34 : (Group 34 pm_fxu) FXU0 busy FXU1 idle event:0X227 counters:7 um:zero minimum:1000 name:PM_FXLS_FULL_CYC_GRP34 : (Group 34 pm_fxu) Cycles FXLS queue is full #Group 35 pm_lsu_lmq, LSU Load Miss Queue Events event:0X230 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_LHR_MERGE_GRP35 : (Group 35 pm_lsu_lmq) LMQ LHR merges event:0X231 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP35 : (Group 35 pm_lsu_lmq) Cycles LMQ full event:0X232 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP35 : (Group 35 pm_lsu_lmq) LMQ slot 0 allocated event:0X233 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP35 : (Group 35 pm_lsu_lmq) LMQ slot 0 valid event:0X234 counters:4 um:zero minimum:10000 name:PM_CYC_GRP35 : (Group 35 pm_lsu_lmq) Processor cycles event:0X235 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP35 : (Group 35 pm_lsu_lmq) Instructions completed event:0X236 counters:6 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP35 : (Group 35 pm_lsu_lmq) SRQ sync duration event:0X237 counters:7 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP35 : (Group 35 pm_lsu_lmq) Cycles doing data tablewalks #Group 36 pm_lsu_flush, LSU Flush Events event:0X240 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP36 : (Group 36 pm_lsu_flush) LSU0 LRQ flushes event:0X241 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP36 : (Group 36 pm_lsu_flush) LSU1 LRQ flushes event:0X242 counters:2 um:zero minimum:10000 name:PM_CYC_GRP36 : (Group 36 pm_lsu_flush) Processor cycles event:0X243 counters:3 um:zero minimum:10000 name:PM_CYC_GRP36 : (Group 36 pm_lsu_flush) Processor cycles event:0X244 counters:4 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP36 : (Group 36 pm_lsu_flush) LSU0 SRQ flushes event:0X245 counters:5 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP36 : (Group 36 pm_lsu_flush) LSU1 SRQ flushes event:0X246 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP36 : (Group 36 pm_lsu_flush) Instructions completed event:0X247 counters:7 um:zero minimum:10000 name:PM_CYC_GRP36 : (Group 36 pm_lsu_flush) Processor cycles #Group 37 pm_lsu_load1, LSU Load Events event:0X250 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_load1) LSU0 unaligned load flushes event:0X251 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_load1) LSU1 unaligned load flushes event:0X252 counters:2 um:zero minimum:1000 name:PM_LD_REF_L1_LSU0_GRP37 : (Group 37 pm_lsu_load1) LSU0 L1 D cache load references event:0X253 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_LSU1_GRP37 : (Group 37 pm_lsu_load1) LSU1 L1 D cache load references event:0X254 counters:4 um:zero minimum:10000 name:PM_CYC_GRP37 : (Group 37 pm_lsu_load1) Processor cycles event:0X255 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP37 : (Group 37 pm_lsu_load1) Instructions completed event:0X256 counters:6 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP37 : (Group 37 pm_lsu_load1) LSU0 L1 D cache load misses event:0X257 counters:7 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP37 : (Group 37 pm_lsu_load1) LSU1 L1 D cache load misses #Group 38 pm_lsu_store1, LSU Store Events event:0X260 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP38 : (Group 38 pm_lsu_store1) LSU0 unaligned store flushes event:0X261 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP38 : (Group 38 pm_lsu_store1) LSU1 unaligned store flushes event:0X262 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP38 : (Group 38 pm_lsu_store1) LSU0 L1 D cache store references event:0X263 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP38 : (Group 38 pm_lsu_store1) LSU1 L1 D cache store references event:0X264 counters:4 um:zero minimum:10000 name:PM_CYC_GRP38 : (Group 38 pm_lsu_store1) Processor cycles event:0X265 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP38 : (Group 38 pm_lsu_store1) Instructions completed event:0X266 counters:6 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP38 : (Group 38 pm_lsu_store1) L1 D cache store misses event:0X267 counters:7 um:zero minimum:1000 name:PM_DC_INV_L2_GRP38 : (Group 38 pm_lsu_store1) L1 D cache entries invalidated from L2 #Group 39 pm_lsu_store2, LSU Store Events event:0X270 counters:0 um:zero minimum:1000 name:PM_LSU0_SRQ_STFWD_GRP39 : (Group 39 pm_lsu_store2) LSU0 SRQ store forwarded event:0X271 counters:1 um:zero minimum:1000 name:PM_LSU1_SRQ_STFWD_GRP39 : (Group 39 pm_lsu_store2) LSU1 SRQ store forwarded event:0X272 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP39 : (Group 39 pm_lsu_store2) LSU0 L1 D cache store references event:0X273 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP39 : (Group 39 pm_lsu_store2) LSU1 L1 D cache store references event:0X274 counters:4 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP39 : (Group 39 pm_lsu_store2) L1 D cache store misses event:0X275 counters:5 um:zero minimum:10000 name:PM_CYC_GRP39 : (Group 39 pm_lsu_store2) Processor cycles event:0X276 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP39 : (Group 39 pm_lsu_store2) Instructions completed event:0X277 counters:7 um:zero minimum:10000 name:PM_CYC_GRP39 : (Group 39 pm_lsu_store2) Processor cycles #Group 40 pm_lsu7, Information on the Load Store Unit event:0X280 counters:0 um:zero minimum:1000 name:PM_LSU0_DERAT_MISS_GRP40 : (Group 40 pm_lsu7) LSU0 DERAT misses event:0X281 counters:1 um:zero minimum:1000 name:PM_LSU1_DERAT_MISS_GRP40 : (Group 40 pm_lsu7) LSU1 DERAT misses event:0X282 counters:2 um:zero minimum:10000 name:PM_CYC_GRP40 : (Group 40 pm_lsu7) Processor cycles event:0X283 counters:3 um:zero minimum:10000 name:PM_CYC_GRP40 : (Group 40 pm_lsu7) Processor cycles event:0X284 counters:4 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP40 : (Group 40 pm_lsu7) L1 reload data source valid event:0X285 counters:5 um:zero minimum:10000 name:PM_CYC_GRP40 : (Group 40 pm_lsu7) Processor cycles event:0X286 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP40 : (Group 40 pm_lsu7) Instructions completed event:0X287 counters:7 um:zero minimum:10000 name:PM_CYC_GRP40 : (Group 40 pm_lsu7) Processor cycles #Group 41 pm_dpfetch, Data Prefetch Events event:0X290 counters:0 um:zero minimum:1000 name:PM_DC_PREF_STREAM_ALLOC_GRP41 : (Group 41 pm_dpfetch) D cache new prefetch stream allocated event:0X291 counters:1 um:zero minimum:1000 name:PM_DC_PREF_L2_CLONE_L3_GRP41 : (Group 41 pm_dpfetch) L2 prefetch cloned with L3 event:0X292 counters:2 um:zero minimum:1000 name:PM_L2_PREF_GRP41 : (Group 41 pm_dpfetch) L2 cache prefetches event:0X293 counters:3 um:zero minimum:1000 name:PM_L1_PREF_GRP41 : (Group 41 pm_dpfetch) L1 cache data prefetches event:0X294 counters:4 um:zero minimum:10000 name:PM_CYC_GRP41 : (Group 41 pm_dpfetch) Processor cycles event:0X295 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP41 : (Group 41 pm_dpfetch) Instructions completed event:0X296 counters:6 um:zero minimum:10000 name:PM_CYC_GRP41 : (Group 41 pm_dpfetch) Processor cycles event:0X297 counters:7 um:zero minimum:1000 name:PM_DC_PREF_OUT_STREAMS_GRP41 : (Group 41 pm_dpfetch) Out of prefetch streams #Group 42 pm_misc, Misc Events for testing event:0X2A0 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP42 : (Group 42 pm_misc) Cycles GCT empty event:0X2A1 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP42 : (Group 42 pm_misc) Cycles LMQ and SRQ empty event:0X2A2 counters:2 um:zero minimum:1000 name:PM_HV_CYC_GRP42 : (Group 42 pm_misc) Hypervisor Cycles event:0X2A3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP42 : (Group 42 pm_misc) Processor cycles event:0X2A4 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP42 : (Group 42 pm_misc) One or more PPC instruction completed event:0X2A5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP42 : (Group 42 pm_misc) Instructions completed event:0X2A6 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP42 : (Group 42 pm_misc) Group completed event:0X2A7 counters:7 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP42 : (Group 42 pm_misc) Time Base bit transition #Group 43 pm_mark1, Information on marked instructions event:0X2B0 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP43 : (Group 43 pm_mark1) Marked L1 D cache load misses event:0X2B1 counters:1 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP43 : (Group 43 pm_mark1) Threshold timeout event:0X2B2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP43 : (Group 43 pm_mark1) Processor cycles event:0X2B3 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP43 : (Group 43 pm_mark1) Marked group completed event:0X2B4 counters:4 um:zero minimum:1000 name:PM_GRP_MRK_GRP43 : (Group 43 pm_mark1) Group marked in IDU event:0X2B5 counters:5 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP43 : (Group 43 pm_mark1) Marked group issued event:0X2B6 counters:6 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP43 : (Group 43 pm_mark1) Marked instruction finished event:0X2B7 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP43 : (Group 43 pm_mark1) Instructions completed #Group 44 pm_mark2, Marked Instructions Processing Flow event:0X2C0 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP44 : (Group 44 pm_mark2) Marked group dispatched event:0X2C1 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP44 : (Group 44 pm_mark2) Marked instruction BRU processing finished event:0X2C2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP44 : (Group 44 pm_mark2) Processor cycles event:0X2C3 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP44 : (Group 44 pm_mark2) Marked instruction CRU processing finished event:0X2C4 counters:4 um:zero minimum:1000 name:PM_GRP_MRK_GRP44 : (Group 44 pm_mark2) Group marked in IDU event:0X2C5 counters:5 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP44 : (Group 44 pm_mark2) Marked instruction FXU processing finished event:0X2C6 counters:6 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP44 : (Group 44 pm_mark2) Marked instruction FPU processing finished event:0X2C7 counters:7 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP44 : (Group 44 pm_mark2) Marked instruction LSU processing finished #Group 45 pm_mark3, Marked Stores Processing Flow event:0X2D0 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP45 : (Group 45 pm_mark3) Marked store instruction completed event:0X2D1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP45 : (Group 45 pm_mark3) Processor cycles event:0X2D2 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP45 : (Group 45 pm_mark3) Marked store completed with intervention event:0X2D3 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP45 : (Group 45 pm_mark3) Marked group completed event:0X2D4 counters:4 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP45 : (Group 45 pm_mark3) Marked group completion timeout event:0X2D5 counters:5 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP45 : (Group 45 pm_mark3) Marked store sent to GPS event:0X2D6 counters:6 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP45 : (Group 45 pm_mark3) Marked instruction valid in SRQ event:0X2D7 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP45 : (Group 45 pm_mark3) Instructions completed #Group 46 pm_mark4, Marked Loads Processing FLow event:0X2E0 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP46 : (Group 46 pm_mark4) Marked L1 D cache load misses event:0X2E1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP46 : (Group 46 pm_mark4) Processor cycles event:0X2E2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP46 : (Group 46 pm_mark4) Marked LRQ flushes event:0X2E3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP46 : (Group 46 pm_mark4) Marked SRQ flushes event:0X2E4 counters:4 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP46 : (Group 46 pm_mark4) Marked group completion timeout event:0X2E5 counters:5 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP46 : (Group 46 pm_mark4) Marked group issued event:0X2E6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP46 : (Group 46 pm_mark4) Instructions completed event:0X2E7 counters:7 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_ULD_GRP46 : (Group 46 pm_mark4) Marked unaligned load flushes #Group 47 pm_mark_lsource, Information on marked data source event:0X2F0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L3 event:0X2F1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_MEM_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from memory event:0X2F2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L3.5 event:0X2F3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L2 event:0X2F4 counters:4 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L2.5 shared event:0X2F5 counters:5 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L2.75 shared event:0X2F6 counters:6 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L2.75 modified event:0X2F7 counters:7 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP47 : (Group 47 pm_mark_lsource) Marked data loaded from L2.5 modified #Group 48 pm_mark_lsource2, Information on marked data source event:0X300 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP48 : (Group 48 pm_mark_lsource2) Instructions completed event:0X301 counters:1 um:zero minimum:10000 name:PM_CYC_GRP48 : (Group 48 pm_mark_lsource2) Processor cycles event:0X302 counters:2 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP48 : (Group 48 pm_mark_lsource2) Marked L1 reload data source valid event:0X303 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP48 : (Group 48 pm_mark_lsource2) Marked data loaded from L2 event:0X304 counters:4 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP48 : (Group 48 pm_mark_lsource2) Marked data loaded from L2.5 shared event:0X305 counters:5 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_GRP48 : (Group 48 pm_mark_lsource2) Marked data loaded from L2.75 shared event:0X306 counters:6 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP48 : (Group 48 pm_mark_lsource2) Marked data loaded from L2.75 modified event:0X307 counters:7 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP48 : (Group 48 pm_mark_lsource2) Marked data loaded from L2.5 modified #Group 49 pm_mark_lsource3, Information on marked data source event:0X310 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP49 : (Group 49 pm_mark_lsource3) Marked data loaded from L3 event:0X311 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_MEM_GRP49 : (Group 49 pm_mark_lsource3) Marked data loaded from memory event:0X312 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_GRP49 : (Group 49 pm_mark_lsource3) Marked data loaded from L3.5 event:0X313 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP49 : (Group 49 pm_mark_lsource3) Marked data loaded from L2 event:0X314 counters:4 um:zero minimum:10000 name:PM_CYC_GRP49 : (Group 49 pm_mark_lsource3) Processor cycles event:0X315 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP49 : (Group 49 pm_mark_lsource3) Instructions completed event:0X316 counters:6 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP49 : (Group 49 pm_mark_lsource3) Marked data loaded from L2.75 modified event:0X317 counters:7 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP49 : (Group 49 pm_mark_lsource3) Marked L1 reload data source valid #Group 50 pm_lsu_mark1, Load Store Unit Marked Events event:0X320 counters:0 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP50 : (Group 50 pm_lsu_mark1) Marked L1 D cache store misses event:0X321 counters:1 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP50 : (Group 50 pm_lsu_mark1) Marked IMR reloaded event:0X322 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_ULD_GRP50 : (Group 50 pm_lsu_mark1) LSU0 marked unaligned load flushes event:0X323 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_ULD_GRP50 : (Group 50 pm_lsu_mark1) LSU1 marked unaligned load flushes event:0X324 counters:4 um:zero minimum:10000 name:PM_CYC_GRP50 : (Group 50 pm_lsu_mark1) Processor cycles event:0X325 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP50 : (Group 50 pm_lsu_mark1) Instructions completed event:0X326 counters:6 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_UST_GRP50 : (Group 50 pm_lsu_mark1) LSU0 marked unaligned store flushes event:0X327 counters:7 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_UST_GRP50 : (Group 50 pm_lsu_mark1) LSU1 marked unaligned store flushes #Group 51 pm_lsu_mark2, Load Store Unit Marked Events event:0X330 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU0_GRP51 : (Group 51 pm_lsu_mark2) LSU0 L1 D cache load misses event:0X331 counters:1 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU1_GRP51 : (Group 51 pm_lsu_mark2) LSU1 L1 D cache load misses event:0X332 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_LRQ_GRP51 : (Group 51 pm_lsu_mark2) LSU0 marked LRQ flushes event:0X333 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_LRQ_GRP51 : (Group 51 pm_lsu_mark2) LSU1 marked LRQ flushes event:0X334 counters:4 um:zero minimum:10000 name:PM_CYC_GRP51 : (Group 51 pm_lsu_mark2) Processor cycles event:0X335 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP51 : (Group 51 pm_lsu_mark2) Instructions completed event:0X336 counters:6 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_SRQ_GRP51 : (Group 51 pm_lsu_mark2) LSU0 marked SRQ flushes event:0X337 counters:7 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_SRQ_GRP51 : (Group 51 pm_lsu_mark2) LSU1 marked SRQ flushes #Group 52 pm_lsu_mark3, Load Store Unit Marked Events event:0X340 counters:0 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP52 : (Group 52 pm_lsu_mark3) Marked STCX failed event:0X341 counters:1 um:zero minimum:10000 name:PM_CYC_GRP52 : (Group 52 pm_lsu_mark3) Processor cycles event:0X342 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_INST_FIN_GRP52 : (Group 52 pm_lsu_mark3) LSU0 finished a marked instruction event:0X343 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_INST_FIN_GRP52 : (Group 52 pm_lsu_mark3) LSU1 finished a marked instruction event:0X344 counters:4 um:zero minimum:10000 name:PM_CYC_GRP52 : (Group 52 pm_lsu_mark3) Processor cycles event:0X345 counters:5 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP52 : (Group 52 pm_lsu_mark3) Marked group issued event:0X346 counters:6 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP52 : (Group 52 pm_lsu_mark3) Marked instruction finished event:0X347 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP52 : (Group 52 pm_lsu_mark3) Instructions completed #Group 53 pm_threshold, Group for pipeline threshold studies event:0X350 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_LHR_MERGE_GRP53 : (Group 53 pm_threshold) LMQ LHR merges event:0X351 counters:1 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP53 : (Group 53 pm_threshold) Threshold timeout event:0X352 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP53 : (Group 53 pm_threshold) LMQ slot 0 valid event:0X353 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP53 : (Group 53 pm_threshold) Instructions completed event:0X354 counters:4 um:zero minimum:10000 name:PM_CYC_GRP53 : (Group 53 pm_threshold) Processor cycles event:0X355 counters:5 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP53 : (Group 53 pm_threshold) Marked group issued event:0X356 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP53 : (Group 53 pm_threshold) Group completed event:0X357 counters:7 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP53 : (Group 53 pm_threshold) LMQ slot 0 allocated #Group 54 pm_pe_bench1, PE Benchmarker group for FP analysis event:0X360 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP54 : (Group 54 pm_pe_bench1) FPU executed FDIV instruction event:0X361 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP54 : (Group 54 pm_pe_bench1) FPU executed multiply-add instruction event:0X362 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP54 : (Group 54 pm_pe_bench1) FXU produced a result event:0X363 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP54 : (Group 54 pm_pe_bench1) FPU produced a result event:0X364 counters:4 um:zero minimum:10000 name:PM_CYC_GRP54 : (Group 54 pm_pe_bench1) Processor cycles event:0X365 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP54 : (Group 54 pm_pe_bench1) FPU executed FSQRT instruction event:0X366 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP54 : (Group 54 pm_pe_bench1) Instructions completed event:0X367 counters:7 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP54 : (Group 54 pm_pe_bench1) FPU executing FMOV or FEST instructions #Group 55 pm_pe_bench2, PE Benchmarker group for FP stalls analysis event:0X370 counters:0 um:zero minimum:10000 name:PM_CYC_GRP55 : (Group 55 pm_pe_bench2) Processor cycles event:0X371 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP55 : (Group 55 pm_pe_bench2) FPU stalled in pipe3 event:0X372 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP55 : (Group 55 pm_pe_bench2) FPU0 produced a result event:0X373 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP55 : (Group 55 pm_pe_bench2) Instructions completed event:0X374 counters:4 um:zero minimum:1000 name:PM_FPU_FULL_CYC_GRP55 : (Group 55 pm_pe_bench2) Cycles FPU issue queue full event:0X375 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP55 : (Group 55 pm_pe_bench2) FPU executed store instruction event:0X376 counters:6 um:zero minimum:1000 name:PM_FPU1_FIN_GRP55 : (Group 55 pm_pe_bench2) FPU1 produced a result event:0X377 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP55 : (Group 55 pm_pe_bench2) LSU executed Floating Point load instruction #Group 56 pm_pe_bench3, PE Benchmarker group for branch analysis event:0X380 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP56 : (Group 56 pm_pe_bench3) Instructions completed event:0X381 counters:1 um:zero minimum:1000 name:PM_BIQ_IDU_FULL_CYC_GRP56 : (Group 56 pm_pe_bench3) Cycles BIQ or IDU full event:0X382 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP56 : (Group 56 pm_pe_bench3) Branches issued event:0X383 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP56 : (Group 56 pm_pe_bench3) Branch mispredictions due CR bit setting event:0X384 counters:4 um:zero minimum:1000 name:PM_BRQ_FULL_CYC_GRP56 : (Group 56 pm_pe_bench3) Cycles branch queue full event:0X385 counters:5 um:zero minimum:10000 name:PM_CYC_GRP56 : (Group 56 pm_pe_bench3) Processor cycles event:0X386 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP56 : (Group 56 pm_pe_bench3) Branch mispredictions due to target address event:0X387 counters:7 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP56 : (Group 56 pm_pe_bench3) Cycles writing to instruction L1 #Group 57 pm_pe_bench4, PE Benchmarker group for L1 and TLB analysis event:0X390 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP57 : (Group 57 pm_pe_bench4) Data TLB misses event:0X391 counters:1 um:zero minimum:1000 name:PM_ITLB_MISS_GRP57 : (Group 57 pm_pe_bench4) Instruction TLB misses event:0X392 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP57 : (Group 57 pm_pe_bench4) L1 D cache load misses event:0X393 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP57 : (Group 57 pm_pe_bench4) L1 D cache store misses event:0X394 counters:4 um:zero minimum:10000 name:PM_CYC_GRP57 : (Group 57 pm_pe_bench4) Processor cycles event:0X395 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP57 : (Group 57 pm_pe_bench4) Instructions completed event:0X396 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP57 : (Group 57 pm_pe_bench4) L1 D cache store references event:0X397 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP57 : (Group 57 pm_pe_bench4) L1 D cache load references #Group 58 pm_pe_bench5, PE Benchmarker group for L2 analysis event:0X3A0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP58 : (Group 58 pm_pe_bench5) Instructions completed event:0X3A1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP58 : (Group 58 pm_pe_bench5) Processor cycles event:0X3A2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L35_GRP58 : (Group 58 pm_pe_bench5) Data loaded from L3.5 event:0X3A3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP58 : (Group 58 pm_pe_bench5) Data loaded from L2 event:0X3A4 counters:4 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP58 : (Group 58 pm_pe_bench5) Data loaded from L2.5 shared event:0X3A5 counters:5 um:zero minimum:1000 name:PM_DATA_FROM_L275_SHR_GRP58 : (Group 58 pm_pe_bench5) Data loaded from L2.75 shared event:0X3A6 counters:6 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP58 : (Group 58 pm_pe_bench5) Data loaded from L2.75 modified event:0X3A7 counters:7 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP58 : (Group 58 pm_pe_bench5) Data loaded from L2.5 modified #Group 59 pm_pe_bench6, PE Benchmarker group for L3 analysis event:0X3B0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP59 : (Group 59 pm_pe_bench6) Data loaded from L3 event:0X3B1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP59 : (Group 59 pm_pe_bench6) Data loaded from memory event:0X3B2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L35_GRP59 : (Group 59 pm_pe_bench6) Data loaded from L3.5 event:0X3B3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP59 : (Group 59 pm_pe_bench6) Data loaded from L2 event:0X3B4 counters:4 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP59 : (Group 59 pm_pe_bench6) Data loaded from L2.5 shared event:0X3B5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP59 : (Group 59 pm_pe_bench6) Processor cycles event:0X3B6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP59 : (Group 59 pm_pe_bench6) Instructions completed event:0X3B7 counters:7 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP59 : (Group 59 pm_pe_bench6) Data loaded from L2.5 modified #Group 60 pm_hpmcount1, Hpmcount group for L1 and TLB behavior analysis event:0X3C0 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP60 : (Group 60 pm_hpmcount1) Data TLB misses event:0X3C1 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP60 : (Group 60 pm_hpmcount1) Cycles LMQ and SRQ empty event:0X3C2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP60 : (Group 60 pm_hpmcount1) L1 D cache load misses event:0X3C3 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP60 : (Group 60 pm_hpmcount1) L1 D cache store misses event:0X3C4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP60 : (Group 60 pm_hpmcount1) Processor cycles event:0X3C5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP60 : (Group 60 pm_hpmcount1) Instructions completed event:0X3C6 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP60 : (Group 60 pm_hpmcount1) L1 D cache store references event:0X3C7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP60 : (Group 60 pm_hpmcount1) L1 D cache load references #Group 61 pm_hpmcount2, Hpmcount group for computation intensity analysis event:0X3D0 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP61 : (Group 61 pm_hpmcount2) FPU executed FDIV instruction event:0X3D1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP61 : (Group 61 pm_hpmcount2) FPU executed multiply-add instruction event:0X3D2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP61 : (Group 61 pm_hpmcount2) FPU0 produced a result event:0X3D3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP61 : (Group 61 pm_hpmcount2) FPU1 produced a result event:0X3D4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP61 : (Group 61 pm_hpmcount2) Processor cycles event:0X3D5 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP61 : (Group 61 pm_hpmcount2) FPU executed store instruction event:0X3D6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP61 : (Group 61 pm_hpmcount2) Instructions completed event:0X3D7 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP61 : (Group 61 pm_hpmcount2) LSU executed Floating Point load instruction #Group 62 pm_l1andbr, L1 misses and branch misspredict analysis event:0X3E0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP62 : (Group 62 pm_l1andbr) Instructions completed event:0X3E1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP62 : (Group 62 pm_l1andbr) Processor cycles event:0X3E2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP62 : (Group 62 pm_l1andbr) L1 D cache load misses event:0X3E3 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP62 : (Group 62 pm_l1andbr) Branches issued event:0X3E4 counters:4 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP62 : (Group 62 pm_l1andbr) L1 D cache store misses event:0X3E5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP62 : (Group 62 pm_l1andbr) Processor cycles event:0X3E6 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP62 : (Group 62 pm_l1andbr) Branch mispredictions due CR bit setting event:0X3E7 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP62 : (Group 62 pm_l1andbr) Branch mispredictions due to target address #Group 63 pm_imix, Instruction mix: loads, stores and branches event:0X3F0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP63 : (Group 63 pm_imix) Instructions completed event:0X3F1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP63 : (Group 63 pm_imix) Processor cycles event:0X3F2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP63 : (Group 63 pm_imix) L1 D cache load misses event:0X3F3 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP63 : (Group 63 pm_imix) Branches issued event:0X3F4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP63 : (Group 63 pm_imix) Processor cycles event:0X3F5 counters:5 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP63 : (Group 63 pm_imix) L1 D cache store misses event:0X3F6 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP63 : (Group 63 pm_imix) L1 D cache store references event:0X3F7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP63 : (Group 63 pm_imix) L1 D cache load references oprofile-1.3.0/events/ppc64/power4/event_mappings0000664000175000017500000011432312534404406016705 00000000000000#Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 #Group 1 pm_slice0, Time Slice 0 event:0X010 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X011 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X012 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X013 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X014 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X015 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X016 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 event:0X017 mmcr0:0X00000D0E mmcr1:0X000000004A5675AC mmcra:0X00022001 #Group 2 pm_eprof, Group for use with eprof event:0X020 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X021 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X022 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X023 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X024 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X025 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X026 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X027 mmcr0:0X0000070E mmcr1:0X1003400045F29420 mmcra:0X00002001 #Group 3 pm_basic, Basic performance indicators event:0X030 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X031 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X032 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X033 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X034 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X035 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X036 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 event:0X037 mmcr0:0X0000090E mmcr1:0X1003400045F29420 mmcra:0X00002001 #Group 4 pm_ifu, IFU events event:0X040 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X041 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X042 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X043 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X044 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X045 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X046 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 event:0X047 mmcr0:0X00000938 mmcr1:0X80000000C6767D6C mmcra:0X00022001 #Group 5 pm_isu, ISU Queue full events event:0X050 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X051 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X052 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X053 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X054 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X055 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X056 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 event:0X057 mmcr0:0X0000112A mmcr1:0X50041000EA5103A0 mmcra:0X00002001 #Group 6 pm_lsource, Information on data source event:0X060 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X061 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X062 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X063 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X064 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X065 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X066 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X067 mmcr0:0X00000E1C mmcr1:0X0010C000739CE738 mmcra:0X00002001 #Group 7 pm_isource, Instruction Source information event:0X070 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X071 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X072 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X073 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X074 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X075 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X076 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X077 mmcr0:0X00000F1E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 #Group 8 pm_lsu, Information on the Load Store Unit event:0X080 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X081 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X082 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X083 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X084 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X085 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X086 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 event:0X087 mmcr0:0X00000810 mmcr1:0X000F00003A508420 mmcra:0X00002001 #Group 9 pm_xlate1, Translation Events event:0X090 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X091 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X092 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X093 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X094 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X095 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X096 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 event:0X097 mmcr0:0X00001028 mmcr1:0X81082000F67E849C mmcra:0X00022001 #Group 10 pm_xlate2, Translation Events event:0X0A0 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A1 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A2 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A3 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A4 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A5 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A6 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 event:0X0A7 mmcr0:0X0000112A mmcr1:0X81082000D77E849C mmcra:0X00022001 #Group 11 pm_gps1, L3 Events event:0X0B0 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B1 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B2 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B3 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B4 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B5 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B6 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 event:0X0B7 mmcr0:0X00001022 mmcr1:0X00000C00B5E5349C mmcra:0X00022001 #Group 12 pm_l2a, L2 SliceA events event:0X0C0 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C1 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C2 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C3 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C4 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C5 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C6 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 event:0X0C7 mmcr0:0X0000162A mmcr1:0X00000C008469749C mmcra:0X00022001 #Group 13 pm_l2b, L2 SliceB events event:0X0D0 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D1 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D2 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D3 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D4 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D5 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D6 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 event:0X0D7 mmcr0:0X00001A32 mmcr1:0X0000060094F1B49C mmcra:0X00022001 #Group 14 pm_l2c, L2 SliceC events event:0X0E0 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E1 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E2 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E3 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E4 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E5 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E6 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 event:0X0E7 mmcr0:0X00001E3A mmcr1:0X00000600A579F49C mmcra:0X00022001 #Group 15 pm_fpu1, Floating Point events event:0X0F0 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F1 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F2 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F3 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F4 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F5 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F6 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 event:0X0F7 mmcr0:0X00000810 mmcr1:0X00000000420E84A0 mmcra:0X00002001 #Group 16 pm_fpu2, Floating Point events event:0X100 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X101 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X102 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X103 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X104 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X105 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X106 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 event:0X107 mmcr0:0X00000810 mmcr1:0X010020E83A508420 mmcra:0X00002001 #Group 17 pm_idu1, Instruction Decode Unit events event:0X110 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X111 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X112 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X113 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X114 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X115 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X116 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 event:0X117 mmcr0:0X0000090E mmcr1:0X040100008456794C mmcra:0X00022001 #Group 18 pm_idu2, Instruction Decode Unit events event:0X120 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X121 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X122 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X123 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X124 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X125 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X126 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 event:0X127 mmcr0:0X0000090E mmcr1:0X04010000A5527B5C mmcra:0X00022001 #Group 19 pm_isu_rename, ISU Rename Pool Events event:0X130 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X131 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X132 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X133 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X134 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X135 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X136 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 event:0X137 mmcr0:0X00001228 mmcr1:0X100550008E6D949C mmcra:0X00022001 #Group 20 pm_isu_queues1, ISU Queue Full Events event:0X140 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X141 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X142 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X143 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X144 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X145 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X146 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 event:0X147 mmcr0:0X0000132E mmcr1:0X10050000850E994C mmcra:0X00022001 #Group 21 pm_isu_flow, ISU Instruction Flow Events event:0X150 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X151 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X152 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X153 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X154 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X155 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X156 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 event:0X157 mmcr0:0X0000190E mmcr1:0X10005000D7B7C49C mmcra:0X00022001 #Group 22 pm_isu_work, ISU Indicators of Work Blockage event:0X160 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X161 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X162 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X163 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X164 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X165 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X166 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 event:0X167 mmcr0:0X00000C12 mmcr1:0X100010004FCE9DA8 mmcra:0X00002001 #Group 23 pm_serialize, LSU Serializing Events event:0X170 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X171 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X172 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X173 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X174 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X175 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X176 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 event:0X177 mmcr0:0X00001332 mmcr1:0X0118B000E9D69DFC mmcra:0X00022001 #Group 24 pm_lsubusy, LSU Busy Events event:0X180 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X181 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X182 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X183 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X184 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X185 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X186 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 event:0X187 mmcr0:0X0000193A mmcr1:0X0000F000DFF5E49C mmcra:0X00022001 #Group 25 pm_lsource2, Information on data source event:0X190 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X191 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X192 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X193 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X194 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X195 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X196 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 event:0X197 mmcr0:0X00000938 mmcr1:0X0010C0003B9CE738 mmcra:0X00002001 #Group 26 pm_lsource3, Information on data source event:0X1A0 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A1 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A2 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A3 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A4 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A5 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A6 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 event:0X1A7 mmcr0:0X00000E1C mmcr1:0X0010C00073B87724 mmcra:0X00022001 #Group 27 pm_isource2, Instruction Source information event:0X1B0 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B1 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B2 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B3 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B4 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B5 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B6 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 event:0X1B7 mmcr0:0X0000090E mmcr1:0X800000007BDEF7BC mmcra:0X00022001 #Group 28 pm_isource3, Instruction Source information event:0X1C0 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C1 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C2 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C3 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C4 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C5 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C6 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 event:0X1C7 mmcr0:0X00000F1E mmcr1:0X800000007BDEF3A4 mmcra:0X00022001 #Group 29 pm_fpu3, Floating Point events by unit event:0X1D0 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D1 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D2 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D3 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D4 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D5 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D6 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 event:0X1D7 mmcr0:0X00001028 mmcr1:0X000000008D63549C mmcra:0X00022001 #Group 30 pm_fpu4, Floating Point events by unit event:0X1E0 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E1 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E2 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E3 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E4 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E5 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E6 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 event:0X1E7 mmcr0:0X0000122C mmcr1:0X000000009DE7749C mmcra:0X00022001 #Group 31 pm_fpu5, Floating Point events by unit event:0X1F0 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F1 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F2 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F3 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F4 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F5 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F6 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 event:0X1F7 mmcr0:0X00001838 mmcr1:0X00000000850E9958 mmcra:0X00002001 #Group 32 pm_fpu6, Floating Point events by unit event:0X200 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X201 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X202 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X203 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X204 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X205 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X206 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 event:0X207 mmcr0:0X00001B3E mmcr1:0X01002000C735E3A4 mmcra:0X00022001 #Group 33 pm_fpu7, Floating Point events by unit event:0X210 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X211 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X212 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X213 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X214 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X215 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X216 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 event:0X217 mmcr0:0X0000193A mmcr1:0X000000009DCE93E0 mmcra:0X00002001 #Group 34 pm_fxu, Fix Point Unit events event:0X220 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X221 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X222 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X223 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X224 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X225 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X226 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 event:0X227 mmcr0:0X0000090E mmcr1:0X400000024294A520 mmcra:0X00002001 #Group 35 pm_lsu_lmq, LSU Load Miss Queue Events event:0X230 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X231 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X232 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X233 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X234 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X235 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X236 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 event:0X237 mmcr0:0X00001E3E mmcr1:0X0100A000EE4E9D78 mmcra:0X00002001 #Group 36 pm_lsu_flush, LSU Flush Events event:0X240 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X241 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X242 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X243 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X244 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X245 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X246 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 event:0X247 mmcr0:0X0000122C mmcr1:0X000C000039E7749C mmcra:0X00022001 #Group 37 pm_lsu_load1, LSU Load Events event:0X250 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X251 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X252 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X253 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X254 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X255 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X256 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 event:0X257 mmcr0:0X00001028 mmcr1:0X000F0000850E9958 mmcra:0X00002001 #Group 38 pm_lsu_store1, LSU Store Events event:0X260 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X261 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X262 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X263 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X264 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X265 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X266 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 event:0X267 mmcr0:0X0000112A mmcr1:0X000F00008D4E99DC mmcra:0X00022001 #Group 39 pm_lsu_store2, LSU Store Events event:0X270 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X271 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X272 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X273 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X274 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X275 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X276 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 event:0X277 mmcr0:0X00001838 mmcr1:0X0003C0008D76749C mmcra:0X00022001 #Group 40 pm_lsu7, Information on the Load Store Unit event:0X280 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X281 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X282 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X283 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X284 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X285 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X286 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 event:0X287 mmcr0:0X0000122C mmcr1:0X0118C00039F8749C mmcra:0X00022001 #Group 41 pm_dpfetch, Data Prefetch Events event:0X290 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X291 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X292 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X293 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X294 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X295 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X296 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 event:0X297 mmcr0:0X0000173E mmcr1:0X0108F000E74E93F8 mmcra:0X00002001 #Group 42 pm_misc, Misc Events for testing event:0X2A0 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A1 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A2 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A3 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A4 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A5 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A6 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 event:0X2A7 mmcr0:0X00000C14 mmcr1:0X0000000061D695B4 mmcra:0X00022001 #Group 43 pm_mark1, Information on marked instructions event:0X2B0 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B1 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B2 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B3 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B4 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B5 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B6 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 event:0X2B7 mmcr0:0X00000816 mmcr1:0X010080803B18D6A4 mmcra:0X00722001 #Group 44 pm_mark2, Marked Instructions Processing Flow event:0X2C0 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C1 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C2 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C3 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C4 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C5 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C6 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 event:0X2C7 mmcr0:0X00000A1A mmcr1:0X000000003B58C630 mmcra:0X00002001 #Group 45 pm_mark3, Marked Stores Processing Flow event:0X2D0 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D1 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D2 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D3 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D4 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D5 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D6 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 event:0X2D7 mmcr0:0X00000B0E mmcr1:0X010020005B1ABDA4 mmcra:0X00022001 #Group 46 pm_mark4, Marked Loads Processing FLow event:0X2E0 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E1 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E2 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E3 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E4 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E5 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E6 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 event:0X2E7 mmcr0:0X0000080E mmcr1:0X01028080421AD4A0 mmcra:0X00002001 #Group 47 pm_mark_lsource, Information on marked data source event:0X2F0 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F1 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F2 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F3 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F4 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F5 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F6 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 event:0X2F7 mmcr0:0X00000E1C mmcr1:0X00103000739CE738 mmcra:0X00002001 #Group 48 pm_mark_lsource2, Information on marked data source event:0X300 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X301 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X302 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X303 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X304 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X305 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X306 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 event:0X307 mmcr0:0X0000090E mmcr1:0X00103000E39CE738 mmcra:0X00002001 #Group 49 pm_mark_lsource3, Information on marked data source event:0X310 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X311 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X312 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X313 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X314 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X315 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X316 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 event:0X317 mmcr0:0X00000E1C mmcr1:0X00103000738E9770 mmcra:0X00002001 #Group 50 pm_lsu_mark1, Load Store Unit Marked Events event:0X320 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X321 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X322 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X323 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X324 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X325 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X326 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 event:0X327 mmcr0:0X00001B34 mmcr1:0X01028000850E98D4 mmcra:0X00022001 #Group 51 pm_lsu_mark2, Load Store Unit Marked Events event:0X330 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X331 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X332 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X333 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X334 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X335 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X336 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 event:0X337 mmcr0:0X00001838 mmcr1:0X01028000958E99DC mmcra:0X00022001 #Group 52 pm_lsu_mark3, Load Store Unit Marked Events event:0X340 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X341 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X342 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X343 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X344 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X345 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X346 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 event:0X347 mmcr0:0X00001D0E mmcr1:0X0100B000CE8ED6A4 mmcra:0X00022001 #Group 53 pm_threshold, Group for pipeline threshold studies event:0X350 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X351 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X352 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X353 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X354 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X355 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X356 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 event:0X357 mmcr0:0X00001E16 mmcr1:0X0100A000CA4ED5F4 mmcra:0X00722001 #Group 54 pm_pe_bench1, PE Benchmarker group for FP analysis event:0X360 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X361 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X362 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X363 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X364 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X365 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X366 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 event:0X367 mmcr0:0X00000810 mmcr1:0X10001002420E84A0 mmcra:0X00002001 #Group 55 pm_pe_bench2, PE Benchmarker group for FP stalls analysis event:0X370 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X371 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X372 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X373 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X374 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X375 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X376 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 event:0X377 mmcr0:0X00000710 mmcr1:0X110420689A508BA0 mmcra:0X00002001 #Group 56 pm_pe_bench3, PE Benchmarker group for branch analysis event:0X380 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X381 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X382 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X383 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X384 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X385 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X386 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 event:0X387 mmcr0:0X00000938 mmcr1:0X90040000C66A7D6C mmcra:0X00022001 #Group 57 pm_pe_bench4, PE Benchmarker group for L1 and TLB analysis event:0X390 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X391 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X392 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X393 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X394 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X395 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X396 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X397 mmcr0:0X00001420 mmcr1:0X010B000044CE9420 mmcra:0X00002001 #Group 58 pm_pe_bench5, PE Benchmarker group for L2 analysis event:0X3A0 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A1 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A2 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A3 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A4 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A5 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A6 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 event:0X3A7 mmcr0:0X0000090E mmcr1:0X0010C000739CE738 mmcra:0X00002001 #Group 59 pm_pe_bench6, PE Benchmarker group for L3 analysis event:0X3B0 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B1 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B2 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B3 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B4 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B5 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B6 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 event:0X3B7 mmcr0:0X00000E1C mmcr1:0X0010C000739C74B8 mmcra:0X00002001 #Group 60 pm_hpmcount1, Hpmcount group for L1 and TLB behavior analysis event:0X3C0 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C1 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C2 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C3 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C4 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C5 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C6 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 event:0X3C7 mmcr0:0X00001414 mmcr1:0X010B000044CE9420 mmcra:0X00002001 #Group 61 pm_hpmcount2, Hpmcount group for computation intensity analysis event:0X3D0 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D1 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D2 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D3 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D4 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D5 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D6 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 event:0X3D7 mmcr0:0X00000810 mmcr1:0X010020289DCE84A0 mmcra:0X00002001 #Group 62 pm_l1andbr, L1 misses and branch misspredict analysis event:0X3E0 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E1 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E2 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E3 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E4 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E5 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E6 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 event:0X3E7 mmcr0:0X0000090E mmcr1:0X8003C00046367CE8 mmcra:0X00002001 #Group 63 pm_imix, Instruction mix: loads, stores and branches event:0X3F0 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F1 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F2 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F3 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F4 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F5 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F6 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 event:0X3F7 mmcr0:0X0000090E mmcr1:0X8003C000460FB420 mmcra:0X00002001 oprofile-1.3.0/events/ppc64/power4/unit_masks0000664000175000017500000000013512534404406016036 00000000000000# ppc64 POWER4 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power9/0000775000175000017500000000000013323173530014022 500000000000000oprofile-1.3.0/events/ppc64/power9/events0000664000175000017500000052676513136424544015224 00000000000000 # Copyright OProfile authors # Copyright (c) International Business Machines, 2017. # Contributed by Will Schmidt . # # IBM POWER9 Events include:ppc64/architected_events_v1 # This table has been automatically generated with a preliminary list of # events, and is subject to verification and update. # Last Refresh. ( will schmidt , Jun 06,2017 ). # Abbreviation hints: # BHS - Branch History Table # DARQ - Data and Address Recycle/Recirculation Queue # ERAT - Effective to Real Address Translation # FAB - Fabric # HPT - Hardware Page Table # IBUFF - Instruction Fetch Buffer # IFAR - Instruction Fetch Address Register # LHS/LDHITST -Load Hit Store # MEPF - PreFetch. # NTC - Next To Complete # NTF - Next To Finish. # PMU - Performance Monitor Unit # RIS - Random Instruction Sampling # rty - retry # TAGE - Tagged Geometric History Length predictor (branch prediction) # TM - Transactional Memory event:0x0000045050 counters:3 um:zero minimum:10000 name:PM_1FLOP_CMPL : one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation completed event:0x00000100F2 counters:0 um:zero minimum:10000 name:PM_1PLUS_PPC_CMPL : 1 or more ppc insts finished event:0x00000400F2 counters:3 um:zero minimum:10000 name:PM_1PLUS_PPC_DISP : Cycles at least one Instr Dispatched event:0x000004D052 counters:3 um:zero minimum:10000 name:PM_2FLOP_CMPL : DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg event:0x0000045052 counters:3 um:zero minimum:10000 name:PM_4FLOP_CMPL : 4 FLOP instruction completed event:0x000004D054 counters:3 um:zero minimum:10000 name:PM_8FLOP_CMPL : 8 FLOP instruction completed event:0x00000100FA counters:0 um:zero minimum:10000 name:PM_ANY_THRD_RUN_CYC : Cycles in which at least one thread has the run latch set event:0x000002505E counters:1 um:zero minimum:10000 name:PM_BACK_BR_CMPL : Branch instruction completed with a target address less than current instruction address event:0x0000004880 counters:0,1,2,3 um:zero minimum:10000 name:PM_BANK_CONFLICT : Read blocked due to interleave conflict. The ifar logic will detect an interleave conflict and kill the data that was read that cycle. event:0x000003005C counters:2 um:zero minimum:10000 name:PM_BFU_BUSY : Cycles in which all 4 Binary Floating Point units are busy. The BFU is running at capacity event:0x0000020036 counters:1 um:zero minimum:10000 name:PM_BR_2PATH : Branches that are not strongly biased event:0x0000040036 counters:3 um:zero minimum:10000 name:PM_BR_2PATH : Branches that are not strongly biased event:0x000004D05E counters:3 um:zero minimum:10000 name:PM_BR_CMPL : Any Branch instruction completed event:0x000000489C counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_CORECT_PRED_TAKEN_CMPL : Conditional Branch Completed in which the HW correctly predicted the direction as taken. Counted at completion time event:0x00000040AC counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_CCACHE : Conditional Branch Completed that was Mispredicted due to the Count Cache Target Prediction event:0x00000400F6 counters:3 um:zero minimum:10000 name:PM_BR_MPRED_CMPL : Number of Branch Mispredicts event:0x00000048AC counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_LSTACK : Conditional Branch Completed that was Mispredicted due to the Link Stack Target Prediction event:0x00000048B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_PCACHE : Conditional Branch Completed that was Mispredicted due to pattern cache prediction event:0x00000040B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_TAKEN_CR : A Conditional Branch that resolved to taken was mispredicted as not taken (due to the BHT Direction Prediction). event:0x00000048B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_MPRED_TAKEN_TA : Conditional Branch Completed that was Mispredicted due to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that resolved Taken set this event. event:0x000000409C counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED : Conditional Branch Executed in which the HW predicted the Direction or Target. Includes taken and not taken and is counted at execution time event:0x00000040A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_CCACHE : Conditional Branch Completed that used the Count Cache for Target Prediction event:0x00000040A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_LSTACK : Conditional Branch Completed that used the Link Stack for Target Prediction event:0x00000048A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_PCACHE : Conditional branch completed that used pattern cache prediction event:0x00000040B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_TA : Conditional Branch Completed that had its target address predicted. Only XL-form branches set this event. This equal the sum of CCACHE, LSTACK, and PCACHE event:0x00000040B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_PRED_TAKEN_CR : Conditional Branch that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and branches event:0x00000200FA counters:1 um:zero minimum:10000 name:PM_BR_TAKEN_CMPL : New event for Branch Taken event:0x0000010068 counters:0 um:zero minimum:10000 name:PM_BRU_FIN : Branch Instruction Finished event:0x00000040A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BR_UNCOND : Unconditional Branch Completed. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was covenrted to a Resolve. event:0x00000050B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BTAC_BAD_RESULT : BTAC thinks branch will be taken but it is either predicted not-taken by the BHT, or the target address is wrong (less common). In both cases, a redirect will happen event:0x00000058B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_BTAC_GOOD_RESULT : BTAC predicts a taken branch and the BHT agrees, and the target address is correct event:0x0000010050 counters:0 um:zero minimum:10000 name:PM_CHIP_PUMP_CPRED : Initial and Final Pump Scope was chip pump (prediction=correct) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x000000208C counters:0,1,2,3 um:zero minimum:10000 name:PM_CLB_HELD : CLB (control logic block - indicates quadword fetch block) Hold: Any Reason event:0x000001E054 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL : Nothing completed and ICT not empty event:0x000001E05A counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_ANY_SYNC : Cycles in which the NTC sync instruction (isync, lwsync or hwsync) is not allowed to complete event:0x000004D018 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_BRU : Completion stall due to a Branch Unit event:0x000004C01E counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_CRYPTO : Finish stall because the NTF instruction was routed to the crypto execution pipe and was waiting to finish event:0x000002C012 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DCACHE_MISS : Finish stall because the NTF instruction was a load that missed the L1 and was waiting for the data to return from the nest event:0x000001005A counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_DFLONG : Finish stall because the NTF instruction was a multi-cycle instruction issued to the Decimal Floating Point execution pipe and waiting to finish. Includes decimal floating point instructions + 128 bit binary floating point instructions. Qualified by multicycle event:0x000002D012 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DFU : Finish stall because the NTF instruction was issued to the Decimal Floating Point execution pipe and waiting to finish. Includes decimal floating point instructions + 128 bit binary floating point instructions. Not qualified by multicycle event:0x000002C018 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L21_L31 : Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3) event:0x000001003C counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L2L3 : Completion stall by Dcache miss which resolved in L2/L3 event:0x000004C016 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L2L3_CONFLICT : Completion stall due to cache miss that resolves in the L2 or L3 with a conflict event:0x000004C01A counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_L3MISS : Completion stall due to cache miss resolving missed the L3 event:0x0000030038 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_LMEM : Completion stall due to cache miss that resolves in local memory event:0x000002C01C counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_DMISS_REMOTE : Completion stall by Dcache miss which resolved from remote chip (cache or memory) event:0x000001005C counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_DP : Finish stall because the NTF instruction was a scalar instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Not qualified multicycle. Qualified by NOT vector event:0x000003405C counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_DPLONG : Finish stall because the NTF instruction was a scalar multi-cycle instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Qualified by NOT vector AND multicycle event:0x000004D01A counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_EIEIO : Finish stall because the NTF instruction is an EIEIO waiting for response from L2 event:0x0000030004 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_EMQ_FULL : Finish stall because the next to finish instruction suffered an ERAT miss and the EMQ was full event:0x000004C012 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_ERAT_MISS : Finish stall because the NTF instruction was a load or store that suffered a translation miss event:0x000003003A counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_EXCEPTION : Cycles in which the NTC instruction is not allowed to complete because it was interrupted by ANY exception, which has to be serviced before the instruction can complete event:0x000002D018 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_EXEC_UNIT : Completion stall due to execution units (FXU/VSU/CRU) event:0x000001E056 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_FLUSH_ANY_THREAD : Cycles in which the NTC instruction is not allowed to complete because any of the 4 threads in the same core suffered a flush, which blocks completion event:0x000004D016 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_FXLONG : Completion stall due to a long latency scalar fixed point instruction (division, square root) event:0x000002D016 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_FXU : Finish stall due to a scalar fixed point or CR instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes event:0x0000030036 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_HWSYNC : completion stall due to hwsync event:0x000001002A counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_LARX : Finish stall because the NTF instruction was a larx waiting to be satisfied event:0x000002C01A counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_LHS : Finish stall because the NTF instruction was a load that hit on an older store and it was waiting for store data event:0x000004C014 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_LMQ_FULL : Finish stall because the NTF instruction was a load that missed in the L1 and the LMQ was unable to accept this load miss request because it was full event:0x000004D014 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_LOAD_FINISH : Finish stall because the NTF instruction was a load instruction with all its dependencies satisfied just going through the LSU pipe to finish event:0x000002D014 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_LRQ_FULL : Finish stall because the NTF instruction was a load that was held in LSAQ (load-store address queue) because the LRQ (load-reorder queue) was full event:0x0000010004 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_LRQ_OTHER : Finish stall due to LRQ miscellaneous reasons, lost arbitration to LMQ slot, bank collisions, set prediction cleanup, set prediction multihit and others event:0x000004E016 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_LSAQ_ARB : Finish stall because the NTF instruction was a load or store that was held in LSAQ because an older instruction from SRQ or LRQ won arbitration to the LSU pipe when this instruction tried to launch event:0x000002C010 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_LSU : Completion stall by LSU instruction event:0x000001003A counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_LSU_FIN : Finish stall because the NTF instruction was an LSU op (other than a load or a store) with all its dependencies met and just going through the LSU pipe to finish event:0x000002E01A counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_LSU_FLUSH_NEXT : Completion stall of one cycle because the LSU requested to flush the next iop in the sequence. It takes 1 cycle for the ISU to process this request before the LSU instruction is allowed to complete event:0x0000034056 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_LSU_MFSPR : Finish stall because the NTF instruction was a mfspr instruction targeting an LSU SPR and it was waiting for the register data to be returned event:0x0000010036 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_LWSYNC : completion stall due to lwsync event:0x000004E012 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_MTFPSCR : Completion stall because the ISU is updating the register and notifying the Effective Address Table (EAT) event:0x000001E05C counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_NESTED_TBEGIN : Completion stall because the ISU is updating the TEXASR to keep track of the nested tbegin. This is a short delay, and it includes ROT event:0x000003003C counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_NESTED_TEND : Completion stall because the ISU is updating the TEXASR to keep track of the nested tend and decrement the TEXASR nested level. This is a short delay event:0x000004E018 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_NTC_DISP_FIN : Finish stall because the NTF instruction was one that must finish at dispatch. event:0x000002E01E counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_NTC_FLUSH : Completion stall due to ntc flush event:0x0000030006 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_OTHER_CMPL : Instructions the core completed while this tread was stalled event:0x000002C016 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_PASTE : Finish stall because the NTF instruction was a paste waiting for response from L2 event:0x000003000A counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_PM : Finish stall because the NTF instruction was issued to the Permute execution pipe and waiting to finish. Includes permute and decimal fixed point instructions (128 bit BCD arithmetic) + a few 128 bit fixpoint add/subtract instructions with carry. Not qualified by vector or multicycle event:0x000001E052 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_SLB : Finish stall because the NTF instruction was awaiting L2 response for an SLB event:0x0000030028 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_SPEC_FINISH : Finish stall while waiting for the non-speculative finish of either a stcx waiting for its result or a load waiting for non-critical sectors of data and ECC event:0x0000030016 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_SRQ_FULL : Finish stall because the NTF instruction was a store that was held in LSAQ because the SRQ was full event:0x000002D01C counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_STCX : Finish stall because the NTF instruction was a stcx waiting for response from L2 event:0x000004C01C counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_ST_FWD : Completion stall due to store forward event:0x0000030026 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_STORE_DATA : Finish stall because the next to finish instruction was a store waiting on data event:0x0000030014 counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_STORE_FIN_ARB : Finish stall because the NTF instruction was a store waiting for a slot in the store finish pipe. This means the instruction is ready to finish but there are instructions ahead of it, using the finish pipe event:0x000002C014 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_STORE_FINISH : Finish stall because the NTF instruction was a store with all its dependencies met, just waiting to go through the LSU pipe to finish event:0x000004C010 counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_STORE_PIPE_ARB : Finish stall because the NTF instruction was a store waiting for the next relaunch opportunity after an internal reject. This means the instruction is ready to relaunch and tried once but lost arbitration event:0x000002C01E counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_SYNC_PMU_INT : Cycles in which the NTC instruction is waiting for a synchronous PMU interrupt event:0x000001E050 counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_TEND : Finish stall because the NTF instruction was a tend instruction awaiting response from L2 event:0x000001001C counters:0 um:zero minimum:10000 name:PM_CMPLU_STALL_THRD : Completion Stalled because the thread was blocked event:0x000002E01C counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_TLBIE : Finish stall because the NTF instruction was a tlbie waiting for response from L2 event:0x000004405C counters:3 um:zero minimum:10000 name:PM_CMPLU_STALL_VDP : Finish stall because the NTF instruction was a vector instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Not qualified multicycle. Qualified by vector event:0x000003C05A counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_VDPLONG : Finish stall because the NTF instruction was a scalar multi-cycle instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Qualified by NOT vector AND multicycle event:0x000002E018 counters:1 um:zero minimum:10000 name:PM_CMPLU_STALL_VFXLONG : Completion stall due to a long latency vector fixed point instruction (division, square root) event:0x000003C05C counters:2 um:zero minimum:10000 name:PM_CMPLU_STALL_VFXU : Finish stall due to a vector fixed point instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes event:0x000003608C counters:2 um:zero minimum:10000 name:PM_CO0_BUSY : CO mach 0 Busy. Used by PMU to sample ave CO lifetime (mach0 used as sample point) event:0x000004608C counters:3 um:zero minimum:10000 name:PM_CO0_BUSY : CO mach 0 Busy. Used by PMU to sample ave CO lifetime (mach0 used as sample point) event:0x0000016886 counters:0 um:zero minimum:10000 name:PM_CO_DISP_FAIL : CO dispatch failed due to all CO machines being busy event:0x0000026086 counters:1 um:zero minimum:10000 name:PM_CO_TM_SC_FOOTPRINT : L2 did a cleanifdirty CO to the L3 (ie created an SC line in the L3) OR L2 TM_store hit dirty HPC line and L3 indicated SC line formed in L3 on RDR bus event:0x000002688C counters:1 um:zero minimum:10000 name:PM_CO_USAGE : Continuous 16 cycle (2to1) window where this signals rotates thru sampling each CO machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running event:0x000001001E counters:0 um:zero minimum:10000 name:PM_CYC : Processor cycles event:0x000002001E counters:1 um:zero minimum:10000 name:PM_CYC : Processor cycles event:0x000003001E counters:2 um:zero minimum:10000 name:PM_CYC : Processor cycles event:0x000004001E counters:3 um:zero minimum:10000 name:PM_CYC : Processor cycles event:0x000004D04A counters:3 um:zero minimum:10000 name:PM_DARQ0_0_3_ENTRIES : Cycles in which 3 or less DARQ entries (out of 12) are in use event:0x000001D058 counters:0 um:zero minimum:10000 name:PM_DARQ0_10_12_ENTRIES : Cycles in which 10 or more DARQ entries (out of 12) are in use event:0x000003504E counters:2 um:zero minimum:10000 name:PM_DARQ0_4_6_ENTRIES : Cycles in which 4, 5, or 6 DARQ entries (out of 12) are in use event:0x000002E050 counters:1 um:zero minimum:10000 name:PM_DARQ0_7_9_ENTRIES : Cycles in which 7,8, or 9 DARQ entries (out of 12) are in use event:0x000004C122 counters:3 um:zero minimum:10000 name:PM_DARQ1_0_3_ENTRIES : Cycles in which 3 or fewer DARQ1 entries (out of 12) are in use event:0x0000020058 counters:1 um:zero minimum:10000 name:PM_DARQ1_10_12_ENTRIES : Cycles in which 10 or more DARQ1 entries (out of 12) are in use event:0x000003E050 counters:2 um:zero minimum:10000 name:PM_DARQ1_4_6_ENTRIES : Cycles in which 4, 5, or 6 DARQ1 entries (out of 12) are in use event:0x000002005A counters:1 um:zero minimum:10000 name:PM_DARQ1_7_9_ENTRIES : Cycles in which 7 to 9 DARQ1 entries (out of 12) are in use event:0x000004405E counters:3 um:zero minimum:10000 name:PM_DARQ_STORE_REJECT : The DARQ attempted to transmit a store into an LSAQ or SRQ entry but It was rejected. Divide by PM_DARQ_STORE_XMIT to get reject ratio event:0x0000030064 counters:2 um:zero minimum:10000 name:PM_DARQ_STORE_XMIT : The DARQ attempted to transmit a store into an LSAQ or SRQ entry. Includes rejects. Not qualified by thread, so it includes counts for the whole core event:0x000001C050 counters:0 um:zero minimum:10000 name:PM_DATA_CHIP_PUMP_CPRED : Initial and Final Pump Scope was chip pump (prediction=correct) for a demand load event:0x000004C048 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_DL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load event:0x000003C048 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_DL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load event:0x000003C04C counters:2 um:zero minimum:10000 name:PM_DATA_FROM_DL4 : The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a demand load event:0x000004C04C counters:3 um:zero minimum:10000 name:PM_DATA_FROM_DMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a demand load event:0x000001C042 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L2 : The processor's data cache was reloaded from local core's L2 due to a demand load event:0x000004C046 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L21_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a demand load event:0x000003C046 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L21_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load event:0x000003C040 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST : The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a demand load event:0x000004C040 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L2_DISP_CONFLICT_OTHER : The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a demand load event:0x000002C040 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L2_MEPF : The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to a demand load event:0x00000200FE counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L2MISS : Demand LD - L2 Miss (not L2 hit) event:0x000001C04E counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L2MISS_MOD : The processor's data cache was reloaded from a location other than the local core's L2 due to a demand load event:0x000001C040 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L2_NO_CONFLICT : The processor's data cache was reloaded from local core's L2 without conflict due to a demand load event:0x000004C042 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L3 : The processor's data cache was reloaded from local core's L3 due to a demand load event:0x000004C044 counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L31_ECO_MOD : The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a demand load event:0x000003C044 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L31_ECO_SHR : The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a demand load event:0x000002C044 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L31_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a demand load event:0x000001C046 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L31_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a demand load event:0x000003C042 counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L3_DISP_CONFLICT : The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a demand load event:0x000002C042 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_L3_MEPF : The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to a demand load event:0x00000300FE counters:2 um:zero minimum:10000 name:PM_DATA_FROM_L3MISS : Demand LD - L3 Miss (not L2 hit and not L3 hit) event:0x000004C04E counters:3 um:zero minimum:10000 name:PM_DATA_FROM_L3MISS_MOD : The processor's data cache was reloaded from a location other than the local core's L3 due to a demand load event:0x000001C044 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_L3_NO_CONFLICT : The processor's data cache was reloaded from local core's L3 without conflict due to a demand load event:0x000001C04C counters:0 um:zero minimum:10000 name:PM_DATA_FROM_LL4 : The processor's data cache was reloaded from the local chip's L4 cache due to a demand load event:0x000002C048 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_LMEM : The processor's data cache was reloaded from the local chip's Memory due to a demand load event:0x00000400FE counters:3 um:zero minimum:10000 name:PM_DATA_FROM_MEMORY : The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a demand load event:0x000004C04A counters:3 um:zero minimum:10000 name:PM_DATA_FROM_OFF_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a demand load event:0x000001C048 counters:0 um:zero minimum:10000 name:PM_DATA_FROM_ON_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a demand load event:0x000002C046 counters:1 um:zero minimum:10000 name:PM_DATA_FROM_RL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load event:0x000001C04A counters:0 um:zero minimum:10000 name:PM_DATA_FROM_RL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load event:0x000002C04A counters:1 um:zero minimum:10000 name:PM_DATA_FROM_RL4 : The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a demand load event:0x000003C04A counters:2 um:zero minimum:10000 name:PM_DATA_FROM_RMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load event:0x000002C050 counters:1 um:zero minimum:10000 name:PM_DATA_GRP_PUMP_CPRED : Initial and Final Pump Scope was group pump (prediction=correct) for a demand load event:0x000002C052 counters:1 um:zero minimum:10000 name:PM_DATA_GRP_PUMP_MPRED : Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for a demand load event:0x000001C052 counters:0 um:zero minimum:10000 name:PM_DATA_GRP_PUMP_MPRED_RTY : Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a demand load event:0x000001C054 counters:0 um:zero minimum:10000 name:PM_DATA_PUMP_CPRED : Pump prediction correct. Counts across all types of pumps for a demand load event:0x000004C052 counters:3 um:zero minimum:10000 name:PM_DATA_PUMP_MPRED : Pump misprediction. Counts across all types of pumps for a demand load event:0x000000F0A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_DATA_STORE : All ops that drain from s2q to L2 containing data event:0x000003C050 counters:2 um:zero minimum:10000 name:PM_DATA_SYS_PUMP_CPRED : Initial and Final Pump Scope was system pump (prediction=correct) for a demand load event:0x000003C052 counters:2 um:zero minimum:10000 name:PM_DATA_SYS_PUMP_MPRED : Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for a demand load event:0x000004C050 counters:3 um:zero minimum:10000 name:PM_DATA_SYS_PUMP_MPRED_RTY : Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for a demand load event:0x000003001A counters:2 um:zero minimum:10000 name:PM_DATA_TABLEWALK_CYC : Data Tablewalk Cycles. Could be 1 or 2 active tablewalks. Includes data prefetches. event:0x000000F8AC counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_DEALLOC_NO_CONF : A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up) event:0x000000F0A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_CONF : A demand load referenced a line in an active prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software. Includes forwards and backwards streams event:0x000000F0B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_CONS_ALLOC : Prefetch stream allocated in the conservative phase by either the hardware prefetch mechanism or software prefetch event:0x000000F8A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_FUZZY_CONF : A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up) event:0x000000F0A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_HW_ALLOC : Prefetch stream allocated by the hardware prefetch mechanism event:0x000000F0AC counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_STRIDED_CONF : A demand load referenced a line in an active strided prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software. event:0x000000F8A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_SW_ALLOC : Prefetch stream allocated by software prefetching event:0x000000F8B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_DC_PREF_XCONS_ALLOC : Prefetch stream allocated in the Ultra conservative phase by either the hardware prefetch mechanism or software prefetch event:0x00000048B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_DECODE_FUSION_CONST_GEN : 32-bit constant generation event:0x0000005084 counters:0,1,2,3 um:zero minimum:10000 name:PM_DECODE_FUSION_EXT_ADD : 32-bit extended addition event:0x00000048A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DECODE_FUSION_LD_ST_DISP : 32-bit displacement D-form and 16-bit displacement X-form event:0x0000005088 counters:0,1,2,3 um:zero minimum:10000 name:PM_DECODE_FUSION_OP_PRESERV : Destructive op operand preservation event:0x00000058A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DECODE_HOLD_ICT_FULL : Counts the number of cycles in which the IFU was not able to decode and transmit one or more instructions because all itags were in use. This means the ICT is full for this thread event:0x0000005884 counters:0,1,2,3 um:zero minimum:10000 name:PM_DECODE_LANES_NOT_AVAIL : Decode has something to transmit but dispatch lanes are not available event:0x000004C054 counters:3 um:zero minimum:10000 name:PM_DERAT_MISS_16G : Data ERAT Miss (Data TLB Access) page size 16G event:0x000003C054 counters:2 um:zero minimum:10000 name:PM_DERAT_MISS_16M : Data ERAT Miss (Data TLB Access) page size 16M event:0x000002C05A counters:1 um:zero minimum:10000 name:PM_DERAT_MISS_1G : Data ERAT Miss (Data TLB Access) page size 1G. Implies radix translation event:0x000001C05A counters:0 um:zero minimum:10000 name:PM_DERAT_MISS_2M : Data ERAT Miss (Data TLB Access) page size 2M. Implies radix translation event:0x000001C056 counters:0 um:zero minimum:10000 name:PM_DERAT_MISS_4K : Data ERAT Miss (Data TLB Access) page size 4K event:0x000002C054 counters:1 um:zero minimum:10000 name:PM_DERAT_MISS_64K : Data ERAT Miss (Data TLB Access) page size 64K event:0x000004D04C counters:3 um:zero minimum:10000 name:PM_DFU_BUSY : Cycles in which all 4 Decimal Floating Point units are busy. The DFU is running at capacity event:0x000000288C counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_BAL : Dispatch/CLB Hold: Balance Flush event:0x0000002090 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_SB : Dispatch/CLB Hold: Scoreboard event:0x0000002890 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_CLB_HELD_TLBIE : Dispatch Hold: Due to TLBIE event:0x0000010006 counters:0 um:zero minimum:10000 name:PM_DISP_HELD : Dispatch Held event:0x000003D05C counters:2 um:zero minimum:10000 name:PM_DISP_HELD_HB_FULL : Dispatch held due to History Buffer full. Could be GPR/VSR/VMR/FPR/CR/XVF event:0x0000020006 counters:1 um:zero minimum:10000 name:PM_DISP_HELD_ISSQ_FULL : Dispatch held due to Issue q full. Includes issue queue and branch queue event:0x000004003C counters:3 um:zero minimum:10000 name:PM_DISP_HELD_SYNC_HOLD : Cycles in which dispatch is held because of a synchronizing instruction in the pipeline event:0x00000028B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_DISP_HELD_TBEGIN : This outer tbegin transaction cannot be dispatched until the previous tend instruction completes event:0x0000030008 counters:2 um:zero minimum:10000 name:PM_DISP_STARVED : Dispatched Starved event:0x000004D05C counters:3 um:zero minimum:10000 name:PM_DP_QP_FLOP_CMPL : Double-Precion or Quad-Precision instruction completed event:0x000004E048 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_DL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003E048 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_DL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003E04C counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_DL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004E04C counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_DMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E042 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L2 : A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004E046 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L21_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003E046 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L21_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E040 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_L2_MEPF : A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E04E counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L2MISS : A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E040 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L2_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004E042 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L3 : A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004E044 counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_ECO_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003E044 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_ECO_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E044 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E046 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L31_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003E042 counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_L3_DISP_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E042 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_L3_MEPF : A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004E04E counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_L3MISS : A Page Table Entry was loaded into the TLB from a location other than the local core's L3 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E044 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_L3_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E04C counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_LL4 : A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E048 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_LMEM : A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E04C counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_MEMORY : A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004E04A counters:3 um:zero minimum:10000 name:PM_DPTEG_FROM_OFF_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E048 counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_ON_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E046 counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_RL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001E04A counters:0 um:zero minimum:10000 name:PM_DPTEG_FROM_RL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002E04A counters:1 um:zero minimum:10000 name:PM_DPTEG_FROM_RL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003E04A counters:2 um:zero minimum:10000 name:PM_DPTEG_FROM_RMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x0000036092 counters:2 um:zero minimum:10000 name:PM_DSIDE_L2MEMACC : Valid when first beat of data comes in for an D-side fetch where data came EXCLUSIVELY from memory (excluding hpcread64 accesses), i.e., total memory accesses by RCs event:0x0000026884 counters:1 um:zero minimum:10000 name:PM_DSIDE_MRU_TOUCH : D-side L2 MRU touch sent to L2 event:0x0000036892 counters:2 um:zero minimum:10000 name:PM_DSIDE_OTHER_64B_L2MEMACC : Valid when first beat of data comes in for an D-side fetch where data came EXCLUSIVELY from memory that was for hpc_read64, (RC had to fetch other 64B of a line from MC) i.e., number of times RC had to go to memory to get 'missing' 64B event:0x000000D0A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_DSLB_MISS : Data SLB Miss - Total of all segment sizes event:0x0000010016 counters:0 um:zero minimum:10000 name:PM_DSLB_MISS : gate_and(sd_pc_c0_comp_valid AND sd_pc_c0_comp_thread(0:1)=tid,sd_pc_c0_comp_ppc_count(0:3)) + gate_and(sd_pc_c1_comp_valid AND sd_pc_c1_comp_thread(0:1)=tid,sd_pc_c1_comp_ppc_count(0:3)) event:0x00000300FC counters:2 um:zero minimum:10000 name:PM_DTLB_MISS : Data PTEG reload event:0x000001C058 counters:0 um:zero minimum:10000 name:PM_DTLB_MISS_16G : Data TLB Miss page size 16G event:0x000004C056 counters:3 um:zero minimum:10000 name:PM_DTLB_MISS_16M : Data TLB Miss page size 16M event:0x000004C05A counters:3 um:zero minimum:10000 name:PM_DTLB_MISS_1G : Data TLB reload (after a miss) page size 1G. Implies radix translation was used event:0x000001C05C counters:0 um:zero minimum:10000 name:PM_DTLB_MISS_2M : Data TLB reload (after a miss) page size 2M. Implies radix translation was used event:0x000002C056 counters:1 um:zero minimum:10000 name:PM_DTLB_MISS_4K : Data TLB Miss page size 4k event:0x000003C056 counters:2 um:zero minimum:10000 name:PM_DTLB_MISS_64K : Data TLB Miss page size 64K event:0x00000050A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_EAT_FORCE_MISPRED : XL-form branch was mispredicted due to the predicted target address missing from EAT. The EAT forces a mispredict in this case since there is no predicated target to validate. This is a rare case that may occur when the EAT is full and a branch is issued event:0x0000004084 counters:0,1,2,3 um:zero minimum:10000 name:PM_EAT_FULL_CYC : Cycles No room in EAT event:0x0000002080 counters:0,1,2,3 um:zero minimum:10000 name:PM_EE_OFF_EXT_INT : CyclesMSR[EE] is off and external interrupts are active event:0x00000200F8 counters:1 um:zero minimum:10000 name:PM_EXT_INT : external interrupt event:0x000004505E counters:3 um:zero minimum:10000 name:PM_FLOP_CMPL : Floating Point Operation Finished event:0x00000400F8 counters:3 um:zero minimum:10000 name:PM_FLUSH : Flush (any type) event:0x0000030012 counters:2 um:zero minimum:10000 name:PM_FLUSH_COMPLETION : The instruction that was next to complete did not complete because it suffered a flush event:0x0000002880 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP : Dispatch flush event:0x0000002088 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP_SB : Dispatch Flush: Scoreboard event:0x0000002888 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_DISP_TLBIE : Dispatch Flush: TLBIE event:0x0000002084 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_HB_RESTORE_CYC : Cycles in which no new instructions can be dispatched to the ICT after a flush. History buffer recovery event:0x00000058A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_LSU : LSU flushes. Includes all lsu flushes event:0x00000050A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_FLUSH_MPRED : Branch mispredict flushes. Includes target and address misprecition event:0x0000045054 counters:3 um:zero minimum:10000 name:PM_FMA_CMPL : two flops operation completed (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only. event:0x000000509C counters:0,1,2,3 um:zero minimum:10000 name:PM_FORCED_NOP : Instruction was forced to execute as a nop because it was found to behave like a nop (have no effect) at decode time event:0x000003000C counters:2 um:zero minimum:10000 name:PM_FREQ_DOWN : Power Management: Below Threshold B event:0x000004000C counters:3 um:zero minimum:10000 name:PM_FREQ_UP : Power Management: Above Threshold A event:0x000003000E counters:2 um:zero minimum:10000 name:PM_FXU_1PLUS_BUSY : At least one of the 4 FXU units is busy event:0x000002000E counters:1 um:zero minimum:10000 name:PM_FXU_BUSY : Cycles in which all 4 FXUs are busy. The FXU is running at capacity event:0x0000040004 counters:3 um:zero minimum:10000 name:PM_FXU_FIN : The fixed point unit Unit finished an instruction. Instructions that finish may not necessary complete. event:0x0000024052 counters:1 um:zero minimum:10000 name:PM_FXU_IDLE : Cycles in which FXU0, FXU1, FXU2, and FXU3 are all idle event:0x0000020050 counters:1 um:zero minimum:10000 name:PM_GRP_PUMP_CPRED : Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x0000020052 counters:1 um:zero minimum:10000 name:PM_GRP_PUMP_MPRED : Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x0000010052 counters:0 um:zero minimum:10000 name:PM_GRP_PUMP_MPRED_RTY : Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x000002000A counters:1 um:zero minimum:10000 name:PM_HV_CYC : Cycles in which msr_hv is high. Note that this event does not take msr_pr into consideration event:0x00000050A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_HWSYNC : Hwsync instruction decoded and transferred event:0x0000004884 counters:0,1,2,3 um:zero minimum:10000 name:PM_IBUF_FULL_CYC : Cycles No room in ibuff event:0x0000010018 counters:0 um:zero minimum:10000 name:PM_IC_DEMAND_CYC : Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a demand load event:0x0000004098 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_DEMAND_L2_BHT_REDIRECT : L2 I cache demand request due to BHT redirect, branch redirect ( 2 bubbles 3 cycles) event:0x0000004898 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_DEMAND_L2_BR_REDIRECT : L2 I cache demand request due to branch Mispredict ( 15 cycle path) event:0x0000004088 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_DEMAND_REQ : Demand Instruction fetch request event:0x0000005888 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_INVALIDATE : Ic line invalidated event:0x0000045058 counters:3 um:zero minimum:10000 name:PM_IC_MISS_CMPL : Non-speculative icache miss, counted at completion event:0x0000005094 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_MISS_ICBI : threaded version, IC Misses where we got EA dir hit but no sector valids were on. ICBI took line out event:0x0000004890 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_CANCEL_HIT : Prefetch Canceled due to icache hit event:0x0000004094 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_CANCEL_L2 : L2 Squashed a demand or prefetch request event:0x0000004090 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_CANCEL_PAGE : Prefetch Canceled due to page boundary event:0x0000004888 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_REQ : Instruction prefetch requests event:0x000000488C counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_PREF_WRITE : Instruction prefetch written into IL1 event:0x0000004894 counters:0,1,2,3 um:zero minimum:10000 name:PM_IC_RELOAD_PRIVATE : Reloading line was brought in private for a specific thread. Most lines are brought in shared for all eight threads. If RA does not match then invalidates and then brings it shared to other thread. In P7 line brought in private , then line was invalidat event:0x0000020008 counters:1 um:zero minimum:10000 name:PM_ICT_EMPTY_CYC : Cycles in which the ICT is completely empty. No itags are assigned to any thread event:0x000004D01E counters:3 um:zero minimum:10000 name:PM_ICT_NOSLOT_BR_MPRED : Ict empty for this thread due to branch mispred event:0x0000034058 counters:2 um:zero minimum:10000 name:PM_ICT_NOSLOT_BR_MPRED_ICMISS : Ict empty for this thread due to Icache Miss and branch mispred event:0x00000100F8 counters:0 um:zero minimum:10000 name:PM_ICT_NOSLOT_CYC : Number of cycles the ICT has no itags assigned to this thread event:0x000004E01A counters:3 um:zero minimum:10000 name:PM_ICT_NOSLOT_DISP_HELD : Cycles in which the NTC instruction is held at dispatch for any reason event:0x0000030018 counters:2 um:zero minimum:10000 name:PM_ICT_NOSLOT_DISP_HELD_HB_FULL : Ict empty for this thread due to dispatch holds because the History Buffer was full. Could be GPR/VSR/VMR/FPR/CR/XVF event:0x000002D01E counters:1 um:zero minimum:10000 name:PM_ICT_NOSLOT_DISP_HELD_ISSQ : Ict empty for this thread due to dispatch hold on this thread due to Issue q full, BRQ full, XVCF Full, Count cache, Link, Tar full event:0x000004D01C counters:3 um:zero minimum:10000 name:PM_ICT_NOSLOT_DISP_HELD_SYNC : Dispatch held due to a synchronizing instruction at dispatch event:0x0000010064 counters:0 um:zero minimum:10000 name:PM_ICT_NOSLOT_DISP_HELD_TBEGIN : the NTC instruction is being held at dispatch because it is a tbegin instruction and there is an older tbegin in the pipeline that must complete before the younger tbegin can dispatch event:0x000003E052 counters:2 um:zero minimum:10000 name:PM_ICT_NOSLOT_IC_L3 : Ict empty for this thread due to icache misses that were sourced from the local L3 event:0x000004E010 counters:3 um:zero minimum:10000 name:PM_ICT_NOSLOT_IC_L3MISS : Ict empty for this thread due to icache misses that were sourced from beyond the local L3. The source could be local/remote/distant memory or another core's cache event:0x000002D01A counters:1 um:zero minimum:10000 name:PM_ICT_NOSLOT_IC_MISS : Ict empty for this thread due to Icache Miss event:0x00000100F6 counters:0 um:zero minimum:10000 name:PM_IERAT_RELOAD : Number of I-ERAT reloads event:0x000004006A counters:3 um:zero minimum:10000 name:PM_IERAT_RELOAD_16M : IERAT Reloaded (Miss) for a 16M page event:0x0000020064 counters:1 um:zero minimum:10000 name:PM_IERAT_RELOAD_4K : IERAT reloaded (after a miss) for 4K pages event:0x000003006A counters:2 um:zero minimum:10000 name:PM_IERAT_RELOAD_64K : IERAT Reloaded (Miss) for a 64k page event:0x000003405E counters:2 um:zero minimum:10000 name:PM_IFETCH_THROTTLE : Cycles in which Instruction fetch throttle was active. event:0x0000014050 counters:0 um:zero minimum:10000 name:PM_INST_CHIP_PUMP_CPRED : Initial and Final Pump Scope was chip pump (prediction=correct) for an instruction fetch event:0x0000010002 counters:0 um:zero minimum:100000 name:PM_INST_CMPL : Number of PowerPC Instructions that completed. event:0x0000020002 counters:1 um:zero minimum:100000 name:PM_INST_CMPL : Number of PowerPC Instructions that completed. event:0x0000030002 counters:2 um:zero minimum:100000 name:PM_INST_CMPL : Number of PowerPC Instructions that completed. event:0x0000040002 counters:3 um:zero minimum:100000 name:PM_INST_CMPL : Number of PowerPC Instructions that completed. event:0x00000200F2 counters:1 um:zero minimum:10000 name:PM_INST_DISP : # PPC Dispatched event:0x00000300F2 counters:2 um:zero minimum:10000 name:PM_INST_DISP : # PPC Dispatched event:0x0000044048 counters:3 um:zero minimum:10000 name:PM_INST_FROM_DL2L3_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch) event:0x0000034048 counters:2 um:zero minimum:10000 name:PM_INST_FROM_DL2L3_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch) event:0x000003404C counters:2 um:zero minimum:10000 name:PM_INST_FROM_DL4 : The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to an instruction fetch (not prefetch) event:0x000004404C counters:3 um:zero minimum:10000 name:PM_INST_FROM_DMEM : The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to an instruction fetch (not prefetch) event:0x0000004080 counters:0,1,2,3 um:zero minimum:10000 name:PM_INST_FROM_L1 : Instruction fetches from L1. L1 instruction hit event:0x0000014042 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L2 : The processor's Instruction cache was reloaded from local core's L2 due to an instruction fetch (not prefetch) event:0x0000044046 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L21_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to an instruction fetch (not prefetch) event:0x0000034046 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L21_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to an instruction fetch (not prefetch) event:0x0000034040 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L2_DISP_CONFLICT_LDHITST : The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to an instruction fetch (not prefetch) event:0x0000044040 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L2_DISP_CONFLICT_OTHER : The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to an instruction fetch (not prefetch) event:0x0000024040 counters:1 um:zero minimum:10000 name:PM_INST_FROM_L2_MEPF : The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to an instruction fetch (not prefetch) event:0x000001404E counters:0 um:zero minimum:10000 name:PM_INST_FROM_L2MISS : The processor's Instruction cache was reloaded from a location other than the local core's L2 due to an instruction fetch (not prefetch) event:0x0000014040 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L2_NO_CONFLICT : The processor's Instruction cache was reloaded from local core's L2 without conflict due to an instruction fetch (not prefetch) event:0x0000044042 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L3 : The processor's Instruction cache was reloaded from local core's L3 due to an instruction fetch (not prefetch) event:0x0000044044 counters:3 um:zero minimum:10000 name:PM_INST_FROM_L31_ECO_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch) event:0x0000034044 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L31_ECO_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch) event:0x0000024044 counters:1 um:zero minimum:10000 name:PM_INST_FROM_L31_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to an instruction fetch (not prefetch) event:0x0000014046 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L31_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to an instruction fetch (not prefetch) event:0x0000034042 counters:2 um:zero minimum:10000 name:PM_INST_FROM_L3_DISP_CONFLICT : The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to an instruction fetch (not prefetch) event:0x0000024042 counters:1 um:zero minimum:10000 name:PM_INST_FROM_L3_MEPF : The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to an instruction fetch (not prefetch) event:0x00000300FA counters:2 um:zero minimum:10000 name:PM_INST_FROM_L3MISS : Marked instruction was reloaded from a location beyond the local chiplet event:0x000004404E counters:3 um:zero minimum:10000 name:PM_INST_FROM_L3MISS_MOD : The processor's Instruction cache was reloaded from a location other than the local core's L3 due to a instruction fetch event:0x0000014044 counters:0 um:zero minimum:10000 name:PM_INST_FROM_L3_NO_CONFLICT : The processor's Instruction cache was reloaded from local core's L3 without conflict due to an instruction fetch (not prefetch) event:0x000001404C counters:0 um:zero minimum:10000 name:PM_INST_FROM_LL4 : The processor's Instruction cache was reloaded from the local chip's L4 cache due to an instruction fetch (not prefetch) event:0x0000024048 counters:1 um:zero minimum:10000 name:PM_INST_FROM_LMEM : The processor's Instruction cache was reloaded from the local chip's Memory due to an instruction fetch (not prefetch) event:0x000002404C counters:1 um:zero minimum:10000 name:PM_INST_FROM_MEMORY : The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to an instruction fetch (not prefetch) event:0x000004404A counters:3 um:zero minimum:10000 name:PM_INST_FROM_OFF_CHIP_CACHE : The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to an instruction fetch (not prefetch) event:0x0000014048 counters:0 um:zero minimum:10000 name:PM_INST_FROM_ON_CHIP_CACHE : The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to an instruction fetch (not prefetch) event:0x0000024046 counters:1 um:zero minimum:10000 name:PM_INST_FROM_RL2L3_MOD : The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch) event:0x000001404A counters:0 um:zero minimum:10000 name:PM_INST_FROM_RL2L3_SHR : The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch) event:0x000002404A counters:1 um:zero minimum:10000 name:PM_INST_FROM_RL4 : The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to an instruction fetch (not prefetch) event:0x000003404A counters:2 um:zero minimum:10000 name:PM_INST_FROM_RMEM : The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to an instruction fetch (not prefetch) event:0x000002C05C counters:1 um:zero minimum:10000 name:PM_INST_GRP_PUMP_CPRED : Initial and Final Pump Scope was group pump (prediction=correct) for an instruction fetch (demand only) event:0x000002C05E counters:1 um:zero minimum:10000 name:PM_INST_GRP_PUMP_MPRED : Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for an instruction fetch (demand only) event:0x0000014052 counters:0 um:zero minimum:10000 name:PM_INST_GRP_PUMP_MPRED_RTY : Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for an instruction fetch event:0x000004001C counters:3 um:zero minimum:10000 name:PM_INST_IMC_MATCH_CMPL : IMC Match Count event:0x0000014054 counters:0 um:zero minimum:10000 name:PM_INST_PUMP_CPRED : Pump prediction correct. Counts across all types of pumps for an instruction fetch event:0x0000044052 counters:3 um:zero minimum:10000 name:PM_INST_PUMP_MPRED : Pump misprediction. Counts across all types of pumps for an instruction fetch event:0x0000034050 counters:2 um:zero minimum:10000 name:PM_INST_SYS_PUMP_CPRED : Initial and Final Pump Scope was system pump (prediction=correct) for an instruction fetch event:0x0000034052 counters:2 um:zero minimum:10000 name:PM_INST_SYS_PUMP_MPRED : Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for an instruction fetch event:0x0000044050 counters:3 um:zero minimum:10000 name:PM_INST_SYS_PUMP_MPRED_RTY : Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for an instruction fetch event:0x0000024050 counters:1 um:zero minimum:100000 name:PM_IOPS_CMPL : Internal Operations completed event:0x0000045048 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_DL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request event:0x0000035048 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_DL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request event:0x000003504C counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_DL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a instruction side request event:0x000004504C counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_DMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a instruction side request event:0x0000015042 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L2 : A Page Table Entry was loaded into the TLB from local core's L2 due to a instruction side request event:0x0000045046 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L21_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a instruction side request event:0x0000035046 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L21_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a instruction side request event:0x0000025040 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_L2_MEPF : A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a instruction side request event:0x000001504E counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L2MISS : A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a instruction side request event:0x0000015040 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L2_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a instruction side request event:0x0000045042 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L3 : A Page Table Entry was loaded into the TLB from local core's L3 due to a instruction side request event:0x0000045044 counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_ECO_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a instruction side request event:0x0000035044 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_ECO_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a instruction side request event:0x0000025044 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a instruction side request event:0x0000015046 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L31_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a instruction side request event:0x0000035042 counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_L3_DISP_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a instruction side request event:0x0000025042 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_L3_MEPF : A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a instruction side request event:0x000004504E counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_L3MISS : A Page Table Entry was loaded into the TLB from a location other than the local core's L3 due to a instruction side request event:0x0000015044 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_L3_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a instruction side request event:0x000001504C counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_LL4 : A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a instruction side request event:0x0000025048 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_LMEM : A Page Table Entry was loaded into the TLB from the local chip's Memory due to a instruction side request event:0x000002504C counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_MEMORY : A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a instruction side request event:0x000004504A counters:3 um:zero minimum:10000 name:PM_IPTEG_FROM_OFF_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a instruction side request event:0x0000015048 counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_ON_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a instruction side request event:0x0000025046 counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_RL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request event:0x000001504A counters:0 um:zero minimum:10000 name:PM_IPTEG_FROM_RL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request event:0x000002504A counters:1 um:zero minimum:10000 name:PM_IPTEG_FROM_RL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a instruction side request event:0x000003504A counters:2 um:zero minimum:10000 name:PM_IPTEG_FROM_RMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a instruction side request event:0x000001688A counters:0 um:zero minimum:10000 name:PM_ISIDE_DISP : All I-side dispatch attempts for this thread (excludes i_l2mru_tch_reqs) event:0x000002608A counters:1 um:zero minimum:10000 name:PM_ISIDE_DISP_FAIL_ADDR : All I-side dispatch attempts for this thread that failed due to a addr collision with another machine (excludes i_l2mru_tch_reqs) event:0x000002688A counters:1 um:zero minimum:10000 name:PM_ISIDE_DISP_FAIL_OTHER : All I-side dispatch attempts for this thread that failed due to a reason other than addrs collision (excludes i_l2mru_tch_reqs) event:0x0000026890 counters:1 um:zero minimum:10000 name:PM_ISIDE_L2MEMACC : Valid when first beat of data comes in for an I-side fetch where data came from memory event:0x0000046880 counters:3 um:zero minimum:10000 name:PM_ISIDE_MRU_TOUCH : I-side L2 MRU touch sent to L2 for this thread event:0x000000D8A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISLB_MISS : Instruction SLB Miss - Total of all segment sizes event:0x0000040006 counters:3 um:zero minimum:10000 name:PM_ISLB_MISS : Number of ISLB misses for this thread event:0x000003005A counters:2 um:zero minimum:10000 name:PM_ISQ_0_8_ENTRIES : Cycles in which 8 or less Issue Queue entries are in use. This is a shared event, not per thread event:0x000004000A counters:3 um:zero minimum:10000 name:PM_ISQ_36_44_ENTRIES : Cycles in which 36 or more Issue Queue entries are in use. This is a shared event, not per thread. There are 44 issue queue entries across 4 slices in the whole core event:0x0000003080 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU0_ISS_HOLD_ALL : All ISU rejects event:0x0000003084 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU1_ISS_HOLD_ALL : All ISU rejects event:0x0000003880 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU2_ISS_HOLD_ALL : All ISU rejects event:0x0000003884 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISU3_ISS_HOLD_ALL : All ISU rejects event:0x0000002884 counters:0,1,2,3 um:zero minimum:10000 name:PM_ISYNC : Isync completion count per thread event:0x00000400FC counters:3 um:zero minimum:10000 name:PM_ITLB_MISS : ITLB Reloaded. Counts 1 per ITLB miss for HPT but multiple for radix depending on number of levels traveresed event:0x000001002C counters:0 um:zero minimum:10000 name:PM_L1_DCACHE_RELOADED_ALL : L1 data cache reloaded for demand. If MMCR1[16] is 1, prefetches will be included as well event:0x00000300F6 counters:2 um:zero minimum:10000 name:PM_L1_DCACHE_RELOAD_VALID : DL1 reloaded due to Demand Load event:0x000000408C counters:0,1,2,3 um:zero minimum:10000 name:PM_L1_DEMAND_WRITE : Instruction Demand sectors written into IL1 event:0x00000200FD counters:1 um:zero minimum:10000 name:PM_L1_ICACHE_MISS : Demand iCache Miss event:0x0000040012 counters:3 um:zero minimum:10000 name:PM_L1_ICACHE_RELOADED_ALL : Counts all Icache reloads includes demand, prefetch, prefetch turned into demand and demand turned into prefetch event:0x0000030068 counters:2 um:zero minimum:10000 name:PM_L1_ICACHE_RELOADED_PREF : Counts all Icache prefetch reloads ( includes demand turned into prefetch) event:0x0000016890 counters:0 um:zero minimum:10000 name:PM_L1PF_L2MEMACC : Valid when first beat of data comes in for an L1PF where data came from memory event:0x0000020054 counters:1 um:zero minimum:10000 name:PM_L1_PREF : A data line was written to the L1 due to a hardware or software prefetch event:0x000000E880 counters:0,1,2,3 um:zero minimum:10000 name:PM_L1_SW_PREF : Software L1 Prefetches, including SW Transient Prefetches event:0x0000016082 counters:0 um:zero minimum:10000 name:PM_L2_CASTOUT_MOD : L2 Castouts - Modified (M,Mu,Me) event:0x0000016882 counters:0 um:zero minimum:10000 name:PM_L2_CASTOUT_SHR : L2 Castouts - Shared (Tx,Sx) event:0x0000046088 counters:3 um:zero minimum:10000 name:PM_L2_CHIP_PUMP : RC requests that were local (aka chip) pump attempts event:0x0000026882 counters:1 um:zero minimum:10000 name:PM_L2_DC_INV : D-cache invalidates sent over the reload bus to the core event:0x0000046080 counters:3 um:zero minimum:10000 name:PM_L2_DISP_ALL_L2MISS : All successful Ld/St dispatches for this thread that were an L2 miss (excludes i_l2mru_tch_reqs) event:0x0000046888 counters:3 um:zero minimum:10000 name:PM_L2_GROUP_PUMP : RC requests that were on group (aka nodel) pump attempts event:0x0000026088 counters:1 um:zero minimum:10000 name:PM_L2_GRP_GUESS_CORRECT : L2 guess grp (GS or NNS) and guess was correct (data intra-group AND ^on-chip) event:0x0000026888 counters:1 um:zero minimum:10000 name:PM_L2_GRP_GUESS_WRONG : L2 guess grp (GS or NNS) and guess was not correct (ie data on-chip OR beyond-group) event:0x0000026082 counters:1 um:zero minimum:10000 name:PM_L2_IC_INV : I-cache Invalidates sent over the realod bus to the core event:0x0000036080 counters:2 um:zero minimum:10000 name:PM_L2_INST : All successful I-side dispatches for this thread (excludes i_l2mru_tch reqs) event:0x000003609E counters:2 um:zero minimum:10000 name:PM_L2_INST : All successful I-side dispatches for this thread (excludes i_l2mru_tch reqs) event:0x0000036880 counters:2 um:zero minimum:10000 name:PM_L2_INST_MISS : All successful I-side dispatches that were an L2 miss for this thread (excludes i_l2mru_tch reqs) event:0x000004609E counters:3 um:zero minimum:10000 name:PM_L2_INST_MISS : All successful I-side dispatches that were an L2 miss for this thread (excludes i_l2mru_tch reqs) event:0x0000016080 counters:0 um:zero minimum:10000 name:PM_L2_LD : All successful D-side Load dispatches for this thread (L2 miss + L2 hits) event:0x000001609E counters:0 um:zero minimum:10000 name:PM_L2_LD_DISP : All successful D-side load dispatches for this thread (L2 miss + L2 hits) event:0x0000036082 counters:2 um:zero minimum:10000 name:PM_L2_LD_DISP : All successful I-or-D side load dispatches for this thread (excludes i_l2mru_tch_reqs) event:0x000002609E counters:1 um:zero minimum:10000 name:PM_L2_LD_HIT : All successful D-side load dispatches that were L2 hits for this thread event:0x0000036882 counters:2 um:zero minimum:10000 name:PM_L2_LD_HIT : All successful I-or-D side load dispatches for this thread that were L2 hits (excludes i_l2mru_tch_reqs) event:0x0000026080 counters:1 um:zero minimum:10000 name:PM_L2_LD_MISS : All successful D-Side Load dispatches that were an L2 miss for this thread event:0x0000016092 counters:0 um:zero minimum:10000 name:PM_L2_LD_MISS_128B : All successful D-side load dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 128B (i.e., M=0) event:0x0000026092 counters:1 um:zero minimum:10000 name:PM_L2_LD_MISS_64B : All successful D-side load dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 64B(i.e., M=1) event:0x0000016088 counters:0 um:zero minimum:10000 name:PM_L2_LOC_GUESS_CORRECT : L2 guess local (LNS) and guess was correct (ie data local) event:0x0000016888 counters:0 um:zero minimum:10000 name:PM_L2_LOC_GUESS_WRONG : L2 guess local (LNS) and guess was not correct (ie data not on chip) event:0x0000016084 counters:0 um:zero minimum:10000 name:PM_L2_RCLD_DISP : All I-or-D side load dispatch attempts for this thread (excludes i_l2mru_tch_reqs) event:0x0000016884 counters:0 um:zero minimum:10000 name:PM_L2_RCLD_DISP_FAIL_ADDR : All I-od-D side load dispatch attempts for this thread that failed due to address collision with RC/CO/SN/SQ machine (excludes i_l2mru_tch_reqs) event:0x0000026084 counters:1 um:zero minimum:10000 name:PM_L2_RCLD_DISP_FAIL_OTHER : All I-or-D side load dispatch attempts for this thread that failed due to reason other than address collision (excludes i_l2mru_tch_reqs) event:0x0000036084 counters:2 um:zero minimum:10000 name:PM_L2_RCST_DISP : All D-side store dispatch attempts for this thread event:0x0000036884 counters:2 um:zero minimum:10000 name:PM_L2_RCST_DISP_FAIL_ADDR : All D-side store dispatch attempts for this thread that failed due to address collision with RC/CO/SN/SQ event:0x0000046084 counters:3 um:zero minimum:10000 name:PM_L2_RCST_DISP_FAIL_OTHER : All D-side store dispatch attempts for this thread that failed due to reason other than address collision event:0x0000036086 counters:2 um:zero minimum:10000 name:PM_L2_RC_ST_DONE : RC did store to line that was Tx or Sx event:0x000003688A counters:2 um:zero minimum:10000 name:PM_L2_RTY_LD : RC retries on PB for any load from core (excludes DCBFs) event:0x000003689E counters:2 um:zero minimum:10000 name:PM_L2_RTY_LD : RC retries on PB for any load from core (excludes DCBFs) event:0x000003608A counters:2 um:zero minimum:10000 name:PM_L2_RTY_ST : RC retries on PB for any store from core (excludes DCBFs) event:0x000004689E counters:3 um:zero minimum:10000 name:PM_L2_RTY_ST : RC retries on PB for any store from core (excludes DCBFs) event:0x0000046086 counters:3 um:zero minimum:10000 name:PM_L2_SN_M_RD_DONE : SNP dispatched for a read and was M (true M) event:0x0000016086 counters:0 um:zero minimum:10000 name:PM_L2_SN_M_WR_DONE : SNP dispatched for a write and was M (true M) event:0x0000046886 counters:3 um:zero minimum:10000 name:PM_L2_SN_M_WR_DONE : SNP dispatched for a write and was M (true M) event:0x0000036886 counters:2 um:zero minimum:10000 name:PM_L2_SN_SX_I_DONE : SNP dispatched and went from Sx to Ix event:0x0000016880 counters:0 um:zero minimum:10000 name:PM_L2_ST : All successful D-side store dispatches for this thread (L2 miss + L2 hits) event:0x000001689E counters:0 um:zero minimum:10000 name:PM_L2_ST_DISP : All successful D-side store dispatches for this thread (L2 miss + L2 hits) event:0x0000046082 counters:3 um:zero minimum:10000 name:PM_L2_ST_DISP : All successful D-side store dispatches for this thread event:0x000002689E counters:1 um:zero minimum:10000 name:PM_L2_ST_HIT : All successful D-side store dispatches that were L2 hits for this thread event:0x0000046882 counters:3 um:zero minimum:10000 name:PM_L2_ST_HIT : All successful D-side store dispatches for this thread that were L2 hits event:0x0000026880 counters:1 um:zero minimum:10000 name:PM_L2_ST_MISS : All successful D-Side Store dispatches that were an L2 miss for this thread event:0x0000016892 counters:0 um:zero minimum:10000 name:PM_L2_ST_MISS_128B : All successful D-side store dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 128B (i.e., M=0) event:0x0000026892 counters:1 um:zero minimum:10000 name:PM_L2_ST_MISS_64B : All successful D-side store dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 64B (i.e., M=1) event:0x0000036088 counters:2 um:zero minimum:10000 name:PM_L2_SYS_GUESS_CORRECT : L2 guess system (VGS or RNS) and guess was correct (ie data beyond-group) event:0x0000036888 counters:2 um:zero minimum:10000 name:PM_L2_SYS_GUESS_WRONG : L2 guess system (VGS or RNS) and guess was not correct (ie data ^beyond-group) event:0x000004688A counters:3 um:zero minimum:10000 name:PM_L2_SYS_PUMP : RC requests that were system pump attempts event:0x00000260A2 counters:1 um:zero minimum:10000 name:PM_L3_CI_HIT : L3 Castins Hit (total count) event:0x00000268A2 counters:1 um:zero minimum:10000 name:PM_L3_CI_MISS : L3 castins miss (total count) event:0x00000368A4 counters:2 um:zero minimum:10000 name:PM_L3_CINJ : L3 castin of cache inject event:0x00000168AC counters:0 um:zero minimum:10000 name:PM_L3_CI_USAGE : Rotating sample of 16 CI or CO actives event:0x00000360A8 counters:2 um:zero minimum:10000 name:PM_L3_CO : L3 castout occurring (does not include casthrough or log writes (cinj/dmaw)) event:0x00000368AC counters:2 um:zero minimum:10000 name:PM_L3_CO0_BUSY : Lifetime, sample of CO machine 0 valid event:0x00000468AC counters:3 um:zero minimum:10000 name:PM_L3_CO0_BUSY : Lifetime, sample of CO machine 0 valid event:0x00000268A0 counters:1 um:zero minimum:10000 name:PM_L3_CO_L31 : L3 CO to L3.1 OR of port 0 and 1 (lossy = may undercount if two cresps come in the same cyc) event:0x00000360A4 counters:2 um:zero minimum:10000 name:PM_L3_CO_LCO : Total L3 COs occurred on LCO L3.1 (good cresp, may end up in mem on a retry) event:0x00000260A0 counters:1 um:zero minimum:10000 name:PM_L3_CO_MEM : L3 CO to memory OR of port 0 and 1 (lossy = may undercount if two cresp come in the same cyc) event:0x00000168A0 counters:0 um:zero minimum:10000 name:PM_L3_CO_MEPF : L3 CO of line in Mep state (includes casthrough to memory). The Mepf state indicates that a line was brought in to satisfy an L3 prefetch request event:0x000003E05E counters:2 um:zero minimum:10000 name:PM_L3_CO_MEPF : L3 castouts in Mepf state for this thread event:0x00000168B2 counters:0 um:zero minimum:10000 name:PM_L3_GRP_GUESS_CORRECT : Initial scope=group (GS or NNS) and data from same group (near) (pred successful) event:0x00000368B2 counters:2 um:zero minimum:10000 name:PM_L3_GRP_GUESS_WRONG_HIGH : Initial scope=group (GS or NNS) but data from local node. Prediction too high event:0x00000360B2 counters:2 um:zero minimum:10000 name:PM_L3_GRP_GUESS_WRONG_LOW : Initial scope=group (GS or NNS) but data from outside group (far or rem). Prediction too Low event:0x00000160A4 counters:0 um:zero minimum:10000 name:PM_L3_HIT : L3 Hits (L2 miss hitting L3, including data/instrn/xlate) event:0x00000360A2 counters:2 um:zero minimum:10000 name:PM_L3_L2_CO_HIT : L2 CO hits event:0x00000368A2 counters:2 um:zero minimum:10000 name:PM_L3_L2_CO_MISS : L2 CO miss event:0x00000460A2 counters:3 um:zero minimum:10000 name:PM_L3_LAT_CI_HIT : L3 Lateral Castins Hit event:0x00000468A2 counters:3 um:zero minimum:10000 name:PM_L3_LAT_CI_MISS : L3 Lateral Castins Miss event:0x00000260A4 counters:1 um:zero minimum:10000 name:PM_L3_LD_HIT : L3 Hits for demand LDs event:0x00000268A4 counters:1 um:zero minimum:10000 name:PM_L3_LD_MISS : L3 Misses for demand LDs event:0x000000F0B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_L3_LD_PREF : L3 load prefetch, sourced from a hardware or software stream, was sent to the nest event:0x00000160B2 counters:0 um:zero minimum:10000 name:PM_L3_LOC_GUESS_CORRECT : initial scope=node/chip (LNS) and data from local node (local) (pred successful) - always PFs only event:0x00000268B2 counters:1 um:zero minimum:10000 name:PM_L3_LOC_GUESS_WRONG : Initial scope=node (LNS) but data from out side local node (near or far or rem). Prediction too Low event:0x00000168A4 counters:0 um:zero minimum:10000 name:PM_L3_MISS : L3 Misses (L2 miss also missing L3, including data/instrn/xlate) event:0x00000460AA counters:3 um:zero minimum:10000 name:PM_L3_P0_CO_L31 : L3 CO to L3.1 (LCO) port 0 with or without data event:0x00000360AA counters:2 um:zero minimum:10000 name:PM_L3_P0_CO_MEM : L3 CO to memory port 0 with or without data event:0x00000360AE counters:2 um:zero minimum:10000 name:PM_L3_P0_CO_RTY : L3 CO received retry port 0 (memory only), every retry counted event:0x00000460AE counters:3 um:zero minimum:10000 name:PM_L3_P0_CO_RTY : L3 CO received retry port 2 (memory only), every retry counted event:0x00000260B0 counters:1 um:zero minimum:10000 name:PM_L3_P0_GRP_PUMP : L3 PF sent with grp scope port 0, counts even retried requests event:0x00000260AA counters:1 um:zero minimum:10000 name:PM_L3_P0_LCO_DATA : LCO sent with data port 0 event:0x00000160AA counters:0 um:zero minimum:10000 name:PM_L3_P0_LCO_NO_DATA : Dataless L3 LCO sent port 0 event:0x00000160B4 counters:0 um:zero minimum:10000 name:PM_L3_P0_LCO_RTY : L3 initiated LCO received retry on port 0 (can try 4 times) event:0x00000160B0 counters:0 um:zero minimum:10000 name:PM_L3_P0_NODE_PUMP : L3 PF sent with nodal scope port 0, counts even retried requests event:0x00000160AE counters:0 um:zero minimum:10000 name:PM_L3_P0_PF_RTY : L3 PF received retry port 0, every retry counted event:0x00000260AE counters:1 um:zero minimum:10000 name:PM_L3_P0_PF_RTY : L3 PF received retry port 2, every retry counted event:0x00000360B0 counters:2 um:zero minimum:10000 name:PM_L3_P0_SYS_PUMP : L3 PF sent with sys scope port 0, counts even retried requests event:0x00000468AA counters:3 um:zero minimum:10000 name:PM_L3_P1_CO_L31 : L3 CO to L3.1 (LCO) port 1 with or without data event:0x00000368AA counters:2 um:zero minimum:10000 name:PM_L3_P1_CO_MEM : L3 CO to memory port 1 with or without data event:0x00000368AE counters:2 um:zero minimum:10000 name:PM_L3_P1_CO_RTY : L3 CO received retry port 1 (memory only), every retry counted event:0x00000468AE counters:3 um:zero minimum:10000 name:PM_L3_P1_CO_RTY : L3 CO received retry port 3 (memory only), every retry counted event:0x00000268B0 counters:1 um:zero minimum:10000 name:PM_L3_P1_GRP_PUMP : L3 PF sent with grp scope port 1, counts even retried requests event:0x00000268AA counters:1 um:zero minimum:10000 name:PM_L3_P1_LCO_DATA : LCO sent with data port 1 event:0x00000168AA counters:0 um:zero minimum:10000 name:PM_L3_P1_LCO_NO_DATA : Dataless L3 LCO sent port 1 event:0x00000168B4 counters:0 um:zero minimum:10000 name:PM_L3_P1_LCO_RTY : L3 initiated LCO received retry on port 1 (can try 4 times) event:0x00000168B0 counters:0 um:zero minimum:10000 name:PM_L3_P1_NODE_PUMP : L3 PF sent with nodal scope port 1, counts even retried requests event:0x00000168AE counters:0 um:zero minimum:10000 name:PM_L3_P1_PF_RTY : L3 PF received retry port 1, every retry counted event:0x00000268AE counters:1 um:zero minimum:10000 name:PM_L3_P1_PF_RTY : L3 PF received retry port 3, every retry counted event:0x00000368B0 counters:2 um:zero minimum:10000 name:PM_L3_P1_SYS_PUMP : L3 PF sent with sys scope port 1, counts even retried requests event:0x00000260B4 counters:1 um:zero minimum:10000 name:PM_L3_P2_LCO_RTY : L3 initiated LCO received retry on port 2 (can try 4 times) event:0x00000268B4 counters:1 um:zero minimum:10000 name:PM_L3_P3_LCO_RTY : L3 initiated LCO received retry on port 3 (can try 4 times) event:0x00000360B4 counters:2 um:zero minimum:10000 name:PM_L3_PF0_BUSY : Lifetime, sample of PF machine 0 valid event:0x00000460B4 counters:3 um:zero minimum:10000 name:PM_L3_PF0_BUSY : Lifetime, sample of PF machine 0 valid event:0x00000260A8 counters:1 um:zero minimum:10000 name:PM_L3_PF_HIT_L3 : L3 PF hit in L3 (abandoned) event:0x00000160A0 counters:0 um:zero minimum:10000 name:PM_L3_PF_MISS_L3 : L3 PF missed in L3 event:0x00000368A0 counters:2 um:zero minimum:10000 name:PM_L3_PF_OFF_CHIP_CACHE : L3 PF from Off chip cache event:0x00000468A0 counters:3 um:zero minimum:10000 name:PM_L3_PF_OFF_CHIP_MEM : L3 PF from Off chip memory event:0x00000360A0 counters:2 um:zero minimum:10000 name:PM_L3_PF_ON_CHIP_CACHE : L3 PF from On chip cache event:0x00000460A0 counters:3 um:zero minimum:10000 name:PM_L3_PF_ON_CHIP_MEM : L3 PF from On chip memory event:0x00000260AC counters:1 um:zero minimum:10000 name:PM_L3_PF_USAGE : Rotating sample of 32 PF actives event:0x00000368B4 counters:2 um:zero minimum:10000 name:PM_L3_RD0_BUSY : Lifetime, sample of RD machine 0 valid event:0x00000468B4 counters:3 um:zero minimum:10000 name:PM_L3_RD0_BUSY : Lifetime, sample of RD machine 0 valid event:0x00000268AC counters:1 um:zero minimum:10000 name:PM_L3_RD_USAGE : Rotating sample of 16 RD actives event:0x00000360AC counters:2 um:zero minimum:10000 name:PM_L3_SN0_BUSY : Lifetime, sample of snooper machine 0 valid event:0x00000460AC counters:3 um:zero minimum:10000 name:PM_L3_SN0_BUSY : Lifetime, sample of snooper machine 0 valid event:0x00000160AC counters:0 um:zero minimum:10000 name:PM_L3_SN_USAGE : Rotating sample of 16 snoop valids event:0x000000F8B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_L3_SW_PREF : L3 load prefetch, sourced from a software prefetch stream, was sent to the nest event:0x00000260B2 counters:1 um:zero minimum:10000 name:PM_L3_SYS_GUESS_CORRECT : Initial scope=system (VGS or RNS) and data from outside group (far or rem)(pred successful) event:0x00000460B2 counters:3 um:zero minimum:10000 name:PM_L3_SYS_GUESS_WRONG : Initial scope=system (VGS or RNS) but data from local or near. Prediction too high event:0x00000468A4 counters:3 um:zero minimum:10000 name:PM_L3_TRANS_PF : L3 Transient prefetch received from L2 event:0x00000160B6 counters:0 um:zero minimum:10000 name:PM_L3_WI0_BUSY : Rotating sample of 8 WI valid event:0x00000260B6 counters:1 um:zero minimum:10000 name:PM_L3_WI0_BUSY : Rotating sample of 8 WI valid (duplicate) event:0x00000168A8 counters:0 um:zero minimum:10000 name:PM_L3_WI_USAGE : Lifetime, sample of Write Inject machine 0 valid event:0x000003C058 counters:2 um:zero minimum:10000 name:PM_LARX_FIN : Larx finished event:0x000004003E counters:3 um:zero minimum:10000 name:PM_LD_CMPL : count of Loads completed event:0x0000010062 counters:0 um:zero minimum:10000 name:PM_LD_L3MISS_PEND_CYC : Cycles L3 miss was pending for this thread event:0x000003E054 counters:2 um:zero minimum:10000 name:PM_LD_MISS_L1 : Load Missed L1, counted at execution time (can be greater than loads finished). LMQ merges are not included in this count. i.e. if a load instruction misses on an address that is already allocated on the LMQ, this event will not increment for that load). Note that this count is per slice, so if a load spans multiple slices this event will increment multiple times for a single load. event:0x00000400F0 counters:3 um:zero minimum:10000 name:PM_LD_MISS_L1 : Load Missed L1, counted at execution time (can be greater than loads finished). LMQ merges are not included in this count. i.e. if a load instruction misses on an address that is already allocated on the LMQ, this event will not increment for that load). Note that this count is per slice, so if a load spans multiple slices this event will increment multiple times for a single load. event:0x000002C04E counters:1 um:zero minimum:10000 name:PM_LD_MISS_L1_FIN : Number of load instructions that finished with an L1 miss. Note that even if a load spans multiple slices this event will increment only once per load op. event:0x00000100FC counters:0 um:zero minimum:10000 name:PM_LD_REF_L1 : All L1 D cache load references counted at finish, gated by reject event:0x00000058A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LINK_STACK_CORRECT : Link stack predicts right address event:0x0000005898 counters:0,1,2,3 um:zero minimum:10000 name:PM_LINK_STACK_INVALID_PTR : It is most often caused by certain types of flush where the pointer is not available. Can result in the data in the link stack becoming unusable. event:0x0000005098 counters:0,1,2,3 um:zero minimum:10000 name:PM_LINK_STACK_WRONG_ADD_PRED : Link stack predicts wrong address, because of link stack design limitation or software violating the coding conventions event:0x000002E05E counters:1 um:zero minimum:10000 name:PM_LMQ_EMPTY_CYC : Cycles in which the LMQ has no pending load misses for this thread event:0x000001002E counters:0 um:zero minimum:10000 name:PM_LMQ_MERGE : A demand miss collides with a prefetch for the same line event:0x000002E05A counters:1 um:zero minimum:10000 name:PM_LRQ_REJECT : Internal LSU reject from LRQ. Rejects cause the load to go back to LRQ, but it stays contained within the LSU once it gets issued. This event counts the number of times the LRQ attempts to relaunch an instruction after a reject. Any load can suffer multiple rejects event:0x000000D090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_DC_COLLISIONS : Read-write data cache collisions event:0x000000E084 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_ERAT_MISS_PREF : LS0 Erat miss due to prefetch event:0x000000C09C counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_LAUNCH_HELD_PREF : Number of times a load or store instruction was unable to launch/relaunch because a high priority prefetch used that relaunch cycle event:0x000000E0BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_PTE_TABLEWALK_CYC : Cycles when a tablewalk is pending on this thread on table 0 event:0x000000E0B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_TM_DISALLOW : A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it event:0x000000C094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_UNALIGNED_LD : Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000F0B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS0_UNALIGNED_ST : Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000D890 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_DC_COLLISIONS : Read-write data cache collisions event:0x000000E884 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_ERAT_MISS_PREF : LS1 Erat miss due to prefetch event:0x000000C89C counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_LAUNCH_HELD_PREF : Number of times a load or store instruction was unable to launch/relaunch because a high priority prefetch used that relaunch cycle event:0x000000E8BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_PTE_TABLEWALK_CYC : Cycles when a tablewalk is pending on this thread on table 1 event:0x000000E8B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_TM_DISALLOW : A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it event:0x000000C894 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_UNALIGNED_LD : Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000F8B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS1_UNALIGNED_ST : Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000D094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS2_DC_COLLISIONS : Read-write data cache collisions event:0x000000E088 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS2_ERAT_MISS_PREF : LS0 Erat miss due to prefetch event:0x000000E0B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS2_TM_DISALLOW : A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it event:0x000000C098 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS2_UNALIGNED_LD : Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000F0BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LS2_UNALIGNED_ST : Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000D894 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS3_DC_COLLISIONS : Read-write data cache collisions event:0x000000E888 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS3_ERAT_MISS_PREF : LS1 Erat miss due to prefetch event:0x000000E8B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS3_TM_DISALLOW : A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it event:0x000000C898 counters:0,1,2,3 um:zero minimum:10000 name:PM_LS3_UNALIGNED_LD : Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000F8BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LS3_UNALIGNED_ST : Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty event:0x000000D0BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_1_LRQF_FULL_CYC : Counts the number of cycles the LRQF is full. LRQF is the queue that holds loads between finish and completion. If it fills up, instructions stay in LRQ until completion, potentially backing up the LRQ event:0x000000E08C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_ERAT_HIT : Primary ERAT hit. There is no secondary ERAT event:0x000000C0A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_FALSE_LHS : False LHS match detected event:0x000000F090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_L1_CAM_CANCEL : ls0 l1 tm cam cancel event:0x000000D088 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_LDMX_FIN : New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): "The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region." This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56]). event:0x000000D8B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_LMQ_S0_VALID : Slot 0 of LMQ valid event:0x000000D8B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_LRQ_S0_VALID_CYC : Slot 0 of LRQ valid event:0x000000D080 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_SET_MPRED : Set prediction(set-p) miss. The entry was not found in the Set prediction table event:0x000000D0B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_SRQ_S0_VALID_CYC : Slot 0 of SRQ valid event:0x000000F088 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_STORE_REJECT : All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met event:0x000000E094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_TM_L1_HIT : Load tm hit in L1 event:0x000000E09C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU0_TM_L1_MISS : Load tm L1 miss event:0x000000E88C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_ERAT_HIT : Primary ERAT hit. There is no secondary ERAT event:0x000000C8A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_FALSE_LHS : False LHS match detected event:0x000000F890 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_L1_CAM_CANCEL : ls1 l1 tm cam cancel event:0x000000D888 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_LDMX_FIN : New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): "The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region." This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56]). event:0x000000D880 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_SET_MPRED : Set prediction(set-p) miss. The entry was not found in the Set prediction table event:0x000000F888 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_STORE_REJECT : All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met event:0x000000E894 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_TM_L1_HIT : Load tm hit in L1 event:0x000000E89C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU1_TM_L1_MISS : Load tm L1 miss event:0x000000D8BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_3_LRQF_FULL_CYC : Counts the number of cycles the LRQF is full. LRQF is the queue that holds loads between finish and completion. If it fills up, instructions stay in LRQ until completion, potentially backing up the LRQ event:0x000000E090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_ERAT_HIT : Primary ERAT hit. There is no secondary ERAT event:0x000000C0A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_FALSE_LHS : False LHS match detected event:0x000000F094 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_L1_CAM_CANCEL : ls2 l1 tm cam cancel event:0x000000D08C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_LDMX_FIN : New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): "The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region." This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56]). event:0x000000D084 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_SET_MPRED : Set prediction(set-p) miss. The entry was not found in the Set prediction table event:0x000000F08C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_STORE_REJECT : All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met event:0x000000E098 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_TM_L1_HIT : Load tm hit in L1 event:0x000000E0A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU2_TM_L1_MISS : Load tm L1 miss event:0x000000E890 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_ERAT_HIT : Primary ERAT hit. There is no secondary ERAT event:0x000000C8A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_FALSE_LHS : False LHS match detected event:0x000000F894 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_L1_CAM_CANCEL : ls3 l1 tm cam cancel event:0x000000D88C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_LDMX_FIN : New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): "The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region." This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56]). event:0x000000D884 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_SET_MPRED : Set prediction(set-p) miss. The entry was not found in the Set prediction table event:0x000000F88C counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_STORE_REJECT : All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met event:0x000000E898 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_TM_L1_HIT : Load tm hit in L1 event:0x000000E8A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU3_TM_L1_MISS : Load tm L1 miss event:0x00000200F6 counters:1 um:zero minimum:10000 name:PM_LSU_DERAT_MISS : DERAT Reloaded due to a DERAT miss event:0x0000030066 counters:2 um:zero minimum:10000 name:PM_LSU_FIN : LSU Finished a PPC instruction (up to 4 per cycle) event:0x000000C8A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_ATOMIC : Quad-word loads (lq) are considered atomic because they always span at least 2 slices. If a snoop or store from another thread changes the data the load is accessing between the 2 or 3 pieces of the lq instruction, the lq will be flushed event:0x000000C0A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_CI : Load was not issued to LSU as a cache inhibited (non-cacheable) load but it was later determined to be cache inhibited event:0x000000C0AC counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_EMSH : An ERAT miss was detected after a set-p hit. Erat tracker indicates fail due to tlbmiss and the instruction gets flushed because the instruction was working on the wrong address event:0x000000C8B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_LARX_STCX : A larx is flushed because an older larx has an LMQ reservation for the same thread. A stcx is flushed because an older stcx is in the LMQ. The flush happens when the older larx/stcx relaunches event:0x000000C8B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_LHL_SHL : The instruction was flushed because of a sequential load/store consistency. If a load or store hits on an older load that has either been snooped (for loads) or has stale data (for stores). event:0x000000C8B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_LHS : Effective Address alias flush : no EA match but Real Address match. If the data has not yet been returned for this load, the instruction will just be rejected, but if it has returned data, it will be flushed event:0x00000020B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_NEXT : LSU flush next reported at flush time. Sometimes these also come with an exception event:0x000000C0BC counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_OTHER : Other LSU flushes including: Sync (sync ack from L2 caused search of LRQ for oldest snooped load, This will either signal a Precise Flush of the oldest snooped loa or a Flush Next PPC) event:0x000000C8AC counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_RELAUNCH_MISS : If a load that has already returned data and has to relaunch for any reason then gets a miss (erat, setp, data cache), it will often be flushed at relaunch time because the data might be inconsistent event:0x000000C0B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_SAO : A load-hit-load condition with Strong Address Ordering will have address compare disabled and flush event:0x000000C0B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_UE : Correctable ECC error on reload data, reported at critical data forward time event:0x000000C0B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_FLUSH_WRK_ARND : LSU workaround flush. These flushes are setup with programmable scan only latches to perform various actions when the flush macro receives a trigger from the dbg macros. These actions include things like flushing the next op encountered for a particular thread or flushing the next op that is NTC op that is encountered on a particular slice. The kind of flush that the workaround is setup to perform is highly variable. event:0x000000D0B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_LMQ_FULL_CYC : Counts the number of cycles the LMQ is full event:0x000002003E counters:1 um:zero minimum:10000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC : Cycles in which the LSU is empty for all threads (lmq and srq are completely empty) event:0x000000C890 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_NCST : Asserts when a i=1 store op is sent to the nest. No record of issue pipe (LS0/LS1) is maintained so this is for both pipes. Probably don't need separate LS0 and LS1 event:0x000002E05C counters:1 um:zero minimum:10000 name:PM_LSU_REJECT_ERAT_MISS : LSU Reject due to ERAT (up to 4 per cycles) event:0x000004E05C counters:3 um:zero minimum:10000 name:PM_LSU_REJECT_LHS : LSU Reject due to LHS (up to 4 per cycle) event:0x000003001C counters:2 um:zero minimum:10000 name:PM_LSU_REJECT_LMQ_FULL : LSU Reject due to LMQ full (up to 4 per cycles) event:0x000001001A counters:0 um:zero minimum:10000 name:PM_LSU_SRQ_FULL_CYC : Cycles in which the Store Queue is full on all 4 slices. This is event is not per thread. All the threads will see the same count for this core resource event:0x000000C090 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_STCX : STCX sent to nest, i.e. total event:0x000000F080 counters:0,1,2,3 um:zero minimum:10000 name:PM_LSU_STCX_FAIL : LSU_STCX_FAIL event:0x0000005894 counters:0,1,2,3 um:zero minimum:10000 name:PM_LWSYNC : Lwsync instruction decoded and transferred event:0x000004505C counters:3 um:zero minimum:10000 name:PM_MATH_FLOP_CMPL : Math flop instruction completed event:0x000004C058 counters:3 um:zero minimum:10000 name:PM_MEM_CO : Memory castouts from this thread event:0x0000010058 counters:0 um:zero minimum:10000 name:PM_MEM_LOC_THRESH_IFU : Local Memory above threshold for IFU speculation control event:0x0000040056 counters:3 um:zero minimum:10000 name:PM_MEM_LOC_THRESH_LSU_HIGH : Local memory above threshold for LSU medium event:0x000001C05E counters:0 um:zero minimum:10000 name:PM_MEM_LOC_THRESH_LSU_MED : Local memory above threshold for data prefetch event:0x000002C058 counters:1 um:zero minimum:10000 name:PM_MEM_PREF : Memory prefetch for this thread. Includes L4 event:0x0000010056 counters:0 um:zero minimum:10000 name:PM_MEM_READ : Reads from Memory from this thread (includes data/inst/xlate/l1prefetch/inst prefetch). Includes L4 event:0x000003C05E counters:2 um:zero minimum:10000 name:PM_MEM_RWITM : Memory Read With Intent to Modify for this thread event:0x000003515E counters:2 um:zero minimum:100 name:PM_MRK_BACK_BR_CMPL : Marked branch instruction completed with a target address less than current instruction address event:0x0000010138 counters:0 um:zero minimum:100 name:PM_MRK_BR_2PATH : marked branches which are not strongly biased event:0x000001016E counters:0 um:zero minimum:100 name:PM_MRK_BR_CMPL : Branch Instruction completed event:0x00000301E4 counters:2 um:zero minimum:100 name:PM_MRK_BR_MPRED_CMPL : Marked Branch Mispredicted event:0x00000101E2 counters:0 um:zero minimum:100 name:PM_MRK_BR_TAKEN_CMPL : Marked Branch Taken completed event:0x000002013A counters:1 um:zero minimum:100 name:PM_MRK_BRU_FIN : bru marked instr finish event:0x000003D14E counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load event:0x000004D12E counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_MOD_CYC : Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load event:0x000001D150 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load event:0x000002C128 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL2L3_SHR_CYC : Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load event:0x000001D152 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL4 : The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a marked load event:0x000002C12C counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_DL4_CYC : Duration in cycles to reload from another chip's L4 on a different Node or Group (Distant) due to a marked load event:0x000003D14C counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_DMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a marked load event:0x000004E11E counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_DMEM_CYC : Duration in cycles to reload from another chip's memory on the same Node or Group (Distant) due to a marked load event:0x000002C126 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2 : The processor's data cache was reloaded from local core's L2 due to a marked load event:0x000004D146 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a marked load event:0x000003D148 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_MOD_CYC : Duration in cycles to reload with Modified (M) data from another core's L2 on the same chip due to a marked load event:0x000002D14E counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a marked load event:0x000001D154 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L21_SHR_CYC : Duration in cycles to reload with Shared (S) data from another core's L2 on the same chip due to a marked load event:0x0000014156 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_CYC : Duration in cycles to reload from local core's L2 due to a marked load event:0x000002D148 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST : The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a marked load event:0x000001415A counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC : Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load event:0x000002C124 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER : The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a marked load event:0x000003D140 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER_CYC : Duration in cycles to reload from local core's L2 with dispatch conflict due to a marked load event:0x000004C120 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_MEPF : The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load event:0x000003D144 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_MEPF_CYC : Duration in cycles to reload from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load event:0x00000401E8 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2MISS : The processor's data cache was reloaded from a location other than the local core's L2 due to a marked load event:0x0000035152 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2MISS_CYC : Duration in cycles to reload from a location other than the local core's L2 due to a marked load event:0x000002C120 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_NO_CONFLICT : The processor's data cache was reloaded from local core's L2 without conflict due to a marked load event:0x0000014158 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L2_NO_CONFLICT_CYC : Duration in cycles to reload from local core's L2 without conflict due to a marked load event:0x000004D142 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3 : The processor's data cache was reloaded from local core's L3 due to a marked load event:0x000004D144 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_MOD : The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a marked load event:0x0000035158 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_MOD_CYC : Duration in cycles to reload with Modified (M) data from another core's ECO L3 on the same chip due to a marked load event:0x000002D14C counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_SHR : The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a marked load event:0x000001D142 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_ECO_SHR_CYC : Duration in cycles to reload with Shared (S) data from another core's ECO L3 on the same chip due to a marked load event:0x000002D144 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_MOD : The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a marked load event:0x000001D140 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_MOD_CYC : Duration in cycles to reload with Modified (M) data from another core's L3 on the same chip due to a marked load event:0x000004D124 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_SHR : The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a marked load event:0x0000035156 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L31_SHR_CYC : Duration in cycles to reload with Shared (S) data from another core's L3 on the same chip due to a marked load event:0x0000035154 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_CYC : Duration in cycles to reload from local core's L3 due to a marked load event:0x000001D144 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_DISP_CONFLICT : The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a marked load event:0x000002C122 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_DISP_CONFLICT_CYC : Duration in cycles to reload from local core's L3 with dispatch conflict due to a marked load event:0x000002D142 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_MEPF : The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load event:0x000001415C counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_MEPF_CYC : Duration in cycles to reload from local core's L3 without dispatch conflicts hit on Mepf state due to a marked load event:0x00000201E4 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3MISS : The processor's data cache was reloaded from a location other than the local core's L3 due to a marked load event:0x000001415E counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3MISS_CYC : Duration in cycles to reload from a location other than the local core's L3 due to a marked load event:0x000003D146 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_NO_CONFLICT : The processor's data cache was reloaded from local core's L3 without conflict due to a marked load event:0x000004C124 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_L3_NO_CONFLICT_CYC : Duration in cycles to reload from local core's L3 without conflict due to a marked load event:0x000001D14C counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_LL4 : The processor's data cache was reloaded from the local chip's L4 cache due to a marked load event:0x000002C12E counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_LL4_CYC : Duration in cycles to reload from the local chip's L4 cache due to a marked load event:0x000003D142 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_LMEM : The processor's data cache was reloaded from the local chip's Memory due to a marked load event:0x000004D128 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_LMEM_CYC : Duration in cycles to reload from the local chip's Memory due to a marked load event:0x00000201E0 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_MEMORY : The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load event:0x000001D146 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_MEMORY_CYC : Duration in cycles to reload from a memory location including L4 from local remote or distant due to a marked load event:0x000002D120 counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_OFF_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load event:0x000001D14E counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_OFF_CHIP_CACHE_CYC : Duration in cycles to reload either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load event:0x000004D140 counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_ON_CHIP_CACHE : The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a marked load event:0x000003515A counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_ON_CHIP_CACHE_CYC : Duration in cycles to reload either shared or modified data from another core's L2/L3 on the same chip due to a marked load event:0x000001D14A counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_MOD : The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load event:0x000002D14A counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_MOD_CYC : Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load event:0x0000035150 counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_SHR : The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load event:0x000004C12A counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL2L3_SHR_CYC : Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load event:0x000003515C counters:2 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL4 : The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a marked load event:0x000004D12A counters:3 um:zero minimum:100 name:PM_MRK_DATA_FROM_RL4_CYC : Duration in cycles to reload from another chip's L4 on the same Node or Group ( Remote) due to a marked load event:0x000001D148 counters:0 um:zero minimum:100 name:PM_MRK_DATA_FROM_RMEM : The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a marked load event:0x000002C12A counters:1 um:zero minimum:100 name:PM_MRK_DATA_FROM_RMEM_CYC : Duration in cycles to reload from another chip's memory on the same Node or Group ( Remote) due to a marked load event:0x0000040118 counters:3 um:zero minimum:100 name:PM_MRK_DCACHE_RELOAD_INTV : Combined Intervention event event:0x00000301E6 counters:2 um:zero minimum:100 name:PM_MRK_DERAT_MISS : Erat Miss (TLB Access) All page sizes event:0x000004C15C counters:3 um:zero minimum:100 name:PM_MRK_DERAT_MISS_16G : Marked Data ERAT Miss (Data TLB Access) page size 16G event:0x000003D154 counters:2 um:zero minimum:100 name:PM_MRK_DERAT_MISS_16M : Marked Data ERAT Miss (Data TLB Access) page size 16M event:0x000003D152 counters:2 um:zero minimum:100 name:PM_MRK_DERAT_MISS_1G : Marked Data ERAT Miss (Data TLB Access) page size 1G. Implies radix translation event:0x000002D152 counters:1 um:zero minimum:100 name:PM_MRK_DERAT_MISS_2M : Marked Data ERAT Miss (Data TLB Access) page size 2M. Implies radix translation event:0x000002D150 counters:1 um:zero minimum:100 name:PM_MRK_DERAT_MISS_4K : Marked Data ERAT Miss (Data TLB Access) page size 4K event:0x000002D154 counters:1 um:zero minimum:100 name:PM_MRK_DERAT_MISS_64K : Marked Data ERAT Miss (Data TLB Access) page size 64K event:0x0000020132 counters:1 um:zero minimum:100 name:PM_MRK_DFU_FIN : Decimal Unit marked Instruction Finish event:0x000004F148 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003F148 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003F14C counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004F14C counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_DMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F142 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2 : A Page Table Entry was loaded into the TLB from local core's L2 due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004F146 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L21_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003F146 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L21_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F140 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2_MEPF : A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F14E counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2MISS : A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F140 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L2_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004F142 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3 : A Page Table Entry was loaded into the TLB from local core's L3 due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004F144 counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_ECO_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003F144 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_ECO_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F144 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F146 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L31_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003F142 counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3_DISP_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F142 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3_MEPF : A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004F14E counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3MISS : A Page Table Entry was loaded into the TLB from a location other than the local core's L3 due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F144 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_L3_NO_CONFLICT : A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F14C counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_LL4 : A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F148 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_LMEM : A Page Table Entry was loaded into the TLB from the local chip's Memory due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F14C counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_MEMORY : A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000004F14A counters:3 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_OFF_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F148 counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_ON_CHIP_CACHE : A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F146 counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RL2L3_MOD : A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000001F14A counters:0 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RL2L3_SHR : A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000002F14A counters:1 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RL4 : A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x000003F14A counters:2 um:zero minimum:100 name:PM_MRK_DPTEG_FROM_RMEM : A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included event:0x00000401E4 counters:3 um:zero minimum:100 name:PM_MRK_DTLB_MISS : Marked dtlb miss event:0x000002D15E counters:1 um:zero minimum:100 name:PM_MRK_DTLB_MISS_16G : Marked Data TLB Miss page size 16G event:0x000004C15E counters:3 um:zero minimum:100 name:PM_MRK_DTLB_MISS_16M : Marked Data TLB Miss page size 16M event:0x000001D15C counters:0 um:zero minimum:100 name:PM_MRK_DTLB_MISS_1G : Marked Data TLB reload (after a miss) page size 2M. Implies radix translation was used event:0x000002D156 counters:1 um:zero minimum:100 name:PM_MRK_DTLB_MISS_4K : Marked Data TLB Miss page size 4k event:0x000003D156 counters:2 um:zero minimum:100 name:PM_MRK_DTLB_MISS_64K : Marked Data TLB Miss page size 64K event:0x0000040154 counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_BKILL : Marked store had to do a bkill event:0x000001F152 counters:0 um:zero minimum:100 name:PM_MRK_FAB_RSP_BKILL_CYC : cycles L2 RC took for a bkill event:0x000003015E counters:2 um:zero minimum:100 name:PM_MRK_FAB_RSP_CLAIM_RTY : Sampled store did a rwitm and got a rty event:0x0000030154 counters:2 um:zero minimum:100 name:PM_MRK_FAB_RSP_DCLAIM : Marked store had to do a dclaim event:0x000002F152 counters:1 um:zero minimum:100 name:PM_MRK_FAB_RSP_DCLAIM_CYC : cycles L2 RC took for a dclaim event:0x000004015E counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_RD_RTY : Sampled L2 reads retry count event:0x000001015E counters:0 um:zero minimum:100 name:PM_MRK_FAB_RSP_RD_T_INTV : Sampled Read got a T intervention event:0x000004F150 counters:3 um:zero minimum:100 name:PM_MRK_FAB_RSP_RWITM_CYC : cycles L2 RC took for a rwitm event:0x000002015E counters:1 um:zero minimum:100 name:PM_MRK_FAB_RSP_RWITM_RTY : Sampled store did a rwitm and got a rty event:0x0000020134 counters:1 um:zero minimum:100 name:PM_MRK_FXU_FIN : fxu marked instr finish event:0x000004013A counters:3 um:zero minimum:100 name:PM_MRK_IC_MISS : Marked instruction experienced I cache miss event:0x0000024058 counters:1 um:zero minimum:100 name:PM_MRK_INST : An instruction was marked. Includes both Random Instruction Sampling (RIS) at decode time and Random Event Sampling (RES) at the time the configured event happens event:0x00000401E0 counters:3 um:zero minimum:1000 name:PM_MRK_INST_CMPL : marked instruction completed event:0x0000020130 counters:1 um:zero minimum:1000 name:PM_MRK_INST_DECODED : An instruction was marked at decode time. Random Instruction Sampling (RIS) only event:0x00000101E0 counters:0 um:zero minimum:1000 name:PM_MRK_INST_DISP : The thread has dispatched a randomly sampled marked instruction event:0x0000030130 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN : marked instruction finished event:0x00000401E6 counters:3 um:zero minimum:1000 name:PM_MRK_INST_FROM_L3MISS : Marked instruction was reloaded from a location beyond the local chiplet event:0x0000010132 counters:0 um:zero minimum:1000 name:PM_MRK_INST_ISSUED : Marked instruction issued event:0x0000040134 counters:3 um:zero minimum:1000 name:PM_MRK_INST_TIMEO : marked Instruction finish timeout (instruction lost) event:0x00000101E4 counters:0 um:zero minimum:100 name:PM_MRK_L1_ICACHE_MISS : sampled Instruction suffered an icache Miss event:0x00000101EA counters:0 um:zero minimum:100 name:PM_MRK_L1_RELOAD_VALID : Marked demand reload event:0x0000020114 counters:1 um:zero minimum:100 name:PM_MRK_L2_RC_DISP : Marked Instruction RC dispatched in L2 event:0x000003012A counters:2 um:zero minimum:100 name:PM_MRK_L2_RC_DONE : Marked RC done event:0x000001E15E counters:0 um:zero minimum:100 name:PM_MRK_L2_TM_REQ_ABORT : TM abort event:0x000003E15C counters:2 um:zero minimum:100 name:PM_MRK_L2_TM_ST_ABORT_SISTER : TM marked store abort for this thread event:0x0000040116 counters:3 um:zero minimum:100 name:PM_MRK_LARX_FIN : Larx finished event:0x000001013E counters:0 um:zero minimum:100 name:PM_MRK_LD_MISS_EXPOSED_CYC : Marked Load exposed Miss (use edge detect to count #) event:0x00000201E2 counters:1 um:zero minimum:100 name:PM_MRK_LD_MISS_L1 : Marked DL1 Demand Miss counted at exec time. Note that this count is per slice, so if a load spans multiple slices this event will increment multiple times for a single load. event:0x000001D056 counters:0 um:zero minimum:100 name:PM_MRK_LD_MISS_L1_CYC : Marked ld latency event:0x0000030162 counters:2 um:zero minimum:100 name:PM_MRK_LSU_DERAT_MISS : Marked derat reload (miss) for any page size event:0x0000040132 counters:3 um:zero minimum:100 name:PM_MRK_LSU_FIN : lsu marked instr PPC finish event:0x000000D098 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_ATOMIC : Quad-word loads (lq) are considered atomic because they always span at least 2 slices. If a snoop or store from another thread changes the data the load is accessing between the 2 or 3 pieces of the lq instruction, the lq will be flushed event:0x000000D898 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_EMSH : An ERAT miss was detected after a set-p hit. Erat tracker indicates fail due to tlbmiss and the instruction gets flushed because the instruction was working on the wrong address event:0x000000D8A4 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_LARX_STCX : A larx is flushed because an older larx has an LMQ reservation for the same thread. A stcx is flushed because an older stcx is in the LMQ. The flush happens when the older larx/stcx relaunches event:0x000000D8A0 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_LHL_SHL : The instruction was flushed because of a sequential load/store consistency. If a load or store hits on an older load that has either been snooped (for loads) or has stale data (for stores). event:0x000000D0A0 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_LHS : Effective Address alias flush : no EA match but Real Address match. If the data has not yet been returned for this load, the instruction will just be rejected, but if it has returned data, it will be flushed event:0x000000D09C counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_RELAUNCH_MISS : If a load that has already returned data and has to relaunch for any reason then gets a miss (erat, setp, data cache), it will often be flushed at relaunch time because the data might be inconsistent event:0x000000D0A4 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_SAO : A load-hit-load condition with Strong Address Ordering will have address compare disabled and flush event:0x000000D89C counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_LSU_FLUSH_UE : Correctable ECC error on reload data, reported at critical data forward time event:0x000002011C counters:1 um:zero minimum:100 name:PM_MRK_NTC_CYC : Cycles during which the marked instruction is next to complete (completion is held up because the marked instruction hasn't completed yet) event:0x0000020112 counters:1 um:zero minimum:100 name:PM_MRK_NTF_FIN : Marked next to finish instruction finished event:0x000001F05E counters:0 um:zero minimum:100 name:PM_MRK_PROBE_NOP_CMPL : Marked probeNops completed event:0x000001D15E counters:0 um:zero minimum:1000 name:PM_MRK_RUN_CYC : Run cycles in which a marked instruction is in the pipeline event:0x000003013E counters:2 um:zero minimum:100 name:PM_MRK_STALL_CMPLU_CYC : Number of cycles the marked instruction is experiencing a stall while it is next to complete (NTC) event:0x00000301E2 counters:2 um:zero minimum:100 name:PM_MRK_ST_CMPL : Marked store completed and sent to nest event:0x0000030134 counters:2 um:zero minimum:100 name:PM_MRK_ST_CMPL_INT : marked store finished with intervention event:0x000003E158 counters:2 um:zero minimum:100 name:PM_MRK_STCX_FAIL : marked stcx failed event:0x0000024056 counters:1 um:zero minimum:100 name:PM_MRK_STCX_FIN : Number of marked stcx instructions finished. This includes instructions in the speculative path of a branch that may be flushed event:0x0000010134 counters:0 um:zero minimum:100 name:PM_MRK_ST_DONE_L2 : marked store completed in L2 ( RC machine done) event:0x000003F150 counters:2 um:zero minimum:100 name:PM_MRK_ST_DRAIN_TO_L2DISP_CYC : cycles to drain st from core to L2 event:0x000003012C counters:2 um:zero minimum:100 name:PM_MRK_ST_FWD : Marked st forwards event:0x000001F150 counters:0 um:zero minimum:100 name:PM_MRK_ST_L2DISP_TO_CMPL_CYC : cycles from L2 rc disp to l2 rc completion event:0x0000020138 counters:1 um:zero minimum:100 name:PM_MRK_ST_NEST : Marked store sent to nest event:0x00000028A4 counters:0,1,2,3 um:zero minimum:100 name:PM_MRK_TEND_FAIL : Nested or not nested tend failed for a marked tend instruction event:0x0000030132 counters:2 um:zero minimum:100 name:PM_MRK_VSU_FIN : VSU marked instr finish event:0x000003D15E counters:2 um:zero minimum:10000 name:PM_MULT_MRK : mult marked instr event:0x000003006E counters:2 um:zero minimum:10000 name:PM_NEST_REF_CLK : Multiply by 4 to obtain the number of PB cycles event:0x000000F8A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_NON_DATA_STORE : All ops that drain from s2q to L2 and contain no data event:0x000004D056 counters:3 um:zero minimum:10000 name:PM_NON_FMA_FLOP_CMPL : Non FMA instruction completed event:0x000004D05A counters:3 um:zero minimum:10000 name:PM_NON_MATH_FLOP_CMPL : Non FLOP operation completed event:0x00000260A6 counters:1 um:zero minimum:10000 name:PM_NON_TM_RST_SC : Non-TM snp rst TM SC event:0x000002001A counters:1 um:zero minimum:10000 name:PM_NTC_ALL_FIN : Cycles after all instructions have finished to group completed event:0x000002405A counters:1 um:zero minimum:10000 name:PM_NTC_FIN : Cycles in which the oldest instruction in the pipeline (NTC) finishes. This event is used to account for cycles in which work is being completed in the CPI stack event:0x000002E016 counters:1 um:zero minimum:10000 name:PM_NTC_ISSUE_HELD_ARB : The NTC instruction is being held at dispatch because it lost arbitration onto the issue pipe to another instruction (from the same thread or a different thread) event:0x000001006A counters:0 um:zero minimum:10000 name:PM_NTC_ISSUE_HELD_DARQ_FULL : The NTC instruction is being held at dispatch because there are no slots in the DARQ for it event:0x000003D05A counters:2 um:zero minimum:10000 name:PM_NTC_ISSUE_HELD_OTHER : The NTC instruction is being held at dispatch during regular pipeline cycles, or because the VSU is busy with multi-cycle instructions, or because of a write-back collision with VSU event:0x0000034054 counters:2 um:zero minimum:10000 name:PM_PARTIAL_ST_FIN : Any store finished by an LSU slice event:0x0000020010 counters:1 um:zero minimum:10000 name:PM_PMC1_OVERFLOW : Overflow from counter 1 event:0x000004D02C counters:3 um:zero minimum:10000 name:PM_PMC1_REWIND : PMC1_REWIND event:0x000004D010 counters:3 um:zero minimum:10000 name:PM_PMC1_SAVED : PMC1 Rewind Value saved event:0x0000030010 counters:2 um:zero minimum:10000 name:PM_PMC2_OVERFLOW : Overflow from counter 2 event:0x0000030020 counters:2 um:zero minimum:10000 name:PM_PMC2_REWIND : PMC2 Rewind Event (did not match condition) event:0x0000010022 counters:0 um:zero minimum:10000 name:PM_PMC2_SAVED : PMC2 Rewind Value saved event:0x0000040010 counters:3 um:zero minimum:10000 name:PM_PMC3_OVERFLOW : Overflow from counter 3 event:0x000001000A counters:0 um:zero minimum:10000 name:PM_PMC3_REWIND : PMC3 rewind event. A rewind happens when a speculative event (such as latency or CPI stack) is selected on PMC3 and the stall reason or reload source did not match the one programmed in PMC3. When this occurs, the count in PMC3 will not change. event:0x000004D012 counters:3 um:zero minimum:10000 name:PM_PMC3_SAVED : PMC3 Rewind Value saved event:0x0000010010 counters:0 um:zero minimum:10000 name:PM_PMC4_OVERFLOW : Overflow from counter 4 event:0x0000010020 counters:0 um:zero minimum:10000 name:PM_PMC4_REWIND : PMC4 Rewind Event event:0x0000030022 counters:2 um:zero minimum:10000 name:PM_PMC4_SAVED : PMC4 Rewind Value saved (matched condition) event:0x0000010024 counters:0 um:zero minimum:10000 name:PM_PMC5_OVERFLOW : Overflow from counter 5 event:0x0000030024 counters:2 um:zero minimum:10000 name:PM_PMC6_OVERFLOW : Overflow from counter 6 event:0x0000040014 counters:3 um:zero minimum:10000 name:PM_PROBE_NOP_DISP : ProbeNops dispatched event:0x000000F084 counters:0,1,2,3 um:zero minimum:10000 name:PM_PTE_PREFETCH : PTE prefetches event:0x000000589C counters:0,1,2,3 um:zero minimum:10000 name:PM_PTESYNC : ptesync instruction counted when the instruction is decoded and transmitted event:0x0000010054 counters:0 um:zero minimum:10000 name:PM_PUMP_CPRED : Pump prediction correct. Counts across all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x0000040052 counters:3 um:zero minimum:10000 name:PM_PUMP_MPRED : Pump misprediction. Counts across all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x000001F056 counters:0 um:zero minimum:10000 name:PM_RADIX_PWC_L1_HIT : A radix translation attempt missed in the TLB and only the first level page walk cache was a hit. event:0x000002D026 counters:1 um:zero minimum:10000 name:PM_RADIX_PWC_L1_PDE_FROM_L2 : A Page Directory Entry was reloaded to a level 1 page walk cache from the core's L2 data cache event:0x000003F058 counters:2 um:zero minimum:10000 name:PM_RADIX_PWC_L1_PDE_FROM_L3 : A Page Directory Entry was reloaded to a level 1 page walk cache from the core's L3 data cache event:0x000004F056 counters:3 um:zero minimum:10000 name:PM_RADIX_PWC_L1_PDE_FROM_L3MISS : A Page Directory Entry was reloaded to a level 1 page walk cache from beyond the core's L3 data cache. The source could be local/remote/distant memory or another core's cache event:0x000002D024 counters:1 um:zero minimum:10000 name:PM_RADIX_PWC_L2_HIT : A radix translation attempt missed in the TLB but hit on both the first and second levels of page walk cache. event:0x000002D028 counters:1 um:zero minimum:10000 name:PM_RADIX_PWC_L2_PDE_FROM_L2 : A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache event:0x000003F05A counters:2 um:zero minimum:10000 name:PM_RADIX_PWC_L2_PDE_FROM_L3 : A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L3 data cache event:0x000001F058 counters:0 um:zero minimum:10000 name:PM_RADIX_PWC_L2_PTE_FROM_L2 : A Page Table Entry was reloaded to a level 2 page walk cache from the core's L2 data cache. This implies that level 3 and level 4 PWC accesses were not necessary for this translation event:0x000004F058 counters:3 um:zero minimum:10000 name:PM_RADIX_PWC_L2_PTE_FROM_L3 : A Page Table Entry was reloaded to a level 2 page walk cache from the core's L3 data cache. This implies that level 3 and level 4 PWC accesses were not necessary for this translation event:0x000004F05C counters:3 um:zero minimum:10000 name:PM_RADIX_PWC_L2_PTE_FROM_L3MISS : A Page Table Entry was reloaded to a level 2 page walk cache from beyond the core's L3 data cache. This implies that level 3 and level 4 PWC accesses were not necessary for this translation. The source could be local/remote/distant memory or another core's cache event:0x000003F056 counters:2 um:zero minimum:10000 name:PM_RADIX_PWC_L3_HIT : A radix translation attempt missed in the TLB but hit on the first, second, and third levels of page walk cache. event:0x000002D02A counters:1 um:zero minimum:10000 name:PM_RADIX_PWC_L3_PDE_FROM_L2 : A Page Directory Entry was reloaded to a level 3 page walk cache from the core's L2 data cache event:0x000001F15C counters:0 um:zero minimum:10000 name:PM_RADIX_PWC_L3_PDE_FROM_L3 : A Page Directory Entry was reloaded to a level 3 page walk cache from the core's L3 data cache event:0x000002D02E counters:1 um:zero minimum:10000 name:PM_RADIX_PWC_L3_PTE_FROM_L2 : A Page Table Entry was reloaded to a level 3 page walk cache from the core's L2 data cache. This implies that a level 4 PWC access was not necessary for this translation event:0x000003F05E counters:2 um:zero minimum:10000 name:PM_RADIX_PWC_L3_PTE_FROM_L3 : A Page Table Entry was reloaded to a level 3 page walk cache from the core's L3 data cache. This implies that a level 4 PWC access was not necessary for this translation event:0x000004F05E counters:3 um:zero minimum:10000 name:PM_RADIX_PWC_L3_PTE_FROM_L3MISS : A Page Table Entry was reloaded to a level 3 page walk cache from beyond the core's L3 data cache. This implies that a level 4 PWC access was not necessary for this translation. The source could be local/remote/distant memory or another core's cache event:0x000001F05A counters:0 um:zero minimum:10000 name:PM_RADIX_PWC_L4_PTE_FROM_L2 : A Page Table Entry was reloaded to a level 4 page walk cache from the core's L2 data cache. This is the deepest level of PWC possible for a translation event:0x000004F05A counters:3 um:zero minimum:10000 name:PM_RADIX_PWC_L4_PTE_FROM_L3 : A Page Table Entry was reloaded to a level 4 page walk cache from the core's L3 data cache. This is the deepest level of PWC possible for a translation event:0x000003F054 counters:2 um:zero minimum:10000 name:PM_RADIX_PWC_L4_PTE_FROM_L3MISS : A Page Table Entry was reloaded to a level 4 page walk cache from beyond the core's L3 data cache. This is the deepest level of PWC possible for a translation. The source could be local/remote/distant memory or another core's cache event:0x000004F054 counters:3 um:zero minimum:10000 name:PM_RADIX_PWC_MISS : A radix translation attempt missed in the TLB and all levels of page walk cache. event:0x000001608C counters:0 um:zero minimum:10000 name:PM_RC0_BUSY : RC mach 0 Busy. Used by PMU to sample ave RC lifetime (mach0 used as sample point) event:0x000002608C counters:1 um:zero minimum:10000 name:PM_RC0_BUSY : RC mach 0 Busy. Used by PMU to sample ave RC lifetime (mach0 used as sample point) event:0x000001688C counters:0 um:zero minimum:10000 name:PM_RC_USAGE : Continuous 16 cycle (2to1) window where this signals rotates thru sampling each RC machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running event:0x00000468A6 counters:3 um:zero minimum:10000 name:PM_RD_CLEARING_SC : Read clearing SC event:0x00000460A6 counters:3 um:zero minimum:10000 name:PM_RD_FORMING_SC : Read forming SC event:0x00000268A8 counters:1 um:zero minimum:10000 name:PM_RD_HIT_PF : RD machine hit L3 PF machine event:0x00000200F4 counters:1 um:zero minimum:10000 name:PM_RUN_CYC : Run_cycles event:0x000003006C counters:2 um:zero minimum:100000 name:PM_RUN_CYC_SMT2_MODE : Cycles in which this thread's run latch is set and the core is in SMT2 mode event:0x000002006C counters:1 um:zero minimum:100000 name:PM_RUN_CYC_SMT4_MODE : Cycles in which this thread's run latch is set and the core is in SMT4 mode event:0x000001006C counters:0 um:zero minimum:100000 name:PM_RUN_CYC_ST_MODE : Cycles run latch is set and core is in ST mode event:0x00000400FA counters:3 um:zero minimum:10000 name:PM_RUN_INST_CMPL : Run_Instructions event:0x00000400F4 counters:3 um:zero minimum:10000 name:PM_RUN_PURR : Run_PURR event:0x0000010008 counters:0 um:zero minimum:10000 name:PM_RUN_SPURR : Run SPURR event:0x000000E080 counters:0,1,2,3 um:zero minimum:10000 name:PM_S2Q_FULL : Cycles during which the S2Q is full event:0x0000045056 counters:3 um:zero minimum:10000 name:PM_SCALAR_FLOP_CMPL : Scalar flop operation completed event:0x000000508C counters:0,1,2,3 um:zero minimum:10000 name:PM_SHL_CREATED : Store-Hit-Load Table Entry Created event:0x000000588C counters:0,1,2,3 um:zero minimum:10000 name:PM_SHL_ST_DEP_CREATED : Store-Hit-Load Table Read Hit with entry Enabled event:0x0000005090 counters:0,1,2,3 um:zero minimum:10000 name:PM_SHL_ST_DISABLE : Store-Hit-Load Table Read Hit with entry Disabled (entry was disabled due to the entry shown to not prevent the flush) event:0x000000F09C counters:0,1,2,3 um:zero minimum:10000 name:PM_SLB_TABLEWALK_CYC : Cycles when a tablewalk is pending on this thread on the SLB table event:0x0000016090 counters:0 um:zero minimum:10000 name:PM_SN0_BUSY : SN mach 0 Busy. Used by PMU to sample ave SN lifetime (mach0 used as sample point) event:0x0000026090 counters:1 um:zero minimum:10000 name:PM_SN0_BUSY : SN mach 0 Busy. Used by PMU to sample ave SN lifetime (mach0 used as sample point) event:0x00000460A8 counters:3 um:zero minimum:10000 name:PM_SN_HIT : Any port snooper hit L3. Up to 4 can happen in a cycle but we only count 1 event:0x00000368A8 counters:2 um:zero minimum:10000 name:PM_SN_INVL : Any port snooper detects a store to a line in the Sx state and invalidates the line. Up to 4 can happen in a cycle but we only count 1 event:0x00000468A8 counters:3 um:zero minimum:10000 name:PM_SN_MISS : Any port snooper L3 miss or collision. Up to 4 can happen in a cycle but we only count 1 event:0x000000F880 counters:0,1,2,3 um:zero minimum:10000 name:PM_SNOOP_TLBIE : TLBIE snoop event:0x00000360A6 counters:2 um:zero minimum:10000 name:PM_SNP_TM_HIT_M : Snp TM st hit M/Mu event:0x00000368A6 counters:2 um:zero minimum:10000 name:PM_SNP_TM_HIT_T : Snp TM sthit T/Tn/Te event:0x000003688C counters:2 um:zero minimum:10000 name:PM_SN_USAGE : Continuous 16 cycle (2to1) window where this signals rotates thru sampling each SN machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running event:0x0000040062 counters:3 um:zero minimum:10000 name:PM_SPACEHOLDER_0x0000040062 : SPACE_HOLDER for event 0x0000040062 event:0x0000040064 counters:3 um:zero minimum:10000 name:PM_SPACEHOLDER_0x0000040064 : SPACE_HOLDER for event 0x0000040064 event:0x000004505A counters:3 um:zero minimum:10000 name:PM_SP_FLOP_CMPL : SP instruction completed event:0x0000040008 counters:3 um:zero minimum:10000 name:PM_SRQ_EMPTY_CYC : Cycles in which the SRQ has at least one (out of four) empty slice event:0x000000D0AC counters:0,1,2,3 um:zero minimum:10000 name:PM_SRQ_SYNC_CYC : A sync is in the S2Q (edge detect to count) event:0x0000010028 counters:0 um:zero minimum:10000 name:PM_STALL_END_ICT_EMPTY : The number a times the core transitioned from a stall to ICT-empty for this thread event:0x000001608E counters:0 um:zero minimum:10000 name:PM_ST_CAUSED_FAIL : Non-TM Store caused any thread to fail event:0x00000200F0 counters:1 um:zero minimum:10000 name:PM_ST_CMPL : Stores completed from S2Q (2nd-level store queue). event:0x000001E058 counters:0 um:zero minimum:10000 name:PM_STCX_FAIL : stcx failed event:0x000002E014 counters:1 um:zero minimum:10000 name:PM_STCX_FIN : Number of stcx instructions finished. This includes instructions in the speculative path of a branch that may be flushed event:0x000000C8BC counters:0,1,2,3 um:zero minimum:10000 name:PM_STCX_SUCCESS_CMPL : Number of stcx instructions that completed successfully event:0x0000020016 counters:1 um:zero minimum:10000 name:PM_ST_FIN : Store finish count. Includes speculative activity event:0x0000020018 counters:1 um:zero minimum:10000 name:PM_ST_FWD : Store forwards that finished event:0x00000300F0 counters:2 um:zero minimum:10000 name:PM_ST_MISS_L1 : Store Missed L1 event:0x00000048A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_STOP_FETCH_PENDING_CYC : Fetching is stopped due to an incoming instruction that will result in a flush event:0x0000010000 counters:0 um:zero minimum:10000 name:PM_SUSPENDED : Counter OFF event:0x0000020000 counters:1 um:zero minimum:10000 name:PM_SUSPENDED : Counter OFF event:0x0000030000 counters:2 um:zero minimum:10000 name:PM_SUSPENDED : Counter OFF event:0x0000040000 counters:3 um:zero minimum:10000 name:PM_SUSPENDED : Counter OFF event:0x0000015152 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_BR_LINK : Marked Branch and link branch that can cause a synchronous interrupt event:0x000001515C counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_BR_MPRED : Marked Branch mispredict that can cause a synchronous interrupt event:0x0000015156 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_FX_DIVIDE : Marked fixed point divide that can cause a synchronous interrupt event:0x0000015158 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_L2HIT : Marked L2 Hits that can throw a synchronous interrupt event:0x000001515A counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_L2MISS : Marked L2 Miss that can throw a synchronous interrupt event:0x0000015154 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_L3MISS : Marked L3 misses that can throw a synchronous interrupt event:0x0000015150 counters:0 um:zero minimum:10000 name:PM_SYNC_MRK_PROBE_NOP : Marked probeNops which can cause synchronous interrupts event:0x0000030050 counters:2 um:zero minimum:10000 name:PM_SYS_PUMP_CPRED : Initial and Final Pump Scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x0000030052 counters:2 um:zero minimum:10000 name:PM_SYS_PUMP_MPRED : Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x0000040050 counters:3 um:zero minimum:10000 name:PM_SYS_PUMP_MPRED_RTY : Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate) event:0x0000010026 counters:0 um:zero minimum:10000 name:PM_TABLEWALK_CYC : Cycles when an instruction tablewalk is active event:0x000000F884 counters:0,1,2,3 um:zero minimum:10000 name:PM_TABLEWALK_CYC_PREF : tablewalk qualified for pte prefetches event:0x00000058B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_TAGE_CORRECT : The TAGE overrode BHT direction prediction and it was correct. Includes taken and not taken and is counted at execution time event:0x00000050B4 counters:0,1,2,3 um:zero minimum:10000 name:PM_TAGE_CORRECT_TAKEN_CMPL : The TAGE overrode BHT direction prediction and it was correct. Counted at completion for taken branches only event:0x00000050B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_TAGE_OVERRIDE_WRONG : The TAGE overrode BHT direction prediction but it was incorrect. Counted at completion for taken branches only event:0x00000058B8 counters:0,1,2,3 um:zero minimum:10000 name:PM_TAGE_OVERRIDE_WRONG_SPEC : The TAGE overrode BHT direction prediction and it was correct. Includes taken and not taken and is counted at execution time event:0x0000020056 counters:1 um:zero minimum:10000 name:PM_TAKEN_BR_MPRED_CMPL : Total number of taken branches that were incorrectly predicted as not-taken. This event counts branches completed and does not include speculative instructions event:0x00000300F8 counters:2 um:zero minimum:10000 name:PM_TB_BIT_TRANS : timebase event event:0x000000E8B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_TEND_PEND_CYC : TEND latency per thread event:0x000002000C counters:1 um:zero minimum:100000 name:PM_THRD_ALL_RUN_CYC : Cycles in which all the threads have the run latch set event:0x00000300F4 counters:2 um:zero minimum:10000 name:PM_THRD_CONC_RUN_INST : PPC Instructions Finished by this thread when all threads in the core had the run-latch set event:0x00000040BC counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_0_1_CYC : Cycles thread running at priority level 0 or 1 event:0x00000048BC counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_2_3_CYC : Cycles thread running at priority level 2 or 3 event:0x0000005080 counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_4_5_CYC : Cycles thread running at priority level 4 or 5 event:0x0000005880 counters:0,1,2,3 um:zero minimum:1000 name:PM_THRD_PRIO_6_7_CYC : Cycles thread running at priority level 6 or 7 event:0x0000024154 counters:1 um:zero minimum:10000 name:PM_THRESH_ACC : This event increments every time the threshold event counter ticks. Thresholding must be enabled (via MMCRA) and the thresholding start event must occur for this counter to increment. It will stop incrementing when the thresholding stop event occurs or when thresholding is disabled, until the next time a configured thresholding start event occurs. event:0x00000301EA counters:2 um:zero minimum:10000 name:PM_THRESH_EXC_1024 : Threshold counter exceeded a value of 1024 event:0x00000401EA counters:3 um:zero minimum:10000 name:PM_THRESH_EXC_128 : Threshold counter exceeded a value of 128 event:0x00000401EC counters:3 um:zero minimum:10000 name:PM_THRESH_EXC_2048 : Threshold counter exceeded a value of 2048 event:0x00000101E8 counters:0 um:zero minimum:10000 name:PM_THRESH_EXC_256 : Threshold counter exceed a count of 256 event:0x00000201E6 counters:1 um:zero minimum:10000 name:PM_THRESH_EXC_32 : Threshold counter exceeded a value of 32 event:0x00000101E6 counters:0 um:zero minimum:10000 name:PM_THRESH_EXC_4096 : Threshold counter exceed a count of 4096 event:0x00000201E8 counters:1 um:zero minimum:10000 name:PM_THRESH_EXC_512 : Threshold counter exceeded a value of 512 event:0x00000301E8 counters:2 um:zero minimum:10000 name:PM_THRESH_EXC_64 : Threshold counter exceeded a value of 64 event:0x00000101EC counters:0 um:zero minimum:10000 name:PM_THRESH_MET : threshold exceeded event:0x000004016E counters:3 um:zero minimum:10000 name:PM_THRESH_NOT_MET : Threshold counter did not meet threshold event:0x000001F054 counters:0 um:zero minimum:10000 name:PM_TLB_HIT : Number of times the TLB had the data required by the instruction. Applies to both HPT and RPT event:0x0000030058 counters:2 um:zero minimum:10000 name:PM_TLBIE_FIN : tlbie finished event:0x0000020066 counters:1 um:zero minimum:10000 name:PM_TLB_MISS : TLB Miss (I + D) event:0x0000030056 counters:2 um:zero minimum:10000 name:PM_TM_ABORTS : Number of TM transactions aborted event:0x000000E0A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_TMA_REQ_L2 : addrs only req to L2 only on the first one,Indication that Load footprint is not expanding event:0x00000168A6 counters:0 um:zero minimum:10000 name:PM_TM_CAM_OVERFLOW : L3 TM cam overflow during L2 co of SC event:0x000004608E counters:3 um:zero minimum:10000 name:PM_TM_CAP_OVERFLOW : TM Footprint Capacity Overflow event:0x00000028A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_CONF_NON_TM : TM aborted because a conflict occurred with a non-transactional access by another processor event:0x00000020AC counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_CONF_TM : TM aborted because a conflict occurred with another transaction. event:0x00000020A8 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_FOOTPRINT_OVERFLOW : TM aborted because the tracking limit for transactional storage accesses was exceeded.. Asynchronous event:0x000000E0B0 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_NON_TX_CONFLICT : Non transactional conflict from LSU, gets reported to TEXASR event:0x00000028AC counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_SELF : TM aborted because a self-induced conflict occurred in Suspended state, due to one of the following: a store to a storage location that was previously accessed transactionally event:0x000000E0AC counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_TLBIE : Transaction failed because there was a TLBIE hit in the bloom filter event:0x000000E8AC counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAIL_TX_CONFLICT : Transactional conflict from LSU, gets reported to TEXASR event:0x000002688E counters:1 um:zero minimum:10000 name:PM_TM_FAV_CAUSED_FAIL : TM Load (fav) caused another thread to fail event:0x000000209C counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_FAV_TBEGIN : Dispatch time Favored tbegin event:0x000001688E counters:0 um:zero minimum:10000 name:PM_TM_LD_CAUSED_FAIL : Non-TM Load caused any thread to fail event:0x000002608E counters:1 um:zero minimum:10000 name:PM_TM_LD_CONF : TM Load (fav or non-fav) ran into conflict (failed) event:0x00000020A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_NESTED_TBEGIN : Completion Tm nested tbegin event:0x0000002098 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_NESTED_TEND : Completion time nested tend event:0x000000289C counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_NON_FAV_TBEGIN : Dispatch time non favored tbegin event:0x0000002094 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_OUTER_TBEGIN : Completion time outer tbegin event:0x000004E05E counters:3 um:zero minimum:10000 name:PM_TM_OUTER_TBEGIN_DISP : Number of outer tbegin instructions dispatched. The dispatch unit determines whether the tbegin instruction is outer or nested. This is a speculative count, which includes flushed instructions event:0x0000002894 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_OUTER_TEND : Completion time outer tend event:0x000002E052 counters:1 um:zero minimum:10000 name:PM_TM_PASSED : Number of TM transactions that passed event:0x00000268A6 counters:1 um:zero minimum:10000 name:PM_TM_RST_SC : TM-snp rst RM SC event:0x00000160A6 counters:0 um:zero minimum:10000 name:PM_TM_SC_CO : L3 castout TM SC line event:0x000003688E counters:2 um:zero minimum:10000 name:PM_TM_ST_CAUSED_FAIL : TM Store (fav or non-fav) caused another thread to fail event:0x000003608E counters:2 um:zero minimum:10000 name:PM_TM_ST_CONF : TM Store (fav or non-fav) ran into conflict (failed) event:0x0000002898 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_TABORT_TRECLAIM : Completion time tabortnoncd, tabortcd, treclaim event:0x0000010060 counters:0 um:zero minimum:10000 name:PM_TM_TRANS_RUN_CYC : run cycles in transactional state event:0x0000030060 counters:2 um:zero minimum:10000 name:PM_TM_TRANS_RUN_INST : Run instructions completed in transactional state (gated by the run latch) event:0x00000020A4 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_TRESUME : TM resume instruction completed event:0x00000028A0 counters:0,1,2,3 um:zero minimum:10000 name:PM_TM_TSUSPEND : TM suspend instruction completed event:0x000002E012 counters:1 um:zero minimum:10000 name:PM_TM_TX_PASS_RUN_CYC : cycles spent in successful transactions event:0x000004E014 counters:3 um:zero minimum:10000 name:PM_TM_TX_PASS_RUN_INST : Run instructions spent in successful transactions event:0x000004D058 counters:3 um:zero minimum:10000 name:PM_VECTOR_FLOP_CMPL : Vector FP instruction completed event:0x0000044054 counters:3 um:zero minimum:10000 name:PM_VECTOR_LD_CMPL : Number of vector load instructions completed event:0x0000044056 counters:3 um:zero minimum:10000 name:PM_VECTOR_ST_CMPL : Number of vector store instructions completed event:0x000003D058 counters:2 um:zero minimum:10000 name:PM_VSU_DP_FSQRT_FDIV : vector versions of fdiv,fsqrt event:0x000002505C counters:1 um:zero minimum:10000 name:PM_VSU_FIN : VSU instruction finished. Up to 4 per cycle event:0x000004D04E counters:3 um:zero minimum:10000 name:PM_VSU_FSQRT_FDIV : four flops operation (fdiv,fsqrt) Scalar Instructions only event:0x000004D050 counters:3 um:zero minimum:10000 name:PM_VSU_NON_FLOP_CMPL : Non FLOP operation completed event:0x000000F098 counters:0,1,2,3 um:zero minimum:10000 name:PM_XLATE_HPT_MODE : LSU reports every cycle the thread is in HPT translation mode (as opposed to radix mode) event:0x000000F89C counters:0,1,2,3 um:zero minimum:10000 name:PM_XLATE_MISS : The LSU requested a line from L2 for translation. It may be satisfied from any source beyond L2. Includes speculative instructions event:0x000000F898 counters:0,1,2,3 um:zero minimum:10000 name:PM_XLATE_RADIX_MODE : LSU reports every cycle the thread is in radix translation mode (as opposed to HPT mode) oprofile-1.3.0/events/ppc64/power9/unit_masks0000664000175000017500000000035613124774026016054 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2017. # Contributed by Will Schmidt # # ppc64 POWER9 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/970/0000775000175000017500000000000013323173530013114 500000000000000oprofile-1.3.0/events/ppc64/970/events0000664000175000017500000014013112534404406014265 00000000000000#PPC64 PowerPC970 events # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously. # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:1 um:zero minimum:10000 name:CYCLES : Processor Cycles #Group 1 pm_slice0, Time Slice 0 event:0X010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_slice0) Run cycles event:0X011 counters:1 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles event:0X012 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP1 : (Group 1 pm_slice0) Completion stopped event:0X013 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_slice0) Instructions completed event:0X014 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP1 : (Group 1 pm_slice0) One or more PPC instruction completed event:0X015 counters:5 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles event:0X016 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP1 : (Group 1 pm_slice0) Group completed event:0X017 counters:7 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP1 : (Group 1 pm_slice0) Group dispatch rejected #Group 2 pm_eprof, Group for use with eprof event:0X020 counters:0 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycles event:0X021 counters:1 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycles event:0X022 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP2 : (Group 2 pm_eprof) L1 D cache load misses event:0X023 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP2 : (Group 2 pm_eprof) L1 D cache entries invalidated from L2 event:0X024 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP2 : (Group 2 pm_eprof) Instructions dispatched event:0X025 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP2 : (Group 2 pm_eprof) Instructions completed event:0X026 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP2 : (Group 2 pm_eprof) L1 D cache store references event:0X027 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP2 : (Group 2 pm_eprof) L1 D cache load references #Group 3 pm_basic, Basic performance indicators event:0X030 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_basic) Instructions completed event:0X031 counters:1 um:zero minimum:10000 name:PM_CYC_GRP3 : (Group 3 pm_basic) Processor cycles event:0X032 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP3 : (Group 3 pm_basic) L1 D cache load misses event:0X033 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP3 : (Group 3 pm_basic) L1 D cache entries invalidated from L2 event:0X034 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP3 : (Group 3 pm_basic) Instructions dispatched event:0X035 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP3 : (Group 3 pm_basic) Instructions completed event:0X036 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP3 : (Group 3 pm_basic) L1 D cache store references event:0X037 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP3 : (Group 3 pm_basic) L1 D cache load references #Group 4 pm_lsu, Information on the Load Store Unit event:0X040 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP4 : (Group 4 pm_lsu) LRQ unaligned load flushes event:0X041 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP4 : (Group 4 pm_lsu) SRQ unaligned store flushes event:0X042 counters:2 um:zero minimum:10000 name:PM_CYC_GRP4 : (Group 4 pm_lsu) Processor cycles event:0X043 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP4 : (Group 4 pm_lsu) Instructions completed event:0X044 counters:4 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP4 : (Group 4 pm_lsu) SRQ flushes event:0X045 counters:5 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP4 : (Group 4 pm_lsu) LRQ flushes event:0X046 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP4 : (Group 4 pm_lsu) L1 D cache store references event:0X047 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP4 : (Group 4 pm_lsu) L1 D cache load references #Group 5 pm_fpu1, Floating Point events event:0X050 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP5 : (Group 5 pm_fpu1) FPU executed FDIV instruction event:0X051 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP5 : (Group 5 pm_fpu1) FPU executed multiply-add instruction event:0X052 counters:2 um:zero minimum:1000 name:PM_FPU_FEST_GRP5 : (Group 5 pm_fpu1) FPU executed FEST instruction event:0X053 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP5 : (Group 5 pm_fpu1) FPU produced a result event:0X054 counters:4 um:zero minimum:10000 name:PM_CYC_GRP5 : (Group 5 pm_fpu1) Processor cycles event:0X055 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP5 : (Group 5 pm_fpu1) FPU executed FSQRT instruction event:0X056 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP5 : (Group 5 pm_fpu1) Instructions completed event:0X057 counters:7 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP5 : (Group 5 pm_fpu1) FPU executing FMOV or FEST instructions #Group 6 pm_fpu2, Floating Point events event:0X060 counters:0 um:zero minimum:1000 name:PM_FPU_DENORM_GRP6 : (Group 6 pm_fpu2) FPU received denormalized data event:0X061 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP6 : (Group 6 pm_fpu2) FPU stalled in pipe3 event:0X062 counters:2 um:zero minimum:10000 name:PM_CYC_GRP6 : (Group 6 pm_fpu2) Processor cycles event:0X063 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP6 : (Group 6 pm_fpu2) Instructions completed event:0X064 counters:4 um:zero minimum:1000 name:PM_FPU_ALL_GRP6 : (Group 6 pm_fpu2) FPU executed add, mult, sub, cmp or sel instruction event:0X065 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP6 : (Group 6 pm_fpu2) FPU executed store instruction event:0X066 counters:6 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP6 : (Group 6 pm_fpu2) FPU executed FRSP or FCONV instructions event:0X067 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP6 : (Group 6 pm_fpu2) LSU executed Floating Point load instruction #Group 7 pm_isu_rename, ISU Rename Pool Events event:0X070 counters:0 um:zero minimum:1000 name:PM_XER_MAP_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles XER mapper full event:0X071 counters:1 um:zero minimum:1000 name:PM_CR_MAP_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles CR logical operation mapper full event:0X072 counters:2 um:zero minimum:1000 name:PM_CRQ_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles CR issue queue full event:0X073 counters:3 um:zero minimum:1000 name:PM_GRP_DISP_BLK_SB_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles group dispatch blocked by scoreboard event:0X074 counters:4 um:zero minimum:1000 name:PM_LR_CTR_MAP_FULL_CYC_GRP7 : (Group 7 pm_isu_rename) Cycles LR/CTR mapper full event:0X075 counters:5 um:zero minimum:1000 name:PM_INST_DISP_GRP7 : (Group 7 pm_isu_rename) Instructions dispatched event:0X076 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP7 : (Group 7 pm_isu_rename) Instructions completed event:0X077 counters:7 um:zero minimum:10000 name:PM_CYC_GRP7 : (Group 7 pm_isu_rename) Processor cycles #Group 8 pm_isu_queues1, ISU Rename Pool Events event:0X080 counters:0 um:zero minimum:1000 name:PM_FPU0_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FPU0 issue queue full event:0X081 counters:1 um:zero minimum:1000 name:PM_FPU1_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FPU1 issue queue full event:0X082 counters:2 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FXU0/LS0 queue full event:0X083 counters:3 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles FXU1/LS1 queue full event:0X084 counters:4 um:zero minimum:10000 name:PM_CYC_GRP8 : (Group 8 pm_isu_queues1) Processor cycles event:0X085 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP8 : (Group 8 pm_isu_queues1) Instructions completed event:0X086 counters:6 um:zero minimum:1000 name:PM_LSU_LRQ_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles LRQ full event:0X087 counters:7 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP8 : (Group 8 pm_isu_queues1) Cycles SRQ full #Group 9 pm_isu_flow, ISU Instruction Flow Events event:0X090 counters:0 um:zero minimum:1000 name:PM_INST_DISP_GRP9 : (Group 9 pm_isu_flow) Instructions dispatched event:0X091 counters:1 um:zero minimum:10000 name:PM_CYC_GRP9 : (Group 9 pm_isu_flow) Processor cycles event:0X092 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP9 : (Group 9 pm_isu_flow) FXU0 produced a result event:0X093 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP9 : (Group 9 pm_isu_flow) FXU1 produced a result event:0X094 counters:4 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP9 : (Group 9 pm_isu_flow) Group dispatch valid event:0X095 counters:5 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP9 : (Group 9 pm_isu_flow) Group dispatch rejected event:0X096 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP9 : (Group 9 pm_isu_flow) Instructions completed event:0X097 counters:7 um:zero minimum:10000 name:PM_CYC_GRP9 : (Group 9 pm_isu_flow) Processor cycles #Group 10 pm_isu_work, ISU Indicators of Work Blockage event:0X0A0 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP10 : (Group 10 pm_isu_work) Cycles GCT empty event:0X0A1 counters:1 um:zero minimum:1000 name:PM_WORK_HELD_GRP10 : (Group 10 pm_isu_work) Work held event:0X0A2 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP10 : (Group 10 pm_isu_work) Completion stopped event:0X0A3 counters:3 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP10 : (Group 10 pm_isu_work) Cycles MSR(EE) bit off and external interrupt pending event:0X0A4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP10 : (Group 10 pm_isu_work) Processor cycles event:0X0A5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP10 : (Group 10 pm_isu_work) Instructions completed event:0X0A6 counters:6 um:zero minimum:1000 name:PM_EE_OFF_GRP10 : (Group 10 pm_isu_work) Cycles MSR(EE) bit off event:0X0A7 counters:7 um:zero minimum:1000 name:PM_EXT_INT_GRP10 : (Group 10 pm_isu_work) External interrupts #Group 11 pm_fpu3, Floating Point events by unit event:0X0B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP11 : (Group 11 pm_fpu3) FPU0 executed FDIV instruction event:0X0B1 counters:1 um:zero minimum:1000 name:PM_FPU1_FDIV_GRP11 : (Group 11 pm_fpu3) FPU1 executed FDIV instruction event:0X0B2 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP11 : (Group 11 pm_fpu3) FPU0 executed FRSP or FCONV instructions event:0X0B3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP11 : (Group 11 pm_fpu3) FPU1 executed FRSP or FCONV instructions event:0X0B4 counters:4 um:zero minimum:1000 name:PM_FPU0_FMA_GRP11 : (Group 11 pm_fpu3) FPU0 executed multiply-add instruction event:0X0B5 counters:5 um:zero minimum:1000 name:PM_FPU1_FMA_GRP11 : (Group 11 pm_fpu3) FPU1 executed multiply-add instruction event:0X0B6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP11 : (Group 11 pm_fpu3) Instructions completed event:0X0B7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP11 : (Group 11 pm_fpu3) Processor cycles #Group 12 pm_fpu4, Floating Point events by unit event:0X0C0 counters:0 um:zero minimum:1000 name:PM_FPU0_FSQRT_GRP12 : (Group 12 pm_fpu4) FPU0 executed FSQRT instruction event:0X0C1 counters:1 um:zero minimum:1000 name:PM_FPU1_FSQRT_GRP12 : (Group 12 pm_fpu4) FPU1 executed FSQRT instruction event:0X0C2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP12 : (Group 12 pm_fpu4) FPU0 produced a result event:0X0C3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP12 : (Group 12 pm_fpu4) FPU1 produced a result event:0X0C4 counters:4 um:zero minimum:1000 name:PM_FPU0_ALL_GRP12 : (Group 12 pm_fpu4) FPU0 executed add, mult, sub, cmp or sel instruction event:0X0C5 counters:5 um:zero minimum:1000 name:PM_FPU1_ALL_GRP12 : (Group 12 pm_fpu4) FPU1 executed add, mult, sub, cmp or sel instruction event:0X0C6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP12 : (Group 12 pm_fpu4) Instructions completed event:0X0C7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP12 : (Group 12 pm_fpu4) Processor cycles #Group 13 pm_fpu5, Floating Point events by unit event:0X0D0 counters:0 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP13 : (Group 13 pm_fpu5) FPU0 received denormalized data event:0X0D1 counters:1 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP13 : (Group 13 pm_fpu5) FPU1 received denormalized data event:0X0D2 counters:2 um:zero minimum:1000 name:PM_FPU0_FMOV_FEST_GRP13 : (Group 13 pm_fpu5) FPU0 executed FMOV or FEST instructions event:0X0D3 counters:3 um:zero minimum:1000 name:PM_FPU1_FMOV_FEST_GRP13 : (Group 13 pm_fpu5) FPU1 executing FMOV or FEST instructions event:0X0D4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP13 : (Group 13 pm_fpu5) Processor cycles event:0X0D5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP13 : (Group 13 pm_fpu5) Instructions completed event:0X0D6 counters:6 um:zero minimum:1000 name:PM_FPU0_FEST_GRP13 : (Group 13 pm_fpu5) FPU0 executed FEST instruction event:0X0D7 counters:7 um:zero minimum:1000 name:PM_FPU1_FEST_GRP13 : (Group 13 pm_fpu5) FPU1 executed FEST instruction #Group 14 pm_fpu7, Floating Point events by unit event:0X0E0 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP14 : (Group 14 pm_fpu7) FPU0 stalled in pipe3 event:0X0E1 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP14 : (Group 14 pm_fpu7) FPU1 stalled in pipe3 event:0X0E2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP14 : (Group 14 pm_fpu7) FPU0 produced a result event:0X0E3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP14 : (Group 14 pm_fpu7) FPU1 produced a result event:0X0E4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP14 : (Group 14 pm_fpu7) Processor cycles event:0X0E5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP14 : (Group 14 pm_fpu7) Instructions completed event:0X0E6 counters:6 um:zero minimum:10000 name:PM_CYC_GRP14 : (Group 14 pm_fpu7) Processor cycles event:0X0E7 counters:7 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP14 : (Group 14 pm_fpu7) FPU0 executed FPSCR instruction #Group 15 pm_lsu_flush, LSU Flush Events event:0X0F0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP15 : (Group 15 pm_lsu_flush) LSU0 LRQ flushes event:0X0F1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP15 : (Group 15 pm_lsu_flush) LSU1 LRQ flushes event:0X0F2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_lsu_flush) Processor cycles event:0X0F3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_lsu_flush) Processor cycles event:0X0F4 counters:4 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP15 : (Group 15 pm_lsu_flush) LSU0 SRQ flushes event:0X0F5 counters:5 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP15 : (Group 15 pm_lsu_flush) LSU1 SRQ flushes event:0X0F6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_lsu_flush) Instructions completed event:0X0F7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP15 : (Group 15 pm_lsu_flush) Processor cycles #Group 16 pm_lsu_load1, LSU Load Events event:0X100 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU0 unaligned load flushes event:0X101 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU1 unaligned load flushes event:0X102 counters:2 um:zero minimum:1000 name:PM_LD_REF_L1_LSU0_GRP16 : (Group 16 pm_lsu_load1) LSU0 L1 D cache load references event:0X103 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_LSU1_GRP16 : (Group 16 pm_lsu_load1) LSU1 L1 D cache load references event:0X104 counters:4 um:zero minimum:10000 name:PM_CYC_GRP16 : (Group 16 pm_lsu_load1) Processor cycles event:0X105 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP16 : (Group 16 pm_lsu_load1) Instructions completed event:0X106 counters:6 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP16 : (Group 16 pm_lsu_load1) LSU0 L1 D cache load misses event:0X107 counters:7 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP16 : (Group 16 pm_lsu_load1) LSU1 L1 D cache load misses #Group 17 pm_lsu_store1, LSU Store Events event:0X110 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU0 unaligned store flushes event:0X111 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU1 unaligned store flushes event:0X112 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP17 : (Group 17 pm_lsu_store1) LSU0 L1 D cache store references event:0X113 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP17 : (Group 17 pm_lsu_store1) LSU1 L1 D cache store references event:0X114 counters:4 um:zero minimum:10000 name:PM_CYC_GRP17 : (Group 17 pm_lsu_store1) Processor cycles event:0X115 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP17 : (Group 17 pm_lsu_store1) Instructions completed event:0X116 counters:6 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP17 : (Group 17 pm_lsu_store1) L1 D cache store misses event:0X117 counters:7 um:zero minimum:1000 name:PM_DC_INV_L2_GRP17 : (Group 17 pm_lsu_store1) L1 D cache entries invalidated from L2 #Group 18 pm_lsu_store2, LSU Store Events event:0X120 counters:0 um:zero minimum:1000 name:PM_LSU0_SRQ_STFWD_GRP18 : (Group 18 pm_lsu_store2) LSU0 SRQ store forwarded event:0X121 counters:1 um:zero minimum:1000 name:PM_LSU1_SRQ_STFWD_GRP18 : (Group 18 pm_lsu_store2) LSU1 SRQ store forwarded event:0X122 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_LSU0_GRP18 : (Group 18 pm_lsu_store2) LSU0 L1 D cache store references event:0X123 counters:3 um:zero minimum:1000 name:PM_ST_REF_L1_LSU1_GRP18 : (Group 18 pm_lsu_store2) LSU1 L1 D cache store references event:0X124 counters:4 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP18 : (Group 18 pm_lsu_store2) LSU0 busy event:0X125 counters:5 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_lsu_store2) Processor cycles event:0X126 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP18 : (Group 18 pm_lsu_store2) Instructions completed event:0X127 counters:7 um:zero minimum:10000 name:PM_CYC_GRP18 : (Group 18 pm_lsu_store2) Processor cycles #Group 19 pm_lsu7, Information on the Load Store Unit event:0X130 counters:0 um:zero minimum:1000 name:PM_LSU0_DERAT_MISS_GRP19 : (Group 19 pm_lsu7) LSU0 DERAT misses event:0X131 counters:1 um:zero minimum:1000 name:PM_LSU1_DERAT_MISS_GRP19 : (Group 19 pm_lsu7) LSU1 DERAT misses event:0X132 counters:2 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles event:0X133 counters:3 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles event:0X134 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP19 : (Group 19 pm_lsu7) Instructions completed event:0X135 counters:5 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles event:0X136 counters:6 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP19 : (Group 19 pm_lsu7) L1 reload data source valid event:0X137 counters:7 um:zero minimum:10000 name:PM_CYC_GRP19 : (Group 19 pm_lsu7) Processor cycles #Group 20 pm_misc, Misc Events for testing event:0X140 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP20 : (Group 20 pm_misc) Cycles GCT empty event:0X141 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP20 : (Group 20 pm_misc) Cycles LMQ and SRQ empty event:0X142 counters:2 um:zero minimum:1000 name:PM_HV_CYC_GRP20 : (Group 20 pm_misc) Hypervisor Cycles event:0X143 counters:3 um:zero minimum:10000 name:PM_CYC_GRP20 : (Group 20 pm_misc) Processor cycles event:0X144 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP20 : (Group 20 pm_misc) One or more PPC instruction completed event:0X145 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP20 : (Group 20 pm_misc) Instructions completed event:0X146 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP20 : (Group 20 pm_misc) Group completed event:0X147 counters:7 um:zero minimum:1000 name:PM_TB_BIT_TRANS_GRP20 : (Group 20 pm_misc) Time Base bit transition #Group 21 pm_pe_bench1, PE Benchmarker group for FP analysis event:0X150 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP21 : (Group 21 pm_pe_bench1) FPU executed FDIV instruction event:0X151 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP21 : (Group 21 pm_pe_bench1) FPU executed multiply-add instruction event:0X152 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP21 : (Group 21 pm_pe_bench1) FXU produced a result event:0X153 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP21 : (Group 21 pm_pe_bench1) FPU produced a result event:0X154 counters:4 um:zero minimum:10000 name:PM_CYC_GRP21 : (Group 21 pm_pe_bench1) Processor cycles event:0X155 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP21 : (Group 21 pm_pe_bench1) FPU executed FSQRT instruction event:0X156 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP21 : (Group 21 pm_pe_bench1) Instructions completed event:0X157 counters:7 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP21 : (Group 21 pm_pe_bench1) FPU executing FMOV or FEST instructions #Group 22 pm_pe_bench4, PE Benchmarker group for L1 and TLB event:0X160 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP22 : (Group 22 pm_pe_bench4) Data TLB misses event:0X161 counters:1 um:zero minimum:1000 name:PM_ITLB_MISS_GRP22 : (Group 22 pm_pe_bench4) Instruction TLB misses event:0X162 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache load misses event:0X163 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache store misses event:0X164 counters:4 um:zero minimum:10000 name:PM_CYC_GRP22 : (Group 22 pm_pe_bench4) Processor cycles event:0X165 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP22 : (Group 22 pm_pe_bench4) Instructions completed event:0X166 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache store references event:0X167 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP22 : (Group 22 pm_pe_bench4) L1 D cache load references #Group 23 pm_hpmcount1, Hpmcount group for L1 and TLB behavior event:0X170 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP23 : (Group 23 pm_hpmcount1) Data TLB misses event:0X171 counters:1 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP23 : (Group 23 pm_hpmcount1) Cycles LMQ and SRQ empty event:0X172 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache load misses event:0X173 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache store misses event:0X174 counters:4 um:zero minimum:10000 name:PM_CYC_GRP23 : (Group 23 pm_hpmcount1) Processor cycles event:0X175 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP23 : (Group 23 pm_hpmcount1) Instructions completed event:0X176 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache store references event:0X177 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP23 : (Group 23 pm_hpmcount1) L1 D cache load references #Group 24 pm_hpmcount2, Hpmcount group for computation event:0X180 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP24 : (Group 24 pm_hpmcount2) FPU executed FDIV instruction event:0X181 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP24 : (Group 24 pm_hpmcount2) FPU executed multiply-add instruction event:0X182 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP24 : (Group 24 pm_hpmcount2) FPU0 produced a result event:0X183 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP24 : (Group 24 pm_hpmcount2) FPU1 produced a result event:0X184 counters:4 um:zero minimum:10000 name:PM_CYC_GRP24 : (Group 24 pm_hpmcount2) Processor cycles event:0X185 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP24 : (Group 24 pm_hpmcount2) FPU executed store instruction event:0X186 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP24 : (Group 24 pm_hpmcount2) Instructions completed event:0X187 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP24 : (Group 24 pm_hpmcount2) LSU executed Floating Point load instruction #Group 25 pm_l1andbr, L1 misses and branch misspredict analysis event:0X190 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP25 : (Group 25 pm_l1andbr) Instructions completed event:0X191 counters:1 um:zero minimum:10000 name:PM_CYC_GRP25 : (Group 25 pm_l1andbr) Processor cycles event:0X192 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP25 : (Group 25 pm_l1andbr) L1 D cache load misses event:0X193 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP25 : (Group 25 pm_l1andbr) Branches issued event:0X194 counters:4 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP25 : (Group 25 pm_l1andbr) LSU0 busy event:0X195 counters:5 um:zero minimum:10000 name:PM_CYC_GRP25 : (Group 25 pm_l1andbr) Processor cycles event:0X196 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP25 : (Group 25 pm_l1andbr) Branch mispredictions due to CR bit setting event:0X197 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP25 : (Group 25 pm_l1andbr) Branch mispredictions due to target address #Group 26 pm_imix, Instruction mix: loads, stores and branches event:0X1A0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP26 : (Group 26 pm_imix) Instructions completed event:0X1A1 counters:1 um:zero minimum:10000 name:PM_CYC_GRP26 : (Group 26 pm_imix) Processor cycles event:0X1A2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP26 : (Group 26 pm_imix) L1 D cache load misses event:0X1A3 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP26 : (Group 26 pm_imix) Branches issued event:0X1A4 counters:4 um:zero minimum:10000 name:PM_CYC_GRP26 : (Group 26 pm_imix) Processor cycles event:0X1A5 counters:5 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP26 : (Group 26 pm_imix) LSU0 busy event:0X1A6 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP26 : (Group 26 pm_imix) L1 D cache store references event:0X1A7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP26 : (Group 26 pm_imix) L1 D cache load references #Group 27 pm_branch, SLB and branch misspredict analysis event:0X1B0 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP27 : (Group 27 pm_branch) Run cycles event:0X1B1 counters:1 um:zero minimum:1000 name:PM_DSLB_MISS_GRP27 : (Group 27 pm_branch) Data SLB misses event:0X1B2 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP27 : (Group 27 pm_branch) Branches issued event:0X1B3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP27 : (Group 27 pm_branch) Branch mispredictions due to CR bit setting event:0X1B4 counters:4 um:zero minimum:1000 name:PM_ISLB_MISS_GRP27 : (Group 27 pm_branch) Instruction SLB misses event:0X1B5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP27 : (Group 27 pm_branch) Processor cycles event:0X1B6 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP27 : (Group 27 pm_branch) Instructions completed event:0X1B7 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP27 : (Group 27 pm_branch) Branch mispredictions due to target address #Group 28 pm_data, data source and LMQ event:0X1C0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP28 : (Group 28 pm_data) Data loaded from L2 event:0X1C1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_data) Instructions completed event:0X1C2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP28 : (Group 28 pm_data) Data loaded from memory event:0X1C3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP28 : (Group 28 pm_data) Processor cycles event:0X1C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_data) Instructions completed event:0X1C5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP28 : (Group 28 pm_data) Processor cycles event:0X1C6 counters:6 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP28 : (Group 28 pm_data) LMQ slot 0 allocated event:0X1C7 counters:7 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP28 : (Group 28 pm_data) LMQ slot 0 valid #Group 29 pm_tlb, TLB and LRQ plus data prefetch event:0X1D0 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_GRP29 : (Group 29 pm_tlb) Data TLB misses event:0X1D1 counters:1 um:zero minimum:1000 name:PM_ITLB_MISS_GRP29 : (Group 29 pm_tlb) Instruction TLB misses event:0X1D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP29 : (Group 29 pm_tlb) Instructions completed event:0X1D3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP29 : (Group 29 pm_tlb) Processor cycles event:0X1D4 counters:4 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP29 : (Group 29 pm_tlb) LRQ slot 0 allocated event:0X1D5 counters:5 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP29 : (Group 29 pm_tlb) LRQ slot 0 valid event:0X1D6 counters:6 um:zero minimum:1000 name:PM_L1_PREF_GRP29 : (Group 29 pm_tlb) L1 cache data prefetches event:0X1D7 counters:7 um:zero minimum:1000 name:PM_L2_PREF_GRP29 : (Group 29 pm_tlb) L2 cache prefetches #Group 30 pm_isource, inst source and tablewalk event:0X1E0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP30 : (Group 30 pm_isource) Instructions fetched from L2 event:0X1E1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP30 : (Group 30 pm_isource) Instruction fetched from memory event:0X1E2 counters:2 um:zero minimum:1000 name:PM_HV_CYC_GRP30 : (Group 30 pm_isource) Hypervisor Cycles event:0X1E3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP30 : (Group 30 pm_isource) Instructions completed event:0X1E4 counters:4 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP30 : (Group 30 pm_isource) Cycles doing data tablewalks event:0X1E5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP30 : (Group 30 pm_isource) Processor cycles event:0X1E6 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP30 : (Group 30 pm_isource) Group completed event:0X1E7 counters:7 um:zero minimum:1000 name:PM_DC_INV_L2_GRP30 : (Group 30 pm_isource) L1 D cache entries invalidated from L2 #Group 31 pm_sync, Sync and SRQ event:0X1F0 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP31 : (Group 31 pm_sync) SRQ slot 0 allocated event:0X1F1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP31 : (Group 31 pm_sync) SRQ slot 0 valid event:0X1F2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP31 : (Group 31 pm_sync) L1 D cache load misses event:0X1F3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP31 : (Group 31 pm_sync) SRQ sync duration event:0X1F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_sync) Instructions completed event:0X1F5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_sync) Instructions completed event:0X1F6 counters:6 um:zero minimum:10000 name:PM_CYC_GRP31 : (Group 31 pm_sync) Processor cycles event:0X1F7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP31 : (Group 31 pm_sync) L1 D cache load references #Group 32 pm_ierat, IERAT event:0X200 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP32 : (Group 32 pm_ierat) Instruction fetched from L1 event:0X201 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_ierat) Instructions completed event:0X202 counters:2 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP32 : (Group 32 pm_ierat) Translation written to ierat event:0X203 counters:3 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_ierat) Processor cycles event:0X204 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_ierat) Instructions completed event:0X205 counters:5 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_ierat) Processor cycles event:0X206 counters:6 um:zero minimum:10000 name:PM_INST_CMPL_GRP32 : (Group 32 pm_ierat) Instructions completed event:0X207 counters:7 um:zero minimum:10000 name:PM_CYC_GRP32 : (Group 32 pm_ierat) Processor cycles #Group 33 pm_derat, DERAT event:0X210 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP33 : (Group 33 pm_derat) Cycles GCT empty event:0X211 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP33 : (Group 33 pm_derat) Group dispatch valid event:0X212 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP33 : (Group 33 pm_derat) L1 reload data source valid event:0X213 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP33 : (Group 33 pm_derat) Instructions completed event:0X214 counters:4 um:zero minimum:1000 name:PM_INST_DISP_GRP33 : (Group 33 pm_derat) Instructions dispatched event:0X215 counters:5 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP33 : (Group 33 pm_derat) DERAT misses event:0X216 counters:6 um:zero minimum:1000 name:PM_ST_REF_L1_GRP33 : (Group 33 pm_derat) L1 D cache store references event:0X217 counters:7 um:zero minimum:10000 name:PM_CYC_GRP33 : (Group 33 pm_derat) Processor cycles #Group 34 pm_mark1, Information on marked instructions event:0X220 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP34 : (Group 34 pm_mark1) Marked L1 D cache load misses event:0X221 counters:1 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP34 : (Group 34 pm_mark1) Threshold timeout event:0X222 counters:2 um:zero minimum:10000 name:PM_CYC_GRP34 : (Group 34 pm_mark1) Processor cycles event:0X223 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP34 : (Group 34 pm_mark1) Marked group completed event:0X224 counters:4 um:zero minimum:1000 name:PM_GRP_MRK_GRP34 : (Group 34 pm_mark1) Group marked in IDU event:0X225 counters:5 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP34 : (Group 34 pm_mark1) Marked group issued event:0X226 counters:6 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP34 : (Group 34 pm_mark1) Marked instruction finished event:0X227 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP34 : (Group 34 pm_mark1) Instructions completed #Group 35 pm_mark2, Marked Instructions Processing Flow event:0X230 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP35 : (Group 35 pm_mark2) Marked group dispatched event:0X231 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction BRU processing finished event:0X232 counters:2 um:zero minimum:10000 name:PM_CYC_GRP35 : (Group 35 pm_mark2) Processor cycles event:0X233 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction CRU processing finished event:0X234 counters:4 um:zero minimum:1000 name:PM_GRP_MRK_GRP35 : (Group 35 pm_mark2) Group marked in IDU event:0X235 counters:5 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction FXU processing finished event:0X236 counters:6 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction FPU processing finished event:0X237 counters:7 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP35 : (Group 35 pm_mark2) Marked instruction LSU processing finished #Group 36 pm_mark3, Marked Stores Processing Flow event:0X240 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP36 : (Group 36 pm_mark3) Marked store instruction completed event:0X241 counters:1 um:zero minimum:10000 name:PM_CYC_GRP36 : (Group 36 pm_mark3) Processor cycles event:0X242 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP36 : (Group 36 pm_mark3) Marked store completed with intervention event:0X243 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP36 : (Group 36 pm_mark3) Marked group completed event:0X244 counters:4 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP36 : (Group 36 pm_mark3) Marked group completion timeout event:0X245 counters:5 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP36 : (Group 36 pm_mark3) Marked store sent to GPS event:0X246 counters:6 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP36 : (Group 36 pm_mark3) Marked instruction valid in SRQ event:0X247 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP36 : (Group 36 pm_mark3) Instructions completed #Group 37 pm_lsu_mark1, Load Store Unit Marked Events event:0X250 counters:0 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP37 : (Group 37 pm_lsu_mark1) Marked L1 D cache store misses event:0X251 counters:1 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP37 : (Group 37 pm_lsu_mark1) Marked IMR reloaded event:0X252 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned store flushes event:0X253 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned store flushes event:0X254 counters:4 um:zero minimum:10000 name:PM_CYC_GRP37 : (Group 37 pm_lsu_mark1) Processor cycles event:0X255 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP37 : (Group 37 pm_lsu_mark1) Instructions completed event:0X256 counters:6 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned load flushes event:0X257 counters:7 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned load flushes #Group 38 pm_lsu_mark2, Load Store Unit Marked Events event:0X260 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU0_GRP38 : (Group 38 pm_lsu_mark2) LSU0 L1 D cache load misses event:0X261 counters:1 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU1_GRP38 : (Group 38 pm_lsu_mark2) LSU1 L1 D cache load misses event:0X262 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_LRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU0 marked LRQ flushes event:0X263 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_LRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU1 marked LRQ flushes event:0X264 counters:4 um:zero minimum:10000 name:PM_CYC_GRP38 : (Group 38 pm_lsu_mark2) Processor cycles event:0X265 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP38 : (Group 38 pm_lsu_mark2) Instructions completed event:0X266 counters:6 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_SRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU0 marked SRQ flushes event:0X267 counters:7 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_SRQ_GRP38 : (Group 38 pm_lsu_mark2) LSU1 marked SRQ flushes #Group 39 pm_fxu1, Fixed Point events by unit event:0X270 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP39 : (Group 39 pm_fxu1) Instructions completed event:0X271 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP39 : (Group 39 pm_fxu1) Instructions completed event:0X272 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP39 : (Group 39 pm_fxu1) FXU produced a result event:0X273 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP39 : (Group 39 pm_fxu1) FXU1 busy FXU0 idle event:0X274 counters:4 um:zero minimum:1000 name:PM_FXU_IDLE_GRP39 : (Group 39 pm_fxu1) FXU idle event:0X275 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP39 : (Group 39 pm_fxu1) FXU busy event:0X276 counters:6 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP39 : (Group 39 pm_fxu1) FXU0 busy FXU1 idle event:0X277 counters:7 um:zero minimum:10000 name:PM_CYC_GRP39 : (Group 39 pm_fxu1) Processor cycles #Group 40 pm_fxu2, Fixed Point events by unit event:0X280 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP40 : (Group 40 pm_fxu2) Instructions completed event:0X281 counters:1 um:zero minimum:10000 name:PM_CYC_GRP40 : (Group 40 pm_fxu2) Processor cycles event:0X282 counters:2 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP40 : (Group 40 pm_fxu2) Cycles FXU1/LS1 queue full event:0X283 counters:3 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP40 : (Group 40 pm_fxu2) Cycles FXU0/LS0 queue full event:0X284 counters:4 um:zero minimum:1000 name:PM_FXU_IDLE_GRP40 : (Group 40 pm_fxu2) FXU idle event:0X285 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP40 : (Group 40 pm_fxu2) FXU busy event:0X286 counters:6 um:zero minimum:1000 name:PM_FXU0_FIN_GRP40 : (Group 40 pm_fxu2) FXU0 produced a result event:0X287 counters:7 um:zero minimum:1000 name:PM_FXU1_FIN_GRP40 : (Group 40 pm_fxu2) FXU1 produced a result #Group 41 pm_ifu, pm_ifu event:0X290 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP41 : (Group 41 pm_ifu) Instruction fetched from L1 event:0X291 counters:1 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP41 : (Group 41 pm_ifu) Instruction fetched from memory event:0X292 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP41 : (Group 41 pm_ifu) Instructions fetched from prefetch event:0X293 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP41 : (Group 41 pm_ifu) No instructions fetched event:0X294 counters:4 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP41 : (Group 41 pm_ifu) Cycles at least 1 instruction fetched event:0X295 counters:5 um:zero minimum:1000 name:PM_INST_FROM_L25_MOD_GRP41 : (Group 41 pm_ifu) Instruction fetched from L2.5 modified event:0X296 counters:6 um:zero minimum:10000 name:PM_CYC_GRP41 : (Group 41 pm_ifu) Processor cycles event:0X297 counters:7 um:zero minimum:10000 name:PM_INST_CMPL_GRP41 : (Group 41 pm_ifu) Instructions completed #Group 42 pm_cpi_stack1, CPI stack analysis event:0X2A0 counters:0 um:zero minimum:1000 name:PM_LSU0_BUSY_GRP42 : (Group 42 pm_cpi_stack1) LSU0 busy event:0X2A1 counters:1 um:zero minimum:1000 name:PM_LSU1_BUSY_GRP42 : (Group 42 pm_cpi_stack1) LSU1 busy event:0X2A2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP42 : (Group 42 pm_cpi_stack1) Flush initiated by LSU event:0X2A3 counters:3 um:zero minimum:1000 name:PM_FLUSH_LSU_BR_MPRED_GRP42 : (Group 42 pm_cpi_stack1) Flush caused by LSU or branch mispredict event:0X2A4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP42 : (Group 42 pm_cpi_stack1) Completion stall caused by LSU instruction event:0X2A5 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP42 : (Group 42 pm_cpi_stack1) Instructions completed event:0X2A6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP42 : (Group 42 pm_cpi_stack1) Completion stall caused by ERAT miss event:0X2A7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP42 : (Group 42 pm_cpi_stack1) Processor cycles #Group 43 pm_cpi_stack2, CPI stack analysis event:0X2B0 counters:0 um:zero minimum:1000 name:PM_CMPLU_STALL_OTHER_GRP43 : (Group 43 pm_cpi_stack2) Completion stall caused by other reason event:0X2B1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP43 : (Group 43 pm_cpi_stack2) Instructions completed event:0X2B2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP43 : (Group 43 pm_cpi_stack2) L1 D cache load misses event:0X2B3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP43 : (Group 43 pm_cpi_stack2) Processor cycles event:0X2B4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP43 : (Group 43 pm_cpi_stack2) Completion stall caused by D cache miss event:0X2B5 counters:5 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP43 : (Group 43 pm_cpi_stack2) DERAT misses event:0X2B6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP43 : (Group 43 pm_cpi_stack2) Completion stall caused by reject event:0X2B7 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP43 : (Group 43 pm_cpi_stack2) L1 D cache load references #Group 44 pm_cpi_stack3, CPI stack analysis event:0X2C0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP44 : (Group 44 pm_cpi_stack3) Instructions completed event:0X2C1 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_SRQ_FULL_GRP44 : (Group 44 pm_cpi_stack3) GCT empty caused by SRQ full event:0X2C2 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP44 : (Group 44 pm_cpi_stack3) FXU produced a result event:0X2C3 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP44 : (Group 44 pm_cpi_stack3) FPU produced a result event:0X2C4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP44 : (Group 44 pm_cpi_stack3) Completion stall caused by FXU instruction event:0X2C5 counters:5 um:zero minimum:1000 name:PM_FXU_BUSY_GRP44 : (Group 44 pm_cpi_stack3) FXU busy event:0X2C6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP44 : (Group 44 pm_cpi_stack3) Completion stall caused by DIV instruction event:0X2C7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP44 : (Group 44 pm_cpi_stack3) Processor cycles #Group 45 pm_cpi_stack4, CPI stack analysis event:0X2D0 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP45 : (Group 45 pm_cpi_stack4) FPU executed FDIV instruction event:0X2D1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP45 : (Group 45 pm_cpi_stack4) FPU executed multiply-add instruction event:0X2D2 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP45 : (Group 45 pm_cpi_stack4) Instructions completed event:0X2D3 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP45 : (Group 45 pm_cpi_stack4) Instructions completed event:0X2D4 counters:4 um:zero minimum:1000 name:PM_CMPLU_STALL_FDIV_GRP45 : (Group 45 pm_cpi_stack4) Completion stall caused by FDIV or FQRT instruction event:0X2D5 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP45 : (Group 45 pm_cpi_stack4) FPU executed FSQRT instruction event:0X2D6 counters:6 um:zero minimum:1000 name:PM_CMPLU_STALL_FPU_GRP45 : (Group 45 pm_cpi_stack4) Completion stall caused by FPU instruction event:0X2D7 counters:7 um:zero minimum:10000 name:PM_CYC_GRP45 : (Group 45 pm_cpi_stack4) Processor cycles #Group 46 pm_cpi_stack5, CPI stack analysis event:0X2E0 counters:0 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP46 : (Group 46 pm_cpi_stack5) Cycles GCT empty event:0X2E1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP46 : (Group 46 pm_cpi_stack5) Instructions completed event:0X2E2 counters:2 um:zero minimum:1000 name:PM_FLUSH_BR_MPRED_GRP46 : (Group 46 pm_cpi_stack5) Flush caused by branch mispredict event:0X2E3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP46 : (Group 46 pm_cpi_stack5) Branch mispredictions due to target address event:0X2E4 counters:4 um:zero minimum:1000 name:PM_GCT_EMPTY_IC_MISS_GRP46 : (Group 46 pm_cpi_stack5) GCT empty due to I cache miss event:0X2E5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP46 : (Group 46 pm_cpi_stack5) Processor cycles event:0X2E6 counters:6 um:zero minimum:1000 name:PM_GCT_EMPTY_BR_MPRED_GRP46 : (Group 46 pm_cpi_stack5) GCT empty due to branch mispredict event:0X2E7 counters:7 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP46 : (Group 46 pm_cpi_stack5) Cycles writing to instruction L1 #Group 47 pm_data2, data source and LMQ event:0X2F0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP47 : (Group 47 pm_data2) Data loaded from L2.5 shared event:0X2F1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP47 : (Group 47 pm_data2) Instructions completed event:0X2F2 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP47 : (Group 47 pm_data2) Data loaded from L2.5 modified event:0X2F3 counters:3 um:zero minimum:10000 name:PM_CYC_GRP47 : (Group 47 pm_data2) Processor cycles event:0X2F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP47 : (Group 47 pm_data2) Instructions completed event:0X2F5 counters:5 um:zero minimum:10000 name:PM_CYC_GRP47 : (Group 47 pm_data2) Processor cycles event:0X2F6 counters:6 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP47 : (Group 47 pm_data2) LMQ slot 0 allocated event:0X2F7 counters:7 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP47 : (Group 47 pm_data2) LMQ slot 0 valid #Group 48 pm_fetch_branch, Instruction fetch and branch events event:0X300 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP48 : (Group 48 pm_fetch_branch) Instructions fetched from L2 event:0X301 counters:1 um:zero minimum:1000 name:PM_INST_FROM_MEM_GRP48 : (Group 48 pm_fetch_branch) Instruction fetched from memory event:0X302 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP48 : (Group 48 pm_fetch_branch) Instructions fetched from prefetch event:0X303 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP48 : (Group 48 pm_fetch_branch) Branches issued event:0X304 counters:4 um:zero minimum:10000 name:PM_CYC_GRP48 : (Group 48 pm_fetch_branch) Processor cycles event:0X305 counters:5 um:zero minimum:10000 name:PM_INST_CMPL_GRP48 : (Group 48 pm_fetch_branch) Instructions completed event:0X306 counters:6 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP48 : (Group 48 pm_fetch_branch) Branch mispredictions due to CR bit setting event:0X307 counters:7 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP48 : (Group 48 pm_fetch_branch) Branch mispredictions due to target address #Group 49 pm_l1l2_miss, L1 and L2 miss events event:0X310 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP49 : (Group 49 pm_l1l2_miss) Data loaded from L2 event:0X311 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP49 : (Group 49 pm_l1l2_miss) Instructions completed event:0X312 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_MEM_GRP49 : (Group 49 pm_l1l2_miss) Data loaded from memory event:0X313 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP49 : (Group 49 pm_l1l2_miss) LSU0 L1 D cache load misses event:0X314 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP49 : (Group 49 pm_l1l2_miss) One or more PPC instruction completed event:0X315 counters:5 um:zero minimum:10000 name:PM_CYC_GRP49 : (Group 49 pm_l1l2_miss) Processor cycles event:0X316 counters:6 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP49 : (Group 49 pm_l1l2_miss) LSU1 L1 D cache load misses event:0X317 counters:7 um:zero minimum:1000 name:PM_LD_REF_L1_GRP49 : (Group 49 pm_l1l2_miss) L1 D cache load references oprofile-1.3.0/events/ppc64/970/event_mappings0000664000175000017500000007316112534404406016010 00000000000000#Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X0400C51E mmcr1:0X000000000A46F18C mmcra:0X00002001 #Group 1 pm_slice0, Time Slice 0 event:0X010 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X011 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X012 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X013 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X014 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X015 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X016 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 event:0X017 mmcr0:0X0000051E mmcr1:0X000000000A46F18C mmcra:0X00002001 #Group 2 pm_eprof, Group for use with eprof event:0X020 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X021 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X022 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X023 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X024 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X025 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X026 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X027 mmcr0:0X00000F1E mmcr1:0X4003001005F09000 mmcra:0X00002001 #Group 3 pm_basic, Basic performance indicators event:0X030 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X031 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X032 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X033 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X034 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X035 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X036 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 event:0X037 mmcr0:0X0000091E mmcr1:0X4003001005F09000 mmcra:0X00002001 #Group 4 pm_lsu, Information on the Load Store Unit event:0X040 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X041 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X042 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X043 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X044 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X045 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X046 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 event:0X047 mmcr0:0X00000000 mmcr1:0X000F00007A400000 mmcra:0X00002001 #Group 5 pm_fpu1, Floating Point events event:0X050 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X051 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X052 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X053 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X054 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X055 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X056 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 event:0X057 mmcr0:0X00000000 mmcr1:0X00000000001E0480 mmcra:0X00002001 #Group 6 pm_fpu2, Floating Point events event:0X060 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X061 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X062 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X063 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X064 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X065 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X066 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 event:0X067 mmcr0:0X00000000 mmcr1:0X000020E87A400000 mmcra:0X00002001 #Group 7 pm_isu_rename, ISU Rename Pool Events event:0X070 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X071 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X072 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X073 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X074 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X075 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X076 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 event:0X077 mmcr0:0X00001228 mmcr1:0X400000218E6D84BC mmcra:0X00002001 #Group 8 pm_isu_queues1, ISU Rename Pool Events event:0X080 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X081 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X082 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X083 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X084 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X085 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X086 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 event:0X087 mmcr0:0X0000132E mmcr1:0X40000000851E994C mmcra:0X00002001 #Group 9 pm_isu_flow, ISU Instruction Flow Events event:0X090 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X091 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X092 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X093 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X094 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X095 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X096 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 event:0X097 mmcr0:0X0000181E mmcr1:0X400000B3D7B7C4BC mmcra:0X00002001 #Group 10 pm_isu_work, ISU Indicators of Work Blockage event:0X0A0 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A1 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A2 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A3 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A4 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A5 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A6 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 event:0X0A7 mmcr0:0X00000402 mmcr1:0X400000050FDE9D88 mmcra:0X00002001 #Group 11 pm_fpu3, Floating Point events by unit event:0X0B0 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B1 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B2 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B3 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B4 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B5 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B6 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 event:0X0B7 mmcr0:0X00001028 mmcr1:0X000000008D6354BC mmcra:0X00002001 #Group 12 pm_fpu4, Floating Point events by unit event:0X0C0 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C1 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C2 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C3 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C4 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C5 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C6 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 event:0X0C7 mmcr0:0X0000122C mmcr1:0X000000009DE774BC mmcra:0X00002001 #Group 13 pm_fpu5, Floating Point events by unit event:0X0D0 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D1 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D2 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D3 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D4 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D5 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D6 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 event:0X0D7 mmcr0:0X00001838 mmcr1:0X000000C0851E9958 mmcra:0X00002001 #Group 14 pm_fpu7, Floating Point events by unit event:0X0E0 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E1 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E2 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E3 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E4 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E5 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E6 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 event:0X0E7 mmcr0:0X0000193A mmcr1:0X000000C89DDE97E0 mmcra:0X00002001 #Group 15 pm_lsu_flush, LSU Flush Events event:0X0F0 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F1 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F2 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F3 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F4 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F5 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F6 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 event:0X0F7 mmcr0:0X0000122C mmcr1:0X000C00007BE774BC mmcra:0X00002001 #Group 16 pm_lsu_load1, LSU Load Events event:0X100 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X101 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X102 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X103 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X104 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X105 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X106 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 event:0X107 mmcr0:0X00001028 mmcr1:0X000F0000851E9958 mmcra:0X00002001 #Group 17 pm_lsu_store1, LSU Store Events event:0X110 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X111 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X112 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X113 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X114 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X115 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X116 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 event:0X117 mmcr0:0X0000112A mmcr1:0X000F00008D5E99DC mmcra:0X00002001 #Group 18 pm_lsu_store2, LSU Store Events event:0X120 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X121 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X122 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X123 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X124 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X125 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X126 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 event:0X127 mmcr0:0X00001838 mmcr1:0X0003C0D08D76F4BC mmcra:0X00002001 #Group 19 pm_lsu7, Information on the Load Store Unit event:0X130 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X131 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X132 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X133 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X134 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X135 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X136 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 event:0X137 mmcr0:0X0000122C mmcr1:0X000830047BD2FE3C mmcra:0X00002001 #Group 20 pm_misc, Misc Events for testing event:0X140 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X141 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X142 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X143 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X144 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X145 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X146 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 event:0X147 mmcr0:0X00000404 mmcr1:0X0000000023C69194 mmcra:0X00002001 #Group 21 pm_pe_bench1, PE Benchmarker group for FP analysis event:0X150 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X151 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X152 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X153 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X154 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X155 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X156 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 event:0X157 mmcr0:0X00000000 mmcr1:0X10001002001E0480 mmcra:0X00002001 #Group 22 pm_pe_bench4, PE Benchmarker group for L1 and TLB event:0X160 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X161 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X162 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X163 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X164 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X165 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X166 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X167 mmcr0:0X00001420 mmcr1:0X000B000004DE9000 mmcra:0X00002001 #Group 23 pm_hpmcount1, Hpmcount group for L1 and TLB behavior event:0X170 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X171 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X172 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X173 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X174 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X175 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X176 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 event:0X177 mmcr0:0X00001404 mmcr1:0X000B000004DE9000 mmcra:0X00002001 #Group 24 pm_hpmcount2, Hpmcount group for computation event:0X180 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X181 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X182 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X183 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X184 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X185 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X186 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 event:0X187 mmcr0:0X00000000 mmcr1:0X000020289DDE0480 mmcra:0X00002001 #Group 25 pm_l1andbr, L1 misses and branch misspredict analysis event:0X190 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X191 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X192 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X193 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X194 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X195 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X196 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 event:0X197 mmcr0:0X0000091E mmcr1:0X8003C01D0676FD6C mmcra:0X00002001 #Group 26 pm_imix, Instruction mix: loads, stores and branches event:0X1A0 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A1 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A2 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A3 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A4 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A5 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A6 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 event:0X1A7 mmcr0:0X0000091E mmcr1:0X8003C021065FB000 mmcra:0X00002001 #Group 27 pm_branch, SLB and branch misspredict analysis event:0X1B0 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B1 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B2 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B3 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B4 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B5 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B6 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 event:0X1B7 mmcr0:0X0000052A mmcr1:0X8008000BCEA2F4EC mmcra:0X00002001 #Group 28 pm_data, data source and LMQ event:0X1C0 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C1 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C2 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C3 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C4 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C5 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C6 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 event:0X1C7 mmcr0:0X00000712 mmcr1:0X0000300E3BD2FF74 mmcra:0X00002001 #Group 29 pm_tlb, TLB and LRQ plus data prefetch event:0X1D0 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D1 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D2 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D3 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D4 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D5 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D6 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 event:0X1D7 mmcr0:0X00001420 mmcr1:0X0008E03C4BFDACEC mmcra:0X00002001 #Group 30 pm_isource, inst source and tablewalk event:0X1E0 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E1 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E2 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E3 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E4 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E5 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E6 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 event:0X1E7 mmcr0:0X0000060C mmcr1:0X800B00C0226EF1DC mmcra:0X00002001 #Group 31 pm_sync, Sync and SRQ event:0X1F0 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F1 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F2 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F3 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F4 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F5 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F6 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 event:0X1F7 mmcr0:0X00001D32 mmcr1:0X0003E0C107529780 mmcra:0X00002001 #Group 32 pm_ierat, IERAT event:0X200 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X201 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X202 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X203 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X204 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X205 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X206 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 event:0X207 mmcr0:0X00000D12 mmcr1:0X80000082C3D2F4BC mmcra:0X00002001 #Group 33 pm_derat, DERAT event:0X210 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X211 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X212 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X213 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X214 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X215 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X216 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 event:0X217 mmcr0:0X00000436 mmcr1:0X100B7052E274003C mmcra:0X00002001 #Group 34 pm_mark1, Information on marked instructions event:0X220 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X221 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X222 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X223 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X224 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X225 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X226 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 event:0X227 mmcr0:0X00000006 mmcr1:0X00008080790852A4 mmcra:0X00002001 #Group 35 pm_mark2, Marked Instructions Processing Flow event:0X230 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X231 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X232 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X233 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X234 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X235 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X236 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 event:0X237 mmcr0:0X0000020A mmcr1:0X0000000079484210 mmcra:0X00002001 #Group 36 pm_mark3, Marked Stores Processing Flow event:0X240 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X241 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X242 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X243 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X244 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X245 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X246 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 event:0X247 mmcr0:0X0000031E mmcr1:0X00203004190A3F24 mmcra:0X00002001 #Group 37 pm_lsu_mark1, Load Store Unit Marked Events event:0X250 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X251 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X252 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X253 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X254 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X255 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X256 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 event:0X257 mmcr0:0X00001B34 mmcr1:0X000280C08D5E9850 mmcra:0X00002001 #Group 38 pm_lsu_mark2, Load Store Unit Marked Events event:0X260 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X261 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X262 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X263 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X264 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X265 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X266 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 event:0X267 mmcr0:0X00001838 mmcr1:0X000280C0959E99DC mmcra:0X00002001 #Group 39 pm_fxu1, Fixed Point events by unit event:0X270 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X271 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X272 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X273 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X274 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X275 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X276 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 event:0X277 mmcr0:0X00000912 mmcr1:0X100010020084213C mmcra:0X00002001 #Group 40 pm_fxu2, Fixed Point events by unit event:0X280 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X281 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X282 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X283 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X284 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X285 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X286 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 event:0X287 mmcr0:0X0000091E mmcr1:0X4000000CA4042D78 mmcra:0X00002001 #Group 41 pm_ifu, pm_ifu event:0X290 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X291 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X292 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X293 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X294 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X295 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X296 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 event:0X297 mmcr0:0X00000D0C mmcr1:0X800000F06B7867A4 mmcra:0X00002001 #Group 42 pm_cpi_stack1, CPI stack analysis event:0X2A0 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A1 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A2 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A3 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A4 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A5 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A6 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 event:0X2A7 mmcr0:0X00001B3E mmcr1:0X4000C0C0ADD6963D mmcra:0X00002001 #Group 43 pm_cpi_stack2, CPI stack analysis event:0X2B0 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B1 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B2 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B3 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B4 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B5 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B6 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 event:0X2B7 mmcr0:0X00000B12 mmcr1:0X000B000003D60583 mmcra:0X00002001 #Group 44 pm_cpi_stack3, CPI stack analysis event:0X2C0 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C1 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C2 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C3 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C4 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C5 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C6 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 event:0X2C7 mmcr0:0X00000916 mmcr1:0X10001002001625BE mmcra:0X00002001 #Group 45 pm_cpi_stack4, CPI stack analysis event:0X2D0 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D1 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D2 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D3 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D4 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D5 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D6 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 event:0X2D7 mmcr0:0X00000000 mmcr1:0X00000000485805BD mmcra:0X00002001 #Group 46 pm_cpi_stack5, CPI stack analysis event:0X2E0 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E1 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E2 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E3 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E4 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E5 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E6 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 event:0X2E7 mmcr0:0X00000412 mmcr1:0X90010009B6D8F672 mmcra:0X00002001 #Group 47 pm_data2, data source and LMQ event:0X2F0 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F1 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F2 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F3 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F4 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F5 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F6 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 event:0X2F7 mmcr0:0X00000D12 mmcr1:0X0000300E6BD2FF74 mmcra:0X00002001 #Group 48 pm_fetch_branch, Instruction fetch and branch events event:0X300 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X301 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X302 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X303 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X304 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X305 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X306 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 event:0X307 mmcr0:0X0000060C mmcr1:0X800000CD6E5E9D6C mmcra:0X00002001 #Group 49 pm_l1l2_miss, L1 and L2 miss events event:0X310 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X311 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X312 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X313 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X314 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X315 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X316 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 event:0X317 mmcr0:0X00000712 mmcr1:0X000330023C86FB00 mmcra:0X00002001 oprofile-1.3.0/events/ppc64/970/unit_masks0000664000175000017500000000013312534404406015133 00000000000000# ppc64 970 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/ppc64/power5++/0000775000175000017500000000000013323173530014144 500000000000000oprofile-1.3.0/events/ppc64/power5++/events0000664000175000017500000033064712534404406015332 00000000000000#PPC64 POWER5++ events # # Copyright OProfile authors # Copyright (c) International Business Machines, 2007. # Contributed by Maynard Johnson . # # # Within each group the event names must be unique. Each event in a group is # assigned to a unique counter. The groups are from the groups defined in the # Performance Monitor Unit user guide for this processor. # # Only events within the same group can be selected simultaneously when # using legacy opcontrol to do profiling. When profiling with operf, # events from different groups may be specified, and the Linux Performance # Events Kernel Subsystem code will handle the necessary multiplexing. # # Each event is given a unique event number. The event number is used by the # OProfile code to resolve event names for the post-processing. This is done # to preserve compatibility with the rest of the OProfile code. The event # numbers are formatted as follows: concat(). #Group Default event:0X001 counters:1 um:zero minimum:10000 name:CYCLES : Processor Cycles #Group 1 pm_utilization, CPI and utilization data event:0X0010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_utilization) Run cycles event:0X0011 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_utilization) Instructions completed event:0X0012 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP1 : (Group 1 pm_utilization) Instructions dispatched event:0X0013 counters:3 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_utilization) Processor cycles #Group 2 pm_completion, Completion and cycle counts event:0X0020 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP2 : (Group 2 pm_completion) One or more PPC instruction completed event:0X0021 counters:1 um:zero minimum:1000 name:PM_GCT_EMPTY_CYC_GRP2 : (Group 2 pm_completion) Cycles GCT empty event:0X0022 counters:2 um:zero minimum:1000 name:PM_GRP_CMPL_GRP2 : (Group 2 pm_completion) Group completed event:0X0023 counters:3 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_completion) Processor cycles #Group 3 pm_group_dispatch, Group dispatch events event:0X0030 counters:0 um:zero minimum:1000 name:PM_GRP_DISP_VALID_GRP3 : (Group 3 pm_group_dispatch) Group dispatch valid event:0X0031 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP3 : (Group 3 pm_group_dispatch) Group dispatch rejected event:0X0032 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_BLK_SB_CYC_GRP3 : (Group 3 pm_group_dispatch) Cycles group dispatch blocked by scoreboard event:0X0033 counters:3 um:zero minimum:1000 name:PM_INST_DISP_GRP3 : (Group 3 pm_group_dispatch) Instructions dispatched #Group 4 pm_clb1, CLB fullness event:0X0040 counters:0 um:zero minimum:1000 name:PM_0INST_CLB_CYC_GRP4 : (Group 4 pm_clb1) Cycles no instructions in CLB event:0X0041 counters:1 um:zero minimum:1000 name:PM_2INST_CLB_CYC_GRP4 : (Group 4 pm_clb1) Cycles 2 instructions in CLB event:0X0042 counters:2 um:zero minimum:1000 name:PM_CLB_EMPTY_CYC_GRP4 : (Group 4 pm_clb1) Cycles CLB empty event:0X0043 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP4 : (Group 4 pm_clb1) Marked load latency from L3.5 modified #Group 5 pm_clb2, CLB fullness event:0X0050 counters:0 um:zero minimum:1000 name:PM_5INST_CLB_CYC_GRP5 : (Group 5 pm_clb2) Cycles 5 instructions in CLB event:0X0051 counters:1 um:zero minimum:1000 name:PM_6INST_CLB_CYC_GRP5 : (Group 5 pm_clb2) Cycles 6 instructions in CLB event:0X0052 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP5 : (Group 5 pm_clb2) Marked instruction valid in SRQ event:0X0053 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP5 : (Group 5 pm_clb2) Internal operations completed #Group 6 pm_gct_empty, GCT empty reasons event:0X0060 counters:0 um:zero minimum:1000 name:PM_GCT_NOSLOT_CYC_GRP6 : (Group 6 pm_gct_empty) Cycles no GCT slot allocated event:0X0061 counters:1 um:zero minimum:1000 name:PM_GCT_NOSLOT_IC_MISS_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by I cache miss event:0X0062 counters:2 um:zero minimum:1000 name:PM_GCT_NOSLOT_SRQ_FULL_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by SRQ full event:0X0063 counters:3 um:zero minimum:1000 name:PM_GCT_NOSLOT_BR_MPRED_GRP6 : (Group 6 pm_gct_empty) No slot in GCT caused by branch mispredict #Group 7 pm_gct_usage, GCT Usage event:0X0070 counters:0 um:zero minimum:1000 name:PM_GCT_USAGE_00to59_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT less than 60% full event:0X0071 counters:1 um:zero minimum:1000 name:PM_GCT_USAGE_60to79_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT 60-79% full event:0X0072 counters:2 um:zero minimum:1000 name:PM_GCT_USAGE_80to99_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT 80-99% full event:0X0073 counters:3 um:zero minimum:1000 name:PM_GCT_FULL_CYC_GRP7 : (Group 7 pm_gct_usage) Cycles GCT full #Group 8 pm_lsu1, LSU LRQ and LMQ events event:0X0080 counters:0 um:zero minimum:1000 name:PM_LSU_LRQ_S0_ALLOC_GRP8 : (Group 8 pm_lsu1) LRQ slot 0 allocated event:0X0081 counters:1 um:zero minimum:1000 name:PM_LSU_LRQ_S0_VALID_GRP8 : (Group 8 pm_lsu1) LRQ slot 0 valid event:0X0082 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_S0_ALLOC_GRP8 : (Group 8 pm_lsu1) LMQ slot 0 allocated event:0X0083 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_S0_VALID_GRP8 : (Group 8 pm_lsu1) LMQ slot 0 valid #Group 9 pm_lsu2, LSU SRQ events event:0X0090 counters:0 um:zero minimum:1000 name:PM_LSU_SRQ_S0_ALLOC_GRP9 : (Group 9 pm_lsu2) SRQ slot 0 allocated event:0X0091 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_S0_VALID_GRP9 : (Group 9 pm_lsu2) SRQ slot 0 valid event:0X0092 counters:2 um:zero minimum:1000 name:PM_LSU_SRQ_SYNC_CYC_GRP9 : (Group 9 pm_lsu2) SRQ sync duration event:0X0093 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP9 : (Group 9 pm_lsu2) Cycles SRQ full #Group 10 pm_lsu3, LSU SRQ and LMQ events event:0X00A0 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_LHR_MERGE_GRP10 : (Group 10 pm_lsu3) LMQ LHR merges event:0X00A1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_STFWD_GRP10 : (Group 10 pm_lsu3) SRQ store forwarded event:0X00A2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP10 : (Group 10 pm_lsu3) Cycles LMQ and SRQ empty event:0X00A3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP10 : (Group 10 pm_lsu3) Cycles SRQ empty #Group 11 pm_lsu4, LSU SRQ and LMQ events event:0X00B0 counters:0 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP11 : (Group 11 pm_lsu4) Cycles LMQ full event:0X00B1 counters:1 um:zero minimum:1000 name:PM_LSU_SRQ_FULL_CYC_GRP11 : (Group 11 pm_lsu4) Cycles SRQ full event:0X00B2 counters:2 um:zero minimum:1000 name:PM_LSU_LMQ_SRQ_EMPTY_CYC_GRP11 : (Group 11 pm_lsu4) Cycles LMQ and SRQ empty event:0X00B3 counters:3 um:zero minimum:1000 name:PM_LSU_SRQ_EMPTY_CYC_GRP11 : (Group 11 pm_lsu4) Cycles SRQ empty #Group 12 pm_prefetch1, Prefetch stream allocation event:0X00C0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2MISS_GRP12 : (Group 12 pm_prefetch1) Instruction fetched missed L2 event:0X00C1 counters:1 um:zero minimum:1000 name:PM_INST_FETCH_CYC_GRP12 : (Group 12 pm_prefetch1) Cycles at least 1 instruction fetched event:0X00C2 counters:2 um:zero minimum:1000 name:PM_DC_PREF_OUT_OF_STREAMS_GRP12 : (Group 12 pm_prefetch1) D cache out of prefetch streams event:0X00C3 counters:3 um:zero minimum:1000 name:PM_DC_PREF_STREAM_ALLOC_GRP12 : (Group 12 pm_prefetch1) D cache new prefetch stream allocated #Group 13 pm_prefetch2, Prefetch events event:0X00D0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP13 : (Group 13 pm_prefetch2) Internal operations completed event:0X00D1 counters:1 um:zero minimum:1000 name:PM_CLB_FULL_CYC_GRP13 : (Group 13 pm_prefetch2) Cycles CLB full event:0X00D2 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP13 : (Group 13 pm_prefetch2) L1 cache data prefetches event:0X00D3 counters:3 um:zero minimum:1000 name:PM_IC_PREF_INSTALL_GRP13 : (Group 13 pm_prefetch2) Instruction prefetched installed in prefetch buffer #Group 14 pm_prefetch3, L2 prefetch and misc events event:0X00E0 counters:0 um:zero minimum:1000 name:PM_1INST_CLB_CYC_GRP14 : (Group 14 pm_prefetch3) Cycles 1 instruction in CLB event:0X00E1 counters:1 um:zero minimum:1000 name:PM_LSU_BUSY_REJECT_GRP14 : (Group 14 pm_prefetch3) LSU busy due to reject event:0X00E2 counters:2 um:zero minimum:1000 name:PM_L2_PREF_GRP14 : (Group 14 pm_prefetch3) L2 cache prefetches event:0X00E3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP14 : (Group 14 pm_prefetch3) Internal operations completed #Group 15 pm_prefetch4, Misc prefetch and reject events event:0X00F0 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_SRQ_GRP15 : (Group 15 pm_prefetch4) LSU0 SRQ lhs rejects event:0X00F1 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_SRQ_GRP15 : (Group 15 pm_prefetch4) LSU1 SRQ lhs rejects event:0X00F2 counters:2 um:zero minimum:1000 name:PM_DC_PREF_DST_GRP15 : (Group 15 pm_prefetch4) DST (Data Stream Touch) stream start event:0X00F3 counters:3 um:zero minimum:1000 name:PM_L2_PREF_GRP15 : (Group 15 pm_prefetch4) L2 cache prefetches #Group 16 pm_lsu_reject1, LSU reject events event:0X0100 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_ERAT_MISS_GRP16 : (Group 16 pm_lsu_reject1) LSU reject due to ERAT miss event:0X0101 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_LMQ_FULL_GRP16 : (Group 16 pm_lsu_reject1) LSU reject due to LMQ full or missed data coming event:0X0102 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP16 : (Group 16 pm_lsu_reject1) Flush caused by thread GCT imbalance event:0X0103 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP16 : (Group 16 pm_lsu_reject1) Marked SRQ lhs flushes #Group 17 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision event:0X0110 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_RELOAD_CDF_GRP17 : (Group 17 pm_lsu_reject2) LSU0 reject due to reload CDF or tag update collision event:0X0111 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_RELOAD_CDF_GRP17 : (Group 17 pm_lsu_reject2) LSU1 reject due to reload CDF or tag update collision event:0X0112 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP17 : (Group 17 pm_lsu_reject2) Internal operations completed event:0X0113 counters:3 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP17 : (Group 17 pm_lsu_reject2) Cycles writing to instruction L1 #Group 18 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions event:0X0120 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_ERAT_MISS_GRP18 : (Group 18 pm_lsu_reject3) LSU0 reject due to ERAT miss event:0X0121 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_ERAT_MISS_GRP18 : (Group 18 pm_lsu_reject3) LSU1 reject due to ERAT miss event:0X0122 counters:2 um:zero minimum:1000 name:PM_LWSYNC_HELD_GRP18 : (Group 18 pm_lsu_reject3) LWSYNC held at dispatch event:0X0123 counters:3 um:zero minimum:1000 name:PM_TLBIE_HELD_GRP18 : (Group 18 pm_lsu_reject3) TLBIE held at dispatch #Group 19 pm_lsu_reject4, LSU0/1 reject LMQ full event:0X0130 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_LMQ_FULL_GRP19 : (Group 19 pm_lsu_reject4) LSU0 reject due to LMQ full or missed data coming event:0X0131 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_LMQ_FULL_GRP19 : (Group 19 pm_lsu_reject4) LSU1 reject due to LMQ full or missed data coming event:0X0132 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP19 : (Group 19 pm_lsu_reject4) Internal operations completed event:0X0133 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP19 : (Group 19 pm_lsu_reject4) Branches issued #Group 20 pm_lsu_reject5, LSU misc reject and flush events event:0X0140 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_SRQ_GRP20 : (Group 20 pm_lsu_reject5) LSU SRQ lhs rejects event:0X0141 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_RELOAD_CDF_GRP20 : (Group 20 pm_lsu_reject5) LSU reject due to reload CDF or tag update collision event:0X0142 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP20 : (Group 20 pm_lsu_reject5) Flush initiated by LSU event:0X0143 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP20 : (Group 20 pm_lsu_reject5) Flushes #Group 21 pm_flush1, Misc flush events event:0X0150 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP21 : (Group 21 pm_flush1) Internal operations completed event:0X0151 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP21 : (Group 21 pm_flush1) SRQ unaligned store flushes event:0X0152 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP21 : (Group 21 pm_flush1) Flush caused by thread GCT imbalance event:0X0153 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP21 : (Group 21 pm_flush1) L1 D cache entries invalidated from L2 #Group 22 pm_flush2, Flushes due to scoreboard and sync event:0X0160 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP22 : (Group 22 pm_flush2) Instruction TLB misses event:0X0161 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP22 : (Group 22 pm_flush2) Internal operations completed event:0X0162 counters:2 um:zero minimum:1000 name:PM_FLUSH_SB_GRP22 : (Group 22 pm_flush2) Flush caused by scoreboard operation event:0X0163 counters:3 um:zero minimum:1000 name:PM_FLUSH_SYNC_GRP22 : (Group 22 pm_flush2) Flush caused by sync #Group 23 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events event:0X0170 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) SRQ flushes event:0X0171 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) LRQ flushes event:0X0172 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) Internal operations completed event:0X0173 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP23 : (Group 23 pm_lsu_flush_srq_lrq) Flush initiated by LSU #Group 24 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ event:0X0180 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP24 : (Group 24 pm_lsu_flush_lrq) LSU0 LRQ flushes event:0X0181 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP24 : (Group 24 pm_lsu_flush_lrq) LSU1 LRQ flushes event:0X0182 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP24 : (Group 24 pm_lsu_flush_lrq) Flush initiated by LSU event:0X0183 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP24 : (Group 24 pm_lsu_flush_lrq) Internal operations completed #Group 25 pm_lsu_flush_srq, LSU0/1 flush due to SRQ event:0X0190 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP25 : (Group 25 pm_lsu_flush_srq) LSU0 SRQ lhs flushes event:0X0191 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP25 : (Group 25 pm_lsu_flush_srq) LSU1 SRQ lhs flushes event:0X0192 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP25 : (Group 25 pm_lsu_flush_srq) Internal operations completed event:0X0193 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP25 : (Group 25 pm_lsu_flush_srq) Flush initiated by LSU #Group 26 pm_lsu_flush_unaligned, LSU flush due to unaligned data event:0X01A0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_unaligned) LRQ unaligned load flushes event:0X01A1 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP26 : (Group 26 pm_lsu_flush_unaligned) SRQ unaligned store flushes event:0X01A2 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP26 : (Group 26 pm_lsu_flush_unaligned) Branches issued event:0X01A3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP26 : (Group 26 pm_lsu_flush_unaligned) Internal operations completed #Group 27 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load event:0X01B0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP27 : (Group 27 pm_lsu_flush_uld) LSU0 unaligned load flushes event:0X01B1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP27 : (Group 27 pm_lsu_flush_uld) LSU1 unaligned load flushes event:0X01B2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP27 : (Group 27 pm_lsu_flush_uld) Flush initiated by LSU event:0X01B3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP27 : (Group 27 pm_lsu_flush_uld) Internal operations completed #Group 28 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store event:0X01C0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP28 : (Group 28 pm_lsu_flush_ust) LSU0 unaligned store flushes event:0X01C1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP28 : (Group 28 pm_lsu_flush_ust) LSU1 unaligned store flushes event:0X01C2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP28 : (Group 28 pm_lsu_flush_ust) Internal operations completed event:0X01C3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP28 : (Group 28 pm_lsu_flush_ust) Flush initiated by LSU #Group 29 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full event:0X01D0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_FULL_GRP29 : (Group 29 pm_lsu_flush_full) Flush caused by LRQ full event:0X01D1 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP29 : (Group 29 pm_lsu_flush_full) Internal operations completed event:0X01D2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP29 : (Group 29 pm_lsu_flush_full) Marked LRQ flushes event:0X01D3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_FULL_GRP29 : (Group 29 pm_lsu_flush_full) Flush caused by SRQ full #Group 30 pm_lsu_stall1, LSU Stalls event:0X01E0 counters:0 um:zero minimum:1000 name:PM_GRP_MRK_GRP30 : (Group 30 pm_lsu_stall1) Group marked in IDU event:0X01E1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP30 : (Group 30 pm_lsu_stall1) Completion stall caused by LSU instruction event:0X01E2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP30 : (Group 30 pm_lsu_stall1) Internal operations completed event:0X01E3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP30 : (Group 30 pm_lsu_stall1) Completion stall caused by reject #Group 31 pm_lsu_stall2, LSU Stalls event:0X01F0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP31 : (Group 31 pm_lsu_stall2) Internal operations completed event:0X01F1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP31 : (Group 31 pm_lsu_stall2) Completion stall caused by D cache miss event:0X01F2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP31 : (Group 31 pm_lsu_stall2) Processor cycles event:0X01F3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP31 : (Group 31 pm_lsu_stall2) Completion stall caused by ERAT miss #Group 32 pm_fxu_stall, FXU Stalls event:0X0200 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_BR_REDIR_NONSPEC_GRP32 : (Group 32 pm_fxu_stall) Group experienced non-speculative I cache miss or branch redirect event:0X0201 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP32 : (Group 32 pm_fxu_stall) Completion stall caused by FXU instruction event:0X0202 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP32 : (Group 32 pm_fxu_stall) Internal operations completed event:0X0203 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP32 : (Group 32 pm_fxu_stall) Completion stall caused by DIV instruction #Group 33 pm_fpu_stall, FPU Stalls event:0X0210 counters:0 um:zero minimum:1000 name:PM_FPU_FULL_CYC_GRP33 : (Group 33 pm_fpu_stall) Cycles FPU issue queue full event:0X0211 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FDIV_GRP33 : (Group 33 pm_fpu_stall) Completion stall caused by FDIV or FQRT instruction event:0X0212 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP33 : (Group 33 pm_fpu_stall) Internal operations completed event:0X0213 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_FPU_GRP33 : (Group 33 pm_fpu_stall) Completion stall caused by FPU instruction #Group 34 pm_queue_full, BRQ LRQ LMQ queue full event:0X0220 counters:0 um:zero minimum:1000 name:PM_LARX_LSU0_GRP34 : (Group 34 pm_queue_full) Larx executed on LSU0 event:0X0221 counters:1 um:zero minimum:1000 name:PM_BRQ_FULL_CYC_GRP34 : (Group 34 pm_queue_full) Cycles branch queue full event:0X0222 counters:2 um:zero minimum:1000 name:PM_LSU_LRQ_FULL_CYC_GRP34 : (Group 34 pm_queue_full) Cycles LRQ full event:0X0223 counters:3 um:zero minimum:1000 name:PM_LSU_LMQ_FULL_CYC_GRP34 : (Group 34 pm_queue_full) Cycles LMQ full #Group 35 pm_issueq_full, FPU FX full event:0X0230 counters:0 um:zero minimum:1000 name:PM_FPU0_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FPU0 issue queue full event:0X0231 counters:1 um:zero minimum:1000 name:PM_FPU1_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FPU1 issue queue full event:0X0232 counters:2 um:zero minimum:1000 name:PM_FXLS0_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FXU0/LS0 queue full event:0X0233 counters:3 um:zero minimum:1000 name:PM_FXLS1_FULL_CYC_GRP35 : (Group 35 pm_issueq_full) Cycles FXU1/LS1 queue full #Group 36 pm_mapper_full1, CR CTR GPR mapper full event:0X0240 counters:0 um:zero minimum:1000 name:PM_CR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles CR logical operation mapper full event:0X0241 counters:1 um:zero minimum:1000 name:PM_LR_CTR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles LR/CTR mapper full event:0X0242 counters:2 um:zero minimum:1000 name:PM_GPR_MAP_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles GPR mapper full event:0X0243 counters:3 um:zero minimum:1000 name:PM_CRQ_FULL_CYC_GRP36 : (Group 36 pm_mapper_full1) Cycles CR issue queue full #Group 37 pm_mapper_full2, FPR XER mapper full event:0X0250 counters:0 um:zero minimum:1000 name:PM_FPR_MAP_FULL_CYC_GRP37 : (Group 37 pm_mapper_full2) Cycles FPR mapper full event:0X0251 counters:1 um:zero minimum:1000 name:PM_XER_MAP_FULL_CYC_GRP37 : (Group 37 pm_mapper_full2) Cycles XER mapper full event:0X0252 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP37 : (Group 37 pm_mapper_full2) Marked data loaded missed L2 event:0X0253 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP37 : (Group 37 pm_mapper_full2) Internal operations completed #Group 38 pm_misc_load, Non-cachable loads and stcx events event:0X0260 counters:0 um:zero minimum:1000 name:PM_STCX_FAIL_GRP38 : (Group 38 pm_misc_load) STCX failed event:0X0261 counters:1 um:zero minimum:1000 name:PM_STCX_PASS_GRP38 : (Group 38 pm_misc_load) Stcx passes event:0X0262 counters:2 um:zero minimum:1000 name:PM_LSU0_NCLD_GRP38 : (Group 38 pm_misc_load) LSU0 non-cacheable loads event:0X0263 counters:3 um:zero minimum:1000 name:PM_LSU1_NCLD_GRP38 : (Group 38 pm_misc_load) LSU1 non-cacheable loads #Group 39 pm_ic_demand, ICache demand from BR redirect event:0X0270 counters:0 um:zero minimum:1000 name:PM_LSU0_BUSY_REJECT_GRP39 : (Group 39 pm_ic_demand) LSU0 busy due to reject event:0X0271 counters:1 um:zero minimum:1000 name:PM_LSU1_BUSY_REJECT_GRP39 : (Group 39 pm_ic_demand) LSU1 busy due to reject event:0X0272 counters:2 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BHT_REDIRECT_GRP39 : (Group 39 pm_ic_demand) L2 I cache demand request due to BHT redirect event:0X0273 counters:3 um:zero minimum:1000 name:PM_IC_DEMAND_L2_BR_REDIRECT_GRP39 : (Group 39 pm_ic_demand) L2 I cache demand request due to branch redirect #Group 40 pm_ic_pref, ICache prefetch event:0X0280 counters:0 um:zero minimum:1000 name:PM_IERAT_XLATE_WR_GRP40 : (Group 40 pm_ic_pref) Translation written to ierat event:0X0281 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP40 : (Group 40 pm_ic_pref) Instruction prefetch requests event:0X0282 counters:2 um:zero minimum:1000 name:PM_IC_PREF_INSTALL_GRP40 : (Group 40 pm_ic_pref) Instruction prefetched installed in prefetch buffer event:0X0283 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP40 : (Group 40 pm_ic_pref) No instructions fetched #Group 41 pm_ic_miss, ICache misses event:0X0290 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_NONSPEC_GRP41 : (Group 41 pm_ic_miss) Group experienced non-speculative I cache miss event:0X0291 counters:1 um:zero minimum:1000 name:PM_GRP_IC_MISS_GRP41 : (Group 41 pm_ic_miss) Group experienced I cache miss event:0X0292 counters:2 um:zero minimum:1000 name:PM_L1_DCACHE_RELOAD_VALID_GRP41 : (Group 41 pm_ic_miss) L1 reload data source valid event:0X0293 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP41 : (Group 41 pm_ic_miss) Internal operations completed #Group 42 pm_branch_miss, Branch mispredict, TLB and SLB misses event:0X02A0 counters:0 um:zero minimum:1000 name:PM_TLB_MISS_GRP42 : (Group 42 pm_branch_miss) TLB misses event:0X02A1 counters:1 um:zero minimum:1000 name:PM_SLB_MISS_GRP42 : (Group 42 pm_branch_miss) SLB misses event:0X02A2 counters:2 um:zero minimum:1000 name:PM_BR_MPRED_CR_GRP42 : (Group 42 pm_branch_miss) Branch mispredictions due to CR bit setting event:0X02A3 counters:3 um:zero minimum:1000 name:PM_BR_MPRED_TA_GRP42 : (Group 42 pm_branch_miss) Branch mispredictions due to target address #Group 43 pm_branch1, Branch operations event:0X02B0 counters:0 um:zero minimum:1000 name:PM_BR_UNCOND_GRP43 : (Group 43 pm_branch1) Unconditional branch event:0X02B1 counters:1 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP43 : (Group 43 pm_branch1) A conditional branch was predicted, target prediction event:0X02B2 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP43 : (Group 43 pm_branch1) A conditional branch was predicted, CR prediction event:0X02B3 counters:3 um:zero minimum:1000 name:PM_BR_PRED_CR_TA_GRP43 : (Group 43 pm_branch1) A conditional branch was predicted, CR and target prediction #Group 44 pm_branch2, Branch operations event:0X02C0 counters:0 um:zero minimum:1000 name:PM_GRP_BR_REDIR_NONSPEC_GRP44 : (Group 44 pm_branch2) Group experienced non-speculative branch redirect event:0X02C1 counters:1 um:zero minimum:1000 name:PM_GRP_BR_REDIR_GRP44 : (Group 44 pm_branch2) Group experienced branch redirect event:0X02C2 counters:2 um:zero minimum:1000 name:PM_FLUSH_BR_MPRED_GRP44 : (Group 44 pm_branch2) Flush caused by branch mispredict event:0X02C3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP44 : (Group 44 pm_branch2) Internal operations completed #Group 45 pm_L1_tlbmiss, L1 load and TLB misses event:0X02D0 counters:0 um:zero minimum:1000 name:PM_DATA_TABLEWALK_CYC_GRP45 : (Group 45 pm_L1_tlbmiss) Cycles doing data tablewalks event:0X02D1 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP45 : (Group 45 pm_L1_tlbmiss) Data TLB misses event:0X02D2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP45 : (Group 45 pm_L1_tlbmiss) L1 D cache load misses event:0X02D3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP45 : (Group 45 pm_L1_tlbmiss) L1 D cache load references #Group 46 pm_L1_DERAT_miss, L1 store and DERAT misses event:0X02E0 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP46 : (Group 46 pm_L1_DERAT_miss) Data loaded from L2 event:0X02E1 counters:1 um:zero minimum:1000 name:PM_LSU_DERAT_MISS_GRP46 : (Group 46 pm_L1_DERAT_miss) DERAT misses event:0X02E2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP46 : (Group 46 pm_L1_DERAT_miss) L1 D cache store references event:0X02E3 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP46 : (Group 46 pm_L1_DERAT_miss) L1 D cache store misses #Group 47 pm_L1_slbmiss, L1 load and SLB misses event:0X02F0 counters:0 um:zero minimum:1000 name:PM_DSLB_MISS_GRP47 : (Group 47 pm_L1_slbmiss) Data SLB misses event:0X02F1 counters:1 um:zero minimum:1000 name:PM_ISLB_MISS_GRP47 : (Group 47 pm_L1_slbmiss) Instruction SLB misses event:0X02F2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU0_GRP47 : (Group 47 pm_L1_slbmiss) LSU0 L1 D cache load misses event:0X02F3 counters:3 um:zero minimum:1000 name:PM_LD_MISS_L1_LSU1_GRP47 : (Group 47 pm_L1_slbmiss) LSU1 L1 D cache load misses #Group 48 pm_dtlbref, Data TLB references event:0X0300 counters:0 um:zero minimum:1000 name:PM_DTLB_REF_4K_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 4K page event:0X0301 counters:1 um:zero minimum:1000 name:PM_DTLB_REF_64K_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 64K page event:0X0302 counters:2 um:zero minimum:1000 name:PM_DTLB_REF_16M_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 16M page event:0X0303 counters:3 um:zero minimum:1000 name:PM_DTLB_REF_16G_GRP48 : (Group 48 pm_dtlbref) Data TLB reference for 16G page #Group 49 pm_dtlbmiss, Data TLB misses event:0X0310 counters:0 um:zero minimum:1000 name:PM_DTLB_MISS_4K_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 4K page event:0X0311 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_64K_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 64K page event:0X0312 counters:2 um:zero minimum:1000 name:PM_DTLB_MISS_16M_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 16M page event:0X0313 counters:3 um:zero minimum:1000 name:PM_DTLB_MISS_16G_GRP49 : (Group 49 pm_dtlbmiss) Data TLB miss for 16G page #Group 50 pm_dtlb, Data TLB references and misses event:0X0320 counters:0 um:zero minimum:1000 name:PM_DTLB_REF_GRP50 : (Group 50 pm_dtlb) Data TLB references event:0X0321 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP50 : (Group 50 pm_dtlb) Data TLB misses event:0X0322 counters:2 um:zero minimum:10000 name:PM_CYC_GRP50 : (Group 50 pm_dtlb) Processor cycles event:0X0323 counters:3 um:zero minimum:10000 name:PM_CYC_GRP50 : (Group 50 pm_dtlb) Processor cycles #Group 51 pm_L1_refmiss, L1 load references and misses and store references and misses event:0X0330 counters:0 um:zero minimum:1000 name:PM_LD_REF_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache load references event:0X0331 counters:1 um:zero minimum:1000 name:PM_ST_REF_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache store references event:0X0332 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache load misses event:0X0333 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP51 : (Group 51 pm_L1_refmiss) L1 D cache store misses #Group 52 pm_dsource1, L3 cache and memory data access event:0X0340 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP52 : (Group 52 pm_dsource1) Data loaded from L3 event:0X0341 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP52 : (Group 52 pm_dsource1) Data loaded from local memory event:0X0342 counters:2 um:zero minimum:1000 name:PM_FLUSH_GRP52 : (Group 52 pm_dsource1) Flushes event:0X0343 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP52 : (Group 52 pm_dsource1) Internal operations completed #Group 53 pm_dsource2, L3 cache and memory data access event:0X0350 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP53 : (Group 53 pm_dsource2) Data loaded from L3 event:0X0351 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP53 : (Group 53 pm_dsource2) Data loaded from local memory event:0X0352 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L2MISS_GRP53 : (Group 53 pm_dsource2) Data loaded missed L2 event:0X0353 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP53 : (Group 53 pm_dsource2) Data loaded from remote memory #Group 54 pm_dsource_L2, L2 cache data access event:0X0360 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L25_SHR_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.5 shared event:0X0361 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L25_MOD_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.5 modified event:0X0362 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L275_SHR_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.75 shared event:0X0363 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L275_MOD_GRP54 : (Group 54 pm_dsource_L2) Data loaded from L2.75 modified #Group 55 pm_dsource_L3, L3 cache data access event:0X0370 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L35_SHR_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.5 shared event:0X0371 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_L35_MOD_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.5 modified event:0X0372 counters:2 um:zero minimum:1000 name:PM_DATA_FROM_L375_SHR_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.75 shared event:0X0373 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_L375_MOD_GRP55 : (Group 55 pm_dsource_L3) Data loaded from L3.75 modified #Group 56 pm_isource1, Instruction source information event:0X0380 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L3_GRP56 : (Group 56 pm_isource1) Instruction fetched from L3 event:0X0381 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP56 : (Group 56 pm_isource1) Instruction fetched from L1 event:0X0382 counters:2 um:zero minimum:1000 name:PM_INST_FROM_PREF_GRP56 : (Group 56 pm_isource1) Instruction fetched from prefetch event:0X0383 counters:3 um:zero minimum:1000 name:PM_INST_FROM_RMEM_GRP56 : (Group 56 pm_isource1) Instruction fetched from remote memory #Group 57 pm_isource2, Instruction source information event:0X0390 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L2_GRP57 : (Group 57 pm_isource2) Instruction fetched from L2 event:0X0391 counters:1 um:zero minimum:1000 name:PM_INST_FROM_LMEM_GRP57 : (Group 57 pm_isource2) Instruction fetched from local memory event:0X0392 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP57 : (Group 57 pm_isource2) Internal operations completed event:0X0393 counters:3 um:zero minimum:1000 name:PM_0INST_FETCH_GRP57 : (Group 57 pm_isource2) No instructions fetched #Group 58 pm_isource_L2, L2 instruction source information event:0X03A0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L25_SHR_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.5 shared event:0X03A1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L25_MOD_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.5 modified event:0X03A2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L275_SHR_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.75 shared event:0X03A3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L275_MOD_GRP58 : (Group 58 pm_isource_L2) Instruction fetched from L2.75 modified #Group 59 pm_isource_L3, L3 instruction source information event:0X03B0 counters:0 um:zero minimum:1000 name:PM_INST_FROM_L35_SHR_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.5 shared event:0X03B1 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L35_MOD_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.5 modified event:0X03B2 counters:2 um:zero minimum:1000 name:PM_INST_FROM_L375_SHR_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.75 shared event:0X03B3 counters:3 um:zero minimum:1000 name:PM_INST_FROM_L375_MOD_GRP59 : (Group 59 pm_isource_L3) Instruction fetched from L3.75 modified #Group 60 pm_pteg_source1, PTEG source information event:0X03C0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L25_SHR_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.5 shared event:0X03C1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L25_MOD_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.5 modified event:0X03C2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L275_SHR_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.75 shared event:0X03C3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L275_MOD_GRP60 : (Group 60 pm_pteg_source1) PTEG loaded from L2.75 modified #Group 61 pm_pteg_source2, PTEG source information event:0X03D0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L35_SHR_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.5 shared event:0X03D1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_L35_MOD_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.5 modified event:0X03D2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L375_SHR_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.75 shared event:0X03D3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_L375_MOD_GRP61 : (Group 61 pm_pteg_source2) PTEG loaded from L3.75 modified #Group 62 pm_pteg_source3, PTEG source information event:0X03E0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L2_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from L2 event:0X03E1 counters:1 um:zero minimum:1000 name:PM_PTEG_FROM_LMEM_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from local memory event:0X03E2 counters:2 um:zero minimum:1000 name:PM_PTEG_FROM_L2MISS_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from L2 miss event:0X03E3 counters:3 um:zero minimum:1000 name:PM_PTEG_FROM_RMEM_GRP62 : (Group 62 pm_pteg_source3) PTEG loaded from remote memory #Group 63 pm_pteg_source4, L3 PTEG and group disptach events event:0X03F0 counters:0 um:zero minimum:1000 name:PM_PTEG_FROM_L3_GRP63 : (Group 63 pm_pteg_source4) PTEG loaded from L3 event:0X03F1 counters:1 um:zero minimum:1000 name:PM_GRP_DISP_GRP63 : (Group 63 pm_pteg_source4) Group dispatches event:0X03F2 counters:2 um:zero minimum:1000 name:PM_GRP_DISP_SUCCESS_GRP63 : (Group 63 pm_pteg_source4) Group dispatch success event:0X03F3 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP63 : (Group 63 pm_pteg_source4) L1 D cache entries invalidated from L2 #Group 64 pm_L2SA_ld, L2 slice A load events event:0X0400 counters:0 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_GRP64 : (Group 64 pm_L2SA_ld) L2 slice A RC load dispatch attempt event:0X0401 counters:1 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_RC_FULL_GRP64 : (Group 64 pm_L2SA_ld) L2 slice A RC load dispatch attempt failed due to all RC full event:0X0402 counters:2 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_ADDR_GRP64 : (Group 64 pm_L2SA_ld) L2 slice A RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0403 counters:3 um:zero minimum:1000 name:PM_L2SA_RCLD_DISP_FAIL_OTHER_GRP64 : (Group 64 pm_L2SA_ld) L2 slice A RC load dispatch attempt failed due to other reasons #Group 65 pm_L2SA_st, L2 slice A store events event:0X0410 counters:0 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_GRP65 : (Group 65 pm_L2SA_st) L2 slice A RC store dispatch attempt event:0X0411 counters:1 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_RC_FULL_GRP65 : (Group 65 pm_L2SA_st) L2 slice A RC store dispatch attempt failed due to all RC full event:0X0412 counters:2 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_ADDR_GRP65 : (Group 65 pm_L2SA_st) L2 slice A RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0413 counters:3 um:zero minimum:1000 name:PM_L2SA_RCST_DISP_FAIL_OTHER_GRP65 : (Group 65 pm_L2SA_st) L2 slice A RC store dispatch attempt failed due to other reasons #Group 66 pm_L2SA_st2, L2 slice A store events event:0X0420 counters:0 um:zero minimum:1000 name:PM_L2SA_RC_DISP_FAIL_CO_BUSY_GRP66 : (Group 66 pm_L2SA_st2) L2 slice A RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X0421 counters:1 um:zero minimum:1000 name:PM_L2SA_ST_REQ_GRP66 : (Group 66 pm_L2SA_st2) L2 slice A store requests event:0X0422 counters:2 um:zero minimum:1000 name:PM_L2SA_RC_DISP_FAIL_CO_BUSY_ALL_GRP66 : (Group 66 pm_L2SA_st2) L2 slice A RC dispatch attempt failed due to all CO busy event:0X0423 counters:3 um:zero minimum:1000 name:PM_L2SA_ST_HIT_GRP66 : (Group 66 pm_L2SA_st2) L2 slice A store hits #Group 67 pm_L2SB_ld, L2 slice B load events event:0X0430 counters:0 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_GRP67 : (Group 67 pm_L2SB_ld) L2 slice B RC load dispatch attempt event:0X0431 counters:1 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_RC_FULL_GRP67 : (Group 67 pm_L2SB_ld) L2 slice B RC load dispatch attempt failed due to all RC full event:0X0432 counters:2 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_ADDR_GRP67 : (Group 67 pm_L2SB_ld) L2 slice B RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0433 counters:3 um:zero minimum:1000 name:PM_L2SB_RCLD_DISP_FAIL_OTHER_GRP67 : (Group 67 pm_L2SB_ld) L2 slice B RC load dispatch attempt failed due to other reasons #Group 68 pm_L2SB_st, L2 slice B store events event:0X0440 counters:0 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_GRP68 : (Group 68 pm_L2SB_st) L2 slice B RC store dispatch attempt event:0X0441 counters:1 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_RC_FULL_GRP68 : (Group 68 pm_L2SB_st) L2 slice B RC store dispatch attempt failed due to all RC full event:0X0442 counters:2 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_ADDR_GRP68 : (Group 68 pm_L2SB_st) L2 slice B RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0443 counters:3 um:zero minimum:1000 name:PM_L2SB_RCST_DISP_FAIL_OTHER_GRP68 : (Group 68 pm_L2SB_st) L2 slice B RC store dispatch attempt failed due to other reasons #Group 69 pm_L2SB_st2, L2 slice B store events event:0X0450 counters:0 um:zero minimum:1000 name:PM_L2SB_RC_DISP_FAIL_CO_BUSY_GRP69 : (Group 69 pm_L2SB_st2) L2 slice B RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X0451 counters:1 um:zero minimum:1000 name:PM_L2SB_ST_REQ_GRP69 : (Group 69 pm_L2SB_st2) L2 slice B store requests event:0X0452 counters:2 um:zero minimum:1000 name:PM_L2SB_RC_DISP_FAIL_CO_BUSY_ALL_GRP69 : (Group 69 pm_L2SB_st2) L2 slice B RC dispatch attempt failed due to all CO busy event:0X0453 counters:3 um:zero minimum:1000 name:PM_L2SB_ST_HIT_GRP69 : (Group 69 pm_L2SB_st2) L2 slice B store hits #Group 70 pm_L2SC_ld, L2 slice C load events event:0X0460 counters:0 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_GRP70 : (Group 70 pm_L2SC_ld) L2 slice C RC load dispatch attempt event:0X0461 counters:1 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_RC_FULL_GRP70 : (Group 70 pm_L2SC_ld) L2 slice C RC load dispatch attempt failed due to all RC full event:0X0462 counters:2 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_ADDR_GRP70 : (Group 70 pm_L2SC_ld) L2 slice C RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0463 counters:3 um:zero minimum:1000 name:PM_L2SC_RCLD_DISP_FAIL_OTHER_GRP70 : (Group 70 pm_L2SC_ld) L2 slice C RC load dispatch attempt failed due to other reasons #Group 71 pm_L2SC_st, L2 slice C store events event:0X0470 counters:0 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_GRP71 : (Group 71 pm_L2SC_st) L2 slice C RC store dispatch attempt event:0X0471 counters:1 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_RC_FULL_GRP71 : (Group 71 pm_L2SC_st) L2 slice C RC store dispatch attempt failed due to all RC full event:0X0472 counters:2 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_ADDR_GRP71 : (Group 71 pm_L2SC_st) L2 slice C RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ event:0X0473 counters:3 um:zero minimum:1000 name:PM_L2SC_RCST_DISP_FAIL_OTHER_GRP71 : (Group 71 pm_L2SC_st) L2 slice C RC store dispatch attempt failed due to other reasons #Group 72 pm_L2SC_st2, L2 slice C store events event:0X0480 counters:0 um:zero minimum:1000 name:PM_L2SC_RC_DISP_FAIL_CO_BUSY_GRP72 : (Group 72 pm_L2SC_st2) L2 slice C RC dispatch attempt failed due to RC/CO pair chosen was miss and CO already busy event:0X0481 counters:1 um:zero minimum:1000 name:PM_L2SC_ST_REQ_GRP72 : (Group 72 pm_L2SC_st2) L2 slice C store requests event:0X0482 counters:2 um:zero minimum:1000 name:PM_L2SC_RC_DISP_FAIL_CO_BUSY_ALL_GRP72 : (Group 72 pm_L2SC_st2) L2 slice C RC dispatch attempt failed due to all CO busy event:0X0483 counters:3 um:zero minimum:1000 name:PM_L2SC_ST_HIT_GRP72 : (Group 72 pm_L2SC_st2) L2 slice C store hits #Group 73 pm_L3SA_trans, L3 slice A state transistions event:0X0490 counters:0 um:zero minimum:1000 name:PM_L3SA_MOD_TAG_GRP73 : (Group 73 pm_L3SA_trans) L3 slice A transition from modified to TAG event:0X0491 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP73 : (Group 73 pm_L3SA_trans) Internal operations completed event:0X0492 counters:2 um:zero minimum:1000 name:PM_L3SA_MOD_INV_GRP73 : (Group 73 pm_L3SA_trans) L3 slice A transition from modified to invalid event:0X0493 counters:3 um:zero minimum:1000 name:PM_L3SA_SHR_INV_GRP73 : (Group 73 pm_L3SA_trans) L3 slice A transition from shared to invalid #Group 74 pm_L3SB_trans, L3 slice B state transistions event:0X04A0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP74 : (Group 74 pm_L3SB_trans) Internal operations completed event:0X04A1 counters:1 um:zero minimum:1000 name:PM_L3SB_MOD_TAG_GRP74 : (Group 74 pm_L3SB_trans) L3 slice B transition from modified to TAG event:0X04A2 counters:2 um:zero minimum:1000 name:PM_L3SB_MOD_INV_GRP74 : (Group 74 pm_L3SB_trans) L3 slice B transition from modified to invalid event:0X04A3 counters:3 um:zero minimum:1000 name:PM_L3SB_SHR_INV_GRP74 : (Group 74 pm_L3SB_trans) L3 slice B transition from shared to invalid #Group 75 pm_L3SC_trans, L3 slice C state transistions event:0X04B0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP75 : (Group 75 pm_L3SC_trans) Internal operations completed event:0X04B1 counters:1 um:zero minimum:1000 name:PM_L3SC_MOD_TAG_GRP75 : (Group 75 pm_L3SC_trans) L3 slice C transition from modified to TAG event:0X04B2 counters:2 um:zero minimum:1000 name:PM_L3SC_MOD_INV_GRP75 : (Group 75 pm_L3SC_trans) L3 slice C transition from modified to invalid event:0X04B3 counters:3 um:zero minimum:1000 name:PM_L3SC_SHR_INV_GRP75 : (Group 75 pm_L3SC_trans) L3 slice C transition from shared to invalid #Group 76 pm_L2SA_trans, L2 slice A state transistions event:0X04C0 counters:0 um:zero minimum:1000 name:PM_L2SA_MOD_TAG_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from modified to tagged event:0X04C1 counters:1 um:zero minimum:1000 name:PM_L2SA_SHR_MOD_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from shared to modified event:0X04C2 counters:2 um:zero minimum:1000 name:PM_L2SA_MOD_INV_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from modified to invalid event:0X04C3 counters:3 um:zero minimum:1000 name:PM_L2SA_SHR_INV_GRP76 : (Group 76 pm_L2SA_trans) L2 slice A transition from shared to invalid #Group 77 pm_L2SB_trans, L2 slice B state transistions event:0X04D0 counters:0 um:zero minimum:1000 name:PM_L2SB_MOD_TAG_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from modified to tagged event:0X04D1 counters:1 um:zero minimum:1000 name:PM_L2SB_SHR_MOD_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from shared to modified event:0X04D2 counters:2 um:zero minimum:1000 name:PM_L2SB_MOD_INV_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from modified to invalid event:0X04D3 counters:3 um:zero minimum:1000 name:PM_L2SB_SHR_INV_GRP77 : (Group 77 pm_L2SB_trans) L2 slice B transition from shared to invalid #Group 78 pm_L2SC_trans, L2 slice C state transistions event:0X04E0 counters:0 um:zero minimum:1000 name:PM_L2SC_MOD_TAG_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from modified to tagged event:0X04E1 counters:1 um:zero minimum:1000 name:PM_L2SC_SHR_MOD_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from shared to modified event:0X04E2 counters:2 um:zero minimum:1000 name:PM_L2SC_MOD_INV_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from modified to invalid event:0X04E3 counters:3 um:zero minimum:1000 name:PM_L2SC_SHR_INV_GRP78 : (Group 78 pm_L2SC_trans) L2 slice C transition from shared to invalid #Group 79 pm_L3SAB_retry, L3 slice A/B snoop retry and all CI/CO busy event:0X04F0 counters:0 um:zero minimum:1000 name:PM_L3SA_ALL_BUSY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice A active for every cycle all CI/CO machines busy event:0X04F1 counters:1 um:zero minimum:1000 name:PM_L3SB_ALL_BUSY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice B active for every cycle all CI/CO machines busy event:0X04F2 counters:2 um:zero minimum:1000 name:PM_L3SA_SNOOP_RETRY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice A snoop retries event:0X04F3 counters:3 um:zero minimum:1000 name:PM_L3SB_SNOOP_RETRY_GRP79 : (Group 79 pm_L3SAB_retry) L3 slice B snoop retries #Group 80 pm_L3SAB_hit, L3 slice A/B hit and reference event:0X0500 counters:0 um:zero minimum:1000 name:PM_L3SA_REF_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice A references event:0X0501 counters:1 um:zero minimum:1000 name:PM_L3SB_REF_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice B references event:0X0502 counters:2 um:zero minimum:1000 name:PM_L3SA_HIT_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice A hits event:0X0503 counters:3 um:zero minimum:1000 name:PM_L3SB_HIT_GRP80 : (Group 80 pm_L3SAB_hit) L3 slice B hits #Group 81 pm_L3SC_retry_hit, L3 slice C hit & snoop retry event:0X0510 counters:0 um:zero minimum:1000 name:PM_L3SC_ALL_BUSY_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C active for every cycle all CI/CO machines busy event:0X0511 counters:1 um:zero minimum:1000 name:PM_L3SC_REF_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C references event:0X0512 counters:2 um:zero minimum:1000 name:PM_L3SC_SNOOP_RETRY_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C snoop retries event:0X0513 counters:3 um:zero minimum:1000 name:PM_L3SC_HIT_GRP81 : (Group 81 pm_L3SC_retry_hit) L3 slice C hits #Group 82 pm_fpu1, Floating Point events event:0X0520 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP82 : (Group 82 pm_fpu1) FPU executed FDIV instruction event:0X0521 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP82 : (Group 82 pm_fpu1) FPU executed multiply-add instruction event:0X0522 counters:2 um:zero minimum:1000 name:PM_FPU_FMOV_FEST_GRP82 : (Group 82 pm_fpu1) FPU executed FMOV or FEST instructions event:0X0523 counters:3 um:zero minimum:1000 name:PM_FPU_FEST_GRP82 : (Group 82 pm_fpu1) FPU executed FEST instruction #Group 83 pm_fpu2, Floating Point events event:0X0530 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP83 : (Group 83 pm_fpu2) FPU executed one flop instruction event:0X0531 counters:1 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP83 : (Group 83 pm_fpu2) FPU executed FSQRT instruction event:0X0532 counters:2 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP83 : (Group 83 pm_fpu2) FPU executed FRSP or FCONV instructions event:0X0533 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP83 : (Group 83 pm_fpu2) FPU produced a result #Group 84 pm_fpu3, Floating point events event:0X0540 counters:0 um:zero minimum:1000 name:PM_FPU_DENORM_GRP84 : (Group 84 pm_fpu3) FPU received denormalized data event:0X0541 counters:1 um:zero minimum:1000 name:PM_FPU_STALL3_GRP84 : (Group 84 pm_fpu3) FPU stalled in pipe3 event:0X0542 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP84 : (Group 84 pm_fpu3) FPU0 produced a result event:0X0543 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP84 : (Group 84 pm_fpu3) FPU1 produced a result #Group 85 pm_fpu4, Floating point events event:0X0550 counters:0 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP85 : (Group 85 pm_fpu4) FPU executed single precision instruction event:0X0551 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP85 : (Group 85 pm_fpu4) FPU executed store instruction event:0X0552 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP85 : (Group 85 pm_fpu4) Internal operations completed event:0X0553 counters:3 um:zero minimum:1000 name:PM_LSU_LDF_GRP85 : (Group 85 pm_fpu4) LSU executed Floating Point load instruction #Group 86 pm_fpu5, Floating point events by unit event:0X0560 counters:0 um:zero minimum:1000 name:PM_FPU0_FSQRT_GRP86 : (Group 86 pm_fpu5) FPU0 executed FSQRT instruction event:0X0561 counters:1 um:zero minimum:1000 name:PM_FPU1_FSQRT_GRP86 : (Group 86 pm_fpu5) FPU1 executed FSQRT instruction event:0X0562 counters:2 um:zero minimum:1000 name:PM_FPU0_FEST_GRP86 : (Group 86 pm_fpu5) FPU0 executed FEST instruction event:0X0563 counters:3 um:zero minimum:1000 name:PM_FPU1_FEST_GRP86 : (Group 86 pm_fpu5) FPU1 executed FEST instruction #Group 87 pm_fpu6, Floating point events by unit event:0X0570 counters:0 um:zero minimum:1000 name:PM_FPU0_DENORM_GRP87 : (Group 87 pm_fpu6) FPU0 received denormalized data event:0X0571 counters:1 um:zero minimum:1000 name:PM_FPU1_DENORM_GRP87 : (Group 87 pm_fpu6) FPU1 received denormalized data event:0X0572 counters:2 um:zero minimum:1000 name:PM_FPU0_FMOV_FEST_GRP87 : (Group 87 pm_fpu6) FPU0 executed FMOV or FEST instructions event:0X0573 counters:3 um:zero minimum:1000 name:PM_FPU1_FMOV_FEST_GRP87 : (Group 87 pm_fpu6) FPU1 executed FMOV or FEST instructions #Group 88 pm_fpu7, Floating point events by unit event:0X0580 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP88 : (Group 88 pm_fpu7) FPU0 executed FDIV instruction event:0X0581 counters:1 um:zero minimum:1000 name:PM_FPU1_FDIV_GRP88 : (Group 88 pm_fpu7) FPU1 executed FDIV instruction event:0X0582 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP88 : (Group 88 pm_fpu7) FPU0 executed FRSP or FCONV instructions event:0X0583 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP88 : (Group 88 pm_fpu7) FPU1 executed FRSP or FCONV instructions #Group 89 pm_fpu8, Floating point events by unit event:0X0590 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP89 : (Group 89 pm_fpu8) FPU0 stalled in pipe3 event:0X0591 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP89 : (Group 89 pm_fpu8) FPU1 stalled in pipe3 event:0X0592 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP89 : (Group 89 pm_fpu8) Internal operations completed event:0X0593 counters:3 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP89 : (Group 89 pm_fpu8) FPU0 executed FPSCR instruction #Group 90 pm_fpu9, Floating point events by unit event:0X05A0 counters:0 um:zero minimum:1000 name:PM_FPU0_SINGLE_GRP90 : (Group 90 pm_fpu9) FPU0 executed single precision instruction event:0X05A1 counters:1 um:zero minimum:1000 name:PM_FPU1_SINGLE_GRP90 : (Group 90 pm_fpu9) FPU1 executed single precision instruction event:0X05A2 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP90 : (Group 90 pm_fpu9) LSU0 executed Floating Point load instruction event:0X05A3 counters:3 um:zero minimum:1000 name:PM_LSU1_LDF_GRP90 : (Group 90 pm_fpu9) LSU1 executed Floating Point load instruction #Group 91 pm_fpu10, Floating point events by unit event:0X05B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FMA_GRP91 : (Group 91 pm_fpu10) FPU0 executed multiply-add instruction event:0X05B1 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP91 : (Group 91 pm_fpu10) FPU1 executed multiply-add instruction event:0X05B2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP91 : (Group 91 pm_fpu10) Internal operations completed event:0X05B3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP91 : (Group 91 pm_fpu10) FPU1 executed FRSP or FCONV instructions #Group 92 pm_fpu11, Floating point events by unit event:0X05C0 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP92 : (Group 92 pm_fpu11) FPU0 executed add, mult, sub, cmp or sel instruction event:0X05C1 counters:1 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP92 : (Group 92 pm_fpu11) FPU1 executed add, mult, sub, cmp or sel instruction event:0X05C2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP92 : (Group 92 pm_fpu11) FPU0 produced a result event:0X05C3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP92 : (Group 92 pm_fpu11) Internal operations completed #Group 93 pm_fpu12, Floating point events by unit event:0X05D0 counters:0 um:zero minimum:1000 name:PM_FPU0_STF_GRP93 : (Group 93 pm_fpu12) FPU0 executed store instruction event:0X05D1 counters:1 um:zero minimum:1000 name:PM_FPU1_STF_GRP93 : (Group 93 pm_fpu12) FPU1 executed store instruction event:0X05D2 counters:2 um:zero minimum:1000 name:PM_LSU0_LDF_GRP93 : (Group 93 pm_fpu12) LSU0 executed Floating Point load instruction event:0X05D3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP93 : (Group 93 pm_fpu12) Internal operations completed #Group 94 pm_fxu1, Fixed Point events event:0X05E0 counters:0 um:zero minimum:1000 name:PM_FXU_IDLE_GRP94 : (Group 94 pm_fxu1) FXU idle event:0X05E1 counters:1 um:zero minimum:1000 name:PM_FXU_BUSY_GRP94 : (Group 94 pm_fxu1) FXU busy event:0X05E2 counters:2 um:zero minimum:1000 name:PM_FXU0_BUSY_FXU1_IDLE_GRP94 : (Group 94 pm_fxu1) FXU0 busy FXU1 idle event:0X05E3 counters:3 um:zero minimum:1000 name:PM_FXU1_BUSY_FXU0_IDLE_GRP94 : (Group 94 pm_fxu1) FXU1 busy FXU0 idle #Group 95 pm_fxu2, Fixed Point events event:0X05F0 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP95 : (Group 95 pm_fxu2) Marked group dispatched event:0X05F1 counters:1 um:zero minimum:1000 name:PM_MRK_GRP_BR_REDIR_GRP95 : (Group 95 pm_fxu2) Group experienced marked branch redirect event:0X05F2 counters:2 um:zero minimum:1000 name:PM_FXU_FIN_GRP95 : (Group 95 pm_fxu2) FXU produced a result event:0X05F3 counters:3 um:zero minimum:1000 name:PM_FXLS_FULL_CYC_GRP95 : (Group 95 pm_fxu2) Cycles FXLS queue is full #Group 96 pm_fxu3, Fixed Point events event:0X0600 counters:0 um:zero minimum:1000 name:PM_3INST_CLB_CYC_GRP96 : (Group 96 pm_fxu3) Cycles 3 instructions in CLB event:0X0601 counters:1 um:zero minimum:1000 name:PM_4INST_CLB_CYC_GRP96 : (Group 96 pm_fxu3) Cycles 4 instructions in CLB event:0X0602 counters:2 um:zero minimum:1000 name:PM_FXU0_FIN_GRP96 : (Group 96 pm_fxu3) FXU0 produced a result event:0X0603 counters:3 um:zero minimum:1000 name:PM_FXU1_FIN_GRP96 : (Group 96 pm_fxu3) FXU1 produced a result #Group 97 pm_smt_priorities1, Thread priority events event:0X0610 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_4_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles thread running at priority level 4 event:0X0611 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_7_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles thread running at priority level 7 event:0X0612 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_0_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles no thread priority difference event:0X0613 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_1or2_CYC_GRP97 : (Group 97 pm_smt_priorities1) Cycles thread priority difference is 1 or 2 #Group 98 pm_smt_priorities2, Thread priority events event:0X0620 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_3_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread running at priority level 3 event:0X0621 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_6_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread running at priority level 6 event:0X0622 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_3or4_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread priority difference is 3 or 4 event:0X0623 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_5or6_CYC_GRP98 : (Group 98 pm_smt_priorities2) Cycles thread priority difference is 5 or 6 #Group 99 pm_smt_priorities3, Thread priority events event:0X0630 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_2_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread running at priority level 2 event:0X0631 counters:1 um:zero minimum:1000 name:PM_THRD_PRIO_5_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread running at priority level 5 event:0X0632 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus1or2_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread priority difference is -1 or -2 event:0X0633 counters:3 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus3or4_CYC_GRP99 : (Group 99 pm_smt_priorities3) Cycles thread priority difference is -3 or -4 #Group 100 pm_smt_priorities4, Thread priority events event:0X0640 counters:0 um:zero minimum:1000 name:PM_THRD_PRIO_1_CYC_GRP100 : (Group 100 pm_smt_priorities4) Cycles thread running at priority level 1 event:0X0641 counters:1 um:zero minimum:1000 name:PM_HV_CYC_GRP100 : (Group 100 pm_smt_priorities4) Hypervisor Cycles event:0X0642 counters:2 um:zero minimum:1000 name:PM_THRD_PRIO_DIFF_minus5or6_CYC_GRP100 : (Group 100 pm_smt_priorities4) Cycles thread priority difference is -5 or -6 event:0X0643 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP100 : (Group 100 pm_smt_priorities4) Internal operations completed #Group 101 pm_smt_both, Thread common events event:0X0650 counters:0 um:zero minimum:1000 name:PM_THRD_ONE_RUN_CYC_GRP101 : (Group 101 pm_smt_both) One of the threads in run cycles event:0X0651 counters:1 um:zero minimum:1000 name:PM_THRD_GRP_CMPL_BOTH_CYC_GRP101 : (Group 101 pm_smt_both) Cycles group completed by both threads event:0X0652 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP101 : (Group 101 pm_smt_both) Internal operations completed event:0X0653 counters:3 um:zero minimum:1000 name:PM_THRD_L2MISS_BOTH_CYC_GRP101 : (Group 101 pm_smt_both) Cycles both threads in L2 misses #Group 102 pm_smt_selection, Thread selection event:0X0660 counters:0 um:zero minimum:1000 name:PM_SNOOP_TLBIE_GRP102 : (Group 102 pm_smt_selection) Snoop TLBIE event:0X0661 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP102 : (Group 102 pm_smt_selection) Internal operations completed event:0X0662 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_T0_GRP102 : (Group 102 pm_smt_selection) Decode selected thread 0 event:0X0663 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_T1_GRP102 : (Group 102 pm_smt_selection) Decode selected thread 1 #Group 103 pm_smt_selectover1, Thread selection overide event:0X0670 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP103 : (Group 103 pm_smt_selectover1) Internal operations completed event:0X0671 counters:1 um:zero minimum:1000 name:PM_0INST_CLB_CYC_GRP103 : (Group 103 pm_smt_selectover1) Cycles no instructions in CLB event:0X0672 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_OVER_CLB_EMPTY_GRP103 : (Group 103 pm_smt_selectover1) Thread selection overrides caused by CLB empty event:0X0673 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_OVER_GCT_IMBAL_GRP103 : (Group 103 pm_smt_selectover1) Thread selection overrides caused by GCT imbalance #Group 104 pm_smt_selectover2, Thread selection overide event:0X0680 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP104 : (Group 104 pm_smt_selectover2) Internal operations completed event:0X0681 counters:1 um:zero minimum:10000 name:PM_CYC_GRP104 : (Group 104 pm_smt_selectover2) Processor cycles event:0X0682 counters:2 um:zero minimum:1000 name:PM_THRD_SEL_OVER_ISU_HOLD_GRP104 : (Group 104 pm_smt_selectover2) Thread selection overrides caused by ISU holds event:0X0683 counters:3 um:zero minimum:1000 name:PM_THRD_SEL_OVER_L2MISS_GRP104 : (Group 104 pm_smt_selectover2) Thread selection overrides caused by L2 misses #Group 105 pm_fabric1, Fabric events event:0X0690 counters:0 um:zero minimum:1000 name:PM_FAB_CMD_ISSUED_GRP105 : (Group 105 pm_fabric1) Fabric command issued event:0X0691 counters:1 um:zero minimum:1000 name:PM_FAB_DCLAIM_ISSUED_GRP105 : (Group 105 pm_fabric1) dclaim issued event:0X0692 counters:2 um:zero minimum:1000 name:PM_FAB_CMD_RETRIED_GRP105 : (Group 105 pm_fabric1) Fabric command retried event:0X0693 counters:3 um:zero minimum:1000 name:PM_FAB_DCLAIM_RETRIED_GRP105 : (Group 105 pm_fabric1) dclaim retried #Group 106 pm_fabric2, Fabric data movement event:0X06A0 counters:0 um:zero minimum:1000 name:PM_FAB_P1toM1_SIDECAR_EMPTY_GRP106 : (Group 106 pm_fabric2) P1 to M1 sidecar empty event:0X06A1 counters:1 um:zero minimum:1000 name:PM_FAB_HOLDtoVN_EMPTY_GRP106 : (Group 106 pm_fabric2) Hold buffer to VN empty event:0X06A2 counters:2 um:zero minimum:1000 name:PM_FAB_P1toVNorNN_SIDECAR_EMPTY_GRP106 : (Group 106 pm_fabric2) P1 to VN/NN sidecar empty event:0X06A3 counters:3 um:zero minimum:1000 name:PM_FAB_VBYPASS_EMPTY_GRP106 : (Group 106 pm_fabric2) Vertical bypass buffer empty #Group 107 pm_fabric3, Fabric data movement event:0X06B0 counters:0 um:zero minimum:1000 name:PM_FAB_PNtoNN_DIRECT_GRP107 : (Group 107 pm_fabric3) PN to NN beat went straight to its destination event:0X06B1 counters:1 um:zero minimum:1000 name:PM_FAB_PNtoVN_DIRECT_GRP107 : (Group 107 pm_fabric3) PN to VN beat went straight to its destination event:0X06B2 counters:2 um:zero minimum:1000 name:PM_FAB_PNtoNN_SIDECAR_GRP107 : (Group 107 pm_fabric3) PN to NN beat went to sidecar first event:0X06B3 counters:3 um:zero minimum:1000 name:PM_FAB_PNtoVN_SIDECAR_GRP107 : (Group 107 pm_fabric3) PN to VN beat went to sidecar first #Group 108 pm_fabric4, Fabric data movement event:0X06C0 counters:0 um:zero minimum:1000 name:PM_FAB_M1toP1_SIDECAR_EMPTY_GRP108 : (Group 108 pm_fabric4) M1 to P1 sidecar empty event:0X06C1 counters:1 um:zero minimum:1000 name:PM_FAB_HOLDtoNN_EMPTY_GRP108 : (Group 108 pm_fabric4) Hold buffer to NN empty event:0X06C2 counters:2 um:zero minimum:1000 name:PM_EE_OFF_GRP108 : (Group 108 pm_fabric4) Cycles MSR(EE) bit off event:0X06C3 counters:3 um:zero minimum:1000 name:PM_FAB_M1toVNorNN_SIDECAR_EMPTY_GRP108 : (Group 108 pm_fabric4) M1 to VN/NN sidecar empty #Group 109 pm_snoop1, Snoop retry event:0X06D0 counters:0 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop read retry due to read queue full event:0X06D1 counters:1 um:zero minimum:1000 name:PM_SNOOP_DCLAIM_RETRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop dclaim/flush retry due to write/dclaim queues full event:0X06D2 counters:2 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop read retry due to read queue full event:0X06D3 counters:3 um:zero minimum:1000 name:PM_SNOOP_PARTIAL_RTRY_QFULL_GRP109 : (Group 109 pm_snoop1) Snoop partial write retry due to partial-write queues full #Group 110 pm_snoop2, Snoop read retry event:0X06E0 counters:0 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_RQ_GRP110 : (Group 110 pm_snoop2) Snoop read retry due to collision with active read queue event:0X06E1 counters:1 um:zero minimum:1000 name:PM_SNOOP_RETRY_1AHEAD_GRP110 : (Group 110 pm_snoop2) Snoop retry due to one ahead collision event:0X06E2 counters:2 um:zero minimum:1000 name:PM_SNOOP_RD_RETRY_WQ_GRP110 : (Group 110 pm_snoop2) Snoop read retry due to collision with active write queue event:0X06E3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP110 : (Group 110 pm_snoop2) Internal operations completed #Group 111 pm_snoop3, Snoop write retry event:0X06F0 counters:0 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_RQ_GRP111 : (Group 111 pm_snoop3) Snoop write/dclaim retry due to collision with active read queue event:0X06F1 counters:1 um:zero minimum:1000 name:PM_MEM_HI_PRIO_WR_CMPL_GRP111 : (Group 111 pm_snoop3) High priority write completed event:0X06F2 counters:2 um:zero minimum:1000 name:PM_SNOOP_WR_RETRY_WQ_GRP111 : (Group 111 pm_snoop3) Snoop write/dclaim retry due to collision with active write queue event:0X06F3 counters:3 um:zero minimum:1000 name:PM_MEM_LO_PRIO_WR_CMPL_GRP111 : (Group 111 pm_snoop3) Low priority write completed #Group 112 pm_snoop4, Snoop partial write retry event:0X0700 counters:0 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_RQ_GRP112 : (Group 112 pm_snoop4) Snoop partial-write retry due to collision with active read queue event:0X0701 counters:1 um:zero minimum:1000 name:PM_MEM_RQ_DISP_Q16to19_GRP112 : (Group 112 pm_snoop4) Memory read queue dispatched to queues 16-19 event:0X0702 counters:2 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_WQ_PWQ_GRP112 : (Group 112 pm_snoop4) Snoop partial-write retry due to collision with active write or partial-write queue event:0X0703 counters:3 um:zero minimum:1000 name:PM_SNOOP_PW_RETRY_RQ_GRP112 : (Group 112 pm_snoop4) Snoop partial-write retry due to collision with active read queue #Group 113 pm_mem_rq, Memory read queue dispatch event:0X0710 counters:0 um:zero minimum:1000 name:PM_MEM_RQ_DISP_GRP113 : (Group 113 pm_mem_rq) Memory read queue dispatched event:0X0711 counters:1 um:zero minimum:1000 name:PM_MEM_SPEC_RD_CANCEL_GRP113 : (Group 113 pm_mem_rq) Speculative memory read cancelled event:0X0712 counters:2 um:zero minimum:1000 name:PM_MEM_NONSPEC_RD_CANCEL_GRP113 : (Group 113 pm_mem_rq) Non speculative memory read cancelled event:0X0713 counters:3 um:zero minimum:1000 name:PM_EE_OFF_EXT_INT_GRP113 : (Group 113 pm_mem_rq) Cycles MSR(EE) bit off and external interrupt pending #Group 114 pm_mem_read, Memory read complete and cancel event:0X0720 counters:0 um:zero minimum:1000 name:PM_MEM_RQ_DISP_Q0to3_GRP114 : (Group 114 pm_mem_read) Memory read queue dispatched to queues 0-3 event:0X0721 counters:1 um:zero minimum:1000 name:PM_MEM_RQ_DISP_Q8to11_GRP114 : (Group 114 pm_mem_read) Memory read queue dispatched to queues 8-11 event:0X0722 counters:2 um:zero minimum:1000 name:PM_MEM_RQ_DISP_Q4to7_GRP114 : (Group 114 pm_mem_read) Memory read queue dispatched to queues 4-7 event:0X0723 counters:3 um:zero minimum:1000 name:PM_EXT_INT_GRP114 : (Group 114 pm_mem_read) External interrupts #Group 115 pm_mem_wq, Memory write queue dispatch event:0X0730 counters:0 um:zero minimum:1000 name:PM_MEM_WQ_DISP_WRITE_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched due to write event:0X0731 counters:1 um:zero minimum:1000 name:PM_MEM_WQ_DISP_Q0to7_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched to queues 0-7 event:0X0732 counters:2 um:zero minimum:1000 name:PM_MEM_WQ_DISP_DCLAIM_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched due to dclaim/flush event:0X0733 counters:3 um:zero minimum:1000 name:PM_MEM_WQ_DISP_Q8to15_GRP115 : (Group 115 pm_mem_wq) Memory write queue dispatched to queues 8-15 #Group 116 pm_mem_pwq, Memory partial write queue event:0X0740 counters:0 um:zero minimum:1000 name:PM_MEM_PWQ_DISP_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write queue dispatched event:0X0741 counters:1 um:zero minimum:1000 name:PM_MEM_PW_CMPL_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write completed event:0X0742 counters:2 um:zero minimum:1000 name:PM_MEM_PW_GATH_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write gathered event:0X0743 counters:3 um:zero minimum:1000 name:PM_MEM_PWQ_DISP_Q2or3_GRP116 : (Group 116 pm_mem_pwq) Memory partial-write queue dispatched to Write Queue 2 or 3 #Group 117 pm_threshold, Thresholding event:0X0750 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP117 : (Group 117 pm_threshold) Marked group dispatched event:0X0751 counters:1 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP117 : (Group 117 pm_threshold) Marked IMR reloaded event:0X0752 counters:2 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP117 : (Group 117 pm_threshold) Threshold timeout event:0X0753 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP117 : (Group 117 pm_threshold) Marked instruction LSU processing finished #Group 118 pm_mrk_grp1, Marked group events event:0X0760 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP118 : (Group 118 pm_mrk_grp1) Marked group dispatched event:0X0761 counters:1 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP118 : (Group 118 pm_mrk_grp1) Marked L1 D cache store misses event:0X0762 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP118 : (Group 118 pm_mrk_grp1) Marked instruction finished event:0X0763 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP118 : (Group 118 pm_mrk_grp1) Marked group completed #Group 119 pm_mrk_grp2, Marked group events event:0X0770 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP119 : (Group 119 pm_mrk_grp2) Marked group issued event:0X0771 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP119 : (Group 119 pm_mrk_grp2) Marked instruction BRU processing finished event:0X0772 counters:2 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP119 : (Group 119 pm_mrk_grp2) Marked L1 reload data source valid event:0X0773 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_IC_MISS_GRP119 : (Group 119 pm_mrk_grp2) Group experienced marked I cache miss #Group 120 pm_mrk_dsource1, Marked data from event:0X0780 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP120 : (Group 120 pm_mrk_dsource1) Marked data loaded from L2 event:0X0781 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_CYC_GRP120 : (Group 120 pm_mrk_dsource1) Marked load latency from L2 event:0X0782 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP120 : (Group 120 pm_mrk_dsource1) Marked data loaded from L2.5 modified event:0X0783 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_CYC_GRP120 : (Group 120 pm_mrk_dsource1) Marked load latency from L2.5 modified #Group 121 pm_mrk_dsource2, Marked data from event:0X0790 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP121 : (Group 121 pm_mrk_dsource2) Marked data loaded from L2.5 shared event:0X0791 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_CYC_GRP121 : (Group 121 pm_mrk_dsource2) Marked load latency from L2.5 shared event:0X0792 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP121 : (Group 121 pm_mrk_dsource2) Internal operations completed event:0X0793 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP121 : (Group 121 pm_mrk_dsource2) FPU produced a result #Group 122 pm_mrk_dsource3, Marked data from event:0X07A0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP122 : (Group 122 pm_mrk_dsource3) Marked data loaded from L3 event:0X07A1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_CYC_GRP122 : (Group 122 pm_mrk_dsource3) Marked load latency from L3 event:0X07A2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_GRP122 : (Group 122 pm_mrk_dsource3) Marked data loaded from L3.5 modified event:0X07A3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP122 : (Group 122 pm_mrk_dsource3) Marked load latency from L3.5 modified #Group 123 pm_mrk_dsource4, Marked data from event:0X07B0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_GRP123 : (Group 123 pm_mrk_dsource4) Marked data loaded from remote memory event:0X07B1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP123 : (Group 123 pm_mrk_dsource4) Marked load latency from L2.75 shared event:0X07B2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_GRP123 : (Group 123 pm_mrk_dsource4) Marked data loaded from L2.75 shared event:0X07B3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_CYC_GRP123 : (Group 123 pm_mrk_dsource4) Marked load latency from remote memory #Group 124 pm_mrk_dsource5, Marked data from event:0X07C0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_GRP124 : (Group 124 pm_mrk_dsource5) Marked data loaded from L3.5 shared event:0X07C1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_CYC_GRP124 : (Group 124 pm_mrk_dsource5) Marked load latency from L3.5 shared event:0X07C2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_GRP124 : (Group 124 pm_mrk_dsource5) Marked data loaded from local memory event:0X07C3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_CYC_GRP124 : (Group 124 pm_mrk_dsource5) Marked load latency from local memory #Group 125 pm_mrk_dsource6, Marked data from event:0X07D0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP125 : (Group 125 pm_mrk_dsource6) Marked data loaded from L2.75 modified event:0X07D1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP125 : (Group 125 pm_mrk_dsource6) Marked load latency from L2.75 shared event:0X07D2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP125 : (Group 125 pm_mrk_dsource6) Internal operations completed event:0X07D3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_CYC_GRP125 : (Group 125 pm_mrk_dsource6) Marked load latency from L2.75 modified #Group 126 pm_mrk_dsource7, Marked data from event:0X07E0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_GRP126 : (Group 126 pm_mrk_dsource7) Marked data loaded from L3.75 modified event:0X07E1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_CYC_GRP126 : (Group 126 pm_mrk_dsource7) Marked load latency from L3.75 shared event:0X07E2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_GRP126 : (Group 126 pm_mrk_dsource7) Marked data loaded from L3.75 shared event:0X07E3 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_CYC_GRP126 : (Group 126 pm_mrk_dsource7) Marked load latency from L3.75 modified #Group 127 pm_mrk_dtlbref, Marked data TLB references event:0X07F0 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 4K page event:0X07F1 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_REF_64K_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 64K page event:0X07F2 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 16M page event:0X07F3 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16G_GRP127 : (Group 127 pm_mrk_dtlbref) Marked Data TLB reference for 16G page #Group 128 pm_mrk_dtlbmiss, Marked data TLB misses event:0X0800 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 4K page event:0X0801 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_64K_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 64K page event:0X0802 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16M_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 16M page event:0X0803 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16G_GRP128 : (Group 128 pm_mrk_dtlbmiss) Marked Data TLB misses for 16G page #Group 129 pm_mrk_dtlb_dslb, Marked data TLB references and misses and marked data SLB misses event:0X0810 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Marked Data TLB reference event:0X0811 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Marked Data TLB misses event:0X0812 counters:2 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Marked Data SLB misses event:0X0813 counters:3 um:zero minimum:10000 name:PM_CYC_GRP129 : (Group 129 pm_mrk_dtlb_dslb) Processor cycles #Group 130 pm_mrk_lbref, Marked TLB and SLB references event:0X0820 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP130 : (Group 130 pm_mrk_lbref) Marked Data TLB reference for 4K page event:0X0821 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP130 : (Group 130 pm_mrk_lbref) Internal operations completed event:0X0822 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP130 : (Group 130 pm_mrk_lbref) Marked Data TLB reference for 16M page event:0X0823 counters:3 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP130 : (Group 130 pm_mrk_lbref) Marked Data SLB misses #Group 131 pm_mrk_lsmiss, Marked load and store miss event:0X0830 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP131 : (Group 131 pm_mrk_lsmiss) Marked L1 D cache load misses event:0X0831 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP131 : (Group 131 pm_mrk_lsmiss) Internal operations completed event:0X0832 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP131 : (Group 131 pm_mrk_lsmiss) Marked store completed with intervention event:0X0833 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP131 : (Group 131 pm_mrk_lsmiss) Marked instruction CRU processing finished #Group 132 pm_mrk_ulsflush, Mark unaligned load and store flushes event:0X0840 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP132 : (Group 132 pm_mrk_ulsflush) Marked store instruction completed event:0X0841 counters:1 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP132 : (Group 132 pm_mrk_ulsflush) Marked L1 D cache store misses event:0X0842 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_UST_GRP132 : (Group 132 pm_mrk_ulsflush) Marked unaligned store flushes event:0X0843 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_ULD_GRP132 : (Group 132 pm_mrk_ulsflush) Marked unaligned load flushes #Group 133 pm_mrk_misc, Misc marked instructions event:0X0850 counters:0 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP133 : (Group 133 pm_mrk_misc) Marked STCX failed event:0X0851 counters:1 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP133 : (Group 133 pm_mrk_misc) Marked store sent to GPS event:0X0852 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP133 : (Group 133 pm_mrk_misc) Marked instruction FPU processing finished event:0X0853 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP133 : (Group 133 pm_mrk_misc) Marked group completion timeout #Group 134 pm_lsref_L1, Load/Store operations and L1 activity event:0X0860 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L2_GRP134 : (Group 134 pm_lsref_L1) Data loaded from L2 event:0X0861 counters:1 um:zero minimum:1000 name:PM_INST_FROM_L1_GRP134 : (Group 134 pm_lsref_L1) Instruction fetched from L1 event:0X0862 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP134 : (Group 134 pm_lsref_L1) L1 D cache store references event:0X0863 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP134 : (Group 134 pm_lsref_L1) L1 D cache load references #Group 135 pm_lsref_L2L3, Load/Store operations and L2, L3 activity event:0X0870 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP135 : (Group 135 pm_lsref_L2L3) Data loaded from L3 event:0X0871 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP135 : (Group 135 pm_lsref_L2L3) Data loaded from local memory event:0X0872 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP135 : (Group 135 pm_lsref_L2L3) L1 D cache store references event:0X0873 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP135 : (Group 135 pm_lsref_L2L3) L1 D cache load references #Group 136 pm_lsref_tlbmiss, Load/Store operations and TLB misses event:0X0880 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP136 : (Group 136 pm_lsref_tlbmiss) Instruction TLB misses event:0X0881 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP136 : (Group 136 pm_lsref_tlbmiss) Data TLB misses event:0X0882 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP136 : (Group 136 pm_lsref_tlbmiss) L1 D cache store references event:0X0883 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP136 : (Group 136 pm_lsref_tlbmiss) L1 D cache load references #Group 137 pm_Dmiss, Data cache misses event:0X0890 counters:0 um:zero minimum:1000 name:PM_DATA_FROM_L3_GRP137 : (Group 137 pm_Dmiss) Data loaded from L3 event:0X0891 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP137 : (Group 137 pm_Dmiss) Data loaded from local memory event:0X0892 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP137 : (Group 137 pm_Dmiss) L1 D cache load misses event:0X0893 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP137 : (Group 137 pm_Dmiss) L1 D cache store misses #Group 138 pm_prefetchX, Prefetch events event:0X08A0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP138 : (Group 138 pm_prefetchX) Processor cycles event:0X08A1 counters:1 um:zero minimum:1000 name:PM_IC_PREF_REQ_GRP138 : (Group 138 pm_prefetchX) Instruction prefetch requests event:0X08A2 counters:2 um:zero minimum:1000 name:PM_L1_PREF_GRP138 : (Group 138 pm_prefetchX) L1 cache data prefetches event:0X08A3 counters:3 um:zero minimum:1000 name:PM_L2_PREF_GRP138 : (Group 138 pm_prefetchX) L2 cache prefetches #Group 139 pm_branchX, Branch operations event:0X08B0 counters:0 um:zero minimum:1000 name:PM_BR_UNCOND_GRP139 : (Group 139 pm_branchX) Unconditional branch event:0X08B1 counters:1 um:zero minimum:1000 name:PM_BR_PRED_TA_GRP139 : (Group 139 pm_branchX) A conditional branch was predicted, target prediction event:0X08B2 counters:2 um:zero minimum:1000 name:PM_BR_PRED_CR_GRP139 : (Group 139 pm_branchX) A conditional branch was predicted, CR prediction event:0X08B3 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP139 : (Group 139 pm_branchX) Branches issued #Group 140 pm_fpuX1, Floating point events by unit event:0X08C0 counters:0 um:zero minimum:1000 name:PM_FPU0_STALL3_GRP140 : (Group 140 pm_fpuX1) FPU0 stalled in pipe3 event:0X08C1 counters:1 um:zero minimum:1000 name:PM_FPU1_STALL3_GRP140 : (Group 140 pm_fpuX1) FPU1 stalled in pipe3 event:0X08C2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP140 : (Group 140 pm_fpuX1) FPU0 produced a result event:0X08C3 counters:3 um:zero minimum:1000 name:PM_FPU0_FPSCR_GRP140 : (Group 140 pm_fpuX1) FPU0 executed FPSCR instruction #Group 141 pm_fpuX2, Floating point events by unit event:0X08D0 counters:0 um:zero minimum:1000 name:PM_FPU0_FMA_GRP141 : (Group 141 pm_fpuX2) FPU0 executed multiply-add instruction event:0X08D1 counters:1 um:zero minimum:1000 name:PM_FPU1_FMA_GRP141 : (Group 141 pm_fpuX2) FPU1 executed multiply-add instruction event:0X08D2 counters:2 um:zero minimum:1000 name:PM_FPU0_FRSP_FCONV_GRP141 : (Group 141 pm_fpuX2) FPU0 executed FRSP or FCONV instructions event:0X08D3 counters:3 um:zero minimum:1000 name:PM_FPU1_FRSP_FCONV_GRP141 : (Group 141 pm_fpuX2) FPU1 executed FRSP or FCONV instructions #Group 142 pm_fpuX3, Floating point events by unit event:0X08E0 counters:0 um:zero minimum:1000 name:PM_FPU0_1FLOP_GRP142 : (Group 142 pm_fpuX3) FPU0 executed add, mult, sub, cmp or sel instruction event:0X08E1 counters:1 um:zero minimum:1000 name:PM_FPU1_1FLOP_GRP142 : (Group 142 pm_fpuX3) FPU1 executed add, mult, sub, cmp or sel instruction event:0X08E2 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP142 : (Group 142 pm_fpuX3) FPU0 produced a result event:0X08E3 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP142 : (Group 142 pm_fpuX3) FPU1 produced a result #Group 143 pm_fpuX4, Floating point and L1 events event:0X08F0 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP143 : (Group 143 pm_fpuX4) FPU executed one flop instruction event:0X08F1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP143 : (Group 143 pm_fpuX4) FPU executed multiply-add instruction event:0X08F2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP143 : (Group 143 pm_fpuX4) L1 D cache store references event:0X08F3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP143 : (Group 143 pm_fpuX4) L1 D cache load references #Group 144 pm_fpuX5, Floating point events event:0X0900 counters:0 um:zero minimum:1000 name:PM_FPU_SINGLE_GRP144 : (Group 144 pm_fpuX5) FPU executed single precision instruction event:0X0901 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP144 : (Group 144 pm_fpuX5) FPU executed store instruction event:0X0902 counters:2 um:zero minimum:1000 name:PM_FPU0_FIN_GRP144 : (Group 144 pm_fpuX5) FPU0 produced a result event:0X0903 counters:3 um:zero minimum:1000 name:PM_FPU1_FIN_GRP144 : (Group 144 pm_fpuX5) FPU1 produced a result #Group 145 pm_fpuX6, Floating point events event:0X0910 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP145 : (Group 145 pm_fpuX6) FPU executed FDIV instruction event:0X0911 counters:1 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP145 : (Group 145 pm_fpuX6) FPU executed FSQRT instruction event:0X0912 counters:2 um:zero minimum:1000 name:PM_FPU_FRSP_FCONV_GRP145 : (Group 145 pm_fpuX6) FPU executed FRSP or FCONV instructions event:0X0913 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP145 : (Group 145 pm_fpuX6) FPU produced a result #Group 146 pm_fpuX7, Floating point events event:0X0920 counters:0 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP146 : (Group 146 pm_fpuX7) FPU executed one flop instruction event:0X0921 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP146 : (Group 146 pm_fpuX7) FPU executed multiply-add instruction event:0X0922 counters:2 um:zero minimum:1000 name:PM_FPU_STF_GRP146 : (Group 146 pm_fpuX7) FPU executed store instruction event:0X0923 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP146 : (Group 146 pm_fpuX7) FPU produced a result #Group 147 pm_hpmcount8, HPM group for set 9 event:0X0930 counters:0 um:zero minimum:10000 name:PM_CYC_GRP147 : (Group 147 pm_hpmcount8) Processor cycles event:0X0931 counters:1 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP147 : (Group 147 pm_hpmcount8) Marked instruction FXU processing finished event:0X0932 counters:2 um:zero minimum:10000 name:PM_CYC_GRP147 : (Group 147 pm_hpmcount8) Processor cycles event:0X0933 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP147 : (Group 147 pm_hpmcount8) FPU produced a result #Group 148 pm_hpmcount2, HPM group for set 2 event:0X0940 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP148 : (Group 148 pm_hpmcount2) Instructions completed event:0X0941 counters:1 um:zero minimum:1000 name:PM_FPU_STF_GRP148 : (Group 148 pm_hpmcount2) FPU executed store instruction event:0X0942 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP148 : (Group 148 pm_hpmcount2) Instructions dispatched event:0X0943 counters:3 um:zero minimum:1000 name:PM_LSU_LDF_GRP148 : (Group 148 pm_hpmcount2) LSU executed Floating Point load instruction #Group 149 pm_hpmcount3, HPM group for set 3 event:0X0950 counters:0 um:zero minimum:10000 name:PM_CYC_GRP149 : (Group 149 pm_hpmcount3) Processor cycles event:0X0951 counters:1 um:zero minimum:1000 name:PM_INST_DISP_ATTEMPT_GRP149 : (Group 149 pm_hpmcount3) Instructions dispatch attempted event:0X0952 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP149 : (Group 149 pm_hpmcount3) L1 D cache load misses event:0X0953 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP149 : (Group 149 pm_hpmcount3) L1 D cache store misses #Group 150 pm_hpmcount4, HPM group for set 7 event:0X0960 counters:0 um:zero minimum:1000 name:PM_TLB_MISS_GRP150 : (Group 150 pm_hpmcount4) TLB misses event:0X0961 counters:1 um:zero minimum:10000 name:PM_CYC_GRP150 : (Group 150 pm_hpmcount4) Processor cycles event:0X0962 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP150 : (Group 150 pm_hpmcount4) L1 D cache store references event:0X0963 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP150 : (Group 150 pm_hpmcount4) L1 D cache load references #Group 151 pm_flop, Floating point operations event:0X0970 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP151 : (Group 151 pm_flop) FPU executed FDIV instruction event:0X0971 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP151 : (Group 151 pm_flop) FPU executed multiply-add instruction event:0X0972 counters:2 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP151 : (Group 151 pm_flop) FPU executed FSQRT instruction event:0X0973 counters:3 um:zero minimum:1000 name:PM_FPU_1FLOP_GRP151 : (Group 151 pm_flop) FPU executed one flop instruction #Group 152 pm_eprof1, Group for use with eprof event:0X0980 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP152 : (Group 152 pm_eprof1) Instructions completed event:0X0981 counters:1 um:zero minimum:10000 name:PM_CYC_GRP152 : (Group 152 pm_eprof1) Processor cycles event:0X0982 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP152 : (Group 152 pm_eprof1) L1 D cache load misses event:0X0983 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP152 : (Group 152 pm_eprof1) L1 D cache entries invalidated from L2 #Group 153 pm_eprof2, Group for use with eprof event:0X0990 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP153 : (Group 153 pm_eprof2) Instructions completed event:0X0991 counters:1 um:zero minimum:1000 name:PM_ST_REF_L1_GRP153 : (Group 153 pm_eprof2) L1 D cache store references event:0X0992 counters:2 um:zero minimum:1000 name:PM_INST_DISP_GRP153 : (Group 153 pm_eprof2) Instructions dispatched event:0X0993 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP153 : (Group 153 pm_eprof2) L1 D cache load references #Group 154 pm_flip, Group for flips event:0X09A0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP154 : (Group 154 pm_flip) Processor cycles event:0X09A1 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP154 : (Group 154 pm_flip) FPU executed multiply-add instruction event:0X09A2 counters:2 um:zero minimum:1000 name:PM_FPU_STF_GRP154 : (Group 154 pm_flip) FPU executed store instruction event:0X09A3 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP154 : (Group 154 pm_flip) FPU produced a result #Group 155 pm_hpmcount5, HPM group for set 5 event:0X09B0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP155 : (Group 155 pm_hpmcount5) Processor cycles event:0X09B1 counters:1 um:zero minimum:1000 name:PM_DTLB_MISS_GRP155 : (Group 155 pm_hpmcount5) Data TLB misses event:0X09B2 counters:2 um:zero minimum:1000 name:PM_LD_MISS_L1_GRP155 : (Group 155 pm_hpmcount5) L1 D cache load misses event:0X09B3 counters:3 um:zero minimum:1000 name:PM_LD_REF_L1_GRP155 : (Group 155 pm_hpmcount5) L1 D cache load references #Group 156 pm_hpmcount6, HPM group for set 6 event:0X09C0 counters:0 um:zero minimum:10000 name:PM_CYC_GRP156 : (Group 156 pm_hpmcount6) Processor cycles event:0X09C1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP156 : (Group 156 pm_hpmcount6) Instructions completed event:0X09C2 counters:2 um:zero minimum:1000 name:PM_ST_REF_L1_GRP156 : (Group 156 pm_hpmcount6) L1 D cache store references event:0X09C3 counters:3 um:zero minimum:1000 name:PM_ST_MISS_L1_GRP156 : (Group 156 pm_hpmcount6) L1 D cache store misses #Group 157 pm_hpmcount7, HPM group for set 8 event:0X09D0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP157 : (Group 157 pm_hpmcount7) Instructions completed event:0X09D1 counters:1 um:zero minimum:1000 name:PM_DATA_FROM_LMEM_GRP157 : (Group 157 pm_hpmcount7) Data loaded from local memory event:0X09D2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP157 : (Group 157 pm_hpmcount7) Processor cycles event:0X09D3 counters:3 um:zero minimum:1000 name:PM_DATA_FROM_RMEM_GRP157 : (Group 157 pm_hpmcount7) Data loaded from remote memory #Group 158 pm_ep_threshold, Thresholding event:0X09E0 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP158 : (Group 158 pm_ep_threshold) Marked group dispatched event:0X09E1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP158 : (Group 158 pm_ep_threshold) Instructions completed event:0X09E2 counters:2 um:zero minimum:1000 name:PM_THRESH_TIMEO_GRP158 : (Group 158 pm_ep_threshold) Threshold timeout event:0X09E3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP158 : (Group 158 pm_ep_threshold) Marked instruction LSU processing finished #Group 159 pm_ep_mrk_grp1, Marked group events event:0X09F0 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_DISP_GRP159 : (Group 159 pm_ep_mrk_grp1) Marked group dispatched event:0X09F1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP159 : (Group 159 pm_ep_mrk_grp1) Instructions completed event:0X09F2 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP159 : (Group 159 pm_ep_mrk_grp1) Marked instruction finished event:0X09F3 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP159 : (Group 159 pm_ep_mrk_grp1) Marked group completed #Group 160 pm_ep_mrk_grp2, Marked group events event:0X0A00 counters:0 um:zero minimum:1000 name:PM_MRK_GRP_ISSUED_GRP160 : (Group 160 pm_ep_mrk_grp2) Marked group issued event:0X0A01 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP160 : (Group 160 pm_ep_mrk_grp2) Instructions completed event:0X0A02 counters:2 um:zero minimum:1000 name:PM_MRK_L1_RELOAD_VALID_GRP160 : (Group 160 pm_ep_mrk_grp2) Marked L1 reload data source valid event:0X0A03 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_IC_MISS_GRP160 : (Group 160 pm_ep_mrk_grp2) Group experienced marked I cache miss #Group 161 pm_ep_mrk_dsource1, Marked data from event:0X0A10 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP161 : (Group 161 pm_ep_mrk_dsource1) Marked data loaded from L2 event:0X0A11 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP161 : (Group 161 pm_ep_mrk_dsource1) Instructions completed event:0X0A12 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP161 : (Group 161 pm_ep_mrk_dsource1) Marked data loaded from L2.5 modified event:0X0A13 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_CYC_GRP161 : (Group 161 pm_ep_mrk_dsource1) Marked load latency from L2.5 modified #Group 162 pm_ep_mrk_dsource2, Marked data from event:0X0A20 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_GRP162 : (Group 162 pm_ep_mrk_dsource2) Marked data loaded from L2.5 shared event:0X0A21 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP162 : (Group 162 pm_ep_mrk_dsource2) Instructions completed event:0X0A22 counters:2 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP162 : (Group 162 pm_ep_mrk_dsource2) Marked IMR reloaded event:0X0A23 counters:3 um:zero minimum:1000 name:PM_FPU_FIN_GRP162 : (Group 162 pm_ep_mrk_dsource2) FPU produced a result #Group 163 pm_ep_mrk_dsource3, Marked data from event:0X0A30 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP163 : (Group 163 pm_ep_mrk_dsource3) Instructions completed event:0X0A31 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_CYC_GRP163 : (Group 163 pm_ep_mrk_dsource3) Marked load latency from L3 event:0X0A32 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_GRP163 : (Group 163 pm_ep_mrk_dsource3) Marked data loaded from L3.5 modified event:0X0A33 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_MOD_CYC_GRP163 : (Group 163 pm_ep_mrk_dsource3) Marked load latency from L3.5 modified #Group 164 pm_ep_mrk_dsource4, Marked data from event:0X0A40 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP164 : (Group 164 pm_ep_mrk_dsource4) Instructions completed event:0X0A41 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP164 : (Group 164 pm_ep_mrk_dsource4) Marked load latency from L2.75 shared event:0X0A42 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_GRP164 : (Group 164 pm_ep_mrk_dsource4) Marked data loaded from L2.75 shared event:0X0A43 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_CYC_GRP164 : (Group 164 pm_ep_mrk_dsource4) Marked load latency from remote memory #Group 165 pm_ep_mrk_dsource5, Marked data from event:0X0A50 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_GRP165 : (Group 165 pm_ep_mrk_dsource5) Marked data loaded from L3.5 shared event:0X0A51 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP165 : (Group 165 pm_ep_mrk_dsource5) Instructions completed event:0X0A52 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_GRP165 : (Group 165 pm_ep_mrk_dsource5) Marked data loaded from local memory event:0X0A53 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_LMEM_CYC_GRP165 : (Group 165 pm_ep_mrk_dsource5) Marked load latency from local memory #Group 166 pm_ep_mrk_dsource6, Marked data from event:0X0A60 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP166 : (Group 166 pm_ep_mrk_dsource6) Instructions completed event:0X0A61 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_SHR_CYC_GRP166 : (Group 166 pm_ep_mrk_dsource6) Marked load latency from L2.75 shared event:0X0A62 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP166 : (Group 166 pm_ep_mrk_dsource6) Internal operations completed event:0X0A63 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_CYC_GRP166 : (Group 166 pm_ep_mrk_dsource6) Marked load latency from L2.75 modified #Group 167 pm_ep_mrk_dsource7, Marked data from event:0X0A70 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP167 : (Group 167 pm_ep_mrk_dsource7) Instructions completed event:0X0A71 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_CYC_GRP167 : (Group 167 pm_ep_mrk_dsource7) Marked load latency from L3.75 shared event:0X0A72 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_SHR_GRP167 : (Group 167 pm_ep_mrk_dsource7) Marked data loaded from L3.75 shared event:0X0A73 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_CYC_GRP167 : (Group 167 pm_ep_mrk_dsource7) Marked load latency from L3.75 modified #Group 168 pm_ep_mrk_lbmiss, Marked TLB and SLB misses event:0X0A80 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP168 : (Group 168 pm_ep_mrk_lbmiss) Instructions completed event:0X0A81 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_64K_GRP168 : (Group 168 pm_ep_mrk_lbmiss) Marked Data TLB misses for 64K page event:0X0A82 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16M_GRP168 : (Group 168 pm_ep_mrk_lbmiss) Marked Data TLB misses for 16M page event:0X0A83 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16G_GRP168 : (Group 168 pm_ep_mrk_lbmiss) Marked Data TLB misses for 16G page #Group 169 pm_ep_mrk_dtlbref, Marked data TLB references event:0X0A90 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP169 : (Group 169 pm_ep_mrk_dtlbref) Instructions completed event:0X0A91 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_REF_64K_GRP169 : (Group 169 pm_ep_mrk_dtlbref) Marked Data TLB reference for 64K page event:0X0A92 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP169 : (Group 169 pm_ep_mrk_dtlbref) Marked Data TLB reference for 16M page event:0X0A93 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16G_GRP169 : (Group 169 pm_ep_mrk_dtlbref) Marked Data TLB reference for 16G page #Group 170 pm_ep_mrk_dtlbmiss, Marked data TLB misses event:0X0AA0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP170 : (Group 170 pm_ep_mrk_dtlbmiss) Instructions completed event:0X0AA1 counters:1 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_64K_GRP170 : (Group 170 pm_ep_mrk_dtlbmiss) Marked Data TLB misses for 64K page event:0X0AA2 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16M_GRP170 : (Group 170 pm_ep_mrk_dtlbmiss) Marked Data TLB misses for 16M page event:0X0AA3 counters:3 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_16G_GRP170 : (Group 170 pm_ep_mrk_dtlbmiss) Marked Data TLB misses for 16G page #Group 171 pm_ep_mrk_lbref, Marked TLB and SLB references event:0X0AB0 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP171 : (Group 171 pm_ep_mrk_lbref) Marked Data TLB reference for 4K page event:0X0AB1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP171 : (Group 171 pm_ep_mrk_lbref) Instructions completed event:0X0AB2 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_16M_GRP171 : (Group 171 pm_ep_mrk_lbref) Marked Data TLB reference for 16M page event:0X0AB3 counters:3 um:zero minimum:1000 name:PM_MRK_DSLB_MISS_GRP171 : (Group 171 pm_ep_mrk_lbref) Marked Data SLB misses #Group 172 pm_ep_mrk_lsmiss, Marked load and store miss event:0X0AC0 counters:0 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_GRP172 : (Group 172 pm_ep_mrk_lsmiss) Marked L1 D cache load misses event:0X0AC1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP172 : (Group 172 pm_ep_mrk_lsmiss) Instructions completed event:0X0AC2 counters:2 um:zero minimum:1000 name:PM_MRK_ST_CMPL_INT_GRP172 : (Group 172 pm_ep_mrk_lsmiss) Marked store completed with intervention event:0X0AC3 counters:3 um:zero minimum:1000 name:PM_MRK_CRU_FIN_GRP172 : (Group 172 pm_ep_mrk_lsmiss) Marked instruction CRU processing finished #Group 173 pm_ep_mrk_ulsflush, Mark unaligned load and store flushes event:0X0AD0 counters:0 um:zero minimum:1000 name:PM_MRK_ST_CMPL_GRP173 : (Group 173 pm_ep_mrk_ulsflush) Marked store instruction completed event:0X0AD1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP173 : (Group 173 pm_ep_mrk_ulsflush) Instructions completed event:0X0AD2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_UST_GRP173 : (Group 173 pm_ep_mrk_ulsflush) Marked unaligned store flushes event:0X0AD3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_ULD_GRP173 : (Group 173 pm_ep_mrk_ulsflush) Marked unaligned load flushes #Group 174 pm_ep_mrk_misc1, Misc marked instructions event:0X0AE0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP174 : (Group 174 pm_ep_mrk_misc1) Instructions completed event:0X0AE1 counters:1 um:zero minimum:1000 name:PM_MRK_ST_GPS_GRP174 : (Group 174 pm_ep_mrk_misc1) Marked store sent to GPS event:0X0AE2 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP174 : (Group 174 pm_ep_mrk_misc1) Marked instruction FPU processing finished event:0X0AE3 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_TIMEO_GRP174 : (Group 174 pm_ep_mrk_misc1) Marked group completion timeout #Group 175 pm_ep_mrk_misc2, Misc marked instructions event:0X0AF0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP175 : (Group 175 pm_ep_mrk_misc2) Instructions completed event:0X0AF1 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_SHR_CYC_GRP175 : (Group 175 pm_ep_mrk_misc2) Marked load latency from L2.5 shared event:0X0AF2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L3_GRP175 : (Group 175 pm_ep_mrk_misc2) Marked data loaded from L3 event:0X0AF3 counters:3 um:zero minimum:1000 name:PM_MRK_IMR_RELOAD_GRP175 : (Group 175 pm_ep_mrk_misc2) Marked IMR reloaded #Group 176 pm_ep_mrk_misc3, Misc marked instructions event:0X0B00 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP176 : (Group 176 pm_ep_mrk_misc3) Instructions completed event:0X0B01 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L35_SHR_CYC_GRP176 : (Group 176 pm_ep_mrk_misc3) Marked load latency from L3.5 shared event:0X0B02 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_GRP176 : (Group 176 pm_ep_mrk_misc3) Marked Data TLB misses event:0X0B03 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_RMEM_GRP176 : (Group 176 pm_ep_mrk_misc3) Marked data loaded from remote memory #Group 177 pm_ep_mrk_misc4, Misc marked instructions event:0X0B10 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP177 : (Group 177 pm_ep_mrk_misc4) Marked Data TLB misses for 4K page event:0X0B11 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP177 : (Group 177 pm_ep_mrk_misc4) Instructions completed event:0X0B12 counters:2 um:zero minimum:1000 name:PM_MRK_DTLB_REF_GRP177 : (Group 177 pm_ep_mrk_misc4) Marked Data TLB reference event:0X0B13 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L275_MOD_GRP177 : (Group 177 pm_ep_mrk_misc4) Marked data loaded from L2.75 modified #Group 178 pm_ep_mrk_misc5, Misc marked instructions event:0X0B20 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_REF_4K_GRP178 : (Group 178 pm_ep_mrk_misc5) Marked Data TLB reference for 4K page event:0X0B21 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP178 : (Group 178 pm_ep_mrk_misc5) Instructions completed event:0X0B22 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP178 : (Group 178 pm_ep_mrk_misc5) Internal operations completed event:0X0B23 counters:3 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_SRQ_GRP178 : (Group 178 pm_ep_mrk_misc5) LSU0 marked SRQ lhs flushes #Group 179 pm_ep_mrk_misc6, Misc marked instructions event:0X0B30 counters:0 um:zero minimum:1000 name:PM_MRK_DTLB_MISS_4K_GRP179 : (Group 179 pm_ep_mrk_misc6) Marked Data TLB misses for 4K page event:0X0B31 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP179 : (Group 179 pm_ep_mrk_misc6) Instructions completed event:0X0B32 counters:2 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_ULD_GRP179 : (Group 179 pm_ep_mrk_misc6) LSU1 marked unaligned load flushes event:0X0B33 counters:3 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_UST_GRP179 : (Group 179 pm_ep_mrk_misc6) LSU1 marked unaligned store flushes #Group 180 pm_ep_mrk_misc7, Misc marked instructions event:0X0B40 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP180 : (Group 180 pm_ep_mrk_misc7) Instructions completed event:0X0B41 counters:1 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_CYC_GRP180 : (Group 180 pm_ep_mrk_misc7) Marked load latency from L2 event:0X0B42 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_ULD_GRP180 : (Group 180 pm_ep_mrk_misc7) LSU0 marked unaligned load flushes event:0X0B43 counters:3 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_UST_GRP180 : (Group 180 pm_ep_mrk_misc7) LSU0 marked unaligned store flushes #Group 181 pm_ep_mrk_misc8, Misc marked instructions event:0X0B50 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP181 : (Group 181 pm_ep_mrk_misc8) Instructions completed event:0X0B51 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP181 : (Group 181 pm_ep_mrk_misc8) Marked instruction BRU processing finished event:0X0B52 counters:2 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_LRQ_GRP181 : (Group 181 pm_ep_mrk_misc8) LSU0 marked LRQ flushes event:0X0B53 counters:3 um:zero minimum:1000 name:PM_MRK_LSU0_FLUSH_SRQ_GRP181 : (Group 181 pm_ep_mrk_misc8) LSU0 marked SRQ lhs flushes #Group 182 pm_ep_mrk_misc9, Misc marked instructions event:0X0B60 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP182 : (Group 182 pm_ep_mrk_misc9) Instructions completed event:0X0B61 counters:1 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_LRQ_GRP182 : (Group 182 pm_ep_mrk_misc9) LSU1 marked LRQ flushes event:0X0B62 counters:2 um:zero minimum:1000 name:PM_MRK_LSU1_FLUSH_SRQ_GRP182 : (Group 182 pm_ep_mrk_misc9) LSU1 marked SRQ lhs flushes event:0X0B63 counters:3 um:zero minimum:1000 name:PM_MRK_STCX_FAIL_GRP182 : (Group 182 pm_ep_mrk_misc9) Marked STCX failed #Group 183 pm_ep_mrk_misc10, Misc marked instructions event:0X0B70 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP183 : (Group 183 pm_ep_mrk_misc10) Instructions completed event:0X0B71 counters:1 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU0_GRP183 : (Group 183 pm_ep_mrk_misc10) LSU0 marked L1 D cache load misses event:0X0B72 counters:2 um:zero minimum:1000 name:PM_MRK_LD_MISS_L1_LSU1_GRP183 : (Group 183 pm_ep_mrk_misc10) LSU1 marked L1 D cache load misses event:0X0B73 counters:3 um:zero minimum:1000 name:PM_MRK_ST_MISS_L1_GRP183 : (Group 183 pm_ep_mrk_misc10) Marked L1 D cache store misses #Group 184 pm_ep_mrk_misc11, Misc marked instructions event:0X0B80 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP184 : (Group 184 pm_ep_mrk_misc11) Instructions completed event:0X0B81 counters:1 um:zero minimum:1000 name:PM_MRK_BRU_FIN_GRP184 : (Group 184 pm_ep_mrk_misc11) Marked instruction BRU processing finished event:0X0B82 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L25_MOD_GRP184 : (Group 184 pm_ep_mrk_misc11) Marked data loaded from L2.5 modified event:0X0B83 counters:3 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L375_MOD_GRP184 : (Group 184 pm_ep_mrk_misc11) Marked data loaded from L3.75 modified #Group 185 pm_ep_mrk_misc12, Misc marked instructions event:0X0B90 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP185 : (Group 185 pm_ep_mrk_misc12) Instructions completed event:0X0B91 counters:1 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_UST_GRP185 : (Group 185 pm_ep_mrk_misc12) Marked unaligned store flushes event:0X0B92 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP185 : (Group 185 pm_ep_mrk_misc12) Marked LRQ flushes event:0X0B93 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP185 : (Group 185 pm_ep_mrk_misc12) Marked SRQ lhs flushes #Group 186 pm_ep_mrk_misc13, Misc marked instructions event:0X0BA0 counters:0 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2_GRP186 : (Group 186 pm_ep_mrk_misc13) Marked data loaded from L2 event:0X0BA1 counters:1 um:zero minimum:10000 name:PM_INST_CMPL_GRP186 : (Group 186 pm_ep_mrk_misc13) Instructions completed event:0X0BA2 counters:2 um:zero minimum:1000 name:PM_MRK_DATA_FROM_L2MISS_GRP186 : (Group 186 pm_ep_mrk_misc13) Marked data loaded missed L2 event:0X0BA3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_SRQ_INST_VALID_GRP186 : (Group 186 pm_ep_mrk_misc13) Marked instruction valid in SRQ #Group 187 pm_ep_mrk_misc14, Misc marked instructions event:0X0BB0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP187 : (Group 187 pm_ep_mrk_misc14) Instructions completed event:0X0BB1 counters:1 um:zero minimum:1000 name:PM_MRK_FXU_FIN_GRP187 : (Group 187 pm_ep_mrk_misc14) Marked instruction FXU processing finished event:0X0BB2 counters:2 um:zero minimum:1000 name:PM_MRK_FPU_FIN_GRP187 : (Group 187 pm_ep_mrk_misc14) Marked instruction FPU processing finished event:0X0BB3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FIN_GRP187 : (Group 187 pm_ep_mrk_misc14) Marked instruction LSU processing finished #Group 188 pm_ep_mrk_misc15, Misc marked instructions event:0X0BC0 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP188 : (Group 188 pm_ep_mrk_misc15) Instructions completed event:0X0BC1 counters:1 um:zero minimum:1000 name:PM_MRK_GRP_BR_REDIR_GRP188 : (Group 188 pm_ep_mrk_misc15) Group experienced marked branch redirect event:0X0BC2 counters:2 um:zero minimum:1000 name:PM_MRK_INST_FIN_GRP188 : (Group 188 pm_ep_mrk_misc15) Marked instruction finished event:0X0BC3 counters:3 um:zero minimum:1000 name:PM_MRK_GRP_CMPL_GRP188 : (Group 188 pm_ep_mrk_misc15) Marked group completed oprofile-1.3.0/events/ppc64/power5++/event_mappings0000664000175000017500000017464412534404406017050 00000000000000# # Copyright OProfile authors # Copyright (c) International Business Machines, 2007. # Contributed by Maynard Johnson . # #Mapping of event groups to MMCR values #Group Default event:0X001 mmcr0:0X00000000 mmcr1:0X000000000A02121E mmcra:0X00000000 #Group 1 pm_utilization, CPI and utilization data event:0X0010 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X0011 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X0012 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 event:0X0013 mmcr0:0X00000000 mmcr1:0X000000000A12121E mmcra:0X00000000 #Group 2 pm_completion, Completion and cycle counts event:0X0020 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X0021 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X0022 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 event:0X0023 mmcr0:0X00000000 mmcr1:0X000000002608261E mmcra:0X00000000 #Group 3 pm_group_dispatch, Group dispatch events event:0X0030 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X0031 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X0032 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 event:0X0033 mmcr0:0X00000000 mmcr1:0X4000000EC6C8C212 mmcra:0X00000000 #Group 4 pm_clb1, CLB fullness event:0X0040 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X0041 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X0042 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 event:0X0043 mmcr0:0X00000000 mmcr1:0X015B000180848C4C mmcra:0X00000001 #Group 5 pm_clb2, CLB fullness event:0X0050 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X0051 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X0052 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 event:0X0053 mmcr0:0X00000000 mmcr1:0X014300028A8CCC02 mmcra:0X00000001 #Group 6 pm_gct_empty, GCT empty reasons event:0X0060 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X0061 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X0062 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 event:0X0063 mmcr0:0X00000000 mmcr1:0X4000000008380838 mmcra:0X00000000 #Group 7 pm_gct_usage, GCT Usage event:0X0070 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X0071 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X0072 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 event:0X0073 mmcr0:0X00000000 mmcr1:0X000000003E3E3E3E mmcra:0X00000000 #Group 8 pm_lsu1, LSU LRQ and LMQ events event:0X0080 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X0081 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X0082 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 event:0X0083 mmcr0:0X00000000 mmcr1:0X020F000FCECCCCCA mmcra:0X00000000 #Group 9 pm_lsu2, LSU SRQ events event:0X0090 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X0091 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X0092 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 event:0X0093 mmcr0:0X00000000 mmcr1:0X400E000ECECCCA86 mmcra:0X00000000 #Group 10 pm_lsu3, LSU SRQ and LMQ events event:0X00A0 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X00A1 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X00A2 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 event:0X00A3 mmcr0:0X00000000 mmcr1:0X030F0004EA102A2A mmcra:0X00000000 #Group 11 pm_lsu4, LSU SRQ and LMQ events event:0X00B0 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X00B1 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X00B2 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 event:0X00B3 mmcr0:0X00000000 mmcr1:0X40030000EEA62A2A mmcra:0X00000000 #Group 12 pm_prefetch1, Prefetch stream allocation event:0X00C0 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X00C1 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X00C2 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 event:0X00C3 mmcr0:0X00000000 mmcr1:0X8432000D36C884CE mmcra:0X00000000 #Group 13 pm_prefetch2, Prefetch events event:0X00D0 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X00D1 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X00D2 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 event:0X00D3 mmcr0:0X00000000 mmcr1:0X8103000602CACE8E mmcra:0X00000001 #Group 14 pm_prefetch3, L2 prefetch and misc events event:0X00E0 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X00E1 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X00E2 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 event:0X00E3 mmcr0:0X00000000 mmcr1:0X047C000482108602 mmcra:0X00000001 #Group 15 pm_prefetch4, Misc prefetch and reject events event:0X00F0 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X00F1 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X00F2 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 event:0X00F3 mmcr0:0X00000000 mmcr1:0X0CF200028088CC86 mmcra:0X00000000 #Group 16 pm_lsu_reject1, LSU reject events event:0X0100 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X0101 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X0102 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 event:0X0103 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001 #Group 17 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision event:0X0110 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X0111 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X0112 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 event:0X0113 mmcr0:0X00000000 mmcr1:0X88C00001848C02CE mmcra:0X00000001 #Group 18 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions event:0X0120 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X0121 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X0122 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 event:0X0123 mmcr0:0X00000000 mmcr1:0X48C00003868EC0C8 mmcra:0X00000000 #Group 19 pm_lsu_reject4, LSU0/1 reject LMQ full event:0X0130 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X0131 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X0132 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 event:0X0133 mmcr0:0X00000000 mmcr1:0X88C00001828A02C8 mmcra:0X00000001 #Group 20 pm_lsu_reject5, LSU misc reject and flush events event:0X0140 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X0141 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X0142 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 event:0X0143 mmcr0:0X00000000 mmcr1:0X48C0000010208A8E mmcra:0X00000000 #Group 21 pm_flush1, Misc flush events event:0X0150 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X0151 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X0152 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 event:0X0153 mmcr0:0X00000000 mmcr1:0XC0F000020210C68E mmcra:0X00000001 #Group 22 pm_flush2, Flushes due to scoreboard and sync event:0X0160 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X0161 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X0162 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 event:0X0163 mmcr0:0X00000000 mmcr1:0XC08000038002C4C2 mmcra:0X00000001 #Group 23 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events event:0X0170 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X0171 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X0172 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 event:0X0173 mmcr0:0X00000000 mmcr1:0X40C000002020028A mmcra:0X00000001 #Group 24 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ event:0X0180 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X0181 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X0182 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 event:0X0183 mmcr0:0X00000000 mmcr1:0X40C00000848C8A02 mmcra:0X00000001 #Group 25 pm_lsu_flush_srq, LSU0/1 flush due to SRQ event:0X0190 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X0191 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X0192 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 event:0X0193 mmcr0:0X00000000 mmcr1:0X40C00000868E028A mmcra:0X00000001 #Group 26 pm_lsu_flush_unaligned, LSU flush due to unaligned data event:0X01A0 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X01A1 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X01A2 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 event:0X01A3 mmcr0:0X00000000 mmcr1:0X80C000021010C802 mmcra:0X00000001 #Group 27 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load event:0X01B0 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X01B1 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X01B2 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 event:0X01B3 mmcr0:0X00000000 mmcr1:0X40C0000080888A02 mmcra:0X00000001 #Group 28 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store event:0X01C0 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X01C1 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X01C2 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 event:0X01C3 mmcr0:0X00000000 mmcr1:0X40C00000828A028A mmcra:0X00000001 #Group 29 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full event:0X01D0 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X01D1 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X01D2 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 event:0X01D3 mmcr0:0X00000000 mmcr1:0XC0200009CE0210C0 mmcra:0X00000001 #Group 30 pm_lsu_stall1, LSU Stalls event:0X01E0 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X01E1 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X01E2 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 event:0X01E3 mmcr0:0X00000000 mmcr1:0X4000000028300234 mmcra:0X00000001 #Group 31 pm_lsu_stall2, LSU Stalls event:0X01F0 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X01F1 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X01F2 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 event:0X01F3 mmcr0:0X00000000 mmcr1:0X4000000002341E36 mmcra:0X00000001 #Group 32 pm_fxu_stall, FXU Stalls event:0X0200 mmcr0:0X00000000 mmcr1:0X40000008CA320232 mmcra:0X00000001 event:0X0201 mmcr0:0X00000000 mmcr1:0X40000008CA320232 mmcra:0X00000001 event:0X0202 mmcr0:0X00000000 mmcr1:0X40000008CA320232 mmcra:0X00000001 event:0X0203 mmcr0:0X00000000 mmcr1:0X40000008CA320232 mmcra:0X00000001 #Group 33 pm_fpu_stall, FPU Stalls event:0X0210 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X0211 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X0212 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 event:0X0213 mmcr0:0X00000000 mmcr1:0X4000000020360230 mmcra:0X00000001 #Group 34 pm_queue_full, BRQ LRQ LMQ queue full event:0X0220 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X0221 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X0222 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 event:0X0223 mmcr0:0X00000000 mmcr1:0X400B0009CE8A84CE mmcra:0X00000000 #Group 35 pm_issueq_full, FPU FX full event:0X0230 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X0231 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X0232 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 event:0X0233 mmcr0:0X00000000 mmcr1:0X40000000868E8088 mmcra:0X00000000 #Group 36 pm_mapper_full1, CR CTR GPR mapper full event:0X0240 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X0241 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X0242 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 event:0X0243 mmcr0:0X00000000 mmcr1:0X40000002888CCA82 mmcra:0X00000000 #Group 37 pm_mapper_full2, FPR XER mapper full event:0X0250 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X0251 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X0252 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 event:0X0253 mmcr0:0X00000000 mmcr1:0X4103000282843602 mmcra:0X00000001 #Group 38 pm_misc_load, Non-cachable loads and stcx events event:0X0260 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X0261 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X0262 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 event:0X0263 mmcr0:0X00000000 mmcr1:0X0438000CC2CA828A mmcra:0X00000001 #Group 39 pm_ic_demand, ICache demand from BR redirect event:0X0270 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X0271 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X0272 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 event:0X0273 mmcr0:0X00000000 mmcr1:0X800C000FC2CAC0C2 mmcra:0X00000000 #Group 40 pm_ic_pref, ICache prefetch event:0X0280 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X0281 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X0282 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 event:0X0283 mmcr0:0X00000000 mmcr1:0X8000000DCECC8E1A mmcra:0X00000000 #Group 41 pm_ic_miss, ICache misses event:0X0290 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X0291 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X0292 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 event:0X0293 mmcr0:0X00000000 mmcr1:0X4003000E32CEC802 mmcra:0X00000001 #Group 42 pm_branch_miss, Branch mispredict, TLB and SLB misses event:0X02A0 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X02A1 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X02A2 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 event:0X02A3 mmcr0:0X00000000 mmcr1:0X808000031010CACC mmcra:0X00000000 #Group 43 pm_branch1, Branch operations event:0X02B0 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X02B1 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X02B2 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 event:0X02B3 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0E0E mmcra:0X00000000 #Group 44 pm_branch2, Branch operations event:0X02C0 mmcr0:0X00000000 mmcr1:0X4000000C22CC8C02 mmcra:0X00000001 event:0X02C1 mmcr0:0X00000000 mmcr1:0X4000000C22CC8C02 mmcra:0X00000001 event:0X02C2 mmcr0:0X00000000 mmcr1:0X4000000C22CC8C02 mmcra:0X00000001 event:0X02C3 mmcr0:0X00000000 mmcr1:0X4000000C22CC8C02 mmcra:0X00000001 #Group 45 pm_L1_tlbmiss, L1 load and TLB misses event:0X02D0 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X02D1 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X02D2 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 event:0X02D3 mmcr0:0X00000000 mmcr1:0X00B000008E881020 mmcra:0X00000000 #Group 46 pm_L1_DERAT_miss, L1 store and DERAT misses event:0X02E0 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X02E1 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X02E2 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 event:0X02E3 mmcr0:0X00000000 mmcr1:0X00B300080E202086 mmcra:0X00000000 #Group 47 pm_L1_slbmiss, L1 load and SLB misses event:0X02F0 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X02F1 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X02F2 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 event:0X02F3 mmcr0:0X00000000 mmcr1:0X00B000008A82848C mmcra:0X00000000 #Group 48 pm_dtlbref, Data TLB references event:0X0300 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X0301 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X0302 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 event:0X0303 mmcr0:0X00000000 mmcr1:0X000C000F0C0C0C0C mmcra:0X00000000 #Group 49 pm_dtlbmiss, Data TLB misses event:0X0310 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X0311 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X0312 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 event:0X0313 mmcr0:0X00000000 mmcr1:0X000C000F1A1A1A1A mmcra:0X00000000 #Group 50 pm_dtlb, Data TLB references and misses event:0X0320 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X0321 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X0322 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 event:0X0323 mmcr0:0X00000000 mmcr1:0X008C0008C8881E1E mmcra:0X00000000 #Group 51 pm_L1_refmiss, L1 load references and misses and store references and misses event:0X0330 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X0331 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X0332 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 event:0X0333 mmcr0:0X00000000 mmcr1:0X0030000050501086 mmcra:0X00000000 #Group 52 pm_dsource1, L3 cache and memory data access event:0X0340 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X0341 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X0342 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 event:0X0343 mmcr0:0X00000000 mmcr1:0X4003000C1C0E8E02 mmcra:0X00000001 #Group 53 pm_dsource2, L3 cache and memory data access event:0X0350 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X0351 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X0352 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 event:0X0353 mmcr0:0X00000000 mmcr1:0X0003000F1C0E360E mmcra:0X00000000 #Group 54 pm_dsource_L2, L2 cache data access event:0X0360 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X0361 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X0362 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 event:0X0363 mmcr0:0X00000000 mmcr1:0X0003000F2E2E2E2E mmcra:0X00000000 #Group 55 pm_dsource_L3, L3 cache data access event:0X0370 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X0371 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X0372 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 event:0X0373 mmcr0:0X00000000 mmcr1:0X0003000F3C3C3C3C mmcra:0X00000000 #Group 56 pm_isource1, Instruction source information event:0X0380 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X0381 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X0382 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 event:0X0383 mmcr0:0X00000000 mmcr1:0X8000000F1A1A1A0C mmcra:0X00000000 #Group 57 pm_isource2, Instruction source information event:0X0390 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X0391 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X0392 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 event:0X0393 mmcr0:0X00000000 mmcr1:0X8000000D0C0C021A mmcra:0X00000001 #Group 58 pm_isource_L2, L2 instruction source information event:0X03A0 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X03A1 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X03A2 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 event:0X03A3 mmcr0:0X00000000 mmcr1:0X8000000F2C2C2C2C mmcra:0X00000000 #Group 59 pm_isource_L3, L3 instruction source information event:0X03B0 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X03B1 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X03B2 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 event:0X03B3 mmcr0:0X00000000 mmcr1:0X8000000F3A3A3A3A mmcra:0X00000000 #Group 60 pm_pteg_source1, PTEG source information event:0X03C0 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X03C1 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X03C2 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 event:0X03C3 mmcr0:0X00000000 mmcr1:0X0002000F2E2E2E2E mmcra:0X00000000 #Group 61 pm_pteg_source2, PTEG source information event:0X03D0 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X03D1 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X03D2 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 event:0X03D3 mmcr0:0X00000000 mmcr1:0X0002000F3C3C3C3C mmcra:0X00000000 #Group 62 pm_pteg_source3, PTEG source information event:0X03E0 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X03E1 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X03E2 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 event:0X03E3 mmcr0:0X00000000 mmcr1:0X0002000F0E0E360E mmcra:0X00000000 #Group 63 pm_pteg_source4, L3 PTEG and group disptach events event:0X03F0 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X03F1 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X03F2 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 event:0X03F3 mmcr0:0X00000000 mmcr1:0X003200081C04048E mmcra:0X00000000 #Group 64 pm_L2SA_ld, L2 slice A load events event:0X0400 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X0401 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X0402 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 event:0X0403 mmcr0:0X00000000 mmcr1:0X3055400580C080C0 mmcra:0X00000000 #Group 65 pm_L2SA_st, L2 slice A store events event:0X0410 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X0411 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X0412 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 event:0X0413 mmcr0:0X00000000 mmcr1:0X3055800580C080C0 mmcra:0X00000000 #Group 66 pm_L2SA_st2, L2 slice A store events event:0X0420 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X0421 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X0422 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 event:0X0423 mmcr0:0X00000000 mmcr1:0X3055C00580C080C0 mmcra:0X00000000 #Group 67 pm_L2SB_ld, L2 slice B load events event:0X0430 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X0431 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X0432 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 event:0X0433 mmcr0:0X00000000 mmcr1:0X3055400582C282C2 mmcra:0X00000000 #Group 68 pm_L2SB_st, L2 slice B store events event:0X0440 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X0441 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X0442 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 event:0X0443 mmcr0:0X00000000 mmcr1:0X3055800582C482C2 mmcra:0X00000000 #Group 69 pm_L2SB_st2, L2 slice B store events event:0X0450 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X0451 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X0452 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 event:0X0453 mmcr0:0X00000000 mmcr1:0X3055C00582C282C2 mmcra:0X00000000 #Group 70 pm_L2SC_ld, L2 slice C load events event:0X0460 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X0461 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X0462 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 event:0X0463 mmcr0:0X00000000 mmcr1:0X3055400584C484C4 mmcra:0X00000000 #Group 71 pm_L2SC_st, L2 slice C store events event:0X0470 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X0471 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X0472 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 event:0X0473 mmcr0:0X00000000 mmcr1:0X3055800584C284C4 mmcra:0X00000000 #Group 72 pm_L2SC_st2, L2 slice C store events event:0X0480 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X0481 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X0482 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 event:0X0483 mmcr0:0X00000000 mmcr1:0X3055C00584C484C4 mmcra:0X00000000 #Group 73 pm_L3SA_trans, L3 slice A state transistions event:0X0490 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X0491 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X0492 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 event:0X0493 mmcr0:0X00000000 mmcr1:0X3015000AC602C686 mmcra:0X00000001 #Group 74 pm_L3SB_trans, L3 slice B state transistions event:0X04A0 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X04A1 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X04A2 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 event:0X04A3 mmcr0:0X00000000 mmcr1:0X3015000602C8C888 mmcra:0X00000001 #Group 75 pm_L3SC_trans, L3 slice C state transistions event:0X04B0 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X04B1 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X04B2 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 event:0X04B3 mmcr0:0X00000000 mmcr1:0X3015000602CACA8A mmcra:0X00000001 #Group 76 pm_L2SA_trans, L2 slice A state transistions event:0X04C0 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X04C1 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X04C2 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 event:0X04C3 mmcr0:0X00000000 mmcr1:0X3055000AC080C080 mmcra:0X00000000 #Group 77 pm_L2SB_trans, L2 slice B state transistions event:0X04D0 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X04D1 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X04D2 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 event:0X04D3 mmcr0:0X00000000 mmcr1:0X3055000AC282C282 mmcra:0X00000000 #Group 78 pm_L2SC_trans, L2 slice C state transistions event:0X04E0 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X04E1 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X04E2 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 event:0X04E3 mmcr0:0X00000000 mmcr1:0X3055000AC484C484 mmcra:0X00000000 #Group 79 pm_L3SAB_retry, L3 slice A/B snoop retry and all CI/CO busy event:0X04F0 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X04F1 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X04F2 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 event:0X04F3 mmcr0:0X00000000 mmcr1:0X3005100FC6C8C6C8 mmcra:0X00000000 #Group 80 pm_L3SAB_hit, L3 slice A/B hit and reference event:0X0500 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X0501 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X0502 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 event:0X0503 mmcr0:0X00000000 mmcr1:0X3050100086888688 mmcra:0X00000000 #Group 81 pm_L3SC_retry_hit, L3 slice C hit & snoop retry event:0X0510 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X0511 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X0512 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 event:0X0513 mmcr0:0X00000000 mmcr1:0X3055100ACA8ACA8A mmcra:0X00000000 #Group 82 pm_fpu1, Floating Point events event:0X0520 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X0521 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X0522 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 event:0X0523 mmcr0:0X00000000 mmcr1:0X0000000010101020 mmcra:0X00000000 #Group 83 pm_fpu2, Floating Point events event:0X0530 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X0531 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X0532 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 event:0X0533 mmcr0:0X00000000 mmcr1:0X0000000020202010 mmcra:0X00000000 #Group 84 pm_fpu3, Floating point events event:0X0540 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X0541 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X0542 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 event:0X0543 mmcr0:0X00000000 mmcr1:0X0000000C1010868E mmcra:0X00000000 #Group 85 pm_fpu4, Floating point events event:0X0550 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X0551 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X0552 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 event:0X0553 mmcr0:0X00000000 mmcr1:0X0430000C20200220 mmcra:0X00000001 #Group 86 pm_fpu5, Floating point events by unit event:0X0560 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X0561 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X0562 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 event:0X0563 mmcr0:0X00000000 mmcr1:0X00000000848C848C mmcra:0X00000000 #Group 87 pm_fpu6, Floating point events by unit event:0X0570 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X0571 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X0572 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 event:0X0573 mmcr0:0X00000000 mmcr1:0X0000000CC0C88088 mmcra:0X00000000 #Group 88 pm_fpu7, Floating point events by unit event:0X0580 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X0581 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X0582 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 event:0X0583 mmcr0:0X00000000 mmcr1:0X000000008088828A mmcra:0X00000000 #Group 89 pm_fpu8, Floating point events by unit event:0X0590 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X0591 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X0592 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 event:0X0593 mmcr0:0X00000000 mmcr1:0X0000000DC2CA02C0 mmcra:0X00000001 #Group 90 pm_fpu9, Floating point events by unit event:0X05A0 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X05A1 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X05A2 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 event:0X05A3 mmcr0:0X00000000 mmcr1:0X0430000CC6CE8088 mmcra:0X00000000 #Group 91 pm_fpu10, Floating point events by unit event:0X05B0 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X05B1 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X05B2 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 event:0X05B3 mmcr0:0X00000000 mmcr1:0X00000000828A028A mmcra:0X00000001 #Group 92 pm_fpu11, Floating point events by unit event:0X05C0 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X05C1 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X05C2 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 event:0X05C3 mmcr0:0X00000000 mmcr1:0X00000000868E8602 mmcra:0X00000001 #Group 93 pm_fpu12, Floating point events by unit event:0X05D0 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X05D1 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X05D2 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 event:0X05D3 mmcr0:0X00000000 mmcr1:0X0430000CC4CC8002 mmcra:0X00000001 #Group 94 pm_fxu1, Fixed Point events event:0X05E0 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X05E1 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X05E2 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 event:0X05E3 mmcr0:0X00000000 mmcr1:0X0000000024242424 mmcra:0X00000000 #Group 95 pm_fxu2, Fixed Point events event:0X05F0 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X05F1 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X05F2 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 event:0X05F3 mmcr0:0X00000000 mmcr1:0X4000000604221020 mmcra:0X00000001 #Group 96 pm_fxu3, Fixed Point events event:0X0600 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X0601 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X0602 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 event:0X0603 mmcr0:0X00000000 mmcr1:0X404000038688C4CC mmcra:0X00000000 #Group 97 pm_smt_priorities1, Thread priority events event:0X0610 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X0611 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X0612 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 event:0X0613 mmcr0:0X00000000 mmcr1:0X0005000FC6CCC6C8 mmcra:0X00000000 #Group 98 pm_smt_priorities2, Thread priority events event:0X0620 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X0621 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X0622 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 event:0X0623 mmcr0:0X00000000 mmcr1:0X0005000FC4CACACC mmcra:0X00000000 #Group 99 pm_smt_priorities3, Thread priority events event:0X0630 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X0631 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X0632 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 event:0X0633 mmcr0:0X00000000 mmcr1:0X0005000FC2C8C4C2 mmcra:0X00000000 #Group 100 pm_smt_priorities4, Thread priority events event:0X0640 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X0641 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X0642 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 event:0X0643 mmcr0:0X00000000 mmcr1:0X0005000AC016C002 mmcra:0X00000001 #Group 101 pm_smt_both, Thread common events event:0X0650 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X0651 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X0652 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 event:0X0653 mmcr0:0X00000000 mmcr1:0X0010000016260208 mmcra:0X00000001 #Group 102 pm_smt_selection, Thread selection event:0X0660 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X0661 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X0662 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 event:0X0663 mmcr0:0X00000000 mmcr1:0X0090000086028082 mmcra:0X00000001 #Group 103 pm_smt_selectover1, Thread selection overide event:0X0670 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X0671 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X0672 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 event:0X0673 mmcr0:0X00000000 mmcr1:0X0050000002808488 mmcra:0X00000001 #Group 104 pm_smt_selectover2, Thread selection overide event:0X0680 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X0681 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X0682 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 event:0X0683 mmcr0:0X00000000 mmcr1:0X00100000021E8A86 mmcra:0X00000001 #Group 105 pm_fabric1, Fabric events event:0X0690 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X0691 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X0692 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 event:0X0693 mmcr0:0X00000000 mmcr1:0X305500058ECE8ECE mmcra:0X00000000 #Group 106 pm_fabric2, Fabric data movement event:0X06A0 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X06A1 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X06A2 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 event:0X06A3 mmcr0:0X00000000 mmcr1:0X305500858ECE8ECE mmcra:0X00000000 #Group 107 pm_fabric3, Fabric data movement event:0X06B0 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X06B1 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X06B2 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 event:0X06B3 mmcr0:0X00000000 mmcr1:0X305501858ECE8ECE mmcra:0X00000000 #Group 108 pm_fabric4, Fabric data movement event:0X06C0 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X06C1 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X06C2 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 event:0X06C3 mmcr0:0X00000000 mmcr1:0X705401068ECEC68E mmcra:0X00000000 #Group 109 pm_snoop1, Snoop retry event:0X06D0 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X06D1 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X06D2 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 event:0X06D3 mmcr0:0X00000000 mmcr1:0X305500058CCC8CCC mmcra:0X00000000 #Group 110 pm_snoop2, Snoop read retry event:0X06E0 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X06E1 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X06E2 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 event:0X06E3 mmcr0:0X00000000 mmcr1:0X30540A048CCC8C02 mmcra:0X00000001 #Group 111 pm_snoop3, Snoop write retry event:0X06F0 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X06F1 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X06F2 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 event:0X06F3 mmcr0:0X00000000 mmcr1:0X30550C058CCC8CCC mmcra:0X00000000 #Group 112 pm_snoop4, Snoop partial write retry event:0X0700 mmcr0:0X00000000 mmcr1:0X30540E048CCC8CAC mmcra:0X00000000 event:0X0701 mmcr0:0X00000000 mmcr1:0X30540E048CCC8CAC mmcra:0X00000000 event:0X0702 mmcr0:0X00000000 mmcr1:0X30540E048CCC8CAC mmcra:0X00000000 event:0X0703 mmcr0:0X00000000 mmcr1:0X30540E048CCC8CAC mmcra:0X00000000 #Group 113 pm_mem_rq, Memory read queue dispatch event:0X0710 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X0711 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X0712 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 event:0X0713 mmcr0:0X00000000 mmcr1:0X705402058CCC8CCE mmcra:0X00000000 #Group 114 pm_mem_read, Memory read complete and cancel event:0X0720 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X0721 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X0722 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 event:0X0723 mmcr0:0X00000000 mmcr1:0X305404048CCC8C06 mmcra:0X00000000 #Group 115 pm_mem_wq, Memory write queue dispatch event:0X0730 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X0731 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X0732 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 event:0X0733 mmcr0:0X00000000 mmcr1:0X305506058CCC8CCC mmcra:0X00000000 #Group 116 pm_mem_pwq, Memory partial write queue event:0X0740 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X0741 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X0742 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 event:0X0743 mmcr0:0X00000000 mmcr1:0X305508058CCC8CCC mmcra:0X00000000 #Group 117 pm_threshold, Thresholding event:0X0750 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X0751 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X0752 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 event:0X0753 mmcr0:0X00000000 mmcr1:0X0008000404C41628 mmcra:0X00000001 #Group 118 pm_mrk_grp1, Marked group events event:0X0760 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X0761 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X0762 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 event:0X0763 mmcr0:0X00000000 mmcr1:0X0008000404C60A26 mmcra:0X00000001 #Group 119 pm_mrk_grp2, Marked group events event:0X0770 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X0771 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X0772 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 event:0X0773 mmcr0:0X00000000 mmcr1:0X410300032A0AC822 mmcra:0X00000001 #Group 120 pm_mrk_dsource1, Marked data from event:0X0780 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X0781 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X0782 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 event:0X0783 mmcr0:0X00000000 mmcr1:0X010B000F0E404444 mmcra:0X00000001 #Group 121 pm_mrk_dsource2, Marked data from event:0X0790 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X0791 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X0792 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 event:0X0793 mmcr0:0X00000000 mmcr1:0X010B000C2E440210 mmcra:0X00000001 #Group 122 pm_mrk_dsource3, Marked data from event:0X07A0 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X07A1 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X07A2 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 event:0X07A3 mmcr0:0X00000000 mmcr1:0X010B000F1C484C4C mmcra:0X00000001 #Group 123 pm_mrk_dsource4, Marked data from event:0X07B0 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X07B1 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X07B2 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 event:0X07B3 mmcr0:0X00000000 mmcr1:0X010B000F42462E42 mmcra:0X00000001 #Group 124 pm_mrk_dsource5, Marked data from event:0X07C0 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X07C1 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X07C2 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 event:0X07C3 mmcr0:0X00000000 mmcr1:0X010B000F3C4C4040 mmcra:0X00000001 #Group 125 pm_mrk_dsource6, Marked data from event:0X07D0 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X07D1 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X07D2 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 event:0X07D3 mmcr0:0X00000000 mmcr1:0X010B000D46460246 mmcra:0X00000001 #Group 126 pm_mrk_dsource7, Marked data from event:0X07E0 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X07E1 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X07E2 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 event:0X07E3 mmcr0:0X00000000 mmcr1:0X010B000F4E4E3C4E mmcra:0X00000001 #Group 127 pm_mrk_dtlbref, Marked data TLB references event:0X07F0 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X07F1 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X07F2 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 event:0X07F3 mmcr0:0X00000000 mmcr1:0X020C000F0C0C0C0C mmcra:0X00000001 #Group 128 pm_mrk_dtlbmiss, Marked data TLB misses event:0X0800 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X0801 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X0802 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 event:0X0803 mmcr0:0X00000000 mmcr1:0X020C000F1A1A1A1A mmcra:0X00000001 #Group 129 pm_mrk_dtlb_dslb, Marked data TLB references and misses and marked data SLB misses event:0X0810 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X0811 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X0812 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 event:0X0813 mmcr0:0X00000000 mmcr1:0X063C0008C8AC8E1E mmcra:0X00000001 #Group 130 pm_mrk_lbref, Marked TLB and SLB references event:0X0820 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X0821 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X0822 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 event:0X0823 mmcr0:0X00000000 mmcr1:0X063C000A0C020C8E mmcra:0X00000001 #Group 131 pm_mrk_lsmiss, Marked load and store miss event:0X0830 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X0831 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X0832 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 event:0X0833 mmcr0:0X00000000 mmcr1:0X000800081002060A mmcra:0X00000001 #Group 132 pm_mrk_ulsflush, Mark unaligned load and store flushes event:0X0840 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X0841 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X0842 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 event:0X0843 mmcr0:0X00000000 mmcr1:0X0028000406C62020 mmcra:0X00000001 #Group 133 pm_mrk_misc, Misc marked instructions event:0X0850 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X0851 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X0852 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 event:0X0853 mmcr0:0X00000000 mmcr1:0X00080008CC062816 mmcra:0X00000001 #Group 134 pm_lsref_L1, Load/Store operations and L1 activity event:0X0860 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X0861 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X0862 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 event:0X0863 mmcr0:0X00000000 mmcr1:0X8033000C0E1A2020 mmcra:0X00000000 #Group 135 pm_lsref_L2L3, Load/Store operations and L2, L3 activity event:0X0870 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X0871 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X0872 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 event:0X0873 mmcr0:0X00000000 mmcr1:0X0033000C1C0E2020 mmcra:0X00000000 #Group 136 pm_lsref_tlbmiss, Load/Store operations and TLB misses event:0X0880 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X0881 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X0882 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 event:0X0883 mmcr0:0X00000000 mmcr1:0X00B0000080882020 mmcra:0X00000000 #Group 137 pm_Dmiss, Data cache misses event:0X0890 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X0891 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X0892 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 event:0X0893 mmcr0:0X00000000 mmcr1:0X0033000C1C0E1086 mmcra:0X00000000 #Group 138 pm_prefetchX, Prefetch events event:0X08A0 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X08A1 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X08A2 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 event:0X08A3 mmcr0:0X00000000 mmcr1:0X853300061ECCCE86 mmcra:0X00000000 #Group 139 pm_branchX, Branch operations event:0X08B0 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X08B1 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X08B2 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 event:0X08B3 mmcr0:0X00000000 mmcr1:0X8000000F0E0E0EC8 mmcra:0X00000000 #Group 140 pm_fpuX1, Floating point events by unit event:0X08C0 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X08C1 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X08C2 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 event:0X08C3 mmcr0:0X00000000 mmcr1:0X0000000DC2CA86C0 mmcra:0X00000000 #Group 141 pm_fpuX2, Floating point events by unit event:0X08D0 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X08D1 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X08D2 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 event:0X08D3 mmcr0:0X00000000 mmcr1:0X00000000828A828A mmcra:0X00000000 #Group 142 pm_fpuX3, Floating point events by unit event:0X08E0 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X08E1 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X08E2 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 event:0X08E3 mmcr0:0X00000000 mmcr1:0X00000000868E868E mmcra:0X00000000 #Group 143 pm_fpuX4, Floating point and L1 events event:0X08F0 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X08F1 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X08F2 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 event:0X08F3 mmcr0:0X00000000 mmcr1:0X0030000020102020 mmcra:0X00000000 #Group 144 pm_fpuX5, Floating point events event:0X0900 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X0901 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X0902 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 event:0X0903 mmcr0:0X00000000 mmcr1:0X0000000C2020868E mmcra:0X00000000 #Group 145 pm_fpuX6, Floating point events event:0X0910 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X0911 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X0912 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 event:0X0913 mmcr0:0X00000000 mmcr1:0X0000000010202010 mmcra:0X00000000 #Group 146 pm_fpuX7, Floating point events event:0X0920 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X0921 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X0922 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 event:0X0923 mmcr0:0X00000000 mmcr1:0X0000000220105010 mmcra:0X00000000 #Group 147 pm_hpmcount8, HPM group for set 9 event:0X0930 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X0931 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X0932 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 event:0X0933 mmcr0:0X00000000 mmcr1:0X000000001E281E10 mmcra:0X00000000 #Group 148 pm_hpmcount2, HPM group for set 2 event:0X0940 mmcr0:0X00000000 mmcr1:0X0430000412201220 mmcra:0X00000000 event:0X0941 mmcr0:0X00000000 mmcr1:0X0430000412201220 mmcra:0X00000000 event:0X0942 mmcr0:0X00000000 mmcr1:0X0430000412201220 mmcra:0X00000000 event:0X0943 mmcr0:0X00000000 mmcr1:0X0430000412201220 mmcra:0X00000000 #Group 149 pm_hpmcount3, HPM group for set 3 event:0X0950 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X0951 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X0952 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 event:0X0953 mmcr0:0X00000000 mmcr1:0X403000041EC21086 mmcra:0X00000000 #Group 150 pm_hpmcount4, HPM group for set 7 event:0X0960 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X0961 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X0962 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 event:0X0963 mmcr0:0X00000000 mmcr1:0X00B00000101E2020 mmcra:0X00000000 #Group 151 pm_flop, Floating point operations event:0X0970 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X0971 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X0972 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 event:0X0973 mmcr0:0X00000000 mmcr1:0X0000000010105050 mmcra:0X00000000 #Group 152 pm_eprof1, Group for use with eprof event:0X0980 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X0981 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X0982 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 event:0X0983 mmcr0:0X00000000 mmcr1:0X00300000121E108E mmcra:0X00000000 #Group 153 pm_eprof2, Group for use with eprof event:0X0990 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X0991 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X0992 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 event:0X0993 mmcr0:0X00000000 mmcr1:0X0030000012501220 mmcra:0X00000000 #Group 154 pm_flip, Group for flips event:0X09A0 mmcr0:0X00000000 mmcr1:0X000000021E105010 mmcra:0X00000000 event:0X09A1 mmcr0:0X00000000 mmcr1:0X000000021E105010 mmcra:0X00000000 event:0X09A2 mmcr0:0X00000000 mmcr1:0X000000021E105010 mmcra:0X00000000 event:0X09A3 mmcr0:0X00000000 mmcr1:0X000000021E105010 mmcra:0X00000000 #Group 155 pm_hpmcount5, HPM group for set 5 event:0X09B0 mmcr0:0X00000000 mmcr1:0X00B000001E881020 mmcra:0X00000000 event:0X09B1 mmcr0:0X00000000 mmcr1:0X00B000001E881020 mmcra:0X00000000 event:0X09B2 mmcr0:0X00000000 mmcr1:0X00B000001E881020 mmcra:0X00000000 event:0X09B3 mmcr0:0X00000000 mmcr1:0X00B000001E881020 mmcra:0X00000000 #Group 156 pm_hpmcount6, HPM group for set 6 event:0X09C0 mmcr0:0X00000000 mmcr1:0X003000001E122086 mmcra:0X00000000 event:0X09C1 mmcr0:0X00000000 mmcr1:0X003000001E122086 mmcra:0X00000000 event:0X09C2 mmcr0:0X00000000 mmcr1:0X003000001E122086 mmcra:0X00000000 event:0X09C3 mmcr0:0X00000000 mmcr1:0X003000001E122086 mmcra:0X00000000 #Group 157 pm_hpmcount7, HPM group for set 8 event:0X09D0 mmcr0:0X00000000 mmcr1:0X00030005120E1E0E mmcra:0X00000000 event:0X09D1 mmcr0:0X00000000 mmcr1:0X00030005120E1E0E mmcra:0X00000000 event:0X09D2 mmcr0:0X00000000 mmcr1:0X00030005120E1E0E mmcra:0X00000000 event:0X09D3 mmcr0:0X00000000 mmcr1:0X00030005120E1E0E mmcra:0X00000000 #Group 158 pm_ep_threshold, Thresholding event:0X09E0 mmcr0:0X00000000 mmcr1:0X0000000004121628 mmcra:0X00000001 event:0X09E1 mmcr0:0X00000000 mmcr1:0X0000000004121628 mmcra:0X00000001 event:0X09E2 mmcr0:0X00000000 mmcr1:0X0000000004121628 mmcra:0X00000001 event:0X09E3 mmcr0:0X00000000 mmcr1:0X0000000004121628 mmcra:0X00000001 #Group 159 pm_ep_mrk_grp1, Marked group events event:0X09F0 mmcr0:0X00000000 mmcr1:0X0000000004120A26 mmcra:0X00000001 event:0X09F1 mmcr0:0X00000000 mmcr1:0X0000000004120A26 mmcra:0X00000001 event:0X09F2 mmcr0:0X00000000 mmcr1:0X0000000004120A26 mmcra:0X00000001 event:0X09F3 mmcr0:0X00000000 mmcr1:0X0000000004120A26 mmcra:0X00000001 #Group 160 pm_ep_mrk_grp2, Marked group events event:0X0A00 mmcr0:0X00000000 mmcr1:0X410300032A12C822 mmcra:0X00000001 event:0X0A01 mmcr0:0X00000000 mmcr1:0X410300032A12C822 mmcra:0X00000001 event:0X0A02 mmcr0:0X00000000 mmcr1:0X410300032A12C822 mmcra:0X00000001 event:0X0A03 mmcr0:0X00000000 mmcr1:0X410300032A12C822 mmcra:0X00000001 #Group 161 pm_ep_mrk_dsource1, Marked data from event:0X0A10 mmcr0:0X00000000 mmcr1:0X010B000B0E124444 mmcra:0X00000001 event:0X0A11 mmcr0:0X00000000 mmcr1:0X010B000B0E124444 mmcra:0X00000001 event:0X0A12 mmcr0:0X00000000 mmcr1:0X010B000B0E124444 mmcra:0X00000001 event:0X0A13 mmcr0:0X00000000 mmcr1:0X010B000B0E124444 mmcra:0X00000001 #Group 162 pm_ep_mrk_dsource2, Marked data from event:0X0A20 mmcr0:0X00000000 mmcr1:0X010B00082E12E410 mmcra:0X00000001 event:0X0A21 mmcr0:0X00000000 mmcr1:0X010B00082E12E410 mmcra:0X00000001 event:0X0A22 mmcr0:0X00000000 mmcr1:0X010B00082E12E410 mmcra:0X00000001 event:0X0A23 mmcr0:0X00000000 mmcr1:0X010B00082E12E410 mmcra:0X00000001 #Group 163 pm_ep_mrk_dsource3, Marked data from event:0X0A30 mmcr0:0X00000000 mmcr1:0X010B000712484C4C mmcra:0X00000001 event:0X0A31 mmcr0:0X00000000 mmcr1:0X010B000712484C4C mmcra:0X00000001 event:0X0A32 mmcr0:0X00000000 mmcr1:0X010B000712484C4C mmcra:0X00000001 event:0X0A33 mmcr0:0X00000000 mmcr1:0X010B000712484C4C mmcra:0X00000001 #Group 164 pm_ep_mrk_dsource4, Marked data from event:0X0A40 mmcr0:0X00000000 mmcr1:0X010B000712462E42 mmcra:0X00000001 event:0X0A41 mmcr0:0X00000000 mmcr1:0X010B000712462E42 mmcra:0X00000001 event:0X0A42 mmcr0:0X00000000 mmcr1:0X010B000712462E42 mmcra:0X00000001 event:0X0A43 mmcr0:0X00000000 mmcr1:0X010B000712462E42 mmcra:0X00000001 #Group 165 pm_ep_mrk_dsource5, Marked data from event:0X0A50 mmcr0:0X00000000 mmcr1:0X010B000B3C124040 mmcra:0X00000001 event:0X0A51 mmcr0:0X00000000 mmcr1:0X010B000B3C124040 mmcra:0X00000001 event:0X0A52 mmcr0:0X00000000 mmcr1:0X010B000B3C124040 mmcra:0X00000001 event:0X0A53 mmcr0:0X00000000 mmcr1:0X010B000B3C124040 mmcra:0X00000001 #Group 166 pm_ep_mrk_dsource6, Marked data from event:0X0A60 mmcr0:0X00000000 mmcr1:0X010B000512460246 mmcra:0X00000001 event:0X0A61 mmcr0:0X00000000 mmcr1:0X010B000512460246 mmcra:0X00000001 event:0X0A62 mmcr0:0X00000000 mmcr1:0X010B000512460246 mmcra:0X00000001 event:0X0A63 mmcr0:0X00000000 mmcr1:0X010B000512460246 mmcra:0X00000001 #Group 167 pm_ep_mrk_dsource7, Marked data from event:0X0A70 mmcr0:0X00000000 mmcr1:0X010B0007124E3C4E mmcra:0X00000001 event:0X0A71 mmcr0:0X00000000 mmcr1:0X010B0007124E3C4E mmcra:0X00000001 event:0X0A72 mmcr0:0X00000000 mmcr1:0X010B0007124E3C4E mmcra:0X00000001 event:0X0A73 mmcr0:0X00000000 mmcr1:0X010B0007124E3C4E mmcra:0X00000001 #Group 168 pm_ep_mrk_lbmiss, Marked TLB and SLB misses event:0X0A80 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 event:0X0A81 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 event:0X0A82 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 event:0X0A83 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 #Group 169 pm_ep_mrk_dtlbref, Marked data TLB references event:0X0A90 mmcr0:0X00000000 mmcr1:0X020C0007120C0C0C mmcra:0X00000001 event:0X0A91 mmcr0:0X00000000 mmcr1:0X020C0007120C0C0C mmcra:0X00000001 event:0X0A92 mmcr0:0X00000000 mmcr1:0X020C0007120C0C0C mmcra:0X00000001 event:0X0A93 mmcr0:0X00000000 mmcr1:0X020C0007120C0C0C mmcra:0X00000001 #Group 170 pm_ep_mrk_dtlbmiss, Marked data TLB misses event:0X0AA0 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 event:0X0AA1 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 event:0X0AA2 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 event:0X0AA3 mmcr0:0X00000000 mmcr1:0X020C0007121A1A1A mmcra:0X00000001 #Group 171 pm_ep_mrk_lbref, Marked TLB and SLB references event:0X0AB0 mmcr0:0X00000000 mmcr1:0X063C000A0C120C8E mmcra:0X00000001 event:0X0AB1 mmcr0:0X00000000 mmcr1:0X063C000A0C120C8E mmcra:0X00000001 event:0X0AB2 mmcr0:0X00000000 mmcr1:0X063C000A0C120C8E mmcra:0X00000001 event:0X0AB3 mmcr0:0X00000000 mmcr1:0X063C000A0C120C8E mmcra:0X00000001 #Group 172 pm_ep_mrk_lsmiss, Marked load and store miss event:0X0AC0 mmcr0:0X00000000 mmcr1:0X000800081012060A mmcra:0X00000001 event:0X0AC1 mmcr0:0X00000000 mmcr1:0X000800081012060A mmcra:0X00000001 event:0X0AC2 mmcr0:0X00000000 mmcr1:0X000800081012060A mmcra:0X00000001 event:0X0AC3 mmcr0:0X00000000 mmcr1:0X000800081012060A mmcra:0X00000001 #Group 173 pm_ep_mrk_ulsflush, Mark unaligned load and store flushes event:0X0AD0 mmcr0:0X00000000 mmcr1:0X0020000006122020 mmcra:0X00000001 event:0X0AD1 mmcr0:0X00000000 mmcr1:0X0020000006122020 mmcra:0X00000001 event:0X0AD2 mmcr0:0X00000000 mmcr1:0X0020000006122020 mmcra:0X00000001 event:0X0AD3 mmcr0:0X00000000 mmcr1:0X0020000006122020 mmcra:0X00000001 #Group 174 pm_ep_mrk_misc1, Misc marked instructions event:0X0AE0 mmcr0:0X00000000 mmcr1:0X0000000012062816 mmcra:0X00000001 event:0X0AE1 mmcr0:0X00000000 mmcr1:0X0000000012062816 mmcra:0X00000001 event:0X0AE2 mmcr0:0X00000000 mmcr1:0X0000000012062816 mmcra:0X00000001 event:0X0AE3 mmcr0:0X00000000 mmcr1:0X0000000012062816 mmcra:0X00000001 #Group 175 pm_ep_mrk_misc2, Misc marked instructions event:0X0AF0 mmcr0:0X00000000 mmcr1:0X010B000612445EE4 mmcra:0X00000001 event:0X0AF1 mmcr0:0X00000000 mmcr1:0X010B000612445EE4 mmcra:0X00000001 event:0X0AF2 mmcr0:0X00000000 mmcr1:0X010B000612445EE4 mmcra:0X00000001 event:0X0AF3 mmcr0:0X00000000 mmcr1:0X010B000612445EE4 mmcra:0X00000001 #Group 176 pm_ep_mrk_misc3, Misc marked instructions event:0X0B00 mmcr0:0X00000000 mmcr1:0X053B0005124C8C0E mmcra:0X00000001 event:0X0B01 mmcr0:0X00000000 mmcr1:0X053B0005124C8C0E mmcra:0X00000001 event:0X0B02 mmcr0:0X00000000 mmcr1:0X053B0005124C8C0E mmcra:0X00000001 event:0X0B03 mmcr0:0X00000000 mmcr1:0X053B0005124C8C0E mmcra:0X00000001 #Group 177 pm_ep_mrk_misc4, Misc marked instructions event:0X0B10 mmcr0:0X00000000 mmcr1:0X030F00091A12E82E mmcra:0X00000001 event:0X0B11 mmcr0:0X00000000 mmcr1:0X030F00091A12E82E mmcra:0X00000001 event:0X0B12 mmcr0:0X00000000 mmcr1:0X030F00091A12E82E mmcra:0X00000001 event:0X0B13 mmcr0:0X00000000 mmcr1:0X030F00091A12E82E mmcra:0X00000001 #Group 178 pm_ep_mrk_misc5, Misc marked instructions event:0X0B20 mmcr0:0X00000000 mmcr1:0X022C00080C120286 mmcra:0X00000001 event:0X0B21 mmcr0:0X00000000 mmcr1:0X022C00080C120286 mmcra:0X00000001 event:0X0B22 mmcr0:0X00000000 mmcr1:0X022C00080C120286 mmcra:0X00000001 event:0X0B23 mmcr0:0X00000000 mmcr1:0X022C00080C120286 mmcra:0X00000001 #Group 179 pm_ep_mrk_misc6, Misc marked instructions event:0X0B30 mmcr0:0X00000000 mmcr1:0X022C00081A12888A mmcra:0X00000001 event:0X0B31 mmcr0:0X00000000 mmcr1:0X022C00081A12888A mmcra:0X00000001 event:0X0B32 mmcr0:0X00000000 mmcr1:0X022C00081A12888A mmcra:0X00000001 event:0X0B33 mmcr0:0X00000000 mmcr1:0X022C00081A12888A mmcra:0X00000001 #Group 180 pm_ep_mrk_misc7, Misc marked instructions event:0X0B40 mmcr0:0X00000000 mmcr1:0X012B000412408280 mmcra:0X00000001 event:0X0B41 mmcr0:0X00000000 mmcr1:0X012B000412408280 mmcra:0X00000001 event:0X0B42 mmcr0:0X00000000 mmcr1:0X012B000412408280 mmcra:0X00000001 event:0X0B43 mmcr0:0X00000000 mmcr1:0X012B000412408280 mmcra:0X00000001 #Group 181 pm_ep_mrk_misc8, Misc marked instructions event:0X0B50 mmcr0:0X00000000 mmcr1:0X00200000120A8486 mmcra:0X00000001 event:0X0B51 mmcr0:0X00000000 mmcr1:0X00200000120A8486 mmcra:0X00000001 event:0X0B52 mmcr0:0X00000000 mmcr1:0X00200000120A8486 mmcra:0X00000001 event:0X0B53 mmcr0:0X00000000 mmcr1:0X00200000120A8486 mmcra:0X00000001 #Group 182 pm_ep_mrk_misc9, Misc marked instructions event:0X0B60 mmcr0:0X00000000 mmcr1:0X0028000012AC8EEC mmcra:0X00000001 event:0X0B61 mmcr0:0X00000000 mmcr1:0X0028000012AC8EEC mmcra:0X00000001 event:0X0B62 mmcr0:0X00000000 mmcr1:0X0028000012AC8EEC mmcra:0X00000001 event:0X0B63 mmcr0:0X00000000 mmcr1:0X0028000012AC8EEC mmcra:0X00000001 #Group 183 pm_ep_mrk_misc10, Misc marked instructions event:0X0B70 mmcr0:0X00000000 mmcr1:0X0008000412C0E8E6 mmcra:0X00000001 event:0X0B71 mmcr0:0X00000000 mmcr1:0X0008000412C0E8E6 mmcra:0X00000001 event:0X0B72 mmcr0:0X00000000 mmcr1:0X0008000412C0E8E6 mmcra:0X00000001 event:0X0B73 mmcr0:0X00000000 mmcr1:0X0008000412C0E8E6 mmcra:0X00000001 #Group 184 pm_ep_mrk_misc11, Misc marked instructions event:0X0B80 mmcr0:0X00000000 mmcr1:0X01030003120A443C mmcra:0X00000001 event:0X0B81 mmcr0:0X00000000 mmcr1:0X01030003120A443C mmcra:0X00000001 event:0X0B82 mmcr0:0X00000000 mmcr1:0X01030003120A443C mmcra:0X00000001 event:0X0B83 mmcr0:0X00000000 mmcr1:0X01030003120A443C mmcra:0X00000001 #Group 185 pm_ep_mrk_misc12, Misc marked instructions event:0X0B90 mmcr0:0X00000000 mmcr1:0X0020000012501010 mmcra:0X00000001 event:0X0B91 mmcr0:0X00000000 mmcr1:0X0020000012501010 mmcra:0X00000001 event:0X0B92 mmcr0:0X00000000 mmcr1:0X0020000012501010 mmcra:0X00000001 event:0X0B93 mmcr0:0X00000000 mmcr1:0X0020000012501010 mmcra:0X00000001 #Group 186 pm_ep_mrk_misc13, Misc marked instructions event:0X0BA0 mmcr0:0X00000000 mmcr1:0X0103000B0E1236CC mmcra:0X00000001 event:0X0BA1 mmcr0:0X00000000 mmcr1:0X0103000B0E1236CC mmcra:0X00000001 event:0X0BA2 mmcr0:0X00000000 mmcr1:0X0103000B0E1236CC mmcra:0X00000001 event:0X0BA3 mmcr0:0X00000000 mmcr1:0X0103000B0E1236CC mmcra:0X00000001 #Group 187 pm_ep_mrk_misc14, Misc marked instructions event:0X0BB0 mmcr0:0X00000000 mmcr1:0X0000000012282828 mmcra:0X00000001 event:0X0BB1 mmcr0:0X00000000 mmcr1:0X0000000012282828 mmcra:0X00000001 event:0X0BB2 mmcr0:0X00000000 mmcr1:0X0000000012282828 mmcra:0X00000001 event:0X0BB3 mmcr0:0X00000000 mmcr1:0X0000000012282828 mmcra:0X00000001 #Group 188 pm_ep_mrk_misc15, Misc marked instructions event:0X0BC0 mmcr0:0X00000000 mmcr1:0X4000000412220A26 mmcra:0X00000001 event:0X0BC1 mmcr0:0X00000000 mmcr1:0X4000000412220A26 mmcra:0X00000001 event:0X0BC2 mmcr0:0X00000000 mmcr1:0X4000000412220A26 mmcra:0X00000001 event:0X0BC3 mmcr0:0X00000000 mmcr1:0X4000000412220A26 mmcra:0X00000001 oprofile-1.3.0/events/ppc64/power5++/unit_masks0000664000175000017500000000013612534404406016166 00000000000000# ppc64 Power5++ possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/events/x86-64/0000775000175000017500000000000013323173530012515 500000000000000oprofile-1.3.0/events/x86-64/family15h/0000775000175000017500000000000013323173530014314 500000000000000oprofile-1.3.0/events/x86-64/family15h/events0000664000175000017500000002350012534404406015465 00000000000000# AMD Family 15h processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2011 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD Family 15h Models 00h-0Fh Processors, # Publication# 42301, Revision 1.12, February 16, 2011 # # Revision: 1.4 # # ChangeLog: # 1.4: 11 August 2014 # - Remove IBS events due to missing support in Operf # # 1.3: 9 March 2011 # - Update to BKDG Rev 1.12 (still preliminary) # # 1.2: 25 Januray 2011 # - Updated to BKDG Rev 1.09 (still preliminary) # - Update minimum value for RETIRED_UOPS # # 1.1: 2 December 2010 # - Updated to BKDG Rev 1.06 (still preliminary) # # 1.0: 28 May 2010 # - Preliminary version event:0x000 counters:3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : FPU Pipe Assignment event:0x001 counters:3,4,5 um:zero minimum:500 name:CYCLES_FPU_EMPTY : FP Scheduler Empty event:0x003 counters:3 um:sse_ops minimum:500 name:RETIRED_SSE_OPS : Retired SSE/BNI Ops event:0x004 counters:3 um:move_ops minimum:500 name:MOVE_SCALAR_OPTIMIZATION : Number of Move Elimination and Scalar Op Optimization event:0x005 counters:3,4,5 um:serial_ops minimum:500 name:RETIRED_SERIALIZING_OPS : Retired Serializing Ops event:0x006 counters:3,4,5 um:zero minimum:500 name:BOTTOM_EXECUTE_OP : Number of Cycles that a Bottom-Execute uop is in the FP Scheduler event:0x020 counters:0,1,2,3,4,5 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment Register Loads event:0x021 counters:0,1,2,3,4,5 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Pipeline Restart Due to Self-Modifying Code event:0x022 counters:0,1,2,3,4,5 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Pipeline Restart Due to Probe Hit event:0x023 counters:0,1,2 um:loadq_storeq minimum:500 name:LOAD_Q_STORE_Q_FULL : Load Queue/Store Queue Full event:0x024 counters:0,1,2,3,4,5 um:lock_ops minimum:500 name:LOCKED_OPS : Locked Operations event:0x026 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH Instructions event:0x027 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_CPUID_INSTRUCTIONS : Retired CPUID Instructions event:0x029 counters:0,1,2,3,4,5 um:ls_dispatch minimum:500 name:LS_DISPATCH : LS Dispatch event:0x02a counters:0,1,2,3,4,5 um:store_to_load minimum:500 name:CANCELLED_STORE_TO_LOAD : Canceled Store to Load Forward Operations event:0x02b counters:0,1,2,3,4,5 um:zero minimum:500 name:SMIS_RECEIVED : SMIs Received event:0x030 counters:0,1,2,3,4,5 um:zero minimum:500 name:EXECUTED_CFLUSH_INST : Executed CLFLUSH Instructions event:0x040 counters:0,1,2,3,4,5 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data Cache Accesses event:0x041 counters:0,1,2,3,4,5 um:dcache_misses minimum:500 name:DATA_CACHE_MISSES : Data Cache Misses event:0x042 counters:0,1,2,3,4,5 um:dcache_refills minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data Cache Refills from L2 or System event:0x043 counters:0,1,2 um:zero minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data Cache Refills from System event:0x045 counters:0,1,2 um:unified_tlb_hit minimum:50000 name:UNIFIED_TLB_HIT : Unified TLB Hit event:0x046 counters:0,1,2 um:unified_tlb_miss minimum:500 name:UNIFIED_TLB_MISS : Unified TLB Miss event:0x047 counters:0,1,2,3,4,5 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses event:0x04b counters:0,1,2,3,4,5 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch Instructions Dispatched event:0x052 counters:0,1,2,3,4,5 um:soft_prefetch minimum:500 name:INEFFECTIVE_SW_PREFETCHES : Ineffective Software Prefetches event:0x065 counters:0,1,2 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory Requests by Type event:0x067 counters:0,1,2 um:dataprefetch minimum:500 name:DATA_PREFETCHER : Data Prefetcher event:0x068 counters:0,1,2 um:buffer_id minimum:500 name:MAB_REQS : MAB Requests event:0x069 counters:0,1,2 um:buffer_id minimum:500 name:MAB_WAIT : MAB Wait Cycles event:0x06c counters:0,1,2 um:systemreadresponse minimum:500 name:SYSTEM_READ_RESPONSES : Response From System on Cache Refills event:0x06d counters:0,1,2 um:octword_transfer minimum:500 name:OCTWORD_WRITE_TRANSFERS : Octwords Written to System event:0x076 counters:0,1,2 um:zero minimum:50000 name:CPU_CLK_UNHALTED : CPU Clocks not Halted event:0x07d counters:0,1,2 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 Cache event:0x07e counters:0,1,2 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 Cache Misses event:0x07f counters:0,1,2 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 Fill/Writeback event:0x165 counters:0,1,2 um:page_size_mismatches minimum:500 name:PAGE_SPLINTERING : Page Splintering event:0x16c counters:0,1,2 um:l2_prefetcher_trigger minimum:500 name:L2_PREFETCHER_TRIGGER : L2 Prefetcher Trigger Events event:0x080 counters:0,1,2 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction Cache Fetches event:0x081 counters:0,1,2 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction Cache Misses event:0x082 counters:0,1,2 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction Cache Refills from L2 event:0x083 counters:0,1,2 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction Cache Refills from System event:0x084 counters:0,1,2 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB Miss, L2 ITLB Hit event:0x085 counters:0,1,2 um:l1_l2_itlb_miss minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB Miss, L2 ITLB Miss event:0x086 counters:0,1,2 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE : Pipeline Restart Due to Instruction Stream Probe event:0x087 counters:0,1,2 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction Fetch Stall event:0x088 counters:0,1,2 um:zero minimum:500 name:RETURN_STACK_HITS : Return Stack Hits event:0x089 counters:0,1,2 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return Stack Overflows event:0x08b counters:0,1,2 um:zero minimum:500 name:INSTRUCTION_CACHE_VICTIMS : Instruction Cache Victims event:0x08c counters:0,1,2 um:icache_invalidated minimum:500 name:INSTRUCTION_CACHE_INVALIDATED : Instruction Cache Lines Invalidated event:0x099 counters:0,1,2 um:zero minimum:500 name:ITLB_RELOADS : ITLB Reloads event:0x09a counters:0,1,2 um:zero minimum:500 name:ITLB_RELOADS_ABORTED : ITLB Reloads Aborted event:0x0c0 counters:0,1,2,3,4,5 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired Instructions event:0x0c1 counters:0,1,2,3,4,5 um:zero minimum:50000 name:RETIRED_UOPS : Retired uops event:0x0c2 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired Branch Instructions event:0x0c3 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired Mispredicted Branch Instructions event:0x0c4 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired Taken Branch Instructions event:0x0c5 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired Taken Branch Instructions Mispredicted event:0x0c6 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired Far Control Transfers event:0x0c7 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired Branch Resyncs event:0x0c8 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired Near Returns event:0x0c9 counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired Near Returns Mispredicted event:0x0ca counters:0,1,2,3,4,5 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired Indirect Branches Mispredicted event:0x0cb counters:0,1,2,3,4,5 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP Instructions event:0x0cd counters:0,1,2,3,4,5 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Interrupts-Masked Cycles event:0x0ce counters:0,1,2,3,4,5 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Interrupts-Masked Cycles with Interrupt Pending event:0x0cf counters:0,1,2,3,4,5 um:zero minimum:500 name:INTERRUPTS_TAKEN : Interrupts Taken event:0x0d0 counters:0,1,2 um:zero minimum:500 name:DECODER_EMPTY : Decoder Empty event:0x0d1 counters:0,1,2 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch Stalls event:0x0d3 counters:0,1,2 um:zero minimum:500 name:DISPATCH_STALL_FOR_SERIALIZATION : Microsequencer Stall due to Serialization event:0x0d5 counters:0,1,2 um:zero minimum:500 name:DISPATCH_STALL_FOR_RETIRE_QUEUE_FULL : Dispatch Stall for Instruction Retire Q Full event:0x0d6 counters:0,1,2 um:zero minimum:500 name:DISPATCH_STALL_FOR_INT_SCHED_QUEUE_FULL : Dispatch Stall for Integer Scheduler Queue Full event:0x0d7 counters:0,1,2 um:zero minimum:500 name:DISPATCH_STALL_FOR_FPU_FULL : Dispatch Stall for FP Scheduler Queue Full event:0x0d8 counters:0,1,2 um:zero minimum:500 name:DISPATCH_STALL_FOR_LDQ_FULL : Dispatch Stall for LDQ Full event:0x0d9 counters:0,1,2 um:zero minimum:500 name:MICROSEQ_STALL_WAITING_FOR_ALL_QUIET : Microsequencer Stall Waiting for All Quiet event:0x0db counters:0,1,2,3,4,5 um:fpu_exceptions minimum:500 name:FPU_EXCEPTIONS : FPU Exceptions event:0x0dc counters:0,1,2,3,4,5 um:zero minimum:500 name:DR0_BREAKPOINTS : DR0 Breakpoint Match event:0x0dd counters:0,1,2,3,4,5 um:zero minimum:500 name:DR1_BREAKPOINTS : DR1 Breakpoint Match event:0x0de counters:0,1,2,3,4,5 um:zero minimum:500 name:DR2_BREAKPOINTS : DR2 Breakpoint Match event:0x0df counters:0,1,2,3,4,5 um:zero minimum:500 name:DR3_BREAKPOINTS : DR3 Breakpoint Match event:0x1cf counters:0,1,2,3,4,5 um:ibs_ops_tagged minimum:50000 name:IBS_OPS_TAGGED : Tagged IBS Ops event:0x1d8 counters:0,1,2,3,4,5 um:zero minimum:500 name:DISPATCH_STALL_FOR_STQ_FULL : Dispatch Stall for STQ Full oprofile-1.3.0/events/x86-64/family15h/unit_masks0000664000175000017500000001533012534404406016340 00000000000000# AMD Family 15h processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2011 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD Family 15h Models 00h-0Fh Processors, # Publication# 42301, Revision 1.12, February 16, 2011 # # Revision: 1.4 # # ChangeLog: # 1.4: 11 August 2014 # - Remove IBS events due to missing support in Operf # # 1.2: 25 Januray 2011 # - Updated to BKDG Rev 1.09 (still preliminary) # - Update minimum value for RETIRED_UOPS # # 1.1: 2 December 2010 # - Updated to BKDG Rev 1.06 (still preliminary) # # 1.0: 28 May 2010 # - Preliminary version name:zero type:mandatory default:0x00 0x00 No unit mask name:fpu_ops type:bitmask default:0xff 0x01 Total number uops assigned to Pipe 0 0x02 Total number uops assigned to Pipe 1 0x04 Total number uops assigned to Pipe 2 0x08 Total number uops assigned to Pipe 3 0x10 Total number dual-pipe uops assigned to Pipe 0 0x20 Total number dual-pipe uops assigned to Pipe 1 0x40 Total number dual-pipe uops assigned to Pipe 2 0x80 Total number dual-pipe uops assigned to Pipe 3 0xff All ops name:sse_ops type:bitmask default:0xff 0x01 Single Precision add/subtract FLOPS 0x02 Single precision multiply FLOPS 0x04 Single precision divide/square root FLOPS 0x08 Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS 0x10 Double precision add/subtract FLOPS 0x20 Double precision multiply FLOPS 0x40 Double precision divide/square root FLOPS 0x80 Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS name:move_ops type:bitmask default:0x0c 0x01 Number of SSE Move Ops 0x02 Number of SSE Move Ops eliminated 0x04 Number of Ops that are candidates for optimization 0x08 Number of Scalar ops optimized name:serial_ops type:bitmask default:0x0f 0x01 SSE bottom-executing uops retired 0x02 SSE control word mispredict traps due to mispredictions 0x04 x87 bottom-executing uops retired 0x08 x87 control word mispredict traps due to mispredictions name:segregload type:bitmask default:0x7f 0x01 ES register 0x02 CS register 0x04 SS register 0x08 DS register 0x10 FS register 0x20 GS register 0x40 HS register name:loadq_storeq type:bitmask default:0x03 0x01 Cycles that the load buffer is full 0x02 Cycles that the store buffer is full name:lock_ops type:bitmask default:0x01 0x01 Number of locked instructions executed 0x04 Cycles spent non-speculative phase (including cache miss penalty) 0x08 Cycles waiting for a cache hit (cache miss penalty) name:store_to_load type:bitmask default:0x01 0x01 Store is smaller than load or different starting byte but partial overlap name:dcache_misses type:bitmask default:0x01 0x01 First data cache miss or streaming store to a 64B cache line 0x02 First streaming store to a 64B cache line name:dcache_refills type:bitmask default:0x0b 0x01 Fill with good data. (Final valid status is valid) 0x02 Early valid status turned out to be invalid 0x08 Fill with read data error name:unified_tlb_hit type:bitmask default:0x77 0x01 4 KB unified TLB hit for data 0x02 2 MB unified TLB hit for data 0x04 1 GB unified TLB hit for data 0x10 4 KB unified TLB hit for instruction 0x20 2 MB unified TLB hit for instruction 0x40 1 GB unified TLB hit for instruction 0x07 All DTLB hits 0x70 All ITLB hits 0x77 All DTLB and ITLB hits name:unified_tlb_miss type:bitmask default:0x77 0x01 4 KB unified TLB miss for data 0x02 2 MB unified TLB miss for data 0x04 1 GB unified TLB miss for data 0x10 4 KB unified TLB miss for instruction 0x20 2 MB unified TLB miss for instruction 0x40 1 GB unified TLB miss for instruction 0x07 All DTLB misses 0x70 All ITLB misses 0x77 All DTLB and ITLB misses name:prefetch type:bitmask default:0x07 0x01 Load (Prefetch, PrefetchT0/T1/T2) 0x02 Store (PrefetchW) 0x04 NTA (PrefetchNTA) name:soft_prefetch type:bitmask default:0x09 0x01 Software prefetch hit in L1 data cache 0x08 Software prefetch hit in the L2 name:memreqtype type:bitmask default:0x83 0x01 Requests to non-cacheable (UC) memory 0x02 Requests to write-combining (WC) memory 0x80 Streaming store (SS) requests name:dataprefetch type:bitmask default:0x02 0x02 Prefetch attempts name:buffer_id type:bitmask default:0x01 0x01 MAB ID bit 0 0x02 MAB ID bit 1 0x04 MAB ID bit 2 0x08 MAB ID bit 3 0x10 MAB ID bit 4 0x20 MAB ID bit 5 0x40 MAB ID bit 6 0x80 MAB ID bit 7 name:systemreadresponse type:bitmask default:0x3f 0x01 Exclusive 0x02 Modified 0x04 Shared 0x08 Owned 0x10 Data Error 0x20 Modified unwritten name:octword_transfer type:bitmask default:0x01 0x01 Octword write transfer name:l2_internal type:bitmask default:0x47 0x01 IC fill 0x02 DC fill 0x04 TLB fill (page table walks) 0x08 NB probe request 0x10 Canceled request 0x40 L2 cache prefetcher request name:l2_req_miss type:bitmask default:0x17 0x01 IC fill 0x02 DC fill (includes possible replays, whereas PMCx041 does not) 0x04 TLB page table walks 0x10 L2 cache prefetcher request name:l2_fill type:bitmask default:0x07 0x01 L2 fills from system 0x02 L2 Writebacks to system (Clean and Dirty) 0x04 L2 Clean Writebacks to system name:page_size_mismatches type:bitmask default:0x07 0x01 Guest page size is larger than host page size when nested paging is enabled 0x02 Splintering due to MTRRs, IORRs, APIC, TOMs or other special address region 0x04 Host page size is larger than the guest page size name:l1_l2_itlb_miss type:bitmask default:0x07 0x01 Instruction fetches to a 4K page 0x02 Instruction fetches to a 2M page 0x04 Instruction fetches to a 1G page name:icache_invalidated type:bitmask default:0x0f 0x01 Non-SMC invalidating probe that missed on in-flight instructions 0x02 Non-SMC invalidating probe that hit on in-flight instructions 0x04 SMC invalidating probe that missed on in-flight instructions 0x08 SMC invalidating probe that hit on in-flight instructions name:fpu_instr type:bitmask default:0x07 0x01 x87 instructions 0x02 MMX(tm) instructions 0x04 SSE instructions (SSE,SSE2,SSE3,SSSE3,SSE4A,SSE4.1,SSE4.2,AVX,XOP,FMA4) name:fpu_exceptions type:bitmask default:0x1f 0x01 Total microfaults 0x02 Total microtraps 0x04 Int2Ext faults 0x08 Ext2Int faults 0x10 Bypass faults name:ibs_ops_tagged type:bitmask default:0x01 0x01 Number of ops tagged by IBS 0x02 Number of ops tagged by IBS that retired 0x04 Number of times op could not be tagged by IBS because of previous tagged op that has not retired name:ls_dispatch type:bitmask default:0x07 0x01 Loads 0x02 Stores 0x04 Load-op-Stores name:l2_prefetcher_trigger type:bitmask default:0x03 0x01 Load L1 miss seen by prefetcher 0x02 Store L1 miss seen by prefetcher oprofile-1.3.0/events/x86-64/family14h/0000775000175000017500000000000013323173530014313 500000000000000oprofile-1.3.0/events/x86-64/family14h/events0000664000175000017500000002321012534404406015462 00000000000000# AMD Family 14 processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2011 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD Family 14h Processors, # Publication# 43170, Revision 3.04, Feb 16, 2011 # # Revision: 1.3 # # ChangeLog: # 1.3: 11 August 2014 # - Remove IBS events due to missing support in Operf # # 1.2: 11 March 2011 # - Update to BKDG Rev.3.04 # # 1.1: 25 January 2011. # - Update to BKDG Revision 3.00 # - Update minimum value for RETIRED_UOPS # # 1.0: 29 November 2010. # - Preliminary version event:0x000 counters:0,1,2,3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : Dispatched FPU Operations event:0x001 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_FPU_EMPTY : Cycles in which the FPU is Empty event:0x002 counters:0,1,2,3 um:zero minimum:500 name:DISPATCHED_FPU_OPS_FAST_FLAG : Dispatched Fast Flag FPU Operations event:0x003 counters:0,1,2,3 um:sse_ops minimum:500 name:RETIRED_SSE_OPS : Retired SSE Operations event:0x004 counters:0,1,2,3 um:move_ops minimum:500 name:RETIRED_MOVE_OPS : Retired Move Ops event:0x005 counters:0,1,2,3 um:serial_ops minimum:500 name:RETIRED_SERIALIZING_OPS : Retired Serializing Ops event:0x011 counters:0,1,2,3 um:retired_x87_fp minimum:500 name:RETIRED_X87_FP_OPS : Retired x87 Floating Point Operations event:0x020 counters:0,1,2,3 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment Register Loads event:0x021 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Pipeline Restart Due to Self-Modifying Code event:0x022 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Pipeline Restart Due to Probe Hit event:0x023 counters:0,1,2,3 um:zero minimum:500 name:RSQ_FULL : RSQ Full event:0x024 counters:0,1,2,3 um:lock_ops minimum:500 name:LOCKED_OPS : Locked Operations event:0x026 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH Instructions event:0x027 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID_INSTRUCTIONS : Retired CPUID Instructions event:0x02a counters:0,1,2,3 um:store_to_load minimum:500 name:CANCELLED_STORE_TO_LOAD : Store to Load Forward Operations Block Loads event:0x040 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data Cache Accesses event:0x041 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data Cache Misses event:0x042 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data Cache Refills from L2 or Northbridge event:0x043 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data Cache Refills from the northbridge event:0x044 counters:0,1,2,3 um:moesi_gh minimum:500 name:DATA_CACHE_LINES_EVICTED : Data Cache Lines Evicted event:0x045 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB Miss and L2 DTLB Hit event:0x046 counters:0,1,2,3 um:l1_l2_dtlb_miss minimum:500 name:DTLB_MISS : DTLB Miss event:0x047 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses event:0x04b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch Instructions Dispatched event:0x04c counters:0,1,2,3 um:zero minimum:500 name:LOCKED_INSTRUCTIONS_DCACHE_MISSES : DCACHE Misses by Locked Instructions event:0x04d counters:0,1,2,3 um:l1_dtlb_hit minimum:500 name:L1_DTLB_HIT : L1 DTLB Hit event:0x052 counters:0,1,2,3 um:soft_prefetch minimum:500 name:INEFFECTIVE_SW_PREFETCHES : DCACHE Ineffective Software Prefetches event:0x054 counters:0,1,2,3 um:zero minimum:500 name:GLOBAL_TLB_FLUSHES : Global Page Invalidations event:0x065 counters:0,1,2,3 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory Requests by Type event:0x068 counters:0,1,2,3 um:mab_buffer minimum:500 name:MAB_REQS : MAB Requests event:0x069 counters:0,1,2,3 um:mab_buffer minimum:500 name:MAB_WAIT : MAB Wait Cycles event:0x06c counters:0,1,2,3 um:systemreadresponse minimum:500 name:NORTHBRIDGE_READ_RESPONSES : System Response by Coherence State event:0x076 counters:0,1,2,3 um:zero minimum:50000 name:CPU_CLK_UNHALTED : CPU Clocks not Halted event:0x07d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 Cache event:0x07e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 Cache Misses event:0x07f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 Fill/Writeback event:0x162 counters:0,1,2,3 um:pdc_miss minimum:500 name:PDC_MISS : PDC Miss event:0x080 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction Cache Fetches event:0x081 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction Cache Misses event:0x082 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction Cache Refills from L2 event:0x083 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction Cache Refills from System event:0x085 counters:0,1,2,3 um:l1_l2_itlb_miss minimum:500 name:ITLB_MISS : ITLB Miss event:0x087 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction Fetch Stall event:0x088 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_HITS : Return Stack Hits event:0x089 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return Stack Overflows event:0x08b counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_VICTIMS : Instruction Cache Victims event:0x08c counters:0,1,2,3 um:icache_invalidated minimum:500 name:INSTRUCTION_CACHE_INVALIDATED : Instruction Cache Lines Invalidated event:0x099 counters:0,1,2,3 um:zero minimum:500 name:ITLB_RELOADS : ITLB Reloads event:0x09a counters:0,1,2,3 um:zero minimum:500 name:ITLB_RELOADS_ABORTED : ITLB Reloads Aborted event:0x0c0 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired Instructions event:0x0c1 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_UOPS : Retired uops event:0x0c2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired Branch Instructions event:0x0c3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired Mispredicted Branch Instructions event:0x0c4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired Taken Branch Instructions event:0x0c5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired Taken Branch Instructions Mispredicted event:0x0c6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired Far Control Transfers event:0x0c7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired Branch Resyncs event:0x0c8 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired Near Returns event:0x0c9 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired Near Returns Mispredicted event:0x0ca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired Mispredicted Taken Branch Instructions due to Target Mismatch event:0x0cb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired a Floating Point Instruction event:0x0cd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Interrupts-Masked Cycles event:0x0ce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Interrupts-Masked Cycles with Interrupt Pending event:0x0cf counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_TAKEN : Interrupts Taken event:0x0db counters:0,1,2,3 um:fpu_exceptions minimum:500 name:FPU_EXCEPTIONS : FPU Exceptions event:0x0dc counters:0,1,2,3 um:zero minimum:500 name:DR0_BREAKPOINTS : DR0 Breakpoint Matches event:0x0dd counters:0,1,2,3 um:zero minimum:500 name:DR1_BREAKPOINTS : DR1 Breakpoint Matches event:0x0de counters:0,1,2,3 um:zero minimum:500 name:DR2_BREAKPOINTS : DR2 Breakpoint Matches event:0x0df counters:0,1,2,3 um:zero minimum:500 name:DR3_BREAKPOINTS : DR3 Breakpoint Matches event:0x0e0 counters:0,1,2,3 um:page_access minimum:500 name:DRAM_ACCESSES : DRAM Accesses event:0x0e1 counters:0,1,2,3 um:mem_page_overflow minimum:500 name:DCT0_PAGE_TABLE_EVENTS : DRAM Controller Page Table Events event:0x0e2 counters:0,1,2,3 um:slot_missed minimum:500 name:MEMORY_CONTROLLER_SLOT_MISSED : Memory Controller DRAM Command Slots Missed event:0x0e3 counters:0,1,2,3 um:turnaround minimum:500 name:MEMORY_CONTROLLER_TURNAROUNDS : Memory Controller Turnarounds event:0x0e4 counters:0,1,2,3 um:saturation minimum:500 name:MEMORY_CONTROLLER_RBD_QUEUE_EVENTS : Memory Controller RBD Queue Events event:0x0e8 counters:0,1,2,3 um:thermal_status minimum:500 name:THERMAL_STATUS : Thermal Status event:0x0e9 counters:0,1,2,3 um:cpiorequests minimum:500 name:CPU_IO_REQUESTS_TO_MEMORY_IO : CPU/IO Requests to Memory/IO event:0x0ea counters:0,1,2,3 um:cacheblock minimum:500 name:CACHE_BLOCK_COMMANDS : Cache Block Commands event:0x0eb counters:0,1,2,3 um:sizecmds minimum:500 name:SIZED_COMMANDS : Sized Commands event:0x0ec counters:0,1,2,3 um:probe minimum:500 name:PROBE_RESPONSES_AND_UPSTREAM_REQUESTS : Probe Responses and Upstream Requests event:0x0ee counters:0,1,2,3 um:gart minimum:500 name:DEV_EVENTS : DEV Events event:0x1f0 counters:0,1,2,3 um:mem_control_request minimum:500 name:MEMORY_CONTROLLER_REQUESTS : Memory Controller Requests event:0x1e9 counters:0,1,2,3 um:sideband_signals minimum:500 name:SIDEBAND_SIGNALS : Sideband Signals and Special Cycles event:0x1ea counters:0,1,2,3 um:interrupt_events minimum:500 name:INTERRUPT_EVENTS : Interrupt Events oprofile-1.3.0/events/x86-64/family14h/unit_masks0000664000175000017500000001660312534404406016343 00000000000000# AMD Family 14 processor performance unit masks # # Copyright OProfile authors # Copyright (c) 2006-2011 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD Family 14h Processors, # Publication# 43170, Revision 3.04, Feb 16, 2011 # # Revision: 1.3 # # ChangeLog: # 1.3: 11 August 2014 # - Remove IBS events due to missing support in Operf # # 1.2: 11 March 2011 # - Update to BKDG Rev.3.04 # # 1.1: 25 January 2011. # - Update to BKDG Revision 3.00 # - Update minimum value for RETIRED_UOPS # # 1.0: 29 November 2010. # - Preliminary version name:zero type:mandatory default:0x00 0x00 No unit mask name:fpu_ops type:bitmask default:0x03 0x01 Pipe0 (fadd, imul, mmx) ops 0x02 Pipe1 (fmul, store, mmx) ops 0x03 All ops name:sse_ops type:bitmask default:0x7f 0x01 Single Precision add/subtract ops 0x02 Single precision multiply ops 0x04 Single precision divide/square root ops 0x08 Double precision add/subtract ops 0x10 Double precision multiply ops 0x20 Double precision divide/square root ops 0x40 OP type: 0=uops 1=FLOPS name:move_ops type:bitmask default:0x0c 0x04 All other merging move uops 0x08 All other move uops name:serial_ops type:bitmask default:0x0f 0x01 SSE bottom-executing uops retired 0x02 SSE bottom-serializing uops retired 0x04 x87 bottom-executing uops retired 0x08 x87 bottom-serializing uops retired name:retired_x87_fp type:bitmask default:0x07 0x01 Add/subtract ops 0x02 Multiply ops 0x04 Divide and FSQRT ops name:segregload type:bitmask default:0x7f 0x01 ES register 0x02 CS register 0x04 SS register 0x08 DS register 0x10 FS register 0x20 GS register 0x40 HS register name:lock_ops type:bitmask default:0x07 0x01 Number of locked instructions executed 0x02 Number cycles to acquire bus lock 0x04 Number of cycles to unlock cache line (not including cache miss) name:store_to_load type:bitmask default:0x07 0x01 Address mismatches (starting byte not the same) 0x02 Store is smaller than load 0x04 Misaligned name:moess type:bitmask default:0x1e 0x01 Non-cacheable return of data 0x02 Shared 0x04 Exclusive 0x08 Owned 0x10 Modified 0x1e All cache states except non-cacheable name:moesi type:bitmask default:0x1f 0x01 Non-cacheable read data 0x02 Shared 0x04 Exclusive 0x08 Owned 0x10 Modified 0x1f All cache states name:moesi_gh type:bitmask default:0x1f 0x01 Evicted from probe 0x02 Shared eviction 0x04 Exclusive eviction 0x08 Owned eviction 0x10 Modified eviction name:l1_l2_dtlb_miss type:bitmask default:0x0f 0x01 Count stores that miss L1TLB 0x02 Count loads that miss L1TLB 0x04 Count stores that miss L2TLB 0x08 Count loads that miss L2TLB name:prefetch type:bitmask default:0x07 0x01 Load (Prefetch, PrefetchT0/T1/T2) 0x02 Store (PrefetchW) 0x04 NTA (PrefetchNTA) name:l1_dtlb_hit type:bitmask default:0x03 0x01 L1 4K TLB hit 0x02 L1 2M TLB hit name:soft_prefetch type:bitmask default:0x0f 0x01 Software prefetch hit in the data cache 0x02 Software prefetch hit a pending fill 0x04 Software prefetches that don't get a MAB 0x08 Software prefetch hit in L2 name:memreqtype type:bitmask default:0x83 0x01 Requests to non-cacheable (UC) memory 0x02 Requests to write-combining (WC) memory 0x80 Streaming store (SS) requests name:mab_buffer type:bitmask default:0x00 0x00 DC miss buffer 0 0x01 DC miss buffer 1 0x02 DC miss buffer 2 0x03 DC miss buffer 3 0x04 DC miss buffer 4 0x05 DC miss buffer 5 0x06 DC miss buffer 6 0x07 DC miss buffer 7 0x08 IC miss buffer 0 0x09 IC miss buffer 1 0x0a Any DC miss buffer 0x0b Any IC miss buffer name:systemreadresponse type:bitmask default:0x1f 0x01 Exclusive 0x02 Modified 0x04 Shared 0x08 Owned 0x10 Data Error 0x20 Change-to-Dirty success 0x40 Uncacheable name:l2_internal type:bitmask default:0x0b 0x01 IC fill 0x02 DC fill 0x08 Tag snoop request name:l2_req_miss type:bitmask default:0x03 0x01 IC fill 0x02 DC fill name:l2_fill type:bitmask default:0x03 0x01 L2 fills (victims from L1 caches) 0x02 L2 writebacks to system 0x04 IC attribute writes which access the L2 0x08 IC attribute writes which store into the L2 name:pdc_miss type:bitmask default:0x77 0x01 Host: PDE Level 0x02 Host: PDPE Level 0x04 Host: PML4E Level 0x10 Guest: PDE Level 0x20 Guest: PDPE Level 0x40 Guest: PML4E Level name:l1_l2_itlb_miss type:bitmask default:0x03 0x01 Instruction fetches to a 4K page 0x02 Instruction fetches to a 2M page name:icache_invalidated type:bitmask default:0x03 0x01 IC invalidate due to an LS probe 0x02 IC invalidate due to a BU probe name:fpu_instr type:bitmask default:0x03 0x01 x87 or MMX(tm) instruction was retired 0x02 SSE floating point instruction was retired (SSE, SSE2, SSE3, MNI) name:fpu_exceptions type:bitmask default:0x0f 0x01 x87 reclass microfaults 0x02 SSE retype microfaults 0x04 SSE reclass microfaults 0x08 SSE and x87 microtraps name:page_access type:bitmask default:0xc7 0x01 DCT0 Page Hit 0x02 DCT0 Page Miss 0x04 DCT0 Page Conflict 0x40 Write request 0x80 Read request name:mem_page_overflow type:bitmask default:0x01 0x01 DCT0 Page Table Overflow 0x02 DCT0 Number of stale table entry hits 0x04 DCT0 Page table idle cycle limit incremented 0x08 DCT0 Page table idle cycle limit decremented 0x10 DCT0 Page table is closed due to row inactivity name:slot_missed type:bitmask default:0x50 0x10 DCT0 RBD 0x40 DCT0 Prefetch name:turnaround type:bitmask default:0x03 0x01 DCT0 read-to-write turnaround 0x02 DCT0 write-to-read turnaround name:saturation type:bitmask default:0x0c 0x04 D18F2x94[DcqBypassMax] counter reached 0x08 Bank closed due to conflict with outstanding request in RBD queue name:thermal_status type:bitmask default:0xe5 0x01 MEMHOT_L assertions 0x04 Number of times the HTC transitions from inactive to active 0x20 Number of clocks HTC P-state is inactive 0x40 Number of clocks HTC P-state is active 0x80 PROCHOT_L asserted by external source and caused P-state change name:cpiorequests type:bitmask default:0x08 0x01 IO to IO 0x02 IO to Mem 0x04 CPU to IO 0x08 CPU to Mem name:cacheblock type:bitmask default:0x3d 0x01 Victim Block (Writeback) 0x04 Read Block (Dcache load miss refill) 0x08 Read Block Shared (Icache refill) 0x10 Read Block Modified (Dcache store miss refill) 0x20 Change-to-Dirty (first store to clean block already in cache) name:sizecmds type:bitmask default:0x3f 0x01 Non-Posted SzWr Byte (1-32 bytes) 0x02 Non-Posted SzWr DW (1-16 doublewords) 0x04 Posted SzWr Byte (1-32 bytes) 0x08 Posted SzWr DW (1-16 doublewords) 0x10 SzRd Byte (4 bytes) 0x20 SzRd DW (1-16 doublewords) name:probe type:bitmask default:0xbf 0x01 Probe miss 0x02 Probe hit clean 0x04 Probe hit dirty without memory cancel 0x08 Probe hit dirty with memory cancel 0x10 Upstream high priority reads 0x20 Upstream low priority reads 0x80 Upstream low priority writes name:gart type:bitmask default:0x70 0x10 DEV hit 0x20 DEV miss 0x40 DEV error name:mem_control_request type:bitmask default:0x78 0x08 32 Bytes Sized Writes 0x10 64 Bytes Sized Writes 0x20 32 Bytes Sized Reads 0x40 64 Byte Sized Reads name:sideband_signals type:bitmask default:0x1e 0x02 STOPGRANT 0x04 SHUTDOWN 0x08 WBINVD 0x10 INVD name:interrupt_events type:bitmask default:0xff 0x01 Fixed and LPA 0x02 LPA 0x04 SMI 0x08 NMI 0x10 INIT 0x20 STARTUP 0x40 INT 0x80 EOI oprofile-1.3.0/events/x86-64/family12h/0000775000175000017500000000000013323173530014311 500000000000000oprofile-1.3.0/events/x86-64/family12h/events0000664000175000017500000003051212534404406015463 00000000000000# AMD Family 12 processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2011 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD Family 12h Processors, # Publication# 41131, Revision 1.13, March 01, 2011 # # Revision: 1.3 # # ChangeLog: # 1.3: 11 August 2014 # - Remove IBS events due to missing operf support # # 1.2: 09 March 2011 # - Update with BKDG Rev.1.13 (preliminary) # # 1.1: 25 January 2010. # - Update minimum value for RETIRED_UOPS # - Update to BKDG Revision 1.12 # # 1.0: 08 December 2009. # - Preliminary version event:0x000 counters:0,1,2,3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : Dispatched FPU Operations event:0x001 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_FPU_EMPTY : Cycles in which the FPU is Empty event:0x002 counters:0,1,2,3 um:zero minimum:500 name:DISPATCHED_FPU_OPS_FAST_FLAG : Dispatched Fast Flag FPU Operations event:0x003 counters:0,1,2,3 um:sse_ops minimum:500 name:RETIRED_SSE_OPS : Retired SSE Operations event:0x004 counters:0,1,2,3 um:move_ops minimum:500 name:RETIRED_MOVE_OPS : Retired Move Ops event:0x005 counters:0,1,2,3 um:serial_ops minimum:500 name:RETIRED_SERIALIZING_OPS : Retired Serializing Ops event:0x006 counters:0,1,2,3 um:serial_ops_sched minimum:500 name:SERIAL_UOPS_IN_FP_SCHED : Number of Cycles that a Serializing uop is in the FP Scheduler event:0x020 counters:0,1,2,3 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment Register Loads event:0x021 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Pipeline Restart Due to Self-Modifying Code event:0x022 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Pipeline Restart Due to Probe Hit event:0x023 counters:0,1,2,3 um:zero minimum:500 name:LS_BUFFER_2_FULL_CYCLES : LS Buffer 2 Full event:0x024 counters:0,1,2,3 um:lock_ops minimum:500 name:LOCKED_OPS : Locked Operations event:0x026 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH Instructions event:0x027 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID_INSTRUCTIONS : Retired CPUID Instructions event:0x02a counters:0,1,2,3 um:store_to_load minimum:500 name:CANCELLED_STORE_TO_LOAD : Cancelled Store to Load Forward Operations event:0x02b counters:0,1,2,3 um:zero minimum:500 name:SMIS_RECEIVED : SMIs Received event:0x040 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data Cache Accesses event:0x041 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data Cache Misses event:0x042 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data Cache Refills from L2 or Northbridge event:0x043 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data Cache Refills from the Northbridge event:0x044 counters:0,1,2,3 um:moesi_gh minimum:500 name:DATA_CACHE_LINES_EVICTED : Data Cache Lines Evicted event:0x045 counters:0,1,2,3 um:l1_dtlb_miss_l2_hit minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB Miss and L2 DTLB Hit event:0x046 counters:0,1,2,3 um:l1_l2_dtlb_miss minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 DTLB and L2 DTLB Miss event:0x047 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses event:0x048 counters:0,1,2,3 um:zero minimum:500 name:MICRO_ARCH_LATE_CANCEL_ACCESS : Microarchitectural Late Cancel of an Access event:0x049 counters:0,1,2,3 um:zero minimum:500 name:MICRO_ARCH_EARLY_CANCEL_ACCESS : Microarchitectural Early Cancel of an Access event:0x04b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch Instructions Dispatched event:0x04c counters:0,1,2,3 um:locked_instruction_dcache_miss minimum:500 name:LOCKED_INSTRUCTIONS_DCACHE_MISSES : DCACHE Misses by Locked Instructions event:0x04d counters:0,1,2,3 um:l1_dtlb_hit minimum:500 name:L1_DTLB_HIT : L1 DTLB Hit event:0x052 counters:0,1,2,3 um:soft_prefetch minimum:500 name:INEFFECTIVE_SW_PREFETCHES : Ineffective Software Prefetches event:0x054 counters:0,1,2,3 um:zero minimum:500 name:GLOBAL_TLB_FLUSHES : Global TLB Flushes event:0x065 counters:0,1,2,3 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory Requests by Type event:0x067 counters:0,1,2,3 um:dataprefetch minimum:500 name:DATA_PREFETCHES : Data Prefetcher event:0x06c counters:0,1,2,3 um:systemreadresponse minimum:500 name:NORTHBRIDGE_READ_RESPONSES : Northbridge Read Responses by Coherency State event:0x06d counters:0,1,2,3 um:octword_transfer minimum:500 name:OCTWORD_WRITE_TRANSFERS : Octwords Written to System event:0x076 counters:0,1,2,3 um:zero minimum:50000 name:CPU_CLK_UNHALTED : CPU Clocks not Halted event:0x07d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 Cache event:0x07e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 Cache Misses event:0x07f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 Fill/Writeback event:0x165 counters:0,1,2,3 um:page_size_mismatches minimum:500 name:PAGE_SIZE_MISMATCHES : Page Size Mismatches event:0x080 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction Cache Fetches event:0x081 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction Cache Misses event:0x082 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction Cache Refills from L2 event:0x083 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction Cache Refills from System event:0x084 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB Miss, L2 ITLB Hit event:0x085 counters:0,1,2,3 um:l1_l2_itlb_miss minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB Miss, L2 ITLB Miss event:0x086 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE : Pipeline Restart Due to Instruction Stream Probe event:0x087 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction Fetch Stall event:0x088 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_HITS : Return Stack Hits event:0x089 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return Stack Overflows event:0x08b counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_VICTIMS : Instruction Cache Victims event:0x08c counters:0,1,2,3 um:icache_invalidated minimum:500 name:INSTRUCTION_CACHE_INVALIDATED : Instruction Cache Lines Invalidated event:0x099 counters:0,1,2,3 um:zero minimum:500 name:ITLB_RELOADS : ITLB Reloads event:0x09a counters:0,1,2,3 um:zero minimum:500 name:ITLB_RELOADS_ABORTED : ITLB Reloads Aborted event:0x0c0 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired Instructions event:0x0c1 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_UOPS : Retired uops event:0x0c2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired Branch Instructions event:0x0c3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired Mispredicted Branch Instructions event:0x0c4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired Taken Branch Instructions event:0x0c5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired Taken Branch Instructions Mispredicted event:0x0c6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired Far Control Transfers event:0x0c7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired Branch Resyncs event:0x0c8 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired Near Returns event:0x0c9 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired Near Returns Mispredicted event:0x0ca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired Indirect Branches Mispredicted event:0x0cb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX(tm)/FP Instructions event:0x0cd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Interrupts-Masked Cycles event:0x0ce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Interrupts-Masked Cycles with Interrupt Pending event:0x0cf counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_TAKEN : Interrupts Taken event:0x0d0 counters:0,1,2,3 um:zero minimum:500 name:DECODER_EMPTY : Decoder Empty event:0x0d1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch Stalls event:0x0d2 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_BRANCH_ABORT : Dispatch Stall for Branch Abort to Retire event:0x0d3 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SERIALIZATION : Dispatch Stall for Serialization event:0x0d4 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SEGMENT_LOAD : Dispatch Stall for Segment Load event:0x0d5 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_REORDER_BUFFER_FULL : Dispatch Stall for Reorder Buffer Full event:0x0d6 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_RESERVATION_STATION_FULL : Dispatch Stall for Reservation Station Full event:0x0d7 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FPU_FULL : Dispatch Stall for FPU Full event:0x0d8 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_LS_FULL : Dispatch Stall for LS Full event:0x0d9 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_WAITING_FOR_ALL_QUIET : Dispatch Stall Waiting for All Quiet event:0x0da counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RESYNC : Dispatch Stall for Far Transfer or Resync to Retire event:0x0db counters:0,1,2,3 um:fpu_exceptions minimum:500 name:FPU_EXCEPTIONS : FPU Exceptions event:0x0dc counters:0,1,2,3 um:zero minimum:500 name:DR0_BREAKPOINTS : DR0 Breakpoint Matches event:0x0dd counters:0,1,2,3 um:zero minimum:500 name:DR1_BREAKPOINTS : DR1 Breakpoint Matches event:0x0de counters:0,1,2,3 um:zero minimum:500 name:DR2_BREAKPOINTS : DR2 Breakpoint Matches event:0x0df counters:0,1,2,3 um:zero minimum:500 name:DR3_BREAKPOINTS : DR3 Breakpoint Matches event:0x1c0 counters:0,1,2,3 um:retired_x87_fp minimum:500 name:RETIRED_X87_FLOATING_POINT_OPERATIONS : Retired x87 Floating Point Operations event:0x1d3 counters:0,1,2,3 um:zero minimum:500 name:LFENCE_INSTRUCTIONS_RETIRED : LFENCE Instructions Retired event:0x1d4 counters:0,1,2,3 um:zero minimum:500 name:SFENCE_INSTRUCTIONS_RETIRED : SFENCE Instructions Retired event:0x1d5 counters:0,1,2,3 um:zero minimum:500 name:MFENCE_INSTRUCTIONS_RETIRED : MFENCE Instructions Retired event:0x0e0 counters:0,1,2,3 um:page_access minimum:500 name:DRAM_ACCESSES : DRAM Accesses event:0x0e1 counters:0,1,2,3 um:mem_page_overflow minimum:500 name:DCT0_PAGE_TABLE_EVENTS : DRAM Controller 0 Page Table Events event:0x0e2 counters:0,1,2,3 um:slot_missed minimum:500 name:MEMORY_CONTROLLER_SLOT_MISSED : Memory Controller DRAM Command Slots Missed event:0x0e3 counters:0,1,2,3 um:turnaround minimum:500 name:MEMORY_CONTROLLER_TURNAROUNDS : Memory Controller Turnarounds event:0x0e4 counters:0,1,2,3 um:rbd minimum:500 name:MEMORY_CONTROLLER_RBD_QUEUE_EVENTS : Memory Controller RBD Queue Events event:0x0e5 counters:0,1,2,3 um:dct1_page_table_events minimum:500 name:DCT1_PAGE_TABLE_EVENTS : DRAM Controller 1 Page Table Events event:0x0e8 counters:0,1,2,3 um:thermal_status minimum:500 name:THERMAL_STATUS : Thermal Status event:0x0e9 counters:0,1,2,3 um:cpiorequests minimum:500 name:CPU_IO_REQUESTS_TO_MEMORY_IO : CPU/IO Requests to Memory/IO event:0x0ea counters:0,1,2,3 um:cacheblock minimum:500 name:CACHE_BLOCK_COMMANDS : Cache Block Commands event:0x0eb counters:0,1,2,3 um:sizecmds minimum:500 name:SIZED_COMMANDS : Sized Commands event:0x0ec counters:0,1,2,3 um:probe minimum:500 name:PROBE_RESPONSES_AND_UPSTREAM_REQUESTS : Probe Responses and Upstream Requests event:0x0ee counters:0,1,2,3 um:gart minimum:500 name:DEV_EVENTS : DEV Events event:0x1f0 counters:0,1,2,3 um:mem_control_request minimum:500 name:MEMORY_CONTROLLER_REQUESTS : Memory Controller Requests event:0x1e9 counters:0,1,2,3 um:sideband_signals minimum:500 name:SIDEBAND_SIGNALS : Sideband Signals and Special Cycles event:0x1ea counters:0,1,2,3 um:interrupt_events minimum:500 name:INTERRUPT_EVENTS : Interrupt Events oprofile-1.3.0/events/x86-64/family12h/unit_masks0000664000175000017500000002173012534404406016336 00000000000000# AMD Family 12 processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2011 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD Family 12h Processors, # Publication# 41131, Revision 1.13, March 01, 2011 # # Revision: 1.3 # # ChangeLog: # 1.3: 11 August 2014 # - Remove IBS events due to missing operf support # # 1.2: 09 March 2011 # - Update with BKDG Rev.1.13 (preliminary) # # 1.1: 25 January 2010. # - Update minimum value for RETIRED_UOPS # - Update to BKDG Revision 1.12 # # 1.0: 08 December 2009. # - Preliminary version name:zero type:mandatory default:0x00 0x00 No unit mask name:moesi type:bitmask default:0x1f 0x01 (I)nvalid cache state 0x02 (S)hared cache state 0x04 (E)xclusive cache state 0x08 (O)wned cache state 0x10 (M)odified cache state 0x1f All cache states name:moess type:bitmask default:0x1e 0x01 Refill from northbridge 0x02 Shared-state line from L2 0x04 Exclusive-state line from L2 0x08 Owner-state line from L2 0x10 Modified-state line from L2 0x1e All cache states except refill from northbridge name:fpu_ops type:bitmask default:0x3f 0x01 Add pipe ops excluding load ops and SSE move ops 0x02 Multiply pipe ops excluding load ops and SSE move ops 0x04 Store pipe ops excluding load ops and SSE move ops 0x08 Add pipe load ops and SSE move ops 0x10 Multiply pipe load ops and SSE move ops 0x20 Store pipe load ops and SSE move ops 0x3f All ops name:segregload type:bitmask default:0x7f 0x01 ES register 0x02 CS register 0x04 SS register 0x08 DS register 0x10 FS register 0x20 GS register 0x40 HS register name:fpu_instr type:bitmask default:0x07 0x01 x87 instructions 0x02 MMX & 3DNow instructions 0x04 SSE instructions (SSE, SSE2, SSE3, and SSE4A) name:fpu_exceptions type:bitmask default:0x0f 0x01 x87 reclass microfaults 0x02 SSE retype microfaults 0x04 SSE reclass microfaults 0x08 SSE and x87 microtraps name:page_access type:bitmask default:0xff 0x01 DCT0 Page hit 0x02 DCT0 Page miss 0x04 DCT0 Page conflict 0x08 DCT1 Page hit 0x10 DCT1 Page miss 0x20 DCT1 Page Conflict 0x40 Write request 0x80 Read request name:mem_page_overflow type:bitmask default:0x03 0x01 DCT0 Page Table Overflow 0x02 DCT0 Number of stale table entry hits 0x04 DCT0 Page table idle cycle limit incremented 0x08 DCT0 Page table idle cycle limit decremented 0x10 DCT0 Page table is closed due to row inactivity name:turnaround type:bitmask default:0x1b 0x01 DCT0 read-to-write turnaround 0x02 DCT0 write-to-read turnaround 0x08 DCT1 read-to-write turnaround 0x10 DCT1 write-to-read turnaround name:rbd type:bitmask default:0x0c 0x04 D18F2x[1,0]94[DcqBypassMax] counter reached 0x08 Bank is closed due to bank conflict with an outstanding request in the RBD queue name:slot_missed type:bitmask default:0xf0 0x10 DCT0 RBD 0x20 DCT1 RBD 0x40 DCT0 Prefetch 0x80 DCT1 Prefetch name:sizecmds type:bitmask default:0x3f 0x01 Non-posted write byte (1-32 bytes) 0x02 Non-posted write DWORD (1-16 DWORDs) 0x04 Posted write byte (1-32 bytes) 0x08 Posted write DWORD (1-16 DWORDs) 0x10 Read byte (4 bytes) 0x20 Read DWORD (1-16 DWORDs) name:probe type:bitmask default:0xbf 0x01 Probe miss 0x02 Probe hit clean 0x04 Probe hit dirty without memory cancel 0x08 Probe hit dirty with memory cancel 0x10 Upstream high priority reads 0x20 Upstream low priority reads 0x80 Upstream low priority writes name:l2_internal type:bitmask default:0x3f 0x01 IC fill 0x02 DC fill 0x04 TLB fill (page table walks) 0x08 Tag snoop request 0x10 Canceled request 0x20 Hardware prefetch from data cache name:l2_req_miss type:bitmask default:0x0f 0x01 IC fill 0x02 DC fill (includes possible replays) 0x04 TLB page table walk 0x08 Hardware prefetch from data cache name:l2_fill type:bitmask default:0x03 0x01 L2 fills (victims from L1 caches, TLB page table walks and data prefetches) 0x02 L2 writebacks to system name:gart type:bitmask default:0x70 0x10 DEV hit 0x20 DEV miss 0x40 DEV error name:cpiorequests type:bitmask default:0x08 0x01 IO to IO 0x02 IO to Mem 0x04 CPU to IO 0x08 CPU to Mem name:cacheblock type:bitmask default:0x3d 0x01 Victim Block (Writeback) 0x04 Read Block (Dcache load miss refill) 0x08 Read Block Shared (Icache refill) 0x10 Read Block Modified (Dcache store miss refill) 0x20 Change-to-Dirty (first store to clean block already in cache) name:dataprefetch type:bitmask default:0x03 0x01 Cancelled prefetches 0x02 Prefetch attempts name:memreqtype type:bitmask default:0x87 0x01 Requests to non-cacheable (UC) memory 0x02 Requests to write-combining (WC) memory or WC buffer flushes to WB memory 0x04 Requests to cache-disabled (CD) memory 0x80 Streaming store (SS) requests name:systemreadresponse type:bitmask default:0x1f 0x01 Exclusive 0x02 Modified 0x04 Shared 0x08 Owned 0x10 Data Error name:l1_dtlb_miss_l2_hit type:bitmask default:0x07 0x01 L2 4K TLB hit 0x02 L2 2M TLB hit 0x04 L2 1G TLB hit name:l1_l2_dtlb_miss type:bitmask default:0x07 0x01 4K TLB reload 0x02 2M TLB reload 0x04 1G TLB reload name:prefetch type:bitmask default:0x07 0x01 Load (Prefetch, PrefetchT0/T1/T2) 0x02 Store (PrefetchW) 0x04 NTA (PrefetchNTA) name:locked_instruction_dcache_miss type:bitmask default:0x02 0x02 Data cache misses by locked instructions name:octword_transfer type:bitmask default:0x01 0x01 Octword write transfer name:thermal_status type:bitmask default:0xe5 0x01 MEMHOT_L assertions 0x04 Number of times the HTC transitions from inactive to active 0x20 Number of clocks HTC P-state is inactive 0x40 Number of clocks HTC P-state is active 0x80 PROCHOT_L asserted by external source and caused a P-state change name:mem_control_request type:bitmask default:0x78 0x01 Write requests 0x02 Read Requests 0x04 Prefetch Requests 0x08 32 Bytes Sized Writes 0x10 64 Bytes Sized Writes 0x20 32 Bytes Sized Reads 0x40 64 Byte Sized Reads 0x80 Read requests while writes pending in DCQ name:lock_ops type:bitmask default:0x0f 0x01 Number of locked instructions executed 0x02 Cycles in speculative phase 0x04 Cycles in non-speculative phase (including cache miss penalty) 0x08 Cache miss penalty in cycles name:sse_ops type:bitmask default:0x7f 0x01 Single Precision add/subtract ops 0x02 Single precision multiply ops 0x04 Single precision divide/square root ops 0x08 Double precision add/subtract ops 0x10 Double precision multiply ops 0x20 Double precision divide/square root ops 0x40 OP type: 0=uops 1=FLOPS name:move_ops type:bitmask default:0x0f 0x01 Merging low quadword move uops 0x02 Merging high quadword move uops 0x04 All other merging move uops 0x08 All other move uops name:serial_ops type:bitmask default:0x0f 0x01 SSE bottom-executing uops retired 0x02 SSE bottom-serializing uops retired 0x04 x87 bottom-executing uops retired 0x08 x87 bottom-serializing uops retired name:serial_ops_sched type:bitmask default:0x03 0x01 Number of cycles a bottom-execute uops in FP scheduler 0x02 Number of cycles a bottom-serializing uops in FP scheduler name:store_to_load type:bitmask default:0x07 0x01 Address mismatches (starting byte not the same) 0x02 Store is smaller than load 0x04 Misaligned name:moesi_gh type:bitmask default:0x1f 0x01 (I)nvalid cache state 0x02 (S)hared cache state 0x04 (E)xclusive cache state 0x08 (O)wned cache state 0x10 (M)odified cache state 0x20 Cache line evicted brought into the cache by PrefetchNTA 0x40 Cache line evicted not brought into the cache by PrefetchNTA name:l1_dtlb_hit type:bitmask default:0x07 0x01 L1 4K TLB hit 0x02 L1 2M TLB hit 0x04 L1 1G TLB hit name:soft_prefetch type:bitmask default:0x09 0x01 Software prefetch hit in L1 0x08 Software prefetch hit in L2 name:l1_l2_itlb_miss type:bitmask default:0x03 0x01 Instruction fetches to a 4K page 0x02 Instruction fetches to a 2M page name:icache_invalidated type:bitmask default:0x03 0x01 Invalidating probe that did not hit any in-flight instructions 0x02 Invalidating probe that hit one or more in-flight instructions 0x04 SMC that did not hit any in-flight instructions 0x08 SMC that hit one or more in-flight instructions name:page_size_mismatches type:bitmask default:0x07 0x01 Guest page size is larger than the host page size 0x02 MTRR mismatch 0x04 Host page size is larger than the guest page size name:retired_x87_fp type:bitmask default:0x07 0x01 Add/subtract ops 0x02 Multiply ops 0x04 Divide ops name:dct1_page_table_events type:bitmask default:0x1f 0x01 DCT1 Page Table Overflow 0x02 DCT1 Number of stale table entry hits 0x04 DCT1 Page table idle cycle limit incremented 0x08 DCT1 Page table idle cycle limit decremented 0x10 DCT1 Page table is closed due to row inactivity name:sideband_signals type:bitmask default:0x1e 0x02 STOPGRANT 0x04 SHUTDOWN 0x08 WBINVD 0x10 INVD name:interrupt_events type:bitmask default:0xff 0x01 Fixed and LPA 0x02 LPA 0x04 SMI 0x08 NMI 0x10 INIT 0x20 STARTUP 0x40 INT 0x80 EOI oprofile-1.3.0/events/x86-64/family11h/0000775000175000017500000000000013323173530014310 500000000000000oprofile-1.3.0/events/x86-64/family11h/events0000664000175000017500000002606412534404406015471 00000000000000# # AMD Athlon(tm)64 and AMD Opteron(tm) processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2008 Advanced Micro Devices # Contributed by Ray Bryant # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Source : BIOS and Kernel Developer's Guide for AMD Family 11h Processors, # Publication# 41256, Revision 3.00, July 07, 2008 # # Updated on 11 November 2008: # Description : Prepare for Oprofile patch submission # Signed off : Suravee Suthikulpanit # # Updated on 20 February 2008: # Description : Added events for AMD Family 11h processors and proofread # WRT the latest BKDG # # Floating point events event:0x00 counters:0,1,2,3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : Dispatched FPU ops event:0x01 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_NO_FPU_OPS_RETIRED : Cycles in which the FPU is empty event:0x02 counters:0,1,2,3 um:zero minimum:500 name:DISPATCHED_FPU_OPS_FAST_FLAG : Dispatched FPU ops that use the fast flag interface # Load, Store, and TLB events event:0x20 counters:0,1,2,3 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment register loads event:0x21 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Micro-architectural re-sync caused by self modifying code event:0x22 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Micro-architectural re-sync caused by snoop event:0x23 counters:0,1,2,3 um:zero minimum:500 name:LS_BUFFER_2_FULL_CYCLES : Cycles LS Buffer 2 full event:0x24 counters:0,1,2,3 um:locked_ops minimum:500 name:LOCKED_OPS : Locked operations # Execution Unit Events # Data Cache event event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses # Event 0x42 with unit mask 0x01 counts same events as event select 0x43 event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_SYSTEM : Data cache refills from L2 or system event:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_SYSTEM : Data cache refills from system event:0x44 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_LINES_EVICTED : Data cache lines evicted event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses event:0x47 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses event:0x48 counters:0,1,2,3 um:zero minimum:500 name:MICROARCHITECTURAL_LATE_CANCEL_OF_AN_ACCESS : Micro-architectural late cancel of an access event:0x49 counters:0,1,2,3 um:zero minimum:500 name:MICROARCHITECTURAL_EARLY_CANCEL_OF_AN_ACCESS : Micro-architectural early cancel of an access event:0x4a counters:0,1,2,3 um:ecc minimum:500 name:SCRUBBER_SINGLE_BIT_ECC_ERRORS : One bit ECC error recorded by scrubber event:0x4b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch instructions dispatched event:0x4c counters:0,1,2,3 um:dcachemisslocked minimum:500 name:DCACHE_MISS_LOCKED_INSTRUCTIONS : DCACHE misses by locked instructions # L2 Cache and System Interface events event:0x65 counters:0,1,2,3 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory requests by type event:0x67 counters:0,1,2,3 um:dataprefetch minimum:500 name:DATA_PREFETCHES : Data prefetcher event:0x6c counters:0,1,2,3 um:systemreadresponse minimum:500 name:SYSTEM_READ_RESPONSES : System read responses by coherency state event:0x6d counters:0,1,2,3 um:writtentosystem minimum:500 name:QUADWORD_WRITE_TRANSFERS : Quadwords written to system event:0x7d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 cache event:0x7e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 cache misses event:0x7f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 fill/writeback # Instruction Cache events event:0x80 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction cache fetches event:0x81 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction cache misses event:0x82 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction cache refills from L2 event:0x83 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction cache refills from system event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB miss event:0x86 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE : Pipeline restart due to instruction stream probe event:0x87 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction fetch stall event:0x88 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_HITS : Return stack hits event:0x89 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return stack overflows event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CFLUSH : Retired CLFLUSH instructions event:0x27 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID : Retired CPUID instructions event:0x76 counters:0,1,2,3 um:zero minimum:3000 name:CPU_CLK_UNHALTED : Cycles outside of halt state # Execution Unit events event:0xc0 counters:0,1,2,3 um:zero minimum:3000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs) event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : Retired micro-ops event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts) event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions event:0xc4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired taken branch instructions event:0xc5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired taken branches mispredicted event:0xc6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired far control transfers event:0xc7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired branches resyncs (only non-control transfer branches) event:0xc8 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired near returns event:0xc9 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired near returns mispredicted event:0xca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired indirect branches mispredicted event:0xcb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP instructions event:0xcc counters:0,1,2,3 um:fpu_fastpath minimum:500 name:RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS : Retired FastPath double-op instructions event:0xcd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Cycles with interrupts masked (IF=0) event:0xce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Cycles with interrupts masked while interrupt pending event:0xcf counters:0,1,2,3 um:zero minimum:10 name:INTERRUPTS_TAKEN : Number of taken hardware interrupts event:0xd0 counters:0,1,2,3 um:zero minimum:500 name:DECODER_EMPTY : Nothing to dispatch (decoder empty) event:0xd1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch stalls event:0xd2 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_BRANCH_ABORT : Dispatch stall from branch abort to retire event:0xd3 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SERIALIZATION : Dispatch stall for serialization event:0xd4 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SEGMENT_LOAD : Dispatch stall for segment load event:0xd5 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_REORDER_BUFFER_FULL : Dispatch stall for reorder buffer full event:0xd6 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_RESERVATION_STATION_FULL : Dispatch stall when reservation stations are full event:0xd7 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FPU_FULL : Dispatch stall when FPU is full event:0xd8 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_LS_FULL : Dispatch stall when LS is full event:0xd9 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_WAITING_FOR_ALL_QUIET : Dispatch stall when waiting for all to be quiet event:0xda counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RESYNC : Dispatch stall for far transfer or resync to retire event:0xdb counters:0,1,2,3 um:fpu_exceptions minimum:1 name:FPU_EXCEPTIONS : FPU exceptions event:0xdc counters:0,1,2,3 um:zero minimum:1 name:DR0_BREAKPOINTS : Number of breakpoints for DR0 event:0xdd counters:0,1,2,3 um:zero minimum:1 name:DR1_BREAKPOINTS : Number of breakpoints for DR1 event:0xde counters:0,1,2,3 um:zero minimum:1 name:DR2_BREAKPOINTS : Number of breakpoints for DR2 event:0xdf counters:0,1,2,3 um:zero minimum:1 name:DR3_BREAKPOINTS : Number of breakpoints for DR3 # Memory Controller events event:0xe0 counters:0,1,2,3 um:dramaccess minimum:500 name:DRAM_ACCESSES : DRAM accesses event:0xe1 counters:0,1,2,3 um:dramcontroller minimum:500 name:DRAM_CONTROLLER_PAGE_TABLE_EVENTS : DRAM Controller Page Table Events event:0xe3 counters:0,1,2,3 um:turnaround minimum:500 name:MEMORY_CONTROLLER_TURNAROUNDS : Memory controller turnarounds event:0xe4 counters:0,1,2,3 um:rbdqueue minimum:500 name:MEMORY_CONTROLLER_RBD_QUEUE_EVENTS : Memory controller RBD queue events event:0xe8 counters:0,1,2,3 um:thermalstatus minimum:500 name:THERMAL_STATUS : Thermal status event:0xe9 counters:0,1,2,3 um:cpiorequests minimum:500 name:CPU_IO_REQUESTS_TO_MEMORY_IO : CPU/IO requests to memory/IO event:0xea counters:0,1,2,3 um:cacheblock minimum:500 name:CACHE_BLOCK_COMMANDS : Cache block commands event:0xeb counters:0,1,2,3 um:sizecmds minimum:500 name:SIZED_COMMANDS : Sized commands event:0xec counters:0,1,2,3 um:probe minimum:500 name:PROBE_RESPONSES_AND_UPSTREAM_REQUESTS : Probe responses and upstream requests event:0xee counters:0,1,2,3 um:devevents minimum:500 name:DEV_EVENTS : DEV events event:0x1f0 counters:0,1,2,3 um:memory_controller_requests minimum:500 name:MEMORY_CONTROLLER_REQUESTS : Memory controller requests event:0x1e9 counters:0,1,2,3 um:sideband_signals_and_special_cycles minimum:500 name:SIDEBAND_SIGNALS_AND_SPECIAL_CYCLES : Sideband Signals and Special Cycles event:0x1ea counters:0,1,2,3 um:interrupt_events minimum:500 name:INTERRUPT_EVENTS : Interrupt Events # Link events event:0xf6 counters:0,1,2,3 um:httransmit minimum:500 name:HYPERTRANSPORT_LINK_0_TRANSMIT_BANDWIDTH : HyperTransport(tm) link 0 transmit bandwidth oprofile-1.3.0/events/x86-64/family11h/unit_masks0000664000175000017500000001702112534404406016333 00000000000000# # AMD Athlon(tm)64 and AMD Opteron(tm) processor unit masks # # Copyright OProfile authors # Copyright (c) Advanced Micro Devices, 2006-2008 # Contributed by Ray Bryant , and others. # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Source : BIOS and Kernel Developer's Guide for AMD Family 11h Processors, # Publication# 41256, Revision 3.00, July 07, 2008 # # Updated on 11 November 2008: # Description : Prepare for Oprofile patch submission # Signed off : Suravee Suthikulpanit # # Updated on 20 February 2008: # Description : Added events for AMD Family 11h processors and proofread # WRT the latest BKDG # name:zero type:mandatory default:0x0 0x0 No unit mask name:moesi type:bitmask default:0x1f 0x01 (I)nvalid cache state 0x02 (S)hared cache state 0x04 (E)xclusive cache state 0x08 (O)wned cache state 0x10 (M)odified cache state 0x1f All cache states name:moess type:bitmask default:0x1e 0x01 refill from system 0x02 (S)hared cache state from L2 0x04 (E)xclusive cache state from L2 0x08 (O)wned cache state from L2 0x10 (M)odified cache state from L2 0x1e All cache states except Invalid name:fpu_ops type:bitmask default:0x3f 0x01 Add pipe ops 0x02 Multiply pipe 0x04 Store pipe ops 0x08 Add pipe load ops 0x10 Multiply pipe load ops 0x20 Store pipe load ops name:segregload type:bitmask default:0x7f 0x01 ES register 0x02 CS register 0x04 SS register 0x08 DS register 0x10 FS register 0x20 GS register 0x40 HS register name:ecc type:bitmask default:0x03 0x01 Scrubber error 0x02 Piggyback scrubber errors name:prefetch type:bitmask default:0x07 0x01 Load 0x02 Store 0x04 NTA name:fpu_instr type:bitmask default:0x0f 0x01 x87 instructions 0x02 MMX & 3DNow instructions 0x04 Packed SSE & SSE2 instructions 0x08 Packed scalar SSE & SSE2 instructions name:fpu_fastpath type:bitmask default:0x07 0x01 With low op in position 0 0x02 With low op in position 1 0x04 With low op in position 2 name:fpu_exceptions type:bitmask default:0x0f 0x01 x87 reclass microfaults 0x02 SSE retype microfaults 0x04 SSE reclass microfaults 0x08 SSE and x87 microtraps name:dramaccess type:bitmask default:0xff 0x01 DCT0 Page hit 0x02 DCT0 Page miss 0x04 DCT0 Page conflict 0x08 DCT1 Page hit 0x10 DCT1 Page miss 0x20 DCT1 Page conflict 0x40 Write request 0x80 Read request name:dramcontroller type:bitmask default:0x0f 0x01 DCT Page Table Overflow 0x02 Number of stale table entry hits (hit on a page closed too soon) 0x04 Page table idle cycle limit incremented 0x08 Page table idle cycle limit decremented name:turnaround type:bitmask default:0x3f 0x01 DCT0 Read to write turnaround 0x02 DCT0 Write to read turnaround 0x04 DCT0 DIMM (chip select) turnaround 0x08 DCT1 Read to write turnaround 0x10 DCT1 Write to read turnaround 0x20 DCT1 DIMM (chip select) turnaround name:rbdqueue type:bitmask default:0x04 0x04 F2x[1,0]94[DcqBypassMax] counter reached name:sizecmds type:bitmask default:0x3f 0x01 Non-posted write byte (1-32 bytes) 0x02 Non-posted write DWORD (1-16 DWORDs) 0x04 Posted write byte (1-32 bytes) 0x08 Posted write DWORD (1-16 DWORDs) 0x10 Read byte (4 bytes) 0x20 Read DWORD (1-16 DWORDs) name:probe type:bitmask default:0x0f 0x01 Probe miss 0x02 Probe hit clean 0x04 Probe hit dirty without memory cancel 0x08 Probe hit dirty with memory cancel 0x10 Upstream display refresh/ISOC reads 0x20 Upstream non-display refresh reads 0x40 Upstream ISOC writes 0x80 Upstream non-ISOC writes name:l2_internal type:bitmask default:0x1f 0x01 IC fill 0x02 DC fill 0x04 TLB fill (page table walk) 0x08 Tag snoop request 0x10 Cancelled request name:l2_req_miss type:bitmask default:0x07 0x01 IC fill 0x02 DC fill 0x04 TLB page table walk name:l2_fill type:bitmask default:0x03 0x01 L2 fills (victims from L1 caches, TLB page table walks and data prefetches) 0x02 L2 writebacks to system name:devevents type:bitmask default:0x70 0x10 DEV hit 0x20 DEV miss 0x40 DEV error name:cpiorequests type:bitmask default:0xa2 0xa1 Requests Local I/O to Local I/O 0xa2 Requests Local I/O to Local Memory 0xa3 Requests Local I/O to Local (I/O or Mem) 0xa4 Requests Local CPU to Local I/O 0xa5 Requests Local (CPU or I/O) to Local I/O 0xa8 Requests Local CPU to Local Memory 0xaa Requests Local (CPU or I/O) to Local Memory 0xac Requests Local CPU to Local (I/O or Mem) 0xaf Requests Local (CPU or I/O) to Local (I/O or Mem) 0x91 Requests Local I/O to Remote I/O 0x92 Requests Local I/O to Remote Memory 0x93 Requests Local I/O to Remote (I/O or Mem) 0x94 Requests Local CPU to Remote I/O 0x95 Requests Local (CPU or I/O) to Remote I/O 0x98 Requests Local CPU to Remote Memory 0x9a Requests Local (CPU or I/O) to Remote Memory 0x9c Requests Local CPU to Remote (I/O or Mem) 0x9f Requests Local (CPU or I/O) to Remote (I/O or Mem) 0xb1 Requests Local I/O to Any I/O 0xb2 Requests Local I/O to Any Memory 0xb3 Requests Local I/O to Any (I/O or Mem) 0xb4 Requests Local CPU to Any I/O 0xb5 Requests Local (CPU or I/O) to Any I/O 0xb8 Requests Local CPU to Any Memory 0xba Requests Local (CPU or I/O) to Any Memory 0xbc Requests Local CPU to Any (I/O or Mem) 0xbf Requests Local (CPU or I/O) to Any (I/O or Mem) 0x61 Requests Remote I/O to Local I/O 0x64 Requests Remote CPU to Local I/O 0x65 Requests Remote (CPU or I/O) to Local I/O name:cacheblock type:bitmask default:0x3d 0x01 Victim Block (Writeback) 0x04 Read Block (Dcache load miss refill) 0x08 Read Block Shared (Icache refill) 0x10 Read Block Modified (Dcache store miss refill) 0x20 Change to Dirty (first store to clean block already in cache) name:dataprefetch type:bitmask default:0x03 0x01 Cancelled prefetches 0x02 Prefetch attempts name:memreqtype type:bitmask default:0x83 0x01 Requests to non-cacheable (UC) memory 0x02 Requests to write-combining (WC) memory or WC buffer flushes to WB memory 0x80 Streaming store (SS) requests name:systemreadresponse type:bitmask default:0x7 0x01 Exclusive 0x02 Modified 0x04 Shared 0x08 Data Error name:writtentosystem type:bitmask default:0x1 0x01 Quadword write transfer # BKDG 3.28 does not include unit_mask of 0x01 for "accesses by Locked instructions" name:dcachemisslocked type:bitmask default:0x02 0x02 Data cache misses by locked instructions name:locked_ops type:bitmask default:0x04 0x01 The number of locked instructions executed 0x02 The number of cycles spent in speculative phase 0x04 The number of cycles spent in non-speculative phase (including cache miss penalty) name:thermalstatus type:bitmask default:0x80 0x01 Number of clocks MEMHOT_L is asserted 0x04 Number of times the HTC transitions from inactive to active 0x20 Number of clocks HTC P-state is inactive 0x40 Number of clocks HTC P-state is active 0x80 PROCHOT_L asserted by an external source and P-state change occurred name:memory_controller_requests type:bitmask default:0x78 0x08 32 Bytes Sized Writes 0x10 64 Bytes Sized Writes 0x20 32 Bytes Sized Reads 0x40 64 Bytes Sized Reads name:sideband_signals_and_special_cycles type:bitmask default:0x1f 0x01 HALT 0x02 STOPGRANT 0x04 SHUTDOWN 0x08 WBINVD 0x10 INVD name:interrupt_events type:bitmask default:0xff 0x01 Fixed 0x02 LPA 0x04 SMI 0x08 NMI 0x10 INIT 0x20 STARTUP 0x40 INT 0x80 EOI name:httransmit type:bitmask default:0x3f 0x01 Command DWORD sent 0x02 Address DWORD sent 0x04 Data DWORD sent 0x08 Buffer release DWORD sent 0x10 Nop DW sent (idle) 0x20 Per packet CRC sent oprofile-1.3.0/events/x86-64/generic/0000775000175000017500000000000013323173530014131 500000000000000oprofile-1.3.0/events/x86-64/generic/events0000664000175000017500000000453612534404406015312 00000000000000# AMD Generic processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2013 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD processors, # # Revision: 1.0 # # ChangeLog: # 1.0: 07 Feb 2013 # - Preliminary version # L1 DATA CACHE event:0x040 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data Cache Accesses event:0x041 counters:0,1,2,3 um:dcache_misses minimum:500 name:DATA_CACHE_MISSES : Data Cache Misses event:0x042 counters:0,1,2,3 um:dcache_refills minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data Cache Refills from L2 or System event:0x043 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data Cache Refills from System # CYCLE event:0x076 counters:0,1,2,3 um:zero minimum:50000 name:CPU_CLK_UNHALTED : CPU Clocks not Halted # INSTRUCTION CACHE event:0x080 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction Cache Fetches event:0x081 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction Cache Misses event:0x082 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction Cache Refills from L2 event:0x083 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction Cache Refills from System # INSTRUCTIONS event:0x0c0 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired Instructions event:0x0c1 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_UOPS : Retired uops event:0x0c2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired Branch Instructions event:0x0c3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired Mispredicted Branch Instructions event:0x0c4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired Taken Branch Instructions event:0x0c5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired Taken Branch Instructions Mispredicted event:0x0ca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired Indirect Branches Mispredicted oprofile-1.3.0/events/x86-64/generic/unit_masks0000664000175000017500000000153712534404406016161 00000000000000# AMD Generic processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2013 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Sources: BIOS and Kernel Developer's Guide for AMD processors, # # Revision: 1.0 # # ChangeLog: # 1.0: 07 Feb 2013 # - Preliminary version name:zero type:mandatory default:0x00 0x00 No unit mask name:dcache_misses type:bitmask default:0x01 0x01 First data cache miss or streaming store to a 64B cache line 0x02 First streaming store to a 64B cache line name:dcache_refills type:bitmask default:0x0b 0x01 Fill with good data. (Final valid status is valid) 0x02 Early valid status turned out to be invalid 0x08 Fill with read data error oprofile-1.3.0/events/x86-64/hammer/0000775000175000017500000000000013323173530013766 500000000000000oprofile-1.3.0/events/x86-64/hammer/events0000664000175000017500000002567312534404406015154 00000000000000# # AMD Athlon(tm)64 and AMD Opteron(tm) processor unit masks # # Copyright OProfile authors # Copyright (c) 2006-2008 Advanced Micro Devices # Contributed by Ray Bryant # Jason Yeh # Suravee Suthikulpanit # Paul Drongowski # # Source: BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors, # Publication# 32559, Revision 3.08, July 2007 # # This file was last updated on 10 January 2008: # # Sorted by event select value for easier maintenance and to be # consistent with events for other AMD processor families. # # Updated for the latest version of the BKDG. # # Floating point events event:0x00 counters:0,1,2,3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : Dispatched FPU ops event:0x01 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_NO_FPU_OPS_RETIRED : Cycles with no FPU ops retired event:0x02 counters:0,1,2,3 um:zero minimum:500 name:DISPATCHED_FPU_OPS_FAST_FLAG : Dispatched FPU ops that use the fast flag interface # Load, Store, and TLB events event:0x20 counters:0,1,2,3 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment register loads event:0x21 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Micro-architectural re-sync caused by self modifying code event:0x22 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Micro-architectural re-sync caused by snoop event:0x23 counters:0,1,2,3 um:zero minimum:500 name:LS_BUFFER_2_FULL_CYCLES : Cycles LS Buffer 2 full event:0x24 counters:0,1,2,3 um:locked_ops minimum:500 name:LOCKED_OPS : Locked operations # Execution Unit Events event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH instructions event:0x27 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID_INSTRUCTIONS : Retired CPUID instructions # Data Cache event event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses # Event 0x42 with unit mask 0x01 counts same events as event select 0x43 event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_SYSTEM : Data cache refills from L2 or system event:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_SYSTEM : Data cache refills from system event:0x44 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_LINES_EVICTED : Data cache lines evicted event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses event:0x47 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses event:0x48 counters:0,1,2,3 um:zero minimum:500 name:MICROARCHITECTURAL_LATE_CANCEL_OF_AN_ACCESS : Micro-architectural late cancel of an access event:0x49 counters:0,1,2,3 um:zero minimum:500 name:MICROARCHITECTURAL_EARLY_CANCEL_OF_AN_ACCESS : Micro-architectural early cancel of an access event:0x4a counters:0,1,2,3 um:ecc minimum:500 name:SCRUBBER_SINGLE_BIT_ECC_ERRORS : One bit ECC error recorded by scrubber event:0x4b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch instructions dispatched event:0x4c counters:0,1,2,3 um:dcachemisslocked minimum:500 name:DCACHE_MISS_LOCKED_INSTRUCTIONS : DCACHE misses by locked instructions # L2 Cache and System Interface events event:0x65 counters:0,1,2,3 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory requests by type event:0x67 counters:0,1,2,3 um:dataprefetch minimum:500 name:DATA_PREFETCHES : Data prefetcher event:0x6c counters:0,1,2,3 um:systemreadresponse minimum:500 name:SYSTEM_READ_RESPONSES : System read responses by coherency state event:0x6d counters:0,1,2,3 um:writtentosystem minimum:500 name:QUADWORD_WRITE_TRANSFERS : Quadwords written to system event:0x76 counters:0,1,2,3 um:zero minimum:3000 name:CPU_CLK_UNHALTED : Cycles outside of halt state event:0x7d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 cache event:0x7e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 cache misses event:0x7f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 fill/writeback # Instruction Cache events event:0x80 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction cache fetches event:0x81 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction cache misses event:0x82 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction cache refills from L2 event:0x83 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction cache refills from system event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB miss event:0x86 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE : Pipeline restart due to instruction stream probe event:0x87 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction fetch stall event:0x88 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_HITS : Return stack hits event:0x89 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return stack overflows # Execution Unit events event:0xc0 counters:0,1,2,3 um:zero minimum:3000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs) event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : Retired micro-ops event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts) event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions event:0xc4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired taken branch instructions event:0xc5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired taken branches mispredicted event:0xc6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired far control transfers event:0xc7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired branches resyncs (only non-control transfer branches) event:0xc8 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired near returns event:0xc9 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired near returns mispredicted event:0xca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired indirect branches mispredicted event:0xcb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP instructions event:0xcc counters:0,1,2,3 um:fpu_fastpath minimum:500 name:RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS : Retired FastPath double-op instructions event:0xcd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Cycles with interrupts masked (IF=0) event:0xce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Cycles with interrupts masked while interrupt pending event:0xcf counters:0,1,2,3 um:zero minimum:10 name:INTERRUPTS_TAKEN : Number of taken hardware interrupts event:0xd0 counters:0,1,2,3 um:zero minimum:500 name:DECODER_EMPTY : Nothing to dispatch (decoder empty) event:0xd1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch stalls event:0xd2 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_BRANCH_ABORT : Dispatch stall from branch abort to retire event:0xd3 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SERIALIZATION : Dispatch stall for serialization event:0xd4 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SEGMENT_LOAD : Dispatch stall for segment load event:0xd5 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_REORDER_BUFFER_FULL : Dispatch stall for reorder buffer full event:0xd6 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_RESERVATION_STATION_FULL : Dispatch stall when reservation stations are full event:0xd7 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FPU_FULL : Dispatch stall when FPU is full event:0xd8 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_LS_FULL : Dispatch stall when LS is full event:0xd9 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_WAITING_FOR_ALL_QUIET : Dispatch stall when waiting for all to be quiet event:0xda counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RESYNC : Dispatch stall for far transfer or resync to retire event:0xdb counters:0,1,2,3 um:fpu_exceptions minimum:1 name:FPU_EXCEPTIONS : FPU exceptions event:0xdc counters:0,1,2,3 um:zero minimum:1 name:DR0_BREAKPOINTS : Number of breakpoints for DR0 event:0xdd counters:0,1,2,3 um:zero minimum:1 name:DR1_BREAKPOINTS : Number of breakpoints for DR1 event:0xde counters:0,1,2,3 um:zero minimum:1 name:DR2_BREAKPOINTS : Number of breakpoints for DR2 event:0xdf counters:0,1,2,3 um:zero minimum:1 name:DR3_BREAKPOINTS : Number of breakpoints for DR3 # Memory Controler events event:0xe0 counters:0,1,2,3 um:page_access minimum:500 name:DRAM_ACCESSES : DRAM accesses event:0xe1 counters:0,1,2,3 um:zero minimum:500 name:MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOWS : Memory controller page table overflows event:0xe3 counters:0,1,2,3 um:turnaround minimum:500 name:MEMORY_CONTROLLER_TURNAROUNDS : Memory controller turnarounds event:0xe4 counters:0,1,2,3 um:saturation minimum:500 name:MEMORY_CONTROLLER_BYPASS_COUNTER_SATURATION : Memory controller bypass saturation event:0xe5 counters:0,1,2,3 um:sizedblocks minimum:500 name:SIZED_BLOCKS : Sized blocks event:0xe8 counters:0,1,2,3 um:thermalecc minimum:500 name:THERMAL_STATUS_AND_DRAM_ECC_ERRORS : Thermal status and ECC errors event:0xe9 counters:0,1,2,3 um:cpiorequests minimum:500 name:CPU_IO_REQUESTS_TO_MEMORY_IO : CPU/IO requests to memory/IO (RevE) event:0xea counters:0,1,2,3 um:cacheblock minimum:500 name:CACHE_BLOCK_COMMANDS : Cache block commands (RevE) event:0xeb counters:0,1,2,3 um:sizecmds minimum:500 name:SIZED_COMMANDS : Sized commands event:0xec counters:0,1,2,3 um:probe minimum:500 name:PROBE_RESPONSES_AND_UPSTREAM_REQUESTS : Probe responses and upstream requests event:0xee counters:0,1,2,3 um:gart minimum:500 name:GART_EVENTS : GART events # Link events event:0xf6 counters:0,1,2,3 um:ht minimum:500 name:HYPERTRANSPORT_LINK0_BANDWIDTH : HyperTransport(tm) link 0 transmit bandwidth event:0xf7 counters:0,1,2,3 um:ht minimum:500 name:HYPERTRANSPORT_LINK1_BANDWIDTH : HyperTransport(tm) link 1 transmit bandwidth event:0xf8 counters:0,1,2,3 um:ht minimum:500 name:HYPERTRANSPORT_LINK2_BANDWIDTH : HyperTransport(tm) link 2 transmit bandwidth oprofile-1.3.0/events/x86-64/hammer/unit_masks0000664000175000017500000001515112534404406016013 00000000000000# # AMD Athlon(tm)64 and AMD Opteron(tm) processor unit masks # # Copyright OProfile authors # Copyright (c) Advanced Micro Devices, 2006-2008 # Contributed by Ray Bryant , and others. # # Source: BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors, # Publication# 32559, Revision 3.08, July 2007 # # This file was last updated on 10 January 2008: # # Unit mask (writtentosystem) was added for the # QUADWORD_WRITE_TRANSFERS event. # name:zero type:mandatory default:0x0 0x0 No unit mask name:moesi type:bitmask default:0x1f 0x01 (I)nvalid cache state 0x02 (S)hared cache state 0x04 (E)xclusive cache state 0x08 (O)wned cache state 0x10 (M)odified cache state 0x1f All cache states name:moess type:bitmask default:0x1e 0x01 refill from system 0x02 (S)hared cache state from L2 0x04 (E)xclusive cache state from L2 0x08 (O)wned cache state from L2 0x10 (M)odified cache state from L2 0x1e All cache states except Invalid name:fpu_ops type:bitmask default:0x3f 0x01 Add pipe ops 0x02 Multiply pipe 0x04 Store pipe ops 0x08 Add pipe load ops 0x10 Multiply pipe load ops 0x20 Store pipe load ops name:segregload type:bitmask default:0x7f 0x01 ES register 0x02 CS register 0x04 SS register 0x08 DS register 0x10 FS register 0x20 GS register 0x40 HS register name:ecc type:bitmask default:0x03 0x01 Scrubber error 0x02 Piggyback scrubber errors name:prefetch type:bitmask default:0x07 0x01 Load 0x02 Store 0x04 NTA name:fpu_instr type:bitmask default:0x0f 0x01 x87 instructions 0x02 Combined MMX & 3DNow instructions 0x04 Combined packed SSE & SSE2 instructions 0x08 Combined packed scalar SSE & SSE2 instructions name:fpu_fastpath type:bitmask default:0x07 0x01 With low op in position 0 0x02 With low op in position 1 0x04 With low op in position 2 name:fpu_exceptions type:bitmask default:0x0f 0x01 x87 reclass microfaults 0x02 SSE retype microfaults 0x04 SSE reclass microfaults 0x08 SSE and x87 microtraps name:page_access type:bitmask default:0x07 0x01 Page hit 0x02 Page miss 0x04 Page conflict name:turnaround type:bitmask default:0x07 0x01 DIMM (chip select) turnaround 0x02 Read to write turnaround 0x04 Write to read turnaround name:saturation type:bitmask default:0x0f 0x01 Memory controller high priority bypass 0x02 Memory controller low priority bypass 0x04 DRAM controller interface bypass 0x08 DRAM controller queue bypass name:sizecmds type:bitmask default:0x7f 0x01 Non-posted write byte 0x02 Non-posted write dword 0x04 Posted write byte 0x08 Posted write dword 0x10 Read byte (4 bytes) 0x20 Read dword (1-16 dwords) 0x40 Read-modify-write name:probe type:bitmask default:0x0f 0x01 Probe miss 0x02 Probe hit clean 0x04 Probe hit dirty without memory cancel 0x08 Probe hit dirty with memory cancel 0x10 Upstream display refresh reads 0x20 Upstream non-display refresh reads 0x40 Upstream writes (RevD and later) name:ht type:bitmask default:0x7 0x01 Command sent 0x02 Data sent 0x04 Buffer release sent 0x08 NOP sent name:l2_internal type:bitmask default:0x1f 0x01 IC fill 0x02 DC fill 0x04 TLB fill (page table walk) 0x08 Tag snoop request 0x10 Cancelled request name:l2_req_miss type:bitmask default:0x07 0x01 IC fill 0x02 DC fill 0x04 TLB page table walk name:l2_fill type:bitmask default:0x03 0x01 L2 fills (victims from L1 caches, TLB page table walks and data prefetches) 0x02 L2 writebacks to system name:gart type:bitmask default:0x07 0x01 GART aperture hit on access from CPU 0x02 GART aperture hit on access from I/O 0x04 GART miss name:sizedblocks type:bitmask default:0x3c 0x04 32-byte Sized Writes (RevD and later) 0x08 64-byte Sized Writes (RevD and later) 0x10 32-byte Sized Reads (RevD and later) 0x20 64-byte Sized Reads (RevD and later) name:cpiorequests type:bitmask default:0xa2 0xa1 Requests Local I/O to Local I/O 0xa2 Requests Local I/O to Local Memory 0xa3 Requests Local I/O to Local (I/O or Mem) 0xa4 Requests Local CPU to Local I/O 0xa5 Requests Local (CPU or I/O) to Local I/O 0xa8 Requests Local CPU to Local Memory 0xaa Requests Local (CPU or I/O) to Local Memory 0xac Requests Local CPU to Local (I/O or Mem) 0xaf Requests Local (CPU or I/O) to Local (I/O or Mem) 0x91 Requests Local I/O to Remote I/O 0x92 Requests Local I/O to Remote Memory 0x93 Requests Local I/O to Remote (I/O or Mem) 0x94 Requests Local CPU to Remote I/O 0x95 Requests Local (CPU or I/O) to Remote I/O 0x98 Requests Local CPU to Remote Memory 0x9a Requests Local (CPU or I/O) to Remote Memory 0x9c Requests Local CPU to Remote (I/O or Mem) 0x9f Requests Local (CPU or I/O) to Remote (I/O or Mem) 0xb1 Requests Local I/O to Any I/O 0xb2 Requests Local I/O to Any Memory 0xb3 Requests Local I/O to Any (I/O or Mem) 0xb4 Requests Local CPU to Any I/O 0xb5 Requests Local (CPU or I/O) to Any I/O 0xb8 Requests Local CPU to Any Memory 0xba Requests Local (CPU or I/O) to Any Memory 0xbc Requests Local CPU to Any (I/O or Mem) 0xbf Requests Local (CPU or I/O) to Any (I/O or Mem) 0x61 Requests Remote I/O to Local I/O 0x64 Requests Remote CPU to Local I/O 0x65 Requests Remote (CPU or I/O) to Local I/O name:cacheblock type:bitmask default:0x3d 0x01 Victim Block (Writeback) 0x04 Read Block (Dcache load miss refill) 0x08 Read Block Shared (Icache refill) 0x10 Read Block Modified (Dcache store miss refill) 0x20 Change to Dirty (first store to clean block already in cache) name:dataprefetch type:bitmask default:0x03 0x01 Cancelled prefetches 0x02 Prefetch attempts name:memreqtype type:bitmask default:0x83 0x01 Requests to non-cacheable (UC) memory 0x02 Requests to write-combining (WC) memory or WC buffer flushes to WB memory 0x80 Streaming store (SS) requests name:systemreadresponse type:bitmask default:0x7 0x01 Exclusive 0x02 Modified 0x04 Shared name:writtentosystem type:bitmask default:0x1 0x01 Quadword write transfer # BKDG 3.28 does not include unit_mask of 0x01 for "accesses by Locked instructions" name:dcachemisslocked type:bitmask default:0x02 0x02 Data cache misses by locked instructions name:locked_ops type:bitmask default:0x04 0x01 The number of locked instructions executed 0x02 The number of cycles spent in speculative phase 0x04 The number of cycles spent in non-speculative phase (including cache miss penalty) name:thermalecc type:bitmask default:0x80 0x01 Number of clocks CPU is active when HTC is active (RevF) 0x02 Number of clocks CPU clock is inactive when HTC is active (RevF) 0x04 Number of clocks when die temperature is higher than the software high temperature threshold (RevF) 0x08 Number of clocks when high temperature threshold was exceeded (RevF) 0x80 Number of correctable and uncorrectable DRAM ECC errors (RevE) oprofile-1.3.0/events/x86-64/family10/0000775000175000017500000000000013323173530014137 500000000000000oprofile-1.3.0/events/x86-64/family10/events0000664000175000017500000004033312534404406015313 00000000000000# AMD Family 10 processor performance events # # Copyright OProfile authors # Copyright (c) 2006-2008 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # # Sources: BIOS and Kernel Developer's Guide for AMD Family 10h Processors, # Publication# 31116, Revision 3.48, April 22, 2010 # # Revision: 1.5 # # ChangeLog: # 1.5: 11 August 2014 # - Removal of IBS events due to missing support in Operf # # 1.4: 11 March 2011 # - Update to BKDG revision 3.48 # - Fix typo in the description for event 0xf244 # - Update the minimum for RETIRED_UOPS # - Add event 0x68, 0x69 # # 1.3: 22 October 2009. # - Update from BKDG Rev 3.28 to Rev 3.34 (no change) # - Specify that event 4EDh is for Rev D only # # 1.2: 03 June 2009. # - Update from BKDG Rev 3.20 to Rev 3.28 # - Add Event 4EDh # - Modify unitmasks for 4E0h-4E3h # # 1.1: 06 April 2009. # - Add IBS-derived events # - Update from BKDG Rev 3.00 to Rev 3.20 # - Add Events 165h, 1c0h, 1cfh, 1d3h-1d5h # # Floating point events event:0x00 counters:0,1,2,3 um:fpu_ops minimum:500 name:DISPATCHED_FPU_OPS : Dispatched FPU ops event:0x01 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_FPU_EMPTY : The number of cycles in which the PFU is empty event:0x02 counters:0,1,2,3 um:zero minimum:500 name:DISPATCHED_FPU_OPS_FAST_FLAG : The number of FPU operations that use the fast flag interface event:0x03 counters:0,1,2,3 um:sse_ops minimum:500 name:RETIRED_SSE_OPS : The number of SSE ops or uops retired event:0x04 counters:0,1,2,3 um:move_ops minimum:500 name:RETIRED_MOVE_OPS : The number of move uops retired event:0x05 counters:0,1,2,3 um:serial_ops minimum:500 name:RETIRED_SERIALIZING_OPS : The number of serializing uops retired. event:0x06 counters:0,1,2,3 um:serial_ops_sched minimum:500 name:SERIAL_UOPS_IN_FP_SCHED : Number of cycles a serializing uop is in the FP scheduler # Load, Store, and TLB events event:0x20 counters:0,1,2,3 um:segregload minimum:500 name:SEGMENT_REGISTER_LOADS : Segment register loads event:0x21 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE : Micro-architectural re-sync caused by self modifying code event:0x22 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_PROBE_HIT : Micro-architectural re-sync caused by snoop event:0x23 counters:0,1,2,3 um:zero minimum:500 name:LS_BUFFER_2_FULL_CYCLES : Cycles LS Buffer 2 Full event:0x24 counters:0,1,2,3 um:lock_ops minimum:500 name:LOCKED_OPS : Locked operations event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH instructions event:0x27 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID_INSTRUCTIONS : Retired CPUID instructions event:0x2a counters:0,1,2,3 um:store_to_load minimum:500 name:CANCELLED_STORE_TO_LOAD : Counts the number of cancelled store to load forward operations event:0x2b counters:0,1,2,3 um:zero minimum:500 name:SMIS_RECEIVED : Counts the number of SMIs received by the processor # Data Cache event event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses # Note: unit mask 0x01 counts same events as event select 0x43 event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data cache refills from L2 or Northbridge event:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data cache refills from Northbridge event:0x44 counters:0,1,2,3 um:moesi_gh minimum:500 name:DATA_CACHE_LINES_EVICTED : Data cache lines evicted event:0x45 counters:0,1,2,3 um:l1_dtlb_miss_l2_hit minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB miss and L2 DTLB hit event:0x46 counters:0,1,2,3 um:l1_l2_dtlb_miss minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 DTLB and L2 DTLB miss event:0x47 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses event:0x48 counters:0,1,2,3 um:zero minimum:500 name:MICRO_ARCH_LATE_CANCEL_ACCESS : Microarchitectural late cancel of an access event:0x49 counters:0,1,2,3 um:zero minimum:500 name:MICRO_ARCH_EARLY_CANCEL_ACCESS : Microarchitectural early cancel of an access event:0x4a counters:0,1,2,3 um:ecc minimum:500 name:1_BIT_ECC_ERRORS : Single-bit ECC errors recorded by scrubber event:0x4b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : The number of prefetch instructions dispatched by the decoder event:0x4c counters:0,1,2,3 um:locked_instruction_dcache_miss minimum:500 name:LOCKED_INSTRUCTIONS_DCACHE_MISSES : The number of dta cache misses by locked instructions. event:0x4d counters:0,1,2,3 um:l1_dtlb_hit minimum:500 name:L1_DTLB_HIT : L1 DTLB hit event:0x52 counters:0,1,2,3 um:soft_prefetch minimum:500 name:INEFFECTIVE_SW_PREFETCHES : Number of software prefetches that did not fetch data outside of processor core event:0x54 counters:0,1,2,3 um:zero minimum:500 name:GLOBAL_TLB_FLUSHES : The number of global TLB flushes # L2 Cache and System Interface events event:0x65 counters:0,1,2,3 um:memreqtype minimum:500 name:MEMORY_REQUESTS : Memory requests by type event:0x67 counters:0,1,2,3 um:dataprefetch minimum:500 name:DATA_PREFETCHES : Data prefetcher event:0x068 counters:0,1,2,3 um:mab_buffer minimum:500 name:MAB_REQS : MAB Requests event:0x069 counters:0,1,2,3 um:mab_buffer minimum:500 name:MAB_WAIT : MAB Wait Cycles event:0x6c counters:0,1,2,3 um:systemreadresponse minimum:500 name:NORTHBRIDGE_READ_RESPONSES : Northbridge read responses by coherency state event:0x6d counters:0,1,2,3 um:octword_transfer minimum:500 name:OCTWORD_WRITE_TRANSFERS : Octwords written to system event:0x76 counters:0,1,2,3 um:zero minimum:50000 name:CPU_CLK_UNHALTED : Cycles outside of halt state event:0x7d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 Cache event:0x7e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 cache misses event:0x7f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 fill/writeback event:0x165 counters:0,1,2,3 um:page_size_mismatches minimum:500 name:PAGE_SIZE_MISMATCHES : Page Size Mismatches # Instruction Cache events event:0x80 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_FETCHES : Instruction cache fetches (RevE) event:0x81 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_MISSES : Instruction cache misses event:0x82 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction cache refills from L2 event:0x83 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM : Instruction cache refills from system event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit event:0x85 counters:0,1,2,3 um:l1_l2_itlb_miss minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB miss event:0x86 counters:0,1,2,3 um:zero minimum:500 name:PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE : Pipeline restart due to instruction stream probe event:0x87 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_FETCH_STALL : Instruction fetch stall event:0x88 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_HITS : Return stack hit event:0x89 counters:0,1,2,3 um:zero minimum:500 name:RETURN_STACK_OVERFLOWS : Return stack overflow event:0x8b counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_VICTIMS : Number of instruction cache lines evicticed to the L2 cache event:0x8c counters:0,1,2,3 um:icache_invalidated minimum:500 name:INSTRUCTION_CACHE_INVALIDATED : Instruction cache lines invalidated event:0x99 counters:0,1,2,3 um:zero minimum:500 name:ITLB_RELOADS : The number of ITLB reloads requests event:0x9a counters:0,1,2,3 um:zero minimum:500 name:ITLB_RELOADS_ABORTED : The number of ITLB reloads aborted # Execution Unit events event:0xc0 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs) event:0xc1 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_UOPS : Retired micro-ops event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts) event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions event:0xc4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired taken branch instructions event:0xc5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired taken branches mispredicted event:0xc6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired far control transfers event:0xc7 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_RESYNCS : Retired branches resyncs (only non-control transfer branches) event:0xc8 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS : Retired near returns event:0xc9 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_NEAR_RETURNS_MISPREDICTED : Retired near returns mispredicted event:0xca counters:0,1,2,3 um:zero minimum:500 name:RETIRED_INDIRECT_BRANCHES_MISPREDICTED : Retired indirect branches mispredicted event:0xcb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP instructions event:0xcc counters:0,1,2,3 um:fpu_fastpath minimum:500 name:RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS : Retired FastPath double-op instructions event:0xcd counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES : Cycles with interrupts masked (IF=0) event:0xce counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING : Cycles with interrupts masked while interrupt pending event:0xcf counters:0,1,2,3 um:zero minimum:500 name:INTERRUPTS_TAKEN : Number of taken hardware interrupts event:0xd0 counters:0,1,2,3 um:zero minimum:500 name:DECODER_EMPTY : Nothing to dispatch (decoder empty) event:0xd1 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALLS : Dispatch stalls event:0xd2 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_BRANCH_ABORT : Dispatch stall from branch abort to retire event:0xd3 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SERIALIZATION : Dispatch stall for serialization event:0xd4 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_SEGMENT_LOAD : Dispatch stall for segment load event:0xd5 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_REORDER_BUFFER_FULL : Dispatch stall for reorder buffer full event:0xd6 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_RESERVATION_STATION_FULL : Dispatch stall when reservation stations are full event:0xd7 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FPU_FULL : Dispatch stall when FPU is full event:0xd8 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_LS_FULL : Dispatch stall when LS is full event:0xd9 counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_WAITING_FOR_ALL_QUIET : Dispatch stall when waiting for all to be quiet event:0xda counters:0,1,2,3 um:zero minimum:500 name:DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RESYNC : Dispatch Stall for Far Transfer or Resync to Retire event:0xdb counters:0,1,2,3 um:fpu_exceptions minimum:500 name:FPU_EXCEPTIONS : FPU exceptions event:0xdc counters:0,1,2,3 um:zero minimum:500 name:DR0_BREAKPOINTS : The number of matches on the address in breakpoint register DR0 event:0xdd counters:0,1,2,3 um:zero minimum:500 name:DR1_BREAKPOINTS : The number of matches on the address in breakpoint register DR1 event:0xde counters:0,1,2,3 um:zero minimum:500 name:DR2_BREAKPOINTS : The number of matches on the address in breakpoint register DR2 event:0xdf counters:0,1,2,3 um:zero minimum:500 name:DR3_BREAKPOINTS : The number of matches on the address in breakpoint register DR3 event:0x1c0 counters:0,1,2,3 um:retired_x87_fp minimum:500 name:RETIRED_X87_FLOATING_POINT_OPERATIONS : Retired x87 Floating Point Operations (RevC and later) event:0x1cf counters:0,1,2,3 um:zero minimum:500000 name:IBS_OPS_TAGGED : IBS Ops Tagged (RevC and later) event:0x1d3 counters:0,1,2,3 um:zero minimum:500 name:LFENCE_INSTRUCTIONS_RETIRED : LFENCE Instructions Retired (RevC and later) event:0x1d4 counters:0,1,2,3 um:zero minimum:500 name:SFENCE_INSTRUCTIONS_RETIRED : SFENCE Instructions Retired (RevC and later) event:0x1d5 counters:0,1,2,3 um:zero minimum:500 name:MFENCE_INSTRUCTIONS_RETIRED : MFENCE Instructions Retired (RevC and later) # Memory Controler events event:0xe0 counters:0,1,2,3 um:page_access minimum:500 name:DRAM_ACCESSES : DRAM accesses event:0xe1 counters:0,1,2,3 um:mem_page_overflow minimum:500 name:MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOWS : Memory controller page table overflows event:0xe2 counters:0,1,2,3 um:slot_missed minimum:500 name:MEMORY_CONTROLLER_SLOT_MISSED : Memory controller DRAM command slots missed event:0xe3 counters:0,1,2,3 um:turnaround minimum:500 name:MEMORY_CONTROLLER_TURNAROUNDS : Memory controller turnarounds event:0xe4 counters:0,1,2,3 um:saturation minimum:500 name:MEMORY_CONTROLLER_BYPASS_COUNTER_SATURATION : Memory controller bypass saturation event:0xe8 counters:0,1,2,3 um:thermal_status minimum:500 name:THERMAL_STATUS : Thermal status event:0xe9 counters:0,1,2,3 um:cpiorequests minimum:500 name:CPU_IO_REQUESTS_TO_MEMORY_IO : CPU/IO Requests to Memory/IO event:0xea counters:0,1,2,3 um:cacheblock minimum:500 name:CACHE_BLOCK_COMMANDS : Cache block commands event:0xeb counters:0,1,2,3 um:sizecmds minimum:500 name:SIZED_COMMANDS : Sized commands event:0xec counters:0,1,2,3 um:probe minimum:500 name:PROBE_RESPONSES_AND_UPSTREAM_REQUESTS : Probe responses and upstream requests event:0xee counters:0,1,2,3 um:gart minimum:500 name:GART_EVENTS : GART events event:0x1f0 counters:0,1,2,3 um:mem_control_request minimum:500 name:MEMORY_CONTROLLER_REQUESTS : Sized read/write activity. # Crossbar events event:0x1e0 counters:0,1,2,3 um:cpu_dram_req minimum:500 name:CPU_DRAM_REQUEST_TO_NODE : CPU to DRAM requests to target node event:0x1e1 counters:0,1,2,3 um:io_dram_req minimum:500 name:IO_DRAM_REQUEST_TO_NODE : IO to DRAM requests to target node event:0x1e2 counters:0,1,2,3 um:cpu_read_lat_0_3 minimum:500 name:CPU_READ_COMMAND_LATENCY_NODE_0_3 : Latency between the local node and remote node event:0x1e3 counters:0,1,2,3 um:cpu_read_lat_0_3 minimum:500 name:CPU_READ_COMMAND_REQUEST_NODE_0_3 : Number of requests that a latency measurement is made for Event 0x1E2 event:0x1e4 counters:0,1,2,3 um:cpu_read_lat_4_7 minimum:500 name:CPU_READ_COMMAND_LATENCY_NODE_4_7 : Latency between the local node and remote node event:0x1e5 counters:0,1,2,3 um:cpu_read_lat_4_7 minimum:500 name:CPU_READ_COMMAND_REQUEST_NODE_4_7 : Number of requests that a latency measurement is made for Event 0x1E2 event:0x1e6 counters:0,1,2,3 um:cpu_comm_lat minimum:500 name:CPU_COMMAND_LATENCY_TARGET : Determine latency between the local node and a remote node. event:0x1e7 counters:0,1,2,3 um:cpu_comm_lat minimum:500 name:CPU_REQUEST_TARGET : Number of requests that a latency measurement is made for Event 0x1E6 # Link events event:0xf6 counters:0,1,2,3 um:httransmit minimum:500 name:HYPERTRANSPORT_LINK0_TRANSMIT_BANDWIDTH : HyperTransport(tm) link 0 transmit bandwidth event:0xf7 counters:0,1,2,3 um:httransmit minimum:500 name:HYPERTRANSPORT_LINK1_TRANSMIT_BANDWIDTH : HyperTransport(tm) link 1 transmit bandwidth event:0xf8 counters:0,1,2,3 um:httransmit minimum:500 name:HYPERTRANSPORT_LINK2_TRANSMIT_BANDWIDTH : HyperTransport(tm) link 2 transmit bandwidth event:0x1f9 counters:0,1,2,3 um:httransmit minimum:500 name:HYPERTRANSPORT_LINK3_TRANSMIT_BANDWIDTH : HyperTransport(tm) link 3 transmit bandwidth # L3 Cache events event:0x4e0 counters:0,1,2,3 um:l3_cache minimum:500 name:READ_REQUEST_L3_CACHE : Number of read requests from each core to L3 cache event:0x4e1 counters:0,1,2,3 um:l3_cache minimum:500 name:L3_CACHE_MISSES : Number of L3 cache misses from each core event:0x4e2 counters:0,1,2,3 um:l3_fill minimum:500 name:L3_FILLS_CAUSED_BY_L2_EVICTIONS : Number of L3 fills caused by L2 evictions per core event:0x4e3 counters:0,1,2,3 um:l3_evict minimum:500 name:L3_EVICTIONS : Number of L3 cache line evictions by cache state event:0x4ed counters:0,1,2,3 um:non_cancelled_l3_read_requests minimum:500 name:NON_CANCELLED_L3_READ_REQUESTS : Non-cancelled L3 Read Requests (Rev D) oprofile-1.3.0/events/x86-64/family10/unit_masks0000664000175000017500000003221712534404406016166 00000000000000# AMD Family 10 processor unit masks # # Copyright OProfile authors # Copyright (c) 2006-2008 Advanced Micro Devices # Contributed by Ray Bryant , # Jason Yeh # Suravee Suthikulpanit # # Sources: BIOS and Kernel Developer's Guide for AMD Family 10h Processors, # Publication# 31116, Revision 3.48, April 22, 2010 # # Software Optimization Guide for AMD Family 10h and Family 12h Processors, # Publication# 40546, Revision 3.13, February 2011 # (Note: For IBS Derived Performance Events) # # Revision: 1.5 # # ChangeLog: # 1.5: 11 August 2014 # - Removal of IBS events due to missing support in Operf # # 1.4: 11 March 2011 # - Update to BKDG revision 3.48 # - Fix typo in the description for event 0xf244 # - Update the minimum for RETIRED_UOPS # - Add event 0x68, 0x69 # # 1.3: 22 October 2009. # - Update from BKDG Rev 3.28 to Rev 3.34 (no change) # - Modify unitmasks l3_evict # # 1.2: 03 June 2009. # - Update from BKDG Rev 3.20 to Rev 3.28 # - Add Event 4EDh # - Modify unitmasks for 4E0h-4E3h # # 1.1: 06 April 2009. # - Add IBS-derived events # - Update from BKDG Rev 3.00 to Rev 3.20 # - Add Events 165h, 1c0h, 1cfh, 1d3h-1d5h # name:zero type:mandatory default:0x0 0x0 No unit mask name:moesi type:bitmask default:0x1f 0x01 (I)nvalid cache state 0x02 (S)hared cache state 0x04 (E)xclusive cache state 0x08 (O)wner cache state 0x10 (M)odified cache state 0x1f All cache states name:moess type:bitmask default:0x1e 0x01 Refill from northbridge 0x02 Shared-state line from L2 0x04 Exclusive-state line from L2 0x08 Owner-state line from L2 0x10 Modified-state line from L2 0x1e All cache states except refill from northbridge name:fpu_ops type:bitmask default:0x3f 0x01 Add pipe ops excluding load ops and SSE move ops 0x02 Multiply pipe ops excluding load ops and SSE move ops 0x04 Store pipe ops excluding load ops and SSE move ops 0x08 Add pipe load ops and SSE move ops 0x10 Multiply pipe load ops and SSE move ops 0x20 Store pipe load ops and SSE move ops 0x3f All ops name:segregload type:bitmask default:0x7f 0x01 ES register 0x02 CS register 0x04 SS register 0x08 DS register 0x10 FS register 0x20 GS register 0x40 HS register name:fpu_instr type:bitmask default:0x07 0x01 x87 instructions 0x02 MMX & 3DNow instructions 0x04 SSE instructions (SSE, SSE2, SSE3, and SSE4A) name:fpu_fastpath type:bitmask default:0x07 0x01 With low op in position 0 0x02 With low op in position 1 0x04 With low op in position 2 name:fpu_exceptions type:bitmask default:0x0f 0x01 x87 reclass microfaults 0x02 SSE retype microfaults 0x04 SSE reclass microfaults 0x08 SSE and x87 microtraps name:page_access type:bitmask default:0x3f 0x01 DCT0 Page hit 0x02 DCT0 Page miss 0x04 DCT0 Page conflict 0x08 DCT1 Page hit 0x10 DCT1 Page miss 0x20 DCT1 Page Conflict name:mem_page_overflow type:bitmask default:0x03 0x01 DCT0 Page Table Overflow 0x02 DCT1 Page Table Overflow name:turnaround type:bitmask default:0x3f 0x01 DCT0 DIMM (chip select) turnaround 0x02 DCT0 Read to write turnaround 0x04 DCT0 Write to read turnaround 0x08 DCT1 DIMM (chip select) turnaround 0x10 DCT1 Read to write turnaround 0x20 DCT1 Write to read turnaround name:saturation type:bitmask default:0x0f 0x01 Memory controller high priority bypass 0x02 Memory controller medium priority bypass 0x04 DCT0 DCQ bypass 0x08 DCT1 DCQ bypass name:slot_missed type:bitmask default:0x03 0x01 DCT0 Command slots missed 0x02 DCT2 Command slots missed name:sizecmds type:bitmask default:0x3f 0x01 Non-posted write byte (1-32 bytes) 0x02 Non-posted write DWORD (1-16 DWORDs) 0x04 Posted write byte (1-32 bytes) 0x08 Posted write DWORD (1-16 DWORDs) 0x10 Read byte (4 bytes) 0x20 Read DWORD (1-16 DWORDs) name:probe type:bitmask default:0xff 0x01 Probe miss 0x02 Probe hit clean 0x04 Probe hit dirty without memory cancel 0x08 Probe hit dirty with memory cancel 0x10 Upstream display refresh/ISOC reads 0x20 Upstream non-display refresh reads 0x40 Upstream ISOC writes 0x80 Upstream non-ISOC writes name:l2_internal type:bitmask default:0x3f 0x01 IC fill 0x02 DC fill 0x04 TLB fill (page table walks) 0x08 Tag snoop request 0x10 Canceled request 0x20 Hardware prefetch from data cache name:l2_req_miss type:bitmask default:0x0f 0x01 IC fill 0x02 DC fill (includes possible replays) 0x04 TLB page table walk 0x08 Hardware prefetch from data cache name:l2_fill type:bitmask default:0x03 0x01 L2 fills (victims from L1 caches, TLB page table walks and data prefetches) 0x02 L2 writebacks to system name:gart type:bitmask default:0xff 0x01 GART aperture hit on access from CPU 0x02 GART aperture hit on access from I/O 0x04 GART miss 0x08 GART/DEV request hit table walk in progress 0x10 DEV hit 0x20 DEV miss 0x40 DEV error 0x80 GART/DEV multiple table walk in progress name:cpiorequests type:bitmask default:0xa2 0xa1 Requests Local I/O to Local I/O 0xa2 Requests Local I/O to Local Memory 0xa3 Requests Local I/O to Local (I/O or Mem) 0xa4 Requests Local CPU to Local I/O 0xa5 Requests Local (CPU or I/O) to Local I/O 0xa8 Requests Local CPU to Local Memory 0xaa Requests Local (CPU or I/O) to Local Memory 0xac Requests Local CPU to Local (I/O or Mem) 0xaf Requests Local (CPU or I/O) to Local (I/O or Mem) 0x91 Requests Local I/O to Remote I/O 0x92 Requests Local I/O to Remote Memory 0x93 Requests Local I/O to Remote (I/O or Mem) 0x94 Requests Local CPU to Remote I/O 0x95 Requests Local (CPU or I/O) to Remote I/O 0x98 Requests Local CPU to Remote Memory 0x9a Requests Local (CPU or I/O) to Remote Memory 0x9c Requests Local CPU to Remote (I/O or Mem) 0x9f Requests Local (CPU or I/O) to Remote (I/O or Mem) 0xb1 Requests Local I/O to Any I/O 0xb2 Requests Local I/O to Any Memory 0xb3 Requests Local I/O to Any (I/O or Mem) 0xb4 Requests Local CPU to Any I/O 0xb5 Requests Local (CPU or I/O) to Any I/O 0xb8 Requests Local CPU to Any Memory 0xba Requests Local (CPU or I/O) to Any Memory 0xbc Requests Local CPU to Any (I/O or Mem) 0xbf Requests Local (CPU or I/O) to Any (I/O or Mem) 0x61 Requests Remote I/O to Local I/O 0x64 Requests Remote CPU to Local I/O 0x65 Requests Remote (CPU or I/O) to Local I/O name:cacheblock type:bitmask default:0x3d 0x01 Victim Block (Writeback) 0x04 Read Block (Dcache load miss refill) 0x08 Read Block Shared (Icache refill) 0x10 Read Block Modified (Dcache store miss refill) 0x20 Change-to-Dirty (first store to clean block already in cache) name:dataprefetch type:bitmask default:0x03 0x01 Cancelled prefetches 0x02 Prefetch attempts name:memreqtype type:bitmask default:0x83 0x01 Requests to non-cacheable (UC) memory 0x02 Requests to write-combining (WC) memory or WC buffer flushes to WB memory 0x80 Streaming store (SS) requests name:mab_buffer type:exclusive default:0x00 0x00 DC miss buffer 0 0x01 DC miss buffer 1 0x02 DC miss buffer 2 0x03 DC miss buffer 3 0x04 DC miss buffer 4 0x05 DC miss buffer 5 0x06 DC miss buffer 6 0x07 DC miss buffer 7 0x08 IC miss buffer 0 0x09 IC miss buffer 1 name:systemreadresponse type:bitmask default:0x1f 0x01 Exclusive 0x02 Modified 0x04 Shared 0x08 Owned 0x10 Data Error name:l1_dtlb_miss_l2_hit type:bitmask default:0x07 0x01 L2 4K TLB hit 0x02 L2 2M TLB hit 0x04 L2 1G TLB hit (RevC) name:l1_l2_dtlb_miss type:bitmask default:0x07 0x01 4K TLB reload 0x02 2M TLB reload 0x04 1G TLB reload name:ecc type:bitmask default:0x0f 0x01 Scrubber error 0x02 Piggyback scrubber errors 0x04 Load pipe error 0x08 Store write pip error name:prefetch type:bitmask default:0x07 0x01 Load (Prefetch, PrefetchT0/T1/T2) 0x02 Store (PrefetchW) 0x04 NTA (PrefetchNTA) name:locked_instruction_dcache_miss type:bitmask default:0x02 0x02 Data cache misses by locked instructions name:octword_transfer type:bitmask default:0x01 0x01 Octword write transfer name:thermal_status type:bitmask default:0x7c 0x04 Number of times the HTC trip point is crossed 0x08 Number of clocks when STC trip point active 0x10 Number of times the STC trip point is crossed 0x20 Number of clocks HTC P-state is inactive 0x40 Number of clocks HTC P-state is active name:mem_control_request type:bitmask default:0x78 0x01 Write requests 0x02 Read Requests including Prefetch 0x04 Prefetch Request 0x08 32 Bytes Sized Writes 0x10 64 Bytes Sized Writes 0x20 32 Bytes Sized Reads 0x40 64 Byte Sized Reads 0x80 Read requests sent to the DCT while write requests are pending in the DCQ name:httransmit type:bitmask default:0xbf 0x01 Command DWORD sent 0x02 Data DWORD sent 0x04 Buffer release DWORD sent 0x08 Nop DW sent (idle) 0x10 Address DWORD sent 0x20 Per packet CRC sent 0x80 SubLink Mask name:lock_ops type:bitmask default:0x0f 0x01 Number of locked instructions executed 0x02 Cycles in speculative phase 0x04 Cycles in non-speculative phase (including cache miss penalty) 0x08 Cache miss penalty in cycles name:sse_ops type:bitmask default:0x7f 0x01 Single Precision add/subtract ops 0x02 Single precision multiply ops 0x04 Single precision divide/square root ops 0x08 Double precision add/subtract ops 0x10 Double precision multiply ops 0x20 Double precision divide/square root ops 0x40 OP type: 0=uops 1=FLOPS name:move_ops type:bitmask default:0x0f 0x01 Merging low quadword move uops 0x02 Merging high quadword move uops 0x04 All other merging move uops 0x08 All other move uops name:serial_ops type:bitmask default:0x0f 0x01 SSE bottom-executing uops retired 0x02 SSE bottom-serializing uops retired 0x04 x87 bottom-executing uops retired 0x08 x87 bottom-serializing uops retired name:serial_ops_sched type:bitmask default:0x03 0x01 Number of cycles a bottom-execute uops in FP scheduler 0x02 Number of cycles a bottom-serializing uops in FP scheduler name:store_to_load type:bitmask default:0x07 0x01 Address mismatches (starting byte not the same) 0x02 Store is smaller than load 0x04 Misaligned name:moesi_gh type:bitmask default:0x1f 0x01 (I)nvalid cache state 0x02 (S)hared cache state 0x04 (E)xclusive cache state 0x08 (O)wner cache state 0x10 (M)odified cache state 0x20 Cache line evicted brought into the cache by PrefetchNTA 0x40 Cache line evicted not brought into the cache by PrefetchNTA name:l1_dtlb_hit type:bitmask default:0x07 0x01 L1 4K TLB hit 0x02 L1 2M TLB hit 0x04 L1 1G TLB hit name:soft_prefetch type:bitmask default:0x09 0x01 Software prefetch hit in L1 0x08 Software prefetch hit in L2 name:l1_l2_itlb_miss type:bitmask default:0x03 0x01 Instruction fetches to a 4K page 0x02 Instruction fetches to a 2M page name:cpu_dram_req type:bitmask default:0xff 0x01 From local node to node 0 0x02 From local node to node 1 0x04 From local node to node 2 0x08 From local node to node 3 0x10 From local node to node 4 0x20 From local node to node 5 0x40 From local node to node 6 0x80 From local node to node 7 name:io_dram_req type:bitmask default:0xff 0x01 From local node to node 0 0x02 From local node to node 1 0x04 From local node to node 2 0x08 From local node to node 3 0x10 From local node to node 4 0x20 From local node to node 5 0x40 From local node to node 6 0x80 From local node to node 7 name:cpu_read_lat_0_3 type:bitmask default:0xff 0x01 Read block 0x02 Read block shared 0x04 Read block modified 0x08 Change-to-Dirty 0x10 From local node to node 0 0x20 From local node to node 1 0x40 From local node to node 2 0x80 From local node to node 3 name:cpu_read_lat_4_7 type:bitmask default:0xff 0x01 Read block 0x02 Read block shared 0x04 Read block modified 0x08 Change-to-Dirty 0x10 From local node to node 4 0x20 From local node to node 5 0x40 From local node to node 6 0x80 From local node to node 7 name:cpu_comm_lat type:bitmask default:0xf7 0x01 Read sized 0x02 Write sized 0x04 Victim block 0x08 Node group select: 0=Nodes 0-3, 1=Nodes 4-7 0x10 From local node to node 0/4 0x20 From local node to node 1/5 0x40 From local node to node 2/6 0x80 From local node to node 3/7 name:l3_cache type:bitmask default:0xf7 0x01 Read block Exclusive (Data cache read) 0x02 Read block Shared (Instruciton cache read) 0x04 Read block Modify 0x10 Reserved (Must be selected) 0x20 Reserved (Must be selected) 0x40 Reserved (Must be selected) 0x80 Reserved (Must be selected) name:l3_fill type:bitmask default:0xff 0x01 Shared 0x02 Exclusive 0x04 Owned 0x08 Modified 0x10 Reserved (Must be selected) 0x20 Reserved (Must be selected) 0x40 Reserved (Must be selected) 0x80 Reserved (Must be selected) name:l3_evict type:bitmask default:0x0f 0x01 Shared 0x02 Exclusive 0x04 Owned 0x08 Modified name:icache_invalidated type:bitmask default:0x03 0x01 Invalidating probe that did not hit any in-flight instructions 0x02 Invalidating probe that hit one or more in-flight instructions name:page_size_mismatches type:bitmask default:0x07 0x01 Guest page size is larger than the host page size 0x02 MTRR mismatch 0x04 Host page size is larger than the guest page size name:retired_x87_fp type:bitmask default:0x07 0x01 Add/subtract ops 0x02 Multiply ops 0x04 Divide ops name:non_cancelled_l3_read_requests type:bitmask default:0xf7 0x01 RbBlk 0x02 RbBlkS 0x04 RbBlkM 0x10 Reserved (Must be selected) 0x20 Reserved (Must be selected) 0x40 Reserved (Must be selected) 0x80 Reserved (Must be selected) oprofile-1.3.0/events/alpha/0000775000175000017500000000000013323173530012726 500000000000000oprofile-1.3.0/events/alpha/ev67/0000775000175000017500000000000013323173530013515 500000000000000oprofile-1.3.0/events/alpha/ev67/events0000664000175000017500000000053612534404406014672 00000000000000# Alpha EV-67 Events # event:0x01 counters:0,1 um:zero minimum:500 name:CYCLES : Total cycles event:0x02 counters:0 um:zero minimum:500 name:INSTRUCTIONS : Retired instructions event:0x03 counters:1 um:zero minimum:500 name:BCACHE_MISS : Bcache misses/long probe latency event:0x04 counters:1 um:zero minimum:500 name:MBOX_REPLAY : Mbox replay traps oprofile-1.3.0/events/alpha/ev67/unit_masks0000664000175000017500000000013312534404406015534 00000000000000# Alpha EV-67 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask oprofile-1.3.0/configure.ac0000664000175000017500000003623313323172033012547 00000000000000# Autoconf script for oprofile # # Copyright 1999 Olaf Titz # Adapted for oprofile # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License # as published by the Free Software Foundation; either version # 2 of the License, or (at your option) any later version. # AC_PREREQ(2.13) AC_INIT([OProfile], [1.3.0]) AC_CONFIG_SRCDIR([libop/op_config.h]) AM_INIT_AUTOMAKE AC_CONFIG_HEADERS(config.h) AC_CHECK_DECLS([basename], [], [], [[#include ]]) AC_PROG_RANLIB AC_PROG_LIBTOOL PKG_PROG_PKG_CONFIG dateopt='' if test -n "$SOURCE_DATE_EPOCH" ; then if date --version | grep -q GNU ; then dateopt="-u -d @$SOURCE_DATE_EPOCH" else dateopt="-u -r $SOURCE_DATE_EPOCH" fi fi dnl for the man page DATE="`date $dateopt '+%a %d %B %Y'`" AC_SUBST(DATE) # Since we should not permanently alter user environment variables, we'll # save the contents of the original flags in case the user has set them # prior to running this configue script. CPPFLAGS_SAVE="$CPPFLAGS" LDFLAGS_SAVE="$LDFLAGS" AC_ARG_WITH(binutils, [ --with-binutils=dir Path to binutils installation to use], BINUTILSDIR=$withval) if test "$BINUTILSDIR" != ""; then LD="$BINUTILSDIR/ld" CPPFLAGS="$CPPFLAGS -I$BINUTILSDIR/include" AC_ARG_WITH(binutils-libname, [ --with-binutils-libname Lib dir name under binutils installation; @<:@lib@:>@]], BINUTILSLIB=$withval) if test "$BINUTILSLIB" = ""; then BINUTILSLIB="lib" fi LDFLAGS="$LDFLAGS -L$BINUTILSDIR/$BINUTILSLIB -Xlinker -R -Xlinker $BINUTILSDIR/$BINUTILSLIB" OP_LDFLAGS="$LDFLAGS" OP_CPPFLAGS="$CPPFLAGS" else OP_LDFLAGS= OP_CPPFLAGS= fi # We can't restore original flag values for CPPFLAGS and LDFLAGS until we're done # checking for bfd.h and libiberty.h (in AX_BINUTILS). AC_PROG_CC AC_PROG_CPP AC_PROG_CXX AC_CHECK_PROG(LD,ld,ld,) test "$LD" || AC_MSG_ERROR(ld not found) # --with-kernel for cross compilation AC_ARG_WITH(kernel, [AS_HELP_STRING([--with-kernel=dir], [Path to kernel include directory (e.g. /tmp/linux-xyz) to use. If this option is not specified, configure will look for kernel header files in the usual installation location for a kernel-headers package -- /usr. Use this option in cross-compile enviroments or in situations where the host system does not support perf_events but you wish to build binaries for a target system that does support perf_events. Because of OProfile's use of syscalls, kernel headers used during build must match the architecture of the intended target system. NOTE: Run the command 'make headers_install INSTALL_HDR_PATH=' from the root directory of your kernel source tree, and use for oprofile's '--with-kernel' configure option.])], KERNELDIR=$withval) dnl Check kernel version for perf_events supported if test "$KERNELDIR" != ""; then if test -d $KERNELDIR; then KINC="$KERNELDIR/include" PERF_EVENT_FLAGS=" -I$KERNELDIR/include" AC_SUBST(PERF_EVENT_FLAGS) PERF_EVENT_H="$KERNELDIR/include/linux/perf_event.h" fi else PERF_EVENT_H="/usr/include/linux/perf_event.h" fi PERF_EVENT_H_EXISTS="no" kernel_may_have_perf_events_support="no" AX_KERNEL_VERSION(2, 6, 31, <=, kernel_may_have_perf_events_support="yes", kernel_has_perf_events_support="no") if test "$kernel_has_perf_events_support" = "no"; then AC_MSG_ERROR(Your kernel version is older than the required level (2.6.31) to build oprofile.) fi dnl The AX_KERNEL_VERSION macro may return kernel_may_have_perf_events_support="yes", dnl indicating a partial answer. Some architectures do not implement the Performance dnl Events Kernel Subsystem even with kernel versions > 2.6.31 -- i.e., not even dnl implementing the perf_event_open syscall to return ENOSYS. So the check below dnl will identify and handle such situations. if test "$kernel_may_have_perf_events_support" = "yes"; then AC_CHECK_HEADER($PERF_EVENT_H,PERF_EVENT_H_EXISTS="yes") AC_MSG_CHECKING([kernel supports perf_events]) if test "$PERF_EVENT_H_EXISTS" = "yes"; then rm -f test-for-PERF_EVENT_OPEN AC_LANG_CONFTEST( [AC_LANG_PROGRAM([[#include #include #include #include ]], [[struct perf_event_attr attr; pid_t pid; memset(&attr, 0, sizeof(attr)); attr.size = sizeof(attr); attr.sample_type = PERF_SAMPLE_IP; pid = getpid(); syscall(__NR_perf_event_open, &attr, pid, 0, -1, 0); ]]) ]) $CC conftest.$ac_ext $CFLAGS $LDFLAGS $LIBS $PERF_EVENT_FLAGS -o test-for-PERF_EVENT_OPEN > /dev/null 2>&1 if test -f test-for-PERF_EVENT_OPEN; then kernel_has_perf_events_support="yes" AC_MSG_RESULT(yes) else AC_MSG_RESULT(no) kernel_has_perf_events_support="no" fi rm -f test-for-PERF_EVENT_OPEN else AC_MSG_RESULT(unknown -- perf_event.h not found) fi else AC_MSG_RESULT(kernel supports perf_events... no) kernel_has_perf_events_support="no" fi if test "$kernel_has_perf_events_support" != "yes"; then if test "$KERNELDIR" != ""; then echo "ERROR: You requested to build oprofile with '--with-kernel=$KERNELDIR'," if ! test -d $KERNELDIR; then echo "but that directory does not exist." elif test "$PERF_EVENT_H_EXISTS" != "yes"; then echo "but headers were not accessible at the given location." echo "Be sure you have run the following command from within your kernel source tree:" echo " make headers_install INSTALL_HDR_PATH=" echo "Then pass to oprofile's '--with-kernel' configure option." else echo "but your kernel does not appear to have the necessary support to run oprofile." fi else if test "$PERF_EVENT_H_EXISTS" != "yes"; then echo "Error: perf_event.h not found. Either install the kernel headers package or" echo "use the --with-kernel option." else echo "Error: Your kernel does not appear to have the necessary support to run oprofile." fi fi AC_MSG_ERROR(Unable to build oprofile. Exiting.) fi AM_CONDITIONAL(BUILD_FOR_PERF_EVENT, test "$kernel_has_perf_events_support" = "yes") HAVE_PERF_EVENTS='1' AC_MSG_CHECKING([whether PERF_RECORD_MISC_GUEST_KERNEL is defined in perf_event.h]) rm -f test-for-PERF_GUEST AC_LANG_CONFTEST( [AC_LANG_PROGRAM([[#include ]], [[unsigned int pr_guest_kern = PERF_RECORD_MISC_GUEST_KERNEL; unsigned int pr_guest_user = PERF_RECORD_MISC_GUEST_USER;]]) ]) $CC conftest.$ac_ext $CFLAGS $LDFLAGS $LIBS $PERF_EVENT_FLAGS -o test-for-PERF_GUEST > /dev/null 2>&1 if test -f test-for-PERF_GUEST; then echo "yes" HAVE_PERF_GUEST_MACROS='1' else echo "no" HAVE_PERF_GUEST_MACROS='0' fi AC_DEFINE_UNQUOTED(HAVE_PERF_GUEST_MACROS, $HAVE_PERF_GUEST_MACROS, [PERF_RECORD_MISC_GUEST_KERNEL is defined in perf_event.h]) rm -f test-for-PERF_GUEST* AC_MSG_CHECKING([whether precise_ip is defined in perf_event.h]) rm -f test-for-precise-ip AC_LANG_CONFTEST( [AC_LANG_PROGRAM([[#include ]], [[struct perf_event_attr attr; attr.precise_ip = 2;]]) ]) $CC conftest.$ac_ext $CFLAGS $LDFLAGS $LIBS $PERF_EVENT_FLAGS -o test-for-precise-ip > /dev/null 2>&1 if test -f test-for-precise-ip; then echo "yes" HAVE_PERF_PRECISE_IP='1' else echo "no" HAVE_PERF_PRECISE_IP='0' fi AC_DEFINE_UNQUOTED(HAVE_PERF_PRECISE_IP, $HAVE_PERF_PRECISE_IP, [precise_ip is defined in perf_event.h]) rm -f test-for-precise-ip* AC_DEFINE_UNQUOTED(HAVE_PERF_EVENTS, $HAVE_PERF_EVENTS, [Kernel support for perf_events exists]) AC_CANONICAL_HOST PFM_LIB= if test "$host_cpu" = "powerpc64le" -o "$host_cpu" = "powerpc64"; then AC_CHECK_HEADER(perfmon/pfmlib.h,,[AC_MSG_ERROR([pfmlib.h not found; may be provided by libpfm devel or papi devel package])]) AC_CHECK_LIB(pfm,pfm_get_os_event_encoding, HAVE_LIBPFM3='0'; HAVE_LIBPFM='1', [ AC_CHECK_LIB(pfm, pfm_get_event_name, HAVE_LIBPFM3='1'; HAVE_LIBPFM='1', [AC_MSG_ERROR([libpfm not found; may be provided by libpfm devel or papi devel package])])]) PFM_LIB="-lpfm" AC_DEFINE_UNQUOTED(HAVE_LIBPFM3, $HAVE_LIBPFM3, [Define to 1 if using libpfm3; 0 if using newer libpfm]) AC_DEFINE_UNQUOTED(HAVE_LIBPFM, $HAVE_LIBPFM, [Define to 1 if libpfm is available]) fi AC_SUBST(PFM_LIB) AC_ARG_WITH(java, [ --with-java=java-home Path to Java home directory (default is "no"; "yes" will use /usr as Java home)], JAVA_HOMEDIR=$with_java, [with_java=no]) if test "x$with_java" = "xyes"; then JAVA_HOMEDIR="/usr" else if test "x$with_java" = "xno"; then JAVA_HOMEDIR= else JAVA_HOME_SPECIFIED="yes" fi fi AC_SUBST(JAVA_HOMEDIR) if test -n "$JAVA_HOMEDIR"; then AC_CHECK_FILE("$JAVA_HOMEDIR/include/jvmti.h",JVMTI_H_EXISTS="yes",) AC_CHECK_FILE("$JAVA_HOMEDIR/include/jvmpi.h",JVMPI_H_EXISTS="yes",) fi if test -n "$JAVA_HOME_SPECIFIED" && test -z "$JVMTI_H_EXISTS" && test -z "$JVMPI_H_EXISTS"; then if test -d "$JAVA_HOMEDIR"; then echo "You specified the "--with-java" option, but neither jvmti.h nor jvmpi.h were found." else echo "You specified the "--with-java" option, but $JAVA_HOMEDIR does not exist." fi exit fi AM_CONDITIONAL(BUILD_JVMTI_AGENT, test -n "$JVMTI_H_EXISTS") AM_CONDITIONAL(BUILD_JVMPI_AGENT, test -n "$JVMPI_H_EXISTS") AX_MALLOC_ATTRIBUTE AX_BUILTIN_EXPECT AC_SUBST(EXTRA_CFLAGS_MODULE) topdir=`pwd` AC_SUBST(topdir) AX_EXTRA_DIRS ORIG_SAVE_LIBS="$LIBS" dnl advanced glibc features which we need but may not be present AC_CHECK_FUNCS(sched_setaffinity perfmonctl) AC_CHECK_LIB(popt, poptGetContext,, AC_MSG_ERROR([popt library not found])) AX_BINUTILS # Now we can restore original flag values, and may as well do the # AC_SUBST, too. CPPFLAGS="$CPPFLAGS_SAVE" LDFLAGS="$LDFLAGS_SAVE" AC_SUBST(OP_CPPFLAGS) AC_SUBST(OP_LDFLAGS) # C++ tests AC_LANG_CPLUSPLUS AX_POPT_CONST AX_CHECK_SSTREAM dnl bfd.h pre 1998 check only for gnu 2.xx series, so gcc 3.0 can't compile it AC_MSG_CHECKING([whether bfd defines bool]) AC_TRY_COMPILE([#include ], [], AC_MSG_RESULT([no]);, AC_MSG_RESULT([yes]); AC_DEFINE(TRUE_FALSE_ALREADY_DEFINED, 1, [whether bfd.h defines bool values])) dnl smart demangler need to know what are the underlined type for some typedef AX_TYPEDEFED_NAME(size_t, "unsigned" "unsigned long", SIZE_T_TYPE) AC_SUBST(SIZE_T_TYPE) AX_TYPEDEFED_NAME(ptrdiff_t, "int" "long", PTRDIFF_T_TYPE) AC_SUBST(PTRDIFF_T_TYPE) AC_PATH_XTRA dnl enable pch for c++ AC_ARG_ENABLE(pch, [ --enable-pch enable precompiled header (default is disabled)], enable_pch=$enableval, enable_pch=no) if test "$enable_pch" = yes; then AX_CHECK_PRECOMPILED_HEADER(OP_CXXFLAGS) fi AX_CHECK_DOCBOOK dnl finally restore the original libs setting LIBS="$ORIG_SAVE_LIBS" LIBERTY_LIBS="-liberty $DL_LIB $INTL_LIB" BFD_LIBS="-lbfd -liberty $DL_LIB $INTL_LIB $Z_LIB" POPT_LIBS="-lpopt" AC_SUBST(LIBERTY_LIBS) AC_SUBST(BFD_LIBS) AC_SUBST(POPT_LIBS) # do NOT put tests here, they will fail in the case X is not installed ! AX_CFLAGS_OPTION(OP_CFLAGS,[-W]) AX_CXXFLAGS_OPTION(OP_CXXFLAGS,[-W]) AX_CFLAGS_OPTION(OP_CFLAGS,[-Wall]) AX_CXXFLAGS_OPTION(OP_CXXFLAGS,[-Wall]) AX_CFLAGS_OPTION(OP_CFLAGS,[-fno-common]) AX_CXXFLAGS_OPTION(OP_CXXFLAGS,[-fno-common]) AX_CFLAGS_OPTION(OP_CFLAGS,[-Wdeclaration-after-statement]) dnl enable option to use GCC test coverage AC_ARG_ENABLE(gcov, [ --enable-gcov enable option for gcov coverage testing (default is disabled)], enable_gcov=$enableval, enable_gcov=no) if test "$enable_gcov" = yes; then AX_CFLAGS_OPTION(OP_CFLAGS,[-fprofile-arcs]) AX_CXXFLAGS_OPTION(OP_CXXFLAGS,[-fprofile-arcs]) AX_CFLAGS_OPTION(OP_CFLAGS,[-ftest-coverage]) AX_CXXFLAGS_OPTION(OP_CXXFLAGS,[-ftest-coverage]) fi AC_ARG_ENABLE(werror, [ --disable-werror disable -Werror flag (default is enabled for non-release)], enable_werror=$enableval, enable_werror=yes) if test "$enable_werror" = yes; then # enable -Werror for non-release versions. if echo "$VERSION" | grep git >/dev/null; then AX_CFLAGS_OPTION(OP_CFLAGS,[-Werror]) AX_CXXFLAGS_OPTION(OP_CXXFLAGS,[-Werror]) fi fi AC_ARG_ENABLE(optimization, [ --disable-optimization disable optimization flags (default is enabled)], enable_optimization=$enableval, enable_optimisation=yes) if test "$enable_optimization" = "no"; then CFLAGS=`echo $CFLAGS | sed 's/-O2//g'` CXXFLAGS=`echo $CXXFLAGS | sed 's/-O2//g'` fi AC_ARG_ENABLE(account-check, [ --disable-account-check disable account check (default is enabled)], enable_account_check=$enableval, enable_account_check=yes) AM_CONDITIONAL(CHECK_ACCOUNT, test "x$enable_account_check" = "xyes") AC_SUBST(OP_CFLAGS) AC_SUBST(OP_CXXFLAGS) AC_CHECK_FUNC(clock_gettime, [], [ AC_CHECK_LIB(rt, clock_gettime, RT_LIB="-lrt", AC_MSG_ERROR(Unable to find clock_gettime function; required by ocount))]) AC_SUBST(RT_LIB) # fixups for config.h if test "$prefix" = "NONE"; then my_op_prefix="$ac_default_prefix" else my_op_prefix="$prefix" fi my_op_datadir="$my_op_prefix/share" if test "$exec_prefix" = "NONE"; then my_op_exec_prefix="$my_op_prefix" else my_op_exec_prefix="$exec_prefix" fi my_op_bindir="$my_op_exec_prefix/bin" OP_DATADIR=`eval echo "$my_op_datadir/$PACKAGE/"` AC_DEFINE_UNQUOTED(OP_DATADIR, "$OP_DATADIR", [package data directory]) OP_BINDIR=`eval echo "$my_op_bindir/"` AC_DEFINE_UNQUOTED(OP_BINDIR, "$OP_BINDIR", [package binary directory]) OP_DOCDIR=`eval echo "${my_op_prefix}/share/doc/$PACKAGE/"` AC_SUBST(OP_DOCDIR) AC_OUTPUT(Makefile \ pe_counting/Makefile \ libpe_utils/Makefile \ pe_profiling/Makefile \ libperf_events/Makefile \ m4/Makefile \ libutil/Makefile \ libutil/tests/Makefile \ libutil++/Makefile \ libutil++/tests/Makefile \ libop/Makefile \ libop/tests/Makefile \ libopagent/Makefile \ libopt++/Makefile \ libdb/Makefile \ libdb/tests/Makefile \ libabi/Makefile \ libabi/tests/Makefile \ libregex/Makefile \ libregex/tests/Makefile \ libregex/stl.pat \ libregex/tests/mangled-name \ events/Makefile \ utils/Makefile \ doc/Makefile \ doc/xsl/catalog-1.xml \ doc/oprofile.1 \ doc/ophelp.1 \ doc/op-check-perfevents.1 \ doc/opreport.1 \ doc/opannotate.1 \ doc/opgprof.1 \ doc/oparchive.1 \ doc/opimport.1 \ doc/operf.1 \ doc/ocount.1 \ doc/opjitconv.1 \ doc/srcdoc/Doxyfile \ libpp/Makefile \ opjitconv/Makefile \ pp/Makefile \ agents/Makefile \ agents/jvmti/Makefile \ agents/jvmpi/Makefile) AX_COPY_IF_CHANGE(doc/xsl/catalog-1.xml, doc/xsl/catalog.xml) if ! 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#include #include #include #include #include #include #include #include #include "operf_utils.h" #include "op_pe_utils.h" #include "op_libiberty.h" #include "string_manip.h" #include "cverb.h" #include "operf_counter.h" #include "op_cpu_type.h" #include "op_cpufreq.h" #include "op_events.h" #include "op_string.h" #include "operf_kernel.h" #include "child_reader.h" #include "op_get_time.h" #include "operf_stats.h" #include "op_netburst.h" #include "utility.h" using namespace std; using namespace op_pe_utils; typedef enum END_CODE { ALL_OK = 0, APP_ABNORMAL_END = 1, PERF_RECORD_ERROR = 2, PERF_READ_ERROR = 4, PERF_BOTH_ERROR = 8 } end_code_t; // Globals char * app_name = NULL; bool use_cpu_minus_one = false; pid_t app_PID = -1; uint64_t kernel_start, kernel_end; op_cpu cpu_type; double cpu_speed; uint op_nr_events; verbose vmisc("misc"); uid_t my_uid; bool no_vmlinux; int kptr_restrict; char * start_time_human_readable; std::vector events; operf_read operfRead(events); /* With certain operf options, we have to take extra steps to track new threads * and processes that an app may create via pthread_create, fork, etc. Note that * any such thread or process creation APIs will result in a PERF_RECORD_FORK event, * so we handle these new threads/processes in operf_utils::__handle_fork_event. */ bool track_new_forks; #define DEFAULT_OPERF_OUTFILE "operf.data" #define KERN_ADDR_SPACE_START_SYMBOL "_stext" #define KERN_ADDR_SPACE_END_SYMBOL "_etext" #define KERN_ADDR_SPACE_START_SYMBOL_OBSOLETE "_text" static operf_record * operfRecord = NULL; static char * app_name_SAVE = NULL; static char ** app_args = NULL; static pid_t jitconv_pid = -1; static bool app_started; static pid_t operf_record_pid; static pid_t operf_read_pid; static string samples_dir; static bool startApp; static string outputfile; static char start_time_str[32]; static bool jit_conversion_running; static void convert_sample_data(void); static int sample_data_pipe[2]; static int app_ready_pipe[2], start_app_pipe[2], operf_record_ready_pipe[2]; // The operf_convert_record_write_pipe is used for the convert process to send // forked PID data to the record process. static int operf_convert_record_write_pipe[2]; // The operf_record_convert_write_pipe is used for the record process to send // data to the convert process in response to the forked PID data. static int operf_record_convert_write_pipe[2]; // The operf_post_profiling_pipe is used by the main process to inform the operf_read_pid // that profiling is done. The operf_read_pid will then print its progress in // finishing the conversion. static int operf_post_profiling_pipe[2]; bool ctl_c = false; bool pipe_closed = false; namespace operf_options { bool system_wide; bool append; int pid; bool callgraph; int mmap_pages_mult; string session_dir; string vmlinux; bool separate_cpu; bool separate_thread; bool post_conversion; set evts; } static const char * valid_verbose_vals[] = { "debug", "record", "convert", "misc", "sfile", "arcs", "all"}; #define NUM_VERBOSE_OPTIONS (sizeof(valid_verbose_vals)/sizeof(char *)) struct option long_options [] = { {"verbose", required_argument, NULL, 'V'}, {"session-dir", required_argument, NULL, 'd'}, {"vmlinux", required_argument, NULL, 'k'}, {"callgraph", no_argument, NULL, 'g'}, {"system-wide", no_argument, NULL, 's'}, {"append", no_argument, NULL, 'a'}, {"pid", required_argument, NULL, 'p'}, {"events", required_argument, NULL, 'e'}, {"separate-cpu", no_argument, NULL, 'c'}, {"separate-thread", no_argument, NULL, 't'}, {"lazy-conversion", no_argument, NULL, 'l'}, {"help", no_argument, NULL, 'h'}, {"version", no_argument, NULL, 'v'}, {"usage", no_argument, NULL, 'u'}, {NULL, 9, NULL, 0} }; const char * short_options = "V:d:k:gsap:e:ctlhuv"; vector verbose_string; void __set_event_throttled(int index) { if (index < 0) { cerr << "Unable to determine if throttling occurred for "; cerr << "event " << events[index].name << endl; } else { throttled = true; events[index].throttled = true; } } static void __print_usage_and_exit(const char * extra_msg) { if (extra_msg) cerr << extra_msg << endl; cerr << "usage: operf [ options ] [ --system-wide | --pid | [ command [ args ] ] ]" << endl; cerr << "See operf man page for details." << endl; exit(EXIT_FAILURE); } // Signal handler for main (parent) process. static void op_sig_stop(int val __attribute__((unused))) { // Received a signal to quit, so we need to stop the // app being profiled. size_t dummy __attribute__ ((__unused__)); ctl_c = true; if (cverb << vdebug) dummy = write(1, "in op_sig_stop\n", 15); if (startApp) kill(app_PID, SIGKILL); } // For child processes to manage a controlled stop after Ctl-C is done static void _handle_sigint(int val __attribute__((unused))) { size_t dummy __attribute__ ((__unused__)); /* Each process (parent and each forked child) will have their own copy of * the ctl_c variable, so this can be used by each process in managing their * shutdown procedure. */ ctl_c = true; if (cverb << vdebug) dummy = write(1, "in _handle_sigint\n", 19); return; } void _set_basic_SIGINT_handler_for_child(void) { struct sigaction act; sigset_t ss; sigfillset(&ss); sigprocmask(SIG_UNBLOCK, &ss, NULL); act.sa_handler = _handle_sigint; act.sa_flags = 0; sigemptyset(&act.sa_mask); sigaddset(&act.sa_mask, SIGINT); if (sigaction(SIGINT, &act, NULL)) { perror("operf: install of SIGINT handler failed: "); exit(EXIT_FAILURE); } } void set_signals_for_parent(void) { struct sigaction act; sigset_t ss; sigfillset(&ss); sigprocmask(SIG_UNBLOCK, &ss, NULL); act.sa_handler = op_sig_stop; act.sa_flags = 0; sigemptyset(&act.sa_mask); sigaddset(&act.sa_mask, SIGINT); if (sigaction(SIGINT, &act, NULL)) { perror("operf: install of SIGINT handler failed: "); exit(EXIT_FAILURE); } } static string args_to_string(void) { string ret; char * const * ptr = app_args + 1; while (*ptr != NULL) { ret.append(*ptr); ret += ' '; ptr++; } return ret; } void run_app(void) { // ASSUMPTION: app_name is a fully-qualified pathname char * app_fname = rindex(app_name, '/') + 1; app_args[0] = app_fname; string arg_str = args_to_string(); cverb << vdebug << "Exec args are: " << app_fname << " " << arg_str << endl; // Fake an exec to warm-up the resolver execvp("", app_args); // signal to the parent that we're ready to exec int startup = 1; if (write(app_ready_pipe[1], &startup, sizeof(startup)) < 0) { perror("Internal error on app_ready_pipe"); _exit(EXIT_FAILURE); } // wait for parent to tell us to start int startme = 0; if (read(start_app_pipe[0], &startme, sizeof(startme)) == -1) { perror("Internal error in run_app on start_app_pipe"); _exit(EXIT_FAILURE); } if (startme != 1) _exit(EXIT_SUCCESS); cverb << vdebug << "parent says start app " << app_name << endl; app_started = true; execvp(app_name, app_args); cerr << "Failed to exec " << app_fname << " " << arg_str << ": " << strerror(errno) << endl; /* We don't want any cleanup in the child */ _exit(EXIT_FAILURE); } int start_profiling(void) { // The only process that should return from this function is the process // which invoked it. Any forked process must do _exit() rather than return(). struct timeval tv; unsigned long long start_time = 0ULL; gettimeofday(&tv, NULL); start_time = 0ULL; start_time = tv.tv_sec; sprintf(start_time_str, "%llu", start_time); start_time_human_readable = op_get_time(); startApp = ((app_PID != operf_options::pid) && (operf_options::system_wide == false)); if (startApp) { if (pipe(app_ready_pipe) < 0 || pipe(start_app_pipe) < 0) { perror("Internal error: operf-record could not create pipe"); _exit(EXIT_FAILURE); } app_PID = fork(); if (app_PID < 0) { perror("Internal error: fork failed"); _exit(EXIT_FAILURE); } else if (app_PID == 0) { // child process for exec'ing app if (!operf_options::post_conversion) { close(sample_data_pipe[0]); close(sample_data_pipe[1]); } run_app(); } } // parent if (pipe(operf_record_ready_pipe) < 0) { perror("Internal error: could not create pipe"); return -1; } if (pipe2(operf_convert_record_write_pipe, O_NONBLOCK) < 0) { perror("Internal error: could not create pipe"); return -1; } if (pipe(operf_record_convert_write_pipe) < 0) { perror("Internal error: could not create pipe"); return -1; } operf_record_pid = fork(); if (operf_record_pid < 0) { return -1; } else if (operf_record_pid == 0) { // operf-record process int ready = 0; int exit_code = EXIT_SUCCESS; _set_basic_SIGINT_handler_for_child(); close(operf_record_ready_pipe[0]); close(operf_convert_record_write_pipe[1]); close(operf_record_convert_write_pipe[0]); if (!operf_options::post_conversion) close(sample_data_pipe[0]); /* * Since an informative message will be displayed to the user if * an error occurs, we don't want to blow chunks here; instead, we'll * exit gracefully. Clear out the operf.data file as an indication * to the parent process that the profile data isn't valid. */ try { OP_perf_utils::vmlinux_info_t vi; int outfd; int flags = O_WRONLY | O_CREAT | O_TRUNC; vi.image_name = operf_options::vmlinux; vi.start = kernel_start; vi.end = kernel_end; if (operf_options::post_conversion) { outfd = open(outputfile.c_str(), flags, S_IRUSR|S_IWUSR); if (outfd < 0) { string errmsg = "Internal error: Could not create temporary output file. errno is "; errmsg += strerror(errno); throw runtime_error(errmsg); } } else { outfd = sample_data_pipe[1]; } operfRecord = new operf_record(outfd, operf_options::system_wide, app_PID, (operf_options::pid == app_PID), events, vi, operf_options::callgraph, operf_options::separate_cpu, operf_options::post_conversion, operf_convert_record_write_pipe[0], operf_record_convert_write_pipe[1]); if (operfRecord->get_valid() == false) { /* If valid is false, it means that one of the "known" errors has * occurred: * - profiled process has already ended * - passed PID was invalid * - device or resource busy * - failure to mmap kernel profile data */ cerr << "operf record init failed" << endl; cerr << "usage: operf [ options ] [ --system-wide | --pid | [ command [ args ] ] ]" << endl; // Exit with SUCCESS to avoid the unnecessary "operf-record process ended // abnormally" message goto fail_out; } ready = 1; if (write(operf_record_ready_pipe[1], &ready, sizeof(ready)) < 0) { perror("Internal error on operf_record_ready_pipe"); exit_code = EXIT_FAILURE; goto fail_out; } // start recording operfRecord->recordPerfData(); cverb << vdebug << "Total bytes recorded from perf events: " << dec << operfRecord->get_total_bytes_recorded() << endl; delete operfRecord; } catch (const runtime_error & re) { /* If the user does ctl-c, the operf-record process may get interrupted * in a system call, causing problems with writes to the sample data pipe. * So we'll ignore such errors unless the user requests debug info. */ if (!ctl_c || (cverb << vmisc)) { cerr << "Caught runtime_error: " << re.what() << endl; exit_code = EXIT_FAILURE; } goto fail_out; } // done _exit(exit_code); fail_out: if (operfRecord) try { delete operfRecord; } catch (const runtime_error & re) { // We're already in failure mode here; if we get a runtime_error while // deleting operfRecord, we'll only print it if user requests "-V misc" if (cverb << vmisc) { cerr << "Caught runtime_error: " << re.what() << endl; exit_code = EXIT_FAILURE; } } if (!ready){ /* ready==0 means we've not yet told parent we're ready, * but the parent is reading our pipe. So we tell the * parent we're not ready so it can continue. */ if (write(operf_record_ready_pipe[1], &ready, sizeof(ready)) < 0) { perror("Internal error on operf_record_ready_pipe"); } } _exit(exit_code); } else { // parent int recorder_ready = 0; int startup; close(operf_record_ready_pipe[1]); if (startApp) { if (read(app_ready_pipe[0], &startup, sizeof(startup)) == -1) { perror("Internal error on app_ready_pipe"); return -1; } else if (startup != 1) { cerr << "app is not ready to start; exiting" << endl; return -1; } } if (read(operf_record_ready_pipe[0], &recorder_ready, sizeof(recorder_ready)) == -1) { perror("Internal error on operf_record_ready_pipe"); return -1; } else if (recorder_ready != 1) { cverb << vdebug << "operf record process failure; exiting" << endl; if (startApp) { cverb << vdebug << "telling child to abort starting of app" << endl; startup = 0; if (write(start_app_pipe[1], &startup, sizeof(startup)) < 0) { perror("Internal error on start_app_pipe"); } } return -1; } if (startApp) { // Tell app_PID to start the app cverb << vdebug << "telling child to start app" << endl; if (write(start_app_pipe[1], &startup, sizeof(startup)) < 0) { perror("Internal error on start_app_pipe"); return -1; } } } if (!operf_options::system_wide) app_started = true; // parent returns return 0; } static end_code_t _waitfor_operf_read_pid(end_code_t rc) { // Now wait for the operf-read process to finish int wait_rc, waitpid_status, post_processing = 1; if (write(operf_post_profiling_pipe[1], &post_processing, sizeof(post_processing)) < 0) { perror("Internal error: Failed to write to operf_post_profiling_pipe"); rc = rc ? PERF_BOTH_ERROR : PERF_READ_ERROR; return rc; } waitpid_status = 0; if ((wait_rc = waitpid(operf_read_pid, &waitpid_status, 0)) < 0) { if (errno != ECHILD) { perror("waitpid for operf-read process failed"); rc = rc ? PERF_BOTH_ERROR : PERF_READ_ERROR; } } else if (wait_rc) { if (WIFEXITED(waitpid_status)) { if (!WEXITSTATUS(waitpid_status)) { cverb << vdebug << "operf-read process returned OK" << endl; } else { /* If user did ctl-c, operf-read may get spurious errors, like * broken pipe, etc. We ignore these unless the user asks for * debug output. */ if (!ctl_c || cverb << vdebug) { cerr << "operf-read process ended abnormally. Status = " << WEXITSTATUS(waitpid_status) << endl; rc = rc ? PERF_BOTH_ERROR : PERF_READ_ERROR; } } } else if (WIFSIGNALED(waitpid_status)) { /* If user did ctl-c, operf-read may get spurious errors, like * broken pipe, etc. We ignore these unless the user asks for * debug output. */ if (!ctl_c || cverb << vdebug) { cerr << "operf-read process killed by signal " << WTERMSIG(waitpid_status) << endl; rc = PERF_RECORD_ERROR; } } } return rc; } static end_code_t _kill_operf_record_pid(void) { int waitpid_status = 0; end_code_t rc = ALL_OK; // stop operf-record process errno = 0; if (kill(operf_record_pid, SIGUSR1) < 0) { // If operf-record process is already ended, don't consider this an error. if (errno != ESRCH) { perror("Attempt to stop operf-record process failed"); rc = PERF_RECORD_ERROR; } } else { if (waitpid(operf_record_pid, &waitpid_status, 0) < 0) { perror("waitpid for operf-record process failed"); rc = PERF_RECORD_ERROR; } else { if (WIFEXITED(waitpid_status) && (!WEXITSTATUS(waitpid_status))) { cverb << vdebug << "operf-record process returned OK" << endl; } else if (WIFEXITED(waitpid_status)) { /* If user did ctl-c, operf-record may get spurious errors, like * broken pipe, etc. We ignore these unless the user asks for * debug output. */ if (!ctl_c || cverb << vdebug) { cerr << "operf-record process ended abnormally: " << WEXITSTATUS(waitpid_status) << endl; rc = PERF_RECORD_ERROR; } } else if (WIFSIGNALED(waitpid_status)) { if (!ctl_c || cverb << vdebug) { cerr << "operf-record process killed by signal " << WTERMSIG(waitpid_status) << endl; rc = PERF_RECORD_ERROR; } } } } return rc; } static end_code_t _run(void) { int waitpid_status = 0; end_code_t rc = ALL_OK; bool kill_record = true; // Fork processes with signals blocked. sigset_t ss; sigfillset(&ss); sigprocmask(SIG_BLOCK, &ss, NULL); /* By default (unless the user specifies --lazy-conversion), the operf-record process * writes the sample data to a pipe, from which the operf-read process reads. */ if (!operf_options::post_conversion && pipe(sample_data_pipe) < 0) { perror("Internal error: operf-record could not create pipe"); _exit(EXIT_FAILURE); } if (start_profiling() < 0) { return PERF_RECORD_ERROR; } // parent continues here if (startApp) cverb << vdebug << "app " << app_PID << " is running" << endl; /* If we're not doing system wide profiling and no app is started, then * there's no profile data to convert. So if this condition is NOT true, * then we'll do the convert. * Note that if --lazy-conversion is passed, then operf_options::post_conversion * will be set, and we will defer conversion until after the operf-record * process is done. */ if (!operf_options::post_conversion) { if (!(!app_started && !operf_options::system_wide)) { cverb << vdebug << "Forking read pid" << endl; if (pipe(operf_post_profiling_pipe) < 0) { perror("Internal error: operf-record could not create pipe"); _exit(EXIT_FAILURE); } operf_read_pid = fork(); if (operf_read_pid < 0) { perror("Internal error: fork failed"); _exit(EXIT_FAILURE); } else if (operf_read_pid == 0) { // child process close(sample_data_pipe[1]); close(operf_post_profiling_pipe[1]); _set_basic_SIGINT_handler_for_child(); convert_sample_data(); _exit(EXIT_SUCCESS); } // parent close(sample_data_pipe[0]); close(sample_data_pipe[1]); close(operf_convert_record_write_pipe[0]); close(operf_convert_record_write_pipe[1]); close(operf_record_convert_write_pipe[0]); close(operf_record_convert_write_pipe[1]); close(operf_post_profiling_pipe[0]); } } set_signals_for_parent(); if (startApp) { /* The user passed in a command or program name to start, so we'll need to do waitpid on that * process. However, while that user-requested process is running, it's possible we * may get an error in the operf-record process. If that happens, we want to know it right * away so we can stop profiling and kill the user app. Therefore, we must use WNOHANG * on the waitpid call and bounce back and forth between the user app and the operf-record * process, checking their status. The profiled app may end normally, abnormally, or by way * of ctrl-C. The operf-record process should not end here, except abnormally. The normal * flow is: * 1. profiled app ends or is stopped via ctrl-C * 2. keep_trying is set to false, so we drop out of while loop and proceed to end of function * 3. call _kill_operf_record_pid and _kill_operf_read_pid */ bool keep_trying = true; const char * app_process = "profiled app"; const char * record_process = "operf-record process"; waitpid_status = 0; cverb << vdebug << "going into waitpid on profiled app " << app_PID << endl; // We'll try the waitpid with WNOHANG once every 100 ms (100,000,000 nsecs). while (keep_trying) { pid_t the_pid = app_PID; int wait_rc; const char * the_process = app_process; bool trying_user_app = true; struct timespec ts_req; ts_req.tv_sec = 0; ts_req.tv_nsec = 100000000; (void)nanosleep(&ts_req, NULL); again: if ((wait_rc = waitpid(the_pid, &waitpid_status, WNOHANG)) < 0) { keep_trying = false; if (errno == EINTR) { // Ctrl-C will only kill the profiled app. See the op_sig_stop signal handler. cverb << vdebug << "Caught ctrl-C. Killed " << the_process << "." << endl; } else { cerr << "waitpid for " << the_process << " failed: " << strerror(errno) << endl; rc = trying_user_app ? APP_ABNORMAL_END : PERF_RECORD_ERROR; } } else if (wait_rc) { keep_trying = false; if (WIFEXITED(waitpid_status) && (!WEXITSTATUS(waitpid_status))) { cverb << vdebug << the_process << " ended normally." << endl; } else if (WIFEXITED(waitpid_status)) { cerr << the_process << " exited with the following status: " << WEXITSTATUS(waitpid_status) << endl; rc = trying_user_app ? APP_ABNORMAL_END : PERF_RECORD_ERROR; } else if (WIFSIGNALED(waitpid_status)) { if (WTERMSIG(waitpid_status) != SIGKILL) { cerr << the_process << " killed by signal " << WTERMSIG(waitpid_status) << endl; rc = trying_user_app ? APP_ABNORMAL_END : PERF_RECORD_ERROR; } } else { keep_trying = true; } } if (trying_user_app && (rc == ALL_OK)) { trying_user_app = false; the_pid = operf_record_pid; the_process = record_process; goto again; } else if (rc != ALL_OK) { // If trying_user_app == true, implies profiled app ended; otherwise, operf-record process abended. if (!trying_user_app) kill_record = false; } } } else { // User passed in --pid or --system-wide cout << "operf: Press Ctl-c or 'kill -SIGINT " << getpid() << "' to stop profiling" << endl; cverb << vdebug << "going into waitpid on operf record process " << operf_record_pid << endl; if (waitpid(operf_record_pid, &waitpid_status, 0) < 0) { if (errno == EINTR) { cverb << vdebug << "Caught ctrl-C. Killing operf-record process . . ." << endl; } else { cerr << "waitpid errno is " << errno << endl; perror("waitpid for operf-record process failed"); kill_record = false; rc = PERF_RECORD_ERROR; } } else { if (WIFEXITED(waitpid_status) && (!WEXITSTATUS(waitpid_status))) { cverb << vdebug << "waitpid for operf-record process returned OK" << endl; } else if (WIFEXITED(waitpid_status)) { kill_record = false; cerr << "operf-record process ended abnormally: " << WEXITSTATUS(waitpid_status) << endl; rc = PERF_RECORD_ERROR; } else if (WIFSIGNALED(waitpid_status)) { kill_record = false; cerr << "operf-record process killed by signal " << WTERMSIG(waitpid_status) << endl; rc = PERF_RECORD_ERROR; } } } if (kill_record) { if (operf_options::post_conversion) rc = _kill_operf_record_pid(); else rc = _waitfor_operf_read_pid(_kill_operf_record_pid()); } else { if (!operf_options::post_conversion) rc = _waitfor_operf_read_pid(rc); } return rc; } static void cleanup(void) { free(app_name_SAVE); free(app_args); events.clear(); verbose_string.clear(); if (operf_options::post_conversion) { string cmd = "rm -f " + outputfile; if (system(cmd.c_str()) != 0) cerr << "Unable to remove " << outputfile << endl; } } static void _jitconv_complete(int val __attribute__((unused))) { int child_status; pid_t the_pid = wait(&child_status); if (the_pid != jitconv_pid) { return; } jit_conversion_running = false; if (WIFEXITED(child_status) && (!WEXITSTATUS(child_status))) { cverb << vdebug << "JIT dump processing complete." << endl; } else { if (WIFSIGNALED(child_status)) { if (ctl_c) cerr << "JIT conversion stopped by request of user via ctl-c" << endl; else cerr << "child received signal " << WTERMSIG(child_status) << endl; } else { cerr << "JIT dump processing exited abnormally: " << WEXITSTATUS(child_status) << endl; } } } static void _set_signals_for_convert(void) { struct sigaction act; sigset_t ss; sigfillset(&ss); sigprocmask(SIG_UNBLOCK, &ss, NULL); act.sa_handler = _jitconv_complete; act.sa_flags = 0; sigemptyset(&act.sa_mask); sigaddset(&act.sa_mask, SIGCHLD); if (sigaction(SIGCHLD, &act, NULL)) { perror("operf: install of SIGCHLD handler failed: "); exit(EXIT_FAILURE); } } static void _do_jitdump_convert() { int arg_num; unsigned long long end_time = 0ULL; struct timeval tv; char end_time_str[32]; char opjitconv_path[PATH_MAX + 1]; char * exec_args[9]; jitconv_pid = fork(); switch (jitconv_pid) { case -1: perror("Error forking JIT dump process!"); break; case 0: { const char * jitconv_pgm = "opjitconv"; const char * debug_option = "-d"; const char * non_root_user = "--non-root"; const char * delete_jitdumps = "--delete-jitdumps"; const char * sess_dir = "--session-dir"; gettimeofday(&tv, NULL); end_time = tv.tv_sec; sprintf(end_time_str, "%llu", end_time); sprintf(opjitconv_path, "%s/%s", OP_BINDIR, jitconv_pgm); arg_num = 0; exec_args[arg_num++] = (char *)jitconv_pgm; if (cverb << vdebug) exec_args[arg_num++] = (char *)debug_option; if (my_uid != 0) exec_args[arg_num++] = (char *)non_root_user; exec_args[arg_num++] = (char *)delete_jitdumps; exec_args[arg_num++] = (char *)sess_dir; exec_args[arg_num++] = (char *)operf_options::session_dir.c_str(); exec_args[arg_num++] = start_time_str; exec_args[arg_num++] = end_time_str; exec_args[arg_num] = (char *) NULL; execvp(opjitconv_path, exec_args); fprintf(stderr, "Failed to exec %s: %s\n", exec_args[0], strerror(errno)); /* We don't want any cleanup in the child */ _exit(EXIT_FAILURE); break; } default: // parent jit_conversion_running = true; break; } } static int __delete_old_previous_sample_data(const char *fpath, const struct stat *sb __attribute__((unused)), int tflag __attribute__((unused)), struct FTW *ftwbuf __attribute__((unused))) { if (remove(fpath)) { perror("sample data removal error"); return FTW_STOP; } else { return FTW_CONTINUE; } } /* Read perf_events sample data written by the operf-record process through * the sample_data_pipe or file (dependent on 'lazy-conversion' option) * and convert the perf format sample data to to oprofile format sample files. * * If not invoked with --lazy-conversion option, this function is executed by * the "operf-read" child process. If user does a ctrl-C, the parent will * execute _kill_operf_read_pid which will try to allow the conversion process * to complete, waiting 5 seconds before it forcefully kills the operf-read * process via 'kill SIGUSR1'. * * But if --lazy-conversion option is used, then it's the parent process that's * running convert_sample_data. If the user does a ctrl-C during this procedure, * the ctrl-C is handled via op_sig_stop which essentially does nothing to stop * the conversion procedure, which in general is fine. On the very rare chance * that the procedure gets stuck (hung) somehow, the user will have to do a * 'kill -KILL'. */ static void convert_sample_data(void) { int inputfd; string inputfname; int rc = EXIT_SUCCESS; string current_sampledir = samples_dir + "/current/"; string previous_sampledir = samples_dir + "/previous"; string stats_dir = ""; current_sampledir.copy(op_samples_current_dir, current_sampledir.length(), 0); if (!app_started && !operf_options::system_wide) return; if (!operf_options::append) { int flags = FTW_DEPTH | FTW_ACTIONRETVAL; errno = 0; if (nftw(previous_sampledir.c_str(), __delete_old_previous_sample_data, 32, flags) !=0 && errno != ENOENT) { cerr << "Unable to remove old sample data at " << previous_sampledir << "." << endl; if (errno) cerr << strerror(errno) << endl; rc = EXIT_FAILURE; goto out; } if (rename(current_sampledir.c_str(), previous_sampledir.c_str()) < 0) { if (errno && (errno != ENOENT)) { cerr << "Unable to move old profile data to " << previous_sampledir << endl; cerr << strerror(errno) << endl; rc = EXIT_FAILURE; goto out; } } } rc = mkdir(current_sampledir.c_str(), S_IRWXU | S_IRWXG | S_IROTH | S_IXOTH); if (rc && (errno != EEXIST)) { cerr << "Error trying to create " << current_sampledir << " dir." << endl; perror("mkdir failed with"); rc = EXIT_FAILURE; goto out; } if (operf_options::post_conversion) { inputfd = -1; inputfname = outputfile; } else { inputfd = sample_data_pipe[0]; inputfname = ""; } close(operf_record_convert_write_pipe[1]); close(operf_convert_record_write_pipe[0]); operfRead.init(inputfd, inputfname, current_sampledir, cpu_type, operf_options::system_wide, operf_convert_record_write_pipe[1], operf_record_convert_write_pipe[0], operf_post_profiling_pipe[0]); if ((rc = operfRead.readPerfHeader()) < 0) { if (rc != OP_PERF_HANDLED_ERROR) cerr << "Error: Cannot create read header info for sample data " << endl; rc = EXIT_FAILURE; goto out; } cverb << vdebug << "Successfully read header info for sample data " << endl; if (operfRead.is_valid()) { try { unsigned int num = operfRead.convertPerfData(); cverb << vdebug << "operf_read: Total bytes received from operf_record process: " << dec << num << endl; } catch (const runtime_error & e) { cerr << "Caught runtime error from operf_read::convertPerfData" << endl; cerr << e.what() << endl; rc = EXIT_FAILURE; goto out; } } _set_signals_for_convert(); cverb << vdebug << "Calling _do_jitdump_convert" << endl; _do_jitdump_convert(); while (jit_conversion_running) { sleep(1); } out: if (!operf_options::post_conversion) _exit(rc); } static void _process_session_dir(void) { if (operf_options::session_dir.empty()) { char * cwd = NULL; int rc; cwd = (char *) xmalloc(PATH_MAX); // set default session dir cwd = getcwd(cwd, PATH_MAX); if (cwd == NULL) { perror("Error calling getcwd"); exit(EXIT_FAILURE); } operf_options::session_dir = cwd; operf_options::session_dir +="/oprofile_data"; samples_dir = operf_options::session_dir + "/samples"; free(cwd); rc = mkdir(operf_options::session_dir.c_str(), S_IRWXU | S_IRWXG | S_IROTH | S_IXOTH); if (rc && (errno != EEXIST)) { cerr << "Error trying to create " << operf_options::session_dir << " dir." << endl; perror("mkdir failed with"); exit(EXIT_FAILURE); } rc = mkdir(samples_dir.c_str(), S_IRWXU | S_IRWXG | S_IROTH | S_IXOTH); if (rc && (errno != EEXIST)) { cerr << "Error trying to create " << samples_dir << " dir." << endl; perror("mkdir failed with"); exit(EXIT_FAILURE); } } else { struct stat filestat; int rc; if (stat(operf_options::session_dir.c_str(), &filestat)) { perror("stat operation on passed session-dir failed"); exit(EXIT_FAILURE); } if (!S_ISDIR(filestat.st_mode)) { cerr << "Passed session-dir " << operf_options::session_dir << " is not a directory" << endl; exit(EXIT_FAILURE); } samples_dir = operf_options::session_dir + "/samples"; rc = mkdir(samples_dir.c_str(), S_IRWXU); if (rc && (errno != EEXIST)) { cerr << "Error trying to create " << samples_dir << " dir." << endl; perror("mkdir failed with"); exit(EXIT_FAILURE); } } cverb << vdebug << "Using samples dir " << samples_dir << endl; } bool _get_vmlinux_address_info(vector args, string cmp_val, string &str) { bool found = false; child_reader reader("objdump", args); if (reader.error()) { cerr << "An error occurred while trying to get vmlinux address info:\n\n"; cerr << reader.error_str() << endl; exit(EXIT_FAILURE); } while (reader.getline(str)) { if (str.find(cmp_val.c_str()) != string::npos) { found = true; break; } } // objdump always returns SUCCESS so we must rely on the stderr state // of objdump. If objdump error message is cryptic our own error // message will be probably also cryptic ostringstream std_err; ostringstream std_out; reader.get_data(std_out, std_err); if (std_err.str().length()) { cerr << "An error occurred while getting vmlinux address info:\n\n"; cerr << std_err.str() << endl; // If we found the string we were looking for in objdump output, // treat this as non-fatal error. if (!found) exit(EXIT_FAILURE); } // force error code to be acquired reader.terminate_process(); // required because if objdump stop by signal all above things suceeed // (signal error message are not output through stdout/stderr) if (reader.error()) { cerr << "An error occur during the execution of objdump to get vmlinux address info:\n\n"; cerr << reader.error_str() << endl; if (!found) exit(EXIT_FAILURE); } return found; } static bool _add_kernel_entry(string start_addr_str, string end_addr_str, string image_name) { string str, start_end; unsigned long long start_addr, end_addr; errno = 0; start_addr = strtoull(start_addr_str.c_str(), NULL, 16); if (errno) { cerr << "Unable to convert kallsyms start address " << start_addr_str << " to a valid hex value. errno is " << strerror(errno) << endl; return false; } errno = 0; end_addr = strtoull(end_addr_str.c_str(), NULL, 16); if (errno) { cerr << "Unable to convert kallsyms end address " << end_addr_str << " to a valid hex value. errno is " << strerror(errno) << endl; return false; } if ((start_addr == 0) || (end_addr == 0)) { no_vmlinux = true; cerr << "Kernel profiling is not possible with current system " << "config." << endl << "Set /proc/sys/kernel/kptr_restrict to 0 to " << "collect kernel samples." << endl; return false; } /* Do not assign kernel_start and kernel_end until the addresses * have been validated. */ kernel_start = start_addr; kernel_end = end_addr; start_end = start_addr_str; start_end.append(","); start_end.append(end_addr_str); no_vmlinux = false; // set to false or the operf_get_vmlinux_name() returns "no-vmlinux" operf_create_vmlinux(image_name.c_str(), start_end.c_str()); return true; } static bool _process_kallsyms(void) { ifstream infile; string start_addr_str, end_addr_str; string address_str; string str, start_end; std::string line; stringstream iss; string name; string kall_syms_file = KALL_SYM_FILE; char type; int rtn = false; infile.open(kall_syms_file.c_str()); if (!infile) { cerr << "Internal Error: Could not open kallsyms file." << endl; return false; } start_addr_str.clear(); end_addr_str.clear(); /* get the start and end address of the kernel address range */ while ( !infile.eof() ) { getline(infile, line); iss.clear(); iss << line; address_str.clear(); iss >> address_str; iss >> type; iss >> name; /* accept _text as the start symbol only in case there is no _stext * because _stext has higher priority */ if (start_addr_str.empty()) { if (strncmp(name.c_str(), KERN_ADDR_SPACE_START_SYMBOL_OBSOLETE, strlen(name.c_str())) == 0) { /* found the symbol for the start of the kernel * address space. */ start_addr_str.assign(address_str); } } /* if _stext is found, it will overwrite the _text if it has been * already found */ if (strncmp(name.c_str(), KERN_ADDR_SPACE_START_SYMBOL, strlen(name.c_str())) == 0) { /* found the symbol for the start of the kernel * address space. */ start_addr_str.assign(address_str); } if (strncmp(name.c_str(), KERN_ADDR_SPACE_END_SYMBOL, strlen(name.c_str())) == 0) { /* found the symbol for the end of the kernel * address space. */ end_addr_str.assign(address_str); rtn = _add_kernel_entry(start_addr_str, end_addr_str, KALL_SYM_FILE); break; } } infile.close(); return rtn; } string _process_vmlinux(string vmlinux_file) { vector args; char start[17], end[17]; string str, start_end; bool found; int ret; no_vmlinux = false; args.push_back("-h"); args.push_back(vmlinux_file); if ((found = _get_vmlinux_address_info(args, " .text", str))) { cverb << vmisc << str << endl; ret = sscanf(str.c_str(), " %*s %*s %*s %s", start); } if (!found || ret != 1){ cerr << "Unable to obtain vmlinux start address." << endl; cerr << "The specified vmlinux file (" << vmlinux_file << ") " << "does not seem to be valid." << endl; cerr << "Make sure you are using a non-compressed image file " << "(e.g. vmlinux not vmlinuz)" << endl; exit(EXIT_FAILURE); } args.clear(); args.push_back("-t"); args.push_back(vmlinux_file); if ((found = _get_vmlinux_address_info(args, " _etext", str))) { cverb << vmisc << str << endl; ret = sscanf(str.c_str(), "%s", end); } if (!found || ret != 1){ cerr << "Unable to obtain vmlinux end address." << endl; cerr << "The specified vmlinux file (" << vmlinux_file << ") " << "does not seem to be valid." << endl; cerr << "Make sure you are using a non-compressed image file " << "(e.g. vmlinux not vmlinuz)" << endl; exit(EXIT_FAILURE); } errno = 0; kernel_start = strtoull(start, NULL, 16); if (errno) { cerr << "Unable to convert vmlinux start address " << start << " to a valid hex value. errno is " << strerror(errno) << endl; exit(EXIT_FAILURE); } errno = 0; kernel_end = strtoull(end, NULL, 16); if (errno) { cerr << "Unable to convert vmlinux end address " << start << " to a valid hex value. errno is " << strerror(errno) << endl; exit(EXIT_FAILURE); } start_end = start; start_end.append(","); start_end.append(end); return start_end; } static void _print_valid_verbose_options(void) { cerr << "Valid verbosity options are: "; for (unsigned i = 0; i < (NUM_VERBOSE_OPTIONS - 1); i++) cerr << valid_verbose_vals[i] << ","; cerr << valid_verbose_vals[NUM_VERBOSE_OPTIONS - 1] << endl; } static bool _validate_verbose_args(char * verbosity) { bool valid_verbosity = true; char * verbose_cand = strtok(verbosity, ","); do { unsigned i; for (i = 0; i < (NUM_VERBOSE_OPTIONS); i++) { if (!strcmp(verbose_cand, valid_verbose_vals[i])) { verbose_string.push_back(verbose_cand); break; } } if (i == NUM_VERBOSE_OPTIONS) { valid_verbosity = false; cerr << "Verbosity argument " << verbose_cand << " is not valid." << endl; _print_valid_verbose_options(); } } while ((verbose_cand = strtok(NULL, ",")) && valid_verbosity); return valid_verbosity; } static int _process_operf_and_app_args(int argc, char * const argv[]) { bool keep_trying = true; int idx_of_non_options = 0; char * prev_env = getenv("POSIXLY_CORRECT"); setenv("POSIXLY_CORRECT", "1", 0); while (keep_trying) { int option_idx = 0; int c = getopt_long(argc, argv, short_options, long_options, &option_idx); switch (c) { char * endptr; char * event; case -1: if (optind != argc) { idx_of_non_options = optind; } keep_trying = false; break; case '?': cerr << "non-option detected at optind " << optind << endl; keep_trying = false; idx_of_non_options = -1; break; case 'V': if (!_validate_verbose_args(optarg)) __print_usage_and_exit("NULL"); break; case 'd': operf_options::session_dir = optarg; break; case 'k': operf_options::vmlinux = optarg; break; case 'g': operf_options::callgraph = true; break; case 's': operf_options::system_wide = true; break; case 'a': operf_options::append = true; break; case 'p': operf_options::pid = strtol(optarg, &endptr, 10); if ((endptr >= optarg) && (endptr <= (optarg + strlen(optarg) - 1))) __print_usage_and_exit("operf: Invalid numeric value for --pid option."); break; case 'e': event = strtok(optarg, ","); do { operf_options::evts.insert(event); } while ((event = strtok(NULL, ","))); break; case 'c': operf_options::separate_cpu = true; break; case 't': operf_options::separate_thread = true; break; case 'l': operf_options::post_conversion = true; break; case 'h': __print_usage_and_exit(NULL); break; case 'u': __print_usage_and_exit(NULL); break; case 'v': cout << argv[0] << ": " << PACKAGE << " " << VERSION << " compiled on " << __DATE__ << " " << __TIME__ << endl; exit(EXIT_SUCCESS); break; default: __print_usage_and_exit("unexpected end of arg parsing"); } } if (prev_env == NULL) unsetenv("POSIXLY_CORRECT"); return idx_of_non_options; } static void process_args(int argc, char * const argv[]) { int non_options_idx = _process_operf_and_app_args(argc, argv); if (non_options_idx < 0) { __print_usage_and_exit(NULL); } else if ((non_options_idx) > 0) { if (operf_options::pid || operf_options::system_wide) __print_usage_and_exit(NULL); app_name = (char *) xmalloc(strlen(argv[non_options_idx]) + 1); strcpy(app_name, argv[non_options_idx]); // Note 1: app_args[0] is placeholder for app_fname (filled in later). // Note 2: app_args[] is set to NULL (required by execvp) if (non_options_idx < (argc -1)) { app_args = (char **) xmalloc((sizeof *app_args) * (argc - non_options_idx + 1)); for(int i = non_options_idx + 1; i < argc; i++) { app_args[i - non_options_idx] = argv[i]; } app_args[argc - non_options_idx] = NULL; } else { app_args = (char **) xmalloc((sizeof *app_args) * 2); app_args[1] = NULL; } if (op_validate_app_name(&app_name, &app_name_SAVE) < 0) { __print_usage_and_exit(NULL); } } else { // non_options_idx == 0 if (operf_options::pid) { if (operf_options::system_wide) __print_usage_and_exit(NULL); app_PID = operf_options::pid; } else if (operf_options::system_wide) { app_PID = -1; } else { __print_usage_and_exit(NULL); } } /* At this point, we know which of the three kinds of profiles the user requested: * - profile app by name * - profile app by PID * - profile whole system */ if (!verbose::setup(verbose_string)) { cerr << "unknown --verbose= options\n"; exit(EXIT_FAILURE); } _process_session_dir(); if (operf_options::post_conversion) outputfile = samples_dir + "/" + DEFAULT_OPERF_OUTFILE; if (operf_options::evts.empty()) { // Use default event op_get_default_event(operf_options::callgraph); } else { op_process_events_list(operf_options::evts, true, operf_options::callgraph); } op_nr_events = events.size(); if (operf_options::vmlinux.empty()) { /* get the begining and end of the kernel addr space */ if (!_process_kallsyms()) { /* Do not have permission to read * kernel addresses from /proc/kallsyms. */ no_vmlinux = true; operf_create_vmlinux(NULL, NULL); } } else { string startEnd = _process_vmlinux(operf_options::vmlinux); operf_create_vmlinux(operf_options::vmlinux.c_str(), startEnd.c_str()); } if (operf_options::pid && !operf_options::post_conversion) track_new_forks = true; else track_new_forks = false; return; } static void _precheck_permissions_to_samplesdir(string sampledir, bool for_current) { /* Pre-check to make sure we have permission to remove old sample data * or to create new sample data in the specified sample data directory. * If the user wants us to remove old data, we don't actually do it now, * since the profile session may fail for some reason or the user may do ctl-c. * We should exit without unnecessarily removing the old sample data as * the user may expect it to still be there after an aborted run. */ string sampledir_testfile = sampledir + "/.xxxTeStFiLe"; ofstream afile; errno = 0; afile.open(sampledir_testfile.c_str()); if (!afile.is_open() && (errno != ENOENT)) { if (operf_options::append && for_current) cerr << "Unable to write to sample data directory at " << sampledir << "." << endl; else cerr << "Unable to remove old sample data at " << sampledir << "." << endl; if (errno) cerr << strerror(errno) << endl; cerr << "Try a manual removal of " << sampledir << endl; cleanup(); exit(1); } afile.close(); } int main(int argc, char * const argv[]) { int rc; int perf_event_paranoid = op_get_sys_value("/proc/sys/kernel/perf_event_paranoid"); my_uid = geteuid(); throttled = false; rc = op_check_perf_events_cap(use_cpu_minus_one); if (rc == EACCES) { /* Early perf_events kernels required the cpu argument to perf_event_open * to be '-1' when setting up to profile a single process if 1) the user is * not root; and 2) perf_event_paranoid is > 0. An EACCES error would be * returned if passing '0' or greater for the cpu arg and the above criteria * was not met. Unfortunately, later kernels turned this requirement around * such that the passed cpu arg must be '0' or greater when the user is not * root. * * We don't really have a good way to check whether we're running on such an * early kernel except to try the perf_event_open with different values to see * what works. */ if (my_uid != 0 && perf_event_paranoid > 0) { use_cpu_minus_one = true; rc = op_check_perf_events_cap(use_cpu_minus_one); } } if (rc == EBUSY) { cerr << "Performance monitor unit is busy. Ensure that no other profilers are running on the system." << endl << "Note: For example, the obsolete opcontrol profiler (available in earlier oprofile releases)" << endl << "does not allow other perforrmance tools to run simultaneously. To check for this, look for the" << endl << "'oprofiled' process using the 'ps' command." << endl; } else if (rc == ENOSYS) { cerr << "Your kernel does not implement a required syscall" << " for the operf program." << endl; } else if (rc == ENOENT) { cerr << "Your kernel's Performance Events Subsystem does not support" << " your processor type." << endl; } else if (rc) { cerr << "Unexpected error running operf: " << strerror(rc) << endl; } if (rc) exit(1); cpu_type = op_get_cpu_type(); if (cpu_type == CPU_NO_GOOD) { cerr << "Unable to ascertain cpu type. Exiting." << endl; cleanup(); exit(1); } if (cpu_type == CPU_TIMER_INT) { cerr << "CPU type 'timer' was detected, but operf does not support timer mode." << endl << "Ensure the obsolete opcontrol profiler (available in earlier oprofile releases)" << endl << "is not running on the system. To check for this, look for the file" << endl << "/dev/oprofile/cpu_type; if this file exists, locate the pre-1.0 oprofile" << endl << "installation, and use its 'opcontrol' command with the --deinit option." << endl; cleanup(); exit(1); } cpu_speed = op_cpu_frequency(); process_args(argc, argv); if (operf_options::system_wide && ((my_uid != 0) && (perf_event_paranoid > 0))) { cerr << "To do system-wide profiling, either you must be root or" << endl; cerr << "/proc/sys/kernel/perf_event_paranoid must be set to 0 or -1." << endl; cleanup(); exit(1); } if (my_uid != 0) { bool for_current = true; string current_sampledir = samples_dir + "/current"; _precheck_permissions_to_samplesdir(current_sampledir, for_current); if (!operf_options::append) { string previous_sampledir = samples_dir + "/previous"; for_current = false; _precheck_permissions_to_samplesdir(previous_sampledir, for_current); } } kptr_restrict = op_get_sys_value("/proc/sys/kernel/kptr_restrict"); end_code_t run_result; if ((run_result = _run())) { if (startApp && app_started && (run_result != APP_ABNORMAL_END)) { int rc; cverb << vdebug << "Killing profiled app . . ." << endl; rc = kill(app_PID, SIGKILL); if (rc) { if (errno == ESRCH) cverb << vdebug << "Unable to kill profiled app because it has already ended" << endl; else perror("Attempt to kill profiled app failed."); } } if ((run_result == PERF_RECORD_ERROR) || (run_result == PERF_BOTH_ERROR)) { cerr << "Error running profiler" << endl; } else if (run_result == PERF_READ_ERROR) { cerr << "Error converting operf sample data to oprofile sample format" << endl; } else { cerr << "WARNING: Profile results may be incomplete due to to abend of profiled app." << endl; } } else { cerr << endl << "Profiling done." << endl; } if (operf_options::post_conversion) { if (!(!app_started && !operf_options::system_wide)) convert_sample_data(); } cleanup(); return run_result;; } oprofile-1.3.0/libpp/0000775000175000017500000000000013323173530011443 500000000000000oprofile-1.3.0/libpp/name_storage.cpp0000664000175000017500000000520312534404406014535 00000000000000/** * @file name_storage.cpp * Storage of global names (filenames and symbols) * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "name_storage.h" #include "demangle_symbol.h" #include "file_manip.h" #include "string_manip.h" #include "locate_images.h" #include "op_exception.h" using namespace std; image_name_storage image_names; debug_name_storage debug_names; symbol_name_storage symbol_names; string const & image_name_storage::basename(image_name_id id) const { stored_filename const & n = get(id); if (n.base_filename.empty()) n.base_filename = op_basename(n.filename); return n.base_filename; } string const & image_name_storage::get_name(image_name_id id, image_name_type type, extra_images const & extra) const { stored_filename const & n = get(id); if (type == int_filename) { return n.filename; } else if (type == int_basename) { return basename(id); } else if (type == int_real_basename) { if (n.extra_images_uid == 0) { // recursive call to init real_filename. get_name(id, int_real_filename, extra); n.real_base_filename = op_basename(n.real_filename); } return n.real_base_filename; } else if (type == int_real_filename) { if (n.extra_images_uid == 0) { // We ignore error here, the real path will be // identical to the name derived from the sample // filename in this case. FIXME: this mean than the // archive path will be ignored if an error occur. image_error error; n.real_filename = extra.find_image_path(name(id), error, true); n.extra_images_uid = extra.get_uid(); } if (n.extra_images_uid == extra.get_uid()) return n.real_filename; throw op_runtime_error("image_name_storage::get_name() called" " with different extra parameter"); } throw op_runtime_error("invalid parameter to" " image_name_storage;;get_name()"); } string const & debug_name_storage::basename(debug_name_id id) const { stored_name const & n = get(id); if (n.name_processed.empty()) n.name_processed = op_basename(n.name); return n.name_processed; } string const & symbol_name_storage::demangle(symbol_name_id id) const { stored_name const & n = get(id); if (!n.name_processed.empty() || n.name.empty()) return n.name_processed; if (n.name[0] != '?') { n.name_processed = demangle_symbol(n.name); return n.name_processed; } if (n.name.length() < 2 || n.name[1] != '?') { n.name_processed = "(no symbols)"; return n.name_processed; } n.name_processed = "anonymous symbol from section "; n.name_processed += ltrim(n.name, "?"); return n.name_processed; } oprofile-1.3.0/libpp/profile_spec.h0000664000175000017500000000762512534404406014222 00000000000000/** * @file profile_spec.h * Contains a PP profile specification * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef PROFILE_SPEC_H #define PROFILE_SPEC_H #include #include #include #include "filename_spec.h" #include "comma_list.h" #include "locate_images.h" /** * Holds a parsed profile spec composed of tag:value pairs, as given in * pp_interface documentation. * * @internal implemented through a map of string, pointer to function member * indexed by tag_name. */ class profile_spec { public: /** * @param args a vector of non options strings * @param extra extra image paths to search * * Factory returning a profile_spec instance storing all valid * tag:value contained in args vector doing also alias * substitution, non-valid tag:value options are considered * as image:value */ static profile_spec create(std::list const & args, std::vector const & image_path, std::string const & root_path); /** * @param exclude_dependent whether to exclude dependent sub-images * @param exclude_cg whether to exclude call graph file * * Use the spec to generate the list of candidate sample files. */ std::list generate_file_list(bool exclude_dependent, bool exclude_cg) const; /** * @param file_spec the filename specification to check * * return true if filename match the spec. PP:3.24 internal loop */ bool match(filename_spec const & file_spec) const; /** * return archive name * returns an empty string if not using an archive. */ std::string get_archive_path() const; private: profile_spec(); /** * @param tag_value a "tag:value" to interpret, all error throw an * invalid_argument exception. */ void parse(std::string const & tag_value); /** * @param image an image or a libray name given on command line * * Used for e.g. "opreport /bin/mybinary". We don't know yet * if this is an application or a dependent image. */ void set_image_or_lib_name(std::string const & image); /** * @param str a "tag:value" * * return true if tag is a valid tag */ bool is_valid_tag(std::string const & str); /** * implement tag parsing: PP:3.3 to 3.16 */ void parse_archive_path(std::string const &); void parse_session(std::string const &); void parse_session_exclude(std::string const &); void parse_image(std::string const &); void parse_image_exclude(std::string const &); void parse_lib_image(std::string const &); void parse_event(std::string const &); void parse_count(std::string const &); void parse_unitmask(std::string const &); void parse_tid(std::string const &); void parse_tgid(std::string const &); void parse_cpu(std::string const &); typedef void (profile_spec::*action_t)(std::string const &); typedef std::map parse_table_t; parse_table_t parse_table; /** * @param tag_value input "tag:value" string * @param value if success return the value part of tag_value * helper for set/is_valid_tag public interface * * return null if tag is not valid, else return the pointer to member * function to apply and the value in value parameter */ action_t get_handler(std::string const & tag_value, std::string & value); std::string archive_path; std::string binary; std::vector session; std::vector session_exclude; std::vector image; std::vector image_exclude; std::vector lib_image; comma_list event; comma_list count; comma_list unitmask; comma_list tid; comma_list tgid; comma_list cpu; // specified by user on command like opreport image1 image2 ... std::vector image_or_lib_image; public: // FIXME /// extra search path for images extra_images extra_found_images; }; #endif /* !PROFILE_SPEC_H */ oprofile-1.3.0/libpp/parse_filename.cpp0000664000175000017500000001462412534404406015052 00000000000000/** * @file parse_filename.cpp * Split a sample filename into its constituent parts * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include #include #include #include #include #include "parse_filename.h" #include "file_manip.h" #include "string_manip.h" #include "locate_images.h" using namespace std; namespace { // PP:3.19 event_name.count.unitmask.tgid.tid.cpu parsed_filename parse_event_spec(string const & event_spec) { typedef vector parts_type; typedef parts_type::size_type size_type; size_type const nr_parts = 6; parts_type parts = separate_token(event_spec, '.'); if (parts.size() != nr_parts) { throw invalid_argument("parse_event_spec(): bad event specification: " + event_spec); } for (size_type i = 0; i < nr_parts ; ++i) { if (parts[i].empty()) { throw invalid_argument("parse_event_spec(): bad event specification: " + event_spec); } } parsed_filename result; size_type i = 0; result.event = parts[i++]; result.count = parts[i++]; result.unitmask = parts[i++]; result.tgid = parts[i++]; result.tid = parts[i++]; result.cpu = parts[i++]; return result; } /** * @param component path component * * remove from path_component all directory left to {root}, {kern} or {anon} */ void remove_base_dir(vector & path) { vector::iterator it; for (it = path.begin(); it != path.end(); ++it) { if (*it == "{root}" || *it == "{kern}" || *it == "{anon}") break; } path.erase(path.begin(), it); } /// Handle an anon region. Pretty print the details. /// The second argument is the anon portion of the path which will /// contain extra details such as the anon region name (unknown, vdso, heap etc.) string const parse_anon(string const & str, string const & str2) { string name = str2; // Get rid of "{anon: name.erase(0, 6); // Catch the case where we end up with an empty string. This should // never happen, except where things have gone awfully bad with profile // data collection, resulting in one or more bogus sample files. if(0 == name.size()) throw invalid_argument("parse_anon() invalid name: " + str2 + "\n" + "This error indicates your sample data is suspect. It is " + "recommended you do a --reset and collect new profile data."); // Get rid of the trailing '}' name.erase(name.size() - 1, 1); vector parts = separate_token(str, '.'); if (parts.size() != 3) throw invalid_argument("parse_anon() invalid name: " + str); string ret = name +" (tgid:"; ret += parts[0] + " range:" + parts[1] + "-" + parts[2] + ")"; return ret; } } // anonymous namespace /* * valid filename are variations on: * * {kern}/name/event_spec * {root}/path/to/bin/{dep}/{root}/path/to/bin/event_spec * {root}/path/to/bin/{dep}/{anon:anon}/pid.start.end/event_spec * {root}/path/to/bin/{dep}/{anon:[vdso]}/pid.start.end/event_spec * {root}/path/to/bin/{dep}/{kern}/name/event_spec * {root}/path/to/bin/{dep}/{root}/path/to/bin/{cg}/{root}/path/to/bin/event_spec * * where /name/ denote a unique path component */ parsed_filename parse_filename(string const & filename, extra_images const & extra_found_images) { struct stat st; string::size_type pos = filename.find_last_of('/'); if (pos == string::npos) { throw invalid_argument("parse_filename() invalid filename: " + filename); } string event_spec = filename.substr(pos + 1); string filename_spec = filename.substr(0, pos); parsed_filename result = parse_event_spec(event_spec); result.filename = filename; vector path = separate_token(filename_spec, '/'); remove_base_dir(path); // pp_interface PP:3.19 to PP:3.23 path must start either with {root} // or {kern} and we must found at least 2 component, remove_base_dir() // return an empty path if {root} or {kern} are not found if (path.size() < 2) { throw invalid_argument("parse_filename() invalid filename: " + filename); } size_t i; for (i = 1 ; i < path.size() ; ++i) { if (path[i] == "{dep}") break; result.image += "/" + path[i]; } if (i == path.size()) { throw invalid_argument("parse_filename() invalid filename: " + filename); } // skip "{dep}" ++i; // PP:3.19 {dep}/ must be followed by {kern}/, {root}/ or {anon}/ if (path[i] != "{kern}" && path[i] != "{root}" && path[i].find("{anon", 0) != 0) { throw invalid_argument("parse_filename() invalid filename: " + filename); } bool anon = path[i].find("{anon:", 0) == 0; // skip "{root}", "{kern}" or "{anon:.*}" ++i; for (; i < path.size(); ++i) { if (path[i] == "{cg}") break; if (anon) { pos = filename_spec.rfind('.'); pos = filename_spec.rfind('.', pos-1); if (pos == string::npos) { throw invalid_argument("parse_filename() pid.addr.addr name expected: " + filename_spec); } string jitdump = filename_spec.substr(0, pos) + ".jo"; // if a jitdump file exists, we point to this file if (!stat(jitdump.c_str(), &st)) { // later code assumes an optional prefix path // is stripped from the lib_image. result.lib_image = extra_found_images.strip_path_prefix(jitdump); result.jit_dumpfile_exists = true; } else { result.lib_image = parse_anon(path[i], path[i - 1]); } i++; break; } else { result.lib_image += "/" + path[i]; } } if (i == path.size()) return result; // skip "{cg}" ++i; if (i == path.size() || (path[i] != "{kern}" && path[i] != "{root}" && path[i].find("{anon", 0) != 0)) { throw invalid_argument("parse_filename() invalid filename: " + filename); } // skip "{root}", "{kern}" or "{anon}" anon = (path[i].find("{anon", 0) == 0); ++i; if (anon) { result.cg_image = parse_anon(path[i], path[i - 1]); i++; } else { for (; i < path.size(); ++i) result.cg_image += "/" + path[i]; } return result; } bool parsed_filename::profile_spec_equal(parsed_filename const & parsed) { return event == parsed.event && count == parsed.count && unitmask == parsed.unitmask && tgid == parsed.tgid && tid == parsed.tid && cpu == parsed.cpu; } ostream & operator<<(ostream & out, parsed_filename const & data) { out << data.filename << endl; out << data.image << " " << data.lib_image << " " << data.event << " " << data.count << " " << data.unitmask << " " << data.tgid << " " << data.tid << " " << data.cpu << endl; return out; } oprofile-1.3.0/libpp/profile_container.h0000664000175000017500000001432512603572700015245 00000000000000/** * @file profile_container.h * Container associating symbols and samples * * @remark Copyright 2002, 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef PROFILE_CONTAINER_H #define PROFILE_CONTAINER_H #include #include #include "profile.h" #include "utility.h" #include "op_bfd.h" #include "sample_container.h" #include "symbol_container.h" #include "format_flags.h" #include "locate_images.h" class string_filter; class symbol_entry; class sample_entry; /** * Store multiple samples files belonging to the same profiling session. * This is the main container capable of holding the profiles for arbitrary * binary images and arbitrary profile classes. */ class profile_container : noncopyable { public: /** * Build an object to store information on samples. All parameters * acts as hint for what you will request after recording samples and * so allow optimizations during recording the information. * * @param debug_info If true line numbers and source files are * recorded. * @param need_details If true if we need to record all samples or to * to record them at symbol level. * @param extra extra images location */ profile_container(bool debug_info, bool need_details, extra_images const & extra); ~profile_container(); /** * add() - record symbols/samples in the underlying container * * @param profile the samples files container * @param abfd the associated bfd object * @param app_name the owning application name of sample * @param pclass the profile class to add results for * * add() is an helper for delayed ctor. Take care you can't safely * make any call to add after any other member function call. * Obviously you can add only samples files which are coherent (same * sampling rate, same events etc.) */ void add(profile_t const & profile, op_bfd const & abfd, std::string const & app_name, size_t pclass); /// Find a symbol from its image_name, vma, return zero if no symbol /// for this image at this vma symbol_entry const * find_symbol(std::string const & image_name, bfd_vma vma) const; /// Find the symbols from its filename, linenr, return an empty /// symbol_collection if no symbol at this location symbol_collection const find_symbol(debug_name_id filename, size_t linenr) const; /// Find a sample by its symbol, vma, return zero if there is no sample /// at this vma sample_entry const * find_sample(symbol_entry const * symbol, bfd_vma vma) const; /// Find a symbol. Return NULL if not found. symbol_entry const * find(symbol_entry const & symbol) const; /// used for select_symbols() struct symbol_choice { symbol_choice() : hints(cf_none), threshold(0.0), match_image(false) {} /// hints filled in column_flags hints; /// percentage threshold double threshold; /// match the image name only bool match_image; /// owning image name std::string image_name; }; /** * select_symbols - create a set of symbols sorted by sample count * @param choice parameters to use/fill in when selecting */ symbol_collection const select_symbols(symbol_choice & choice) const; /** * select_symbols - create a set of symbols belonging to a given source * @param filename source file where are defined the returned symbols */ symbol_collection const select_symbols(debug_name_id filename) const; /// Like select_symbols for filename without allowing sort by vma. std::vector const select_filename(double threshold) const; /// return the total number of samples count_array_t samples_count() const; /// Get the samples count which belongs to filename. Return 0 if /// no samples found. count_array_t samples_count(debug_name_id filename_id) const; /// Get the samples count which belongs to filename, linenr. Return /// 0 if no samples found. count_array_t samples_count(debug_name_id filename, size_t linenr) const; /// return an iterator to the first symbol symbol_container::symbols_t::iterator begin_symbol() const; /// return an iterator to the last symbol symbol_container::symbols_t::iterator end_symbol() const; /// return iterator to the first samples sample_container::samples_iterator begin() const; /// return iterator to the last samples sample_container::samples_iterator end() const; /// return iterator to the first samples for this symbol sample_container::samples_iterator begin(symbol_entry const *) const; /// return iterator to the last samples for this symbol sample_container::samples_iterator end(symbol_entry const *) const; private: /// helper for add() void add_samples(op_bfd const & abfd, symbol_index_t sym_index, profile_t::iterator_pair const &, symbol_entry const * symbol, size_t pclass, unsigned long start); /** * create an unique artificial symbol for an offset range. The range * is only a hint of the maximum size of the created symbol. We * give to the symbol an unique name as ?image_file_name#order and * a range up to the nearest of syms or for the whole range if no * syms exist after the start offset. the end parameter is updated * to reflect the symbol range. * * The rationale here is to try to create symbols for alignment between * function as little as possible and to create meaningfull symbols * for special case such image w/o symbol. */ std::string create_artificial_symbol(op_bfd const & abfd, u32 start, u32 & end, size_t & order); /// The symbols collected by pp tools sorted by increased vma, provide /// also a sort order on samples count for each profile class scoped_ptr symbols; /// The samples count collected by pp tools sorted by increased vma, /// provide also a sort order on (filename, linenr) scoped_ptr samples; /// build() must count samples count for each profile class so cache it /// here since user of profile_container often need it later. count_array_t total_count; /** * Optimization hints for what information we are going to need, * see the explanation in profile_container() */ //@{ bool debug_info; bool need_details; //@} public: // FIXME extra_images extra_found_images; }; #endif /* !PROFILE_CONTAINER_H */ oprofile-1.3.0/libpp/op_header.h0000664000175000017500000000256012603572700013467 00000000000000/** * @file op_header.h * various free function acting on a sample file header * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef OP_HEADER_H #define OP_HEADER_H #include #include #include "op_sample_file.h" /** * @param h1 sample file header * @param h2 sample file header * @param filename sample filename * * check that the h1 and h2 are coherent (same size, same mtime etc.) * all error are fatal */ void op_check_header(opd_header const & h1, opd_header const & h2, std::string const & filename); bool is_jit_sample(std::string const & filename); /** * check mtime of samples file header against file * all error are fatal */ void check_mtime(std::string const & file, opd_header const & header); /** * @param sample_filename the sample to open * * Return the header of this sample file. Only the magic number is checked * the version number is not checked. All error are fatal */ opd_header const read_header(std::string const & sample_filename); /** * output a readable form of header, this don't include the cpu type * and speed */ std::string const describe_header(opd_header const & header); /// output a readable form of cpu type and speed std::string const describe_cpu(opd_header const & header); #endif // OP_HEADER_H oprofile-1.3.0/libpp/symbol_sort.h0000664000175000017500000000170012534404406014110 00000000000000/** * @file symbol_sort.h * Sorting symbols * * @remark Copyright 2002, 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef SYMBOL_SORT_H #define SYMBOL_SORT_H #include "symbol.h" #include #include struct sort_options { enum sort_order { // order give sort order if caller doesn't specify one first, sample = first, image, app_name, symbol, debug, vma, last }; sort_options() {} void add_sort_option(std::string const & name); void add_sort_option(sort_order order); /** * Sort the given container by the given criteria. */ void sort(symbol_collection & syms, bool reverse_sort, bool long_filenames) const; /** * Sort the given container by the given criteria. */ void sort(diff_collection & syms, bool reverse_sort, bool long_filenames) const; std::vector options; }; #endif // SYMBOL_SORT_H oprofile-1.3.0/libpp/Makefile.am0000664000175000017500000000212112534404406013415 00000000000000AM_CPPFLAGS = \ -I ${top_srcdir}/libop \ -I ${top_srcdir}/libutil \ -I ${top_srcdir}/libdb \ -I ${top_srcdir}/libopt++ \ -I ${top_srcdir}/libutil++ \ -I ${top_srcdir}/libop++ \ -I ${top_srcdir}/libregex \ @OP_CPPFLAGS@ AM_CXXFLAGS = @OP_CXXFLAGS@ noinst_LIBRARIES = libpp.a libpp_a_SOURCES = \ arrange_profiles.cpp \ arrange_profiles.h \ callgraph_container.h \ callgraph_container.cpp \ diff_container.cpp \ diff_container.h \ filename_spec.cpp \ filename_spec.h \ format_flags.h \ format_output.cpp \ format_output.h \ image_errors.h \ image_errors.cpp \ locate_images.cpp \ locate_images.h \ name_storage.cpp \ name_storage.h \ op_header.cpp \ op_header.h \ symbol.cpp \ symbol.h \ parse_filename.cpp \ parse_filename.h \ populate.h \ populate.cpp \ profile.cpp \ profile.h \ profile_container.cpp \ profile_container.h \ profile_spec.cpp \ profile_spec.h \ sample_container.cpp \ sample_container.h \ symbol_container.cpp \ symbol_container.h \ symbol_functors.cpp \ symbol_functors.h \ symbol_sort.cpp \ symbol_sort.h \ xml_utils.h \ xml_utils.cpp oprofile-1.3.0/libpp/diff_container.h0000664000175000017500000000174412534404406014516 00000000000000/** * @file diff_container.h * Container for diffed symbols * * @remark Copyright 2005 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef DIFF_CONTAINER_H #define DIFF_CONTAINER_H #include "profile_container.h" /** * Store two profiles for diffing. */ class diff_container : noncopyable { public: /// populate the collection of diffed symbols diff_container(profile_container const & pc1, profile_container const & pc2); ~diff_container() {} /// return a collection of diffed symbols diff_collection const get_symbols(profile_container::symbol_choice & choice) const; /// total count for 'new' profile count_array_t const samples_count() const; private: /// first profile profile_container const & pc1; /// second profile profile_container const & pc2; /// samples count for pc1 count_array_t total1; /// samples count for pc2 count_array_t total2; }; #endif /* !DIFF_CONTAINER_H */ oprofile-1.3.0/libpp/callgraph_container.cpp0000664000175000017500000003765512603572700016110 00000000000000/** * @file callgraph_container.cpp * Container associating symbols and caller/caller symbols * * @remark Copyright 2004 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include #include #include #include "callgraph_container.h" #include "cverb.h" #include "parse_filename.h" #include "profile_container.h" #include "arrange_profiles.h" #include "populate.h" #include "string_filter.h" #include "op_bfd.h" #include "op_sample_file.h" #include "locate_images.h" #include "utility.h" #include using namespace std; namespace { // we store {caller,callee} inside a single u64 odb_key_t caller_to_key(u32 value) { return odb_key_t(value) << 32; } u32 key_to_callee(odb_key_t key) { return key & 0xffffffff; } bool compare_by_callee_vma(pair const & lhs, pair const & rhs) { return (key_to_callee(lhs.first)) < (key_to_callee(rhs.first)); } /* * We need 2 comparators for callgraph to get the desired output: * * caller_with_few_samples * caller_with_many_samples * function_with_many_samples * callee_with_many_samples * callee_with_few_samples */ bool compare_arc_count(symbol_entry const & lhs, symbol_entry const & rhs) { return lhs.sample.counts[0] < rhs.sample.counts[0]; } bool compare_arc_count_reverse(symbol_entry const & lhs, symbol_entry const & rhs) { return rhs.sample.counts[0] < lhs.sample.counts[0]; } // find the nearest bfd symbol for the given file offset and check it's // in range op_bfd_symbol const * get_symbol_by_filepos(op_bfd const & bfd, u32 bfd_offset, vma_t offset, symbol_index_t & i) { offset += bfd_offset; op_bfd_symbol tmpsym(offset, 0, string()); // sorted by filepos so this will find the nearest vector::const_iterator it = upper_bound(bfd.syms.begin(), bfd.syms.end(), tmpsym); if (it != bfd.syms.begin()) --it; if (it == bfd.syms.end()) { cerr << "get_symbol_by_filepos: no symbols at all?" << endl; abort(); } // if the offset is past the end of the symbol, we didn't find one u32 const end_offset = it->size() + it->filepos(); if (offset >= end_offset) { // let's be verbose for now cerr << "warning: dropping hyperspace sample at offset " << hex << offset << " >= " << end_offset << " for binary " << bfd.get_filename() << dec << endl; return NULL; } i = distance(bfd.syms.begin(), it); return &(*it); } /// temporary caller and callee data held during processing class call_data { public: call_data(profile_container const & p, profile_t const & pr, op_bfd const & bfd, u32 boff, image_name_id iid, image_name_id aid, bool debug_info) : callee_end(0), pc(p), profile(pr), b(bfd), boffset(boff), image(iid), app(aid), debug(debug_info) {} /// point to a caller symbol void caller_sym(symbol_index_t i) { sym = symbol_entry(); unsigned long long start; unsigned long long end; b.get_symbol_range(i, start, end); samples.clear(); // see profile_t::samples_range() for why we need this check if (start > boffset) { profile_t::iterator_pair p_it = profile.samples_range( caller_to_key(start - boffset), caller_to_key(end - boffset)); // Our odb_key_t contain (from_eip << 32 | to_eip), // the range of keys we selected above contains one // caller but different callees, and due to the // ordering callee offsets are not consecutive: so // we must sort them first. for (; p_it.first != p_it.second; ++p_it.first) { samples.push_back(make_pair(p_it.first.vma(), p_it.first.count())); } sort(samples.begin(), samples.end(), compare_by_callee_vma); } sym.size = end - start; sym.name = symbol_names.create(b.syms[i].name()); sym.sample.vma = b.syms[i].vma(); finish_sym(i, start); if (cverb << vdebug) { cverb << vdebug << hex << "Caller sym: " << b.syms[i].name() << " filepos " << start << "-" << end << dec << endl; } } /// point to a callee symbol bool callee_sym(u32 off) { sym = symbol_entry(); symbol_index_t i = 0; op_bfd_symbol const * bfdsym = get_symbol_by_filepos(b, boffset, off, i); if (!bfdsym) return false; callee_end = bfdsym->size() + bfdsym->filepos() - boffset; sym.size = bfdsym->size(); sym.name = symbol_names.create(bfdsym->name()); sym.sample.vma = bfdsym->vma(); finish_sym(i, bfdsym->filepos()); if (cverb << vdebug) { cverb << vdebug << hex << "Callee sym: " << bfdsym->name() << " filepos " << bfdsym->filepos() << "-" << (bfdsym->filepos() + bfdsym->size()) << dec << endl; } return true; } void verbose_bfd(string const & prefix) const { cverb << vdebug << prefix << " " << b.get_filename() << " offset " << boffset << " app " << image_names.name(app) << endl; } typedef vector > samples_t; typedef samples_t::const_iterator const_iterator; samples_t samples; symbol_entry sym; u32 callee_end; private: /// fill in the rest of the sym void finish_sym(symbol_index_t i, unsigned long start) { sym.image_name = image; sym.app_name = app; symbol_entry const * self = pc.find(sym); if (self) sym.sample.counts = self->sample.counts; if (debug) { string filename; file_location & loc = sym.sample.file_loc; if (b.get_linenr(i, start, filename, loc.linenr)) loc.filename = debug_names.create(filename); } } profile_container const & pc; profile_t const & profile; op_bfd const & b; u32 boffset; image_name_id image; image_name_id app; bool debug; }; /// accumulate all samples for a given caller/callee pair count_type accumulate_callee(call_data::const_iterator & it, call_data::const_iterator end, u32 callee_end) { count_type count = 0; call_data::const_iterator const start = it; while (it != end) { u32 offset = key_to_callee(it->first); if (cverb << (vdebug & vlevel1)) { cverb << (vdebug & vlevel1) << hex << "offset: " << offset << dec << endl; } // stop if we pass the end of the callee if (offset >= callee_end) break; count += it->second; ++it; } // If we haven't advanced at all, then we'll get // an infinite loop, so we must abort. if (it == start) { cerr << "failure to advance iterator\n"; abort(); } return count; } } // anonymous namespace void arc_recorder:: add(symbol_entry const & caller, symbol_entry const * callee, count_array_t const & arc_count) { cg_data & data = sym_map[caller]; // If we have a callee, add it to the caller's list, then // add the caller to the callee's list. if (callee) { data.callees[*callee] += arc_count; cg_data & callee_data = sym_map[*callee]; callee_data.callers[caller] += arc_count; } } void arc_recorder::process_children(cg_symbol & sym, double threshold) { // generate the synthetic self entry for the symbol symbol_entry self = sym; self.name = symbol_names.create(symbol_names.demangle(self.name) + " [self]"); sym.total_callee_count += self.sample.counts; sym.callees.push_back(self); sort(sym.callers.begin(), sym.callers.end(), compare_arc_count); sort(sym.callees.begin(), sym.callees.end(), compare_arc_count_reverse); // FIXME: this relies on sort always being sample count cg_symbol::children::iterator cit = sym.callers.begin(); cg_symbol::children::iterator cend = sym.callers.end(); while (cit != cend && op_ratio(cit->sample.counts[0], sym.total_caller_count[0]) < threshold) ++cit; if (cit != cend) sym.callers.erase(sym.callers.begin(), cit); cit = sym.callees.begin(); cend = sym.callees.end(); while (cit != cend && op_ratio(cit->sample.counts[0], sym.total_callee_count[0]) >= threshold) ++cit; if (cit != cend) sym.callees.erase(cit, sym.callees.end()); } void arc_recorder:: process(count_array_t total, double threshold, string_filter const & sym_filter) { map_t::const_iterator it; map_t::const_iterator end = sym_map.end(); for (it = sym_map.begin(); it != end; ++it) { cg_symbol sym((*it).first); cg_data const & data = (*it).second; // threshold out the main symbol if needed if (op_ratio(sym.sample.counts[0], total[0]) < threshold) continue; // FIXME: slow? if (!sym_filter.match(symbol_names.demangle(sym.name))) continue; cg_data::children::const_iterator cit; cg_data::children::const_iterator cend = data.callers.end(); for (cit = data.callers.begin(); cit != cend; ++cit) { symbol_entry csym = cit->first; csym.sample.counts = cit->second; sym.callers.push_back(csym); sym.total_caller_count += cit->second; } cend = data.callees.end(); for (cit = data.callees.begin(); cit != cend; ++cit) { symbol_entry csym = cit->first; csym.sample.counts = cit->second; sym.callees.push_back(csym); sym.total_callee_count += cit->second; } process_children(sym, threshold); // insert sym into cg_syms_objs // then store pointer to sym in cg_syms cg_syms.push_back(&(*cg_syms_objs.insert(cg_syms_objs.end(), sym))); } } symbol_collection const & arc_recorder::get_symbols() const { return cg_syms; } void callgraph_container::populate(list const & iprofiles, extra_images const & extra, bool debug_info, double threshold, bool merge_lib, string_filter const & sym_filter) { this->extra_found_images = extra; // non callgraph samples container, we record sample at symbol level // not at vma level. profile_container pc(debug_info, false, extra_found_images); list::const_iterator it; list::const_iterator const end = iprofiles.end(); for (it = iprofiles.begin(); it != end; ++it) { // populate_caller_image take care about empty sample filename populate_for_image(pc, *it, sym_filter, 0); } add_symbols(pc); total_count = pc.samples_count(); for (it = iprofiles.begin(); it != end; ++it) { for (size_t i = 0; i < it->groups.size(); ++i) { populate(it->groups[i], it->image, i, pc, debug_info, merge_lib); } } recorder.process(total_count, threshold / 100.0, sym_filter); } void callgraph_container::populate(list const & lset, string const & app_image, size_t pclass, profile_container const & pc, bool debug_info, bool merge_lib) { list::const_iterator lit; list::const_iterator const lend = lset.end(); for (lit = lset.begin(); lit != lend; ++lit) { list::const_iterator pit; list::const_iterator pend = lit->files.end(); for (pit = lit->files.begin(); pit != pend; ++pit) { populate(pit->cg_files, app_image, pclass, pc, debug_info, merge_lib); } } } void callgraph_container::populate(list const & cg_files, string const & app_image, size_t pclass, profile_container const & pc, bool debug_info, bool merge_lib) { list::const_iterator it; list::const_iterator const end = cg_files.end(); for (it = cg_files.begin(); it != end; ++it) { cverb << vdebug << "samples file : " << *it << endl; op_bfd *caller_bfd; op_bfd *callee_bfd; parsed_filename caller_file = parse_filename(*it, extra_found_images); string const app_name = caller_file.image; image_error error; extra_found_images.find_image_path(caller_file.lib_image, error, false); if (error != image_ok) report_image_error(caller_file.lib_image, error, false, extra_found_images); bool caller_bfd_ok = true; if (strncmp(caller_file.lib_image.c_str(), KALL_SYM_FILE, strlen(caller_file.lib_image.c_str())) == 0) caller_bfd = new op_bfd(caller_file.lib_image, extra_found_images); else caller_bfd = new op_bfd(caller_file.lib_image, string_filter(), extra_found_images, caller_bfd_ok); if (!caller_bfd_ok) report_image_error(caller_file.lib_image, image_format_failure, false, extra_found_images); parsed_filename callee_file = parse_filename(*it, extra_found_images); extra_found_images.find_image_path(callee_file.cg_image, error, false); if (error != image_ok) report_image_error(callee_file.cg_image, error, false, extra_found_images); bool callee_bfd_ok = true; if (strncmp(callee_file.cg_image.c_str(), KALL_SYM_FILE, strlen(callee_file.cg_image.c_str())) == 0) callee_bfd = new op_bfd(callee_file.cg_image, extra_found_images); else callee_bfd = new op_bfd(callee_file.cg_image, string_filter(), extra_found_images, callee_bfd_ok); if (!callee_bfd_ok) report_image_error(callee_file.cg_image, image_format_failure, false, extra_found_images); profile_t profile; // We can't use start_offset support in profile_t, give // it a zero offset and we will fix that in add() profile.add_sample_file(*it); add(profile, *caller_bfd, caller_bfd_ok, *callee_bfd, merge_lib ? app_image : app_name, pc, debug_info, pclass); delete caller_bfd; delete callee_bfd; } } void callgraph_container:: add(profile_t const & profile, op_bfd const & caller_bfd, bool caller_bfd_ok, op_bfd const & callee_bfd, string const & app_name, profile_container const & pc, bool debug_info, size_t pclass) { string const image_name = caller_bfd.get_filename(); opd_header const & header = profile.get_header(); // We can't use kernel sample file w/o the binary else we will // use it with a zero offset, the code below will abort because // we will get incorrect callee sub-range and out of range // callee vma. FIXME if (header.is_kernel && !caller_bfd_ok) return; // We must handle start_offset, this offset can be different for the // caller and the callee: kernel sample traversing the syscall barrier. u32 caller_offset; if (header.is_kernel) caller_offset = caller_bfd.get_start_offset(0); else caller_offset = header.anon_start; u32 callee_offset; if (header.cg_to_is_kernel) callee_offset = callee_bfd.get_start_offset(0); else callee_offset = header.cg_to_anon_start; image_name_id image_id = image_names.create(image_name); image_name_id callee_image_id = image_names.create(callee_bfd.get_filename()); image_name_id app_id = image_names.create(app_name); call_data caller(pc, profile, caller_bfd, caller_offset, image_id, app_id, debug_info); call_data callee(pc, profile, callee_bfd, callee_offset, callee_image_id, app_id, debug_info); if (cverb << vdebug) { caller.verbose_bfd("Caller:"); callee.verbose_bfd("Callee:"); } // For each symbol in the caller bfd, process all arcs to // callee bfd symbols for (symbol_index_t i = 0; i < caller_bfd.syms.size(); ++i) { caller.caller_sym(i); call_data::const_iterator dit = caller.samples.begin(); call_data::const_iterator dend = caller.samples.end(); while (dit != dend) { // if we can't find the callee, skip an arc if (!callee.callee_sym(key_to_callee(dit->first))) { ++dit; continue; } count_array_t arc_count; arc_count[pclass] = accumulate_callee(dit, dend, callee.callee_end); recorder.add(caller.sym, &callee.sym, arc_count); } } } void callgraph_container::add_symbols(profile_container const & pc) { symbol_container::symbols_t::iterator it; symbol_container::symbols_t::iterator const end = pc.end_symbol(); for (it = pc.begin_symbol(); it != end; ++it) recorder.add(*it, 0, count_array_t()); } column_flags callgraph_container::output_hint() const { column_flags output_hints = cf_none; // FIXME: costly: must we access directly recorder map ? symbol_collection syms = recorder.get_symbols(); symbol_collection::iterator it; symbol_collection::iterator const end = syms.end(); for (it = syms.begin(); it != end; ++it) output_hints = (*it)->output_hint(output_hints); return output_hints; } count_array_t callgraph_container::samples_count() const { return total_count; } symbol_collection const & callgraph_container::get_symbols() const { return recorder.get_symbols(); } oprofile-1.3.0/libpp/filename_spec.h0000664000175000017500000000350412534404406014332 00000000000000/** * @file filename_spec.h * Container holding a sample filename split into its components * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef FILENAME_SPEC_H #define FILENAME_SPEC_H #include #include #include "generic_spec.h" class profile_spec; class extra_images; /** * A class to split and store components of a sample filename. * These derived values are then used to match against a * profile_spec as given by the user. */ class filename_spec { friend class profile_spec; public: /** * @param filename the samples filename * @param extra extra binary image location * * build a filename_spec from a samples filename */ filename_spec(std::string const & filename, extra_images const & extra); filename_spec(); /** * @param filename a sample filename * @param extra extra binary image location * * setup filename spec according to the samples filename. PP:3.19 to * 3.25 */ void set_sample_filename(std::string const & filename, extra_images const & extra); /** * @param rhs right hand side of the match operator * @param binary if binary is non-empty, and matches * the binary or lib name, use it rather than the * one in rhs. * * return true if *this match rhs, matching if: * - image_name are identical * - lib_name are identical * - event_spec match * * This operation is not commutative. First part of PP:3.24 */ bool match(filename_spec const & rhs, std::string const & binary) const; bool is_dependent() const; private: std::string image; std::string lib_image; std::string cg_image; std::string event; int count; unsigned int unitmask; generic_spec tgid; generic_spec tid; generic_spec cpu; }; #endif /* !FILENAME_SPEC_H */ oprofile-1.3.0/libpp/diff_container.cpp0000664000175000017500000000716012534404406015047 00000000000000/** * @file diff_container.cpp * Container for diffed symbols * * @remark Copyright 2005 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ /* older glibc has C99 INFINITY in _GNU_SOURCE */ #ifndef _GNU_SOURCE #define _GNU_SOURCE #endif #include "diff_container.h" #include using namespace std; namespace { /// a comparator suitable for diffing symbols bool rough_less(symbol_entry const & lhs, symbol_entry const & rhs) { if (lhs.image_name != rhs.image_name) return lhs.image_name < rhs.image_name; if (lhs.app_name != rhs.app_name) return lhs.app_name < rhs.app_name; if (lhs.name != rhs.name) return lhs.name < rhs.name; return false; } /// possibly add a diff sym void add_sym(diff_collection & syms, diff_symbol const & sym, profile_container::symbol_choice & choice) { if (choice.match_image && (image_names.name(sym.image_name) != choice.image_name)) return; if (fabs(sym.diffs[0]) < choice.threshold) return; choice.hints = sym.output_hint(choice.hints); syms.push_back(sym); } /// add a symbol not present in the new profile void symbol_old(diff_collection & syms, symbol_entry const & sym, profile_container::symbol_choice & choice) { diff_symbol symbol(sym); symbol.diffs.fill(sym.sample.counts.size(), -INFINITY); add_sym(syms, symbol, choice); } /// add a symbol not present in the old profile void symbol_new(diff_collection & syms, symbol_entry const & sym, profile_container::symbol_choice & choice) { diff_symbol symbol(sym); symbol.diffs.fill(sym.sample.counts.size(), INFINITY); add_sym(syms, symbol, choice); } /// add a diffed symbol void symbol_diff(diff_collection & syms, symbol_entry const & sym1, count_array_t const & total1, symbol_entry const & sym2, count_array_t const & total2, profile_container::symbol_choice & choice) { diff_symbol symbol(sym2); size_t size = sym2.sample.counts.size(); for (size_t i = 0; i != size; ++i) { double percent1; double percent2; percent1 = op_ratio(sym1.sample.counts[i], total1[i]); percent2 = op_ratio(sym2.sample.counts[i], total2[i]); symbol.diffs[i] = op_ratio(percent2 - percent1, percent1); symbol.diffs[i] *= 100.0; } add_sym(syms, symbol, choice); } }; // namespace anon diff_container::diff_container(profile_container const & c1, profile_container const & c2) : pc1(c1), pc2(c2), total1(pc1.samples_count()), total2(pc2.samples_count()) { } diff_collection const diff_container::get_symbols(profile_container::symbol_choice & choice) const { diff_collection syms; /* * Do a pairwise comparison of the two symbol sets. We're * relying here on the symbol container being sorted such * that rough_less() is suitable for iterating through the * two lists (see less_symbol). */ symbol_container::symbols_t::iterator it1 = pc1.begin_symbol(); symbol_container::symbols_t::iterator end1 = pc1.end_symbol(); symbol_container::symbols_t::iterator it2 = pc2.begin_symbol(); symbol_container::symbols_t::iterator end2 = pc2.end_symbol(); while (it1 != end1 && it2 != end2) { if (rough_less(*it1, *it2)) { symbol_old(syms, *it1, choice); ++it1; } else if (rough_less(*it2, *it1)) { symbol_new(syms, *it2, choice); ++it2; } else { symbol_diff(syms, *it1, total1, *it2, total2, choice); ++it1; ++it2; } } for (; it1 != end1; ++it1) symbol_old(syms, *it1, choice); for (; it2 != end2; ++it2) symbol_new(syms, *it2, choice); return syms; } count_array_t const diff_container::samples_count() const { return total2; } oprofile-1.3.0/libpp/parse_filename.h0000664000175000017500000000335612534404406014517 00000000000000/** * @file parse_filename.h * Split a sample filename into its constituent parts * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef PARSE_FILENAME_H #define PARSE_FILENAME_H #include class extra_images; /** * a convenience class to store result of parse_filename() */ struct parsed_filename { std::string image; std::string lib_image; /// destination image for call graph file, empty if this sample /// file is not a callgraph file. std::string cg_image; std::string event; std::string count; std::string unitmask; std::string tgid; std::string tid; std::string cpu; /// return true if the profile specification are identical. bool profile_spec_equal(parsed_filename const & parsed); /** * the original sample filename from which the * above components are built */ std::string filename; bool jit_dumpfile_exists; /* Provide default constructor to initialize jit_dumpfile_exists, * otherwise it can contain garbage when its containing object is * instantiated on the stack. */ parsed_filename() : jit_dumpfile_exists(false) {} }; /// debugging helper std::ostream & operator<<(std::ostream &, parsed_filename const &); /** * parse a sample filename * @param filename in: a sample filename * @param extra_found_images binary image location * * filename is split into constituent parts, the lib_image is optional * and can be empty on successfull call. All other error are fatal. * Filenames are encoded as according to PP:3.19 to PP:3.25 * * all errors throw an std::invalid_argument exception */ parsed_filename parse_filename(std::string const & filename, extra_images const & extra_found_images); #endif /* !PARSE_FILENAME_H */ oprofile-1.3.0/libpp/Makefile.in0000664000175000017500000005366113323172173013445 00000000000000# Makefile.in generated by automake 1.15.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2017 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; 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oprofile-1.3.0/libpp/symbol.h0000664000175000017500000001017312603572700013045 00000000000000/** * @file symbol.h * Symbol containers * * @remark Copyright 2002, 2004 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef SYMBOL_H #define SYMBOL_H #include "config.h" #include "name_storage.h" #include "growable_vector.h" #include "sparse_array.h" #include "format_flags.h" #include "op_types.h" #include #include #include class extra_images; /// for storing sample counts typedef sparse_array count_array_t; /// A simple container for a fileno:linenr location. struct file_location { file_location() : linenr(0) {} /// empty if not valid. debug_name_id filename; /// 0 means invalid or code is generated internally by the compiler unsigned int linenr; bool operator<(file_location const & rhs) const { // Note we sort on filename id not on string return filename < rhs.filename || (filename == rhs.filename && linenr < rhs.linenr); } }; /// associate vma address with a file location and a samples count struct sample_entry { sample_entry() : vma(0) {} /// From where file location comes the samples file_location file_loc; /// From where virtual memory address comes the samples bfd_vma vma; /// the samples count count_array_t counts; }; /// associate a symbol with a file location, samples count and vma address class symbol_entry { public: symbol_entry() : sym_index(0), size(0), vma_adj(0) {} virtual ~symbol_entry() {} /// which image this symbol belongs to image_name_id image_name; /// owning application name: identical to image name if profiling /// session did not separate samples for shared libs or if image_name /// is not a shared lib image_name_id app_name; // index into the op_bfd symbol table size_t sym_index; /// file location, vma and cumulated samples count for this symbol sample_entry sample; /// name of symbol symbol_name_id name; /// symbol size as calculated by op_bfd, start of symbol is sample.vma size_t size; /** * @param fl input hint * * combine fl with the calculated hint. It's theoretically possible * that we get a symbol where its samples pass the border line, but * the start is below it, but the the hint is only used for formatting */ column_flags output_hint(column_flags fl) const; /** * The vma_adj is set according to the corresponding op_bfd::vma_adj. * See the documentation for vma_adj in op_bfd.h for why we need this. * This piece of information is needed in the bowels of opannotate * with the --assembly option. At that point, there is no means of * obtaining the op_bfd for the given image being processed, but we * do have access to symbol_entry's. Yes, it's way overkill to add * this to every symbol_entry, but there isn't a better option. */ bfd_vma vma_adj; }; /// a collection of sorted symbols typedef std::vector symbol_collection; /** * The public data for call-graph symbols. Each caller/callee has * the sample counts replaced with the relevant arc counts, whilst * the cg_symbol retains its self count. */ class cg_symbol : public symbol_entry { public: cg_symbol(symbol_entry const & sym) : symbol_entry(sym) {} typedef std::vector children; /// all callers of this symbol children callers; /// total count of callers count_array_t total_caller_count; /// all symbols called by this symbol children callees; /// total count of callees count_array_t total_callee_count; }; /// a collection of sorted callgraph symbol objects typedef std::list cg_collection_objs; /// for storing diff %ages typedef growable_vector diff_array_t; /** * Data for a diffed symbol. */ struct diff_symbol : public symbol_entry { diff_symbol(symbol_entry const & sym) : symbol_entry(sym) {} /// diff %age values for each profile class diff_array_t diffs; }; /// a collection of diffed symbols typedef std::vector diff_collection; bool has_sample_counts(count_array_t const & counts, size_t lo, size_t hi); std::string const & get_image_name(image_name_id id, image_name_storage::image_name_type type, extra_images const & extra); #endif /* !SYMBOL_H */ oprofile-1.3.0/libpp/arrange_profiles.h0000664000175000017500000001456612534404406015074 00000000000000/** * @file arrange_profiles.h * Classify and process a list of candidate sample files * into merged sets and classes. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #ifndef ARRANGE_PROFILES_H #define ARRANGE_PROFILES_H #include #include #include #include #include "image_errors.h" #include "locate_images.h" /** * store merging options options used to classify profiles */ struct merge_option { bool cpu; bool lib; bool tid; bool tgid; bool unitmask; }; /** * This describes which parameters are set for each * equivalence class. */ struct profile_template { std::string event; std::string count; std::string unitmask; std::string tgid; std::string tid; std::string cpu; }; /** * A samples filename + its associated callgraph sample filename. */ struct profile_sample_files { /** * This member can be empty since it is possible to get callgraph * w/o any samples to the binary. e.g an application which defer all * works to shared library but if arrange_profiles receive a sample * file list filtered from cg file sample_filename can't be empty */ std::string sample_filename; /** * List of callgraph sample filename. If the {dep} part of * cg_filename != {cg} part it's a cross binary samples file. */ std::list cg_files; }; /** * A number of profiles files that are all dependent on * the same main (application) profile, for the same * dependent image. */ struct profile_dep_set { /// which dependent image is this set for std::string lib_image; /// the actual sample files optionnaly including callgraph sample files std::list files; }; /** * A number of profile files all for the same binary with the same * profile specification (after merging). Includes the set of dependent * profile files, if any. * * For example, we could have image == "/bin/bash", where files * contains all profiles against /bin/bash, and deps contains * the sample file list for /lib/libc.so, /lib/ld.so etc. */ struct profile_set { std::string image; /// the actual sample files for the main image and the asociated /// callgraph files std::list files; /// all profile files dependent on the main image std::list deps; }; /** * A class collection of profiles. This is an equivalence class and * will correspond to columnar output of opreport. */ struct profile_class { std::list profiles; /// human-readable column name std::string name; /// human-readable long name std::string longname; /// merging matches against this profile_template ptemplate; }; /** * The "axis" says what we've used to split the sample * files into the classes. Only one is allowed. */ enum axis_types { AXIS_EVENT, AXIS_TGID, AXIS_TID, AXIS_CPU, AXIS_MAX }; struct profile_classes { /** * This is only set if we're not classifying on event/count * anyway - if we're classifying on event/count, then we'll * already output the details of each class's event/count. * * It's only used when classifying by CPU, tgid etc. so the * user can still see what perfctr event was used. */ std::string event; /// CPU info std::string cpuinfo; /// the actual classes std::vector v; /// the axis of the classes axis_types axis; /// the extra images to consider for this profile_classes extra_images extra_found_images; /// is this class set comparable with another? bool matches(profile_classes const & classes); }; std::ostream & operator<<(std::ostream &, profile_sample_files const &); std::ostream & operator<<(std::ostream &, profile_dep_set const &); std::ostream & operator<<(std::ostream &, profile_set const &); std::ostream & operator<<(std::ostream &, profile_template const &); std::ostream & operator<<(std::ostream &, profile_class const &); std::ostream & operator<<(std::ostream &, profile_classes const &); /** * Take a list of sample filenames, and process them into a set of * classes containing profile_sets. Merging is done at this stage * as well as attaching dependent profiles to the main image. * * The classes correspond to the columns you'll get in opreport: * this can be a number of events, or different CPUs, etc. */ profile_classes const arrange_profiles(std::list const & files, merge_option const & merge_by, extra_images const & extra); /** * A set of sample files where the image binary to open * are all the same. */ struct image_set { /// this is main app image, *not* necessarily /// the one we need to open std::string app_image; /// the sample files std::list files; }; typedef std::list image_group_set; /** * All sample files where the binary image to open is * the same. * * This is the "inverse" to some degree of profile_set. * For example, here we might have image = "/lib/libc.so", * with groups being the profile classifications * tgid:404, tgid:301, etc. * * Within each group there's a number of image_sets. * All the sample files listed within the image_sets * are still for /lib/libc.so, but they may have * different app_image values, e.g. /bin/bash. * We need to keep track of the app_image values to * make opreport give the right info in the "app" * column. */ struct inverted_profile { inverted_profile() : error(image_ok) {} /// the image to open std::string image; /// an error found in reading the image mutable image_error error; /// all sample files with data for the above image std::vector groups; }; /** * Invert the profile set. For opreport -l, opannotate etc., * processing the profile_classes directly is slow, because * we end up opening BFDs multiple times (for each class, * dependent images etc.). This function returns an inverted * set of sample files, where the primary sort is on the binary * image to open. * * Thus each element in the returned list is for exactly one * binary file that we're going to bfd_openr(). Attached to that * is the actual sample files we need to process for that binary * file. In order to get the output right, these have to be * marked with the profile class they're from (hence the groups * vector), and the app image that owned the sample file, if * applicable (hence image_set). */ std::list const invert_profiles(profile_classes const & classes); #endif /* !ARRANGE_PROFILES_H */ oprofile-1.3.0/libpp/symbol_container.cpp0000664000175000017500000000521212603572700015440 00000000000000/** * @file symbol_container.cpp * Internal container for symbols * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include "symbol_container.h" using namespace std; symbol_container::size_type symbol_container::size() const { return symbols.size(); } symbol_entry const * symbol_container::insert(symbol_entry const & symb) { pair p = symbols.insert(symb); if (!p.second) { // safe: count is not used by sorting criteria symbol_entry * symbol = const_cast(&*p.first); symbol->sample.counts += symb.sample.counts; } return &*p.first; } symbol_collection const symbol_container::find(debug_name_id filename, size_t linenr) const { build_by_loc(); symbol_entry symbol; symbol.sample.file_loc.filename = filename; symbol.sample.file_loc.linenr = linenr; symbol_collection result; typedef symbols_by_loc_t::const_iterator it; pair p_it = symbols_by_loc.equal_range(&symbol); for ( ; p_it.first != p_it.second; ++p_it.first) result.push_back(*p_it.first); return result; } symbol_collection const symbol_container::find(debug_name_id filename) const { build_by_loc(); symbol_entry symbol; symbol.sample.file_loc.filename = filename; symbol.sample.file_loc.linenr = 0; typedef symbols_by_loc_t::const_iterator it; it first = symbols_by_loc.lower_bound(&symbol); symbol.sample.file_loc.linenr = (unsigned int)size_t(-1); it last = symbols_by_loc.upper_bound(&symbol); symbol_collection result; for ( ; first != last ; ++first) result.push_back(*first); return result; } void symbol_container::build_by_loc() const { if (!symbols_by_loc.empty()) return; symbols_t::const_iterator cit = symbols.begin(); symbols_t::const_iterator end = symbols.end(); for (; cit != end; ++cit) symbols_by_loc.insert(&*cit); } symbol_entry const * symbol_container::find_by_vma(string const & image_name, bfd_vma vma) const { // FIXME: this is too inefficient probably symbols_t::const_iterator it; for (it = symbols.begin(); it != symbols.end(); ++it) { if (it->sample.vma == vma && image_names.name(it->image_name) == image_name) return &*it; } return 0; } symbol_container::symbols_t::iterator symbol_container::begin() { return symbols.begin(); } symbol_container::symbols_t::iterator symbol_container::end() { return symbols.end(); } symbol_entry const * symbol_container::find(symbol_entry const & symbol) const { symbols_t::const_iterator it = symbols.find(symbol); return it == symbols.end() ? 0 : &*it; } oprofile-1.3.0/libpp/profile.cpp0000664000175000017500000001054512603572700013536 00000000000000/** * @file profile.cpp * Encapsulation for samples files over all profile classes * belonging to the same binary image * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include #include #include "op_exception.h" #include "op_header.h" #include "op_config.h" #include "op_sample_file.h" #include "profile.h" #include "op_bfd.h" #include "cverb.h" using namespace std; profile_t::profile_t() : start_offset(0) { } // static member count_type profile_t::sample_count(string const & filename) { odb_t samples_db; open_sample_file(filename, samples_db); count_type count = 0; odb_node_nr_t node_nr, pos; odb_node_t * node = odb_get_iterator(&samples_db, &node_nr); for (pos = 0; pos < node_nr; ++pos) count += node[pos].value; odb_close(&samples_db); return count; } //static member void profile_t::open_sample_file(string const & filename, odb_t & db) { // Check first if the sample file version is ok else odb_open() can // fail and the error message will be obscure. opd_header head = read_header(filename); if (head.version != OPD_VERSION) { ostringstream os; os << "oprofpp: samples files version mismatch." << endl << "Be sure you are running the oprofile post-profile tool that" << endl << "matches the version of operf used to collect the profile" << endl; throw op_fatal_error(os.str()); } int rc = odb_open(&db, filename.c_str(), ODB_RDONLY, sizeof(struct opd_header)); if (rc) throw op_fatal_error(filename + ": " + strerror(rc)); } void profile_t::add_sample_file(string const & filename) { odb_t samples_db; open_sample_file(filename, samples_db); opd_header const & head = *static_cast(odb_get_data(&samples_db)); // if we already read a sample file header pointer is non null if (file_header.get()) op_check_header(head, *file_header, filename); else file_header.reset(new opd_header(head)); odb_node_nr_t node_nr, pos; odb_node_t * node = odb_get_iterator(&samples_db, &node_nr); for (pos = 0; pos < node_nr; ++pos) { ordered_samples_t::iterator it = ordered_samples.find(node[pos].key); if (it != ordered_samples.end()) { it->second += node[pos].value; } else { ordered_samples_t::value_type val(node[pos].key, node[pos].value); ordered_samples.insert(val); } } odb_close(&samples_db); } void profile_t::set_offset(op_bfd const & abfd) { // if no bfd file has been located for this samples file, we can't // shift sample because abfd.get_symbol_range() return the whole // address space and setting a non zero start_offset will overflow // in get_symbol_range() caller. if (abfd.valid()) { opd_header const & header = get_header(); if (header.anon_start) { start_offset = header.anon_start; } else if (header.is_kernel) { start_offset = abfd.get_start_offset(0); } } cverb << (vdebug) << "start_offset is now " << start_offset << endl; } profile_t::iterator_pair profile_t::samples_range(odb_key_t start, odb_key_t end) const { // Check the start position isn't before start_offset: // this avoids wrapping/underflowing start/end. // This can happen on e.g. ARM kernels, where .init is // mapped before .text - we just have to skip any such // .init symbols. if (start < start_offset) { return make_pair(const_iterator(ordered_samples.end(), 0), const_iterator(ordered_samples.end(), 0)); } start -= start_offset; end -= start_offset; // sanity check if start > end caller will enter into an infinite loop if (start > end) { throw op_fatal_error("profile_t::samples_range(): start > end" " something wrong with kernel or module layout ?\n" "please report problem to " "oprofile-list@lists.sourceforge.net"); } ordered_samples_t::const_iterator first = ordered_samples.lower_bound(start); ordered_samples_t::const_iterator last = ordered_samples.lower_bound(end); return make_pair(const_iterator(first, start_offset), const_iterator(last, start_offset)); } profile_t::iterator_pair profile_t::samples_range() const { ordered_samples_t::const_iterator first = ordered_samples.begin(); ordered_samples_t::const_iterator last = ordered_samples.end(); return make_pair(const_iterator(first, start_offset), const_iterator(last, start_offset)); } oprofile-1.3.0/libpp/populate.cpp0000664000175000017500000000544212534404406013727 00000000000000/** * @file populate.cpp * Fill up a profile_container from inverted profiles * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie * * Modified by Maynard Johnson * (C) Copyright IBM Corporation 2007 */ #include "profile.h" #include "profile_container.h" #include "arrange_profiles.h" #include "op_bfd.h" #include "op_header.h" #include "populate.h" #include "image_errors.h" #include "utility.h" #include #include using namespace std; namespace { /// load merged files for one set of sample files bool populate_from_files(profile_t & profile, op_bfd const & abfd, list const & files) { list::const_iterator it = files.begin(); list::const_iterator const end = files.end(); bool found = false; // we can't handle cg files here obviously for (; it != end; ++it) { // A bit ugly but we must accept silently empty sample filename // since we can create a profile_sample_files for cg file only // (i.e no sample to the binary) if (!it->sample_filename.empty()) { profile.add_sample_file(it->sample_filename); profile.set_offset(abfd); found = true; } } return found; } } // anon namespace void populate_for_image(profile_container & samples, inverted_profile const & ip, string_filter const & symbol_filter, bool * has_debug_info) { op_bfd *abfd; bool ok = ip.error == image_ok; if (strncmp(ip.image.c_str(), KALL_SYM_FILE, strlen(ip.image.c_str())) == 0) abfd = new op_bfd(ip.image, samples.extra_found_images); else abfd = new op_bfd(ip.image, symbol_filter, samples.extra_found_images, ok); if (!ok && ip.error == image_ok) ip.error = image_format_failure; if (ip.error == image_format_failure) report_image_error(ip, false, samples.extra_found_images); opd_header header; bool found = false; for (size_t i = 0; i < ip.groups.size(); ++i) { list::const_iterator it = ip.groups[i].begin(); list::const_iterator const end = ip.groups[i].end(); // we can only share a profile_t amongst each // image_set's files - this is because it->app_image // changes, and the .add() would mis-attribute // to the wrong app_image otherwise for (; it != end; ++it) { profile_t profile; if (populate_from_files(profile, *abfd, it->files)) { header = profile.get_header(); samples.add(profile, *abfd, it->app_image, i); found = true; } } } if (found == true && ip.error == image_ok) { image_error error; string filename = samples.extra_found_images.find_image_path( ip.image, error, true); check_mtime(filename, header); } if (has_debug_info) *has_debug_info = abfd->has_debug_info(); delete abfd; } oprofile-1.3.0/libpp/populate.h0000664000175000017500000000106112534404406013365 00000000000000/** * @file populate.h * Fill up a profile_container from inverted profiles * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef POPULATE_H #define POPULATE_H class profile_container; class inverted_profile; class string_filter; /// Load all sample file information for exactly one binary image. void populate_for_image(profile_container & samples, inverted_profile const & ip, string_filter const & symbol_filter, bool * has_debug_info); #endif /* POPULATE_H */ oprofile-1.3.0/libpp/profile.h0000664000175000017500000001165612603572700013207 00000000000000/** * @file profile.h * Encapsulation for samples files over all profile classes * belonging to the same binary image * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef PROFILE_H #define PROFILE_H #include #include #include #include "odb.h" #include "op_types.h" #include "utility.h" class opd_header; class op_bfd; /** * Class containing a single sample file contents. * i.e. set of count values for VMA offsets for * a particular binary. */ class profile_t : noncopyable { public: /** * profile_t - construct an empty profile_t object */ profile_t(); /// return true if no sample file has been loaded bool empty() const { return !file_header.get(); } /// return the header of the last opened samples file opd_header const & get_header() const { return *file_header; } /** * count samples count w/o recording them * @param filename sample filename * * convenience interface for raw access to sample count w/o recording * them. It's placed here so all access to samples files go through * profile_t static or non static member. */ static count_type sample_count(std::string const & filename); /** * cumulate sample file to our container of samples * @param filename sample file name * * store samples for one sample file, sample file header is sanitized. * * all error are fatal */ void add_sample_file(std::string const & filename); /// Set an appropriate start offset, see comments below. void set_offset(op_bfd const & abfd); u64 get_offset(void) const { return start_offset; } class const_iterator; typedef std::pair iterator_pair; /** * @param start start offset * @param end end offset * * return an iterator pair to [start, end) range */ iterator_pair samples_range(odb_key_t start, odb_key_t end) const; /// return a pair of iterator for all samples iterator_pair samples_range() const; private: /// helper for sample_count() and add_sample_file(). All error launch /// an exception. static void open_sample_file(std::string const & filename, odb_t &); /// copy of the samples file header scoped_ptr file_header; /// storage type for samples sorted by eip typedef std::map ordered_samples_t; /** * Samples are stored in hash table, iterating over hash table don't * provide any ordering, the above count() interface rely on samples * ordered by eip. This map is only a temporary storage where samples * are ordered by eip. */ ordered_samples_t ordered_samples; /** * For certain profiles, such as kernel/modules, and anon * regions with a matching binary, this value is non-zero, * and represents the file offset of the relevant section. * * For kernel profiles, this is done because we use the information * provided in /proc/ksyms, which only gives the mapped position of * .text, and the symbol _text from vmlinux. This value is used to fix * up the sample offsets for kernel code as a result of this difference * * In user-space samples, the sample offset is from the start of the * mapped file, as seen in /proc/pid/maps. This is fine for * mappings of permanent files, but with anon mappings, we need * to adjust the key values to be a file offset against the * *binary* (if there is one). This can obviously be different. * So we pass our anon mapping start VMA to op_bfd, which looks * for a section with that VMA, then returns the section's * filepos. So all is good. * * Finally, note that for cg we can't use this inside the * profile_t, as we're storing two offsets in the key value. So * we do it later in that case. * * Phew. */ u64 start_offset; }; // It will be easier to derive profile_t::const_iterator from // std::iterator but this doesn't // work for gcc <= 2.95 so we provide the neccessary typedef in the hard way. // See ISO C++ 17.4.3.1 § 1 and 14.7.3 § 9. namespace std { template <> struct iterator_traits { typedef ptrdiff_t difference_type; typedef count_type value_type; typedef count_type * pointer; typedef count_type & reference; typedef input_iterator_tag iterator_category; }; } class profile_t::const_iterator { typedef ordered_samples_t::const_iterator iterator_t; public: const_iterator() : start_offset(0) {} const_iterator(iterator_t it_, u64 start_offset_) : it(it_), start_offset(start_offset_) {} count_type operator*() const { return it->second; } const_iterator & operator++() { ++it; return *this; } odb_key_t vma() const { return it->first + start_offset; } count_type count() const { return **this; } bool operator!=(const_iterator const & rhs) const { return it != rhs.it; } bool operator==(const_iterator const & rhs) const { return it == rhs.it; } private: iterator_t it; u64 start_offset; }; #endif /* !PROFILE_H */ oprofile-1.3.0/libpp/filename_spec.cpp0000664000175000017500000000340412534404406014664 00000000000000/** * @file filename_spec.cpp * Container holding a sample filename split into its components * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include #include "filename_spec.h" #include "parse_filename.h" #include "generic_spec.h" #include "locate_images.h" using namespace std; filename_spec::filename_spec(string const & filename, extra_images const & extra) { set_sample_filename(filename, extra); } filename_spec::filename_spec() : image("*"), lib_image("*"), count(0), unitmask(0) { } bool filename_spec::match(filename_spec const & rhs, string const & binary) const { if (!tid.match(rhs.tid) || !cpu.match(rhs.cpu) || !tgid.match(rhs.tgid) || count != rhs.count || unitmask != rhs.unitmask || event != rhs.event) { return false; } if (binary.empty()) return image == rhs.image && lib_image == rhs.lib_image; // PP:3.3 if binary is not empty we must match either the // lib_name if present or the image name if (!rhs.lib_image.empty()) { // FIXME: use fnmatch ? return rhs.lib_image == binary; } // FIXME: use fnmatch ? return rhs.image == binary; } void filename_spec::set_sample_filename(string const & filename, extra_images const & extra) { parsed_filename parsed = parse_filename(filename, extra); image = parsed.image; lib_image = parsed.lib_image; cg_image = parsed.cg_image; event = parsed.event; count = op_lexical_cast(parsed.count); unitmask = op_lexical_cast(parsed.unitmask); tgid.set(parsed.tgid); tid.set(parsed.tid); cpu.set(parsed.cpu); } bool filename_spec::is_dependent() const { if (cg_image.empty()) return image != lib_image; return cg_image != image || cg_image != lib_image; } oprofile-1.3.0/libpp/locate_images.h0000664000175000017500000000606612534404406014342 00000000000000/** * @file locate_images.h * Location of binary images * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef LOCATE_IMAGES_H #define LOCATE_IMAGES_H #include #include #include #include "image_errors.h" /** * A class containing mappings from an image basename, * such as 'floppy.ko', to locations in the paths passed * in to populate(). * * The name may exist multiple times; all locations are recorded * in this container. */ class extra_images { public: extra_images(); /// add all filenames found in the given paths prefixed by the /// archive path or the root path, recursively void populate(std::vector const & paths, std::string const & archive_path, std::string const & root_path); /// base class for matcher functors object struct matcher { std::string const & value; public: explicit matcher(std::string const & v) : value(v) {} virtual ~matcher() {} /// default functor allowing trivial match virtual bool operator()(std::string const & str) const { return str == value; } }; /** * return a vector of all directories that match the functor */ std::vector const find(matcher const & match) const; /// return a vector of all directories that match the given name std::vector const find(std::string const & name) const; /** * @param image_name binary image name * @param error errors are flagged in this passed enum ref * @param fixup if true return the fixed image name else always return * image_name and update error * * Locate a (number of) matching absolute paths to the given image * name. If we fail to find the file we fill in error and return the * original string. */ std::string const find_image_path(std::string const & image_name, image_error & error, bool fixup) const; /// return the archive path used to populate the images name map std::string get_archive_path() const { return archive_path; } /// Given an image name returned by find_image_path() return /// a filename with the archive_path or root_path stripped. std::string strip_path_prefix(std::string const & image) const; /// return the uid for this extra_images, first valid uid is 1 int get_uid() const { return uid; } private: void populate(std::vector const & paths, std::string const & prefix_path); std::string const locate_image(std::string const & image_name, image_error & error, bool fixup) const; typedef std::multimap images_t; typedef images_t::value_type value_type; typedef images_t::const_iterator const_iterator; /// map from image basename to owning directory images_t images; /// the archive path passed to populate the images name map. std::string archive_path; /// A prefix added to locate binaries if they can't be found /// through the archive path std::string root_path; /// unique identifier, first valid uid is 1 int uid; /// unique uid generator static int suid; }; #endif /* LOCATE_IMAGES_H */ oprofile-1.3.0/libpp/format_output.h0000664000175000017500000002263612603572700014457 00000000000000/** * @file format_output.h * outputting format for symbol lists * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef FORMAT_OUTPUT_H #define FORMAT_OUTPUT_H #include "config.h" #include #include #include #include "format_flags.h" #include "symbol.h" #include "string_filter.h" #include "xml_output.h" class symbol_entry; class sample_entry; class callgraph_container; class profile_container; class diff_container; class extra_images; class op_bfd; struct profile_classes; // FIXME: should be passed to the derived class formatter ctor extern profile_classes classes; namespace format_output { /// base class for formatter, handle common options to formatter class formatter { public: formatter(extra_images const & extra); virtual ~formatter(); /// add a given column void add_format(format_flags flag); /// set the need_header boolean to false void show_header(bool); /// format for 64 bit wide VMAs void vma_format_64bit(bool); /// show long (full path) filenames void show_long_filenames(bool); /// use global count rather symbol count for details percent void show_global_percent(bool); /** * Set the number of collected profile classes. Each class * will output sample count and percentage in extra columns. * * This class assumes that the profile information has been * populated with the right number of classes. */ void set_nr_classes(size_t nr_classes); /// output table header, implemented by calling the virtual function /// output_header_field() void output_header(std::ostream & out); protected: struct counts_t { /// total sample count count_array_t total; /// samples so far count_array_t cumulated_samples; /// percentage so far count_array_t cumulated_percent; /// detailed percentage so far count_array_t cumulated_percent_details; }; /// data passed for output struct field_datum { field_datum(symbol_entry const & sym, sample_entry const & s, size_t pc, counts_t & c, extra_images const & extra, double d = 0.0) : symbol(sym), sample(s), pclass(pc), counts(c), extra(extra), diff(d) {} symbol_entry const & symbol; sample_entry const & sample; size_t pclass; counts_t & counts; extra_images const & extra; double diff; }; /// format callback type typedef std::string (formatter::*fct_format)(field_datum const &); /** @name format functions. * The set of formatting functions, used internally by output(). */ //@{ std::string format_vma(field_datum const &); std::string format_symb_name(field_datum const &); std::string format_image_name(field_datum const &); std::string format_app_name(field_datum const &); std::string format_linenr_info(field_datum const &); std::string format_nr_samples(field_datum const &); std::string format_nr_cumulated_samples(field_datum const &); std::string format_percent(field_datum const &); std::string format_cumulated_percent(field_datum const &); std::string format_percent_details(field_datum const &); std::string format_cumulated_percent_details(field_datum const &); std::string format_diff(field_datum const &); //@} /// decribe one field of the colummned output. struct field_description { field_description() : width(0), header_name(""), formatter(NULL) {} field_description(std::size_t w, std::string h, fct_format f) : width(w), header_name(h), formatter(f) {} std::size_t width; std::string header_name; fct_format formatter; }; typedef std::map format_map_t; /// actually do output void do_output(std::ostream & out, symbol_entry const & symbol, sample_entry const & sample, counts_t & c, diff_array_t const & = diff_array_t(), bool hide_immutable_field = false); /// returns the nr of char needed to pad this field size_t output_header_field(std::ostream & out, format_flags fl, size_t padding); /// returns the nr of char needed to pad this field size_t output_field(std::ostream & out, field_datum const & datum, format_flags fl, size_t padding, bool hide_immutable); /// stores functors for doing actual formatting format_map_t format_map; /// number of profile classes size_t nr_classes; /// total counts counts_t counts; /// formatting flags set format_flags flags; /// true if we need to format as 64 bits quantities bool vma_64; /// false if we use basename(filename) in output rather filename bool long_filenames; /// true if we need to show header before the first output bool need_header; /// bool if details percentage are relative to total count rather to /// symbol count bool global_percent; /// To retrieve the real image location, usefull when acting on /// an archive and for 2.6 kernel modules extra_images const & extra_found_images; }; /// class to output in a columned format symbols and associated samples class opreport_formatter : public formatter { public: /// build a ready to use formatter opreport_formatter(profile_container const & profile); /** output a vector of symbols to out according to the output format * specifier previously set by call(s) to add_format() */ void output(std::ostream & out, symbol_collection const & syms); /// set the output_details boolean void show_details(bool); private: /** output one symbol symb to out according to the output format * specifier previously set by call(s) to add_format() */ void output(std::ostream & out, symbol_entry const * symb); /// output details for the symbol void output_details(std::ostream & out, symbol_entry const * symb); /// container we work from profile_container const & profile; /// true if we need to show details for each symbols bool need_details; }; /// class to output in a columned format caller/callee and associated samples class cg_formatter : public formatter { public: /// build a ready to use formatter cg_formatter(callgraph_container const & profile); /** output callgraph information according to the previously format * specifier set by call(s) to add_format() */ void output(std::ostream & out, symbol_collection const & syms); }; /// class to output a columned format symbols plus diff values class diff_formatter : public formatter { public: /// build a ready to use formatter diff_formatter(diff_container const & profile, extra_images const & extra); /** * Output a vector of symbols to out according to the output * format specifier previously set by call(s) to add_format() */ void output(std::ostream & out, diff_collection const & syms); private: /// output a single symbol void output(std::ostream & out, diff_symbol const & sym); }; /// class to output in XML format class xml_formatter : public formatter { public: /// build a ready to use formatter xml_formatter(profile_container const * profile, symbol_collection & symbols, extra_images const & extra, string_filter const & symbol_filter); // output body of XML output void output(std::ostream & out); /** output one symbol symb to out according to the output format * specifier previously set by call(s) to add_format() */ virtual void output_symbol(std::ostream & out, symbol_entry const * symb, size_t lo, size_t hi, bool is_module); /// output details for the symbol std::string output_symbol_details(symbol_entry const * symb, size_t & detail_index, size_t const lo, size_t const hi); /// set the output_details boolean void show_details(bool); // output SymbolData XML elements void output_symbol_data(std::ostream & out); private: /// container we work from profile_container const * profile; // ordered collection of symbols associated with this profile symbol_collection & symbols; /// true if we need to show details for each symbols bool need_details; // count of DetailData items output so far size_t detail_count; /// with --details we need to reopen the bfd object for each symb to /// get it's contents, hence we store the filter used by the bfd ctor. string_filter const & symbol_filter; void output_sample_data(std::ostream & out, sample_entry const & sample, size_t count); /// output attribute in XML void output_attribute(std::ostream & out, field_datum const & datum, format_flags fl, tag_t tag); /// Retrieve a bfd object for this symbol, reopening a new bfd object /// only if necessary bool get_bfd_object(symbol_entry const * symb, op_bfd * & abfd) const; void output_the_symbol_data(std::ostream & out, symbol_entry const * symb, op_bfd * & abfd); void output_cg_children(std::ostream & out, cg_symbol::children const cg_symb, op_bfd * & abfd); }; // callgraph XML output version class xml_cg_formatter : public xml_formatter { public: /// build a ready to use formatter xml_cg_formatter(callgraph_container const & callgraph, symbol_collection & symbols, string_filter const & sf); /** output one symbol symb to out according to the output format * specifier previously set by call(s) to add_format() */ virtual void output_symbol(std::ostream & out, symbol_entry const * symb, size_t lo, size_t hi, bool is_module); private: /// container we work from callgraph_container const & callgraph; void output_symbol_core(std::ostream & out, cg_symbol::children const cg_symb, std::string const selfname, std::string const qname, size_t lo, size_t hi, bool is_module, tag_t tag); }; } // namespace format_output #endif /* !FORMAT_OUTPUT_H */ oprofile-1.3.0/libpp/format_output.cpp0000664000175000017500000006260713124774026015020 00000000000000/** * @file format_output.cpp * outputting format for symbol lists * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ /* older glibc has C99 INFINITY in _GNU_SOURCE */ #ifndef _GNU_SOURCE #define _GNU_SOURCE #endif #include #include #include #include #include #include "string_manip.h" #include "string_filter.h" #include "format_output.h" #include "profile_container.h" #include "callgraph_container.h" #include "diff_container.h" #include "arrange_profiles.h" #include "xml_output.h" #include "xml_utils.h" #include "cverb.h" using namespace std; namespace { string const get_linenr_info(file_location const floc, bool lf) { ostringstream out; string const & filename = lf ? debug_names.name(floc.filename) : debug_names.basename(floc.filename); if (!filename.empty()) out << filename << ":" << floc.linenr; else out << "(no location information)"; return out.str(); } string get_vma(bfd_vma vma, bool vma_64) { ostringstream out; int width = vma_64 ? 16 : 8; out << hex << setw(width) << setfill('0') << vma; return out.str(); } string get_percent(count_type dividend, count_type divisor) { double ratio = op_ratio(dividend, divisor); return ::format_percent(ratio * 100, percent_int_width, percent_fract_width); } bool extract_linenr_info(string const & info, string & file, size_t & line) { line = 0; file = ""; string::size_type colon_pos = info.find(":"); if (colon_pos == string::npos) return false; file = info.substr(0, colon_pos); istringstream is_info(info.substr(colon_pos+1)); is_info >> line; return true; } } // anonymous namespace namespace format_output { formatter::formatter(extra_images const & extra) : nr_classes(1), flags(ff_none), vma_64(false), long_filenames(false), need_header(true), global_percent(false), extra_found_images(extra) { format_map[ff_vma] = field_description(9, "vma", &formatter::format_vma); format_map[ff_nr_samples] = field_description(9, "samples", &formatter::format_nr_samples); format_map[ff_nr_samples_cumulated] = field_description(14, "cum. samples", &formatter::format_nr_cumulated_samples); format_map[ff_percent] = field_description(9, "%", &formatter::format_percent); format_map[ff_percent_cumulated] = field_description(11, "cum. %", &formatter::format_cumulated_percent); format_map[ff_linenr_info] = field_description(28, "linenr info", &formatter::format_linenr_info); format_map[ff_image_name] = field_description(25, "image name", &formatter::format_image_name); format_map[ff_app_name] = field_description(25, "app name", &formatter::format_app_name); format_map[ff_symb_name] = field_description(30, "symbol name", &formatter::format_symb_name); format_map[ff_percent_details] = field_description(9, "%", &formatter::format_percent_details); format_map[ff_percent_cumulated_details] = field_description(10, "cum. %", &formatter::format_cumulated_percent_details); format_map[ff_diff] = field_description(10, "diff %", &formatter::format_diff); } formatter::~formatter() { } void formatter::set_nr_classes(size_t nr) { nr_classes = nr; } void formatter::add_format(format_flags flag) { flags = static_cast(flags | flag); } void formatter::show_header(bool on_off) { need_header = on_off; } void formatter::vma_format_64bit(bool on_off) { vma_64 = on_off; } void formatter::show_long_filenames(bool on_off) { long_filenames = on_off; } void formatter::show_global_percent(bool on_off) { global_percent = on_off; } void formatter::output_header(ostream & out) { if (!need_header) return; size_t padding = 0; // first output the vma field if (flags & ff_vma) padding = output_header_field(out, ff_vma, padding); // the field repeated for each profile class for (size_t pclass = 0 ; pclass < nr_classes; ++pclass) { if (flags & ff_nr_samples) padding = output_header_field(out, ff_nr_samples, padding); if (flags & ff_nr_samples_cumulated) padding = output_header_field(out, ff_nr_samples_cumulated, padding); if (flags & ff_percent) padding = output_header_field(out, ff_percent, padding); if (flags & ff_percent_cumulated) padding = output_header_field(out, ff_percent_cumulated, padding); if (flags & ff_diff) padding = output_header_field(out, ff_diff, padding); if (flags & ff_percent_details) padding = output_header_field(out, ff_percent_details, padding); if (flags & ff_percent_cumulated_details) padding = output_header_field(out, ff_percent_cumulated_details, padding); } // now the remaining field if (flags & ff_linenr_info) padding = output_header_field(out, ff_linenr_info, padding); if (flags & ff_image_name) padding = output_header_field(out, ff_image_name, padding); if (flags & ff_app_name) padding = output_header_field(out, ff_app_name, padding); if (flags & ff_symb_name) padding = output_header_field(out, ff_symb_name, padding); out << "\n"; } /// describe each possible field of colummned output. // FIXME: use % of the screen width here. sum of % equal to 100, then calculate // ratio between 100 and the selected % to grow non fixed field use also // lib[n?]curses to get the console width (look info source) (so on add a fixed // field flags) size_t formatter:: output_field(ostream & out, field_datum const & datum, format_flags fl, size_t padding, bool hide_immutable) { if (!hide_immutable) { out << string(padding, ' '); field_description const & field(format_map[fl]); string str = (this->*field.formatter)(datum); out << str; // at least one separator char padding = 1; if (str.length() < field.width) padding = field.width - str.length(); } else { field_description const & field(format_map[fl]); padding += field.width; } return padding; } size_t formatter:: output_header_field(ostream & out, format_flags fl, size_t padding) { out << string(padding, ' '); field_description const & field(format_map[fl]); out << field.header_name; // at least one separator char padding = 1; if (field.header_name.length() < field.width) padding = field.width - field.header_name.length(); return padding; } string formatter::format_vma(field_datum const & f) { return get_vma(f.sample.vma, vma_64); } string formatter::format_symb_name(field_datum const & f) { return symbol_names.demangle(f.symbol.name); } string formatter::format_image_name(field_datum const & f) { return get_image_name(f.symbol.image_name, long_filenames ? image_name_storage::int_real_filename : image_name_storage::int_real_basename, extra_found_images); } string formatter::format_app_name(field_datum const & f) { return get_image_name(f.symbol.app_name, long_filenames ? image_name_storage::int_real_filename : image_name_storage::int_real_basename, extra_found_images); } string formatter::format_linenr_info(field_datum const & f) { return get_linenr_info(f.sample.file_loc, long_filenames); } string formatter::format_nr_samples(field_datum const & f) { ostringstream out; out << f.sample.counts[f.pclass]; return out.str(); } string formatter::format_nr_cumulated_samples(field_datum const & f) { if (f.diff == -INFINITY) return "---"; ostringstream out; f.counts.cumulated_samples[f.pclass] += f.sample.counts[f.pclass]; out << f.counts.cumulated_samples[f.pclass]; return out.str(); } string formatter::format_percent(field_datum const & f) { if (f.diff == -INFINITY) return "---"; return get_percent(f.sample.counts[f.pclass], f.counts.total[f.pclass]); } string formatter::format_cumulated_percent(field_datum const & f) { if (f.diff == -INFINITY) return "---"; f.counts.cumulated_percent[f.pclass] += f.sample.counts[f.pclass]; return get_percent(f.counts.cumulated_percent[f.pclass], f.counts.total[f.pclass]); } string formatter::format_percent_details(field_datum const & f) { return get_percent(f.sample.counts[f.pclass], f.counts.total[f.pclass]); } string formatter::format_cumulated_percent_details(field_datum const & f) { f.counts.cumulated_percent_details[f.pclass] += f.sample.counts[f.pclass]; return get_percent(f.counts.cumulated_percent_details[f.pclass], f.counts.total[f.pclass]); } string formatter::format_diff(field_datum const & f) { if (f.diff == INFINITY) return "+++"; else if (f.diff == -INFINITY) return "---"; return ::format_percent(f.diff, percent_int_width, percent_fract_width, true); } void formatter:: do_output(ostream & out, symbol_entry const & symb, sample_entry const & sample, counts_t & c, diff_array_t const & diffs, bool hide_immutable) { size_t padding = 0; // first output the vma field field_datum datum(symb, sample, 0, c, extra_found_images); if (flags & ff_vma) padding = output_field(out, datum, ff_vma, padding, false); // repeated fields for each profile class for (size_t pclass = 0 ; pclass < nr_classes; ++pclass) { field_datum datum(symb, sample, pclass, c, extra_found_images, diffs[pclass]); if (flags & ff_nr_samples) padding = output_field(out, datum, ff_nr_samples, padding, false); if (flags & ff_nr_samples_cumulated) padding = output_field(out, datum, ff_nr_samples_cumulated, padding, false); if (flags & ff_percent) padding = output_field(out, datum, ff_percent, padding, false); if (flags & ff_percent_cumulated) padding = output_field(out, datum, ff_percent_cumulated, padding, false); if (flags & ff_diff) padding = output_field(out, datum, ff_diff, padding, false); if (flags & ff_percent_details) padding = output_field(out, datum, ff_percent_details, padding, false); if (flags & ff_percent_cumulated_details) padding = output_field(out, datum, ff_percent_cumulated_details, padding, false); } // now the remaining field if (flags & ff_linenr_info) padding = output_field(out, datum, ff_linenr_info, padding, false); if (flags & ff_image_name) padding = output_field(out, datum, ff_image_name, padding, hide_immutable); if (flags & ff_app_name) padding = output_field(out, datum, ff_app_name, padding, hide_immutable); if (flags & ff_symb_name) padding = output_field(out, datum, ff_symb_name, padding, hide_immutable); out << "\n"; } opreport_formatter::opreport_formatter(profile_container const & p) : formatter(p.extra_found_images), profile(p), need_details(false) { counts.total = profile.samples_count(); } void opreport_formatter::show_details(bool on_off) { need_details = on_off; } void opreport_formatter::output(ostream & out, symbol_entry const * symb) { do_output(out, *symb, symb->sample, counts); if (need_details) output_details(out, symb); } void opreport_formatter:: output(ostream & out, symbol_collection const & syms) { output_header(out); symbol_collection::const_iterator it = syms.begin(); symbol_collection::const_iterator end = syms.end(); for (; it != end; ++it) output(out, *it); } void opreport_formatter:: output_details(ostream & out, symbol_entry const * symb) { counts_t c = counts; if (!global_percent) c.total = symb->sample.counts; // cumulated percent are relative to current symbol. c.cumulated_samples = count_array_t(); c.cumulated_percent = count_array_t(); sample_container::samples_iterator it = profile.begin(symb); sample_container::samples_iterator end = profile.end(symb); for (; it != end; ++it) { out << " "; do_output(out, *symb, it->second, c, diff_array_t(), true); } } cg_formatter::cg_formatter(callgraph_container const & profile) : formatter(profile.extra_found_images) { counts.total = profile.samples_count(); } void cg_formatter::output(ostream & out, symbol_collection const & syms) { // amount of spacing prefixing child and parent lines string const child_parent_prefix(" "); output_header(out); out << string(79, '-') << endl; symbol_collection::const_iterator it; symbol_collection::const_iterator end = syms.end(); for (it = syms.begin(); it < end; ++it) { cg_symbol const * sym = dynamic_cast(*it); // To silence coverity (since dynamic cast can theoretically return NULL) if (!sym) continue; cg_symbol::children::const_iterator cit; cg_symbol::children::const_iterator cend = sym->callers.end(); counts_t c; if (global_percent) c.total = counts.total; else c.total = sym->total_caller_count; for (cit = sym->callers.begin(); cit != cend; ++cit) { out << child_parent_prefix; do_output(out, *cit, cit->sample, c); } do_output(out, *sym, sym->sample, counts); c = counts_t(); if (global_percent) c.total = counts.total; else c.total = sym->total_callee_count; cend = sym->callees.end(); for (cit = sym->callees.begin(); cit != cend; ++cit) { out << child_parent_prefix; do_output(out, *cit, cit->sample, c); } out << string(79, '-') << endl; } } diff_formatter::diff_formatter(diff_container const & profile, extra_images const & extra) : formatter(extra) { counts.total = profile.samples_count(); } void diff_formatter::output(ostream & out, diff_collection const & syms) { output_header(out); diff_collection::const_iterator it = syms.begin(); diff_collection::const_iterator end = syms.end(); for (; it != end; ++it) do_output(out, *it, it->sample, counts, it->diffs); } // local variables used in generation of XML // buffer details for output later ostringstream bytes_out; // module+symbol table for detecting duplicate symbols map symbol_data_table; size_t symbol_data_index = 0; /* Return any existing index or add to the table */ size_t xml_get_symbol_index(string const & name) { size_t index = symbol_data_index; map::iterator it = symbol_data_table.find(name); if (it == symbol_data_table.end()) { symbol_data_table[name] = symbol_data_index++; return index; } return it->second; } class symbol_details_t { public: symbol_details_t() { size = index = 0; id = -1; } int id; size_t size; size_t index; string details; }; typedef growable_vector symbol_details_array_t; symbol_details_array_t symbol_details; size_t detail_table_index = 0; xml_formatter:: xml_formatter(profile_container const * p, symbol_collection & s, extra_images const & extra, string_filter const & sf) : formatter(extra), profile(p), symbols(s), need_details(false), detail_count(0), symbol_filter(sf) { if (profile) counts.total = profile->samples_count(); } void xml_formatter:: show_details(bool on_off) { need_details = on_off; } void xml_formatter::output(ostream & out) { xml_support->build_subclasses(out); xml_support->output_program_structure(out); output_symbol_data(out); if (need_details) { out << open_element(DETAIL_TABLE); for (size_t i = 0; i < symbol_details.size(); ++i) { int id = symbol_details[i].id; if (id >= 0) { out << open_element(SYMBOL_DETAILS, true); out << init_attr(TABLE_ID, (size_t)id); out << close_element(NONE, true); out << symbol_details[i].details; out << close_element(SYMBOL_DETAILS); } } out << close_element(DETAIL_TABLE); // output bytesTable out << open_element(BYTES_TABLE); out << bytes_out.str(); out << close_element(BYTES_TABLE); } out << close_element(PROFILE); } bool xml_formatter::get_bfd_object(symbol_entry const * symb, op_bfd * & abfd) const { bool ok = true; string const & image_name = get_image_name(symb->image_name, image_name_storage::int_filename, extra_found_images); if (abfd && abfd->get_filename() == image_name) return true; delete abfd; abfd = new op_bfd(image_name, symbol_filter, extra_found_images, ok); if (!ok) { report_image_error(image_name, image_format_failure, false, extra_found_images); delete abfd; abfd = 0; return false; } return true; } void xml_formatter:: output_the_symbol_data(ostream & out, symbol_entry const * symb, op_bfd * & abfd) { string const name = symbol_names.name(symb->name); assert(name.size() > 0); string const image = get_image_name(symb->image_name, image_name_storage::int_filename, extra_found_images); string const qname = image + ":" + name; map::iterator sd_it = symbol_data_table.find(qname); if (sd_it != symbol_data_table.end()) { // first time we've seen this symbol out << open_element(SYMBOL_DATA, true); out << init_attr(TABLE_ID, sd_it->second); field_datum datum(*symb, symb->sample, 0, counts, extra_found_images); output_attribute(out, datum, ff_symb_name, NAME); if (flags & ff_linenr_info) { output_attribute(out, datum, ff_linenr_info, SOURCE_FILE); output_attribute(out, datum, ff_linenr_info, SOURCE_LINE); } if (name.size() > 0 && name[0] != '?') { output_attribute(out, datum, ff_vma, STARTING_ADDR); if (need_details) { get_bfd_object(symb, abfd); if (abfd && abfd->symbol_has_contents(symb->sym_index)) xml_support->output_symbol_bytes(bytes_out, symb, sd_it->second, *abfd); } } out << close_element(); // seen so remove (otherwise get several "no symbols") symbol_data_table.erase(qname); } } void xml_formatter::output_cg_children(ostream & out, cg_symbol::children const cg_symb, op_bfd * & abfd) { cg_symbol::children::const_iterator cit; cg_symbol::children::const_iterator cend = cg_symb.end(); for (cit = cg_symb.begin(); cit != cend; ++cit) { string const name = symbol_names.name(cit->name); string const image = get_image_name(cit->image_name, image_name_storage::int_filename, extra_found_images); string const qname = image + ":" + name; map::iterator sd_it = symbol_data_table.find(qname); if (sd_it != symbol_data_table.end()) { symbol_entry const * child = &(*cit); output_the_symbol_data(out, child, abfd); } } } void xml_formatter::output_symbol_data(ostream & out) { op_bfd * abfd = NULL; sym_iterator it = symbols.begin(); sym_iterator end = symbols.end(); out << open_element(SYMBOL_TABLE); for ( ; it != end; ++it) { symbol_entry const * symb = *it; cg_symbol const * cg_symb = dynamic_cast(symb); output_the_symbol_data(out, symb, abfd); if (cg_symb) { /* make sure callers/callees are included in SYMBOL_TABLE */ output_cg_children(out, cg_symb->callers, abfd); output_cg_children(out, cg_symb->callees, abfd); } } out << close_element(SYMBOL_TABLE); delete abfd; } string xml_formatter:: output_symbol_details(symbol_entry const * symb, size_t & detail_index, size_t const lo, size_t const hi) { if (!has_sample_counts(symb->sample.counts, lo, hi)) return ""; sample_container::samples_iterator it = profile->begin(symb); sample_container::samples_iterator end = profile->end(symb); ostringstream str; for (; it != end; ++it) { counts_t c; for (size_t p = lo; p <= hi; ++p) { size_t count = it->second.counts[p]; if (count == 0) continue; str << open_element(DETAIL_DATA, true); str << init_attr(TABLE_ID, detail_index++); // first output the vma field field_datum datum(*symb, it->second, 0, c, extra_found_images, 0.0); output_attribute(str, datum, ff_vma, VMA); if (flags & ff_linenr_info) { string sym_file; size_t sym_line; string samp_file; size_t samp_line; string sym_info = get_linenr_info(symb->sample.file_loc, true); string samp_info = get_linenr_info(it->second.file_loc, true); if (extract_linenr_info(samp_info, samp_file, samp_line)) { if (extract_linenr_info(sym_info, sym_file, sym_line)) { // only output source_file if it is different than the symbol's // source file. this can happen with inlined functions in // #included header files if (sym_file != samp_file) str << init_attr(SOURCE_FILE, samp_file); } str << init_attr(SOURCE_LINE, samp_line); } } str << close_element(NONE, true); // output buffered sample data output_sample_data(str, it->second, p); str << close_element(DETAIL_DATA); } } return str.str(); } void xml_formatter:: output_symbol(ostream & out, symbol_entry const * symb, size_t lo, size_t hi, bool is_module) { ostringstream str; // pointless reference to is_module, remove insane compiler warning size_t indx = is_module ? 0 : 1; // output symbol's summary data for each profile class bool got_samples = false; for (size_t p = lo; p <= hi; ++p) { got_samples |= xml_support->output_summary_data(str, symb->sample.counts, p); } if (!got_samples) return; if (cverb << vxml) out << "" << endl; out << open_element(SYMBOL, true); string const name = symbol_names.name(symb->name); assert(name.size() > 0); string const image = get_image_name(symb->image_name, image_name_storage::int_filename, extra_found_images); string const qname = image + ":" + name; indx = xml_get_symbol_index(qname); out << init_attr(ID_REF, indx); if (need_details) { ostringstream details; symbol_details_t & sd = symbol_details[indx]; size_t const detail_lo = sd.index; string detail_str = output_symbol_details(symb, sd.index, lo, hi); if (detail_str.size() > 0) { if (sd.id < 0) sd.id = indx; details << detail_str; } if (sd.index > detail_lo) { sd.details = sd.details + details.str(); out << init_attr(DETAIL_LO, detail_lo); out << init_attr(DETAIL_HI, sd.index-1); } } out << close_element(NONE, true); // output summary out << str.str(); out << close_element(SYMBOL); } void xml_formatter:: output_sample_data(ostream & out, sample_entry const & sample, size_t pclass) { out << open_element(COUNT, true); out << init_attr(CLASS, classes.v[pclass].name); out << close_element(NONE, true); out << sample.counts[pclass]; out << close_element(COUNT); } void xml_formatter:: output_attribute(ostream & out, field_datum const & datum, format_flags fl, tag_t tag) { field_description const & field(format_map[fl]); string str = (this->*field.formatter)(datum); if (!str.empty()) { if (fl == ff_linenr_info && (tag == SOURCE_LINE || tag == SOURCE_FILE)) { string file; size_t line; if (extract_linenr_info(str, file, line)) { if (tag == SOURCE_LINE) out << init_attr(tag, line); else out << init_attr(tag, file); } } else out << " " << init_attr(tag, str); } } xml_cg_formatter:: xml_cg_formatter(callgraph_container const & cg, symbol_collection & s, string_filter const & sf) : xml_formatter(0, s, cg.extra_found_images, sf), callgraph(cg) { counts.total = callgraph.samples_count(); } void xml_cg_formatter:: output_symbol_core(ostream & out, cg_symbol::children const cg_symb, string const selfname, string const qname, size_t lo, size_t hi, bool is_module, tag_t tag) { cg_symbol::children::const_iterator cit; cg_symbol::children::const_iterator cend = cg_symb.end(); for (cit = cg_symb.begin(); cit != cend; ++cit) { string const & module = get_image_name((cit)->image_name, image_name_storage::int_filename, extra_found_images); bool self = false; ostringstream str; size_t indx; // output symbol's summary data for each profile class for (size_t p = lo; p <= hi; ++p) xml_support->output_summary_data(str, cit->sample.counts, p); if (cverb << vxml) out << "" << endl; if (is_module) { out << open_element(MODULE, true); out << init_attr(NAME, module) << close_element(NONE, true); } out << open_element(SYMBOL, true); string const symname = symbol_names.name(cit->name); assert(symname.size() > 0); string const symqname = module + ":" + symname; // Find any self references and handle if ((symname == selfname) && (tag == CALLEES)) { self = true; indx = xml_get_symbol_index(qname); } else { indx = xml_get_symbol_index(symqname); } out << init_attr(ID_REF, indx); if (self) out << init_attr(SELFREF, "true"); out << close_element(NONE, true); out << str.str(); out << close_element(SYMBOL); if (is_module) out << close_element(MODULE); } } void xml_cg_formatter:: output_symbol(ostream & out, symbol_entry const * symb, size_t lo, size_t hi, bool is_module) { cg_symbol const * cg_symb = dynamic_cast(symb); ostringstream str; size_t indx; // output symbol's summary data for each profile class for (size_t p = lo; p <= hi; ++p) xml_support->output_summary_data(str, symb->sample.counts, p); if (cverb << vxml) out << "" << endl; out << open_element(SYMBOL, true); string const name = symbol_names.name(symb->name); assert(name.size() > 0); string const image = get_image_name(symb->image_name, image_name_storage::int_filename, extra_found_images); string const qname = image + ":" + name; string const selfname = symbol_names.demangle(symb->name) + " [self]"; indx = xml_get_symbol_index(qname); out << init_attr(ID_REF, indx); out << close_element(NONE, true); out << open_element(CALLERS); if (cg_symb) output_symbol_core(out, cg_symb->callers, selfname, qname, lo, hi, is_module, CALLERS); out << close_element(CALLERS); out << open_element(CALLEES); if (cg_symb) output_symbol_core(out, cg_symb->callees, selfname, qname, lo, hi, is_module, CALLEES); out << close_element(CALLEES); // output summary out << str.str(); out << close_element(SYMBOL); } } // namespace format_output oprofile-1.3.0/libpp/format_flags.h0000664000175000017500000000277112534404406014211 00000000000000/** * @file format_flags.h * output options * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef FORMAT_FLAGS_H #define FORMAT_FLAGS_H /** * flags passed to the ctor of an output_symbol object. * * \sa format_output::formatter */ enum format_flags { ff_none = 0, /// a formatted memory address ff_vma = 1 << 0, /// output debug filename and line nr. ff_linenr_info = 1 << 1, /// output the image name for this line ff_image_name = 1 << 3, /// output owning application name ff_app_name = 1 << 4, /// output the (demangled) symbol name ff_symb_name = 1 << 5, /** @name subset of flags used by opreport_formatter */ //@{ /// number of samples ff_nr_samples = 1 << 6, /// number of samples accumulated ff_nr_samples_cumulated = 1 << 7, /// relative percentage of samples ff_percent = 1 << 8, /// relative percentage of samples accumulated ff_percent_cumulated = 1 << 9, /** * Output percentage for details, not relative * to symbol but relative to the total nr of samples */ ff_percent_details = 1 << 10, /** * Output percentage for details, not relative * to symbol but relative to the total nr of samples, * accumulated */ ff_percent_cumulated_details = 1 << 11, /// output diff value ff_diff = 1 << 12, //@} }; /** * General hints about formatting of the columnar output. */ enum column_flags { cf_none = 0, cf_64bit_vma = 1 << 0, cf_image_name = 1 << 1 }; #endif // FORMAT_FLAGS_H oprofile-1.3.0/libpp/callgraph_container.h0000664000175000017500000001115112534404406015534 00000000000000/** * @file callgraph_container.h * Container associating symbols and caller/caller symbols * * @remark Copyright 2004 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef CALLGRAPH_CONTAINER_H #define CALLGRAPH_CONTAINER_H #include #include #include #include "symbol.h" #include "symbol_functors.h" #include "string_filter.h" #include "locate_images.h" class profile_container; class inverted_profile; class profile_t; class image_set; class op_bfd; /** * During building a callgraph_container we store all caller/callee * relationship in this container. * * An "arc" is simply a description of a call from one function to * another. */ class arc_recorder { public: ~arc_recorder() {} /** * Add a symbol arc. * @param caller The calling symbol * @param callee The called symbol * @param arc_count profile data for the arcs * * If the callee is NULL, only the caller is added to the main * list. This is used to initially populate the recorder with * the symbols. */ void add(symbol_entry const & caller, symbol_entry const * callee, count_array_t const & arc_count); /// return all the cg symbols symbol_collection const & get_symbols() const; /** * After population, build the final output, and do * thresholding. */ void process(count_array_t total, double threshold, string_filter const & filter); private: /** * Internal structure used during collation. We use a map to * allow quick lookup of children (we'll do this several times * if we have more than one profile class). Each child maps from * the symbol to the relevant arc data. */ struct cg_data { cg_data() {} typedef std::map children; /// callers of this symbol children callers; /// callees of this symbol children callees; }; /** * Sort and threshold callers and callees. */ void process_children(cg_symbol & sym, double threshold); typedef std::map map_t; /// all the symbols (used during processing) map_t sym_map; /// symbol objects pointed to by pointers in vector cg_syms cg_collection_objs cg_syms_objs; /// final output data symbol_collection cg_syms; }; /** * Store all callgraph information for the given profiles */ class callgraph_container { public: /** * Populate the container, must be called once only. * @param iprofiles sample file list including callgraph files. * @param extra extra image list to fixup binary name. * @param debug_info true if we must record linenr information * @param threshold ignore sample percent below this threshold * @param merge_lib merge library samples * @param sym_filter symbol filter * * Currently all errors core dump. * FIXME: consider if this should be a ctor */ void populate(std::list const & iprofiles, extra_images const & extra, bool debug_info, double threshold, bool merge_lib, string_filter const & sym_filter); /// return hint on how data must be displayed. column_flags output_hint() const; /// return the total number of samples. count_array_t samples_count() const; // return all the cg symbols symbol_collection const & get_symbols() const; private: /** * Record caller/callee for one cg file * @param profile one callgraph file stored in a profile_t * @param caller_bfd the caller bfd * @param bfd_caller_ok true if we succefully open the binary * @param callee_bfd the callee bfd * @param app_name the owning application * @param pc the profile_container holding all non cg samples. * @param debug_info record linenr debug information * @param pclass profile class nr */ void add(profile_t const & profile, op_bfd const & caller_bfd, bool bfd_caller_ok, op_bfd const & callee_bfd, std::string const & app_name, profile_container const & pc, bool debug_info, size_t pclass); void populate(std::list const & lset, std::string const & app_image, size_t pclass, profile_container const & pc, bool debug_info, bool merge_lib); void populate(std::list const & cg_files, std::string const & app_image, size_t pclass, profile_container const & pc, bool debug_info, bool merge_lib); /// record all main symbols void add_symbols(profile_container const & pc); /// Cached value of samples count. count_array_t total_count; /// A structured representation of the callgraph. arc_recorder recorder; public: // FIXME extra_images extra_found_images; }; #endif /* !CALLGRAPH_CONTAINER_H */ oprofile-1.3.0/libpp/symbol_container.h0000664000175000017500000000473612534404406015117 00000000000000/** * @file symbol_container.h * Internal container for symbols * * @remark Copyright 2002, 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef SYMBOL_CONTAINER_H #define SYMBOL_CONTAINER_H #include #include #include "symbol.h" #include "symbol_functors.h" /** * An arbitrary container of symbols. Supports lookup * by name, by VMA, and by file location. * * Lookup by name or by VMA is O(n). Lookup by file location * is O(log(n)). */ class symbol_container { public: /// container type typedef std::set symbols_t; typedef symbols_t::size_type size_type; /// return the number of symbols stored size_type size() const; /** * Insert a new symbol. If the symbol already exists in the container, * then the sample counts are accumulated. * Returns the newly created symbol or the existing one. This pointer * remains valid during the whole life time of a symbol_container * object and is warranted unique according to less_symbol comparator. * Can only be done before any file-location based lookups, since the * two lookup methods are not synchronised. */ symbol_entry const * insert(symbol_entry const &); /// find the symbols at the given filename and line number, if any symbol_collection const find(debug_name_id filename, size_t linenr) const; /// find the symbols defined in the given filename, if any symbol_collection const find(debug_name_id filename) const; /// find the symbol with the given image_name vma if any symbol_entry const * find_by_vma(std::string const & image_name, bfd_vma vma) const; /// Search a symbol. Return NULL if not found. symbol_entry const * find(symbol_entry const & symbol) const; /// return start of symbols symbols_t::iterator begin(); /// return end of symbols symbols_t::iterator end(); private: /// build the symbol by file-location cache void build_by_loc() const; /** * The main container of symbols. Multiple symbols with the same * name are allowed. */ symbols_t symbols; /** * Differently-named symbol at same file location are allowed e.g. * template instantiation. */ typedef std::multiset symbols_by_loc_t; // must be declared after the set to ensure a correct life-time. /** * Symbols sorted by location order. Lazily built on request, * so mutable. */ mutable symbols_by_loc_t symbols_by_loc; }; #endif /* SYMBOL_CONTAINER_H */ oprofile-1.3.0/libpp/arrange_profiles.cpp0000664000175000017500000005610512534404406015422 00000000000000/** * @file arrange_profiles.cpp * Classify and process a list of candidate sample files * into merged sets and classes. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #include #include #include #include #include #include #include "string_manip.h" #include "op_header.h" #include "op_exception.h" #include "arrange_profiles.h" #include "format_output.h" #include "xml_utils.h" #include "parse_filename.h" #include "locate_images.h" using namespace std; namespace { int numeric_compare(string const & lhs, string const & rhs) { if (lhs == "all" && rhs == "all") return 0; // we choose an order arbitrarily if (lhs == "all") return 1; if (rhs == "all") return -1; unsigned int lhsval = op_lexical_cast(lhs); unsigned int rhsval = op_lexical_cast(rhs); if (lhsval == rhsval) return 0; if (lhsval < rhsval) return -1; return 1; } } // anonymous namespace // global to fix some C++ obscure corner case. bool operator<(profile_class const & lhs, profile_class const & rhs) { profile_template const & lt = lhs.ptemplate; profile_template const & rt = rhs.ptemplate; int comp; // The profile classes are used to traverse the sample data // arrays. We create XML elements for and // that contain the sample data that can then be divided amongst // CPU, event, mask axes so it is more convenient to have the // process and thread classes be the outermost nesting level of // the sample data arrays if (!want_xml) { comp = numeric_compare(lt.cpu, rt.cpu); if (comp) return comp < 0; } comp = numeric_compare(lt.tgid, rt.tgid); if (comp) return comp < 0; comp = numeric_compare(lt.tid, rt.tid); if (comp) return comp < 0; comp = numeric_compare(lt.unitmask, rt.unitmask); if (comp) return comp < 0; if (want_xml) { if (lt.event != rt.event) return lt.event < rt.event; if (lt.count != rt.count) return lt.count < rt.count; return numeric_compare(lt.cpu, rt.cpu) < 0; } else { if (lt.event == rt.event) return lt.count < rt.count; return lt.event < rt.event; } } namespace { struct axis_t { string name; string suggestion; } axes[AXIS_MAX] = { { "event", "specify event:, count: or unitmask: (see also --merge=unitmask)" }, { "tgid", "specify tgid: or --merge tgid" }, { "tid", "specify tid: or --merge tid" }, { "cpu", "specify cpu: or --merge cpu" }, }; } // anonymous namespace bool profile_classes::matches(profile_classes const & classes) { if (v.size() != classes.v.size()) return false; axis_types const axis2 = classes.axis; switch (axis) { case AXIS_EVENT: break; case AXIS_TGID: case AXIS_TID: return axis2 == AXIS_TID || axis2 == AXIS_TGID; case AXIS_CPU: return axis2 == AXIS_CPU; case AXIS_MAX: return false; } // check that the events match (same event, count) vector::const_iterator it1 = v.begin(); vector::const_iterator end1 = v.end(); vector::const_iterator it2 = classes.v.begin(); while (it1 != end1) { if (it1->ptemplate.event != it2->ptemplate.event) return false; if (it1->ptemplate.count != it2->ptemplate.count) return false; // differing unit mask is considered comparable ++it1; ++it2; } return true; } namespace { typedef growable_vector event_array_t; typedef growable_vector::size_type event_index_t; bool new_event_index(string event, event_array_t & events, event_index_t & index) { event_index_t sz = events.size(); for (event_index_t i = 0; i != sz; ++i) { if (events[i] == event) { index = i; return false; } } index = sz; events[sz] = event; return true; } /// We have more than one axis of classification, tell the user. void report_error(profile_classes const & classes, axis_types newaxis) { string str = "Already displaying results for parameter "; str += axes[classes.axis].name; str += " with values:\n"; vector::const_iterator it = classes.v.begin(); vector::const_iterator const end = classes.v.end(); // We show error for the first conflicting axis but on this // axis we can get only a few different it->name, we display only // these different name. set name_seen; size_t i = 5; for (; it != end && i; ++it) { if (name_seen.find(it->name) == name_seen.end()) { name_seen.insert(it->name); str += it->name + ","; --i; } } if (!i) { str += " and "; str += op_lexical_cast(classes.v.size() - 5); str += " more,"; } str += "\nwhich conflicts with parameter "; str += axes[newaxis].name += ".\n"; str += "Suggestion: "; str += axes[classes.axis].suggestion; throw op_fatal_error(str); } /** * check that two different axes are OK - this is only * allowed if they are TGID,TID and for each class, * tid == tgid */ bool allow_axes(profile_classes const & classes, axis_types newaxis) { // No previous axis - OK if (classes.axis == AXIS_MAX) return true; if (classes.axis != AXIS_TID && classes.axis != AXIS_TGID) return false; if (newaxis != AXIS_TID && newaxis != AXIS_TGID) return false; vector::const_iterator it = classes.v.begin(); vector::const_iterator const end = classes.v.end(); for (; it != end; ++it) { if (it->ptemplate.tgid != it->ptemplate.tid) return false; } return true; } /// find the first sample file header in the class opd_header const get_first_header(profile_class const & pclass) { profile_set const & profile = *(pclass.profiles.begin()); string file; // could be only one main app, with no samples for the main image if (profile.files.empty()) { profile_dep_set const & dep = *(profile.deps.begin()); list const & files = dep.files; profile_sample_files const & sample_files = *(files.begin()); if (!sample_files.sample_filename.empty()) file = sample_files.sample_filename; else file = *sample_files.cg_files.begin(); } else { profile_sample_files const & sample_files = *(profile.files.begin()); if (!sample_files.sample_filename.empty()) file = sample_files.sample_filename; else file = *sample_files.cg_files.begin(); } return read_header(file); } /// merge sample file header in the profile_sample_files void merge_header(profile_sample_files const & files, opd_header & header) { if (!files.sample_filename.empty()) { opd_header const temp = read_header(files.sample_filename); header.ctr_um |= temp.ctr_um; } list::const_iterator it = files.cg_files.begin(); list::const_iterator const end = files.cg_files.end(); for ( ; it != end; ++it) { opd_header const temp = read_header(*it); header.ctr_um |= temp.ctr_um; } } /// merge sample file header in the class opd_header const get_header(profile_class const & pclass, merge_option const & merge_by) { opd_header header = get_first_header(pclass); if (!merge_by.unitmask) return header; profile_set const & profile = *(pclass.profiles.begin()); typedef list::const_iterator citerator; citerator it = profile.files.begin(); citerator const end = profile.files.end(); for ( ; it != end; ++it) merge_header(*it, header); list::const_iterator dep_it = profile.deps.begin(); list::const_iterator dep_end = profile.deps.end(); for ( ; dep_it != dep_end; ++dep_it) { citerator it = dep_it->files.begin(); citerator const end = dep_it->files.end(); for ( ; it != end; ++it) merge_header(*it, header); } return header; } /// Give human-readable names to each class. void name_classes(profile_classes & classes, merge_option const & merge_by) { opd_header header = get_header(classes.v[0], merge_by); classes.event = describe_header(header); classes.cpuinfo = describe_cpu(header); // If we're splitting on event anyway, clear out the // global event name if (classes.axis == AXIS_EVENT) classes.event.erase(); vector::iterator it = classes.v.begin(); vector::iterator const end = classes.v.end(); for (; it != end; ++it) { it->name = axes[classes.axis].name + ":"; switch (classes.axis) { case AXIS_EVENT: it->name = it->ptemplate.event + ":" + it->ptemplate.count; header = get_header(*it, merge_by); it->longname = describe_header(header); break; case AXIS_TGID: it->name += it->ptemplate.tgid; it->longname = "Processes with a thread group ID of "; it->longname += it->ptemplate.tgid; break; case AXIS_TID: it->name += it->ptemplate.tid; it->longname = "Processes with a thread ID of "; it->longname += it->ptemplate.tid; break; case AXIS_CPU: it->name += it->ptemplate.cpu; it->longname = "Samples on CPU " + it->ptemplate.cpu; break; case AXIS_MAX: cerr << "Internal error - no equivalence class axis" << endl; abort(); } } } /** * Name and verify classes. */ void identify_classes(profile_classes & classes, merge_option const & merge_by) { profile_template & ptemplate = classes.v[0].ptemplate; bool changed[AXIS_MAX] = { false, }; vector::iterator it = classes.v.begin(); ++it; vector::iterator end = classes.v.end(); // only one class, name it after the event if (it == end) changed[AXIS_EVENT] = true; for (; it != end; ++it) { if (it->ptemplate.event != ptemplate.event || it->ptemplate.count != ptemplate.count // unit mask are mergeable || (!merge_by.unitmask && it->ptemplate.unitmask != ptemplate.unitmask)) changed[AXIS_EVENT] = true; // we need the merge checks here because each // template is filled in from the first non // matching profile, so just because they differ // doesn't mean it's the axis we care about if (!merge_by.tgid && it->ptemplate.tgid != ptemplate.tgid) changed[AXIS_TGID] = true; if (!merge_by.tid && it->ptemplate.tid != ptemplate.tid) changed[AXIS_TID] = true; if (!merge_by.cpu && it->ptemplate.cpu != ptemplate.cpu) changed[AXIS_CPU] = true; } classes.axis = AXIS_MAX; for (size_t i = 0; i < AXIS_MAX; ++i) { if (!changed[i]) continue; if (!allow_axes(classes, axis_types(i))) report_error(classes, axis_types(i)); classes.axis = axis_types(i); /* do this early for report_error */ name_classes(classes, merge_by); } if (classes.axis == AXIS_MAX) { cerr << "Internal error - no equivalence class axis" << endl; abort(); } } void identify_xml_classes(profile_classes & classes, merge_option const & merge_by) { opd_header header = get_header(classes.v[0], merge_by); vector::iterator it = classes.v.begin(); vector::iterator end = classes.v.end(); event_index_t event_num; event_index_t event_max = 0; event_array_t event_array; size_t nr_cpus = 0; bool has_nonzero_mask = false; ostringstream event_setup; // fill in XML identifying each event, and replace event name by event_num for (; it != end; ++it) { string mask = it->ptemplate.unitmask; if (mask.find_first_of("x123456789abcdefABCDEF") != string::npos) has_nonzero_mask = true; if (new_event_index(it->ptemplate.event, event_array, event_num)) { // replace it->ptemplate.event with the event_num string // this is the first time we've seen this event header = get_header(*it, merge_by); event_setup << describe_header(header); event_max = event_num; } if (it->ptemplate.cpu != "all") { size_t cpu = atoi(it->ptemplate.cpu.c_str()); if (cpu > nr_cpus) nr_cpus = cpu; } ostringstream str; str << event_num; it->ptemplate.event = str.str(); } xml_utils::set_nr_cpus(++nr_cpus); xml_utils::set_nr_events(event_max+1); if (has_nonzero_mask) xml_utils::set_has_nonzero_masks(); classes.event = event_setup.str(); classes.cpuinfo = describe_cpu(header); } /// construct a class template from a profile profile_template const template_from_profile(parsed_filename const & parsed, merge_option const & merge_by) { profile_template ptemplate; ptemplate.event = parsed.event; ptemplate.count = parsed.count; if (!merge_by.unitmask) ptemplate.unitmask = parsed.unitmask; if (!merge_by.tgid) ptemplate.tgid = parsed.tgid; if (!merge_by.tid) ptemplate.tid = parsed.tid; if (!merge_by.cpu) ptemplate.cpu = parsed.cpu; return ptemplate; } /** * Find a matching class the sample file could go in, or generate * a new class if needed. * This is the heart of the merging and classification process. * The returned value is non-const reference but the ptemplate member * must be considered as const */ profile_class & find_class(set & classes, parsed_filename const & parsed, merge_option const & merge_by) { profile_class cls; cls.ptemplate = template_from_profile(parsed, merge_by); pair::iterator, bool> ret = classes.insert(cls); return const_cast(*ret.first); } /** * Sanity check : we can't overwrite sample_filename, if we abort here it means * we fail to detect that parsed sample filename for two distinct samples * filename must go in two distinct profile_sample_files. This assumption is * false for callgraph samples files so this function is only called for non cg * files. */ void sanitize_profile_sample_files(profile_sample_files const & sample_files, parsed_filename const & parsed) { // We can't allow to overwrite sample_filename. if (!sample_files.sample_filename.empty()) { ostringstream out; out << "sanitize_profile_sample_files(): sample file " << "parsed twice ?\nsample_filename:\n" << sample_files.sample_filename << endl << parsed << endl; throw op_fatal_error(out.str()); } } /** * Add a sample filename (either cg or non cg files) to this profile. */ void add_to_profile_sample_files(profile_sample_files & sample_files, parsed_filename const & parsed) { if (parsed.cg_image.empty()) { // We can't allow to overwrite sample_filename. sanitize_profile_sample_files(sample_files, parsed); sample_files.sample_filename = parsed.filename; } else { sample_files.cg_files.push_back(parsed.filename); } } /** * we need to fix cg filename: a callgraph filename can occur before the binary * non callgraph samples filename occur so we must search. */ profile_sample_files & find_profile_sample_files(list & files, parsed_filename const & parsed, extra_images const & extra) { list::iterator it; list::iterator const end = files.end(); for (it = files.begin(); it != end; ++it) { if (!it->sample_filename.empty()) { parsed_filename psample_filename = parse_filename(it->sample_filename, extra); if (psample_filename.lib_image == parsed.lib_image && psample_filename.image == parsed.image && psample_filename.profile_spec_equal(parsed)) return *it; } list::const_iterator cit; list::const_iterator const cend = it->cg_files.end(); for (cit = it->cg_files.begin(); cit != cend; ++cit) { parsed_filename pcg_filename = parse_filename(*cit, extra); if (pcg_filename.lib_image == parsed.lib_image && pcg_filename.image == parsed.image && pcg_filename.profile_spec_equal(parsed)) return *it; } } // not found, create a new one files.push_back(profile_sample_files()); return files.back(); } /** * Add a profile to particular profile set. If the new profile is * a dependent image, it gets added to the dep list, or just placed * on the normal list of profiles otherwise. */ void add_to_profile_set(profile_set & set, parsed_filename const & parsed, bool merge_by_lib, extra_images const & extra) { if (parsed.image == parsed.lib_image && !merge_by_lib) { profile_sample_files & sample_files = find_profile_sample_files(set.files, parsed, extra); add_to_profile_sample_files(sample_files, parsed); return; } list::iterator it = set.deps.begin(); list::iterator const end = set.deps.end(); for (; it != end; ++it) { if (it->lib_image == parsed.lib_image && !merge_by_lib && parsed.jit_dumpfile_exists == false) { profile_sample_files & sample_files = find_profile_sample_files(it->files, parsed, extra); add_to_profile_sample_files(sample_files, parsed); return; } } profile_dep_set depset; depset.lib_image = parsed.lib_image; profile_sample_files & sample_files = find_profile_sample_files(depset.files, parsed, extra); add_to_profile_sample_files(sample_files, parsed); set.deps.push_back(depset); } /** * Add a profile to a particular equivalence class. The previous matching * will have ensured the profile "fits", so now it's just a matter of * finding which sample file list it needs to go on. */ void add_profile(profile_class & pclass, parsed_filename const & parsed, bool merge_by_lib, extra_images const & extra) { list::iterator it = pclass.profiles.begin(); list::iterator const end = pclass.profiles.end(); for (; it != end; ++it) { if (it->image == parsed.image) { add_to_profile_set(*it, parsed, merge_by_lib, extra); return; } } profile_set set; set.image = parsed.image; add_to_profile_set(set, parsed, merge_by_lib, extra); pclass.profiles.push_back(set); } } // anon namespace profile_classes const arrange_profiles(list const & files, merge_option const & merge_by, extra_images const & extra) { set temp_classes; list::const_iterator it = files.begin(); list::const_iterator const end = files.end(); for (; it != end; ++it) { parsed_filename parsed = parse_filename(*it, extra); if (parsed.lib_image.empty()) parsed.lib_image = parsed.image; // This simplifies the add of the profile later, // if we're lib-merging, then the app_image cannot // matter. After this, any non-dependent has // image == lib_image if (merge_by.lib) parsed.image = parsed.lib_image; profile_class & pclass = find_class(temp_classes, parsed, merge_by); add_profile(pclass, parsed, merge_by.lib, extra); } profile_classes classes; copy(temp_classes.begin(), temp_classes.end(), back_inserter(classes.v)); /* Coverity complains about classes.axis not being initialized upon * returning a copy of the classes object, so we'll silence it by * initializing axis to the max value. */ classes.axis = AXIS_MAX; if (classes.v.empty()) return classes; // sort by template for nicely ordered columns stable_sort(classes.v.begin(), classes.v.end()); if (want_xml) identify_xml_classes(classes, merge_by); else identify_classes(classes, merge_by); classes.extra_found_images = extra; return classes; } ostream & operator<<(ostream & out, profile_sample_files const & sample_files) { out << "sample_filename: " << sample_files.sample_filename << endl; out << "callgraph filenames:\n"; copy(sample_files.cg_files.begin(), sample_files.cg_files.end(), ostream_iterator(out, "\n")); return out; } ostream & operator<<(ostream & out, profile_dep_set const & pdep_set) { out << "lib_image: " << pdep_set.lib_image << endl; list::const_iterator it; list::const_iterator const end = pdep_set.files.end(); size_t i = 0; for (it = pdep_set.files.begin(); it != end; ++it) out << "profile_sample_files #" << i++ << ":\n" << *it; return out; } ostream & operator<<(ostream & out, profile_set const & pset) { out << "image: " << pset.image << endl; list::const_iterator it; list::const_iterator const end = pset.files.end(); size_t i = 0; for (it = pset.files.begin(); it != end; ++it) out << "profile_sample_files #" << i++ << ":\n" << *it; list::const_iterator cit; list::const_iterator const cend = pset.deps.end(); i = 0; for (cit = pset.deps.begin(); cit != cend; ++cit) out << "profile_dep_set #" << i++ << ":\n" << *cit; return out; } ostream & operator<<(ostream & out, profile_template const & ptemplate) { out << "event: " << ptemplate.event << endl << "count: " << ptemplate.count << endl << "unitmask: " << ptemplate.unitmask << endl << "tgid: " << ptemplate.tgid << endl << "tid: " << ptemplate.tid << endl << "cpu: " << ptemplate.cpu << endl; return out; } ostream & operator<<(ostream & out, profile_class const & pclass) { out << "name: " << pclass.name << endl << "longname: " << pclass.longname << endl << "ptemplate:\n" << pclass.ptemplate; size_t i = 0; list::const_iterator it; list::const_iterator const end = pclass.profiles.end(); for (it = pclass.profiles.begin(); it != end; ++it) out << "profiles_set #" << i++ << ":\n" << *it; return out; } ostream & operator<<(ostream & out, profile_classes const & pclasses) { out << "event: " << pclasses.event << endl << "cpuinfo: " << pclasses.cpuinfo << endl; for (size_t i = 0; i < pclasses.v.size(); ++i) out << "class #" << i << ":\n" << pclasses.v[i]; return out; } namespace { /// add the files to group of image sets void add_to_group(image_group_set & group, string const & app_image, list const & files) { image_set set; set.app_image = app_image; set.files = files; group.push_back(set); } typedef map app_map_t; inverted_profile & get_iprofile(app_map_t & app_map, string const & image, size_t nr_classes) { app_map_t::iterator ait = app_map.find(image); if (ait != app_map.end()) return ait->second; inverted_profile ip; ip.image = image; ip.groups.resize(nr_classes); app_map[image] = ip; return app_map[image]; } /// Pull out all the images, removing any we can't access. void verify_and_fill(app_map_t & app_map, list & plist, extra_images const & extra) { app_map_t::iterator it = app_map.begin(); app_map_t::iterator const end = app_map.end(); for (; it != end; ++it) { plist.push_back(it->second); inverted_profile & ip = plist.back(); extra.find_image_path(ip.image, ip.error, false); } } } // anon namespace list const invert_profiles(profile_classes const & classes) { app_map_t app_map; size_t nr_classes = classes.v.size(); for (size_t i = 0; i < nr_classes; ++i) { list::const_iterator pit = classes.v[i].profiles.begin(); list::const_iterator pend = classes.v[i].profiles.end(); for (; pit != pend; ++pit) { // files can be empty if samples for a lib image // but none for the main image. Deal with it here // rather than later. if (pit->files.size()) { inverted_profile & ip = get_iprofile(app_map, pit->image, nr_classes); add_to_group(ip.groups[i], pit->image, pit->files); } list::const_iterator dit = pit->deps.begin(); list::const_iterator const dend = pit->deps.end(); for (; dit != dend; ++dit) { inverted_profile & ip = get_iprofile(app_map, dit->lib_image, nr_classes); add_to_group(ip.groups[i], pit->image, dit->files); } } } list inverted_list; verify_and_fill(app_map, inverted_list, classes.extra_found_images); return inverted_list; } oprofile-1.3.0/libpp/profile_spec.cpp0000664000175000017500000004227012741227567014563 00000000000000/** * @file profile_spec.cpp * Contains a PP profile specification * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include #include #include #include #include #include #include "file_manip.h" #include "op_config.h" #include "profile_spec.h" #include "string_manip.h" #include "glob_filter.h" #include "locate_images.h" #include "op_exception.h" #include "op_header.h" #include "op_fileio.h" using namespace std; namespace { // PP:3.7, full path, or relative path. If we can't find it, // we should maintain the original to maintain the wordexp etc. string const fixup_image_spec(string const & str, extra_images const & extra) { // On error find_image_path() return str, so if an occur we will // use the provided image_name not the fixed one. image_error error; return extra.find_image_path(str, error, true); } void fixup_image_spec(vector & images, extra_images const & extra) { vector::iterator it = images.begin(); vector::iterator const end = images.end(); for (; it != end; ++it) *it = fixup_image_spec(*it, extra); } } // anon namespace profile_spec::profile_spec() : extra_found_images() { parse_table["archive"] = &profile_spec::parse_archive_path; parse_table["session"] = &profile_spec::parse_session; parse_table["session-exclude"] = &profile_spec::parse_session_exclude; parse_table["image"] = &profile_spec::parse_image; parse_table["image-exclude"] = &profile_spec::parse_image_exclude; parse_table["lib-image"] = &profile_spec::parse_lib_image; parse_table["event"] = &profile_spec::parse_event; parse_table["count"] = &profile_spec::parse_count; parse_table["unit-mask"] = &profile_spec::parse_unitmask; parse_table["tid"] = &profile_spec::parse_tid; parse_table["tgid"] = &profile_spec::parse_tgid; parse_table["cpu"] = &profile_spec::parse_cpu; } void profile_spec::parse(string const & tag_value) { string value; action_t action = get_handler(tag_value, value); if (!action) { throw invalid_argument("profile_spec::parse(): not " "a valid tag \"" + tag_value + "\""); } (this->*action)(value); } bool profile_spec::is_valid_tag(string const & tag_value) { string value; return get_handler(tag_value, value); } void profile_spec::set_image_or_lib_name(string const & str) { /* FIXME: what does spec say about this being allowed to be * a comma list or not ? */ image_or_lib_image.push_back(fixup_image_spec(str, extra_found_images)); } void profile_spec::parse_archive_path(string const & str) { archive_path = op_realpath(str); /* Need to force session directory default location in the archive */ init_op_config_dirs(OP_SESSION_DIR_DEFAULT); } string profile_spec::get_archive_path() const { return archive_path; } void profile_spec::parse_session(string const & str) { session = separate_token(str, ','); } void profile_spec::parse_session_exclude(string const & str) { session_exclude = separate_token(str, ','); } void profile_spec::parse_image(string const & str) { image = separate_token(str, ','); fixup_image_spec(image, extra_found_images); } void profile_spec::parse_image_exclude(string const & str) { image_exclude = separate_token(str, ','); fixup_image_spec(image_exclude, extra_found_images); } void profile_spec::parse_lib_image(string const & str) { lib_image = separate_token(str, ','); fixup_image_spec(lib_image, extra_found_images); } void profile_spec::parse_event(string const & str) { event.set(str); } void profile_spec::parse_count(string const & str) { count.set(str); } void profile_spec::parse_unitmask(string const & str) { unitmask.set(str); } void profile_spec::parse_tid(string const & str) { tid.set(str); } void profile_spec::parse_tgid(string const & str) { tgid.set(str); } void profile_spec::parse_cpu(string const & str) { cpu.set(str); } profile_spec::action_t profile_spec::get_handler(string const & tag_value, string & value) { string::size_type pos = tag_value.find_first_of(':'); if (pos == string::npos) return 0; string tag(tag_value.substr(0, pos)); value = tag_value.substr(pos + 1); parse_table_t::const_iterator it = parse_table.find(tag); if (it == parse_table.end()) return 0; return it->second; } namespace { /// return true if the value from the profile spec may match the comma /// list template bool comma_match(comma_list const & cl, generic_spec const & value) { // if the profile spec is "all" we match the sample file if (!cl.is_set()) return true; // an "all" sample file should never match specified profile // spec values if (!value.is_set()) return false; // now match each profile spec value against the sample file return cl.match(value.value()); } } bool profile_spec::match(filename_spec const & spec) const { bool matched_by_image_or_lib_image = false; // We need the true image name not the one based on the sample // filename for the benefit of module which have /oprofile in their // sample filename. This allow to specify profile spec based on the // real name of the image, e.g. 'binary:*oprofile.ko' string simage = fixup_image_spec(spec.image, extra_found_images); string slib_image = fixup_image_spec(spec.lib_image, extra_found_images); // PP:3.19 if (!image_or_lib_image.empty()) { glob_filter filter(image_or_lib_image, image_exclude); if (filter.match(simage) || filter.match(slib_image)) matched_by_image_or_lib_image = true; } if (!matched_by_image_or_lib_image) { // PP:3.7 3.8 if (!image.empty()) { glob_filter filter(image, image_exclude); if (!filter.match(simage)) return false; } else if (!image_or_lib_image.empty()) { // image.empty() means match all except if user // specified image_or_lib_image return false; } // PP:3.9 3.10 if (!lib_image.empty()) { glob_filter filter(lib_image, image_exclude); if (!filter.match(slib_image)) return false; } else if (image.empty() && !image_or_lib_image.empty()) { // lib_image empty means match all except if user // specified image_or_lib_image *or* we already // matched this spec through image return false; } } if (!matched_by_image_or_lib_image) { // if we don't match by image_or_lib_image we must try to // exclude from spec, exclusion from image_or_lib_image has // been handled above vector empty; glob_filter filter(empty, image_exclude); if (!filter.match(simage)) return false; if (!spec.lib_image.empty() && !filter.match(slib_image)) return false; } if (!event.match(spec.event)) return false; if (!count.match(spec.count)) return false; if (!unitmask.match(spec.unitmask)) return false; if (!comma_match(cpu, spec.cpu)) return false; if (!comma_match(tid, spec.tid)) return false; if (!comma_match(tgid, spec.tgid)) return false; return true; } profile_spec profile_spec::create(list const & args, vector const & image_path, string const & root_path) { profile_spec spec; set tag_seen; vector temp_image_or_lib; list::const_iterator it = args.begin(); list::const_iterator end = args.end(); for (; it != end; ++it) { if (spec.is_valid_tag(*it)) { if (tag_seen.find(*it) != tag_seen.end()) { throw op_runtime_error("tag specified " "more than once: " + *it); } tag_seen.insert(*it); spec.parse(*it); } else { string const file = op_realpath(*it); temp_image_or_lib.push_back(file); } } // PP:3.5 no session given means use the current session. if (spec.session.empty()) spec.session.push_back("current"); bool ok = true; vector::const_iterator ip_it = image_path.begin(); for ( ; ip_it != image_path.end(); ++ip_it) { if (!is_directory(spec.get_archive_path() + "/" + *ip_it)) { cerr << spec.get_archive_path() + "/" + *ip_it << " isn't a valid directory\n"; ok = false; } } if (!ok) throw op_runtime_error("invalid --image-path= options"); spec.extra_found_images.populate(image_path, spec.get_archive_path(), root_path); vector::const_iterator im = temp_image_or_lib.begin(); vector::const_iterator last = temp_image_or_lib.end(); for (; im != last; ++im) spec.set_image_or_lib_name(*im); return spec; } namespace { vector filter_session(vector const & session, vector const & session_exclude) { vector result(session); if (result.empty()) result.push_back("current"); for (size_t i = 0 ; i < session_exclude.size() ; ++i) { // FIXME: would we use fnmatch on each item, are we allowed // to --session=current* ? vector::iterator it = find(result.begin(), result.end(), session_exclude[i]); if (it != result.end()) result.erase(it); } return result; } static bool invalid_sample_file; bool valid_candidate(string const & base_dir, string const & filename, profile_spec const & spec, bool exclude_dependent, bool exclude_cg) { if (exclude_cg && filename.find("{cg}") != string::npos) return false; // strip out non sample files string const & sub = filename.substr(base_dir.size(), string::npos); if (!is_prefix(sub, "/{root}/") && !is_prefix(sub, "/{kern}/")) return false; /** NOTE: This comment and associated code is actually obsolete now, * since opcontrol and the oprofile kernel driver are no longer * in use with oprofile (as of release 1.0). It seems extremely * unlikely we could encounter the same sort of issue using operf, * but it doesn't hurt to keep the code to be on the safe side. * * When overflows occur in the oprofile kernel driver's sample * buffers (caused by too high of a sampling rate), it's possible * for samples to be mis-attributed. A common scenario is that, * while profiling process 'abc' running binary 'xzy', the task * switch for 'abc' gets dropped somehow. Then, samples are taken * for the 'xyz' binary. In the attempt to attribute the samples to * the associated binary, the oprofile kernel code examines the * the memory mappings for the last process for which it recorded * a task switch. When profiling at a very high rate, the oprofile * daemon is often the process that is mistakenly examined. Then the * sample from binary 'xyz' is matched to some file that's open in * oprofiled's memory space. Because oprofiled has many sample files * open at any given time, there's a good chance the sample's VMA is * contained within one of those sample files. So, once finding this * bogus match, the oprofile kernel records a cookie switch for the * sample file. This scenario is made even more likely if a high * sampling rate (e.g., profiling on several events) is paired with * callgraph data collection. * * When the daemon processes this sample data from the kernel, it * creates a sample file for the sample file, resulting in something * of the form: * /[blah]/[blah] * * When the sample data is post-processed, the sample file is parsed to * try to determine the name of the binary, but it gets horribly confused. * At best, the post-processing tool will spit out some warning messages, * such as: * warning: * /lib64/libdl-2.9.so/CYCLES.10000.0.all.all.all/{dep}/{root}/var/lib/oprofile/samples/current/{root}/lib64/libdl-2.9.so/{dep}/{root}/lib64/libdl-2.9.so/PM_RUN_CYC_GRP12.10000.0.all.all.all * could not be found. * * At worst, the parsing may result in an "invalid argument" runtime error * because of the inability to parse a sample file whose name contains that * of another sample file. This typically seems to happen when callgraph * data is being collected. * * The next several lines of code checks if the passed filename * contains /samples; if so, we discard it as an * invalid sample file. */ unsigned int j = base_dir.rfind('/'); string session_samples_dir = base_dir.substr(0, j); if (sub.find(session_samples_dir) != string::npos) { invalid_sample_file = true; return false; } // strip out generated JIT object files for samples of anonymous regions if (is_jit_sample(sub)) return false; filename_spec file_spec(filename, spec.extra_found_images); if (spec.match(file_spec)) { if (exclude_dependent && file_spec.is_dependent()) return false; return true; } return false; } /** * Print a warning message if we detect any sample buffer overflows * occurred in the kernel driver. */ static void warn_if_kern_buffs_overflow(string const & session_samples_dir) { DIR * dir; struct dirent * dirent; string stats_path; int ret = 0; stats_path = session_samples_dir + "stats/"; ret = op_read_int_from_file((stats_path + "event_lost_overflow"). c_str(), 0); if (!(dir = opendir(stats_path.c_str()))) { ret = -1; goto done; } while ((dirent = readdir(dir)) && !ret) { int cpu_nr; string path; if (sscanf(dirent->d_name, "cpu%d", &cpu_nr) != 1) continue; path = stats_path + dirent->d_name + "/"; ret = op_read_int_from_file((path + "sample_lost_overflow"). c_str(), 0); } closedir(dir); done: if (ret > 0) { cerr << "WARNING! The OProfile kernel driver reports sample " << "buffer overflows." << endl; cerr << "Such overflows can result in incorrect sample attribution" << ", invalid sample" << endl << "files and other symptoms. " << "See the oprofiled.log for details." << endl; cerr << "You should adjust your sampling frequency to eliminate" << " (or at least minimize)" << endl << "these overflows." << endl; } } static void warn_if_kern_throttling(string const & session_samples_dir) { DIR * dir; string stats_path; /* check for throttled */ stats_path = session_samples_dir + "stats/throttled"; dir = opendir(stats_path.c_str()); if (dir != NULL) { cerr << "\nWARNING! Some of the events were throttled. " << "Throttling occurs when\n"; cerr << "the initial sample rate is too high, causing an " << "excessive number of\n"; cerr << "interrupts. Decrease the sampling frequency. " << "Check the directory\n"; cerr << stats_path << "\n" << "for the throttled event names.\n\n"; closedir(dir); } } static void warn_if_lost_samples(string const & session_samples_dir) { string stats_path; string operf_log(op_session_dir); unsigned long total_samples; unsigned long total_lost_samples = 0; stats_path = session_samples_dir + "stats/"; total_samples = op_read_long_from_file((stats_path + "total_samples"). c_str(), 0); if (total_samples == ((unsigned long)-1)) return; for (int i = OPERF_INDEX_OF_FIRST_LOST_STAT; i < OPERF_MAX_STATS; i++) { unsigned long lost_samples_count = op_read_long_from_file((stats_path + stats_filenames[i]).c_str(), 0); if (!(lost_samples_count == ((unsigned long)-1))) total_lost_samples += lost_samples_count; } if (total_lost_samples > (unsigned int)(OPERF_WARN_LOST_SAMPLES_THRESHOLD * total_samples)) { operf_log.append("/samples/operf.log"); cerr << "\nWARNING: Lost samples detected! See " << operf_log << " for details." << endl; } } static void warn_if_sampling_problems(string const & session_samples_dir) { warn_if_kern_buffs_overflow(session_samples_dir); warn_if_kern_throttling(session_samples_dir); warn_if_lost_samples(session_samples_dir); } } // anonymous namespace list profile_spec::generate_file_list(bool exclude_dependent, bool exclude_cg) const { // FIXME: isn't remove_duplicates faster than doing this, then copy() ? set unique_files; vector sessions = filter_session(session, session_exclude); if (sessions.empty()) { ostringstream os; os << "No session given\n" << "included session was:\n"; copy(session.begin(), session.end(), ostream_iterator(os, "\n")); os << "excluded session was:\n"; copy(session_exclude.begin(), session_exclude.end(), ostream_iterator(os, "\n")); throw invalid_argument(os.str()); } bool found_file = false; vector::const_iterator cit = sessions.begin(); vector::const_iterator end = sessions.end(); for (; cit != end; ++cit) { if (cit->empty()) continue; string base_dir; invalid_sample_file = false; if ((*cit)[0] != '.' && (*cit)[0] != '/') base_dir = archive_path + op_samples_dir; base_dir += *cit; base_dir = op_realpath(base_dir); list files; create_file_list(files, base_dir, "*", true); if (!files.empty()) { found_file = true; warn_if_sampling_problems(base_dir + "/"); } list::const_iterator it = files.begin(); list::const_iterator fend = files.end(); for (; it != fend; ++it) { if (valid_candidate(base_dir, *it, *this, exclude_dependent, exclude_cg)) { unique_files.insert(*it); } } if (invalid_sample_file) { cerr << "Warning: Invalid sample files found in " << base_dir << endl; cerr << "This problem can be caused by too high of a sampling rate." << endl; } } if (!found_file) { ostringstream os; os << "No sample found: Please specify a session containing \n" << "sample data.\n"; throw op_fatal_error(os.str()); } list result; copy(unique_files.begin(), unique_files.end(), back_inserter(result)); return result; } oprofile-1.3.0/libpp/xml_utils.h0000664000175000017500000000403012603572700013553 00000000000000/** * @file xml_utils.h * utility routines for generating XML * * @remark Copyright 2006 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #ifndef XML_UTILS_H #define XML_UTILS_H #include "symbol.h" #include "format_output.h" #include "xml_output.h" typedef symbol_collection::const_iterator sym_iterator; extern bool want_xml; class extra_images; class op_bfd; class xml_utils { public: xml_utils(format_output::xml_formatter * xo, symbol_collection const & s, size_t nc, extra_images const & extra); // these members are static because they are invoked before // the xml_utils object has been created static std::string get_timer_setup(size_t count); static std::string get_event_setup(std::string event, size_t count, std::string unit_mask); static std::string get_profile_header(std::string cpu_name, double const speed); static void set_nr_cpus(size_t cpus); static void set_nr_events(size_t events); static void set_has_nonzero_masks(); static void add_option(tag_t tag, bool value); static void add_option(tag_t tag, std::string const & value); static void add_option(tag_t tag, std::vector const & value); static void add_option(tag_t tag, std::list const & value); static void output_xml_header(std::string const & command_options, std::string const & cpu_info, std::string const & events); void output_symbol_bytes(std::ostream & out, symbol_entry const * symb, size_t sym_id, op_bfd const & abfd); bool output_summary_data(std::ostream & out, count_array_t const & summary, size_t pclass); size_t get_symbol_index(sym_iterator const it); void output_program_structure(std::ostream & out); void build_subclasses(std::ostream & out); private: bool multiple_events; bool has_subclasses; size_t bytes_index; extra_images const & extra_found_images; static bool has_nonzero_masks; static size_t events_index; }; extern xml_utils * xml_support; #endif /* !XML_UTILS_H */ oprofile-1.3.0/libpp/sample_container.h0000664000175000017500000000426012534404406015063 00000000000000/** * @file sample_container.h * Internal implementation of sample container * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef SAMPLE_CONTAINER_H #define SAMPLE_CONTAINER_H #include #include #include #include "symbol.h" #include "symbol_functors.h" /** * Arbitrary container of sample entries. Can return * number of samples for a file or line number and * return the particular sample information for a VMA. */ class sample_container { typedef std::pair sample_index_t; public: typedef std::map samples_storage; typedef samples_storage::const_iterator samples_iterator; /// return iterator to the first samples for this symbol samples_iterator begin(symbol_entry const *) const; /// return iterator to the last samples for this symbol samples_iterator end(symbol_entry const *) const; /// return iterator to the first samples samples_iterator begin() const; /// return iterator to the last samples samples_iterator end() const; /// insert a sample entry by creating a new entry or by cumulating /// samples into an existing one. Can only be done before any lookups void insert(symbol_entry const * symbol, sample_entry const &); /// return nr of samples in the given filename count_array_t accumulate_samples(debug_name_id filename_id) const; /// return nr of samples at the given line nr in the given file count_array_t accumulate_samples(debug_name_id, size_t linenr) const; /// return the sample entry for the given image_name and vma if any sample_entry const * find_by_vma(symbol_entry const * symbol, bfd_vma vma) const; private: /// build the symbol by file-location cache void build_by_loc() const; /// main sample entry container samples_storage samples; typedef std::multiset samples_by_loc_t; // must be declared after the samples_storage to ensure a // correct life-time. /** * Sample entries by file location. Lazily built when necessary, * so mutable. */ mutable samples_by_loc_t samples_by_loc; }; #endif /* SAMPLE_CONTAINER_H */ oprofile-1.3.0/libpp/symbol.cpp0000664000175000017500000000166712603572700013410 00000000000000/** * @file symbol.cpp * Symbol containers * * @remark Copyright 2002, 2004 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "symbol.h" #include "locate_images.h" #include #include using namespace std; column_flags symbol_entry::output_hint(column_flags fl) const { if (app_name != image_name) fl = column_flags(fl | cf_image_name); // FIXME: see comment in symbol.h: why we don't use sample.vma + size ? if (sample.vma & ~0xffffffffLLU) fl = column_flags(fl | cf_64bit_vma); return fl; } bool has_sample_counts(count_array_t const & counts, size_t lo, size_t hi) { for (size_t i = lo; i <= hi; ++i) if (counts[i] != 0) return true; return false; } string const & get_image_name(image_name_id id, image_name_storage::image_name_type type, extra_images const & extra) { return image_names.get_name(id, type, extra); } oprofile-1.3.0/libpp/sample_container.cpp0000664000175000017500000000550512534404406015421 00000000000000/** * @file sample_container.cpp * Internal container for samples * * @remark Copyright 2002, 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include "sample_container.h" using namespace std; namespace { // FIXME: efficiency ? count_array_t add_counts(count_array_t const & counts, sample_entry const * s) { count_array_t temp(counts); temp += s->counts; return temp; } } // namespace anon sample_container::samples_iterator sample_container::begin() const { return samples.begin(); } sample_container::samples_iterator sample_container::end() const { return samples.end(); } sample_container::samples_iterator sample_container::begin(symbol_entry const * symbol) const { samples_storage::key_type key(symbol, 0); return samples.lower_bound(key); } sample_container::samples_iterator sample_container::end(symbol_entry const * symbol) const { samples_storage::key_type key(symbol, ~bfd_vma(0)); return samples.upper_bound(key); } void sample_container::insert(symbol_entry const * symbol, sample_entry const & sample) { samples_storage::key_type key(symbol, sample.vma); samples_storage::iterator it = samples.find(key); if (it != samples.end()) { it->second.counts += sample.counts; } else { samples[key] = sample; } } count_array_t sample_container::accumulate_samples(debug_name_id filename_id) const { build_by_loc(); sample_entry lower, upper; lower.file_loc.filename = upper.file_loc.filename = filename_id; lower.file_loc.linenr = 0; upper.file_loc.linenr = INT_MAX; typedef samples_by_loc_t::const_iterator iterator; iterator it1 = samples_by_loc.lower_bound(&lower); iterator it2 = samples_by_loc.upper_bound(&upper); return accumulate(it1, it2, count_array_t(), add_counts); } sample_entry const * sample_container::find_by_vma(symbol_entry const * symbol, bfd_vma vma) const { sample_index_t key(symbol, vma); samples_iterator it = samples.find(key); if (it != samples.end()) return &it->second; return 0; } count_array_t sample_container::accumulate_samples(debug_name_id filename, size_t linenr) const { build_by_loc(); sample_entry sample; sample.file_loc.filename = filename; sample.file_loc.linenr = linenr; typedef pair it_pair; it_pair itp = samples_by_loc.equal_range(&sample); return accumulate(itp.first, itp.second, count_array_t(), add_counts); } void sample_container::build_by_loc() const { if (!samples_by_loc.empty()) return; samples_iterator cit = samples.begin(); samples_iterator end = samples.end(); for (; cit != end; ++cit) samples_by_loc.insert(&cit->second); } oprofile-1.3.0/libpp/symbol_functors.h0000664000175000017500000000151012534404406014763 00000000000000/** * @file symbol_functors.h * Functors for symbol/sample comparison * * @remark Copyright 2002, 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef SYMBOL_FUNCTORS_H #define SYMBOL_FUNCTORS_H #include "symbol.h" /// compare based on file location struct less_by_file_loc { bool operator()(sample_entry const * lhs, sample_entry const * rhs) const { return lhs->file_loc < rhs->file_loc; } bool operator()(symbol_entry const * lhs, symbol_entry const * rhs) const { return lhs->sample.file_loc < rhs->sample.file_loc; } }; /// compare based on symbol contents struct less_symbol { // implementation compare by id rather than by string bool operator()(symbol_entry const & lhs, symbol_entry const & rhs) const; }; #endif /* SYMBOL_FUNCTORS_H */ oprofile-1.3.0/libpp/xml_utils.cpp0000664000175000017500000005754012603572700014124 00000000000000/** * @file xml_utils.cpp * utility routines for generating XML * * @remark Copyright 2006 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #include #include #include "xml_utils.h" #include "format_output.h" #include "arrange_profiles.h" #include "op_bfd.h" #include "cverb.h" using namespace std; bool want_xml = false; size_t nr_classes = 0; size_t nr_cpus = 0; size_t nr_events = 0; sym_iterator symbols_begin; sym_iterator symbols_end; // handle on xml_formatter object format_output::xml_formatter * xml_out; xml_utils * xml_support; size_t xml_utils::events_index = 0; bool xml_utils::has_nonzero_masks = false; ostringstream xml_options; namespace { bool has_separated_cpu_info() { return classes.v[0].ptemplate.cpu != "all"; } string get_event_num(size_t pclass) { return classes.v[pclass].ptemplate.event; } size_t get_next_event_num_pclass(size_t start) { string cur_event = get_event_num(start); size_t i; for (i = start; i < nr_classes && get_event_num(i) == cur_event; ++i) ; return i; } void dump_symbol(string const & prefix, sym_iterator it, bool want_nl = true) { if (it == symbols_end) cverb << vxml << prefix << "END"; else cverb << vxml << prefix << symbol_names.name((*it)->name); if (want_nl) cverb << vxml << endl; } void dump_symbols(string const & prefix, sym_iterator b, sym_iterator e) { if (b == (sym_iterator)0) return; for (sym_iterator it = b; it != e; ++it) dump_symbol(prefix, it, true); } void dump_classes() { cverb << vxml << "" << endl; } bool has_separated_thread_info() { return classes.v[0].ptemplate.tid != "all"; } }; // anonymous namespace xml_utils::xml_utils(format_output::xml_formatter * xo, symbol_collection const & s, size_t nc, extra_images const & extra) : has_subclasses(false), bytes_index(0), extra_found_images(extra) { xml_out = xo; nr_classes = nc; symbols_begin = s.begin(); symbols_end = s.end(); multiple_events = get_next_event_num_pclass(0) != nr_classes; if (has_separated_cpu_info()) { size_t cpus = 0; // count number of cpus for (size_t p = 0; p < nr_classes; ++p) { size_t cpu = atoi(classes.v[p].ptemplate.cpu.c_str()); if (cpu > cpus) cpus = cpu; } // cpus names start with 0 nr_cpus = cpus + 1; } } string xml_utils::get_timer_setup(size_t count) { return open_element(TIMER_SETUP, true) + init_attr(RTC_INTERRUPTS, count) + close_element(); } string xml_utils::get_event_setup(string event, size_t count, string unit_mask) { ostringstream str; str << open_element(EVENT_SETUP, true); str << init_attr(TABLE_ID, events_index++); str << init_attr(EVENT_NAME, event); if (unit_mask.size() != 0) str << init_attr(UNIT_MASK, unit_mask); str << init_attr(SETUP_COUNT, (size_t)count) + close_element(); return str.str(); } string xml_utils::get_profile_header(string cpu_name, double const speed) { ostringstream str; string cpu_type; string processor; string::size_type slash_pos = cpu_name.find("/"); if (slash_pos == string::npos) { cpu_type = cpu_name; processor = ""; } else { cpu_type = cpu_name.substr(0, slash_pos); processor = cpu_name.substr(slash_pos+1); } str << init_attr(CPU_NAME, cpu_type) << endl; if (processor.size() > 0) str << init_attr(PROCESSOR, string(processor)) << endl; if (nr_cpus > 1) str << init_attr(SEPARATED_CPUS, nr_cpus) << endl; str << init_attr(MHZ, speed) << endl; return str.str(); } void xml_utils::set_nr_cpus(size_t cpus) { nr_cpus = cpus; } void xml_utils::set_nr_events(size_t events) { nr_events = events; } void xml_utils::set_has_nonzero_masks() { has_nonzero_masks = true; } void xml_utils::add_option(tag_t tag, string const & value) { xml_options << init_attr(tag, value); } void xml_utils::add_option(tag_t tag, list const & value) { list::const_iterator begin = value.begin(); list::const_iterator end = value.end(); list::const_iterator cit = begin; ostringstream str; for (; cit != end; ++cit) { if (cit != begin) str << ","; str << *cit; } xml_options << init_attr(tag, str.str()); } void xml_utils::add_option(tag_t tag, vector const & value) { vector::const_iterator begin = value.begin(); vector::const_iterator end = value.end(); vector::const_iterator cit = begin; ostringstream str; for (; cit != end; ++cit) { if (cit != begin) str << ","; str << *cit; } xml_options << init_attr(tag, str.str()); } void xml_utils::add_option(tag_t tag, bool value) { xml_options << init_attr(tag, (value ? "true" : "false")); } void xml_utils::output_xml_header(string const & command_options, string const & cpu_info, string const & events) { // The integer portion indicates the schema version and should change // both here and in the schema file when major changes are made to // the schema. Changes to opreport, or minor changes to the schema // can be indicated by changes to the fraction part. string const schema_version = "3.1"; // This is the XML version, not schema version. string const xml_header = ""; cout << xml_header << endl; cout << open_element(PROFILE, true); cout << init_attr(SCHEMA_VERSION, schema_version); cout << cpu_info; cout << init_attr(TITLE, "opreport " + command_options); cout << close_element(NONE, true); cout << open_element(OPTIONS, true) << xml_options.str(); cout << close_element(); cout << open_element(SETUP) << events; cout << close_element(SETUP) << endl; } class subclass_info_t { public: string unitmask; string subclass_name; }; typedef growable_vector subclass_array_t; typedef growable_vector event_subclass_t; typedef growable_vector cpu_subclass_t; void xml_utils::build_subclasses(ostream & out) { size_t subclasses = 0; string subclass_name; // when --separate=cpu we will have an event_subclass array for each cpu cpu_subclass_t cpu_subclasses; event_subclass_t event_subclasses; if (nr_cpus <= 1 && nr_events <= 1 && !has_nonzero_masks) return; out << open_element(CLASSES); for (size_t i = 0; i < classes.v.size(); ++i) { profile_class & pclass = classes.v[i]; size_t event = atoi(pclass.ptemplate.event.c_str()); subclass_array_t * sc_ptr; // select the right subclass array if (nr_cpus == 1) { sc_ptr = &event_subclasses[event]; } else { size_t cpu = atoi(pclass.ptemplate.cpu.c_str()); sc_ptr = &cpu_subclasses[cpu][event]; } // search for an existing unitmask subclass_name = ""; for (size_t j = 0; j < sc_ptr->size(); ++j) { if ((*sc_ptr)[j].unitmask == pclass.ptemplate.unitmask) { subclass_name = (*sc_ptr)[j].subclass_name; break; } } if (subclass_name.size() == 0) { ostringstream str; size_t new_index = sc_ptr->size(); // no match found, create a new entry str << "c" << subclasses++; subclass_name = str.str(); (*sc_ptr)[new_index].unitmask = pclass.ptemplate.unitmask; (*sc_ptr)[new_index].subclass_name = subclass_name; out << open_element(CLASS, true); out << init_attr(NAME, subclass_name); if (nr_cpus > 1) out << init_attr(CPU_NUM, pclass.ptemplate.cpu); if (nr_events > 1) out << init_attr(EVENT_NUM, event); if (has_nonzero_masks) out << init_attr(EVENT_MASK, pclass.ptemplate.unitmask); out << close_element(); } pclass.name = subclass_name; } out << close_element(CLASSES); has_subclasses = true; } string get_counts_string(count_array_t const & counts, size_t begin, size_t end) { ostringstream str; bool got_count = false; // if no cpu separation then return a simple count, omit zero counts if (nr_cpus == 1) { size_t count = counts[begin]; if (count == 0) return ""; str << count; return str.str(); } for (size_t p = begin; p != end; ++p) { size_t count = counts[p]; if (p != begin) str << ","; if (count != 0) { got_count = true; str << count; } } return got_count ? str.str() : ""; } void xml_utils::output_symbol_bytes(ostream & out, symbol_entry const * symb, size_t sym_id, op_bfd const & abfd) { size_t size = symb->size; scoped_array contents(new unsigned char[size]); if (abfd.get_symbol_contents(symb->sym_index, contents.get())) { string const name = symbol_names.name(symb->name); out << open_element(BYTES, true) << init_attr(TABLE_ID, sym_id); out << close_element(NONE, true); for (size_t i = 0; i < size; ++i) { char hex_map[] = "0123456789ABCDEF"; char hex[2]; hex[0] = hex_map[(contents[i] >> 4) & 0xf]; hex[1] = hex_map[contents[i] & 0xf]; out << hex[0] << hex[1]; } out << close_element(BYTES); } } bool xml_utils::output_summary_data(ostream & out, count_array_t const & summary, size_t pclass) { size_t const count = summary[pclass]; if (count == 0) return false; out << open_element(COUNT, has_subclasses); if (has_subclasses) { out << init_attr(CLASS, classes.v[pclass].name); out << close_element(NONE, true); } out << count; out << close_element(COUNT); return true; } class module_info { public: module_info() { lo = hi = 0; name = ""; begin = end = (sym_iterator)0;} void dump(); void build_module(string const & n, sym_iterator it, size_t l, size_t h); string get_name() { return name; } void set_lo(size_t l) { lo = l; } void set_hi(size_t h) { hi = h; } count_array_t const & get_summary() { return summary; } void set_begin(sym_iterator b); void set_end(sym_iterator e); void add_to_summary(count_array_t const & counts); void output(ostream & out); bool is_closed(string const & n); protected: void output_summary(ostream & out); void output_symbols(ostream & out, bool is_module); string name; sym_iterator begin; sym_iterator end; // summary sample data count_array_t summary; // range of profile classes approprate for this module size_t lo; size_t hi; }; class thread_info : public module_info { public: thread_info() { nr_modules = 0; } void build_thread(string const & tid, size_t l, size_t h); bool add_modules(string const & module, sym_iterator it); void add_module_symbol(string const & n, sym_iterator it); void summarize(); void set_end(sym_iterator end); string const get_tid() { return thread_id; } void output(ostream & out); void dump(); private: // indices into the classes array applicable to this process size_t nr_modules; string thread_id; growable_vector my_modules; }; class process_info : public module_info { public: process_info() { nr_threads = 0; } void build_process(string const & pid, size_t l, size_t h); void add_thread(string const & tid, size_t l, size_t h); void add_modules(string const & module, string const & app_name, sym_iterator it); void summarize(); void set_end(sym_iterator end); void output(ostream & out); void dump(); private: size_t nr_threads; string process_id; growable_vector my_threads; }; class process_root_info { public: process_root_info() { nr_processes = 0; } process_info * add_process(string const & pid, size_t lo, size_t hi); void add_modules(string const & module, string const & app_name, sym_iterator it); void summarize(); void summarize_processes(extra_images const & extra_found_images); void set_process_end(); void output_process_symbols(ostream & out); void dump_processes(); private: size_t nr_processes; growable_vector processes; }; class binary_info : public module_info { public: binary_info() { nr_modules = 0; } void output(ostream & out); binary_info * build_binary(string const & n); void add_module_symbol(string const & module, string const & app, sym_iterator it); void close_binary(sym_iterator it); void dump(); private: size_t nr_modules; growable_vector my_modules; }; class binary_root_info { public: binary_root_info() { nr_binaries = 0; } binary_info * add_binary(string const & n, sym_iterator it); void summarize_binaries(extra_images const & extra_found_images); void output_binary_symbols(ostream & out); void dump_binaries(); private: size_t nr_binaries; growable_vector binaries; }; static process_root_info processes_root; static binary_root_info binaries_root; void module_info:: build_module(string const & n, sym_iterator it, size_t l, size_t h) { name = n; begin = it; lo = l; hi = h; } void module_info::add_to_summary(count_array_t const & counts) { for (size_t pclass = lo ; pclass <= hi; ++pclass) summary[pclass] += counts[pclass]; } void module_info::set_begin(sym_iterator b) { if (begin == (sym_iterator)0) begin = b; } void module_info::set_end(sym_iterator e) { if (end == (sym_iterator)0) end = e; } bool module_info::is_closed(string const & n) { return (name == n) && end != (sym_iterator)0; } void module_info::dump() { cverb << vxml << " module:class(" << lo << "," << hi << ")="; cverb << vxml << name << endl; dump_symbols(" ", begin, end); } void module_info::output(ostream & out) { out << open_element(MODULE, true); out << init_attr(NAME, name) << close_element(NONE, true); output_summary(out); output_symbols(out, true); out << close_element(MODULE); } void module_info::output_summary(ostream & out) { for (size_t p = lo; p <= hi; ++p) (void)xml_support->output_summary_data(out, summary, p); } void module_info::output_symbols(ostream & out, bool is_module) { if (begin == (sym_iterator)0) return; for (sym_iterator it = begin; it != end; ++it) xml_out->output_symbol(out, *it, lo, hi, is_module); } void binary_info::close_binary(sym_iterator it) { set_end(it); if (nr_modules > 0) { module_info & m = my_modules[nr_modules-1]; m.set_end(it); } } void binary_info::dump() { cverb << vxml << "app_name=" << name << endl; if (begin != (sym_iterator)0) dump_symbols(" ", begin, end); for (size_t i = 0; i < nr_modules; ++i) my_modules[i].dump(); } void binary_info:: add_module_symbol(string const & module, string const & app, sym_iterator it) { size_t m = nr_modules; if (module == app) { // set begin symbol for binary if not set set_begin(it); if (m > 0) { // close out current module module_info & mod = my_modules[m-1]; mod.set_end(it); } // add symbol count to binary count add_to_summary((*it)->sample.counts); return; } string current_module_name = (m == 0 ? "" : my_modules[m-1].get_name()); if (module != current_module_name) { // we have a module distinct from it's binary: --separate=lib // and this is the first symbol for this module if (m != 0) { // close out current module module_info & mod = my_modules[m-1]; mod.set_end(it); } // mark end of enclosing binary symbols if there have been any // NOTE: it is possible for the binary's symbols to follow its // module symbols if (begin != (sym_iterator)0 && end == (sym_iterator)0) set_end(it); // build the new module nr_modules++; my_modules[m].build_module(module, it, 0, nr_classes-1); } // propagate this symbols counts to the module my_modules[nr_modules-1].add_to_summary((*it)->sample.counts); } void binary_root_info:: summarize_binaries(extra_images const & extra_found_images) { binary_info * current_binary = 0; string current_binary_name = ""; for (sym_iterator it = symbols_begin ; it != symbols_end; ++it) { string binary = get_image_name((*it)->app_name, image_name_storage::int_filename, extra_found_images); string module = get_image_name((*it)->image_name, image_name_storage::int_filename, extra_found_images); if (binary != current_binary_name) { current_binary = binaries_root.add_binary(binary, it); current_binary_name = binary; } // To silence coverity, check current_binary !=NULL if (current_binary) current_binary->add_module_symbol(module, binary, it); } // close out last binary and module if (current_binary) current_binary->close_binary(symbols_end); } process_info * process_root_info::add_process(string const & pid, size_t lo, size_t hi) { processes[nr_processes].build_process(pid, lo, hi); return &processes[nr_processes++]; } void process_root_info:: add_modules(string const & module, string const & app_name, sym_iterator it) { for (size_t p = 0; p < nr_processes; ++p) processes[p].add_modules(module, app_name, it); } void process_root_info::summarize() { for (size_t p = 0; p < nr_processes; ++p) processes[p].summarize(); } void process_root_info:: summarize_processes(extra_images const & extra_found_images) { // add modules to the appropriate threads in the process hierarchy for (sym_iterator it = symbols_begin ; it != symbols_end; ++it) { string binary = get_image_name((*it)->app_name, image_name_storage::int_filename, extra_found_images); string module = get_image_name((*it)->image_name, image_name_storage::int_filename, extra_found_images); processes_root.add_modules(module, binary, it); } // set end symbol boundary for all modules in all threads processes_root.set_process_end(); // propagate summaries to process/thread processes_root.summarize(); } void process_root_info::set_process_end() { for (size_t p = 0; p < nr_processes; ++p) processes[p].set_end(symbols_end); } void process_root_info::output_process_symbols(ostream & out) { for (size_t p = 0; p < nr_processes; ++p) processes[p].output(out); } void process_root_info::dump_processes() { cverb << vxml << "" << endl; } binary_info * binary_info::build_binary(string const & n) { name = n; lo = 0; hi = nr_classes-1; return this; } void binary_info::output(ostream & out) { out << open_element(BINARY, true); out << init_attr(NAME, name) << close_element(NONE, true); output_summary(out); output_symbols(out, false); for (size_t a = 0; a < nr_modules; ++a) my_modules[a].output(out); out << close_element(BINARY); } binary_info * binary_root_info::add_binary(string const & n, sym_iterator it) { size_t a = nr_binaries++; // close out previous binary and module if (a > 0) binaries[a-1].close_binary(it); return binaries[a].build_binary(n); } void binary_root_info::output_binary_symbols(ostream & out) { for (size_t a = 0; a < nr_binaries; ++a) binaries[a].output(out); } void binary_root_info::dump_binaries() { cverb << vxml << "" << endl; } void process_info::build_process(string const & pid, size_t l, size_t h) { process_id = pid; lo = l; hi = h; } void process_info::add_thread(string const & tid, size_t l, size_t h) { my_threads[nr_threads++].build_thread(tid, l, h); } void process_info::add_modules(string const & module, string const & app_name, sym_iterator it) { bool added = false; for (size_t t = 0; t < nr_threads; ++t) added |= my_threads[t].add_modules(module, it); if (added && name.size() == 0) name = app_name; } void process_info::summarize() { for (size_t t = 0; t < nr_threads; ++t) { thread_info & thr = my_threads[t]; thr.summarize(); add_to_summary(thr.get_summary()); } } void thread_info::build_thread(string const & tid, size_t l, size_t h) { thread_id = tid; lo = l; hi = h; } void thread_info::summarize() { for (size_t m = 0; m < nr_modules; ++m) add_to_summary(my_modules[m].get_summary()); } void thread_info::set_end(sym_iterator end) { for (size_t m = 0; m < nr_modules; ++m) my_modules[m].set_end(end); } void thread_info::add_module_symbol(string const & n, sym_iterator it) { module_info & m = my_modules[nr_modules++]; m.build_module(n, it, lo, hi); m.add_to_summary((*it)->sample.counts); } void thread_info::output(ostream & out) { ostringstream thread_summary; ostringstream modules_output; output_summary(thread_summary); for (size_t m = 0; m < nr_modules; ++m) my_modules[m].output(modules_output); // ignore threads with no sample data if (modules_output.str().size() == 0 && thread_summary.str().size() == 0) return; out << open_element(THREAD, true); out << init_attr(THREAD_ID, thread_id) << close_element(NONE, true); out << thread_summary.str(); out << modules_output.str(); out << close_element(THREAD); } bool thread_info::add_modules(string const & module, sym_iterator it) { string old_name = (nr_modules == 0 ? "" : my_modules[nr_modules-1].get_name()); if (nr_modules > 0 && old_name != module) { module_info & m = my_modules[nr_modules-1]; // close out previous module if it hasn't already been closed out if (!m.is_closed(old_name)) m.set_end(it); } // add a new module for this symbol if it has a non-zero count if (nr_modules == 0 || module != old_name) { if (has_sample_counts((*it)->sample.counts, lo, hi)) { add_module_symbol(module, it); return true; } } else { // propagate symbols count to module my_modules[nr_modules-1].add_to_summary((*it)->sample.counts); } return false; } void thread_info::dump() { cverb << vxml << "tid=" << thread_id << endl; for (size_t i = 0; i < nr_modules; ++i) my_modules[i].dump(); } void process_info::set_end(sym_iterator end) { for (size_t t = 0; t < nr_threads; ++t) my_threads[t].set_end(end); } void process_info::output(ostream & out) { ostringstream process_summary; ostringstream thread_output; output_summary(process_summary); for (size_t t = 0; t < nr_threads; ++t) my_threads[t].output(thread_output); // ignore processes with no sample data if (thread_output.str().size() == 0 && process_summary.str().size() == 0) return; out << open_element(PROCESS, true); out << init_attr(PROC_ID, process_id); out << init_attr(NAME, name) << close_element(NONE, true); out << process_summary.str(); out << thread_output.str(); out << close_element(PROCESS); } void process_info::dump() { cverb << vxml << "pid=" << process_id << " app=" << name << endl; for (size_t i = 0; i < nr_threads; ++i) my_threads[i].dump(); } size_t get_next_tgid_pclass(size_t start) { string cur_tgid = classes.v[start].ptemplate.tgid; size_t i = start; for (i = start; i < nr_classes && classes.v[i].ptemplate.tgid == cur_tgid; ++i) ; return i; } size_t get_next_tid_pclass(size_t start) { string cur_tid = classes.v[start].ptemplate.tid; size_t i; for (i = start; i < nr_classes && classes.v[i].ptemplate.tid == cur_tid; ++i) ; return i; } // build the process/thread/module hierarchy that will allow us later // to collect the summary sample data at each level and then // traverse the hierarchy to intersperse the summary data for the // symbols void build_process_tree() { size_t tgid = 0; size_t tid = 0; // build the structure representing the process/thread/module hierarchy // for holding the summary data associated with each level and to be // traversed when outputting the body of the XML do { size_t next_tgid = get_next_tgid_pclass(tgid); string const tgid_str = classes.v[tgid].ptemplate.tgid; process_info * p = processes_root.add_process(tgid_str, tgid, next_tgid-1); do { size_t next_tid = get_next_tid_pclass(tid); // build array of threads associated with this process p->add_thread(classes.v[tid].ptemplate.tid, tid, next_tid-1); tid = next_tid; } while (tid != next_tgid); tgid = next_tgid; } while (tgid != nr_classes); } void xml_utils::output_program_structure(ostream & out) { if (cverb << vxml) dump_classes(); if (has_separated_thread_info()) { build_process_tree(); processes_root.summarize_processes(extra_found_images); if (cverb << vxml) processes_root.dump_processes(); processes_root.output_process_symbols(out); } else { binaries_root.summarize_binaries(extra_found_images); if (cverb << vxml) binaries_root.dump_binaries(); binaries_root.output_binary_symbols(out); } } oprofile-1.3.0/libpp/profile_container.cpp0000664000175000017500000002104412603572700015574 00000000000000/** * @file profile_container.cpp * profile file container * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include #include #include "symbol.h" #include "op_header.h" #include "profile.h" #include "symbol_functors.h" #include "profile_container.h" #include "sample_container.h" #include "symbol_container.h" #include "cverb.h" using namespace std; namespace { struct filename_by_samples { filename_by_samples(debug_name_id id, double percent_) : filename(id), percent(percent_) {} bool operator<(filename_by_samples const & lhs) const { if (percent != lhs.percent) return percent < lhs.percent; return filename < lhs.filename; } debug_name_id filename; // ratio of samples which belongs to this filename. double percent; }; } // anon namespace profile_container::profile_container(bool debug_info_, bool need_details_, extra_images const & extra_) : symbols(new symbol_container), samples(new sample_container), debug_info(debug_info_), need_details(need_details_), extra_found_images(extra_) { } profile_container::~profile_container() { } // Post condition: // the symbols/samples are sorted by increasing vma. // the range of sample_entry inside each symbol entry are valid // the samples_by_file_loc member var is correctly setup. void profile_container::add(profile_t const & profile, op_bfd const & abfd, string const & app_name, size_t pclass) { string const image_name = abfd.get_filename(); count_type sym_count_total = 0; for (symbol_index_t i = 0; i < abfd.syms.size(); ++i) { unsigned long long start = 0, end = 0; symbol_entry symb_entry; abfd.get_symbol_range(i, start, end); profile_t::iterator_pair p_it = profile.samples_range(start, end); count_type count = accumulate(p_it.first, p_it.second, 0ull); // skip entries with no samples if (count == 0) continue; sym_count_total += count; symb_entry.sample.counts[pclass] = count; total_count[pclass] += count; symb_entry.size = end - start; symb_entry.name = symbol_names.create(abfd.syms[i].name()); symb_entry.sym_index = i; symb_entry.vma_adj = abfd.get_vma_adj(); symb_entry.sample.file_loc.linenr = 0; if (debug_info) { string filename; if (abfd.get_linenr(i, start, filename, symb_entry.sample.file_loc.linenr)) { symb_entry.sample.file_loc.filename = debug_names.create(filename); } } symb_entry.image_name = image_names.create(image_name); symb_entry.app_name = image_names.create(app_name); symb_entry.sample.vma = abfd.syms[i].vma(); symbol_entry const * symbol = symbols->insert(symb_entry); if (need_details) add_samples(abfd, i, p_it, symbol, pclass, start); } if (cverb << vdebug) { profile_t::iterator_pair summary_it = profile.samples_range(profile.get_offset(), ~0ULL); count_type module_summary_count = accumulate(summary_it.first, summary_it.second, 0ull); if (sym_count_total < module_summary_count) cout << "INFO: Sample counts differ: Module summary count: " << dec << module_summary_count << "; total symbols count: " << sym_count_total << endl << "\timage name: " << image_name << endl; else if (module_summary_count < sym_count_total) cout << "Warning: Number of samples for module unexpectedly less than total " "symbols count!" << endl << "\timage name: " << image_name << endl; } } void profile_container::add_samples(op_bfd const & abfd, symbol_index_t sym_index, profile_t::iterator_pair const & p_it, symbol_entry const * symbol, size_t pclass, unsigned long start) { bfd_vma base_vma = abfd.syms[sym_index].vma(); profile_t::const_iterator it; for (it = p_it.first; it != p_it.second ; ++it) { sample_entry sample; sample.counts[pclass] = it.count(); sample.file_loc.linenr = 0; if (debug_info) { string filename; if (abfd.get_linenr(sym_index, it.vma(), filename, sample.file_loc.linenr)) { sample.file_loc.filename = debug_names.create(filename); } } sample.vma = (it.vma() - start) + base_vma; samples->insert(symbol, sample); } } symbol_collection const profile_container::select_symbols(symbol_choice & choice) const { symbol_collection result; double const threshold = choice.threshold / 100.0; symbol_container::symbols_t::iterator it = symbols->begin(); symbol_container::symbols_t::iterator const end = symbols->end(); for (; it != end; ++it) { if (choice.match_image && (image_names.name(it->image_name) != choice.image_name)) continue; for (size_t j = 0; j < total_count.size(); j++) { double const percent = op_ratio(it->sample.counts[j], total_count[j]); if (percent >= threshold) { result.push_back(&*it); choice.hints = it->output_hint(choice.hints); break; } } } return result; } vector const profile_container::select_filename(double threshold) const { set filename_set; threshold /= 100.0; // Trying to iterate on symbols to create the set of filenames which // contain sample does not work: a symbol can contain samples and this // symbol is in a source file that contain zero sample because only // inline function in this source file contains samples. sample_container::samples_iterator sit = samples->begin(); sample_container::samples_iterator const send = samples->end(); for (; sit != send; ++sit) { debug_name_id name_id = sit->second.file_loc.filename; if (name_id.set()) filename_set.insert(name_id); } // Give a sort order on filename for the selected pclass. vector file_by_samples; set::const_iterator it = filename_set.begin(); set::const_iterator const end = filename_set.end(); for (; it != end; ++it) { // FIXME: is samples_count() the right interface now ? count_array_t counts = samples_count(*it); double highest_ratio = 0.0; for (size_t j = 0; j < total_count.size(); j++ ) { double const ratio = op_ratio(counts[j], total_count[j]); if (ratio > highest_ratio) highest_ratio = ratio; } filename_by_samples const f(*it, highest_ratio); file_by_samples.push_back(f); } // now sort the file_by_samples entry. sort(file_by_samples.begin(), file_by_samples.end()); // 2.91.66 doesn't like const_reverse_iterator in this context vector::reverse_iterator cit = file_by_samples.rbegin(); vector::reverse_iterator const cend = file_by_samples.rend(); vector result; for (; cit != cend; ++cit) { if (cit->percent >= threshold) result.push_back(cit->filename); } return result; } count_array_t profile_container::samples_count() const { return total_count; } // Rest here are delegated to our private implementation. symbol_entry const * profile_container::find_symbol(string const & image_name, bfd_vma vma) const { return symbols->find_by_vma(image_name, vma); } symbol_collection const profile_container::find_symbol(debug_name_id filename, size_t linenr) const { return symbols->find(filename, linenr); } symbol_collection const profile_container::select_symbols(debug_name_id filename) const { return symbols->find(filename); } sample_entry const * profile_container::find_sample(symbol_entry const * symbol, bfd_vma vma) const { return samples->find_by_vma(symbol, vma); } count_array_t profile_container::samples_count(debug_name_id filename_id) const { return samples->accumulate_samples(filename_id); } count_array_t profile_container::samples_count(debug_name_id filename, size_t linenr) const { return samples->accumulate_samples(filename, linenr); } sample_container::samples_iterator profile_container::begin(symbol_entry const * symbol) const { return samples->begin(symbol); } sample_container::samples_iterator profile_container::end(symbol_entry const * symbol) const { return samples->end(symbol); } sample_container::samples_iterator profile_container::begin() const { return samples->begin(); } sample_container::samples_iterator profile_container::end() const { return samples->end(); } symbol_entry const * profile_container::find(symbol_entry const & symbol) const { return symbols->find(symbol); } symbol_container::symbols_t::iterator profile_container::begin_symbol() const { return symbols->begin(); } symbol_container::symbols_t::iterator profile_container::end_symbol() const { return symbols->end(); } oprofile-1.3.0/libpp/name_storage.h0000664000175000017500000001054112534404406014203 00000000000000/** * @file name_storage.h * Type-safe unique storage of global names (filenames and symbols) * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef NAME_STORAGE_H #define NAME_STORAGE_H #include #include "unique_storage.h" class extra_images; /// store original name and processed name struct stored_name { stored_name(std::string const & n = std::string()) : name(n) {} bool operator<(stored_name const & rhs) const { return name < rhs.name; } std::string name; mutable std::string name_processed; }; /// partial specialization for unique storage of names template struct name_storage : unique_storage { typedef typename unique_storage::id_value id_value; std::string const & name(id_value const & id) const { return unique_storage::get(id).name; } }; class debug_name_tag; /// a debug filename typedef name_storage::id_value debug_name_id; /// class storing a set of shared debug name (source filename) struct debug_name_storage : name_storage { /// return the basename for the given ID std::string const & basename(debug_name_id id) const; }; /// store original name and processed name struct stored_filename { stored_filename(std::string const & n = std::string()) : filename(n), extra_images_uid(0) {} bool operator<(stored_filename const & rhs) const { return filename < rhs.filename; } std::string filename; mutable std::string base_filename; mutable std::string real_filename; mutable std::string real_base_filename; mutable int extra_images_uid; }; /// partial specialization for unique storage of filenames template struct filename_storage : unique_storage { typedef typename unique_storage::id_value id_value; std::string const & name(id_value const & id) const { return unique_storage::get(id).filename; } }; class image_name_tag; /// an image name typedef filename_storage::id_value image_name_id; /// class storing a set of shared image name struct image_name_storage : filename_storage { enum image_name_type { /// image name based on the sample filename w/o path int_basename, /// image name based on the sample filename int_filename, /// real image name, can be different for module. int_real_basename, /// same as int_real_basename + the complete path, including an /// optionnal archive_path passed trough profile_spec int_real_filename, }; /** * @param id the image name id * @param type the image name type * @param extra extra locations where the image can be found * * If type == int_real_name (resp. int_real_filename) and the image * can't be located the return value is the same as if get_name() * was called with int_name (resp. int_filename). * * multiple call with the image_name_id and different extra parameter * will throw a runtime error, multiple extra_images are possible * with differential profile but the name. FIXME */ std::string const & get_name(image_name_id id, image_name_type type, extra_images const & extra) const; /// return the basename name for the given ID std::string const & basename(image_name_id) const; }; class symbol_name_tag; /// a (demangled) symbol typedef name_storage::id_value symbol_name_id; /// class storing a set of shared symbol name struct symbol_name_storage : name_storage { /// return the demangled name for the given ID std::string const & demangle(symbol_name_id id) const; }; /// for images extern image_name_storage image_names; /// for debug filenames i.e. source filename extern debug_name_storage debug_names; /// for symbols extern symbol_name_storage symbol_names; /** * debug name specialisation for comparison. * * We compare by name rather by id since what user will see are * filename and when the criteria "samples count" give identical * result it's better to obtain result sorted by the user visible * property filename rather than by an obscure, invisible from user * point of view, file identifier property */ template<> inline bool debug_name_id::operator<(debug_name_id const & rhs) const { return debug_names.name(*this) < debug_names.name(rhs); } #endif /* !NAME_STORAGE_H */ oprofile-1.3.0/libpp/op_header.cpp0000664000175000017500000001444712534404406014031 00000000000000/** * @file op_header.cpp * various free function acting on a sample file header * * @remark Copyright 2004 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie * @Modifications Daniel Hansel */ #include #include #include #include #include #include #include #include #include #include #include #include "op_config.h" #include "op_exception.h" #include "odb.h" #include "op_cpu_type.h" #include "op_file.h" #include "op_header.h" #include "op_events.h" #include "string_manip.h" #include "format_output.h" #include "xml_utils.h" #include "cverb.h" #include "utility.h" using namespace std; extern verbose vbfd; void op_check_header(opd_header const & h1, opd_header const & h2, string const & filename) { if (h1.mtime != h2.mtime) { ostringstream os; os << "header timestamps are different (" << h1.mtime << ", " << h2.mtime << ") for " << filename << "\n"; throw op_fatal_error(os.str()); } if (h1.is_kernel != h2.is_kernel) { ostringstream os; os << "header is_kernel flags are different for " << filename << "\n"; throw op_fatal_error(os.str()); } // Note that in the generated ELF file for anonymous code the vma // of the symbol is exaclty the same vma as the code had during sampling. // Note that we don't check CPU speed since that can vary // freely on the same machine } namespace { set warned_files; } bool is_jit_sample(string const & filename) { // suffix for JIT sample files (see FIXME in check_mtime() below) string suf = ".jo"; string::size_type pos; pos = filename.rfind(suf); // for JIT sample files do not output the warning to stderr. if (pos != string::npos && pos == filename.size() - suf.size()) return true; else return false; } void check_mtime(string const & file, opd_header const & header) { u64 newmtime = op_get_mtime(file.c_str()); if (strncmp(file.c_str(), KALL_SYM_FILE, strlen(file.c_str())) == 0) /* The /proc/kallsyms file isn't a real file. It * is generated when read. The time comparison doesn't * really apply here as we are not using a real bfd file. */ return; if (newmtime == header.mtime) return; if (warned_files.find(file) != warned_files.end()) return; warned_files.insert(file); // Files we couldn't get mtime of have zero mtime if (!header.mtime) { // FIXME: header.mtime for JIT sample files is 0. The problem could be that // in opd_mangling.c:opd_open_sample_file() the call of fill_header() // think that the JIT sample file is not a binary file. if (is_jit_sample(file)) { cverb << vbfd << "warning: could not check that the binary file " << file << " has not been modified since " "the profile was taken. Results may be inaccurate.\n"; } else { cerr << "warning: could not check that the binary file " << file << " has not been modified since " "the profile was taken. Results may be inaccurate.\n"; } } else { static bool warned_already = false; cerr << "warning: the last modified time of the binary file " "does not match that of the sample file for " << file << "\n"; if (!warned_already) { cerr << "Either this is the wrong binary or the binary " "has been modified since the sample file was created.\n"; warned_already = true; } } } opd_header const read_header(string const & sample_filename) { int fd = open(sample_filename.c_str(), O_RDONLY); if (fd < 0) throw op_fatal_error("Can't open sample file:" + sample_filename); opd_header header; if (read(fd, &header, sizeof(header)) != sizeof(header)) { close(fd); throw op_fatal_error("Can't read sample file header:" + sample_filename); } if (memcmp(header.magic, OPD_MAGIC, sizeof(header.magic))) { close(fd); throw op_fatal_error("Invalid sample file, " "bad magic number: " + sample_filename); } close(fd); return header; } namespace { string const op_print_event(op_cpu cpu_type, u32 type, u32 um, u32 count) { string str; if (cpu_type == CPU_TIMER_INT) { str += "Profiling through timer interrupt"; return str; } struct op_event * event = op_find_event(cpu_type, type, um); if (!event) { event = op_find_event_any(cpu_type, type); if (!event) { cerr << "Could not locate event " << int(type) << endl; str = "Unknown event"; return str; } } char const * um_desc = 0; for (size_t i = 0; i < event->unit->num; ++i) { if (event->unit->um[i].value == um) um_desc = event->unit->um[i].desc; } str += string("Counted ") + event->name; str += string(" events (") + event->desc + ")"; str += " with a unit mask of 0x"; ostringstream ss; ss << hex << setw(2) << setfill('0') << unsigned(um); str += ss.str(); str += " ("; str += um_desc ? um_desc : "multiple flags"; str += ")"; str += " count " + op_lexical_cast(count); return str; } string const op_xml_print_event(op_cpu cpu_type, u32 type, u32 um, u32 count) { string unit_mask; if (cpu_type == CPU_TIMER_INT) return xml_utils::get_timer_setup((size_t)count); struct op_event * event = op_find_event(cpu_type, type, um); if (!event) { event = op_find_event_any(cpu_type, type); if (!event) { cerr << "Could not locate event " << int(type) << endl; return ""; } } ostringstream str_out; str_out << um; unit_mask = str_out.str(); return xml_utils::get_event_setup(string(event->name), (size_t)count, unit_mask); } } string const describe_header(opd_header const & header) { op_cpu cpu = static_cast(header.cpu_type); if (want_xml) return op_xml_print_event(cpu, header.ctr_event, header.ctr_um, header.ctr_count); else return op_print_event(cpu, header.ctr_event, header.ctr_um, header.ctr_count); } string const describe_cpu(opd_header const & header) { op_cpu cpu = static_cast(header.cpu_type); string str; if (want_xml) { string cpu_name = op_get_cpu_name(cpu); str = xml_utils::get_profile_header(cpu_name, header.cpu_speed); } else { str += string("CPU: ") + op_get_cpu_type_str(cpu); if (header.cpu_speed > 0) { ostringstream ss; str += ", speed "; ss << header.cpu_speed; str += ss.str() + " MHz (estimated)"; } } return str; } oprofile-1.3.0/libpp/locate_images.cpp0000664000175000017500000001204612534404406014670 00000000000000/** * @file locate_images.cpp * Command-line helper * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "file_manip.h" #include "locate_images.h" #include "string_manip.h" #include #include #include #include using namespace std; int extra_images::suid; extra_images::extra_images() : uid(++suid) { } void extra_images::populate(vector const & paths, string const & prefix_path) { vector::const_iterator cit = paths.begin(); vector::const_iterator end = paths.end(); for (; cit != end; ++cit) { string const path = op_realpath(prefix_path + *cit); list file_list; create_file_list(file_list, path, "*", true); list::const_iterator lit = file_list.begin(); list::const_iterator lend = file_list.end(); for (; lit != lend; ++lit) { value_type v(op_basename(*lit), op_dirname(*lit)); images.insert(v); } } } void extra_images::populate(vector const & paths, string const & archive_path_, string const & root_path_) { archive_path = archive_path_; if (!archive_path.empty()) archive_path = op_realpath(archive_path); root_path = op_realpath(root_path_); if (!root_path.empty()) root_path = op_realpath(root_path); if (root_path.empty() && archive_path.empty()) populate(paths, ""); if (!archive_path.empty()) populate(paths, archive_path); if (!root_path.empty() && root_path != archive_path) populate(paths, root_path); } vector const extra_images::find(string const & name) const { extra_images::matcher match(name); return find(match); } vector const extra_images::find(extra_images::matcher const & match) const { vector matches; const_iterator cit = images.begin(); const_iterator end = images.end(); for (; cit != end; ++cit) { if (match(cit->first)) matches.push_back(cit->second + '/' + cit->first); } return matches; } namespace { /** * Function object for matching a module filename, which * has its own special mangling rules in 2.6 kernels. */ struct module_matcher : public extra_images::matcher { public: explicit module_matcher(string const & s) : extra_images::matcher(s) {} virtual bool operator()(string const & candidate) const { if (candidate.length() != value.length()) return false; for (string::size_type i = 0 ; i < value.length() ; ++i) { if (value[i] == candidate[i]) continue; if (value[i] == '_' && (candidate[i] == ',' || candidate[i] == '-')) continue; return false; } return true; } }; } // anon namespace string const extra_images::locate_image(string const & image_name, image_error & error, bool fixup) const { // Skip search since root_path can be non empty and we want // to lookup only in root_path in this case. if (!archive_path.empty()) { string image = op_realpath(archive_path + image_name); if (op_file_readable(image)) { error = image_ok; return fixup ? image : image_name; } if (errno == EACCES) { error = image_unreadable; return image_name; } } // We catch a case where root_path.empty() since we skipped a // search in "/" above when archive_path is empty. The case where // root_path.empty() && archive_path.empty() is the normal one, none // of --root or archive: as been given on command line. if (!root_path.empty() || archive_path.empty()) { string image = op_realpath(root_path + image_name); if (op_file_readable(image)) { error = image_ok; return fixup ? image : image_name; } } error = image_not_found; return image_name; } string const extra_images::find_image_path(string const & image_name, image_error & error, bool fixup) const { error = image_ok; string const image = locate_image(image_name, error, fixup); if (error != image_not_found) return image; string const base = op_basename(image); vector result = find(base); // not found, try a module search if (result.empty()) result = find(module_matcher(base + ".ko")); if (result.empty()) { error = image_not_found; return image_name; } if (result.size() == 1) { error = image_ok; return fixup ? result[0] : image_name; } // We can't get multiple result except if only one result is prefixed // by archive_path or by root_path. size_t count = 0; size_t index = 0; for (size_t i = 0; i < result.size() && count < 2; ++i) { if (is_prefix(result[i], archive_path)) { index = i; ++count; } } if (count == 0) { for (size_t i = 0; i < result.size() && count < 2; ++i) { if (is_prefix(result[i], root_path)) { index = i; ++count; } } } if (count == 1) { error = image_ok; return fixup ? result[index] : image_name; } error = image_multiple_match; return image_name; } string extra_images::strip_path_prefix(string const & image) const { if (archive_path.length() && is_prefix(image, archive_path)) return image.substr(archive_path.size()); if (root_path.length() && is_prefix(image, root_path)) return image.substr(root_path.size()); return image; } oprofile-1.3.0/libpp/symbol_sort.cpp0000664000175000017500000001044712534404406014453 00000000000000/** * @file symbol_sort.cpp * Sorting symbols * * @remark Copyright 2002, 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "symbol_sort.h" #include "symbol_functors.h" #include "name_storage.h" #include "op_exception.h" #include #include using namespace std; namespace { bool long_filenames; int image_compare(image_name_id l, image_name_id r) { if (long_filenames) return image_names.name(l).compare(image_names.name(r)); return image_names.basename(l).compare(image_names.basename(r)); } int debug_compare(debug_name_id l, debug_name_id r) { if (long_filenames) return debug_names.name(l).compare(debug_names.name(r)); return debug_names.basename(l).compare(debug_names.basename(r)); } int compare_by(sort_options::sort_order order, symbol_entry const & lhs, symbol_entry const & rhs) { switch (order) { case sort_options::sample: if (lhs.sample.counts[0] < rhs.sample.counts[0]) return 1; if (lhs.sample.counts[0] > rhs.sample.counts[0]) return -1; return 0; case sort_options::symbol: return symbol_names.demangle(lhs.name).compare( symbol_names.demangle(rhs.name)); case sort_options::image: return image_compare(lhs.image_name, rhs.image_name); case sort_options::app_name: return image_compare(lhs.app_name, rhs.app_name); case sort_options::vma: if (lhs.sample.vma < rhs.sample.vma) return -1; if (lhs.sample.vma > rhs.sample.vma) return 1; return 0; case sort_options::debug: { file_location const & f1 = lhs.sample.file_loc; file_location const & f2 = rhs.sample.file_loc; int ret = debug_compare(f1.filename, f2.filename); if (ret == 0) ret = f1.linenr - f2.linenr; return ret; } default: { // static_cast<> to shut up g++ 2.91.66 which warn // about ambiguity between <<(int) and <<(long int) ostringstream os; os << "compare_by(): unknown sort option: " << static_cast(order) << endl; throw op_fatal_error(os.str()); } } return 0; } struct symbol_compare { symbol_compare(vector const & order, bool reverse) : compare_order(order), reverse_sort(reverse) {} bool operator()(symbol_entry const * lhs, symbol_entry const * rhs) const { return operator()(*lhs, *rhs); } bool operator()(symbol_entry const & lhs, symbol_entry const & rhs) const; protected: vector const & compare_order; bool reverse_sort; }; bool symbol_compare::operator()(symbol_entry const & lhs, symbol_entry const & rhs) const { for (size_t i = 0; i < compare_order.size(); ++i) { int ret = compare_by(compare_order[i], lhs, rhs); if (reverse_sort) ret = -ret; if (ret != 0) return ret < 0; } return false; } } // anonymous namespace void sort_options:: sort(symbol_collection & syms, bool reverse_sort, bool lf) const { long_filenames = lf; vector sort_option(options); for (sort_order cur = first; cur != last; cur = sort_order(cur + 1)) { if (find(sort_option.begin(), sort_option.end(), cur) == sort_option.end()) sort_option.push_back(cur); } stable_sort(syms.begin(), syms.end(), symbol_compare(sort_option, reverse_sort)); } void sort_options:: sort(diff_collection & syms, bool reverse_sort, bool lf) const { long_filenames = lf; vector sort_option(options); for (sort_order cur = first; cur != last; cur = sort_order(cur + 1)) { if (find(sort_option.begin(), sort_option.end(), cur) == sort_option.end()) sort_option.push_back(cur); } stable_sort(syms.begin(), syms.end(), symbol_compare(sort_option, reverse_sort)); } void sort_options::add_sort_option(string const & name) { if (name == "vma") { options.push_back(vma); } else if (name == "sample") { options.push_back(sample); } else if (name == "symbol") { options.push_back(symbol); } else if (name == "debug") { options.push_back(debug); } else if (name == "image") { options.push_back(image); } else if (name == "app-name") { options.push_back(app_name); } else { ostringstream os; os << "unknown sort option: " << name << endl; throw op_fatal_error(os.str()); } } void sort_options::add_sort_option(sort_options::sort_order order) { options.push_back(order); } oprofile-1.3.0/libpp/symbol_functors.cpp0000664000175000017500000000122612534404406015322 00000000000000/** * @file symbol_functors.cpp * Functors for symbol/sample comparison * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "symbol_functors.h" bool less_symbol::operator()(symbol_entry const & lhs, symbol_entry const & rhs) const { if (lhs.image_name != rhs.image_name) return lhs.image_name < rhs.image_name; if (lhs.app_name != rhs.app_name) return lhs.app_name < rhs.app_name; if (lhs.name != rhs.name) return lhs.name < rhs.name; if (lhs.sample.vma != rhs.sample.vma) return lhs.sample.vma < rhs.sample.vma; return lhs.size < rhs.size; } oprofile-1.3.0/libpp/image_errors.h0000664000175000017500000000201312534404406014210 00000000000000/** * @file image_errors.h * Report errors in images * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #ifndef IMAGE_ERRORS_H #define IMAGE_ERRORS_H #include #include class inverted_profile; class extra_images; /// possible reasons why we can't read a binary image enum image_error { image_ok = 0, image_not_found, image_unreadable, image_format_failure, image_multiple_match }; /// output why the image passed can't be read to stderr, we warranty only one /// error report by image name. void report_image_error(std::string const & image, image_error error, bool fatal, extra_images const & extra); /// output why the image passed can't be read to stderr void report_image_error(inverted_profile const & profile, bool fatal, extra_images const & extra); /// output why any bad images can't be read to stderr void report_image_errors(std::list const & plist, extra_images const & extra); #endif /* IMAGE_ERRORS_H */ oprofile-1.3.0/libpp/image_errors.cpp0000664000175000017500000000360512534404406014553 00000000000000/** * @file image_errors.cpp * Report errors in images * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #include "image_errors.h" #include "arrange_profiles.h" #include "string_manip.h" #include "locate_images.h" #include #include using namespace std; namespace { set reported_images_error; } void report_image_error(string const & image, image_error error, bool fatal, extra_images const & extra) { if (error == image_ok) return; string image_name = extra.get_archive_path() + image; if (reported_images_error.find(image_name) == reported_images_error.end()) { reported_images_error.insert(image_name); // FIXME: hacky if (error == image_not_found && (is_prefix(image, "anon ") || image == "/no-vmlinux" || is_prefix(image, "[vdso]") || is_prefix(image, "[hypervisor_bucket]"))) { return; } cerr << (fatal ? "error: " : "warning: "); cerr << image_name << ' '; switch (error) { case image_not_found: cerr << "could not be found.\n"; break; case image_unreadable: cerr << "could not be read.\n"; break; case image_multiple_match: cerr << "matches more than one file: " "detailed profile will not be provided.\n"; break; case image_format_failure: cerr << "is not in a usable binary format.\n"; break; case image_ok: break; } } } void report_image_error(inverted_profile const & profile, bool fatal, extra_images const & extra) { report_image_error(profile.image, profile.error, fatal, extra); } void report_image_errors(list const & plist, extra_images const & extra) { list::const_iterator it = plist.begin(); list::const_iterator const end = plist.end(); for (; it != end; ++it) report_image_error(*it, false, extra); } oprofile-1.3.0/ChangeLog-20030000664000175000017500000051641512534404406012427 000000000000002003-12-29 Philippe Elie * configure.in: my_op_prefix is not necessarily suffixed by a '/' 2003-12-29 John Levon * configure.in: * doc/*.1.in: add HTML docs to SEE ALSO 2003-12-29 John Levon * doc/opcontrol.1.in: * doc/oprofile.xml: minor language cleanups * utils/opcontrol: only allow --verbose when it makes sense 2003-12-28 Philippe Elie * libutil++/tests/file_manip_tests.cpp: ensure filename passed to op_realpath() exists 2003-12-28 John Levon * doc/internals.xml: * libutil++/file_manip.h: fix typos 2003-12-16 Philippe Elie * utils/opcontrol: error message rewording 2003-12-16 Carlo Wood * libregex/tests/Makefile.am: avoid to install mangled-name test file 2003-11-20 John Levon * libregex/op_regex.cpp: move global ctor out of namespace anon (bug #845616) 2003-11-19 Philippe Elie * libpp/arrange_profiles.cpp: merge all unit mask before generating event description string 2003-11-17 Philippe Elie * libpp/arrange_profiles.cpp: put unitmask in the same axis as event:count, meaning than unitmask is now a part of the event specification. 2003-12-19 Philippe Elie * daemon/opd_sfile.c: we reversed to/from pc in call graph sample 2003-11-23 Philippe Elie * libpp/profile.h: * pp/opgprof.cpp: oops a simplify a bit too cg handling in my last patch, it was segfaulting each time no cg file was found... 2003-11-15 Philippe Elie * pp/opgprof.cpp: simplify a bit cg handling, we don't need to know if we retrieved some cg files since the profile_t will be empty in this case 2003-11-15 Philippe Elie * libpp/profile.h: iterator::vma() must return the full key not only an unsigned int. * pp/opgprof.cpp: implement merging of cg files. 2003-11-15 Philippe Elie * libpp/profile_spec.cpp: * libpp/profile_spec.h: * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: * pp/opreport_options.cpp: filter call graph samples files 2003-11-14 Philippe Elie * daemon/opd_mangling.c: oops, it's better to really open the cg file * daemon/opd_sfile.c: * daemon/opd_stats.c: * daemon/opd_stats.h: * daemon/liblegacy/opd_24_stats.c: * daemon/liblegacy/opd_24_stats.h: * daemon/liblegacy/opd_proc.c: log sample lost due to sample file open failure 2003-11-15 Philippe Elie * daemon/liblegacy/opd_parse_proc.c: always provide an image name for parsed process in /proc 2003-11-15 Philippe Elie * doc/oprofile.xml: * libop/op_cpu_type.c: s/hammer/AMD64 processors/ for user visible name. 2003-11-13 John Levon * libutil/op_file.h: * libutil/op_file.c: remove op_c_dirname(), op_relative_to_absolute_path(), op_is_directory(), op_follow_link(), in favour of using realpath(3) * libutil/tests/file_tests.c: fixes for above changes * libutil++/file_manip.h: * libutil++/file_manip.cpp: changes from above. Add op_realpath(). * libutil++/tests/file_manip_tests.cpp: changes from above. * daemon/oprofiled.c: * daemon/liblegacy/opd_parse_proc.c: * gui/oprof_start_util.cpp: * libpp/locate_images.cpp: * libpp/profile_spec.cpp: * pp/opannotate.cpp: changes from above 2003-11-12 John Levon * configure.in: bump to 0.8cvs 2003-11-11 John Levon * configure.in: bump to 0.7.1 2003-11-11 Joseph VanAndel * daemon/liblegacy/init.c: fix #840046 (segfault when starting profiler with --no-vmlinux setup), this bug was present in 0.7.0. 2003-11-11 Philippe Elie * libpp/profile_spec.cpp: more precise error message * libutil++/tests/file_manip_tests.cpp: corner case test added for dirname 2003-11-11 Philippe Elie * libpp/arrange_profiles.cpp: report_error() shows only distinct conflicting name. 2003-11-10 Philippe Elie * doc/opcontrol.1.in: reverse kernel:user in event setting description. Fix #838968 2003-11-09 Philippe Elie * daemon/init.c: * daemon/liblegacy/init.c: move opd_read_fs_int ... * daemon/oprofiled.h: * daemon/oprofiled.c: here * daemon/liblegacy/opd_24_stats.c: dump kernel note buffer overflow and buffer overlow 2003-11-09 Philippe Elie * utils/op_help.c: do not use OP_MAX_COUNTERS but get counter number at runtime 2003-11-09 Philippe Elie * libutil++/tests/string_manip_tests.cpp: rtrim/ltrim/trim tests 2003-11-08 Philippe Elie * libop/tests/Makefile.am: * libop/tests/mangle_tests.c: new tests: sample filename mangling 2003-11-08 Philippe Elie * module/x86/op_syscalls.c: fix build with 2.2 kernel 2003-11-06 Philippe Elie * Makefile.am: use .PHONY for module goal to not statisfy this goal with the subdir named module * m4/findkernel.m4: minor fix. 2003-11-06 John Levon * Makefile.am: minor cleanup 2003-11-06 John Levon * gui/Makefile.am: remove unused -DKVERSION 2003-11-06 John Levon * configure.in: add --disable-werror and --disable-optimization * doc/oprofile.xml: document above. Remove docs for * --enable-gcov (only useful to developers) 2003-11-06 Philippe Elie * daemon/opd_kernel.c: * daemon/liblegacy/opd_kernel.c: be less paranoid about kernel range, this is slightly different than the patch Thomas Spatzier tested but it can't hurt (famous last words ...). This fixes s390x where kernel start can be zero and was rejected. 2003-11-06 Thomas Spatzier * daemon/opd_cookie.c: changed an #if defined for selecting right system call for IBM s390 or s390x, respectively 2003-11-04 Philippe Elie * libutil++/path_filter.cpp: remove 2 identical FIXME * libutil++/tests/file_manip_tests.cpp: * libutil++/tests/path_filter_tests.cpp: reflect the behavior by new tests 2003-11-04 Philippe Elie * libdb/db_manage.c: * libop/op_events.h: -pedantic fix 2003-11-04 Philippe Elie * daemon/opd_sfile.c: * daemon/liblegacy/opd_kernel.c: * libutil/op_cpufreq.c: * libutil/op_file.c: a few s/goto/break/ * libpp/format_output.cpp: padding never used after initialization 2003-11-04 Philippe Elie * libutil++/comma_list.h: don't accept cumulative behavior * libutil++/string_manip.cpp: separate_token() return by value * gui/oprof_start.cpp: * libopt++/popt_options.cpp: * libpp/parse_filename.cpp: * libpp/profile_spec.cpp: * libutil++/comma_list.h: * libutil++/string_filter.cpp: * libutil++/string_manip.cpp: * libutil++/string_manip.h: * libutil++/tests/comma_list_tests.cpp: * libutil++/tests/string_manip_tests.cpp: update according * libpp/profile_spec.cpp: remove all trace of defunct op_alias 2003-11-04 Philippe Elie * daemon/liblegacy/opd_image.c: * daemon/liblegacy/opd_image.h: * daemon/liblegacy/opd_mapping.c: * daemon/liblegacy/opd_mapping.h: * daemon/liblegacy/opd_proc.c: * gui/oprof_start.cpp: * gui/oprof_start.h: * gui/oprof_start_config.cpp: * gui/oprof_start_util.cpp: * libop/op_config_24.h: * libpp/format_output.cpp: * libpp/op_header.cpp: * libpp/profile.h: * libpp/profile_container.cpp: * libpp/profile_spec.cpp: * libpp/profile_spec.h: * libpp/symbol.h: * libpp/symbol_sort.cpp: * libutil++/stream_util.cpp: * libutil++/stream_util.h: * libutil++/utility.h: * pp/common_option.cpp: * pp/common_option.h: * pp/opannotate_options.h: * pp/opgprof.cpp: * pp/opgprof_options.cpp: * pp/opgprof_options.h: * pp/opreport_options.cpp: * pp/opreport_options.h: * pp/populate.cpp: remove some .h dependencies 2003-11-03 Philippe Elie * libutil++/tests/Makefile.am: * libutil++/tests/utility_tests.cpp: new test files convering most of utility.h and op_exception.h 2003-11-02 Philippe Elie * libpp/parse_filename.cpp: avoid repetitive vector::erase(v.begin()) * libregex/stl.pat.in: * libregex/tests/mangled-name.in: add (i|o)stream operator(>>|<<) 2003-11-02 Philippe Elie * daemon/liblegacy/opd_image.h: * daemon/liblegacy/opd_image.c: * daemon/liblegacy/opd_proc.c: * daemon/liblegacy/opd_sample_files.c: sparse sample file array allocated by line. 2003-11-02 Philippe Elie * libutil++/glob_filter.h: * libutil++/path_filter.h: * libutil++/string_filter.h: comment fix to match implementation * libutil++/tests/path_filter_tests.cpp: new file test * libutil++/tests/Makefile.am: upate build * libutil++/tests/string_filter_tests.cpp: test white space at start of pattern 2003-11-02 Philippe Elie * libutil++/string_manip.cpp: format_double can only format percent * libutil++/string_manip.h: * libpp/format_output.cpp: * libutil++/tests/string_manip_tests.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: s/format_double/format_percent/ 2003-11-02 Philippe Elie * libutil++/glob_filter.h: * libutil++/string_filter.h: * libutil++/tests/string_filter_tests.cpp: minor tidy * libutil++/tests/glob_filter_tests.cpp: new file * libutil++/tests/Makefile.am: update build 2003-11-01 Philippe Elie * libpp/arrange_profiles.cpp: typo * libutil++/generic_spec.cpp: removed file * libutil++/Makefile.am: update according * libutil++/generic_spec.h: ensure generic_spec will not link * libutil++/path_filter.cpp: minor tidy 2003-11-01 Philippe Elie * libutil++/tests/string_manip_tests.cpp: ehance output on failure * module/oprofile.h: * module/oprofile.c: two new read-only sysctl: nr_buffer_overflow and nr_note_buffer_overflow 2003-11-01 Philippe Elie * libutil++/tests/Makefile.am: * libutil++/tests/file_manip_tests.cpp: don't use getcwd nor __FILE__ but ${topdir} and hard coded filename 2003-11-01 John Levon * daemon/liblegacy/opd_parse_proc.c: use op_follow_link * libutil/op_file.c: * libutil/op_file.h: make op_get_link() static, rename op_basename to op_c_basename * libutil++/file_manip.cpp: * libutil++/file_manip.h: rename to op_basename()/op_dirname(). Use op_follow_link() for follow_link(). * libutil++/tests/file_manip_tests.cpp: * gui/oprof_start_util.cpp: * libpp/locate_images.cpp: * libpp/name_storage.cpp: * libutil++/path_filter.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: fixup from above changes 2003-11-01 Philippe Elie * libutil++/op_bfd.h: has_debug_info() new member * pp/populate.h: * pp/populate.cpp: * pp/opannotate.cpp: use it to error out when --assembly is not requested and no debug information exists 2003-10-31 Philippe Elie * pp/common_option.cpp: don't exit() if merge_by.lib is set through !allow_lib 2003-10-31 Philippe Elie * pp/opreport_options.cpp: move handle_merge_option() ... * pp/common_option.h: * pp/common_option.cpp: here * pp/opannotate_options.cpp: use it but disallow --merge=lib 2003-10-31 Philippe Elie * libutil/op_file.c: * libutil/op_file.h: implement dirname(), is_directory() and op_follow_link() * daemon/oprofiled.c: follow symlink for image filter * libutil++/file_manip.cpp: * libutil++/file_manip.h: * gui/oprof_start_util.cpp: * libpp/profile_spec.cpp: rename op_follow_link() to follow_link() 2003-10-31 Philippe Elie * libutil/tests/file_tests.c: "//usr" --> "//usr" * libutil++/tests/.cvsignore: * libutil++/tests/Makefile.am: * libutil++/tests/file_manip_tests.cpp: new tests file. 2003-10-31 John Levon * daemon/opd_perfmon.c: fix compilation 2003-10-30 John Levon * libpp/profile_spec.cpp: introduce a helper function to make the comma_list matching clear 2003-10-30 Philippe Elie * libutil++/comma_list.h: is_set() new member * libpp/profile_spec.cpp: fix matching logic for cpu/tid/tgid 2003-10-30 John Levon * libutil++/generic_spec.h: add value() and is_set(), remove bool parameter from T value match() (it was never set to true) * libutil++/comma_list.h: do not accept generic_spec, the behaviour was to implicitly not match an "all" generic_spec. Instead: * libpp/profile_spec.cpp: encode the matching behaviour explicitly, and add a comment. * libutil++/tests/comma_list_tests.cpp: fix to match the above 2003-10-30 John Levon * Makefile.am: re-order build subdirs * libabi/Makefile.am: only build abitest on make check * pp/Makefile.am: pp_common not pp_commons 2003-10-30 John Levon * libutil++/tests/Makefile.am: * libutil++/tests/comma_list_tests.cpp: Add. 2003-10-30 John Levon * doc/Makefile.am: improve chunk rules 2003-10-30 John Levon * libutil++/tests/Makefile.am: * libutil++/tests/string_filter_tests.cpp: Add. * libutil++/tests/string_manip_tests.cpp: fix header include 2003-10-30 John Levon * libutil++/tests/string_manip_tests.cpp: fix tobool test ("33" is not castable to bool) 2003-10-30 Philippe Elie * libutil++/string_manip.cpp: * libutil++/string_manip.h: remove tostr()/tobool/touint(), rename lexical_cast_no_ws<> to op_lexical_cast<> * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * libpp/arrange_profiles.cpp: * libpp/filename_spec.cpp: * libpp/op_header.cpp: * libutil++/comma_list.h: * libutil++/generic_spec.h: * libutil++/tests/string_manip_tests.cpp: use op_lexical_cast<> 2003-10-29 John Levon * pp/common_option.h: use std namespace 2003-10-28 Jason Lunz * doc/oprofile.1.in: document cpu,tid,tgid in profile spec 2003-10-29 Philippe Elie * libpp/profile_spec.cpp: error out for all tag:value specified more than once. 2003-10-29 Philippe Elie * doc/opannotate.1.in: * doc/opreport.1.in: * doc/oprofile.xml: * libregex/demangle_symbol.cpp: * libregex/demangle_symbol.h: * pp/common_option.cpp: * pp/common_option.h: * pp/opannotate_options.cpp: * pp/opannotate_options.h: * pp/opreport_options.cpp: * pp/opreport_options.h: remove --no-demangle, --smart-demangle and --demangle, replace them with --demangle=none|smart|normal 2003-10-29 Philippe Elie * libutil++/tests: new directory * libutil++/tests/string_manip_tests.cpp: new tests file * configure.in: * libutil++/Makefile.am: * libutil++/tests/.cvsignore: * libutil++/tests/Makefile.am: handle new test * libutil++/string_manip.h: * libutil++/string_manip.cpp: correct implementation of separate_token to match the documentation * daemon/liblegacy/opd_image.c: fix comment 2003-10-28 Philippe Elie * libpp/count_array.cpp: * libpp/count_array.h: * libpp/locate_images.h: * libpp/parse_filename.cpp: * libpp/profile.cpp: * libpp/profile.h: * libpp/profile_spec.cpp: * libpp/symbol_sort.cpp: minor tidy 2003-10-28 Jason Lunz * doc/opcontrol.1.in: better wording for --separate= * doc/oprofile.1.in: typo 2003-10-28 Philippe Elie * daemon/liblegacy/init.c: * daemon/liblegacy/opd_24_stats.c: * daemon/liblegacy/opd_24_stats.h: * daemon/liblegacy/opd_image.c: * daemon/liblegacy/opd_image.h: * daemon/liblegacy/opd_kernel.c: * daemon/liblegacy/opd_kernel.h: * daemon/liblegacy/opd_mapping.c: * daemon/liblegacy/opd_mapping.h: * daemon/liblegacy/opd_parse_proc.c: * daemon/liblegacy/opd_parse_proc.h: * daemon/liblegacy/opd_proc.c: * daemon/liblegacy/opd_proc.h: * daemon/liblegacy/opd_sample_files.c: * daemon/liblegacy/opd_sample_files.h: move doygen comment from *.c to *.h. Add some doxygen comment. 2003-10-27 Philippe Elie * daemon/liblegacy/opd_24_stats.c: * daemon/liblegacy/opd_image.h: * daemon/liblegacy/opd_image.h: nr_images static 2003-10-27 John Levon * doc/opcontrol.1.in: document --image= * doc/oprofile.xml: * utils/opcontrol: make user specify "--image=all" to reset. Clean up help message. Ensure note table size is given a value. Add '-t' for '--stop', and '-i' for '--image'. 2003-10-27 John Levon * doc/oprofile.xml: document opcontrol --image= 2003-10-27 John Levon * daemon/opd_events.h: * daemon/opd_events.c: move code for handling event descriptions here, and share find_counter_event(), plus fill_header() * daemon/opd_mangling.c: * daemon/opd_perfmon.c: * daemon/oprofiled.c: * daemon/oprofiled.h: * daemon/liblegacy/opd_proc.c: * daemon/liblegacy/opd_sample_files.c: changes from above 2003-10-27 John Levon * daemon/oprofiled.c: fix help text * daemon/liblegacy/init.c: * daemon/liblegacy/opd_proc.h: * daemon/liblegacy/opd_proc.c: clean up headers a bit 2003-10-27 Philippe Elie * gui/oprof_start.cpp: check we can get kernel interface 2003-10-27 John Levon * daemon/liblegacy/Makefile.am: remove unneeded -I for abi 2003-10-27 John Levon * daemon/init.c: * daemon/opd_perfmon.c: move timer interrupt checks into perfmon 2003-10-27 John Levon * daemon/oprofiled.c: use op_get_interface() * libop/op_get_interface.c: simplify 2003-10-26 Philippe Elie * gui/ui/oprof_start.base.ui: * gui/oprof_start.cpp: * gui/oprof_start.h: check separate_lib checkbox when separate_kernel_cb is checked 2003-10-26 Philippe Elie * utils/opcontrol: allow to reset --image through empty --image= or --image 2003-10-26 John Levon * daemon/opd_cookie.c: reduce the hash table size somewhat * various: fixes for doxygen 2003-10-26 John Levon * HACKING: * configure.in: * Makefile.am: * dae/: move all of 2.4 daemon code to ... * daemon/liblegacy/: here * daemon/Makefile.am: * daemon/opd_util.h: * daemon/opd_util.c: move to ... * daemon/oprofiled.h: * daemon/oprofiled.c: here, and call the right operations depending upon oprofile kernel version. * daemon/init.c: * daemon/liblegacy/init.c: init and running for each version 2003-10-26 John Levon * daemon/opd_cookie.c: make sure to create the cookie for the ignore value if it's not found * daemon/opd_sfile.c: simplify ignored logic 2003-10-26 John Levon * doc/internals.xml: * doc/buffers.png: add a diagram 2003-10-26 Philippe Elie implement image filtering: * dae/opd_image.h: add a field filtered * dae/opd_image.c: set it at image creation * dae/opd_proc.c: don't record sample when !image->filtered * daemon/opd_cookie.h: add a field filtered * daemon/opd_cookie.c: set it a cookie_entry creation. * daemon/opd_sfile.h: add a field filtered * daemon/opd_file.c: set it a opd_sfile struct creation * daemon/opd_trans.c: record sample if filtered * daemon/opd_util.h: export opd_hash_name(), is_image_filtered() * daemon/opd_util.c: implement --image=xxx * oprofiled.c: #include "config.h" not <> * utils/opcontrol: handle --image 2003-10-26 John Levon * doc/oprofile.xml: remove some outdated stuff 2003-10-25 John Levon * doc/internals.xml: more docs 2003-10-25 John Levon * daemon/opd_perfmon.c: cleanups 2003-10-24 John Levon * doc/internals.xml: write some more 2003-10-23 John Levon * configure.in: bump to 0.7.1cvs 2003-10-22 John Levon * libop/tests/Makefile.am: * libop/tests/load_events_files_tests.c: * libop/tests/alloc_counter_tests.c: fix make distcheck * configure.in: bump to 0.7 2003-10-22 John Levon * daemon/Makefile.am: * daemon/opd_perfmon.h: * daemon/opd_perfmon.c: re-enable. Wait for children. More safety checking. * daemon/oprofiled.c: only use perfmon if !timer 2003-10-20 Philippe Elie * doc/oprofile.xml: * doc/oprofile.1.in: s/physical CPU/CPU/ 2003-10-20 John Levon * daemon/Makefile.am: * daemon/opd_perfmon.h: disable perfmon nicely * gui/oprof_start.cpp: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: * gui/ui/oprof_start.base.ui: Fix reading of separate parameters. Add CPU and thread separation 2003-10-20 Philippe Elie * libpp/profile_spec.cpp: relative path are relative to current dir not filename. 2003-10-20 John Levon * doc/oprofile.xml: * doc/opreport.1.in: fix --merge docs and profile specs 2003-10-20 John Levon * dae/opd_sample_files.c: * daemon/opd_mangling.c: * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libop/op_config.h: * libop/op_sample_file.h: * libpp/op_header.cpp: remove ctr and separate_* from header. Re-arrange it a little, and make it 64 bytes on ILP32. Bump the version. 2003-10-20 John Levon * libpp/arrange_profiles.cpp: rework the clashing-axes error message to be nicer to the user 2003-10-20 John Levon * libpp/arrange_profiles.cpp: if tid == tgid for every profile class, allow axes of both TID and TGID - there is no actual difference, only theoretical 2003-10-20 Philippe Elie * dae/oprofiled.c: correct an error message * libop/op_alloc_counter.h: remove bogus FIXME * libutil++/child_reader.cpp: avoid quadratic behaviour if child does a lot of output in stderr * libpp/opgprof.cpp: fix comment 2003-10-19 Philippe Elie * gui/oprof_start.cpp: redundant return 2003-10-19 John Levon * libop/op_events.c: move to a fixed value for the default event count value 2003-10-19 Philippe Elie remove some FIXME: * libpp/format_output.h: remove first_output bool member * libpp/format_output.cpp: call output_header from the right place * libpp/op_header.h: remove bogus FIXME * libregex/tests/Makefile.am: fix dependencies on mangled-name file, fix make dist * libregex/tests/mangled-name.in: simplify a bit and remove a bogus FIXME * libregex/tests/regex_test.cpp: fix comment * module/ia64/op_syscalls.c: * module/x86/hammer_op_syscalls.c: * module/x86/op_syscalls.c: remove some FIXME 2003-10-17 Philippe Elie * libpp/arrange_profiles.cpp: clarify suggestion. * pp/opreport_options.cpp: update options help string for --merge. * libpp/profile_container.cpp: * libpp/profile_spec.cpp: * pp/common_option.cpp: * pp/populate.cpp: ';' are not necessary to end namespace 2003-10-17 Philippe Elie * libpp/arrange_profiles.cpp: use a set instead of a vector<...> to replace a O(N*M) by a O(N*log(M)) behavior. (N number of samples files, M number of class). 2003-10-17 Philippe Elie * libutil++/op_bfd.cpp: show filename when warning about no debug information available. get_linenr(): s/filename/source_filename/ 2003-10-16 Philippe Elie * events/ia64/itanium/events: counter 0,1 not 2,3 for IA64_INST_RETIRED * daemon/opd_util.c: opd_parse_events() fix use after free. 2003-10-16 John Levon * daemon/opd_perfmon.c: disable the code 2003-10-15 John Levon * daemon/opd_perfmon.c: fflushes to improve order of debug log 2003-10-15 John Levon * daemon/opd_perfmon.c: fix dumb allocation typo; handle signals correctly; wait for children to come up before returning 2003-10-15 Philippe Elie * dae/opd_sample_files.c: * daemon/opd_mangling.c: * daemon/opd_perfmon.c: * daemon/opd_util.c: check we not overflow op_nr_counters 2003-10-15 Philippe Elie * events/ia64/itanium/events: correct counter available according to intel doc. 2003-10-15 John Levon * dae/opd_image.c: * dae/opd_kernel.c: * dae/opd_proc.c: * dae/opd_sample_files.c: * dae/oprofiled.c: * daemon/opd_kernel.c: * daemon/opd_mangling.c: * daemon/opd_sfile.c: * daemon/opd_trans.c: * daemon/opd_util.c: * daemon/opd_util.h: * daemon/oprofiled.c: merge the options handling for dae and daemon 2003-10-15 Philippe Elie * daemon/opd_perfmon.c: * module/ia64/op_pmu.c: bit mask for event select field is 8 bits not 7 2003-10-14 John Levon * configure.in: * m4/findkernel.m4: * utils/opcontrol: 2.5 refs -> 2.6 2003-10-14 John Levon * utils/opcontrol: merge some 2.4/6 code 2003-10-14 John Levon * dae/opd_image.c: * dae/opd_sample_files.c: * dae/oprofiled.c: * utils/opcontrol: use --events for 2.4 daemon too * daemon/opd_perfmon.c: * daemon/opd_mangling.c: fix counter numbering on !perfmon 2003-10-14 John Levon * configure.in: xmemdup not xmemdump 2003-10-14 John Levon * daemon/opd_perfmon.c: propagate a SIGTERM up to the parent. 2003-10-14 John Levon * m4/perfmon.m4: * configure.in: remove pfmlib checks * daemon/opd_util.h: * daemon/opd_util.c: * daemon/opd_mangling.c: * daemon/oprofiled.c: parse more detailed events passed on command line * daemon/opd_perfmon.h: * daemon/opd_perfmon.c: don't use libpfm at all, do it ourselves. * utils/opcontrol: pass more of the events info to the daemon 2003-10-14 John Levon * m4/perfmon.m4: * configure.in: look for pfmlib 3 * daemon/Makefile.am: * daemon/opd_perfmon.h: * daemon/opd_perfmon.c: interface to perfmon on 2.6 IA64 * daemon/opd_mangling.c: * daemon/oprofiled.c: read event descriptions from command line not oprofilefs * daemon/opd_util.h: * daemon/opd_util.c: receive SIGUSR1/2 for perfmon * utils/opcontrol: handle multiple oprofileds. Send SIGUSR1/2 on start/stop. Pass in events list to oprofiled on 2.6. Don't attempt to fill in oprofilefs with event info if using perfmon. 2003-10-14 Philippe Elie * daemon/opd_mangling.c: * daemon/opd_sfile.c: * daemon/opd_sfile.h: protect the sfile we are acting on to be freed by sfile_lru_clear() * libdb/db_manage.c: * libdb/odb_hash.h: Do not put hash->descr in an inconsistent state when a failure occur. 2003-10-13 Philippe Elie * module/oprofile.c: don't restore syscall and stop counter twice 2003-10-13 Will Cohen * libop/op_parse_event.c(parse_events): Correct fprintf. 2003-10-13 Philippe Elie * module/x86/hammer_op_syscalls.c: pass tgid to daemon. Not tested! 2003-10-12 John Levon * utils/opcontrol: share --separate-cpu/thread code now 2003-10-12 Philippe Elie * configure.in: add libregex/tests/mangled-name.in * libregex/tests/mangled-name.txt: move ... * libregex/tests/mangled-name.in: here, tune to support different arch * libregex/tests/Makefile.am: s/mangled-name.txt/mangled-name.in * libregex/stl.pat.in: fix iterator<... ptrdiff_t> * libregex/tests/Makefile.am: update according to filename change * libregex/tests/regex_test.cpp: really fails on exception. 2003-10-12 Philippe Elie * dae/oprofiled.c: don't set cpu_number when !--separate=cpu * libop/tests/alloc_counter_tests.c: printf format for 64 bits arch * libop/tests/cpu_type_tests.c: #include * libop/tests/parse_event_tests.c: #include 2003-10-11 Philippe Elie * libop/op_interface.h: struct op_sample: remove packed attribute 2003-10-11 Philippe Elie * dae/opd_image.c: * dae/opd_image.h: reference count opd_image. Remove modification time checking. Remove hash field. Tidy * dae/opd_kernel.c: pass tid, tgid to op_get_kernel_image() * dae/opd_mapping.c: * dae/opd_mapping.h: use module hash code for image name to index a cache of name, this hash code is no longer used elsewhere. When killing map delete associated image, reference count of image will check for a real delete. * dae/opd_parse_proc.c: get tgid from /proc/pid/status * dae/opd_proc.c: create an opd_proc by process when separate_thread == true. Tidy by adding an opd_for_each_proc() * dae/opd_proc.h: add tid/tgid to opd_proc struct * dae/opd_sample_files.c: * dae/opd_sample_files.h: lru all samples files, allowing to cleanup a part of the lru if we go out of resource. Remove opd_handle_old_sample_files() since we no longer check for image modification time. * dae/opd_stats.c: * dae/opd_stats.h: statistics for opd_image struct depth search * dae/oprofiled.c: add --separate-cpu and --separate-thread * libop/op_interface.h: add tgid to samples struct passed from module to daemon. * module/compat22.h: * module/compat24.h: op_get_tgid() return tgid, fall back to return tid on 2.2 kernel. * module/oprofile.c: * module/ia64/op_syscalls.c: pass tgid to daemon. NOT TESTED but I think it's ok. Note than even if it's broken ia64 should work w/o --separate=thread * module/x86/op_syscalls.c: pass tgid to daemon. * utils/opcontrol: enable 2.4 thread/cpu separation * libdb/tests/db_test.c: verbose on when we provide filename of db file to test on command line. 2003-10-11 Philippe Elie * libop/op_cpu_type.h: * libop/op_cpu_type.c: constification * utils/op_help.c: check only if CPU_NO_GOOD not range * libutil/tests/Makefile.am: * libregex/tests/Makefile.am: * libdb/tests/Makefile.am: s/TEST = (.*)/TESTS = ${check_PROGRAMS}/ * libop/tests/alloc_counter_tests.c: comment fix * libop/tests/Makefile.am: * libop/tests/cpu_type_tests.c: new file, test libop/op_cpu_type.c 2003-10-10 Will Cohen * libop/op_cpu_type.h (op_get_cpu_number): Clarify comment. * libop/op_cpu_type.c (op_get_cpu_number): Check number. * utils/op_help.c (main): Make check with CPU_NO_GOOD. 2003-10-10 Will Cohen * libop/op_cpu_type.h (op_get_cpu_number): Declare. * libop/op_cpu_type.c (op_get_cpu_number): New. (op_get_cpu_type): Use op_get_cpu_number. * utils/op_help.c (main): Use op_get_cpu_number. 2003-10-10 John Levon * libop/op_parse_event.c: fix compile for IA64 2003-10-09 John Levon * doc/oprofile.xml: document "no results" and how to fix it 2003-10-08 John Levon * utils/op_help.c: standardise name * gui/oprof_start.cpp: Qt 2.3.1 compile fix (bug 819943) 2003-10-07 Philippe Elie * dae/opd_kernel.c: memory leak * dae/opd_mapping.c: * dae/opd_mapping.h: * dae/opd_parse_proc.c: * dae/opd_proc.c: * dae/opd_proc.h: use a list of struct opd_map instead of an array, remove last_map optimization. * dae/oprofiled.c: memory leak * libutil/op_cpufreq.c: memory leak, FILE* leak * libutil/op_list.h: fix @author 2003-10-06 Philippe Elie * dae/oprofiled.c: * dae/opd_proc.h: * dae/opd_proc.c: use struct list_head to chain opd_proc struct in hash table * utils/op_help.c: comment fix 2003-10-06 John Levon * utils/opcontrol: work around 2.6 daemon's signal handling race that could cause it to hang during a --shutdown 2003-10-05 Philippe Elie * events/i386/p4/events: * events/i386/p4-ht/events: put GLOBAL_POWER_EVENTS on top * events/i386/pii/unit_masks: * events/i386/piii/unit_masks: typo in help string * utils/op_help.c: show "counter: all" instead an enumeration of all counter 2003-10-02 Philippe Elie * events/*.events *.unit_masks: move these files to subdir named arch/processor_name/events and arch/processor_name/unit_masks * events/Makefile.am: update according * libop/op_events.c: now it's safe to allow loading events file from a directory provided through environment var OPROFILE_EVENTS_FILE_DIR * libop/tests/alloc_counter_tests.c: use it * libop/tests/load_events_files_tests.c: use it 2003-10-02 Philippe Elie * libop/op_events.c: revert last commit (allowed to find events files description directory in alternate directory) * libop/tests/Makefile.am: * libop/tests/load_events_files_tests.c: new files. Validate events description file by loading them. * libutil/op_cpufreq.c: comment why we don't have any code handling s390 2003-10-01 Philippe Elie * configure.in: * libop/Makefile.am: new subdir * libop/op_events.c: allow to retrieve events file dir through environment variable * utils/op_help.c: move parse_events() and parsed_event struct to ... * libop/op_parse_event.h: * libop/op_parse_event.c: these new files * libop/tests/Makefile.am: new tests subdir * libop/tests/alloc_counter_tests.c: events mapping to counter nr tests * libop/tests/parse_event_tests.c: event parsing tests 2003-10-01 Philippe Elie * libop/op_alloc_counter.c: add forward declaration * libop/op_alloc_counter.c: alloc counter in increasing number order, it's less surprising. 2003-10-01 Philippe Elie * libdb/tests/db_test.c: if previous tests fails a corrupted samples file can exist in test dir and will be re-used, remove() it. 2003-10-01 John Levon * daemon/opd_sfile.c: * libabi/op_import.cpp: * libop/op_interface.h: * libpp/locate_images.h: small cleanups * pp/opreport_options.cpp: don't complain about "-x -m all" 2003-09-28 Philippe Elie * libutil/op_file.c: * libutil/tests/file_tests.c: honor posix "//" filename namespace 2003-09-28 Philippe Elie * libop/op_alloc_counter.h: * libop/op_alloc_counter.c: change allocator by a backtracking algorithm walking only through possible solution. 2003-09-26 Philippe Elie * libdb/tests/db_test.c: success must be silent * dae/oprofiled.c: * daemon/oprofiled.c: * libutil/op_deviceio.c: * libutil/op_deviceio.h: op_open_device(): remove unused parameter fatal 2003-09-26 Philippe Elie * libutil/tests/file_tests.c: Fix some test: in some case the pathname component must be valid since we lstat() them. Fix a segfault due to missing ',' 2003-09-26 John Levon * libdb/tests/Makefile.am: * libregex/tests/Makefile.am: * libutil/tests/Makefile.am: don't build tests unless "make check" 2003-09-26 John Levon * libutil/op_file.c: don't test for NULL path passed in, we want to crash here instead of in xstrdup * configure.in: * libutil/Makefile.am: * libutil/tests/Makefile.am: * libutil/tests/file_tests.c: * libutil/tests/string_tests.c: add some unit tests for libutil string and path handling 2003-09-26 Philippe Elie * libdb/db_debug.c: remove useless display interface * libdb/db_db_travel.c: remove callback interface * libdb/odb_hash.h: remove display/callback interface * libdb/db_test.cpp: move to tests subdir * libdb/Makefile.am: update according * libdb/tests: new dir * libdb/tests/.cvsignore: * libdb/tests/Makefile.am: new files * libdb/tests/db_test.cpp: shorter tests * libregex/mangled-name.txt: * libregex/regex_testc.cpp: move to ... * libregex/tests: new directory * libdb/Makefile.am: update according * libregex/tests/.cvsignore: * libregex/tests/Makefile.am: new files 2003-09-26 John Levon * libabi/abi_test.cpp: * libabi/op_import.cpp: small cleanups 2003-09-25 John Levon * daemon/opd_cookie.c: * daemon/opd_kernel.c: * daemon/opd_sfile.c: * daemon/opd_trans.c: * daemon/oprofiled.c: trivial cleanups 2003-09-25 Marc Herbert * configure.in: fix prefix stuff to allow stow to work 2003-09-25 Philippe Elie * pch-c++.h: remove * Makefile.am: update according * configure.in: no longer need for conditional enable_pch * m4/precompiledheader.m4: don't use -Winvalid-pch 2003-09-25 Philippe Elie * daemon/opd_sfile.c: sfile_lru_clear() return 0 if lru is empty * daemon/opd_mangling.c: abort() if lru was empty (not tested) * daemon/oprofiled.c: likewise; opd_alarm(): don't sfile_lru_clear() * utils/op_help.c: * daemon/opd_sfile.h: * daemon/opd_cookie.h: s/()/(void)/ in some function prototype and definition * daemon/opd_cookie.c: s/"not looked up"/"not hashed"/ 2003-09-25 John Levon * daemon/oprofiled.c: push rlimit down back to 2048. This gives a running RSS of about 10Mb when thread profiling on my box, which seems reasonable (at 8192 it was hitting 40Mb) 2003-09-25 Philippe Elie * doc/oprofile.xml: clarify what means a configured kernel. 2003-09-25 John Levon * daemon/opd_sfile.c: bump LRU_AMOUNT to 1000 2003-09-24 John Levon * doc/opcontrol.1.in: * doc/oprofile.xml: document thread and cpu profiling a bit * daemon/opd_mangling.c: * daemon/opd_sfile.c: * daemon/oprofiled.c: * utils/opcontrol: implement per-CPU profiling, not tested yet 2003-09-24 John Levon * dae/opd_proc.c: * dae/opd_sample_files.c: * daemon/opd_mangling.c: * daemon/opd_sfile.c: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/db_test.c: * libdb/odb_hash.h: * libpp/op_header.cpp: * libpp/profile.cpp: remove samples_odb_t.err_msg entirely - prefer UNIX-style errno returns. Modify error messages to match 2003-09-24 John Levon * dae/opd_sample_files.c: * daemon/opd_sample_files.c: * libpp/op_header.cpp: * libpp/profile.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libdb/db_test.c: * libdb/odb_hash.h: * libdb/odb_manage.c: make odb_open return errno instead of EXIT_FAILURE/SUCCESS to allow EMFILE handling. Also do not leak fd's on failure. * libutil/op_types.h: cookie_t moved into daemon/ * daemon/: major rewrite: move to a hash on all parameters of struct transient. Lots of readability cleanups, plus resistance to cookie lookup failures, and hitting open file limits. Additionally thread profiling for kernel threads is enabled now. 2003-09-24 John Levon * daemon/opd_image.c: remove support for missing CTX_TGID 2003-09-24 John Levon * daemon/oprofiled.c: remove /proc/kcore support 2003-09-22 Philippe Elie * dae/opd_parse_proc.c: both op_file.h and op_fileio.h are needed 2003-09-22 John Levon * doc/CodingStyle: document doxygen placing rule * libop/op_alloc_counter.h: * libop/op_get_interface.c: * libutil++/file_manip.cpp: * libutil++/file_manip.h: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * libutil/op_deviceio.c: * libutil/op_deviceio.h: * libutil/op_get_time.c: * libutil/op_get_time.h: * libutil/op_libiberty.c: * libutil/op_libiberty.h: * libutil/op_lockfile.c: * libutil/op_lockfile.h: * libutil/op_popt.c: * libutil/op_popt.h: follow the above * libutil/op_file.c: * libutil/op_file.h: * libutil/op_fileio.c: * libutil/op_fileio.h: * dae/opd_parse_proc.c: * libutil++/string_manip.cpp: move op_get_link to op_file 2003-09-22 John Levon * libutil/op_fileio.h: * libutil/op_fileio.c: warn about op_get_link() restrictions * libutil++/file_manip.h: * libutil++/file_manip.cpp: s/op_read_link/op_follow_link, and behaviour change to match * libpp/profile_spec.cpp: * gui/oprof_start_util.cpp: use op_follow_link 2003-09-22 Philippe Elie * dae/makefile.am: missing AM_CFLAGS setting * dae/oprofiled.c: * daemon/oprofiled.c: handle signal in read loop * daemon/opd_util.h: * daemon/opd_util.c: move opd_setup_signal() from dae/ daemon/ 2003-09-22 John Levon * dae/oprofiled.c: * daemon/oprofiled.c: mask SIGTERM too to prevent the possibility of empty sample files 2003-09-21 Philippe Elie * libpp/format_output.h: * libpp/format_output.cpp: * pp/opreport.cpp: format_output::show_header no hide_header 2003-09-21 Philippe Elie * doc/opreport.1.in: * doc/oprofile.xml: * libpp/format_output.h: * libpp/format_output.cpp: * pp/opreport.cpp: --global_percent must be effective for detailed output too 2003-09-21 John Levon * pp/opreport_options.cpp: prevent --global-percent when appropriate 2003-09-21 John Levon * Makefile.am: back out broken make clean change 2003-09-21 John Levon * Makefile.am: make clean now removes *.html * internals.xml: add some outline sections 2003-09-21 John Levon * doc/internals.xml: provide a short overview and start a glossary * libpp/count_array.h: * libpp/format_output.cpp: * libpp/format_output.h: * libpp/profile.cpp: * libpp/profile.h: * libpp/profile_container.cpp: * libpp/profile_container.h: * pp/opreport.cpp: replace residual references to count groups with profile class concept 2003-09-21 John Levon * doc/Makefile.am: * doc/internals.xml: start an internals manual ... 2003-09-19 John Levon * pp/image_errors.cpp: missing include 2003-09-19 John Levon * libopt++/popt_options.h: * libopt++/popt_options.cpp: remove additional_help stuff, unused for some time 2003-09-18 John Levon * libutil++/Makefile.am: * libutil++/image_flags.h: move to ... * libpp/Makefile.am: * libpp/image_error.h: ... here, and rename * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: take an in-out bool instead of image_flags * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: * libpp/locate_images.cpp: * libpp/locate_images.h: * libpp/profile_spec.cpp: * pp/image_errors.cpp: * pp/opgprof.cpp: * pp/populate.cpp: changes from above 2003-09-18 John Levon * libutil++/Makefile.am: * libutil++/image_flags.h: flags for image read failure * libpp/profile_spec.cpp: * libpp/locate_images.h: * libpp/locate_images.cpp: * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: use image_flags * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: use image_flags, no longer error out on format failure * pp/Makefile.am: * pp/image_errors.cpp: * pp/image_errors.h: errors previously reported in locate_images are now reported here by the client * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/populate.h: * pp/populate.cpp: use the above 2003-09-18 Philippe Elie * libpp/format_output.cpp: use 9 not 12 for % field width * libutil++/string_manip.cpp: shrink 100.0000 to 100.000 * pp/opreport.cpp: s/" "/' ' 2003-09-18 John Levon * pp/opannotate_options.cpp: * pp/opreport_options.cpp: clean up error messages * pp/opgprof_options.h: * pp/opgprof_options.cpp: * pp/opgprof.cpp: use inverted_profile API 2003-09-18 Philippe Elie * utils/opcontrol: overwrite all current settings with --separate, this change behavior of --separate=kernel,library now we really setup both in this case. 2003-09-18 John Levon * libpp/locate_images.cpp: rewrite a little * libutil++/op_bfd.cpp: set fsize to default to -1, for fake artificial symbol 2003-09-18 Philippe Elie * libpp/locate_images.h: * libpp/locate_images.cpp: find_module_path() extra bool parameter to know if we fail to retrieve the image. * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: use it and save this bool in inverted_profile struct * libpp/profile_spec.cpp: update caller according * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: use the above change to create fake op_bfd * pp/opgprof_options.cpp: * pp/opgprof.cpp: update caller but never allow fake op_bfd * pp/populate.cpp: allow to create fake op_bfd 2003-09-18 John Levon * dae/opd_image.c: * dae/opd_proc.c: * dae/opd_sample_files.c: * dae/oprofiled.c: * daemon/opd_image.c: * daemon/opd_image.h: * daemon/opd_kernel.c: * daemon/opd_sample_files.c: * daemon/oprofiled.c: * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libop/op_sample_file.h: * libpp/op_header.cpp: * utils/opcontrol: renamings of separate stuff 2003-09-17 Philippe Elie * dae/opd_kernel.c: thinko in opd_get_module_info(): we must take care to re-use a previously created module not to create a new 2003-09-17 John Levon * daemon/opd_kernel.c: logging improvements 2003-09-17 Philippe Elie * dae/opd_kernel.c: * daemon/opd_kernel.c: fix use after free of module 2003-09-17 John Levon * daemon/opd_image.c: fix thread profiling when --separate-library=0 2003-09-17 Philippe Elie * dae/opd_kernel.c: add module to list of module ... * daemon/opd_kernel.c: s/print/verbprintf 2003-09-17 Philippe Elie * libop/op_config.h: remove OPD_MAX_MODULEs * dae/opd_kernel.c: * daemon/opd_kernel.c: remove fixed array of modules replaced by a list. Unify the way we create opd_module * utils/opcontrol: don't use --thread-profiling for 2.4 2003-09-17 Ka Fai Lu I adapted slightly this patch Phil. * daemon/opd_image.c: * daemon/opd_image.h: * daemon/opd_kernel.c: * daemon/opd_sample_files.c: * daemon/oprofiled.c: * utils/opcontrol: implement per thread profiling 2003-09-16 Philippe Elie * libopt++/popt_options.h: * libpp/locate_images.cpp: minor tidy 2003-09-16 John Levon * utils/opcontrol: don't pass pid/pgrp filter to 2.6 daemon * dae/oprofiled.c: * daemon/oprofiled.c: setrlimit to 8192 (lame workaround for now), minor cleanups 2003-09-15 John Levon * common_option.cpp: rename the array to avoid a link error in GCC 3.4 2003-09-15 John Levon * libop/Makefile.am: * libop/op_interface_25.h: move to ... * daemon/Makefile.am: * daemon/opd_interface.h: ... here * daemon/opd_image.c: * daemon/oprofiled.c: use above. Remove pointless command line options. * libop/op_config_25.h: remove. * libop/op_hw_config.h: move DCOOKIE_SHIFT to opd_interface.h 2003-09-15 John Levon * configure.in: use -Wdeclaration-after-statement if available * README: * daemon/opd_util.c: * daemon/opd_util.h: * doc/opannotate.1.in: * doc/opgprof.1.in: * doc/opreport.1.in: * doc/oprofile.1.in: * doc/oprofile.xml: * gui/oprof_start.cpp: * gui/oprof_start_util.cpp: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_get_interface.c: * libpp/locate_images.cpp: remove references to 2.5, replaced with 2.6 2003-09-15 John Levon * doc/opreport.1.in: document --show-address 2003-09-15 John Levon * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: * pp/populate.cpp: more commentary 2003-09-14 Philippe Elie * pp/opreport.cpp: handle 2.95 right io manipulator and the lack of a proper setw(w) << std::string 2003-09-14 John Levon * pp/opreport.cpp: re-add header for image summary 2003-09-14 John Levon * libpp/arrange_profiles.cpp: throw an exception if there are two many unmerged profiles, with details of how to fix it * pp/opgprof_options.cpp: * pp/common_option.cpp: clean up error messages 2003-09-14 John Levon * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: add location of images when inverting profiles * libpp/locate_images.cpp: return empty string if file isn't readable * pp/opannotate.cpp: use the above * pp/opreport.cpp: use the above; place warnings before any other output 2003-09-14 John Levon * pp/opgprof_options.cpp: use locate_image_path 2003-09-14 John Levon * Makefile.am: * populate.h: * populate.cpp: shared code for populating from inverted profiles * opreport.cpp: * opannotate.cpp: use above 2003-09-14 John Levon * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: add invert_profiles * pp/opreport.cpp: use it 2003-09-14 John Levon * doc/oprofile.xml: * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: Turn off VMA report by default, add --show-address 2003-09-14 John Levon * pp/opreport.cpp: nice formatting of image report column headers, respect --no-header 2003-09-14 Philippe Elie * libpp/arrange_profiles.cpp: use string::erase() not string::clear() for 2.95 * libutil++/generic_spec.h: allow to ignore "all" match * libutil++/comma_list.h: use it 2003-09-14 John Levon * pp/opreport.cpp: output column headers for image report 2003-09-14 John Levon * libpp/op_header.h: * libpp/op_header.cpp: output header info to a string not a stream * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: give classes a long name, and fill in global event/cpu info * pp/opannotate.cpp: * pp/opannotate_options.cpp: * pp/opannotate_options.h: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: use the class long names and info 2003-09-14 Philippe Elie * libpp/profile_spec.cpp: handle symlink 2003-09-14 John Levon * arrange_profiles.h: * arrange_profiles.cpp: Add code to give short names to each class, unused yet 2003-09-14 Philippe Elie * libpp/arrange_profiles.cpp: missing include<> with gcc 2.95 2003-09-14 John Levon * libpp/Makefile.am: * libpp/split_sample_filename.cpp: * libpp/split_sample_filename.h: rename as ... * libpp/parse_filename.cpp: * libpp/parse_filename.h: ... this * libpp/filename_spec.cpp: * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: sort classes for niceness, changes from above * pp/opreport.cpp: remove needless double check of exclude_dependent * libutil++/string_manip.cpp: touint should init to 0 in case of parse failure 2003-09-14 Philippe Elie * configure.in: fix maximum template depth to 50 * libutil/op_fileio.c: op_get_link() don't truncate silently results * m4/sstream.m4: use OP_CXXFLAGS not CXXFLAGS 2003-09-14 John Levon * pp/partition_files.h: * pp/partition_files.cpp: remove, now unused 2003-09-14 John Levon * pp/opannotate.cpp: * pp/opannotate_options.cpp: * pp/opannotate_options.h: use arrange_profiles API 2003-09-14 John Levon * pp/opgprof_options.h: * pp/opgprof_options.cpp: * pp/opgprof.cpp: use arrange_profiles API 2003-09-14 John Levon * libpp/Makefile.am: * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: introduce new code for partitioning profiles and handling merging * libpp/partition_files.h: * pp/opreport_options.cpp: * pp/opreport_options.h: * pp/opreport.cpp: use the above code * libpp/format_flags.h: * libpp/profile_container.cpp: remove unneeded multiple apps hint * libpp/count_array.cpp: * libpp/count_array.h: remove unnecessary code 2003-09-14 John Levon * configure.in: back to 0.7cvs 2003-09-14 John Levon * pp/opannotate.cpp: gcc 2.91 workaround (in 0.6.1 release) 2003-09-14 John Levon * configure.in: bump to 0.6.1 2003-09-13 John Levon * doc/oprofile.xml: document "incorrect source attribution" a bit 2003-09-12 Philippe Elie * libpp/op_header.cpp: typo in comment 2003-09-11 John Levon * configure.in: check for -lintl, tweak -ldl check 2003-09-11 John Levon * dae/oprofiled.c: * daemon/oprofiled.c: * libdb/db_manage.c: * libdb/db_test.c: correct headers 2003-09-11 John Levon * op_lockfile.c: use correct headers 2003-09-07 Philippe Elie * utils/op_help.c: check than all events are distincts 2003-09-06 Philippe Elie * pch-c++.h: * m4/precompiledheader.m4: new file to handle precompiled header * m4/Makefile.am: * configure.in: * Makefile.am: handle precompiled header 2003-09-05 John Levon * opd_image.c: cleanup of ctx_switch_set_image() 2003-09-05 Philippe Elie * daemon/opd_image.c: After a context switch ensure we update correctly the current image. 2003-09-04 Philippe Elie * pp/opreport.cpp: * pp/opannotate.cpp: catch op_bfd exception and recover gracefully 2003-09-04 Philippe Elie * utils/opcontrol: tweak "signaling daemon " message as suggested by Carlo Wood 2003-09-04 John Levon * doc/oprofile.xml: mention --reset in "Getting Started" 2003-09-03 John Levon * libop/op_events.c: * libpp/op_header.cpp: * dae/opd_sample_files.c: * daemon/opd_sample_files.c: propagate event error back up to caller * libdb/odb_hash.h: fix comment 2003-09-02 John Levon * dae/opd_image.c: * dae/opd_proc.c: * dae/oprofiled.c: * daemon/opd_image.c: use abort() not exit() on "can't happen" errors 2003-09-02 John Levon * dae/opd_proc.c: * daemon/opd_image.c: fix error message 2003-08-28 Philippe Elie * events/alpha.ev6.events: fix duplicate um tag 2003-08-28 John Levon * events/i386.athlon.events: fix duplicate minimum tag * daemon/opd_image.c: * libop/op_events.c: check for duplicate tags 2003-08-28 John Levon 2003-08-27 Will Cohen * utils/op_help.c (resolve_events): Typecast printf argument. 2003-08-25 Philippe Elie * pp/opannotate_options.cpp: * pp/opannotate_options.h: * pp/opannotate.cpp: enable multiple events * pp/opreport_options.cpp: remove #if 0 .... #endif 2003-08-25 Philippe Elie * libpp/count_array.cpp: avoid to access invalid memory 2003-08-25 Philippe Elie * configure.in: * m4/builtinexpect.m4: * m4/configmodule.m4: * module/Makefile.in: * module/ia64/Makefile.in: * module/x86/makefile.in: always use EXTRA_CFLAGS_MODULE not EXTRA_CFLAGS for module build flags 2003-08-23 Philippe Elie * libregex/op_regex.h: * libregex/op_regex.cpp: tidy * libutil++/op_bfd.cpp: remove obsolete comment 2003-08-23 Philippe Elie * libutil++/file_manip.h: * libutil++/file_manip.cpp: is_directory(dirname): return true if dirname exists * pp/common_option.cpp: validate --image-path parameters 2003-08-22 Philippe Elie * events/i386.p4.events: clarify than 128BIT_MMX_UOP count only integer SSE2 ops * pp/opreport.cpp: minor spacing change in output 2003-08-22 John Levon * daemon/oprofiled.c: report the kernel pointer size 2003-08-22 John Levon * daemon/oprofiled.c: read new /dev/oprofile/pointer_size in preference to kcore. kcore code will eventually go. 2003-08-21 John Levon * libutil++/op_bfd.cpp: update gcc2_compiled. comment to reflect reality 2003-08-19 Philippe Elie * pp/opreport.cpp: really merge when --merge=lib and image name are specified. 2003-08-16 Philippe Elie * pp/opannotate.cpp: output threshold percent when necessary. 2003-08-16 Philippe Elie * libutil++/op_bfd.cpp: remove ELF-based symbol size code 2003-08-15 William Cohen * doc/opcontrol.1.in: * doc/oprofile.1.in: * doc/oprofile.xml: Correct path to /root/.oprofile/daemonrc. 2003-08-15 Thomas Spatzier * daemon/opd_cookie.h: fix s390 syscall 2003-08-14 Philippe Elie * libutil++/string_manip.cpp: erase_to_last_of() is not a ltrim() 2003-08-14 Philippe Elie Dave Jones suggested this change. * module/x86/op_model_p4.c: remove superflous ';' at end of some macro 2003-08-14 Philippe Elie * libutil++/string_manip.h: remove erase_from_last_of() * libutil++/string_manip.cpp: and tidy erase_to_last_of(), rtrim() and ltrim() 2003-08-13 Philippe Elie * libutil++/op_bfd.h: * libpp/profile_container.cpp: remove nil_symbol_index 2003-08-13 John Levon * libpp/profile_container.cpp: * libpp/profile_container.h: remove "base_vma" parameter to add_samples(), we can just re-grab it straight from the abfd 2003-08-13 John Levon * libpp/profile_container.cpp: * libpp/profile_container.h: remove unused "zero samples" optimization hint: it's always false * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: from above 2003-08-12 John Levon * pp/opreport.cpp: small trivialities 2003-08-12 Philippe Elie * libregex/stl.pat.in: minor fix/improvements * libregex/mangled-name.txt: add tests 2003-08-12 Philippe Elie * pp/opreport.cpp: fix thinko when --merge=lib 2003-08-12 John Levon * pp/opreport.cpp: s/count_groups_summary/summary_container/g 2003-08-12 John Levon * doc/oprofile.xml: document opreport's side-by-side a little bit 2003-08-12 John Levon * pp/opreport.cpp: s/group_summary/app_summary/, and a lot of other renamings to clarify the count groups usage. 2003-08-12 John Levon * utils/op_help.c: add --unit-mask * utils/opcontrol: use --unit-mask 2003-08-12 Philippe Elie * pp/opreport.cpp: re write using count_array_t 2003-08-11 John Levon * libpp/count_array.cpp: * libpp/count_array.h: auto-resize the number of groups based on how we index. * libpp/profile_container.cpp: remove check * pp/opannotate.cpp: count_array.zero() not .empty() 2003-08-11 John Levon * libpp/filename_spec.h: * libpp/profile_spec.cpp: * libpp/profile_spec.h: add comments, allow comma lists for event, count, and unit mask * libutil++/comma_list.h: implement missing method 2003-08-11 John Levon * libpp/format_output.cpp: * libpp/format_output.h: add set_nr_groups(), remove pp_nr_counters. * libpp/profile_container.cpp: * libpp/profile_container.h: * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: count_group not counter 2003-08-11 John Levon * libpp/Makefile.am: * libpp/counter_array.cpp: * libpp/counter_array.h: rename to ... * libpp/count_array.h: * libpp/count_array.cpp: ... this ... * libpp/format_output.cpp: * libpp/format_output.h: * libpp/profile.cpp: * libpp/profile.h: * libpp/profile_container.cpp: * libpp/profile_container.h: * libpp/sample_container.cpp: * libpp/sample_container.h: * libpp/symbol.h: * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: ... and several renamings to starting change the notion from "counters" to the more general notion of "count groups" 2003-08-10 Philippe Elie Multiple counter support for pp tools. * libpp/counter_array.h: * libpp/counter_array.cpp: resurrected from pp-interface-branch, for now memory use is inefficient. * libpp/Makefile.am: add counter_array.cpp .h * libpp/format_out.h: * libpp/format_out.cpp: handle multiple counter + a general tidy * libpp/format_flags.h: remove ff_immutable_mask and some nasty requisite on flags value * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/sample_container.h: * libpp/sample_container.cpp: * libpp/symbol.h: * libpp/symbol_container.cpp: * libpp/symbol_sort.cpp: * pp/opreport.cpp: handle multiple counter * pp/opannotate.cpp: partial handling of multiple counter * pp/opgprof.cpp: * pp/opreport.cpp: minor bits 2003-08-08 Will Cohen * dae/Makefile.am: * daemon/Makefile.am: Correct library linking order. * daemon/opd_util.c: Add needed include files. 2003-08-08 Philippe Elie * utils/opcontrol: move_and_remove() do nothing if source doesn't exist 2003-08-08 Philippe Elie revert the previous patch * dae/Makefile.am: * dae/opd_sample_files.h: * dae/opd_sample_files.c: * daemon/Makefile.am: * daemon/opd_sample_files.c: un-share opd_sample_files code 2003-08-08 John Levon * dae/Makefile.am: * dae/opd_sample_files.h: * dae/opd_sample_files.c: * daemon/Makefile.am: * daemon/opd_sample_files.c: share opd_sample_files code 2003-08-08 John Levon * dae/oprofiled.c: * daemon/oprofiled.c: * daemon/opd_util.h: * daemon/opd_util.c: share opd_write_abi() 2003-08-08 Philippe Elie * libop/op_alloc_counter.c: * libop/op_events.h: minor doxygen fix 2003-08-08 John Levon * dae/Makefile.am: * dae/oprofiled.c: * daemon/Makefile.am: * daemon/oprofiled.c: * daemon/opd_util.h: * daemon/opd_util.c: share some small bits of code between the daemons 2003-08-08 John Levon * dae/oprofiled.c: * daemon/oprofiled.c: remove mypid, unused 2003-08-08 John Levon * dae/Makefile.am: * dae/opd_printf.h: remove duplicate header and use daemon/opd_printf.h 2003-08-08 John Levon * dae/opd_image.c: * dae/opd_sample_files.h: * dae/opd_sample_files.c: * daemon/opd_image.c: * daemon/opd_sample_files.h: * daemon/opd_sample_files.c: remove "create" bool from opd_mangle_filename(): only one callsite needs that functionality, open code the create instead * dae/opd_proc.c: * dae/opd_sample_files.h: * dae/opd_sample_files.c: * daemon/opd_sample_files.h: * daemon/opd_sample_files.c: return error from opd_open_sample_filename(). Do not fail when odb_open fails due to --reset races. * dae/oprofiled.c: * daemon/oprofiled.c: a little more verbosity. * libutil/op_file.h: * libutil/op_file.c: fix create_dir/path() comments, don't use access() * utils/opcontrol: reduce chance of --reset races 2003-08-06 Philippe Elie * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: add app_name sort order, force sort order for criteria unspecified by user. * pp/opreport_options.cpp: update --sort option help string. 2003-08-04 John Levon * doc/oprofile.xml: * doc/opannotate.1.in: * pp/opannotate.cpp: * pp/opannotate_options.h: * pp/opannotate_options.cpp: add --base-dirs 2003-08-04 John Levon * doc/oprofile.xml: * doc/opannotate.1.in: * pp/opannotate.cpp: * pp/opannotate_options.h: * pp/opannotate_options.cpp: add --search-dirs 2003-08-04 John Levon * doc/oprofile.xml: * doc/opannotate.1.in: * pp/opannotate.cpp: * pp/opannotate_options.h: * pp/opannotate_options.cpp: remove --source-dir and --base-dir, they're confusing and not useful in the current form 2003-08-03 John Levon * utils/opcontrol: avoid using ps, it's very slow with kallsyms 2003-08-03 Philippe Elie * libutil++/op_bfd.cpp: c++ static function doesn't get a mangled name in debug info (see gcc #11774). Try to recover through a not completely reliable mechanism but better than ignoring the problem 2003-08-02 Philippe Elie * pp/opreport.cpp: minor: more consistency about function ordering 2003-08-02 Philippe Elie * libpp/profile.h: * libpp/profile.cpp: profile::sample_count() new to allow raw access to samples count * pp/opreport.cpp: use above function to implement opreport (w/o -l or --details options). opreport is roughly twice faster. 2003-08-02 Philippe Elie * pp/opreport.cpp: clarify multiple counter support 2003-08-01 John Levon * libregex/stl.pat.in: fix _List_iterator regex (from Phil) 2003-07-31 Philippe Elie * pp/opannotate.cpp: output cpu type and cpu speed. 2003-07-30 John Levon * libpp/partition_files.cpp: remove some apparently dead code 2003-07-30 John Levon * events/i386.p4.unit_masks: make flame_uops value mandatory, Yuan.Lu@rrze.uni-erlangen.de does not see any events without setting the unit mask 2003-07-30 John Levon * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: bfd_openr() keeps a copy of the passed in char * around, sickenly enough. Ensure lifetimes will always be correct by adding a filename data member to op_bfd 2003-07-29 Philippe Elie * libpp/op_header.h: * libpp/op_header.cpp: separate output of cpu_type, cpu_speed and counter setup * libpp/partition_files.h: * libpp/partition_files.cpp: unmergeable_profile() split profile by the unmergeable. * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opreport.cpp: initial multiple counter output, multiple counter with -l is not yet available. 2003-07-29 John Levon * doc/opcontrol.1.in: update for --event 2003-07-29 John Levon * configure.in: * doc/srcdoc/Doxyfile.in: * oprof_report/: remove badly out of date oprof_report 2003-07-28 John Levon * configure.in: bump to 0.7cvs 2003-07-26 John Levon * configure.in: bump to 0.6 2003-07-26 John Levon * utils/opcontrol: fix call of op_help 2003-07-26 John Levon * gui/oprof_start.cpp: replace folder icons with clearer red/green circles 2003-07-26 John Levon * gui/oprof_start.cpp: actually select and show the default event 2003-07-26 John Levon * gui/oprof_start.cpp: small string tweak, show "conflicts" message consistently 2003-07-26 John Levon * gui/oprof_start.cpp: don't use invalidated iterator 2003-07-26 Philippe Elie * gui/oprof_start.cpp: fix for 2.91.66 * libpp/profile.cpp: typo invoking an undefined behavior revealed by gcc stl debug mode * libpp/profile.h: ensure we provide the right typedef to std:: for profile::const_iterator revealed by gcc stl debug mode at compile time. The implementation is a bit tricky to work with old compiler * libpp/symbol_sort.cpp: compare must define a weak ordered relation order, revealed by gcc stl debug mode. 2003-07-26 Philippe Elie * gui/ui/oprof_start.base.ui: * gui/oprof_start.h: * gui/oprof_start.cpp: change UI to use the new counter allocation API * libop/op_alloc_counter.h: * libop/op_alloc_counter.c: * utils/op_help.c: minor const-ness api change 2003-07-25 Will Cohen * utils/opcontrol: Restrict the search path. 2003-07-25 Philippe Elie * libop/op_alloc_counter.c: use tabulation * libop/op_events.c: * libop/op_events.h: find_event_by_name() new * utils/op_help.c: use find_event_by_name() 2003-07-24 Philippe Elie * utils/op_help.c: make valgrind happy + minor cleanup 2003-07-24 Philippe Elie * libop/op_alloc_counter.h: * libop/op_alloc_counter.c: new file providing mapping from an event list to hardware counter number * utils/op_help.c: use the above api 2003-07-24 Philippe Elie * utils/op_help.c: fix hardware counter allocation order 2003-07-23 John Levon * doc/oprofile.xml: comment out --base-dir mention 2003-07-23 John Levon * doc/oprofile.xml: remove mention of oprof_start_event 2003-07-23 John Levon * dae/oprofiled.c: * daemon/oprofiled.c: don't uselessly try to unlink non-existent lockfile * daemon/opd_image.c: * daemon/oprofiled.c: clean up buffer read messages 2003-07-23 John Levon * utils/opcontrol: error out at --setup time if vmlinux is not valid. Cleanup the error message if so * daemon/opd_kernel.c: fix potential null deref 2003-07-21 John Levon * gui/oprof_start.cpp: select "No event" when switching counter if needed 2003-07-21 John Levon * gui/oprof_start.cpp: fix default event choosing when daemonrc exists 2003-07-21 Philippe Elie * gui/oprof_start.cpp: thinko in has_unique_event(), don't warn for no counter with CPU_TIMER_INT 2003-07-21 Philippe Elie * gui/oprof_start.cpp: allow to de-select a counter 2003-07-21 John Levon * gui/oprof_start.cpp: * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: remove uptime pretty printing. It's broken for 2.5 and ugly code 2003-07-21 John Levon * gui/oprof_start.h: * gui/oprof_start.cpp: use a default event if no events are set yet 2003-07-20 Philippe Elie * m4/compileroption.m4: fix for autoconf 2.13 2003-07-19 Philippe Elie * gui/oprof_start.cpp: * libpp/format_output.cpp: * libpp/format_output.h: * pp/opannotate.cpp: * pp/opreport_options.cpp: minor tidy 2003-07-19 Philippe Elie * gui/oprof_start.cpp: RTC mode was not working 2003-07-16 Philippe Elie * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: remove dead code, fix kernel_only read 2003-07-16 John Levon * utils/opcontrol: fix typo that was partly breaking CPU_TIMER_INT 2003-07-16 John Levon * gui/oprof_start.h: * gui/oprof_start.cpp: fixes for CPU_TIMER_INT 2003-07-16 John Levon * gui/ui/oprof_start.base.ui: remove add/remove event buttons, fix resize weirdness * gui/oprof_start.h: * gui/oprof_start.cpp: remove add/remove event buttons, allow short-form event descriptions 2003-07-15 Philippe Elie * gui/persistent_config.h: remove * gui/oprof_start.h: * gui/oprof_start.cpp: debug, remove dead code, works better now, see TODO 2003-07-15 Philippe Elie * gui/oprof_start.h: * gui/oprof_start.cpp: * gui/oprof_start_util.cpp: re-enable partially the gui, sorta of working if cautioulsy used 2003-07-15 John Levon * gui/ui/oprof_start_base.ui: * gui/oprof_start.h: * gui/oprof_start.cpp: some steps towards fixing gui for the new events stuff 2003-07-15 John Levon * libop/op_events.h: * libop/op_events.c: add op_default_event * utils/op_help.c: move default event stuff to libop, fix -c option 2003-07-15 John Levon * utils/op_help.c: fix default RTC event to be "RTC_INTERRUPTS" 2003-07-15 Philippe Elie * utils/opcontrol * events/rtc..events: use RTC_INTERRUPTS as event name 2003-07-15 Philippe Elie * daemon/opd_sample_files.c: C89 compile fix 2003-07-15 John Levon * utils/opcontrol: * utils/op_help.c: move the default event strings into op_help.c instead of in opcontrol 2003-07-15 John Levon * doc/oprofile.xml: document event name for timer interrupt * daemon/opd_sample_files.c: handle CPU_TIMER_INT * utils/op_help.c: fix a core dump 2003-07-13 Philippe Elie * daemon/opd_image.c: verbprintf() when starting reading buffer not printf 2003-07-12 Philippe Elie * from BRANCH_CALLGRAPH: * daemon/opd_image.c: printf -> verbprintf, fix comment * daemon/opd_kernel.c: kernel/module samples statistics was wrong * daemon/opd_image.c: * daemon/opd_image.h: * daemon/opd_kernel.c: * daemon/opd_kernel.h: import cleanup from branch, mainly don't handle samples in opd_kernel.c but return (creating if necessary) an opd_image struct where the sample must go and let opd_image caller in opd_image.c do sample insertion 2003-07-11 Philippe Elie * utils/opcontrol: shows basename $0 with --version * libpp/op_header.cpp: formating 2003-07-11 Philippe Elie * utils/opcontrol: don't try to save current if the directory doesn't exist 2003-07-11 Philippe Elie * libutil++/stream_util.h: * libutil++/stream_util.cpp: new file, io_state() save object * libutil++/Makefile.am: handle new file * libutil++/op_bfd.cpp: * pp/opreport.cpp: * libpp/op_header.cpp: use io_state 2003-07-09 Philippe Elie * module/x86/op_model_p4.c: reflect intel documentation fix. 2003-07-08 Will Cohen * daemon/opd_kernel.c: Handle /proc/modules format. 2003-07-08 Will Cohen * doc/oprofile.xml: * configure.in: --enable-gcov option and documentation. 2003-07-08 Will Cohen * utils/opcontrol: Correct P4 default event. 2003-06-03 John Levon * from BRANCH_CALLGRAPH * libdb/odb_hash.h: * libdb/db_manage.c: * libdb/db_insert.c: namespace safety * libpp/partition_files.cpp: * libpp/profile.cpp: spacing, add a FIXME 2003-07-07 Philippe Elie * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: cleanup walking through multimap with a pair 2003-07-05 Philippe Elie * daemon/opd_image.c: * libdb/db_insert.c: 64 bits arch compile fix, thanks to Falk Hueffner 2003-07-02 Philippe Elie * pp/opreport.cpp: honor options::show_header 2003-06-30 Graydon Hoare * libpp/op_header.cpp: Handle printing multiple bitmask values. 2003-06-19 John Levon * doc/Makefile.am: fix make distcheck 2003-06-18 John Levon * pp/opannotate_options.c: hide the unhandled --base-dir option 2003-06-18 John Levon * pp/Makefile.am: don't build opdiff 2003-06-17 Will Cohen * daemon/opd_cookie.h: Add s390 syscall value. 2003-06-17 John Levon * utils/opcontrol: don't accept "-r" - it's too easy to typo 2003-06-17 John Levon * doc/srcdoc/Doxyfile: removed * doc/srcdoc/Doxyfile.in: * configure.in: generate doxygen version nr. automatically 2003-06-17 Philippe Elie * libdb/db_insert.cpp: missing initialization of error message on error path 2003-06-17 John Levon * utils/opcontrol: accept some short forms for common operations 2003-06-17 John Levon * utils/opcontrol: accept --foo blah as well as --foo=blah 2003-06-16 John Levon * utils/opcontrol: "opcontrol" will show usage instead of doing nothing 2003-06-16 Will Cohen * libabi/abi.cpp: * libabi/op_import.cpp: Add required include for cassert. 2003-06-16 John Levon * events/x86-64.hammer.unit_masks: remove some bogus FIXMEs 2003-06-15 John Levon * README: fix autogen.sh line 2003-06-15 John Levon * daemon/opd_image.c: 64 bit fixes 2003-06-15 John Levon * utils/op_help.c: c89 fix 2003-06-15 John Levon * daemon/opd_image.c: c89 fix 2003-06-15 John Levon * doc/oprofile.xml: document --event * utils/opcontrol: * utils/op_help.c: allow unit mask, kernel, user to be optional. Verify not too many events are passed. 2003-06-15 John Levon * libop/op_cpu_type.c: fix nr_counters cpu type check * utils/op_help: implement --check_events, event validation and counter allocation * utils/opcontrol: use the above, implement --event=default 2003-06-14 John Levon * daemon/opd_image.c: fix a stupid error in my previous TGID patch 2003-06-12 Graydon Hoare * libop/op_events.c (op_check_events): Check bitmasks as well as exclusive values, for unit masks. 2003-06-12 John Levon * daemon/opd_image.c: we were not handling a truncated TGID entry properly 2003-06-12 John Levon * libutil++/unique_storage.h: missing typename 2003-06-11 Philippe Elie * pp/opannotate_options.cpp: typo in option name 2003-06-11 Philippe Elie * libutil++/op_bfd.cpp: boring_symbol() new to get a better choice when eliminating symbol at identical vma 2003-06-11 Philippe Elie * utils/opcontrol: fix rtc option checking, bug added after 0.5.3, no big deal 2003-06-11 Philippe Elie * libregex/op_regex.cpp: * libpp/profile.cpp: compile fix, tree was broken by my previous patch 2003-06-11 Jason Yeh * events/i386.athlon.events: add CPU_CLK_UNHALTED * utils/opcontrol: use the above by default * events/x86-64.hammer.events: * events/x86-64.hammer.unit_masks: various fixes 2003-06-11 Philippe Elie * libpp/op_header.cpp: * libpp/profile.cpp: * libpp/profile_spec.cpp: * libpp/symbol_sort.cpp: * libregex/op_regex.cpp: * libutil++/op_bfd.cpp: use exception rather exit(EXIT_FAILURE) in library code 2003-06-11 John Levon * daemon/opd_image.c: future-proof the code handlers 2003-06-11 Philippe Elie * pp/opannotate.cpp: output_asm() avoid output when the set of selected symbols doesn't contain any samples 2003-06-11 Philippe Elie * libutil++/unique_storage.h: we don't need to check if key is present before trying to insert it 2003-06-10 Philippe Elie * libpp/name_storage.h: minor tidy * libutil++/unique_storage.h: small efficiency improvement 2003-06-09 John Levon * pp/Makefile.am: * libutil/Makefile.am: fix make distcheck 2003-06-09 John Levon * libpp/opp_symbol.h: rename to ... * libpp/symbol.h: ... this * libpp/Makefile.am: * libpp/format_output.h: * libpp/format_output.cpp: * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/sample_container.h: * libpp/sample_container.cpp: * libpp/symbol_functors.h: * libpp/symbol_sort.cpp: fix up from above and some header cleanups 2003-06-09 John Levon * libpp/profile.h: std::pair not pair 2003-06-08 Philippe Elie * libpp/profile.cpp: don't underflow start offset when the vma range is unknown * pp/opreport.cpp: use samples_range() not samples_range(0, ~0) 2003-06-08 Philippe Elie * libpp/profile.h: * libpp/profile.cpp: replace accumulate_samples() API by an iterator interface * libpp/profile_container.h: * libpp/profilecontainer.cpp: * pp/opreport.cpp: use new API 2003-06-08 Philippe Elie * include/sstream: replace old version by the once shipped with 2.95.3, seekg() in the old was not working 2003-06-08 John Levon * libpp/name_storage.h: don't need to define the tag structs * libutil++/unique_storage.h: fix the comments, make get() public 2003-06-08 Philippe Elie * libpp/profile_container.cpp: * libutil++/string_manip.cpp: gcc 2.91.66 fix 2003-06-08 John Levon * libpp/name_storage.h: * libpp/name_storage.cpp: * libpp/opp_symbol.h: * libpp/profile_container.cpp: * libpp/symbol_functors.cpp: * libutil++/unique_storage.h: don't derive from I() at all for id_value, it's not needed. Hide .id and provide operator<(), operator==(), operator!=(), and set() 2003-06-08 John Levon * libutil++/unique_storage.h: make some of id_value only visible to unique_storage. 2003-06-08 John Levon * libpp/name_storage.h: * libutil++/unique_storage.h: move the ID class into unique_storage, and make it derive from the template parameter, to give simpler type safe support 2003-06-08 John Levon * libutil++/Makefile.am: * libutil++/unique_storage.h: add new template for unique storage of values * libpp/name_storage.h: * libpp/name_storage.cpp: use it 2003-06-07 Philippe Elie * libpp/profile_container.cpp: fix order of file output with opannotate --source to be consistent with other tools 2003-06-07 John Levon * libpp/profile_container.cpp: fix operator< 2003-06-07 Philippe Elie * libpp/profile.h: * libpp/profile.cpp: change API to walk through vma with non zero samples count rather looking for all vma. This is not very clean, an iterator interface will be perhaps a better idea. Measures shows it's to do it so for now I apply it. * libpp/profile_container.cpp: update according to above change. 2003-06-07 Philippe Elie * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/symbol_container.h: * libpp/symbol_container.cpp: remove dead api find_symbol(string symbol_name) 2003-06-07 Philippe Elie * libpp/name_storage.h: * libpp/name_storage.cpp: * libpp/profile_container.cpp: * libpp/profile_container.h: * libpp/sample_container.h: * libpp/sample_container.cpp: * libpp/symbol_container.h: * libpp/symbol_container.cpp: * pp/opannotate.cpp: replace some use of string filename by debug_name_id 2003-06-05 John Levon * daemon/Makefile.am: * daemon/opd_kernel.c: * daemon/p_module.h: remove p_module.h, unused * daemon/opd_cookie.h: use __NR_lookup_dcookie and use our definitions only if it's not defined * daemon/opd_image.c: * daemon/opd_kernel.c: * daemon/opd_sample_files.c: * daemon/oprofiled.c: pedantry * libabi/op_import.cpp: * libabi/abi_test.cpp: fix build from odb change * libop/op_config.h: move NR_CPUS to ... * libop/op_config_24.h: ... here * libop/op_hw_config.h: remove unused OP_COUNT_MAX 2003-06-03 Philippe Elie * libpp/op_header.cpp: * libpp/profile.cpp: * dae/opd_proc.c: * dae/opd_sample_files.c: * daemon/opd_image.c: * daemon/opd_sample_files.c: * libdb/odb_hash.h: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/db_test.c: error message is now a field of a samples_odb_t 2003-06-03 John Levon * libutil++/child_reader.cpp: * libabi/abi.cpp: * libabi/abi.h: * libabi/abi_test.cpp: * libabi/op_api.h: * libabi/op_abi.cpp: * libabi/op_import.cpp: pedantry, remove unused code 2003-06-01 Philippe Elie * dae/oprofiled.c: * libop/oprofiled.c: * libop/op_cpu_type.c: * module/oprofile.c: * module/oprofile.h: * pp/opdiff.cpp: more static data and function 2003-05-31 Philippe Elie * gui/oprof_start_util.h: * libdb/db_stat.c: * libdb/odb_hash.h: * libpp/format_output.h: * libpp/locate_image.h: * libpp/name_storage.h: * libpp/partition_files.h: * libpp/profile.h: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: improve doxygen comment 2003-05-31 Philippe Elie * configure.in: use AC_DEFINE_UNQUOTED() to define version string in config.h not in version-1.h * Makefile.am: distclean-local: is no longer used * version-1.h.in: delete * libutil/op_version.h: * libutil/op_version.c: new file: package version output * libutil/Makefile.am: * dae/oprofiled.c: * daemon/oprofiled.c: * gui/oprof_start.h: * libop/op_events.c: * libopt++/popt_options.cpp: * libregex/demangle_sybol.cpp: * module/oprofile.c: * utils/op_help.c: tweak # include according 2003-05-30 Dan Zink * module/x86/op_apic.c: really disable the apic if it was disabled 2003-05-29 John Levon * utils/opcontrol: don't allow --rtc-value if not RTC mode 2003-05-27 John Levon * libutil++/string_manip.h: add * pp/opannotate.cpp: use '\n' not endl * pp/opreport.cpp: untie cout 2003-05-29 Philippe Elie * merge with pp-interface-branch: following ChangeLog was unmerged to branch 2003-05-27 John Levon * configure.in: oprofile 0.5.3 is released, back to 0.6cvs 2003-05-26 John Levon * doc/oprofile.xml: update docs for --no-vmlinux 2003-05-26 John Levon * libop/op_interface_25.h: * daemon/opd_image.c: handle tgid for future compatibility, fix compile on older gccs 2003-05-26 John Levon * libop/op_interface_25.h: add LAST_CODE * daemon/opd_stats.h: * daemon/opd_stats.c: count short reads of buffer and unplaceable samples * daemon/opd_image.c: rewrite buffer parsing code, handle window where we can't place a sample 2003-05-26 John Levon * libutil++/utility.h: fix typo * utils/opcontrol: fix typo 2003-05-16 John Levon * pp/counter_profile.cpp: remove bogus cpu speed consistency check 2003-05-09 John Levon * m4/Makefile.am: * m4/compileroption.m4: add a generalised compiler option tester * configure.in: use it, add -fno-common 2003-05-09 John Levon * daemon/oprofiled.c: * dae/oprofiled.c: remove duplicate declaration found via -fno-common 2003-05-04 John Levon * doc/oprofile.xml: fix validation errors from xmllint --valid 2003-05-28 Philippe Elie * libpp/profile_spec.cpp: make image:/path/to:image working 2003-05-28 Philippe Elie * libutil++/string_manip.h: * libutil++/string_manip.cpp: specialize lexical_cast_no_ws to accept hexadecimal input * pp/common_option.cpp: missing << endl 2003-05-27 Philippe Elie * doc/oprofile.xml: update example in "Interpreting profiling results" section 2003-05-26 John Levon * doc/oprofile.xml: add new pp tools options 2003-05-26 John Levon * doc/opreport.1.in: * doc/opgprof.1.in: * doc/opannotate.1.in: * doc/op_help.1.in: complete 2003-05-26 John Levon * configure.in: * doc/Makefile.am: * doc/oprofile.1.in: * doc/op_help.1.in: * doc/opcontrol.1.in: * doc/opreport.1.in: * doc/opannotate.1.in: * doc/opgprof.1.in: re-organise and add manpages 2003-05-26 John Levon * doc/oprofile.xml: start to document the pp interface 2003-05-26 Philippe Elie * pp/opreport.cpp: remove automatic switch to --symbols mode 2003-05-26 Philippe Elie * libpp/symbol_sort.h: * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: * pp/opreport_options.cpp: handle meaningless options combinations 2003-05-26 Philippe Elie * pp/opgprof_options.cpp: no need to use unmergeable_profile here 2003-05-25 Philippe Elie * events/i386.piii.unit_masks: tweak comment, change default unit mask for kni instruction to 0 and type to exclusive 2003-05-25 Philippe Elie * libpp/profile_container.cpp: thinko * pp/opreport.cpp: typo 2003-05-25 John Levon * libopt++/popt_options.h: * libopt++/popt_options.cpp: obvious cleanup, remove some dead code 2003-05-25 Philippe Elie * libpp/format_flags: cf_image_name new column_flags flag * libpp/profile_container.cpp: use above flag. Don't compare app_name by string but id * pp/opreport.cpp: hide image_name when un-necessary 2003-05-24 Philippe Elie * doc/srcdoc/Doxyfile: * libpp/profile.h: * libpp/profile_container.h: * libutil++/utility.h: remove gcc 2.91 noncopyable as empty base class work-around 2003-05-23 Philippe Elie * configure.in: do early check of libiberty * libpp/symbol_sort.cpp: 2.91 compile fix 2003-05-22 Philippe Elie * libutil++/child_reader.h: minor #include fix 2003-05-22 Philippe Elie * libpp/name_storage.cpp: debug_name_storage::name() return an empty string when for zero id to avoid exception 2003-05-21 Philippe Elie * libpp/profile.cpp: * libpp/op_header.h: * libpp/op_header.cpp: when sample file differ output the sample filename * pp/opannotate.cpp: remove spurious output * */Makefile.am: * configure.in: handle our own OP_CFLAGS, OP_CXXFLAGS to let user free to use make CFLAGS= 2003-05-20 Philippe Elie * libpp/profile_spec.h: * libpp/profile_spec.cpp: remove lib_image_exclude, use image_exclude instead. match() Handle image exclusion. * libregex/stl.pat.in: FIXME * libutil++/string_manip.h: compile fix 2003-05-19 John Levon * libutil++/comma_list.h: * libpp/filename_spec.cpp: * libutil++/string_manip.h: * libutil++/generic_spec.h: rename strict_convert<> to lexical_cast_no_ws<> 2003-05-19 John Levon * libutil++/generic_spec.h: move strict_convert<> to... * libutil++/string_manip.h: ...here 2003-05-19 John Levon * libutil++/generic_spec.h: comma_list isn't a friend any more * libutil++/comma_list.h: use generic_spec<>::match() directly 2003-05-19 John Levon * libpp/name_storage.h: s/name_map/stored_names/, it's not a map any more. 2003-05-19 Philippe Elie * libregex/mangled-name.txt: * libregex/stl.pat.in: partial handling of _Identity<> and _Select1st<>, pattern fail if type are too complex 2003-05-19 Philippe Elie * libpp/format_output.cpp: small cleanup * libpp/name_storage.h: * libpp/name_storage.cpp: ensure type safety by providing distinct type identifier for each name_storage based container * libpp/profile_container.cpp: * libpp/sample_container.cpp: * libpp/symbol_functors.cpp: * libpp/symbol_sort.cpp: * libpp/opp_symbol.h: use the name identifier api * libpp/op_header.cpp: * libpp/partition_files.cpp: use a set not a name_storage * libpp/format_output.cpp: small cleanup 2003-05-18 Philippe Elie * libpp/partition_files.cpp: merge partition entry when necessary fixing a corner case when a binary can be a dependent or a primary image and was not merged 2003-05-18 Philippe Elie * pp/opreport_options.cpp: * pp/opannotate_options.cpp: remove conflicting options shortcut 2003-05-18 Philippe Elie * libregex/stl.pat.in: add list::{const_}+iterator 2003-05-17 Philippe Elie * libpp/name_storage.cpp: basename() return an empty string for nil id 2003-05-17 Philippe Elie * libutil++/op_bfd.cpp: get_linenr() init linenr to zero * libpp/name_storage.cpp: don't use id zero * libpp/opp_symbol.h: now we use id and not string we must provide default ctor to initialize the id * libpp/profile_container.cpp: init debug info entry only if get_linenr() succeed 2003-05-17 Philippe Elie * libdb/db_manage.c: better handling of zero sample file size when opening in read only mode * module/x86/op_nmi.c: printk format fix 2003-05-17 John Levon * pp/opannotate_option.cpp: * pp/opreport_options.cpp: command line changes 2003-05-17 John Levon * libpp/name_storage.h: * libpp/name_storage.cpp: add present() * libpp/op_header.cpp: * libpp/partition_files.cpp: use a name store to track what we've warned about, and clean up the warnings a bit 2003-05-16 John Levon * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: expose anonymous symbols to the world as "??sectionname". Useful for .plt and .fini, which are quite common. * libpp/name_storage.cpp: demangle anonymous symbols nicely. 2003-05-16 John Levon * libpp/symbol_sort.cpp: fix image-sorting 2003-05-16 John Levon * libpp/name_storage.h: * libpp/name_storage.cpp: make ID be per-container 2003-05-16 John Levon * libpp/name_storage.h: * libpp/name_storage.cpp: merge processed names into one string, remove the boolean 2003-05-16 John Levon * libpp/name_storage.h: * libpp/name_storage.cpp: whoops, use string not stored_name for the ID map 2003-05-16 John Levon * libpp/name_storage.h: * libpp/name_storage.cpp: split into three stores for debug filenames, symbols, and images * libpp/format_output.cpp: * libpp/profile_container.cpp: * libpp/sample_container.cpp: * libpp/symbol_container.cpp: * libpp/symbol_sort.cpp: * pp/opannotate.cpp: changes from above 2003-05-16 John Levon * libpp/Makefile.am: * libpp/name_storage.h: * libpp/name_storage.cpp: add shared storage and caching of symbol and file names * libpp/opp_symbol.h: * libpp/format_output.cpp: * libpp/profile_container.cpp: * libpp/sample_container.cpp: * libpp/symbol_container.cpp: * libpp/symbol_container.h: * libpp/symbol_sort.cpp: * libpp/symbol_sort.h: * pp/opannotate.cpp: * pp/opreport.cpp: use it * pp/opgprof_options.cpp: add unused demangle options to hack-fix the build 2003-05-16 John Levon * libpp/symbol_sort.cpp: fix --sort debug 2003-05-16 John Levon * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: remove have_debug_info() 2003-05-16 Philippe Elie * libpp/op_header.cpp: remove cpu_speed checking * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: bail out in get_linenr() if binary doesn't contain any debug info. Speed up my test case opreport --debug-info -l by 25 2003-05-16 John Levon * libutil++/op_bfd.cpp: clean up interesting_symbol a bit 2003-05-16 John Levon * libutil++/op_bfd.cpp: make sure linenr is always set to something * libpp/opp_symbol.h: linenr should be unsigned * libpp/profile_container.cpp: remove some unneeded copies 2003-05-16 John Levon * pp/opannotate.cpp: small renaming 2003-05-15 John Levon * libpp/symbol_container.h: * libpp/symbol_container.cpp: add begin(), end(), remove symbols_by_count() * libpp/profile_container.cpp: use symbol container iterator directly in select_symbols() 2003-05-15 John Levon * libpp/format_output.h: * libpp/format_output.cpp: * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/symbol_container.h: * libpp/symbol_container.cpp: * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: * pp/opgprof.cpp: move symbol_collection typedef into global namespace, and use consistently 2003-05-15 John Levon * libpp/format_output.h: * libpp/format_output.cpp: add vma_format_64bit(), remove bool parameter from output() * pp/opreport.cpp: change from above, refactor flags code into get_format_flags() helper 2003-05-12 Philippe Elie * libpp/format_output.h: * libpp/format_output.cpp: * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: handle reverse sort in sorting not in output * pp/opannotate.cpp: * pp/opreport.cpp: update according 2003-05-12 Philippe Elie * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: handle sort order as specified on command line * pp/opgprof.cpp: sort symbol is not necessary for gprof * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opannotate.cpp: use new sort API 2003-05-12 John Levon * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: partial implementation of other sort options 2003-05-12 John Levon * libpp/Makefile.am: * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: add sorting code * symbol_functors.h: move some less() into symbol_sort.cpp * libpp/profile_container.h: * libpp/profile_container.cpp: don't pass in sort option to select_symbols(), do it in caller * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: from the above 2003-05-12 John Levon * format_flags.h: remove vma64_p. Add column_flags * libpp/profile_container.h: * libpp/profile_container.cpp: pass in a struct to select_symbols. Generate hints for 64-bit VMA and multiple apps in the profile. * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: use the above 2003-05-12 John Levon * libpp/format_output.cpp: * libpp/format_flags.h: * pp/opreport.cpp: trivial renaming of flags 2003-05-11 John Levon * libpp/format_output.cpp: * libpp/format_flags.h: better output for the default of short filenames 2003-05-11 John Levon * pp/opreport.cpp: improve the app/image name column showing a bit 2003-05-11 John Levon * pp/opreport.cpp: default to -l if we were just going to show one image summary. 2003-05-11 John Levon * pp/opreport.cpp: move some code around that outputs the image summaries 2003-05-11 John Levon * libpp/format_output.h: * libpp/format_output.cpp: * pp/opreport.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: s/--short-filename/--long-filenames/ 2003-05-11 John Levon * libpp/profile_spec.h: * libpp/profile_spec.cpp: take exclude_dependent not include_dependent * pp/opannotate_options.c: * pp/opgprof_options.c: * pp/opreport_options.h: * pp/opreport_options.c: change to use exclude_dependent, remove --hide-dependent 2003-05-11 John Levon * locate_images.h: * locate_images.cpp: extra_images can now use relative paths for its search dirs. Move most of the warnings out of find_image_path, and make it also handle relative paths. Return the file even if it wasn't readable. * libpp/partition_files.cpp: give warnings when necessary. * libpp/profile_spec.h: * libpp/profile_spec.cpp: handle relative paths inside image specs, as stated in pp_interface; also use the extra images search path for resolution. * pp/opannotate_options.cpp: * pp/opreport_options.cpp: * pp/opgprof_options.cpp: changes from above 2003-05-11 John Levon * libpp/format_flags.h: source doc improvements 2003-05-11 John Levon * libpp/opp_symbol.h: move vma64_p to ... * libpp/format_flags.h: ... here 2003-05-11 John Levon * libpp/Makefile.am: * libpp/outsymbflags.h: * libpp/format_flags.h: * libpp/profile_container.h: * libpp/format_output.h: * libpp/format_output.cpp: * pp/opreport.cpp: rename outsymbflags to format_flags 2003-05-11 John Levon * profile_container.h: * profile_container.cpp: * opannotate.cpp: clean up select_filename() in a similar fashion 2003-05-11 John Levon * libpp/profile_container.h: * libpp/profile_container.cpp: * pp/opreport.cpp: * pp/opannotate.cpp: * pp/opgprof.cpp: another select_symbols() API cleanup 2003-05-11 John Levon * pp/opgprof.cpp: use select_symbols so we can handle --threshold 2003-05-11 Philippe Elie * pp/opannotate.cpp: use threshold for source output 2003-05-11 John Levon * pp/common_option.h: * pp/common_option.cpp: * pp/opannotate_options.cpp: * pp/opreport_options.cpp: make --threshold be a common option. 2003-05-11 John Levon * pp/profile_container.h: * pp/profile_container.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: clean up select_symbols interface 2003-05-11 John Levon * pp/opreport.cpp: make --threshold work for image summaries too 2003-05-11 John Levon * pp/opreport_options.cpp: fix --threshold description to match reality 2003-05-11 John Levon * libpp/partition_files.h: * libpp/partition_files.cpp: * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: rename merge_by members 2003-05-11 John Levon * pp/opreport.cpp: add some logic to not output duplicate lines for dep images when we've already shown all the possible details in the main image summary 2003-05-11 John Levon * pp/common_option.h: use std:: 2003-05-11 Philippe Elie * pp/opreport_options.cpp: move handle_threshold() * pp/common_option.h: * pp/common_option.cpp: here * pp/opannotate_options.h: * pp/opannotate_options.cpp: * pp/opannotate.cpp: handle --threshold 2003-05-10 John Levon * libop/op_mangle.h: * libop/op_mangle.c: use a temp struct for passing the mangle parameters with a set of flags. * dae/opd_sample_files.c: * daemon/opd_sample_files.c: use it 2003-05-10 John Levon * Makefile.am: * HACKING: * libop++/: * pp/Makefile.am: * libpp/Makefile.am: * libpp/op_header.h: * libpp/op_header.cpp: remove libop++ after moving op_header into libpp 2003-05-10 John Levon * libop++/op_header.cpp: make CPU info take up one line not two 2003-05-10 John Levon * libop++/Makefile.am: * libop++/op_header.cpp: * libop++/op_print_event.h: * libop++/op_print_event.cpp: remove op_print_event files, making it a function local to op_header.cpp 2003-05-10 John Levon * libop++/op_header.h: * libop++/op_header.cpp: make output_header() be an operator<< * pp/opannotate.cpp: * pp/opreport.cpp: changes from the above * libpp/profile.h: small cleanup 2003-05-10 Philippe Elie * libutil++/string_manip.h: * libutil++/string_manip.cpp: replace format_percent() by format_double() * libpp/format_output.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: use format_double() 2003-05-09 John Levon * libpp/opp_symbol.h: app name, image name should be in symbol not in file_location * libpp/format_output.cpp: * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/symbol_container.cpp: * libpp/symbol_functors.cpp: changes from above 2003-05-09 John Levon * libpp/format_output.h: * libpp/format_output.cpp: vma_64 doesn't need to be in field_datum. make one output() private 2003-05-09 John Levon * libpp/format_output.h: * libpp/format_output.cpp: pass a symbol ref not name down into the formatters 2003-05-09 John Levon * libutil++/string_manip.h: * libutil++/string_manip.cpp: sample_filename() is unused 2003-05-09 Philippe Elie * libop++/op_header.h: * libop++/op_header.cpp: read_header() new * libop++/Makefile.in: we depend on libdb * pp/opannotate.cpp: * pp/opreport.cpp: better way to get sample file header 2003-05-09 Philippe Elie * libpp/format_output.cpp: remove redundant map formater * pp/opannotate.cpp: spurious cout 2003-05-08 John Levon * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: clean up cout stuff as suggested by Phil 2003-05-08 John Levon * libpp/profile_spec.h: * libpp/profile_spec.c: rename the set_p variables, remove pointless is_empty() function * pp/opreport.cpp: split collation and output into two separate functions. Rename the temporary structures so it's hopefully a bit more obvious what's happening. Add sourcedocs. 2003-05-08 John Levon * pp/opreport_options.h: * pp/opreport_options.cpp: add options::cout, --output-file option * pp/opreport.cpp: use options::cout 2003-05-08 John Levon * pp/format_output.cpp: fix cumulative column widths 2003-05-08 John Levon * opreport_options.h: add accumulated * opreport.cpp: handle --accumulated 2003-05-08 Philippe Elie * libpp/symbol_container.cpp: minor tidy * libpp/profile.h: * libpp/profile.cpp: allow to cumulate sample file * libpp/profile_container.h: * libpp/profile_container.cpp: remove free function add_samples() * pp/annotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: when possible cumulate samples into a profile_t first before cumulating them in a profile_container 2003-05-07 John Levon * pp/opannotate.cpp: small cleanup 2003-05-07 John Levon * pp/opreport_options.cpp: remove unneeded include 2003-05-07 John Levon * libpp/Makefile.am: * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: rename to ... * libpp/profile_spec.h: * libpp/profile_spec.cpp: this. Make handle_nonoptions() be a static factory create() method instead. Make select_sample_filenames() be a member generate_file_list() instead. Concomitant cleanups. * libpp/filename_spec.h: * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: * pp/opreport_options.cpp: changes from above 2003-05-07 John Levon * libpp/profile.cpp: fix stupid error in last commit 2003-05-07 John Levon * libpp/profile.h: * libpp/profile.cpp: remove sample_filename member, bogus old spurious check, set_start_offset(). * libpp/profile_container.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: changes from above 2003-05-07 John Levon * libpp/derive_files.h: * libpp/derive_files.cpp: rename files as ... * libpp/locate_images.h: * libpp/locate_images.cpp: this. * libpp/Makefile.am: * libpp/partition_files.h: * pp/common_option.h: * pp/opgprof.cpp: * pp/opgprof_options.h: * pp/opreport_options.h: changes from above 2003-05-07 John Levon * libpp/derive_files.h: * libpp/derive_files.cpp: rework into extra_images class * libpp/partition_files.h: * libpp/partition_files.cpp: * pp/common_option.h: * pp/common_option.cpp: * pp/opannotate.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: use the above 2003-05-07 John Levon * libpp/Makefile.am: * session.h: * session.cpp: remove session.{h,cpp} 2003-05-07 Philippe Elie * pp/oprofpp.cpp pp/oprofpp_options.cpp pp/oprofpp_options.h: * pp/op_time.cpp pp/op_time_options.cpp pp/op_time_options.h: * pp/op_to_source.cpp pp/op_to_source_options.cpp: * pp/op_to_source_options.h pp/op_merge.cpp: removed files * pp/Makefile.am: update 2003-05-06 Philippe Elie * pp/opgprof.cpp: infamous typo * pp/opannotate.cpp: output sample file header 2003-05-06 Philippe Elie * libpop++/op_mangling.h: * libpop++/op_mangling.cpp: removed file * libop++/op_header.h: * libop++/op_header.cpp: new file, misc function acting on sample file header stolen from libpp/profile.(cpp|h) * libop++/op_print_event.h: typo * libop++/op_print_event.cpp: save/restore ostream state * libop++/Makefile.am: update * libop/op_sample_file.h: remove dead #define OPD_MANGLE_CHAR * libpp/profile.h: * libpp/profile.cpp: move some member function to free function in libop++/op_header.(cpp|h) * libpp/profile_container.cpp: minor call change * libpp/Makefile.am: op_merge can't be compiled currently inhibit build * libpp/opreport.cpp: output sample file header 2003-05-06 Philippe Elie * libutil++/path_filter.h: default param to empty string not "*" * libpp/symbol_functors.h: remove dead code * pp/opgprof.cpp: off by one in histsize calculation 2003-05-04 Philippe Elie * libutil/op_file.h: * libutil/op_file.c: sanitize create_path() * libutil++/path_filter.h: default ctor match all * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/sample_container.h: * libpp/sample_container.cpp: * libpp/symbol_container.h: * libpp/symbol_container.cpp: extend api to allow selecting symbol restricted to one application, ditto for retrieving samples * pp/opannotate_options.h: * pp/opannotate_options.cpp: * pp/opannotate.cpp: implement * pp/opgprof_options.h: * pp/opgprof_options.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: comment fix * pp/opreport.cpp: update to match new profile_container api 2003-05-03 Philippe Elie * pp/opreport.cpp: don't show dependent file if !--include-dependent 2003-05-02 Philippe Elie * libpp/partition_files.h: * libpp/partition_files.cpp: sort_by_image_name() new return a list of sample filename sorted by bfd image name. * libpp/profile_container.cpp: add_samples() don't build op_bfd object used here but pass it as parameters * pp/opgprof.cpp: * pp/opreport.cpp: use the above change to avoid opening multiple time a bfd object. * pp/opannotate_options.cpp: add --(include|exclude)-symbols * libpp/parse_cmdline.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: make a distinction in error message between no sample available and sample file available but no one was selected 2003-05-01 Philippe Elie * pp/opannotate_options.h: * pp/opannotate_options.cpp: * pp/opdiff.cpp: * pp/opdiff_options.h: * pp/opdiff_options.cpp: * pp/opgprof.cpp: * pp/opgprof_options.h: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: move common options handling ... * pp/common_option.h: * pp/common_option.cpp: here * pp/opannotate.cpp: add options * libpp/parse_cmdline.cpp: #include ... 2003-05-01 Philippe Elie * libpp/counter_util.h: * libpp/counter_util.cpp: remove these files from cvs * libpp/derive_files.h: * libpp/derive_files.cpp: remove dead code derive_files() + typo * libpp/parse_cmdline.cpp: select_sample_filename() throw if empty session after filtering * pp/common_option.cpp: catch invalid_argument, return failure on catched exception 2003-05-01 Philippe Elie * libutil++/op_bfd.cpp: remove _init from excluded symbol * libpp/profile_container.cpp: tidy * pp/opgprof.cpp: fix capping samples 2003-04-30 John Levon * pp/opgprof.cpp: * pp/opgprof_options.cpp: * libpp/profile.cpp: tiny cleanups, fix compile 2003-04-30 Philippe Elie * libdb/db_stat.c: minor improvement to stat, useful to track missed sample by our tools. * pp/op_report.cpp: move matching_sample_filename() to ... * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: here renamed select_sample_filename() * libpp/profile_container.h: * libpp/profile_container.cpp: expose begin() / end() from sample_container * pp/common_option.h: * pp/common_option.cpp: move option which was not really common to .. * pp/opreport_options.h: * pp/opreport_options.cpp: here * pp/opannotate_options.h: * pp/opannotate_options.cpp: and here * pp/operport.cpp: * pp/opannotate.cpp: better to return a value from main() ... * pp/opgprof_options.h: * pp/opgprof_options.cpp: * pp/opgprof.cpp: implement opgprof 2003-04-29 Philippe Elie * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: handle opreport /lib/libc-2.2.5.so, now non tag, non option argument match either an image name or lib name 2003-04-29 John Levon * libutil++/op_bfd.cpp: remove "static " inside anon namespace 2003-04-28 Philippe Elie * libpp/format_output.h: * libpp/format_output.cpp: need header tweaking * pp/opannotate.cpp: * pp/opgprof.cpp: minor tidy * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opreport.cpp: handle -no-header and --image-path 2003-04-28 Philippe Elie * libutil++/glob_filter.cpp: * libutil++/path_filter.cpp: * libutil++/string_filter.cpp: #include 2003-04-28 John Levon * libutil++/string_filter.cpp: * libutil++/string_filter.h: * libutil++/glob_filter.h: * libutil++/glob_filter.cpp: * libutil++/path_filter.h: * libutil++/path_filter.cpp: use std::find[_if], share some code 2003-04-28 Philippe Elie * libutil++/op_bfd.cpp: replace a loop by a std::copy() 2003-04-28 John Levon * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: cleanup of last fix 2003-04-28 John Levon * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: make symbol filtering happen *after* adding of artificial symbol 2003-04-28 John Levon * libutil++/string_filter.cpp: * libutil++/glob_filter.cpp: * libutil++/path_filter.cpp: match as true if include_list is empty and not excluded * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: use string_filter to filter symbols * libpp/profile_container.h: * libpp/profile_container.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opreport.cpp: changes from using string_filter 2003-04-28 Philippe Elie * pp/opreport.cpp: finish to remove use of split_sample_filename 2003-04-28 John Levon * libutil++/filename_match.h: * libutil++/filename_match.cpp: replace with ... * libutil++/Makefile.am: * libutil++/string_filter.h: * libutil++/string_filter.cpp: * libutil++/glob_filter.h: * libutil++/glob_filter.cpp: * libutil++/path_filter.h: * libutil++/path_filter.cpp: .. split up variants of the filters * libpp/parse_cmdline.cpp: use glob_filter * pp/op_to_source.cpp: use path_filter 2003-04-28 Philippe Elie * libpp/partition_files.h: * libpp/partition_files.cpp: * libpp/split_sample_filename.h: * libpp/split_sample_filename.cpp: * pp/opreport.cpp: replace some use of std::string sample_filename by a split_sample_filename struct 2003-04-28 John Levon * libutil++/filename_match.h: * libutil++/filename_match.cpp: use file-scope not private static member function 2003-04-27 Philippe Elie * libpp/format_output.h: * libpp/format_output.cpp: remove all string based output format flag * libpp/format_output.cpp: move options::demangle handling ... * libregx/demangle_symbol.cpp: here * libpp/profile_container.h: * libpp/profile_container.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opreport.cpp: handle --include-symbols 2003-04-27 Philippe Elie * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opreport.cpp: handle --threshold, remove --ignore-symbols 2003-04-27 John Levon * libpp/: minor spacing etc. 2003-04-27 Philippe Elie * libpp/outsymbflag.h: remove osf_short_xxx variant * libpp/format_output.h: * libpp/format_output.cpp: replace osf_short_xxx by a boolean * libpp/profile_container.cpp: update according * pp/opreport_options.h: export short_filename option * pp/opreport.cpp: use short_filename 2003-04-27 Philippe Elie * libpp/symbol_functors.h: add less_symbol predicate * libpp/symbol_functors.cpp: new file, less_symbol implementation * libpp/Makefile.am: symbol_functors.cpp * libpp/symbol_container.h: * libpp/symbol_container.cpp: use a node based container for symbols ensuring validity of symbol pointer over a symbol_container life time * libpp/sample_container.h: * libpp/sample_container.cpp: ditto as above for samples * libpp/profile_container.h: * libpp/profile_container.cpp: use this new api to merge symbols and sample. * libpp/format_output.h: * libpp/format_output.cpp: use new api to iterate over sample by symbol * pp/opreport.cpp: detailed output 2003-04-27 John Levon * pp/opreport.cpp: make opreport -l put largest results at the top like opreport does 2003-04-26 Philippe Elie * libpp/profile_container.h: comment * pp/opreport_options.h: more options export * pp/opreport.cpp: implement -l. Doesn't works correctly: --merge=lib 2003-04-25 Philippe Elie * pp/opreport_options.h: export global_percent * pp/opreport.cpp: finish to implement op_time like behavior. Remains to implement op_time -l 2003-04-25 Philippe Elie * libpp/partition_files.cpp: fix a crash when profile spec is empty * pp/opreport_options.cpp: bail out if no samples files are found 2003-04-25 John Levon * pp/opreport_options.cpp: --hide-dependent should have 'h' as short form. Add a FIXME for a crash 2003-04-25 Philippe Elie * libpp/partition_files.cpp: thinko in sample filename partition * pp/opreport_options.h: export more options * pp/opreport_options.cpp: add --hide-dependent, change --merge to not default to all * pp/opreport.cpp: handle --hide-dependent --include-dependent and --merge=lib. Code is ugly, tidy incoming 2003-04-25 John Levon * libpp/format_output.cpp: * libpp/format_output.h: * libpp/outsymbflag.h: "immutable" not "imutable" * libpp/partition_files.cpp: include to compile 2003-04-24 Philippe Elie * libpp/partition_files.h: typo * libpp/profile.cpp: difficult to get right result with a random value in profile::start_offset * pp/opreport_options.h: export options::reverse_sort * pp/opreport_options.cpp: bail out if we get multiple counter * pp/opreport.cpp: raw output result for application (not symbol) output. 2003-04-24 Philippe Elie * libpp/filename_spec.h: * libpp/filename_spec.cpp: * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: * libpp/split_sample_filename.h: * libpp/split_sample_filename.cpp: s/unit_mask/unitmask * libpp/merge_spec.cpp: * libpp/merge_spec.h: rename to * libpp/partition_files.h: * libpp/partition_files.cpp: here. Add and merge_option. partition_files is now a class. * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opreport.cpp: update according to the above. Add a roughly support to count samples for plain op_time opreport like 2003-04-24 John Levon * libpp/profile_container.h: * libpp/profile_container.cpp: chop off the _t of the class name * libpp/format_output.cpp: * libpp/format_output.h: * libpp/symbol_container.cpp: * libpp/symbol_container.h: * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: changes from the above 2003-04-24 John Levon * libpp/profile_container.h: * libpp/profile_container.cpp: pedantry for sample_container indices. * libpp/sample_container.h: * libpp/sample_container.cpp: various cleanups and docs. Add and use size_type. * libpp/symbol_container.h: * libpp/symbol_container.cpp: renamings. Add and use size_type. 2003-04-24 John Levon * libpp/symbol_container.h: * libpp/symbol_container.cpp: remove unused operator[]. Add some docs. Some small cleanups 2003-04-24 John Levon * libpp/symbol_container_imp.h: * libpp/symbol_container_imp.cpp: * libpp/sample_container_imp.h: * libpp/sample_container_imp.cpp: These classes weren't using the pimpl idiom, so the _imp was spurious. Remove that as well as removing the _t from the names, and rename to ... * libpp/symbol_container.h: * libpp/symbol_container.cpp: * libpp/sample_container.h: * libpp/sample_container.cpp: ...files moved from the above with new names. 2003-04-23 Philippe Elie * libutil++/generic_spec.h: minor formating tweak * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: handle_non_options(): return parse_cmdline by value * libpp/merge_spec.h: * libpp/merge_spec.cpp: new files: partition list of samples filename according to merge options. * libpp/Makefile.am: update * pp/opreport_options.cpp: more options handling, use partition_files() 2003-04-22 John Levon * pp/opreport_options.cpp: compile fix 2003-04-21 Philippe Elie * libutil++/filename_match.h: * libutil++/filename_match.cpp: add strict_match() * libutil++/generic_spec.cpp: generic_spec::set() was not setting is_all member leading to bad matching * libpp/filename_spec.cpp: minor tidy * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: fix match() * libpp/split_sample_filename.h: * libpp/split_sample_filename.cpp: handle sample file base directory * libop++/op_print_event.h: * libop++/op_print_event.cpp: * libpp/format_output.h: * libpp/format_output.cpp: * libpp/opp_symbol.h: * libpp/profile.h: * libpp/profile.cpp: * libpp/profile_container.h: * libpp/profile_container.cpp: * libpp/sample_container_imp.h: * libpp/sample_container_imp.cpp: * libpp/symbol_container_imp.h: * libpp/symbol_container_imp.cpp: * libpp/symbol_functors.h: remove all use of counter number * libpp/counter_array.h: * libpp/counter_array.cpp: * libpp/counter_profile.h: * libpp/counter_profile.cpp: no longer used, move some bits to libpp/profile.(h|cpp) and remove these files. * libpp/Makefile.am: update according * pp/op_merge.cpp: use profile_t not counter_profile_t * pp/makefile.am: correct lib for op_merge * pp/opreport_options.cpp: more options handling 2003-04-19 Philippe Elie * libopt++/popt_options.cpp: don't show help_str with --usage * libpp/format_output.cpp: typo * libutil/op_file.c: create dir with 755 not 700 * pp/common_option.cpp: source formating * libpp/parse_cmdline.h: * libpp/parse_cmdline.cpp: handle_non_options() new * pp/opreport_options.cpp: handle more options * pp/opsummary.cpp: * pp/opsummary_options.h: * pp/opsummary_options.cpp: remove, opreport should do its job. * pp/Makefile.am: update 2003-04-18 Philippe Elie * libopt++/popt_options.cpp: allow "no-" prefix to long option name implicitly specify the value must be negated * libopt++/popt_options.cpp: update doxygen documentation * libpp/format_output.h: missing #include * libpp/format_output.cpp: space + minor change * pp/opannotate_options.h: * pp/opannotate_options.cpp: * pp/opdiff_options.h: * pp/opdiff_options.cpp: * pp/opgprof_options.h: * pp/opgprof_options.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opsummary_options.h: * pp/opsummary_options.cpp: new skeleton file * pp/opannotate.cpp: * pp/opdiff.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: * pp/opsummary.cpp: update to handle options * pp/common_option.cpp: follow more closely pp_interface * pp/opsummary_options.cpp: start to handle opsummary option * pp/Makefile.am: update 2003-04-17 Philippe Elie * libpp/format_output.h: * libpp/format_output.cpp: * libpp/outsymbflag.h: * libpp/profile_container.h: * libpp/profile_container.cpp: osf_header/osf_details are no longer flags but separate boolean. 2003-04-17 Philippe Elie * dae/opd_kernel.c: * daemon/opd_kernel.c: remove leading '/' on module name fixing 2.5 module not under {kern} and similar case for "no-vmlinux" with 2.4/2.5 * libutil/op_file.c: tiny tidy 2003-04-17 Philippe Elie * libop/op_mangle.c: app_name and image was reversed, {dep} was missing 2003-04-17 John Levon * libpp/filename_spec.h: * libutil++/comma_list.h: compile fixes 2003-04-17 Philippe Elie * utils/opcontrol: better --reset handling 2003-04-16 Philippe Elie * dae works, daemon compiles but not tested. * libop/op_config.h: * libpp/op_session.h: * libpp/session.cpp: * pp/op_merge: handle new path to samples files. * libutil++/file_manip.h: * libutil++/file_manip.cpp: move create_dir(), create_path() ... * libutil/op_file.h: * libutil/op_file.c: here. Remove op_move_regular_file() * daemon/opd_image.c: * daemon/opd_sample_files.h: * daemon/opd_sample_files.c: * dae/opd_image.c: * dae/opd_sample_files.h: * dae/opd_sample_files.c: use new filename scheme * daemon/oprofiled.c: * dae/oprofiled.c: remove samples files backup stuff * libop/op_mangle.h: * libop/op_mangle.c: ugly modification to handle new samples filename * utils/opcontrol: handle new samples files path, --save and --reset are working too. * gui/oprof_start_util.cpp: use new create_path() API 2003-04-16 Philippe Elie * pp/common_option.cpp: * pp/common_option.h: * libregex/demangle_symbol.cpp: rename demangle_and_shrink to smart_demangle 2003-04-16 Philippe Elie * starting branch pp-interface-branch * Makefile.am: * configure.in: handle new sub dir libpp * libutil++/comma_list.h: new file handling of comma separated list of items. * libutil++/generic_spec.cpp: * libutil++/generic_spec.h: new file * libutil++/Makefile.am: handle new file * pp/counter_array.*: * pp/counter_profile.*: * pp/counter_util.*: * pp/derive_files.*: * pp/format_output.*: * pp/opp_symbol.h: * pp/outsymbflag.h: * pp/profile.*: * pp/profile_container.*: * pp/sample_container_imp.*: * pp/session.*: * pp/symbol_container_imp.*: * pp/symbol_functors.*: move to * libpp/*: here * libpp/filename_spec.cpp: * libpp/filename_spec.h: new file handling of pp sample filename * libpp/parse_cmdline.cpp: * libpp/parse_cmdline.h: new file, handling of command line tag:value * libpp/Makefile.am: new file build libpp.a * pp/common_option.h: * pp/common_option.cpp: common option to pp tools. Implement common entry point to pp tools. * pp/opannotate.cpp: * pp/opdiff.cpp: * pp/opgprof.cpp: * pp/opreport.cpp: * pp/opsummary.cpp: skeleton file for all pp tools. * pp/Makefile.am: remove old pp tools, add the news. 2003-04-28 Alex Tsariounov * module/ia64/op_pmu.c: fix compile 2003-04-24 Philippe Elie * module/compat22.h: add cpuid_edx when linux version < 2.2.21 2003-04-24 Dave Jones * events/x86-64.hammer.events: * events/x86-64.hammer.unit_masks: typo fixes from AMD. * module/x86/cpu_type.c: Check for APIC on Athlon before enabling it. 2003-04-15 Philippe Elie * events/i386-ht.events: all events allow only one counter, remove three events due to ESCR restriction. * events/i386.events: add some comments. * module/x86/op_model_p4.c: synch with linux 2.5 mainline - except events CTR_BPU_0 all virtual counter was not working. - Prevents a segfault when using incorrect counter number. - ESCR event select is 6 bits length not 5. - Don't fail silently in p4_setup_ctrs(). * module/x86/op_msr.h: match name used in linux. 2003-04-15 John Levon * doc/oprofile.1.in: * doc/oprofile.xml: small english fixes 2003-04-14 Philippe Elie * dae/opd_kernel.c: * dae/opd_proc.c: * dae/oprofiled.c: * utils/opcontrol: * doc/oprofile.1.in: * doc/oprofile.xml: handle --no-vmlinux * daemon/opd_kernel.c: use no-vmlinux not /no-vmlinux when user specify --no-vmlinux 2003-04-08 John Levon * HACKING: describe what happens with oprofile-www 2003-04-08 Philippe Elie * libutil++/op_bfd.cpp: check for #717720 and direct user to FAQ if detected. Note than we don't detect all symptom of this bug. 2003-04-08 Philippe Elie * libutil++/op_exception.h: op_runtime_error is no longer abstract * libregex/op_regex.h: comment and tidy * libregex/op_regex.cpp: tidy 2003-04-07 Philippe Elie * pp/op_to_source.cpp: make each line be prefixed with the samples counts. It was too hard to find samples inside previous format. 2003-04-07 Philippe Elie * libutil++/string_manip.cpp: work around for gcc 2.95 * p/op_to_source.cpp: minor cleanup 2003-04-07 John Levon * pp/op_to_source.cpp: cheat a bit to get better indentation on the default setup, by widening counter width to 7. 2003-04-07 John Levon * pp/op_to_source.cpp: append symbol summary annotations separate from the prolog samples on the same line. 2003-04-07 John Levon * pp/op_to_source.cpp: only output line 0 annotation if samples found there. 2003-04-07 John Levon * utils/opcontrol: make sure --ctrX-event=none gets noticed 2003-04-06 John Levon * libutil++/string_manip.h: * libutil++/string_manip.cpp: remove ws_prefix(). Add format_percent(). * pp/op_to_source.cpp: make each line be prefixed with the sample counts, instead of on a line above, to preserve line numbering. 2003-04-06 John Levon * pp/op_to_source.cpp: some renamings for clarity 2003-04-06 John Levon * pp/op_to_source.cpp: move extract_blank_at_begin() to ... * libutil++/string_manip.cpp: ... here, and rename as ws_prefix(). 2003-04-06 John Levon * pp/op_to_source.cpp: prefix comment lines. Output the general footer on each separate file. Output the info at the bottom when outputting separate files (towards maintaining line numbering). 2003-04-06 John Levon * pp/op_to_source.cpp: construct a file-scope cmdline string, instead of passing it around. 2003-04-06 John Levon * libregex/op_regexp.cpp: re-arrange a bit 2003-04-06 John Levon * configure.in: * all Makefile.am: don't blindly set $LIBS, use explicit mention of which libs are needed. * dae/Makefile.am: * daemon/Makefile.am: only link with C++ if needed. 2003-04-05 Philippe Elie * libop/op_config_24.h: * module/oprofile.c: * module/oprofile.c: make watermark size proportional to buffer size. 2003-04-05 Philippe Elie * libop/op_events.h: * libop/op_events.c: re-add op_min_count(); * dae/oprofiled.c: * daemon/oprofiled.c: use op_min_count() fixing #715923 2003-04-01 John Levon * libdb/Makefile.am: fix make dist * daemon/opd_cookie.h: add SPARC syscall number. The system call function is OK for sparc/sparc64 2003-03-31 Will Cohen * libdb/odb_hash.h: Renamed db_hash.h. * dae/Makefile.am: * dae/opd_image.c: * dae/opd_image.h: * dae/opd_proc.c: * dae/opd_sample_files.c: * daemon/Makefile.am: * daemon/opd_image.c: * daemon/opd_image.h: * daemon/opd_sample_files.c: * libabi/Makefile.am: * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libdb/Makefile.am: * libdb/db_debug.c: * libdb/db_hash.h: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/db_stat.c: * libdb/db_test.c: * libdb/db_travel.c: * pp/Makefile.am: * pp/counter_profile.cpp: * pp/counter_profile.h: * pp/op_merge.cpp: Change names to avoid libdb.a name conflicts. 2003-03-30 John Levon * configure.in: bump to 0.6cvs * doc/oprofile.xml: fix id. Add java etc. mention * utils/Makefile.am: * utils/op_start: * utils/op_start_25: * utils/op_stop: * utils/op_stop_25: * utils/op_dump: * utils/op_dump_25: * utils/op_session: finally remove the back compat crap * HACKING: add release-notes policy 2003-03-30 John Levon * configure.in: bump to 0.5.2 2003-03-30 John Levon * Makefile.am: remove op_arch.h for ia64 2003-03-27 John Levon * doc/oprofile.xml: several more examples and fixes 2003-03-26 John Levon From a patch by Bryan Rittmeyer. * module/oprofile.c: * module/oprofile.h: push "irq_enabled" test into arch code, don't pass struct pt_regs. * module/x86/op_arch.h: cleanups * module/x86/op_model_athlon.c: * module/x86/op_model_ppro.c: * module/x86/op_model_p4.c: * module/x86/op_rtc.c: changes from above * module/ia64/op_arch.h: remove * module/ia64/op_pmu.c: change from above 2003-03-24 John Levon * doc/oprofile.xml: document prologues, and inline functions 2003-03-24 Will Cohen * libutil/op_fileio.c (op_get_line): Use lower cost getc(). 2003-03-24 John Levon * m4/configmodule.m4: fix quoting problem for awk 2003-03-23 John Levon * configure.in: * m4/: move lots of stuff into separate .m4 files * m4/typedef.m4: improve configure message 2003-03-23 John Levon * configure.in: * m4/Makefile.am: * m4/copyifchange.m4: * m4/docbook.m4: * m4/kerneloption.m4: * m4/kernelversion.m4: * m4/resultyn.m4: move configure.in macros to m4/ 2003-03-23 John Levon * m4/ChangeLog: add comment * m4/typedef.m4: can't use AC_LANG_PUSH/POP 2003-03-23 Philippe Elie * TODO: update * m4/Makefile.am: * m4/typedef.m4: new file to get underlined type for a typedef. * configure.in: get at configure time the real underlined type for size_t and ptrdiff_t * libregex/stl.pat: move to ... * libregex/stl.pat.in: here. Use @SIZE_T_TYPE@ and @PTRDIFF_T_TYPE@ * libregex/Makefile.am: update according * libregex/.cvsignore: ignore stl.pat 2003-03-22 Philippe Elie * utils/opcontrol: use $OP_HELP not op_help * utils/op_help.c: remove short option for --get-cpu-frequency 2003-03-22 Philippe Elie * TODO: update * m4: new directory * m4/.cvsignore: new * acinclude.m4: move to * m4/qt.m4: here * m4/Makefile.am: new for EXTRA_DIST = all our .m4 * Makefile.am: * configure.in: * autogen.sh: handle m4 subdir, add -I m4 to aclocal flags 2003-03-22 Philippe Elie Suggested by John * libutil/op_cpufreq.c: typo in comment * utils/op_help.c: add --get-cpu-frequency, intentionnaly not documented. * utils/opcontrol: use op_help --get-cpu-frequency and remove ugly shell script doing the same thing. 2003-03-22 Philippe Elie * libutil/op_cpufreq.h: * libutil/op_cpufreq.c: new file exporting op_cpu_frequency() * libutil/Makefile.am: update according * utils/opcontrol: handle other arch * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: remove get_cpu_speed() * gui/oprof_start.h: * gui/oprof_start.cpp: and use instead op_cpu_frequency() * daemon/oprofiled.c: * dae/oprofiled.c: replace --cpu-speed option by a call to op_cpu_frequencey() 2003-03-20 John Levon * doc/oprofile.xml: doc some 2.5 module stuff 2003-03-20 John Levon * utils/opcontrol: fix opcontrol --dump to do something * daemon/opd_image.c: give a printf when reading the buffer. 2003-03-19 Philippe Elie * libutil++/op_bfd.cpp: correct get_vma_range() * pp/oprofpp.cpp: do_dump_gprof() this time it's right! 2003-03-18 John Levon * pp/profile.cpp: improve mtime warning for 2.5 modules 2003-03-18 John Levon * pp/derive_files.cpp: some more 2.5 modules derivation fixes 2003-03-18 Philippe Elie * pp/derive_files.cpp: fix handling of 2.5 module name 2003-03-18 John Levon * daemon/opd_image.c: * libop/op_interface_25.h: rename to MODULE_LOADED_CODE 2003-03-18 Philippe Elie * TODO: update * pp/derive_files.cpp: special to retrieve 2.5 module 2003-03-18 Philippe Elie * TODO: update * pp/symbol_container_imp.h: * pp/symbol_container_imp.cpp: * pp/profile_container.h: * pp/profile_container.cpp: find(string symbol_name) return a vector of symbol rather a a single symbol * pp/oprofpp.cpp: use above change so oprofpp -s will show all symbol with the same name. * pp/symbol_functors.h: remove unused functors equal_symbol_by_name 2003-03-17 Philippe Elie * TODO: update * libutil/op_fileio.h: * libutil/op_fileio.c: op_write_u64() new * libutil/op_types.h: continue our silly typedef: add u64 * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: op_bfd::arch_bits_per_address() new allowing to get, on a per-binary basis, the vma size. * pp/oprofpp.cpp: fix 64 bits arch gprof output. Fix multiplier and get the multiplier of gprof file at runtime. Fix a very old bug where we credit the samples to previous gprof bin having the effect than sample at start of function was credited to the previous function 2003-03-17 John Levon * daemon/opd_kernel.c: * daemon/opd_kernel.h: * daemon/opd_image.c: * daemon/oprofiled.c: don't try to reread the module list on a failed EIP match. We must have the module load notification instead. 2003-03-17 John Levon * daemon/opd_kernel.c: fix module accounting. Remove quick-drop code that can't work. * doc/oprofile.1.in: * doc/oprofile.xml: english tweaks 2003-03-17 Philippe Elie * TODO: update * doc/oprofile.1.in: * doc/oprofile.xml: remove documentation about -P, update doc about -p * pp/derive_files.h: * pp/derive_files.cpp: check_image_name(), add_to_alternate_filename() functions moved from op_time.cpp * pp/op_time_options.h: * pp/op_time_options.cpp: * pp/op_time.cpp: remove -P option, minor cleanup * pp/oprofpp_options.h: * pp/oprofpp_options.cpp: * pp/oprofpp.cpp: add -p option, minor cleanup * pp/op_to_source.cpp: minor cleanup 2003-03-16 Philippe Elie * utils/opcontrol: check return code for --ctr??-event=none 2003-03-16 Philippe Elie * gui/oprof_start.cpp: check for --separate=xxxx in the right order. Old code do: if user set separate=library and separate=kernel only separate=library was taken by opcontrol 2003-03-16 Philippe Elie * configure.in: typo 2003-03-16 John Levon * configure.in: more docbook macro fixes 2003-03-15 Philippe Elie * libutil/op_libiberty.h: cut&paste typo breaking compilation on box w/o libiberty.h * daemon/opd_image.c: remove bogus fprintf. compilation was broken on alpha. * configure.in: xsltproc checking fix, was always accepted even on box where xsltproc is not installed 2003-03-15 Philippe Elie * TODO: update * Makefile.am: add ChangeLog-2002 in dist files * all Makefile.am: put one item by line for most xxxx = blah * doc/CodingStyle: rationale for the above change 2003-03-15 Philippe Elie * libop/op_events.c: minor cleanup 2003-03-15 Dave Jones * module/x86/op_nmi.c: Remove stale debug code from yesterdays commit. 2003-03-15 Philippe Elie * configure.in: add checking for existence of xmemdup() * libutil/Makefile.am: * libutil/op_string.h: * libutil/op_string.c: new, a few C string handling function * libutil/op_libiberty.h: * libutil/op_libiberty.c: xmemdup() new. * libop/op_events.h: * libop/op_events.c: tidy parser. Add op_free_events(). Fix minor buglet. * dae/oprofiled.c: * daemon/oprofiled.c: fix memleak from parsing events files * gui/Makefile.am: * pp/Makefile.am: fix lib ordering, now libop depend on libutil * utils/op_help.c: error message if invalid cpu type. Fix op_help when using timer interrupt. 2003-03-14 Andi Kleen * module/x86/op_nmi.c: Fix another possible race condition. 2003-03-14 Philippe Elie * TODO: update * libregex/stl.pat: support for rb tree, set/map, anonymous namespace. Fix incorrect pattern for gcc 3.2. Handle 2.95 vector/string iterator and a few stl free function handling. add all C++ base type. * libregex/mangled-name.txt: test for the above change 2003-03-14 Philippe Elie * gui/oprof_start.cpp: gcc 2.91 warning work around 2003-03-14 Philippe Elie * libop/op_events.c: fix a daemon segfault depending on the used libc version, added 2003-03-04 (0.5.1 is ok) 2003-03-13 Dave Jones * events/x86-64.hammer.events: Remove duplicate minimum tag from RETIRED_INSNS counter. 2003-03-11 John Levon * module/ia64/op_pmu.c: include op_arch.h not arch.h 2003-03-10 Philippe Elie * configure.in: remove unsupported --warnnet, fix docbook root dir test * doc/oprofile.xml: typo 2003-03-10 John Levon * doc/Makefile.am: * configure.in: * doc/xsl/catalog-1.xml.in: more docbook changes 2003-03-10 John Levon * configure.in: * doc/Makefile.am: * doc/xsl/xhtml.xsl: * doc/xsl/xhtml-chunk.xsl: * doc/xsl/catalog-1.xml.in: Use a catalog for finding the XSL, so we only have one .in file now. 2003-03-08 Will Cohen * doc/Makefile.am: Correct path for htmldir. 2003-03-08 John Levon * libop/op_cpu_type.c: improve error message * utils/op_help.c: show CPU name in events list. Show CPU pretty name in op_help --get-cpu-type. 2003-03-08 John Levon * configure.in: specify distcheck ./configure flags. Add version.h to distclean. * doc/Makefile.am: * doc/xsl/xhtml-1.in: * doc/xsl/xhtml-chunk-1.in: fix make distcheck 2003-03-08 Philippe Elie * doc/xsl/.cvsignore: update * module/x86/cpu_type.c: is not necessary 2003-03-07 John Levon * README: document autogen.sh 2003-03-07 Philippe Elie * TODO: update * doc/xsl/xhtml.xsl.in: move to * doc/xsl/xhtml-1.xsl.in: here * doc/xsl/xhtml-chunk.xsl.in: move to * doc/xsl/xhtml-chunk-1.xsl.in: here * doc/Makefile.am; update according * configure.in: avoid to touch doc/xsl generated files 2003-03-07 Philippe Elie * TODO: update * daemon/opd_image.c: * daemon/op_stats.c: * daemon/opd_stats.h: add statistics for nil image whilst receiving user space samples. 2003-03-06 Philippe Elie * TODO: update * libdb/db_hash.h: * libdb/db_insert.c: get error message from db_insert() * libdb/db_test.c: * dae/opd_proc.c: * daemon/opd_image.c: * libabi/abi_test.cpp: * libabi/op_import.cpp: * pp/op_merge.cpp: update according to the new api 2003-03-06 John Levon * doc/oprofile.xml: pedantry 2003-03-06 Philippe Elie * TODO: update * doc/oprofile.1.in: * doc/oprofile.xml: document --smart-demangle 2003-03-06 Philippe Elie * module/ia64/op_pmu.c: * module/x86/op_nmi.c: remove #include 2003-03-06 John Levon * utils/opcontrol: sh != C. This is the last opcontrol bug, honest ! OK, maybe not. 2003-03-06 Philippe Elie * TODO: update * gui/oprof_start.cpp: save_config() gcc 2.95.3 warning work-around 2003-03-05 John Levon * utils/opcontrol: Make --setup optional (e.g. opcontrol --no-vmlinux). Fix a bug in the --setup exclusive arg testing. * doc/oprofile.xml: reflect the above 2003-03-05 John Levon * libutil++/string_manip.h: * libutil++/string_manip.cpp: cleanup, use s.find because older gcc's don't have the right s.compare 2003-03-04 John Levon * utils/opcontrol: only sleep 2 after dump on 2.4 2003-03-04 John Levon * configure.in: tweak the xsltproc test 2003-03-04 John Levon * configure.in: * doc/Makefile.am: don't try to build the docs if it will fail. 2003-03-04 John Levon * utils/opcontrol: * daemon/opd_kernel.h: * daemon/opd_image.c: * daemon/opd_kernel.c: * daemon/oprofiled.c: implement --no-vmlinux. Remove back compat for is_kernel. * gui/uioprof_start.base.ui: * gui/oprof_start.cpp: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: support the above * doc/oprofile.1.in: * doc/oprofile.xml: doc the above 2003-03-04 John Levon * utils/opcontrol: allow --version, --help early on 2003-03-04 John Levon * libop/op_events.c: alter the parser to give file/linenr on error, and handle more whitespace. 2003-03-04 John Levon * gui/oprof_start.cpp: * gui/oprof_start.h: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * libutil++/string_manip.h: * libutil++/string_manip.cpp: add is_prefix(), make the trimmers take an argument 2003-03-04 John Levon * gui/oprof_start.cpp: * gui/oprof_start.h: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/persistent_config.h: * libutil++/string_manip.h: * libutil++/string_manip.cpp: add split(), tobool(), touint() * utils/opcontrol: don't write BUF_SIZE twice. Write RTC_VALUE properly. Write KERNEL_ONLY 2003-03-03 John Levon * gui/oprof_start.cpp: use --ctrX-event=none, --separate=none. --pid/pgrp-filter=0 was already being done. 2003-03-03 John Levon * doc/oprofile.1.in: * doc/oprofile.xml: * doc/opcontrol: add --ctrX-event=none 2003-03-03 Will Cohen * gui/oprof_start.cpp (oprof_start::on_start_profiler): Limit check to only utm_bitmask. 2003-03-03 Will Cohen * events/ia64.itanium2.events: * events/ia64.itanium2.unit_masks: Add Itanium 2 events. 2003-03-03 Will Cohen * libop/op_events.h: * libop/op_events.c: Correct checking for the number of unit masks. 2003-03-03 John Levon * doc/oprofile.1.in: * doc/oprofile.xml: another round of cleanups * pp/op_merge.cpp: --counter not --use-counter, for consistency 2003-03-03 John Levon Patch from Chris Moller, modified. * dae/opd_proc.c: * dae/opd_sample_files.c: * daemon/opd_image.c: * daemon/opd_sample_files.c: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libdb/db_hash.h: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/db_test.c: * pp/counter_profile.cpp: * pp/op_merge.cpp: push asserts in libdb down into the clients. 2003-03-03 John Levon * doc/oprofile.xml: * doc/oprofile.1.in: * utils/opcontrol: add --separate=none, --pid/pgrp-filter=non 2003-03-03 John Levon * configure.in: * doc/Makefile.am: * doc/oprofile.xml: * doc/xsl/xhtml-chunk.xsl.in: * doc/xsl/xhtml.xsl.in: * doc/xsl/xhtml-common.xsl: Add version to the docs. Some doc cleanups 2003-03-02 John Levon * utils/opcontrol: --separate=library should turn kernel off 2003-03-02 John Levon * events/Makefile.am: fix uninstall 2003-03-02 John Levon * doc/oprofile.xml: more re-workings prodded by aeb 2003-03-02 John Levon * daemon/opd_kernel.c: remove /proc/ksyms reading 2003-03-02 John Levon * libutil/op_fileio.c: change op_get_line to return NULL on EOF. Also bump up the default allocation some. * dae/opd_kernel.c: * dae/opd_parse_proc.c: * daemon/opd_kernel.c: * libop/op_events.c: changes from the above 2003-03-02 John Levon * configure.in: * Makefile.am: * events/: add text files describing the CPU counters and unit masks. Install them. * libop/op_events.h: * libop/op_events.c: remove the bletcherous hard coded descriptions. * module/ia64/op_pmu.c: * module/x86/op_nmi.c: remove another big of validation * libutil/op_list.h: make C++ friendly * libop/op_cpu_type.h: * libop/op_cpu_type.c: add op_get_cpu_name() * libop/Makefile: * libop/op_events_desc.h: * libop/op_events_desc.cpp: removed * libop++/op_print_event.cpp: * utils/Makefile.am: * utils/op_help.c: * gui/oprof_start.h: * gui/oprof_start.cpp: changes from above 2003-03-01 John Levon * doc/oprofile.xml: tweaks * utils/opcontrol: scale the default event count. Please test ... 2003-03-01 John Levon * utils/opcontrol: setup default events. Allow part-setting using --setup. Fix a help text. * doc/oprofile.xml: changes from the above 2003-03-01 John Levon * libop/op_cpu_type.c: fix alpha/ev4 mis-detection 2003-03-01 John Levon * doc/oprofile.xml: expand intro a little, small fixes 2003-03-01 John Levon * pp/format_output.cpp: use "%" not "%-age" 2003-02-28 John Levon * utils/opcontrol: fix IS_TIMER setting, noticed by Duncan Sands 2003-02-28 John Levon * configure.in: bump to 0.6cvs 2003-02-28 John Levon * doc/Makefile.am: tweak * libregex/Makefile.am: fix make dist 2003-02-27 John Levon * configure.in: bump to 0.5.1 2003-02-27 John Levon * doc/oprofile.xml: clarify --separate=kernel 2003-02-25 John Levon * configure.in: clarify --with-kernel-support * libop/op_events.c: * module/x86/op_nmi.c: * module/ia64/op_nmi.c: remove sanity checking - it's the wrong place to have such code, is a barrier to op_events cleanup, and makes life harder for NDAers. 2003-02-25 Will Cohen * utils/opcontrol (do_deinit): Correct search for /dev/oprofile. 2003-02-24 Dave Jones * module/x86/op_apic.[c|h]: move NMI gate setup to architecture specific SET_NMI_GATE macro. x86=no change. Make x86-64 use the kernels _set_gate instead of its own open coded variant. 2003-02-23 John Levon * version-1.h.in: another rename 2003-02-23 John Levon * configure.in: set up OP_DATADIR and OP_BINDIR * gui/oprof_start.cpp: * libregex/demangle_symbol.cpp: use the above * version_tpl.h.in: move to ... * version.h.in.in: ... here 2003-02-23 Philippe Elie * TODO: update * configure.in: add AX_COPY_IF_CHANGE() use it to generate version.h * .cvsignore: update * gui/Makefile.am: * gui/oprof_start.cpp: * libregex/Makefile.am: * libregex/demangle_symbol.cpp: don't use -DBINDIR, rather include version.h to get install path 2003-02-23 John Levon * README: quick start build insns 2003-02-23 Philippe Elie * TODO: update * libregex/Makefile.am: install stl.pat in $prefix/share/oprofile * libregex/demangle_symbol.cpp: use DATADIR not BINDIR * libregex/magle-name.txt: add test for pointer * libregex/stl.pat: partial support for pointer 2003-02-23 John Levon * autogen.sh: error out if options passed 2003-02-23 John Levon * libregex/op_regex.h: * libregex/regex_test.cpp: fix std:: 2003-02-23 Philippe Elie * libutil++/demangle_symbol.cpp: * libutil++/demangle_symbol.h: move to * libregex/demangle_symbol.cpp: * libregex/demangle_symbol.h: here to avoid circular reference between libutil++ and libregex * libregex/Makefile.am: * libutil++/Makefile.am: update according to file move * pp/Makefile.am: * pp/op_time.cpp: * pp/op_time_options.cpp: * pp/op_to_source.cpp: * pp/op_to_source_options.cpp: * pp/oprofpp.cpp: * pp/oprofpp_options.cpp: add -D --Demangle options enabling C++ demangled name filtering. 2003-02-23 Philippe Elie * libutil++/string_manip.h: * libutil++/string_manip.cpp: trim(), ltrim(), rtrim() new functions * Makefile.am: handle libregex directory * configure.in: handle libregex/Makefile * libregex/.cvsignore: * libregex/Makefile.am : * libregex/mangled-name.txt: * libregex/op_regex.cpp: * libregex/op_regex.h: * libregex/regex_test.cpp: * libregex/stl.pat: new file implementing a match and replace regular expression around glibc regex. Not used for now, next commit will use this for pp tools C++ name demangling. 2003-02-22 John Levon * configure.in: fix X, non-Qt build case 2003-02-22 John Levon * libutil++/Makefile.am: fix make dist 2003-02-21 Dave Jones * configure.in: Enable building on hammer again. 2003-02-21 John Levon * utils/opcontrol: "Params used" was lying 2003-02-20 John Levon * daemon/opd_image.c: Fixed a bitch of a bug with separate-kernel, now attribution of kernel samples should be more accurate 2003-02-20 John Levon * utils/opcontrol: set LIB_SAMPLES if KERNEL_SAMPLES in .daemonrc 2003-02-20 John Levon * dae/opd_stats.h: * dae/opd_stats.c: * daemon/opd_stats.h: * daemon/opd_stats.c: * dae/opd_proc.c: * daemon/opd_image.c: remove unused OPD_SAMPLE_COUNTS. Actually count samples for 2.5 2003-02-20 John Levon * libop/op_interface_25.h: * daemon/opd_kernel.c: implement module dropping * daemon/opd_image.c: * daemon/opd_kernel.c: attempt to make verbose logs less confusing 2003-02-22 Dave Jones * libop/op_events.c: segregload is utm_mask not utm_exclusive 2003-02-20 Philippe Elie * TODO: update * pp/output_format.h: * pp/output_format.cpp: * pp/op_time.cpp: * pp/oprofpp.cpp: * pp/opp_symbol.h: better handling of 64/32 bits bfd_vma in output 2003-02-20 John Levon * libutil++/op_exception.h: * libutil++/op_exception.cpp: throw() where needed 2003-02-19 Philippe Elie * TODO: update * daemon/opd_image.h: * daemon/opd_image.cpp: * daemon/opd_kernel.cpp: fix thinko with --separate=kernel resulting in duplicate opening of the same samples file. 2003-02-19 Philippe Elie * libutil++/op_exception.h: * libutil++/op_exception.cpp: new files, base class for exception. Not used for now. 2003-02-19 John Levon * acinclude.m4: update from upstream * gui/ui/oprof_start.base.ui: * gui/oprof_start.cpp: separate --setup,--start. Hide non-2.5 stuff in 2.5. 2003-02-18 Philippe Elie * TODO: update * dae/opd_sample_files.c: * daemon/opd_sample_files.c: opd_handle_old_sample_file() don't try to delete old samples files if they don't exist. 2003-02-18 Will Cohen * utils/opcontrol (do_options): Better option error checking. 2003-02-17 Will Cohen * pp/format_output.h (show_help): namespace std. 2003-02-17 Will Cohen * TODO: update. 2003-02-17 Philippe Elie From Anton Blanchard : * daemon/opd_image.c: cookie_t fix for 64 bits 2003-02-17 Philippe Elie * TODO: update * libopt++/popt_options.cpp: * libopt++/popt_options.h: handle an user specific additional help string * pp/output_format.h: * pp/output_format.cpp: * pp/op_time_options.cpp: * pp/oprofpp_options.cpp: use it to show in --output_format options details. 2003-02-14 Philippe Elie * doc/oprofile.1.in: * doc/oprofile.xml: * pp/oprofpp_options.cpp: allow --show-shared-libs with -s 2003-02-13 Philippe Elie * TODO: update * pp/output_format.h: * pp/output_format.cpp: fix #686272, crash when using oprofpp -s symb_name. 2003-02-13 Philippe Elie * dae/opd_kernel.h: * dae/opd_image.h: * dae/opd_image.c: don't use hash entry zero for kernel image fix #686175 2003-02-13 Will Cohen * daemon/opd_cookie.h(opd_nr_lookup_dcookie): Correct number. 2003-02-13 Will Cohen * daemon/opd_cookie.h(opd_nr_lookup_dcookie): Add x86_64. 2003-02-13 John Levon * dae/opd_image.c: little cleanup and fix error message to not lie 2003-02-12 Philippe Elie * doc/oprofile.1.in: * doc/oprofile.xml: enhance doc about --separate=kernel * utils/opcontrol: handle gracefully opcontrol --deinit if profiler was already shutdown. Avoid wrong warning when umount /dev/oprofile 2003-02-12 Will Cohen * gui/oprof_start.cpp (oprof_start::oprof_start, oprof_start::on_flush_profiler_data, oprof_start::on_start_profiler, oprof_start::on_stop_profiler): Use opcontrol. * gui/oprof_start_util.cpp (daemon_status::daemon_status): Allow reading interrupt info from new kernel interface. * libop/op_get_interface.c: New. * libop/Makefile.am: Add libop/op_get_interface.c. * libop/op_cpu_type.h: Add enum op_interface. I Added some bits. Phil * gui/oprof_start.cpp: correct --separate= handling * gui/oprof_start_util.cpp: read only the real number of interrupts 2003-02-12 Philippe Elie * utils/opcontrol: handle --note-table-size --kernel-only (2.4 kernel) 2003-02-12 Philippe Elie * utils/op_start: map --separate-samples to daemon option --separate-lib-samples. 2003-02-11 Philippe Elie * dae/opd_image.c: * dae/opd_kernel.c: * dae/opd_kernel.h: * dae/opd_parse_proc.c: * dae/opd_proc.c: * dae/opd_proc.h: * dae/opd_sample_files.c: * dae/oprofiled.c: * daemon/opd_image.c: * daemon/opd_image.h: * daemon/opd_kernel.c: * daemon/opd_kernel.h: * daemon/opd_sample_files.c: * daemon/oprofiled.c: per application kernel samples files * doc/oprofile.1.in: * doc/oprofile.xml: document opcontrol --separate=kernel * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: remove ignore_daemon checkbox, handle --separate=[library|kernel] * libop/op_sample_file.h: add separate_kernel_samples field, file format is backward compatible * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: handle new samples file header field * pp/counter_profile.cpp: dump new sample files header field. * utils/opcontrol: handle --separate=kernel 2003-02-09 Will Cohen * utils/opcontrol: Add rtc-value option. 2003-02-09 John Levon * utils/opcontrol: stale lock file detection 2003-02-06 Will Cohen * utils/opcontrol (do_dump): Do not exit if no daemon. 2003-02-06 Will cohen * doc/oprofile.1.in: Update man page information. 2003-02-03 John Levon * configure.in: 0.6cvs 2003-02-02 John Levon * configure.in: bump to 0.5 2003-02-02 John Levon * configure.in: disable x86_64 2003-02-02 John Levon * pp/format_output.cpp: revert previous patch, Phil's x86 binutils is built with 64-bit bfd_vma 2003-02-01 John Levon * utils/opcontrol: rename --separate-samples to --separate=library for future proofing. * pp/format_output.cpp: output vma at a suitable width 2003-01-31 Will Cohen * utils/opcontrol(get_kernel_range): Match only .text segment. 2003-01-31 Graydon Hoare * libabi/abi.cpp * libabi/abi_test.cpp * libabi/op_import.cpp: Treat endianness as a property of the datum being imported, rather than the memory architecture. 2003-01-31 Dave Jones * module/x86/op_model_athlon.c: Don't poke reserved bits in the counter. Only rdmsr/wrmsr counters that we've enabled in the NMI handler. ulong->uint conversion. 2003-01-30 Philippe Elie From Randolph Chung : * daemon/opd_cookie.h: add parisc support 2003-01-30 John Levon From Anton Blanchard : * daemon/opd_cookie.h: add ppc32/64 * utils/op_start_25: fix start of kernel for ppc 2003-01-30 Will Cohen * utils/opcontrol(get_kernel_range): Avoid using perl arithmetic. 2003-01-29 Dave Jones * utils/opcontrol: Trying to use the options --pid-filter=pid and --pgmr-filter=pgmr, opcontrol returned "command not found. This was due to 2 missing 'test' statements. 2003-01-29 Philippe Elie * pp/op_to_source.cpp: read vma with strtoull not strtoul fixing 32/64 failure to read output of objdump 2003-01-29 Dave Jones * libop/op_cpu_type.c: Clue the user in on why the cpu type isn't recognised, by suggesting the module wasn't loaded. * libop/op_events.c: Doh, unit masks use bit numbers, not values. 2003-01-28 Philippe Elie * utils/op_help.c: get cpu type only if not forced on command line. Avoid wrong warning about unsupported cpu type. 2003-01-27 Will Cohen * daemon/opd_cookie.h(opd_nr_lookup_dcookie): Add ia64 version. 2003-01-27 Dave Jones * libop/op_events.c: K8 HT events are utm_exclusive, not utm_bitmask * libop/op_events.c: Add additional K8 unit masks. 2003-01-23 Philippe Elie * libop/op_interface_25.h: * daemon/opd_image.c: prepare drop modules support. exit() when receiving unknown escape code. 2003-01-23 Randolph Chung Added minor change: backward compatibility, u_int to uint, fix 32/64 bits escape code marker comparison. Phil * libop/op_interface_25.h: * daemon/opd_kernel.c: * daemon/opd_image.c: new scheme to recognize kernel or user space eip, now kernel module pass the relevent information through escape sequence. 2003-01-21 Dave Jones * libop/op_events.c: Add unit mask for Hypertransport events. 2003-01-21 Dave Jones * libop/op_events.c: Add x86-64 specific events. 2003-01-21 Philippe Elie * daemon/opd_kernel.c: use sscanf to parse /proc/modules 2003-01-20 Philippe Elie * daemon/opd_kernel.c: more robust /proc/modules parsing. 2003-01-20 Philippe Elie * daemon/opd_kernel.c: 2.5 modules support, for now I keep the code for /proc/ksyms parsing in daemon. Let's it living a few weeks please. 2003-01-18 Falk Hueffner I added to the original patch all %L to %ll, Phil * daemon/opd_image.c: * daemon/opd_kernel.c: * libutil/op_types.h: 64 bits printf/scanf safety. 2003-01-18 Falk Hueffner * libop/op_cpu_type.h: * libop/op_cpu_type.c: add Alpha CPU families. * libop/op_events.h: make op_event.cpu_mask u32, since we now have more than 16 CPU types * libop/op_hw_config.h: bump OP_MAX_COUNTERS to 20 for Alpha * libop/op_events.c: add Alpha events * daemon/opd_cookie.h: add dcookie syscall number for Alpha * utils/op_help.c (main): add help string for Alpha 2003-01-18 John Levon * module/Makefile.in: * module/x86/Makefile.in: * module/ia64/Makefile.in: kernel headers are too fubar for -Werror. So I'm taking my ball home. 2003-01-17 John Levon * HACKING: * doc/CodingStyle: add 2003-01-17 John Levon * TODO: some updates 2003-01-15 Philippe Elie * module/x86/op_model_p4.c: pmc_setup_one_p4_counter() show clearly than event == 0 is an error 2003-01-15 John Levon * utils/opcontrol: prefer oprofiled/op_help binaries in the same dir as opcontrol 2003-01-12 Philippe Elie * libop/op_events.c: rename OP_P4_HT2 to OP_P4_ALL 2003-01-12 Philippe Elie * libop++/op_print_event.cpp: no event,nor unit mask for CPU_TIMER_INT, problem reported by Ka Fai Lu. 2003-01-12 John Levon From Graydon Hoare * libop/op_cpu_type.h: * libop/op_cpu_type.c: add P4 HT * libop/op_events.c: tag P4 HT events 2003-01-11 Randolph Chung * daemon/oprofiled.c: fix ELF sniff 2003-01-11 John Levon * daemon/opd_image.c: bail out immediately on dcookie lookup failure. 2003-01-10 John Levon * daemon/opd_cookie.h: insulate against missing arch support for sys_lookup_dcookie * daemon/opd_image.c: use the above 2003-01-10 John Levon * daemon/opd_image.c: * daemon/oprofiled.c: move complete_dump to a better place 2003-01-10 John Levon * libutil/op_types.h: add cookie_t and vma_t * daemon/opd_image.c: * daemon/opd_image.h: * daemon/opd_kernel.c: * daemon/opd_kernel.h: use above types, and kernel_pointer_size * daemon/oprofiled.c: sniff /proc/kcore for kernel_pointer_size 2003-01-10 Philippe Elie * libopt++/popt_options.cpp: * libopt++/popt_options.h: work-around to support both gcc new parser and gcc 2.95 2003-01-08 John Levon * libop/op_type.cpp: support for ascii-string cpu types 2003-01-08 Philippe Elie * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * pp/oprofpp.cpp: more use of bfd_vma 2003-01-08 Philippe Elie * libdb/Makefile.am: fix include dir * libdb/db_test.c: don't assume than sizeof(struct opd_header) == 128 2003-01-06 Philippe Elie * libutil++/op_bfd.h: fix for 64 bits. 2003-01-06 Philippe Elie * libabi/abi.cpp: * libabi/op_import.cpp: broken by my last change in libdb. 2003-01-06 Philippe Elie * db/db_hash.h: do_hash() use db_key_t as parameter 2003-01-04 John Levon * pp/op_time.cpp: suggest opcontrol --dump instead * utils/opcontrol: implement --start-daemon. Fix a number of bugs * doc/oprofile.xml: * doc/oprofile.1.in: document --start-daemon 2003-01-03 Will Cohen * daemon/oprofiled.c (opd_do_samples): Typecast to match arguments. See ChangeLog-2002 for earlier changelogs. oprofile-1.3.0/config.h.in0000664000175000017500000000613513323172177012313 00000000000000/* config.h.in. Generated from configure.ac by autoheader. */ /* whether popt prototype takes a const char ** */ #undef CONST_POPT /* Define to 1 if you have the declaration of `basename', and to 0 if you don't. */ #undef HAVE_DECL_BASENAME /* Define to 1 if you have the header file. */ #undef HAVE_DLFCN_H /* Define to 1 if you have the header file. */ #undef HAVE_INTTYPES_H /* Define to 1 if you have the `iberty' library (-liberty). */ #undef HAVE_LIBIBERTY /* Define to 1 if you have the header file. */ #undef HAVE_LIBIBERTY_H /* Define to 1 if libpfm is available */ #undef HAVE_LIBPFM /* Define to 1 if using libpfm3; 0 if using newer libpfm */ #undef HAVE_LIBPFM3 /* Define to 1 if you have the `popt' library (-lpopt). */ #undef HAVE_LIBPOPT /* Define to 1 if you have the header file. */ #undef HAVE_MEMORY_H /* Define to 1 if you have the `perfmonctl' function. */ #undef HAVE_PERFMONCTL /* Kernel support for perf_events exists */ #undef HAVE_PERF_EVENTS /* PERF_RECORD_MISC_GUEST_KERNEL is defined in perf_event.h */ #undef HAVE_PERF_GUEST_MACROS /* precise_ip is defined in perf_event.h */ #undef HAVE_PERF_PRECISE_IP /* Define to 1 if you have the `sched_setaffinity' function. */ #undef HAVE_SCHED_SETAFFINITY /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H /* Define to 1 if you have the header file. */ #undef HAVE_STDLIB_H /* Define to 1 if you have the header file. */ #undef HAVE_STRINGS_H /* Define to 1 if you have the header file. */ #undef HAVE_STRING_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_STAT_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_TYPES_H /* Define to 1 if you have the header file. */ #undef HAVE_UNISTD_H /* Define to 1 if you have the `xcalloc' function. */ #undef HAVE_XCALLOC /* Define to 1 if you have the `xmemdup' function. */ #undef HAVE_XMEMDUP /* Define to the sub-directory where libtool stores uninstalled libraries. */ #undef LT_OBJDIR /* whether malloc attribute is understood */ #undef MALLOC_ATTRIBUTE_OK /* package binary directory */ #undef OP_BINDIR /* package data directory */ #undef OP_DATADIR /* Name of package */ #undef PACKAGE /* Define to the address where bug reports for this package should be sent. */ #undef PACKAGE_BUGREPORT /* Define to the full name of this package. */ #undef PACKAGE_NAME /* Define to the full name and version of this package. */ #undef PACKAGE_STRING /* Define to the one symbol short name of this package. */ #undef PACKAGE_TARNAME /* Define to the home page for this package. */ #undef PACKAGE_URL /* Define to the version of this package. */ #undef PACKAGE_VERSION /* Define to 1 if you have the ANSI C header files. */ #undef STDC_HEADERS /* Synthesize special symbols when needed */ #undef SYNTHESIZE_SYMBOLS /* whether bfd.h defines bool values */ #undef TRUE_FALSE_ALREADY_DEFINED /* Version number of package */ #undef VERSION /* Define to 1 if the X Window System is missing or not being used. */ #undef X_DISPLAY_MISSING oprofile-1.3.0/autogen.sh0000775000175000017500000000200012534404406012250 00000000000000#!/bin/sh # run to generate needed files not in Git repository # NB: if you run this file with AUTOMAKE, AUTOCONF, etc. environment # variables set, you *must* run "configure" with the same variables # set. this is because "configure" will embed the values of these variables # into the generated Makefiles, as @AUTOMAKE@, @AUTOCONF@ etc. and it will # trigger regeneration of configuration state using those programs when any # of Makefile.am etc. change. run() { echo "Running $1 ..." $1 } set -e ACLOCAL=${ACLOCAL:-aclocal} AUTOHEADER=${AUTOHEADER:-autoheader} AUTOMAKE=${AUTOMAKE:-automake} AUTOCONF=${AUTOCONF:-autoconf} if $AUTOMAKE --version | grep -q " 1.4$" then echo "" echo "Automake 1.4 not supported. please set \$AUTOMAKE" echo "to point to a newer automake, or upgrade." echo "" exit 1 fi if test -n "$1"; then echo "autogen.sh doesn't take any options" >&2 exit 1 fi libtoolize --automake -c run "$ACLOCAL -I m4" run $AUTOHEADER run "$AUTOMAKE --foreign --add-missing --copy" run $AUTOCONF oprofile-1.3.0/ChangeLog-20020000664000175000017500000034016012534404406012416 000000000000002002-12-21 John Levon * Makefile.am: list module files explicitly, needed for make dist from separate objdir * configure.in: make both x86/ and ia64/ changelogs 2002-12-21 John Levon * module/Makefile.am: * configure.in: remove the ln -s arch in favour of using -I and AC_SUBST * module/ia64/arch.h: * module/x86/arch.h: rename to op_arch.h * utils/Makefile.am: fix make uninstall 2002-12-21 John Levon * utils/Makefile.am: fix back-compat scripts install for 2.5 kernel 2002-12-19 Will Cohen * utils/opcontrol: Revise kernel range computation. 2002-12-19 Philippe Elie * pp/op_time.cpp: minor formating fix * pp/oprofpp.cpp: fix #656123 corner case with --separate-sample 2002-12-17 John Levon * configure.in: remove oprof_report - breaks make dist 2002-12-17 Philippe Elie * libdb/*.c *.h: * libutil/op_fileio.c: * dae/opd_proc.c: doxygen comment fix 2002-12-16 Philippe Elie * module/ia64/op_syscalls.c: * module/x86/hammer_op_syscalls.c: * module/x86/op_syscalls.c: u16 pid to u32, tested/compiled only with 32 bits x86 2002-12-15 Philippe Elie * libutil++/string_manip.cpp: minor fix * pp/derive_files.cpp: comment 2002-12-14 Philippe Elie * pp/format_output.cpp: * pp/format_output.h: * pp/outsymbflag.h: * pp/opp_symbol.h: add an app_name field in file_location and formater options for this field. * pp/profile_container.cpp: * pp/profile_container.h: add_samples() add app_name parameter * pp/oprofpp.cpp: * pp/op_to_source.cpp: * pp/op_time.cpp: * pp/op_time_options.cpp: * pp/op_time_options.h: honor app_name parameter. No user visible change except for op_time -l when profiling with --separate-samples * doc/oprofile.1.in: * doc/oprofile.xml: update doc 2002-12-13 John Levon * doc/oprofile.xml: lots of fixes. Remove sysctl documentation as its really an internal feature and was cluttering up the user manual. 2002-12-13 John Levon * doc/oprofile.xml: some clarifications on timer interrupt 2002-12-12 John Levon * opcontrol: set one_enabled if timer interrupt. No behaviour change, but "safer" 2002-12-11 John Levon * pp/derive_files.h: * pp/op_time.cpp: * pp/op_time_options.cpp: * pp/op_to_source.cpp: * pp/opp_symbol.h: * pp/profile.h: * pp/profile_container.h: * utils/Makefile.am: small pedantries 2002-12-10 Will Cohen * utils/op_dump_25: * utils/opcontrol (do_dump): Correct TMPFILE. 2002-12-10 Will Cohen * daemon/opd_image.c (complete_dump): New. * libop/op_config.h (OP_DUMP_STATUS): New. * utils/op_dump_25: New file. * utils/Makefile.am: Add op_dump_25. * utils/opcontrol (do_dump): Revise how dump performed. 2002-12-10 Philippe Elie * pp/profile.cpp : oprofpp reported incorrectly counter setting when using multiple counter. Fix #651183 2002-12-10 Philippe Elie * pp/op_time.cpp: honor --excude-symbols. Fix #651165 2002-12-09 Philippe Elie * libutil++/op_bfd.cpp: stupid segfault when filtering included symbols 2002-12-09 Philippe Elie * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: replace a 0(N²) by a 0(N) behavior * pp/output_format.cpp: actualize comment 2002-12-08 Philippe Elie * pp/profile.cpp: use scoped_ptr * libopt++/popt_options.h: * pp/counter_profile.cpp: minor cleanup 2002-12-08 Philippe Elie * pp/counter_profile.cpp: * pp/counter_profile.h: use scoped_ptr 2002-12-08 Philippe Elie * pp/counter_profile.h: * pp/counter_profile.cpp: relax samples_db_t sooner 2002-12-08 Philippe Elie * pp/opp_samples_files.cpp: * pp/opp_samples_files.h: * pp/samples_container.cpp: * pp/samples_container.h: * pp/samples_file.cpp: * pp/samples_file.h: rename class samples_file_t to counter_profile_t rename class opp_samples_files to profile_t rename class samples_container_t to profile_container_t rename file using the new class name as filename w/o _t suffix * pp/format_output.cpp: * pp/format_output.h: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/symbol_container_imp.cpp: * pp/symbol_container_imp.h: * pp/Makefile.am: reflect above class/file name change 2002-12-06 Philippe Elie * libdb/db_manage.c: * libdb/db_hash.h: db_init() new to properly initialize a samples_db_t * dae/opd_image.c: * daemon/opd_imge.c: earlier init a samples_db_t object using db_init() rather a memset. This fix a potential bogosity cause we closed a lot of time file descriptor 0 2002-12-06 Philippe Elie * dae/opd_image.c: * dae/opd_image.h: * dae/opd_kernel.c: use hash table entry 0 for kernel and module image 2002-12-04 John Levon * pp/opp_symbol.h: * pp/opp_symbol.cpp: * pp/format_output.h: * pp/format_output.cpp: * others from above: create format_output namespace, some clean up 2002-12-04 Philippe Elie * daemon/opd_image.c: revert last change, it break daemon... 2002-12-04 Philippe Elie * daemon/opd_image.c: re-enable opd_check_image_mtime() it's not perfect but better than nothing * libutil++/cverb.cpp: comment fix 2002-12-04 Will Cohen * utils/opcontrol: Revised checking to determine kernel interface. 2002-12-04 Philippe Elie * libdb/db_test.c: measure system + user time * dae/oprofiled.c: better error message * daemon/oprofiled.c: write_abi() is static 2002-12-03 Philippe Elie * libdb/db_stat.c: * libdb/db_debug.c: Alex whisp me than a few code was not 64 bits size_t safe. 2002-12-03 John Levon * doc/oprofile.xml: * doc/oprofile.1.in: * doc/Makefile.am: remove references to deprecated stuff 2002-12-03 John Levon * utils/opcontrol: add --version 2002-12-03 John Levon * utils/op_start: * utils/op_start_25: * utils/op_stop_25: * utils/op_stop: print deprecation notice 2002-12-03 John Levon * utils/op_session.c: * utils/op_dump: print deprecation notice 2002-12-03 John Levon * utils/opcontrol: do not shutdown on --reset. Send signal on --reset/--save like op_session. Try to dump like op_session to hack race "fix" 2002-12-03 John Levon * utils/opcontrol: complain on opcontrol --save 2002-12-03 Philippe Elie * daemon/opd_kernel.c: * daemon/opd_kernel.h: minor cleanup * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: fix bad include filename. 2002-12-03 Philippe Elie * libdb/.cvsignore: * libdb/Makefile.am: * libdb/*.c --> db-hash-name.c to db_name.c * dae/opd_image.h: * daemon/opd_image.h: * pp/samples_file.h: include db_hash.h 2002-12-03 Philippe Elie * gui/oprof_start_config.cpp: allow default value change w/o breaking actual user. 2002-12-03 Philippe Elie * TODO: update * dae/opd_image.h: * dae/opd_kernel.c: * dae/opd_kernel.h: * dae/opd_parse_proc.c: * dae/opd_proc.c: * dae/opd_proc.h: * dae/opd_sample_files.c: * dae/oprofiled.c: * daemon/opd_image.h: * pp/op_merge.cpp: * pp/samples_file.h: * pp/samples_file.cpp: * pp/Makefile.am: * libabi/Makefile.am: * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: use hash table implementation of libdb * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: * utils/op_start: * doc/oprofile.1.in: * doc/oprofile.xml: remove module hash table size * libdb/.cvsignore: update * libdb/Makefile.am: build libdb-hash.a * libdb/db-hash.h: * libdb/db-hash-debug.c: * libdb/db-hash-manage.c: * libdb/db-hash-test.c: * libdb/db-hash-insert.c: * libdb/db-hash-stat.c: * libdb/db-hash-travel.c: new files implementing a growable hash table * libdb/Makefile.am: update * libop/op_config_24.h: remove module hash table. Increase OP_PRE_WATERMARK, OP_DEFAULT_BUF_SIZE. * libop/op_interface.h: struct op_sample update. * module/oprofile.h: * module/oprofile.c: remove hash table 2002-12-02 John Levon * configure.in: remove annoying AC_REVISION() 2002-12-02 John Levon * utils/opcontrol: couple of minor cleanups 2002-12-02 John Levon * utils/opcontrol: fix --deinit, complain on missing argument 2002-12-02 Will Cohen * doc/Makefile.am: Generate opcontrol. * doc/oprofile.1.in: Add opcontrol information. * doc/oprofile.xml: Add opcontrol information. 2002-12-01 Will Cohen * utils/Makefile.am: Add opcontrol. * utils/opcontrol: New. 2002-12-01 John Levon * various files: don't use db_tree name outside of libdb, it's implementation detail for most case 2002-11-29 Graydon Hoare * module/x86/op_model_p4.c: fix dropped overflows. 2002-11-26 Graydon Hoare * module/x86/op_model_p4.c: fix CCCR-clearing logic. * module/x86/cpu_type.c: re-enable Pentium IV. 2002-11-25 John Levon * module/x86/cpu_type.c: disable Pentium IV till it works 2002-11-23 Philippe Elie * doc/oprofile.xml: start a FAQ. Clarify debug information vs symbol information. Explain why we don't use dynamic symbol 2002-11-20 John Levon * daemon/oprofiled.c: * utils/op_start_25: kernel_only is a no-op on 2.5, no point in it existing 2002-11-19 Philippe Elie * daemon/oprofiled.c: /dev/oprofile/kernel_only doesn't exists in timer int mode (second pass to fix #637804 ...) 2002-11-17 Graydon Hoare * module/x86/op_apic.h: * module/x86/op_apic.c: revert, use copy of kernel code. 2002-11-16 Philippe Elie * dae/opd_kernel.c: * dae/opd_mapping.c: * dae/opd_proc.c: * daemon/opd_image.c: * daemon/opd_kernel.c: * libop++/op_mangling.h: * libutil++/cverb.h: * pp/opp_samples_files.cpp: * pp/samples_file.cpp: doxygen fix * doc/srcdoc/Doxyfile: bump to 0.5 cvs 2002-11-14 Will Cohen * gui/Makefile.am: Use $(bindir). * oprof_report/Makefile.am: Use $(bindir). 2002-11-15 Dave Jones * module/x86/cputype.c: Make the AMD case a bit simpler. 2002-11-14 John Levon * dae/Makefile.am: * daemon/Makefile.am: proper fix for c++ link as suggested by Alexandre Duret-Lutz 2002-11-14 Philippe Elie * Makefile.am: we installed module in the wrong directory. 2002-11-14 Philippe Elie * libutil/op_file.c: op_simplify_path_name(): strip leading '/' * daemon/oprofiled.c: * dae/oprofiled.c: fix incorrect specification of vmlinux file through --vmlinux=/foo//bar fixing #637805 2002-11-14 Philippe Elie * utils/op_start_25: /dev/oprofile/kernel_only doesn't exists in timer int mode. fix #637804 2002-11-14 John Levon * dae/*: * daemon/*: * libutil++/op_bfd.h: * pp/samples_container.cpp: * pp/samples_container.h: doxygen anality 2002-11-14 John Levon * libopt++/popt_options.h: * libopt++/popt_options.cpp: place in popt namespace to avoid clash with getopt.h * libabi/abi_test.cpp: * libabi/op_import.cpp: * pp/op_merge.cpp: * pp/op_time_options.cpp: * pp/op_to_source_options.cpp: * pp/oprofpp_options.cpp: * pp/session.cpp: fix for above * libabi/abi.cpp: * libabi/abi.h: g++ 3.2 fixes * libabi/op_import.cpp: uninline extract * dae/Makefile.am: * daemon/Makefile.am: fix c++ link hack for -Werror 2002-11-13 Graydon Hoare ( this changeset is mostly Dave Jones' work ) * README: * TODO: * configure.in: * doc/oprofile.xml: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/op_help.c: * module/compat.h: * module/compat24.h: * module/op_util.c: * module/x86/Makefile.in: * module/x86/apic_compat.h: * module/x86/arch.h: * module/x86/cpu_type.c: * module/x86/op_fixmap.c: * module/x86/op_nmi.c: minor additions for hammer support. * module/x86/op_apic.c: * module/x86/op_apic.h: major cleanup; add hammer support. * module/x86/hammer_entry.S: * module/x86/hammer_ia32entry.S: * module/x86/hammer_op_syscalls.c: * module/x86/hammer_oprofile_nmi.S: new hammer support files. 2002-11-14 John Levon * configure.in: hack around case where clean checkout then ./configure --with-kernel-support 2002-11-12 Graydon Hoare * autogen.sh: support overriding autotool binary names. 2002-11-11 Philippe Elie * configure.in: honor --with-extra-libs 2002-11-11 Philippe Elie * configure.in: add -W -Wall and optionnaly -Werror to user space compilation 2002-11-11 John Levon * dae/Makefile.am: * daemon/Makefile.am: don't dist dummy.cpp 2002-11-11 John Levon * dae/Makefile.am: * daemon/Makefile.am: hack to fix --enable-abi 2002-11-10 John Levon * configure.in: * gui/Makefile.am: * oprof_report/Makefile.am: only use X libs where they're actually wanted 2002-11-10 John Levon * configure.in: make included sstream work again 2002-11-08 Will Cohen * doc/oprofile.xml: Update with IA64 information. 2002-11-10 John Levon * Makefile.am: remove oprof_report from SUBDIRS to avoid separate objdir problem 2002-11-10 John Levon * most Makefile.am: do the dist_sources trick properly 2002-11-10 John Levon * Makefile.am: * configure.in: * dae/Makefile.am: * daemon/Makefile.am: * utils/Makefile.am: s/WITH_KERNEL_SUPPORT/kernel_support * configure.in: * dae/Makefile.am: * dae/oprofiled.c: * daemon/Makefile.am: * daemon/oprofiled.c: * libabi/Makefile.am: approximate working --enable-abi more 2002-11-10 John Levon * dae/oprofiled.c: * daemon/oprofiled.c: abi tidy 2002-11-10 John Levon * autogen.sh: be verbose * gui/Makefile.am: * gui/ui/Makefile.am: * oprof_report/Makefile.am: * oprof_report/ui/Makefile.am: remove duplicate set MOC/UIC 2002-11-10 John Levon * Makefile.am: add comment * configure.in: no need to subst OPROFILE_25 2002-11-09 John Levon * TODO: update * configure.in: * most Makefile.am: make separate objdir work, except for module (impossible I suppose) 2002-11-09 John Levon * autogen.sh: use --foreign 2002-11-09 John Levon * configure.in: fix --with-kernel-support * doc/.cvsignore: add *.1 * libabi/Makefile.am: don't install abi_test 2002-11-09 John Levon * all cvsignore: add Makefile.in * gui/Makefile.am: move EXTRA_DIST out of qt check * gui/ui/Makefile.am: * oprof_report/ui/Makefile.am: fix AM_CPPFLAGS typo 2002-11-09 John Levon * all build files: use automake, written by Phil 2002-11-09 Philippe Elie * pp/samples_file.cpp: check than samples files version match expected version fixing #635759 2002-11-07 John Levon * configure.in: * module/compat.h: * module/compat24.h: * module/op_dname.c: * module/oprofile.c: * module/x86/op_fixmap.c: * module/x86/op_nmi.c: remove 2.5 support from old module code 2002-11-06 Will Cohen * configure.in: Tests for ia64 architecture. * dae/opd_mapping.c: Added includes. * oprofile/dae/oprofiled.c (opd_do_samples): Typecast. * libop/op_cpu_type.c (cpu_names, cpu_nr_counters): Add IA64 info. * libop/op_cpu_type.h (op_cpu): Add IA64 enums. * libop/op_events.c: Add defines for IA64 and IA64 events. * libop++/op_print_event.cpp: Change include order to work on IA64. * module/oprofile.c: Include "arch.h" file. (evict_op_entry): Use IRQ_ENABLED macro. (op_do_profile): Use INST_PTR and STATUS macros. (oprof_init_data): Factor out computation. * module/op_util.c (rvmalloc, rvfree): Typecasts. * module/x86/arch.h: New. * README: Update. * utils/op_help.c (main): Add IA64 information. * module/ia64/arch.h: * module/ia64/cpu_type.c: * module/ia64/IA64entry.h: * module/ia64/IA64minstate.h: * module/ia64/IA64syscallstub.h: * module/ia64/Makefile.in: * module/ia64/op_ia64_model.h: * module/ia64/op_pmu.c: * module/ia64/oprofile_stubs.S: * module/ia64/op_syscalls.c: New. 2002-11-06 John Levon * configure.in: 0.5cvs * Makefile.in: mention doxyfile in release steps 2002-11-06 Philippe Elie * pp/op_to_source.cpp: op_to_source --source-with-assembly: avoid to be confused by source line which look like an asm line and stop incorrectly the output. This change go in 0.4 release 2002-11-06 John Levon * configure.in: bump to 0.4 in prep for release 2002-11-06 John Levon * module/x86/cpu_type.c: detect if we actually are using HT (from Alex T) 2002-11-05 John Levon * doc/oprofile.xml: manual fixes from Will Cohen 2002-11-01 John Levon * daemon/opd_image.c: fix lookup_dcookie usage * libabi/.cvsignore: add 2002-11-01 Philippe Elie * module/x86/op_apic.c: restore correctly the lvtpc register 2002-11-01 Philippe Elie * libop/op_hw_config.h: define DCOOKIE_SHIFT * daemon/opd_image.c: use it 2002-11-01 Philippe Elie * pp/Makefile.in: cleanup, build and use libpp.a 2002-10-31 John Levon * pp/counter_array.cpp: using namespace std 2002-10-31 Philippe Elie * dae/.cvsignore: * dae/opd_image.c: * dae/opd_kernel.c: * dae/opd_sample_files.c: * dae/opd_stats.c: * dae/oprofiled.c: * daemon/opd_image.c: * daemon/opd_sample_files.c: * libop/op_config_24.h: cleanup, including some little merging from daemon to dae * daemon/opd_image.c: change dcookie hashing function * doc/oprofile.xml: typo 2002-10-26 Philippe Elie * libutil++/file_manip.cpp: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: cleanup * pp/counter_array.h: * pp/counter_array.cpp: add a bool empty() member to counter_array_t * pp/sample_container_imp.cpp: use it 2002-10-26 Philippe Elie * configure.in: minor cleanup. Use config.h rather than gcc -D option * libutil/op_libiberty.h: * libutil++/op_bfd.h: * pp/opp_symbol.h: #include * libutil/Makefile.in: * pp/Makefile.in: remove BFD_CXXFLAGS 2002-10-24 Philippe Elie * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: allow to specify explicetly on which symbol we want to work. * pp/op_to_source_options.h: * pp/op_to_source_options.cpp: * pp/op_to_source.cpp: handle --include-symbol, for asm output only output for symbols with samplels or selected symbols. * pp/oprofp.cpp: * pp/samplesc_ontainer.cpp: minor change to reflect op_bfd api change 2002-10-24 Philippe Elie * daemon/opd_image.c: revert 64 bit dcookie patch commited accidentally with 2002-10-18 abi patch. 2002-10-21 Graydon Hoare * doc/oprofile.xml: Describe op_import and --enable-abi. 2002-10-20 Philippe Elie * pp/Makefile.in: * pp/session.cpp: * pp/session.h: * pp/op_time_options.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * doc/oprofile.1.in: * doc/oprofile.xml: handle --session options 2002-10-19 John Levon * configure.in: AC_HELP_STRING is too new for my autoconf 2002-10-18 Graydon Hoare * libabi/*: Add support for abi descriptions, for portability. * daemon/oprofiled.c: * dae/oprofiled.c: Emit abi description on startup. * configure.in: Add --enable-abi option. * make.common.in: * Makefile.in: Support building libabi/ 2002-10-19 John Levon * utils/op_start_25: grep -o does not exist on any of my systems - fix 2002-10-19 Philippe Elie * libutil++/op_bfd.cpp: calculate symbol size after removing duplicate symbol. Fix #625678 2002-10-19 Philippe Elie * pp/op_to_source.cpp: * pp/op_to_source_options.cpp: * pp/op_to_source_options.h: * doc/oprofile.1.in: * doc/oprofile.xml: allow to pass multiple options to objdump * pp/opp_symbol.h: * pp/samples_container.cpp: store symbol size in symbol_entry object. 2002-10-19 Philippe Elie * libutil++/child_reader.cpp: In some pathological case getline() finished too early when child process write on stderr. 2002-10-18 Philippe Elie * libutill++/child_reader.cpp: read_block() : cumulate stderr output rather to overwrite always the same buffer space ... 2002-10-16 John Levon * utils/op_start_25: check if mounted, from Will Cohen Also mkdir the mountpoint 2002-10-16 Philippe Elie * configure.in: get linux include path earlier 2002-10-15 Philippe Elie * dae/oprofiled.c: * daemon/oprofiled: strerrno --> strerror 2002-10-14 Philippe Elie * libop/op_events.c: typo in L2_DBUS_BUSY_RD PPro event name 2002-10-13 Philippe Elie * README: update contrib * TODO: update * gui/oprof_start.cpp: better error message, fixme removal * libdb/db-insert.c: fix samples count overflow. * libdb/db.h: * libdb/db-manage.c: * libdb/db-debug.c: don't use page zero, use this value as nil page number, avoid to touch mmaped memory when growing the samples file. * libop/op_config.h: bump OPD_VERSION 2002-10-12 Philippe Elie * pp/samples_file.h: * pp/samples_file.cpp: move class opp_samples_files ... * pp/opp_samples_files.h: * pp/opp_samples_files.cpp: to these new files * pp/Makefile.in: * pp/op_to_source.cpp: * pp/oprofpp.cpp: reflect above change 2002-10-12 Philippe Elie * dae/opd_sample_files.c: fixme remove * dae/oprofiled.c: * daemon/oprofiled.c: minor error message improvement * pp/op_time.cpp: * pp/symbol_container.cpp: fixme remove * pp/samples_file.cpp: * pp/sample_file.h: privatize more data members 2002-10-12 Philippe Elie * libutil++/utility.h: op_ratio() new * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/opp_symbol.cpp: * pp/samples_container.cpp: use op_ratio() 2002-10-11 Philippe Elie * libutil++/file_manip.cpp: * libutil++/filename_match.cpp: * libutil++/string_manip.cpp: * libutil++/string_manip.h: fix dirname(), basename(), remove rtrim() 2002-10-07 John Levon * daemon/opd_image.h: * daemon/opd_image.c: * daemon/oprofiled.c: * libop/op_interface_25.h: update to latest interface 2002-10-06 Philippe Elie * dae/opd_image.c: allow to free(image->app_name) 2002-10-05 Philippe Elie * daemon/opd_image.c: * dae/opd_image.c: spacing * dae/opd_mapping.c: * dae/opd_mapping.h: kill op_grow_maps() simplify adding map path * dae/opd_parse_proc.c: use opd_add_mapping() 2002-10-05 Philippe Elie * TODO: update * doc/oprofile.xml: more doc in interpreting results 2002-10-04 Philippe Elie * pp/opp_symbols.cpp: * pp/opp_symbols.h: * pp/outsymbflag.h: implement 'q' 'Q' format flags. Fix #618165 * pp/op_time_options.cpp: reject these formats for op_time * doc/oprofile.1.in: * doc/oprofile.xml: document them 2002-10-02 John Levon * Makefile.in: use -P to strip dead dirs on dist * dae/opd_parse_proc.c: spacing 2002-10-02 Philippe Elie * libdb/db-*.c/*.h: typedef tweaking for 64 bits arch (signaled by Dave Jones) * remove libdb/ChangeLog, old entries are: 2002-04-20 Philippe Elie * db-insert.c: check for count overflow 2002-04-20 Philippe Elie * db-manage.c: properly handle already existing db file * db.h: extern "C" wrapper 2002-04-19 Philippe Elie * *.c;*.h: make plugin db in oprofile more easy. 2002-04-18 Philippe Elie * *.c;*.h: prefix all public identifier with db_. Use typedef as much I can rather than plain unsigned int. 2002-04-17 Philippe Elie * db-debug.c: * db-insert.c: * db-manage.c: * dbtest.c: * db-travel.c: * db.h: add file locking and necessary stuff to allow plugging db in an imbedded file format like oprofile samples files. 2002-04-16 Philippe Elie * db-manage.c: silly bug fix, db works now with malloc/realloc or mmap/mremap memory allocation selected at compile time. 2002-04-14 Philippe Elie * first import standalone code to test btree samples files 2002-10-02 Philippe Elie * module/x86/op_msr.h: Hyper threading #define * module/x86/cpu_type.c: include op_msr.h 2002-10-02 Philippe Elie * */*.cpp: using std::xxx; --> using namespace std; 2002-10-01 Will Cohen * module/x86/cpu_type.c (p4_threads): New. (get_cpu_type): Use p4_threads(). * doc/oprofile.xml: Add comment about P4 HT support. 2002-10-01 John Levon * daemon/opd_image.c: fix non --separate-samples. Still broke. 2002-10-01 John Levon * libop/op_cpu_type.h: * libop/op_cpu_type.c: make this work on 2.5/normal both. Does not respect different mounted oprofilefs (yet) 2002-10-01 John Levon * daemon/.cvsignore: add * libop/op_interface_25.h: * daemon/opd_image.h: * daemon/opd_image.c: * daemon/oprofiled.c: fixups for new encoded interface. Fix --separate-samples * utils/op_start_25: startup fixes 2002-09-26 Will Cohen * module/x86/op_model_p4.c: Correct TC_DELIVER_MODE cccr select. 2002-09-23 Graydon Hoare * dae/oprofiled.c: * daemon/op_sample_files.c: * daemon/oprofiled.c: * pp/op_to_source.c: * utils/op_help.c: u8 unit mask -> u16 unit-mask. I'm not sure this catches *all* the instances, but it does appear to be an improvement 2002-09-30 William Cohen * libutil++/string_manip.cpp (sample_filename): Correct declaration. * pp/samples_container.h: Correct add_samples() declaration. 2002-09-29 Philippe Elie * libutil++/string_manip.cpp: * libutil++/string_manip.h: sample_filename() new * pp/samples_container.cpp: * pp/samples_container.h: add_samples() new * pp/op_merge.cpp: * pp/op_time.cpp: * pp/oprofpp.cpp: * pp/samples_file.cpp: use them + minor cleanup 2002-09-28 Philippe Elie * libopt++/popt_options.cpp: fix #615760, in rare case oprofpp called with lot of invalid arguments segfault during the help printing. All post-profile tools are concerned by this fix. * doc/oprofile.xml: small improvements * libutil++/op_bfd.cpp: improve error message when bfd_openr() fails. * TODO: update 2002-09-28 Philippe Elie * dae/opd_image.c: * dae/opd_kernel.c: * dae/opd_parse_proc.c: * dae/opd_parse_parse.h: * dae/opd_proc.c: * dae/opd_sample_files.c: * daemon/opd_image.c: * daemon/opd_kernel.c: * daemon/opd_sample_files.c: * libop/op_cpu_type.c: * libop/op_events.c: * libop/op_events_desc.c: * libopt++/popt_options.cpp: * libutil/op_deviceio.c: * libutil/op_file.c: * libutil++/file_manip.cpp: * libutil++/file_manip.h: * libutil++/string_manip.h: * pp/op_to_source.cpp: doxygen fix 2002-09-27 John Levon * configure.in: add --with-kernel-support for 2.5 * daemon/oprofiled.c: fix comment, give exit message on sig * utils/Makefile.in: * utils/op_stop_25: add 2.5 op_stop, no 2.5 op_dump * utils/op_start_25: use enable 2002-09-25 Bob Montgomery * module/oprofile.c: avoid to dump zero samples count, fix #615087 2002-09-25 Philippe Elie * dae/opd_image.c: fix #615166, ensure we recognize an existing image struct so we don't try to create db_tree_t object for the same samples files. * db/db-debug.c: display page index when something goes wrong * db/db-insert.c: be more strict on assertion 2002-09-25 Philippe Elie * doc/Makefile.in: remove dependencies for doc/html.xsl 2002-09-25 Philippe Elie * doc/xsl/.cvsignore: new * doc/oprofile.xml: document watchdog problem 2002-09-25 John Levon * module/x86/op_nmi.c: OP_MAX_CPUS is not necessarily static so use NR_CPUS for array instead. Fix a prototype. 2002-09-23 Graydon Hoare * doc/oprofile.xml: Add some P4 documentation. * configure.in: Add detection of different stylesheet paths. * doc/xsl/xhtml.xsl.in: Parameterize by configure's result. * doc/xsl/xhtml.xsl: Remove. * dae/opd_sample_files.c: Change unit mask from 8 to 16 bits. * gui/oprof_start.cpp: Change number of unit masks from 7 to 16. * gui/ui/oprof_start.base.ui: Likewise. * libop/op_cpu_type.c: Add P4 CPU type. * libop/op_events.h: Change unit mask bit width, number. * libop/op_events.c: Add P4 events, unit masks. * libop_op_hw_config.h: Set OP_MAX_COUNTERS to 8. * libop++/op_print_event.cpp: Change unit mask bit width. * libop++/op_print_event.h: Likewise. * module/oprofile.c: Add extra sysctls for counters 5-8. * module/x86/Makefile.in: Add op_model_p4.o to obj list. * module/x86/cpu_type.c: Change CPU identification to handle P4. * module/x86/op_apic.c: (enable_apic): APIC_MAXLVT < 4, not != 4. (check_cpu_ok): Accept CPU_P4. * module/x86/op_model_p4.c: New file. * module/x86/op_nmi.c: (get_model): Handle CPU_P4. Add sysctl names for counters 5-8. * module/x86/op_x86_model.h: Declare extern op_p4_spec. 2002-09-24 Philippe Elie * dae/opd_image.c: * dae/opd_image.h: * dae/opd_kernel.c: * dae/oprofiled.c: * dae/p_module.h: * dae/opd_image.c: * dae/opd_kernel.c: * dae/oprofiled.c: * dae/p_module.h: small blank/comment change to minimize diff between daemon and dae dir. 2002-09-23 John Levon * configure.in: fix for 2.5 patch to build 2002-09-23 John Levon * utils/Makefile.in: * utils/op_start_25: 2.5 patch start script 2002-09-23 John Levon * dae/opd_image.c: * libop/op_cpu_type.c: fix arrays 2002-09-23 John Levon * utils/op_start: use right value for RTC CPU 2002-09-23 John Levon * libop/op_config.h: * libop/op_config_24.h: * libop/op_config_25.h: split config file up * daemon/opd_kernel.c: * daemon/oprofiled.c: include op_config_25.h * dae/oprofiled.c: * dae/opd_image.c: * dae/opd_kernel.c: * dae/opd_mapping.c: include op_config_24.h * module/oprofile.h: include op_config_24.h * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: fix from above (old support only right now) * libop/op_cpu_type.h: introduce 2.5-patch CPU_TIMER_INT 2002-09-23 John Levon * libop/op_interface_25.h: 2.5 interface * daemon/opd_image.c: * daemon/opd_sample_files.c: * daemon/oprofiled.c: * libop++/op_print_event.h: fix header * pp/op_to_source.cpp: change from above 2002-09-23 John Levon * daemon/: new 2.5 patch daemon code. WIP * configure.in: * Makefile.in: detect 2.5 patch and build appropriately 2002-09-23 John Levon * module/x86/op_msr.h: match kernel naming * module/x86/op_model_athlon.c: from above 2002-09-22 Philippe Elie * libdb/db-insert.c: bad cut&paste. Shame on me, I broke the build... 2002-09-22 Philippe Elie * libdb/db-insert.c: handle samples count overflow. * libdb/Makefile.in: db-test new target not built by default. * libdb/db-debug.c: more strict checking * libdb/db-test.c: allow db-test to be used as "db-test samples_dir/*" 2002-09-22 John Levon * dae/opd_stats.c: nicify * module/x86/op_model_pproc.c: * module/x86/op_model_athlon.c: drop macro prefixes, ws fixes * module/x86/op_nmi.c: fix save/restore possible crash, init possible leak 2002-09-22 Philippe Elie * module/x86/op_model_pproc.c: fix p6_start() * module/x86/op_model_athlon.c: fix athlon_start() * module/x86/op_nmi.c: pmc_save_registers() typo when checking null for kmalloc return value 2002-09-20 Graydon Hoare * module/x86/op_x86_model.h: New interface for MSRs. * module/x86/op_nmi.c: Use interface. * module/x86/op_model_ppro.c: New, code from op_nmi.c. * module/x86/op_model_athlon.c: New, code from op_nmi.c. * module/x86/Makefile.in: Reflect new files. 2002-09-20 John Levon * libutil++/op_bfd.cpp: fix a bug where we broke with multiple executable sections due to sorting the symbols wrongly. Fix #617288 and the duplicated #617264 * libutil++/op_bfd.h: fix an outdated comment * dae/opd_image.c: fix comment 2002-09-19 Graydon Hoare * libop/op_events.h: * libop/op_events_desc.c: Move descriptions from here. * libop/op_events_desc.h: * libop/op_events.c: To here. (um_*): Add new static unit masks. (op_events): Use pointers to static unit masks. * libop++/op_print_event.h: * libop++/op_print_event.cpp: * gui/oprof_start.h: * gui/oprof_start.cpp: * utils/op_help.c: Make compatible with struct changes. 2002-09-18 John Levon * utils/op_start: give an example for unit mask. 2002-09-18 Will Cohen * libop/op_mangle.c: (op_mangle_filename): Correct logic for generating mangled name. Fix #611107 2002-09-15 John Levon * libop/op_event.c: fix comment 2002-09-15 Philippe Elie * module/x86/cpu_type.c: allow to force RTC mode. * dae/oprofiled.c: checking when we need to backup samples dir in RTC mode was broken. 2002-09-14 Philippe Elie * libop/op_config.h: remove OP_MIN/MAX_PID, OP_MIN/MAX_PGRP * gui/oprof_start.cpp: pid_filter/pgrp_filter accept all integer 2002-09-13 John Levon * acinclude.m4: another tweak 2002-09-13 Philippe Elie * Makefile.in: never remove doc/oprofile.html. * acinclude.m4: small work-around for sed-related problem 2002-09-12 Will Cohen * Makefile.in: Separate kernel and user code build rules. 2002-09-12 Will Cohen * libutil++/child_reader.h (child_reader): Add missing "std::". * libutil++/child_reader.cpp (error_str): Ditto. 2002-09-12 John Levon * acinclude.m4: update from upstream 2002-09-12 John Levon * acinclude.m4: fix moc2/moc conflict, cache val 2002-09-12 Philippe Elie * libutil++/child_reader.cpp: * libutil++/child_reader.h: fix for child terminated by a signal * gui/oprof_start_util.cpp: * pp/op_to_source.cpp: use the the new child_reader interface 2002-09-11 John Levon * acinclude.m4: * configure.in: * gui/Makefile.in: replace with new Qt configure script 2002-09-11 Philippe Elie * acinclude.m4: fix qt3 detection in some corner case. 2002-09-11 Philippe Elie * pp/samples_container.cpp: * pp/samples_container.h: Check at run time we don't try to use an unitialized samples_container_t. 2002-09-11 Philippe Elie * pp/op_time.cpp: exit sooner when no samples files are available. 2002-09-09 Will Cohen * dae/opd_kernel.c (struct opd_module): (kernel_start, kernel_end): (opd_parse_kernel_range): (opd_drop_module_sample): (opd_find_module_by_eip): (opd_handle_module_sample): (opd_handle_kernel_sample): (opd_eip_is_kernel): * dae/opd_kernel.h (opd_handle_kernel_sample): (opd_eip_is_kernel): * dae/opd_mapping.c (opd_put_mapping): * dae/opd_mapping.h (struct opd_map): (opd_is_in_map): (opd_map_offset): * dae/opd_parse_proc.c (opd_add_ascii_map): * dae/opd_proc.c(verb_show_sample): (opd_put_image_sample): * dae/opd_proc.h (opd_put_image_sample): Change things referring to addresses to unsigned long for operation on 64-bit machines. 2002-09-07 Philippe Elie * all source file : remove email address from @author 2002-09-05 Philippe Elie * libop/op_interface.h: (op_sample, op_note): Make compatible with 64-bit targets. * dae/opd_proc.c: (opd_put_sample): Adjust verbprintf arguments. (opd_handle_fork): Ditto. * dae/oprofiled.c: (opd_do_samples): Ditto. 2002-09-04 Will Cohen * module/op_rtc.c: move to ... * module/x86/op_rtc.c: here * module/Makefile.in: * module/x86/Makefile.in: reflect file move 2002-09-03 Will Cohen * module/oprofile.h: (regparm3): remove, use FASTCALL instead. * module/oprofile.c: (op_do_profile): Eliminate regparm3. 2002-09-03 Will Cohen * module/oprofile.c: (oprof_read, oprof_note_read): Return ssize_t. 2002-08-30 Will Cohen * Makefile.in: * make.common.in: more DESTDIR change 2002-09-02 Dave Jones * module/x86/cpu_type.c: support hammer in ia32 mode 2002-09-02 John Levon * doc/oprofile.xml: mention Qt 3 2002-08-30 Will Cohen * doc/Makefile.in: Set MANDIR and CATDIR based on DESTDIR. 2002-08-16 Philippe Elie * dae/opd_kernel.c: * dae/opd_kernel.h: * dae/opd_proc.c: * dae/opd_proc.h: * dae/oprofiled.c: * libop/op_hw_config.h: * libop/op_interface.h: * module/oprofile.c: * module/oprofile.h: change the layout of data used between daemon/module (32 bits pid fix for 2.5.31) * gui/oprof_start_config.h: use pid_t * libutil/op_fileio.c: op_read_file(), op_write_file(), use %lu and cast, uglier solution but more portable than last fix * utils/op_start: typo 2002-08-14 William Cohen * libutil/op_fileio.c (op_read_file): Change fprintf specifier. (op_write_file): Ditto. 2002-08-08 Will Cohen * utils/op_start: Do not compute quantity of counters from CPUTYPE. Get counter names directly from /proc/sys/dev/oprofile. 2002-08-06 Philippe Elie * Makefile.in: * doc/Makefile.in: delete generated doc only on a make maintainerclean * pp/opp_symbol.cpp: small cleanup 2002-08-06 Philippe Elie * dae/opd_parse.c: * dae/opd_proc.c: * dae/opd_proc.h: fix #591275 which is a re-hash of #584723 we can now safely assume than proc->maps[0] is the primary image. Problem reported by William cohen 2002-08-03 Philippe Elie * libutil++/string_manip.h: * libutil++/string_manip.cpp: separate_token() treat escape sequence 2002-07-30 Philippe Elie * gui/oprof_start.cpp: apply misssing part from this patch 2002-07-27 Will Cohen * dae/oprofiled.c: * doc/oprofile.1.in: * util/oprof_start: * doc/oprofile.xml: clarify than pgrp filter is the tty program group id 2002-07-28 Philippe Elie * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.h: * pp/samples_file.cpp: op_get_cpu_nr_counters() / op_get_nr_counters() merge * module/compat22.h: * module/x68/op_apic.c: __cli()/__sti() removal, this fix build up to 2.5.29 * module/op_fixmap.c: fix test_bit() warning 2002-07-27 Will Cohen * gui/oprof_start_config.cpp: config_setting::config_setting() uses uname to guess path to vmlinux. 2002-07-27 John Levon * dae/opd_stats.h: * dae/opd_stats.c: * dae/opd_proc.c: log unique samples vs. sample entries 2002-07-27 Will Cohen * dae/oprofiled.c: * gui/oprof_start.cpp: * libop/op_cpu_type.h: * libop/op_cpu_type.c: op_get_nr_counter() new, localize op_nr_counter computations. 2002-07-26 Philippe Elie * TODO: update * utils/op_start: fix #587093, some option of op_start was incorrectly checked 2002-07-26 Philippe Elie * pp/op_time_options.cpp: * pp/oprofpp_options.cpp: output format header or details are illegal if not combined with other output format flag * pp/opp_symbol.cpp: * pp/opp_symbol.h: * pp/oprofpp.cpp: * pp/outsymbflag.h: minor cleanup 2002-07-25 John Levon * configure.in: bump to 0.4cvs 2002-07-24 Kevin Puetz * gui/ui/oprof_start.base.ui: fix resize 2002-07-22 Philippe Elie * libutil/op_fileio.c: * libutil/op_fileio.h: opd_get_link() new, read a symlink filename * libutil++/file_manip.cpp: * libutil++/file_manip.h: opd_read_link() use the above function * dae/opd_image.c: * dae/opd_parse_proc.c: fix #584723 we can not assume than the first map in /proc/pid/maps is the the map for the binary image 2002-07-21 John Levon * configure.in: bump to 0.3 2002-07-17 William Cohen * gui/oprof_start_util.cpp: get HZ from sysconf 2002-07-17 Philippe Elie * gui/oprof_start.base.ui: revert patch 2002-07-13, reapply the same modification with QT2 designer rather QT3 designer 2002-07-14 John Levon * Makefile.in: set KVERS properly * dae/oprofiled.c: remove eip == 0 checking * module/oprofile.c: do check in evict_op_entry() instead, as suggested by Philippe 2002-07-13 Philippe Elie * TODO: update * make.deps: * gui/Makefile.in: fix include search path for dependencies generation 2002-07-13 John Levon * dae/oprofiled.c: don't throw away last samples on shutdown notification 2002-07-13 Philippe Elie * TODO: update * doc/oprofile.1.in: * doc/oprofile.xml: * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/oprof_start.base.ui: remove kernel-range specification UI 2002-07-12 John Levon * TODO: update * dae/oprofiled.c: * libop/op_interface.h: * module/oprofile.c: * module/oprofile.h: * module/x86/op_nmi.c: * module/x86/op_syscalls.c: replace partial_stop,quitting,prof_on with single state variable, and clean up how shutdown is triggered. * module/oprofile.c: always init data->entries etc. for every CPU 2002-07-12 Philippe Elie * Makefile.in: typo in clean target * module/compat.h: * module/compat24.h: * module/oprofile.c: * module/x86/op_nmi.c: support for online/offline cpu for 2.5.23+ 2002-07-11 Philippe Elie * Makefile.in: * module/Makefile.in: * module/x86/Makefile.in: move all goal to the topdir Makefile 2002-07-10 Philippe Elie * TODO: update * pp/op_time.cpp: errno for file permission problem is EACCES not EPERM ... * module/x86/op_apic.c: * module/x86/op_fixmap.c: * module/x86/op_nmi.c: revert partially the 2002-06-26 patch, preempt need rather to be fixed before/after calling the op_int_operation functions pointer. 2002-07-09 Philippe Elie * gui/oprof_start.cpp: use not * libutil/op_libiberty.c: don't assume than string.h is included by libiberty.h as in old gcc release 2002-07-08 Philippe Elie * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: pass vector by const reference rather than by value * pp/op_to_source.cpp: always output file even if the corresponding source file does not exist 2002-07-06 Philippe Elie * libopt++/popt_options.cpp: provide a dtor in derived class * doc/oprofile.1.in: * pp/op_to_source.cpp: --output --no-output are meaningfull in all case. 2002-07-06 Philippe Elie * gui/oprof_start.cpp: * pp/sample_container_imp.cpp: * pp/symbol_container_imp.cpp: * pp/op_to_source.cpp: fix an ISO corner case (3.4.2 #2) 2002-07-05 Philippe Elie * libutil++/filename_match.h: * libutil++/filename_match.cpp: constify * module/Makefile.in: small typo * Makefile.in: do not make uninstall in module/arch * pp/op_to_source_options.h: * pp/op_to_source_options.cpp: * pp/op_to_source.cpp: general cleanup, remove the output class and use free function instead, doxygen'ize them. 2002-07-04 Philippe Elie * libop/op_events.cpp: * libop/op_events.h: * module/x86/op_nmi.c: * dae/oprofiled.c: op_check_events() no longer accept 0 as valid events * pp/opp_symbol.cpp: small dead code removal * pp/opp_symbol.h: doxygen comment fix * configure.in: do not use AC_CHECK_FILE: this macro generate spurious warning with autoconf 2.2.13 * pp/op_to_source_options.h: * pp/op_to_source_options.cpp: * pp/op_to_source.cpp: * doc/oprofile.1.in: * doc/oprofile.xml: implement --objdump-params='params_strings' allowing to pass additional parameters to objdump. 2002-07-03 Philippe Elie * libutil/op_fileio.c: remove a FIXME, it's not worthwhile to try to use GNU getline() instead of op_get_line() * pp/op_time.cpp: * pp/op_time_options.cpp: * pp/op_time_options.h: * pp/oprofpp.cpp: remove minor FIXME * pp/opp_symbol.h: class outut_symbol: clarify why, with the current design, some function are public member rather private. 2002-07-01 Philippe Elie * configure.in: * module/compat.h: fix compile error with kernel <= 2.2.17 2002-07-01 Philippe Elie * TODO: minor upadte * configure.in: support 2.5.20 * dae/opd_image.c: * dae/opd_proc.c: * libop++/op_print_event.h: * libutil/op_popt.c: * pp/op_merge.cpp: * pp/samples_container.cpp: * pp/symbol_container_imp.cpp: * pp/symbol_functors.h: minor #include tweak 2002-06-30 Philippe Elie * libdb/db.h: * libdb/db-manage.c: constify db_sync() parameter. * dae/opd_image.c: fix #574459 "vmlinux samples file not backed up by op_session". Small cleanup by adding opd_for_each_image() 2002-06-29 Philippe Elie * TODO: update * libutil++/filename_match.cpp: * libutil++/filename_match.h: add a convenience ctor. * doc/oprofile.1.in: * doc/oprofile.xml: * op_time.cpp: better error message for EPERM problem * op_time_options.h: * op_time_options.cpp: allow the user to specify explicitely on which filename he want to work 2002-06-29 Philippe Elie * TODO: update * acinclude.m4: * configure.in: * make.common.in: * gui/Makefile.in: * gui/ui/Makefile.in: better qt3 handling * doc/oprofile.1.in: * doc/oprofile.xml: fix oprof_start --option=blah 2002-06-28 Philippe Elie * .cvsignore: minor fix * configure.in: * acinclude.m4: ugly temporary hack to compile with kde3/qt3 * oprof_start.cpp: * oprof_start_config.cpp: gcc-3.1 and qt3 fix (qt3 have an hex() somewhere ...) * module/x86/op_fixmap.c: minor comment fix 2002-06-26 Philippe Elie * TODO: update * module/compat.h: * module/x86/op_apic.c: * module/x86/op_fixmap.c: * module/x86/op_nmi.c: preemptible kernel support. This fix point #2 of kernel_src/Documentation/preempt-locking.txt 2002-06-25 Philippe Elie * TODO: update * doc/oprofile.1.in: * doc/oprofile.xml: document op_start --kernel-range option * gui/oprf_start.cpp: * gui/oprof_start.h: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start_base.ui: * utils/op_start: implement --kernel-range * gui/Makefile.in: force ui sub-dir build 2002-06-25 Philippe Elie * TODO: update * configure.in: new AX_KERNEL_VERSION() to allow kernel version check, use it to check minimal kernel version and fix 2.5.19 breakage * module/.cvsignore: * module/x86/.cvsignore: add .*.cmd * module/Makefile.in: * module/x86/Makefile.in: fix 2.5.19 make through EXTRA_CFLAGS_MODULE * module/compat22.h: fix missing BUG() definition in 2.2 kernel * module/x86/oprofile_nmi.S: fix minor 2.2 compile problem * pp/op_to_source.cpp: minor comment fix 2002-06-18 John Levon * utils/op_start: * pp/samples_file.h: * libop/op_config.h: * doc/oprofile.1.in: * doc/oprofile.xml: * dae/oprofiled.c: * dae/opd_kernel.h: * dae/opd_kernel.c: don't parse System.map any more, now we work based off vmlinux alone * dae/opd_proc.c: move eip_is_kernel() into opd_kernel.c 2002-06-18 John Levon * README: * doc/oprofile.xml: update credits 2002-06-16 John Levon * pp/op_time_options.h: * pp/op_time_options.cpp: move private stuff out of options namespace 2002-06-16 John Levon * pp/counter_util.cpp: stop when we reach the first available counter for sorting * pp/op_to_source.cpp: use absolute sample file name * pp/samples_file.cpp: better error message 2002-06-16 John Levon * various: remove spurious == false, == true 2002-06-15 John Levon * dae/oprofiled.c: * libop/op_interface.h: * libop++/op_print_event.h: * module/oprofile.c: define a buffer head for the module buffer interface, and use it * module/Makefile.in: oops, install the module properly 2002-06-15 John Levon * libop/Makefile.in: * libop/op_cpu_type.h: * libop/op_cpu_type.c: new files split out, defines changed * dae/opd_proc.c: * dae/opd_sample_files.c: * dae/oprofiled.c: * gui/oprof_start.cpp: * libop/op_events.h: * libop/op_events.c: * libop/op_events_desc.h: * libop/op_events_desc.c: * libop/op_interface.h: * libop++/op_print_event.h: * module/oprofile.h: * module/x86/op_nmi.c: changes from above 2002-06-15 John Levon * Makefile.in: compile module early as it's most likely to fail * TODO: update * doc/oprofile.xml: * configure.in: remove unneeded --with-cc * module/x86/Makefile.in: use USE_STANDARD_AS_RULE * module/x86/op_nmi.c: add preemption exclusion 2002-06-15 John Levon * dae/opd_parse_proc.c: remove FIXME. We are fine to assume first entry in maps is the executable, because this is exactly what the kernel does (see /proc/pid/exe) 2002-06-15 John Levon * pp/oprofpp.cpp: call check_mtime() correctly for shared libraries 2002-06-14 John Levon * libop/op_events.c: add warning * module/Makefile.in: link against libop.a like I meant to * module/oprofile.h: * module/oprofile.c: readability cleanup 2002-06-11 John Levon * module/compat.h: * module/x86/arch_compat.h: remove arch_compat.h, add BUG_ON() * module/op_util.c: return -EINVAL not 1 from check_range() * module/oprofile.c: use BUG_ON() in release functions, fix use of check_range, remove spurious check for malloc failure (already checked) * module/oprofile.h: clarify API * module/x86/op_msr.h: new file, MSR back-compat * module/x86/op_nmi.c: * module/x86/op_apic.c: use it 2002-06-10 John Levon * TODO: update * configure.in: remove old checks we don't need. Add to EXTRA_CFLAGS not KCFLAGS * module/Makefile.in: update to use Rules.make and kernel rules. * module/op_init.c: make this one include kernel modversion stuff for 2.2 * module/oprofile.h: remove __cacheline_aligned in wrong place * module/x86/Makefile.in: use Rules.make (hacky) * module/x86/arch.mak: remove * module/x86/op_fixmap.c: add missing header * module/x86/op_syscalls.c: my_sys_exit is not static 2002-06-09 Philippe Elie * libutil++/cverb.h: * libutil++/cverb.cpp: cverb ostream initializations * pp/op_merge.cpp: * pp/op_time_options.cpp: * pp/op_to_source_options.cpp: * pp/oprofpp_options.cpp: use it * utils/Makefile.in: fix a typo in lib dependencies 2002-06-07 Philippe Elie * TODO: update * pp/samples_container.cpp: * pp/samples_container.h: add an hint parameter to add() used to avoid recording all samples. * pp/oprofpp.cpp: use it for the -s option. This change slightly behavior of oprofpp -s, now percent are relative to the selected symbol, not to the whole samples file. Performance of oprofpp -s are improved a lot (40 times on vmlinux) * utils/Makefile.in: missing libs dependencies 2002-06-07 Philippe Elie * pp/Makefile.in: * dae/Makefile.in: * gui/Makefile.in: update dependencies for library 2002-06-07 Philippe Elie * libopt++/popt_options.cpp: * libopt++/popt_options.h: memory leak fix 2002-06-07 Philippe Elie * libutil++/Makefile.in: fix bfd compilation problem with gcc >= 3.0 and old bfd.h * module/Makefile.in: * module/x86/Makefile.in: fix -Werror typo * pp/op_merge.cpp: * pp/op_time_options.cpp: * pp/op_to_source_options.cpp: * pp/oprofpp_options.cpp: work around for cverb initialisations and gcc 2.91. * pp/op_to_source.cpp: use the right comand line argument. 2002-06-07 John Levon * TODO: update * libutil++/utility.h: fix stupid bug, add scoped_array * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: use it 2002-06-07 John Levon * libutil++/utility.h: add a scoped_ptr * pp/op_to_source.cpp: * pp/samples_container.h: * pp/samples_container.cpp: use it 2002-06-07 John Levon * dae/opd_kernel.c: remove some duplicate code 2002-06-07 John Levon * pp/opp_symbol.cpp: kill last of the accursed char arrays 2002-06-07 John Levon * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * libutil++/verbose_ostream.h: * pp/op_merge.cpp: * pp/op_time_options.cpp: * pp/oprofpp_options.cpp: * pp/op_to_source_options.cpp: remove verbose_ostream in favour of a much simpler solution * module/oprofile.h: remove dead prototype 2002-06-06 John Levon * module/x86/Makefile.in: * module/Makefile.in: remove 2.91 check, add 2.5 check * module/compat22.h: * module/compat24.h: * module/apic_up_compat.h: move to ... * module/x86/op_apic.h: * module/x86/apic_compat.h: ... here * module/compat.h: move arch stuff to ... * module/x86/arch_compat.h: ... here 2002-06-06 Philippe Elie * configure.in: remove gcc 2.91 check * make.common.in: use -Werror even for gcc 2.91 * gui/oprof_start.cpp: * libutil++/op_bfd.cpp: * pp/derive_files.cpp: * pp/op_to_source.cpp: small tweak for gcc 2.91 and -Werror 2002-06-06 John Levon * module/op_rtc.c: use check_range 2002-06-06 John Levon * configure.in: fix typo so non-2.91 is detected * module/Makefile.in: * module/x86/Makefile.in: enable -Werror * module/op_dname.c: * module/oprofile.h: * module/oprofile.c: * module/op_util.h: * module/op_util.c: * module/x86/op_nmi.c: add op_util.h, make op_check_range a function check_range 2002-06-06 John Levon * module/Makefile.in: use @CC@, add clean for x86 * module/compat24.h: add path_hash prototype * module/x86/Makefile.in: use @CC@, make sure options get picked up 2002-06-06 John Levon * libutil/op_get_time.c: return "" not NULL on failure, so we don't try to printf NULL * module/op_dname.c: do_path_hash_2_4 should not be static now * module/oprofile.c: add const 2002-06-06 Philippe Elie * module/x86: new directory, for now some small portion of x86 dependant code remains in module/* mainly in oprofile.[ch]. This patch also don't take care about libop/* which are architecture dependant * module/op_apic.c: * module/op_nmi.c: * module/op_syscalls.c: * module/oprofile_nmi.S: * module/op_fixmap.c: move this file to ... * module/x86/op_apic.c: * module/x86/op_nmi.c: * module/x86/op_syscalls.c: * module/x86/oprofile_nmi.S: * module/x86/op_fixmap.c: these new files * module/x86/op_apic.c: x86 stuff * module/x86/arch.mak: specific arch makefile fragment * module/op_init.c: move cpu detection code ... * module/x86/cpu_type.c: here * module/Makefile: handle arch sub-dir * module/x86/.cvsignore: new * module/oprofile.h: declare the interface to the architecture dependant code * Makefile.in: * configure.in: handle module/arch * make.common.in: avoid -Werror with gcc 2.91 * make.deps: small tweak allowing to use it in module 2002-06-06 John Levon * configure.in: use CXXINCLUDES not CXXFLAGS for including sstream * make.common.in: remove duplicate -g -O2 * include/sstream: fix compiler warning to allow -Werror * libutil/op_file.c: * libutil/op_fileio.h: * libutil/op_fileio.c: more API fixage * libutil++/file_manip.cpp: add missing header 2002-06-06 John Levon * make.common.in: enable -Werror for CVS builds (not in module/) * dae/opd_image.c: * dae/oprofiled.c: * libutil/op_deviceio.h: * libutil/op_deviceio.c: API fixes * libutil++/file_manip.h: * libutil++/file_manip.cpp: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: * pp/op_time.cpp: * pp/oprofpp.cpp: * libutil/op_lockfile.c: * libutil/op_file.h: * libutil/op_file.c: add op_file_readable(), API fixes 2002-06-06 John Levon * utils/op_stop: fail early if ! root 2002-06-05 John Levon * pp/*: s/OutputSymbol/output_symbol/, s/OutSymbFlag/outsymbflag/ 2002-06-05 John Levon * pp/op_time_options.cpp: * pp/op_time_options.h: * pp/op_to_source_options.h: * pp/oprofpp_options.h: document 2002-06-05 John Levon * pp/Makefile.in: * pp/counter_util.h: * pp/counter_util.cpp: move from ... * pp/oprofpp.h: * pp/oprofpp_util.cpp: ... here (removed) * pp/op_time.cpp: * pp/op_time_options.cpp: * pp/op_to_source.cpp: * pp/opp_symbol.h: * pp/oprofpp.cpp: * pp/oprofpp_options.h: * pp/oprofpp_options.cpp: * pp/samples_container.h: * pp/samples_container.cpp: * pp/samples_file.h: * pp/samples_file.cpp: changes from above 2002-06-05 John Levon * libutil++/file_manip.h: * libutil++/file_manip.cpp: move oprofile specific stuff to ... * libop++/op_mangling.h: * libop++/op_mangling.cpp: ... here * pp/Makefile.in: * pp/op_bfd.h: * pp/op_bfd.cpp: move to ... * libutil++/Makefile.in: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: ... here * libutil++/verbose_ostream.h: add * pp/op_merge.cpp: * pp/op_time.cpp: * pp/op_time_options.h: * pp/op_time_options.cpp: * pp/op_to_source.cpp: * pp/op_to_source_options.h: * pp/op_to_source_options.cpp: * pp/oprofpp.h: * pp/oprofpp.cpp: * pp/oprofpp_options.h: * pp/oprofpp_options.cpp: * pp/oprofpp_util.cpp: * pp/samples_file.h: various changes and cleanups from above * pp/derive_files.cpp: remove now duplicate code 2002-06-05 John Levon * libutil++/file_manip.h: * libutil++/file_manip.cpp: simplify but don't break already absolute paths, remove dead code * pp/op_time_options.h: * pp/op_time_options.cpp: * pp/op_time.cpp: remove dead code * pp/op_to_source_options.h: * pp/op_to_source_options.cpp: * pp/oprofpp_options.h: * pp/oprofpp_options.cpp: variable name tweaks * pp/Makefile.in: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * pp/derive_files.h: * pp/derive_files.cpp: factor command-line file derivation guessing out 2002-06-04 John Levon * libop++/op_print_event.cpp: * pp/op_bfd.h: * pp/op_time_options.cpp: * pp/op_to_source_options.cpp: * pp/oprofpp_options.cpp: fixes for std * pp/Makefile.in: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * pp/samples_file.cpp: * pp/opp_symbol.h: * pp/counter_array.h: * pp/counter_array.cpp: factor out counter_array 2002-06-04 John Levon * pp/oprofpp.h: * pp/samples_file.cpp: * pp/oprofpp_util.cpp: remove a sanity check that wasn't particularly useful 2002-06-04 John Levon * libop++/Makefile.in: * libop++/op_mangling.h: * libop++/op_mangling.cpp: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: move mangle/unmangle to libop++ 2002-06-04 John Levon * pp/Makefile.in: * pp/op_to_source.cpp: * pp/opp_symbol.cpp: * pp/demangle_symbol.h: * pp/demangle_symbol.cpp: move this ... * libutil++/Makefile.in: * libutil++/demangle_symbol.h: * libutil++/demangle_symbol.cpp: ... to here 2002-06-04 John Levon * make.common.in: * make.deps: split out CXXINCLUDES * Makefile.in: * configure.in: * libop++/Makefile.in: * libop++/op_print_event.h: * libop++/op_print_event.cpp: * pp/Makefile.in: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * pp/samples_file.cpp: start libop++ library, move op_print_event there * pp/op_bfd.h: * pp/op_bfd.cpp: * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/samples_file.h: * pp/samples_file.cpp: remove all knowledge of is_kernel from op_bfd, some minor cleanups 2002-06-04 John Levon * pp/op_bfd.h: * pp/op_bfd.cpp: * pp/samples_container.cpp: kill another char* * pp/outsymbflag.h: reduce fake dependencies with new file, little cleanup * pp/Makefile.in: * pp/demangle_symbol.cpp: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/op_time_options.h: * pp/op_time_options.cpp: * pp/op_to_source.cpp: * pp/op_to_source_options.h: * pp/op_to_source_options.cpp: * pp/opp_symbol.h: * pp/oprofpp.h: * pp/oprofpp.cpp: * pp/oprofpp_options.h: * pp/oprofpp_options.cpp: * pp/oprofpp_util.cpp: Some more refactoring. More work needed... 2002-06-01 John Levon * doc/Makefile.in: fix DOCDIR (from Al Stone) 2002-06-01 John Levon * libutil++/file_manip.h: * libutil++/file_manip.cpp: clarify API * pp/oprofpp.cpp: fix bug 563324 resulting from above 2002-06-01 John Levon * make.common.in: make --with-extra-lib work again * dae/opd_image.h: * dae/opd_image.c: comment typos * doc/srcdoc/Doxyfile: generate PNG not GIF 2002-05-23 Philippe Elie * doc/srcdoc/Doxyfile: * libopt++/popt_options.cpp: * libopt++/popt_options.h: * pp/symbol_container_impl.h: small doxygen tweak. 2002-05-23 Philippe Elie * dae/oprofiled.c: minor bug when backing up samples dir * libopt++/popt_options.h: * libopt++/popt_options.cpp: avoid to force client code to explicitly select the option template specializations. * pp/op_merge.cpp: * pp/op_time.cpp: * pp/op_to_source.pp: * pp/oprofpp.cpp: we no longer need explicit template instantiations for options 2002-05-22 Philippe Elie * pp/oprofpp.cpp: fix a missing SAMPLES_DIR prepend 2002-05-22 John Levon * lib/util/op_file.c: * utils/op_session.c: restore accidentally lost commits : 2002-05-05 Philippe Elie * dae/op_session.c: tweak error message when session already exist. Avoid to op_dump when profiler is not started. 2002-05-05 Philippe Elie * dae/op_session.c: do not create empty session directory and backup oprofileg.log too * dae/opd_util.c: * op_user.h: minor related change 2002-05-22 John Levon * dae/*: complete re-organisation of files * libop/op_config.h: add VMA_OFFSET and MAX_MODULES tunables 2002-05-22 Philippe Elie * gui: * libdb: * libopt++: * libutil: * libutil++: * oprof_report: * pp: all C/c++ source/header file, fix a few doxygen warning, many const type to type const + other minor comestic change. 2002-05-22 John Levon * libopt++/popt_options.cpp: my usual boring shit * libopt++/popt_options.h: document * libutil/op_popt.h: POPT_TABLEEND missing in some popt.h * TODO: update * doc/oprofile.xml: add some to ack.html * libop/op_events_desc.c: fix long-standing typo 2002-05-22 Philippe Elie * configure.in: * Makefile.in: * libopt++/*: new directory, command line options handling * make.common.in: * pp/Makefile.in: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: use libpopt++ 2002-05-19 Philippe Elie * TODO: update 2002-05-19 John Levon * pp/op_bfd.cpp: fix bug coming from mis-placed strlen() brackets * pp/op_bfd.h: * pp/op_bfd.cpp: kill some more char[]s to avoid silly bugs like the above * README: some minor change 2002-05-18 Philippe Elie * module/compat.h: * module/op_fixmap.c: * module/op_syscalls.c: * module/oprofile.c: * module/oprofile.h: * module/oprofile_nmi.S: fix module up to kernel 2.5.15 * module/compat22.h: small fix for 2.2 2002-05-17 Philippe Elie * module/op_fixmap.c: revert my last change :/. Something is wrong with oprofiel and 2.5.15 but elsewhere 2002-05-17 Philippe Elie * module/op_fixmap.c: fix a long time outstanding bug, we tested bit in the address of x86_capability rather the capability itself. 2002-05-17 Philippe Elie * dae/opd_proc.c: from a typo in opd_put_image_samples first incoming samples for each image was always ignored. As a side effect if opd_open_sample_file() fail the daemon will die with a seg fault. This behavior is in 0.2 release. fix #556918 2002-05-17 John Levon * utils/op_start: typo in detect stale lock file 2002-05-17 Philippe Elie * pp/*: gcc 3.1 compilation. 2002-05-16 Philippe Elie * dae/opd_proc.c: close samples files at cleanup * libdb/db-insert.cpp: if we don't lock the file when creating the root we must ensure than initialization is atomic * pp/op_bfd.cpp: * pp/op_bfd.h: * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * pp/samples_file.cpp: * pp/samples_file.h: move all coherency check between a op_bfd and it's related opp_samples_files outside these class * pp/samples_container.cpp: small modification allowing to privatize op_bfd::ibfd pointer. 2002-05-16 John Levon * libutil/op_lockfile.c: detect and remove stale lock files * utils/op_start: detect stale lock file 2002-05-15 John Levon * pp/Makefile.in: * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/samples_container.h: * pp/samples_container.cpp: * pp/sample_container_imp.h: * pp/sample_container_imp.cpp: * pp/symbol_container_imp.h: * pp/symbol_container_imp.cpp: * pp/symbol_functors.h: some more file-refactoring, and some minor changes 2002-05-15 John Levon * pp/oprofpp.cpp: only allow -r with -l * doc/oprofile.1.in: document -r for oprofpp 2002-05-15 William Cohen * pp/oprofpp.cpp: Added "-r" reverse sort option. 2002-05-15 Philippe Elie * libutil++/utility.h: fix a copyright problem, work-around a (probable) gcc 2.91 bug. * pp/op_bfd.cpp: valgrind exposed a delete problem. * pp/op_time.cpp: * pp/op_to_source.cpp: * pp/oprofpp.cpp: * pp/samples_container.cpp: * pp/samples_container.h: * pp/samples_container.cpp: * pp/samples_container.h: change the handling of shared lib, we no longer allow samples_container_t to auto load related samples files belonging to a shared lib but we create at a higher level an explicit list of samples files : fix #555276 * pp/op_to_source.cpp: * pp/sample_container.cpp: * pp/opp_symbol.cpp: demangle symbol only when we output symbol name, not when we store symbol name in internal representation of symbol. 2002-05-14 Cliff Woolley * gui/oprof_start.cpp: allow Qt3 compilation 2002-05-13 Philippe Elie * doc/oprofile.xml: clarify RTC use, fix #555302 * gui/oprof_start_util.cpp: missing closedir(). Fix #555268 Thanks to William Cohen for his precise report. * module/Makefile.in: fix #555304, a non-native compiler can fail to compile oprofile * libutil++/utility.h: class noncopyable * pp/samples_file.h: use it 2002-05-12 Philippe Elie * libop/op_events_desc.c: * libop/op_events_desc.h: * pp/op_bfd.h: * pp/op_bfd.cpp: * pp/op_to_source.cpp: * pp/oprofpp.h: * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: * pp/samples_file.cpp: * pp/samples_file.h: * pp/samplesfile.h: fix some FIXME 2002-05-12 John Levon * dae/oprofiled.c: delete lockfile on SIGTERM * pp/samples_file.h: * pp/samples_file.cpp: minor changes 2002-05-11 Philippe Elie * pp/op_bfd.cpp: * pp/op_bfd.h: ehance op_bfd_symbol ... * pp/oprofpp.cpp: * pp/samples_container.cpp: move handling of image w/o symbol in op_bfd * pp/samples_file.h: ehance comment (John's work) 2002-05-11 Philippe Elie * pp/op_bfd.cpp: * pp/op_bfd.h: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/samples_files.cpp: minor cleanup 2002-05-10 Philippe Elie * pp/op_bfd.h: * pp/op_bfd.cpp: * pp/opp_symbol.h: * pp/opp_symbol.cpp: * pp/oprofpp.cpp: * pp/samples_container.h: * pp/samples_container.cpp: more typedef for indexed things 2002-05-10 Philippe Elie * pp/*: split oprofpp_util.cpp, oprofpp.h to these .. * pp/samples_file.cpp: new file * pp/samples_file.h: new file * pp/op_bfd.cpp: new file * pp/opbfd.h: new file * pp/*: add a symbol_index_t typedef 2002-05-10 Philippe Elie * doc/srcdoc/Makefile: always clean before building * doc/srcdoc/Doxyfile: ehance file filtering * pp/oprofpp.h: small typo fix 2002-05-10 Philippe Elie * pp/oprofpp.h: * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: * pp/samples_container.cpp: generalize infrastucture for symbol vma/size * pp/op_time.cpp: allow to exclude symbol with op_time -l 2002-05-09 John Levon * doc/xhtml-chunk.xsl: * doc/xhtml-common.xsl: * doc/xhtml.xsl: * doc/Makefile.in: some small improvements * doc/src/doc/Doyxfile: add FIXME * gui/oprof_start.cpp: * libop/op_events_desc.h: * libop/op_events_desc.c: * libutil/filename_match.h: * oprof_report/oprofpp_view.h: * pp/op_time.cpp: * pp/opp_symbol.h: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * pp/samples_container.cpp: * pp/samples_container.h: more doxygen etc. fixes 2002-05-08 Philippe Elie * TODO: update * pp/op_symbol.cpp: better column handling with oprofpp -L 2002-05-08 Philippe Elie * dae/Makefile.in: * gui/Makefile.in: * pp/Makefile.in: * utils/Makefile.in: fix make uninstall 2002-05-08 Philippe Elie * pp/opf_filter.cpp: move to ... * pp/op_to_source.cpp: * pp/opf_container.cpp: move to .. * pp/samples_container.cpp: * pp/opf_filter.h: move to ... * pp/samples_container.h: * pp/Makefile.in: * pp/.cvsignore: update * oprof_report/hotspotview.cpp: * oprof_report/hotspotview.h: * oprof_report/op_view.h: * oprof_report/oprof_report.cpp: * oprof_report/oprof_report.h: * oprof_report/oprof_view.cpp: * oprof_report/oprof_view.h: * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/opf_filter.h: * pp/opp_symbol.cpp: * pp/opp_symbol.h: * pp/oprofpp.cpp: * pp/oprofpp.h: samples_files_t -> samples_container_t * ui/.cvsignore: update * pp/opf_filter.cpp: move filename_match ... * libutil++/filename_match.cpp: here * libutil++/filename_match.cpp: * libutil++/Makefile.in: * pp/Makefile.in: fix typo that prevent op_to_source to be recompiled 2002-05-08 John Levon * TODO: update * doc/Makefile.in: make clean delete *.html * libdb/db-debug.c: pedantry * libutil/op_fileio.h: * libutil/op_fileio.c: * pp/oprofpp.cpp: remove unused code and change function names 2002-05-08 Philippe Elie * libutil/op_libiberty.h: fix compile error (missing size_t definition) 2002-05-08 John Levon * Makefile.in: missing backslash 2002-05-07 John Levon * : OK I lied. Fix some doxygen warnings, and some char const *a -> const char * a * doc/srcdoc/Makefile: add 2002-05-07 John Levon * : ok, fix the headers properly. Last tedious patch, I promise. * dae/opd_util.h: finally remove ! 2002-05-06 John Levon * : move to new header style, doxygen should use @param blah not @blah: or \param blah * doc/srcdoc/Doxyfile: new file for api docs * scripts/Doxyfile: * scripts/dodoc: remove 2002-05-06 John Levon * configure.in: don't add KINC to BKCFLAGS directly * module/Makefile.in: re-write * TODO: update 2002-05-06 John Levon Massive re-organisation of code + build. Most files have been changed. Some small cosmetic changes. * libutil/: * libutil++/: general-purpose utility libs * libop/: oprofile-specific utility lib * utils/: moved op_start et al to this dir * events/: * util/: removed * libutil++/child_reader.cpp: make sure to set member "pid", not local variable 2002-05-05 Philippe Elie * dae/op_session.c: tweak error message when session already exist. Avoid to op_dump when profiler is not started. 2002-05-05 Philippe Elie * TODO: update: * dae/op_session.c: do not create empty session directory and backup oprofileg.log too * dae/opd_util.c: * op_user.h: minor related change 2002-05-05 John Levon * doc/oprofile.xml: update copyright for 2002 * doc/xsl/xhtml-chunk.xsl: indent=yes 2002-05-05 John Levon * TODO: update * Makefile.in: update my release steps 2002-05-05 John Levon * configure.in: ->0.3cvs * results/: hmm, remove /all/ the files 2002-05-04 John Levon * configure.in: bump to 0.2 2002-05-04 William Cohen * doc/oprofile.xml: add note on power management 2002-05-03 John Levon * doc/Makefile.in: * doc/xsl/xhtml-common.xsl: * doc/xsl/xhtml.xsl: * doc/xsl/xhtml-chunk.xsl: use some xsl to fix some of the problems (not all :() 2002-05-02 John Levon * TODO: update 2002-05-02 John Levon * dae/op_session.c: couple of improvements * dae/opd_util.c: fix warning * doc/oprofile.xml: some docs on op_session * pp/op_time.cpp: introduce -s parameter (should be in all utils) 2002-05-02 John Levon * oprof_report/Makefile.in: disable for release 2002-05-02 John Levon * results/: nuke this in favour of oprofile-tests module 2002-05-02 John Levon * TODO: update * op_user.h: * dae/op_start: * dae/op_stop: * dae/opd_util.h: * dae/opd_util.c: * dae/oprofiled.c: * dae/oprofiled.h: * doc/oprofile.1.in: * doc/oprofile.xml: * gui/oprof_start.h: * gui/oprof_start.cpp: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: * gui/ui/oprof_start_base.ui: * oprof_report/oprof_report.cpp: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: remove useless command line options in anticipation of the new spec * libdb/db-manage.c: reset base_memory and fd on close * dae/.cvsignore: * dae/Makefile.in: * dae/op_session.c: * dae/opd_proc.c: * dae/opd_proc.h: * dae/oprofiled.h: * dae/oprofiled.c: use lock file for daemon. Implement named sessions 2002-05-02 Philippe Elie * pp/oprofpp.cpp: * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: fix sect_offset problem. now all class work on vma except samples_file_t which offset vma to samples files offset 2002-05-01 John Levon * dae/opd_proc.c: * libdb/db-manage.c: * libdb/db-test.c: * libdb/db.h: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/oprofpp_util.cpp: allow read-only sample file reading * oprof_report/hotspot_view.cpp: fix warning 2002-05-01 John Levon * dae/op_start: * dae/oprofiled.c: * doc/oprofile.1.in: * doc/oprofile.xml: * gui/oprof_start.cpp: * module/op_nmi.c: * module/op_rtc.c: * module/op_syscalls.c: * module/oprofile.h: * module/oprofile.c: move pid/pgrp filter into userspace only. Remove --ignore-myself 2002-04-30 John Levon * op_user.h: * dae/opd_proc.c: * pp/oprofpp_util.cpp: first part of removing OPD_KERNEL_OFFSET 2002-04-30 John Levon * module/op_nmi.c: also allow user to see 0/ 1/ contents 2002-04-30 William Cohen * module/oprofile.c: Allow non-root examination of /proc/sys/dev/oprofile and initiation of dump. * dae/op_dump: modify message for above 2002-04-30 John Levon * TODO: update * libdb/Makefile: remove from CVS * dae/oprofiled.c: * module/oprofile.c: * module/oprofile.h: use better hash function. Fold unused/full entry case into eviction case for faster common path 2002-04-27 John Levon * configure.in: fix little blooper that shows up when CONFIG_M386 is chosen 2002-04-23 Philippe Elie * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: yet another bug fix for --sort= and counter nr command line specification ... 2002-04-22 Philippe Elie * dae/opd_proc.c: opd_alarm() flush properly samples files * oprof_report/oprof_report.cpp: use the right filename when selecting a shared lib profiled with --separate-samples 2002-04-22 Philippe Elie * pp/op_merge.c: implement merging of the new file format files. 2002-04-21 Philippe Elie * oprof_report/Makefile.in: * oprof_report/oprof_report.cpp: use db 2002-04-20 Philippe Elie * dae/opd_proc.c: OPD_KERNEL_OFFSET thing * pp/oprofpp_util.cpp: 2002-04-20 Philippe Elie * dae/opd_proc.c: minor warning suppression * pp/Makefile.in: * pp/oprofpp.cpp: * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/oprofpp.h: handle the new db file format, this stuff is not yet extensively tested * pp/op_merge.c: not already updated, exit at run time with an error message 2002-04-19 Philippe Elie * dae/opd_proc.h: * dae/oprofiled.h: enable db samples file format 2002-04-19 Philippe Elie * libdb/*: initial import from oprofile-tests module note than this direcroty have it's own ChangeLog file * dae/Makefile.in: use libdb.a * dae/opd_util.h: use db.h. These change do not yet enable the db samples files format. 2002-04-16 John Levon * TODO: * doc/oprofile.xml: * pp/oprof_convert.c: * util/misc.h: * util/misc.c: * util/file_manip.h: * pp/Makefile.in: kill oprof_convert 2002-04-16 John Levon * pp/opf_container.cpp: * pp/oprofpp.h: * pp/demangle_symbol.h: * pp/demangle_symbol.cpp: * pp/Makefile.in: move demangle_symbol into own file * TODO: update some... 2002-04-11 Philippe Elie * pp/opf_filter.cpp: fix a memory leak uncovered by valgrind 2002-04-09 Philippe Elie * dae/oprofiled.h: move definition of linked list to ... * dae/opd_list.h: this new file * dae/opd_proc.c: iterate on opened sample file rather on image list to sync mmap'ed file 2002-04-07 Philippe Elie * pp/oprofpp.h: * oprof_report/oprof_report.cpp: * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/oprofpp_util.cpp: * pp/oprofpp.cpp: use samples_file_t as internal implementation of opp_samples_files. Now all samples files read are made through samples_file_t object. 2002-04-04 Philippe Elie * dae/op_start: fix bash1 detection * doc/Makefile.in: fix install target 2002-03-25 John Levon * configure.in: some preliminary stuff for NGPT * TODO: update * doc/Makefile.in: * doc/oprofile.sgml: * doc/oprofile.xml: move to DocBook/XML * doc/oprofile.xml: document Bash 2 dependency * dae/op_start: fix for /bin/bash being bash v1 - untested 2002-04-02 Philippe Elie * pp/oprofpp.cpp: * pp/oprofp_util.cpp: debug and use opp_bfd::symbol_size() 2002-03-30 Philippe Elie * ChangeLog: change my email address 2002-03-22 Philippe Elie * dae/op_start: default buffer size to zero and let module override the default. * module/op_rtc.c: * module/oprofile.h: * op_user.h: * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: an another coherency fix, unhopefully this bug fix does not fix the configuration file (see # ) * pp/oprofpp.cpp: for gprof dump do not print events settings * pp/oprofpp.h: * pp/oprofpp_util.cpp: prepare using symbol size 2002-03-21 Philippe Elie * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: factorize event settings output * pp/oprofpp.h: ditto + do_list_xxx/do_dump_gprof : static free function rather than member function. 2002-03-21 Philippe Elie * op_user.h: * pp/oprofpp.h: more doxygen comments * dae/opd_kernel.c: * dae/opd_proc.c: * dae/opd_util.c: * dae/oprofiled.c: * gui/oprof_start.cpp: * gui/oprof_start_util.cpp: exit(): use {EXIT_FAILURE|EXIT_SUCCESS} 2002-03-20 Philippe Elie * pp/opf_filter.h: simplify slightly interface of samples_files_t * oprof_report/oprof_report.cpp: * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/oprofp.cpp: reflect the new interface. * pp/opp_symbol.cpp: ParseOutputOption --> static member of OutputSymbol ... * pp/opp_symbol.h: * util/file_manip.h: * util/string_manip.h: doxygen comments 2002-03-19 Philippe Elie * scripts/Doxyfile: small tweak * op_user.h: * pp/opp_symbol.h: * pp/oprofpp.h: * util/child_reader.h: doxygen comments. 2002-03-19 Philippe Elie * pp/opf_filter.h: * pp/opf_container.cpp: remove delegation {symbol|samples}_container_t -> xxx_impl, no functionnal change * pp/*: start a more serious doxygenization. first step include fixing prototype and a client documentation for opp_bfd * script/Doxyfile: doxygen script for pp/*.h, util/*.h 2002-03-19 John Levon * module/op_fixmap.c: include pagemap.h, so we pick up highmem.h, which is needed with some kernels (missing kmap_pagetable define via pte_offset) 2002-03-18 Philippe Elie * pp/op_time.cpp: * doc/oprofile1.1.in: * doc/oprofile.sgml: allow reverse sort in all case * pp/opp_symbol.h: * pp/opp_symbol.cpp: remove unnecessary cast * oprof_report/oprof_report.cpp: * oprof_report/oprof_report.h: * oprof_report/*_view.*: revert partially 2002-03-17 patch, making again data change notification in two step. 2002-03-17 John Levon * pp/oprofpp_util.cpp: clarify binutils bug workaround 2002-03-17 Philippe Elie * oprof_report/op_view.h: * oprof_report/hostpost_view.cpp: * oprof_report/hostpost_view.h: * oprof_report/oprof_report.cpp: * oprof_report/oprof_report.h: * oprof_report/oprof_view.cpp: * oprof_report/oprof_view.h: simplify virtual interface + minor graphic bug fix 2002-03-16 Philippe Elie * TODO: update * oprof_report/hotspot_view.cpp: new * oprof_report/hotspot_view.h: new HotspotView class * oprof_report/oprof_report.cpp: * oprof_report/oprof_report.h: use HotspotView * oprof_report/Makefile.in: reflect above * pp/op_time.cpp: small tidy 2002-03-15 Philippe Elie * TODO: update * dae/oprofiled.c: fix --version when module is not loaded * pp/opp_symbol.cpp: * pp/opp_symbol.h: avoid to padd the last field, use a positive form for osf_header * pp/oprofpp.h: * pp/oprofpp.cpp: * pp/opf_filter.cpp: * pp/opprofpp_util.cpp: * pp/op_time.cpp: fix --sort option 2002-03-14 Philippe Elie * TODO: update * pp/op_time.cpp: * pp/opf_filter.cpp: * pp/opp_symbol.cpp: * pp/oprofpp_.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: handle -c0,1 and --sort #nr_ctr for all post-profile tools allowing a more precise way to specify on which counters tools must work 2002-03-13 Philippe Elie * pp/oprofpp_util.cpp: get_linenr() better handling of bfd_find_nearest_line. Fix #529622 * pp/opf_container.cpp: simplify symbol_container_impl * pp/opp_symbol.cpp: use ostringstream only when necessary 2002-03-09 John Levon * doc/oprofile.sgml: some laptops have a usable local APIC 2002-03-09 Philippe Elie * oprof_report: new directory, oprofpp/op_time like GUI * oprof_report/op_view.h: base class for view * oprof_report/oprof_report_main.cpp: * oprof_report/oprof_report.h: * oprof_report/oprof_report.cpp: main class * oprof_report/oprofpp_view.h: * oprof_report/oprofpp_view.cpp: oproffp like view * oprof_report/Makefile.in: * oprof_report/ui/oprof_report.base.ui: oprof_report UI * oprof_report/ui/Makefile.in: * Makefile.in: * configure.in: handle oprof_report * ui/Makefile.in: clarify how dependencies work 2002-03-08 John Levon * configure.in: bump to 0.2cvs * TODO: update 2002-03-07 Philippe Elie * pp/opf_container.cpp: handle osf_short_linr_info * pp/opp_symbol.cpp: tweak output output when linenr/filename is not available 2002-03-07 John Levon * util/Makefile.in: remove -pedantic (Phil don't you read comments ? ;) 2002-03-07 John Levon * TODO: update * pp/: use "invalid" not "illegal" 2002-03-06 John Levon * TODO: update 2002-03-06 Philippe Elie * pp/opfropp_util.cpp: more specific error messages * doc/oprofile.sgml: clarify problem about sparse samples files and filesystem. * util/file_manip.h: * util/file_manip.cpp: create_file_list() allow recursive file list creation. * pp/op_time.cpp: add option -p/-P to allow specifying alternate path name where to search for image name * doc/oprofile.1.in: * doc/oprofile.sgml: update option for op_time 2002-03-05 Philippe Elie * pp/oprofpp_util.cpp: remove multiple symbols belonging to the same vma (Fix #526098) Accept also all symbol types, we filter them by name. 2002-03-04 Philippe Elie * util/misc.h: minor comment fix * pp/oprofpp_util.cpp: tweak the last commit 2002-03-04 John Levon * pp/oprofpp_util.cpp: welcome in the local symbols ... 2002-03-03 Philippe Elie * pp/opf_filter.h: * pp/opf_container.cpp: samples_files_t::add() add an hint parameter on what information will needed. * pp/op_time.cpp: * pp/oprofpp.cpp: * pp/opf_filter.cpp: use it * pp/op_time.cpp: when a samples files for one counter does not exist avoid to load it (op_time -l) fix #525237 2002-03-02 Philippe Elie * pp/Makefile.in: add -pedantic to CXXFLAGS * pp/oprofpp.h: replace macro verpbrintf with a function * pp/oprofpp_util.cpp: implement it * pp/opp_symbol.h: * pp/op_time.cpp: fix pedantic warning * pp/opevents.cpp: * op_user.h: op_get_cpu_nr_counters() new * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/opf_filter.h: * pp/opp_symbol.cpp: * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: remove global var op_nr_counters 2002-03-02 Philippe Elie * module/op_syscalls.c: do not pre-allocate some dname hash map entry for common pathname but pre alloc entry zero to reserve it * pp/op_time.cpp: add image name to the default output format * module/compat22.h: move cacheline_aligned macro to ... * module/op_cache.h: this new file * module/compat.h: use it * module/compat22.h: * module/oprofile.c: replace some __cacheline_aligned by __cacheline_aligned_in_smp 2002-03-01 Philippe Elie * dae/opd_kernel.c: * dae/opd_proc.c: simplify handling of kernel samples * pp/opt_time.cpp: * pp/opp_symbol.cpp: * pp/opp_symbol.h: * pp/oprofpp.cpp: * pp/oprofpp.h: tidy, gives a negative form to header output format * version.h.in: new macro show_version() to output version * doc/oprofile.sgml: document it * dae/oprofiled.c: * events/op_help.c: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/opf_filter.cpp: * pp/oprofpp.cpp: use it 2002-03-01 John Levon * TODO: update * module/oprofile.c: * module/op_syscalls.c: merge note/map lock 2002-02-27 Philippe Elie * TODO: upadte * doc/oprofile.1.in: * doc/oprofile.sgml: * pp/opp_symbol.h: * pp/opp_symbol.cpp: * pp/oprofpp.cpp: use columned output for oprofpp -L, -s * pp/oprofpp.cpp: command-line counter specification was broken by my last patch * pp/opf_filter.cpp: ditto but bug comes from the far past 2002-02-26 Philippe Elie * pp/op_merge.cpp: small tidy * pp/op_time.cpp: * pp/opf_container.cpp: * pp/opf_filter.h: * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: remove the nasty global var int ctr; pass it as parameter to each relevant function using it. * module/compat.h: support for 2.5.5. 2.4.18 also tested * pp/opp_symbol.h: * pp/opp_symbol.cpp: new, mainly for implementing --output-format * pp/op_time.cpp: * pp/oprofpp.cpp: use output format stuff * pp/Makefile.in: reflect above change * doc/oprofile.1.in: * doc/oprofile.sgml: document --output-format 2002-02-13 Philippe Elie * TODO: update * module/compat22.h: * module/compat24.h: * module/oprofile_nmi.S: small tidy * module/op_apic.c: * module/op_fixmap.c: * module/op_nmi.c: * module/oprofile.h: avoid memory leak of apic mapping 2002-02-12 Philippe Elie * TODO: update * pp/oprofpp_util.cpp: use stable sort and correct the comparison function on symbol vma * pp/opf_filter.cpp: remove a boring new line in output * module/makefile.in: optimize for 686 but do not use any specific 686 insn. * configure.in: check against CONFIG_PREEMPT 2002-02-10 John Levon * events/op_events_desc.c: remove dead code * module/compat.h: RedHat backported MODULE_LICENSE() * module/op_syscalls.c: * module/op_util.c: remove FIXMEs 2002-02-09 Bob Montgomery * module/op_rtc.c: right actual RTC value back * doc/oprofile.sgml: document that 2002-02-09 John Levon * module/op_init.c: set rtc cpu type directly 2002-02-08 Philippe Elie * TODO: update * module/oprofile_nmi.S: cut and copy from oprofile_nmi24.s * module/oprofile_nmi22.S: remove * module/oprofile_nmi22.S: remove * module/Makefile.in: reflect them * pp/opf_filter.cpp: do not print unit mask for RTC cpu type * doc/oprofile.sgml: document post-profile tools commons options 2002-02-05 Philippe Elie * TODO: update mainly by moving things to 0.1 * pp/opf_filter.h: * pp/opf_container.cpp: small cleanup + minor tweak to get more reliable sort order on filename. 2002-02-05 Philippe Elie * pp/opf_filter.h: declare create_artificial_symbol() * pp/oprofpp_util.cpp: show how elf symbols size could be handled. * pp/oprofpp_util.cpp: add BSF_GLOBAL symbols to symbols of interest. 2002-02-04 John Levon * module/oprofile.c: add [un]lock_sysctl 2002-02-04 John Levon * dae/oprofiled.h: * dae/oprofiled.c: * dae/opd_proc.c: free stuff on shutdown (to clean dmalloc reports) 2002-02-03 John Levon * configure.in: bump to 0.1 * TODO: update 2002-02-02 John Levon * configure.in: bump to 0.0.9 2002-02-02 John Levon * module/op_nmi.c: fix stupid bug spotted by Bob Montgomery 2002-02-01 Philippe Elie * module/compat.h: define REMAP_PAGE_RANGE * module/op_syscalls.c: use it (2.5.3 support) 2002-01-30 Philippe Elie * module/compat.h: * module/op_nmi.c: re-add explicit constant for all MSR_ constants. 2002-01-30 Philippe Elie * configure.in: * doc/oprofile.sgml: * module/compat22.h: remove support for kernel version prior to 2.2.11 * module/op_fixmap.c: * module/compat.h: small cleanup * module/oprofile.c: avoid multi-line literal string * pp/oprofpp_util.cpp: better to get_symbols() ;) 2002-01-29 John Levon * module/op_fixmap.c: remap fake mapping on 2.2 as well when necessary 2002-01-27 Philippe Elie * module/Makefile.in: sorry, -Werror is only usefull for test. * doc/oprofile.1.in: a few words about op_stop * module/compat.h: * module/compat22.h: * module/compat24.h: change pte_page_address definition for 2.2.20 * pp/opf_container.cpp: no warning when creating artificial symbols * pp/oprofpp_tuil.cpp: no warning for image without symbols 2002-01-27 John Levon * gui/oprof_start.cpp: * pp/op_merge.cpp: * pp/op_time.cpp: * pp/opf_container.cpp: std namespace fixes. 2002-01-27 John Levon * pp/op_time.cpp: small hacky output cleanup 2002-01-27 Philippe Elie * TODO: update * dae/opd_proc.c: small cleanup * doc/opf_container.cpp: handle image without symbols * doc/oprofile.1.in: * doc/oprofile.sgml: * doc/op_time.cpp: implement and document --demangle and --show-image-name * pp/oprofpp_util.cpp: add using elf symbols size but disable it 2002-01-26 John Levon * TODO: update * dae/opd_proc.c: tiny clean * doc/oprofile.sgml: spell fix 2002-01-26 Philippe Elie * TODO: update * pp/op_merge.c: remove FIXME * pp/op_time.cpp: minor fix * pp/opf_filter.h: * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/opf_container.cpp: Show more clearly than samples_files_t support adding any number of samples files to the underlined container. 2002-01-26 Philippe Elie * pp/oprofpp_util.cpp: allow to load image without symbols * pp/Makefile.in: * pp/op_time: implement -l option that show symbols details. Currently with separate-samples files symbols are showed more than one time. This is a bug rather a feature. * doc/oprofile.1.in: * doc/oprofile.sgml: document op_time -l * dae/opd_proc.c: bug fix from last change 2002-01-25 John Levon * TODO: * dae/opd_proc.c: search maps in reverse order so we prefer newer mappings. 2002-01-25 Philippe Elie * pp/op_merge.cpp: minor fix + comment * pp/op_time.cpp: comment, use samples_file_t * pp/oprofpp.h: * pp/oprofpp_util.cpp: minor change 2002-01-24 John Levon * dae/opd_proc.c: remove stale comment * TODO: update * module/compat.h: * module/compat22.h: * module/compat24.h: fix for pte_page on 2.2.20+ 2002-01-24 Philippe Elie * op_merge.cpp: * oprofpp.h: * oprofpp_util.cpp: code move + cleanup 2002-01-23 Philippe Elie * util/shared_ptr.h: a templatized shared pointer. * pp/op_merge.c: new to merge samples files * pp/Makefile.in: * pp/opf_filter.cpp: * pp/opf_filter.h: * pp/oprofpp.h: * pp/oprofpp_util.cpp: minor change to add op_merge support * doc/Makefile.in: * doc/oprofile.1.in: * doc/oprofle.smgl: document op_merge 2002-01-22 John Levon * module/Makefile.in: can only depmod if we run that kernel * module/op_fixmap.c: deal with no APIC config for 2.4.10+ 2002-01-22 John Levon * module/Makefile.in: * module/oprofile.h: * module/oprofile.c: * module/op_x86.c: * module/op_apic.c: * module/op_fixmap.c: split op_x86.c. Various changes to only enable the APIC if it's not, and to remap / map the APIC as is necessary. * module/apic_up_compat.h: * module/compat.h: * module/compat22.h: clean up V_*() macros * module/op_init.c: remove FORCE_RTC 2002-01-22 Philippe Elie * TODO: update * dae/opd_proc.c: use remove not unlink * gui/oprof_start.cpp: use remove not system("rm xxx") * doc/Makefile.in: slightly improvment * doc/oprofile.1.in: move --help --version to a common section 2002-01-21 John Levon * module/compat22.h: fix missing cli() 2002-01-21 John Levon * module/oprofile.c: * module/compat22.h: * module/compat24.h: fix NMI wake-up for 2.2 SMP * module/op_dcache.h: add KERN_ERR * module/op_x86.c: cleanup a little 2002-01-21 Philippe Elie * TODO: update * doc/oprofile.1.in: * doc/oprofile.sgml: minor change * module/Makefile.in: auto-dependencies for compat.c * module/compat.c: * module/compat22.h: FIXME remove for vmalloc_32 2002-01-20 Philippe Elie * gui/oprof_start.cpp: fix configuration saving when switching of cpu_type. * module/Makefile.in: * module/compat.c: minor change * compat.h: add minor macro * oprofile.c: use minor instead MINOR (2.5.2 support) * op_x86.c: check SPIV (missing from a previous patch) 2002-01-20 John Levon * TODO: punt some things to next release * dae/opd_proc.c: fix printf of null 2002-01-20 John Levon * TODO: update * module/oprofile.c: add comment * module/compat22.h: * module/compat24.h: * module/op_syscalls.c: fix locking for out_mmap 2002-01-20 Philippe Elie * module/op_x86.c: check MSR + SPIV for enabling APIC * module/compat.c: don't attempt to get root * module/compat.h: NEED_FIXMAP fixes 2002-01-18 Philippe Elie * TODO: update * module/compat.h: * module/compat24.h: move things needed for 2.2/2.4 in compat.h 2002-01-18 John Levon * module/compat22.h: never wake up from NMI on 2.2 SMP for now :( 2002-01-18 John Levon * module/compat.h: * module/compat22.h: * module/compat24.h: s/VATLEAST/V_AT_LEAST/ * module/oprofile.c: remove dead code 2002-01-17 John Levon * module/compat.c: don't need to re-take BKL for d_path on 2.2 2002-01-17 John Levon * module/compat22.h: * module/compat24.h: * module/op_syscalls.c: we mustn't take the mmap sem under 2.2 2002-01-17 John Levon * module/compat22.h: * module/compat24.h: * module/op_syscalls.c: whoops, handy to lock the BKL when it is necessary. * dae/oprofiled.c: fix warning 2002-01-17 John Levon * op_user.h: * dae/op_start: * gui/oprof_start_config.h: * module/oprofile.h: bump note size and watermark, I was getting problems on my dual SMP box in kernel compiles 2002-01-17 John Levon * module/Makefile.in: * module/oprofile_nmi.S: * module/oprofile_nmi22.S: * module/oprofile_nmi24.S: split assembly for 2.2/4 * module/compat.h: * module/compat22.h: * module/compat24.h: s/AFTER/ATLEAST/ 2002-01-17 John Levon * module/compat24.h: define to have ->owner 2002-01-17 Philippe Elie * gui/oprof_start.h: * gui/oprof_start_config.h: * gui/oprof_start.cpp: validate the RTC max count 2002-01-17 John Levon * TODO: update * oprofile.c: * module/compat24.h: * module/compat22.h: fix compile, nmi wake up check * module/op_rtc.c: user/kernel profiling feature 2002-01-17 John Levon * doc/oprofile.sgml: clarification * module/compat22.h: * module/compat24.h: * module/oprofile.c: ->owner fixes 2002-01-17 John Levon * module/oprofile.h: clean up * module/compat.h: * module/compat22.h: * module/compat24.h: split header files up for readability 2002-01-17 Philippe Elie * TODO: update * doc/oprofile.sgml: speach about assembler * module/compat.h: small tweak for 2.2, no impact on 2.4 2002-01-16 John Levon * configure.in: look for rtc_lock * module/compat.h: use rtc_lock if there 2002-01-16 Philippe Elie * module/compat.h: * module/apic_up_compat.h: cleanup + allow compile !CONFIG_X86_LOCAL_APIC on 2.4/2.5. (only compile tested) 2002-01-15 Philippe Elie * events/op_events.c: avoid gui crash: event name must contain only one word. If you test RTC patch destroy ~/.oprofile/oprof_start_event#0 2002-01-15 John Levon * module/compat.h: * module/compat.c: * module/op_rtc.c: 2.2 modversions fix 2002-01-15 John Levon * TODO: update * module/compat.h: * module/compat.c: * module/op_rtc.c: fix 2.2 compile 2002-01-15 John Levon * module/Makefile.in: whoops, forgot to commit this 2002-01-15 John Levon * gui/oprof_start.cpp: some improvements for RTC 2002-01-15 John Levon * dae/op_stop: fix "op_start && op_stop" bug using multiple dump_stop writes. 2002-01-14 Dave Jones * pp/op_time.cpp: fix for printing (NaN%) in the zero sample case. 2002-01-14 John Levon * module/op_rtc.c: remove unneeded check 2002-01-14 John Levon * dae/op_start: fix for PMC case 2002-01-14 John Levon * TODO: update * dae/op_start: take --rtc-value * dae/oprofiled.c: set headers sensibly for RTC * doc/oprofile.1.in: update * doc/oprofile.sgml: RTC update * events/op_events_descr.c: * events/op_events.c: good name for RTC event * gui/oprof_start.cpp: basic support for RTC * module/op_rtc.c: implement and use rtc_value 2002-01-14 John Levon * TODO: update * dae/op_start: load module at start. Handle CPU_RTC. Avoid sysctl for now on RTC case. * dae/oprofiled.c: only read sysctls if PMC. Needs clean. * events/op_events.c: add RTC event. * events/op_events_desc.c: get CPU type from module. * module/op_init.c: detect CPU_RTC. * module/op_nmi.c: setup code moved from op_init.c * module/op_rtc.c: enable interrupt, fixed at 128 for now. * module/op_x86.c: add Athlon to needs_apic_setup checks * module/oprofile.c: use correct interrupt handler based on CPU type 2002-01-14 John Levon * TODO: update * op_user.h: add CPU_RTC * op_init.c: add FIXMEs * op_nmi.c: * op_rtc.c: * oprofile.h: * oprofile.c: implement abstract interrupt handler code 2002-01-14 John Levon * gui/oprof_start_config.cpp: fix vmlinux/system.map defaults 2002-01-13 Philippe Elie * configure.in: reject unsupported kernel version * module/apic_up_compat.h: * module/compat.h: small cleanup * module/op_x86.c: ditto, always put apic memory page as non cachable 2002-01-12 John Levon * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: implement whitelist for arguments to op_start * TODO: update 2002-01-13 Philippe Elie * module/compat.h: * module/apic_up_compat.h: * module/op_x86.c: allow to run oprofile when !CONFIG_X86_LOCAL_APIC on 2.2.x kernel 2002-01-12 Philippe Elie * module/compat.h: fix some FIXME * module/op_x86.c: do not hang SMP kernel UP box with 2.2.x 2002-01-11 Philippe Elie * module/compat.h: support for UP from 2.2.0, for SMP from 2.2.8. It is worthwhile to try more support. !CONFIG_X86_LOCAL_APIC not yet supported. 2002-01-11 John Levon * TODO: update * dae/opd_proc.c: * doc/oprofile.sgml: * pp/op_time.cpp: add FIXMEs 2002-01-11 John Levon * module/oprofile.c: never return 0 unless we're really closing down 2002-01-11 John Levon * TODO: update * gui/Makefile.in: * gui/oprof_start.cpp: use absolute paths 2002-01-11 John Levon * doc/oprofile.sgml: add note about --with-linux 2002-01-11 John Levon * Rules.make.in: * gui/Makefile.in: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: remove kernel headers from userland ! 2002-01-11 John Levon * configure.in: remove dead checks. comment out APIC check, hide grep output * module/Makefile.in: add compat.c * apic_up_compat.h: UP 2.2 missing defines. Need to investigate fixmap situation. * compat.c: move 2.2 dcache code here * compat.h: dcache compat support. check for whether we should check for mptable. Don't do fixmap hack on 2.2 * op_dcache.h: shared dcache inline functions * op_syscalls.c: clean up dcache code for 2.2/2.4 * op_x86.c: update apic_need_setup for 2.2 and the possibility of not enabling APIC support on 2.4 too. Needs checking ! Also don't do mptable check on 2.2 * oprofile.h: add missing include guard ;) 2002-01-11 John Levon * module/compat.h: minor fixes 2002-01-11 Philippe Elie * module/compat.h: many change, can be used down to 2.2.8 * module/oprofile.h: move #ifdef on kernel version to compat.h * module/op_util.c: * module/op_syscalls.c: minor change * configure.in: comment unnecessary stuf. * module/Makefile.in: missing include path for oprofile.s 2002-01-10 John Levon * Makefile.in: update checklist for dist * module/oprofile.h: add apparently needed version.h 2002-01-10 John Levon * configure.in: fix accidental trashing of BKCFLAGS * module/op_util.c: include right header * module/compat.h: use correct smp_call_function 2002-01-10 Philippe Elie * module/compat.h: new file include backward compatibility stuff 2002-01-09 John Levon * doc/oprofile.sgml: update infodragon's email address * configure.in: bump to 0.0.9cvs 2002-01-08 John Levon * TODO: update * configure.in: fix case when X isn't installed. Bump to 0.0.8 2002-01-07 John Levon * util/Makefile.in: "fix" last g++ 3.0 problem with libiberty.h and string.h clashing prototypes by disabling -pedantic for this directory 2002-01-07 John Levon * pp/opf_container.cpp: * pp/opf_filter.h: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * util/file_manip.h: * util/file_manip.cpp: * util/string_manip.h: fix most g++ 3.0 problems 2002-01-07 John Levon * TODO: update 2002-01-05 Philippe Elie * doc/oprofile.sgml: Avoid to use -- inside sgml comment 2002-01-05 John Levon * dae/op_start: * dae/op_stop: (very) hacky loop to wait for daemon start and stop 2002-01-05 John Levon * module/oprofile.c: revert my broken stop fix, and fix the old (new) one 2002-01-05 John Levon * dae/opd_kernel.c: * dae/opd_proc.c: * dae/opd_proc.h: * dae/opd_util.c: * dae/oprofiled.c: * dae/oprofiled.h: further minor cleanups 2002-01-04 John Levon * module/oprofile.c: change last change to have an explicit check in the sysctl dump, rather than generalised code. 2002-01-04 Philippe Elie * module/oprofile.c: do not re-enable counter during shutdown * dae/Makefile.in: fix opd_kernel.c dependancy 2002-01-04 John Levon * dae/Makefile.in: * dae/opd_proc.c: * dae/opd_kernel.c: move kernel/module stuff into new file. Some minor changes. 2002-01-04 John Levon * dae/oprofiled.c: remove extra dump 2002-01-04 John Levon * dae/opd_proc.c: minor crap 2002-01-04 John Levon * TODO: update * dae/oprofiled.c: * dae/oprofiled.h: * dae/opd_proc.c: print stats on shutdown too * module/oprofile.c: additional check against daemon hanging on shutdown :( 2002-01-04 John Levon * dae/op_stop: * dae/oprofiled.c: * doc/oprofile.sgml: * module/oprofile.h: * module/oprofile.c: implement new clean shutdown via sysctl dump_stop 2002-01-04 Philippe Elie * module/oprofile.c: add a warning when note buff overflow. 2002-01-04 John Levon * module/oprofile.c: pin note at the end on overflow 2002-01-03 Philippe Elie * dae/opd_proc.c: Apologies: stupid bug. Never forget than LRU list of samples files must not contain already unmaped files * module/oprofile.c: another silly bug, detected cpu was overwritten... 2002-01-03 John Levon * doc/oprofile.sgml: some fixes, comments 2002-01-03 Philippe Elie * doc/oprofile.sgml: improve documentation, corrected by John Levon 2002-01-03 John Levon * gui/oprof_start.h: * gui/oprof_start.cpp: * gui/ui/oprof_start.base.ui: remove the config buttons and save on a hide from the WM 2002-01-03 John Levon * module/oprofile.c: make sure note_pos never goes past the buffer :P 2002-01-03 John Levon * dae/opd_util.c: allow EAGAINs through as well 2002-01-02 Philippe Elie * pp/opf_container.cpp: * pp/opf_filter.cpp: minor change 2002-01-02 John Levon * doc/oprofile.sgml: various docs improvements 2002-01-02 John Levon * dae/oprofiled.c: better enable the actual profiling again :P 2002-01-02 John Levon * config.h.in: remove this again from CVS. 2002-01-02 John Levon * dae/op_stop: send SIGUSR1 to stop profiler * dae/opd_proc.c: reformat a little * dae/opd_util.h: * dae/opd_util.c: change opd_read_device semantics * dae/oprofiled.c: clean shutdown from SIGUSR1 * module/oprofile.c: handle non-blocking reads * pp/opf_filter.h: * pp/opf_filter.cpp: slight cleanups * TODO: update 2002-01-01 John Levon * oprofile.sgml: clarify that -g is not necessary for basic profiling (reported by Jeff Epler ) See ChangeLog-2001 for earlier changelogs. oprofile-1.3.0/configure0000775000175000017500000251040513323172173012175 00000000000000#! /bin/sh # Guess values for system-dependent variables and create Makefiles. # Generated by GNU Autoconf 2.69 for OProfile 1.3.0. # # # Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc. # # # This configure script is free software; the Free Software Foundation # gives unlimited permission to copy, distribute and modify it. ## -------------------- ## ## M4sh Initialization. ## ## -------------------- ## # Be more Bourne compatible DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : emulate sh NULLCMD=: # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which # is contrary to our usage. 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Likely further. if test -x /sbin/sysctl; then lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` elif test -x /usr/sbin/sysctl; then lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` else lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs fi # And add a safety zone lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` ;; interix*) # We know the value 262144 and hardcode it with a safety zone (like BSD) lt_cv_sys_max_cmd_len=196608 ;; os2*) # The test takes a long time on OS/2. lt_cv_sys_max_cmd_len=8192 ;; osf*) # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[ ]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test X`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test 17 != "$i" # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac fi if test -n "$lt_cv_sys_max_cmd_len"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sys_max_cmd_len" >&5 $as_echo "$lt_cv_sys_max_cmd_len" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: none" >&5 $as_echo "none" >&6; } fi max_cmd_len=$lt_cv_sys_max_cmd_len : ${CP="cp -f"} : ${MV="mv -f"} : ${RM="rm -f"} if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then lt_unset=unset else lt_unset=false fi # test EBCDIC or ASCII case `echo X|tr X '\101'` in A) # ASCII based system # \n is not interpreted correctly by Solaris 8 /usr/ucb/tr lt_SP2NL='tr \040 \012' lt_NL2SP='tr \015\012 \040\040' ;; *) # EBCDIC based system lt_SP2NL='tr \100 \n' lt_NL2SP='tr \r\n \100\100' ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5 $as_echo_n "checking how to convert $build file names to $host format... " >&6; } if ${lt_cv_to_host_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32 ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32 ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32 ;; esac ;; *-*-cygwin* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_noop ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin ;; esac ;; * ) # unhandled hosts (and "normal" native builds) lt_cv_to_host_file_cmd=func_convert_file_noop ;; esac fi to_host_file_cmd=$lt_cv_to_host_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5 $as_echo "$lt_cv_to_host_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5 $as_echo_n "checking how to convert $build file names to toolchain format... " >&6; } if ${lt_cv_to_tool_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else #assume ordinary cross tools, or native build. lt_cv_to_tool_file_cmd=func_convert_file_noop case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32 ;; esac ;; esac fi to_tool_file_cmd=$lt_cv_to_tool_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5 $as_echo "$lt_cv_to_tool_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5 $as_echo_n "checking for $LD option to reload object files... " >&6; } if ${lt_cv_ld_reload_flag+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_reload_flag='-r' fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_reload_flag" >&5 $as_echo "$lt_cv_ld_reload_flag" >&6; } reload_flag=$lt_cv_ld_reload_flag case $reload_flag in "" | " "*) ;; *) reload_flag=" $reload_flag" ;; esac reload_cmds='$LD$reload_flag -o $output$reload_objs' case $host_os in cygwin* | mingw* | pw32* | cegcc*) if test yes != "$GCC"; then reload_cmds=false fi ;; darwin*) if test yes = "$GCC"; then reload_cmds='$LTCC $LTCFLAGS -nostdlib $wl-r -o $output$reload_objs' else reload_cmds='$LD$reload_flag -o $output$reload_objs' fi ;; esac if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}objdump", so it can be a program name with args. set dummy ${ac_tool_prefix}objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OBJDUMP"; then ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OBJDUMP="${ac_tool_prefix}objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OBJDUMP=$ac_cv_prog_OBJDUMP if test -n "$OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OBJDUMP" >&5 $as_echo "$OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OBJDUMP"; then ac_ct_OBJDUMP=$OBJDUMP # Extract the first word of "objdump", so it can be a program name with args. set dummy objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OBJDUMP"; then ac_cv_prog_ac_ct_OBJDUMP="$ac_ct_OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OBJDUMP="objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OBJDUMP=$ac_cv_prog_ac_ct_OBJDUMP if test -n "$ac_ct_OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OBJDUMP" >&5 $as_echo "$ac_ct_OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OBJDUMP" = x; then OBJDUMP="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OBJDUMP=$ac_ct_OBJDUMP fi else OBJDUMP="$ac_cv_prog_OBJDUMP" fi test -z "$OBJDUMP" && OBJDUMP=objdump { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to recognize dependent libraries" >&5 $as_echo_n "checking how to recognize dependent libraries... " >&6; } if ${lt_cv_deplibs_check_method+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_file_magic_cmd='$MAGIC_CMD' lt_cv_file_magic_test_file= lt_cv_deplibs_check_method='unknown' # Need to set the preceding variable on all platforms that support # interlibrary dependencies. # 'none' -- dependencies not supported. # 'unknown' -- same as none, but documents that we really don't know. # 'pass_all' -- all dependencies passed with no checks. # 'test_compile' -- check by making test program. # 'file_magic [[regex]]' -- check by looking for files in library path # that responds to the $file_magic_cmd with a given extended regex. # If you have 'file' or equivalent on your system and you're not sure # whether 'pass_all' will *always* work, you probably want this one. case $host_os in aix[4-9]*) lt_cv_deplibs_check_method=pass_all ;; beos*) lt_cv_deplibs_check_method=pass_all ;; bsdi[45]*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' lt_cv_file_magic_cmd='/usr/bin/file -L' lt_cv_file_magic_test_file=/shlib/libc.so ;; cygwin*) # func_win32_libid is a shell function defined in ltmain.sh lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' ;; mingw* | pw32*) # Base MSYS/MinGW do not provide the 'file' command needed by # func_win32_libid shell function, so use a weaker test based on 'objdump', # unless we find 'file', for example because we are cross-compiling. if ( file / ) >/dev/null 2>&1; then lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' else # Keep this pattern in sync with the one in func_win32_libid. lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' lt_cv_file_magic_cmd='$OBJDUMP -f' fi ;; cegcc*) # use the weaker test based on 'objdump'. See mingw*. lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?' lt_cv_file_magic_cmd='$OBJDUMP -f' ;; darwin* | rhapsody*) lt_cv_deplibs_check_method=pass_all ;; freebsd* | dragonfly*) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then case $host_cpu in i*86 ) # Not sure whether the presence of OpenBSD here was a mistake. # Let's accept both of them until this is cleared up. lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD|DragonFly)/i[3-9]86 (compact )?demand paged shared library' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` ;; esac else lt_cv_deplibs_check_method=pass_all fi ;; haiku*) lt_cv_deplibs_check_method=pass_all ;; hpux10.20* | hpux11*) lt_cv_file_magic_cmd=/usr/bin/file case $host_cpu in ia64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - IA64' lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so ;; hppa*64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]' lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl ;; *) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library' lt_cv_file_magic_test_file=/usr/lib/libc.sl ;; esac ;; interix[3-9]*) # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|\.a)$' ;; irix5* | irix6* | nonstopux*) case $LD in *-32|*"-32 ") libmagic=32-bit;; *-n32|*"-n32 ") libmagic=N32;; *-64|*"-64 ") libmagic=64-bit;; *) libmagic=never-match;; esac lt_cv_deplibs_check_method=pass_all ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) lt_cv_deplibs_check_method=pass_all ;; netbsd*) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|_pic\.a)$' fi ;; newos6*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=/usr/lib/libnls.so ;; *nto* | *qnx*) lt_cv_deplibs_check_method=pass_all ;; openbsd* | bitrig*) if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|\.so|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' fi ;; osf3* | osf4* | osf5*) lt_cv_deplibs_check_method=pass_all ;; rdos*) lt_cv_deplibs_check_method=pass_all ;; solaris*) lt_cv_deplibs_check_method=pass_all ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) lt_cv_deplibs_check_method=pass_all ;; sysv4 | sysv4.3*) case $host_vendor in motorola) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` ;; ncr) lt_cv_deplibs_check_method=pass_all ;; sequent) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; sni) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" lt_cv_file_magic_test_file=/lib/libc.so ;; siemens) lt_cv_deplibs_check_method=pass_all ;; pc) lt_cv_deplibs_check_method=pass_all ;; esac ;; tpf*) lt_cv_deplibs_check_method=pass_all ;; os2*) lt_cv_deplibs_check_method=pass_all ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5 $as_echo "$lt_cv_deplibs_check_method" >&6; } file_magic_glob= want_nocaseglob=no if test "$build" = "$host"; then case $host_os in mingw* | pw32*) if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then want_nocaseglob=yes else file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"` fi ;; esac fi file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method test -z "$deplibs_check_method" && deplibs_check_method=unknown if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args. set dummy ${ac_tool_prefix}dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DLLTOOL"; then ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DLLTOOL=$ac_cv_prog_DLLTOOL if test -n "$DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5 $as_echo "$DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DLLTOOL"; then ac_ct_DLLTOOL=$DLLTOOL # Extract the first word of "dlltool", so it can be a program name with args. set dummy dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DLLTOOL"; then ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DLLTOOL="dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL if test -n "$ac_ct_DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5 $as_echo "$ac_ct_DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DLLTOOL" = x; then DLLTOOL="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DLLTOOL=$ac_ct_DLLTOOL fi else DLLTOOL="$ac_cv_prog_DLLTOOL" fi test -z "$DLLTOOL" && DLLTOOL=dlltool { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5 $as_echo_n "checking how to associate runtime and link libraries... " >&6; } if ${lt_cv_sharedlib_from_linklib_cmd+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_sharedlib_from_linklib_cmd='unknown' case $host_os in cygwin* | mingw* | pw32* | cegcc*) # two different shell functions defined in ltmain.sh; # decide which one to use based on capabilities of $DLLTOOL case `$DLLTOOL --help 2>&1` in *--identify-strict*) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib ;; *) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback ;; esac ;; *) # fallback: assume linklib IS sharedlib lt_cv_sharedlib_from_linklib_cmd=$ECHO ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5 $as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; } sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO if test -n "$ac_tool_prefix"; then for ac_prog in ar do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$AR"; then ac_cv_prog_AR="$AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AR="$ac_tool_prefix$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi AR=$ac_cv_prog_AR if test -n "$AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 $as_echo "$AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$AR" && break done fi if test -z "$AR"; then ac_ct_AR=$AR for ac_prog in ar do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_AR"; then ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_AR="$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_AR=$ac_cv_prog_ac_ct_AR if test -n "$ac_ct_AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5 $as_echo "$ac_ct_AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$ac_ct_AR" && break done if test "x$ac_ct_AR" = x; then AR="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac AR=$ac_ct_AR fi fi : ${AR=ar} : ${AR_FLAGS=cru} { $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5 $as_echo_n "checking for archiver @FILE support... " >&6; } if ${lt_cv_ar_at_file+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ar_at_file=no cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_compile "$LINENO"; then : echo conftest.$ac_objext > conftest.lst lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5' { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test 0 -eq "$ac_status"; then # Ensure the archiver fails upon bogus file names. rm -f conftest.$ac_objext libconftest.a { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test 0 -ne "$ac_status"; then lt_cv_ar_at_file=@ fi fi rm -f conftest.* libconftest.a fi rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5 $as_echo "$lt_cv_ar_at_file" >&6; } if test no = "$lt_cv_ar_at_file"; then archiver_list_spec= else archiver_list_spec=$lt_cv_ar_at_file fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$STRIP"; then ac_cv_prog_STRIP="$STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_STRIP="${ac_tool_prefix}strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi STRIP=$ac_cv_prog_STRIP if test -n "$STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 $as_echo "$STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_STRIP"; then ac_ct_STRIP=$STRIP # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_STRIP"; then ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_STRIP="strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP if test -n "$ac_ct_STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 $as_echo "$ac_ct_STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_STRIP" = x; then STRIP=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac STRIP=$ac_ct_STRIP fi else STRIP="$ac_cv_prog_STRIP" fi test -z "$STRIP" && STRIP=: if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$RANLIB"; then ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi RANLIB=$ac_cv_prog_RANLIB if test -n "$RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 $as_echo "$RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_RANLIB"; then ac_ct_RANLIB=$RANLIB # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_RANLIB"; then ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_RANLIB="ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB if test -n "$ac_ct_RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 $as_echo "$ac_ct_RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_RANLIB" = x; then RANLIB=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac RANLIB=$ac_ct_RANLIB fi else RANLIB="$ac_cv_prog_RANLIB" fi test -z "$RANLIB" && RANLIB=: # Determine commands to create old-style static archives. old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs' old_postinstall_cmds='chmod 644 $oldlib' old_postuninstall_cmds= if test -n "$RANLIB"; then case $host_os in bitrig* | openbsd*) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB -t \$tool_oldlib" ;; *) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB \$tool_oldlib" ;; esac old_archive_cmds="$old_archive_cmds~\$RANLIB \$tool_oldlib" fi case $host_os in darwin*) lock_old_archive_extraction=yes ;; *) lock_old_archive_extraction=no ;; esac # If no C compiler was specified, use CC. LTCC=${LTCC-"$CC"} # If no C compiler flags were specified, use CFLAGS. LTCFLAGS=${LTCFLAGS-"$CFLAGS"} # Allow CC to be a program name with arguments. compiler=$CC # Check for command to grab the raw symbol name followed by C symbol from nm. { $as_echo "$as_me:${as_lineno-$LINENO}: checking command to parse $NM output from $compiler object" >&5 $as_echo_n "checking command to parse $NM output from $compiler object... " >&6; } if ${lt_cv_sys_global_symbol_pipe+:} false; then : $as_echo_n "(cached) " >&6 else # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[BCDEGRST]' # Regexp to match symbols that can be accessed directly from C. sympat='\([_A-Za-z][_A-Za-z0-9]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[BCDT]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[ABCDGISTW]' ;; hpux*) if test ia64 = "$host_cpu"; then symcode='[ABCDEGRST]' fi ;; irix* | nonstopux*) symcode='[BCDEGRST]' ;; osf*) symcode='[BCDEGQRST]' ;; solaris*) symcode='[BDRT]' ;; sco3.2v5*) symcode='[DT]' ;; sysv4.2uw2*) symcode='[DT]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[ABDT]' ;; sysv4) symcode='[DFNSTU]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[ABCDGIRSTW]' ;; esac if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Gets list of data symbols to import. lt_cv_sys_global_symbol_to_import="sed -n -e 's/^I .* \(.*\)$/\1/p'" # Adjust the below global symbol transforms to fixup imported variables. lt_cdecl_hook=" -e 's/^I .* \(.*\)$/extern __declspec(dllimport) char \1;/p'" lt_c_name_hook=" -e 's/^I .* \(.*\)$/ {\"\1\", (void *) 0},/p'" lt_c_name_lib_hook="\ -e 's/^I .* \(lib.*\)$/ {\"\1\", (void *) 0},/p'\ -e 's/^I .* \(.*\)$/ {\"lib\1\", (void *) 0},/p'" else # Disable hooks by default. lt_cv_sys_global_symbol_to_import= lt_cdecl_hook= lt_c_name_hook= lt_c_name_lib_hook= fi # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n"\ $lt_cdecl_hook\ " -e 's/^T .* \(.*\)$/extern int \1();/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n"\ $lt_c_name_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/p'" # Transform an extracted symbol line into symbol name with lib prefix and # symbol address. lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n"\ $lt_c_name_lib_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(lib.*\)$/ {\"\1\", (void *) \&\1},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"lib\1\", (void *) \&\1},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function, # D for any global variable and I for any imported variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK '"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " /^ *Symbol name *: /{split(\$ 0,sn,\":\"); si=substr(sn[2],2)};"\ " /^ *Type *: code/{print \"T\",si,substr(si,length(prfx))};"\ " /^ *Type *: data/{print \"I\",si,substr(si,length(prfx))};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=\"D\"}; \$ 0~/\(\).*\|/{f=\"T\"};"\ " {split(\$ 0,a,/\||\r/); split(a[2],s)};"\ " s[1]~/^[@?]/{print f,s[1],s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print f,t[1],substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then # Now try to grab the symbols. nlist=conftest.nm if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5 (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS=conftstm.$ac_objext CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag" if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s conftest$ac_exeext; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&5 fi else echo "cannot find nm_test_var in $nlist" >&5 fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 fi else echo "$progname: failed program was:" >&5 cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test yes = "$pipe_works"; then break else lt_cv_sys_global_symbol_pipe= fi done fi if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: failed" >&5 $as_echo "failed" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok" >&5 $as_echo "ok" >&6; } fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then nm_file_list_spec='@' fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5 $as_echo_n "checking for sysroot... " >&6; } # Check whether --with-sysroot was given. if test "${with_sysroot+set}" = set; then : withval=$with_sysroot; else with_sysroot=no fi lt_sysroot= case $with_sysroot in #( yes) if test yes = "$GCC"; then lt_sysroot=`$CC --print-sysroot 2>/dev/null` fi ;; #( /*) lt_sysroot=`echo "$with_sysroot" | sed -e "$sed_quote_subst"` ;; #( no|'') ;; #( *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_sysroot" >&5 $as_echo "$with_sysroot" >&6; } as_fn_error $? "The sysroot must be an absolute path." "$LINENO" 5 ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5 $as_echo "${lt_sysroot:-no}" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a working dd" >&5 $as_echo_n "checking for a working dd... " >&6; } if ${ac_cv_path_lt_DD+:} false; then : $as_echo_n "(cached) " >&6 else printf 0123456789abcdef0123456789abcdef >conftest.i cat conftest.i conftest.i >conftest2.i : ${lt_DD:=$DD} if test -z "$lt_DD"; then ac_path_lt_DD_found=false # Loop through the user's path and test for each of PROGNAME-LIST as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_prog in dd; do for ac_exec_ext in '' $ac_executable_extensions; do ac_path_lt_DD="$as_dir/$ac_prog$ac_exec_ext" as_fn_executable_p "$ac_path_lt_DD" || continue if "$ac_path_lt_DD" bs=32 count=1 conftest.out 2>/dev/null; then cmp -s conftest.i conftest.out \ && ac_cv_path_lt_DD="$ac_path_lt_DD" ac_path_lt_DD_found=: fi $ac_path_lt_DD_found && break 3 done done done IFS=$as_save_IFS if test -z "$ac_cv_path_lt_DD"; then : fi else ac_cv_path_lt_DD=$lt_DD fi rm -f conftest.i conftest2.i conftest.out fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_lt_DD" >&5 $as_echo "$ac_cv_path_lt_DD" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to truncate binary pipes" >&5 $as_echo_n "checking how to truncate binary pipes... " >&6; } if ${lt_cv_truncate_bin+:} false; then : $as_echo_n "(cached) " >&6 else printf 0123456789abcdef0123456789abcdef >conftest.i cat conftest.i conftest.i >conftest2.i lt_cv_truncate_bin= if "$ac_cv_path_lt_DD" bs=32 count=1 conftest.out 2>/dev/null; then cmp -s conftest.i conftest.out \ && lt_cv_truncate_bin="$ac_cv_path_lt_DD bs=4096 count=1" fi rm -f conftest.i conftest2.i conftest.out test -z "$lt_cv_truncate_bin" && lt_cv_truncate_bin="$SED -e 4q" fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_truncate_bin" >&5 $as_echo "$lt_cv_truncate_bin" >&6; } # Calculate cc_basename. Skip known compiler wrappers and cross-prefix. func_cc_basename () { for cc_temp in $*""; do case $cc_temp in compile | *[\\/]compile | ccache | *[\\/]ccache ) ;; distcc | *[\\/]distcc | purify | *[\\/]purify ) ;; \-*) ;; *) break;; esac done func_cc_basename_result=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"` } # Check whether --enable-libtool-lock was given. if test "${enable_libtool_lock+set}" = set; then : enableval=$enable_libtool_lock; fi test no = "$enable_libtool_lock" || enable_libtool_lock=yes # Some flags need to be propagated to the compiler or linker for good # libtool support. case $host in ia64-*-hpux*) # Find out what ABI is being produced by ac_compile, and set mode # options accordingly. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.$ac_objext` in *ELF-32*) HPUX_IA64_MODE=32 ;; *ELF-64*) HPUX_IA64_MODE=64 ;; esac fi rm -rf conftest* ;; *-*-irix6*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then if test yes = "$lt_cv_prog_gnu_ld"; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -melf32bsmip" ;; *N32*) LD="${LD-ld} -melf32bmipn32" ;; *64-bit*) LD="${LD-ld} -melf64bmip" ;; esac else case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -32" ;; *N32*) LD="${LD-ld} -n32" ;; *64-bit*) LD="${LD-ld} -64" ;; esac fi fi rm -rf conftest* ;; mips64*-*linux*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then emul=elf case `/usr/bin/file conftest.$ac_objext` in *32-bit*) emul="${emul}32" ;; *64-bit*) emul="${emul}64" ;; esac case `/usr/bin/file conftest.$ac_objext` in *MSB*) emul="${emul}btsmip" ;; *LSB*) emul="${emul}ltsmip" ;; esac case `/usr/bin/file conftest.$ac_objext` in *N32*) emul="${emul}n32" ;; esac LD="${LD-ld} -m $emul" fi rm -rf conftest* ;; x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. Note that the listed cases only cover the # situations where additional linker options are needed (such as when # doing 32-bit compilation for a host where ld defaults to 64-bit, or # vice versa); the common cases where no linker options are needed do # not appear in the list. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *32-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) case `/usr/bin/file conftest.o` in *x86-64*) LD="${LD-ld} -m elf32_x86_64" ;; *) LD="${LD-ld} -m elf_i386" ;; esac ;; powerpc64le-*linux*) LD="${LD-ld} -m elf32lppclinux" ;; powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" ;; s390x-*linux*) LD="${LD-ld} -m elf_s390" ;; sparc64-*linux*) LD="${LD-ld} -m elf32_sparc" ;; esac ;; *64-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_x86_64_fbsd" ;; x86_64-*linux*) LD="${LD-ld} -m elf_x86_64" ;; powerpcle-*linux*) LD="${LD-ld} -m elf64lppc" ;; powerpc-*linux*) LD="${LD-ld} -m elf64ppc" ;; s390*-*linux*|s390*-*tpf*) LD="${LD-ld} -m elf64_s390" ;; sparc*-*linux*) LD="${LD-ld} -m elf64_sparc" ;; esac ;; esac fi rm -rf conftest* ;; *-*-sco3.2v5*) # On SCO OpenServer 5, we need -belf to get full-featured binaries. SAVE_CFLAGS=$CFLAGS CFLAGS="$CFLAGS -belf" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler needs -belf" >&5 $as_echo_n "checking whether the C compiler needs -belf... " >&6; } if ${lt_cv_cc_needs_belf+:} false; then : $as_echo_n "(cached) " >&6 else ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_cc_needs_belf=yes else lt_cv_cc_needs_belf=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_cc_needs_belf" >&5 $as_echo "$lt_cv_cc_needs_belf" >&6; } if test yes != "$lt_cv_cc_needs_belf"; then # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf CFLAGS=$SAVE_CFLAGS fi ;; *-*solaris*) # Find out what ABI is being produced by ac_compile, and set linker # options accordingly. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *64-bit*) case $lt_cv_prog_gnu_ld in yes*) case $host in i?86-*-solaris*|x86_64-*-solaris*) LD="${LD-ld} -m elf_x86_64" ;; sparc*-*-solaris*) LD="${LD-ld} -m elf64_sparc" ;; esac # GNU ld 2.21 introduced _sol2 emulations. Use them if available. if ${LD-ld} -V | grep _sol2 >/dev/null 2>&1; then LD=${LD-ld}_sol2 fi ;; *) if ${LD-ld} -64 -r -o conftest2.o conftest.o >/dev/null 2>&1; then LD="${LD-ld} -64" fi ;; esac ;; esac fi rm -rf conftest* ;; esac need_locks=$enable_libtool_lock if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args. set dummy ${ac_tool_prefix}mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$MANIFEST_TOOL"; then ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL if test -n "$MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5 $as_echo "$MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_MANIFEST_TOOL"; then ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL # Extract the first word of "mt", so it can be a program name with args. set dummy mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_MANIFEST_TOOL"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL if test -n "$ac_ct_MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5 $as_echo "$ac_ct_MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_MANIFEST_TOOL" = x; then MANIFEST_TOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL fi else MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL" fi test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5 $as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; } if ${lt_cv_path_mainfest_tool+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_path_mainfest_tool=no echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5 $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out cat conftest.err >&5 if $GREP 'Manifest Tool' conftest.out > /dev/null; then lt_cv_path_mainfest_tool=yes fi rm -f conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5 $as_echo "$lt_cv_path_mainfest_tool" >&6; } if test yes != "$lt_cv_path_mainfest_tool"; then MANIFEST_TOOL=: fi case $host_os in rhapsody* | darwin*) if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dsymutil", so it can be a program name with args. set dummy ${ac_tool_prefix}dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DSYMUTIL"; then ac_cv_prog_DSYMUTIL="$DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DSYMUTIL="${ac_tool_prefix}dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DSYMUTIL=$ac_cv_prog_DSYMUTIL if test -n "$DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DSYMUTIL" >&5 $as_echo "$DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DSYMUTIL"; then ac_ct_DSYMUTIL=$DSYMUTIL # Extract the first word of "dsymutil", so it can be a program name with args. set dummy dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DSYMUTIL"; then ac_cv_prog_ac_ct_DSYMUTIL="$ac_ct_DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DSYMUTIL="dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DSYMUTIL=$ac_cv_prog_ac_ct_DSYMUTIL if test -n "$ac_ct_DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DSYMUTIL" >&5 $as_echo "$ac_ct_DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DSYMUTIL" = x; then DSYMUTIL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DSYMUTIL=$ac_ct_DSYMUTIL fi else DSYMUTIL="$ac_cv_prog_DSYMUTIL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}nmedit", so it can be a program name with args. set dummy ${ac_tool_prefix}nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$NMEDIT"; then ac_cv_prog_NMEDIT="$NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_NMEDIT="${ac_tool_prefix}nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi NMEDIT=$ac_cv_prog_NMEDIT if test -n "$NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $NMEDIT" >&5 $as_echo "$NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_NMEDIT"; then ac_ct_NMEDIT=$NMEDIT # Extract the first word of "nmedit", so it can be a program name with args. set dummy nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_NMEDIT"; then ac_cv_prog_ac_ct_NMEDIT="$ac_ct_NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_NMEDIT="nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_NMEDIT=$ac_cv_prog_ac_ct_NMEDIT if test -n "$ac_ct_NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_NMEDIT" >&5 $as_echo "$ac_ct_NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_NMEDIT" = x; then NMEDIT=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac NMEDIT=$ac_ct_NMEDIT fi else NMEDIT="$ac_cv_prog_NMEDIT" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}lipo", so it can be a program name with args. set dummy ${ac_tool_prefix}lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$LIPO"; then ac_cv_prog_LIPO="$LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_LIPO="${ac_tool_prefix}lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi LIPO=$ac_cv_prog_LIPO if test -n "$LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LIPO" >&5 $as_echo "$LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_LIPO"; then ac_ct_LIPO=$LIPO # Extract the first word of "lipo", so it can be a program name with args. set dummy lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_LIPO"; then ac_cv_prog_ac_ct_LIPO="$ac_ct_LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_LIPO="lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_LIPO=$ac_cv_prog_ac_ct_LIPO if test -n "$ac_ct_LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_LIPO" >&5 $as_echo "$ac_ct_LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_LIPO" = x; then LIPO=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac LIPO=$ac_ct_LIPO fi else LIPO="$ac_cv_prog_LIPO" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool", so it can be a program name with args. set dummy ${ac_tool_prefix}otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL"; then ac_cv_prog_OTOOL="$OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL="${ac_tool_prefix}otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL=$ac_cv_prog_OTOOL if test -n "$OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL" >&5 $as_echo "$OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL"; then ac_ct_OTOOL=$OTOOL # Extract the first word of "otool", so it can be a program name with args. set dummy otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL"; then ac_cv_prog_ac_ct_OTOOL="$ac_ct_OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL="otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL=$ac_cv_prog_ac_ct_OTOOL if test -n "$ac_ct_OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL" >&5 $as_echo "$ac_ct_OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL" = x; then OTOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL=$ac_ct_OTOOL fi else OTOOL="$ac_cv_prog_OTOOL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool64", so it can be a program name with args. set dummy ${ac_tool_prefix}otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL64"; then ac_cv_prog_OTOOL64="$OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL64="${ac_tool_prefix}otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL64=$ac_cv_prog_OTOOL64 if test -n "$OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL64" >&5 $as_echo "$OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL64"; then ac_ct_OTOOL64=$OTOOL64 # Extract the first word of "otool64", so it can be a program name with args. set dummy otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL64"; then ac_cv_prog_ac_ct_OTOOL64="$ac_ct_OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL64="otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL64=$ac_cv_prog_ac_ct_OTOOL64 if test -n "$ac_ct_OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL64" >&5 $as_echo "$ac_ct_OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL64" = x; then OTOOL64=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL64=$ac_ct_OTOOL64 fi else OTOOL64="$ac_cv_prog_OTOOL64" fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -single_module linker flag" >&5 $as_echo_n "checking for -single_module linker flag... " >&6; } if ${lt_cv_apple_cc_single_mod+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_apple_cc_single_mod=no if test -z "$LT_MULTI_MODULE"; then # By default we will add the -single_module flag. You can override # by either setting the environment variable LT_MULTI_MODULE # non-empty at configure time, or by adding -multi_module to the # link flags. rm -rf libconftest.dylib* echo "int foo(void){return 1;}" > conftest.c echo "$LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ -dynamiclib -Wl,-single_module conftest.c" >&5 $LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ -dynamiclib -Wl,-single_module conftest.c 2>conftest.err _lt_result=$? # If there is a non-empty error log, and "single_module" # appears in it, assume the flag caused a linker warning if test -s conftest.err && $GREP single_module conftest.err; then cat conftest.err >&5 # Otherwise, if the output was created with a 0 exit code from # the compiler, it worked. elif test -f libconftest.dylib && test 0 = "$_lt_result"; then lt_cv_apple_cc_single_mod=yes else cat conftest.err >&5 fi rm -rf libconftest.dylib* rm -f conftest.* fi fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_apple_cc_single_mod" >&5 $as_echo "$lt_cv_apple_cc_single_mod" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -exported_symbols_list linker flag" >&5 $as_echo_n "checking for -exported_symbols_list linker flag... " >&6; } if ${lt_cv_ld_exported_symbols_list+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_exported_symbols_list=no save_LDFLAGS=$LDFLAGS echo "_main" > conftest.sym LDFLAGS="$LDFLAGS -Wl,-exported_symbols_list,conftest.sym" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_ld_exported_symbols_list=yes else lt_cv_ld_exported_symbols_list=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5 $as_echo "$lt_cv_ld_exported_symbols_list" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5 $as_echo_n "checking for -force_load linker flag... " >&6; } if ${lt_cv_ld_force_load+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_force_load=no cat > conftest.c << _LT_EOF int forced_loaded() { return 2;} _LT_EOF echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5 $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5 echo "$AR cru libconftest.a conftest.o" >&5 $AR cru libconftest.a conftest.o 2>&5 echo "$RANLIB libconftest.a" >&5 $RANLIB libconftest.a 2>&5 cat > conftest.c << _LT_EOF int main() { return 0;} _LT_EOF echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5 $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err _lt_result=$? if test -s conftest.err && $GREP force_load conftest.err; then cat conftest.err >&5 elif test -f conftest && test 0 = "$_lt_result" && $GREP forced_load conftest >/dev/null 2>&1; then lt_cv_ld_force_load=yes else cat conftest.err >&5 fi rm -f conftest.err libconftest.a conftest conftest.c rm -rf conftest.dSYM fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5 $as_echo "$lt_cv_ld_force_load" >&6; } case $host_os in rhapsody* | darwin1.[012]) _lt_dar_allow_undefined='$wl-undefined ${wl}suppress' ;; darwin1.*) _lt_dar_allow_undefined='$wl-flat_namespace $wl-undefined ${wl}suppress' ;; darwin*) # darwin 5.x on # if running on 10.5 or later, the deployment target defaults # to the OS version, if on x86, and 10.4, the deployment # target defaults to 10.4. Don't you love it? case ${MACOSX_DEPLOYMENT_TARGET-10.0},$host in 10.0,*86*-darwin8*|10.0,*-darwin[91]*) _lt_dar_allow_undefined='$wl-undefined ${wl}dynamic_lookup' ;; 10.[012][,.]*) _lt_dar_allow_undefined='$wl-flat_namespace $wl-undefined ${wl}suppress' ;; 10.*) _lt_dar_allow_undefined='$wl-undefined ${wl}dynamic_lookup' ;; esac ;; esac if test yes = "$lt_cv_apple_cc_single_mod"; then _lt_dar_single_mod='$single_module' fi if test yes = "$lt_cv_ld_exported_symbols_list"; then _lt_dar_export_syms=' $wl-exported_symbols_list,$output_objdir/$libname-symbols.expsym' else _lt_dar_export_syms='~$NMEDIT -s $output_objdir/$libname-symbols.expsym $lib' fi if test : != "$DSYMUTIL" && test no = "$lt_cv_ld_force_load"; then _lt_dsymutil='~$DSYMUTIL $lib || :' else _lt_dsymutil= fi ;; esac # func_munge_path_list VARIABLE PATH # ----------------------------------- # VARIABLE is name of variable containing _space_ separated list of # directories to be munged by the contents of PATH, which is string # having a format: # "DIR[:DIR]:" # string "DIR[ DIR]" will be prepended to VARIABLE # ":DIR[:DIR]" # string "DIR[ DIR]" will be appended to VARIABLE # "DIRP[:DIRP]::[DIRA:]DIRA" # string "DIRP[ DIRP]" will be prepended to VARIABLE and string # "DIRA[ DIRA]" will be appended to VARIABLE # "DIR[:DIR]" # VARIABLE will be replaced by "DIR[ DIR]" func_munge_path_list () { case x$2 in x) ;; *:) eval $1=\"`$ECHO $2 | $SED 's/:/ /g'` \$$1\" ;; x:*) eval $1=\"\$$1 `$ECHO $2 | $SED 's/:/ /g'`\" ;; *::*) eval $1=\"\$$1\ `$ECHO $2 | $SED -e 's/.*:://' -e 's/:/ /g'`\" eval $1=\"`$ECHO $2 | $SED -e 's/::.*//' -e 's/:/ /g'`\ \$$1\" ;; *) eval $1=\"`$ECHO $2 | $SED 's/:/ /g'`\" ;; esac } ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to run the C preprocessor" >&5 $as_echo_n "checking how to run the C preprocessor... " >&6; } # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= fi if test -z "$CPP"; then if ${ac_cv_prog_CPP+:} false; then : $as_echo_n "(cached) " >&6 else # Double quotes because CPP needs to be expanded for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" do ac_preproc_ok=false for ac_c_preproc_warn_flag in '' yes do # Use a header file that comes with gcc, so configuring glibc # with a fresh cross-compiler works. # Prefer to if __STDC__ is defined, since # exists even on freestanding compilers. # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. "Syntax error" is here to catch this case. cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #ifdef __STDC__ # include #else # include #endif Syntax error _ACEOF if ac_fn_c_try_cpp "$LINENO"; then : else # Broken: fails on valid input. continue fi rm -f conftest.err conftest.i conftest.$ac_ext # OK, works on sane cases. Now check whether nonexistent headers # can be detected and how. cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #include _ACEOF if ac_fn_c_try_cpp "$LINENO"; then : # Broken: success on invalid input. continue else # Passes both tests. ac_preproc_ok=: break fi rm -f conftest.err conftest.i conftest.$ac_ext done # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. rm -f conftest.i conftest.err conftest.$ac_ext if $ac_preproc_ok; then : break fi done ac_cv_prog_CPP=$CPP fi CPP=$ac_cv_prog_CPP else ac_cv_prog_CPP=$CPP fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CPP" >&5 $as_echo "$CPP" >&6; } ac_preproc_ok=false for ac_c_preproc_warn_flag in '' yes do # Use a header file that comes with gcc, so configuring glibc # with a fresh cross-compiler works. # Prefer to if __STDC__ is defined, since # exists even on freestanding compilers. # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. "Syntax error" is here to catch this case. cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #ifdef __STDC__ # include #else # include #endif Syntax error _ACEOF if ac_fn_c_try_cpp "$LINENO"; then : else # Broken: fails on valid input. continue fi rm -f conftest.err conftest.i conftest.$ac_ext # OK, works on sane cases. Now check whether nonexistent headers # can be detected and how. cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #include _ACEOF if ac_fn_c_try_cpp "$LINENO"; then : # Broken: success on invalid input. continue else # Passes both tests. ac_preproc_ok=: break fi rm -f conftest.err conftest.i conftest.$ac_ext done # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. rm -f conftest.i conftest.err conftest.$ac_ext if $ac_preproc_ok; then : else { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 $as_echo "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error $? "C preprocessor \"$CPP\" fails sanity check See \`config.log' for more details" "$LINENO" 5; } fi ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu { $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5 $as_echo_n "checking for ANSI C header files... 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If you *** really care for shared libraries, you may want to install binutils *** 2.20 or above, or modify your PATH so that a non-GNU linker is found. *** You will then need to restart the configuration process. _LT_EOF fi ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='' ;; m68k) archive_cmds='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes ;; esac ;; beos*) if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then allow_undefined_flag=unsupported # Joseph Beckenbach says some releases of gcc # support --undefined. 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FIXME archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' else ld_shlibs=no fi ;; cygwin* | mingw* | pw32* | cegcc*) # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless, # as there is no search path for DLLs. hardcode_libdir_flag_spec='-L$libdir' export_dynamic_flag_spec='$wl--export-all-symbols' allow_undefined_flag=unsupported always_export_symbols=no enable_shared_with_static_runtimes=yes export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols' exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname' if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname $wl--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' # If the export-symbols file already is a .def file, use it as # is; otherwise, prepend EXPORTS... archive_expsym_cmds='if test DEF = "`$SED -n -e '\''s/^[ ]*//'\'' -e '\''/^\(;.*\)*$/d'\'' -e '\''s/^\(EXPORTS\|LIBRARY\)\([ ].*\)*$/DEF/p'\'' -e q $export_symbols`" ; then cp $export_symbols $output_objdir/$soname.def; else echo EXPORTS > $output_objdir/$soname.def; cat $export_symbols >> $output_objdir/$soname.def; fi~ $CC -shared $output_objdir/$soname.def $libobjs $deplibs $compiler_flags -o $output_objdir/$soname $wl--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' else ld_shlibs=no fi ;; haiku*) archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' link_all_deplibs=yes ;; os2*) hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes allow_undefined_flag=unsupported shrext_cmds=.dll archive_cmds='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ emxexp $libobjs | $SED /"_DLL_InitTerm"/d >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' archive_expsym_cmds='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ prefix_cmds="$SED"~ if test EXPORTS = "`$SED 1q $export_symbols`"; then prefix_cmds="$prefix_cmds -e 1d"; fi~ prefix_cmds="$prefix_cmds -e \"s/^\(.*\)$/_\1/g\""~ cat $export_symbols | $prefix_cmds >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' old_archive_From_new_cmds='emximp -o $output_objdir/${libname}_dll.a $output_objdir/$libname.def' enable_shared_with_static_runtimes=yes ;; interix[3-9]*) hardcode_direct=no hardcode_shlibpath_var=no hardcode_libdir_flag_spec='$wl-rpath,$libdir' export_dynamic_flag_spec='$wl-E' # Hack: On Interix 3.x, we cannot compile PIC because of a broken gcc. # Instead, shared libraries are loaded at an image base (0x10000000 by # default) and relocated if they conflict, which is a slow very memory # consuming and fragmenting process. To avoid this, we pick a random, # 256 KiB-aligned image base between 0x50000000 and 0x6FFC0000 at link # time. Moving up from 0x10000000 also allows more sbrk(2) space. archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-h,$soname $wl--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' archive_expsym_cmds='sed "s|^|_|" $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-h,$soname $wl--retain-symbols-file,$output_objdir/$soname.expsym $wl--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' ;; gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu) tmp_diet=no if test linux-dietlibc = "$host_os"; then case $cc_basename in diet\ *) tmp_diet=yes;; # linux-dietlibc with static linking (!diet-dyn) esac fi if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \ && test no = "$tmp_diet" then tmp_addflag=' $pic_flag' tmp_sharedflag='-shared' case $cc_basename,$host_cpu in pgcc*) # Portland Group C compiler whole_archive_flag_spec='$wl--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' tmp_addflag=' $pic_flag' ;; pgf77* | pgf90* | pgf95* | pgfortran*) # Portland Group f77 and f90 compilers whole_archive_flag_spec='$wl--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' tmp_addflag=' $pic_flag -Mnomain' ;; ecc*,ia64* | icc*,ia64*) # Intel C compiler on ia64 tmp_addflag=' -i_dynamic' ;; efc*,ia64* | ifort*,ia64*) # Intel Fortran compiler on ia64 tmp_addflag=' -i_dynamic -nofor_main' ;; ifc* | ifort*) # Intel Fortran compiler tmp_addflag=' -nofor_main' ;; lf95*) # Lahey Fortran 8.1 whole_archive_flag_spec= tmp_sharedflag='--shared' ;; nagfor*) # NAGFOR 5.3 tmp_sharedflag='-Wl,-shared' ;; xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below) tmp_sharedflag='-qmkshrobj' tmp_addflag= ;; nvcc*) # Cuda Compiler Driver 2.2 whole_archive_flag_spec='$wl--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' compiler_needs_object=yes ;; esac case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C 5.9 whole_archive_flag_spec='$wl--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' compiler_needs_object=yes tmp_sharedflag='-G' ;; *Sun\ F*) # Sun Fortran 8.3 tmp_sharedflag='-G' ;; esac archive_cmds='$CC '"$tmp_sharedflag""$tmp_addflag"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' if test yes = "$supports_anon_versioning"; then archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~ cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ echo "local: *; };" >> $output_objdir/$libname.ver~ $CC '"$tmp_sharedflag""$tmp_addflag"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-version-script $wl$output_objdir/$libname.ver -o $lib' fi case $cc_basename in tcc*) export_dynamic_flag_spec='-rdynamic' ;; xlf* | bgf* | bgxlf* | mpixlf*) # IBM XL Fortran 10.1 on PPC cannot create shared libs itself whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive' hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib' if test yes = "$supports_anon_versioning"; then archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~ cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ echo "local: *; };" >> $output_objdir/$libname.ver~ $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib' fi ;; esac else ld_shlibs=no fi ;; netbsd*) if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' wlarc= else archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' fi ;; solaris*) if $LD -v 2>&1 | $GREP 'BFD 2\.8' > /dev/null; then ld_shlibs=no cat <<_LT_EOF 1>&2 *** Warning: The releases 2.8.* of the GNU linker cannot reliably *** create shared libraries on Solaris systems. Therefore, libtool *** is disabling shared libraries support. We urge you to upgrade GNU *** binutils to release 2.9.1 or newer. Another option is to modify *** your PATH or compiler configuration so that the native linker is *** used, and then restart. _LT_EOF elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' else ld_shlibs=no fi ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX*) case `$LD -v 2>&1` in *\ [01].* | *\ 2.[0-9].* | *\ 2.1[0-5].*) ld_shlibs=no cat <<_LT_EOF 1>&2 *** Warning: Releases of the GNU linker prior to 2.16.91.0.3 cannot *** reliably create shared libraries on SCO systems. Therefore, libtool *** is disabling shared libraries support. We urge you to upgrade GNU *** binutils to release 2.16.91.0.3 or newer. Another option is to modify *** your PATH or compiler configuration so that the native linker is *** used, and then restart. _LT_EOF ;; *) # For security reasons, it is highly recommended that you always # use absolute paths for naming shared libraries, and exclude the # DT_RUNPATH tag from executables and libraries. But doing so # requires that you compile everything twice, which is a pain. if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' else ld_shlibs=no fi ;; esac ;; sunos4*) archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' wlarc= hardcode_direct=yes hardcode_shlibpath_var=no ;; *) if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' else ld_shlibs=no fi ;; esac if test no = "$ld_shlibs"; then runpath_var= hardcode_libdir_flag_spec= export_dynamic_flag_spec= whole_archive_flag_spec= fi else # PORTME fill in a description of your system's linker (not GNU ld) case $host_os in aix3*) allow_undefined_flag=unsupported always_export_symbols=yes archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' # Note: this linker hardcodes the directories in LIBPATH if there # are no directories specified by -L. hardcode_minus_L=yes if test yes = "$GCC" && test -z "$lt_prog_compiler_static"; then # Neither direct hardcoding nor static linking is supported with a # broken collect2. hardcode_direct=unsupported fi ;; aix[4-9]*) if test ia64 = "$host_cpu"; then # On IA64, the linker does run time linking by default, so we don't # have to do anything special. aix_use_runtimelinking=no exp_sym_flag='-Bexport' no_entry_flag= else # If we're using GNU nm, then we don't want the "-C" option. # -C means demangle to GNU nm, but means don't demangle to AIX nm. # Without the "-l" option, or with the "-B" option, AIX nm treats # weak defined symbols like other global defined symbols, whereas # GNU nm marks them as "W". # While the 'weak' keyword is ignored in the Export File, we need # it in the Import File for the 'aix-soname' feature, so we have # to replace the "-B" option with "-P" for AIX nm. if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { if (\$ 2 == "W") { print \$ 3 " weak" } else { print \$ 3 } } }'\'' | sort -u > $export_symbols' else export_symbols_cmds='`func_echo_all $NM | $SED -e '\''s/B\([^B]*\)$/P\1/'\''` -PCpgl $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W") || (\$ 2 == "V") || (\$ 2 == "Z")) && (substr(\$ 1,1,1) != ".")) { if ((\$ 2 == "W") || (\$ 2 == "V") || (\$ 2 == "Z")) { print \$ 1 " weak" } else { print \$ 1 } } }'\'' | sort -u > $export_symbols' fi aix_use_runtimelinking=no # Test if we are trying to use run time linking or normal # AIX style linking. If -brtl is somewhere in LDFLAGS, we # have runtime linking enabled, and use it for executables. # For shared libraries, we enable/disable runtime linking # depending on the kind of the shared library created - # when "with_aix_soname,aix_use_runtimelinking" is: # "aix,no" lib.a(lib.so.V) shared, rtl:no, for executables # "aix,yes" lib.so shared, rtl:yes, for executables # lib.a static archive # "both,no" lib.so.V(shr.o) shared, rtl:yes # lib.a(lib.so.V) shared, rtl:no, for executables # "both,yes" lib.so.V(shr.o) shared, rtl:yes, for executables # lib.a(lib.so.V) shared, rtl:no # "svr4,*" lib.so.V(shr.o) shared, rtl:yes, for executables # lib.a static archive case $host_os in aix4.[23]|aix4.[23].*|aix[5-9]*) for ld_flag in $LDFLAGS; do if (test x-brtl = "x$ld_flag" || test x-Wl,-brtl = "x$ld_flag"); then aix_use_runtimelinking=yes break fi done if test svr4,no = "$with_aix_soname,$aix_use_runtimelinking"; then # With aix-soname=svr4, we create the lib.so.V shared archives only, # so we don't have lib.a shared libs to link our executables. # We have to force runtime linking in this case. aix_use_runtimelinking=yes LDFLAGS="$LDFLAGS -Wl,-brtl" fi ;; esac exp_sym_flag='-bexport' no_entry_flag='-bnoentry' fi # When large executables or shared objects are built, AIX ld can # have problems creating the table of contents. If linking a library # or program results in "error TOC overflow" add -mminimal-toc to # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. archive_cmds='' hardcode_direct=yes hardcode_direct_absolute=yes hardcode_libdir_separator=':' link_all_deplibs=yes file_list_spec='$wl-f,' case $with_aix_soname,$aix_use_runtimelinking in aix,*) ;; # traditional, no import file svr4,* | *,yes) # use import file # The Import File defines what to hardcode. hardcode_direct=no hardcode_direct_absolute=no ;; esac if test yes = "$GCC"; then case $host_os in aix4.[012]|aix4.[012].*) # We only want to do this on AIX 4.2 and lower, the check # below for broken collect2 doesn't work under 4.3+ collect2name=`$CC -print-prog-name=collect2` if test -f "$collect2name" && strings "$collect2name" | $GREP resolve_lib_name >/dev/null then # We have reworked collect2 : else # We have old collect2 hardcode_direct=unsupported # It fails to find uninstalled libraries when the uninstalled # path is not listed in the libpath. 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then : lt_aix_libpath_sed=' /Import File Strings/,/^$/ { /^0/ { s/^0 *\([^ ]*\) *$/\1/ p } }' lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` # Check for a 64-bit object if we didn't find anything. if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=/usr/lib:/lib fi fi aix_libpath=$lt_cv_aix_libpath_ fi hardcode_libdir_flag_spec='$wl-blibpath:$libdir:'"$aix_libpath" archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs $wl'$no_entry_flag' $compiler_flags `if test -n "$allow_undefined_flag"; then func_echo_all "$wl$allow_undefined_flag"; else :; fi` $wl'$exp_sym_flag:\$export_symbols' '$shared_flag else if test ia64 = "$host_cpu"; then hardcode_libdir_flag_spec='$wl-R $libdir:/usr/lib:/lib' allow_undefined_flag="-z nodefs" archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\$wl$no_entry_flag"' $compiler_flags $wl$allow_undefined_flag '"\$wl$exp_sym_flag:\$export_symbols" else # Determine the default libpath from the value encoded in an # empty executable. if test set = "${lt_cv_aix_libpath+set}"; then aix_libpath=$lt_cv_aix_libpath else if ${lt_cv_aix_libpath_+:} false; then : $as_echo_n "(cached) " >&6 else cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_aix_libpath_sed=' /Import File Strings/,/^$/ { /^0/ { s/^0 *\([^ ]*\) *$/\1/ p } }' lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` # Check for a 64-bit object if we didn't find anything. if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext if test -z "$lt_cv_aix_libpath_"; then lt_cv_aix_libpath_=/usr/lib:/lib fi fi aix_libpath=$lt_cv_aix_libpath_ fi hardcode_libdir_flag_spec='$wl-blibpath:$libdir:'"$aix_libpath" # Warning - without using the other run time loading flags, # -berok will link without error, but may produce a broken library. no_undefined_flag=' $wl-bernotok' allow_undefined_flag=' $wl-berok' if test yes = "$with_gnu_ld"; then # We only use this code for GNU lds that support --whole-archive. whole_archive_flag_spec='$wl--whole-archive$convenience $wl--no-whole-archive' else # Exported symbols can be pulled into shared objects from archives whole_archive_flag_spec='$convenience' fi archive_cmds_need_lc=yes archive_expsym_cmds='$RM -r $output_objdir/$realname.d~$MKDIR $output_objdir/$realname.d' # -brtl affects multiple linker settings, -berok does not and is overridden later compiler_flags_filtered='`func_echo_all "$compiler_flags " | $SED -e "s%-brtl\\([, ]\\)%-berok\\1%g"`' if test svr4 != "$with_aix_soname"; then # This is similar to how AIX traditionally builds its shared libraries. archive_expsym_cmds="$archive_expsym_cmds"'~$CC '$shared_flag_aix' -o $output_objdir/$realname.d/$soname $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$realname.d/$soname' fi if test aix != "$with_aix_soname"; then archive_expsym_cmds="$archive_expsym_cmds"'~$CC '$shared_flag_svr4' -o $output_objdir/$realname.d/$shared_archive_member_spec.o $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$STRIP -e $output_objdir/$realname.d/$shared_archive_member_spec.o~( func_echo_all "#! $soname($shared_archive_member_spec.o)"; if test shr_64 = "$shared_archive_member_spec"; then func_echo_all "# 64"; else func_echo_all "# 32"; fi; cat $export_symbols ) > $output_objdir/$realname.d/$shared_archive_member_spec.imp~$AR $AR_FLAGS $output_objdir/$soname $output_objdir/$realname.d/$shared_archive_member_spec.o $output_objdir/$realname.d/$shared_archive_member_spec.imp' else # used by -dlpreopen to get the symbols archive_expsym_cmds="$archive_expsym_cmds"'~$MV $output_objdir/$realname.d/$soname $output_objdir' fi archive_expsym_cmds="$archive_expsym_cmds"'~$RM -r $output_objdir/$realname.d' fi fi ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' archive_expsym_cmds='' ;; m68k) archive_cmds='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes ;; esac ;; bsdi[45]*) export_dynamic_flag_spec=-rdynamic ;; cygwin* | mingw* | pw32* | cegcc*) # When not using gcc, we currently assume that we are using # Microsoft Visual C++. # hardcode_libdir_flag_spec is actually meaningless, as there is # no search path for DLLs. case $cc_basename in cl*) # Native MSVC hardcode_libdir_flag_spec=' ' allow_undefined_flag=unsupported always_export_symbols=yes file_list_spec='@' # Tell ltmain to make .lib files, not .a files. libext=lib # Tell ltmain to make .dll files, not .so files. shrext_cmds=.dll # FIXME: Setting linknames here is a bad hack. archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~linknames=' archive_expsym_cmds='if test DEF = "`$SED -n -e '\''s/^[ ]*//'\'' -e '\''/^\(;.*\)*$/d'\'' -e '\''s/^\(EXPORTS\|LIBRARY\)\([ ].*\)*$/DEF/p'\'' -e q $export_symbols`" ; then cp "$export_symbols" "$output_objdir/$soname.def"; echo "$tool_output_objdir$soname.def" > "$output_objdir/$soname.exp"; else $SED -e '\''s/^/-link -EXPORT:/'\'' < $export_symbols > $output_objdir/$soname.exp; fi~ $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~ linknames=' # The linker will not automatically build a static lib if we build a DLL. # _LT_TAGVAR(old_archive_from_new_cmds, )='true' enable_shared_with_static_runtimes=yes exclude_expsyms='_NULL_IMPORT_DESCRIPTOR|_IMPORT_DESCRIPTOR_.*' export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols' # Don't use ranlib old_postinstall_cmds='chmod 644 $oldlib' postlink_cmds='lt_outputfile="@OUTPUT@"~ lt_tool_outputfile="@TOOL_OUTPUT@"~ case $lt_outputfile in *.exe|*.EXE) ;; *) lt_outputfile=$lt_outputfile.exe lt_tool_outputfile=$lt_tool_outputfile.exe ;; esac~ if test : != "$MANIFEST_TOOL" && test -f "$lt_outputfile.manifest"; then $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1; $RM "$lt_outputfile.manifest"; fi' ;; *) # Assume MSVC wrapper hardcode_libdir_flag_spec=' ' allow_undefined_flag=unsupported # Tell ltmain to make .lib files, not .a files. libext=lib # Tell ltmain to make .dll files, not .so files. shrext_cmds=.dll # FIXME: Setting linknames here is a bad hack. archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames=' # The linker will automatically build a .lib file if we build a DLL. old_archive_from_new_cmds='true' # FIXME: Should let the user specify the lib program. old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs' enable_shared_with_static_runtimes=yes ;; esac ;; darwin* | rhapsody*) archive_cmds_need_lc=no hardcode_direct=no hardcode_automatic=yes hardcode_shlibpath_var=unsupported if test yes = "$lt_cv_ld_force_load"; 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dgux*) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_libdir_flag_spec='-L$libdir' hardcode_shlibpath_var=no ;; # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor # support. 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linux*) case $cc_basename in tcc*) # Fabrice Bellard et al's Tiny C Compiler ld_shlibs=yes archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' ;; esac ;; netbsd*) if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out else archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF fi hardcode_libdir_flag_spec='-R$libdir' hardcode_direct=yes hardcode_shlibpath_var=no ;; newsos6) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes hardcode_libdir_flag_spec='$wl-rpath $wl$libdir' hardcode_libdir_separator=: hardcode_shlibpath_var=no ;; *nto* | *qnx*) ;; openbsd* | bitrig*) if test -f /usr/libexec/ld.so; then hardcode_direct=yes hardcode_shlibpath_var=no hardcode_direct_absolute=yes if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags $wl-retain-symbols-file,$export_symbols' hardcode_libdir_flag_spec='$wl-rpath,$libdir' export_dynamic_flag_spec='$wl-E' else archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' hardcode_libdir_flag_spec='$wl-rpath,$libdir' fi else ld_shlibs=no fi ;; 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When/if they implement a new # versioning mechanism, adjust this. if test -x /usr/bin/objformat; then objformat=`/usr/bin/objformat` else case $host_os in freebsd[23].*) objformat=aout ;; *) objformat=elf ;; esac fi version_type=freebsd-$objformat case $version_type in freebsd-elf*) library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' need_version=no need_lib_prefix=no ;; freebsd-*) library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' need_version=yes ;; esac shlibpath_var=LD_LIBRARY_PATH case $host_os in freebsd2.*) shlibpath_overrides_runpath=yes ;; freebsd3.[01]* | freebsdelf3.[01]*) shlibpath_overrides_runpath=yes hardcode_into_libs=yes ;; freebsd3.[2-9]* | freebsdelf3.[2-9]* | \ freebsd4.[0-5] | freebsdelf4.[0-5] | freebsd4.1.1 | freebsdelf4.1.1) shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; *) # from 4.6 on, and DragonFly shlibpath_overrides_runpath=yes hardcode_into_libs=yes ;; esac ;; haiku*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no dynamic_linker="$host_os runtime_loader" library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LIBRARY_PATH shlibpath_overrides_runpath=no sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib' hardcode_into_libs=yes ;; hpux9* | hpux10* | hpux11*) # Give a soname corresponding to the major version so that dld.sl refuses to # link against other versions. version_type=sunos need_lib_prefix=no need_version=no case $host_cpu in ia64*) shrext_cmds='.so' hardcode_into_libs=yes dynamic_linker="$host_os dld.so" shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' if test 32 = "$HPUX_IA64_MODE"; then sys_lib_search_path_spec="/usr/lib/hpux32 /usr/local/lib/hpux32 /usr/local/lib" sys_lib_dlsearch_path_spec=/usr/lib/hpux32 else sys_lib_search_path_spec="/usr/lib/hpux64 /usr/local/lib/hpux64" sys_lib_dlsearch_path_spec=/usr/lib/hpux64 fi ;; hppa*64*) shrext_cmds='.sl' hardcode_into_libs=yes dynamic_linker="$host_os dld.sl" shlibpath_var=LD_LIBRARY_PATH # How should we handle SHLIB_PATH shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' sys_lib_search_path_spec="/usr/lib/pa20_64 /usr/ccs/lib/pa20_64" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec ;; *) shrext_cmds='.sl' dynamic_linker="$host_os dld.sl" shlibpath_var=SHLIB_PATH shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' ;; esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[3-9]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test yes = "$lt_cv_prog_gnu_ld"; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$release$shared_ext $libname$shared_ext' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib$libsuff /lib$libsuff /usr/local/lib$libsuff" sys_lib_dlsearch_path_spec="/usr/lib$libsuff /lib$libsuff" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; linux*android*) version_type=none # Android doesn't support versioned libraries. need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext' soname_spec='$libname$release$shared_ext' finish_cmds= shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes dynamic_linker='Android linker' # Don't embed -rpath directories since the linker doesn't support them. hardcode_libdir_flag_spec='-L$libdir' ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no # Some binutils ld are patched to set DT_RUNPATH if ${lt_cv_shlibpath_overrides_runpath+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_shlibpath_overrides_runpath=no save_LDFLAGS=$LDFLAGS save_libdir=$libdir eval "libdir=/foo; wl=\"$lt_prog_compiler_wl\"; \ LDFLAGS=\"\$LDFLAGS $hardcode_libdir_flag_spec\"" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : if ($OBJDUMP -p conftest$ac_exeext) 2>/dev/null | grep "RUNPATH.*$libdir" >/dev/null; then : lt_cv_shlibpath_overrides_runpath=yes fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS=$save_LDFLAGS libdir=$save_libdir fi shlibpath_overrides_runpath=$lt_cv_shlibpath_overrides_runpath # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes # Add ABI-specific directories to the system library path. sys_lib_dlsearch_path_spec="/lib64 /usr/lib64 /lib /usr/lib" # Ideally, we could use ldconfig to report *all* directores which are # searched for libraries, however this is still not possible. Aside from not # being certain /sbin/ldconfig is available, command # 'ldconfig -N -X -v | grep ^/' on 64bit Fedora does not report /usr/lib64, # even though it is searched at run-time. Try to do the best guess by # appending ld.so.conf contents (and includes) to the search path. if test -f /etc/ld.so.conf; then lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` sys_lib_dlsearch_path_spec="$sys_lib_dlsearch_path_spec $lt_ld_extra" fi # We used to test for /lib/ld.so.1 and disable shared libraries on # powerpc, because MkLinux only supported shared libraries with the # GNU dynamic linker. Since this was broken with cross compilers, # most powerpc-linux boxes support dynamic linking these days and # people can always --disable-shared, the test was removed, and we # assume the GNU/Linux dynamic linker is in use. dynamic_linker='GNU/Linux ld.so' ;; netbsd*) version_type=sunos need_lib_prefix=no need_version=no if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' dynamic_linker='NetBSD (a.out) ld.so' else library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='NetBSD ld.elf_so' fi shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes ;; newsos6) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; *nto* | *qnx*) version_type=qnx need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='ldqnx.so' ;; openbsd* | bitrig*) version_type=sunos sys_lib_dlsearch_path_spec=/usr/lib need_lib_prefix=no if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then need_version=no else need_version=yes fi library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; os2*) libname_spec='$name' version_type=windows shrext_cmds=.dll need_version=no need_lib_prefix=no # OS/2 can only load a DLL with a base name of 8 characters or less. soname_spec='`test -n "$os2dllname" && libname="$os2dllname"; v=$($ECHO $release$versuffix | tr -d .-); n=$($ECHO $libname | cut -b -$((8 - ${#v})) | tr . _); $ECHO $n$v`$shared_ext' library_names_spec='${libname}_dll.$libext' dynamic_linker='OS/2 ld.exe' shlibpath_var=BEGINLIBPATH sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec postinstall_cmds='base_file=`basename \$file`~ dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\$base_file'\''i; $ECHO \$dlname'\''`~ dldir=$destdir/`dirname \$dlpath`~ test -d \$dldir || mkdir -p \$dldir~ $install_prog $dir/$dlname \$dldir/$dlname~ chmod a+x \$dldir/$dlname~ if test -n '\''$stripme'\'' && test -n '\''$striplib'\''; then eval '\''$striplib \$dldir/$dlname'\'' || exit \$?; fi' postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; $ECHO \$dlname'\''`~ dlpath=$dir/\$dldll~ $RM \$dlpath' ;; osf3* | osf4* | osf5*) version_type=osf need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec ;; rdos*) dynamic_linker=no ;; solaris*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes # ldd complains unless libraries are executable postinstall_cmds='chmod +x $lib' ;; sunos4*) version_type=sunos library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes if test yes = "$with_gnu_ld"; then need_lib_prefix=no fi need_version=yes ;; sysv4 | sysv4.3*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH case $host_vendor in sni) shlibpath_overrides_runpath=no need_lib_prefix=no runpath_var=LD_RUN_PATH ;; siemens) need_lib_prefix=no ;; motorola) need_lib_prefix=no need_version=no shlibpath_overrides_runpath=no sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' ;; esac ;; sysv4*MP*) if test -d /usr/nec; then version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$shared_ext.$versuffix $libname$shared_ext.$major $libname$shared_ext' soname_spec='$libname$shared_ext.$major' shlibpath_var=LD_LIBRARY_PATH fi ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) version_type=sco need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes if test yes = "$with_gnu_ld"; then sys_lib_search_path_spec='/usr/local/lib /usr/gnu/lib /usr/ccs/lib /usr/lib /lib' else sys_lib_search_path_spec='/usr/ccs/lib /usr/lib' case $host_os in sco3.2v5*) sys_lib_search_path_spec="$sys_lib_search_path_spec /lib" ;; esac fi sys_lib_dlsearch_path_spec='/usr/lib' ;; tpf*) # TPF is a cross-target only. Preferred cross-host = GNU/Linux. version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; uts4*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH ;; *) dynamic_linker=no ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: $dynamic_linker" >&5 $as_echo "$dynamic_linker" >&6; } test no = "$dynamic_linker" && can_build_shared=no variables_saved_for_relink="PATH $shlibpath_var $runpath_var" if test yes = "$GCC"; then variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" fi if test set = "${lt_cv_sys_lib_search_path_spec+set}"; then sys_lib_search_path_spec=$lt_cv_sys_lib_search_path_spec fi if test set = "${lt_cv_sys_lib_dlsearch_path_spec+set}"; then sys_lib_dlsearch_path_spec=$lt_cv_sys_lib_dlsearch_path_spec fi # remember unaugmented sys_lib_dlsearch_path content for libtool script decls... configure_time_dlsearch_path=$sys_lib_dlsearch_path_spec # ... but it needs LT_SYS_LIBRARY_PATH munging for other configure-time code func_munge_path_list sys_lib_dlsearch_path_spec "$LT_SYS_LIBRARY_PATH" # to be used as default LT_SYS_LIBRARY_PATH value in generated libtool configure_time_lt_sys_library_path=$LT_SYS_LIBRARY_PATH { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5 $as_echo_n "checking how to hardcode library paths into programs... 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Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char shl_load (); int main () { return shl_load (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dld_shl_load=yes else ac_cv_lib_dld_shl_load=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_shl_load" >&5 $as_echo "$ac_cv_lib_dld_shl_load" >&6; } if test "x$ac_cv_lib_dld_shl_load" = xyes; then : lt_cv_dlopen=shl_load lt_cv_dlopen_libs=-ldld else ac_fn_c_check_func "$LINENO" "dlopen" "ac_cv_func_dlopen" if test "x$ac_cv_func_dlopen" = xyes; then : lt_cv_dlopen=dlopen else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -lsvld" >&5 $as_echo_n "checking for dlopen in -lsvld... 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" >&6; } if ${lt_cv_dlopen_self+:} false; then : $as_echo_n "(cached) " >&6 else if test yes = "$cross_compiling"; then : lt_cv_dlopen_self=cross else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF #line $LINENO "configure" #include "confdefs.h" #if HAVE_DLFCN_H #include #endif #include #ifdef RTLD_GLOBAL # define LT_DLGLOBAL RTLD_GLOBAL #else # ifdef DL_GLOBAL # define LT_DLGLOBAL DL_GLOBAL # else # define LT_DLGLOBAL 0 # endif #endif /* We may have to define LT_DLLAZY_OR_NOW in the command line if we find out it does not work in some platform. */ #ifndef LT_DLLAZY_OR_NOW # ifdef RTLD_LAZY # define LT_DLLAZY_OR_NOW RTLD_LAZY # else # ifdef DL_LAZY # define LT_DLLAZY_OR_NOW DL_LAZY # else # ifdef RTLD_NOW # define LT_DLLAZY_OR_NOW RTLD_NOW # else # ifdef DL_NOW # define LT_DLLAZY_OR_NOW DL_NOW # else # define LT_DLLAZY_OR_NOW 0 # endif # endif # endif # endif #endif /* When -fvisibility=hidden is used, assume the code has been annotated correspondingly for the symbols needed. */ #if defined __GNUC__ && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) int fnord () __attribute__((visibility("default"))); #endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; } _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s "conftest$ac_exeext" 2>/dev/null; then (./conftest; exit; ) >&5 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) lt_cv_dlopen_self=yes ;; x$lt_dlneed_uscore) lt_cv_dlopen_self=yes ;; x$lt_dlunknown|x*) lt_cv_dlopen_self=no ;; esac else : # compilation failed lt_cv_dlopen_self=no fi fi rm -fr conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_dlopen_self" >&5 $as_echo "$lt_cv_dlopen_self" >&6; } if test yes = "$lt_cv_dlopen_self"; then wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $lt_prog_compiler_static\" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether a statically linked program can dlopen itself" >&5 $as_echo_n "checking whether a statically linked program can dlopen itself... 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" >&6; } if ${ac_cv_path_ac_pt_PKG_CONFIG+:} false; then : $as_echo_n "(cached) " >&6 else case $ac_pt_PKG_CONFIG in [\\/]* | ?:[\\/]*) ac_cv_path_ac_pt_PKG_CONFIG="$ac_pt_PKG_CONFIG" # Let the user override the test with a path. ;; *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_path_ac_pt_PKG_CONFIG="$as_dir/$ac_word$ac_exec_ext" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS ;; esac fi ac_pt_PKG_CONFIG=$ac_cv_path_ac_pt_PKG_CONFIG if test -n "$ac_pt_PKG_CONFIG"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_pt_PKG_CONFIG" >&5 $as_echo "$ac_pt_PKG_CONFIG" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_pt_PKG_CONFIG" = x; then PKG_CONFIG="" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac PKG_CONFIG=$ac_pt_PKG_CONFIG fi else PKG_CONFIG="$ac_cv_path_PKG_CONFIG" fi fi if test -n "$PKG_CONFIG"; then _pkg_min_version=0.9.0 { $as_echo "$as_me:${as_lineno-$LINENO}: checking pkg-config is at least version $_pkg_min_version" >&5 $as_echo_n "checking pkg-config is at least version $_pkg_min_version... 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CPPFLAGS_SAVE="$CPPFLAGS" LDFLAGS_SAVE="$LDFLAGS" # Check whether --with-binutils was given. if test "${with_binutils+set}" = set; then : withval=$with_binutils; BINUTILSDIR=$withval fi if test "$BINUTILSDIR" != ""; then LD="$BINUTILSDIR/ld" CPPFLAGS="$CPPFLAGS -I$BINUTILSDIR/include" # Check whether --with-binutils-libname was given. if test "${with_binutils_libname+set}" = set; then : withval=$with_binutils_libname; BINUTILSLIB=$withval fi if test "$BINUTILSLIB" = ""; then BINUTILSLIB="lib" fi LDFLAGS="$LDFLAGS -L$BINUTILSDIR/$BINUTILSLIB -Xlinker -R -Xlinker $BINUTILSDIR/$BINUTILSLIB" OP_LDFLAGS="$LDFLAGS" OP_CPPFLAGS="$CPPFLAGS" else OP_LDFLAGS= OP_CPPFLAGS= fi # We can't restore original flag values for CPPFLAGS and LDFLAGS until we're done # checking for bfd.h and libiberty.h (in AX_BINUTILS). ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. set dummy ${ac_tool_prefix}gcc; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... 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Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dnet_ntoa (); int main () { return dnet_ntoa (); ; return 0; } _ACEOF if ac_fn_cxx_try_link "$LINENO"; then : ac_cv_lib_dnet_dnet_ntoa=yes else ac_cv_lib_dnet_dnet_ntoa=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dnet_dnet_ntoa" >&5 $as_echo "$ac_cv_lib_dnet_dnet_ntoa" >&6; } if test "x$ac_cv_lib_dnet_dnet_ntoa" = xyes; then : X_EXTRA_LIBS="$X_EXTRA_LIBS -ldnet" fi if test $ac_cv_lib_dnet_dnet_ntoa = no; then { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dnet_ntoa in -ldnet_stub" >&5 $as_echo_n "checking for dnet_ntoa in -ldnet_stub... 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Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dnet_ntoa (); int main () { return dnet_ntoa (); ; return 0; } _ACEOF if ac_fn_cxx_try_link "$LINENO"; then : ac_cv_lib_dnet_stub_dnet_ntoa=yes else ac_cv_lib_dnet_stub_dnet_ntoa=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dnet_stub_dnet_ntoa" >&5 $as_echo "$ac_cv_lib_dnet_stub_dnet_ntoa" >&6; } if test "x$ac_cv_lib_dnet_stub_dnet_ntoa" = xyes; then : X_EXTRA_LIBS="$X_EXTRA_LIBS -ldnet_stub" fi fi fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS="$ac_xsave_LIBS" # msh@cis.ufl.edu says -lnsl (and -lsocket) are needed for his 386/AT, # to get the SysV transport functions. # Chad R. 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Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char gethostbyname (); int main () { return gethostbyname (); ; return 0; } _ACEOF if ac_fn_cxx_try_link "$LINENO"; then : ac_cv_lib_nsl_gethostbyname=yes else ac_cv_lib_nsl_gethostbyname=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_nsl_gethostbyname" >&5 $as_echo "$ac_cv_lib_nsl_gethostbyname" >&6; } if test "x$ac_cv_lib_nsl_gethostbyname" = xyes; then : X_EXTRA_LIBS="$X_EXTRA_LIBS -lnsl" fi if test $ac_cv_lib_nsl_gethostbyname = no; then { $as_echo "$as_me:${as_lineno-$LINENO}: checking for gethostbyname in -lbsd" >&5 $as_echo_n "checking for gethostbyname in -lbsd... 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Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char gethostbyname (); int main () { return gethostbyname (); ; return 0; } _ACEOF if ac_fn_cxx_try_link "$LINENO"; then : ac_cv_lib_bsd_gethostbyname=yes else ac_cv_lib_bsd_gethostbyname=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_bsd_gethostbyname" >&5 $as_echo "$ac_cv_lib_bsd_gethostbyname" >&6; } if test "x$ac_cv_lib_bsd_gethostbyname" = xyes; then : X_EXTRA_LIBS="$X_EXTRA_LIBS -lbsd" fi fi fi # lieder@skyler.mavd.honeywell.com says without -lsocket, # socket/setsockopt and other routines are undefined under SCO ODT # 2.0. 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If not, see . ]) # serial 58 LT_INIT # LT_PREREQ(VERSION) # ------------------ # Complain and exit if this libtool version is less that VERSION. m4_defun([LT_PREREQ], [m4_if(m4_version_compare(m4_defn([LT_PACKAGE_VERSION]), [$1]), -1, [m4_default([$3], [m4_fatal([Libtool version $1 or higher is required], 63)])], [$2])]) # _LT_CHECK_BUILDDIR # ------------------ # Complain if the absolute build directory name contains unusual characters m4_defun([_LT_CHECK_BUILDDIR], [case `pwd` in *\ * | *\ *) AC_MSG_WARN([Libtool does not cope well with whitespace in `pwd`]) ;; esac ]) # LT_INIT([OPTIONS]) # ------------------ AC_DEFUN([LT_INIT], [AC_PREREQ([2.62])dnl We use AC_PATH_PROGS_FEATURE_CHECK AC_REQUIRE([AC_CONFIG_AUX_DIR_DEFAULT])dnl AC_BEFORE([$0], [LT_LANG])dnl AC_BEFORE([$0], [LT_OUTPUT])dnl AC_BEFORE([$0], [LTDL_INIT])dnl m4_require([_LT_CHECK_BUILDDIR])dnl dnl Autoconf doesn't catch unexpanded LT_ macros by default: m4_pattern_forbid([^_?LT_[A-Z_]+$])dnl m4_pattern_allow([^(_LT_EOF|LT_DLGLOBAL|LT_DLLAZY_OR_NOW|LT_MULTI_MODULE)$])dnl dnl aclocal doesn't pull ltoptions.m4, ltsugar.m4, or ltversion.m4 dnl unless we require an AC_DEFUNed macro: AC_REQUIRE([LTOPTIONS_VERSION])dnl AC_REQUIRE([LTSUGAR_VERSION])dnl AC_REQUIRE([LTVERSION_VERSION])dnl AC_REQUIRE([LTOBSOLETE_VERSION])dnl m4_require([_LT_PROG_LTMAIN])dnl _LT_SHELL_INIT([SHELL=${CONFIG_SHELL-/bin/sh}]) dnl Parse OPTIONS _LT_SET_OPTIONS([$0], [$1]) # This can be used to rebuild libtool when needed LIBTOOL_DEPS=$ltmain # Always use our own libtool. LIBTOOL='$(SHELL) $(top_builddir)/libtool' AC_SUBST(LIBTOOL)dnl _LT_SETUP # Only expand once: m4_define([LT_INIT]) ])# LT_INIT # Old names: AU_ALIAS([AC_PROG_LIBTOOL], [LT_INIT]) AU_ALIAS([AM_PROG_LIBTOOL], [LT_INIT]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_PROG_LIBTOOL], []) dnl AC_DEFUN([AM_PROG_LIBTOOL], []) # _LT_PREPARE_CC_BASENAME # ----------------------- m4_defun([_LT_PREPARE_CC_BASENAME], [ # Calculate cc_basename. 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For some # reason, if we set the COLLECT_NAMES environment variable, the problems # vanish in a puff of smoke. if test set != "${COLLECT_NAMES+set}"; then COLLECT_NAMES= export COLLECT_NAMES fi ;; esac # Global variables: ofile=libtool can_build_shared=yes # All known linkers require a '.a' archive for static linking (except MSVC, # which needs '.lib'). libext=a with_gnu_ld=$lt_cv_prog_gnu_ld old_CC=$CC old_CFLAGS=$CFLAGS # Set sane defaults for various variables test -z "$CC" && CC=cc test -z "$LTCC" && LTCC=$CC test -z "$LTCFLAGS" && LTCFLAGS=$CFLAGS test -z "$LD" && LD=ld test -z "$ac_objext" && ac_objext=o _LT_CC_BASENAME([$compiler]) # Only perform the check for file, if the check method requires it test -z "$MAGIC_CMD" && MAGIC_CMD=file case $deplibs_check_method in file_magic*) if test "$file_magic_cmd" = '$MAGIC_CMD'; then _LT_PATH_MAGIC fi ;; esac # Use C for the default configuration in the libtool script LT_SUPPORTED_TAG([CC]) _LT_LANG_C_CONFIG _LT_LANG_DEFAULT_CONFIG _LT_CONFIG_COMMANDS ])# _LT_SETUP # _LT_PREPARE_SED_QUOTE_VARS # -------------------------- # Define a few sed substitution that help us do robust quoting. m4_defun([_LT_PREPARE_SED_QUOTE_VARS], [# Backslashify metacharacters that are still active within # double-quoted strings. sed_quote_subst='s/\([["`$\\]]\)/\\\1/g' # Same as above, but do not quote variable references. double_quote_subst='s/\([["`\\]]\)/\\\1/g' # Sed substitution to delay expansion of an escaped shell variable in a # double_quote_subst'ed string. delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g' # Sed substitution to delay expansion of an escaped single quote. delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g' # Sed substitution to avoid accidental globbing in evaled expressions no_glob_subst='s/\*/\\\*/g' ]) # _LT_PROG_LTMAIN # --------------- # Note that this code is called both from 'configure', and 'config.status' # now that we use AC_CONFIG_COMMANDS to generate libtool. Notably, # 'config.status' has no value for ac_aux_dir unless we are using Automake, # so we pass a copy along to make sure it has a sensible value anyway. m4_defun([_LT_PROG_LTMAIN], [m4_ifdef([AC_REQUIRE_AUX_FILE], [AC_REQUIRE_AUX_FILE([ltmain.sh])])dnl _LT_CONFIG_LIBTOOL_INIT([ac_aux_dir='$ac_aux_dir']) ltmain=$ac_aux_dir/ltmain.sh ])# _LT_PROG_LTMAIN ## ------------------------------------- ## ## Accumulate code for creating libtool. ## ## ------------------------------------- ## # So that we can recreate a full libtool script including additional # tags, we accumulate the chunks of code to send to AC_CONFIG_COMMANDS # in macros and then make a single call at the end using the 'libtool' # label. # _LT_CONFIG_LIBTOOL_INIT([INIT-COMMANDS]) # ---------------------------------------- # Register INIT-COMMANDS to be passed to AC_CONFIG_COMMANDS later. m4_define([_LT_CONFIG_LIBTOOL_INIT], [m4_ifval([$1], [m4_append([_LT_OUTPUT_LIBTOOL_INIT], [$1 ])])]) # Initialize. m4_define([_LT_OUTPUT_LIBTOOL_INIT]) # _LT_CONFIG_LIBTOOL([COMMANDS]) # ------------------------------ # Register COMMANDS to be passed to AC_CONFIG_COMMANDS later. m4_define([_LT_CONFIG_LIBTOOL], [m4_ifval([$1], [m4_append([_LT_OUTPUT_LIBTOOL_COMMANDS], [$1 ])])]) # Initialize. m4_define([_LT_OUTPUT_LIBTOOL_COMMANDS]) # _LT_CONFIG_SAVE_COMMANDS([COMMANDS], [INIT_COMMANDS]) # ----------------------------------------------------- m4_defun([_LT_CONFIG_SAVE_COMMANDS], [_LT_CONFIG_LIBTOOL([$1]) _LT_CONFIG_LIBTOOL_INIT([$2]) ]) # _LT_FORMAT_COMMENT([COMMENT]) # ----------------------------- # Add leading comment marks to the start of each line, and a trailing # full-stop to the whole comment if one is not present already. m4_define([_LT_FORMAT_COMMENT], [m4_ifval([$1], [ m4_bpatsubst([m4_bpatsubst([$1], [^ *], [# ])], [['`$\]], [\\\&])]m4_bmatch([$1], [[!?.]$], [], [.]) )]) ## ------------------------ ## ## FIXME: Eliminate VARNAME ## ## ------------------------ ## # _LT_DECL([CONFIGNAME], VARNAME, VALUE, [DESCRIPTION], [IS-TAGGED?]) # ------------------------------------------------------------------- # CONFIGNAME is the name given to the value in the libtool script. # VARNAME is the (base) name used in the configure script. # VALUE may be 0, 1 or 2 for a computed quote escaped value based on # VARNAME. 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VARNAME # must have a single quote delimited value for this to work. m4_define([_LT_CONFIG_STATUS_DECLARE], [$1='`$ECHO "$][$1" | $SED "$delay_single_quote_subst"`']) # _LT_CONFIG_STATUS_DECLARATIONS # ------------------------------ # We delimit libtool config variables with single quotes, so when # we write them to config.status, we have to be sure to quote all # embedded single quotes properly. In configure, this macro expands # each variable declared with _LT_DECL (and _LT_TAGDECL) into: # # ='`$ECHO "$" | $SED "$delay_single_quote_subst"`' m4_defun([_LT_CONFIG_STATUS_DECLARATIONS], [m4_foreach([_lt_var], m4_quote(lt_decl_all_varnames), [m4_n([_LT_CONFIG_STATUS_DECLARE(_lt_var)])])]) # _LT_LIBTOOL_TAGS # ---------------- # Output comment and list of tags supported by the script m4_defun([_LT_LIBTOOL_TAGS], [_LT_FORMAT_COMMENT([The names of the tagged configurations supported by this script])dnl available_tags='_LT_TAGS'dnl ]) # _LT_LIBTOOL_DECLARE(VARNAME, [TAG]) # ----------------------------------- # Extract the dictionary values for VARNAME (optionally with TAG) and # expand to a commented shell variable setting: # # # Some comment about what VAR is for. # visible_name=$lt_internal_name m4_define([_LT_LIBTOOL_DECLARE], [_LT_FORMAT_COMMENT(m4_quote(lt_dict_fetch([lt_decl_dict], [$1], [description])))[]dnl m4_pushdef([_libtool_name], m4_quote(lt_dict_fetch([lt_decl_dict], [$1], [libtool_name])))[]dnl m4_case(m4_quote(lt_dict_fetch([lt_decl_dict], [$1], [value])), [0], [_libtool_name=[$]$1], [1], [_libtool_name=$lt_[]$1], [2], [_libtool_name=$lt_[]$1], [_libtool_name=lt_dict_fetch([lt_decl_dict], [$1], [value])])[]dnl m4_ifval([$2], [_$2])[]m4_popdef([_libtool_name])[]dnl ]) # _LT_LIBTOOL_CONFIG_VARS # ----------------------- # Produce commented declarations of non-tagged libtool config variables # suitable for insertion in the LIBTOOL CONFIG section of the 'libtool' # script. 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Likely further. if test -x /sbin/sysctl; then lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` elif test -x /usr/sbin/sysctl; then lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` else lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs fi # And add a safety zone lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` ;; interix*) # We know the value 262144 and hardcode it with a safety zone (like BSD) lt_cv_sys_max_cmd_len=196608 ;; os2*) # The test takes a long time on OS/2. lt_cv_sys_max_cmd_len=8192 ;; osf*) # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[[ ]]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test X`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test 17 != "$i" # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac ]) if test -n "$lt_cv_sys_max_cmd_len"; then AC_MSG_RESULT($lt_cv_sys_max_cmd_len) else AC_MSG_RESULT(none) fi max_cmd_len=$lt_cv_sys_max_cmd_len _LT_DECL([], [max_cmd_len], [0], [What is the maximum length of a command?]) ])# LT_CMD_MAX_LEN # Old name: AU_ALIAS([AC_LIBTOOL_SYS_MAX_CMD_LEN], [LT_CMD_MAX_LEN]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_SYS_MAX_CMD_LEN], []) # _LT_HEADER_DLFCN # ---------------- m4_defun([_LT_HEADER_DLFCN], [AC_CHECK_HEADERS([dlfcn.h], [], [], [AC_INCLUDES_DEFAULT])dnl ])# _LT_HEADER_DLFCN # _LT_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, # ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) # ---------------------------------------------------------------- m4_defun([_LT_TRY_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test yes = "$cross_compiling"; then : [$4] else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF [#line $LINENO "configure" #include "confdefs.h" #if HAVE_DLFCN_H #include #endif #include #ifdef RTLD_GLOBAL # define LT_DLGLOBAL RTLD_GLOBAL #else # ifdef DL_GLOBAL # define LT_DLGLOBAL DL_GLOBAL # else # define LT_DLGLOBAL 0 # endif #endif /* We may have to define LT_DLLAZY_OR_NOW in the command line if we find out it does not work in some platform. */ #ifndef LT_DLLAZY_OR_NOW # ifdef RTLD_LAZY # define LT_DLLAZY_OR_NOW RTLD_LAZY # else # ifdef DL_LAZY # define LT_DLLAZY_OR_NOW DL_LAZY # else # ifdef RTLD_NOW # define LT_DLLAZY_OR_NOW RTLD_NOW # else # ifdef DL_NOW # define LT_DLLAZY_OR_NOW DL_NOW # else # define LT_DLLAZY_OR_NOW 0 # endif # endif # endif # endif #endif /* When -fvisibility=hidden is used, assume the code has been annotated correspondingly for the symbols needed. */ #if defined __GNUC__ && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) int fnord () __attribute__((visibility("default"))); #endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; }] _LT_EOF if AC_TRY_EVAL(ac_link) && test -s "conftest$ac_exeext" 2>/dev/null; then (./conftest; exit; ) >&AS_MESSAGE_LOG_FD 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) $1 ;; x$lt_dlneed_uscore) $2 ;; x$lt_dlunknown|x*) $3 ;; esac else : # compilation failed $3 fi fi rm -fr conftest* ])# _LT_TRY_DLOPEN_SELF # LT_SYS_DLOPEN_SELF # ------------------ AC_DEFUN([LT_SYS_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test yes != "$enable_dlopen"; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen=load_add_on lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; mingw* | pw32* | cegcc*) lt_cv_dlopen=LoadLibrary lt_cv_dlopen_libs= ;; cygwin*) lt_cv_dlopen=dlopen lt_cv_dlopen_libs= ;; darwin*) # if libdl is installed we need to link against it AC_CHECK_LIB([dl], [dlopen], [lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl],[ lt_cv_dlopen=dyld lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ]) ;; tpf*) # Don't try to run any link tests for TPF. We know it's impossible # because TPF is a cross-compiler, and we know how we open DSOs. lt_cv_dlopen=dlopen lt_cv_dlopen_libs= lt_cv_dlopen_self=no ;; *) AC_CHECK_FUNC([shl_load], [lt_cv_dlopen=shl_load], [AC_CHECK_LIB([dld], [shl_load], [lt_cv_dlopen=shl_load lt_cv_dlopen_libs=-ldld], [AC_CHECK_FUNC([dlopen], [lt_cv_dlopen=dlopen], [AC_CHECK_LIB([dl], [dlopen], [lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-ldl], [AC_CHECK_LIB([svld], [dlopen], [lt_cv_dlopen=dlopen lt_cv_dlopen_libs=-lsvld], [AC_CHECK_LIB([dld], [dld_link], [lt_cv_dlopen=dld_link lt_cv_dlopen_libs=-ldld]) ]) ]) ]) ]) ]) ;; esac if test no = "$lt_cv_dlopen"; then enable_dlopen=no else enable_dlopen=yes fi case $lt_cv_dlopen in dlopen) save_CPPFLAGS=$CPPFLAGS test yes = "$ac_cv_header_dlfcn_h" && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" save_LDFLAGS=$LDFLAGS wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" save_LIBS=$LIBS LIBS="$lt_cv_dlopen_libs $LIBS" AC_CACHE_CHECK([whether a program can dlopen itself], lt_cv_dlopen_self, [dnl _LT_TRY_DLOPEN_SELF( lt_cv_dlopen_self=yes, lt_cv_dlopen_self=yes, lt_cv_dlopen_self=no, lt_cv_dlopen_self=cross) ]) if test yes = "$lt_cv_dlopen_self"; then wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $lt_prog_compiler_static\" AC_CACHE_CHECK([whether a statically linked program can dlopen itself], lt_cv_dlopen_self_static, [dnl _LT_TRY_DLOPEN_SELF( lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=no, lt_cv_dlopen_self_static=cross) ]) fi CPPFLAGS=$save_CPPFLAGS LDFLAGS=$save_LDFLAGS LIBS=$save_LIBS ;; esac case $lt_cv_dlopen_self in yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; *) enable_dlopen_self=unknown ;; esac case $lt_cv_dlopen_self_static in yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; *) enable_dlopen_self_static=unknown ;; esac fi _LT_DECL([dlopen_support], [enable_dlopen], [0], [Whether dlopen is supported]) _LT_DECL([dlopen_self], [enable_dlopen_self], [0], [Whether dlopen of programs is supported]) _LT_DECL([dlopen_self_static], [enable_dlopen_self_static], [0], [Whether dlopen of statically linked programs is supported]) ])# LT_SYS_DLOPEN_SELF # Old name: AU_ALIAS([AC_LIBTOOL_DLOPEN_SELF], [LT_SYS_DLOPEN_SELF]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_DLOPEN_SELF], []) # _LT_COMPILER_C_O([TAGNAME]) # --------------------------- # Check to see if options -c and -o are simultaneously supported by compiler. # This macro does not hard code the compiler like AC_PROG_CC_C_O. m4_defun([_LT_COMPILER_C_O], [m4_require([_LT_DECL_SED])dnl m4_require([_LT_FILEUTILS_DEFAULTS])dnl m4_require([_LT_TAG_COMPILER])dnl AC_CACHE_CHECK([if $compiler supports -c -o file.$ac_objext], [_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)], [_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)=no $RM -r conftest 2>/dev/null mkdir conftest cd conftest mkdir out echo "$lt_simple_compile_test_code" > conftest.$ac_ext lt_compiler_flag="-o out/conftest2.$ac_objext" # Insert the option either (1) after the last *FLAGS variable, or # (2) before a word containing "conftest.", or (3) at the end. # Note that $ac_compile itself does not contain backslashes and begins # with a dollar sign (not a hyphen), so the echo should work correctly. lt_compile=`echo "$ac_compile" | $SED \ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&AS_MESSAGE_LOG_FD) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&AS_MESSAGE_LOG_FD echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2 if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then _LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)=yes fi fi chmod u+w . 2>&AS_MESSAGE_LOG_FD $RM conftest* # SGI C++ compiler will create directory out/ii_files/ for # template instantiation test -d out/ii_files && $RM out/ii_files/* && rmdir out/ii_files $RM out/* && rmdir out cd .. $RM -r conftest $RM conftest* ]) _LT_TAGDECL([compiler_c_o], [lt_cv_prog_compiler_c_o], [1], [Does compiler simultaneously support -c and -o options?]) ])# _LT_COMPILER_C_O # _LT_COMPILER_FILE_LOCKS([TAGNAME]) # ---------------------------------- # Check to see if we can do hard links to lock some files if needed m4_defun([_LT_COMPILER_FILE_LOCKS], [m4_require([_LT_ENABLE_LOCK])dnl m4_require([_LT_FILEUTILS_DEFAULTS])dnl _LT_COMPILER_C_O([$1]) hard_links=nottested if test no = "$_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)" && test no != "$need_locks"; then # do not overwrite the value of need_locks provided by the user AC_MSG_CHECKING([if we can lock with hard links]) hard_links=yes $RM conftest* ln conftest.a conftest.b 2>/dev/null && hard_links=no touch conftest.a ln conftest.a conftest.b 2>&5 || hard_links=no ln conftest.a conftest.b 2>/dev/null && hard_links=no AC_MSG_RESULT([$hard_links]) if test no = "$hard_links"; then AC_MSG_WARN(['$CC' does not support '-c -o', so 'make -j' may be unsafe]) need_locks=warn fi else need_locks=no fi _LT_DECL([], [need_locks], [1], [Must we lock files when doing compilation?]) ])# _LT_COMPILER_FILE_LOCKS # _LT_CHECK_OBJDIR # ---------------- m4_defun([_LT_CHECK_OBJDIR], [AC_CACHE_CHECK([for objdir], [lt_cv_objdir], [rm -f .libs 2>/dev/null mkdir .libs 2>/dev/null if test -d .libs; then lt_cv_objdir=.libs else # MS-DOS does not allow filenames that begin with a dot. lt_cv_objdir=_libs fi rmdir .libs 2>/dev/null]) objdir=$lt_cv_objdir _LT_DECL([], [objdir], [0], [The name of the directory that contains temporary libtool files])dnl m4_pattern_allow([LT_OBJDIR])dnl AC_DEFINE_UNQUOTED([LT_OBJDIR], "$lt_cv_objdir/", [Define to the sub-directory where libtool stores uninstalled libraries.]) ])# _LT_CHECK_OBJDIR # _LT_LINKER_HARDCODE_LIBPATH([TAGNAME]) # -------------------------------------- # Check hardcoding attributes. m4_defun([_LT_LINKER_HARDCODE_LIBPATH], [AC_MSG_CHECKING([how to hardcode library paths into programs]) _LT_TAGVAR(hardcode_action, $1)= if test -n "$_LT_TAGVAR(hardcode_libdir_flag_spec, $1)" || test -n "$_LT_TAGVAR(runpath_var, $1)" || test yes = "$_LT_TAGVAR(hardcode_automatic, $1)"; then # We can hardcode non-existent directories. if test no != "$_LT_TAGVAR(hardcode_direct, $1)" && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library # when we should be linking with a yet-to-be-installed one ## test no != "$_LT_TAGVAR(hardcode_shlibpath_var, $1)" && test no != "$_LT_TAGVAR(hardcode_minus_L, $1)"; then # Linking always hardcodes the temporary library directory. _LT_TAGVAR(hardcode_action, $1)=relink else # We can link without hardcoding, and we can hardcode nonexisting dirs. _LT_TAGVAR(hardcode_action, $1)=immediate fi else # We cannot hardcode anything, or else we can only hardcode existing # directories. _LT_TAGVAR(hardcode_action, $1)=unsupported fi AC_MSG_RESULT([$_LT_TAGVAR(hardcode_action, $1)]) if test relink = "$_LT_TAGVAR(hardcode_action, $1)" || test yes = "$_LT_TAGVAR(inherit_rpath, $1)"; then # Fast installation is not supported enable_fast_install=no elif test yes = "$shlibpath_overrides_runpath" || test no = "$enable_shared"; then # Fast installation is not necessary enable_fast_install=needless fi _LT_TAGDECL([], [hardcode_action], [0], [How to hardcode a shared library path into an executable]) ])# _LT_LINKER_HARDCODE_LIBPATH # _LT_CMD_STRIPLIB # ---------------- m4_defun([_LT_CMD_STRIPLIB], [m4_require([_LT_DECL_EGREP]) striplib= old_striplib= AC_MSG_CHECKING([whether stripping libraries is possible]) if test -n "$STRIP" && $STRIP -V 2>&1 | $GREP "GNU strip" >/dev/null; then test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" test -z "$striplib" && striplib="$STRIP --strip-unneeded" AC_MSG_RESULT([yes]) else # FIXME - insert some real tests, host_os isn't really good enough case $host_os in darwin*) if test -n "$STRIP"; then striplib="$STRIP -x" old_striplib="$STRIP -S" AC_MSG_RESULT([yes]) else AC_MSG_RESULT([no]) fi ;; *) AC_MSG_RESULT([no]) ;; esac fi _LT_DECL([], [old_striplib], [1], [Commands to strip libraries]) _LT_DECL([], [striplib], [1]) ])# _LT_CMD_STRIPLIB # _LT_PREPARE_MUNGE_PATH_LIST # --------------------------- # Make sure func_munge_path_list() is defined correctly. m4_defun([_LT_PREPARE_MUNGE_PATH_LIST], [[# func_munge_path_list VARIABLE PATH # ----------------------------------- # VARIABLE is name of variable containing _space_ separated list of # directories to be munged by the contents of PATH, which is string # having a format: # "DIR[:DIR]:" # string "DIR[ DIR]" will be prepended to VARIABLE # ":DIR[:DIR]" # string "DIR[ DIR]" will be appended to VARIABLE # "DIRP[:DIRP]::[DIRA:]DIRA" # string "DIRP[ DIRP]" will be prepended to VARIABLE and string # "DIRA[ DIRA]" will be appended to VARIABLE # "DIR[:DIR]" # VARIABLE will be replaced by "DIR[ DIR]" func_munge_path_list () { case x@S|@2 in x) ;; *:) eval @S|@1=\"`$ECHO @S|@2 | $SED 's/:/ /g'` \@S|@@S|@1\" ;; x:*) eval @S|@1=\"\@S|@@S|@1 `$ECHO @S|@2 | $SED 's/:/ /g'`\" ;; *::*) eval @S|@1=\"\@S|@@S|@1\ `$ECHO @S|@2 | $SED -e 's/.*:://' -e 's/:/ /g'`\" eval @S|@1=\"`$ECHO @S|@2 | $SED -e 's/::.*//' -e 's/:/ /g'`\ \@S|@@S|@1\" ;; *) eval @S|@1=\"`$ECHO @S|@2 | $SED 's/:/ /g'`\" ;; esac } ]])# _LT_PREPARE_PATH_LIST # _LT_SYS_DYNAMIC_LINKER([TAG]) # ----------------------------- # PORTME Fill in your ld.so characteristics m4_defun([_LT_SYS_DYNAMIC_LINKER], [AC_REQUIRE([AC_CANONICAL_HOST])dnl m4_require([_LT_DECL_EGREP])dnl m4_require([_LT_FILEUTILS_DEFAULTS])dnl m4_require([_LT_DECL_OBJDUMP])dnl m4_require([_LT_DECL_SED])dnl m4_require([_LT_CHECK_SHELL_FEATURES])dnl m4_require([_LT_PREPARE_MUNGE_PATH_LIST])dnl AC_MSG_CHECKING([dynamic linker characteristics]) m4_if([$1], [], [ if test yes = "$GCC"; then case $host_os in darwin*) lt_awk_arg='/^libraries:/,/LR/' ;; *) lt_awk_arg='/^libraries:/' ;; esac case $host_os in mingw* | cegcc*) lt_sed_strip_eq='s|=\([[A-Za-z]]:\)|\1|g' ;; *) lt_sed_strip_eq='s|=/|/|g' ;; esac lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq` case $lt_search_path_spec in *\;*) # if the path contains ";" then we assume it to be the separator # otherwise default to the standard path separator (i.e. ":") - it is # assumed that no part of a normal pathname contains ";" but that should # okay in the real world where ";" in dirpaths is itself problematic. lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'` ;; *) lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"` ;; esac # Ok, now we have the path, separated by spaces, we can step through it # and add multilib dir if necessary... lt_tmp_lt_search_path_spec= lt_multi_os_dir=/`$CC $CPPFLAGS $CFLAGS $LDFLAGS -print-multi-os-directory 2>/dev/null` # ...but if some path component already ends with the multilib dir we assume # that all is fine and trust -print-search-dirs as is (GCC 4.2? or newer). case "$lt_multi_os_dir; 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esac ;; haiku*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no dynamic_linker="$host_os runtime_loader" library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LIBRARY_PATH shlibpath_overrides_runpath=no sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib' hardcode_into_libs=yes ;; hpux9* | hpux10* | hpux11*) # Give a soname corresponding to the major version so that dld.sl refuses to # link against other versions. version_type=sunos need_lib_prefix=no need_version=no case $host_cpu in ia64*) shrext_cmds='.so' hardcode_into_libs=yes dynamic_linker="$host_os dld.so" shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' if test 32 = "$HPUX_IA64_MODE"; then sys_lib_search_path_spec="/usr/lib/hpux32 /usr/local/lib/hpux32 /usr/local/lib" sys_lib_dlsearch_path_spec=/usr/lib/hpux32 else sys_lib_search_path_spec="/usr/lib/hpux64 /usr/local/lib/hpux64" sys_lib_dlsearch_path_spec=/usr/lib/hpux64 fi ;; hppa*64*) shrext_cmds='.sl' hardcode_into_libs=yes dynamic_linker="$host_os dld.sl" shlibpath_var=LD_LIBRARY_PATH # How should we handle SHLIB_PATH shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' sys_lib_search_path_spec="/usr/lib/pa20_64 /usr/ccs/lib/pa20_64" sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec ;; *) shrext_cmds='.sl' dynamic_linker="$host_os dld.sl" shlibpath_var=SHLIB_PATH shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' ;; esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[[3-9]]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test yes = "$lt_cv_prog_gnu_ld"; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='$libname$release$shared_ext$major' library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$release$shared_ext $libname$shared_ext' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib$libsuff /lib$libsuff /usr/local/lib$libsuff" sys_lib_dlsearch_path_spec="/usr/lib$libsuff /lib$libsuff" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; linux*android*) version_type=none # Android doesn't support versioned libraries. need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext' soname_spec='$libname$release$shared_ext' finish_cmds= shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes # This implies no fast_install, which is unacceptable. # Some rework will be needed to allow for fast_install # before this can be enabled. hardcode_into_libs=yes dynamic_linker='Android linker' # Don't embed -rpath directories since the linker doesn't support them. _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' ;; 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*nto* | *qnx*) version_type=qnx need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='ldqnx.so' ;; openbsd* | bitrig*) version_type=sunos sys_lib_dlsearch_path_spec=/usr/lib need_lib_prefix=no if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then need_version=no else need_version=yes fi library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; os2*) libname_spec='$name' version_type=windows shrext_cmds=.dll need_version=no need_lib_prefix=no # OS/2 can only load a DLL with a base name of 8 characters or less. soname_spec='`test -n "$os2dllname" && libname="$os2dllname"; v=$($ECHO $release$versuffix | tr -d .-); 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rdos*) dynamic_linker=no ;; solaris*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes # ldd complains unless libraries are executable postinstall_cmds='chmod +x $lib' ;; sunos4*) version_type=sunos library_names_spec='$libname$release$shared_ext$versuffix $libname$shared_ext$versuffix' finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes if test yes = "$with_gnu_ld"; then need_lib_prefix=no fi need_version=yes ;; sysv4 | sysv4.3*) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='$libname$release$shared_ext$versuffix $libname$release$shared_ext$major $libname$shared_ext' soname_spec='$libname$release$shared_ext$major' shlibpath_var=LD_LIBRARY_PATH case $host_vendor in sni) shlibpath_overrides_runpath=no need_lib_prefix=no runpath_var=LD_RUN_PATH ;; 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*) lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]]\.[[0-9]]) shared library' lt_cv_file_magic_test_file=/usr/lib/libc.sl ;; esac ;; interix[[3-9]]*) # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|\.a)$' ;; irix5* | irix6* | nonstopux*) case $LD in *-32|*"-32 ") libmagic=32-bit;; *-n32|*"-n32 ") libmagic=N32;; *-64|*"-64 ") libmagic=64-bit;; *) libmagic=never-match;; esac lt_cv_deplibs_check_method=pass_all ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) lt_cv_deplibs_check_method=pass_all ;; netbsd*) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|_pic\.a)$' fi ;; newos6*) lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=/usr/lib/libnls.so ;; *nto* | *qnx*) lt_cv_deplibs_check_method=pass_all ;; openbsd* | bitrig*) if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`"; then lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|\.so|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$' fi ;; osf3* | osf4* | osf5*) lt_cv_deplibs_check_method=pass_all ;; rdos*) lt_cv_deplibs_check_method=pass_all ;; solaris*) lt_cv_deplibs_check_method=pass_all ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) lt_cv_deplibs_check_method=pass_all ;; sysv4 | sysv4.3*) case $host_vendor in motorola) lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]' lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` ;; ncr) lt_cv_deplibs_check_method=pass_all ;; sequent) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' ;; sni) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib" lt_cv_file_magic_test_file=/lib/libc.so ;; siemens) lt_cv_deplibs_check_method=pass_all ;; pc) lt_cv_deplibs_check_method=pass_all ;; esac ;; tpf*) lt_cv_deplibs_check_method=pass_all ;; os2*) lt_cv_deplibs_check_method=pass_all ;; esac ]) file_magic_glob= want_nocaseglob=no if test "$build" = "$host"; then case $host_os in mingw* | pw32*) if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then want_nocaseglob=yes else file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[[\1]]\/[[\1]]\/g;/g"` fi ;; esac fi file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method test -z "$deplibs_check_method" && deplibs_check_method=unknown _LT_DECL([], [deplibs_check_method], [1], [Method to check whether dependent libraries are shared objects]) _LT_DECL([], [file_magic_cmd], [1], [Command to use when deplibs_check_method = "file_magic"]) _LT_DECL([], [file_magic_glob], [1], [How to find potential files when deplibs_check_method = "file_magic"]) _LT_DECL([], [want_nocaseglob], [1], [Find potential files using nocaseglob when deplibs_check_method = "file_magic"]) ])# _LT_CHECK_MAGIC_METHOD # LT_PATH_NM # ---------- # find the pathname to a BSD- or MS-compatible name lister AC_DEFUN([LT_PATH_NM], [AC_REQUIRE([AC_PROG_CC])dnl AC_CACHE_CHECK([for BSD- or MS-compatible name lister (nm)], lt_cv_path_NM, [if test -n "$NM"; then # Let the user override the test. lt_cv_path_NM=$NM else lt_nm_to_check=${ac_tool_prefix}nm if test -n "$ac_tool_prefix" && test "$build" = "$host"; then lt_nm_to_check="$lt_nm_to_check nm" fi for lt_tmp_nm in $lt_nm_to_check; do lt_save_ifs=$IFS; IFS=$PATH_SEPARATOR for ac_dir in $PATH /usr/ccs/bin/elf /usr/ccs/bin /usr/ucb /bin; do IFS=$lt_save_ifs test -z "$ac_dir" && ac_dir=. tmp_nm=$ac_dir/$lt_tmp_nm if test -f "$tmp_nm" || test -f "$tmp_nm$ac_exeext"; then # Check to see if the nm accepts a BSD-compat flag. # Adding the 'sed 1q' prevents false positives on HP-UX, which says: # nm: unknown option "B" ignored # Tru64's nm complains that /dev/null is an invalid object file # MSYS converts /dev/null to NUL, MinGW nm treats NUL as empty case $build_os in mingw*) lt_bad_file=conftest.nm/nofile ;; *) lt_bad_file=/dev/null ;; esac case `"$tmp_nm" -B $lt_bad_file 2>&1 | sed '1q'` in *$lt_bad_file* | *'Invalid file or object type'*) lt_cv_path_NM="$tmp_nm -B" break 2 ;; *) case `"$tmp_nm" -p /dev/null 2>&1 | sed '1q'` in */dev/null*) lt_cv_path_NM="$tmp_nm -p" break 2 ;; *) lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but continue # so that we can try to find one that supports BSD flags ;; esac ;; esac fi done IFS=$lt_save_ifs done : ${lt_cv_path_NM=no} fi]) if test no != "$lt_cv_path_NM"; then NM=$lt_cv_path_NM else # Didn't find any BSD compatible name lister, look for dumpbin. if test -n "$DUMPBIN"; then : # Let the user override the test. else AC_CHECK_TOOLS(DUMPBIN, [dumpbin "link -dump"], :) case `$DUMPBIN -symbols -headers /dev/null 2>&1 | sed '1q'` in *COFF*) DUMPBIN="$DUMPBIN -symbols -headers" ;; *) DUMPBIN=: ;; esac fi AC_SUBST([DUMPBIN]) if test : != "$DUMPBIN"; then NM=$DUMPBIN fi fi test -z "$NM" && NM=nm AC_SUBST([NM]) _LT_DECL([], [NM], [1], [A BSD- or MS-compatible name lister])dnl AC_CACHE_CHECK([the name lister ($NM) interface], [lt_cv_nm_interface], [lt_cv_nm_interface="BSD nm" echo "int some_variable = 0;" > conftest.$ac_ext (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&AS_MESSAGE_LOG_FD) (eval "$ac_compile" 2>conftest.err) cat conftest.err >&AS_MESSAGE_LOG_FD (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&AS_MESSAGE_LOG_FD) (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out) cat conftest.err >&AS_MESSAGE_LOG_FD (eval echo "\"\$as_me:$LINENO: output\"" >&AS_MESSAGE_LOG_FD) cat conftest.out >&AS_MESSAGE_LOG_FD if $GREP 'External.*some_variable' conftest.out > /dev/null; then lt_cv_nm_interface="MS dumpbin" fi rm -f conftest*]) ])# LT_PATH_NM # Old names: AU_ALIAS([AM_PROG_NM], [LT_PATH_NM]) AU_ALIAS([AC_PROG_NM], [LT_PATH_NM]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_PROG_NM], []) dnl AC_DEFUN([AC_PROG_NM], []) # _LT_CHECK_SHAREDLIB_FROM_LINKLIB # -------------------------------- # how to determine the name of the shared library # associated with a specific link library. # -- PORTME fill in with the dynamic library characteristics m4_defun([_LT_CHECK_SHAREDLIB_FROM_LINKLIB], [m4_require([_LT_DECL_EGREP]) m4_require([_LT_DECL_OBJDUMP]) m4_require([_LT_DECL_DLLTOOL]) AC_CACHE_CHECK([how to associate runtime and link libraries], lt_cv_sharedlib_from_linklib_cmd, [lt_cv_sharedlib_from_linklib_cmd='unknown' case $host_os in cygwin* | mingw* | pw32* | cegcc*) # two different shell functions defined in ltmain.sh; # decide which one to use based on capabilities of $DLLTOOL case `$DLLTOOL --help 2>&1` in *--identify-strict*) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib ;; *) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback ;; esac ;; *) # fallback: assume linklib IS sharedlib lt_cv_sharedlib_from_linklib_cmd=$ECHO ;; esac ]) sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO _LT_DECL([], [sharedlib_from_linklib_cmd], [1], [Command to associate shared and link libraries]) ])# _LT_CHECK_SHAREDLIB_FROM_LINKLIB # _LT_PATH_MANIFEST_TOOL # ---------------------- # locate the manifest tool m4_defun([_LT_PATH_MANIFEST_TOOL], [AC_CHECK_TOOL(MANIFEST_TOOL, mt, :) test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt AC_CACHE_CHECK([if $MANIFEST_TOOL is a manifest tool], [lt_cv_path_mainfest_tool], [lt_cv_path_mainfest_tool=no echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&AS_MESSAGE_LOG_FD $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out cat conftest.err >&AS_MESSAGE_LOG_FD if $GREP 'Manifest Tool' conftest.out > /dev/null; then lt_cv_path_mainfest_tool=yes fi rm -f conftest*]) if test yes != "$lt_cv_path_mainfest_tool"; then MANIFEST_TOOL=: fi _LT_DECL([], [MANIFEST_TOOL], [1], [Manifest tool])dnl ])# _LT_PATH_MANIFEST_TOOL # _LT_DLL_DEF_P([FILE]) # --------------------- # True iff FILE is a Windows DLL '.def' file. # Keep in sync with func_dll_def_p in the libtool script AC_DEFUN([_LT_DLL_DEF_P], [dnl test DEF = "`$SED -n dnl -e '\''s/^[[ ]]*//'\'' dnl Strip leading whitespace -e '\''/^\(;.*\)*$/d'\'' dnl Delete empty lines and comments -e '\''s/^\(EXPORTS\|LIBRARY\)\([[ ]].*\)*$/DEF/p'\'' dnl -e q dnl Only consider the first "real" line $1`" dnl ])# _LT_DLL_DEF_P # LT_LIB_M # -------- # check for math library AC_DEFUN([LT_LIB_M], [AC_REQUIRE([AC_CANONICAL_HOST])dnl LIBM= case $host in *-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*) # These system don't have libm, or don't need it ;; *-ncr-sysv4.3*) AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM=-lmw) AC_CHECK_LIB(m, cos, LIBM="$LIBM -lm") ;; *) AC_CHECK_LIB(m, cos, LIBM=-lm) ;; esac AC_SUBST([LIBM]) ])# LT_LIB_M # Old name: AU_ALIAS([AC_CHECK_LIBM], [LT_LIB_M]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_CHECK_LIBM], []) # _LT_COMPILER_NO_RTTI([TAGNAME]) # ------------------------------- m4_defun([_LT_COMPILER_NO_RTTI], [m4_require([_LT_TAG_COMPILER])dnl _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)= if test yes = "$GCC"; then case $cc_basename in nvcc*) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -Xcompiler -fno-builtin' ;; *) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' ;; esac _LT_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions], lt_cv_prog_compiler_rtti_exceptions, [-fno-rtti -fno-exceptions], [], [_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)="$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) -fno-rtti -fno-exceptions"]) fi _LT_TAGDECL([no_builtin_flag], [lt_prog_compiler_no_builtin_flag], [1], [Compiler flag to turn off builtin functions]) ])# _LT_COMPILER_NO_RTTI # _LT_CMD_GLOBAL_SYMBOLS # ---------------------- m4_defun([_LT_CMD_GLOBAL_SYMBOLS], [AC_REQUIRE([AC_CANONICAL_HOST])dnl AC_REQUIRE([AC_PROG_CC])dnl AC_REQUIRE([AC_PROG_AWK])dnl AC_REQUIRE([LT_PATH_NM])dnl AC_REQUIRE([LT_PATH_LD])dnl m4_require([_LT_DECL_SED])dnl m4_require([_LT_DECL_EGREP])dnl m4_require([_LT_TAG_COMPILER])dnl # Check for command to grab the raw symbol name followed by C symbol from nm. AC_MSG_CHECKING([command to parse $NM output from $compiler object]) AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [ # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[[BCDEGRST]]' # Regexp to match symbols that can be accessed directly from C. sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[[BCDT]]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[[ABCDGISTW]]' ;; hpux*) if test ia64 = "$host_cpu"; then symcode='[[ABCDEGRST]]' fi ;; irix* | nonstopux*) symcode='[[BCDEGRST]]' ;; osf*) symcode='[[BCDEGQRST]]' ;; solaris*) symcode='[[BDRT]]' ;; sco3.2v5*) symcode='[[DT]]' ;; sysv4.2uw2*) symcode='[[DT]]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[[ABDT]]' ;; sysv4) symcode='[[DFNSTU]]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[[ABCDGIRSTW]]' ;; esac if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Gets list of data symbols to import. lt_cv_sys_global_symbol_to_import="sed -n -e 's/^I .* \(.*\)$/\1/p'" # Adjust the below global symbol transforms to fixup imported variables. lt_cdecl_hook=" -e 's/^I .* \(.*\)$/extern __declspec(dllimport) char \1;/p'" lt_c_name_hook=" -e 's/^I .* \(.*\)$/ {\"\1\", (void *) 0},/p'" lt_c_name_lib_hook="\ -e 's/^I .* \(lib.*\)$/ {\"\1\", (void *) 0},/p'\ -e 's/^I .* \(.*\)$/ {\"lib\1\", (void *) 0},/p'" else # Disable hooks by default. lt_cv_sys_global_symbol_to_import= lt_cdecl_hook= lt_c_name_hook= lt_c_name_lib_hook= fi # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n"\ $lt_cdecl_hook\ " -e 's/^T .* \(.*\)$/extern int \1();/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n"\ $lt_c_name_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/p'" # Transform an extracted symbol line into symbol name with lib prefix and # symbol address. lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n"\ $lt_c_name_lib_hook\ " -e 's/^: \(.*\) .*$/ {\"\1\", (void *) 0},/p'"\ " -e 's/^$symcode$symcode* .* \(lib.*\)$/ {\"\1\", (void *) \&\1},/p'"\ " -e 's/^$symcode$symcode* .* \(.*\)$/ {\"lib\1\", (void *) \&\1},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function, # D for any global variable and I for any imported variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK ['"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " /^ *Symbol name *: /{split(\$ 0,sn,\":\"); si=substr(sn[2],2)};"\ " /^ *Type *: code/{print \"T\",si,substr(si,length(prfx))};"\ " /^ *Type *: data/{print \"I\",si,substr(si,length(prfx))};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=\"D\"}; \$ 0~/\(\).*\|/{f=\"T\"};"\ " {split(\$ 0,a,/\||\r/); split(a[2],s)};"\ " s[1]~/^[@?]/{print f,s[1],s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print f,t[1],substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx]" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if AC_TRY_EVAL(ac_compile); then # Now try to grab the symbols. nlist=conftest.nm if AC_TRY_EVAL(NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined _WIN32 || defined __CYGWIN__ || defined _WIN32_WCE /* DATA imports from DLLs on WIN32 can't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT@&t@_DLSYM_CONST #elif defined __osf__ /* This system does not cope well with relocations in const data. */ # define LT@&t@_DLSYM_CONST #else # define LT@&t@_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT@&t@_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[[]] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* .* \(.*\)$/ {\"\1\", (void *) \&\1},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS=conftstm.$ac_objext CFLAGS="$CFLAGS$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)" if AC_TRY_EVAL(ac_link) && test -s conftest$ac_exeext; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot find nm_test_var in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AS_MESSAGE_LOG_FD fi else echo "$progname: failed program was:" >&AS_MESSAGE_LOG_FD cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test yes = "$pipe_works"; then break else lt_cv_sys_global_symbol_pipe= fi done ]) if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then AC_MSG_RESULT(failed) else AC_MSG_RESULT(ok) fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[[@]]FILE' >/dev/null; then nm_file_list_spec='@' fi _LT_DECL([global_symbol_pipe], [lt_cv_sys_global_symbol_pipe], [1], [Take the output of nm and produce a listing of raw symbols and C names]) _LT_DECL([global_symbol_to_cdecl], [lt_cv_sys_global_symbol_to_cdecl], [1], [Transform the output of nm in a proper C declaration]) _LT_DECL([global_symbol_to_import], [lt_cv_sys_global_symbol_to_import], [1], [Transform the output of nm into a list of symbols to manually relocate]) _LT_DECL([global_symbol_to_c_name_address], [lt_cv_sys_global_symbol_to_c_name_address], [1], [Transform the output of nm in a C name address pair]) _LT_DECL([global_symbol_to_c_name_address_lib_prefix], [lt_cv_sys_global_symbol_to_c_name_address_lib_prefix], [1], [Transform the output of nm in a C name address pair when lib prefix is needed]) _LT_DECL([nm_interface], [lt_cv_nm_interface], [1], [The name lister interface]) _LT_DECL([], [nm_file_list_spec], [1], [Specify filename containing input files for $NM]) ]) # _LT_CMD_GLOBAL_SYMBOLS # _LT_COMPILER_PIC([TAGNAME]) # --------------------------- m4_defun([_LT_COMPILER_PIC], [m4_require([_LT_TAG_COMPILER])dnl _LT_TAGVAR(lt_prog_compiler_wl, $1)= _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)= m4_if([$1], [CXX], [ # C++ specific cases for pic, static, wl, etc. if test yes = "$GXX"; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the '-m68020' flag to GCC prevents building anything better, # like '-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; *djgpp*) # DJGPP does not support shared libraries at all _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac else case $host_os in aix[[4-9]]*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; chorus*) case $cc_basename in cxch68*) # Green Hills C++ Compiler # _LT_TAGVAR(lt_prog_compiler_static, $1)="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a" ;; esac ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; dgux*) case $cc_basename in ec++*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; ghcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; freebsd* | dragonfly*) # FreeBSD uses GNU C++ ;; hpux9* | hpux10* | hpux11*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' if test ia64 != "$host_cpu"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' fi ;; aCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac ;; *) ;; esac ;; interix*) # This is c89, which is MS Visual C++ (no shared libs) # Anyone wants to do a port? ;; irix5* | irix6* | nonstopux*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' # CC pic flag -KPIC is the default. ;; *) ;; esac ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in KCC*) # KAI C++ Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; ecpc* ) # old Intel C++ for x86_64, which still supported -KPIC. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; icpc* ) # Intel C++, used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgCC* | pgcpp*) # Portland Group C++ compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; cxx*) # Compaq C++ # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xlc* | xlC* | bgxl[[cC]]* | mpixl[[cC]]*) # IBM XL 8.0, 9.0 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; esac ;; esac ;; lynxos*) ;; m88k*) ;; mvs*) case $cc_basename in cxx*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-W c,exportall' ;; *) ;; esac ;; netbsd*) ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) case $cc_basename in KCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' ;; RCC*) # Rational C++ 2.4.1 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; cxx*) # Digital/Compaq C++ _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; *) ;; esac ;; psos*) ;; solaris*) case $cc_basename in CC* | sunCC*) # Sun C++ 4.2, 5.x and Centerline C++ _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; gcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' ;; *) ;; esac ;; sunos4*) case $cc_basename in CC*) # Sun C++ 4.x _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; lcc*) # Lucid _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; tandem*) case $cc_basename in NCC*) # NonStop-UX NCC 3.20 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; *) ;; esac ;; vxworks*) ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ], [ if test yes = "$GCC"; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the '-m68020' flag to GCC prevents building anything better, # like '-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; msdosdjgpp*) # Just because we use GCC doesn't mean we suddenly get shared libraries # on systems that don't support them. _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no enable_shared=no ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac case $cc_basename in nvcc*) # Cuda Compiler Driver 2.2 _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Xlinker ' if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)="-Xcompiler $_LT_TAGVAR(lt_prog_compiler_pic, $1)" fi ;; esac else # PORTME Check for flag to pass linker flags through the system compiler. case $host_os in aix*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' if test ia64 = "$host_cpu"; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' case $cc_basename in nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) case $host_os in os2*) _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-static' ;; esac ;; hpux9* | hpux10* | hpux11*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but # not for PA HP-UX. case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac # Is there a better lt_prog_compiler_static that works with the bundled CC? _LT_TAGVAR(lt_prog_compiler_static, $1)='$wl-a ${wl}archive' ;; irix5* | irix6* | nonstopux*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC (with -KPIC) is the default. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in # old Intel for x86_64, which still supported -KPIC. ecc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # icc used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. icc* | ifort*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # Lahey Fortran 8.1. lf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='--shared' _LT_TAGVAR(lt_prog_compiler_static, $1)='--static' ;; nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; tcc*) # Fabrice Bellard et al's Tiny C Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*) # Portland Group compilers (*not* the Pentium gcc compiler, # which looks to be a dead project) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; ccc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All Alpha code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xl* | bgxl* | bgf* | mpixl*) # IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ Ceres\ Fortran* | *Sun*Fortran*\ [[1-7]].* | *Sun*Fortran*\ 8.[[0-3]]*) # Sun Fortran 8.3 passes all unrecognized flags to the linker _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='' ;; *Sun\ F* | *Sun*Fortran*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; *Sun\ C*) # Sun C 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' ;; *Intel*\ [[CF]]*Compiler*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; *Portland\ Group*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; esac ;; newsos6) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; 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then _LT_TAGVAR(lt_prog_compiler_pic, $1)='-Kconform_pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; unicos*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; uts4*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ]) case $host_os in # For platforms that do not support PIC, -DPIC is meaningless: *djgpp*) _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])" ;; esac AC_CACHE_CHECK([for $compiler option to produce PIC], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_prog_compiler_pic, $1)]) _LT_TAGVAR(lt_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_cv_prog_compiler_pic, $1) # # Check to make sure the PIC flag actually works. # if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; 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The following line is correct: shared_flag='-G' else if test yes = "$aix_use_runtimelinking"; then shared_flag='$wl-G' else shared_flag='$wl-bM:SRE' fi shared_flag_aix='$wl-bM:SRE' shared_flag_svr4='$wl-G' fi fi _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl-bexpall' # It seems that -bexpall does not export symbols beginning with # underscore (_), so it is better to generate a list of symbols to export. _LT_TAGVAR(always_export_symbols, $1)=yes if test aix,yes = "$with_aix_soname,$aix_use_runtimelinking"; then # Warning - without using the other runtime loading flags (-brtl), # -berok will link without error, but may produce a broken library. _LT_TAGVAR(allow_undefined_flag, $1)='-berok' # Determine the default libpath from the value encoded in an # empty executable. _LT_SYS_MODULE_PATH_AIX([$1]) _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-blibpath:$libdir:'"$aix_libpath" _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs $wl'$no_entry_flag' $compiler_flags `if test -n "$allow_undefined_flag"; then func_echo_all "$wl$allow_undefined_flag"; else :; fi` $wl'$exp_sym_flag:\$export_symbols' '$shared_flag else if test ia64 = "$host_cpu"; then _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-R $libdir:/usr/lib:/lib' _LT_TAGVAR(allow_undefined_flag, $1)="-z nodefs" _LT_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\$wl$no_entry_flag"' $compiler_flags $wl$allow_undefined_flag '"\$wl$exp_sym_flag:\$export_symbols" else # Determine the default libpath from the value encoded in an # empty executable. _LT_SYS_MODULE_PATH_AIX([$1]) _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-blibpath:$libdir:'"$aix_libpath" # Warning - without using the other run time loading flags, # -berok will link without error, but may produce a broken library. _LT_TAGVAR(no_undefined_flag, $1)=' $wl-bernotok' _LT_TAGVAR(allow_undefined_flag, $1)=' $wl-berok' if test yes = "$with_gnu_ld"; then # We only use this code for GNU lds that support --whole-archive. _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive$convenience $wl--no-whole-archive' else # Exported symbols can be pulled into shared objects from archives _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience' fi _LT_TAGVAR(archive_cmds_need_lc, $1)=yes _LT_TAGVAR(archive_expsym_cmds, $1)='$RM -r $output_objdir/$realname.d~$MKDIR $output_objdir/$realname.d' # -brtl affects multiple linker settings, -berok does not and is overridden later compiler_flags_filtered='`func_echo_all "$compiler_flags " | $SED -e "s%-brtl\\([[, ]]\\)%-berok\\1%g"`' if test svr4 != "$with_aix_soname"; then # This is similar to how AIX traditionally builds its shared libraries. _LT_TAGVAR(archive_expsym_cmds, $1)="$_LT_TAGVAR(archive_expsym_cmds, $1)"'~$CC '$shared_flag_aix' -o $output_objdir/$realname.d/$soname $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$realname.d/$soname' fi if test aix != "$with_aix_soname"; then _LT_TAGVAR(archive_expsym_cmds, $1)="$_LT_TAGVAR(archive_expsym_cmds, $1)"'~$CC '$shared_flag_svr4' -o $output_objdir/$realname.d/$shared_archive_member_spec.o $libobjs $deplibs $wl-bnoentry '$compiler_flags_filtered'$wl-bE:$export_symbols$allow_undefined_flag~$STRIP -e $output_objdir/$realname.d/$shared_archive_member_spec.o~( func_echo_all "#! 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AC_CACHE_CHECK([whether the $host_os linker accepts -exported_symbol], [lt_cv_irix_exported_symbol], [save_LDFLAGS=$LDFLAGS LDFLAGS="$LDFLAGS -shared $wl-exported_symbol ${wl}foo $wl-update_registry $wl/dev/null" AC_LINK_IFELSE( [AC_LANG_SOURCE( [AC_LANG_CASE([C], [[int foo (void) { return 0; }]], [C++], [[int foo (void) { return 0; }]], [Fortran 77], [[ subroutine foo end]], [Fortran], [[ subroutine foo end]])])], [lt_cv_irix_exported_symbol=yes], [lt_cv_irix_exported_symbol=no]) LDFLAGS=$save_LDFLAGS]) if test yes = "$lt_cv_irix_exported_symbol"; then _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations $wl-exports_file $wl$export_symbols -o $lib' fi else _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -exports_file $export_symbols -o $lib' fi _LT_TAGVAR(archive_cmds_need_lc, $1)='no' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath $wl$libdir' _LT_TAGVAR(hardcode_libdir_separator, $1)=: _LT_TAGVAR(inherit_rpath, $1)=yes _LT_TAGVAR(link_all_deplibs, $1)=yes ;; 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then _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags $wl-retain-symbols-file,$export_symbols' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl-E' else _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' fi else _LT_TAGVAR(ld_shlibs, $1)=no fi ;; os2*) _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' _LT_TAGVAR(hardcode_minus_L, $1)=yes _LT_TAGVAR(allow_undefined_flag, $1)=unsupported shrext_cmds=.dll _LT_TAGVAR(archive_cmds, $1)='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ emxexp $libobjs | $SED /"_DLL_InitTerm"/d >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' _LT_TAGVAR(archive_expsym_cmds, $1)='$ECHO "LIBRARY ${soname%$shared_ext} INITINSTANCE TERMINSTANCE" > $output_objdir/$libname.def~ $ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~ $ECHO "DATA MULTIPLE NONSHARED" >> $output_objdir/$libname.def~ $ECHO EXPORTS >> $output_objdir/$libname.def~ prefix_cmds="$SED"~ if test EXPORTS = "`$SED 1q $export_symbols`"; then prefix_cmds="$prefix_cmds -e 1d"; fi~ prefix_cmds="$prefix_cmds -e \"s/^\(.*\)$/_\1/g\""~ cat $export_symbols | $prefix_cmds >> $output_objdir/$libname.def~ $CC -Zdll -Zcrtdll -o $output_objdir/$soname $libobjs $deplibs $compiler_flags $output_objdir/$libname.def~ emximp -o $lib $output_objdir/$libname.def' _LT_TAGVAR(old_archive_From_new_cmds, $1)='emximp -o $output_objdir/${libname}_dll.a $output_objdir/$libname.def' _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes ;; osf3*) if test yes = "$GCC"; then _LT_TAGVAR(allow_undefined_flag, $1)=' $wl-expect_unresolved $wl\*' _LT_TAGVAR(archive_cmds, $1)='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' else _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*' _LT_TAGVAR(archive_cmds, $1)='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' fi _LT_TAGVAR(archive_cmds_need_lc, $1)='no' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath $wl$libdir' _LT_TAGVAR(hardcode_libdir_separator, $1)=: ;; osf4* | osf5*) # as osf3* with the addition of -msym flag if test yes = "$GCC"; then _LT_TAGVAR(allow_undefined_flag, $1)=' $wl-expect_unresolved $wl\*' _LT_TAGVAR(archive_cmds, $1)='$CC -shared$allow_undefined_flag $pic_flag $libobjs $deplibs $compiler_flags $wl-msym $wl-soname $wl$soname `test -n "$verstring" && func_echo_all "$wl-set_version $wl$verstring"` $wl-update_registry $wl$output_objdir/so_locations -o $lib' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath $wl$libdir' else _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*' _LT_TAGVAR(archive_cmds, $1)='$CC -shared$allow_undefined_flag $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~ $CC -shared$allow_undefined_flag $wl-input $wl$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry $output_objdir/so_locations -o $lib~$RM $lib.exp' # Both c and cxx compiler support -rpath directly _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' fi _LT_TAGVAR(archive_cmds_need_lc, $1)='no' _LT_TAGVAR(hardcode_libdir_separator, $1)=: ;; solaris*) _LT_TAGVAR(no_undefined_flag, $1)=' -z defs' if test yes = "$GCC"; then wlarc='$wl' _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $wl-z ${wl}text $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -shared $pic_flag $wl-z ${wl}text $wl-M $wl$lib.exp $wl-h $wl$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' else case `$CC -V 2>&1` in *"Compilers 5.0"*) wlarc='' _LT_TAGVAR(archive_cmds, $1)='$LD -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $linker_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $LD -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' ;; *) wlarc='$wl' _LT_TAGVAR(archive_cmds, $1)='$CC -G$allow_undefined_flag -h $soname -o $lib $libobjs $deplibs $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -G$allow_undefined_flag -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' ;; esac fi _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' _LT_TAGVAR(hardcode_shlibpath_var, $1)=no case $host_os in solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; *) # The compiler driver will combine and reorder linker options, # but understands '-z linker_flag'. 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(KAI) C++ Compiler # KCC will only create a shared library if the output file # ends with ".so" (or ".sl" for HP-UX), so rename the library # to its proper name (with version) after linking. _LT_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\$tempext\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\$tempext\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib $wl-retain-symbols-file,$export_symbols; mv \$templib $lib' # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list= ; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' # Archives containing C++ object files must be created using # "CC -Bstatic", where "CC" is the KAI C++ compiler. _LT_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs' ;; icpc* | ecpc* ) # Intel C++ with_gnu_ld=yes # version 8.0 and above of icpc choke on multiply defined symbols # if we add $predep_objects and $postdep_objects, however 7.1 and # earlier do not add the objects themselves. case `$CC -V 2>&1` in *"Version 7."*) _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 8.0 or newer tmp_idyn= case $host_cpu in ia64*) tmp_idyn=' -i_dynamic';; esac _LT_TAGVAR(archive_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(archive_cmds_need_lc, $1)=no _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive$convenience $wl--no-whole-archive' ;; pgCC* | pgcpp*) # Portland Group C++ compiler case `$CC -V` in *pgCC\ [[1-5]].* | *pgcpp\ [[1-5]].*) _LT_TAGVAR(prelink_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $objs $libobjs $compile_deplibs~ compile_command="$compile_command `find $tpldir -name \*.o | sort | $NL2SP`"' _LT_TAGVAR(old_archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $oldobjs$old_deplibs~ $AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | sort | $NL2SP`~ $RANLIB $oldlib' _LT_TAGVAR(archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 6 and above use weak symbols _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname $wl-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='$wl--rpath $wl$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='$wl--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='$wl--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` $wl--no-whole-archive' ;; cxx*) # Compaq C++ _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags $wl-soname $wl$soname -o $lib $wl-retain-symbols-file $wl$export_symbols' runpath_var=LD_RUN_PATH _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' _LT_TAGVAR(hardcode_libdir_separator, $1)=: # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; 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CXXFLAGS=-Winvalid-pch dnl but we don't want -Winvalid-pch else compilation will fail due -Werror and dnl the fact than some pch will be invalid for the given compilation option AC_TRY_COMPILE(,[;],AC_MSG_RESULT([yes]); $1="${$1} -include bits/stdc++.h", AC_MSG_RESULT([no])) CXXFLAGS=$SAVE_CXXFLAGS AC_LANG_RESTORE ]) oprofile-1.3.0/m4/sstream.m40000664000175000017500000000044712534404406012524 00000000000000dnl AX_CHECK_SSTREAM - check if local sstream is needed to compile OK AC_DEFUN([AX_CHECK_SSTREAM], [ AC_MSG_CHECKING([whether to use included sstream]) AC_TRY_COMPILE([#include ], [], AC_MSG_RESULT([no]);, AC_MSG_RESULT([yes]); OP_CXXFLAGS="$OP_CXXFLAGS -I\${top_srcdir}/include") ] ) oprofile-1.3.0/m4/ltoptions.m40000644000175000017500000003426212774744577013127 00000000000000# Helper functions for option handling. -*- Autoconf -*- # # Copyright (C) 2004-2005, 2007-2009, 2011-2015 Free Software # Foundation, Inc. # Written by Gary V. Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 8 ltoptions.m4 # This is to help aclocal find these macros, as it can't see m4_define. AC_DEFUN([LTOPTIONS_VERSION], [m4_if([1])]) # _LT_MANGLE_OPTION(MACRO-NAME, OPTION-NAME) # ------------------------------------------ m4_define([_LT_MANGLE_OPTION], [[_LT_OPTION_]m4_bpatsubst($1__$2, [[^a-zA-Z0-9_]], [_])]) # _LT_SET_OPTION(MACRO-NAME, OPTION-NAME) # --------------------------------------- # Set option OPTION-NAME for macro MACRO-NAME, and if there is a # matching handler defined, dispatch to it. Other OPTION-NAMEs are # saved as a flag. m4_define([_LT_SET_OPTION], [m4_define(_LT_MANGLE_OPTION([$1], [$2]))dnl m4_ifdef(_LT_MANGLE_DEFUN([$1], [$2]), _LT_MANGLE_DEFUN([$1], [$2]), [m4_warning([Unknown $1 option '$2'])])[]dnl ]) # _LT_IF_OPTION(MACRO-NAME, OPTION-NAME, IF-SET, [IF-NOT-SET]) # ------------------------------------------------------------ # Execute IF-SET if OPTION is set, IF-NOT-SET otherwise. m4_define([_LT_IF_OPTION], [m4_ifdef(_LT_MANGLE_OPTION([$1], [$2]), [$3], [$4])]) # _LT_UNLESS_OPTIONS(MACRO-NAME, OPTION-LIST, IF-NOT-SET) # ------------------------------------------------------- # Execute IF-NOT-SET unless all options in OPTION-LIST for MACRO-NAME # are set. m4_define([_LT_UNLESS_OPTIONS], [m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [m4_ifdef(_LT_MANGLE_OPTION([$1], _LT_Option), [m4_define([$0_found])])])[]dnl m4_ifdef([$0_found], [m4_undefine([$0_found])], [$3 ])[]dnl ]) # _LT_SET_OPTIONS(MACRO-NAME, OPTION-LIST) # ---------------------------------------- # OPTION-LIST is a space-separated list of Libtool options associated # with MACRO-NAME. If any OPTION has a matching handler declared with # LT_OPTION_DEFINE, dispatch to that macro; otherwise complain about # the unknown option and exit. m4_defun([_LT_SET_OPTIONS], [# Set options m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [_LT_SET_OPTION([$1], _LT_Option)]) m4_if([$1],[LT_INIT],[ dnl dnl Simply set some default values (i.e off) if boolean options were not dnl specified: _LT_UNLESS_OPTIONS([LT_INIT], [dlopen], [enable_dlopen=no ]) _LT_UNLESS_OPTIONS([LT_INIT], [win32-dll], [enable_win32_dll=no ]) dnl dnl If no reference was made to various pairs of opposing options, then dnl we run the default mode handler for the pair. For example, if neither dnl 'shared' nor 'disable-shared' was passed, we enable building of shared dnl archives by default: _LT_UNLESS_OPTIONS([LT_INIT], [shared disable-shared], [_LT_ENABLE_SHARED]) _LT_UNLESS_OPTIONS([LT_INIT], [static disable-static], [_LT_ENABLE_STATIC]) _LT_UNLESS_OPTIONS([LT_INIT], [pic-only no-pic], [_LT_WITH_PIC]) _LT_UNLESS_OPTIONS([LT_INIT], [fast-install disable-fast-install], [_LT_ENABLE_FAST_INSTALL]) _LT_UNLESS_OPTIONS([LT_INIT], [aix-soname=aix aix-soname=both aix-soname=svr4], [_LT_WITH_AIX_SONAME([aix])]) ]) ])# _LT_SET_OPTIONS ## --------------------------------- ## ## Macros to handle LT_INIT options. ## ## --------------------------------- ## # _LT_MANGLE_DEFUN(MACRO-NAME, OPTION-NAME) # ----------------------------------------- m4_define([_LT_MANGLE_DEFUN], [[_LT_OPTION_DEFUN_]m4_bpatsubst(m4_toupper([$1__$2]), [[^A-Z0-9_]], [_])]) # LT_OPTION_DEFINE(MACRO-NAME, OPTION-NAME, CODE) # ----------------------------------------------- m4_define([LT_OPTION_DEFINE], [m4_define(_LT_MANGLE_DEFUN([$1], [$2]), [$3])[]dnl ])# LT_OPTION_DEFINE # dlopen # ------ LT_OPTION_DEFINE([LT_INIT], [dlopen], [enable_dlopen=yes ]) AU_DEFUN([AC_LIBTOOL_DLOPEN], [_LT_SET_OPTION([LT_INIT], [dlopen]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'dlopen' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_DLOPEN], []) # win32-dll # --------- # Declare package support for building win32 dll's. LT_OPTION_DEFINE([LT_INIT], [win32-dll], [enable_win32_dll=yes case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-cegcc*) AC_CHECK_TOOL(AS, as, false) AC_CHECK_TOOL(DLLTOOL, dlltool, false) AC_CHECK_TOOL(OBJDUMP, objdump, false) ;; esac test -z "$AS" && AS=as _LT_DECL([], [AS], [1], [Assembler program])dnl test -z "$DLLTOOL" && DLLTOOL=dlltool _LT_DECL([], [DLLTOOL], [1], [DLL creation program])dnl test -z "$OBJDUMP" && OBJDUMP=objdump _LT_DECL([], [OBJDUMP], [1], [Object dumper program])dnl ])# win32-dll AU_DEFUN([AC_LIBTOOL_WIN32_DLL], [AC_REQUIRE([AC_CANONICAL_HOST])dnl _LT_SET_OPTION([LT_INIT], [win32-dll]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'win32-dll' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_WIN32_DLL], []) # _LT_ENABLE_SHARED([DEFAULT]) # ---------------------------- # implement the --enable-shared flag, and supports the 'shared' and # 'disable-shared' LT_INIT options. # DEFAULT is either 'yes' or 'no'. If omitted, it defaults to 'yes'. m4_define([_LT_ENABLE_SHARED], [m4_define([_LT_ENABLE_SHARED_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([shared], [AS_HELP_STRING([--enable-shared@<:@=PKGS@:>@], [build shared libraries @<:@default=]_LT_ENABLE_SHARED_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_shared=yes ;; no) enable_shared=no ;; *) enable_shared=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_shared=yes fi done IFS=$lt_save_ifs ;; esac], [enable_shared=]_LT_ENABLE_SHARED_DEFAULT) _LT_DECL([build_libtool_libs], [enable_shared], [0], [Whether or not to build shared libraries]) ])# _LT_ENABLE_SHARED LT_OPTION_DEFINE([LT_INIT], [shared], [_LT_ENABLE_SHARED([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-shared], [_LT_ENABLE_SHARED([no])]) # Old names: AC_DEFUN([AC_ENABLE_SHARED], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[shared]) ]) AC_DEFUN([AC_DISABLE_SHARED], [_LT_SET_OPTION([LT_INIT], [disable-shared]) ]) AU_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) AU_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_ENABLE_SHARED], []) dnl AC_DEFUN([AM_DISABLE_SHARED], []) # _LT_ENABLE_STATIC([DEFAULT]) # ---------------------------- # implement the --enable-static flag, and support the 'static' and # 'disable-static' LT_INIT options. # DEFAULT is either 'yes' or 'no'. If omitted, it defaults to 'yes'. m4_define([_LT_ENABLE_STATIC], [m4_define([_LT_ENABLE_STATIC_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([static], [AS_HELP_STRING([--enable-static@<:@=PKGS@:>@], [build static libraries @<:@default=]_LT_ENABLE_STATIC_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_static=yes ;; no) enable_static=no ;; *) enable_static=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_static=yes fi done IFS=$lt_save_ifs ;; esac], [enable_static=]_LT_ENABLE_STATIC_DEFAULT) _LT_DECL([build_old_libs], [enable_static], [0], [Whether or not to build static libraries]) ])# _LT_ENABLE_STATIC LT_OPTION_DEFINE([LT_INIT], [static], [_LT_ENABLE_STATIC([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-static], [_LT_ENABLE_STATIC([no])]) # Old names: AC_DEFUN([AC_ENABLE_STATIC], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[static]) ]) AC_DEFUN([AC_DISABLE_STATIC], [_LT_SET_OPTION([LT_INIT], [disable-static]) ]) AU_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) AU_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_ENABLE_STATIC], []) dnl AC_DEFUN([AM_DISABLE_STATIC], []) # _LT_ENABLE_FAST_INSTALL([DEFAULT]) # ---------------------------------- # implement the --enable-fast-install flag, and support the 'fast-install' # and 'disable-fast-install' LT_INIT options. # DEFAULT is either 'yes' or 'no'. If omitted, it defaults to 'yes'. m4_define([_LT_ENABLE_FAST_INSTALL], [m4_define([_LT_ENABLE_FAST_INSTALL_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([fast-install], [AS_HELP_STRING([--enable-fast-install@<:@=PKGS@:>@], [optimize for fast installation @<:@default=]_LT_ENABLE_FAST_INSTALL_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_fast_install=yes ;; no) enable_fast_install=no ;; *) enable_fast_install=no # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for pkg in $enableval; do IFS=$lt_save_ifs if test "X$pkg" = "X$p"; then enable_fast_install=yes fi done IFS=$lt_save_ifs ;; esac], [enable_fast_install=]_LT_ENABLE_FAST_INSTALL_DEFAULT) _LT_DECL([fast_install], [enable_fast_install], [0], [Whether or not to optimize for fast installation])dnl ])# _LT_ENABLE_FAST_INSTALL LT_OPTION_DEFINE([LT_INIT], [fast-install], [_LT_ENABLE_FAST_INSTALL([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-fast-install], [_LT_ENABLE_FAST_INSTALL([no])]) # Old names: AU_DEFUN([AC_ENABLE_FAST_INSTALL], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[fast-install]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'fast-install' option into LT_INIT's first parameter.]) ]) AU_DEFUN([AC_DISABLE_FAST_INSTALL], [_LT_SET_OPTION([LT_INIT], [disable-fast-install]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'disable-fast-install' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_ENABLE_FAST_INSTALL], []) dnl AC_DEFUN([AM_DISABLE_FAST_INSTALL], []) # _LT_WITH_AIX_SONAME([DEFAULT]) # ---------------------------------- # implement the --with-aix-soname flag, and support the `aix-soname=aix' # and `aix-soname=both' and `aix-soname=svr4' LT_INIT options. DEFAULT # is either `aix', `both' or `svr4'. If omitted, it defaults to `aix'. m4_define([_LT_WITH_AIX_SONAME], [m4_define([_LT_WITH_AIX_SONAME_DEFAULT], [m4_if($1, svr4, svr4, m4_if($1, both, both, aix))])dnl shared_archive_member_spec= case $host,$enable_shared in power*-*-aix[[5-9]]*,yes) AC_MSG_CHECKING([which variant of shared library versioning to provide]) AC_ARG_WITH([aix-soname], [AS_HELP_STRING([--with-aix-soname=aix|svr4|both], [shared library versioning (aka "SONAME") variant to provide on AIX, @<:@default=]_LT_WITH_AIX_SONAME_DEFAULT[@:>@.])], [case $withval in aix|svr4|both) ;; *) AC_MSG_ERROR([Unknown argument to --with-aix-soname]) ;; esac lt_cv_with_aix_soname=$with_aix_soname], [AC_CACHE_VAL([lt_cv_with_aix_soname], [lt_cv_with_aix_soname=]_LT_WITH_AIX_SONAME_DEFAULT) with_aix_soname=$lt_cv_with_aix_soname]) AC_MSG_RESULT([$with_aix_soname]) if test aix != "$with_aix_soname"; then # For the AIX way of multilib, we name the shared archive member # based on the bitwidth used, traditionally 'shr.o' or 'shr_64.o', # and 'shr.imp' or 'shr_64.imp', respectively, for the Import File. # Even when GNU compilers ignore OBJECT_MODE but need '-maix64' flag, # the AIX toolchain works better with OBJECT_MODE set (default 32). if test 64 = "${OBJECT_MODE-32}"; then shared_archive_member_spec=shr_64 else shared_archive_member_spec=shr fi fi ;; *) with_aix_soname=aix ;; esac _LT_DECL([], [shared_archive_member_spec], [0], [Shared archive member basename, for filename based shared library versioning on AIX])dnl ])# _LT_WITH_AIX_SONAME LT_OPTION_DEFINE([LT_INIT], [aix-soname=aix], [_LT_WITH_AIX_SONAME([aix])]) LT_OPTION_DEFINE([LT_INIT], [aix-soname=both], [_LT_WITH_AIX_SONAME([both])]) LT_OPTION_DEFINE([LT_INIT], [aix-soname=svr4], [_LT_WITH_AIX_SONAME([svr4])]) # _LT_WITH_PIC([MODE]) # -------------------- # implement the --with-pic flag, and support the 'pic-only' and 'no-pic' # LT_INIT options. # MODE is either 'yes' or 'no'. If omitted, it defaults to 'both'. m4_define([_LT_WITH_PIC], [AC_ARG_WITH([pic], [AS_HELP_STRING([--with-pic@<:@=PKGS@:>@], [try to use only PIC/non-PIC objects @<:@default=use both@:>@])], [lt_p=${PACKAGE-default} case $withval in yes|no) pic_mode=$withval ;; *) pic_mode=default # Look at the argument we got. We use all the common list separators. lt_save_ifs=$IFS; IFS=$IFS$PATH_SEPARATOR, for lt_pkg in $withval; do IFS=$lt_save_ifs if test "X$lt_pkg" = "X$lt_p"; then pic_mode=yes fi done IFS=$lt_save_ifs ;; esac], [pic_mode=m4_default([$1], [default])]) _LT_DECL([], [pic_mode], [0], [What type of objects to build])dnl ])# _LT_WITH_PIC LT_OPTION_DEFINE([LT_INIT], [pic-only], [_LT_WITH_PIC([yes])]) LT_OPTION_DEFINE([LT_INIT], [no-pic], [_LT_WITH_PIC([no])]) # Old name: AU_DEFUN([AC_LIBTOOL_PICMODE], [_LT_SET_OPTION([LT_INIT], [pic-only]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the 'pic-only' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_PICMODE], []) ## ----------------- ## ## LTDL_INIT Options ## ## ----------------- ## m4_define([_LTDL_MODE], []) LT_OPTION_DEFINE([LTDL_INIT], [nonrecursive], [m4_define([_LTDL_MODE], [nonrecursive])]) LT_OPTION_DEFINE([LTDL_INIT], [recursive], [m4_define([_LTDL_MODE], [recursive])]) LT_OPTION_DEFINE([LTDL_INIT], [subproject], [m4_define([_LTDL_MODE], [subproject])]) m4_define([_LTDL_TYPE], []) LT_OPTION_DEFINE([LTDL_INIT], [installable], [m4_define([_LTDL_TYPE], [installable])]) LT_OPTION_DEFINE([LTDL_INIT], [convenience], [m4_define([_LTDL_TYPE], [convenience])]) oprofile-1.3.0/libutil++/0000775000175000017500000000000013323173527012135 500000000000000oprofile-1.3.0/libutil++/glob_filter.h0000664000175000017500000000266512534404406014523 00000000000000/** * @file glob_filter.h * Filter strings based on globbed exclude/include list * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef GLOB_FILTER_H #define GLOB_FILTER_H #include "string_filter.h" /** * glob_filter - filtering of a string based on globbed include/exclude list * * This class is an oracle on whether a particular string matches * the given list of included and excluded strings. * * This class gives glob-based matches on each pattern, as with fnmatch(3) */ class glob_filter : public string_filter { public: /** * Initialise the filter with the include and exclude list, * comma-separated. */ glob_filter(std::string const & include_patterns, std::string const & exclude_patterns) : string_filter(include_patterns, exclude_patterns) {} /** * Initialise the filter with the include and exclude list. */ glob_filter(std::vector const & include_patterns, std::vector const & exclude_patterns) : string_filter(include_patterns, exclude_patterns) {} /// Returns true if the given string matches virtual bool match(std::string const & str) const; protected: /// function object for fnmatching struct fnmatcher { fnmatcher(std::string const & str) : str_(str) {} bool operator()(std::string const & s); std::string const & str_; }; }; #endif /* GLOB_FILTER_H */ oprofile-1.3.0/libutil++/sparse_array.h0000664000175000017500000000477412534404406014731 00000000000000/** * @file sparse_array.h * Auto-expanding sparse array type * * @remark Copyright 2007 OProfile authors * @remark Copyright (c) International Business Machines, 2007. * @remark Read the file COPYING * * @author Dave Nomura */ #ifndef SPARSE_ARRAY_H #define SPARSE_ARRAY_H template class sparse_array { public: typedef std::map container_type; typedef typename container_type::size_type size_type; /** * Index into the map for a value. * NOTE: since std::map does/can not have a const member function for * operator[], this const member function simply returns 0 for * profile classes that aren't represented in the map. * This member function will only be invoked for queries of the * sparse array. */ T operator[](size_type index) const { typename container_type::const_iterator it = container.find(index); if (it != container.end()) return it->second; else return 0; } /** * Index into the vector for a value. If the index is larger than * the current max index, a new array entry is created. */ T & operator[](size_type index) { return container[index]; } /** * vectorized += operator */ sparse_array & operator+=(sparse_array const & rhs) { typename container_type::const_iterator it = rhs.container.begin(); typename container_type::const_iterator it_end = rhs.container.end(); for ( ; it != it_end; it++) container[it->first] += it->second; return *this; } /** * vectorized -= operator, overflow shouldn't occur during substraction * (iow: for each components lhs[i] >= rhs[i] */ sparse_array & operator-=(sparse_array const & rhs) { typename container_type::const_iterator it = rhs.container.begin(); typename container_type::const_iterator it_end = rhs.container.end(); for ( ; it != it_end; it++) container[it->first] -= it->second; return *this; } /** * return the maximum index of the array + 1 or 0 if the array * is empty. */ size_type size() const { if (container.size() == 0) return 0; typename container_type::const_iterator last = container.end(); --last; return last->first + 1; } /// return true if all elements have the default constructed value bool zero() const { typename container_type::const_iterator it = container.begin(); typename container_type::const_iterator it_end = container.end(); for ( ; it != it_end; it++) if (it->second != 0) return false; return true; } private: container_type container; }; #endif // SPARSE_ARRAY_H oprofile-1.3.0/libutil++/op_bfd.cpp0000664000175000017500000003377512655221627014033 00000000000000/** * @file op_bfd.cpp * Encapsulation of bfd objects * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "op_file.h" #include "op_config.h" #include "config.h" #include #include #include #include #include #include #include #include #include #include #include #include "op_bfd.h" #include "locate_images.h" #include "string_filter.h" #include "stream_util.h" #include "cverb.h" using namespace std; verbose vbfd("bfd"); namespace { /// function object for filtering symbols to remove struct remove_filter { remove_filter(string_filter const & filter) : filter_(filter) {} bool operator()(op_bfd_symbol const & symbol) { return !filter_.match(symbol.name()); } string_filter filter_; }; } // namespace anon op_bfd_symbol::op_bfd_symbol(asymbol const * a) : bfd_symbol(a), symb_value(a->value), section_filepos(a->section->filepos), section_vma(a->section->vma), symb_size(0), symb_hidden(false), symb_weak(false), symb_artificial(false) { // Some sections have unnamed symbols in them. If // we just ignore them then we end up sticking // things like .plt hits inside of _init. So instead // we name the symbol after the section. if (a->name && a->name[0] != '\0') { symb_name = a->name; symb_weak = a->flags & BSF_WEAK; symb_hidden = (a->flags & BSF_LOCAL) && !(a->flags & BSF_GLOBAL); } else { symb_name = string("??") + a->section->name; } } op_bfd_symbol::op_bfd_symbol(bfd_vma vma, size_t size, string const & name) : bfd_symbol(0), symb_value(vma), section_filepos(0), section_vma(0), symb_size(size), symb_name(name), symb_hidden(false), symb_weak(false), symb_artificial(true) { } bool op_bfd_symbol::operator<(op_bfd_symbol const & rhs) const { return filepos() < rhs.filepos(); } unsigned long op_bfd_symbol::symbol_endpos(void) const { return bfd_symbol->section->filepos + bfd_symbol->section->size; } op_bfd::op_bfd(string const & fname, string_filter const & symbol_filter, extra_images const & extra_images, bool & ok) : filename(fname), archive_path(extra_images.get_archive_path()), extra_found_images(extra_images), file_size(-1), anon_obj(false), vma_adj(0) { fd = -1; struct stat st; // after creating all symbol it's convenient for user code to access // symbols through a vector. We use an intermediate list to avoid a // O(N�) behavior when we will filter vector element below symbols_found_t symbols; asection const * sect; string suf = ".jo"; image_error img_ok; string const image_path = extra_images.find_image_path(filename, img_ok, true); cverb << vbfd << "op_bfd ctor for " << image_path << endl; // if there's a problem already, don't try to open it if (!ok || img_ok != image_ok) { cverb << vbfd << "can't locate " << image_path << endl; goto out_fail; } fd = open(image_path.c_str(), O_RDONLY); if (fd == -1) { cverb << vbfd << "open failed for " << image_path << endl; ok = false; goto out_fail; } if (fstat(fd, &st)) { cverb << vbfd << "stat failed for " << image_path << endl; ok = false; goto out_fail; } file_size = st.st_size; ibfd.abfd = fdopen_bfd(image_path, fd); if (!ibfd.valid()) { cverb << vbfd << "fdopen_bfd failed for " << image_path << endl; ok = false; goto out_fail; } string::size_type pos; pos = filename.rfind(suf); if (pos != string::npos && pos == filename.size() - suf.size()) anon_obj = true; // find .text and use it for (sect = ibfd.abfd->sections; sect; sect = sect->next) { if (sect->flags & SEC_CODE) { if (filepos_map[sect->name] != 0) { cerr << "Found section \"" << sect->name << "\" twice for " << get_filename() << endl; abort(); } filepos_map[sect->name] = sect->filepos; if (sect->vma == 0 && strcmp(sect->name, ".text")) filtered_section.push_back(sect); } } get_symbols(symbols); out: add_symbols(symbols, symbol_filter); return; out_fail: ibfd.close(); dbfd.close(); // make the fake symbol fit within the fake file file_size = -1; goto out; } op_bfd::~op_bfd() { if (ibfd.abfd == (bfd * ) 1) /* Kallsyms setup a pseudo ibfd file. Set to NULL * to prevent a segmentation fault. */ ibfd.abfd = (bfd * ) NULL; if (fd != -1) close(fd); } unsigned long op_bfd::get_start_offset(bfd_vma vma) const { if (!vma || !ibfd.valid()) { filepos_map_t::const_iterator it = filepos_map.find(".text"); if (it != filepos_map.end()) return it->second; return 0; } return 0; } void op_bfd::get_symbols(op_bfd::symbols_found_t & symbols) { ibfd.get_symbols(); // On separate debug file systems, the main bfd has no symbols, // so even for non -g reports, we want to process the dbfd. // This hurts us pretty badly (the CRC), but we really don't // have much choice at the moment. has_debug_info(); dbfd.set_image_bfd_info(&ibfd); dbfd.get_symbols(); if (dbfd.valid() && !ibfd.nr_syms) vma_adj = ibfd.abfd->start_address - dbfd.abfd->start_address; else vma_adj= 0; size_t i; for (i = 0; i < ibfd.nr_syms; ++i) { if (!interesting_symbol(ibfd.syms[i])) continue; if (find(filtered_section.begin(), filtered_section.end(), ibfd.syms[i]->section) != filtered_section.end()) continue; symbols.push_back(op_bfd_symbol(ibfd.syms[i])); } for (i = 0; i < dbfd.nr_syms; ++i) { if (!interesting_symbol(dbfd.syms[i])) continue; // need to use filepos of original file's section for // debug file symbols. We probably need to be more // careful for special symbols which have ->section from // .rodata like *ABS* u32 filepos = filepos_map[dbfd.syms[i]->section->name]; if (filepos != 0) dbfd.syms[i]->section->filepos = filepos; symbols.push_back(op_bfd_symbol(dbfd.syms[i])); } symbols.sort(); symbols_found_t::iterator it = symbols.begin(); // we need to ensure than for a given vma only one symbol exist else // we read more than one time some samples. Fix #526098 while (it != symbols.end()) { symbols_found_t::iterator temp = it; ++temp; if (temp != symbols.end() && (it->vma() == temp->vma()) && (it->filepos() == temp->filepos())) { if (boring_symbol(*it, *temp)) { it = symbols.erase(it); } else { symbols.erase(temp); } } else { ++it; } } // now we can calculate the symbol size, we can't first include/exclude // symbols because the size of symbol is calculated from the difference // between the vma of a symbol and the next one. for (it = symbols.begin() ; it != symbols.end(); ++it) { op_bfd_symbol const * next = 0; symbols_found_t::iterator temp = it; ++temp; if (temp != symbols.end()) next = &*temp; it->size(symbol_size(*it, next)); } } #define KERN_ADDR_SPACE_START_SYMBOL "_text" #define KERN_ADDR_SPACE_END_SYMBOL "_etext" void op_bfd::get_kallsym_symbols(symbols_found_t & symbols, ifstream& infile) { string name, name_prev; string address_str; std::string line; char type; stringstream iss; bfd_vma start = 0, start_prev = 0; unsigned long long length, start_value; bool ignore_symbol = true; bfd_vma base_addr = 0; name_prev = ""; while ( !infile.eof() ) { getline(infile, line); /* some of the lines have tab[nfs] on the end, remove */ iss.clear(); iss << line; iss >> address_str; iss >> type; iss >> name; sscanf(address_str.c_str(), "%llx", &start_value); start = start_value; if (start_prev == start) length = 0; else length = start - start_prev; if (!ignore_symbol) symbols.push_back(op_bfd_symbol(op_bfd_symbol(start_prev - base_addr, length, name_prev))); start_prev = start; name_prev = name; if (strncmp(name.c_str(), KERN_ADDR_SPACE_START_SYMBOL, strlen(name.c_str())) == 0) { /* ignore all symbols before the symbol for the * start of the kernel address space. */ if (start == 0) /* do not have the proper permission to * read /proc/kallsyms. */ return; base_addr = start; ignore_symbol = false; } if (strncmp(name.c_str(), KERN_ADDR_SPACE_END_SYMBOL, strlen(name.c_str())) == 0) break; } /* Add symbols */ copy(symbols.begin(), symbols.end(), back_inserter(syms)); ostringstream msg; msg << "Kallsyms, number of symbols now " << dec << syms.size() << hex << endl; cverb << vbfd << msg.str(); return; } /* * This overload of the op_bfd constructor is patterned after the * constructor in libutil++/op_bfd.cpp, with the additional processing * needed to handle getting the kernel symbols from kallsyms. */ op_bfd::op_bfd(string const & fname, extra_images const & extra_images) : filename(fname), archive_path(""), extra_found_images(extra_images), file_size(-1), anon_obj(false), vma_adj(0) { symbols_found_t symbols; ifstream infile; fd = -1; ibfd.abfd = (bfd * ) NULL; /* Technically this is not a bfd file but we need to set ibfd.abfd * so the abfd.valid() check in profile_t::set_offset() will be true. * It will be set to 1 so we know we are using kallsyms. The * destructor will be looking for ibfd.abfd = 1. */ infile.open(fname.c_str()); if (infile) { ibfd.abfd = (bfd * ) 1; } else { cverb << vbfd << "open failed for " << fname << endl; return; } /* go read the kallsyms file and put them into symbols */ get_kallsym_symbols(symbols, infile); infile.close(); return; } void op_bfd::add_symbols(op_bfd::symbols_found_t & symbols, string_filter const & symbol_filter) { // images with no symbols debug info available get a placeholder symbol if (symbols.empty()) symbols.push_back(create_artificial_symbol()); cverb << vbfd << "number of symbols before filtering " << dec << symbols.size() << hex << endl; symbols_found_t::iterator it; it = remove_if(symbols.begin(), symbols.end(), remove_filter(symbol_filter)); copy(symbols.begin(), it, back_inserter(syms)); cverb << vbfd << "number of symbols now " << dec << syms.size() << hex << endl; } bfd_vma op_bfd::offset_to_pc(bfd_vma offset) const { asection const * sect = ibfd.abfd->sections; for (; sect; sect = sect->next) { if (offset >= bfd_vma(sect->filepos) && (!sect->next || offset < bfd_vma(sect->next->filepos))) { return sect->vma + (offset - sect->filepos); } } return 0; } bool op_bfd:: symbol_has_contents(symbol_index_t sym_idx) { op_bfd_symbol const & bfd_sym = syms[sym_idx]; string const name = bfd_sym.name(); if (name.size() == 0 || bfd_sym.artificial() || !ibfd.valid()) return false; else return true; } bool op_bfd:: get_symbol_contents(symbol_index_t sym_index, unsigned char * contents) const { op_bfd_symbol const & bfd_sym = syms[sym_index]; size_t size = bfd_sym.size(); if (!bfd_get_section_contents(ibfd.abfd, bfd_sym.symbol()->section, contents, static_cast(bfd_sym.value()), size)) { return false; } return true; } bool op_bfd::has_debug_info() const { if (debug_info.cached()) return debug_info.get(); if (ibfd.is_pseudo_bfd() || !ibfd.valid()) return debug_info.reset(false); if (ibfd.has_debug_info()) return debug_info.reset(true); // check to see if there is an .debug file if (find_separate_debug_file(ibfd.abfd, filename, debug_filename, extra_found_images)) { cverb << vbfd << "now loading: " << debug_filename << endl; dbfd.abfd = open_bfd(debug_filename); if (dbfd.has_debug_info()) return debug_info.reset(true); } // .debug is optional, so will not fail if there's a problem cverb << vbfd << "failed to process separate debug file " << debug_filename << endl; return debug_info.reset(false); } bool op_bfd::get_linenr(symbol_index_t sym_idx, bfd_vma offset, string & source_filename, unsigned int & linenr) const { if (!has_debug_info()) return false; bfd_info const & b = dbfd.valid() ? dbfd : ibfd; op_bfd_symbol const & sym = syms[sym_idx]; linenr_info const info = find_nearest_line(b, sym, offset, anon_obj); if (!info.found) return false; source_filename = info.filename; linenr = info.line; return true; } size_t op_bfd::symbol_size(op_bfd_symbol const & sym, op_bfd_symbol const * next) const { unsigned long long start = sym.filepos(); unsigned long long end; if (next && (sym.section() != next->section())) end = sym.symbol_endpos(); else end = next ? next->filepos() : sym.section()->filepos + file_size; if (start > end) return 0; return end - start; } void op_bfd::get_symbol_range(symbol_index_t sym_idx, unsigned long long & start, unsigned long long & end) const { op_bfd_symbol const & sym = syms[sym_idx]; if (anon_obj) start = sym.vma(); else start = sym.filepos(); end = start + sym.size(); if (!(cverb << (vbfd & vlevel1))) return; io_state state(cverb << (vbfd & vlevel1)); cverb << (vbfd & vlevel1) << "symbol " << sym.name() << ", value " << hex << sym.value() << endl; cverb << (vbfd & vlevel1) << "start " << hex << start << ", end " << end << endl; if (sym.symbol()) { cverb << (vbfd & vlevel1) << "in section " << sym.symbol()->section->name << ", filepos " << hex << sym.symbol()->section->filepos << endl; } } void op_bfd::get_vma_range(bfd_vma & start, bfd_vma & end) const { if (!syms.empty()) { // syms are sorted by vma so vma of the first symbol and vma + // size of the last symbol give the vma range for gprof output op_bfd_symbol const & last_symb = syms[syms.size() - 1]; start = syms[0].vma(); // end is excluded from range so + 1 *if* last_symb.size() != 0 end = last_symb.vma() + last_symb.size() + (last_symb.size() != 0); } else { start = 0; end = file_size; } } op_bfd_symbol const op_bfd::create_artificial_symbol() { bfd_vma start, end; get_vma_range(start, end); return op_bfd_symbol(start, end - start, get_filename()); } string op_bfd::get_filename() const { return filename; } size_t op_bfd::bfd_arch_bits_per_address() const { if (ibfd.valid()) return ::bfd_arch_bits_per_address(ibfd.abfd); // FIXME: this function should be called only if the underlined ibfd // is ok, must we throw ? return sizeof(bfd_vma); } oprofile-1.3.0/libutil++/string_filter.h0000664000175000017500000000242512534404406015100 00000000000000/** * @file string_filter.h * Filter strings based on exclude/include list * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef STRING_FILTER_H #define STRING_FILTER_H #include #include /** * string_filter - filtering of a string based on include/exclude list * * This class is an oracle on whether a particular string matches * the given list of included and excluded strings. * * This base class gives a default exact-match semantics. */ class string_filter { public: string_filter() {} /** * Initialise the filter with the include and exclude list, * comma-separated. */ string_filter(std::string const & include_patterns, std::string const & exclude_patterns); /** * Initialise the filter with the include and exclude list. */ string_filter(std::vector const & include_patterns, std::vector const & exclude_patterns); virtual ~string_filter() {} /// Returns true if the given string matches virtual bool match(std::string const & str) const; protected: /// include patterns std::vector include; /// exclude patterns std::vector exclude; }; #endif /* STRING_FILTER_H */ oprofile-1.3.0/libutil++/path_filter.cpp0000664000175000017500000000313512534404406015060 00000000000000/** * @file path_filter.cpp * Filter paths based on globbed exclude/include list * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include "path_filter.h" #include "string_manip.h" #include "file_manip.h" using namespace std; bool path_filter::match(string const & str) const { vector::const_iterator cit; // first, if any component of the dir is listed in exclude -> no string comp = op_dirname(str); while (!comp.empty() && comp != "/") { cit = find_if(exclude.begin(), exclude.end(), fnmatcher(op_basename(comp))); if (cit != exclude.end()) return false; // dirname("foo") == "foo" if (comp == op_dirname(comp)) break; comp = op_dirname(comp); } string const base = op_basename(str); // now if the file name is specifically excluded -> no cit = find_if(exclude.begin(), exclude.end(), fnmatcher(base)); if (cit != exclude.end()) return false; // now if the file name is specifically included -> yes cit = find_if(include.begin(), include.end(), fnmatcher(base)); if (cit != include.end()) return true; // now if any component of the path is included -> yes // note that the include pattern defaults to '*' string compi = op_dirname(str); while (!compi.empty() && compi != "/") { cit = find_if(include.begin(), include.end(), fnmatcher(op_basename(compi))); if (cit != include.end()) return true; // dirname("foo") == "foo" if (compi == op_dirname(compi)) break; compi = op_dirname(compi); } return include.empty(); } oprofile-1.3.0/libutil++/string_filter.cpp0000664000175000017500000000207312534404406015432 00000000000000/** * @file string_filter.cpp * Filter strings based on exclude/include list * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include "string_filter.h" #include "string_manip.h" using namespace std; string_filter::string_filter(string const & include_patterns, string const & exclude_patterns) : include(separate_token(include_patterns, ',')), exclude(separate_token(exclude_patterns, ',')) { } string_filter::string_filter(vector const & include_patterns, vector const & exclude_patterns) : include(include_patterns), exclude(exclude_patterns) { } // FIXME: PP reference bool string_filter::match(string const & str) const { vector::const_iterator cit; cit = find(exclude.begin(), exclude.end(), str); if (cit != exclude.end()) return false; cit = find(include.begin(), include.end(), str); if (include.empty() || cit != include.end()) return true; return false; } oprofile-1.3.0/libutil++/growable_vector.h0000664000175000017500000000454012534404406015411 00000000000000/** * @file growable_vector.h * Auto-expanding vector type * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef GROWABLE_VECTOR_H #define GROWABLE_VECTOR_H #include #include #include /** * A simple growable vector template. */ template class growable_vector { public: typedef std::vector container_type; typedef typename container_type::size_type size_type; /** * Index into the vector for a value. An out of * bounds index will return a default-constructed value. */ T operator[](size_type index) const { if (index >= container.size()) return T(); return container[index]; } /** * Index into the vector for a value. If the index is larger than * the current max index, the array is expanded, default-filling * any intermediary gaps. */ T & operator[](size_type index) { if (index >= container.size()) container.resize(index + 1); return container[index]; } /** * vectorized += operator */ growable_vector & operator+=(growable_vector const & rhs) { if (rhs.container.size() > container.size()) container.resize(rhs.container.size()); size_type min_size = min(container.size(), rhs.container.size()); for (size_type i = 0 ; i < min_size; ++i) container[i] += rhs.container[i]; return *this; } /** * vectorized -= operator, overflow shouldn't occur during substraction * (iow: for each components lhs[i] >= rhs[i] */ growable_vector & operator-=(growable_vector const & rhs) { if (rhs.container.size() > container.size()) container.resize(rhs.container.size()); size_type min_size = min(container.size(), rhs.container.size()); for (size_type i = 0 ; i < min_size; ++i) container[i] -= rhs.container[i]; return *this; } /// return current size of vector size_type size() const { return container.size(); } /// fill container with given value void fill(size_type size, T const & value) { container.resize(size, value); } /// return true if all elements have the default constructed value bool zero() const { return std::find_if(container.begin(), container.end(), std::bind2nd(std::not_equal_to(), T())) == container.end(); } private: container_type container; }; #endif // GROWABLE_VECTOR_H oprofile-1.3.0/libutil++/bfd_support.cpp0000664000175000017500000005625212546756165015135 00000000000000/** * @file bfd_support.cpp * BFD muck we have to deal with. * * @remark Copyright 2005 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #include "bfd_support.h" #include "op_bfd.h" #include "op_fileio.h" #include "op_config.h" #include "string_manip.h" #include "file_manip.h" #include "cverb.h" #include "locate_images.h" #include "op_libiberty.h" #include "op_exception.h" #include #include #include #include #include #include #include #include #include #include #include #include #include using namespace std; extern verbose vbfd; namespace { #ifndef NT_GNU_BUILD_ID #define NT_GNU_BUILD_ID 3 #endif static size_t build_id_size; void check_format(string const & file, bfd ** ibfd) { if (!bfd_check_format_matches(*ibfd, bfd_object, NULL)) { cverb << vbfd << "BFD format failure for " << file << endl; bfd_close(*ibfd); *ibfd = NULL; } } bool separate_debug_file_exists(string & name, unsigned long const crc, extra_images const & extra) { unsigned long file_crc = 0; // The size of 2 * 1024 elements for the buffer is arbitrary. char buffer[2 * 1024]; image_error img_ok; string const image_path = extra.find_image_path(name, img_ok, true); if (img_ok != image_ok) return false; name = image_path; ifstream file(image_path.c_str()); if (!file) return false; cverb << vbfd << "found " << name; while (file) { file.read(buffer, sizeof(buffer)); file_crc = calc_crc32(file_crc, reinterpret_cast(&buffer[0]), file.gcount()); } ostringstream message; message << " with crc32 = " << hex << file_crc << endl; cverb << vbfd << message.str(); return crc == file_crc; } static bool find_debuginfo_file_by_buildid(unsigned char * buildid, string & debug_filename) { size_t build_id_fname_size = strlen (DEBUGDIR) + (sizeof "/.build-id/" - 1) + 1 + (2 * build_id_size) + (sizeof ".debug" - 1) + 1; char * build_id_fname = (char *) xmalloc(build_id_fname_size); char * sptr = build_id_fname; unsigned char * bptr = buildid; bool retval = false; size_t build_id_segment_len = strlen("/.build-id/"); memcpy(sptr, DEBUGDIR, strlen(DEBUGDIR)); sptr += strlen(DEBUGDIR); memcpy(sptr, "/.build-id/", build_id_segment_len); sptr += build_id_segment_len; sptr += sprintf(sptr, "%02x", (unsigned) *bptr++); *sptr++ = '/'; for (int i = build_id_size - 1; i > 0; i--) sptr += sprintf(sptr, "%02x", (unsigned) *bptr++); strcpy(sptr, ".debug"); if (access(build_id_fname, R_OK) == 0) { debug_filename = string(build_id_fname); retval = true; cverb << vbfd << "Using build-id file" << endl; } free(build_id_fname); if (!retval) cverb << vbfd << "build-id file not found; falling back to CRC method." << endl; return retval; } static bool get_build_id(bfd * ibfd, unsigned char * build_id) { Elf32_Nhdr op_note_hdr; asection * sect; char * ptr; bool retval = false; cverb << vbfd << "fetching build-id from runtime binary ..."; if (!(sect = bfd_get_section_by_name(ibfd, ".note.gnu.build-id"))) { if (!(sect = bfd_get_section_by_name(ibfd, ".notes"))) { cverb << vbfd << " No build-id section found" << endl; return false; } } bfd_size_type buildid_sect_size = bfd_section_size(ibfd, sect); char * contents = (char *) xmalloc(buildid_sect_size); errno = 0; if (!bfd_get_section_contents(ibfd, sect, reinterpret_cast(contents), static_cast(0), buildid_sect_size)) { string msg = "bfd_get_section_contents:get_build_id"; if (errno) { msg += ": "; msg += strerror(errno); } throw op_fatal_error(msg); } ptr = contents; while (ptr < (contents + buildid_sect_size)) { op_note_hdr.n_namesz = bfd_get_32(ibfd, reinterpret_cast(contents)); op_note_hdr.n_descsz = bfd_get_32(ibfd, reinterpret_cast(contents + 4)); op_note_hdr.n_type = bfd_get_32(ibfd, reinterpret_cast(contents + 8)); ptr += sizeof(op_note_hdr); if ((op_note_hdr.n_type == NT_GNU_BUILD_ID) && (op_note_hdr.n_namesz == sizeof("GNU")) && (strcmp("GNU", ptr ) == 0)) { build_id_size = op_note_hdr.n_descsz; memcpy(build_id, ptr + op_note_hdr.n_namesz, build_id_size); retval = true; cverb << vbfd << "Found build-id" << endl; break; } ptr += op_note_hdr.n_namesz + op_note_hdr.n_descsz; } if (!retval) cverb << vbfd << " No build-id found" << endl; free(contents); return retval; } bool get_debug_link_info(bfd * ibfd, string & filename, unsigned long & crc32) { asection * sect; cverb << vbfd << "fetching .gnu_debuglink section" << endl; sect = bfd_get_section_by_name(ibfd, ".gnu_debuglink"); if (sect == NULL) return false; bfd_size_type debuglink_size = bfd_section_size(ibfd, sect); char * contents = (char *) xmalloc(debuglink_size); cverb << vbfd << ".gnu_debuglink section has size " << debuglink_size << endl; if (!bfd_get_section_contents(ibfd, sect, reinterpret_cast(contents), static_cast(0), debuglink_size)) { string msg = "bfd_get_section_contents:get_debug"; if (errno) { msg += ": "; msg += strerror(errno); } throw op_fatal_error(msg); } /* CRC value is stored after the filename, aligned up to 4 bytes. */ size_t filename_len = strlen(contents); size_t crc_offset = filename_len + 1; crc_offset = (crc_offset + 3) & ~3; crc32 = bfd_get_32(ibfd, reinterpret_cast(contents + crc_offset)); filename = string(contents, filename_len); cverb << vbfd << ".gnu_debuglink filename is " << filename << endl; free(contents); return true; } /** * With Objective C, we'll get strings like: * * _i_GSUnicodeString__rangeOfCharacterSetFromSet_options_range * * for the symbol name, and: * -[GSUnicodeString rangeOfCharacterFromSet:options:range:] * * for the function name, so we have to do some looser matching * than for other languages (unfortunately, it's not possible * to demangle Objective C symbols). */ bool objc_match(string const & sym, string const & method) { if (method.length() < 3) return false; string mangled; if (is_prefix(method, "-[")) { mangled += "_i_"; } else if (is_prefix(method, "+[")) { mangled += "_c_"; } else { return false; } string::const_iterator it = method.begin() + 2; string::const_iterator const end = method.end(); bool found_paren = false; for (; it != end; ++it) { switch (*it) { case ' ': mangled += '_'; if (!found_paren) mangled += '_'; break; case ':': mangled += '_'; break; case ')': case ']': break; case '(': found_paren = true; mangled += '_'; break; default: mangled += *it; } } return sym == mangled; } /* * With a binary image where some objects are missing debug * info, we can end up attributing to a completely different * function (#484660): bfd_nearest_line() will happily move from one * symbol to the nearest one it can find with debug information. * To mitigate this problem, we check that the symbol name * matches the returned function name. * * However, this check fails in some cases it shouldn't: * Objective C, and C++ static inline functions (as discussed in * GCC bugzilla #11774). So, we have a looser check that * accepts merely a substring, plus some magic for Objective C. * * If even the loose check fails, then we give up. */ bool is_correct_function(string const & function, string const & name) { if (name == function) return true; if (objc_match(name, function)) return true; // warn the user if we had to use the loose check if (name.find(function) != string::npos) { static bool warned = false; if (!warned) { cerr << "warning: some functions compiled without " << "debug information may have incorrect source " << "line attributions" << endl; warned = true; } cverb << vbfd << "is_correct_function(" << function << ", " << name << ") fuzzy match." << endl; return true; } return false; } /* * binutils 2.12 and below have a small bug where functions without a * debug entry at the prologue start do not give a useful line number * from bfd_find_nearest_line(). This can happen with certain gcc * versions such as 2.95. * * We work around this problem by scanning forward for a vma with valid * linenr info, if we can't get a valid line number. Problem uncovered * by Norbert Kaufmann. The work-around decreases, on the tincas * application, the number of failure to retrieve linenr info from 835 * to 173. Most of the remaining are c++ inline functions mainly from * the STL library. Fix #529622 */ void fixup_linenr(bfd * abfd, asection * section, asymbol ** syms, string const & name, bfd_vma pc, char const ** filename, unsigned int * line) { char const * cfilename; char const * function; unsigned int linenr; // FIXME: looking at debug info for all gcc version shows than // the same problems can -perhaps- occur for epilog code: find a // samples files with samples in epilog and try opreport -l -g // on it, check it also with opannotate. // first restrict the search on a sensible range of vma, 16 is // an intuitive value based on epilog code look size_t max_search = 16; size_t section_size = bfd_section_size(abfd, section); if (pc + max_search > section_size) max_search = section_size - pc; for (size_t i = 1; i < max_search; ++i) { bool ret = bfd_find_nearest_line(abfd, section, syms, pc + i, &cfilename, &function, &linenr); if (ret && cfilename && function && linenr != 0 && is_correct_function(function, name)) { *filename = cfilename; *line = linenr; return; } } } } // namespace anon bfd * open_bfd(string const & file) { /* bfd keeps its own reference to the filename char *, * so it must have a lifetime longer than the ibfd */ bfd * ibfd = bfd_openr(file.c_str(), NULL); if (!ibfd) { cverb << vbfd << "bfd_openr failed for " << file << endl; return NULL; } check_format(file, &ibfd); return ibfd; } bfd * fdopen_bfd(string const & file, int fd) { /* bfd keeps its own reference to the filename char *, * so it must have a lifetime longer than the ibfd */ bfd * ibfd = bfd_fdopenr(file.c_str(), NULL, fd); if (!ibfd) { cverb << vbfd << "bfd_openr failed for " << file << endl; return NULL; } check_format(file, &ibfd); return ibfd; } bool find_separate_debug_file(bfd * ibfd, string const & filepath_in, string & debug_filename, extra_images const & extra) { string filepath(filepath_in); string basename; unsigned long crc32 = 0; // The readelf program uses a char [64], so that's what we'll use. // To my knowledge, the build-id should not be bigger than 20 chars. unsigned char buildid[64]; if (get_build_id(ibfd, buildid) && find_debuginfo_file_by_buildid(buildid, debug_filename)) return true; if (!get_debug_link_info(ibfd, basename, crc32)) return false; /* Use old method of finding debuginfo file by comparing runtime binary's * CRC with the CRC we calculate from the debuginfo file's contents. * NOTE: This method breaks on systems where "MiniDebugInfo" is used * since the CRC stored in the runtime binary won't match the compressed * debuginfo file's CRC. But in practice, we shouldn't ever run into such * a scenario since the build-id should always be available. */ // Work out the image file's directory prefix string filedir = op_dirname(filepath); // Make sure it starts with / if (filedir.size() > 0 && filedir.at(filedir.size() - 1) != '/') filedir += '/'; string first_try(filedir + ".debug/" + basename); string second_try(DEBUGDIR + filedir + basename); string third_try(filedir + basename); ostringstream message; message << "looking for debugging file " << basename << " with crc32 = " << hex << crc32 << endl; cverb << vbfd << message.str(); if (separate_debug_file_exists(first_try, crc32, extra)) debug_filename = first_try; else if (separate_debug_file_exists(second_try, crc32, extra)) debug_filename = second_try; else if (separate_debug_file_exists(third_try, crc32, extra)) debug_filename = third_try; else return false; return true; } bool interesting_symbol(asymbol * sym) { // #717720 some binutils are miscompiled by gcc 2.95, one of the // typical symptom can be catched here. if (!sym->section) { ostringstream os; os << "Your version of binutils seems to have a bug.\n" << "Read http://oprofile.sf.net/faq/#binutilsbug\n"; throw op_runtime_error(os.str()); } if (!(sym->section->flags & SEC_CODE)) return false; // returning true for fix up in op_bfd_symbol() if (!sym->name || sym->name[0] == '\0') return true; /* ARM assembler internal mapping symbols aren't interesting */ if ((strcmp("$a", sym->name) == 0) || (strcmp("$t", sym->name) == 0) || (strcmp("$d", sym->name) == 0) || (strcmp("$x", sym->name) == 0)) return false; // C++ exception stuff if (sym->name[0] == '.' && sym->name[1] == 'L') return false; /* This case cannot be moved to boring_symbol(), * because that's only used for duplicate VMAs, * and sometimes this symbol appears at an address * different from all other symbols. */ if (!strcmp("gcc2_compiled.", sym->name)) return false; /* Commit ab45a0cc5d1cf522c1aef8f22ed512a9aae0dc1c removed a check for * the SEC_LOAD bit. See the commit message for details why this * was removed. */ if (sym->flags & BSF_SECTION_SYM) return false; return true; } bool boring_symbol(op_bfd_symbol const & first, op_bfd_symbol const & second) { if (first.name() == "Letext") return true; else if (second.name() == "Letext") return false; if (first.name().substr(0, 2) == "??") return true; else if (second.name().substr(0, 2) == "??") return false; if (first.hidden() && !second.hidden()) return true; else if (!first.hidden() && second.hidden()) return false; if (first.name()[0] == '_' && second.name()[0] != '_') return true; else if (first.name()[0] != '_' && second.name()[0] == '_') return false; if (first.weak() && !second.weak()) return true; else if (!first.weak() && second.weak()) return false; return false; } bool bfd_info::has_debug_info() const { if (!valid()) return false; for (asection const * sect = abfd->sections; sect; sect = sect->next) { if (sect->flags & SEC_DEBUGGING) return true; } return false; } bfd_info::~bfd_info() { free(synth_syms); close(); } void bfd_info::close() { if (abfd) bfd_close(abfd); } #if SYNTHESIZE_SYMBOLS /** * This function is intended solely for processing ppc64 debuginfo files. * On ppc64 platforms where there is no symbol information in the image bfd, * the debuginfo syms need to be mapped back to the sections of the image bfd * when calling bfd_get_synthetic_symtab() to gather complete symbol information. * That is the purpose of the translate_debuginfo_syms() function. * * This function is only called when processing symbols retrieved from a * debuginfo file that is separate from the actual runtime binary image. * Separate debuginfo files may be needed in two different cases: * 1) the real image is completely stripped, where there is no symbol information at all * 2) the real image has debuginfo stripped, and the user is requesting "-g" * (src file/line num info) */ void bfd_info::translate_debuginfo_syms(asymbol ** dbg_syms, long nr_dbg_syms) { unsigned int img_sect_cnt = 0; bfd_vma vma_adj; bfd * image_bfd = image_bfd_info->abfd; multimap image_sections; for (bfd_section * sect = image_bfd->sections; sect && img_sect_cnt < image_bfd->section_count; sect = sect->next) { // A comment section marks the end of the needed sections if (strstr(sect->name, ".comment") == sect->name) break; image_sections.insert(pair(sect->name, sect)); img_sect_cnt++; } asymbol * sym = dbg_syms[0]; string prev_sect_name = ""; bfd_section * matched_section = NULL; vma_adj = image_bfd->start_address - abfd->start_address; for (int i = 0; i < nr_dbg_syms; sym = dbg_syms[++i]) { bool section_switch; if (strcmp(prev_sect_name.c_str(), sym->section->name)) { section_switch = true; prev_sect_name = sym->section->name; } else { section_switch = false; } if (sym->section->owner && sym->section->owner == abfd) { if (section_switch ) { matched_section = NULL; multimap::iterator it; pair::iterator, multimap::iterator> range; range = image_sections.equal_range(sym->section->name); for (it = range.first; it != range.second; it++) { if ((*it).second->vma == sym->section->vma + vma_adj) { matched_section = (*it).second; if (vma_adj) section_vma_maps[(*it).second->vma] = sym->section->vma; break; } } } if (matched_section) { sym->section = matched_section; sym->the_bfd = image_bfd; } } } } bool bfd_info::get_synth_symbols() { const char* targname = bfd_get_target(abfd); // Match elf64-powerpc and elf64-powerpc-freebsd, but not // elf64-powerpcle. elf64-powerpcle is a different ABI without // function descriptors, so we don't need the synthetic // symbols to have function code marked by a symbol. bool is_elf64_powerpc_target = (!strncmp(targname, "elf64-powerpc", 13) && (targname[13] == 0 || targname[13] == '-')); if (!is_elf64_powerpc_target) return false; void * buf; uint tmp; long nr_mini_syms = bfd_read_minisymbols(abfd, 0, &buf, &tmp); if (nr_mini_syms < 1) return false; asymbol ** mini_syms = (asymbol **)buf; buf = NULL; bfd * synth_bfd; /* For ppc64, a debuginfo file by itself does not hold enough symbol * information for us to properly attribute samples to symbols. If * the image file's bfd has no symbols (as in a super-stripped library), * then we need to do the extra processing in translate_debuginfo_syms. */ if (image_bfd_info && image_bfd_info->nr_syms == 0) { translate_debuginfo_syms(mini_syms, nr_mini_syms); synth_bfd = image_bfd_info->abfd; } else synth_bfd = abfd; long nr_synth_syms = bfd_get_synthetic_symtab(synth_bfd, nr_mini_syms, mini_syms, 0, NULL, &synth_syms); if (nr_synth_syms < 0) { free(mini_syms); return false; } /* If we called translate_debuginfo_syms() above, then we had to map * the debuginfo symbols' sections to the sections of the runtime binary. * We had to twist ourselves in this knot due to the peculiar requirements * of bfd_get_synthetic_symtab(). While doing this mapping, we cached * the original section VMAs because we need those original values in * order to properly match up sample offsets with debug data. So now that * we're done with bfd_get_synthetic_symtab, we can restore these section * VMAs. */ if (section_vma_maps.size()) { unsigned int sect_count = 0; for (bfd_section * sect = synth_bfd->sections; sect && sect_count < synth_bfd->section_count; sect = sect->next) { sect->vma = section_vma_maps[sect->vma]; sect_count++; } } cverb << vbfd << "mini_syms: " << dec << nr_mini_syms << hex << endl; cverb << vbfd << "synth_syms: " << dec << nr_synth_syms << hex << endl; nr_syms = nr_mini_syms + nr_synth_syms; syms.reset(new asymbol *[nr_syms + 1]); for (size_t i = 0; i < (size_t)nr_mini_syms; ++i) syms[i] = mini_syms[i]; for (size_t i = 0; i < (size_t)nr_synth_syms; ++i) syms[nr_mini_syms + i] = synth_syms + i; free(mini_syms); // bfd_canonicalize_symtab does this, so shall we syms[nr_syms] = NULL; return true; } #else bool bfd_info::get_synth_symbols() { return false; } #endif /* SYNTHESIZE_SYMBOLS */ void bfd_info::get_symbols() { if (!abfd) return; cverb << vbfd << "bfd_info::get_symbols() for " << bfd_get_filename(abfd) << endl; if (get_synth_symbols()) return; if (bfd_get_file_flags(abfd) & HAS_SYMS) nr_syms = bfd_get_symtab_upper_bound(abfd); ostringstream message; message << "bfd_get_symtab_upper_bound: " << dec << nr_syms << hex << endl; cverb << vbfd << message.str(); nr_syms /= sizeof(asymbol *); if (nr_syms < 1) { if (!image_bfd_info) return; syms.reset(); cverb << vbfd << "Debuginfo has debug data only" << endl; } else { syms.reset(new asymbol *[nr_syms]); nr_syms = bfd_canonicalize_symtab(abfd, syms.get()); ostringstream message; message << "bfd_canonicalize_symtab: " << dec << nr_syms << hex << endl; cverb << vbfd << message.str(); } } linenr_info const find_nearest_line(bfd_info const & b, op_bfd_symbol const & sym, bfd_vma offset, bool anon_obj) { char const * function = ""; char const * cfilename = ""; unsigned int linenr = 0; linenr_info info; bfd * abfd; asymbol ** syms; asection * section = NULL; asymbol * empty_syms[1]; bfd_vma pc; bool ret; if (!b.valid()) goto fail; // take care about artificial symbol if (!sym.symbol()) goto fail; abfd = b.abfd; syms = b.syms.get(); if (!syms) { // If this bfd_info object has no syms, that implies that we're // using a debuginfo bfd_info object that has only debug data. // This also implies that the passed sym is from the runtime binary, // and thus it's section is also from the runtime binary. And // since section VMA can be different for a runtime binary (prelinked) // and its associated debuginfo, we need to obtain the debuginfo // section to pass to the libbfd functions. asection * sect_candidate; bfd_vma vma_adj = b.get_image_bfd_info()->abfd->start_address - abfd->start_address; if (vma_adj == 0) section = sym.symbol()->section; for (sect_candidate = abfd->sections; (sect_candidate != NULL) && (section == NULL); sect_candidate = sect_candidate->next) { if (sect_candidate->vma + vma_adj == sym.symbol()->section->vma) { section = sect_candidate; } } if (section == NULL) { cerr << "ERROR: Unable to find section for symbol " << sym.symbol()->name << endl; goto fail; } syms = empty_syms; syms[0] = NULL; } else { section = sym.symbol()->section; } if (anon_obj) pc = offset - sym.symbol()->section->vma; else pc = (sym.value() + offset) - sym.filepos(); if ((bfd_get_section_flags(abfd, section) & SEC_ALLOC) == 0) goto fail; if (pc >= bfd_section_size(abfd, section)) goto fail; ret = bfd_find_nearest_line(abfd, section, syms, pc, &cfilename, &function, &linenr); if (!ret || !cfilename || !function) goto fail; /* * is_correct_function does not handle the case of static inlines, * but if the linenr is non-zero in the inline case, it is the correct * line number. */ if (linenr == 0 && !is_correct_function(function, sym.name())) goto fail; if (linenr == 0) { fixup_linenr(abfd, section, syms, sym.name(), pc, &cfilename, &linenr); } info.found = true; info.filename = cfilename; info.line = linenr; return info; fail: info.found = false; // some stl lacks string::clear() info.filename.erase(info.filename.begin(), info.filename.end()); info.line = 0; return info; } oprofile-1.3.0/libutil++/utility.h0000664000175000017500000000406012534404406013725 00000000000000/** * @file utility.h * General purpose C++ utility * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef UTILITY_H #define UTILITY_H #include #define KALL_SYM_FILE "/proc/kallsyms" /** noncopyable : object of class derived from this class can't be copied * and isn't copy-constructible */ class noncopyable { protected: noncopyable() {} ~noncopyable() {} private: noncopyable(noncopyable const &); noncopyable const & operator=(noncopyable const &); }; template class scoped_ptr { public: explicit scoped_ptr(T * p = 0) : p_(p) {} ~scoped_ptr() { delete p_; } void reset(T * p = 0) { if (p == p_) return; delete p_; p_ = p; } T & operator*() const { return *p_; } T * operator->() const { return p_; } T * get() const { return p_; } void swap(scoped_ptr & sp) { T * tmp = sp.p_; sp.p_ = p_; p_ = tmp; } private: scoped_ptr & operator=(scoped_ptr const &); scoped_ptr(scoped_ptr const &); T * p_; }; template class scoped_array { public: explicit scoped_array(T * p = 0) : p_(p) {} ~scoped_array() { delete [] p_; } void reset(T * p = 0) { if (p == p_) return; delete [] p_; p_ = p; } T & operator[](std::ptrdiff_t i) const { return p_[i]; } T * get() const { return p_; } void swap(scoped_array & sp) { T * tmp = sp.p_; sp.p_ = p_; p_ = tmp; } private: scoped_array & operator=(scoped_array const &); scoped_array(scoped_array const &); T * p_; }; /** * @param count * @param total * * return total == 0 ? 1.0 : (count / total); */ inline double op_ratio(double count, double total) { return total == 0 ? 0.0 : (count / total); } // Part copyright: // (C) Copyright boost.org 1999. Permission to copy, use, modify, sell // and distribute this software is granted provided this copyright // notice appears in all copies. This software is provided "as is" without // express or implied warranty, and with no claim as to its suitability for // any purpose. #endif /* !UTILITY_H */ oprofile-1.3.0/libutil++/Makefile.am0000664000175000017500000000136012534404406014105 00000000000000SUBDIRS = . tests AM_CPPFLAGS= \ -I ${top_srcdir}/libutil \ -I ${top_srcdir}/libop \ -I ${top_srcdir}/libpp \ @OP_CPPFLAGS@ AM_CXXFLAGS = @OP_CXXFLAGS@ noinst_LIBRARIES = libutil++.a libutil___a_SOURCES = \ op_bfd.cpp \ op_bfd.h \ bfd_support.cpp \ bfd_support.h \ string_filter.cpp \ string_filter.h \ glob_filter.cpp \ glob_filter.h \ growable_vector.h \ path_filter.cpp \ path_filter.h \ file_manip.cpp \ file_manip.h \ sparse_array.h \ stream_util.cpp \ stream_util.h \ string_manip.cpp \ string_manip.h \ cverb.cpp \ cverb.h \ generic_spec.h \ op_exception.cpp \ op_exception.h \ child_reader.cpp \ child_reader.h \ unique_storage.h \ utility.h \ cached_value.h \ comma_list.h \ xml_output.h \ xml_output.cpp oprofile-1.3.0/libutil++/xml_output.h0000664000175000017500000000111512534404406014440 00000000000000/** * @file xml_output.h * utility routines for writing XML * * @remark Copyright 2006 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #ifndef XML_OUTPUT_H #define XML_OUTPUT_H #include "op_xml_out.h" std::string tag_name(tag_t tag); std::string open_element(tag_t tag, bool with_attrs = false); std::string close_element(tag_t tag = NONE, bool has_nested = false); std::string init_attr(tag_t attr, size_t value); std::string init_attr(tag_t attr, double value); std::string init_attr(tag_t attr, std::string const & str); #endif /* XML_OUTPUT_H */ oprofile-1.3.0/libutil++/comma_list.h0000664000175000017500000000350312534404406014352 00000000000000/** * @file comma_list.h * Container holding items from a list of comma separated items * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef COMMA_LIST_H #define COMMA_LIST_H #include #include #include "string_manip.h" /** * hold a list of item of type T, tracking also if item has been set. */ template class comma_list { public: comma_list(); /** * @param str list of comma separated item * * setup items array according to str parameters. Implement PP:3.17 * w/o restriction on charset and with the special string all which * match anything. */ void set(std::string const & str); /// return true if a specific value is held by this container bool is_set() const { return !is_all; } /** * @param value the value to test * * return true if value match one the stored value in items */ bool match(T const & value) const; private: typedef T value_type; typedef std::vector container_type; typedef typename container_type::const_iterator const_iterator; bool is_all; container_type items; }; template comma_list::comma_list() : is_all(true) { } template void comma_list::set(std::string const & str) { items.clear(); is_all = false; std::vector result = separate_token(str, ','); for (size_t i = 0 ; i < result.size() ; ++i) { if (result[i] == "all") { is_all = true; items.clear(); break; } items.push_back(op_lexical_cast(result[i])); } } template bool comma_list::match(T const & value) const { if (is_all) return true; const_iterator cit = items.begin(); const_iterator const end = items.end(); for (; cit != end; ++cit) { if (value == *cit) return true; } return false; } #endif /* !COMMA_LIST_H */ oprofile-1.3.0/libutil++/cverb.cpp0000664000175000017500000000504612534404406013663 00000000000000/** * @file cverb.cpp * verbose output stream * * @remark Copyright 2002, 2004 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include #include "cverb.h" using namespace std; cverb_object cverb; verbose vlevel1("level1"); verbose vdebug("debug"); verbose vstats("stats"); verbose vsfile("sfile"); verbose varcs("arcs"); verbose vxml("xml"); namespace { // The right way is to use: ofstream fout; but cverb(fout.rdbuf()) receive // a null pointer and stl shipped with 2.91 segfault. ofstream fout("/dev/null"); ostream null_stream(fout.rdbuf()); // Used to setup the bad bit in our null stream so output will fail earlier // and overhead will be smaller. struct setup_stream { setup_stream(); }; setup_stream::setup_stream() { null_stream.clear(ios::badbit); } setup_stream setup; // We use a multimap because user can create multiple verbose object with // the same name, these are synonymous, setting up one to true will setup // all with the same name to true. typedef multimap recorder_t; // The recorder is lazilly created by verbose object ctor static recorder_t * object_map; } // anonymous namespace verbose::verbose(char const * name) : set(false) { // all params is treated a part, there is no need to create a // verbose all("all"); it's meaningless. "all" verbose named object is // reserved. if (strcmp(name, "all") == 0) return; if (!object_map) object_map = new recorder_t; object_map->insert(recorder_t::value_type(name, this)); } verbose verbose::operator|(verbose const & rhs) { verbose result(*this); result.set = result.set || rhs.set; return result; } verbose verbose::operator&(verbose const & rhs) { verbose result(*this); result.set = result.set && rhs.set; return result; } bool verbose::setup(string const & name) { if (name == "all") { null_stream.rdbuf(cout.rdbuf()); null_stream.clear(); return true; } if (!object_map) object_map = new recorder_t; pair p_it = object_map->equal_range(name); if (p_it.first == p_it.second) return false; for (; p_it.first != p_it.second; ++p_it.first) p_it.first->second->set = true; return true; } bool verbose::setup(vector const & names) { for (size_t i = 0; i < names.size(); ++i) if (!setup(names[i])) return false; return true; } ostream& operator<<(cverb_object &, verbose const & v) { return v.set ? cout : null_stream; } oprofile-1.3.0/libutil++/path_filter.h0000664000175000017500000000251712534404406014530 00000000000000/** * @file path_filter.h * Filter paths based on globbed exclude/include list * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef PATH_FILTER_H #define PATH_FILTER_H #include "glob_filter.h" /** * path_filter - filtering of a string based on globbed include/exclude list * * This class is an oracle on whether a particular string matches * the given list of included and excluded strings. * * This class gives glob-based matches on each pattern, as with fnmatch(3), * where each component of the candidate path is considered separately. */ class path_filter : public glob_filter { public: /** * Initialise the filter with the include and exclude list, * comma-separated. */ path_filter(std::string const & include_patterns = std::string(), std::string const & exclude_patterns = std::string()) : glob_filter(include_patterns, exclude_patterns) {} /** * Initialise the filter with the include and exclude list. */ path_filter(std::vector const & include_patterns, std::vector const & exclude_patterns) : glob_filter(include_patterns, exclude_patterns) {} /// Returns true if the given string matches virtual bool match(std::string const & str) const; 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bool glob_filter::fnmatcher::operator()(string const & s) { return fnmatch(s.c_str(), str_.c_str(), 0) != FNM_NOMATCH; } bool glob_filter::match(string const & str) const { vector::const_iterator cit; cit = find_if(exclude.begin(), exclude.end(), fnmatcher(str)); if (cit != exclude.end()) return false; cit = find_if(include.begin(), include.end(), fnmatcher(str)); if (include.empty() || cit != include.end()) return true; return false; } oprofile-1.3.0/libutil++/child_reader.cpp0000664000175000017500000001206312534404406015164 00000000000000/** * @file child_reader.cpp * Facility for reading from child processes * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include #include #include #include "op_libiberty.h" #include "child_reader.h" using namespace std; child_reader::child_reader(string const & cmd, vector const & args) : fd1(-1), fd2(-1), pos1(0), end1(0), pos2(0), end2(0), pid(0), first_error(0), buf2(0), sz_buf2(0), buf1(new char[PIPE_BUF]), process_name(cmd), is_terminated(true), terminate_on_exception(false), forked(false) { exec_command(cmd, args); } child_reader::~child_reader() { terminate_process(); delete [] buf1; if (buf2) { // allocated through C alloc free(buf2); } } void child_reader::exec_command(string const & cmd, vector const & args) { int pstdout[2]; int pstderr[2]; if (pipe(pstdout) == -1 || pipe(pstderr) == -1) { first_error = errno; return; } pid = fork(); switch (pid) { case -1: first_error = errno; return; case 0: { char const ** argv = new char const *[args.size() + 2]; size_t i; argv[0] = cmd.c_str(); for (i = 1 ; i <= args.size() ; ++i) argv[i] = args[i - 1].c_str(); argv[i] = 0; // child: we can cleanup a few fd close(pstdout[0]); dup2(pstdout[1], STDOUT_FILENO); close(pstdout[1]); close(pstderr[0]); dup2(pstderr[1], STDERR_FILENO); close(pstderr[1]); execvp(cmd.c_str(), (char * const *)argv); int ret_code = errno; // we can communicate with parent by writing to stderr // and by returning a non zero error code. Setting // first_error in the child is a non-sense // we are in the child process: so this error message // is redirect to the parent process cerr << "Couldn't exec \"" << cmd << "\" : " << strerror(errno) << endl; exit(ret_code); } default:; // parent: we do not write on these fd. close(pstdout[1]); close(pstderr[1]); forked = true; break; } fd1 = pstdout[0]; fd2 = pstderr[0]; is_terminated = false; return; } bool child_reader::block_read() { fd_set read_fs; FD_ZERO(&read_fs); FD_SET(fd1, &read_fs); FD_SET(fd2, &read_fs); if (select(max(fd1, fd2) + 1, &read_fs, 0, 0, 0) >= 0) { if (FD_ISSET(fd1, &read_fs)) { ssize_t temp = read(fd1, buf1, PIPE_BUF); if (temp >= 0) end1 = temp; else end1 = 0; } if (FD_ISSET(fd2, &read_fs)) { if (end2 >= sz_buf2) { sz_buf2 = sz_buf2 ? sz_buf2 * 2 : PIPE_BUF; buf2 = (char *)xrealloc(buf2, sz_buf2); } ssize_t temp = read(fd2, buf2 + end2, sz_buf2 - end2); if (temp > 0) end2 += temp; } } bool ret = !(end1 == 0 && end2 == 0); if (end1 == -1) end1 = 0; if (end2 == -1) end2 = 0; return ret; } bool child_reader::getline(string & result) { // some stl lacks string::clear() result.erase(result.begin(), result.end()); bool ok = true; bool can_stop = false; do { int temp = end2; if (pos1 >= end1) { pos1 = 0; block_read(); } // for efficiency try to copy as much as we can of data ssize_t temp_pos = pos1; while (temp_pos < end1 && ok) { char ch = buf1[temp_pos++]; if (ch == '\n') ok = false; } // !ok ==> endl has been read so do not copy it. result.append(&buf1[pos1], (temp_pos - pos1) - !ok); if (!ok || !end1) can_stop = true; // reading zero byte from stdout don't mean than we exhausted // all stdout output, we must continue to try until reading // stdout and stderr return zero byte. if (ok && temp != end2) can_stop = false; pos1 = temp_pos; } while (!can_stop); // Is this correct ? return end1 != 0 || result.length() != 0; } bool child_reader::get_data(ostream & out, ostream & err) { bool ret = true; while (ret) { ret = block_read(); out.write(buf1, end1); err.write(buf2, end2); end1 = end2 = 0; } return first_error == 0; } int child_reader::terminate_process() { // can be called explicitely or by dtor, // we must protect against multiple call if (!is_terminated) { int ret; (void)waitpid(pid, &ret, 0); is_terminated = true; if (WIFEXITED(ret)) { first_error = WEXITSTATUS(ret) | WIFSIGNALED(ret); } else if (WIFSIGNALED(ret)) { terminate_on_exception = true; first_error = WTERMSIG(ret); } else { // FIXME: this seems impossible, waitpid *must* wait // and either the process terminate normally or through // a signal. first_error = -1; } } if (fd1 != -1) { close(fd1); fd1 = -1; } if (fd2 != -1) { close(fd2); fd2 = -1; } return first_error; } string child_reader::error_str() const { ostringstream err; if (!forked) { err << string("unable to fork, error: ") << strerror(first_error); } else if (is_terminated) { if (first_error) { if (terminate_on_exception) { err << process_name << " terminated by signal " << first_error; } else { err << process_name << " return " << first_error; } } } return err.str(); } oprofile-1.3.0/libutil++/tests/0000775000175000017500000000000013323173527013277 500000000000000oprofile-1.3.0/libutil++/tests/utility_tests.cpp0000664000175000017500000000411613125211076016642 00000000000000/** * @file utility_tests.cpp * tests utility.h and op_exception.h * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include "utility.h" #include "op_exception.h" using namespace std; static int nb_new; static int nb_new_array; void* operator new(size_t size) throw(bad_alloc) { nb_new++; return malloc(size); } void* operator new[](size_t size) throw(bad_alloc) { nb_new_array++; return malloc(size); } void operator delete(void * p) throw() { nb_new--; if (p) free(p); } void operator delete(void * p, size_t s) throw() { size_t dummy __attribute__ ((__unused__)) = s; nb_new--; if (p) free(p); } void operator delete[](void * p) throw() { nb_new_array--; if (p) free(p); } void operator delete[](void * p, size_t s) throw() { size_t dummy __attribute__ ((__unused__)) = s; nb_new_array--; if (p) free(p); } void check_alloc() { if (nb_new) { cerr << "new(size_t) leak\n"; exit(EXIT_FAILURE); } if (nb_new_array) { cerr << "new[](size_t) leak\n"; exit(EXIT_FAILURE); } } struct A {}; template void throw_tests() { scoped_ptr a(new A); try { scoped_ptr a(new A); throw Throw(""); } catch (Catch const &) { } } template void throw_tests(bool) { scoped_array b(new A[10]); try { scoped_array a(new A[10]); throw Throw(""); } catch (Catch const &) { } } void tests_new() { throw_tests(); throw_tests(); throw_tests(); throw_tests(); throw_tests(true); throw_tests(true); throw_tests(true); throw_tests(true); } int main() { try { tests_new(); check_alloc(); } catch (...) { cerr << "unknown exception\n"; return EXIT_FAILURE; } return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/tests/Makefile.am0000664000175000017500000000230012534404406015242 00000000000000 REALPATH= readlink -f SRCDIR := $(shell $(REALPATH) $(topdir)/libutil++/tests/ ) AM_CPPFLAGS = \ -I ${top_srcdir}/libutil++ -D SRCDIR="\"$(SRCDIR)/\"" @OP_CPPFLAGS@ COMMON_LIBS = ../libutil++.a ../../libutil/libutil.a LIBS = @LIBERTY_LIBS@ AM_CXXFLAGS = @OP_CXXFLAGS@ check_PROGRAMS = \ string_manip_tests \ string_filter_tests \ comma_list_tests \ file_manip_tests \ glob_filter_tests \ path_filter_tests \ cached_value_tests \ utility_tests string_manip_tests_SOURCES = string_manip_tests.cpp string_manip_tests_LDADD = ${COMMON_LIBS} string_filter_tests_SOURCES = string_filter_tests.cpp string_filter_tests_LDADD = ${COMMON_LIBS} glob_filter_tests_SOURCES = glob_filter_tests.cpp glob_filter_tests_LDADD = ${COMMON_LIBS} path_filter_tests_SOURCES = path_filter_tests.cpp path_filter_tests_LDADD = ${COMMON_LIBS} comma_list_tests_SOURCES = comma_list_tests.cpp comma_list_tests_LDADD = ${COMMON_LIBS} file_manip_tests_SOURCES = file_manip_tests.cpp file_manip_tests_LDADD = ${COMMON_LIBS} cached_value_tests_SOURCES = cached_value_tests.cpp cached_value_tests_LDADD = ${COMMON_LIBS} utility_tests_SOURCES = utility_tests.cpp utility_tests_LDADD = ${COMMON_LIBS} TESTS = ${check_PROGRAMS} oprofile-1.3.0/libutil++/tests/cached_value_tests.cpp0000664000175000017500000000260612534404406017550 00000000000000/** * @file cached_value_tests.cpp * tests cached_value.h * * @remark Copyright 2005 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #include #include #include #include "cached_value.h" using namespace std; namespace { bool check_throw(cached_value const & boolval) { bool foo; try { foo = boolval.get(); foo = false; } catch (op_fatal_error const & e) { foo = true; } return foo; } int check_cached(void) { cached_value boolval; cached_value strval; if (!check_throw(boolval)) { cerr << "get() on no value didn't throw\n"; return EXIT_FAILURE; } if (boolval.reset(false) != false || boolval.get() != false) { cerr << "reset() of cached value \"false\" didn't work\n"; return EXIT_FAILURE; } if (boolval.reset(true) != true || boolval.get() != true) { cerr << "reset() of cached value \"true\" didn't work\n"; return EXIT_FAILURE; } if (strval.reset("foo") != "foo" || strval.get() != "foo") { cerr << "reset() of cached value \"foo\" didn't work\n"; return EXIT_FAILURE; } if (strval.reset("") != "" || strval.get() != "") { cerr << "reset() of cached value \"\" didn't work\n"; return EXIT_FAILURE; } return EXIT_SUCCESS; } }; int main() { try { check_cached(); } catch (...) { cerr << "unknown exception\n"; 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template struct input_output { Input input; Output output; }; template static void check_result(char const * fct_name, Input const & input, Output const & output, Result const & result) { if (result != output) { cerr << fct_name << " " << "for:\n\"" << input << "\"\n" << "expect:\n\"" << output << "\"\n" << "found:\n\"" << result << "\"\n"; exit(EXIT_FAILURE); } } template static void check_result(char const * fct_name, Input const & input1, Input input2, Output const & output, Result const & result) { if (result != output) { cerr << fct_name << ": \n" << "for:\n\"" << input1 << "\"\n" << "\"" << input2 << "\"\n" << "expect:\n\"" << output << "\"\n" << "found:\n\"" << result << "\"\n"; exit(EXIT_FAILURE); } } static input_output expect_dirname[] = { { "/", "/" }, { "//////", "/" }, { "/usr", "/" }, { "///usr", "/" }, // suprising but conform to dirname(1) { "///usr/dir", "///usr" }, { "usr/dir", "usr" }, { "usr", "." }, { "n", "." }, { "../..", ".." }, { "/../..", "/.." }, { "./..", "." }, { "./.", "." }, { "..", "." }, { ".", "." }, { "", "." }, { 0, 0 } }; static void dirname_tests() { input_output const * cur; for (cur = expect_dirname; cur->input; ++cur) { string result = op_dirname(cur->input); check_result("dirname", cur->input, cur->output, result); } } static input_output expect_basename[] = { { "/", "/" }, { "//////", "/" }, { "/usr", "usr" }, { "///usr", "usr" }, { "///usr/dir", "dir" }, { "///usr//dir", "dir" }, { "usr/dir", "dir" }, { "usr", "usr" }, { "../..", ".." }, { "/../..", ".." }, { "./..", ".." }, { "./.", "." }, { ".", "." }, { 0, 0 } }; static void basename_tests() { input_output const * cur; for (cur = expect_basename; cur->input; ++cur) { string result = op_basename(cur->input); check_result("basename", cur->input, cur->output, result); } } static input_output expect_is_directory[] = { { ".", true }, { "/.", true }, { "./", true }, { "/", true }, { "../", true }, { "../.", true }, { "non_existing_dir", false }, { 0, 0 } }; static void is_directory_tests() { input_output const * cur; for (cur = expect_is_directory; cur->input; ++cur) { bool result = is_directory(cur->input); check_result("is_directory", cur->input, cur->output, result); } } static input_output, bool> expect_is_files_identical[] = { #define MAKE_PAIR(a, b) make_pair(string(a), string(b)) { MAKE_PAIR(__FILE__, __FILE__), true }, { MAKE_PAIR(__FILE__, "not_existing"), false }, { MAKE_PAIR("not_exisiting", __FILE__), false }, { MAKE_PAIR("not_exisiting", "not_existing"), false }, { MAKE_PAIR("", ""), false } #undef MAKE_PAIR }; void is_files_identical_tests(char const * prog_name) { check_result("is_files_identical", prog_name, prog_name, is_files_identical(prog_name, prog_name), true); input_output, bool> const * cur; for (cur = expect_is_files_identical; !cur->input.first.empty(); ++cur) { bool result = is_files_identical(cur->input.first, cur->input.second); check_result("is_files_identical", cur->input.first, cur->input.second, cur->output, result); } } static input_output expect_op_file_readable[] = { { __FILE__, true }, { "./" __FILE__, true }, { ".", false }, { "/.", false }, { "./", false }, { "/", false }, { "../", false }, { "../.", false }, { "non_existing_file", false }, { 0, 0 } }; static void op_file_readable_tests() { input_output const * cur; for (cur = expect_op_file_readable; cur->input; ++cur) { bool result = op_file_readable(cur->input); check_result("op_file_readable", cur->input, cur->output, result); } } static input_output expect_realpath[] = { // realpath() file argument must exists. { "file_manip_tests.o", "file_manip_tests.o" }, { "../tests/" "file_manip_tests.o", "file_manip_tests.o" }, { ".//.//" "file_manip_tests.o", "file_manip_tests.o" }, // POSIX namespaces ignored by realpath(3) { "//", "/" }, { "//usr", "/usr" }, { "///", "/" }, { "", "" } }; // FIXME: useful to test symlinks too static void realpath_tests() { input_output const * cur; for (cur = expect_realpath; !cur->input.empty(); ++cur) { string result = op_realpath(cur->input); string expect = cur->output; if (cur->input[0] != '/') expect = SRCDIR + expect; check_result("op_realpath", cur->input, expect, result); } } void create_file_list_tests() { list result; if (!create_file_list(result, ".")) { cerr << "create_file_list() fail\n"; exit(EXIT_FAILURE); } if (result.empty()) { cerr << "create_file_list(); empty result\n"; exit(EXIT_FAILURE); } } int main(int, char * argv[]) { dirname_tests(); basename_tests(); is_directory_tests(); is_files_identical_tests(argv[0]); op_file_readable_tests(); realpath_tests(); create_file_list_tests(); return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/tests/path_filter_tests.cpp0000664000175000017500000000341612534404406017446 00000000000000/** * @file path_filter_tests.cpp * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "path_filter.h" using namespace std; #define check(filter, str, result) \ if (filter.match(str) != result) { \ cerr << "\"" << str << "\" matched with " #filter \ << " did not return " #result << endl; \ exit(EXIT_FAILURE); \ } int main() { path_filter f1("foo,*bar", "foobar"); check(f1, "foo/barfoobar", true); check(f1, "foo/bar", true); check(f1, "/foo/foobar/foo", false); check(f1, "fooobar1", false); check(f1, "foo1", false); check(f1, "foobar", false); check(f1, "bar1", false); path_filter f2("foo", ""); check(f2, "foo", true); check(f2, "foo1", false); check(f2, "foo/foo", true); path_filter f3("", "foo"); check(f3, "foo", false); check(f3, "foo1", true); check(f3, "foo/foo", false); path_filter f4("foo", "foo"); check(f4, "foo", false); check(f4, "foo1", false); check(f4, "foo/foo", false); path_filter f5("*foo*", "*bar*"); check(f5, "foo", true); check(f5, "bar", false); check(f5, "foobar", false); check(f5, "barfoo", false); check(f5, "foo/bar", false); path_filter f6(" foo,bar", "bar "); check(f6, "foo", false); check(f6, "foo ", false); check(f6, " foo", true); check(f6, "bar", true); check(f6, "bar ", false); check(f6, " bar", false); check(f6, "foo ", false); check(f6, "foo/ bar", false); path_filter f7(".", ""); check(f7, ".", true); // a bit surprising but right IMHO, our implementation use successive // dirname(input) to check vs the included path and // dirname("foo") == "." so all relative path input match a "." // included filter check(f7, "foo", true); return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/tests/string_filter_tests.cpp0000664000175000017500000000320212534404406020011 00000000000000/** * @file string_filter_tests.cpp * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "string_filter.h" using namespace std; #define check(filter, str, result) \ if (filter.match(str) != result) { \ cerr << "\"" << str << "\" matched with " #filter \ << " did not return " #result << endl; \ exit(EXIT_FAILURE); \ } int main() { string_filter f1; check(f1, "", true); check(f1, "ok", true); string_filter f2("ok", ""); check(f2, "ok", true); check(f2, "no", false); string_filter f3("", "no"); check(f3, "ok", true); check(f3, "no", false); string_filter f4("ok,ok2,", ""); check(f4, "ok", true); check(f4, "ok2", true); check(f4, "no", false); string_filter f5("ok,ok2", "no,no2"); check(f5, "ok", true); check(f5, "ok2", true); check(f5, "no", false); check(f5, "no2", false); vector v1; vector v2; string_filter f6(v1, v2); check(f6, "", true); check(f6, "ok", true); v1.push_back("ok"); v1.push_back("ok2"); string_filter f7(v1, v2); check(f7, "ok", true); check(f7, "ok2", true); check(f7, "no", false); v1.clear(); v2.push_back("no"); v2.push_back("no2"); string_filter f8(v1, v2); check(f8, "ok", true); check(f8, "no", false); check(f8, "no", false); v1.push_back("ok"); v1.push_back("ok2"); string_filter f9(v1, v2); check(f9, "ok", true); check(f9, "no2", false); string_filter f10(" foo ", ""); check(f10, " foo ", true); check(f10, " foo", false); check(f10, "foo ", false); check(f10, "foo", false); return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/tests/comma_list_tests.cpp0000664000175000017500000000200412534404406017264 00000000000000/** * @file comma_list_tests.cpp * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "comma_list.h" using namespace std; #define check(clist, val, result) \ if (clist.match(val) != result) { \ cerr << "\"" << #val << "\" matched with " #clist \ << " did not return " #result << endl; \ exit(EXIT_FAILURE); \ } int main() { comma_list c1; check(c1, 1, true); c1.set("2"); check(c1, 2, true); check(c1, 3, false); c1.set("3"); check(c1, 2, false); check(c1, 3, true); c1.set("2,3"); check(c1, 2, true); check(c1, 3, true); check(c1, 4, false); c1.set("all"); check(c1, 2, true); check(c1, 4, true); check(c1, 5, true); comma_list c2; c2.set("6,all"); check(c2, 4, true); check(c2, 0, true); c2.set("all,6"); check(c2, 4, true); check(c2, 0, true); c2.set("10"); check(c2, 10, true); check(c2, 11, false); return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/tests/string_manip_tests.cpp0000664000175000017500000001707312534404406017643 00000000000000/** * @file string_manip_tests.cpp * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include #include #include #include "string_manip.h" using namespace std; template struct input_output { Input input; Output output; }; template static void check_result(char const * fct_name, Input const & input, Output const & output, Result const & result) { if (result != output) { cerr << fct_name << ": \n" << "for:\n\"" << input << "\"\n" << "expect:\n\"" << output << "\"\n" << "found:\n\"" << result << "\"\n"; exit(EXIT_FAILURE); } } static input_output expect_erase[] = { { "", "" }, { ";;;", "" }, { "ab;;;cd", "cd" }, { ";;;cd", "cd" }, { "ab;;;", "" }, { 0, 0 } }; static void erase_to_last_of_tests() { input_output const * cur; for (cur = expect_erase; cur->input; ++cur) { string result = erase_to_last_of(cur->input, ';'); check_result("erase_to_last_of()", cur->input, cur->output, result); } } static input_output > expect_split[] = { #define MAKE_PAIR(a, b) make_pair(string(a), string(b)) { "ab;cd", MAKE_PAIR("ab", "cd") }, { ";cd", MAKE_PAIR("", "cd") }, { "ab;", MAKE_PAIR("ab", "") }, { "b;d", MAKE_PAIR("b", "d") }, { ";d", MAKE_PAIR("", "d") }, { "a;", MAKE_PAIR("a", "") }, { ";", MAKE_PAIR("", "") }, { "", MAKE_PAIR("", "") }, { 0, MAKE_PAIR("", "") } #undef MAKE_PAIR }; static void split_tests() { input_output > const * cur; for (cur = expect_split; cur->input; ++cur) { string temp = cur->input; string result = split(temp, ';'); check_result("split()", cur->input, cur->output.first, temp); check_result("split()", cur->input, cur->output.second, result); } } static input_output > expect_is_prefix[] = { #define MAKE_PAIR(a, b) make_pair(string(a), b) { "abcd", MAKE_PAIR("abc", true) }, { "abcd", MAKE_PAIR("ac", false) }, { "babcd", MAKE_PAIR("abc", false) }, // these invoke undefined behavior from is_prefix, we keep them // for the record. // { "babcd", MAKE_PAIR("", false) }, // { "", MAKE_PAIR("", false) }, { 0, MAKE_PAIR("", true) } #undef MAKE_PAIR }; static void is_prefix_tests() { input_output > const * cur; for (cur = expect_is_prefix; cur->input; ++cur) { bool result = is_prefix(cur->input, cur->output.first); if (result != cur->output.second) { cerr << "is_prefix(" << cur->input << ", " << cur->output.first << ") " << "return " << result << endl; exit(EXIT_FAILURE); } } } static const size_t max_token = 8; static input_output expect_separate_token[] = { { "aa", { "aa" } }, { "a\\c", { "a\\c" } }, { "a\\\\c", { "a\\\\c" } }, { "a\\\\c\\", { "a\\\\c\\" } }, { "ab;cd;ef;gh", { "ab", "cd", "ef", "gh" } }, { "ab\\;cd", { "ab;cd" } }, { "a;a", { "a", "a" } }, { ";a", { "", "a" } }, { ";", { "", "" } }, { ";;", { "", "", "" } }, { 0, { 0, } } }; static void separate_token_tests() { input_output const * cur; for (cur = expect_separate_token; cur->input; ++cur) { vector result = separate_token(cur->input, ';'); if (result.size() > max_token) { cerr << "separate_token(): too many token\n" << "input:\n" << '"' << cur->input << "\"\n" << "output\n"; copy(result.begin(), result.end(), ostream_iterator(cerr, "\n")); exit(EXIT_FAILURE); } for (size_t i = 0; i < result.size(); ++i) { if (result[i] != cur->output[i]) { cerr << "separate_token():\n" << "input:\n" << cur->input << endl; cerr << "expect:\n"; for (size_t i = 0; i < max_token; ++i) { if (!cur->output[i]) break; cerr << cur->output[i] << endl; } cerr << "output:\n"; copy(result.begin(), result.end(), ostream_iterator(cerr, "\n")); exit(EXIT_FAILURE); } } } } static input_output expect_rtrim[] = { { "abc", "abc" }, { "abc ", "abc" }, { " abc ", " abc" }, { " abc \t \t", " abc" }, { " ", "" }, { "\t \t", "" }, { "", "" }, { 0, 0 } }; static void rtrim_tests() { input_output const * cur; for (cur = expect_rtrim; cur->input; ++cur) { string result = rtrim(cur->input); check_result("rtrim()", cur->input, cur->output, result); } } static input_output expect_ltrim[] = { { "abc", "abc" }, { "abc ", "abc " }, { " abc ", "abc " }, { "\t \tabc ", "abc " }, { " ", "" }, { "\t \t", "" }, { "", "" }, { 0, 0 } }; static void ltrim_tests() { input_output const * cur; for (cur = expect_ltrim; cur->input; ++cur) { string result = ltrim(cur->input); check_result("ltrim()", cur->input, cur->output, result); } } static input_output expect_trim[] = { { "abc", "abc" }, { "abc ", "abc" }, { " abc ", "abc" }, { "\t \tabc \t", "abc" }, { " ", "" }, { "\t \t", "" }, { "", "" }, { 0, 0 } }; static void trim_tests() { input_output const * cur; for (cur = expect_trim; cur->input; ++cur) { string result = trim(cur->input); check_result("trim()", cur->input, cur->output, result); } } static input_output expect_format_percent[] = { { 2.2, " 2.2000" }, { 0, " 0" }, { 100.00, "100.000" }, { 99.99999, "100.000" }, { 0.00000344, "3.4e-06" }, // FIXME, must be 3.e-124 but output is 3.4e-124 // { 0.34e-123, "3.e-124" }, { -1.0, 0 } }; static void format_percent_tests() { input_output const * cur; for (cur = expect_format_percent; cur->input != -1.0; ++cur) { string result = format_percent(cur->input, percent_int_width, percent_fract_width); check_result("format_percent()", cur->input, cur->output, result); } } static input_output expect_from_str_to_uint[] = { { 123, "123" }, { 33, "33" }, { 0, "0" }, { 0, 0 } }; static void tostr_tests() { input_output const * cur; for (cur = expect_from_str_to_uint; cur->output; ++cur) { string result = op_lexical_cast(cur->input); check_result("op_lexical_cast()", cur->input, cur->output, result); } } static void touint_tests() { // reversed input/output of the previous tests input_output const * cur; for (cur = expect_from_str_to_uint; cur->output; ++cur) { unsigned int result = op_lexical_cast(cur->output); check_result("op_lexical_cast()", cur->output, cur->input, result); } } static input_output expect_from_str_to_bool[] = { { "0", false }, { "1", true }, { 0, 0 } }; static void tobool_tests() { input_output const * cur; for (cur = expect_from_str_to_bool; cur->input; ++cur) { bool result = op_lexical_cast(cur->input); check_result("op_lexical_cast()", cur->input, cur->output, result); } } // FIXME: more op_lexical_cast<> tests int main() { erase_to_last_of_tests(); tostr_tests(); touint_tests(); tobool_tests(); split_tests(); is_prefix_tests(); separate_token_tests(); rtrim_tests(); ltrim_tests(); trim_tests(); format_percent_tests(); return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/tests/glob_filter_tests.cpp0000664000175000017500000000210512534404406017427 00000000000000/** * @file glob_filter_tests.cpp * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #include #include #include "glob_filter.h" using namespace std; #define check(filter, str, result) \ if (filter.match(str) != result) { \ cerr << "\"" << str << "\" matched with " #filter \ << " did not return " #result << endl; \ exit(EXIT_FAILURE); \ } int main() { glob_filter f1("foo,*bar", "foobar"); check(f1, "foo/barfoobar", true); check(f1, "foo/bar", true); check(f1, "/foo/foobar/foo", false); check(f1, "fooobar1", false); check(f1, "foo1", false); check(f1, "foobar", false); check(f1, "bar1", false); glob_filter f2("foo", ""); check(f2, "foo", true); check(f2, "foo1", false); check(f2, "foo/foo", false); glob_filter f3("", "foo"); check(f3, "foo", false); check(f3, "foo1", true); check(f3, "foo/foo", true); glob_filter f4("foo", "foo"); check(f4, "foo", false); check(f4, "foo1", false); check(f4, "foo/foo", false); return EXIT_SUCCESS; } oprofile-1.3.0/libutil++/cached_value.h0000664000175000017500000000157612534404406014636 00000000000000/** * @file cached_value.h * Hold a cached value. * * @remark Copyright 2005 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #ifndef CACHED_VALUE_H #define CACHED_VALUE_H #include "op_exception.h" /** * Hold a single value, returning a cached value if there is one. */ template class cached_value { public: cached_value() : set(false) { value = T(); } typedef T value_type; /// return the cached value value_type const get() const { if (!set) throw op_fatal_error("cached value not set"); return value; } /// return true if a value is cached bool cached() const { return set; } /// set the contained value value_type const reset(value_type const & val) { value = val; set = true; return value; } private: /// the cached value value_type value; /// is the value valid? bool set; }; #endif /* !CACHED_VALUE_H */ oprofile-1.3.0/libutil++/xml_output.cpp0000664000175000017500000000244212534404406014777 00000000000000/** * @file xml_output.cpp * utility routines for writing XML * * @remark Copyright 2006 OProfile authors * @remark Read the file COPYING * * @author Dave Nomura */ #include #include #include "op_xml_out.h" #include "xml_output.h" using namespace std; #define MAX_XML_BUF 16384 static char buf[MAX_XML_BUF]; string tag_name(tag_t tag) { ostringstream out; out << xml_tag_name(tag); return out.str(); } string open_element(tag_t tag, bool with_attrs) { ostringstream out; buf[0] = '\0'; open_xml_element(tag, with_attrs, buf, MAX_XML_BUF); out << buf; return out.str(); } string close_element(tag_t tag, bool has_nested) { ostringstream out; buf[0] = '\0'; close_xml_element(tag, has_nested, buf, MAX_XML_BUF); out << buf; return out.str(); } string init_attr(tag_t attr, size_t value) { ostringstream out; buf[0] = '\0'; init_xml_int_attr(attr, value, buf, MAX_XML_BUF); out << buf; return out.str(); } string init_attr(tag_t attr, double value) { ostringstream out; buf[0] = '\0'; init_xml_dbl_attr(attr, value, buf, MAX_XML_BUF); out << buf; return out.str(); } string init_attr(tag_t attr, string const & str) { ostringstream out; buf[0] = '\0'; init_xml_str_attr(attr, str.c_str(), buf, MAX_XML_BUF); out << buf; return out.str(); } oprofile-1.3.0/libutil++/child_reader.h0000664000175000017500000000702212534404406014630 00000000000000/** * @file child_reader.h * Facility for reading from child processes * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef CHILD_READER_H #define CHILD_READER_H #include #include #include /** * a class to read stdout / stderr from a child process. * * two interfaces are provided. read line by line: getline() or read all data * in one : get_data(). In all case get_data() must be called once to flush the * stderr child output */ /* * FIXME: code review is needed: * - check the getline()/get_data()/block_read() interface. * the expected behavior is: * caller can call getline until nothing is available from the stdout of the * child. in this case child stderr is acumulated in buf2 and can be read * through get_data(). get_data() is blocking until the child close stderr / * stdout (even if the child die by a signal ?). The following corner case must * work but I'm unsure if the code reflect this behavior: the last line of the * child stdout have not necessarilly a LF terminator. the child can output any * size of data in stderr. */ class child_reader { public: /** fork a process. use error() to get error code. Do not try to * use other public member interface if error() return non-zero */ child_reader(std::string const & cmd, std::vector const & args); /** wait for the termination of the child process if this have not * already occur. In this case return code of the child process is not * available. */ ~child_reader(); /** fill result from on line of stdout of the child process. * must be used as: * child_reader reader(...); * while (reader.getline(line)) .... */ bool getline(std::string & result); /** fill out / err with the stdout / stderr of the child process. * You can call this after calling one or more time getline(...). This * call is blocking until the child die and so on all subsequent * call will fail */ bool get_data(std::ostream & out, std::ostream & err); /** rather to rely on dtor to wait for the termination of the child you * can use terminate_process() to get the return code of the child * process */ int terminate_process(); /** return the status of the first error encoutered * != 0 : something feel wrong, use error_str() to get an error * message */ int error() const { return first_error; } /** * return an error message if appropriate, if the process has * been successfully exec'ed and is not terminate the error message * is always empty. Error message is also empty if the child process * terminate successfully. Else three type of error message exist: * - "unable to fork" followed by sterror(errno) * - "process_name return xxx" xxx is return code * - "process_name terminated by signal xxx" xxx is signal number */ std::string error_str() const; private: // ctor helper: create the child process. void exec_command(std::string const & cmd, std::vector const & args); // return false when eof condition is reached on fd1. fd2 can have // already input in the pipe buffer or in buf2. bool block_read(); int fd1; int fd2; ssize_t pos1; ssize_t end1; ssize_t pos2; ssize_t end2; pid_t pid; int first_error; // child stderr is handled especially, we need to retain data even // if caller read only stdout of the child. char * buf2; ssize_t sz_buf2; char * buf1; std::string process_name; bool is_terminated; bool terminate_on_exception; bool forked; }; #endif // CHILD_READER_H oprofile-1.3.0/libutil++/stream_util.h0000664000175000017500000000137412534404406014557 00000000000000/** * @file stream_util.h * C++ stream utility * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef STREAM_UTIL_H #define STREAM_UTIL_H #include /// class which save a stream state and restore it at dtor time class io_state { public: /** * save the stream flags, precision and fill char. * * width is restored at end of expression, there is no need to save it. * tie and locale are not saved currently * * error state shouldn't be saved. */ io_state(std::ios & stream); /// restore the stream state ~io_state(); private: std::ios & stream; std::ios::fmtflags format; std::streamsize precision; char fill; }; #endif /* !STREAM_UTIL_H */ oprofile-1.3.0/libutil++/string_manip.h0000664000175000017500000000652112534404406014720 00000000000000/** * @file string_manip.h * std::string helpers * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef STRING_MANIP_H #define STRING_MANIP_H #include #include #include #include /** * @param str string * @param ch the characterto search * * erase char from the begin of str to the last * occurence of ch from and return the string */ std::string erase_to_last_of(std::string const & str, char ch); /// split string s by first occurence of char c, returning the second part. /// s is set to the first part. Neither include the split character std::string split(std::string & s, char c); /// return true if "prefix" is a prefix of "s", behavior is undefined /// if prefix is an empty string bool is_prefix(std::string const & s, std::string const & prefix); /** * @param str the string to tokenize * @param sep the separator_char * * separate fields in a string in a list of token; field are * separated by the sep character, sep char can be escaped * by '\\' to specify a sep char in a token, '\\' not followed * by a sep is taken as it e.g. "\,\a" --> ",\a" */ std::vector separate_token(std::string const & str, char sep); /// remove trim chars from start of input string return the new string std::string ltrim(std::string const & str, std::string const & totrim = "\t "); /// remove trim chars from end of input string return the new string std::string rtrim(std::string const & str, std::string const & totrim = "\t "); /// ltrim(rtrim(str)) std::string trim(std::string const & str, std::string const & totrim = "\t "); /** * format_percent - smart format of double percentage value * @param value - the value * @param int_width - the maximum integer integer width default to 2 * @param frac_width - the fractionnary width default to 4 * @param showpos - show + sign for positive values * * This formats a percentage into exactly the given width and returns * it. If the integer part is larger than the given int_width, the * returned string will be wider. The returned string is never * shorter than (fract_with + int_width + 1) * */ std::string const format_percent(double value, size_t int_width, size_t frac_width, bool showpos = false); /// prefered width to format percentage static unsigned int const percent_int_width = 2; static unsigned int const percent_fract_width = 4; static unsigned int const percent_width = percent_int_width + percent_fract_width + 1; /** * @param src input parameter * convert From src to a T through an istringstream. * * Throws invalid_argument if conversion fail. * * Note that this is not as foolproof as boost's lexical_cast */ template To op_lexical_cast(From const & src) { std::ostringstream in; if (!(in << src)) throw std::invalid_argument("op_lexical_cast()"); std::istringstream out(in.str()); To value; if (!(out >> value)) { throw std::invalid_argument("op_lexical_cast(\"" + in.str() +"\")"); } return value; } // specialization accepting hexadecimal and octal number in input. Note that // op_lexical_cast("0x23"); will fail because it call the // non specialized template. template <> unsigned int op_lexical_cast(std::string const & str); #endif /* !STRING_MANIP_H */ oprofile-1.3.0/libutil++/op_bfd.h0000664000175000017500000002466712534404406013472 00000000000000/** * @file op_bfd.h * Encapsulation of bfd objects * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef OP_BFD_H #define OP_BFD_H #include "config.h" #include #include #include #include #include #include "bfd_support.h" #include "locate_images.h" #include "utility.h" #include "cached_value.h" #include "op_types.h" class op_bfd; class string_filter; class extra_images; /// all symbol vector indexing uses this type typedef size_t symbol_index_t; /** * A symbol description from a bfd point of view. This duplicate * information pointed by an asymbol, we need this duplication in case * the symbol is an artificial symbol */ class op_bfd_symbol { public: /// ctor for real symbols op_bfd_symbol(asymbol const * a); /// ctor for artificial symbols op_bfd_symbol(bfd_vma vma, size_t size, std::string const & name); bfd_vma vma() const { return symb_value + section_vma; } unsigned long value() const { return symb_value; } unsigned long filepos() const { return symb_value + section_filepos; } unsigned long symbol_endpos(void) const; asection const * section(void) const { return bfd_symbol->section; } std::string const & name() const { return symb_name; } asymbol const * symbol() const { return bfd_symbol; } size_t size() const { return symb_size; } void size(size_t s) { symb_size = s; } bool hidden() const { return symb_hidden; } bool weak() const { return symb_weak; } bool artificial() const { return symb_artificial; } /// compare two symbols by their filepos() bool operator<(op_bfd_symbol const & lhs) const; private: /// the original bfd symbol, this can be null if the symbol is an /// artificial symbol asymbol const * bfd_symbol; /// the offset of this symbol relative to the begin of the section's /// symbol unsigned long symb_value; /// the section filepos for this symbol unsigned long section_filepos; /// the section vma for this symbol bfd_vma section_vma; /// the size of this symbol size_t symb_size; /// the name of the symbol std::string symb_name; /// normally not externally visible symbol bool symb_hidden; /// whether other symbols can override it bool symb_weak; /// symbol is artificially created bool symb_artificial; /// code bytes corresponding to symbol -- used for XML generation std::string symb_bytes; }; /** * Encapsulation of a bfd object. Simplifies open/close of bfd, enumerating * symbols and retrieving informations for symbols or vma. * * Use of this class relies on a std::ostream cverb */ class op_bfd { public: /** * @param filename the name of the image file * @param symbol_filter filter to apply to symbols * @param extra_images container where all extra candidate filenames * are stored * @param ok in-out parameter: on in, if not set, don't * open the bfd (because it's not there or whatever). On out, * it's set to false if the bfd couldn't be loaded. */ op_bfd(std::string const & filename, string_filter const & symbol_filter, extra_images const & extra_images, bool & ok); /** * This constructor is used when the /proc/kallsyms file is used * to get the kernel symbols. */ op_bfd(std::string const & filename, extra_images const & extra_images); /// close an opened bfd image and free all related resources ~op_bfd(); /** * @param sym_idx index of the symbol * @param offset fentry number * @param filename output parameter to store filename * @param linenr output parameter to store linenr. * * Retrieve the relevant finename:linenr information for the sym_idx * at offset. If the lookup fails, return false. In some cases this * function can retrieve the filename and return true but fail to * retrieve the linenr and so can return zero in linenr */ bool get_linenr(symbol_index_t sym_idx, bfd_vma offset, std::string & filename, unsigned int & linenr) const; /** * @param sym_idx symbol index * @param start reference to start var * @param end reference to end var * * Calculates the range of sample file entries covered by sym. start * and end will be filled in appropriately. If index is the last entry * in symbol table, all entries up to the end of the sample file will * be used. After calculating start and end they are sanitized * * All errors are fatal. */ void get_symbol_range(symbol_index_t sym_idx, unsigned long long & start, unsigned long long & end) const; /** * @param start reference to the start vma * @param end reference to the end vma * * return in start, end the vma range for this binary object. */ void get_vma_range(bfd_vma & start, bfd_vma & end) const; /** return the relocated PC value for the given file offset */ bfd_vma offset_to_pc(bfd_vma offset) const; /** * If passed 0, return the file position of the .text section. * Otherwise, return the filepos of a section with a matching * vma. */ unsigned long get_start_offset(bfd_vma vma = 0) const; /** * Return the image name of the underlying binary image. For an * archive, this returns the path *within* the archive, not the * full path of the file. */ std::string get_filename() const; /// sorted vector by vma of interesting symbol. std::vector syms; /// return in bits the bfd_vma size for this binary. This is needed /// because gprof output depend on the bfd_vma for *this* binary /// and do not depend on sizeof(bfd_vma) size_t bfd_arch_bits_per_address() const; /// return true if binary contain some debug information bool has_debug_info() const; /** * @param sym_idx symbol index * * Return true or false, indicating whether or not the * symbol referenced by the passed sym_idx has code available. * Some symbols have no code associated with them; for example, * artificial symbols created for anonymous memory samples or for * stripped binaries with no symbol debug info. Additionally, * if the bfd object associated with the symbol is not valid, * this function will also return false. * * NOTE: This call should be made prior to invoking * get_symbol_contents to avoid unnecessarily allocating * memory for the symbol contents. */ bool symbol_has_contents(symbol_index_t sym_idx); bool get_symbol_contents(symbol_index_t sym_index, unsigned char * contents) const; bool valid() const { return ibfd.valid(); } bfd_vma get_vma_adj(void) const { return vma_adj; } private: /// temporary container type for getting symbols typedef std::list symbols_found_t; /** * Parse and sort in ascending order all symbols * in the file pointed to by abfd that reside in * a %SEC_CODE section. * * The symbols are filtered through * the interesting_symbol() predicate and sorted * with op_bfd_symbol::operator<() comparator. */ void get_symbols(symbols_found_t & symbols); /* functions for reading kallsyms */ void get_kallsym_symbols(symbols_found_t & symbols, std::ifstream& infile); /** * Helper function for get_symbols. * Populates bfd_syms and extracts the "interesting_symbol"s. */ void get_symbols_from_file(bfd_info & bfd, size_t start, op_bfd::symbols_found_t & symbols, bool debug_file); /** * Add the symbols in the binary, applying filtering, * and handling artificial symbols. */ void add_symbols(symbols_found_t & symbols, string_filter const & symbol_filter); /** * symbol_size - return the size of a symbol * @param sym symbol to get size * @param next next symbol in vma order if any */ size_t symbol_size(op_bfd_symbol const & sym, op_bfd_symbol const * next) const; /// create an artificial symbol for a symbolless binary op_bfd_symbol const create_artificial_symbol(); /* Generate symbols using bfd functions for * the image file associated with the ibfd arg. */ uint process_symtab(bfd_info * bfd, uint start); /// filename we open (not including archive path) std::string filename; /// path to archive std::string archive_path; /// reference to extra_images extra_images const & extra_found_images; /// file size in bytes off_t file_size; /// corresponding debug file name mutable std::string debug_filename; /// true if at least one section has (flags & SEC_DEBUGGING) != 0 mutable cached_value debug_info; /// our main bfd object: .bfd may be NULL bfd_info ibfd; // corresponding debug bfd object, if one is found mutable bfd_info dbfd; /// sections we will avoid to use symbol from, this is needed /// because elf file allows sections with identical vma and we can't /// allow overlapping symbols. Such elf layout is used actually by /// kernel modules where all code section vma are set to 0. std::vector filtered_section; typedef std::map filepos_map_t; // mapping of section names to filepos in the original binary filepos_map_t filepos_map; bool anon_obj; /** * If a runtime binary is prelinked, then its p_vaddr field in the * first PT_LOAD segment will give the address where the binary will * be loaded into memory. However, the corresponding debuginfo file * may have a different p_vaddr value. In profile_container::add_samples, * this difference is handled by adding the "base_vma" to the sample * vma. However, if the runtime binary has no symbol information at all, * then the "base_vma" is obtained from the debuginfo symbol information. * For opreport, this works OK, since under such conditions, ALL symbol * and debug data is then obtained from the debuginfo files, and the sample * vma's should match up fine with the symbol vma's in the debuginfo file. * But when doing 'opannoate --assembly', the real (runtime) image is used for * annotation, and, thus, we may have a mis-match between real image p_vaddr * and the impliled p_vaddr stored with the samples. To handle this case, * we do the following: When a bfd_info is created for a debuginfo * file, we set vma_adj to the difference between runtime load address * and the p_vaddr of the first PT_LOAD segment of the debuginfo file, if and * only if the real image has no symbol info; otherwise vma_adj is set to 0. */ bfd_vma vma_adj; /** * The file descriptor for an image file that we pass to fdopen_bfd must be kept * open through the life of the op_bfd to enable proper behavior of certain * BFD functions -- in particular, bfd_find_nearest_line(). */ int fd; }; #endif /* !OP_BFD_H */ oprofile-1.3.0/libutil++/generic_spec.h0000664000175000017500000000401012534404406014643 00000000000000/** * @file generic_spec.h * Container holding an item or a special "match all" item * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #ifndef GENERIC_SPEC_H #define GENERIC_SPEC_H #include #include #include #include "string_manip.h" /** * used to hold something like { int cpu_nr, bool is_all }; * to store a sub part of a samples filename see PP:3.21. */ template class generic_spec { public: /** * build a default spec which match anything */ generic_spec(); /// build a spec from a string, valid argument are "all" /// or a string convertible to T through istringtream(str) >> data /// conversion is strict, no space are allowed at begin or end of str void set(std::string const &); /// return true if a specific value is held by this container bool is_set() const { return !is_all; } /// return the specific value (only if is_set() == true) T const value() const { if (!is_all) return data; throw std::out_of_range("generic_spec holds no value"); } /// return true if rhs match this spec. Sub part of PP:3.24 bool match(T const & rhs) const { return rhs == data; } /// return true if rhs match this spec. Sub part of PP:3.24 bool match(generic_spec const & rhs) const { return is_all || rhs.is_all || rhs.data == data; } private: T data; bool is_all; }; template generic_spec::generic_spec() : data(T()), is_all(true) { } template void generic_spec::set(std::string const & str) { if (str == "all") { is_all = true; return; } is_all = false; data = op_lexical_cast(str); } /// We don't use generic_spec, since it's probably an error to try /// to use generic_spec we specialize but don't define it to get a /// link error (using generic_spec is problematic because g.set("all") /// is ambiguous) template <> void generic_spec::set(std::string const & str); #endif /* !GENERIC_SPEC_H */ oprofile-1.3.0/libutil++/unique_storage.h0000664000175000017500000000425012534404406015255 00000000000000/** * @file unique_storage.h * Unique storage of values * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef UNIQUE_STORAGE_H #define UNIQUE_STORAGE_H #include #include #include /** * Store values such that only one copy of the value * is ever stored. * * I is an arbitrary typename that's never * used. * * It is a required parameter in order to enforce * type-safety for a collection. * * The value type "V" must be default-constructible, * and this is the value returned by a stored id_value * where .set() is false */ template class unique_storage { public: unique_storage() { // id 0 values.push_back(V()); } virtual ~unique_storage() {} typedef std::vector stored_values; /// the actual ID type struct id_value { /// id == 0 means "empty" / "undefined" id_value() : id(0) {} /// does this ID map to a non-default value ? bool set() const { return id; } bool operator<(id_value const & rhs) const { return id < rhs.id; } bool operator==(id_value const & rhs) const { return id == rhs.id; } bool operator!=(id_value const & rhs) const { return !(id == rhs.id); } private: friend class unique_storage; typedef typename stored_values::size_type size_type; explicit id_value(size_type s) : id(s) {} /// actual ID value size_type id; }; /// ensure this value is available id_value const create(V const & value) { typename id_map::value_type val(value, id_value(values.size())); std::pair inserted = ids.insert(val); if (inserted.second) values.push_back(value); return inserted.first->second; } /// return the stored value for the given ID V const & get(id_value const & id) const { // some stl lack at(), so we emulate it if (id.id < values.size()) return values[id.id]; throw std::out_of_range("unique_storage::get(): out of bounds"); } private: typedef std::map id_map; /// the contained values stored_values values; /// map from ID to value id_map ids; }; #endif /* !UNIQUE_STORAGE_H */ oprofile-1.3.0/libutil++/bfd_support.h0000664000175000017500000001114312534404406014551 00000000000000/** * @file bfd_support.h * BFD muck we have to deal with. * * @remark Copyright 2005 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #ifndef BFD_SUPPORT_H #define BFD_SUPPORT_H #include "config.h" #include "utility.h" #include "op_types.h" #include "locate_images.h" #include #include #include #include class op_bfd_symbol; /// holder for BFD state we must keep struct bfd_info { bfd_info() : abfd(0), nr_syms(0), synth_syms(0), image_bfd_info(0) {} ~bfd_info(); /// close the BFD, setting abfd to NULL void close(); /// return true if BFD is readable bool valid() const { return abfd; } /* return true if the BFD is a pseudo file. A pseudo BFD file is used * when the kernel symbols are obtained from /proc/kallsyms rather * then vmlinux. */ bool is_pseudo_bfd() const { return (abfd == ((bfd *) 1)); } /// return true if BFD has debug info bool has_debug_info() const; /// pick out the symbols from the bfd, if we can void get_symbols(); /// the actual BFD bfd * abfd; /// normal symbols (includes synthesized symbols) scoped_array syms; /// nr. symbols size_t nr_syms; void set_image_bfd_info(bfd_info * ibfd) { image_bfd_info = ibfd; } bfd_info * get_image_bfd_info(void) const { return image_bfd_info; } private: /** * Acquire the synthetic symbols if we need to. */ bool get_synth_symbols(); /** * On PPC64, synth_syms points to an array of synthetic asymbol * structs returned from bfd_get_synthetic_symtab. The syms * member points into this array, so we have to keep it around * until ~bfd_info time. */ asymbol * synth_syms; /** * Under certain circumstances, correct handling of the bfd for a * debuginfo file is not possible without access to the bfd for * the actual image file. The image_bfd_info field provides access to * that bfd when this bfd_info is for a debuginfo file; otherwise * image_bfd_info is NULL. */ bfd_info * image_bfd_info; #if SYNTHESIZE_SYMBOLS /** * This function is used only for ppc64 binaries. It uses the runtime * image BFD (accessed through image_bfd_info) as needed when processing * debuginfo files. */ void translate_debuginfo_syms(asymbol ** dbg_syms, long nr_dbg_syms); /** * This map is used to cache section VMAs during translate_debuginfo_syms * so they can be restored later. */ std::map section_vma_maps; #endif }; /* * find_separate_debug_file - return true if a valid separate debug file found * @param ibfd binary file * @param dir_in directory holding the binary file * @param global_in * @param filename path to valid debug file * * Search order for debug file and use first one found: * 1) dir_in directory * 2) dir_in/.debug directory * 3) global_in/dir_in directory * * Newer binutils and Linux distributions (e.g. Fedora) allow the * creation of debug files that are separate from the binary. The * debugging information is stripped out of the binary file, placed in * this separate file, and a link to the new file is placed in the * binary. The debug files hold the information needed by the debugger * (and OProfile) to map machine instructions back to source code. */ extern bool find_separate_debug_file(bfd * ibfd, std::string const & filepath_in, std::string & debug_filename, extra_images const & extra); /// open the given BFD bfd * open_bfd(std::string const & file); /// open the given BFD from the fd bfd * fdopen_bfd(std::string const & file, int fd); /// Return true if the symbol is worth looking at bool interesting_symbol(asymbol * sym); /** * return true if the first symbol is less interesting than the second symbol * boring symbol are eliminated when multiple symbol exist at the same vma */ bool boring_symbol(op_bfd_symbol const & first, op_bfd_symbol const & second); /// debug info for a given pc struct linenr_info { /// did we find something? bool found; /// filename std::string filename; /// line number unsigned int line; }; /** * Attempt to locate a filename + line number for the given symbol and * offset. * * The bfd object is either the object associated with the binary or the * once associated with the separated debug info file so find_nearest_line() * can't lookup the section contents of code section etc. The filepos of * debuginfo symbols are different from the original file but we fixed symbol * filepos earlier. */ linenr_info const find_nearest_line(bfd_info const & ibfd, op_bfd_symbol const & sym, bfd_vma offset, bool anon_obj); #endif /* !BFD_SUPPORT_H */ oprofile-1.3.0/libutil++/file_manip.h0000664000175000017500000000474312534404406014335 00000000000000/** * @file file_manip.h * Useful file management helpers * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef FILE_MANIP_H #define FILE_MANIP_H #include #include /** * copy_file - copy a file. * @param source filename to copy from * @param destination filename to copy into * * the last modification time of the source file is preserved, file attribute * and owner are preserved if possible. Return true if copying successful. */ bool copy_file(std::string const & source, std::string const & destination); /// return true if dir is an existing directory bool is_directory(std::string const & dirname); /** * is_file_identical - check for identical files * @param file1 first filename * @param file2 second filename * * return true if the two filenames belong to the same file */ bool is_files_identical(std::string const & file1, std::string const & file2); /** * op_realpath - resolve symlinks etc. * Resolve a path as much as possible. Accounts for relative * paths (from cwd), ".." and ".". For success, the target * file must exist ! * * Resolve a symbolic link as far as possible. * Returns the original string on failure. */ std::string const op_realpath(std::string const & name); /// return true if the given file is readable bool op_file_readable(std::string const & file); /** * @param file_list where to store result * @param base_dir directory from where lookup start * @param filter a filename filter * @param recursive if true lookup in sub-directory * * create a filelist under base_dir, filtered by filter and optionally * looking in sub-directory. If we look in sub-directory only sub-directory * which match filter are traversed. */ bool create_file_list(std::list & file_list, std::string const & base_dir, std::string const & filter = "*", bool recursive = false); /** * op_dirname - get the path component of a filename * @param file_name filename * * Returns the path name of a filename with trailing '/' removed. */ std::string op_dirname(std::string const & file_name); /** * op_basename - get the basename of a path * @param path_name path * * Returns the basename of a path with trailing '/' removed. * * Always use this instead of the C basename() - header order * can affect behaviour for basename("/") */ std::string op_basename(std::string const & path_name); #endif /* !FILE_MANIP_H */ oprofile-1.3.0/libutil++/string_manip.cpp0000664000175000017500000000553412534404406015256 00000000000000/** * @file string_manip.cpp * std::string helpers * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include "string_manip.h" using namespace std; string erase_to_last_of(string const & str, char ch) { string result = str; string::size_type pos = result.find_last_of(ch); if (pos != string::npos) result.erase(0, pos + 1); return result; } string split(string & s, char c) { string::size_type i = s.find_first_of(c); if (i == string::npos) return string(); string const tail = s.substr(i + 1); s = s.substr(0, i); return tail; } bool is_prefix(string const & s, string const & prefix) { // gcc 2.95 and below don't have this // return s.compare(0, prefix.length(), prefix) == 0; return s.find(prefix) == 0; } vector separate_token(string const & str, char sep) { vector result; string next; for (size_t pos = 0 ; pos != str.length() ; ++pos) { char ch = str[pos]; if (ch == '\\') { if (pos < str.length() - 1 && str[pos + 1] == sep) { ++pos; next += sep; } else { next += '\\'; } } else if (ch == sep) { result.push_back(next); // some stl lacks string::clear() next.erase(next.begin(), next.end()); } else { next += ch; } } if (!next.empty()) result.push_back(next); return result; } string ltrim(string const & str, string const & totrim) { string result(str); return result.erase(0, result.find_first_not_of(totrim)); } string rtrim(string const & str, string const & totrim) { string result(str); return result.erase(result.find_last_not_of(totrim) + 1); } string trim(string const & str, string const & totrim) { return rtrim(ltrim(str, totrim), totrim); } string const format_percent(double value, size_t int_width, size_t fract_width, bool showpos) { ostringstream os; if (value == 0.0) return string(int_width + fract_width, ' ') + "0"; if (showpos) os.setf(ios::showpos); if (fabs(value) > .001) { // os << fixed << value unsupported by gcc 2.95 os.setf(ios::fixed, ios::floatfield); os << setw(int_width + fract_width + 1) << setprecision(fract_width) << value; } else { // os << scientific << value unsupported by gcc 2.95 os.setf(ios::scientific, ios::floatfield); os << setw(int_width + fract_width + 1) // - 3 to count exponent part << setprecision(fract_width - 3) << value; } string formatted = os.str(); if (is_prefix(formatted, "100.")) formatted.erase(formatted.size() - 1); return formatted; } template <> unsigned int op_lexical_cast(string const & str) { char* endptr; // 2.91.66 fix unsigned long ret = 0; ret = strtoul(str.c_str(), &endptr, 0); if (*endptr) throw invalid_argument("op_lexical_cast(\""+ str +"\")"); return ret; } oprofile-1.3.0/libutil++/stream_util.cpp0000664000175000017500000000072712534404406015113 00000000000000/** * @file stream_util.cpp * C++ stream utility * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include "stream_util.h" using namespace std; io_state::io_state(ios & stream_) : stream(stream_), format(stream.flags()), precision(stream.precision()), fill(stream.fill()) { } io_state::~io_state() { stream.flags(format); stream.precision(precision); stream.fill(fill); } oprofile-1.3.0/libutil++/cverb.h0000664000175000017500000000446112534404406013330 00000000000000/** * @file cverb.h * verbose output stream * * @remark Copyright 2002, 2004 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef CVERB_H #define CVERB_H #include #include #include struct cverb_object { }; /** * verbose object, all output through this stream are made only * if a verbose object with a true state is injected in the stream. */ extern cverb_object cverb; /** * typical use: * declare some verbose global object: * verbose debug("debug"); * verbose stats("stats"); * verbose level2("level2"); * * setup from command line the state of these objects * * verbose::setup(command_line_args_to'--verbose='); * * cverb << stats << "stats\n"; * cverb << (stats&level2) << "very verbose stats\n" * cverb << (stats|debug) << "bar\n"; * these will give a compile time error * cverb << stats << "foo" << debug << "bar"; * cout << stats << "foo"; * * In critical code path cverb can be used in the more efficient way: * if (cverb << vdebug) * cverb << vdebug << "foo" << "bar"; * the condition test the fails bit for the returned stream while the later * build a sentry object for each << (more efficient even with one level of <<) */ class verbose { /// The returned stream is either a null stream or cout. friend std::ostream & operator<<(cverb_object &, verbose const &); public: /** * create a verbose object named name, the ctor auto-register name * as a verbose object, the set state can be intialized through * verbose::setup(name) */ verbose(char const * name); verbose operator|(verbose const &); verbose operator&(verbose const &); /// Return false if this named verbose object has not be registred. static bool setup(std::string const &); /// convenient interface calling the above for string in args static bool setup(std::vector const & args); private: bool set; }; /** * predefined general purpose verbose object, comment give their names */ extern verbose vlevel1; /**< named "level1" */ extern verbose vdebug; /**< named "debug" */ extern verbose vstats; /**< named "stats" */ extern verbose vxml; /**< named "xml" */ // all sample filename manipulation. extern verbose vsfile; /**< named "sfile" */ extern verbose varcs; /**< named "arcs" */ #endif /* !CVERB_H */ oprofile-1.3.0/libutil++/file_manip.cpp0000664000175000017500000000700312534404406014660 00000000000000/** * @file file_manip.cpp * Useful file management helpers * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include #include #include #include #include #include #include #include #include #include #include "op_file.h" #include "file_manip.h" #include "string_manip.h" using namespace std; bool copy_file(string const & source, string const & destination) { struct stat buf; if (stat(source.c_str(), &buf)) return false; if (!op_file_readable(source)) return false; ifstream in(source.c_str()); if (!in) return false; mode_t mode = buf.st_mode & ~S_IFMT; if (!(mode & S_IWUSR)) mode |= S_IWUSR; int fd = open(destination.c_str(), O_RDWR|O_CREAT, mode); if (fd < 0) return false; close(fd); // ignore error here: a simple user can copy a root.root 744 file // but can't chown the copied file to root. // a scope to ensure out is closed before changing is mtime/atime { ofstream out(destination.c_str(), ios::trunc); if (!out) return false; out << in.rdbuf(); } struct utimbuf utim; utim.actime = buf.st_atime; utim.modtime = buf.st_mtime; if (utime(destination.c_str(), &utim)) return false; return true; } bool is_directory(string const & dirname) { struct stat st; return !stat(dirname.c_str(), &st) && S_ISDIR(st.st_mode); } bool is_files_identical(string const & file1, string const & file2) { struct stat st1; struct stat st2; if (stat(file1.c_str(), &st1) == 0 && stat(file2.c_str(), &st2) == 0) { if (st1.st_dev == st2.st_dev && st1.st_ino == st2.st_ino) return true; } return false; } string const op_realpath(string const & name) { static char tmp[PATH_MAX]; if (!realpath(name.c_str(), tmp)) return name; return string(tmp); } bool op_file_readable(string const & file) { return op_file_readable(file.c_str()); } static void get_pathname(const char * pathname, void * name_list) { list * file_list = (list *)name_list; file_list->push_back(pathname); } bool create_file_list(list & file_list, string const & base_dir, string const & filter, bool recursive) { return !get_matching_pathnames(&file_list, get_pathname, base_dir.c_str(), filter.c_str(), recursive ? MATCH_ANY_ENTRY_RECURSION : NO_RECURSION) ? true : false; } /** * @param path_name the path where we remove trailing '/' * * erase all trailing '/' in path_name except if the last '/' is at pos 0 */ static string erase_trailing_path_separator(string const & path_name) { string result(path_name); while (result.length() > 1) { if (result[result.length() - 1] != '/') break; result.erase(result.length() - 1, 1); } return result; } string op_dirname(string const & file_name) { string result = erase_trailing_path_separator(file_name); if (result.find_first_of('/') == string::npos) return "."; // catch result == "/" if (result.length() == 1) return result; size_t pos = result.find_last_of('/'); // "/usr" must return "/" if (pos == 0) pos = 1; result.erase(pos, result.length() - pos); // "////usr" must return "/" return erase_trailing_path_separator(result); } string op_basename(string const & path_name) { string result = erase_trailing_path_separator(path_name); // catch result == "/" if (result.length() == 1) return result; return erase_to_last_of(result, '/'); } oprofile-1.3.0/libutil++/op_exception.h0000664000175000017500000000256412534404406014725 00000000000000/** * @file op_exception.h * exception base class * * This provide simple base class for exception object. All * exception are derived from directly or indirectly from * std::exception. This class are not itended to be catched * in your code except at top level, derive what you want * and catch derived class rather. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef OP_EXCEPTION_H #define OP_EXCEPTION_H #include #include /** * exception abstract base class */ class op_exception : public std::exception { public: explicit op_exception(std::string const& msg); ~op_exception() throw() = 0; char const * what() const throw(); private: std::string message; }; /** * fatal exception, never catch it except at top level (likely main or * gui). Intended to replace cerr << "blah"; exit(EXIT_FAILURE); by a * throw op_fatal_error("blah") when returning error code is not an option */ struct op_fatal_error : op_exception { explicit op_fatal_error(std::string const & msg); }; /** * Encapsulate a runtime error with or w/o a valid errno */ struct op_runtime_error : std::runtime_error { explicit op_runtime_error(std::string const & err); op_runtime_error(std::string const & err, int cerrno); ~op_runtime_error() throw(); }; #endif /* !OP_EXCEPTION_H */ oprofile-1.3.0/libutil++/op_exception.cpp0000664000175000017500000000142412534404406015252 00000000000000/** * @file op_exception.cpp * exception base class * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include "op_exception.h" using namespace std; op_exception::op_exception(string const & msg) : message(msg) { } op_exception::~op_exception() throw() { } char const * op_exception::what() const throw() { return message.c_str(); } op_fatal_error::op_fatal_error(string const & msg) : op_exception(msg) { } op_runtime_error::op_runtime_error(string const & msg) : runtime_error(msg) { } op_runtime_error::op_runtime_error(string const & msg, int cerrno) : runtime_error(msg + "\ncause: " + strerror(cerrno)) { } op_runtime_error::~op_runtime_error() throw() { } oprofile-1.3.0/README0000664000175000017500000000352412534404406011143 00000000000000OProfile provides a low-overhead profiler (operf) capable of both single-application profiling and system-wide profiling. There is also a simple event counting tool (ocount). You can find some documentation in the doc/ directory. Please visit the oprofile website at : http://oprofile.sf.net/ oprofile was originally written by John Levon and Philippe Elie . The operf and ocount tools were developed by Maynard Johnson , who is the current maintainer. Dave Jones provided bug fixes and support for the AMD Athlon, and AMD Hammer families of CPUs. Suravee.Suthikulpanit@amd.com contributed various AMD-related patches, including Instruction-Based-Sampling support (available only in pre-1.0 releases). Bob Montgomery provided bug fixes, the initial RTC driver and the initial ia64 driver. Will Cohen integrated the ia64 driver into the oprofile release, and contributed bug fixes and several cleanups. Will Deacon has contributed patches as well as his time to support the ARM architecture. Graydon Hoare provided P4 port, bug fixes and cleanups. Ralf Baechle provided the MIPS port. Other contributors can be seen via 'git log'. Building -------- Please read the installation instructions in doc/oprofile.html or http://oprofile.sourceforge.net/doc/install.html. Only 2.6 kernels (or later) are supported. Quick start : (If using git: ./autogen.sh first. You need automake 1.5 or higher. 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pid_t pid ; #endif static void usage(void) { fprintf(stderr, "usage: op-check-perfevents [OPTION]\n"); fprintf(stderr, "\t-h, --help\t\tPrint this help message\n"); fprintf(stderr, "\t-v, --verbose\t\tPrint errno value of perf_event_open syscall\n"); } int main(int argc, char **argv) { int _verbose = 0; if (argc > 1) { if ((!strcmp(argv[1], "-h")) || (!strcmp(argv[1], "--help"))) { usage(); return 0; } else if ((!strcmp(argv[1], "-v")) || (!strcmp(argv[1], "--verbose"))) { _verbose = 1; } else { usage(); return -1; } } #if HAVE_PERF_EVENTS /* Even if the perf_event_open syscall is implemented, the architecture may still * not provide a full implementation of the perf_events subsystem, in which case, * the syscall below will fail with ENOSYS (38). If the perf_events subsystem is * implemented for the architecture, but the processor type on which this * program is running is not supported by perf_events, the syscall returns * ENOENT (2). */ memset(&attr, 0, sizeof(attr)); attr.size = sizeof(attr); attr.sample_type = PERF_SAMPLE_IP; pid = getpid(); syscall(__NR_perf_event_open, &attr, pid, 0, -1, 0); if (_verbose) fprintf(stderr, "perf_event_open syscall returned %s\n", strerror(errno)); return errno; #else if (_verbose) fprintf(stderr, "perf_events is not available on this system\n"); return -1; #endif } oprofile-1.3.0/utils/ophelp.c0000664000175000017500000005216113323173300013050 00000000000000/** * @file ophelp.c * Print out PMC event information * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon * @author Philippe Elie */ #define _GNU_SOURCE #include #include #include #include #include "op_version.h" #include "op_events.h" #include "op_popt.h" #include "op_cpufreq.h" #include "op_hw_config.h" #include "op_string.h" #include "op_alloc_counter.h" #include "op_parse_event.h" #include "op_libiberty.h" #include "op_xml_events.h" static char const ** chosen_events; static int num_chosen_events; struct parsed_event * parsed_events; static op_cpu cpu_type = CPU_NO_GOOD; static char * cpu_string; static int callgraph_depth; static int want_xml; static int ignore_count; static poptContext optcon; /// return the Hamming weight (number of set bits) static size_t hweight(size_t mask) { size_t count = 0; while (mask) { mask &= mask - 1; count++; } return count; } #define LINE_LEN 999 static void word_wrap(int indent, int *column, char *msg) { while (*msg) { int wlen = strcspn(msg, " "); if (*column + wlen > LINE_LEN) { printf("\n%*s", indent, ""); *column = indent; } printf("%.*s", wlen, msg); *column += wlen + 1; msg += wlen; wlen = strspn(msg, " "); msg += wlen; if (wlen != 0) putchar(' '); } } /** * help_for_event - output event name and description * @param i event number * * output an help string for the event @i */ static void help_for_event(struct op_event * event) { int column; uint i, j; uint mask; size_t nr_counters; char buf[32]; nr_counters = op_get_nr_counters(cpu_type); /* Sanity check */ if (!event) return; printf("%s", event->name); if(event->counter_mask != 0) { printf(": (counter: "); mask = event->counter_mask; if (hweight(mask) == nr_counters) { printf("all"); } else { for (i = 0; i < CHAR_BIT * sizeof(event->counter_mask); ++i) { if (mask & (1 << i)) { printf("%d", i); mask &= ~(1 << i); if (mask) printf(", "); } } } } else if (event->ext != NULL) { /* Handling extended feature interface */ printf(": (ext: %s", event->ext); } else { /* Handling arch_perfmon case */ printf(": (counter: all"); } printf(")\n\t"); column = 8; word_wrap(8, &column, event->desc); snprintf(buf, sizeof buf, " (min count: %d)", event->min_count); word_wrap(8, &column, buf); putchar('\n'); if (strcmp(event->unit->name, "zero")) { if (event->unit->default_mask_name) { printf("\tUnit masks (default %s)\n", event->unit->default_mask_name); } else { printf("\tUnit masks (default 0x%x)\n", event->unit->default_mask); } printf("\t----------\n"); for (j = 0; j < event->unit->num; j++) { printf("\t0x%.2x: ", event->unit->um[j].value); column = 14; /* Named mask */ if (event->unit->um[j].name) { word_wrap(14, &column, "(name="); word_wrap(14, &column, event->unit->um[j].name); word_wrap(14, &column, ") "); } word_wrap(14, &column, event->unit->um[j].desc); putchar('\n'); } } } static void check_event(struct parsed_event * pev, struct op_event const * event) { int ret; int min_count; int const callgraph_min_count_scale = 15; if (!event) { event = find_event_by_name(pev->name, 0, 0); if (event) fprintf(stderr, "Invalid unit mask %x for event %s\n", pev->unit_mask, pev->name); else fprintf(stderr, "No event named %s is available.\n", pev->name); exit(EXIT_FAILURE); } op_resolve_unit_mask(pev, NULL); // If a named UM is passed, op_resolve_unit_mask will resolve that into a // valid unit mask, so we don't need to call op_check_events. if (pev->unit_mask_name) ret = 0; else ret = op_check_events(pev->name, 0, event->val, pev->unit_mask, cpu_type); if (ret & OP_INVALID_UM) { fprintf(stderr, "Invalid unit mask 0x%x for event %s\n", pev->unit_mask, pev->name); exit(EXIT_FAILURE); } min_count = event->min_count; if (callgraph_depth) min_count *= callgraph_min_count_scale; if (!ignore_count && pev->count < min_count) { fprintf(stderr, "Count %d for event %s is below the " "minimum %d\n", pev->count, pev->name, min_count); exit(EXIT_FAILURE); } } static void resolve_events(void) { size_t count, count_events; size_t i, j; size_t * counter_map; size_t nr_counters = op_get_nr_counters(cpu_type); struct op_event const * selected_events[num_chosen_events]; count = parse_events(parsed_events, num_chosen_events, chosen_events, ignore_count ? 0 : 1); for (i = 0; i < count; ++i) { op_resolve_unit_mask(&parsed_events[i], NULL); for (j = i + 1; j < count; ++j) { struct parsed_event * pev1 = &parsed_events[i]; struct parsed_event * pev2 = &parsed_events[j]; if (!strcmp(pev1->name, pev2->name) && pev1->count == pev2->count && pev1->unit_mask == pev2->unit_mask && pev1->kernel == pev2->kernel && pev1->user == pev2->user) { fprintf(stderr, "All events must be distinct.\n"); exit(EXIT_FAILURE); } } } for (i = 0, count_events = 0; i < count; ++i) { struct parsed_event * pev = &parsed_events[i]; /* For 0 unit mask always do wild card match */ selected_events[i] = find_event_by_name(pev->name, pev->unit_mask, pev->unit_mask ? pev->unit_mask_valid : 0); check_event(pev, selected_events[i]); if (selected_events[i]->ext == NULL) { count_events++; } } if (count_events > nr_counters) { fprintf(stderr, "Not enough hardware counters. " "Need %lu counters but only has %lu.\n", (unsigned long) count_events, (unsigned long) nr_counters); exit(EXIT_FAILURE); } counter_map = map_event_to_counter(selected_events, count, cpu_type); if (!counter_map) { fprintf(stderr, "Couldn't allocate hardware counters for the selected events.\n"); exit(EXIT_FAILURE); } for (i = 0; i < count; ++i) if(counter_map[i] == (size_t)-1) if (selected_events[i]->ext != NULL) printf("%s ", (char*) selected_events[i]->ext); else printf("N/A "); else printf("%d ", (unsigned int) counter_map[i]); printf("\n"); free(counter_map); } static void show_unit_mask(void) { size_t count; count = parse_events(parsed_events, num_chosen_events, chosen_events, ignore_count ? 0 : 1); if (count > 1) { fprintf(stderr, "More than one event specified.\n"); exit(EXIT_FAILURE); } op_resolve_unit_mask(parsed_events, NULL); if (parsed_events[0].unit_mask_name) printf("%s\n", parsed_events[0].unit_mask_name); else printf("%d\n", parsed_events[0].unit_mask); } static void show_extra_mask(void) { size_t count; unsigned extra = 0; count = parse_events(parsed_events, num_chosen_events, chosen_events, ignore_count ? 0 : 1); if (count > 1) { fprintf(stderr, "More than one event specified.\n"); exit(EXIT_FAILURE); } op_resolve_unit_mask(parsed_events, &extra); printf ("%d\n", extra); } static void show_default_event(void) { struct op_default_event_descr descr; op_default_event(cpu_type, &descr); if (descr.name[0] == '\0') return; printf("%s:%lu:%lu:1:1\n", descr.name, descr.count, descr.um); } static int show_vers; static int get_cpu_type; static int check_events; static int unit_mask; static int get_default_event; static int extra_mask; static struct poptOption options[] = { { "cpu-type", 'c', POPT_ARG_STRING, &cpu_string, 0, "use the given CPU type", "cpu type", }, { "check-events", 'e', POPT_ARG_NONE, &check_events, 0, "check the given event descriptions for validity", NULL, }, { "ignore-count", 'i', POPT_ARG_NONE, &ignore_count, 0, "do not validate count value (used by ocount)", NULL}, { "unit-mask", 'u', POPT_ARG_NONE, &unit_mask, 0, "default unit mask for the given event", NULL, }, { "get-cpu-type", 'r', POPT_ARG_NONE, &get_cpu_type, 0, "show the auto-detected CPU type", NULL, }, { "get-default-event", 'd', POPT_ARG_NONE, &get_default_event, 0, "get the default event", NULL, }, { "callgraph", '\0', POPT_ARG_INT, &callgraph_depth, 0, "use this callgraph depth", "callgraph depth", }, { "version", 'v', POPT_ARG_NONE, &show_vers, 0, "show version", NULL, }, { "xml", 'X', POPT_ARG_NONE, &want_xml, 0, "list events as XML", NULL, }, { "extra-mask", 'E', POPT_ARG_NONE, &extra_mask, 0, "print extra mask for event", NULL, }, POPT_AUTOHELP { NULL, 0, 0, NULL, 0, NULL, NULL, }, }; /** * get_options - process command line * @param argc program arg count * @param argv program arg array * * Process the arguments, fatally complaining on error. */ static void get_options(int argc, char const * argv[]) { optcon = op_poptGetContext(NULL, argc, argv, options, 0); if (show_vers) show_version(argv[0]); /* non-option, must be a valid event name or event specs */ chosen_events = poptGetArgs(optcon); if(chosen_events) { num_chosen_events = 0; while (chosen_events[num_chosen_events] != NULL) num_chosen_events++; } /* don't free the context now, we need chosen_events */ } /** make valgrind happy */ static void cleanup(void) { int i; if (parsed_events) { for (i = 0; i < num_chosen_events; ++i) { if (parsed_events[i].name) free(parsed_events[i].name); } } op_free_events(); if (optcon) poptFreeContext(optcon); if (parsed_events) free(parsed_events); } #define MAX_LINE 256 int main(int argc, char const * argv[]) { struct list_head * events; struct list_head * pos; char const * pretty; char title[10 * MAX_LINE]; char const * event_doc = ""; atexit(cleanup); get_options(argc, argv); /* usefull for testing purpose to allow to force the cpu type * with --cpu-type */ if (cpu_string) { cpu_type = op_get_cpu_number(cpu_string); } else { cpu_type = op_get_cpu_type(); } if (cpu_type == CPU_NO_GOOD) { fprintf(stderr, "cpu_type '%s' is not valid\n", cpu_string ? cpu_string : "unset"); fprintf(stderr, "you should upgrade oprofile or force the " "use of timer mode\n"); exit(EXIT_FAILURE); } parsed_events = (struct parsed_event *)xcalloc(num_chosen_events, sizeof(struct parsed_event)); pretty = op_get_cpu_type_str(cpu_type); if (get_cpu_type) { printf("%s\n", pretty); exit(EXIT_SUCCESS); } if (get_default_event) { show_default_event(); exit(EXIT_SUCCESS); } if (cpu_type == CPU_TIMER_INT) { if (!check_events) { printf("CPU type 'timer' was detected, but this is no longer a supported mode for oprofile.\n" "Ensure the obsolete opcontrol profiler (available in pre-1.0 oprofile releases)\n" "is not running on the system. To check for this, look for the file\n" "/dev/oprofile/cpu_type; if this file exists, locate the pre-1.0 oprofile\n" "installation, and use its 'opcontrol' command with the --deinit option.\n"); } exit(EXIT_SUCCESS); } events = op_events(cpu_type); if (!chosen_events && (unit_mask || check_events || extra_mask)) { fprintf(stderr, "No events given.\n"); exit(EXIT_FAILURE); } if (unit_mask) { show_unit_mask(); exit(EXIT_SUCCESS); } if (extra_mask) { show_extra_mask(); exit(EXIT_SUCCESS); } if (check_events) { resolve_events(); exit(EXIT_SUCCESS); } /* without --check-events, the only argument must be an event name */ if (chosen_events && chosen_events[0]) { if (chosen_events[1]) { fprintf(stderr, "Too many arguments.\n"); exit(EXIT_FAILURE); } list_for_each(pos, events) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (strcmp(event->name, chosen_events[0]) == 0) { char const * map = find_mapping_for_event(event->val, cpu_type); if (map) { printf("%d %s\n", event->val, map); } else { printf("%d\n", event->val); } exit(EXIT_SUCCESS); } } fprintf(stderr, "No such event \"%s\"\n", chosen_events[0]); exit(EXIT_FAILURE); } /* default: list all events */ switch (cpu_type) { case CPU_HAMMER: event_doc = "See BIOS and Kernel Developer's Guide for AMD Athlon and AMD Opteron Processors\n" "(26094.pdf), Section 10.2\n\n"; break; case CPU_FAMILY10: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 10h Processors\n" "(31116.pdf), Section 3.14\n\n"; break; case CPU_FAMILY11H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 11h Processors\n" "(41256.pdf), Section 3.14\n\n"; break; case CPU_FAMILY12H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 12h Processors\n"; break; case CPU_FAMILY14H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 14h Processors\n"; break; case CPU_FAMILY15H: event_doc = "See BIOS and Kernel Developer's Guide for AMD Family 15h Processors\n"; break; case CPU_AMD64_GENERIC: event_doc = "See BIOS and Kernel Developer's Guide for AMD Processors\n"; break; case CPU_ATHLON: event_doc = "See AMD Athlon Processor x86 Code Optimization Guide\n" "(22007.pdf), Appendix D\n\n"; break; case CPU_PPRO: case CPU_PII: case CPU_PIII: case CPU_P6_MOBILE: case CPU_P4: case CPU_P4_HT2: case CPU_CORE: case CPU_CORE_2: case CPU_CORE_I7: case CPU_NEHALEM: case CPU_HASWELL: case CPU_BROADWELL: case CPU_SKYLAKE: case CPU_SILVERMONT: case CPU_GOLDMONT: case CPU_GOLDMONTPLUS: case CPU_WESTMERE: case CPU_SANDYBRIDGE: case CPU_IVYBRIDGE: case CPU_ATOM: event_doc = "See Intel Architecture Developer's Manual Volume 3B, Appendix A and\n" "Intel Architecture Optimization Reference Manual\n\n"; break; case CPU_KNIGHTSLANDING: event_doc = "See Intel Xeon Phi(TM) Processor Performance Monitoring Reference and\n" "Intel Architecture Optimization Reference Manual\n\n"; break; case CPU_ARCH_PERFMON: event_doc = "See Intel 64 and IA-32 Architectures Software Developer's Manual\n" "Volume 3B Chapter 18 for architectural perfmon events\n" "This is a limited set of fallback events because oprofile doesn't know your CPU\n"; break; case CPU_AXP_EV67: event_doc = "See Alpha Architecture Reference Manual\n" "http://download.majix.org/dec/alpha_arch_ref.pdf\n"; break; case CPU_ARM_XSCALE1: case CPU_ARM_XSCALE2: event_doc = "See Intel XScale Core Developer's Manual\n" "Chapter 8 Performance Monitoring\n"; break; case CPU_ARM_MPCORE: event_doc = "See ARM11 MPCore Processor Technical Reference Manual r1p0\n" "Page 3-70, performance counters\n"; break; case CPU_ARM_V6: event_doc = "See ARM11 Technical Reference Manual\n"; break; case CPU_ARM_V7: event_doc = "See Cortex-A8 Technical Reference Manual\n" "Cortex A8 DDI (ARM DDI 0344B, revision r1p1)\n"; break; case CPU_ARM_SCORPION: event_doc = "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n" "Scorpion Processor Family Programmer's Reference Manual (PRM)\n"; break; case CPU_ARM_SCORPIONMP: event_doc = "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n" "Scorpion Processor Family Programmer's Reference Manual (PRM)\n"; break; case CPU_ARM_KRAIT: event_doc = "See ARM Architecture Reference Manual ARMv7-A and ARMv7-R Edition\n" "Krait Processor Family Programmer's Reference Manual (PRM)\n"; break; case CPU_ARM_V7_CA9: event_doc = "See Cortex-A9 Technical Reference Manual\n" "Cortex A9 DDI (ARM DDI 0388E, revision r2p0)\n"; break; case CPU_ARM_V7_CA5: event_doc = "See Cortex-A5 Technical Reference Manual\n" "Cortex A5 DDI (ARM DDI 0433B, revision r0p1)\n"; break; case CPU_ARM_V7_CA7: event_doc = "See Cortex-A7 MPCore Technical Reference Manual\n" "Cortex A7 DDI (ARM DDI 0464D, revision r0p3)\n"; break; case CPU_ARM_V7_CA15: event_doc = "See Cortex-A15 MPCore Technical Reference Manual\n" "Cortex A15 DDI (ARM DDI 0438F, revision r3p1)\n"; break; case CPU_ARM_V7_CA17: event_doc = "See Cortex-A17 MPCore Technical Reference Manual\n" "Cortex A17 DDI (ARM DDI 0535C, revision r1p1)\n"; break; case CPU_ARM_V8_APM_XGENE: event_doc = "See ARM Architecture Reference Manual \n" "ARMv8, for ARMv8-A architecture profile\n" "DDI (ARM DDI0487A.a)\n"; break; case CPU_ARM_V8_CA57: event_doc = "See Cortex-A57 MPCore Technical Reference Manual\n" "Cortex A57 DDI (ARM DDI 0488D, revision r1p1)\n"; break; case CPU_ARM_V8_CA53: event_doc = "See Cortex-A53 MPCore Technical Reference Manual\n" "Cortex A57 DDI (ARM DDI 0500D, revision r0p2)\n"; break; case CPU_PPC64_POWER4: case CPU_PPC64_POWER5: case CPU_PPC64_POWER6: case CPU_PPC64_POWER5p: case CPU_PPC64_POWER5pp: case CPU_PPC64_970: case CPU_PPC64_970MP: case CPU_PPC64_POWER7: event_doc = "When using operf, events may be specified without a '_GRP' suffix.\n" "If _GRP (i.e., group number) is not specified, one will be automatically\n" "selected for use by the profiler. OProfile post-processing tools will\n" "always show real event names that include the group number suffix.\n\n" "Documentation for IBM POWER7 can be obtained at:\n" "http://www.power.org/events/Power7/\n" "No public performance monitoring doc available for older processors.\n"; break; case CPU_PPC64_ARCH_V1: case CPU_PPC64_POWER8: event_doc = "This processor type is fully supported with operf.\n" "See Power ISA 3.0B at " "https://openpowerfoundation.org/?submit=Search&s=ISA \n" "And the P8 Users Manual at " "https://www-355.ibm.com/systems/power/openpower \n\n"; break; case CPU_PPC64_POWER9: event_doc = "This processor type is fully supported with operf.\n" "See Power ISA 3.0B at " "https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0\n"; break; case CPU_MIPS_20K: event_doc = "See Programming the MIPS64 20Kc Processor Core User's " "manual available from www.mips.com\n"; break; case CPU_MIPS_24K: event_doc = "See Programming the MIPS32 24K Core " "available from www.mips.com\n"; break; case CPU_MIPS_25K: event_doc = "See Programming the MIPS64 25Kf Processor Core User's " "manual available from www.mips.com\n"; break; case CPU_MIPS_34K: event_doc = "See Programming the MIPS32 34K Core Family " "available from www.mips.com\n"; break; case CPU_MIPS_74K: event_doc = "See Programming the MIPS32 74K Core Family " "available from www.mips.com\n"; break; case CPU_MIPS_1004K: event_doc = "See Programming the MIPS32 1004K Core Family " "available from www.mips.com\n"; break; case CPU_MIPS_5K: event_doc = "See Programming the MIPS64 5K Processor Core Family " "Software User's manual available from www.mips.com\n"; break; case CPU_MIPS_R10000: case CPU_MIPS_R12000: event_doc = "See NEC R10000 / R12000 User's Manual\n" "http://www.necelam.com/docs/files/U10278EJ3V0UM00.pdf\n"; break; case CPU_MIPS_RM7000: event_doc = "See RM7000 Family User Manual " "available from www.pmc-sierra.com\n"; break; case CPU_MIPS_RM9000: event_doc = "See RM9000x2 Family User Manual " "available from www.pmc-sierra.com\n"; break; case CPU_MIPS_SB1: case CPU_MIPS_VR5432: event_doc = "See NEC VR5443 User's Manual, Volume 1\n" "http://www.necelam.com/docs/files/1375_V1.pdf\n"; break; case CPU_MIPS_VR5500: event_doc = "See NEC R10000 / R12000 User's Manual\n" "http://www.necel.com/nesdis/image/U16677EJ3V0UM00.pdf\n"; break; case CPU_MIPS_LOONGSON2: event_doc = "See loongson2 RISC Microprocessor Family Reference Manual\n"; break; case CPU_PPC_E500: case CPU_PPC_E500_2: case CPU_PPC_E500MC: case CPU_PPC_E6500: event_doc = "See PowerPC e500 Core Complex Reference Manual\n" "Chapter 7: Performance Monitor\n" "Downloadable from http://www.freescale.com\n"; break; case CPU_PPC_E300: event_doc = "See PowerPC e300 Core Reference Manual\n" "Downloadable from http://www.freescale.com\n"; break; case CPU_PPC_7450: event_doc = "See MPC7450 RISC Microprocessor Family Reference " "Manual\n" "Chapter 11: Performance Monitor\n" "Downloadable from http://www.freescale.com\n"; break; case CPU_TILE_TILE64: case CPU_TILE_TILEPRO: case CPU_TILE_TILEGX: event_doc = "See Tilera development doc: Multicore Development " "Environment Optimization Guide.\n" "Contact Tilera Corporation or visit " "http://www.tilera.com for more information.\n"; break; case CPU_S390_Z10: case CPU_S390_Z196: case CPU_S390_ZEC12: case CPU_S390_Z13: event_doc = "IBM System z CPU Measurement Facility\n" "http://www-01.ibm.com/support/docview.wss" "?uid=isg26fcd1cc32246f4c8852574ce0044734a\n"; break; // don't use default, if someone add a cpu he wants a compiler warning // if he forgets to handle it here. case CPU_TIMER_INT: case CPU_NO_GOOD: case MAX_CPU_TYPE: printf("%d is not a valid processor type.\n", cpu_type); exit(EXIT_FAILURE); } sprintf(title, "oprofile: available events for CPU type \"%s\"\n\n", pretty); if (want_xml) open_xml_events(title, event_doc, cpu_type); else { printf("%s%s", title, event_doc); printf("For architectures using unit masks, you may be able to specify\n" "unit masks by name. See 'operf' or 'ocount' man page for more details.\n\n"); } list_for_each(pos, events) { struct op_event * event = list_entry(pos, struct op_event, event_next); if (want_xml) xml_help_for_event(event); else help_for_event(event); } if (want_xml) close_xml_events(); return EXIT_SUCCESS; } oprofile-1.3.0/ChangeLog-20050000664000175000017500000006533012534404406012424 000000000000002005-12-30 Philippe Elie * libutil++/bfd_support.cpp: bfd_find_nearest_line() can return NULL in the sixth parameters, check the returned value. Problem reported by Nicolas Savoire 2005-12-07 Maynard Johnson * events/ppc64/power5/events: Change counter for CYCLES in order to use PM_CYC vs PM_RUN_CYC. This makes a difference now with kernels > 2.6.14 since the PowerPC runlatch is now honored and PM_RUN_CYC counts CYCLES only when not in idle loop. 2005-12-05 Will Cohen * libpp/arrange_profiles.cpp: Correct anon namespace for gcc 4.1. 2005-11-30 Junichi Uekawa * doc/oprofile.1.in: $prefix is unprocessed, use @prefix@ instead. 2005-11-17 Sean Lee * utils/opcontrol: Fix a typo. Cleanup load_module_26() 2005-10-19 John Levon * daemon/opd_cookie.c: use __MIPSEB__ not _MIPSEB 2005-10-18 Maynard Johnson * events/ppc64/power4/event_mappings: * events/ppc64/970/event_mappings: * events/ppc64/power5/events: * events/ppc64/power5/event_mappings: Ensure SAMPLE_ENABLE bit is set correctly, in preparation for coming change in PPC64 driver. Also, based on user input, add new event CYCLES_RND_SMPL for Power5. 2005-10-18 David Daney * daemon/opd_cookie.c: Handle MIPS o32 for both big and little endian. 2005-10-18 Andy Fleming * events/Makefile.am: * events/ppc/e500v2/events: * events/ppc/e500v2/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: add support for latest e500 processor 2005-09-08 Philippe Elie * libop/op_events.c: * libop/op_events.h: * libpp/op_header.cpp: use 32 bits unsigned int for unit mask, u16 use was an historical artefact coming from the p6 implementation. This allow to pass more information and will be used by P4 driver. 2005-09-01 Philippe Elie * gui/oprof_start.cpp: the last unit mask checkbox is no longer a "validate all unit mask" so don't treat it specially. It avoid to lost the last bit in the unit mask each time oprof_start is used. 2005-08-31 Philippe Elie * doc/oprofile.1.in: quote .BR strings 2005-08-31 John Levon * doc/oprofile.1.in: document archive: specifier 2005-08-30 Philippe Elie * pp/oparchive_options.cpp: fix #1276058, oparchive must force merging to avoid trigerring some sanity check in arrange_profiles(). Allowing merging is not a problem as merging doesn't occur in oparchive. 2005-08-25 Philippe Elie * events/x86-64/hammer/unit_masks: * events/x86-64/hammer/events: new events to count data cache access/miss by lock'ed insn. 2005-08-24 Maynard Johnson * events/ppc64/power4/events: * events/ppc64/power4/event_mappings: * events/ppc64/power5/events: * events/ppc64/power5/event_mappings: * events/ppc64/970/events: * events/ppc64/970/event_mappings: Add all supported events and groups. This change some events name. 2005-08-24 Philippe Elie * libutil++/op_bfd.cpp: minor tidy * daemon/opd_trans.c: more static function * events/ppc/e500/events: typo 2005-08-19 Philippe Elie * libdb/db_stat.c: use 64 bits to cumulate samples count. 2005-08-18 Philippe Elie * libutil++/file_manip.cpp: Change the last modification time after copying it. 2005-08-17 Philippe Elie * libdb/odb.h: * libdb/db_manage.c: * libdb/db_insert.c: split the api in two part, one to update a node (or create it) by incrementing by one its associated value and one to create a new node with a given value. This optimize the fast path used by the daemon. Sanity check inside the fast path has been removed too. * daemon/opd_sfile.c: * daemon/liblegacy/opd_proc.c: * libabi/opimport.cpp: * libabi/tests/abi_test.cpp: * libdb/tests/db_test.c: update according 2005-08-17 Philippe Elie * libutil++/bfd_support.h: * libutil++/op_bfd.cpp: comment how and why we can use the debuginfo bfd object. 2005-08-16 Philippe Elie * libutil++/file_manip.cpp: fix compilation on GCC 2.95.x 2005-08-15 Philippe Elie Fix #1256978: sum of samples count overflow * libutil/op_types.h: typedef a unsigned 64 bits count_type * libpp/callgraph_container.cpp: * libpp/format_output.cpp: * libpp/profile.cpp: * libpp/profile.h: * libpp/profile_container.cpp: * libpp/symbol.h: * libutil/op_types.h: * libutil++/growable_vector.h: * pp/opreport.cpp: use it all over place where we need to sum up samples count * pp/opgprof.cpp: check for samples count capping for callgraph output 2005-08-15 Philippe Elie * libdb/tests/db_test.c: add a better speed test 2005-08-13 Maynard Johnson * gui/oprof_start.h: * libop/op_events.c: * libop/op_events.h: * libpp/op_header.cpp: change op_event.val field from u8 to u32 to allow event numbers higher than 0X100. 2005-08-13 Philippe Elie * libdb/odb.h: * libdb/db_insert.c: * libdb/db_manage.c: use a two step node allocation to ensure adding a node will be sort of atomically visible in another process 2005-08-13 Philippe Elie * libdb/odb.h: clarify the way odb_get_iterator work * libpp/profile.cpp: use odb_get_iterator properly to ensure we account zero relative offset. This fix a corner case when kernel module get a sample at the first byte of their .text section. 2005-08-11 Philippe Elie * libutil++/file_manip.cpp: fix a race when changing the mode and owner of copied file. * pp/oparchive.cpp: warn if a file can't be copied, avoid to copy inexisting image for anon mammping 2005-08-11 Philippe Elie * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: * libop/op_config.h: add --cpu-buffer-size for 2.6 2005-08-10 Philippe Elie * libutil++/file_manip.h: * libutil++/file_manip.cpp: preserve as many of file attributes and owner we can when copying a file. This affected running oparchive with root right allowing non root user to read all archived binaries. Problem started in cvs the 2005-08-07 2005-08-09 Philippe Elie * daemon/opd_anon.c: * daemon/opd_kernel.c: fix two scanf potential buffer overflow 2005-08-09 Philippe Elie * module/x86/cpu_type.c: fix #1254390, problem and solution by Thomas Kho * module/oprofile.c: * module/oprofile.h: #1266604 fix a compilation problem with gcc <= 3.3. It's not worth to try to continue to use fastcall for op_do_profile. * module/x86/op_model_p4.c: backport some change from the 2.6 driver: on some P4 model 3 IQ_ESCR0/1 doesn't exist and acessing them fault. 2005-08-08 Philippe Elie * doc/opcontrol.1.in: * doc/oprofile.xml: document opcontrol --buffer-watershed * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: * utils/opcontrol: implement 2.6 buffer_watershed 2005-08-07 Philippe Elie * libutil++/file_manip.h: * libutil++/file_manip.cpp: use iostream to copy file * libpp/populate.cpp: check_mtime() even when using archive: spec * pp/oparchive.cpp: fix comment 2005-08-07 Philippe Elie * pp/opreport.cpp: don't throw a std::string but an op_runtime_error 2005-08-07 Philippe Elie * daemon/oprofiled.c: * daemon/liblegacy/init.c: * daemon/liblegacy/opd_image.c: * daemon/liblegacy/opd_parse_proc.c: * gui/oprof_start.cpp: * gui/oprof_start_util.cpp: * libdb/db_debug.c: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/tests/db_test.c: * libop/op_events.c: * libop/tests/alloc_counter_tests.c: * libop/tests/parse_event_tests.c: * libopt++/popt_options.cpp: * libpp/arrange_profiles.cpp: * libpp/callgraph_container.cpp: * libpp/filename_spec.cpp: * libpp/image_errors.cpp: * libpp/name_storage.cpp: * libpp/profile_container.cpp: * libpp/profile_spec.cpp: * libregex/op_regex.cpp: * libregex/tests/regex_test.cpp: * libutil++/string_manip.cpp: * pp/opannotate.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: * utils/ophelp.c: coding style 2005-08-06 Philippe Elie * doc/oprofile.xml: more documentation about annotated source and inlined functions. * libpp/profile_container.cpp: * libpp/profile_container.h: * libpp/symbol_container.cpp: * libpp/symbol_container.h: new public interface to select all symbols defined in a given source file. * pp/opannotate.cpp: when no source file is available we can at least output all symbols name/samples count belonging to this source. 2005-08-06 Philippe Elie * libpp/profile_container.cpp: * libpp/profile_container.h: * libpp/symbol_container.cpp: * libpp/symbol_container.h: find symbol by source filename, linenr : change public interface to return multiple symbols * pp/opannotate.cpp: Fix #1252754 2005-08-04 Philippe Elie * doc/opimport.1.in: * doc/oprofile.xml: improve documentation about opimport 2005-08-04 Philippe Elie * gui/ui/oprof_start.base.ui: handle ui events help string when using keyboard to navigate through event list 2005-08-04 Philippe Elie * libabi/Makefile.am: * libabi/abi.cpp: * libabi/abi.h: * libabi/op_abi.h: * libabi/tests/Makefile.am: * libabi/op_abi.cpp: removed * libabi/op_abi.c: new file, abi file writing in plain C * configure.in: * daemon/Makefile.am: * daemon/oprofiled.c: * daemon/liblegacy/Makefile.am: * doc/Makefile.am: * doc/oprofile.xml: build unconditionnaly libabi * doc/opimport.1.in: new file, man page for opimport, need some tweaking probably 2005-08-03 Philippe Elie * gui/oprof_start.cpp: * gui/oprof_start.h: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: add a button to reset the profiling session and an edit field to setup the callgraph depth 2005-08-03 Philippe Elie * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: * gui/oprof_start.cpp: hardcode config directory to /root, rename get_user_filename() to get_config_filename() 2005-08-03 Philippe Elie * gui/oprof_start_util.cpp: fix detection of stopped daemon. Fix a miscounted interrupt nr after a start/stop/start 2005-08-03 Philippe Elie * doc/oprofile.xml: improve documentation about RTC mode. 2005-08-03 Philippe Elie * gui/oprof_start.cpp: fix events parsing according to the way we store them in setupfile changed by the last patch. 2005-08-02 Richard Purdie * HACKING: Add note about bashisms being bad * doc/oprofile.xml: Remove bash dependency * utils/opcontrol: remove bashisms from the script 2005-08-02 Richard Purdie * utils/opcontrol: remove some bashism, not yet enough to remove bash dependency 2005-07-21 John Levon * configure.in: bump to 0.9.2cvs 2005-07-18 John Levon * libutil++/tests/Makefile.am: canonicalize SRCDIR to fix make check 2005-07-18 John Levon * configure.in: bump to 0.9.1 2005-07-11 John Levon * module/oprofile.c: fix for GCC 3.4, spotted by Jason Lunz 2005-01-06 Ralf Baechle * events/Makefile.am: * events/mips/24K/events: * events/mips/24K/unit_masks: * libop/op_events.c: * libop/op_cpu_type.h: * libop/op_cpu_type.c: * utils/ophelp.c: Add MIPS 24K support 2005-06-16 Richard Purdie * utils/opcontrol: fix ARM kernels again after 2005-05-04 change to op_bfd.cpp broke it again. Only look for .text section for our kernel range. 2005-06-13 Richard Purdie * libpp/callgraph_container.cpp: * libpp/profile.cpp: ignore any symbols before .text for start_offset profiles 2005-06-02 Jason Lunz * libpp/diff_container.cpp: * libpp/format_output.cpp: * libutil++/bfd_support.cpp: * libutil++/op_bfd.cpp: fix compilation on GCC 2.95.x, older glibc 2005-06-01 Philippe Elie * pp/opannotate_options.cpp: error out if --assembly and --output-dir are used together * doc/opannotate.1.in: * doc/oprofile.xml: update docucmentation according. 2005-05-31 John Levon * configure.in: bump to 0.9.1cvs 2005-05-27 John Levon * libpp/diff_container.cpp: convert the diffs into an actual percentage! * configure.in: bump to 0.9 2005-05-26 John Levon * daemon/opd_cookie.c: * daemon/opd_sfile.c: * daemon/opd_trans.c: fixes for image filtering 2005-05-09 Will Cohen * daemon/opd_sfile.c: Fix variable declaration to compile on gcc 3.4. 2005-05-04 Philippe Elie * pp/common_option.cpp: split argument "{}" in two separate argument 2005-05-04 John Levon * doc/oprofile.xml: fix typos 2005-05-04 Philippe Elie * libutil++/cverb.cpp: * libutil++/cverb.h: fix comment, remove unecessary friend declaration. 2005-05-04 John Levon * daemon/liblegacy/opd_kernel.c: fix previous workaround so it only triggers on x86 2005-05-04 John Levon * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: don't assume .text is the first SEC_CODE section. Keep a map of section file offsets to fix up dbfd symbols. Remove broken sanity checks. 2005-05-02 John Levon * doc/oprofile.xml: small change 2005-05-02 John Levon * daemon/Makefile.am: * daemon/opd_anon.h: * daemon/opd_anon.c: * daemon/init.c: * daemon/opd_cookie.c: * daemon/opd_events.h: * daemon/opd_events.c: * daemon/opd_mangling.c: * daemon/opd_sfile.h: * daemon/opd_sfile.c: * daemon/opd_trans.h: * daemon/opd_trans.c: * daemon/liblegacy/opd_sample_files.c: * doc/oprofile.xml: * libabi/abi.cpp: * libabi/opimport.cpp: * libabi/tests/abi_test.cpp: * libop/op_mangle.h: * libop/op_mangle.c: * libop/op_sample_file.h: * libpp/callgraph_container.cpp: * libpp/image_errors.cpp: * libpp/op_header.cpp: * libpp/parse_filename.cpp: * libpp/populate.cpp: * libpp/profile.h: * libpp/profile.cpp: * libpp/profile_spec.cpp: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: * pp/opannotate.cpp: * pp/opgprof.cpp: add basic anon mapping support 2005-04-28 John Levon * utils/opcontrol: * doc/opcontrol.1.in: * doc/oprofile.xml: add opcontrol --status 2005-04-28 Philippe Elie * daemon/opd_sfile.c: clear only 256 entry in the sfile lru list 2005-04-28 John Levon * libabi/abi.cpp: * libabi/op_import.cpp: add cg_to_is_kernel to abi * configure.in: * libabi/tests/Makefile.am: * libabi/tests/abi_test.cpp: move test to subdir 2005-04-28 Philippe Elie * module/ia64/op_pmu.c: compile fix, pfm_syst_info has been added between 2.4.20 and 2.4.21 2005-04-27 Philippe Elie * libutil/op_file.h: op_file_readable() accept only regular file * libutil/op_file.c: * libutil++/tests/file_manip_tests.cpp: 2005-04-27 John Levon * daemon/opd_sfile.h: * daemon/opd_sfile.c: rewrite. Fix --no-vmlinux taking up CPU when using call graph profiling 2005-04-27 John Levon * daemon/oprofiled.h: remove dead prototype 2005-04-25 Philippe Elie * daemon/opd_mangling.c: protect last against sfile lru deletion * daemon/opd_sfile.c: allow null sfile to sfile_get(), sfile_put() 2005-04-24 John Levon * daemon/opd_cookie.h: * daemon/opd_cookie.c: * daemon/opd_trans.c: * daemon/opd_sfile.c: * daemon/opd_stats.h: * daemon/opd_stats.c: handle NO_COOKIE (drop on the floor) * m4/qt.m4: allow gcc 4.0 compile with Qt headers by using -isystem 2005-04-23 John Levon * configure.in: add --with-gcc, --with-binutils (for development use only, undocumented) 2005-04-22 Philippe Elie * libpp/locate_images.h: add a virtual dtor to extra_images::matcher 2005-04-22 John Levon * doc/internals.xml: some paragraphs on call graphs * libop/op_events.h: * libop/op_events.c: * libutil/op_deviceio.h: * libutil/op_deviceio.c: * libutil/op_fileio.h: * libutil/op_fileio.c: remove dead code * libutil/op_lock_file.h: * libutil/op_lock_file.c: make a function static * libutil++/Makefile.am: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: * libutil++/bfd_support.h: * libutil++/bfd_support.cpp: move lots of BFD gunk into a separate file. Fix synth symbols support, with lots of testing by Maynard. * libutil++/comma_list.h: remove unused set_p * pp/opannotate.cpp: complain less verbosely if the input file couldn't be found 2005-04-14 John Levon * libutil++/growable_vector.h: * libpp/diff_container.cpp: fix fill() * pp/opreport.cpp: fix multiple apps for diff output 2005-04-14 John Levon * daemon/opd_interface.h: * daemon/opd_trans.c: remove legacy TRACE_END * daemon/liblegacy/opd_kernel.c: * daemon/liblegacy/opd_proc.c: avoid attributing "no mapping" samples to vmlinux when using --no-vmlinux via a sick hack 2005-04-13 John Levon * libutil++/growable_vector.h: add fill() * libutil++/diff_container.cpp: use it * libpp/symbol_sort.cpp: code clean up 2005-04-13 John Levon * libpp/diff_container.h: * libpp/diff_container.cpp: syms doesn't need to be a member 2005-04-13 Nathan Tallent * utils/opcontrol: fix unquoted variable references in 'test' expressions 2005-04-13 Maynard Johnson * libutil++/op_bfd.cpp: skip null-name section symbols 2005-04-12 Philippe Elie * libutil++/string_manip.cpp: fix double formating when value are negative 2005-04-12 John Levon * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: * pp/opreport_options.cpp: * pp/common_option.cpp: verify diff profile classes match 2005-04-12 John Levon * doc/oprofile.xml: * doc/oprofile.1.in: document diff profiles 2005-04-12 John Levon * libpp/diff_container.cpp: fix duplicate syms in output * pp/opreport.cpp: * libpp/diff_container.h: * libpp/diff_container.cpp: implement thresholding etc. 2005-04-12 John Levon * libpp/Makefile.am: * libpp/count_array.cpp: * libpp/count_array.h: * libpp/diff_container.cpp: * libpp/diff_container.h: * libpp/format_flags.h: * libpp/format_output.cpp: * libpp/format_output.h: * libpp/profile_spec.cpp: * libpp/profile_spec.h: * libpp/symbol.h: * libpp/symbol_functors.cpp: * libpp/symbol_sort.cpp: * libpp/symbol_sort.h: * libutil++/Makefile.am: * libutil++/growable_vector.h: * libutil++/string_manip.cpp: * libutil++/string_manip.h: * pp/common_option.cpp: * pp/common_option.h: * pp/opannotate.cpp: * pp/opannotate_options.cpp: * pp/opannotate_options.h: * pp/oparchive.cpp: * pp/oparchive_options.cpp: * pp/oparchive_options.h: * pp/opdiff.cpp: * pp/opdiff_options.cpp: * pp/opdiff_options.h: * pp/opgprof.cpp: * pp/opgprof_options.cpp: * pp/opgprof_options.h: * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: implement an initial version of diff profiling 2005-04-11 John Levon * doc/oprofile.xml: * doc/opreport.1.in: * doc/opannotate.1.in: * pp/opreport_options.cpp: * pp/opannotate_options.cpp: add -D and -% 2005-04-11 John Levon * pp/opannotate.cpp: fix opannotate matching several binaries 2005-04-09 Philippe Elie * libutil++/op_bfd.cpp: fix a segfault if a binary file can't be accessed (opreport -gl; opannotate) problem and solution pointed by Maynard P. Johnson . * libutil++/op_bfd.h: op_bfd member function must check for a NULL ibfd before using it. 2005-04-07 John Levon * libutil/tests/Makefile.am: * libutil++/tests/Makefile.am: * libdb/tests/Makefile.am: * libop/tests/Makefile.am: fix tests build 2005-04-07 John Levon * m4/Makefile.am: * m4/binutils.m4: * configure.in: move binutils stuff into a macro * doc/oprofile.xml: fixes and improvements 2005-04-07 John Levon * libpp/callgraph_container.cpp: hoist image/app name lookup outside of the loop 2005-04-07 John Levon * libutil++/op_bfd.cpp: performance improvements with handling symbols 2005-04-06 John Levon * libpp/populate.h: * libpp/populate.cpp: * libpp/callgraph_container.cpp: * libutil++/cached_value.h: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: * pp/opannotate.cpp: * pp/opreport.cpp: * libutil++/tests/Makefile.am: * libutil++/tests/cached_value_tests.cpp: tweak CRC buffer. Do delayed debug info searching (makes no actual difference). 2005-04-05 John Levon * libpp/format_output.cpp: add separator at first function for opreport -c 2005-04-05 John Levon * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: implement -i / -e for opreport -c 2005-04-05 John Levon * libpp/format_output.h: * libpp/format_output.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: implement --global-percent for opreport -c 2005-04-04 John Levon * configure.in: * doc/Makefile.am: * doc/oprofile.xml: * doc/opstack.1.in: * doc/opreport.1.in: * doc/oprofile.1.in: * pp/.cvsignore: * pp/Makefile.am: * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: * pp/opstack.cpp: * pp/opstack_options.cpp: * pp/opstack_options.h: remove opstack in favour of opreport -c * libpp/callgraph_container.cpp: fix for new call-graph code * doc/oprofile.xml: * doc/oparchive.1.in: document -x, re-organise manual 2005-04-04 Maynard Johnson * configure.in: further check for bfd synthesised symbols support 2005-04-04 John Levon * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * libpp/format_flags.h: * libpp/format_output.cpp: * libpp/format_output.h: * libpp/symbol.cpp: * libpp/symbol.h: * libpp/symbol_sort.cpp: * libpp/symbol_sort.h: * libutil++/op_bfd.cpp: * pp/common_option.cpp: * pp/common_option.h: * pp/opstack.cpp: * pp/opstack_options.cpp: * pp/opstack_options.h: re-whack call-graph collection and output format 2005-04-03 Maynard Johnson * configure.in: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: synthesis dotted symbols if necessary 2005-03-31 John Levon * HACKING: * TODO: * configure.in: * doc/Makefile.am: * doc/op_help.1.in: * doc/ophelp.1.in: * doc/oprofile.xml: * libabi/.cvsignore: * libabi/Makefile.am: * libabi/opimport.cpp: * utils/.cvsignore: * utils/Makefile.am: * utils/opcontrol: * utils/ophelp.c: rename op_import->opimport, op_help->ophelp. Allow normal user to use opcontrol --list-events 2005-03-31 John Levon * doc/internals.xml: more internals docs 2005-03-29 John Levon * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: * libpp/format_output.h: * libpp/format_output.cpp: * libpp/profile_container.h: * libpp/symbol.h: * libpp/symbol_sort.h: * libpp/symbol_sort.cpp: * libpp/symbol_container.h: * libpp/symbol_container.cpp: * pp/opreport_options.h: header file cleanup 2005-03-26 John Levon * Makefile.am: * doc/oprofile.xml: * m4/configmodule.m4: * module/x86/Makefile.in: * module/x86/hammer_entry.S: * module/x86/hammer_ia32entry.S: * module/x86/hammer_op_syscalls.c: * module/x86/hammer_oprofile_nmi.S: * module/x86/op_apic.h: * module/x86/op_arch.h: * module/x86/op_nmi.c: remove x86-64 support for 2.4 kernels, as it's non-functional 2005-03-26 John Levon * daemon/oprofiled.c: honour oprofiled -v first, complain if --events option is missing instead of core dumping * doc/oprofiled.xml: explain opreport -d behaviour for no-symbol binaries 2005-03-14 Maynard Johnson * utils/op_help.c: * doc/oprofile.xml: Update PPC64-related documentation to include URL links to IBM publications. 2005-03-22 John Levon * configure.in: bump to 0.9cvs 2005-03-19 Philippe Elie * configure.in: bump to 0.8.2 2005-03-18 Philippe Elie * events/i386/p4/events: * events/i386/p4/unit_masks: * events/i386/p4-ht/events: * events/i386/p4-ht/unit_masks: remove FRONT_END_EVENT, EXECUTION_EVENT and REPLAY_EVENT. * libop/tests/alloc_counter_tests.c: update test according events removal 2005-03-18 Philippe Elie * utils/opcontrol: revert last patch, bash can't do integer arithmetic on hexadecimal. 2005-02-21 John Levon * utils/opcontrol: further validation of the kernel range to prevent an unrelocated vmlinux being used 2005-02-07 John Levon * events/arm/xscale1/unit_masks: fix 'zero' unit mask 2005-01-25 Maynard Johnson * doc/oprofile.xml: Add PowerPC 64-bit processor support information 2005-01-24 Philippe Elie * libutil++/op_bfd.cpp: always initialize op_bfd_symbol:symb_hidden and symb_weak, not a bug fix but a cleanup. 2005-01-04 Andy Fleming * events/Makefile.am: * events/ppc/e500/events: * events/ppc/e500/unit_masks: * libop/op_events.c: * libop/op_cpu_type.h: * libop/op_cpu_type.c: * utils/op_help.c: Add PPC e500 support 2005-01-02 Philippe Elie * pp/opannotate.cpp: fix #1093162 by simplifying the code, this was likely to be a compiler problem but the new code is simpler. oprofile-1.3.0/ChangeLog-20080000664000175000017500000003222412534404406012423 000000000000002008-12-23 Maynard Johnson * utils/opcontrol: reverse the logic in is_non_cell_ppc64_variant to avoid the need for maintenance as new ppc64 variants are addded 2008-12-12 Maynard Johnson * libop/Makefile.am: Add Andi Kleen's new op_hw_specific.h file to to Makefile.am 2008-11-24 Robert Richter * utils/opcontrol: Correct spelling error 2008-11-24 Robert Richter * daemon/opd_events.c: * daemon/opd_events.h: * daemon/opd_mangling.c: * daemon/opd_mangling.h: * daemon/opd_sfile.c: * daemon/opd_trans.c: * events/x86-64/family10/events: * utils/opcontrol: fix whitespaces 2008-11-12 Andi Kleen * libop/op_events.c * libop/op_events.h * libpp/op_header.cpp: Fix regression in arch perfmon code (see bug #2161762) 2008-11-12 Andi Kleen * events/i386/arch_perfmon/events: Fix event name to avoid parsing error 2008-11-05 Maynard Johnson * libutil++/file_manip.cpp: Add mode arg to open 2008-10-30 William Cohen * m4/binutils.m4: Defeat compiler optimization in configure check for bfd_get_synthetic_symtab 2008-10-27 Maynard Johnson * libutil++/op_spu_bfd.cpp: Initialize anon_obj to false for op_bfd objects for Cell SPE embedded binaries 2008-10-23 Dave Nomura * libutil++/xml_output.cpp: * libutil/xml_out.c: * libutil/xml_out.h: * libutil/xml_events.c: * libutil/xml_events.h: * libutil/Makefile.am: * libop/op_xml_out.c: * libop/op_xml_out.h: * libop/op_xml_events.c: * libop/op_xml_events.h: * libop/Makefile.am: moved xml util routines to libop and fixed some other problems in the previous patch 2008-10-15 Dave Nomura * utils/ophelp.c: * libutil++/xml_output.cpp: * libutil++/xml_output.h: * libutil/xml_out.c: * libutil/xml_out.h: * libutil/xml_events.c: * libutil/xml_events.h: * libutil/Makefile.am: added -X option to ophelp to generate XML 2008-10-06 Maynard Johnson * configure.in: * m4/binutils.m4: * m4/cellspubfdsupport.m4: Handle BFD's new dependency on libz 2008-08-28 Maynard Johnson * configure.in: Add configure option for non-standard binutils lib 2008-08-28 Andi Kleen * events/i386/arch_perfmon/events: * events/i386/arch_perfmon/unit_masks: * events/Makefile.am: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * libop/op_events.h: * libop/op_hw_specific.h: * libpp/op_header.cpp: * utils/ophelp.c: support for Intel arch perfmon 2008-08-28 Maynard Johnson * configure.in: Change AM_INIT_AUTOMAKE to 0.9.5cvs; enables -werror gcc option to stop build on warnings 2008-08-27 Jatin Nansi * utils/opcontrol: vecho parameters after "--verbose" option processed 2008-08-08 Daniel Hansel * daemon/init.c: Fixed call of execvp() to execute opjitconv if it is installed in a custom directory 2008-08-07 Maynard Johnson * libutil++/bfd_support.cpp: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: Fix a couple problems relating to overlay symbols for Cell SPE applications 2008-07-31 Maynard Johnson * configure.in: Fix to allow libtool to recognize alternate binutils dir passed via --with-binutils 2008-07-24 Jean Pihet * events/arm/armv7/events: * events/arm/armv7/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: Added ARMv7 support to be consistent with the kernel, added ARMv7 specific events. Tested on OMAP3430 and OMAP3530 chipsets. 2008-07-17 Maynard Johnson * configure.in: bump version in AM_INIT_AUTOMAKE to 0.9.4 2008-07-17 Will Cohen * libop/op_alloc_counter.c: Assume perfmon managing PMU hw when no counters 2008-07-07 Maynard Johnson * HACKING: Ask contributors to include Signed-off-by line with their patches 2008-07-03 Richard Purdie * libutil++/bfd_support.cpp: * libutil++/bfd_support.h: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * libutil++/op_spu_bfd.cpp: * pp/oparchive.cpp: Switch separate_debug_file_exists() and hence find_separate_debug_file() to use extra_images::find_image_path() so debug files in --root directories are correctly found 2008-07-03 Maynard Johnson * ChangeLog: Correct date of previous entry * README_PACKAGERS: Add more advice to packagers regarding the new JIT support libraries 2008-07-03 Maynard Johnson * libopagent/Makefile.am: * libopagent/opagent.c: * remove libopagent/bfddefines.c: Move code from bfddefines to libopagent to fix cross-compile error 2008-06-30 Shunichi Fuji * libpp/callgraph_container.cpp: Fix compile warning using gcc 4.3.1 for uninitialized variable 2008-06-23 Maynard Johnson * daemon/opd_stats.c: Do not force printing of sample_invalid_eip since this is not available from pre-2.6.24 kernels 2008-06-23 Maynard Johnson * opjitconv/opjitconv.c: Switch to special user account after determining whether or not we have JIT dump files to process in order to avoid unnecessary error messages in oprofiled.log 2008-06-11 Maynard Johnson * configure.in: * Makefile.am: * agents/Makefile.am: * doc/oprofile.xml: Change make install error to warning if special user account does not exist 2008-06-11 Maynard Johnson * Makefile.am: Add README_PACKAGERS to EXTRA_DIST 2008-06-03 Will Cohen * libop/op_alloc_counter.c: Use counters actually available. 2008-05-21 George McCollister * daemon/opd_cookie.c: Fix ARM big-endian syscall 2008-05-20 Jason Yeh * events/x86_64/hammer/events: * events/x86_64/hammer/unit_masks: * events/x86_64/family10/events: * events/x86_64/family10/unit_masks: update for recent BKDG revisions 2008-05-19 Maynard Johnson * libpp/profile_spec.cpp: Fix bug in differential profile when using archive spec and an image spec 2008-05-19 Maynard Johnson * libpp/format_output.cpp: * libpp/xml_utils.cpp: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: Do not to try to get symbol contents for artificial symbols and other cases where no symbol contents exist. Also change to use scoped array for symbol contents instead of automatic allocation from the stack to avoid allocation attempt exceeding max stack size. 2008-05-09 Maynard Johnson * configure.in: * Makefile.am: Improve error messages for special user account checks 2008-05-08 Maynard Johnson * libpp/callgraph_container.cpp: * libpp/profile_container.cpp: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: Fix to allow 32-bit opreport to properly process samples from 64-bit JIT profile agent 2008-04-29 René Rebe * libabi/opimport.cpp: * libpp/op_header.cpp: * libpp/profile.cpp: * libutil++/bfd_support.cpp: * libutil++/cverb.cpp: * libutil++/op_bfd.cpp: * libutil++/op_spu_bfd.cpp: * pp/common_option.cpp: * pp/opannotate_options.cpp: * pp/oparchive.cpp: * pp/opgprof_options.cpp: added explicit includes for C functions as required for compilation with GCC-4.3 2008-04-28 Daniel Hansel * oprofile/agents/jvmpi/jvmpi_oprofile.cpp: * oprofile/agents/jvmpi/Makefile.am: * oprofile/agents/jvmti/libjvmti_oprofile.c: * oprofile/agents/jvmti/Makefile.am: * oprofile/agents/Makefile.am: * oprofile/autogen.sh: * oprofile/configure.in: * oprofile/daemon/init.c: * oprofile/daemon/Makefile.am: * oprofile/daemon/opd_anon.c: * oprofile/daemon/opd_pipe.c: * oprofile/daemon/opd_pipe.h: * oprofile/daemon/oprofiled.c: * oprofile/daemon/oprofiled.h: * oprofile/doc/Makefile.am: * oprofile/doc/op-jit-devel.xml: * oprofile/doc/oprofile.xml: * oprofile/libop/op_config.c: * oprofile/libop/op_config.h: * oprofile/libopagent/bfddefines.c: * oprofile/libopagent/jitdump.h: * oprofile/libopagent/Makefile.am: * oprofile/libopagent/opagent.c: * oprofile/libopagent/opagent.h: * oprofile/libopagent/opagent_symbols.ver: * oprofile/libpp/arrange_profiles.cpp: * oprofile/libpp/callgraph_container.cpp: * oprofile/libpp/filename_spec.cpp: * oprofile/libpp/filename_spec.h: * oprofile/libpp/op_header.cpp: * oprofile/libpp/op_header.h: * oprofile/libpp/parse_filename.cpp: * oprofile/libpp/parse_filename.h: * oprofile/libpp/profile_container.cpp: * oprofile/libpp/profile.cpp: * oprofile/libpp/profile.h: * oprofile/libpp/profile_spec.cpp: * oprofile/libregex/demangle_java_symbol.cpp: * oprofile/libregex/demangle_java_symbol.h: * oprofile/libregex/demangle_symbol.cpp: * oprofile/libregex/Makefile.am: * oprofile/libregex/tests/java_test.cpp: * oprofile/libregex/tests/Makefile.am: * oprofile/libutil/Makefile.am: * oprofile/libutil/op_file.c: * oprofile/libutil/op_file.h: * oprofile/libutil/op_growable_buffer.c: * oprofile/libutil/op_growable_buffer.h: * oprofile/libutil/op_list.h: * oprofile/libutil++/bfd_support.cpp: * oprofile/libutil++/bfd_support.h: * oprofile/libutil++/file_manip.cpp: * oprofile/libutil++/op_bfd.cpp: * oprofile/libutil++/op_bfd.h: * oprofile/Makefile.am: * oprofile/opjitconv/conversion.c: * oprofile/opjitconv/create_bfd.c: * oprofile/opjitconv/debug_line.c: * oprofile/opjitconv/jitsymbol.c: * oprofile/opjitconv/Makefile.am: * oprofile/opjitconv/opjitconv.c: * oprofile/opjitconv/opjitconv.h: * oprofile/opjitconv/parse_dump.c: * oprofile/pp/opgprof.cpp: * oprofile/README_PACKAGERS: * oprofile/TODO: * oprofile/utils/opcontrol: JIT support 2008-04-18 Maynard Johnson * m4/binutils.m4: A correct fix for the --with-binutils problem 2008-04-17 Maynard Johnson * m4/binutils.m4: Revert previous patch as it was buggy 2008-04-16 Maynard Johnson * m4/binutils.m4: Fix the bfd_get_synthetic_symtab check in this m4 macro to work correctly with '--with-binutils' configure option 2008-04-10 Chris J Arges * utils/opcontrol: For ppc64 architectures, need to check if all user/kernel flags per counter match. Then use this value to set user/kernel domain profiling. 2008-03-13 Dave Nomura * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * pp/opreport.cpp: gcc 4.3 gives warnings on const function return types 2008-03-03 John Levon * daemon/oprofiled.c: fix error message typo 2008-02-22 Haavard Skinnemoen * events/Makefile.am: * events/avr32/events: * events/avr32/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: Add AVR32 support 2008-02-22 Richard Purdie * libutil++/file_manip.cpp: * pp/oparchive.cpp: Check files actually exist before copying or listing the file as part of oparchive --list-files. The copy_file function breaks if passed a directory as a file to copy since it will create a file at the destination causing subtle bugs. 2008-02-22 Andy Fleming * events/Makefile.am: * events/ppc/e300/events: * events/ppc/e300/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: Add e300 support 2008-02-22 Bob Nelson * utils/opcontrol: Fix loop in dump code when using --session-dir on a network drive. (clock issues) 2008-02-15 Will Cohen * gui/oprof_start_util.cpp * libutil++/file_manip.cpp * libutil++/bfd_support.cpp * libutil++/bfd_spu_support.cpp * libutil++/op_spu_bfd.cpp * libutil++/cverb.cpp * libutil++/child_reader.cpp * pp/opgprof_options.cpp * pp/opannotate_options.cpp * pp/oparchive.cpp * pp/common_option.cpp * libpp/sample_container.cpp * libpp/op_header.cpp * libpp/profile.cpp * libabi/opimport.cpp * libregex/demangle_symbol.cpp: Add includes for gcc 4.3 compatibility. 2008-02-07 Bob Nelson * libutil++/op_bfd.h: add bool symb_artificial to op_bfd_symbol * libutil++/op_bfd.cpp: ctor changes, use symb_artificial * libutil++/op_spu_bfd.cpp: profile SPU 'stack' code 2008-02-04 Bob Nelson * daemon/opd_spu.c: Fix number of records to check for in an SPU context switch 2008-01-21 Daniel Hansel * various: style cleanups 2008-01-15 Isaku Yamahata * daemon/opd_trans.c: fix previous SPU patch 2008-01-11 Isaku Yamahata * daemon/opd_perfmon.c: Xen support for IA64 2008-01-11 Markus Armbruster * daemon/opd_interface.h: * daemon/opd_trans.c: work around SPU/Xen code numbering problem See ChangeLog-2007 for earlier changelogs. oprofile-1.3.0/doc/0000775000175000017500000000000013323173530011102 500000000000000oprofile-1.3.0/doc/internals.html0000664000175000017500000024602013124775660013726 00000000000000 OProfile Internals

OProfile Internals

Copyright © 2003 John Levon

Table of Contents

1. Introduction
1. Overview
2. Components of the OProfile system
2.1. Architecture-specific components
2.2. oprofilefs
2.3. Generic kernel driver
2.4. The OProfile daemon
2.5. Post-profiling tools
2. Performance counter management
1. Providing a user interface
2. Programming the performance counter registers
2.1. Starting and stopping the counters
2.2. IA64 and perfmon
3. Collecting and processing samples
1. Receiving interrupts
2. Core data structures
3. Logging a sample
4. Logging stack traces
5. Synchronising the CPU buffers to the event buffer
6. Identifying binary images
7. Finding a sample's binary image and offset
4. Generating sample files
1. Processing the buffer
1.1. Handling kernel samples
2. Locating and creating sample files
3. Writing data to a sample file
5. Generating useful output
1. Handling the profile specification
2. Collating the candidate sample files
2.1. Classifying sample files
2.2. Creating inverted profile lists
3. Generating profile data
3.1. Processing the binary image
3.2. Processing the sample files
4. Generating output
6. Extended Feature Interface
1. Introduction
2. Feature Name and Handlers
3. Enabling Features
4. Type of Handlers
4.1. ext_init Handler
4.2. ext_print_stats Handler
4.3. ext_sfile Handler
5. Extended Feature Reference Implementation
5.1. Instruction-Based Sampling (IBS)
Glossary of OProfile source concepts and types

List of Figures

3.1. The OProfile buffers

Chapter 1. Introduction

Table of Contents

1. Overview
2. Components of the OProfile system
2.1. Architecture-specific components
2.2. oprofilefs
2.3. Generic kernel driver
2.4. The OProfile daemon
2.5. Post-profiling tools

This document is current for OProfile version 1.2.0git. This document provides some details on the internal workings of OProfile for the interested hacker. This document assumes strong C, working C++, plus some knowledge of kernel internals and CPU hardware.

Note

Only the "new" implementation associated with kernel 2.6 and above is covered here. 2.4 uses a very different kernel module implementation and daemon to produce the sample files.

1. Overview

OProfile is a statistical continuous profiler. In other words, profiles are generated by regularly sampling the current registers on each CPU (from an interrupt handler, the saved PC value at the time of interrupt is stored), and converting that runtime PC value into something meaningful to the programmer.

OProfile achieves this by taking the stream of sampled PC values, along with the detail of which task was running at the time of the interrupt, and converting into a file offset against a particular binary file. Because applications mmap() the code they run (be it /bin/bash, /lib/libfoo.so or whatever), it's possible to find the relevant binary file and offset by walking the task's list of mapped memory areas. Each PC value is thus converted into a tuple of binary-image,offset. This is something that the userspace tools can use directly to reconstruct where the code came from, including the particular assembly instructions, symbol, and source line (via the binary's debug information if present).

Regularly sampling the PC value like this approximates what actually was executed and how often - more often than not, this statistical approximation is good enough to reflect reality. In common operation, the time between each sample interrupt is regulated by a fixed number of clock cycles. This implies that the results will reflect where the CPU is spending the most time; this is obviously a very useful information source for performance analysis.

Sometimes though, an application programmer needs different kinds of information: for example, "which of the source routines cause the most cache misses ?". The rise in importance of such metrics in recent years has led many CPU manufacturers to provide hardware performance counters capable of measuring these events on the hardware level. Typically, these counters increment once per each event, and generate an interrupt on reaching some pre-defined number of events. OProfile can use these interrupts to generate samples: then, the profile results are a statistical approximation of which code caused how many of the given event.

Consider a simplified system that only executes two functions A and B. A takes one cycle to execute, whereas B takes 99 cycles. Imagine we run at 100 cycles a second, and we've set the performance counter to create an interrupt after a set number of "events" (in this case an event is one clock cycle). It should be clear that the chances of the interrupt occurring in function A is 1/100, and 99/100 for function B. Thus, we statistically approximate the actual relative performance features of the two functions over time. This same analysis works for other types of events, providing that the interrupt is tied to the number of events occurring (that is, after N events, an interrupt is generated).

There are typically more than one of these counters, so it's possible to set up profiling for several different event types. Using these counters gives us a powerful, low-overhead way of gaining performance metrics. If OProfile, or the CPU, does not support performance counters, then a simpler method is used: the kernel timer interrupt feeds samples into OProfile itself.

The rest of this document concerns itself with how we get from receiving samples at interrupt time to producing user-readable profile information.

2. Components of the OProfile system

2.1. Architecture-specific components

If OProfile supports the hardware performance counters found on a particular architecture, code for managing the details of setting up and managing these counters can be found in the kernel source tree in the relevant arch/arch/oprofile/ directory. The architecture-specific implementation works via filling in the oprofile_operations structure at init time. This provides a set of operations such as setup(), start(), stop(), etc. that manage the hardware-specific details of fiddling with the performance counter registers.

The other important facility available to the architecture code is oprofile_add_sample(). This is where a particular sample taken at interrupt time is fed into the generic OProfile driver code.

2.2. oprofilefs

OProfile implements a pseudo-filesystem known as "oprofilefs", mounted from userspace at /dev/oprofile. This consists of small files for reporting and receiving configuration from userspace, as well as the actual character device that the OProfile userspace receives samples from. At setup() time, the architecture-specific may add further configuration files related to the details of the performance counters. For example, on x86, one numbered directory for each hardware performance counter is added, with files in each for the event type, reset value, etc.

The filesystem also contains a stats directory with a number of useful counters for various OProfile events.

2.3. Generic kernel driver

This lives in drivers/oprofile/, and forms the core of how OProfile works in the kernel. Its job is to take samples delivered from the architecture-specific code (via oprofile_add_sample()), and buffer this data, in a transformed form as described later, until releasing the data to the userspace daemon via the /dev/oprofile/buffer character device.

2.4. The OProfile daemon

The OProfile userspace daemon's job is to take the raw data provided by the kernel and write it to the disk. It takes the single data stream from the kernel and logs sample data against a number of sample files (found in $SESSION_DIR/samples/current/, by default located at /var/lib/oprofile/samples/current/. For the benefit of the "separate" functionality, the names/paths of these sample files are mangled to reflect where the samples were from: this can include thread IDs, the binary file path, the event type used, and more.

After this final step from interrupt to disk file, the data is now persistent (that is, changes in the running of the system do not invalidate stored data). So the post-profiling tools can run on this data at any time (assuming the original binary files are still available and unchanged, naturally).

2.5. Post-profiling tools

So far, we've collected data, but we've yet to present it in a useful form to the user. This is the job of the post-profiling tools. In general form, they collate a subset of the available sample files, load and process each one correlated against the relevant binary file, and finally produce user-readable information.

Chapter 2. Performance counter management

Table of Contents

1. Providing a user interface
2. Programming the performance counter registers
2.1. Starting and stopping the counters
2.2. IA64 and perfmon

1. Providing a user interface

The performance counter registers need programming in order to set the type of event to count, etc. OProfile uses a standard model across all CPUs for defining these events as follows :

event The event type e.g. DATA_MEM_REFS
unit mask The sub-events to count (more detailed specification)
counter The hardware counter(s) that can count this event
count The reset value (how many events before an interrupt)
kernel Whether the counter should increment when in kernel space
user Whether the counter should increment when in user space

The term "unit mask" is borrowed from the Intel architectures, and can further specify exactly when a counter is incremented (for example, cache-related events can be restricted to particular state transitions of the cache lines).

All of the available hardware events and their details are specified in the textual files in the events directory. The syntax of these files should be fairly obvious. The user specifies the names and configuration details of the chosen counters via opcontrol. These are then written to the kernel module (in numerical form) via /dev/oprofile/N/ where N is the physical hardware counter (some events can only be used on specific counters; OProfile hides these details from the user when possible). On IA64, the perfmon-based interface behaves somewhat differently, as described later.

2. Programming the performance counter registers

We have described how the user interface fills in the desired configuration of the counters and transmits the information to the kernel. It is the job of the ->setup() method to actually program the performance counter registers. Clearly, the details of how this is done is architecture-specific; it is also model-specific on many architectures. For example, i386 provides methods for each model type that programs the counter registers correctly (see the op_model_* files in arch/i386/oprofile for the details). The method reads the values stored in the virtual oprofilefs files and programs the registers appropriately, ready for starting the actual profiling session.

The architecture-specific drivers make sure to save the old register settings before doing OProfile setup. They are restored when OProfile shuts down. This is useful, for example, on i386, where the NMI watchdog uses the same performance counter registers as OProfile; they cannot run concurrently, but OProfile makes sure to restore the setup it found before it was running.

In addition to programming the counter registers themselves, other setup is often necessary. For example, on i386, the local APIC needs programming in order to make the counter's overflow interrupt appear as an NMI (non-maskable interrupt). This allows sampling (and therefore profiling) of regions where "normal" interrupts are masked, enabling more reliable profiles.

2.1. Starting and stopping the counters

Initiating a profiling session is done via writing an ASCII '1' to the file /dev/oprofile/enable. This sets up the core, and calls into the architecture-specific driver to actually enable each configured counter. Again, the details of how this is done is model-specific (for example, the Athlon models can disable or enable on a per-counter basis, unlike the PPro models).

2.2. IA64 and perfmon

The IA64 architecture provides a different interface from the other architectures, using the existing perfmon driver. Register programming is handled entirely in user-space (see daemon/opd_perfmon.c for the details). A process is forked for each CPU, which creates a perfmon context and sets the counter registers appropriately via the sys_perfmonctl interface. In addition, the actual initiation and termination of the profiling session is handled via the same interface using PFM_START and PFM_STOP. On IA64, then, there are no oprofilefs files for the performance counters, as the kernel driver does not program the registers itself.

Instead, the perfmon driver for OProfile simply registers with the OProfile core with an OProfile-specific UUID. During a profiling session, the perfmon core calls into the OProfile perfmon driver and samples are registered with the OProfile core itself as usual (with oprofile_add_sample()).

Chapter 3. Collecting and processing samples

Table of Contents

1. Receiving interrupts
2. Core data structures
3. Logging a sample
4. Logging stack traces
5. Synchronising the CPU buffers to the event buffer
6. Identifying binary images
7. Finding a sample's binary image and offset

1. Receiving interrupts

Naturally, how the overflow interrupts are received is specific to the hardware architecture, unless we are in "timer" mode, where the logging routine is called directly from the standard kernel timer interrupt handler.

On the i386 architecture, the local APIC is programmed such that when a counter overflows (that is, it receives an event that causes an integer overflow of the register value to zero), an NMI is generated. This calls into the general handler do_nmi(); because OProfile has registered itself as capable of handling NMI interrupts, this will call into the OProfile driver code in arch/i386/oprofile. Here, the saved PC value (the CPU saves the register set at the time of interrupt on the stack available for inspection) is extracted, and the counters are examined to find out which one generated the interrupt. Also determined is whether the system was inside kernel or user space at the time of the interrupt. These three pieces of information are then forwarded onto the OProfile core via oprofile_add_sample(). Finally, the counter values are reset to the chosen count value, to ensure another interrupt happens after another N events have occurred. Other architectures behave in a similar manner.

2. Core data structures

Before considering what happens when we log a sample, we shall digress for a moment and look at the general structure of the data collection system.

OProfile maintains a small buffer for storing the logged samples for each CPU on the system. Only this buffer is altered when we actually log a sample (remember, we may still be in an NMI context, so no locking is possible). The buffer is managed by a two-handed system; the "head" iterator dictates where the next sample data should be placed in the buffer. Of course, overflow of the buffer is possible, in which case the sample is discarded.

It is critical to remember that at this point, the PC value is an absolute value, and is therefore only meaningful in the context of which task it was logged against. Thus, these per-CPU buffers also maintain details of which task each logged sample is for, as described in the next section. In addition, we store whether the sample was in kernel space or user space (on some architectures and configurations, the address space is not sub-divided neatly at a specific PC value, so we must store this information).

As well as these small per-CPU buffers, we have a considerably larger single buffer. This holds the data that is eventually copied out into the OProfile daemon. On certain system events, the per-CPU buffers are processed and entered (in mutated form) into the main buffer, known in the source as the "event buffer". The "tail" iterator indicates the point from which the CPU may be read, up to the position of the "head" iterator. This provides an entirely lock-free method for extracting data from the CPU buffers. This process is described in detail later in this chapter.

Figure 3.1. The OProfile buffers

The OProfile buffers

3. Logging a sample

As mentioned, the sample is logged into the buffer specific to the current CPU. The CPU buffer is a simple array of pairs of unsigned long values; for a sample, they hold the PC value and the counter for the sample. (The counter value is later used to translate back into the relevant event type the counter was programmed to).

In addition to logging the sample itself, we also log task switches. This is simply done by storing the address of the last task to log a sample on that CPU in a data structure, and writing a task switch entry into the buffer if the new value of current() has changed. Note that later we will directly de-reference this pointer; this imposes certain restrictions on when and how the CPU buffers need to be processed.

Finally, as mentioned, we log whether we have changed between kernel and userspace using a similar method. Both of these variables (last_task and last_is_kernel) are reset when the CPU buffer is read.

4. Logging stack traces

OProfile can also provide statistical samples of call chains (on x86). To do this, at sample time, the frame pointer chain is traversed, recording the return address for each stack frame. This will only work if the code was compiled with frame pointers, but we're careful to abort the traversal if the frame pointer appears bad. We store the set of return addresses straight into the CPU buffer. Note that, since this traversal is keyed off the standard sample interrupt, the number of times a function appears in a stack trace is not an indicator of how many times the call site was executed: rather, it's related to the number of samples we took where that call site was involved. Thus, the results for stack traces are not necessarily proportional to the call counts: typical programs will have many main() samples.

5. Synchronising the CPU buffers to the event buffer

At some point, we have to process the data in each CPU buffer and enter it into the main (event) buffer. The file buffer_sync.c contains the relevant code. We periodically (currently every HZ/4 jiffies) start the synchronisation process. In addition, we process the buffers on certain events, such as an application calling munmap(). This is particularly important for exit() - because the CPU buffers contain pointers to the task structure, if we don't process all the buffers before the task is actually destroyed and the task structure freed, then we could end up trying to dereference a bogus pointer in one of the CPU buffers.

We also add a notification when a kernel module is loaded; this is so that user-space can re-read /proc/modules to determine the load addresses of kernel module text sections. Without this notification, samples for a newly-loaded module could get lost or be attributed to the wrong module.

The synchronisation itself works in the following manner: first, mutual exclusion on the event buffer is taken. Remember, we do not need to do that for each CPU buffer, as we only read from the tail iterator (whilst interrupts might be arriving at the same buffer, but they will write to the position of the head iterator, leaving previously written entries intact). Then, we process each CPU buffer in turn. A CPU switch notification is added to the buffer first (for --separate=cpu support). Then the processing of the actual data starts.

As mentioned, the CPU buffer consists of task switch entries and the actual samples. When the routine sync_buffer() sees a task switch, the process ID and process group ID are recorded into the event buffer, along with a dcookie (see below) identifying the application binary (e.g. /bin/bash). The mmap_sem for the task is then taken, to allow safe iteration across the tasks' list of mapped areas. Each sample is then processed as described in the next section.

After a buffer has been read, the tail iterator is updated to reflect how much of the buffer was processed. Note that when we determined how much data there was to read in the CPU buffer, we also called cpu_buffer_reset() to reset last_task and last_is_kernel, as we've already mentioned. During the processing, more samples may have been arriving in the CPU buffer; this is OK because we are careful to only update the tail iterator to how much we actually read - on the next buffer synchronisation, we will start again from that point.

6. Identifying binary images

In order to produce useful profiles, we need to be able to associate a particular PC value sample with an actual ELF binary on the disk. This leaves us with the problem of how to export this information to user-space. We create unique IDs that identify a particular directory entry (dentry), and write those IDs into the event buffer. Later on, the user-space daemon can call the lookup_dcookie system call, which looks up the ID and fills in the full path of the binary image in the buffer user-space passes in. These IDs are maintained by the code in fs/dcookies.c; the cache lasts for as long as the daemon has the event buffer open.

7. Finding a sample's binary image and offset

We haven't yet described how we process the absolute PC value into something usable by the user-space daemon. When we find a sample entered into the CPU buffer, we traverse the list of mappings for the task (remember, we will have seen a task switch earlier, so we know which task's lists to look at). When a mapping is found that contains the PC value, we look up the mapped file's dentry in the dcookie cache. This gives the dcookie ID that will uniquely identify the mapped file. Then we alter the absolute value such that it is an offset from the start of the file being mapped (the mapping need not start at the start of the actual file, so we have to consider the offset value of the mapping). We store this dcookie ID into the event buffer; this identifies which binary the samples following it are against. In this manner, we have converted a PC value, which has transitory meaning only, into a static offset value for later processing by the daemon.

We also attempt to avoid the relatively expensive lookup of the dentry cookie value by storing the cookie value directly into the dentry itself; then we can simply derive the cookie value immediately when we find the correct mapping.

Chapter 4. Generating sample files

Table of Contents

1. Processing the buffer
1.1. Handling kernel samples
2. Locating and creating sample files
3. Writing data to a sample file

1. Processing the buffer

Now we can move onto user-space in our description of how raw interrupt samples are processed into useful information. As we described in previous sections, the kernel OProfile driver creates a large buffer of sample data consisting of offset values, interspersed with notification of changes in context. These context changes indicate how following samples should be attributed, and include task switches, CPU changes, and which dcookie the sample value is against. By processing this buffer entry-by-entry, we can determine where the samples should be accredited to. This is particularly important when using the --separate.

The file daemon/opd_trans.c contains the basic routine for the buffer processing. The struct transient structure is used to hold changes in context. Its members are modified as we process each entry; it is passed into the routines in daemon/opd_sfile.c for actually logging the sample to a particular sample file (which will be held in $SESSION_DIR/samples/current).

The buffer format is designed for conciseness, as high sampling rates can easily generate a lot of data. Thus, context changes are prefixed by an escape code, identified by is_escape_code(). If an escape code is found, the next entry in the buffer identifies what type of context change is being read. These are handed off to various handlers (see the handlers array), which modify the transient structure as appropriate. If it's not an escape code, then it must be a PC offset value, and the very next entry will be the numeric hardware counter. These values are read and recorded in the transient structure; we then do a lookup to find the correct sample file, and log the sample, as described in the next section.

1.1. Handling kernel samples

Samples from kernel code require a little special handling. Because the binary text which the sample is against does not correspond to any file that the kernel directly knows about, the OProfile driver stores the absolute PC value in the buffer, instead of the file offset. Of course, we need an offset against some particular binary. To handle this, we keep a list of loaded modules by parsing /proc/modules as needed. When a module is loaded, a notification is placed in the OProfile buffer, and this triggers a re-read. We store the module name, and the loading address and size. This is also done for the main kernel image, as specified by the user. The absolute PC value is matched against each address range, and modified into an offset when the matching module is found. See daemon/opd_kernel.c for the details.

2. Locating and creating sample files

We have a sample value and its satellite data stored in a struct transient, and we must locate an actual sample file to store the sample in, using the context information in the transient structure as a key. The transient data to sample file lookup is handled in daemon/opd_sfile.c. A hash is taken of the transient values that are relevant (depending upon the setting of --separate, some values might be irrelevant), and the hash value is used to lookup the list of currently open sample files. Of course, the sample file might not be found, in which case we need to create and open it.

OProfile uses a rather complex scheme for naming sample files, in order to make selecting relevant sample files easier for the post-profiling utilities. The exact details of the scheme are given in oprofile-tests/pp_interface, but for now it will suffice to remember that the filename will include only relevant information for the current settings, taken from the transient data. A fully-specified filename looks something like :

/var/lib/oprofile/samples/current/{root}/usr/bin/xmms/{dep}/{root}/lib/tls/libc-2.3.2.so/CPU_CLK_UNHALTED.100000.0.28082.28089.0

It should be clear that this identifies such information as the application binary, the dependent (library) binary, the hardware event, and the process and thread ID. Typically, not all this information is needed, in which cases some values may be replaced with the token all.

The code that generates this filename and opens the file is found in daemon/opd_mangling.c. You may have realised that at this point, we do not have the binary image file names, only the dcookie values. In order to determine a file name, a dcookie value is looked up in the dcookie cache. This is to be found in daemon/opd_cookie.c. Since dcookies are both persistent and unique during a sampling session, we can cache the values. If the value is not found in the cache, then we ask the kernel to do the lookup from value to file name for us by calling lookup_dcookie(). This looks up the value in a kernel-side cache (see fs/dcookies.c) and returns the fully-qualified file name to userspace.

3. Writing data to a sample file

Each specific sample file is a hashed collection, where the key is the PC offset from the transient data, and the value is the number of samples recorded against that offset. The files are mmap()ed into the daemon's memory space. The code to actually log the write against the sample file can be found in libdb/.

For recording stack traces, we have a more complicated sample filename mangling scheme that allows us to identify cross-binary calls. We use the same sample file format, where the key is a 64-bit value composed from the from,to pair of offsets.

Chapter 5. Generating useful output

Table of Contents

1. Handling the profile specification
2. Collating the candidate sample files
2.1. Classifying sample files
2.2. Creating inverted profile lists
3. Generating profile data
3.1. Processing the binary image
3.2. Processing the sample files
4. Generating output

All of the tools used to generate human-readable output have to take roughly the same steps to collect the data for processing. First, the profile specification given by the user has to be parsed. Next, a list of sample files matching the specification has to obtained. Using this list, we need to locate the binary file for each sample file, and then use them to extract meaningful data, before a final collation and presentation to the user.

1. Handling the profile specification

The profile specification presented by the user is parsed in the function profile_spec::create(). This creates an object representing the specification. Then we use profile_spec::generate_file_list() to search for all sample files and match them against the profile_spec.

To enable this matching process to work, the attributes of each sample file is encoded in its filename. This is a low-tech approach to matching specifications against candidate sample files, but it works reasonably well. A typical sample file might look like these: 

/var/lib/oprofile/samples/current/{root}/bin/ls/{dep}/{root}/bin/ls/{cg}/{root}/bin/ls/CPU_CLK_UNHALTED.100000.0.all.all.all
/var/lib/oprofile/samples/current/{root}/bin/ls/{dep}/{root}/bin/ls/CPU_CLK_UNHALTED.100000.0.all.all.all
/var/lib/oprofile/samples/current/{root}/bin/ls/{dep}/{root}/bin/ls/CPU_CLK_UNHALTED.100000.0.7423.7424.0
/var/lib/oprofile/samples/current/{kern}/r128/{dep}/{kern}/r128/CPU_CLK_UNHALTED.100000.0.all.all.all

This looks unnecessarily complex, but it's actually fairly simple. First we have the session of the sample, by default located here /var/lib/oprofile/samples/current. This location can be changed by specifying the --session-dir option at command-line. This session could equally well be inside an archive from oparchive. Next we have one of the tokens {root} or {kern}. {root} indicates that the binary is found on a file system, and we will encode its path in the next section (e.g. /bin/ls). {kern} indicates a kernel module - on 2.6 kernels the path information is not available from the kernel, so we have to special-case kernel modules like this; we encode merely the name of the module as loaded.

Next there is a {dep} token, indicating another token/path which identifies the dependent binary image. This is used even for the "primary" binary (i.e. the one that was execve()d), as it simplifies processing. Finally, if this sample file is a normal flat profile, the actual file is next in the path. If it's a call-graph sample file, we need one further specification, to allow us to identify cross-binary arcs in the call graph.

The actual sample file name is dot-separated, where the fields are, in order: event name, event count, unit mask, task group ID, task ID, and CPU number.

This sample file can be reliably parsed (with parse_filename()) into a filename_spec. Finally, we can check whether to include the sample file in the final results by comparing this filename_spec against the profile_spec the user specified (for the interested, see valid_candidate() and profile_spec::match). Then comes the really complicated bit...

2. Collating the candidate sample files

At this point we have a duplicate-free list of sample files we need to process. But first we need to do some further arrangement: we need to classify each sample file, and we may also need to "invert" the profiles.

2.1. Classifying sample files

It's possible for utilities like opreport to show data in columnar format: for example, we might want to show the results of two threads within a process side-by-side. To do this, we need to classify each sample file into classes - the classes correspond with each opreport column. The function that handles this is arrange_profiles(). Each sample file is added to a particular class. If the sample file is the first in its class, a template is generated from the sample file. Each template describes a particular class (thus, in our example above, each template will have a different thread ID, and this uniquely identifies each class).

Each class has a list of "profile sets" matching that class's template. A profile set is either a profile of the primary binary image, or any of its dependent images. After all sample files have been listed in one of the profile sets belonging to the classes, we have to name each class and perform error-checking. This is done by identify_classes(); each class is checked to ensure that its "axis" is the same as all the others. This is needed because opreport can't produce results in 3D format: we can only differ in one aspect, such as thread ID or event name.

2.2. Creating inverted profile lists

Remember that if we're using certain profile separation options, such as "--separate=lib", a single binary could be a dependent image to many different binaries. For example, the C library image would be a dependent image for most programs that have been profiled. As it happens, this can cause severe performance problems: without some re-arrangement, these dependent binary images would be opened each time we need to process sample files for each program.

The solution is to "invert" the profiles via invert_profiles(). We create a new data structure where the dependent binary is first, and the primary binary images using that dependent binary are listed as sub-images. This helps our performance problem, as now we only need to open each dependent image once, when we process the list of inverted profiles.

3. Generating profile data

Things don't get any simpler at this point, unfortunately. At this point we've collected and classified the sample files into the set of inverted profiles, as described in the previous section. Now we need to process each inverted profile and make something of the data. The entry point for this is populate_for_image().

3.1. Processing the binary image

The first thing we do with an inverted profile is attempt to open the binary image (remember each inverted profile set is only for one binary image, but may have many sample files to process). The op_bfd class provides an abstracted interface to this; internally it uses libbfd. The main purpose of this class is to process the symbols for the binary image; this is also where symbol filtering happens. This is actually quite tricky, but should be clear from the source.

3.2. Processing the sample files

The class profile_container is a hold-all that contains all the processed results. It is a container of profile_t objects. The add_sample_files() method uses libdb to open the given sample file and add the key/value types to the profile_t. Once this has been done, profile_container::add() is passed the profile_t plus the op_bfd for processing.

profile_container::add() walks through the symbols collected in the op_bfd. op_bfd::get_symbol_range() gives us the start and end of the symbol as an offset from the start of the binary image, then we interrogate the profile_t for the relevant samples for that offset range. We create a symbol_entry object for this symbol and fill it in. If needed, here we also collect debug information from the op_bfd, and possibly record the detailed sample information (as used by opreport -d and opannotate). Finally the symbol_entry is added to a private container of profile_container - this symbol_container holds all such processed symbols.

4. Generating output

After the processing described in the previous section, we've now got full details of what we need to output stored in the profile_container on a symbol-by-symbol basis. To produce output, we need to replay that data and format it suitably.

opreport first asks the profile_container for a symbol_collection (this is also where thresholding happens). This is sorted, then a opreport_formatter is initialised. This object initialises a set of field formatters as requested. Then opreport_formatter::output() is called. This iterates through the (sorted) symbol_collection; for each entry, the selected fields (as set by the format_flags options) are output by calling the field formatters, with the symbol_entry passed in.

Chapter 6. Extended Feature Interface

Table of Contents

1. Introduction
2. Feature Name and Handlers
3. Enabling Features
4. Type of Handlers
4.1. ext_init Handler
4.2. ext_print_stats Handler
4.3. ext_sfile Handler
5. Extended Feature Reference Implementation
5.1. Instruction-Based Sampling (IBS)

1. Introduction

The Extended Feature Interface is a standard callback interface designed to allow extension to the OProfile daemon's sample processing. Each feature defines a set of callback handlers which can be enabled or disabled through the OProfile daemon's command-line option. This interface can be used to implement support for architecture-specific features or features not commonly used by general OProfile users.

2. Feature Name and Handlers

Each extended feature has an entry in the ext_feature_table in opd_extended.cpp. Each entry contains a feature name, and a corresponding set of handlers. Feature name is a unique string, which is used to identify a feature in the table. Each feature provides a set of handlers, which will be executed by the OProfile daemon from pre-determined locations to perform certain tasks. At runtime, the OProfile daemon calls a feature handler wrapper from one of the predetermined locations to check whether an extended feature is enabled, and whether a particular handler exists. Only the handlers of the enabled feature will be executed.

3. Enabling Features

Each feature is enabled using the OProfile daemon (oprofiled) command-line option "--ext-feature=<extended-feature-name>:[args]". The "extended-feature-name" is used to determine the feature to be enabled. The optional "args" is passed into the feature-specific initialization handler (ext_init). Currently, only one extended feature can be enabled at a time.

4. Type of Handlers

Each feature is responsible for providing its own set of handlers. Types of handler are:

4.1. ext_init Handler

"ext_init" handles initialization of an extended feature. It takes "args" parameter which is passed in through the "oprofiled --ext-feature=< extended-feature-name>:[args]". This handler is executed in the function opd_options() in the file daemon/oprofiled.c .

Note

The ext_init handler is required for all features.

4.2. ext_print_stats Handler

"ext_print_stats" handles the extended feature statistics report. It adds a new section in the OProfile daemon statistics report, which is normally outputed to the file /var/lib/oprofile/samples/oprofiled.log. This handler is executed in the function opd_print_stats() in the file daemon/opd_stats.c.

4.3. ext_sfile Handler

"ext_sfile" contains a set of handlers related to operations on the extended sample files (sample files for events related to extended feature). These operations include create_sfile(), sfile_dup(), close_sfile(), sync_sfile(), and get_file() as defined in daemon/opd_sfile.c. An additional field, odb_t * ext_file, is added to the struct sfile for storing extended sample files information.

5. Extended Feature Reference Implementation

5.1. Instruction-Based Sampling (IBS)

An example of extended feature implementation can be seen by examining the AMD Instruction-Based Sampling support.

5.1.1. IBS Initialization

Instruction-Based Sampling (IBS) is a new performance measurement technique available on AMD Family 10h processors. Enabling IBS profiling is done simply by specifying IBS performance events through the "--event=" options. 

opcontrol --event=IBS_FETCH_XXX:<count>:<um>:<kernel>:<user>
opcontrol --event=IBS_OP_XXX:<count>:<um>:<kernel>:<user>

Note: * Count and unitmask for all IBS fetch events must be the same,
	as do those for IBS op.

IBS performance events are listed in opcontrol --list-events. When users specify these events, opcontrol verifies them using ophelp, which checks for the ext:ibs_fetch or ext:ibs_op tag in events/x86-64/family10/events file. Then, it configures the driver interface (/dev/oprofile/ibs_fetch/... and /dev/oprofile/ibs_op/...) and starts the OProfile daemon as follows. 

oprofiled \
    --ext-feature=ibs:\
	fetch:<IBS_FETCH_EVENT1>,<IBS_FETCH_EVENT2>,...,:<IBS fetch count>:<IBS Fetch um>|\
	op:<IBS_OP_EVENT1>,<IBS_OP_EVENT2>,...,:<IBS op count>:<IBS op um>

Here, the OProfile daemon parses the --ext-feature option and checks the feature name ("ibs") before calling the the initialization function to handle the string containing IBS events, counts, and unitmasks. Then, it stores each event in the IBS virtual-counter table (struct opd_event ibs_vc[OP_MAX_IBS_COUNTERS]) and stores the event index in the IBS Virtual Counter Index (VCI) map (ibs_vci_map[OP_MAX_IBS_COUNTERS]) with IBS event value as the map key.

5.1.2. IBS Data Processing

During a profile session, the OProfile daemon identifies IBS samples in the event buffer using the "IBS_FETCH_CODE" or "IBS_OP_CODE". These codes trigger the handlers code_ibs_fetch_sample() or code_ibs_op_sample() listed in the handler_t handlers[] vector in daemon/opd_trans.c . These handlers are responsible for processing IBS samples and translate them into IBS performance events.

Unlike traditional performance events, each IBS sample can be derived into multiple IBS performance events. For each event that the user specifies, a combination of bits from Model-Specific Registers (MSR) are checked against the bitmask defining the event. If the condition is met, the event will then be recorded. The derivation logic is in the files daemon/opd_ibs_macro.h and daemon/opd_ibs_trans.[h,c].

5.1.3. IBS Sample File

Traditionally, sample file information (odb_t) is stored in the struct sfile::odb_t file[OP_MAX_COUNTER]. Currently, OP_MAX_COUNTER is 8 on non-alpha, and 20 on alpha-based system. Event index (the counter number on which the event is configured) is used to access the corresponding entry in the array. Unlike the traditional performance event, IBS does not use the actual counter registers (i.e. /dev/oprofile/0,1,2,3). Also, the number of performance events generated by IBS could be larger than OP_MAX_COUNTER (currently upto 13 IBS-fetch and 46 IBS-op events). Therefore IBS requires a special data structure and sfile handlers (struct opd_ext_sfile_handlers) for managing IBS sample files. IBS-sample-file information is stored in a memory allocated by handler ibs_sfile_create(), which can be accessed through struct sfile::odb_t * ext_files.

Glossary of OProfile source concepts and types

application image

The primary binary image used by an application. This is derived from the kernel and corresponds to the binary started upon running an application: for example, /bin/bash.

binary image

An ELF file containing executable code: this includes kernel modules, the kernel itself (a.k.a. vmlinux), shared libraries, and application binaries.

dcookie

Short for "dentry cookie". A unique ID that can be looked up to provide the full path name of a binary image.

dependent image

A binary image that is dependent upon an application, used with per-application separation. Most commonly, shared libraries. For example, if /bin/bash is running and we take some samples inside the C library itself due to bash calling library code, then the image /lib/libc.so would be dependent upon /bin/bash.

merging

This refers to the ability to merge several distinct sample files into one set of data at runtime, in the post-profiling tools. For example, per-thread sample files can be merged into one set of data, because they are compatible (i.e. the aggregation of the data is meaningful), but it's not possible to merge sample files for two different events, because there would be no useful meaning to the results.

profile class

A collection of profile data that has been collected under the same class template. For example, if we're using opreport to show results after profiling with two performance counters enabled profiling DATA_MEM_REFS and CPU_CLK_UNHALTED, there would be two profile classes, one for each event. Or if we're on an SMP system and doing per-cpu profiling, and we request opreport to show results for each CPU side-by-side, there would be a profile class for each CPU.

profile specification

The parameters the user passes to the post-profiling tools that limit what sample files are used. This specification is matched against the available sample files to generate a selection of profile data.

profile template

The parameters that define what goes in a particular profile class. This includes a symbolic name (e.g. "cpu:1") and the code-usable equivalent.

oprofile-1.3.0/doc/operf.1.in0000664000175000017500000002073213136674771012647 00000000000000.\" Manpage for operf .\" Author: Breno Leitao .\" Modifications: Maynard Johnson .TH OPERF 1 "@DATE@" "oprofile @VERSION@" .SH NAME operf \- Performance profiler tool for Linux .SH SYNOPSIS .B operf [ .I options ] [ --system-wide | --pid | [ command [ args ] ] ] .SH DESCRIPTION Operf is the profiler tool provided with OProfile. Operf uses the Linux Performance Events Subsystem and, thus, does not require the obsolete oprofile kernel driver. .P By default, operf uses /oprofile_data as the session-dir and stores profiling data there. You can change this by way of the .I --session-dir option. The usual post-profiling analysis tools such as .BI opreport(1) and .BI opannotate(1) can be used to generate profile reports. Unless a .I session-dir is specified, the post-processing analysis tools will search for samples in /oprofile_data first. If that directory does not exist, the post-processing tools use the standard session-dir of /var/lib/oprofile. .P Statistics, such as total samples received and lost samples, are written to the operf.log file that can be found in the /samples directory. .br .SH RUN MODES One (and only one) of the following .SB run modes must be specified: .TP .BI command [args] The command or application to be profiled. .I args are the input arguments that the command or application requires. .br .TP .BI "--pid / -p " PID .RS This option enables operf to profile a running application. .I PID should be the process ID of the process you wish to profile. When finished profiling (e.g., when the profiled process ends), press Ctrl-c to stop operf. If you run .BI operf .BI --pid as a background job (i.e., with the &), you .B must stop it in a controlled manner in order for it to process the profile data it has collected. Use .BI kill .BI -SIGINT .BI for this purpose. .P .B Limitation: When using this option to profile a multi-threaded application that also forks new processes, be aware that samples for processes that are forked before profiling is started may not be recorded (depending on timing of thread creation and when operf is started). .RE .TP .BI "--system-wide / -s" This option is for performing a system-wide profile. You must have root authority to run operf in this mode. When finished profiling, Ctrl-c to stop operf. If you run .BI operf .BI --system-wide as a background job (i.e., with the &), you .B must stop it in a controlled manner in order for it to process the profile data it has collected. Use .BI kill .BI -SIGINT .BI for this purpose. It is recommended that when running operf with this option, the user's current working directory should be /root or a subdirectory of /root to avoid storing sample data files in locations accessible by regular users. .br .SH OTHER OPTIONS .TP .BI "--vmlinux / -k " vmlinux_path .RS A vmlinux file that matches the running kernel that has symbol and/or debuginfo. Kernel samples will be attributed to this binary, allowing post-processing tools (like opreport) to attribute samples to the appropriate kernel symbols. .P The kernel symbol information may be obtained from /proc/kallsyms if the user does not specify a vmlinux file. The symbol addresses are given in /proc/kallsyms if permitted by the setting of /proc/sys/kernel/kptr_restrict. .P If the .I --vmlinux option is not used and kernel symbols cannot be obtained from /proc/kallsyms, then all kernel samples are attributed to "no-vmlinux", which is simply a bucket to hold the samples and not an actual file. .RE .TP .BI "--events / -e " event1[,event2[,...]] This option is for passing a comma-separated list of event specifications for profiling. Each event spec is of the form: .br .I " name:count[:unitmask[:kernel[:user]]]" .P .RS The .I count value is used to control the sampling rate for profiling; it is the number of events to occur between samples. The rate is lowered by specifying a higher .I count value \(em i.e., a higher number of events to occur between samples. .P You can specify .I unitmask values using either a numerical value (hex values .I must begin with "0x") or a symbolic name (if the .I name= field is shown in the .B ophelp output). For some named unit masks, the hex value is not unique; thus, OProfile tools enforce specifying such unit masks value by name. If no unit mask is specified, the default unit mask value for the event is used. .P The .I kernel and .I user parts of the event specification are binary values ('1' or '0') indicating whether or not to collect samples for kernel space and user space. .br .B Note: In order to specify the .I kernel/user bits, you must also specify a .I unitmask value, even if the processor type (or the specified event) does not use unit masks \(em in which case, use the value '0' to signify a null unit mask; for example: .br -e INST_RETIRED_ANY_P:100000:0:1:0 .br ^ ^ ^ ^ | | | |--- '0': do not record user space samples | | |-- '1': record kernel space samples | |-- '0': the null unit mask |--count value .P Event names for some IBM PowerPC systems include a .I _GRP (group number) suffix. You can pass either the full event name or the base event name (i.e., without the suffix) to .B operf. If the base event name is passed, .B operf will automatically choose an appropriate group number suffix for the event; thus, OProfile post-processing tools will always show real event names that include the group number suffix. .P When no event specification is given, the default event for the running processor type will be used for profiling. Use .BI ophelp to list the available events for your processor type. .RE .br .TP .BI "--callgraph / -g" This option enables the callgraph to be saved during profiling. NOTE: The full callchain is recorded, so there is no depth limit. .br .TP .BI "--separate-thread / -t" This option categorizes samples by thread group ID (tgid) and thread ID (tid). The '--separate-thread' option is useful for seeing per-thread samples in multi-threaded applications. When used in conjunction with the '--system-wide' option, the '--separate-thread' option is also useful for seeing per-process (i.e., per-thread group) samples for the case where multiple processes are executing the same program during a profiling run. .br .TP .BI "--separate-cpu / -c" This option categorizes samples by cpu. .br .TP .BI "--session-dir / -d " path This option specifies the session path to hold the sample data. If not specified, the data is saved in the .I oprofile_data directory on the current path. .br .TP .BI "--lazy-conversion / -l" .RS Use this option to reduce the overhead of .BI operf during profiling. Normally, profile data received from the kernel is converted to OProfile format during profiling time. This is typically not an issue when profiling a single application. But when using the .I --system-wide option, this on-the-fly conversion process can cause noticeable overhead, particularly on busy multi-processor systems. The .I --lazy-conversion option directs .BI operf to wait until profiling is completed to do the conversion of profile data. .P .B Note: This option is .B not recommended to be used in conjunction with the .I --pid option for profiling multi-threaded processes. Depending on the order of thread creation (or forking of new processes), you may not get any samples for the new threads/processes. .RE .TP .BI "--append / -a" By default, .I operf moves old profile data from /samples/current to /samples/previous. If a 'previous' profile already existed, it will be replaced. If the .I --append option is passed, old profile data is left in place and new profile data will be added to it, and the 'previous' profile (if one existed) will remain untouched. To access the 'previous' profile, simply add a session specification to the normal invocation of oprofile post-processing tools. For example: .br .BI " opreport" .BI session:previous .br .TP .BI "--verbose / -V " level A comma-separated list of debugging control values, used to increase the verbosity of the output. Valid values are: debug, record, convert, misc, sfile, arcs, or the special value, 'all'. .br .TP .BI "--version / -v" Show operf version. .br .TP .BI "--help / -h" Display brief usage message. .br .TP .BI "--usage / -u" Display brief usage message. .br .SH EXAMPLE $ operf make .SH VERSION This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO opreport(1), opannotate(1). oprofile-1.3.0/doc/opjitconv.1.in0000664000175000017500000000134313136675452013541 00000000000000.TH OPJITCONV 1 "@DATE@" "oprofile @VERSION@" .SH NAME opjitconv \- convert jit dump file to an ELF .SH SYNOPSIS .B opjitconv [ .I options ] [ [--debug | --non-root | --delete-jitdumps ] --session-dir= ] .SH DESCRIPTION Convert a jit dump file to an ELF file .SH OPTIONS .TP .BI "--debug" Print debugging information. .br .TP .BI "--non-root" Use when opjitconv was invoked by a non-root user via operf. .br .TP .BI "--delete-jitdumps" Delete jitdump files owned by the user. .br .TP .BI "--session-dir [dir]" Session directory where sample data is stored. .br .TP .BI "--help / -h" Display brief usage message. .br .SH VERSION This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR oprofile(1) oprofile-1.3.0/doc/Makefile.am0000664000175000017500000000473713136675452013105 00000000000000RM=rm MANDIR=$(DESTDIR)@mandir@/man1 XSLTPROC=xsltproc XSLTPROC_FLAGS=@XSLTPROC_FLAGS@ XHTML_STYLESHEET=$(srcdir)/xsl/xhtml.xsl CHUNK_XHTML_STYLESHEET=$(srcdir)/xsl/xhtml-chunk.xsl XML_CATALOG_FILES=xsl/catalog.xml STYLESHEETS=$(CHUNK_XHTML_STYLESHEET) $(srcdir)/xsl/xhtml-common.xsl man_MANS = \ oprofile.1 \ opreport.1 \ opannotate.1 \ opgprof.1 \ ophelp.1 \ op-check-perfevents.1 \ oparchive.1 \ opimport.1 \ opjitconv.1 if BUILD_FOR_PERF_EVENT man_MANS += operf.1 \ ocount.1 endif htmldir = $(prefix)/share/doc/oprofile dist_html_DATA = oprofile.html internals.html opreport.xsd ophelp.xsd op-jit-devel.html if have_xsltproc oprofile.html: ${top_srcdir}/doc/oprofile.xml XML_CATALOG_FILES=$(XML_CATALOG_FILES) $(XSLTPROC) $(XSLTPROC_FLAGS) -o $@ --stringparam version @VERSION@ $(XHTML_STYLESHEET) $< op-jit-devel.html: ${top_srcdir}/doc/op-jit-devel.xml XML_CATALOG_FILES=$(XML_CATALOG_FILES) $(XSLTPROC) $(XSLTPROC_FLAGS) -o $@ --stringparam version @VERSION@ $(XHTML_STYLESHEET) $< internals.html: ${top_srcdir}/doc/internals.xml XML_CATALOG_FILES=$(XML_CATALOG_FILES) $(XSLTPROC) $(XSLTPROC_FLAGS) -o $@ --stringparam version @VERSION@ $(XHTML_STYLESHEET) $< # rules to generate oprofile.sf.net/doc files doc/index.html: ${top_srcdir}/doc/oprofile.xml -mkdir doc/ $(XSLTPROC) -o doc/ $(XSLTPROC_FLAGS) --stringparam version @VERSION@ $(CHUNK_XHTML_STYLESHEET) $< doc/devel/index.html: ${top_srcdir}/doc/op-jit-devel.xml -mkdir doc/devel/ $(XSLTPROC) -o doc/devel/ $(XSLTPROC_FLAGS) --stringparam version @VERSION@ $(CHUNK_XHTML_STYLESHEET) $< doc/internals/index.html: ${top_srcdir}/doc/internals.xml -mkdir doc/internals/ $(XSLTPROC) -o doc/internals/ $(XSLTPROC_FLAGS) --stringparam version @VERSION@ $(CHUNK_XHTML_STYLESHEET) $< chunk: doc/index.html doc/internals/index.html doc/devel/index.html cp ${top_srcdir}/doc/buffers.png doc/internals/ else oprofile.html: touch $@ internals.html: touch $@ op-jit-devel.html: touch $@ chunk: endif distclean-local: $(RM) -f xsl/catalog-1.xml xsl/catalog.xml clean-local: $(RM) -f $(generated_mans) # these files are not cleaned by make uninstall automake bug ? uninstall-local: rm -f @mandir@/cat1/oprofile.1.gz @for f in $(LINK_LIST); do \ rm -f $(CATDIR)/cat1/$$f.gz; \ done EXTRA_DIST = \ oprofile.1 \ oprofile.1.in \ oprofile.xml \ op-jit-devel.xml \ internals.xml \ buffers.png \ xsl/catalog-1.xml.in \ xsl/xhtml.xsl \ xsl/xhtml-common.xsl \ xsl/xhtml-chunk.xsl \ srcdoc/Doxyfile.in \ srcdoc/Makefile oprofile-1.3.0/doc/ophelp.xsd0000664000175000017500000000424413312521545013036 00000000000000 oprofile-1.3.0/doc/opgprof.1.in0000664000175000017500000000312312534404406013166 00000000000000.TH OPGPROF 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME opgprof \- produce gprof-format profile data .SH SYNOPSIS .br .B opgprof [ .I options ] [profile specification] .SH DESCRIPTION .B opgprof outputs gprof-format profile data for a given binary image, from an OProfile session. See oprofile(1) for how to write profile specifications. .SH OPTIONS .TP .BI "--help / -? / --usage" Show help message. .br .TP .BI "--version / -v" Show version. .br .TP .BI "--verbose / -V [options]" Give verbose debugging output. .br .TP .BI "--session-dir="dir_path Use sample database from the specified directory .I dir_path instead of the default location. If .I --session-dir is not specified, then .B opgprof will search for samples in /oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used. .br .TP .BI "--image-path / -p [paths]" Comma-separated list of additional paths to search for binaries. This is needed to find modules in kernels 2.6 and upwards. .br .TP .BI "--root / -R [path]" A path to a filesystem to search for additional binaries. .br .TP .BI "--threshold / -t [percentage]" Only output data for symbols that have more than the given percentage of total samples. .br .TP .BI "--output-filename / -o [file]" Output to the given file instead of the default, gmon.out .SH ENVIRONMENT No special environment variables are recognized by opgprof. .SH FILES .TP .I /samples The location of the generated sample files. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR oprofile(1) oprofile-1.3.0/doc/opreport.1.in0000664000175000017500000000777212603572700013402 00000000000000.TH OPREPORT 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME opreport \- produce symbol or binary image summaries .SH SYNOPSIS .br .B opreport [ .I options ] [profile specification] .SH DESCRIPTION .B opreport outputs binary image summaries, or per-symbol data, from OProfile profiling sessions. See oprofile(1) for how to write profile specifications. .SH OPTIONS .TP .BI "--accumulated / -a" Accumulate sample and percentage counts in the symbol list. .br .TP .BI "--debug-info / -g" Show source file and line for each symbol. .br .TP .BI "--demangle / -D none|smart|normal" none: no demangling. normal: use default demangler (default) smart: use pattern-matching to make C++ symbol demangling more readable. .br .TP .BI "--callgraph / -c" Show call graph information if available. .br .TP .BI "--details / -d" Show per-instruction details for all selected symbols. .br .TP .BI "--exclude-dependent / -x" Do not include application-specific images for libraries, kernel modules and the kernel. This option only makes sense if the profile session used --separate. .br .TP .BI "--exclude-symbols / -e [symbols]" Exclude all the symbols in the given comma-separated list. .br .TP .BI "--global-percent / -%" Make all percentages relative to the whole profile. .br .TP .BI "--help / -? / --usage" Show help message. .br .TP .BI "--image-path / -p [paths]" Comma-separated list of additional paths to search for binaries. This is needed to find modules in kernels 2.6 and upwards. .br .TP .BI "--root / -R [path]" A path to a filesystem to search for additional binaries. .br .TP .BI "--include-symbols / -i [symbols]" Only include symbols in the given comma-separated list. .br .TP .BI "--long-filenames / -f" Output full paths instead of basenames. .br .TP .BI "--merge / -m [lib,cpu,tid,tgid,unitmask,all]" Merge any profiles separated in a --separate session. .br .TP .BI "--no-header / -n" Don't output a header detailing profiling parameters. .br .TP .BI "--output-file / -o [file]" Output to the given file instead of stdout. .br .TP .BI "--reverse-sort / -r" Reverse the sort from the default. .br .TP .BI "--session-dir="dir_path Use sample database from the specified directory .I dir_path instead of the default location. If .I --session-dir is not specified, then .B opreport will search for samples in /oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used. .br .TP .BI "--show-address / -w" Show each symbol's VMA address. .br .TP .BI "--sort / -s [vma,sample,symbol,debug,image]" Sort the list of symbols by, respectively, symbol address, number of samples, symbol name, debug filename and line number, binary image filename. .br .TP .BI "--symbols / -l" List per-symbol information instead of a binary image summary. .br Usually, the total of all per-symbols samples for a given binary image equals the summary count for the binary image (shown by running .B opreport with no options). However, it's possible for some sample addresses to fall outside the range of any symbols for a given binary image. In such cases, the total number of per-symbols samples for the binary image may be less than the summary count for the image. Running .B opreport with the .I --verbose=debug option will display an informational message when this difference is detected. This difference is typically very small and can be ignored. .br .TP .BI "--threshold / -t [percentage]" Only output data for symbols that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the symbol is shown. .br .TP .BI "--verbose / -V [options]" Give verbose debugging output. .br .TP .BI "--version / -v" Show version. .br .TP .BI "--xml / -X" Generate XML output. .SH ENVIRONMENT No special environment variables are recognized by opreport. .SH FILES .TP .I /samples The location of the generated sample files. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR oprofile(1) oprofile-1.3.0/doc/opreport.xsd0000664000175000017500000002550612603572700013426 00000000000000 oprofile-1.3.0/doc/oparchive.1.in0000664000175000017500000000476612546756165013527 00000000000000.TH OPARCHIVE 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME oparchive \- produce archive of oprofile data for offline analysis .SH SYNOPSIS .br .B oparchive [ .I options ] [profile specification] .B -o [directory] .SH DESCRIPTION The .B oparchive utility is commonly used for collecting profile data on a "target" system for future offline analysis on a different ("host") machine. .B oparchive creates a directory populated with executables, libraries, debuginfo files, and oprofile sample files. This directory can be tar'ed up and moved to another machine to be analyzed without further use of the target machine. Using .BI opreport and other post-profiling tools against archived data requires the use of the .I archive: specification. See oprofile(1) for how to write profile specifications. A complete description of offline analysis can be found in the chapter titled .I Analyzing profile data on another system (oparchive) of the OProfile user manual. (See the user manual URL in the "SEE ALSO" section below.) .SH OPTIONS .TP .BI "--help / -? / --usage" Show help message. .br .TP .BI "--version / -v" Show version. .br .TP .BI "--verbose / -V [options]" Give verbose debugging output. .br .TP .BI "--session-dir="dir_path Use sample database from the specified directory .I dir_path instead of the default location. If .I --session-dir is not specified, then .B oparchive will search for samples in /oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used. .br .TP .BI "--image-path / -p [paths]" Comma-separated list of additional paths to search for binaries. This is needed to find modules in kernels 2.6 and upwards. .br .TP .BI "--root / -R [path]" A path to a filesystem to search for additional binaries. .br .TP .BI "--output-directory / -o [directory]" Output to the given directory. There is no default. This must be specified. .br .TP .BI "--exclude-dependent / -x" Do not include application-specific images for libraries, kernel modules and the kernel. This option only makes sense if the profile session used --separate. .br .TP .BI "--list-files / -l" Only list the files that would be archived, don't copy them. .SH ENVIRONMENT No special environment variables are recognized by oparchive. .SH FILES .TP .I /samples The location of the generated sample files. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR file://@OP_DOCDIR@oprofile.html#oparchive .br .BR opimport(1) .br .BR oprofile(1) oprofile-1.3.0/doc/xsl/0000775000175000017500000000000013323173530011710 500000000000000oprofile-1.3.0/doc/xsl/catalog-1.xml.in0000664000175000017500000000121412534404406014527 00000000000000 @CAT_ENTRY_START@ @CAT_ENTRY_END@ oprofile-1.3.0/doc/xsl/xhtml.xsl0000664000175000017500000000074612534404406013525 00000000000000 oprofile-1.3.0/doc/xsl/xhtml-chunk.xsl0000664000175000017500000000342712534404406014632 00000000000000 Error is not a chunk! -//W3C//DTD XHTML 1.0 Transitional//EN http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd oprofile-1.3.0/doc/xsl/xhtml-common.xsl0000664000175000017500000000345412534404406015012 00000000000000
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install-info-am install-man \ install-man1 install-pdf install-pdf-am install-ps \ install-ps-am install-strip installcheck installcheck-am \ installdirs maintainer-clean maintainer-clean-generic \ mostlyclean mostlyclean-generic mostlyclean-libtool pdf pdf-am \ ps ps-am tags-am uninstall uninstall-am \ uninstall-dist_htmlDATA uninstall-local uninstall-man \ uninstall-man1 .PRECIOUS: Makefile @have_xsltproc_TRUE@oprofile.html: ${top_srcdir}/doc/oprofile.xml @have_xsltproc_TRUE@ XML_CATALOG_FILES=$(XML_CATALOG_FILES) $(XSLTPROC) $(XSLTPROC_FLAGS) -o $@ --stringparam version @VERSION@ $(XHTML_STYLESHEET) $< @have_xsltproc_TRUE@op-jit-devel.html: ${top_srcdir}/doc/op-jit-devel.xml @have_xsltproc_TRUE@ XML_CATALOG_FILES=$(XML_CATALOG_FILES) $(XSLTPROC) $(XSLTPROC_FLAGS) -o $@ --stringparam version @VERSION@ $(XHTML_STYLESHEET) $< @have_xsltproc_TRUE@internals.html: ${top_srcdir}/doc/internals.xml @have_xsltproc_TRUE@ XML_CATALOG_FILES=$(XML_CATALOG_FILES) $(XSLTPROC) $(XSLTPROC_FLAGS) -o $@ --stringparam version @VERSION@ $(XHTML_STYLESHEET) $< # rules to generate oprofile.sf.net/doc files @have_xsltproc_TRUE@doc/index.html: ${top_srcdir}/doc/oprofile.xml @have_xsltproc_TRUE@ -mkdir doc/ @have_xsltproc_TRUE@ $(XSLTPROC) -o doc/ $(XSLTPROC_FLAGS) --stringparam version @VERSION@ $(CHUNK_XHTML_STYLESHEET) $< @have_xsltproc_TRUE@doc/devel/index.html: ${top_srcdir}/doc/op-jit-devel.xml @have_xsltproc_TRUE@ -mkdir doc/devel/ @have_xsltproc_TRUE@ $(XSLTPROC) -o doc/devel/ $(XSLTPROC_FLAGS) --stringparam version @VERSION@ $(CHUNK_XHTML_STYLESHEET) $< @have_xsltproc_TRUE@doc/internals/index.html: ${top_srcdir}/doc/internals.xml @have_xsltproc_TRUE@ -mkdir doc/internals/ @have_xsltproc_TRUE@ $(XSLTPROC) -o doc/internals/ $(XSLTPROC_FLAGS) --stringparam version @VERSION@ $(CHUNK_XHTML_STYLESHEET) $< @have_xsltproc_TRUE@chunk: doc/index.html doc/internals/index.html doc/devel/index.html @have_xsltproc_TRUE@ cp ${top_srcdir}/doc/buffers.png doc/internals/ @have_xsltproc_FALSE@oprofile.html: @have_xsltproc_FALSE@ touch $@ @have_xsltproc_FALSE@internals.html: @have_xsltproc_FALSE@ touch $@ @have_xsltproc_FALSE@op-jit-devel.html: @have_xsltproc_FALSE@ touch $@ @have_xsltproc_FALSE@chunk: distclean-local: $(RM) -f xsl/catalog-1.xml xsl/catalog.xml clean-local: $(RM) -f $(generated_mans) # these files are not cleaned by make uninstall automake bug ? uninstall-local: rm -f @mandir@/cat1/oprofile.1.gz @for f in $(LINK_LIST); do \ rm -f $(CATDIR)/cat1/$$f.gz; \ done # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: oprofile-1.3.0/doc/ocount.1.in0000664000175000017500000001640712534404406013032 00000000000000.\" an page for ocount .\" Author: Maynard Johnson .TH ocount 1 "@DATE@" "oprofile @VERSION@" .SH NAME ocount \- Event counting tool for Linux .SH SYNOPSIS .B ocount [ .I options ] [ --system-wide | --process-list | --thread-list | --cpu-list | [ command [ args ] ] ] .SH DESCRIPTION .BI ocount is an OProfile tool that can be used to count native hardware events occurring in either a given application, a set of processes or threads, a subset of active system processors, or the entire system. The data collected during a counting session is displayed to stdout by default or, optionally, to a file. .P When counting multiple events, the kernel may not be able to count all events simultaneously and, thus, may need to multiplex the counting of the events. If this happens, the "Percent time enabled" column in the .B ocount output will be less than 100, but counts are scaled up to a 100% estimated value. .br .SH RUN MODES One (and only one) of the following .SB run modes must be specified. If you run .BI ocount using a run mode other than .BI "command " [args] , press Ctrl-c to stop .BI ocount when finished counting (e.g., when the monitored process ends). If you background .BI ocount (i.e., with '&') while using one these run modes, you .B must stop it in a controlled manner so that the data collection process can be shut down cleanly and final results can be displayed. Use .BI kill .BI -SIGINT .BI for this purpose. .TP .BI "command " [args] The .I command is the application for which to count events. .I args are the input arguments required by the application. The .I command and its arguments .B must be positioned at the end of the command line, after all ocount options. .br .TP .BI "--process-list / -p " pids Use this option to count events for one or more already-running applications, specified via a comma-separated list ( .I pids ). Event counts will be collected for all children of the passed process(es) as well. You must have privileges for the user ID under which the specified process(es) are running; e.g., for a non-root user, the user ID of the process(es) is the same as that used for running ocount. A lack of privileges will result in the following failure message: .br perf_event_open failed with Permission denied .br .TP .BI "--thread-list / -r " tids Use this option to count events for one or more already-running threads, specified via a comma-separated list ( .I tids ). Event counts will .B not be collected for any children of the passed thread(s). See the description of .I --process-list concerning required privileges. .br .TP .BI "--system-wide / -s" This option is for counting events for all processes running on your system. You must have root authority to run ocount in this mode. .br .TP .BI "--cpu-list / -C " cpus This option is for counting events on a subset of processors on your system. You must have root authority to run ocount in this mode. This is a comma-separated list, where each element in the list may be either a single processor number or a range of processor numbers; for example: '-C 2,3,4-11,15'. .br .SH OTHER OPTIONS .TP .BI "--events / -e " event1[,event2[,...]] This option is for passing a comma-separated list of event specifications for counting. Each event spec is of the form: .br .I " name[:unitmask[:kernel[:user]]]" .br .B Note: Do .B not include a .I count value in the event spec, as that parameter is only needed when profiling. .P .RS You can specify .I unitmask values using either a numerical value (hex values .I must begin with "0x") or a symbolic name (if the .I name= field is shown in the .B ophelp output). For some named unit masks, the hex value is not unique; thus, OProfile tools enforce specifying such unit masks value by name. If no unit mask is specified, the default unit mask value for the event is used. .P The .I kernel and .I user parts of the event specification are binary values ('1' or '0') indicating whether or not to count events in kernel space and user space. .br .B Note: In order to specify the .I kernel/user bits, you must also specify a .I unitmask value, even if the running processor type does not use unit masks \(em in which case, use the value '0' to signify a null unit mask; for example: .br -e INST_RETIRED_ANY_P:0:1:0 .br ^ ^ ^ | | |--- '0': do not count user space events | |-- '1': count kernel space events |-- '0': the null unit mask .P Event names for certain processor types include a .I "_GRP" suffix. For such cases, the .I --events option may be specified with or without the .I "_GRP" suffix. .P When no event specification is given, the default event for the running processor type will be used for counting. Use .BI ophelp to list the available events for your processor type. .RE .br .TP .BI "--separate-thread / -t" This option can be used in conjunction with either the .I --process-list or .I --thread-list option to display event counts on a per-thread (per-process) basis. Without this option, all counts are aggregated. .P .RS .BI NOTE: If new threads are started by the process(es) being monitored after counting begins, the counts for those threads are aggregated with their parent's counts. .RE .br .TP .BI "--separate-cpu / -c" This option can be used in conjunction with either the .I --system-wide or .I --cpu-list option to display event counts on a per-cpu basis. Without this option, all counts are aggregated. .br .TP .BI "--time-interval / -i " interval_length[:num_intervals] .B Note: The .I "interval_length" is given in milliseconds. However, the current implementation only supports 100 ms granularity, so the given .I "interval_length" will be rounded to the nearest 100 ms. Results collected for each time interval are printed immediately instead of the default of one dump of cumulative event counts at the end of the run. Counters are reset to zero at the start of each interval. .P .RS If .I num_intervals is specified, .BI ocount exits after the specified number of intervals occur. .RE .TP .BI "--brief-format / -b" Use this option to print results in the following brief format: .br [cpu or thread,][:umask[:K:U]],, .br [ ,]< string >[< u32>[]],< u64 >,< double > The umask, .BR K ernel and .BR U ser modes are only printed if the values were specified as part of the event. The 'K' and 'U' fields are binary fields separated by colons, where the value for each binary field may be either '0' or '1'. .P .RS If .I --timer-interval is specified, a separate line formatted as .br timestamp,[.n] .br is printed ahead of each dump of event counts. If the time interval specified is less than one second, the timestamp will have 1/10 second precision. .RE .TP .BI "--output-file / -f " outfile_name Results are written to .I outfile_name instead of interactively to the terminal. .br .TP .BI "--verbose / -V" Use this option to increase the verbosity of the output. .br .TP .BI "--version / -v" Show ocount version. .br .TP .BI "--help / -h" Display brief usage message. .br .TP .BI "--usage / -u" Display brief usage message. .br .SH EXAMPLE $ ocount make .SH VERSION This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO operf(1). oprofile-1.3.0/doc/oprofile.html0000664000175000017500000066323513124775657013567 00000000000000 OProfile manual

OProfile manual

Copyright © 2000-2004 Victoria University of Manchester, John Levon and others

Table of Contents

1. Introduction
1. OProfile legacy profiling mode
2. OProfile perf_events profiling mode
3. OProfile event counting mode
4. Applications of OProfile
4.1. Support for dynamically compiled (JIT) code
4.2. No support for virtual machine guests
5. System requirements
6. Internet resources
7. Installation
8. Uninstalling OProfile
2. Overview
1. Getting started with OProfile using operf
2. Getting started with OProfile using ocount
3. Specifying performance counter events
4. Tools summary
3. Controlling the profiler
1. Using operf
2. Setting up the JIT profiling feature
2.1. JVM instrumentation
3. Configuration details
3.1. Hardware performance counters
3.2. OProfile timer interrupt mode
3.3. Architecture-specific configuration notes
4. Obtaining profiling results
1. Profile specifications
1.1. Examples
1.2. Profile specification parameters
1.3. Locating and managing binary images
1.4. What to do when you don't get any results
2. Image summaries and symbol summaries (opreport)
2.1. Merging separate profiles
2.2. Side-by-side multiple results
2.3. Callgraph output
2.4. Differential profiles with opreport
2.5. Anonymous executable mappings
2.6. XML formatted output
2.7. Options for opreport
3. Outputting annotated source (opannotate)
3.1. Locating source files
3.2. Usage of opannotate
4. OProfile results with JIT samples
5. gprof-compatible output (opgprof)
5.1. Usage of opgprof
6. Analyzing profile data on another system (oparchive)
6.1. Usage of oparchive
7. Converting sample database files (opimport)
7.1. Usage of opimport
5. Interpreting profiling results
1. Profiling interrupt latency
2. Kernel profiling
2.1. Interrupt masking
2.2. Idle time
2.3. Profiling kernel modules
3. Interpreting call-graph profiles
4. Inaccuracies in annotated source
4.1. Side effects of optimizations
4.2. Prologues and epilogues
4.3. Inlined functions
4.4. Inaccuracy in line number information
5. Assembly functions
6. Overlapping symbols in JITed code
7. Using operf to profile fork/execs
8. Other discrepancies
6. Controlling the event counter
1. Using ocount
7. Acknowledgments

Chapter 1. Introduction

Table of Contents

1. OProfile legacy profiling mode
2. OProfile perf_events profiling mode
3. OProfile event counting mode
4. Applications of OProfile
4.1. Support for dynamically compiled (JIT) code
4.2. No support for virtual machine guests
5. System requirements
6. Internet resources
7. Installation
8. Uninstalling OProfile

This manual applies to OProfile version 1.2.0git. OProfile is a set of performance monitoring tools for Linux 2.6 and higher systems, available on a number of architectures. OProfile provides the following features:

  • Profiler
  • Post-processing tools for analyzing profile data
  • Event counter

OProfile is capable of monitoring native hardware events occurring in all parts of a running system, from the kernel (including modules and interrupt handlers) to shared libraries to binaries. OProfile can collect event information for the whole system in the background with very little overhead. These features make it ideal for monitoring entire systems to determine bottle necks in real-world systems.

Many CPUs provide "performance counters", hardware registers that can count "events"; for example, cache misses, or CPU cycles. OProfile can collect profiles of code based on the number of these occurring events: repeatedly, every time a certain (configurable) number of events has occurred, the PC value is recorded. This information is aggregated into profiles for each binary image. Alternatively, OProfile's event counting tool can collect simple raw event counts.

1. OProfile legacy profiling mode

Prior to release 1.0, OProfile included a profiling tool consisting of the opcontrol shell script, the oprofiled daemon, and the attendant oprofile kernel driver. This "legacy profiler" was deprecated in release 0.9.8 with the introduction of the operf profiling tool (see Section 2, “OProfile perf_events profiling mode”). Some older architectures/platforms do not support the use of operf. For those cases, oprofile users should install release 0.9.9, which is the last release to include the legacy profiler.

2. OProfile perf_events profiling mode

OProfile has the ability to profile a single process or every currently running process (i.e., system-wide) via the operf program. operf interfaces with the kernel to collect samples via the Linux Kernel Performance Events Subsystem (hereafter referred to as "perf_events"). OProfile can co-exist with other tools on your system that may also be using the perf_events kernel subsystem.

Using operf to profile a single process can be done as a normal user; however, root authority is required to run operf in system-wide profiling mode.

Note

Some older processor models are not supported by the underlying perf_events kernel and, thus, are not supported by operf. If you receive the message 
  Your kernel's Performance Events Subsystem does not support your processor type
when attempting to use operf, install OProfile 0.9.9 and try profiling with opcontrol to see if your processor type may be supported by OProfile's legacy mode.

3. OProfile event counting mode

OProfile provides the ocount tool for collecting raw event counts on a per-application, per-process, per-cpu, or system-wide basis. Unlike the profiling tools, post-processing of the data collected is not necessary -- the data is displayed in the output of ocount. A common use case for event counting tools is when performance analysts want to determine the CPI (cycles per instruction) for an application. High CPI implies possible stalls, and many architectures provide events that give detailed information about the different types of stalls. The events provided are architecture-specific, so we refer the reader to the hardware manuals available for the processor type being used.

4. Applications of OProfile

OProfile is useful in a number of situations. You might want to use OProfile when you :

  • need low overhead

  • cannot use highly intrusive profiling methods

  • need to profile interrupt handlers

  • need to profile an application and its shared libraries

  • need to profile dynamically compiled code of supported virtual machines (see Section 4.1, “Support for dynamically compiled (JIT) code”)

  • need to capture the performance behaviour of entire system

  • want to examine hardware effects such as cache misses

  • want detailed source annotation

  • want instruction-level profiles

  • want call-graph profiles

OProfile is not a panacea. OProfile might not be a complete solution when you :

  • require call graph profiles on platforms other than x86, ARM, and PowerPC

  • require 100% instruction-accurate profiles

  • need function call counts or an interstitial profiling API

  • cannot tolerate any disturbance to the system whatsoever

  • need to profile interpreted or dynamically compiled code of non-supported virtual machines

4.1. Support for dynamically compiled (JIT) code

OProfile provides a framework to support JITed code ("just-in-time (JIT) compiled code"). A development library is provided to allow developers to add support for any VM (virtual machine) that produces dynamically compiled code (see the OProfile JIT agent developer guide). In addition, built-in support is included for the following:

  • JVMTI agent library for Java (1.5 and higher)
  • JVMPI agent library for Java (1.5 and lower)
These libraries make it possible for OProfile to attribute profile samples to Java methods. Without a VM-specific agent library, OProfile will typically report samples from JITed code similar to the following example: 
     anon: <tgid><address range>
For information on how to use OProfile's JIT support, see Section 2, “Setting up the JIT profiling feature”.

4.2. No support for virtual machine guests

OProfile currently does not support event-based profiling (i.e, using hardware events like cache misses, branch mispredicts) on virtual machine guests running under systems such as VMware. (Note: KVM guests are supported.) The list of supported events displayed by ophelp is based on CPU type and does not take into account whether the running system is a guest system or real system. To use OProfile on such guest systems, you must use the legacy profiler's timer mode (see Section 3.2, “OProfile timer interrupt mode”).

5. System requirements

Linux kernel

Release 2.6.31 or higher

Supported architectures

AMD, ARM, Intel, PowerPC, Tile, MIPS

Required libraries

These libraries are required : popt, bfd, liberty (debian users: libiberty is provided in binutils-dev package), dl, plus the standard C++ libraries.

Required kernel headers

Either the kernel-headers package must be installed or use the --with-kernel configure option.

Required user account

For secure processing of sample data from JIT virtual machines (e.g., Java), the special user account "oprofile" must exist on the system. The 'configure' and 'make install' operations will print warning messages if this account is not found. If you intend to profile JITed code, you must create a group account named 'oprofile' and then create the 'oprofile' user account, setting the default group to 'oprofile'. A runtime error message is printed to the oprofile log when processing JIT samples if this special user account cannot be found.

ELF

Probably not too strenuous a requirement, but older A.OUT binaries/libraries are not supported.

K&R coding style

OK, so it's not really a requirement, but I wish it was...

6. Internet resources

Web page

There is a web page (which you may be reading now) at http://oprofile.sf.net/.

Download

You can download a source tarball or check out code from the code repository at the sourceforge page, http://sf.net/projects/oprofile/.

Mailing list

There is a low-traffic OProfile-specific mailing list, details at http://sf.net/mail/?group_id=16191.

Bug tracker

There is a bug tracker for OProfile at SourceForge, http://sourceforge.net/p/oprofile/bugs/.

IRC channel

Several OProfile developers and users sometimes hang out on channel #oprofile on the OFTC network.

7. Installation

First you need to build OProfile and install it. ./configure, make, make install is often all you need, but note these arguments to ./configure :

--with-java

Use this option if you need to profile Java applications. Also, see Section 5, “System requirements”, "Required user account". This option is used to specify the location of the Java Development Kit (JDK) source tree you wish to use. This is necessary to get the interface description of the JVMPI (or JVMTI) interface to compile the JIT support code successfully.

Note

The Java Runtime Environment (JRE) does not include the development files that are required to compile the JIT support code, so the full JDK must be installed in order to use this option.

By default, the Oprofile JIT support libraries will be installed in <oprof_install_dir>/lib/oprofile. To build and install OProfile and the JIT support libraries as 64-bit, you can do something like the following: 

			# CFLAGS="-m64" CXXFLAGS="-m64" ./configure \
			--with-java={my_jdk_installdir} \
			--libdir=/usr/local/lib64

Note

If you encounter errors building 64-bit, you should install libtool 1.5.26 or later since that release of libtool fixes known problems for certain platforms. If you install libtool into a non-standard location, you'll need to edit the invocation of 'aclocal' in OProfile's autogen.sh as follows (assume an install location of /usr/local):

aclocal -I m4 -I /usr/local/share/aclocal

--disable-werror

Development versions of OProfile build by default with -Werror. This option turns -Werror off.

--disable-optimization

Disable the -O2 compiler flag (useful if you discover an OProfile bug and want to give a useful back-trace etc.)

--with-kernel

This option is used to specify the location of the kernel headers include directory needed to build the perf_events-enabled operf program. By default, the OProfile build system expects to find this directory under /usr. Use this option if your kernel headers are in a non-standard location or if building in a cross-compile enviroment or in a situation where the host system does not support perf_events but you wish to build binaries for a target system that does support perf_events.

It is recommended that if you have a uniprocessor machine, you enable the local APIC / IO_APIC support for your kernel (this is automatically enabled for SMP kernels). With many BIOS (kernel >= 2.6.9 and UP kernel) it's not sufficient to enable the local APIC -- you must also turn it on explicitly at boot time by providing the "lapic" option to the kernel. If you use the NMI watchdog, be aware that the watchdog is disabled when profiling starts and not re-enabled until the profiling is stopped.

8. Uninstalling OProfile

You must have the source tree available to uninstall OProfile; a make uninstall will remove all installed files except your configuration file in the directory ~/.oprofile.

Chapter 2. Overview

Table of Contents

1. Getting started with OProfile using operf
2. Getting started with OProfile using ocount
3. Specifying performance counter events
4. Tools summary

1. Getting started with OProfile using operf

Profiling with operf allows you to precisely target your profiling (i.e., single process or system-wide). With operf, there is no initial setup needed -- simply invoke operf with the options you need; then run the OProfile post-processing tool(s). The operf syntax is as follows: 

operf [ options ] [ --system-wide | --pid=<PID> | [ command [ args ] ] ]

A typical usage might look like this: 

operf ./my_test_program my_arg

When ./my_test_program completes (or when you press Ctrl-C), profiling stops and you're ready to use opreport or other OProfile post-processing tools. By default, operf stores the sample data in <cur_dir>/oprofile_data/samples/current, and opreport and other post-processing tools will look in that location first for profile data, unless you pass the --session-dir option.

2. Getting started with OProfile using ocount

ocount is an OProfile tool that can be used to count native hardware events occurring in either a specific application, a set of processes or threads, a set of active system processors, or the entire system. The data collected during a counting session is displayed to stdout by default, but may also be saved to a file. The ocount syntax is as follows: 

ocount [ options ] [ --system-wide | --process-list <pids> | --thread-list <tids> | --cpu-list <cpus> [ command [ args ] ] ]

A typical usage might look like this: 

ocount --events=CPU_CLK_UNHALTED,INST_RETIRED /home/user1/my_test_program my_arg

When my_test_program completes (or when you press Ctrl-C), counting stops and the results are displayed to the screen (as shown below). 

Events were actively counted for 2.8 seconds.
Event counts (actual) for /home/user1/my_test_program:
	Event                   Count                    % time counted
	CPU_CLK_UNHALTED        9,408,018,070            100.00
	INST_RETIRED            16,719,918,108           100.00

3. Specifying performance counter events

Whether profiling with operf or doing simple event counting with ocount, you can collect information about one more native hardware events using the --events option -- a comma-separated list of event specfications. The event specification is the means to provide details of how each hardware performance counter should be set up. For profiling, the event specification is a colon-separated string of the form name:count:unitmask:kernel:user as described in the table below. For ocount, specification is of the form name:unitmask:kernel:user. Note the presence of the count field for profiling. The count field tells the profiler how many events should occur between a profile snapshot (usually referred to as a "sample"). Since ocount does not do sampling, the count field is not needed.

If no event specs are passed to operf or ocount, the default event will be used.

Note

The perf_events kernel subsystem allocates hardware counters as necessary, but some processor types have restrictions as to what hardware events may be counted simultaneously. The kernel employs a multiplexing technique when such hardware restrictions are encountered, such that events are monitored on a rotating basis.

name The symbolic event name, e.g. CPU_CLK_UNHALTED
count The counter reset value, e.g. 100000; use only for profiling
unitmask The unit mask, as given in the events list: e.g. 0x0f; or a symbolic name if a name=<um_name> field is present
kernel Enable profiling of kernel code
user Enable profiling of userspace code

The last three values are optional; if you omit them (e.g. operf --events=DATA_MEM_REFS:30000), they will be set to the default values (i.e., the default unit mask value for the given event, and profiling (or counting) both kernel and userspace code will be enabled). Note that on some architectures, some events may require a unit mask be specified.

You can specify unit mask values using either a numerical value (hex values must begin with "0x") or a symbolic name (if the name=<um_name> field is shown in the ophelp output). For some named unit masks, the hex value is not unique; thus, OProfile tools enforce specifying such unit masks value by name.

The table below lists the default profiling event for various processor types. The same events can be used for ocount, minus the count field.

Processor cpu_type Default event
Alpha EV67 alpha/ev67 CYCLES:100000:0:1:1
ARM/XScale PMU1 arm/xscale1 CPU_CYCLES:100000:0:1:1
ARM/XScale PMU2 arm/xscale2 CPU_CYCLES:100000:0:1:1
ARM/MPCore arm/mpcore CPU_CYCLES:100000:0:1:1
Athlon i386/athlon CPU_CLK_UNHALTED:100000:0:1:1
Pentium Pro i386/ppro CPU_CLK_UNHALTED:100000:0:1:1
Pentium II i386/pii CPU_CLK_UNHALTED:100000:0:1:1
Pentium III i386/piii CPU_CLK_UNHALTED:100000:0:1:1
Pentium M (P6 core) i386/p6_mobile CPU_CLK_UNHALTED:100000:0:1:1
Pentium 4 (non-HT) i386/p4 GLOBAL_POWER_EVENTS:100000:1:1:1
Pentium 4 (HT) i386/p4-ht GLOBAL_POWER_EVENTS:100000:1:1:1
Hammer x86-64/hammer CPU_CLK_UNHALTED:100000:0:1:1
Family10h x86-64/family10 CPU_CLK_UNHALTED:100000:0:1:1
Family11h x86-64/family11h CPU_CLK_UNHALTED:100000:0:1:1
IBM pseries ppc64/power{ 4|5|6|7|8|9|970 } CYCLES:100000:0:1:1
IBM s390 s390/{ z10|z196|zEC12 } HWSAMPLING:4127518:0:1:1

4. Tools summary

This section gives a brief description of the available OProfile utilities and their purpose.

ophelp

This utility lists the available events and short descriptions.

operf

This is the program for collecting profile data, discussed in Section 1, “Using operf”.

ocount

This tool is used for simple event counting, as described in in Section 1, “Using ocount”.

agent libraries

Used by virtual machines (like the Java VM) to record information about JITed code being profiled. See Section 2, “Setting up the JIT profiling feature”.

opreport

This is the main tool for retrieving useful profile data, described in Section 2, “Image summaries and symbol summaries (opreport)”.

opannotate

This utility can be used to produce annotated source, assembly or mixed source/assembly. Source level annotation is available only if the application was compiled with debugging symbols. See Section 3, “Outputting annotated source (opannotate)”.

opgprof

This utility can output gprof-style data files for a binary, for use with gprof -p. See Section 5, “gprof-compatible output (opgprof)”.

oparchive

This utility can be used to collect executables, debuginfo, and sample files and copy the files into an archive. The archive is self-contained and can be moved to another machine for further analysis. See Section 6, “Analyzing profile data on another system (oparchive)”.

opimport

This utility converts sample database files from a foreign binary format (abi) to the native format. This is useful only when moving sample files between hosts for analysis on platforms other than the one used for collection. See Section 7, “Converting sample database files (opimport)”.

Chapter 3. Controlling the profiler

Table of Contents

1. Using operf
2. Setting up the JIT profiling feature
2.1. JVM instrumentation
3. Configuration details
3.1. Hardware performance counters
3.2. OProfile timer interrupt mode
3.3. Architecture-specific configuration notes

1. Using operf

This section describes in detail how operf is used to control profiling. Unless otherwise directed, operf will profile using the default event for your system. For most systems, the default event is some cycles-based event, assuming your processor type supports hardware performance counters. If your hardware does support performance counters, you can specify something other than the default hardware event on which to profile. The performance monitor counters can be programmed to count various hardware events, such as cache misses or MMX operations. The event chosen for each counter is reflected in the profile data collected by OProfile: functions and binaries at the top of the profiles reflect that most of the chosen events happened within that code.

Additionally, each counter is programmed with a "count" value, which corresponds to how detailed the profile is. The lower the value, the more frequently profile samples are taken. You can choose to sample only kernel code, user-space code, or both (both is the default). Finally, some events have a "unit mask" -- this is a value that further restricts the type of event being counted. You can see the event types and unit masks for your CPU using ophelp. More information on event specification can be found at Section 3, “Specifying performance counter events”.

The operf command syntax is: 

operf [ options ] [ --system-wide | --pid=<PID> | [ command [ args ] ] ]

When profiling an application using either the command or --pid option of operf, forks and execs of the profiled process will also be profiled. The samples from an exec'ed process will be attributed to the executable binary run by that process. See Section 7, “Using operf to profile fork/execs”

Following is a description of the operf options.

command [args]

The command or application to be profiled. The [args] are the input arguments that the command or application requires. Either command, --pid or --system-wide is required, but cannot be used simultaneously.

--pid / -p [PID]

This option enables operf to profile a running application. PID should be the process ID of the process you wish to profile. When finished profiling (e.g., when the profiled process ends), press Ctrl-c to stop operf.

--system-wide / -s

This option is for performing a system-wide profile. You must have root authority to run operf in this mode. When finished profiling, Ctrl-C to stop operf. If you run operf --system-wide as a background job (i.e., with the &), you must stop it in a controlled manner in order to process the profile data it has collected. Use kill -SIGINT <operf-PID> for this purpose. It is recommended that when running operf with this option, your current working directory should be /root or a subdirectory of /root to avoid storing sample data files in locations accessible by regular users.

--vmlinux / k [vmlinux_path]

A vmlinux file that matches the running kernel that has symbol and/or debuginfo. Kernel samples will be attributed to this binary, allowing post-processing tools (like opreport) to attribute samples to the appropriate kernel symbols. If this option is not specified, the file /proc/kallsyms is used to obtain kernel symbol addresses correponding to sample addresses. However, the setting of /proc/sys/kernel/kptr_restrict may restrict a non-root user's access to /proc/kallsyms, in which case, all kernel samples are attributed to a pseudo binary named "no-vmlinux".

--callgraph / -g

This option enables the callgraph to be saved during profiling. NOTE: The full callchain is recorded, so there is no depth limit.

--append / -a

By default, operf moves old profile data from <session_dir>/samples/current to <session_dir>/samples/previous. If a 'previous' profile already existed, it will be replaced. If the --append option is passed, old profile data in 'current' is left in place and new profile data will be added to it, and the 'previous' profile (if one existed) will remain untouched. To access the 'previous' profile, simply add a session specification to the normal invocation of oprofile post-processing tools; for example: 

opreport session:previous

--events / -e [event1[,event2[,...]]]

This option is for passing a comma-separated list of event specifications for profiling. Each event spec is of the form: 

name:count[:unitmask[:kernel[:user]]]

When no event specification is given, the default event for the running processor type will be used for profiling. Use ophelp to list the available events for your processor type.

--separate-thread / -t

This option categorizes samples by thread group ID (tgid) and thread ID (tid). The --separate-thread option is useful for seeing per-thread samples in multi-threaded applications. When used in conjuction with the --system-wide option, --separate-thread is also useful for seeing per-process (i.e., per-thread group) samples for the case where multiple processes are executing the same program during a profiling run.

--separate-cpu / -c

This option categorizes samples by cpu.

--session-dir / -d [path]

This option specifies the session directory to hold the sample data. If not specified, the data is saved in the oprofile_data directory on the current path.

---lazy-conversion / -l

Use this option to reduce the overhead of operf during profiling. Normally, profile data received from the kernel is converted to OProfile format during profiling time. This is typically not an issue when profiling a single application. But when using the --system-wide option, this on-the-fly conversion process can cause noticeable overhead, particularly on busy multi-processor systems. The --lazy-conversion option directs operf to wait until profiling is completed to do the conversion of profile data.

--verbose / -V [level]

A comma-separated list of debugging control values used to increase the verbosity of the output. Valid values are: debug, record, convert, misc, sfile, arcs, and the special value, 'all'.

--version -v

Show operf version.

--help / -h

Show a help message.

2. Setting up the JIT profiling feature

To gather information about JITed code from a virtual machine, it needs to be instrumented with an agent library. We use the agent libraries for Java in the following example. To use the Java profiling feature, you must build OProfile with the "--with-java" option (Section 7, “Installation”).

2.1. JVM instrumentation

Add this to the startup parameters of the JVM (for JVMTI): 

-agentpath:<libdir>/libjvmti_oprofile.so[=<options>]

or 

-agentlib:jvmti_oprofile[=<options>]

The JVMPI agent implementation is enabled with the command line option 

-Xrunjvmpi_oprofile[:<options>]

Currently, there is just one option available -- debug. For JVMPI, the convention for specifying an option is option_name=[yes|no]. For JVMTI, the option specification is simply the option name, implying "yes"; no option specified implies "no".

The agent library (installed in <oprof_install_dir>/lib/oprofile) needs to be in the library search path (e.g. add the library directory to LD_LIBRARY_PATH). If the command line of the JVM is not accessible, it may be buried within shell scripts or a launcher program. It may also be possible to set an environment variable to add the instrumentation. For Sun JVMs this is JAVA_TOOL_OPTIONS. Please check your JVM documentation for further information on the agent startup options.

3. Configuration details

3.1. Hardware performance counters

Most processor models include performance monitor units that can be configured to monitor (count) various types of hardware events. This section is where you can find architecture-specific information to help you use these events for profiling. You do not really need to read this section unless you are interested in using events other than the default event chosen by OProfile.

Note

Your CPU type may not include the requisite support for hardware performance counters, in which case you must use OProfile in timer mode (see Section 3.2, “OProfile timer interrupt mode”), which is only available in OProfile releases prior to 1.0.

The Intel hardware performance counters are detailed in the Intel IA-32 Architecture Manual, Volume 3, available from http://developer.intel.com/. The AMD Athlon/Opteron/Phenom/Turion implementation is detailed in http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/22007.pdf. For IBM PowerPC processors, documentation is available at https://www.power.org/. For example, https://www.power.org/events/Power7 contains specific information on the performance monitor unit for the IBM POWER7.

A physical performance monitor counter (PMC) is configured by a profiling tool to count a particular type of event. When the counter overflows, an interrupt is delivered to the processor. This is the basic mechanism on which OProfile is based. The delivery mode is NMI, so blocking interrupts in the kernel does not prevent profiling. When the interrupt handler is called, the current PC (program counter) value and the current task are recorded into the profiling structure. This allows the overflow event to be attributed to a specific assembly instruction in a specific binary image. OProfile receives this data (commonly referred to as a "sample") from the kernel and writes it to the sample files.

If we use an event such as CPU_CLK_UNHALTED or INST_RETIRED (GLOBAL_POWER_EVENTS or INSTR_RETIRED, respectively, on the Pentium 4), we can use the overflow counts (samples) as an estimate of actual time spent in each part of code. Alternatively we can profile interesting data such as the cache behaviour of routines with the other available counters.

However there are several caveats. First, there are those issues listed in the Intel manual. There is a delay between the counter overflow and the interrupt delivery that can skew results on a small scale - this means you cannot rely on the profiles at the instruction level as being perfectly accurate. For example, if you are profiling an application with an event that counts L1 cache misses, a sample attributed to a particular instruction in the application doesn't necessarily mean that exact instruction is responsible for that event; instead, it means the sample was taken in the dynamic vicinity of that instruction, usually with a margin of error of a few instructions. Further details on this problem can be found in Chapter 5, Interpreting profiling results and also in the Digital paper "ProfileMe: A Hardware Performance Counter".

Each counter has several configuration parameters besides the type of event to count. First, there is the unit mask, which is used to further qualify exactly what to count. Second, there is the count field, discussed below. Third, there are parameters to specify whether to increment counts whilst in kernel or user space. You can configure these separately for each counter.

When the profiler is initially setup, a performance monitor counter is chosen for counting the event, and it is initialized using the count value. Once profiling begins, the counter increments with each event detected, and the counter overflows when the count value is reached. As described above, the counter overflow generates an interrupt, and the sample is recorded. After each overflow event, the counter is re-initialized using the count value, and counting begins anew for the next sample. Higher values for count result in samples being taken less frequently, and therefore less-detailed (and, potentially, less accurate) profiling. Lower values mean more detail, but higher overhead. Picking a good value for this parameter is, unfortunately, somewhat of a black art. It is of course dependent on the event you have chosen. Specifying too large a value will mean not enough interrupts are generated to give a realistic profile (though this problem can be ameliorated by profiling for longer time periods. Specifying too small a value can lead to higher performance overhead.

3.2. OProfile timer interrupt mode

Some CPU types do not provide the needed hardware support for hardware performance counters. Additionally, some older architectures are not supported by the perf_events kernel subsystem. On such machines, the operf and ocount commands will exit with a message indicating the processor type is not supported. However, you can install OProfile 0.9.9 and use the legacy opcontrol-based profiler, which will fall back to using timer interrupts for profiling. Note that in timer mode, OProfile is not able to profile code that has interrupts disabled.

Note

Timer mode is only available using the legacy opcontrol command, available in releases prior to 1.0.

3.3. Architecture-specific configuration notes

3.3.1. Pentium 4 support

The Pentium 4 / Xeon performance counters are organized around 3 types of model specific registers (MSRs): 45 event selection control registers (ESCRs), 18 counter configuration control registers (CCCRs) and 18 counters. ESCRs describe a particular set of events which are to be recorded, and CCCRs bind ESCRs to counters and configure their operation. Unfortunately the relationship between these registers is quite complex; they cannot all be used with one another at any time. There is, however, a subset of 8 counters, 8 ESCRs, and 8 CCCRs which can be used independently of one another, so OProfile only accesses those registers, treating them as a bank of 8 "normal" counters, similar to those in the P6 or Athlon/Opteron/Phenom/Turion families of CPU.

There is currently no support for Precision Event-Based Sampling (PEBS), nor any advanced uses of the Debug Store (DS). Current support is limited to the conservative extension of OProfile's existing interrupt-based model described above.

3.3.2. PowerPC64 support

The performance monitoring unit (PMU) for the IBM PowerPC 64-bit processors consists of between 4 and 8 counters (depending on the model). Advanced features such as instruction matching and thresholding are not supported by OProfile.

Chapter 4. Obtaining profiling results

Table of Contents

1. Profile specifications
1.1. Examples
1.2. Profile specification parameters
1.3. Locating and managing binary images
1.4. What to do when you don't get any results
2. Image summaries and symbol summaries (opreport)
2.1. Merging separate profiles
2.2. Side-by-side multiple results
2.3. Callgraph output
2.4. Differential profiles with opreport
2.5. Anonymous executable mappings
2.6. XML formatted output
2.7. Options for opreport
3. Outputting annotated source (opannotate)
3.1. Locating source files
3.2. Usage of opannotate
4. OProfile results with JIT samples
5. gprof-compatible output (opgprof)
5.1. Usage of opgprof
6. Analyzing profile data on another system (oparchive)
6.1. Usage of oparchive
7. Converting sample database files (opimport)
7.1. Usage of opimport

After collecting profile data, the raw data must undergo special processing in order for you to perform your analysis. The analysis tools that perform this special processing are opreport, opannotate, and opgprof. Additionally, the oparchive is used to gather together profile data, sampled binary files, etc. for the purpose of off-line analysis. While not really an analysis tool, oparchive is put in that category for convenience since it takes many of the same options as the other analysis tools.

1. Profile specifications

All of the analysis tools take a profile specification as an input argument. This is a set of definitions that describes the specific profile data that should be examined. The simplest profile specification is empty: this will match all the available profile files for the current session.

Specification parameters are of the form name:value[,value]. For example, if I wanted to get a combined symbol summary for /bin/myprog and /bin/myprog2, I could do opreport -l image:/bin/myprog,/bin/myprog2. As a special case, you don't actually need to specify the image: part of the specification. Anything left on the command line after all other opreport options have been processed is assumed to be an image: name. Similarly, if no session: is specified, then session:current is assumed ("current" is a special name of the current (i.e., most recent) profiling session).

In addition to the comma-separated list shown above, some of the specification parameters can take glob-style values. For example, if I want to see image summaries for all binaries profiled in /usr/bin/, I could do opreport image:/usr/bin/\*. Note the necessity to escape the special character from the shell.

For opreport, profile specifications can be used to define two profiles, giving differential output. This is done by enclosing each of the two specifications within curly braces, as shown in the examples below. Any specifications outside of curly braces are shared across both.

1.1. Examples

Image summaries for all profiles with DATA_MEM_REFS samples in the saved session called "stresstest" : 

# opreport session:stresstest event:DATA_MEM_REFS

Symbol summary for the application called "test_sym53c8xx,9xx". Note the escaping is necessary as image: takes a comma-separated list. 

# opreport -l ./test/test_sym53c8xx\,9xx

Image summaries for all binaries in the test directory, excepting boring-test : 

# opreport image:./test/\* image-exclude:./test/boring-test

Differential profile of a binary stored in two archives : 

# opreport -l /bin/bash { archive:./orig } { archive:./new }

Differential profile of an archived binary with the current session : 

# opreport -l /bin/bash { archive:./orig } { }

1.2. Profile specification parameters

archive: archivepath

A path to an archive made with oparchive. Absence of this tag, unlike others, means "the current system", equivalent to specifying "archive:".

session: sessionlist

A comma-separated list of session names to resolve in. Absence of this tag, unlike others, means "the current session", equivalent to specifying "session:current".

session-exclude: sessionlist

A comma-separated list of sessions to exclude.

image: imagelist

A comma-separated list of image names to resolve. Each entry may be relative path, glob-style name, or full path, e.g.

opreport 'image:/usr/bin/oprofiled,*op*,./opreport'
image-exclude: imagelist

Same as image:, but the matching images are excluded.

lib-image: imagelist

Same as image:, but only for images that are for a particular primary binary image (namely, an application).

lib-image-exclude: imagelist

Same as lib-image:, but the matching images are excluded.

event: eventlist

The symbolic event name to match on, e.g. event:DATA_MEM_REFS. You can pass a list of events for side-by-side comparison with opreport.

count: eventcountlist

The event count to match on, e.g. event:DATA_MEM_REFS count:30000. Note that this value refers to the count value in the event spec you passed to operf when setting up to do a profile run. It has nothing to do with the sample counts in the profile data itself. You can pass a list of events for side-by-side comparison with opreport.

unit-mask: masklist

The unit mask value of the event to match on, e.g. unit-mask:1. You can pass a list of events for side-by-side comparison with opreport.

cpu: cpulist

Only consider profiles for the given numbered CPU (starting from zero). This is only useful when using CPU profile separation.

tgid: pidlist

Only consider profiles for the given task groups. Unless some program is using threads, the task group ID of a process is the same as its process ID. This option corresponds to the POSIX notion of a thread group. This is only useful when using per-process profile separation.

tid: tidlist

Only consider profiles for the given threads. When using recent thread libraries, all threads in a process share the same task group ID, but have different thread IDs. You can use this option in combination with tgid: to restrict the results to particular threads within a process. This is only useful when using per-process profile separation.

1.3. Locating and managing binary images

Each session's sample files can be found in the $SESSION_DIR/samples/ directory (default for operf is <cur_dir>/oprofile_data/samples/). These are used, along with the binary image files, to produce human-readable data. In some circumstances (e.g., kernel modules), OProfile will not be able to find the binary images. All the tools have an --image-path option to which you can pass a comma-separated list of alternate paths to search. For example, I can let OProfile find my 2.6 modules by using --image-path /lib/modules/2.6.0/kernel/. It is your responsibility to ensure that the correct images are found when using this option.

Note that if a binary image changes after the sample file was created, you won't be able to get useful symbol-based data out. This situation is detected for you. If you replace a binary, you should make sure to save the old binary if you need to do comparative profiles.

1.4. What to do when you don't get any results

When attempting to get output, you may see the error : 

error: no sample files found: profile specification too strict ?

What this is saying is that the profile specification you passed in, when matched against the available sample files, resulted in no matches. There are a number of reasons this might happen:

spelling

You specified a binary name, but spelt it wrongly. Check your spelling !

profiler wasn't running

Make very sure that OProfile was actually up and running when you ran the application you wish to profile.

application didn't run long enough

Remember OProfile is a statistical profiler - you're not guaranteed to get samples for short-running programs. You can help this by using a lower count for the performance counter, so there are a lot more samples taken per second.

application spent most of its time in libraries

Similarly, if the application spends little time in the main binary image itself, with most of it spent in shared libraries it uses, you might not see any samples for the binary image (i.e., executable) itself.

specification was really too strict

For example, you specified something like tgid:3433, but no task with that group ID ever ran the code.

application didn't generate any events

If you're profiling a particular event, for example counting MMX operations, the code might simply have not generated any events in the first place. Verify the code you're profiling does what you expect it to.

you didn't specify kernel module name correctly

If you're trying to get reports for a kernel module, make sure to use the -p option, and specify the module name with the .ko extension. Check if the module is one loaded from initrd.

2. Image summaries and symbol summaries (opreport)

The opreport utility is the primary utility you will use for getting formatted data out of OProfile. It produces two types of data: image summaries and symbol summaries. An image summary lists the number of samples for individual binary images such as libraries or applications. Symbol summaries provide per-symbol profile data. In the following truncated example, we see an image summary for the whole system: 

$ opreport --long-filenames
CPU: Intel Sandy Bridge microarchitecture, speed 2401 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (No unit mask) count 100000
CPU_CLK_UNHALT...|
  samples|      %|
------------------
    22577 28.9011 /usr/bin/Xorg
        CPU_CLK_UNHALT...|
          samples|      %|
        ------------------
            16846 74.6158 /proc/kallsyms
             2126  9.4167 /usr/bin/Xorg
              763  3.3795 /usr/lib64/libpixman-1.so.0.26.2
              ...
    17402 22.2766 /usr/lib/jvm/java-1.7.0-openjdk-1.7.0.55.x86_64/jre/bin/java
        CPU_CLK_UNHALT...|
          samples|      %|
        ------------------
             5666 32.5595 anon (tgid:29664 range:0x7f3475000000-0x7f347616ffff)
             2312 13.2858 /usr/lib/jvm/java-1.7.0-openjdk-1.7.0.55.x86_64/jre/lib/amd64/server/libjvm.so
             ...
    11554 14.7904 /home/user1/oprof-install/bin/operf
        CPU_CLK_UNHALT...|
          samples|      %|
        ------------------
             7467 64.6270 /proc/kallsyms
             1691 14.6356 /usr/bin/operf
             1324 11.4592 /lib64/libc-2.12.so
              455  3.9380 /usr/lib64/libstdc++.so.6.0.13
              315  2.7263 /ext4
              ...
    ...

If we had specified --symbols in the previous command, we would have gotten a symbol summary of all the images across the entire system. We can restrict this to only part of the system profile; for example, below is a symbol summary for the operf program used to collect the profile. 

$ opreport -l -p /lib/modules/`uname -r` `which operf` 2>/dev/null | more
CPU: Intel Sandy Bridge microarchitecture, speed 2401 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (No unit mask) count 100000
samples  %        image name               symbol name
860       7.4607  kallsyms                 avtab_search_node
474       4.1121  operf                    OP_perf_utils::op_write_event(event_union*, unsigned long long)
461       3.9993  kallsyms                 avc_has_perm_noaudit
455       3.9473  libstdc++.so.6.0.13      /usr/lib64/libstdc++.so.6.0.13
412       3.5742  libc-2.12.so             _IO_vfscanf
369       3.2012  kallsyms                 __d_lookup
350       3.0363  kallsyms                 sidtab_context_to_sid
274       2.3770  operf                    OP_perf_utils::op_record_process_exec_mmaps(int, int, int, operf_record*)
232       2.0127  operf                    operf_process_info::find_mapping_for_sample(unsigned long long, bool)
222       1.9259  kallsyms                 __link_path_walk
191       1.6570  kallsyms                 pipe_read
34        0.2950  ext4.ko                  ext4_mark_iloc_dirty
...

These are the two basic ways you are most likely to use regularly, but opreport can do a lot more than that, as described below.

2.1. Merging separate profiles

If you have used one of the --separate[*] options whilst profiling, there can be several separate profiles for a single binary image within a session. Normally the output will keep these images separated. So, for example, if you profiled with separation on a per-cpu basis (operf --separate-cpu), you would see separate columns in the output of opreport for each CPU where samples were recorded. But it can be useful to merge these results back together to make the report more readable. The --merge option allows you to do that.

2.2. Side-by-side multiple results

If you have used multiple events when profiling, by default you get side-by-side results of each event's sample values from opreport. You can restrict which events to list by appropriate use of the event: profile specifications, etc.

2.3. Callgraph output

This section provides details on how to use the OProfile callgraph feature.

2.3.1. Callgraph details

When using the --callgraph option, you can see what functions are calling other functions in the output. Consider the following program: 

#include <string.h>
#include <stdlib.h>
#include <stdio.h>

#define SIZE 500000

static int compare(const void *s1, const void *s2)
{
        return strcmp(s1, s2);
}

static void repeat(void)
{
        int i;
        char *strings[SIZE];
        char str[] = "abcdefghijklmnopqrstuvwxyz";

        for (i = 0; i < SIZE; ++i) {
                strings[i] = strdup(str);
                strfry(strings[i]);
        }

        qsort(strings, SIZE, sizeof(char *), compare);
}

int main()
{
        while (1)
                repeat();
}

When running with the call-graph option, OProfile will record the function stack every time it takes a sample. opreport --callgraph outputs an entry for each function, where each entry looks similar to: 

samples  %        image name               symbol name
  197       0.1548  cg                       main
  127036   99.8452  cg                       repeat
84590    42.5084  libc-2.3.2.so            strfry
  84590    66.4838  libc-2.3.2.so            strfry [self]
  39169    30.7850  libc-2.3.2.so            random_r
  3475      2.7312  libc-2.3.2.so            __i686.get_pc_thunk.bx
-------------------------------------------------------------------------------

Here the non-indented line is the function we're focussing upon (strfry()). This line is the same as you'd get from a normal opreport output.

Above the non-indented line we find the functions that called this function (for example, repeat() calls strfry()). The samples and percentage values here refer to the number of times we took a sample where this call was found in the stack; the percentage is relative to all other callers of the function we're focussing on. Note that these values are not call counts; they only reflect the call stack every time a sample is taken; that is, if a call is found in the stack at the time of a sample, it is recorded in this count.

Below the line are functions that are called by strfry() (called callees). It's clear here that strfry() calls random_r(). We also see a special entry with a "[self]" marker. This records the normal samples for the function, but the percentage becomes relative to all callees. This allows you to compare time spent in the function itself compared to functions it calls. Note that if a function calls itself, then it will appear in the list of callees of itself, but without the "[self]" marker; so recursive calls are still clearly separable.

You may have noticed that the output lists main() as calling strfry(), but it's clear from the source that this doesn't actually happen. See Section 3, “Interpreting call-graph profiles” for an explanation.

2.3.2. Callgraph is not supported with JIT samples

Callgraph output where anonymously mapped code is in the callstack can sometimes be misleading. For all such code, the samples for the anonymously mapped code are stored in a samples subdirectory named {anon:anon}/<tgid>.<begin_addr>.<end_addr>. As stated earlier, if this anonymously mapped code is JITed code from a supported VM like Java, OProfile creates an ELF file to provide a (somewhat) permanent backing file for the code. However, when viewing callgraph output, any anonymously mapped code in the callstack will be attributed to anon (<tgid>: range:<begin_addr>-<end_addr>, even if a .jo ELF file had been created for it. See the example below. 

-------------------------------------------------------------------------------
  1         2.2727  libj9ute23.so            java.bin                 traceV
  2         4.5455  libj9ute23.so            java.bin                 utsTraceV
  4         9.0909  libj9trc23.so            java.bin                 fillInUTInterfaces
  37       84.0909  libj9trc23.so            java.bin                 twGetSequenceCounter
8         0.0154  libj9prt23.so            java.bin                 j9time_hires_clock
  27       61.3636  anon (tgid:10014 range:0x100000-0x103000) java.bin                 (no symbols)
  9        20.4545  libc-2.4.so              java.bin                 gettimeofday
  8        18.1818  libj9prt23.so            java.bin                 j9time_hires_clock [self]
-------------------------------------------------------------------------------

The output shows that "anon (tgid:10014 range:0x100000-0x103000)" was a callee of j9time_hires_clock, even though the ELF file 10014.jo was created for this profile run. Unfortunately, there is currently no way to correlate that anonymous callgraph entry with its corresponding .jo file.

2.4. Differential profiles with opreport

Often, we'd like to be able to compare two profiles. For example, when analysing the performance of an application, we'd like to make code changes and examine the effect of the change. This is supported in opreport by giving a profile specification that identifies two different profiles. The general form is of: 

$ opreport <shared-spec> { <first-profile> } { <second-profile> }

Note

We lost our Dragon book down the back of the sofa, so you have to be careful to have spaces around those braces, or things will get hopelessly confused. We can only apologise.

For each of the profiles, the shared section is prefixed, and then the specification is analysed. The usual parameters work both within the shared section, and in the sub-specification within the curly braces.

A typical way to use this feature is with archives created with oparchive. Let's look at an example: 

$ operf ./a
$ oparchive -o orig ./a
  # edit and recompile a
$ operf ./a
  # now compare the current profile of a with the archived profile
$ opreport  --session-dir=`pwd`/oprofile_data/ -xl ./a { archive:./orig } { }
CPU: PIII, speed 863.233 MHz (estimated)
Counted CPU_CLK_UNHALTED events (clocks processor is not halted) with a
unit mask of 0x00 (No unit mask) count 100000
samples  %        diff %    symbol name
92435    48.5366  +0.4999   a
54226    ---      ---       c
49222    25.8459  +++       d
48787    25.6175  -2.2e-01  b

Note that we specified an empty second profile in the curly braces, as we wanted to use the current session; alternatively, we could have specified another archive, or a tgid etc. We specified the binary a in the shared section, so we matched that in both the profiles we're diffing.

As in the normal output, the results are sorted by the number of samples, and the percentage field represents the relative percentage of the symbol's samples in the second profile.

Notice the new column in the output. This value represents the percentage change of the relative percent between the first and the second profile: roughly, "how much more important this symbol is". Looking at the symbol a(), we can see that it took roughly the same amount of the total profile in both the first and the second profile. The function c() was not in the new profile, so has been marked with ---. Note that the sample value is the number of samples in the first profile; since we're displaying results for the second profile, we don't list a percentage value for it, as it would be meaningless. d() is new in the second profile, and consequently marked with +++.

When comparing profiles between different binaries, it should be clear that functions can change in terms of VMA and size. To avoid this problem, opreport considers a symbol to be the same if the symbol name, image name, and owning application name all match; any other factors are ignored. Note that the check for application name means that trying to compare library profiles between two different applications will not work as you might expect: each symbol will be considered different.

2.5. Anonymous executable mappings

Many applications, typically ones involving dynamic compilation into machine code (just-in-time, or "JIT", compilation), have executable mappings that are not backed by an ELF file. opreport has basic support for showing the samples taken in these regions; for example: 

$ opreport /usr/bin/mono -l
CPU: ppc64 POWER5, speed 1654.34 MHz (estimated)
Counted CYCLES events (Processor Cycles using continuous sampling) with a unit mask of 0x00 (No unit mask) count 100000
samples  %        image name    		                symbol name
47       58.7500  mono                     			(no symbols)
14       17.5000  anon (tgid:3189 range:0xf72aa000-0xf72fa000)  (no symbols)
9        11.2500  anon (tgid:3189 range:0xf6cca000-0xf6dd9000)  (no symbols)
.	 .	  .						.

Note that, since such mappings are dependent upon individual invocations of a binary, these mappings are always listed as a dependent image. Equally, the results are not affected by the --merge option.

As shown in the opreport output above, OProfile is unable to attribute the samples to any symbol(s) because there is no ELF file for this code. Enhanced support for JITed code is now available for some virtual machines; e.g., the Java Virtual Machine. For details about OProfile output for JITed code, see Section 4, “OProfile results with JIT samples”.

For more information about JIT support in OProfile, see Section 4.1, “Support for dynamically compiled (JIT) code”.

2.6. XML formatted output

The --xml option can be used to generate XML instead of the usual text format. This allows opreport to eliminate some of the constraints dictated by the two dimensional text format. For example, it is possible to separate the sample data across multiple events, cpus and threads. The XML schema implemented by opreport is found in doc/opreport.xsd. It contains more detailed comments about the structure of the XML generated by opreport.

Since XML is consumed by a client program rather than a user, its structure is fairly static. In particular, the --sort option is incompatible with the --xml option. Percentages are not dislayed in the XML so the options related to percentages will have no effect. Full pathnames are always displayed in the XML so --long-filenames is not necessary. The --details option will cause all of the individual sample data to be included in the XML as well as the instruction byte stream for each symbol (for doing disassembly) and can result in very large XML files.

2.7. Options for opreport

--accumulated / -a

Accumulate sample and percentage counts in the symbol list.

--callgraph / -c

Show callgraph information.

--debug-info / -g

Show source file and line for each symbol.

--demangle / -D none|normal|smart

none: no demangling. normal: use default demangler (default) smart: use pattern-matching to make C++ symbol demangling more readable.

--details / -d

Show per-instruction details for all selected symbols. Note that, for binaries without symbol information, the VMA values shown are raw file offsets for the image binary.

--exclude-dependent / -x

Do not include application-specific images for libraries, kernel modules and the kernel..

--exclude-symbols / -e [symbols]

Exclude all the symbols in the given comma-separated list.

--global-percent / -%

Make all percentages relative to the whole profile.

--help / -? / --usage

Show help message.

--image-path / -p [paths]

Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules.

--root / -R [path]

A path to a filesystem to search for additional binaries.

--include-symbols / -i [symbols]

Only include symbols in the given comma-separated list.

--long-filenames / -f

Output full paths instead of basenames.

--merge / -m [lib,cpu,tid,tgid,unitmask,all]

Merge any profiles separated in a --separate session.

--no-header

Don't output a header detailing profiling parameters.

--output-file / -o [file]

Output to the given file instead of stdout.

--reverse-sort / -r

Reverse the sort from the default.

--session-dir=dir_path

Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then opreport will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory.

--show-address / -w

Show the VMA address of each symbol (off by default).

--sort / -s [vma,sample,symbol,debug,image]

Sort the list of symbols by, respectively, symbol address, number of samples, symbol name, debug filename and line number, binary image filename.

--symbols / -l

List per-symbol information instead of a binary image summary.

--threshold / -t [percentage]

Only output data for symbols that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the symbol is shown.

--verbose / -V [options]

Give verbose debugging output.

--version / -v

Show version.

--xml / -X

Generate XML output.

3. Outputting annotated source (opannotate)

The opannotate utility generates annotated source files or assembly listings, optionally mixed with source. If you want to see the source file, the profiled application needs to have debug information, and the source must be available through this debug information. For GCC, you must use the -g option when you are compiling. If the binary doesn't contain sufficient debug information, you can still use opannotate --assembly to get annotated assembly as long as the binary has (at least) symbol information.

Note that for the reason explained in Section 3.1, “Hardware performance counters” the results can be inaccurate. The debug information itself can add other problems; for example, the line number for a symbol can be incorrect. Assembly instructions can be re-ordered and moved by the compiler, and this can lead to crediting source lines with samples not really "owned" by this line. Also see Chapter 5, Interpreting profiling results.

You can output the annotation to one single file, containing all the source found using the --source. You can use this in conjunction with --assembly to get combined source/assembly output.

You can also output a directory of annotated source files that maintains the structure of the original sources. Each line in the annotated source is prepended with the samples for that line. Additionally, each symbol is annotated giving details for the symbol as a whole. An example: 

$ opannotate --source --output-dir=annotated /usr/local/oprofile-pp/bin/oprofiled
$ ls annotated/home/moz/src/oprofile-pp/daemon/
opd_cookie.h  opd_image.c  opd_kernel.c  opd_sample_files.c  oprofiled.c

Line numbers are maintained in the source files, but each file has a footer appended describing the profiling details. The actual annotation looks something like this : 

...
               :static uint64_t pop_buffer_value(struct transient * trans)
 11510  1.9661 :{ /* pop_buffer_value total:  89901 15.3566 */
               :        uint64_t val;
               :
 10227  1.7469 :        if (!trans->remaining) {
               :                fprintf(stderr, "BUG: popping empty buffer !\n");
               :                exit(EXIT_FAILURE);
               :        }
               :
               :        val = get_buffer_value(trans->buffer, 0);
  2281  0.3896 :        trans->remaining--;
  2296  0.3922 :        trans->buffer += kernel_pointer_size;
               :        return val;
 10454  1.7857 :}
...

The first number on each line is the number of samples, whilst the second is the relative percentage of total samples.

3.1. Locating source files

Of course, opannotate needs to be able to locate the source files for the binary image(s) in order to produce output. Some binary images have debug information where the given source file paths are relative, not absolute. You can specify search paths to look for these files (similar to gdb's dir command) with the --search-dirs option.

Sometimes you may have a binary image which gives absolute paths for the source files, but you have the actual sources elsewhere (commonly, you've installed an SRPM for a binary on your system and you want annotation from an existing profile). You can use the --base-dirs option to redirect OProfile to look somewhere else for source files. For example, imagine we have a binary generated from a source file that is given in the debug information as /tmp/build/libfoo/foo.c, and you have the source tree matching that binary installed in /home/user/libfoo/. You can redirect OProfile to find foo.c correctly like this : 

$ opannotate --source --base-dirs=/tmp/build/libfoo/ --search-dirs=/home/user/libfoo/ --output-dir=annotated/ /lib/libfoo.so

You can specify multiple (comma-separated) paths to both options.

3.2. Usage of opannotate

--assembly / -a

Output annotated assembly. If this is combined with --source, then mixed source / assembly annotations are output.

--base-dirs / -b [paths]/

Comma-separated list of path prefixes. This can be used to point OProfile to a different location for source files when the debug information specifies an absolute path on your system for the source that does not exist. The prefix is stripped from the debug source file paths, then searched in the search dirs specified by --search-dirs.

--demangle / -D none|normal|smart

none: no demangling. normal: use default demangler (default) smart: use pattern-matching to make C++ symbol demangling more readable.

--exclude-dependent / -x

Do not include application-specific images for libraries, kernel modules and the kernel.

--exclude-file [files]

Exclude all files in the given comma-separated list of glob patterns. This option is supported solely with the --source option. It can be used to filter out source files in the output using the following types of specifications:

  • filenames (basename -- i.e., no path)
  • filename glob specifications (all files whose base filename matches the given pattern)
  • directory segments (all source files located in the specified directory; e.g. "libio")
  • directory segment glob specifications (e.g., "libi*")

--exclude-symbols / -e [symbols]

Exclude all the symbols in the given comma-separated list.

--help / -? / --usage

Show help message.

--image-path / -p [paths]

Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules.

--root / -R [path]

A path to a filesystem to search for additional binaries.

--include-file [files]

Only include files in the given comma-separated list of glob patterns. The same rules apply for this option as for the --exclude-file option.

--include-symbols / -i [symbols]

Only include symbols in the given comma-separated list.

--objdump-params [params]

Pass the given parameters as extra values when calling objdump. If more than one option is to be passed to objdump, the parameters must be enclosed in a quoted string.

An example of where this option is useful is when your toolchain does not automatically recognize instructions that are specific to your processor. For example, on IBM POWER7/RHEL 6, objdump must be told that a binary file may have POWER7-specific instructions. The opannotate option to show the POWER7-specific instructions is: 

   --objdump-params=-Mpower7

The opannotate option to show the POWER7-specific instructions, the source code (--source) and the line numbers (-l) would be: 

   --objdump-params="-Mpower7 -l --source"

--output-dir / -o [dir]

Output directory. This makes opannotate output one annotated file for each source file. This option can't be used in conjunction with --assembly.

--search-dirs / -d [paths]

Comma-separated list of paths to search for source files. This is useful to find source files when the debug information only contains relative paths.

--source / -s

Output annotated source. This requires debugging information to be available for the binaries.

--session-dir=dir_path

Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then opannotate will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory.

--threshold / -t [percentage]

For annotated assembly, only output data for symbols that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the symbol is shown.

For annotated source, only output data for source files that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the source file is shown.

--verbose / -V [options]

Give verbose debugging output.

--version / -v

Show version.

4. OProfile results with JIT samples

After profiling a Java (or other supported VM) application, the OProfile JIT support creates ELF binaries from the intermediate files that were written by the agent library. The ELF binaries are named <tgid>.jo. With the symbol information stored in these ELF files, it is possible to map samples to the appropriate symbols.

The usual analysis tools (opreport and/or opannotate) can now be used to get symbols and assembly code for the instrumented VM processes.

Below is an example of a profile report of a Java application that has been instrumented with the provided agent library. 

$ opreport -l /usr/lib/jvm/jre-1.5.0-ibm/bin/java
CPU: Core Solo / Duo, speed 2167 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Unhalted clock cycles) with a unit mask of 0x00 (Unhalted core cycles) count 100000
samples  %        image name               symbol name
186020   50.0523  no-vmlinux               no-vmlinux               (no symbols)
34333     9.2380  7635.jo                  java                     void test.f1()
19022     5.1182  libc-2.5.so              libc-2.5.so              _IO_file_xsputn@@GLIBC_2.1
18762     5.0483  libc-2.5.so              libc-2.5.so              vfprintf
16408     4.4149  7635.jo                  java                     void test$HelloThread.run()
16250     4.3724  7635.jo                  java                     void test$test_1.f2(int)
15303     4.1176  7635.jo                  java                     void test.f2(int, int)
13252     3.5657  7635.jo                  java                     void test.f2(int)
5165      1.3897  7635.jo                  java                     void test.f4()
955       0.2570  7635.jo                  java                     void test$HelloThread.run()~

Note

Depending on the JVM that is used, certain options of opreport and opannotate do NOT work since they rely on debug information (e.g. source code line number) that is not always available. The Sun JVM does provide the necessary debug information via the JVMTI[PI] interface, but other JVMs do not.

As you can see in the opreport output, the JIT support agent for Java generates symbols to include the class and method signature. A symbol with the suffix ˜<n> (e.g. void test$HelloThread.run()˜1) means that this is the <n>th occurrence of the identical name. This happens if a method is re-JITed. A symbol with the suffix %<n>, means that the address space of this symbol was reused during the sample session (see Section 6, “Overlapping symbols in JITed code”). The value <n> is the percentage of time that this symbol/code was present in relation to the total lifetime of all overlapping other symbols. A symbol of the form <return_val> <class_name>$<method_sig> denotes an inner class.

5. gprof-compatible output (opgprof)

If you're familiar with the output produced by GNU gprof, you may find opgprof useful. It takes a single binary as an argument, and produces a gmon.out file for use with gprof -p. If call-graph profiling is enabled, then this is also included. 

$ opgprof `which oprofiled` # generates gmon.out file
$ gprof -p `which oprofiled` | head
Flat profile:

Each sample counts as 1 samples.
  %   cumulative   self              self     total
 time   samples   samples    calls  T1/call  T1/call  name
 33.13 206237.00 206237.00                             odb_insert
 22.67 347386.00 141149.00                             pop_buffer_value
  9.56 406881.00 59495.00                             opd_put_sample
  7.34 452599.00 45718.00                             opd_find_image
  7.19 497327.00 44728.00                             opd_process_samples

5.1. Usage of opgprof

--help / -? / --usage

Show help message.

--image-path / -p [paths]

Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules.

--root / -R [path]

A path to a filesystem to search for additional binaries.

--output-filename / -o [file]

Output to the given file instead of the default, gmon.out

--threshold / -t [percentage]

Only output data for symbols that have more than the given percentage of total samples.

--verbose / -V [options]

Give verbose debugging output.

--session-dir=dir_path

Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then opgprof will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory.

--version / -v

Show version.

6. Analyzing profile data on another system (oparchive)

The oparchive utility generates a directory populated with executable, debug, and oprofile sample files. This directory can be copied to another (host) machine and analyzed offline, with no further need to access the data collection machine (target).

The following command, executed on the target system, will collect the sample files, the executables associated with the sample files, and the debuginfo files associated with the executables and copy them into /tmp/current_data: 

# oparchive -o /tmp/current_data

When transferring archived profile data to a host machine for offline analysis, you need to determine if the oprofile ABI format is compatible between the target system and the host system; if it isn't, you must run the opimport command to convert the target's sample data files to the format of your host system. See Section 7, “Converting sample database files (opimport)” for more details.

After your profile data is transferred to the host system and (if necessary) you have run the opimport command to convert the file format, you can now run the opreport and opannotate commands. However, you must provide an "archive specification" to let these post-processing tools know where to find of the profile data (sample files, executables, etc.); for example: 

# opreport archive:/home/user1/my_oprofile_archive --symbols

Furthermore, if your profile was collected on your target system into a session-dir other than /var/lib/oprofile, the oparchive command will display a message similar to the following: 

# NOTE: The sample data in this archive is located at /home/user1/test-stuff/oprofile_data
instead of the standard location of /var/lib/oprofile.  Hence, when using opreport
and other post-processing tools on this archive, you must pass the following option:
        --session-dir=/home/user1/test-stuff/oprofile_data

Then the above opreport example would have to include that --session-dir option.

Note

In some host/target development environments, all target executables, libraries, and debuginfo files are stored in a root directory on the host to facilitate offline analysis. In such cases, the oparchive command collects more data than is necessary; so, when copying the resulting output of oparchive, you can skip all of the executables, etc, and just archive the $SESSION_DIR tree located within the output directory you specified in your oparchive command. Then, when running the opreport or opannotate commands on your host system, pass the --root option to point to the location of your target's executables, etc.

6.1. Usage of oparchive

--help / -? / --usage

Show help message.

--exclude-dependent / -x

Do not include application-specific images for libraries, kernel modules and the kernel.

--image-path / -p [paths]

Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules.

--root / -R [path]

A path to a filesystem to search for additional binaries.

--output-directory / -o [directory]

Output to the given directory. There is no default. This must be specified.

--list-files / -l

Only list the files that would be archived, don't copy them.

--verbose / -V [options]

Give verbose debugging output.

--session-dir=dir_path

Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then oparchive will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory.

--version / -v

Show version.

7. Converting sample database files (opimport)

This utility converts sample database files from a foreign binary format (abi) to the native format. This is required when moving sample files to a (host) system other than the one used for collection (target system), and the host and target systems are different architectures. The abi format of the sample files to be imported is described in a text file located in $SESSION_DIR/abi. If you are unsure if your target and host systems have compatible architectures (in regard to the OProfile ABI), simply diff a $SESSION_DIR/abi file from the target system with one from the host system. If any differences show up at all, you must run the opimport command.

The oparchive command should be used on the machine where the profile was taken (target) in order to collect sample files and all other necessary information. The archive directory that is the output from oparchive should be copied to the system where you wish to perform your performance analysis (host).

The following command converts an input sample file to the specified output sample file using the given abi file as a binary description of the input file and the curent platform abi as a binary description of the output file. (NOTE: The ellipses are used to make the example more compact and cannot be used in an actual command line.) 

# opimport -a /tmp/foreign-abi -o /tmp/imported/.../GLOBAL_POWER_EVENTS.200000.1.all.all.all /tmp/archived/var/lib/.../mprime/GLOBAL_POWER_EVENTS.200000.1.all.all.all

Since opimport converts just one file at a time, an example shell script is provided below that will perform an import/conversion of all sample files in a samples directory collected from the target system. 

#!/bin/bash
#Usage: my-import.sh <foreign-abi-fullpathname>

# NOTE: Start from the "samples" directory containing the "current" directory
# to be imported

mkdir current-imported
cd current-imported; (cd ../current; find . -type d ! -name .) |xargs mkdir
cd ../current; mv stats ../StatsSave; find . -type f | while read line; do opimport  -a $1 -o ../current-imported/$line $line; done; mv ../StatsSave stats;

Example usage: Assume that on the target system, a profile was collected using a session-dir of /var/lib/oprofile, and then oparchive -o profile1 was run. Then the profile1 directory is copied to the host system for analysis. To import the sample data in profile1, you would perform the following steps: 

$cd profile1/var/lib/oprofile/samples
$my-import.sh `pwd`/../abi

If the OProfile ABI is truly different on host and target machines, then the end result of running the above script will place the converted (i.e., imported) files into the current-imported directory. By default, opreport and other post-profiling tools will look for samples in samples/current of the specified session directory. So you should either rename current-imported to current or specify the session specification of session:current-imported when running post-profiling tools.

If the OProfile ABI is the same on the host and target machines, the my-import.sh script will print the following message for each sample file: 

input abi is identical to native. no conversion necessary.

7.1. Usage of opimport

--help / -? / --usage

Show help message.

--abi / -a [filename]

Input abi file description location.

--force / -f

Force conversion even if the input and output abi are identical.

--output / -o [filename]

Specify the output filename. If the output file already exists, the file is not overwritten but data are accumulated in. Sample filename are informative for post profile tools and must be kept identical, in other word the pathname from the first path component containing a '{' must be kept as it in the output filename.

--verbose / -V

Give verbose debugging output.

--version / -v

Show version.

Chapter 5. Interpreting profiling results

Table of Contents

1. Profiling interrupt latency
2. Kernel profiling
2.1. Interrupt masking
2.2. Idle time
2.3. Profiling kernel modules
3. Interpreting call-graph profiles
4. Inaccuracies in annotated source
4.1. Side effects of optimizations
4.2. Prologues and epilogues
4.3. Inlined functions
4.4. Inaccuracy in line number information
5. Assembly functions
6. Overlapping symbols in JITed code
7. Using operf to profile fork/execs
8. Other discrepancies

The standard caveats of profiling apply in interpreting the results from OProfile: profile realistic situations, profile different scenarios, profile for as long as a time as possible, avoid system-specific artifacts, don't trust the profile data too much. Also bear in mind the comments on the performance counters above - you cannot rely on totally accurate instruction-level profiling. However, for almost all circumstances the data can be useful. Ideally a utility such as Intel's VTUNE would be available to allow careful instruction-level analysis; go hassle Intel for this, not me ;)

1. Profiling interrupt latency

This is an example of how the latency of delivery of profiling interrupts can impact the reliability of the profiling data. This is pretty much a worst-case-scenario example: these problems are fairly rare. 

double fun(double a, double b, double c)
{
 double result = 0;
 for (int i = 0 ; i < 10000; ++i) {
  result += a;
  result *= b;
  result /= c;
 }
 return result;
}

Here the last instruction of the loop is very costly, and you would expect the result reflecting that - but (cutting the instructions inside the loop): 

$ opannotate -a -t 10 ./a.out

     88 15.38% : 8048337:       fadd   %st(3),%st
     48 8.391% : 8048339:       fmul   %st(2),%st
     68 11.88% : 804833b:       fdiv   %st(1),%st
    368 64.33% : 804833d:       inc    %eax
               : 804833e:       cmp    $0x270f,%eax
               : 8048343:       jle    8048337

The problem comes from the x86 hardware; when the counter overflows the IRQ is asserted but the hardware has features that can delay the NMI interrupt: x86 hardware is synchronous (i.e. cannot interrupt during an instruction); there is also a latency when the IRQ is asserted, and the multiple execution units and the out-of-order model of modern x86 CPUs also causes problems. This is the same function, with annotation : 

$ opannotate -s -t 10 ./a.out

               :double fun(double a, double b, double c)
               :{ /* _Z3funddd total:     572 100.0% */
               : double result = 0;
    368 64.33% : for (int i = 0 ; i < 10000; ++i) {
     88 15.38% :  result += a;
     48 8.391% :  result *= b;
     68 11.88% :  result /= c;
               : }
               : return result;
               :}

The conclusion: don't trust samples coming at the end of a loop, particularly if the last instruction generated by the compiler is costly. This case can also occur for branches. Always bear in mind that samples can be delayed by a few cycles from its real position. That's a hardware problem and OProfile can do nothing about it.

2. Kernel profiling

2.1. Interrupt masking

OProfile uses non-maskable interrupts (NMI) on the P6 generation, Pentium 4, Athlon, Opteron, Phenom, and Turion processors. These interrupts can occur even in sections of the kernel where interrupts are disabled, allowing collection of samples in virtually all executable code.

2.2. Idle time

Your kernel is likely to support halting the processor when a CPU is idle. As the typical hardware events like CPU_CLK_UNHALTED do not count when the CPU is halted, the kernel profile will not reflect the actual amount of time spent idle. You can change this behaviour by booting with the idle=poll option, which uses a different idle routine. This will appear as poll_idle() in your kernel profile.

2.3. Profiling kernel modules

OProfile profiles kernel modules by default. However, there are a couple of problems you may have when trying to get results. First, you may have booted via an initrd; this means that the actual path for the module binaries cannot be determined automatically. To get around this, you can use the -p option to the analysis tools to specify where to look for the kernel modules.

In kernel version 2.6, the information on where kernel module binaries are located was removed. This means OProfile needs guiding with the -p option to find your modules. Normally, you can just use your standard module top-level directory for this. Note that due to this problem, OProfile cannot check that the modification times match; it is your responsibility to make sure you do not modify a binary after a profile has been created.

If you have run insmod or modprobe to insert a module in a particular directory, it is important that you specify this directory with the -p option first, so that it over-rides an older module binary that might exist in other directories you've specified with -p. It is up to you to make sure that these values are correct: the kernel simply does not provide enough information for OProfile to get this information.

3. Interpreting call-graph profiles

Sometimes the results from call-graph profiles may be different from what you expect to see. The first thing to check is whether the target binaries where compiled with frame pointers enabled (if the binary was compiled using gcc's -fomit-frame-pointer option, you will not get meaningful results). Note that as of this writing, the GCC developers plan to disable frame pointers by default. The Linux kernel is built without frame pointers by default; there is a configuration option you can use to turn it on under the "Kernel Hacking" menu.

Often you may see a caller of a function that does not actually directly call the function you're looking at (e.g. if a() calls b(), which in turn calls c(), you may see an entry for a()->c()). What's actually occurring is that we are taking samples at the very start (or the very end) of c(); at these few instructions, we haven't yet created the new function's frame, so it appears as if a() is calling directly into c(). Be careful not to be misled by these entries.

Like the rest of OProfile, call-graph profiling uses a statistical approach; this means that sometimes a backtrace sample is truncated, or even partially wrong. Bear this in mind when examining results.

4. Inaccuracies in annotated source

4.1. Side effects of optimizations

The compiler can introduce some pitfalls in the annotated source output. The optimizer can move pieces of code in such manner that two line of codes are interlaced (instruction scheduling). Also debug info generated by the compiler can show strange behavior. This is especially true for complex expressions e.g. inside an if statement: 

	if (a && ..
	    b && ..
	    c &&)

here the problem come from the position of line number. The available debug info does not give enough details for the if condition, so all samples are accumulated at the position of the right brace of the expression. Using opannotate -a can help to show the real samples at an assembly level.

4.2. Prologues and epilogues

The compiler generally needs to generate "glue" code across function calls, dependent on the particular function call conventions used. Additionally other things need to happen, like stack pointer adjustment for the local variables; this code is known as the function prologue. Similar code is needed at function return, and is known as the function epilogue. This will show up in annotations as samples at the very start and end of a function, where there is no apparent executable code in the source.

4.3. Inlined functions

You may see that a function is credited with a certain number of samples, but the listing does not add up to the correct total. To pick a real example : 

               :internal_sk_buff_alloc_security(struct sk_buff *skb)
 353 2.342%    :{ /* internal_sk_buff_alloc_security total: 1882 12.48% */
               :
               :        sk_buff_security_t *sksec;
  15 0.0995%   :        int rc = 0;
               :
  10 0.06633%  :        sksec = skb->lsm_security;
 468 3.104%    :        if (sksec && sksec->magic == DSI_MAGIC) {
               :                goto out;
               :        }
               :
               :        sksec = (sk_buff_security_t *) get_sk_buff_memory(skb);
   3 0.0199%   :        if (!sksec) {
  38 0.2521%   :                rc = -ENOMEM;
               :                goto out;
  10 0.06633%  :        }
               :        memset(sksec, 0, sizeof (sk_buff_security_t));
  44 0.2919%   :        sksec->magic = DSI_MAGIC;
  32 0.2123%   :        sksec->skb = skb;
  45 0.2985%   :        sksec->sid = DSI_SID_NORMAL;
  31 0.2056%   :        skb->lsm_security = sksec;
               :
               :      out:
               :
 146 0.9685%   :        return rc;
               :
  98 0.6501%   :}

Here, the function is credited with 1,882 samples, but the annotations below do not account for this. This is usually because of inline functions - the compiler marks such code with debug entries for the inline function definition, and this is where opannotate annotates such samples. In the case above, memset is the most likely candidate for this problem. Examining the mixed source/assembly output can help identify such results.

This problem is more visible when there is no source file available, in the following example it's trivially visible the sums of symbols samples is less than the number of the samples for this file. The difference must be accounted to inline functions. 

/*
 * Total samples for file : "arch/i386/kernel/process.c"
 *
 *    109  2.4616
 */

 /* default_idle total:     84  1.8970 */
 /* cpu_idle total:         21  0.4743 */
 /* flush_thread total:      1  0.0226 */
 /* prepare_to_copy total:   1  0.0226 */
 /* __switch_to total:      18  0.4065 */

The missing samples are not lost, they will be credited to another source location where the inlined function is defined. The inlined function will be credited from multiple call site and merged in one place in the annotated source file so there is no way to see from what call site are coming the samples for an inlined function.

When running opannotate, you may get a warning "some functions compiled without debug information may have incorrect source line attributions". In some rare cases, OProfile is not able to verify that the derived source line is correct (when some parts of the binary image are compiled without debugging information). Be wary of results if this warning appears.

Furthermore, for some languages the compiler can implicitly generate functions, such as default copy constructors. Such functions are labelled by the compiler as having a line number of 0, which means the source annotation can be confusing.

4.4. Inaccuracy in line number information

Depending on your compiler you can fall into the following problem: 

struct big_object { int a[500]; };

int main()
{
	big_object a, b;
	for (int i = 0 ; i != 1000 * 1000; ++i)
		b = a;
	return 0;
}

Compiled with gcc 3.0.4 the annotated source is clearly inaccurate: 

               :int main()
               :{  /* main total: 7871 100% */
               :        big_object a, b;
               :        for (int i = 0 ; i != 1000 * 1000; ++i)
               :                b = a;
 7871 100%     :        return 0;
               :}

The problem here is distinct from the IRQ latency problem; the debug line number information is not precise enough; again, looking at output of opannoatate -as can help. 

               :int main()
               :{
               :        big_object a, b;
               :        for (int i = 0 ; i != 1000 * 1000; ++i)
               : 80484c0:       push   %ebp
               : 80484c1:       mov    %esp,%ebp
               : 80484c3:       sub    $0xfac,%esp
               : 80484c9:       push   %edi
               : 80484ca:       push   %esi
               : 80484cb:       push   %ebx
               :                b = a;
               : 80484cc:       lea    0xfffff060(%ebp),%edx
               : 80484d2:       lea    0xfffff830(%ebp),%eax
               : 80484d8:       mov    $0xf423f,%ebx
               : 80484dd:       lea    0x0(%esi),%esi
               :        return 0;
    3 0.03811% : 80484e0:       mov    %edx,%edi
               : 80484e2:       mov    %eax,%esi
    1 0.0127%  : 80484e4:       cld
    8 0.1016%  : 80484e5:       mov    $0x1f4,%ecx
 7850 99.73%   : 80484ea:       repz movsl %ds:(%esi),%es:(%edi)
    9 0.1143%  : 80484ec:       dec    %ebx
               : 80484ed:       jns    80484e0
               : 80484ef:       xor    %eax,%eax
               : 80484f1:       pop    %ebx
               : 80484f2:       pop    %esi
               : 80484f3:       pop    %edi
               : 80484f4:       leave
               : 80484f5:       ret

So here it's clear that copying is correctly credited with of all the samples, but the line number information is misplaced. objdump -dS exposes the same problem. Note that maintaining accurate debug information for compilers when optimizing is difficult, so this problem is not suprising. The problem of debug information accuracy is also dependent on the binutils version used; some BFD library versions contain a work-around for known problems of gcc, some others do not. This is unfortunate but we must live with that, since profiling is pointless when you disable optimisation (which would give better debugging entries).

5. Assembly functions

Often the assembler cannot generate debug information automatically. This means that you cannot get a source report unless you manually define the neccessary debug information; read your assembler documentation for how you might do that. The only debugging info needed currently by OProfile is the line-number/filename-VMA association. When profiling assembly without debugging info you can always get report for symbols, and optionally for VMA, through opreport -l or opreport -d, but this works only for symbols with the right attributes. For gas you can get this by 

.globl foo
	.type	foo,@function

whilst for nasm you must use 

	  GLOBAL foo:function		; [1]

Note that OProfile does not need the global attribute, only the function attribute.

6. Overlapping symbols in JITed code

Some virtual machines (e.g., Java) may re-JIT a method, resulting in previously allocated space for a piece of compiled code to be reused. This means that, at one distinct code address, multiple symbols/methods may be present during the run time of the application.

Since OProfile samples are buffered and don′t have timing information, there is no way to correlate samples with the (possibly) varying address ranges in which the code for a symbol may reside. An alternative would be flushing the OProfile sampling buffer when we get an unload event, but this could result in high overhead.

To moderate the problem of overlapping symbols, OProfile tries to select the symbol that was present at this address range most of the time. Additionally, other overlapping symbols are truncated in the overlapping area. This gives reasonable results, because in reality, address reuse typically takes place during phase changes of the application -- in particular, during application startup. Thus, for optimum profiling results, start the sampling session after application startup and burn in.

7. Using operf to profile fork/execs

When profiling an application that forks one or more new processes, operf will record samples for both the parent process and forked processes. This is also true even if the forked process performs an exec of some sort (e.g., execvp). If the process does not perform an exec, you will see that opreport will attribute samples for the forked process to the main application executable. On the other hand, if the forked process does perform an exec, then opreport will attribute samples to the executable being exec'ed.

To demonstrate this, consider the following examples. When using operf to profile a single application (either with the --pid option or command option), the normal opreport summary output (i.e., invoking opreport with no options) looks something like the following: 

CPU_CLK_UNHALT...|
  samples|      %|
------------------
   112342 100.000 sprintft
	CPU_CLK_UNHALT...|
	  samples|      %|
	------------------
	   104209 92.7605 libc-2.12.so
	     7273  6.4740 sprintft
	      858  0.7637 no-vmlinux
	        2  0.0018 ld-2.12.so

But if you profile an application that does a fork/exec, the opreport summary output will show samples for both the main application you profiled, as well as the exec'ed program. An example is shown below where s-m-fork is the main application being profiled, which in turn forks a process that does an execvp of the memcpyt program. 

CPU_CLK_UNHALT...|
  samples|      %|
------------------
   133382 70.5031 memcpyt
	CPU_CLK_UNHALT...|
	  samples|      %|
	------------------
	   123852 92.8551 libc-2.12.so
	     8522  6.3892 memcpyt
	     1007  0.7550 no-vmlinux
	        1 7.5e-04 ld-2.12.so
    55804 29.4969 s-m-fork
	CPU_CLK_UNHALT...|
	  samples|      %|
	------------------
	    51801 92.8267 libc-2.12.so
	     3589  6.4314 s-m-fork
	      414  0.7419 no-vmlinux

8. Other discrepancies

Another cause of apparent problems is the hidden cost of instructions. A very common example is two memory reads: one from L1 cache and the other from memory: the second memory read is likely to have more samples. There are many other causes of hidden cost of instructions. A non-exhaustive list: mis-predicted branch, TLB cache miss, partial register stall, partial register dependencies, memory mismatch stall, re-executed µops. If you want to write programs at the assembly level, be sure to take a look at the Intel and AMD documentation at http://developer.intel.com/ and http://developer.amd.com/devguides.jsp.

Chapter 6. Controlling the event counter

Table of Contents

1. Using ocount

1. Using ocount

This section describes in detail how ocount is used. Unless the --events option is specified, ocount will use the default event for your system. For most systems, the default event is some cycles-based event, assuming your processor type supports hardware performance counters. The event specification used for ocount is slightly different from that required for profiling -- a count value is not needed. You can see the event information for your CPU using ophelp. More information on event specification can be found at Section 3, “Specifying performance counter events”.

The ocount command syntax is: 

ocount [ options ] [ --system-wide | --process-list <pids> | --thread-list <tids> | --cpu-list <cpus> [ command [ args ] ] ]

ocount has 5 run modes:

  • system-wide
  • process-list
  • thread-list
  • cpu-list
  • command

One and only one of these 5 run modes must be specified when you run ocount. If you run ocount using a run mode other than command [args], press Ctrl-c to stop it when finished counting (e.g., when the monitored process ends). If you background ocount (i.e., with ’&’) while using one these run modes, you must stop it in a controlled manner so that the data collection process can be shut down cleanly and final results can be displayed. Use kill -SIGINT <ocount-PID> for this purpose.

Following is a description of the ocount options.

command [args]

The command or application to be profiled. The [args] are the input arguments that the command or application requires. The command and its arguments must be positioned at the end of the command line, after all other ocount options.

--process-list / -p [PIDs]

Use this option to count events for one or more already-running applications, specified via a comma-separated list (PIDs). Event counts will be collected for all children of the passed process(es) as well.

--thread-list / -r [TIDs]

Use this option to count events for one or more already-running threads, specified via a comma-separated list (TIDs). Event counts will not be collected for any children of the passed thread(s).

--system-wide / -s

This option is for counting events for all processes running on your system. You must have root authority to run ocount in this mode.

--cpu-list / -C [CPUs]

This option is for counting events on a subset of processors on your system. You must have root authority to run ocount in this mode. This is a comma-separated list, where each element in the list may be either a single processor number or a range of processor numbers; for example: ’-C 2,3,4-11,15’.

--events / -e [event1[,event2[,...]]]

This option is for passing a comma-separated list of event specifications for counting. Each event spec is of the form: 

name[:unitmask[:kernel[:user]]]

When no event specification is given, the default event for the running processor type will be used for counting. Use ophelp to list the available events for your processor type.

--separate-thread / -t

This option can be used in conjunction with either the --process-list or --thread-list option to display event counts on a per-thread (per-process) basis. Without this option, all counts are aggregated.

--separate-cpu / -c

This option can be used in conjunction with either the --system-wide or --cpu-list option to display event counts on a per-cpu basis. Without this option, all counts are aggregated.

--time-interval / -i interval_length[:num_intervals]

Note: The interval_length is given in milliseconds. However, the current implementation only supports 100 ms granularity, so the given interval_length will be rounded to the nearest 100 ms. Results collected for each time interval are printed immediately instead of the default of one dump of cumulative event counts at the end of the run. Counters are reset to zero at the start of each interval.

If num_intervals is specified, ocount exits after the specified number of intervals occur.

--brief-format / -b

Use this option to print results in the following brief format: 

                  [optional cpu or thread,]<event_name>,<count>,<percent_time_enabled>
                  [        <int>         ,]<  string  >,< u64 >,<     double         >

If --timer-interval is specified, a separate line formatted as 

                  timestamp,<num_seconds_since_epoch>[.n]

is printed ahead of each dump of event counts. If the time interval specified is less than one second, the timestamp will have 1/10 second precision.

--output-file / -f outfile_name

Results are written to outfile_name instead of interactively to the terminal.

--verbose / -V

Use this option to increase the verbosity of the output.

--version -v

Show ocount version.

--help / -h

Show a help message.

Chapter 7. Acknowledgments

Thanks to (in no particular order) : Arjan van de Ven, Rik van Riel, Juan Quintela, Philippe Elie, Phillipp Rumpf, Tigran Aivazian, Alex Brown, Alisdair Rawsthorne, Bob Montgomery, Ray Bryant, H.J. Lu, Jeff Esper, Will Cohen, Graydon Hoare, Cliff Woolley, Alex Tsariounov, Al Stone, Jason Yeh, Randolph Chung, Anton Blanchard, Richard Henderson, Andries Brouwer, Bryan Rittmeyer, Maynard P. Johnson, Richard Reich (rreich@rdrtech.com), Zwane Mwaikambo, Dave Jones, Charles Filtness; and finally Pulp, for "Intro".

oprofile-1.3.0/doc/srcdoc/0000775000175000017500000000000013323173530012357 500000000000000oprofile-1.3.0/doc/srcdoc/Doxyfile.in0000664000175000017500000001571712534404406014427 00000000000000# Doxyfile 1.2.13-20020210 #--------------------------------------------------------------------------- # General configuration options #--------------------------------------------------------------------------- PROJECT_NAME = @PACKAGE@ PROJECT_NUMBER = @VERSION@ OUTPUT_DIRECTORY = OUTPUT_LANGUAGE = English EXTRACT_ALL = YES EXTRACT_PRIVATE = NO EXTRACT_STATIC = NO EXTRACT_LOCAL_CLASSES = YES HIDE_UNDOC_MEMBERS = NO HIDE_UNDOC_CLASSES = NO BRIEF_MEMBER_DESC = YES REPEAT_BRIEF = YES ALWAYS_DETAILED_SEC = NO INLINE_INHERITED_MEMB = NO FULL_PATH_NAMES = NO STRIP_FROM_PATH = INTERNAL_DOCS = NO STRIP_CODE_COMMENTS = NO CASE_SENSE_NAMES = YES SHORT_NAMES = NO HIDE_SCOPE_NAMES = NO VERBATIM_HEADERS = YES SHOW_INCLUDE_FILES = YES JAVADOC_AUTOBRIEF = YES INHERIT_DOCS = YES INLINE_INFO = YES SORT_MEMBER_DOCS = YES DISTRIBUTE_GROUP_DOC = NO TAB_SIZE = 8 GENERATE_TODOLIST = NO GENERATE_TESTLIST = NO GENERATE_BUGLIST = NO ALIASES = ENABLED_SECTIONS = MAX_INITIALIZER_LINES = 30 OPTIMIZE_OUTPUT_FOR_C = NO OPTIMIZE_OUTPUT_JAVA = NO SHOW_USED_FILES = YES #--------------------------------------------------------------------------- # configuration options related to warning and progress messages #--------------------------------------------------------------------------- QUIET = NO WARNINGS = YES WARN_IF_UNDOCUMENTED = YES WARN_FORMAT = "$file:$line: $text" WARN_LOGFILE = #--------------------------------------------------------------------------- # configuration options related to the input files #--------------------------------------------------------------------------- INPUT = ../../ FILE_PATTERNS = *.cpp *.c *.h RECURSIVE = YES EXCLUDE = ../../module EXCLUDE_SYMLINKS = NO EXCLUDE_PATTERNS = *.moc.cpp *.moc.h oprof_start.base.cpp EXAMPLE_PATH = EXAMPLE_PATTERNS = EXAMPLE_RECURSIVE = NO IMAGE_PATH = INPUT_FILTER = FILTER_SOURCE_FILES = NO #--------------------------------------------------------------------------- # configuration options related to source browsing #--------------------------------------------------------------------------- SOURCE_BROWSER = NO INLINE_SOURCES = NO REFERENCED_BY_RELATION = YES REFERENCES_RELATION = YES #--------------------------------------------------------------------------- # configuration options related to the alphabetical class index #--------------------------------------------------------------------------- ALPHABETICAL_INDEX = NO COLS_IN_ALPHA_INDEX = 5 IGNORE_PREFIX = #--------------------------------------------------------------------------- # configuration options related to the HTML output #--------------------------------------------------------------------------- GENERATE_HTML = YES HTML_OUTPUT = html HTML_FILE_EXTENSION = .html HTML_HEADER = HTML_FOOTER = HTML_STYLESHEET = HTML_ALIGN_MEMBERS = YES GENERATE_HTMLHELP = NO GENERATE_CHI = NO BINARY_TOC = NO TOC_EXPAND = NO DISABLE_INDEX = NO ENUM_VALUES_PER_LINE = 4 GENERATE_TREEVIEW = NO TREEVIEW_WIDTH = 250 #--------------------------------------------------------------------------- # configuration options related to the LaTeX output #--------------------------------------------------------------------------- GENERATE_LATEX = NO LATEX_OUTPUT = latex LATEX_CMD_NAME = latex MAKEINDEX_CMD_NAME = makeindex COMPACT_LATEX = NO PAPER_TYPE = a4wide EXTRA_PACKAGES = LATEX_HEADER = PDF_HYPERLINKS = NO USE_PDFLATEX = NO LATEX_BATCHMODE = NO #--------------------------------------------------------------------------- # configuration options related to the RTF output #--------------------------------------------------------------------------- GENERATE_RTF = NO RTF_OUTPUT = rtf COMPACT_RTF = NO RTF_HYPERLINKS = NO RTF_STYLESHEET_FILE = RTF_EXTENSIONS_FILE = #--------------------------------------------------------------------------- # configuration options related to the man page output #--------------------------------------------------------------------------- GENERATE_MAN = NO MAN_OUTPUT = man MAN_EXTENSION = .3 MAN_LINKS = NO #--------------------------------------------------------------------------- # configuration options related to the XML output #--------------------------------------------------------------------------- GENERATE_XML = NO #--------------------------------------------------------------------------- # configuration options for the AutoGen Definitions output #--------------------------------------------------------------------------- GENERATE_AUTOGEN_DEF = NO #--------------------------------------------------------------------------- # Configuration options related to the preprocessor #--------------------------------------------------------------------------- ENABLE_PREPROCESSING = YES MACRO_EXPANSION = YES EXPAND_ONLY_PREDEF = YES SEARCH_INCLUDES = YES INCLUDE_PATH = INCLUDE_FILE_PATTERNS = PREDEFINED = EXPAND_AS_DEFINED = SKIP_FUNCTION_MACROS = YES #--------------------------------------------------------------------------- # Configuration::addtions related to external references #--------------------------------------------------------------------------- TAGFILES = GENERATE_TAGFILE = ALLEXTERNALS = NO EXTERNAL_GROUPS = YES PERL_PATH = /usr/bin/perl #--------------------------------------------------------------------------- # Configuration options related to the dot tool #--------------------------------------------------------------------------- CLASS_DIAGRAMS = YES HAVE_DOT = YES CLASS_GRAPH = YES COLLABORATION_GRAPH = YES TEMPLATE_RELATIONS = YES HIDE_UNDOC_RELATIONS = YES INCLUDE_GRAPH = YES INCLUDED_BY_GRAPH = YES GRAPHICAL_HIERARCHY = YES DOT_IMAGE_FORMAT = png DOT_PATH = DOTFILE_DIRS = MAX_DOT_GRAPH_WIDTH = 1024 MAX_DOT_GRAPH_HEIGHT = 1024 GENERATE_LEGEND = YES DOT_CLEANUP = YES #--------------------------------------------------------------------------- # Configuration::additions related to the search engine #--------------------------------------------------------------------------- SEARCHENGINE = NO #CGI_NAME = search.cgi #CGI_URL = #DOC_URL = #DOC_ABSPATH = #BIN_ABSPATH = /usr/local/bin/ #EXT_DOC_PATHS = oprofile-1.3.0/doc/srcdoc/Makefile0000664000175000017500000000012312534404406013735 00000000000000DOXYGEN=doxygen .PHONY: clean all: clean doxygen Doxyfile clean: rm -rf html/ oprofile-1.3.0/doc/op-jit-devel.xml0000664000175000017500000002721012534404406014047 00000000000000 OProfile JIT agent developer guide Maynard Johnson
maynardj@us.ibm.com
 2007 IBM Corporation Developing a new JIT agent OProfile includes a header file and library that are intended to be used by developers who wish to extend OProfile's JIT support to other non-supported virtual machines. This developer guide describes these development files and how to use them. Overview OProfile already includes some implementations that use the JIT support, e.g., the Java Virtual Machine Toolkit Interface (JVMTI) library, libjvmti_oprofile.so. In developing a new implementation, you will likely follow a similar (if not identical) procedure as was used in developing the JVMTI library. Following are the high level steps to follow: Ensure your virtual machine provides an API that, at minimum, can provide the following information about dynamically compiled code: Notification when compilation occurs Name of the symbol (i.e., function or class/method, etc.) Address in anonymous memory where the compiled code was loaded Length of the compiled code segment Write an agent library that communicates with your VM to obtain compiled code notifications. Invoke the required functions from opagent.h () and link your library with libopagent.so (installed at <oprofile_install_dir>/lib/oprofile). Implementing JIT support for a new virtual machine The JIT support API for OProfile is defined in <oprofile-install-dir>/include/opagent.h. Some parts of the API are mandatory for an agent library to use; other parts are optional. The mandatory functions are shown below. op_agent_t op_open_agent(void); void op_close_agent(op_agent_t hdl); int op_write_native_code(op_agent_t hdl, char const * symbol_name, uint64_t vma, const void * code, const unsigned int code_size); To implement this part of your library, you must perform the following steps: Implement a function to set up initial communication with the VM. Once communication to the VM is established, your agent library should call op_op_agent() and cache the returned op_agent_t handle for use in future calls. Perform any necessary steps to register with the VM to be notified of compiled code load events. Registration must include a callback function you will implement in the library to handle the compiled code load events. The callback function mentioned above must obtain all required information from the VM to pass to libopagent via op_write_native_code(). When disconnecting from the VM, your library should call op_agent_close(). Use of the functions below are optional, depending on the kinds of information your VM can provide to your agent library. See the JVMTI agent library for an example of how to use these functions. int op_unload_native_code(op_agent_t hdl, uint64_t vma); int op_write_debug_line_info(op_agent_t hdl, void const * code, size_t nr_entry, struct debug_line_info const * compile_map); While the libopagent functions are thread-safe, you should not use them in signal handlers. The JIT support API This chapter describes the JIT support API. See opagent.h for more details. op_open_agent Initializes the agent library. #include <opagent.h> op_agent_t op_open_agent void Description This function must be called by agents before any other function. Creates and opens a JIT dump file in /var/lib/oprofile/jitdump using the naming convention <process_id>.dump. Parameters None Return value Returns a valid op_agent_t handle or NULL. If NULL is returned, errno is set to indicate the nature of the error. For a list of possible errno values, see the man pages for: stat, creat, gettimeofday, fdopen, fwrite op_close_agent Uninitialize the agent library. #include <opagent.h> int op_close_agent op_agent_t hdl Description Frees all resources and closes open file handles. Parameters hdl : Handle returned from an earlier call to op_open_agent() Return value Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for: gettimeofday, fwrite op_write_native_code Write information about compiled code to a JIT dump file. #include <opagent.h> int op_write_native_code op_agent_thdl char const *symbol_name uint64_tvma void const *code const unsigned intcode_size Description Signal the dynamic generation of native code from a virtual machine. Writes a JIT dump record to the open JIT dump file using the passed information. Parameters hdl : Handle returned from an earlier call to op_open_agent() symbol_name : The name of the symbol being dynamically compiled. This name can (and should) contain all necessary information to disambiguate it from symbols of the same name; e.g., class, method signature. vma : Virtual memory address of the executable code code : Pointer to the location of the compiled code. Theoretically, this may be a different location from that given by the vma argument. For some JIT compilers, obtaining the code may be impractical. For this (or any other) reason, the agent can choose to pass NULL for this paraemter. If NULL is passed, no code will be copied into the JIT dump file. code_size : Size of the compiled code Return value Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for: gettimeofday, fwrite op_write_debug_line_info Write debug information about compiled code to a JIT dump file. #include <opagent.h> int op_write_debug_line_info op_agent_thdl void const *code size_tnr_entry struct debug_line_info const *compile_map Description Add debug line information to a piece of code. An op_write_native_code() with the same code pointer should have occurred before this call. It's not necessary to provide one lineno information entry per machine instruction; the array can contain hole. Parameters hdl : Handle returned from an earlier call to op_open_agent() code : Pointer to the location of the code with debug info nr_entry : Number of entries in compile_map compile_map : Array of struct debug_line_info. See the JVMTI agent library implementation for an example of what information should be retrieved from a VM to fill out this data structure. Return value Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for: gettimeofday, ftell, fwrite op_unload_native_code Write information to the JIT dump file about invalidated compiled code. #include <opagent.h> int op_unload_native_code op_agent_thdl uint64_tvma Description Signal the invalidation of native code from a virtual machine. Parameters hdl : Handle returned from an earlier call to op_open_agent() vma : Virtual memory address of the compiled code being unloaded. An op_write_native_code() with the same vma should have occurred before this call. Return value Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for: gettimeofday, fwrite oprofile-1.3.0/doc/oprofile.xml0000664000175000017500000040456313124774026013405 00000000000000 OProfile manual John Levon
levon@movementarian.org
 2000-2004 Victoria University of Manchester, John Levon and others Introduction This manual applies to OProfile version . OProfile is a set of performance monitoring tools for Linux 2.6 and higher systems, available on a number of architectures. OProfile provides the following features: Profiler Post-processing tools for analyzing profile data Event counter OProfile is capable of monitoring native hardware events occurring in all parts of a running system, from the kernel (including modules and interrupt handlers) to shared libraries to binaries. OProfile can collect event information for the whole system in the background with very little overhead. These features make it ideal for monitoring entire systems to determine bottle necks in real-world systems. Many CPUs provide "performance counters", hardware registers that can count "events"; for example, cache misses, or CPU cycles. OProfile can collect profiles of code based on the number of these occurring events: repeatedly, every time a certain (configurable) number of events has occurred, the PC value is recorded. This information is aggregated into profiles for each binary image. Alternatively, OProfile's event counting tool can collect simple raw event counts. OProfile legacy profiling mode Prior to release 1.0, OProfile included a profiling tool consisting of the opcontrol shell script, the oprofiled daemon, and the attendant oprofile kernel driver. This "legacy profiler" was deprecated in release 0.9.8 with the introduction of the operf profiling tool (see ). Some older architectures/platforms do not support the use of operf. For those cases, oprofile users should install release 0.9.9, which is the last release to include the legacy profiler. OProfile perf_events profiling mode OProfile has the ability to profile a single process or every currently running process (i.e., system-wide) via the operf program. operf interfaces with the kernel to collect samples via the Linux Kernel Performance Events Subsystem (hereafter referred to as "perf_events"). OProfile can co-exist with other tools on your system that may also be using the perf_events kernel subsystem. Using operf to profile a single process can be done as a normal user; however, root authority is required to run operf in system-wide profiling mode. Note Some older processor models are not supported by the underlying perf_events kernel and, thus, are not supported by operf. If you receive the message Your kernel's Performance Events Subsystem does not support your processor type when attempting to use operf, install OProfile 0.9.9 and try profiling with opcontrol to see if your processor type may be supported by OProfile's legacy mode. OProfile event counting mode OProfile provides the ocount tool for collecting raw event counts on a per-application, per-process, per-cpu, or system-wide basis. Unlike the profiling tools, post-processing of the data collected is not necessary -- the data is displayed in the output of ocount. A common use case for event counting tools is when performance analysts want to determine the CPI (cycles per instruction) for an application. High CPI implies possible stalls, and many architectures provide events that give detailed information about the different types of stalls. The events provided are architecture-specific, so we refer the reader to the hardware manuals available for the processor type being used. Applications of OProfile OProfile is useful in a number of situations. You might want to use OProfile when you : need low overhead cannot use highly intrusive profiling methods need to profile interrupt handlers need to profile an application and its shared libraries need to profile dynamically compiled code of supported virtual machines (see ) need to capture the performance behaviour of entire system want to examine hardware effects such as cache misses want detailed source annotation want instruction-level profiles want call-graph profiles OProfile is not a panacea. OProfile might not be a complete solution when you : require call graph profiles on platforms other than x86, ARM, and PowerPC require 100% instruction-accurate profiles need function call counts or an interstitial profiling API cannot tolerate any disturbance to the system whatsoever need to profile interpreted or dynamically compiled code of non-supported virtual machines Support for dynamically compiled (JIT) code OProfile provides a framework to support JITed code ("just-in-time (JIT) compiled code"). A development library is provided to allow developers to add support for any VM (virtual machine) that produces dynamically compiled code (see the OProfile JIT agent developer guide). In addition, built-in support is included for the following: JVMTI agent library for Java (1.5 and higher) JVMPI agent library for Java (1.5 and lower) These libraries make it possible for OProfile to attribute profile samples to Java methods. Without a VM-specific agent library, OProfile will typically report samples from JITed code similar to the following example: anon: <tgid><address range> For information on how to use OProfile's JIT support, see . No support for virtual machine guests OProfile currently does not support event-based profiling (i.e, using hardware events like cache misses, branch mispredicts) on virtual machine guests running under systems such as VMware. (Note: KVM guests are supported.) The list of supported events displayed by ophelp is based on CPU type and does not take into account whether the running system is a guest system or real system. To use OProfile on such guest systems, you must use the legacy profiler's timer mode (see ). System requirements Linux kernel Release 2.6.31 or higher Supported architectures AMD, ARM, Intel, PowerPC, Tile, MIPS Required libraries These libraries are required : popt, bfd, liberty (debian users: libiberty is provided in binutils-dev package), dl, plus the standard C++ libraries. Required kernel headers Either the kernel-headers package must be installed or use the --with-kernel configure option. Required user account For secure processing of sample data from JIT virtual machines (e.g., Java), the special user account "oprofile" must exist on the system. The 'configure' and 'make install' operations will print warning messages if this account is not found. If you intend to profile JITed code, you must create a group account named 'oprofile' and then create the 'oprofile' user account, setting the default group to 'oprofile'. A runtime error message is printed to the oprofile log when processing JIT samples if this special user account cannot be found. ELF Probably not too strenuous a requirement, but older A.OUT binaries/libraries are not supported. K&R coding style OK, so it's not really a requirement, but I wish it was... Internet resources Web page There is a web page (which you may be reading now) at http://oprofile.sf.net/. Download You can download a source tarball or check out code from the code repository at the sourceforge page, http://sf.net/projects/oprofile/. Mailing list There is a low-traffic OProfile-specific mailing list, details at http://sf.net/mail/?group_id=16191. Bug tracker There is a bug tracker for OProfile at SourceForge, http://sourceforge.net/p/oprofile/bugs/. IRC channel Several OProfile developers and users sometimes hang out on channel #oprofile on the OFTC network. Installation First you need to build OProfile and install it. ./configure, make, make install is often all you need, but note these arguments to ./configure : Use this option if you need to profile Java applications. Also, see , "Required user account". This option is used to specify the location of the Java Development Kit (JDK) source tree you wish to use. This is necessary to get the interface description of the JVMPI (or JVMTI) interface to compile the JIT support code successfully. The Java Runtime Environment (JRE) does not include the development files that are required to compile the JIT support code, so the full JDK must be installed in order to use this option. By default, the Oprofile JIT support libraries will be installed in <oprof_install_dir>/lib/oprofile. To build and install OProfile and the JIT support libraries as 64-bit, you can do something like the following: # CFLAGS="-m64" CXXFLAGS="-m64" ./configure \ --with-java={my_jdk_installdir} \ --libdir=/usr/local/lib64 If you encounter errors building 64-bit, you should install libtool 1.5.26 or later since that release of libtool fixes known problems for certain platforms. If you install libtool into a non-standard location, you'll need to edit the invocation of 'aclocal' in OProfile's autogen.sh as follows (assume an install location of /usr/local): aclocal -I m4 -I /usr/local/share/aclocal Development versions of OProfile build by default with . This option turns off. Disable the compiler flag (useful if you discover an OProfile bug and want to give a useful back-trace etc.) This option is used to specify the location of the kernel headers include directory needed to build the perf_events-enabled operf program. By default, the OProfile build system expects to find this directory under /usr. Use this option if your kernel headers are in a non-standard location or if building in a cross-compile enviroment or in a situation where the host system does not support perf_events but you wish to build binaries for a target system that does support perf_events. It is recommended that if you have a uniprocessor machine, you enable the local APIC / IO_APIC support for your kernel (this is automatically enabled for SMP kernels). With many BIOS (kernel >= 2.6.9 and UP kernel) it's not sufficient to enable the local APIC -- you must also turn it on explicitly at boot time by providing the "lapic" option to the kernel. If you use the NMI watchdog, be aware that the watchdog is disabled when profiling starts and not re-enabled until the profiling is stopped. Uninstalling OProfile You must have the source tree available to uninstall OProfile; a make uninstall will remove all installed files except your configuration file in the directory ~/.oprofile. Overview Getting started with OProfile using <command>operf</command> Profiling with operf allows you to precisely target your profiling (i.e., single process or system-wide). With operf, there is no initial setup needed -- simply invoke operf with the options you need; then run the OProfile post-processing tool(s). The operf syntax is as follows: operf [ options ] [ --system-wide | --pid=<PID> | [ command [ args ] ] ] A typical usage might look like this: operf ./my_test_program my_arg When ./my_test_program completes (or when you press Ctrl-C), profiling stops and you're ready to use opreport or other OProfile post-processing tools. By default, operf stores the sample data in <cur_dir>/oprofile_data/samples/current, and opreport and other post-processing tools will look in that location first for profile data, unless you pass the --session-dir option. Getting started with OProfile using <command>ocount</command> ocount is an OProfile tool that can be used to count native hardware events occurring in either a specific application, a set of processes or threads, a set of active system processors, or the entire system. The data collected during a counting session is displayed to stdout by default, but may also be saved to a file. The ocount syntax is as follows: ocount [ options ] [ --system-wide | --process-list <pids> | --thread-list <tids> | --cpu-list <cpus> [ command [ args ] ] ] A typical usage might look like this: ocount --events=CPU_CLK_UNHALTED,INST_RETIRED /home/user1/my_test_program my_arg When my_test_program completes (or when you press Ctrl-C), counting stops and the results are displayed to the screen (as shown below). Events were actively counted for 2.8 seconds. Event counts (actual) for /home/user1/my_test_program: Event Count % time counted CPU_CLK_UNHALTED 9,408,018,070 100.00 INST_RETIRED 16,719,918,108 100.00 Specifying performance counter events Whether profiling with operf or doing simple event counting with ocount, you can collect information about one more native hardware events using the --events option -- a comma-separated list of event specfications. The event specification is the means to provide details of how each hardware performance counter should be set up. For profiling, the event specification is a colon-separated string of the form as described in the table below. For ocount, specification is of the form . Note the presence of the count field for profiling. The count field tells the profiler how many events should occur between a profile snapshot (usually referred to as a "sample"). Since ocount does not do sampling, the count field is not needed. If no event specs are passed to operf or ocount, the default event will be used. The perf_events kernel subsystem allocates hardware counters as necessary, but some processor types have restrictions as to what hardware events may be counted simultaneously. The kernel employs a multiplexing technique when such hardware restrictions are encountered, such that events are monitored on a rotating basis. The symbolic event name, e.g. CPU_CLK_UNHALTED The counter reset value, e.g. 100000; use only for profiling The unit mask, as given in the events list: e.g. 0x0f; or a symbolic name if a name=<um_name> field is present Enable profiling of kernel code Enable profiling of userspace code The last three values are optional; if you omit them (e.g. ), they will be set to the default values (i.e., the default unit mask value for the given event, and profiling (or counting) both kernel and userspace code will be enabled). Note that on some architectures, some events may require a unit mask be specified. You can specify unit mask values using either a numerical value (hex values must begin with "0x") or a symbolic name (if the name=<um_name> field is shown in the ophelp output). For some named unit masks, the hex value is not unique; thus, OProfile tools enforce specifying such unit masks value by name. The table below lists the default profiling event for various processor types. The same events can be used for ocount, minus the count field. Processorcpu_typeDefault event Alpha EV67alpha/ev67CYCLES:100000:0:1:1 ARM/XScale PMU1arm/xscale1CPU_CYCLES:100000:0:1:1 ARM/XScale PMU2arm/xscale2CPU_CYCLES:100000:0:1:1 ARM/MPCorearm/mpcoreCPU_CYCLES:100000:0:1:1 Athloni386/athlonCPU_CLK_UNHALTED:100000:0:1:1 Pentium Proi386/pproCPU_CLK_UNHALTED:100000:0:1:1 Pentium IIi386/piiCPU_CLK_UNHALTED:100000:0:1:1 Pentium IIIi386/piiiCPU_CLK_UNHALTED:100000:0:1:1 Pentium M (P6 core)i386/p6_mobileCPU_CLK_UNHALTED:100000:0:1:1 Pentium 4 (non-HT)i386/p4GLOBAL_POWER_EVENTS:100000:1:1:1 Pentium 4 (HT)i386/p4-htGLOBAL_POWER_EVENTS:100000:1:1:1 Hammerx86-64/hammerCPU_CLK_UNHALTED:100000:0:1:1 Family10hx86-64/family10CPU_CLK_UNHALTED:100000:0:1:1 Family11hx86-64/family11hCPU_CLK_UNHALTED:100000:0:1:1 IBM pseriesppc64/power{ 4|5|6|7|8|9|970 }CYCLES:100000:0:1:1 IBM s390s390/{ z10|z196|zEC12 }HWSAMPLING:4127518:0:1:1 Tools summary This section gives a brief description of the available OProfile utilities and their purpose. ophelp This utility lists the available events and short descriptions. operf This is the program for collecting profile data, discussed in . ocount This tool is used for simple event counting, as described in in . agent libraries Used by virtual machines (like the Java VM) to record information about JITed code being profiled. See . opreport This is the main tool for retrieving useful profile data, described in . opannotate This utility can be used to produce annotated source, assembly or mixed source/assembly. Source level annotation is available only if the application was compiled with debugging symbols. See . opgprof This utility can output gprof-style data files for a binary, for use with gprof -p. See . oparchive This utility can be used to collect executables, debuginfo, and sample files and copy the files into an archive. The archive is self-contained and can be moved to another machine for further analysis. See . opimport This utility converts sample database files from a foreign binary format (abi) to the native format. This is useful only when moving sample files between hosts for analysis on platforms other than the one used for collection. See . Controlling the profiler Using <command>operf</command> This section describes in detail how operf is used to control profiling. Unless otherwise directed, operf will profile using the default event for your system. For most systems, the default event is some cycles-based event, assuming your processor type supports hardware performance counters. If your hardware does support performance counters, you can specify something other than the default hardware event on which to profile. The performance monitor counters can be programmed to count various hardware events, such as cache misses or MMX operations. The event chosen for each counter is reflected in the profile data collected by OProfile: functions and binaries at the top of the profiles reflect that most of the chosen events happened within that code. Additionally, each counter is programmed with a "count" value, which corresponds to how detailed the profile is. The lower the value, the more frequently profile samples are taken. You can choose to sample only kernel code, user-space code, or both (both is the default). Finally, some events have a "unit mask" -- this is a value that further restricts the type of event being counted. You can see the event types and unit masks for your CPU using ophelp. More information on event specification can be found at . The operf command syntax is: operf [ options ] [ --system-wide | --pid=<PID> | [ command [ args ] ] ] When profiling an application using either the command or --pid option of operf, forks and execs of the profiled process will also be profiled. The samples from an exec'ed process will be attributed to the executable binary run by that process. See Following is a description of the operf options. The command or application to be profiled. The [args] are the input arguments that the command or application requires. Either command, --pid or --system-wide is required, but cannot be used simultaneously. This option enables operf to profile a running application. PID should be the process ID of the process you wish to profile. When finished profiling (e.g., when the profiled process ends), press Ctrl-c to stop operf. This option is for performing a system-wide profile. You must have root authority to run operf in this mode. When finished profiling, Ctrl-C to stop operf. If you run operf --system-wide as a background job (i.e., with the &), you must stop it in a controlled manner in order to process the profile data it has collected. Use kill -SIGINT <operf-PID> for this purpose. It is recommended that when running operf with this option, your current working directory should be /root or a subdirectory of /root to avoid storing sample data files in locations accessible by regular users. A vmlinux file that matches the running kernel that has symbol and/or debuginfo. Kernel samples will be attributed to this binary, allowing post-processing tools (like opreport) to attribute samples to the appropriate kernel symbols. If this option is not specified, the file /proc/kallsyms is used to obtain kernel symbol addresses correponding to sample addresses. However, the setting of /proc/sys/kernel/kptr_restrict may restrict a non-root user's access to /proc/kallsyms, in which case, all kernel samples are attributed to a pseudo binary named "no-vmlinux". This option enables the callgraph to be saved during profiling. NOTE: The full callchain is recorded, so there is no depth limit. By default, operf moves old profile data from <session_dir>/samples/current to <session_dir>/samples/previous. If a 'previous' profile already existed, it will be replaced. If the --append option is passed, old profile data in 'current' is left in place and new profile data will be added to it, and the 'previous' profile (if one existed) will remain untouched. To access the 'previous' profile, simply add a session specification to the normal invocation of oprofile post-processing tools; for example: opreport session:previous This option is for passing a comma-separated list of event specifications for profiling. Each event spec is of the form: name:count[:unitmask[:kernel[:user]]] When no event specification is given, the default event for the running processor type will be used for profiling. Use ophelp to list the available events for your processor type. This option categorizes samples by thread group ID (tgid) and thread ID (tid). The --separate-thread option is useful for seeing per-thread samples in multi-threaded applications. When used in conjuction with the --system-wide option, --separate-thread is also useful for seeing per-process (i.e., per-thread group) samples for the case where multiple processes are executing the same program during a profiling run. This option categorizes samples by cpu. This option specifies the session directory to hold the sample data. If not specified, the data is saved in the oprofile_data directory on the current path. Use this option to reduce the overhead of operf during profiling. Normally, profile data received from the kernel is converted to OProfile format during profiling time. This is typically not an issue when profiling a single application. But when using the --system-wide option, this on-the-fly conversion process can cause noticeable overhead, particularly on busy multi-processor systems. The --lazy-conversion option directs operf to wait until profiling is completed to do the conversion of profile data. A comma-separated list of debugging control values used to increase the verbosity of the output. Valid values are: debug, record, convert, misc, sfile, arcs, and the special value, 'all'. Show operf version. Show a help message. Setting up the JIT profiling feature To gather information about JITed code from a virtual machine, it needs to be instrumented with an agent library. We use the agent libraries for Java in the following example. To use the Java profiling feature, you must build OProfile with the "--with-java" option (). JVM instrumentation Add this to the startup parameters of the JVM (for JVMTI): or The JVMPI agent implementation is enabled with the command line option Currently, there is just one option available -- . For JVMPI, the convention for specifying an option is . For JVMTI, the option specification is simply the option name, implying "yes"; no option specified implies "no". The agent library (installed in <oprof_install_dir>/lib/oprofile) needs to be in the library search path (e.g. add the library directory to LD_LIBRARY_PATH). If the command line of the JVM is not accessible, it may be buried within shell scripts or a launcher program. It may also be possible to set an environment variable to add the instrumentation. For Sun JVMs this is JAVA_TOOL_OPTIONS. Please check your JVM documentation for further information on the agent startup options. Configuration details Hardware performance counters Most processor models include performance monitor units that can be configured to monitor (count) various types of hardware events. This section is where you can find architecture-specific information to help you use these events for profiling. You do not really need to read this section unless you are interested in using events other than the default event chosen by OProfile. Your CPU type may not include the requisite support for hardware performance counters, in which case you must use OProfile in timer mode (see ), which is only available in OProfile releases prior to 1.0. The Intel hardware performance counters are detailed in the Intel IA-32 Architecture Manual, Volume 3, available from http://developer.intel.com/. The AMD Athlon/Opteron/Phenom/Turion implementation is detailed in http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/22007.pdf. For IBM PowerPC processors, documentation is available at https://www.power.org/. For example, https://www.power.org/events/Power7 contains specific information on the performance monitor unit for the IBM POWER7. A physical performance monitor counter (PMC) is configured by a profiling tool to count a particular type of event. When the counter overflows, an interrupt is delivered to the processor. This is the basic mechanism on which OProfile is based. The delivery mode is NMI, so blocking interrupts in the kernel does not prevent profiling. When the interrupt handler is called, the current PC (program counter) value and the current task are recorded into the profiling structure. This allows the overflow event to be attributed to a specific assembly instruction in a specific binary image. OProfile receives this data (commonly referred to as a "sample") from the kernel and writes it to the sample files. If we use an event such as CPU_CLK_UNHALTED or INST_RETIRED (GLOBAL_POWER_EVENTS or INSTR_RETIRED, respectively, on the Pentium 4), we can use the overflow counts (samples) as an estimate of actual time spent in each part of code. Alternatively we can profile interesting data such as the cache behaviour of routines with the other available counters. However there are several caveats. First, there are those issues listed in the Intel manual. There is a delay between the counter overflow and the interrupt delivery that can skew results on a small scale - this means you cannot rely on the profiles at the instruction level as being perfectly accurate. For example, if you are profiling an application with an event that counts L1 cache misses, a sample attributed to a particular instruction in the application doesn't necessarily mean that exact instruction is responsible for that event; instead, it means the sample was taken in the dynamic vicinity of that instruction, usually with a margin of error of a few instructions. Further details on this problem can be found in and also in the Digital paper "ProfileMe: A Hardware Performance Counter". Each counter has several configuration parameters besides the type of event to count. First, there is the unit mask, which is used to further qualify exactly what to count. Second, there is the count field, discussed below. Third, there are parameters to specify whether to increment counts whilst in kernel or user space. You can configure these separately for each counter. When the profiler is initially setup, a performance monitor counter is chosen for counting the event, and it is initialized using the count value. Once profiling begins, the counter increments with each event detected, and the counter overflows when the count value is reached. As described above, the counter overflow generates an interrupt, and the sample is recorded. After each overflow event, the counter is re-initialized using the count value, and counting begins anew for the next sample. Higher values for count result in samples being taken less frequently, and therefore less-detailed (and, potentially, less accurate) profiling. Lower values mean more detail, but higher overhead. Picking a good value for this parameter is, unfortunately, somewhat of a black art. It is of course dependent on the event you have chosen. Specifying too large a value will mean not enough interrupts are generated to give a realistic profile (though this problem can be ameliorated by profiling for longer time periods. Specifying too small a value can lead to higher performance overhead. OProfile timer interrupt mode Some CPU types do not provide the needed hardware support for hardware performance counters. Additionally, some older architectures are not supported by the perf_events kernel subsystem. On such machines, the operf and ocount commands will exit with a message indicating the processor type is not supported. However, you can install OProfile 0.9.9 and use the legacy opcontrol-based profiler, which will fall back to using timer interrupts for profiling. Note that in timer mode, OProfile is not able to profile code that has interrupts disabled. Timer mode is only available using the legacy opcontrol command, available in releases prior to 1.0. Architecture-specific configuration notes Pentium 4 support The Pentium 4 / Xeon performance counters are organized around 3 types of model specific registers (MSRs): 45 event selection control registers (ESCRs), 18 counter configuration control registers (CCCRs) and 18 counters. ESCRs describe a particular set of events which are to be recorded, and CCCRs bind ESCRs to counters and configure their operation. Unfortunately the relationship between these registers is quite complex; they cannot all be used with one another at any time. There is, however, a subset of 8 counters, 8 ESCRs, and 8 CCCRs which can be used independently of one another, so OProfile only accesses those registers, treating them as a bank of 8 "normal" counters, similar to those in the P6 or Athlon/Opteron/Phenom/Turion families of CPU. There is currently no support for Precision Event-Based Sampling (PEBS), nor any advanced uses of the Debug Store (DS). Current support is limited to the conservative extension of OProfile's existing interrupt-based model described above. PowerPC64 support The performance monitoring unit (PMU) for the IBM PowerPC 64-bit processors consists of between 4 and 8 counters (depending on the model). Advanced features such as instruction matching and thresholding are not supported by OProfile. Obtaining profiling results After collecting profile data, the raw data must undergo special processing in order for you to perform your analysis. The analysis tools that perform this special processing are opreport, opannotate, and opgprof. Additionally, the oparchive is used to gather together profile data, sampled binary files, etc. for the purpose of off-line analysis. While not really an analysis tool, oparchive is put in that category for convenience since it takes many of the same options as the other analysis tools. Profile specifications All of the analysis tools take a profile specification as an input argument. This is a set of definitions that describes the specific profile data that should be examined. The simplest profile specification is empty: this will match all the available profile files for the current session. Specification parameters are of the form . For example, if I wanted to get a combined symbol summary for /bin/myprog and /bin/myprog2, I could do opreport -l image:/bin/myprog,/bin/myprog2. As a special case, you don't actually need to specify the part of the specification. Anything left on the command line after all other opreport options have been processed is assumed to be an name. Similarly, if no is specified, then is assumed ("current" is a special name of the current (i.e., most recent) profiling session). In addition to the comma-separated list shown above, some of the specification parameters can take glob-style values. For example, if I want to see image summaries for all binaries profiled in /usr/bin/, I could do opreport image:/usr/bin/\*. Note the necessity to escape the special character from the shell. For opreport, profile specifications can be used to define two profiles, giving differential output. This is done by enclosing each of the two specifications within curly braces, as shown in the examples below. Any specifications outside of curly braces are shared across both. Examples Image summaries for all profiles with DATA_MEM_REFS samples in the saved session called "stresstest" : # opreport session:stresstest event:DATA_MEM_REFS Symbol summary for the application called "test_sym53c8xx,9xx". Note the escaping is necessary as takes a comma-separated list. # opreport -l ./test/test_sym53c8xx\,9xx Image summaries for all binaries in the test directory, excepting boring-test : # opreport image:./test/\* image-exclude:./test/boring-test Differential profile of a binary stored in two archives : # opreport -l /bin/bash { archive:./orig } { archive:./new } Differential profile of an archived binary with the current session : # opreport -l /bin/bash { archive:./orig } { } Profile specification parameters archivepath A path to an archive made with oparchive. Absence of this tag, unlike others, means "the current system", equivalent to specifying "archive:". sessionlist A comma-separated list of session names to resolve in. Absence of this tag, unlike others, means "the current session", equivalent to specifying "session:current". sessionlist A comma-separated list of sessions to exclude. imagelist A comma-separated list of image names to resolve. Each entry may be relative path, glob-style name, or full path, e.g. opreport 'image:/usr/bin/oprofiled,*op*,./opreport' imagelist Same as , but the matching images are excluded. imagelist Same as , but only for images that are for a particular primary binary image (namely, an application). imagelist Same as , but the matching images are excluded. eventlist The symbolic event name to match on, e.g. . You can pass a list of events for side-by-side comparison with opreport. eventcountlist The event count to match on, e.g. . Note that this value refers to the count value in the event spec you passed to operf when setting up to do a profile run. It has nothing to do with the sample counts in the profile data itself. You can pass a list of events for side-by-side comparison with opreport. masklist The unit mask value of the event to match on, e.g. . You can pass a list of events for side-by-side comparison with opreport. cpulist Only consider profiles for the given numbered CPU (starting from zero). This is only useful when using CPU profile separation. pidlist Only consider profiles for the given task groups. Unless some program is using threads, the task group ID of a process is the same as its process ID. This option corresponds to the POSIX notion of a thread group. This is only useful when using per-process profile separation. tidlist Only consider profiles for the given threads. When using recent thread libraries, all threads in a process share the same task group ID, but have different thread IDs. You can use this option in combination with to restrict the results to particular threads within a process. This is only useful when using per-process profile separation. Locating and managing binary images Each session's sample files can be found in the $SESSION_DIR/samples/ directory (default for operf is <cur_dir>/oprofile_data/samples/). These are used, along with the binary image files, to produce human-readable data. In some circumstances (e.g., kernel modules), OProfile will not be able to find the binary images. All the tools have an option to which you can pass a comma-separated list of alternate paths to search. For example, I can let OProfile find my 2.6 modules by using --image-path /lib/modules/2.6.0/kernel/. It is your responsibility to ensure that the correct images are found when using this option. Note that if a binary image changes after the sample file was created, you won't be able to get useful symbol-based data out. This situation is detected for you. If you replace a binary, you should make sure to save the old binary if you need to do comparative profiles. What to do when you don't get any results When attempting to get output, you may see the error : error: no sample files found: profile specification too strict ? What this is saying is that the profile specification you passed in, when matched against the available sample files, resulted in no matches. There are a number of reasons this might happen: spelling You specified a binary name, but spelt it wrongly. Check your spelling ! profiler wasn't running Make very sure that OProfile was actually up and running when you ran the application you wish to profile. application didn't run long enough Remember OProfile is a statistical profiler - you're not guaranteed to get samples for short-running programs. You can help this by using a lower count for the performance counter, so there are a lot more samples taken per second. application spent most of its time in libraries Similarly, if the application spends little time in the main binary image itself, with most of it spent in shared libraries it uses, you might not see any samples for the binary image (i.e., executable) itself. specification was really too strict For example, you specified something like , but no task with that group ID ever ran the code. application didn't generate any events If you're profiling a particular event, for example counting MMX operations, the code might simply have not generated any events in the first place. Verify the code you're profiling does what you expect it to. you didn't specify kernel module name correctly If you're trying to get reports for a kernel module, make sure to use the option, and specify the module name with the .ko extension. Check if the module is one loaded from initrd. Image summaries and symbol summaries (<command>opreport</command>) The opreport utility is the primary utility you will use for getting formatted data out of OProfile. It produces two types of data: image summaries and symbol summaries. An image summary lists the number of samples for individual binary images such as libraries or applications. Symbol summaries provide per-symbol profile data. In the following truncated example, we see an image summary for the whole system: $ opreport --long-filenames CPU: Intel Sandy Bridge microarchitecture, speed 2401 MHz (estimated) Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (No unit mask) count 100000 CPU_CLK_UNHALT...| samples| %| ------------------ 22577 28.9011 /usr/bin/Xorg CPU_CLK_UNHALT...| samples| %| ------------------ 16846 74.6158 /proc/kallsyms 2126 9.4167 /usr/bin/Xorg 763 3.3795 /usr/lib64/libpixman-1.so.0.26.2 ... 17402 22.2766 /usr/lib/jvm/java-1.7.0-openjdk-1.7.0.55.x86_64/jre/bin/java CPU_CLK_UNHALT...| samples| %| ------------------ 5666 32.5595 anon (tgid:29664 range:0x7f3475000000-0x7f347616ffff) 2312 13.2858 /usr/lib/jvm/java-1.7.0-openjdk-1.7.0.55.x86_64/jre/lib/amd64/server/libjvm.so ... 11554 14.7904 /home/user1/oprof-install/bin/operf CPU_CLK_UNHALT...| samples| %| ------------------ 7467 64.6270 /proc/kallsyms 1691 14.6356 /usr/bin/operf 1324 11.4592 /lib64/libc-2.12.so 455 3.9380 /usr/lib64/libstdc++.so.6.0.13 315 2.7263 /ext4 ... ... If we had specified in the previous command, we would have gotten a symbol summary of all the images across the entire system. We can restrict this to only part of the system profile; for example, below is a symbol summary for the operf program used to collect the profile. $ opreport -l -p /lib/modules/`uname -r` `which operf` 2>/dev/null | more CPU: Intel Sandy Bridge microarchitecture, speed 2401 MHz (estimated) Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (No unit mask) count 100000 samples % image name symbol name 860 7.4607 kallsyms avtab_search_node 474 4.1121 operf OP_perf_utils::op_write_event(event_union*, unsigned long long) 461 3.9993 kallsyms avc_has_perm_noaudit 455 3.9473 libstdc++.so.6.0.13 /usr/lib64/libstdc++.so.6.0.13 412 3.5742 libc-2.12.so _IO_vfscanf 369 3.2012 kallsyms __d_lookup 350 3.0363 kallsyms sidtab_context_to_sid 274 2.3770 operf OP_perf_utils::op_record_process_exec_mmaps(int, int, int, operf_record*) 232 2.0127 operf operf_process_info::find_mapping_for_sample(unsigned long long, bool) 222 1.9259 kallsyms __link_path_walk 191 1.6570 kallsyms pipe_read 34 0.2950 ext4.ko ext4_mark_iloc_dirty ... These are the two basic ways you are most likely to use regularly, but opreport can do a lot more than that, as described below. Merging separate profiles If you have used one of the options whilst profiling, there can be several separate profiles for a single binary image within a session. Normally the output will keep these images separated. So, for example, if you profiled with separation on a per-cpu basis (operf --separate-cpu), you would see separate columns in the output of opreport for each CPU where samples were recorded. But it can be useful to merge these results back together to make the report more readable. The option allows you to do that. Side-by-side multiple results If you have used multiple events when profiling, by default you get side-by-side results of each event's sample values from opreport. You can restrict which events to list by appropriate use of the profile specifications, etc. Callgraph output This section provides details on how to use the OProfile callgraph feature. Callgraph details When using the option, you can see what functions are calling other functions in the output. Consider the following program: #include <string.h> #include <stdlib.h> #include <stdio.h> #define SIZE 500000 static int compare(const void *s1, const void *s2) { return strcmp(s1, s2); } static void repeat(void) { int i; char *strings[SIZE]; char str[] = "abcdefghijklmnopqrstuvwxyz"; for (i = 0; i < SIZE; ++i) { strings[i] = strdup(str); strfry(strings[i]); } qsort(strings, SIZE, sizeof(char *), compare); } int main() { while (1) repeat(); } When running with the call-graph option, OProfile will record the function stack every time it takes a sample. opreport --callgraph outputs an entry for each function, where each entry looks similar to: samples % image name symbol name 197 0.1548 cg main 127036 99.8452 cg repeat 84590 42.5084 libc-2.3.2.so strfry 84590 66.4838 libc-2.3.2.so strfry [self] 39169 30.7850 libc-2.3.2.so random_r 3475 2.7312 libc-2.3.2.so __i686.get_pc_thunk.bx ------------------------------------------------------------------------------- Here the non-indented line is the function we're focussing upon (strfry()). This line is the same as you'd get from a normal opreport output. Above the non-indented line we find the functions that called this function (for example, repeat() calls strfry()). The samples and percentage values here refer to the number of times we took a sample where this call was found in the stack; the percentage is relative to all other callers of the function we're focussing on. Note that these values are not call counts; they only reflect the call stack every time a sample is taken; that is, if a call is found in the stack at the time of a sample, it is recorded in this count. Below the line are functions that are called by strfry() (called callees). It's clear here that strfry() calls random_r(). We also see a special entry with a "[self]" marker. This records the normal samples for the function, but the percentage becomes relative to all callees. This allows you to compare time spent in the function itself compared to functions it calls. Note that if a function calls itself, then it will appear in the list of callees of itself, but without the "[self]" marker; so recursive calls are still clearly separable. You may have noticed that the output lists main() as calling strfry(), but it's clear from the source that this doesn't actually happen. See for an explanation. Callgraph is not supported with JIT samples Callgraph output where anonymously mapped code is in the callstack can sometimes be misleading. For all such code, the samples for the anonymously mapped code are stored in a samples subdirectory named {anon:anon}/<tgid>.<begin_addr>.<end_addr>. As stated earlier, if this anonymously mapped code is JITed code from a supported VM like Java, OProfile creates an ELF file to provide a (somewhat) permanent backing file for the code. However, when viewing callgraph output, any anonymously mapped code in the callstack will be attributed to anon (<tgid>: range:<begin_addr>-<end_addr>, even if a .jo ELF file had been created for it. See the example below. ------------------------------------------------------------------------------- 1 2.2727 libj9ute23.so java.bin traceV 2 4.5455 libj9ute23.so java.bin utsTraceV 4 9.0909 libj9trc23.so java.bin fillInUTInterfaces 37 84.0909 libj9trc23.so java.bin twGetSequenceCounter 8 0.0154 libj9prt23.so java.bin j9time_hires_clock 27 61.3636 anon (tgid:10014 range:0x100000-0x103000) java.bin (no symbols) 9 20.4545 libc-2.4.so java.bin gettimeofday 8 18.1818 libj9prt23.so java.bin j9time_hires_clock [self] ------------------------------------------------------------------------------- The output shows that "anon (tgid:10014 range:0x100000-0x103000)" was a callee of j9time_hires_clock, even though the ELF file 10014.jo was created for this profile run. Unfortunately, there is currently no way to correlate that anonymous callgraph entry with its corresponding .jo file. Differential profiles with <command>opreport</command> Often, we'd like to be able to compare two profiles. For example, when analysing the performance of an application, we'd like to make code changes and examine the effect of the change. This is supported in opreport by giving a profile specification that identifies two different profiles. The general form is of: $ opreport <shared-spec> { <first-profile> } { <second-profile> } We lost our Dragon book down the back of the sofa, so you have to be careful to have spaces around those braces, or things will get hopelessly confused. We can only apologise. For each of the profiles, the shared section is prefixed, and then the specification is analysed. The usual parameters work both within the shared section, and in the sub-specification within the curly braces. A typical way to use this feature is with archives created with oparchive. Let's look at an example: $ operf ./a $ oparchive -o orig ./a # edit and recompile a $ operf ./a # now compare the current profile of a with the archived profile $ opreport --session-dir=`pwd`/oprofile_data/ -xl ./a { archive:./orig } { } CPU: PIII, speed 863.233 MHz (estimated) Counted CPU_CLK_UNHALTED events (clocks processor is not halted) with a unit mask of 0x00 (No unit mask) count 100000 samples % diff % symbol name 92435 48.5366 +0.4999 a 54226 --- --- c 49222 25.8459 +++ d 48787 25.6175 -2.2e-01 b Note that we specified an empty second profile in the curly braces, as we wanted to use the current session; alternatively, we could have specified another archive, or a tgid etc. We specified the binary a in the shared section, so we matched that in both the profiles we're diffing. As in the normal output, the results are sorted by the number of samples, and the percentage field represents the relative percentage of the symbol's samples in the second profile. Notice the new column in the output. This value represents the percentage change of the relative percent between the first and the second profile: roughly, "how much more important this symbol is". Looking at the symbol a(), we can see that it took roughly the same amount of the total profile in both the first and the second profile. The function c() was not in the new profile, so has been marked with ---. Note that the sample value is the number of samples in the first profile; since we're displaying results for the second profile, we don't list a percentage value for it, as it would be meaningless. d() is new in the second profile, and consequently marked with +++. When comparing profiles between different binaries, it should be clear that functions can change in terms of VMA and size. To avoid this problem, opreport considers a symbol to be the same if the symbol name, image name, and owning application name all match; any other factors are ignored. Note that the check for application name means that trying to compare library profiles between two different applications will not work as you might expect: each symbol will be considered different. Anonymous executable mappings Many applications, typically ones involving dynamic compilation into machine code (just-in-time, or "JIT", compilation), have executable mappings that are not backed by an ELF file. opreport has basic support for showing the samples taken in these regions; for example: $ opreport /usr/bin/mono -l CPU: ppc64 POWER5, speed 1654.34 MHz (estimated) Counted CYCLES events (Processor Cycles using continuous sampling) with a unit mask of 0x00 (No unit mask) count 100000 samples % image name symbol name 47 58.7500 mono (no symbols) 14 17.5000 anon (tgid:3189 range:0xf72aa000-0xf72fa000) (no symbols) 9 11.2500 anon (tgid:3189 range:0xf6cca000-0xf6dd9000) (no symbols) . . . . Note that, since such mappings are dependent upon individual invocations of a binary, these mappings are always listed as a dependent image. Equally, the results are not affected by the option. As shown in the opreport output above, OProfile is unable to attribute the samples to any symbol(s) because there is no ELF file for this code. Enhanced support for JITed code is now available for some virtual machines; e.g., the Java Virtual Machine. For details about OProfile output for JITed code, see . For more information about JIT support in OProfile, see . XML formatted output The --xml option can be used to generate XML instead of the usual text format. This allows opreport to eliminate some of the constraints dictated by the two dimensional text format. For example, it is possible to separate the sample data across multiple events, cpus and threads. The XML schema implemented by opreport is found in doc/opreport.xsd. It contains more detailed comments about the structure of the XML generated by opreport. Since XML is consumed by a client program rather than a user, its structure is fairly static. In particular, the --sort option is incompatible with the --xml option. Percentages are not dislayed in the XML so the options related to percentages will have no effect. Full pathnames are always displayed in the XML so --long-filenames is not necessary. The --details option will cause all of the individual sample data to be included in the XML as well as the instruction byte stream for each symbol (for doing disassembly) and can result in very large XML files. Options for <command>opreport</command> Accumulate sample and percentage counts in the symbol list. Show callgraph information. Show source file and line for each symbol. none: no demangling. normal: use default demangler (default) smart: use pattern-matching to make C++ symbol demangling more readable. Show per-instruction details for all selected symbols. Note that, for binaries without symbol information, the VMA values shown are raw file offsets for the image binary. Do not include application-specific images for libraries, kernel modules and the kernel.. Exclude all the symbols in the given comma-separated list. Make all percentages relative to the whole profile. Show help message. Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules. A path to a filesystem to search for additional binaries. Only include symbols in the given comma-separated list. Output full paths instead of basenames. Merge any profiles separated in a --separate session. Don't output a header detailing profiling parameters. Output to the given file instead of stdout. Reverse the sort from the default. Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then opreport will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory. Show the VMA address of each symbol (off by default). Sort the list of symbols by, respectively, symbol address, number of samples, symbol name, debug filename and line number, binary image filename. List per-symbol information instead of a binary image summary. Only output data for symbols that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the symbol is shown. Give verbose debugging output. Show version. Generate XML output. Outputting annotated source (<command>opannotate</command>) The opannotate utility generates annotated source files or assembly listings, optionally mixed with source. If you want to see the source file, the profiled application needs to have debug information, and the source must be available through this debug information. For GCC, you must use the option when you are compiling. If the binary doesn't contain sufficient debug information, you can still use opannotate to get annotated assembly as long as the binary has (at least) symbol information. Note that for the reason explained in the results can be inaccurate. The debug information itself can add other problems; for example, the line number for a symbol can be incorrect. Assembly instructions can be re-ordered and moved by the compiler, and this can lead to crediting source lines with samples not really "owned" by this line. Also see . You can output the annotation to one single file, containing all the source found using the . You can use this in conjunction with to get combined source/assembly output. You can also output a directory of annotated source files that maintains the structure of the original sources. Each line in the annotated source is prepended with the samples for that line. Additionally, each symbol is annotated giving details for the symbol as a whole. An example: $ opannotate --source --output-dir=annotated /usr/local/oprofile-pp/bin/oprofiled $ ls annotated/home/moz/src/oprofile-pp/daemon/ opd_cookie.h opd_image.c opd_kernel.c opd_sample_files.c oprofiled.c Line numbers are maintained in the source files, but each file has a footer appended describing the profiling details. The actual annotation looks something like this : ... :static uint64_t pop_buffer_value(struct transient * trans) 11510 1.9661 :{ /* pop_buffer_value total: 89901 15.3566 */ : uint64_t val; : 10227 1.7469 : if (!trans->remaining) { : fprintf(stderr, "BUG: popping empty buffer !\n"); : exit(EXIT_FAILURE); : } : : val = get_buffer_value(trans->buffer, 0); 2281 0.3896 : trans->remaining--; 2296 0.3922 : trans->buffer += kernel_pointer_size; : return val; 10454 1.7857 :} ... The first number on each line is the number of samples, whilst the second is the relative percentage of total samples. Locating source files Of course, opannotate needs to be able to locate the source files for the binary image(s) in order to produce output. Some binary images have debug information where the given source file paths are relative, not absolute. You can specify search paths to look for these files (similar to gdb's command) with the option. Sometimes you may have a binary image which gives absolute paths for the source files, but you have the actual sources elsewhere (commonly, you've installed an SRPM for a binary on your system and you want annotation from an existing profile). You can use the option to redirect OProfile to look somewhere else for source files. For example, imagine we have a binary generated from a source file that is given in the debug information as /tmp/build/libfoo/foo.c, and you have the source tree matching that binary installed in /home/user/libfoo/. You can redirect OProfile to find foo.c correctly like this : $ opannotate --source --base-dirs=/tmp/build/libfoo/ --search-dirs=/home/user/libfoo/ --output-dir=annotated/ /lib/libfoo.so You can specify multiple (comma-separated) paths to both options. Usage of <command>opannotate</command> Output annotated assembly. If this is combined with --source, then mixed source / assembly annotations are output. Comma-separated list of path prefixes. This can be used to point OProfile to a different location for source files when the debug information specifies an absolute path on your system for the source that does not exist. The prefix is stripped from the debug source file paths, then searched in the search dirs specified by . none: no demangling. normal: use default demangler (default) smart: use pattern-matching to make C++ symbol demangling more readable. Do not include application-specific images for libraries, kernel modules and the kernel. Exclude all files in the given comma-separated list of glob patterns. This option is supported solely with the --source option. It can be used to filter out source files in the output using the following types of specifications: filenames (basename -- i.e., no path) filename glob specifications (all files whose base filename matches the given pattern) directory segments (all source files located in the specified directory; e.g. "libio") directory segment glob specifications (e.g., "libi*") Exclude all the symbols in the given comma-separated list. Show help message. Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules. A path to a filesystem to search for additional binaries. Only include files in the given comma-separated list of glob patterns. The same rules apply for this option as for the --exclude-file option. Only include symbols in the given comma-separated list. Pass the given parameters as extra values when calling objdump. If more than one option is to be passed to objdump, the parameters must be enclosed in a quoted string. An example of where this option is useful is when your toolchain does not automatically recognize instructions that are specific to your processor. For example, on IBM POWER7/RHEL 6, objdump must be told that a binary file may have POWER7-specific instructions. The opannotate option to show the POWER7-specific instructions is: --objdump-params=-Mpower7 The opannotate option to show the POWER7-specific instructions, the source code (--source) and the line numbers (-l) would be: --objdump-params="-Mpower7 -l --source" Output directory. This makes opannotate output one annotated file for each source file. This option can't be used in conjunction with --assembly. Comma-separated list of paths to search for source files. This is useful to find source files when the debug information only contains relative paths. Output annotated source. This requires debugging information to be available for the binaries. Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then opannotate will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory. For annotated assembly, only output data for symbols that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the symbol is shown. For annotated source, only output data for source files that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the source file is shown. Give verbose debugging output. Show version. OProfile results with JIT samples After profiling a Java (or other supported VM) application, the OProfile JIT support creates ELF binaries from the intermediate files that were written by the agent library. The ELF binaries are named <tgid>.jo. With the symbol information stored in these ELF files, it is possible to map samples to the appropriate symbols. The usual analysis tools (opreport and/or opannotate) can now be used to get symbols and assembly code for the instrumented VM processes. Below is an example of a profile report of a Java application that has been instrumented with the provided agent library. $ opreport -l /usr/lib/jvm/jre-1.5.0-ibm/bin/java CPU: Core Solo / Duo, speed 2167 MHz (estimated) Counted CPU_CLK_UNHALTED events (Unhalted clock cycles) with a unit mask of 0x00 (Unhalted core cycles) count 100000 samples % image name symbol name 186020 50.0523 no-vmlinux no-vmlinux (no symbols) 34333 9.2380 7635.jo java void test.f1() 19022 5.1182 libc-2.5.so libc-2.5.so _IO_file_xsputn@@GLIBC_2.1 18762 5.0483 libc-2.5.so libc-2.5.so vfprintf 16408 4.4149 7635.jo java void test$HelloThread.run() 16250 4.3724 7635.jo java void test$test_1.f2(int) 15303 4.1176 7635.jo java void test.f2(int, int) 13252 3.5657 7635.jo java void test.f2(int) 5165 1.3897 7635.jo java void test.f4() 955 0.2570 7635.jo java void test$HelloThread.run()~ Depending on the JVM that is used, certain options of opreport and opannotate do NOT work since they rely on debug information (e.g. source code line number) that is not always available. The Sun JVM does provide the necessary debug information via the JVMTI[PI] interface, but other JVMs do not. As you can see in the opreport output, the JIT support agent for Java generates symbols to include the class and method signature. A symbol with the suffix ˜<n> (e.g. void test$HelloThread.run()˜1) means that this is the <n>th occurrence of the identical name. This happens if a method is re-JITed. A symbol with the suffix %<n>, means that the address space of this symbol was reused during the sample session (see ). The value <n> is the percentage of time that this symbol/code was present in relation to the total lifetime of all overlapping other symbols. A symbol of the form <return_val> <class_name>$<method_sig> denotes an inner class. <command>gprof</command>-compatible output (<command>opgprof</command>) If you're familiar with the output produced by GNU gprof, you may find opgprof useful. It takes a single binary as an argument, and produces a gmon.out file for use with gprof -p. If call-graph profiling is enabled, then this is also included. $ opgprof `which oprofiled` # generates gmon.out file $ gprof -p `which oprofiled` | head Flat profile: Each sample counts as 1 samples. % cumulative self self total time samples samples calls T1/call T1/call name 33.13 206237.00 206237.00 odb_insert 22.67 347386.00 141149.00 pop_buffer_value 9.56 406881.00 59495.00 opd_put_sample 7.34 452599.00 45718.00 opd_find_image 7.19 497327.00 44728.00 opd_process_samples Usage of <command>opgprof</command> Show help message. Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules. A path to a filesystem to search for additional binaries. Output to the given file instead of the default, gmon.out Only output data for symbols that have more than the given percentage of total samples. Give verbose debugging output. Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then opgprof will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory. Show version. Analyzing profile data on another system (<command>oparchive</command>) The oparchive utility generates a directory populated with executable, debug, and oprofile sample files. This directory can be copied to another (host) machine and analyzed offline, with no further need to access the data collection machine (target). The following command, executed on the target system, will collect the sample files, the executables associated with the sample files, and the debuginfo files associated with the executables and copy them into /tmp/current_data: # oparchive -o /tmp/current_data When transferring archived profile data to a host machine for offline analysis, you need to determine if the oprofile ABI format is compatible between the target system and the host system; if it isn't, you must run the opimport command to convert the target's sample data files to the format of your host system. See for more details. After your profile data is transferred to the host system and (if necessary) you have run the opimport command to convert the file format, you can now run the opreport and opannotate commands. However, you must provide an "archive specification" to let these post-processing tools know where to find of the profile data (sample files, executables, etc.); for example: # opreport archive:/home/user1/my_oprofile_archive --symbols Furthermore, if your profile was collected on your target system into a session-dir other than /var/lib/oprofile, the oparchive command will display a message similar to the following: # NOTE: The sample data in this archive is located at /home/user1/test-stuff/oprofile_data instead of the standard location of /var/lib/oprofile. Hence, when using opreport and other post-processing tools on this archive, you must pass the following option: --session-dir=/home/user1/test-stuff/oprofile_data Then the above opreport example would have to include that option. In some host/target development environments, all target executables, libraries, and debuginfo files are stored in a root directory on the host to facilitate offline analysis. In such cases, the oparchive command collects more data than is necessary; so, when copying the resulting output of oparchive, you can skip all of the executables, etc, and just archive the $SESSION_DIR tree located within the output directory you specified in your oparchive command. Then, when running the opreport or opannotate commands on your host system, pass the option to point to the location of your target's executables, etc. Usage of <command>oparchive</command> Show help message. Do not include application-specific images for libraries, kernel modules and the kernel. Comma-separated list of additional paths to search for binaries. This is needed to find kernel modules. A path to a filesystem to search for additional binaries. Output to the given directory. There is no default. This must be specified. Only list the files that would be archived, don't copy them. Give verbose debugging output. Use sample database from the specified directory dir_path instead of the default location. If this option is not specified, then oparchive will search for samples in <cur_dir>/oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used as the session directory. Show version. Converting sample database files (<command>opimport</command>) This utility converts sample database files from a foreign binary format (abi) to the native format. This is required when moving sample files to a (host) system other than the one used for collection (target system), and the host and target systems are different architectures. The abi format of the sample files to be imported is described in a text file located in $SESSION_DIR/abi. If you are unsure if your target and host systems have compatible architectures (in regard to the OProfile ABI), simply diff a $SESSION_DIR/abi file from the target system with one from the host system. If any differences show up at all, you must run the opimport command. The oparchive command should be used on the machine where the profile was taken (target) in order to collect sample files and all other necessary information. The archive directory that is the output from oparchive should be copied to the system where you wish to perform your performance analysis (host). The following command converts an input sample file to the specified output sample file using the given abi file as a binary description of the input file and the curent platform abi as a binary description of the output file. (NOTE: The ellipses are used to make the example more compact and cannot be used in an actual command line.) # opimport -a /tmp/foreign-abi -o /tmp/imported/.../GLOBAL_POWER_EVENTS.200000.1.all.all.all /tmp/archived/var/lib/.../mprime/GLOBAL_POWER_EVENTS.200000.1.all.all.all Since opimport converts just one file at a time, an example shell script is provided below that will perform an import/conversion of all sample files in a samples directory collected from the target system. #!/bin/bash #Usage: my-import.sh <foreign-abi-fullpathname> # NOTE: Start from the "samples" directory containing the "current" directory # to be imported mkdir current-imported cd current-imported; (cd ../current; find . -type d ! -name .) |xargs mkdir cd ../current; mv stats ../StatsSave; find . -type f | while read line; do opimport -a $1 -o ../current-imported/$line $line; done; mv ../StatsSave stats; Example usage: Assume that on the target system, a profile was collected using a session-dir of /var/lib/oprofile, and then oparchive -o profile1 was run. Then the profile1 directory is copied to the host system for analysis. To import the sample data in profile1, you would perform the following steps: $cd profile1/var/lib/oprofile/samples $my-import.sh `pwd`/../abi If the OProfile ABI is truly different on host and target machines, then the end result of running the above script will place the converted (i.e., imported) files into the current-imported directory. By default, opreport and other post-profiling tools will look for samples in samples/current of the specified session directory. So you should either rename current-imported to current or specify the session specification of session:current-imported when running post-profiling tools. If the OProfile ABI is the same on the host and target machines, the my-import.sh script will print the following message for each sample file: input abi is identical to native. no conversion necessary. Usage of <command>opimport</command> Show help message. Input abi file description location. Force conversion even if the input and output abi are identical. Specify the output filename. If the output file already exists, the file is not overwritten but data are accumulated in. Sample filename are informative for post profile tools and must be kept identical, in other word the pathname from the first path component containing a '{' must be kept as it in the output filename. Give verbose debugging output. Show version. Interpreting profiling results The standard caveats of profiling apply in interpreting the results from OProfile: profile realistic situations, profile different scenarios, profile for as long as a time as possible, avoid system-specific artifacts, don't trust the profile data too much. Also bear in mind the comments on the performance counters above - you cannot rely on totally accurate instruction-level profiling. However, for almost all circumstances the data can be useful. Ideally a utility such as Intel's VTUNE would be available to allow careful instruction-level analysis; go hassle Intel for this, not me ;) Profiling interrupt latency This is an example of how the latency of delivery of profiling interrupts can impact the reliability of the profiling data. This is pretty much a worst-case-scenario example: these problems are fairly rare. double fun(double a, double b, double c) { double result = 0; for (int i = 0 ; i < 10000; ++i) { result += a; result *= b; result /= c; } return result; } Here the last instruction of the loop is very costly, and you would expect the result reflecting that - but (cutting the instructions inside the loop): $ opannotate -a -t 10 ./a.out 88 15.38% : 8048337: fadd %st(3),%st 48 8.391% : 8048339: fmul %st(2),%st 68 11.88% : 804833b: fdiv %st(1),%st 368 64.33% : 804833d: inc %eax : 804833e: cmp $0x270f,%eax : 8048343: jle 8048337 The problem comes from the x86 hardware; when the counter overflows the IRQ is asserted but the hardware has features that can delay the NMI interrupt: x86 hardware is synchronous (i.e. cannot interrupt during an instruction); there is also a latency when the IRQ is asserted, and the multiple execution units and the out-of-order model of modern x86 CPUs also causes problems. This is the same function, with annotation : $ opannotate -s -t 10 ./a.out :double fun(double a, double b, double c) :{ /* _Z3funddd total: 572 100.0% */ : double result = 0; 368 64.33% : for (int i = 0 ; i < 10000; ++i) { 88 15.38% : result += a; 48 8.391% : result *= b; 68 11.88% : result /= c; : } : return result; :} The conclusion: don't trust samples coming at the end of a loop, particularly if the last instruction generated by the compiler is costly. This case can also occur for branches. Always bear in mind that samples can be delayed by a few cycles from its real position. That's a hardware problem and OProfile can do nothing about it. Kernel profiling Interrupt masking OProfile uses non-maskable interrupts (NMI) on the P6 generation, Pentium 4, Athlon, Opteron, Phenom, and Turion processors. These interrupts can occur even in sections of the kernel where interrupts are disabled, allowing collection of samples in virtually all executable code. Idle time Your kernel is likely to support halting the processor when a CPU is idle. As the typical hardware events like CPU_CLK_UNHALTED do not count when the CPU is halted, the kernel profile will not reflect the actual amount of time spent idle. You can change this behaviour by booting with the option, which uses a different idle routine. This will appear as poll_idle() in your kernel profile. Profiling kernel modules OProfile profiles kernel modules by default. However, there are a couple of problems you may have when trying to get results. First, you may have booted via an initrd; this means that the actual path for the module binaries cannot be determined automatically. To get around this, you can use the option to the analysis tools to specify where to look for the kernel modules. In kernel version 2.6, the information on where kernel module binaries are located was removed. This means OProfile needs guiding with the option to find your modules. Normally, you can just use your standard module top-level directory for this. Note that due to this problem, OProfile cannot check that the modification times match; it is your responsibility to make sure you do not modify a binary after a profile has been created. If you have run insmod or modprobe to insert a module in a particular directory, it is important that you specify this directory with the option first, so that it over-rides an older module binary that might exist in other directories you've specified with . It is up to you to make sure that these values are correct: the kernel simply does not provide enough information for OProfile to get this information. Interpreting call-graph profiles Sometimes the results from call-graph profiles may be different from what you expect to see. The first thing to check is whether the target binaries where compiled with frame pointers enabled (if the binary was compiled using gcc's option, you will not get meaningful results). Note that as of this writing, the GCC developers plan to disable frame pointers by default. The Linux kernel is built without frame pointers by default; there is a configuration option you can use to turn it on under the "Kernel Hacking" menu. Often you may see a caller of a function that does not actually directly call the function you're looking at (e.g. if a() calls b(), which in turn calls c(), you may see an entry for a()->c()). What's actually occurring is that we are taking samples at the very start (or the very end) of c(); at these few instructions, we haven't yet created the new function's frame, so it appears as if a() is calling directly into c(). Be careful not to be misled by these entries. Like the rest of OProfile, call-graph profiling uses a statistical approach; this means that sometimes a backtrace sample is truncated, or even partially wrong. Bear this in mind when examining results. Inaccuracies in annotated source Side effects of optimizations The compiler can introduce some pitfalls in the annotated source output. The optimizer can move pieces of code in such manner that two line of codes are interlaced (instruction scheduling). Also debug info generated by the compiler can show strange behavior. This is especially true for complex expressions e.g. inside an if statement: if (a && .. b && .. c &&) here the problem come from the position of line number. The available debug info does not give enough details for the if condition, so all samples are accumulated at the position of the right brace of the expression. Using opannotate can help to show the real samples at an assembly level. Prologues and epilogues The compiler generally needs to generate "glue" code across function calls, dependent on the particular function call conventions used. Additionally other things need to happen, like stack pointer adjustment for the local variables; this code is known as the function prologue. Similar code is needed at function return, and is known as the function epilogue. This will show up in annotations as samples at the very start and end of a function, where there is no apparent executable code in the source. Inlined functions You may see that a function is credited with a certain number of samples, but the listing does not add up to the correct total. To pick a real example : :internal_sk_buff_alloc_security(struct sk_buff *skb) 353 2.342% :{ /* internal_sk_buff_alloc_security total: 1882 12.48% */ : : sk_buff_security_t *sksec; 15 0.0995% : int rc = 0; : 10 0.06633% : sksec = skb->lsm_security; 468 3.104% : if (sksec && sksec->magic == DSI_MAGIC) { : goto out; : } : : sksec = (sk_buff_security_t *) get_sk_buff_memory(skb); 3 0.0199% : if (!sksec) { 38 0.2521% : rc = -ENOMEM; : goto out; 10 0.06633% : } : memset(sksec, 0, sizeof (sk_buff_security_t)); 44 0.2919% : sksec->magic = DSI_MAGIC; 32 0.2123% : sksec->skb = skb; 45 0.2985% : sksec->sid = DSI_SID_NORMAL; 31 0.2056% : skb->lsm_security = sksec; : : out: : 146 0.9685% : return rc; : 98 0.6501% :} Here, the function is credited with 1,882 samples, but the annotations below do not account for this. This is usually because of inline functions - the compiler marks such code with debug entries for the inline function definition, and this is where opannotate annotates such samples. In the case above, memset is the most likely candidate for this problem. Examining the mixed source/assembly output can help identify such results. This problem is more visible when there is no source file available, in the following example it's trivially visible the sums of symbols samples is less than the number of the samples for this file. The difference must be accounted to inline functions. /* * Total samples for file : "arch/i386/kernel/process.c" * * 109 2.4616 */ /* default_idle total: 84 1.8970 */ /* cpu_idle total: 21 0.4743 */ /* flush_thread total: 1 0.0226 */ /* prepare_to_copy total: 1 0.0226 */ /* __switch_to total: 18 0.4065 */ The missing samples are not lost, they will be credited to another source location where the inlined function is defined. The inlined function will be credited from multiple call site and merged in one place in the annotated source file so there is no way to see from what call site are coming the samples for an inlined function. When running opannotate, you may get a warning "some functions compiled without debug information may have incorrect source line attributions". In some rare cases, OProfile is not able to verify that the derived source line is correct (when some parts of the binary image are compiled without debugging information). Be wary of results if this warning appears. Furthermore, for some languages the compiler can implicitly generate functions, such as default copy constructors. Such functions are labelled by the compiler as having a line number of 0, which means the source annotation can be confusing. Inaccuracy in line number information Depending on your compiler you can fall into the following problem: struct big_object { int a[500]; }; int main() { big_object a, b; for (int i = 0 ; i != 1000 * 1000; ++i) b = a; return 0; } Compiled with gcc 3.0.4 the annotated source is clearly inaccurate: :int main() :{ /* main total: 7871 100% */ : big_object a, b; : for (int i = 0 ; i != 1000 * 1000; ++i) : b = a; 7871 100% : return 0; :} The problem here is distinct from the IRQ latency problem; the debug line number information is not precise enough; again, looking at output of opannoatate -as can help. :int main() :{ : big_object a, b; : for (int i = 0 ; i != 1000 * 1000; ++i) : 80484c0: push %ebp : 80484c1: mov %esp,%ebp : 80484c3: sub $0xfac,%esp : 80484c9: push %edi : 80484ca: push %esi : 80484cb: push %ebx : b = a; : 80484cc: lea 0xfffff060(%ebp),%edx : 80484d2: lea 0xfffff830(%ebp),%eax : 80484d8: mov $0xf423f,%ebx : 80484dd: lea 0x0(%esi),%esi : return 0; 3 0.03811% : 80484e0: mov %edx,%edi : 80484e2: mov %eax,%esi 1 0.0127% : 80484e4: cld 8 0.1016% : 80484e5: mov $0x1f4,%ecx 7850 99.73% : 80484ea: repz movsl %ds:(%esi),%es:(%edi) 9 0.1143% : 80484ec: dec %ebx : 80484ed: jns 80484e0 : 80484ef: xor %eax,%eax : 80484f1: pop %ebx : 80484f2: pop %esi : 80484f3: pop %edi : 80484f4: leave : 80484f5: ret So here it's clear that copying is correctly credited with of all the samples, but the line number information is misplaced. objdump -dS exposes the same problem. Note that maintaining accurate debug information for compilers when optimizing is difficult, so this problem is not suprising. The problem of debug information accuracy is also dependent on the binutils version used; some BFD library versions contain a work-around for known problems of gcc, some others do not. This is unfortunate but we must live with that, since profiling is pointless when you disable optimisation (which would give better debugging entries). Assembly functions Often the assembler cannot generate debug information automatically. This means that you cannot get a source report unless you manually define the neccessary debug information; read your assembler documentation for how you might do that. The only debugging info needed currently by OProfile is the line-number/filename-VMA association. When profiling assembly without debugging info you can always get report for symbols, and optionally for VMA, through opreport -l or opreport -d, but this works only for symbols with the right attributes. For gas you can get this by .globl foo .type foo,@function whilst for nasm you must use GLOBAL foo:function ; [1] Note that OProfile does not need the global attribute, only the function attribute. Overlapping symbols in JITed code Some virtual machines (e.g., Java) may re-JIT a method, resulting in previously allocated space for a piece of compiled code to be reused. This means that, at one distinct code address, multiple symbols/methods may be present during the run time of the application. Since OProfile samples are buffered and don′t have timing information, there is no way to correlate samples with the (possibly) varying address ranges in which the code for a symbol may reside. An alternative would be flushing the OProfile sampling buffer when we get an unload event, but this could result in high overhead. To moderate the problem of overlapping symbols, OProfile tries to select the symbol that was present at this address range most of the time. Additionally, other overlapping symbols are truncated in the overlapping area. This gives reasonable results, because in reality, address reuse typically takes place during phase changes of the application -- in particular, during application startup. Thus, for optimum profiling results, start the sampling session after application startup and burn in. Using operf to profile fork/execs When profiling an application that forks one or more new processes, operf will record samples for both the parent process and forked processes. This is also true even if the forked process performs an exec of some sort (e.g., execvp). If the process does not perform an exec, you will see that opreport will attribute samples for the forked process to the main application executable. On the other hand, if the forked process does perform an exec, then opreport will attribute samples to the executable being exec'ed. To demonstrate this, consider the following examples. When using operf to profile a single application (either with the --pid option or command option), the normal opreport summary output (i.e., invoking opreport with no options) looks something like the following: CPU_CLK_UNHALT...| samples| %| ------------------ 112342 100.000 sprintft CPU_CLK_UNHALT...| samples| %| ------------------ 104209 92.7605 libc-2.12.so 7273 6.4740 sprintft 858 0.7637 no-vmlinux 2 0.0018 ld-2.12.so But if you profile an application that does a fork/exec, the opreport summary output will show samples for both the main application you profiled, as well as the exec'ed program. An example is shown below where s-m-fork is the main application being profiled, which in turn forks a process that does an execvp of the memcpyt program. CPU_CLK_UNHALT...| samples| %| ------------------ 133382 70.5031 memcpyt CPU_CLK_UNHALT...| samples| %| ------------------ 123852 92.8551 libc-2.12.so 8522 6.3892 memcpyt 1007 0.7550 no-vmlinux 1 7.5e-04 ld-2.12.so 55804 29.4969 s-m-fork CPU_CLK_UNHALT...| samples| %| ------------------ 51801 92.8267 libc-2.12.so 3589 6.4314 s-m-fork 414 0.7419 no-vmlinux Other discrepancies Another cause of apparent problems is the hidden cost of instructions. A very common example is two memory reads: one from L1 cache and the other from memory: the second memory read is likely to have more samples. There are many other causes of hidden cost of instructions. A non-exhaustive list: mis-predicted branch, TLB cache miss, partial register stall, partial register dependencies, memory mismatch stall, re-executed µops. If you want to write programs at the assembly level, be sure to take a look at the Intel and AMD documentation at http://developer.intel.com/ and http://developer.amd.com/devguides.jsp. Controlling the event counter Using <command>ocount</command> This section describes in detail how ocount is used. Unless the option is specified, ocount will use the default event for your system. For most systems, the default event is some cycles-based event, assuming your processor type supports hardware performance counters. The event specification used for ocount is slightly different from that required for profiling -- a count value is not needed. You can see the event information for your CPU using ophelp. More information on event specification can be found at . The ocount command syntax is: ocount [ options ] [ --system-wide | --process-list <pids> | --thread-list <tids> | --cpu-list <cpus> [ command [ args ] ] ] ocount has 5 run modes: system-wide process-list thread-list cpu-list command One and only one of these 5 run modes must be specified when you run ocount. If you run ocount using a run mode other than command [args], press Ctrl-c to stop it when finished counting (e.g., when the monitored process ends). If you background ocount (i.e., with ’&’) while using one these run modes, you must stop it in a controlled manner so that the data collection process can be shut down cleanly and final results can be displayed. Use kill -SIGINT <ocount-PID> for this purpose. Following is a description of the ocount options. The command or application to be profiled. The [args] are the input arguments that the command or application requires. The command and its arguments must be positioned at the end of the command line, after all other ocount options. Use this option to count events for one or more already-running applications, specified via a comma-separated list (PIDs). Event counts will be collected for all children of the passed process(es) as well. Use this option to count events for one or more already-running threads, specified via a comma-separated list (TIDs). Event counts will not be collected for any children of the passed thread(s). This option is for counting events for all processes running on your system. You must have root authority to run ocount in this mode. This option is for counting events on a subset of processors on your system. You must have root authority to run ocount in this mode. This is a comma-separated list, where each element in the list may be either a single processor number or a range of processor numbers; for example: ’-C 2,3,4-11,15’. This option is for passing a comma-separated list of event specifications for counting. Each event spec is of the form: name[:unitmask[:kernel[:user]]] When no event specification is given, the default event for the running processor type will be used for counting. Use ophelp to list the available events for your processor type. This option can be used in conjunction with either the --process-list or --thread-list option to display event counts on a per-thread (per-process) basis. Without this option, all counts are aggregated. This option can be used in conjunction with either the --system-wide or --cpu-list option to display event counts on a per-cpu basis. Without this option, all counts are aggregated. Note: The interval_length is given in milliseconds. However, the current implementation only supports 100 ms granularity, so the given interval_length will be rounded to the nearest 100 ms. Results collected for each time interval are printed immediately instead of the default of one dump of cumulative event counts at the end of the run. Counters are reset to zero at the start of each interval. If num_intervals is specified, ocount exits after the specified number of intervals occur. Use this option to print results in the following brief format: [optional cpu or thread,]<event_name>,<count>,<percent_time_enabled> [ <int> ,]< string >,< u64 >,< double > If --timer-interval is specified, a separate line formatted as timestamp,<num_seconds_since_epoch>[.n] is printed ahead of each dump of event counts. If the time interval specified is less than one second, the timestamp will have 1/10 second precision. Results are written to outfile_name instead of interactively to the terminal. Use this option to increase the verbosity of the output. Show ocount version. Show a help message. Acknowledgments Thanks to (in no particular order) : Arjan van de Ven, Rik van Riel, Juan Quintela, Philippe Elie, Phillipp Rumpf, Tigran Aivazian, Alex Brown, Alisdair Rawsthorne, Bob Montgomery, Ray Bryant, H.J. Lu, Jeff Esper, Will Cohen, Graydon Hoare, Cliff Woolley, Alex Tsariounov, Al Stone, Jason Yeh, Randolph Chung, Anton Blanchard, Richard Henderson, Andries Brouwer, Bryan Rittmeyer, Maynard P. Johnson, Richard Reich (rreich@rdrtech.com), Zwane Mwaikambo, Dave Jones, Charles Filtness; and finally Pulp, for "Intro". oprofile-1.3.0/doc/buffers.png0000664000175000017500000010356712534404406013202 00000000000000‰PNG  IHDR6·ð—®sBITÛáOà pHYsÐй‹çŸ IDATxœìÝ{\ÇÚ8ðI@Š$$¥Ü""bíñÖZ°b¥¢€’žZ¤j‹­×–úÚúªÕ*Öbµ¨ ~Z«O¡=õ" ¨oë¥*V-"x)Ò* Ê="°óûcN÷·Í&»$$çûW2;³;»“äÉ^Æ`hÀÔ]:_  ¡©;ÀÜY›º ;ƒ¬æ öü€î`¯x@¨ÀB*@×7nÜ /fÏžM—߸qƒœbõññqrrrrr‰„¼®©©a¾%ŠŠŠÈ|$‰L&³··wssÛ¹s'sY“H7Ô–N·rrr’H$vvv#GŽ°À{À4ÂÂÂæÏŸßÐÐ`¹ ‚Š¢Ø3ä˜ÄÍÞÞ~Þ¼yׯ_׳o)))S§NõôôLMMe–ónÞ½{/X° 66výúõút Ó[„ `ëÖ­³¶¶þè£ôŸÆøÁƒ+V¬ðóóóððÐq’.ÊËËõéEQ©©©QQQ¯¿þú·ß~KQ=IÇ-yáÂ…Nw@Ï-À™x¯tS?]ˆqª¸¸øÔ©S ??_—PL111ìr??¿ÇklžÄ{êÉ“'ÞÞÞ+W®ÔÖP[÷˜ë~êÔ)‘HT__þüy„PAAsV·€ÚR®^½* 9:ЉìÀ^Ø`¯˜Lppð¼yóæÎÛÜÜÌ[™ù¹oß>µòŒŒŒ«W¯>~ü˜ÝDã$Ìø%eþÓG 2D ØÛÛÏ™3'&&&>>^—uaÇ"%%eòäÉ}ûö}á… …Ú1(]¶@uuµ‹‹‹îK×qãÐ!*€)mÚ´I¥R­Y³FÏùDDD„„„¼÷Þ{˜õ/›=I.—?zôˆ®P]]Ý·o_ú-ùymmm---]½zµµuç~ÓÜÜ|èС´´4@  ïÞ½ûÝwß=yò„Y‡w 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levon@movementarian.org
 2003 John Levon Introduction This document is current for OProfile version . This document provides some details on the internal workings of OProfile for the interested hacker. This document assumes strong C, working C++, plus some knowledge of kernel internals and CPU hardware. Only the "new" implementation associated with kernel 2.6 and above is covered here. 2.4 uses a very different kernel module implementation and daemon to produce the sample files. Overview OProfile is a statistical continuous profiler. In other words, profiles are generated by regularly sampling the current registers on each CPU (from an interrupt handler, the saved PC value at the time of interrupt is stored), and converting that runtime PC value into something meaningful to the programmer. OProfile achieves this by taking the stream of sampled PC values, along with the detail of which task was running at the time of the interrupt, and converting into a file offset against a particular binary file. Because applications mmap() the code they run (be it /bin/bash, /lib/libfoo.so or whatever), it's possible to find the relevant binary file and offset by walking the task's list of mapped memory areas. Each PC value is thus converted into a tuple of binary-image,offset. This is something that the userspace tools can use directly to reconstruct where the code came from, including the particular assembly instructions, symbol, and source line (via the binary's debug information if present). Regularly sampling the PC value like this approximates what actually was executed and how often - more often than not, this statistical approximation is good enough to reflect reality. In common operation, the time between each sample interrupt is regulated by a fixed number of clock cycles. This implies that the results will reflect where the CPU is spending the most time; this is obviously a very useful information source for performance analysis. Sometimes though, an application programmer needs different kinds of information: for example, "which of the source routines cause the most cache misses ?". The rise in importance of such metrics in recent years has led many CPU manufacturers to provide hardware performance counters capable of measuring these events on the hardware level. Typically, these counters increment once per each event, and generate an interrupt on reaching some pre-defined number of events. OProfile can use these interrupts to generate samples: then, the profile results are a statistical approximation of which code caused how many of the given event. Consider a simplified system that only executes two functions A and B. A takes one cycle to execute, whereas B takes 99 cycles. Imagine we run at 100 cycles a second, and we've set the performance counter to create an interrupt after a set number of "events" (in this case an event is one clock cycle). It should be clear that the chances of the interrupt occurring in function A is 1/100, and 99/100 for function B. Thus, we statistically approximate the actual relative performance features of the two functions over time. This same analysis works for other types of events, providing that the interrupt is tied to the number of events occurring (that is, after N events, an interrupt is generated). There are typically more than one of these counters, so it's possible to set up profiling for several different event types. Using these counters gives us a powerful, low-overhead way of gaining performance metrics. If OProfile, or the CPU, does not support performance counters, then a simpler method is used: the kernel timer interrupt feeds samples into OProfile itself. The rest of this document concerns itself with how we get from receiving samples at interrupt time to producing user-readable profile information. Components of the OProfile system Architecture-specific components If OProfile supports the hardware performance counters found on a particular architecture, code for managing the details of setting up and managing these counters can be found in the kernel source tree in the relevant arch/arch/oprofile/ directory. The architecture-specific implementation works via filling in the oprofile_operations structure at init time. This provides a set of operations such as setup(), start(), stop(), etc. that manage the hardware-specific details of fiddling with the performance counter registers. The other important facility available to the architecture code is oprofile_add_sample(). This is where a particular sample taken at interrupt time is fed into the generic OProfile driver code. oprofilefs OProfile implements a pseudo-filesystem known as "oprofilefs", mounted from userspace at /dev/oprofile. This consists of small files for reporting and receiving configuration from userspace, as well as the actual character device that the OProfile userspace receives samples from. At setup() time, the architecture-specific may add further configuration files related to the details of the performance counters. For example, on x86, one numbered directory for each hardware performance counter is added, with files in each for the event type, reset value, etc. The filesystem also contains a stats directory with a number of useful counters for various OProfile events. Generic kernel driver This lives in drivers/oprofile/, and forms the core of how OProfile works in the kernel. Its job is to take samples delivered from the architecture-specific code (via oprofile_add_sample()), and buffer this data, in a transformed form as described later, until releasing the data to the userspace daemon via the /dev/oprofile/buffer character device. The OProfile daemon The OProfile userspace daemon's job is to take the raw data provided by the kernel and write it to the disk. It takes the single data stream from the kernel and logs sample data against a number of sample files (found in $SESSION_DIR/samples/current/, by default located at /var/lib/oprofile/samples/current/. For the benefit of the "separate" functionality, the names/paths of these sample files are mangled to reflect where the samples were from: this can include thread IDs, the binary file path, the event type used, and more. After this final step from interrupt to disk file, the data is now persistent (that is, changes in the running of the system do not invalidate stored data). So the post-profiling tools can run on this data at any time (assuming the original binary files are still available and unchanged, naturally). Post-profiling tools So far, we've collected data, but we've yet to present it in a useful form to the user. This is the job of the post-profiling tools. In general form, they collate a subset of the available sample files, load and process each one correlated against the relevant binary file, and finally produce user-readable information. Performance counter management Providing a user interface The performance counter registers need programming in order to set the type of event to count, etc. OProfile uses a standard model across all CPUs for defining these events as follows : The event type e.g. DATA_MEM_REFS The sub-events to count (more detailed specification) The hardware counter(s) that can count this event The reset value (how many events before an interrupt) Whether the counter should increment when in kernel space Whether the counter should increment when in user space The term "unit mask" is borrowed from the Intel architectures, and can further specify exactly when a counter is incremented (for example, cache-related events can be restricted to particular state transitions of the cache lines). All of the available hardware events and their details are specified in the textual files in the events directory. The syntax of these files should be fairly obvious. The user specifies the names and configuration details of the chosen counters via opcontrol. These are then written to the kernel module (in numerical form) via /dev/oprofile/N/ where N is the physical hardware counter (some events can only be used on specific counters; OProfile hides these details from the user when possible). On IA64, the perfmon-based interface behaves somewhat differently, as described later. Programming the performance counter registers We have described how the user interface fills in the desired configuration of the counters and transmits the information to the kernel. It is the job of the ->setup() method to actually program the performance counter registers. Clearly, the details of how this is done is architecture-specific; it is also model-specific on many architectures. For example, i386 provides methods for each model type that programs the counter registers correctly (see the op_model_* files in arch/i386/oprofile for the details). The method reads the values stored in the virtual oprofilefs files and programs the registers appropriately, ready for starting the actual profiling session. The architecture-specific drivers make sure to save the old register settings before doing OProfile setup. They are restored when OProfile shuts down. This is useful, for example, on i386, where the NMI watchdog uses the same performance counter registers as OProfile; they cannot run concurrently, but OProfile makes sure to restore the setup it found before it was running. In addition to programming the counter registers themselves, other setup is often necessary. For example, on i386, the local APIC needs programming in order to make the counter's overflow interrupt appear as an NMI (non-maskable interrupt). This allows sampling (and therefore profiling) of regions where "normal" interrupts are masked, enabling more reliable profiles. Starting and stopping the counters Initiating a profiling session is done via writing an ASCII '1' to the file /dev/oprofile/enable. This sets up the core, and calls into the architecture-specific driver to actually enable each configured counter. Again, the details of how this is done is model-specific (for example, the Athlon models can disable or enable on a per-counter basis, unlike the PPro models). IA64 and perfmon The IA64 architecture provides a different interface from the other architectures, using the existing perfmon driver. Register programming is handled entirely in user-space (see daemon/opd_perfmon.c for the details). A process is forked for each CPU, which creates a perfmon context and sets the counter registers appropriately via the sys_perfmonctl interface. In addition, the actual initiation and termination of the profiling session is handled via the same interface using PFM_START and PFM_STOP. On IA64, then, there are no oprofilefs files for the performance counters, as the kernel driver does not program the registers itself. Instead, the perfmon driver for OProfile simply registers with the OProfile core with an OProfile-specific UUID. During a profiling session, the perfmon core calls into the OProfile perfmon driver and samples are registered with the OProfile core itself as usual (with oprofile_add_sample()). Collecting and processing samples Receiving interrupts Naturally, how the overflow interrupts are received is specific to the hardware architecture, unless we are in "timer" mode, where the logging routine is called directly from the standard kernel timer interrupt handler. On the i386 architecture, the local APIC is programmed such that when a counter overflows (that is, it receives an event that causes an integer overflow of the register value to zero), an NMI is generated. This calls into the general handler do_nmi(); because OProfile has registered itself as capable of handling NMI interrupts, this will call into the OProfile driver code in arch/i386/oprofile. Here, the saved PC value (the CPU saves the register set at the time of interrupt on the stack available for inspection) is extracted, and the counters are examined to find out which one generated the interrupt. Also determined is whether the system was inside kernel or user space at the time of the interrupt. These three pieces of information are then forwarded onto the OProfile core via oprofile_add_sample(). Finally, the counter values are reset to the chosen count value, to ensure another interrupt happens after another N events have occurred. Other architectures behave in a similar manner. Core data structures Before considering what happens when we log a sample, we shall digress for a moment and look at the general structure of the data collection system. OProfile maintains a small buffer for storing the logged samples for each CPU on the system. Only this buffer is altered when we actually log a sample (remember, we may still be in an NMI context, so no locking is possible). The buffer is managed by a two-handed system; the "head" iterator dictates where the next sample data should be placed in the buffer. Of course, overflow of the buffer is possible, in which case the sample is discarded. It is critical to remember that at this point, the PC value is an absolute value, and is therefore only meaningful in the context of which task it was logged against. Thus, these per-CPU buffers also maintain details of which task each logged sample is for, as described in the next section. In addition, we store whether the sample was in kernel space or user space (on some architectures and configurations, the address space is not sub-divided neatly at a specific PC value, so we must store this information). As well as these small per-CPU buffers, we have a considerably larger single buffer. This holds the data that is eventually copied out into the OProfile daemon. On certain system events, the per-CPU buffers are processed and entered (in mutated form) into the main buffer, known in the source as the "event buffer". The "tail" iterator indicates the point from which the CPU may be read, up to the position of the "head" iterator. This provides an entirely lock-free method for extracting data from the CPU buffers. This process is described in detail later in this chapter.
The OProfile buffers
Logging a sample As mentioned, the sample is logged into the buffer specific to the current CPU. The CPU buffer is a simple array of pairs of unsigned long values; for a sample, they hold the PC value and the counter for the sample. (The counter value is later used to translate back into the relevant event type the counter was programmed to). In addition to logging the sample itself, we also log task switches. This is simply done by storing the address of the last task to log a sample on that CPU in a data structure, and writing a task switch entry into the buffer if the new value of current() has changed. Note that later we will directly de-reference this pointer; this imposes certain restrictions on when and how the CPU buffers need to be processed. Finally, as mentioned, we log whether we have changed between kernel and userspace using a similar method. Both of these variables (last_task and last_is_kernel) are reset when the CPU buffer is read. Logging stack traces OProfile can also provide statistical samples of call chains (on x86). To do this, at sample time, the frame pointer chain is traversed, recording the return address for each stack frame. This will only work if the code was compiled with frame pointers, but we're careful to abort the traversal if the frame pointer appears bad. We store the set of return addresses straight into the CPU buffer. Note that, since this traversal is keyed off the standard sample interrupt, the number of times a function appears in a stack trace is not an indicator of how many times the call site was executed: rather, it's related to the number of samples we took where that call site was involved. Thus, the results for stack traces are not necessarily proportional to the call counts: typical programs will have many main() samples. Synchronising the CPU buffers to the event buffer At some point, we have to process the data in each CPU buffer and enter it into the main (event) buffer. The file buffer_sync.c contains the relevant code. We periodically (currently every HZ/4 jiffies) start the synchronisation process. In addition, we process the buffers on certain events, such as an application calling munmap(). This is particularly important for exit() - because the CPU buffers contain pointers to the task structure, if we don't process all the buffers before the task is actually destroyed and the task structure freed, then we could end up trying to dereference a bogus pointer in one of the CPU buffers. We also add a notification when a kernel module is loaded; this is so that user-space can re-read /proc/modules to determine the load addresses of kernel module text sections. Without this notification, samples for a newly-loaded module could get lost or be attributed to the wrong module. The synchronisation itself works in the following manner: first, mutual exclusion on the event buffer is taken. Remember, we do not need to do that for each CPU buffer, as we only read from the tail iterator (whilst interrupts might be arriving at the same buffer, but they will write to the position of the head iterator, leaving previously written entries intact). Then, we process each CPU buffer in turn. A CPU switch notification is added to the buffer first (for support). Then the processing of the actual data starts. As mentioned, the CPU buffer consists of task switch entries and the actual samples. When the routine sync_buffer() sees a task switch, the process ID and process group ID are recorded into the event buffer, along with a dcookie (see below) identifying the application binary (e.g. /bin/bash). The mmap_sem for the task is then taken, to allow safe iteration across the tasks' list of mapped areas. Each sample is then processed as described in the next section. After a buffer has been read, the tail iterator is updated to reflect how much of the buffer was processed. Note that when we determined how much data there was to read in the CPU buffer, we also called cpu_buffer_reset() to reset last_task and last_is_kernel, as we've already mentioned. During the processing, more samples may have been arriving in the CPU buffer; this is OK because we are careful to only update the tail iterator to how much we actually read - on the next buffer synchronisation, we will start again from that point. Identifying binary images In order to produce useful profiles, we need to be able to associate a particular PC value sample with an actual ELF binary on the disk. This leaves us with the problem of how to export this information to user-space. We create unique IDs that identify a particular directory entry (dentry), and write those IDs into the event buffer. Later on, the user-space daemon can call the lookup_dcookie system call, which looks up the ID and fills in the full path of the binary image in the buffer user-space passes in. These IDs are maintained by the code in fs/dcookies.c; the cache lasts for as long as the daemon has the event buffer open. Finding a sample's binary image and offset We haven't yet described how we process the absolute PC value into something usable by the user-space daemon. When we find a sample entered into the CPU buffer, we traverse the list of mappings for the task (remember, we will have seen a task switch earlier, so we know which task's lists to look at). When a mapping is found that contains the PC value, we look up the mapped file's dentry in the dcookie cache. This gives the dcookie ID that will uniquely identify the mapped file. Then we alter the absolute value such that it is an offset from the start of the file being mapped (the mapping need not start at the start of the actual file, so we have to consider the offset value of the mapping). We store this dcookie ID into the event buffer; this identifies which binary the samples following it are against. In this manner, we have converted a PC value, which has transitory meaning only, into a static offset value for later processing by the daemon. We also attempt to avoid the relatively expensive lookup of the dentry cookie value by storing the cookie value directly into the dentry itself; then we can simply derive the cookie value immediately when we find the correct mapping. Generating sample files Processing the buffer Now we can move onto user-space in our description of how raw interrupt samples are processed into useful information. As we described in previous sections, the kernel OProfile driver creates a large buffer of sample data consisting of offset values, interspersed with notification of changes in context. These context changes indicate how following samples should be attributed, and include task switches, CPU changes, and which dcookie the sample value is against. By processing this buffer entry-by-entry, we can determine where the samples should be accredited to. This is particularly important when using the . The file daemon/opd_trans.c contains the basic routine for the buffer processing. The struct transient structure is used to hold changes in context. Its members are modified as we process each entry; it is passed into the routines in daemon/opd_sfile.c for actually logging the sample to a particular sample file (which will be held in $SESSION_DIR/samples/current). The buffer format is designed for conciseness, as high sampling rates can easily generate a lot of data. Thus, context changes are prefixed by an escape code, identified by is_escape_code(). If an escape code is found, the next entry in the buffer identifies what type of context change is being read. These are handed off to various handlers (see the handlers array), which modify the transient structure as appropriate. If it's not an escape code, then it must be a PC offset value, and the very next entry will be the numeric hardware counter. These values are read and recorded in the transient structure; we then do a lookup to find the correct sample file, and log the sample, as described in the next section. Handling kernel samples Samples from kernel code require a little special handling. Because the binary text which the sample is against does not correspond to any file that the kernel directly knows about, the OProfile driver stores the absolute PC value in the buffer, instead of the file offset. Of course, we need an offset against some particular binary. To handle this, we keep a list of loaded modules by parsing /proc/modules as needed. When a module is loaded, a notification is placed in the OProfile buffer, and this triggers a re-read. We store the module name, and the loading address and size. This is also done for the main kernel image, as specified by the user. The absolute PC value is matched against each address range, and modified into an offset when the matching module is found. See daemon/opd_kernel.c for the details. Locating and creating sample files We have a sample value and its satellite data stored in a struct transient, and we must locate an actual sample file to store the sample in, using the context information in the transient structure as a key. The transient data to sample file lookup is handled in daemon/opd_sfile.c. A hash is taken of the transient values that are relevant (depending upon the setting of , some values might be irrelevant), and the hash value is used to lookup the list of currently open sample files. Of course, the sample file might not be found, in which case we need to create and open it. OProfile uses a rather complex scheme for naming sample files, in order to make selecting relevant sample files easier for the post-profiling utilities. The exact details of the scheme are given in oprofile-tests/pp_interface, but for now it will suffice to remember that the filename will include only relevant information for the current settings, taken from the transient data. A fully-specified filename looks something like : /var/lib/oprofile/samples/current/{root}/usr/bin/xmms/{dep}/{root}/lib/tls/libc-2.3.2.so/CPU_CLK_UNHALTED.100000.0.28082.28089.0 It should be clear that this identifies such information as the application binary, the dependent (library) binary, the hardware event, and the process and thread ID. Typically, not all this information is needed, in which cases some values may be replaced with the token all. The code that generates this filename and opens the file is found in daemon/opd_mangling.c. You may have realised that at this point, we do not have the binary image file names, only the dcookie values. In order to determine a file name, a dcookie value is looked up in the dcookie cache. This is to be found in daemon/opd_cookie.c. Since dcookies are both persistent and unique during a sampling session, we can cache the values. If the value is not found in the cache, then we ask the kernel to do the lookup from value to file name for us by calling lookup_dcookie(). This looks up the value in a kernel-side cache (see fs/dcookies.c) and returns the fully-qualified file name to userspace. Writing data to a sample file Each specific sample file is a hashed collection, where the key is the PC offset from the transient data, and the value is the number of samples recorded against that offset. The files are mmap()ed into the daemon's memory space. The code to actually log the write against the sample file can be found in libdb/. For recording stack traces, we have a more complicated sample filename mangling scheme that allows us to identify cross-binary calls. We use the same sample file format, where the key is a 64-bit value composed from the from,to pair of offsets. Generating useful output All of the tools used to generate human-readable output have to take roughly the same steps to collect the data for processing. First, the profile specification given by the user has to be parsed. Next, a list of sample files matching the specification has to obtained. Using this list, we need to locate the binary file for each sample file, and then use them to extract meaningful data, before a final collation and presentation to the user. Handling the profile specification The profile specification presented by the user is parsed in the function profile_spec::create(). This creates an object representing the specification. Then we use profile_spec::generate_file_list() to search for all sample files and match them against the profile_spec. To enable this matching process to work, the attributes of each sample file is encoded in its filename. This is a low-tech approach to matching specifications against candidate sample files, but it works reasonably well. A typical sample file might look like these: /var/lib/oprofile/samples/current/{root}/bin/ls/{dep}/{root}/bin/ls/{cg}/{root}/bin/ls/CPU_CLK_UNHALTED.100000.0.all.all.all /var/lib/oprofile/samples/current/{root}/bin/ls/{dep}/{root}/bin/ls/CPU_CLK_UNHALTED.100000.0.all.all.all /var/lib/oprofile/samples/current/{root}/bin/ls/{dep}/{root}/bin/ls/CPU_CLK_UNHALTED.100000.0.7423.7424.0 /var/lib/oprofile/samples/current/{kern}/r128/{dep}/{kern}/r128/CPU_CLK_UNHALTED.100000.0.all.all.all This looks unnecessarily complex, but it's actually fairly simple. First we have the session of the sample, by default located here /var/lib/oprofile/samples/current. This location can be changed by specifying the --session-dir option at command-line. This session could equally well be inside an archive from oparchive. Next we have one of the tokens {root} or {kern}. {root} indicates that the binary is found on a file system, and we will encode its path in the next section (e.g. /bin/ls). {kern} indicates a kernel module - on 2.6 kernels the path information is not available from the kernel, so we have to special-case kernel modules like this; we encode merely the name of the module as loaded. Next there is a {dep} token, indicating another token/path which identifies the dependent binary image. This is used even for the "primary" binary (i.e. the one that was execve()d), as it simplifies processing. Finally, if this sample file is a normal flat profile, the actual file is next in the path. If it's a call-graph sample file, we need one further specification, to allow us to identify cross-binary arcs in the call graph. The actual sample file name is dot-separated, where the fields are, in order: event name, event count, unit mask, task group ID, task ID, and CPU number. This sample file can be reliably parsed (with parse_filename()) into a filename_spec. Finally, we can check whether to include the sample file in the final results by comparing this filename_spec against the profile_spec the user specified (for the interested, see valid_candidate() and profile_spec::match). Then comes the really complicated bit... Collating the candidate sample files At this point we have a duplicate-free list of sample files we need to process. But first we need to do some further arrangement: we need to classify each sample file, and we may also need to "invert" the profiles. Classifying sample files It's possible for utilities like opreport to show data in columnar format: for example, we might want to show the results of two threads within a process side-by-side. To do this, we need to classify each sample file into classes - the classes correspond with each opreport column. The function that handles this is arrange_profiles(). Each sample file is added to a particular class. If the sample file is the first in its class, a template is generated from the sample file. Each template describes a particular class (thus, in our example above, each template will have a different thread ID, and this uniquely identifies each class). Each class has a list of "profile sets" matching that class's template. A profile set is either a profile of the primary binary image, or any of its dependent images. After all sample files have been listed in one of the profile sets belonging to the classes, we have to name each class and perform error-checking. This is done by identify_classes(); each class is checked to ensure that its "axis" is the same as all the others. This is needed because opreport can't produce results in 3D format: we can only differ in one aspect, such as thread ID or event name. Creating inverted profile lists Remember that if we're using certain profile separation options, such as "--separate=lib", a single binary could be a dependent image to many different binaries. For example, the C library image would be a dependent image for most programs that have been profiled. As it happens, this can cause severe performance problems: without some re-arrangement, these dependent binary images would be opened each time we need to process sample files for each program. The solution is to "invert" the profiles via invert_profiles(). We create a new data structure where the dependent binary is first, and the primary binary images using that dependent binary are listed as sub-images. This helps our performance problem, as now we only need to open each dependent image once, when we process the list of inverted profiles. Generating profile data Things don't get any simpler at this point, unfortunately. At this point we've collected and classified the sample files into the set of inverted profiles, as described in the previous section. Now we need to process each inverted profile and make something of the data. The entry point for this is populate_for_image(). Processing the binary image The first thing we do with an inverted profile is attempt to open the binary image (remember each inverted profile set is only for one binary image, but may have many sample files to process). The op_bfd class provides an abstracted interface to this; internally it uses libbfd. The main purpose of this class is to process the symbols for the binary image; this is also where symbol filtering happens. This is actually quite tricky, but should be clear from the source. Processing the sample files The class profile_container is a hold-all that contains all the processed results. It is a container of profile_t objects. The add_sample_files() method uses libdb to open the given sample file and add the key/value types to the profile_t. Once this has been done, profile_container::add() is passed the profile_t plus the op_bfd for processing. profile_container::add() walks through the symbols collected in the op_bfd. op_bfd::get_symbol_range() gives us the start and end of the symbol as an offset from the start of the binary image, then we interrogate the profile_t for the relevant samples for that offset range. We create a symbol_entry object for this symbol and fill it in. If needed, here we also collect debug information from the op_bfd, and possibly record the detailed sample information (as used by opreport -d and opannotate). Finally the symbol_entry is added to a private container of profile_container - this symbol_container holds all such processed symbols. Generating output After the processing described in the previous section, we've now got full details of what we need to output stored in the profile_container on a symbol-by-symbol basis. To produce output, we need to replay that data and format it suitably. opreport first asks the profile_container for a symbol_collection (this is also where thresholding happens). This is sorted, then a opreport_formatter is initialised. This object initialises a set of field formatters as requested. Then opreport_formatter::output() is called. This iterates through the (sorted) symbol_collection; for each entry, the selected fields (as set by the format_flags options) are output by calling the field formatters, with the symbol_entry passed in. Extended Feature Interface Introduction The Extended Feature Interface is a standard callback interface designed to allow extension to the OProfile daemon's sample processing. Each feature defines a set of callback handlers which can be enabled or disabled through the OProfile daemon's command-line option. This interface can be used to implement support for architecture-specific features or features not commonly used by general OProfile users. Feature Name and Handlers Each extended feature has an entry in the ext_feature_table in opd_extended.cpp. Each entry contains a feature name, and a corresponding set of handlers. Feature name is a unique string, which is used to identify a feature in the table. Each feature provides a set of handlers, which will be executed by the OProfile daemon from pre-determined locations to perform certain tasks. At runtime, the OProfile daemon calls a feature handler wrapper from one of the predetermined locations to check whether an extended feature is enabled, and whether a particular handler exists. Only the handlers of the enabled feature will be executed. Enabling Features Each feature is enabled using the OProfile daemon (oprofiled) command-line option "--ext-feature=<extended-feature-name>:[args]". The "extended-feature-name" is used to determine the feature to be enabled. The optional "args" is passed into the feature-specific initialization handler (ext_init). Currently, only one extended feature can be enabled at a time. Type of Handlers Each feature is responsible for providing its own set of handlers. Types of handler are: ext_init Handler "ext_init" handles initialization of an extended feature. It takes "args" parameter which is passed in through the "oprofiled --ext-feature=< extended-feature-name>:[args]". This handler is executed in the function opd_options() in the file daemon/oprofiled.c . The ext_init handler is required for all features. ext_print_stats Handler "ext_print_stats" handles the extended feature statistics report. It adds a new section in the OProfile daemon statistics report, which is normally outputed to the file /var/lib/oprofile/samples/oprofiled.log. This handler is executed in the function opd_print_stats() in the file daemon/opd_stats.c. ext_sfile Handler "ext_sfile" contains a set of handlers related to operations on the extended sample files (sample files for events related to extended feature). These operations include create_sfile(), sfile_dup(), close_sfile(), sync_sfile(), and get_file() as defined in daemon/opd_sfile.c. An additional field, odb_t * ext_file, is added to the struct sfile for storing extended sample files information. Extended Feature Reference Implementation Instruction-Based Sampling (IBS) An example of extended feature implementation can be seen by examining the AMD Instruction-Based Sampling support. IBS Initialization Instruction-Based Sampling (IBS) is a new performance measurement technique available on AMD Family 10h processors. Enabling IBS profiling is done simply by specifying IBS performance events through the "--event=" options. opcontrol --event=IBS_FETCH_XXX:<count>:<um>:<kernel>:<user> opcontrol --event=IBS_OP_XXX:<count>:<um>:<kernel>:<user> Note: * Count and unitmask for all IBS fetch events must be the same, as do those for IBS op. IBS performance events are listed in opcontrol --list-events. When users specify these events, opcontrol verifies them using ophelp, which checks for the ext:ibs_fetch or ext:ibs_op tag in events/x86-64/family10/events file. Then, it configures the driver interface (/dev/oprofile/ibs_fetch/... and /dev/oprofile/ibs_op/...) and starts the OProfile daemon as follows. oprofiled \ --ext-feature=ibs:\ fetch:<IBS_FETCH_EVENT1>,<IBS_FETCH_EVENT2>,...,:<IBS fetch count>:<IBS Fetch um>|\ op:<IBS_OP_EVENT1>,<IBS_OP_EVENT2>,...,:<IBS op count>:<IBS op um> Here, the OProfile daemon parses the --ext-feature option and checks the feature name ("ibs") before calling the the initialization function to handle the string containing IBS events, counts, and unitmasks. Then, it stores each event in the IBS virtual-counter table (struct opd_event ibs_vc[OP_MAX_IBS_COUNTERS]) and stores the event index in the IBS Virtual Counter Index (VCI) map (ibs_vci_map[OP_MAX_IBS_COUNTERS]) with IBS event value as the map key. IBS Data Processing During a profile session, the OProfile daemon identifies IBS samples in the event buffer using the "IBS_FETCH_CODE" or "IBS_OP_CODE". These codes trigger the handlers code_ibs_fetch_sample() or code_ibs_op_sample() listed in the handler_t handlers[] vector in daemon/opd_trans.c . These handlers are responsible for processing IBS samples and translate them into IBS performance events. Unlike traditional performance events, each IBS sample can be derived into multiple IBS performance events. For each event that the user specifies, a combination of bits from Model-Specific Registers (MSR) are checked against the bitmask defining the event. If the condition is met, the event will then be recorded. The derivation logic is in the files daemon/opd_ibs_macro.h and daemon/opd_ibs_trans.[h,c]. IBS Sample File Traditionally, sample file information (odb_t) is stored in the struct sfile::odb_t file[OP_MAX_COUNTER]. Currently, OP_MAX_COUNTER is 8 on non-alpha, and 20 on alpha-based system. Event index (the counter number on which the event is configured) is used to access the corresponding entry in the array. Unlike the traditional performance event, IBS does not use the actual counter registers (i.e. /dev/oprofile/0,1,2,3). Also, the number of performance events generated by IBS could be larger than OP_MAX_COUNTER (currently upto 13 IBS-fetch and 46 IBS-op events). Therefore IBS requires a special data structure and sfile handlers (struct opd_ext_sfile_handlers) for managing IBS sample files. IBS-sample-file information is stored in a memory allocated by handler ibs_sfile_create(), which can be accessed through struct sfile::odb_t * ext_files. Glossary of OProfile source concepts and types application image The primary binary image used by an application. This is derived from the kernel and corresponds to the binary started upon running an application: for example, /bin/bash. binary image An ELF file containing executable code: this includes kernel modules, the kernel itself (a.k.a. vmlinux), shared libraries, and application binaries. dcookie Short for "dentry cookie". A unique ID that can be looked up to provide the full path name of a binary image. dependent image A binary image that is dependent upon an application, used with per-application separation. Most commonly, shared libraries. For example, if /bin/bash is running and we take some samples inside the C library itself due to bash calling library code, then the image /lib/libc.so would be dependent upon /bin/bash. merging This refers to the ability to merge several distinct sample files into one set of data at runtime, in the post-profiling tools. For example, per-thread sample files can be merged into one set of data, because they are compatible (i.e. the aggregation of the data is meaningful), but it's not possible to merge sample files for two different events, because there would be no useful meaning to the results. profile class A collection of profile data that has been collected under the same class template. For example, if we're using opreport to show results after profiling with two performance counters enabled profiling DATA_MEM_REFS and CPU_CLK_UNHALTED, there would be two profile classes, one for each event. Or if we're on an SMP system and doing per-cpu profiling, and we request opreport to show results for each CPU side-by-side, there would be a profile class for each CPU. profile specification The parameters the user passes to the post-profiling tools that limit what sample files are used. This specification is matched against the available sample files to generate a selection of profile data. profile template The parameters that define what goes in a particular profile class. This includes a symbolic name (e.g. "cpu:1") and the code-usable equivalent. oprofile-1.3.0/doc/op-jit-devel.html0000664000175000017500000005457612536363317014241 00000000000000 OProfile JIT agent developer guide

OProfile JIT agent developer guide

Maynard Johnson

Copyright © 2007 IBM Corporation

Table of Contents

1. Developing a new JIT agent
1. Overview
2. Implementing JIT support for a new virtual machine
2. The JIT support API
1. op_open_agent
2. op_close_agent
3. op_write_native_code
4. op_write_debug_line_info
5. op_unload_native_code

Chapter 1. Developing a new JIT agent

Table of Contents

1. Overview
2. Implementing JIT support for a new virtual machine

OProfile includes a header file and library that are intended to be used by developers who wish to extend OProfile's JIT support to other non-supported virtual machines. This developer guide describes these development files and how to use them.

1. Overview

OProfile already includes some implementations that use the JIT support, e.g., the Java Virtual Machine Toolkit Interface (JVMTI) library, libjvmti_oprofile.so. In developing a new implementation, you will likely follow a similar (if not identical) procedure as was used in developing the JVMTI library. Following are the high level steps to follow:

  1. Ensure your virtual machine provides an API that, at minimum, can provide the following information about dynamically compiled code:
    • Notification when compilation occurs
    • Name of the symbol (i.e., function or class/method, etc.)
    • Address in anonymous memory where the compiled code was loaded
    • Length of the compiled code segment
  2. Write an agent library that communicates with your VM to obtain compiled code notifications. Invoke the required functions from opagent.h (Section 2, “Implementing JIT support for a new virtual machine”) and link your library with libopagent.so (installed at <oprofile_install_dir>/lib/oprofile).

2. Implementing JIT support for a new virtual machine

The JIT support API for OProfile is defined in <oprofile-install-dir>/include/opagent.h. Some parts of the API are mandatory for an agent library to use; other parts are optional. The mandatory functions are shown below. 

op_agent_t op_open_agent(void);

void op_close_agent(op_agent_t hdl);

int op_write_native_code(op_agent_t hdl, char const * symbol_name,
                         uint64_t vma, const void * code,
                         const unsigned int code_size);

To implement this part of your library, you must perform the following steps:

  1. Implement a function to set up initial communication with the VM. Once communication to the VM is established, your agent library should call op_op_agent() and cache the returned op_agent_t handle for use in future calls.
  2. Perform any necessary steps to register with the VM to be notified of compiled code load events. Registration must include a callback function you will implement in the library to handle the compiled code load events.
  3. The callback function mentioned above must obtain all required information from the VM to pass to libopagent via op_write_native_code().
  4. When disconnecting from the VM, your library should call op_agent_close().

Use of the functions below are optional, depending on the kinds of information your VM can provide to your agent library. See the JVMTI agent library for an example of how to use these functions. 

int op_unload_native_code(op_agent_t hdl, uint64_t vma);

int op_write_debug_line_info(op_agent_t hdl, void const * code,
                             size_t nr_entry,
                             struct debug_line_info const * compile_map);

Note

While the libopagent functions are thread-safe, you should not use them in signal handlers.

Chapter 2. The JIT support API

Table of Contents

1. op_open_agent
2. op_close_agent
3. op_write_native_code
4. op_write_debug_line_info
5. op_unload_native_code

This chapter describes the JIT support API. See opagent.h for more details.

1. op_open_agent

Initializes the agent library. 
#include <opagent.h>
op_agent_t op_open_agent(); 
void;
 

Description

This function must be called by agents before any other function. Creates and opens a JIT dump file in /var/lib/oprofile/jitdump using the naming convention <process_id>.dump.

Parameters

None

Return value

Returns a valid op_agent_t handle or NULL. If NULL is returned, errno is set to indicate the nature of the error. For a list of possible errno values, see the man pages for:

stat, creat, gettimeofday, fdopen, fwrite

2. op_close_agent

Uninitialize the agent library. 
#include <opagent.h>
int op_close_agent(hdl); 
op_agent_t hdl;
 

Description

Frees all resources and closes open file handles.

Parameters

hdl : Handle returned from an earlier call to op_open_agent()

Return value

Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for:

gettimeofday, fwrite

3. op_write_native_code

Write information about compiled code to a JIT dump file. 
#include <opagent.h>
int op_write_native_code(hdl,  
 symbol_name,  
 vma,  
 code,  
 code_size); 
op_agent_thdl;
char const *symbol_name;
uint64_tvma;
void const *code;
const unsigned intcode_size;
 

Description

Signal the dynamic generation of native code from a virtual machine. Writes a JIT dump record to the open JIT dump file using the passed information.

Parameters

hdl : Handle returned from an earlier call to op_open_agent()

symbol_name : The name of the symbol being dynamically compiled. This name can (and should) contain all necessary information to disambiguate it from symbols of the same name; e.g., class, method signature.

vma : Virtual memory address of the executable code

code : Pointer to the location of the compiled code. Theoretically, this may be a different location from that given by the vma argument. For some JIT compilers, obtaining the code may be impractical. For this (or any other) reason, the agent can choose to pass NULL for this paraemter. If NULL is passed, no code will be copied into the JIT dump file.

code_size : Size of the compiled code

Return value

Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for:

gettimeofday, fwrite

4. op_write_debug_line_info

Write debug information about compiled code to a JIT dump file. 
#include <opagent.h>
int op_write_debug_line_info(hdl,  
 code,  
 nr_entry,  
 compile_map); 
op_agent_thdl;
void const *code;
size_tnr_entry;
struct debug_line_info const *compile_map;
 

Description

Add debug line information to a piece of code. An op_write_native_code() with the same code pointer should have occurred before this call. It's not necessary to provide one lineno information entry per machine instruction; the array can contain hole.

Parameters

hdl : Handle returned from an earlier call to op_open_agent()

code : Pointer to the location of the code with debug info

nr_entry : Number of entries in compile_map

compile_map : Array of struct debug_line_info. See the JVMTI agent library implementation for an example of what information should be retrieved from a VM to fill out this data structure.

Return value

Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for:

gettimeofday, ftell, fwrite

5. op_unload_native_code

Write information to the JIT dump file about invalidated compiled code. 
#include <opagent.h>
int op_unload_native_code(hdl,  
 vma); 
op_agent_thdl;
uint64_tvma;
 

Description

Signal the invalidation of native code from a virtual machine.

Parameters

hdl : Handle returned from an earlier call to op_open_agent()

vma : Virtual memory address of the compiled code being unloaded. An op_write_native_code() with the same vma should have occurred before this call.

Return value

Returns 0 on success; -1 otherwise. If -1 is returned, errno is set to indicate the nature of the error. errno is set to EINVAL if an invalid op_agent_t handle is passed. For a list of other possible errno values, see the man pages for:

gettimeofday, fwrite
oprofile-1.3.0/doc/opannotate.1.in0000664000175000017500000001207312534404406013666 00000000000000.TH OPANNOTATE 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME opannotate \- produce source or assembly annotated with profile data .SH SYNOPSIS .br .B opannotate [ .I options ] [profile specification] .SH DESCRIPTION .B opannotate outputs annotated source and/or assembly from profile data of an OProfile session. See oprofile(1) for how to write profile specifications. .SH OPTIONS .TP .BI "--assembly / -a" Output annotated assembly. The binary file to be annotated does not need full debugging information to use this option, but symbol information .I is required. Without symbol information, .B opannotate will silently refuse to annotate the binary. If this option is combined with --source, then mixed source / assembly annotations are output. .br .TP .BI "--demangle / -D none|smart|normal" none: no demangling. normal: use default demangler (default) smart: use pattern-matching to make C++ symbol demangling more readable. .br .TP .BI "--exclude-dependent / -x" Do not include application-specific images for libraries, kernel modules and the kernel. This option only makes sense if the profile session used --separate. .br .TP .BI "--exclude-file [files]" Exclude all files in the given comma-separated list of glob patterns. This option is supported solely with the .I --source option. It can be used to filter out source files in the output using the following types of specifications: .RS .IP \(bu 2 filenames (basename -- i.e., no path) .IP \(bu 2 filename glob specifications (all files whose base filename matches the given pattern) .IP \(bu 2 directory segments (all source files located in the specified directory; e.g. "libio") .IP \(bu 2 directory segment glob specifications (e.g., "libi*") .RE .br .TP .BI "--exclude-symbols / -e [symbols]" Exclude all the symbols in the given comma-separated list. .br .TP .BI "--help / -? / --usage" Show help message. .br .TP .BI "--image-path / -p [paths]" Comma-separated list of additional paths to search for binaries. This is needed to find modules in kernels 2.6 and upwards. .br .TP .BI "--root / -R [path]" A path to a filesystem to search for additional binaries. .br .TP .BI "--include-file [files]" Only include files in the given comma-separated list of glob patterns. The same rules apply for this option as for the .I --exclude-file option. .br .TP .BI "--merge / -m [lib,cpu,tid,tgid,unitmask,all]" Merge any profiles separated in a --separate session. .br .TP .BI "--include-symbols / -i [symbols]" Only include symbols in the given comma-separated list. .br .TP .BI "--objdump-params [params]" Pass the given parameters as extra values when calling objdump. If more than one option is to be passed to objdump, the parameters must be enclosed in a quoted string. An example of where this option is useful is when your toolchain does not automatically recognize instructions that are specific to your processor. For example, on IBM POWER7/RHEL 6, objdump must be told that a binary file may have POWER7-specific instructions. The opannotate option to show the POWER7-specific instructions is: --objdump-params=-Mpower7 The opannotate option to show the POWER7-specific instructions, the source code (--source) and the line numbers (-l) would be: --objdump-params="-Mpower7 -l --source" .br .TP .BI "--output-dir / -o [dir]" Output directory. This makes opannotate output one annotated file for each source file. This option can't be used in conjunction with --assembly. .br .TP .BI "--search-dirs / -d [paths]" Comma-separated list of paths to search for source files. You may need to use this option when the debug information for an image contains relative paths. .br .TP .BI "--base-dirs / -b [paths]" Comma-separated list of paths to strip from debug source files, prior to looking for them in --search-dirs. .br .TP .BI "--session-dir="dir_path Use sample database from the specified directory .I dir_path instead of the default location. If .I --session-dir is not specified, then .B opannotate will search for samples in /oprofile_data first. If that directory does not exist, the standard session-dir of /var/lib/oprofile is used. .br .TP .BI "--source / -s" Output annotated source. This requires debugging information to be available for the binaries. .br .TP .BI "--threshold / -t [percentage]" For annotated assembly, only output data for symbols that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the symbol is shown. For annotated source, only output data for source files that have more than the given percentage of total samples. For profiles using multiple events, if the threshold is reached for any event, then all sample data for the source file is shown. .br .TP .BI "--verbose / -V [options]" Give verbose debugging output. .br .TP .BI "--version / -v" Show version. .SH ENVIRONMENT No special environment variables are recognised by opannotate. .SH FILES .TP .I /samples The location of the generated sample files. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR oprofile(1) oprofile-1.3.0/doc/oprofile.10000664000175000017500000001216113323173423012725 00000000000000.TH OPROFILE 1 "Mon 16 July 2018" "oprofile 1.3.0" .UC 4 .SH NAME oprofile \- a statistical profiler for Linux systems, capable of profiling all running code at low overhead; also included is a set of post-profiling analysis tools, as well as a simple event counting tool .SH SYNOPSIS .br .B operf [ .I options ] .br .B ocount [ .I options ] .br .B opreport [ .I options ] [ profile specification ] .br .B opannotate [ .I options ] [ profile specification ] .br .B oparchive [ .I options ] [ profile specification ] .br .B opgprof [ .I options ] [ profile specification ] .br .SH DESCRIPTION OProfile is a profiling system for systems running Linux 2.6.31 and greater. OProfile makes use of the hardware performance counters provided on Intel, AMD, and other processors. OProfile can profile a selected program or process or the whole system. OProfile can also be used to collect cumulative event counts at the application, process, or system level. .br For a gentle guide to using OProfile, please read the HTML documentation listed in SEE ALSO. .br .SH OPERF .B operf is a performance profiler tool for Linux. .SH OCOUNT .B ocount is an event counting tool for Linux. .SH OPREPORT .B opreport gives image and symbol-based profile summaries for the whole system or a subset of binary images. .SH OPANNOTATE .B opannotate can produce annotated source or mixed source and assembly output. .SH OPARCHIVE .B oparchive produces oprofile archive for offline analysis .SH OPGPROF .B opgprof can produce a gprof-format profile for a single binary. .SH PROFILE SPECIFICATIONS Various optional profile specifications may be used with the post-profiling tools. A profile specification is some combination of the parameters listed below. ( .BR Note : Enclosing part of a profile specification in curly braces { } can be used for differential profiles with .BR opreport , but the braces .B must be surrounded by whitespace.) .TP .BI "archive:"archive Path to the archive to inspect, as generated by .B oparchive .br .TP .BI "session:"sessionlist A comma-separated list of session names to resolve in. Absence of this tag, unlike all others, means "the current session", equivalent to specifying "session:current". .br .TP .BI "session-exclude:"sessionlist A comma-separated list of sessions to exclude. .br .TP .BI "image:"imagelist A comma-separated list of image names to resolve. Each entry may be relative path, glob-style name, or full path, e.g. opreport 'image:/usr/bin/operf,*op*,./oprofpp' .br .TP .BI "image-exclude:"imagelist Same as image:, but the matching images are excluded. .br .TP .BI "lib-image:"imagelist Same as image:, but only for images that are for a particular primary binary image (namely, an application). This only makes sense to use if you're using --separate. This includes kernel modules and the kernel when using --separate=kernel. .br .TP .BI "lib-image-exclude:"imagelist Same as , but the matching images are excluded. .br .TP .BI "event:"eventname The symbolic event name to match on, e.g. event:DATA_MEM_REFS. .br .TP .BI "count:"eventcount The event count to match on, e.g. event:DATA_MEM_REFS count:30000. .br .TP .BI "unit-mask:"maskvalue The unit mask value of the event to match on, e.g. unit-mask:1. .br .TP .BI "cpu:"cpulist Only consider profiles for the given numbered CPU (starting from zero). This is only useful when using CPU profile separation. .br .TP .BI "tgid:"pidlist Only consider profiles for the given task groups. Unless some program is using threads, the task group ID of a process is the same as its process ID. This option corresponds to the POSIX notion of a thread group. This is only useful when using per-process profile separation. .br .TP .BI "tid:"tidlist Only consider profiles for the given threads. When using recent thread libraries, all threads in a process share the same task group ID, but have different thread IDs. You can use this option in combination with tgid: to restrict the results to particular threads within a process. This is only useful when using per-process profile separation. .SH ENVIRONMENT No special environment variables are recognized by OProfile. .SH FILES .TP .I /usr/local/share/doc/oprofile/oprofile.html OProfile user guide. .TP .I /usr/local/share/doc/oprofile/opreport.xsd Schema file for opreport XML output. .TP .I /usr/local/share/doc/oprofile/ophelp.xsd Schema file for ophelp XML output. .TP .I /usr/local/share/oprofile/ Event description files used by OProfile. .TP .I /samples/operf.log The profiler log file. .TP .I /samples/current The location of the generated sample files. .SH VERSION .TP This man page is current for oprofile-1.3.0. .SH SEE ALSO .BR /usr/local/share/doc/oprofile/, .BR operf(1), .BR ocount(1), .BR opreport(1), .BR opannotate(1), .BR oparchive(1), .BR opgprof(1), .BR gprof(1), .BR "CPU vendor architecture manuals" .SH COPYRIGHT oprofile is Copyright (C) 1998-2004 University of Manchester, UK, John Levon, and others. OProfile is released under the GNU General Public License, Version 2, or (at your option) any later version. .SH AUTHORS John Levon is the primary author. See the documentation for other contributors. oprofile-1.3.0/doc/opimport.1.in0000664000175000017500000000231412534404406013364 00000000000000.TH OPIMPORT 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME opimport \- converts sample database files .SH SYNOPSIS .br .B opimport [ .I options ] input_file .SH DESCRIPTION .B opimport converts sample database files from a foreign binary format (abi) to the native format. .SH OPTIONS .TP .BI "--abi / -a" Input abi file description location. .br .TP .BI "--force / -f" Force conversion even if the input and output abi are identical. .br .TP .BI "--output / -o filename" Specify the output filename. If the output file already exists it is not overwritten but data are accumulated in. Sample filename are informative for post profile tools and must be kept identical, in other word the pathname from the first path component containing a '{' must be kept as it in the output filename. .br .TP .BI "--help / -? / --usage" Show help message. .br .TP .BI "--verbose / -V" Give verbose debugging output. .br .TP .BI "--version / -v" Show version. .SH ENVIRONMENT No special environment variables are recognized by opimport .SH FILES .TP .I /abi The abi file description of the sample database files .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR oprofile(1) oprofile-1.3.0/doc/ophelp.1.in0000664000175000017500000000272312534404406013006 00000000000000.TH OPHELP 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME ophelp \- list OProfile events .SH SYNOPSIS .br .B ophelp [ .I options ] [event name] .SH DESCRIPTION By default, .B ophelp lists the available performance counter options. If you give it a symbolic event name, it will return the hardware value (e.g. "ophelp DATA_MEM_REFS"). .SH OPTIONS .TP .BI "--cpu-type / -c" Show the events for the given numerical CPU type. .br .TP .BI "--get-cpu-type / -r" Show the symbolic CPU name. .br .TP .BI "--get-default-event / -d" .br Show the default event for the specified CPU type. .TP .BI "--check-events / -e [events]" Check the given space-separated event descriptions for validity. If the events are valid, show which pmu counter each event would be assigned to. .br .TP .BI "--callgraph [callgraph_depth]" Use the callgraph depth to compute the higher minimum sampling intervals for the events. .br .TP .BI "--unit-mask / -u [event]" Show the default unit mask for the given event. .br .TP .BI "--extra-mask / -E [event]" Show the extra unit mask for given event. .br .TP .BI "--xml / -X" List events in XML format. .br .TP .BI "--help / -? / --usage" Show help message. .br .TP .BI "--version / -v" Show version. .SH ENVIRONMENT No special environment variables are recognised by ophelp. .SH FILES .TP .I $prefix/share/oprofile/ Event description files used by OProfile. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR oprofile(1) oprofile-1.3.0/doc/op-check-perfevents.1.in0000664000175000017500000000134312534404406015364 00000000000000.TH OP-CHECK-PERFEVENTS 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME op-check-perfevents \- checks for kernel perf pmu support .SH SYNOPSIS .br .B op-check-perfevents [ .I options ] .SH DESCRIPTION The small helper program .B op-check-perfevents determines whether the kernel supports the perf interface and returns a zero exit status if the perf pmu support is available. .SH OPTIONS .TP .BI "--help / -h" Show usage help message. .br .TP .BI "--verbose / -v" Print string describing the error number of perf_event_open syscall .br .SH ENVIRONMENT No special environment variables are recognised by op-check-perfevents. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR oprofile(1) oprofile-1.3.0/doc/oprofile.1.in0000664000175000017500000001212512546756165013352 00000000000000.TH OPROFILE 1 "@DATE@" "oprofile @VERSION@" .UC 4 .SH NAME oprofile \- a statistical profiler for Linux systems, capable of profiling all running code at low overhead; also included is a set of post-profiling analysis tools, as well as a simple event counting tool .SH SYNOPSIS .br .B operf [ .I options ] .br .B ocount [ .I options ] .br .B opreport [ .I options ] [ profile specification ] .br .B opannotate [ .I options ] [ profile specification ] .br .B oparchive [ .I options ] [ profile specification ] .br .B opgprof [ .I options ] [ profile specification ] .br .SH DESCRIPTION OProfile is a profiling system for systems running Linux 2.6.31 and greater. OProfile makes use of the hardware performance counters provided on Intel, AMD, and other processors. OProfile can profile a selected program or process or the whole system. OProfile can also be used to collect cumulative event counts at the application, process, or system level. .br For a gentle guide to using OProfile, please read the HTML documentation listed in SEE ALSO. .br .SH OPERF .B operf is a performance profiler tool for Linux. .SH OCOUNT .B ocount is an event counting tool for Linux. .SH OPREPORT .B opreport gives image and symbol-based profile summaries for the whole system or a subset of binary images. .SH OPANNOTATE .B opannotate can produce annotated source or mixed source and assembly output. .SH OPARCHIVE .B oparchive produces oprofile archive for offline analysis .SH OPGPROF .B opgprof can produce a gprof-format profile for a single binary. .SH PROFILE SPECIFICATIONS Various optional profile specifications may be used with the post-profiling tools. A profile specification is some combination of the parameters listed below. ( .BR Note : Enclosing part of a profile specification in curly braces { } can be used for differential profiles with .BR opreport , but the braces .B must be surrounded by whitespace.) .TP .BI "archive:"archive Path to the archive to inspect, as generated by .B oparchive .br .TP .BI "session:"sessionlist A comma-separated list of session names to resolve in. Absence of this tag, unlike all others, means "the current session", equivalent to specifying "session:current". .br .TP .BI "session-exclude:"sessionlist A comma-separated list of sessions to exclude. .br .TP .BI "image:"imagelist A comma-separated list of image names to resolve. Each entry may be relative path, glob-style name, or full path, e.g. opreport 'image:/usr/bin/operf,*op*,./oprofpp' .br .TP .BI "image-exclude:"imagelist Same as image:, but the matching images are excluded. .br .TP .BI "lib-image:"imagelist Same as image:, but only for images that are for a particular primary binary image (namely, an application). This only makes sense to use if you're using --separate. This includes kernel modules and the kernel when using --separate=kernel. .br .TP .BI "lib-image-exclude:"imagelist Same as , but the matching images are excluded. .br .TP .BI "event:"eventname The symbolic event name to match on, e.g. event:DATA_MEM_REFS. .br .TP .BI "count:"eventcount The event count to match on, e.g. event:DATA_MEM_REFS count:30000. .br .TP .BI "unit-mask:"maskvalue The unit mask value of the event to match on, e.g. unit-mask:1. .br .TP .BI "cpu:"cpulist Only consider profiles for the given numbered CPU (starting from zero). This is only useful when using CPU profile separation. .br .TP .BI "tgid:"pidlist Only consider profiles for the given task groups. Unless some program is using threads, the task group ID of a process is the same as its process ID. This option corresponds to the POSIX notion of a thread group. This is only useful when using per-process profile separation. .br .TP .BI "tid:"tidlist Only consider profiles for the given threads. When using recent thread libraries, all threads in a process share the same task group ID, but have different thread IDs. You can use this option in combination with tgid: to restrict the results to particular threads within a process. This is only useful when using per-process profile separation. .SH ENVIRONMENT No special environment variables are recognized by OProfile. .SH FILES .TP .I @prefix@/share/doc/oprofile/oprofile.html OProfile user guide. .TP .I @prefix@/share/doc/oprofile/opreport.xsd Schema file for opreport XML output. .TP .I @prefix@/share/doc/oprofile/ophelp.xsd Schema file for ophelp XML output. .TP .I @prefix@/share/oprofile/ Event description files used by OProfile. .TP .I /samples/operf.log The profiler log file. .TP .I /samples/current The location of the generated sample files. .SH VERSION .TP This man page is current for @PACKAGE@-@VERSION@. .SH SEE ALSO .BR @OP_DOCDIR@, .BR operf(1), .BR ocount(1), .BR opreport(1), .BR opannotate(1), .BR oparchive(1), .BR opgprof(1), .BR gprof(1), .BR "CPU vendor architecture manuals" .SH COPYRIGHT oprofile is Copyright (C) 1998-2004 University of Manchester, UK, John Levon, and others. OProfile is released under the GNU General Public License, Version 2, or (at your option) any later version. .SH AUTHORS John Levon is the primary author. See the documentation for other contributors. oprofile-1.3.0/ChangeLog-20070000664000175000017500000006010412534404406012420 000000000000002007-12-11 Philippe Elie * libutil++/op_bfd.h: remove sym_offset(), we can get what did sym_offset() in a simpler way at call site * libutil++/op_bfd.cpp: * libpp/callgraph_container.cpp: * libpp/profile_container.cpp: * libpp/profile_container.h: 2007-11-25 Philippe Elie * daemon/opd_stats.c: dump invalid pc count, added to oprofile stats fs 2.6.24-rc 2007-11-15 Dave Nomura * fixed a some typos in manually patched event files 2007-11-15 Dave Nomura * libpp/format_output.cpp: output XML SYMBOL_DATA for callers/callees * libpp/format.h: 2007-11-15 Dave Nomura * events/ppc64/power6/event_mappings: updated Power6 event files * events/ppc64/power6/events: 2007-11-15 Philippe Elie handle --root which act as a replacement (a prefix) for the / fs * libpp/locate_images.cpp: root path search taking care if a root path is given we never search through "/" * libpp/locate_images.h: * libpp/populate.cpp: * libpp/populate_for_spu.cpp: use the right path to check last modification time, this is yet again a change in behavior, module was never found a this point, even if we found them later, and we didn't try to check_mtime(), so opreport is again a bit more verbose * libutil++/op_bfd.cpp: be more cautious when checking if we can try to open the bfd file, don't open it in the '/' fs if a --root is given * libpp/profile_spec.cpp: convey the root_path all over the code. * libpp/profile_spec.h: * pp/common_option.cpp: * pp/common_option.h: * pp/opannotate_options.cpp: * pp/oparchive.cpp: * pp/oparchive_options.cpp: * pp/opgprof_options.cpp: * pp/opreport_options.cpp: * doc/opannotate.1.in: document --root * doc/oparchive.1.in: * doc/opgprof.1.in: * doc/opreport.1.in: * doc/oprofile.xml: 2007-11-10 Dave Nomura * libutil++/bfd_support.cpp: is_correct_function() is itended to deal with missing debug information, if linenr != 0, don't call it since we know we have valid debug info 2007-11-08 Haavard Skinnemoen * utils/opcontrol: Busybox's implementation of "kill" doesn't understand the "-s SIG" option. Use "-SIG" instead. 2007-11-07 Philippe Elie Compile fix for gcc 2.95.3 * libpp/format_output.cpp: unused local var, then unused params * libpp/format_output.h: * libpp/op_header.cpp: missing include * libutil++/bfd_spu_support.cpp: gcc 2.95.3 do not like struct bfd, 2.95 get it wrong probably but anyway all these struct are useless. 2007-11-06 Philippe Elie * pp/opannotate.cpp: for module we didn't use the right image name, this bug appeared after 0.9.3 release 2007-11-05 Richard Purdie * events/arm/armv6/events: Fix armv6 events to match mainline kernels 2007-11-04 Philippe Elie * utils/opcontrol: nmi watchdog is now cleanly handled in the kernel but it can be on by default even if CONFIG_WATCHDOG=n, a sysctl exists to put it off. We need to check this in opcontrol since we returned success if a counter is missing and starting oprofile with oprof_start silently failed. 2007-11-03 Richard Purdie * pp/oparchive.cpp: Check list_files option before calling create_dir() for debug files. 2007-11-03 Philippe Elie with --xml and --details, bfd open/close was done one time per symbols, not one time per application. Solved by moving open/close in the caller and cache bfd object, this work because --xml imply symbols are sorted by app name then lib name. This is not perfect as we can open/close multiple time bfd object with --separate=library but still a real win. Quick test showed an improvement by over 40 times. Improvement grows as number of symbols per binary. * libpp/xml_utils.cpp: move bfd open ... * libpp/xml_utils.h: * libpp/format_output.cpp: ... here * libpp/format_output.h: * pp/opreport.cpp: 2007-11-02 Philippe Elie * pp/opreport_options.cpp: --xml is not compatible with --sort since xml output need some predefined sort options, we warned against the use of --sort but didn't reset the sort options to default. 2007-11-01 Philippe Elie * pp/oparchive_options.cpp: oparchive need to be run as root if you want to get save all binaries, generally I don't like to restrict user to do silly things but --output-directory / is an easy typo to do and will completely screw up the box. 2007-10-30 Philippe Elie * libpp/format_output.cpp: Fix #931882, xml output not changed at the moment. 2007-10-30 Philippe Elie Prepare #931882 fix, continue to move down real filename retrieval by extending image_name_storage which can hold now the real image name and the image as derived from the sample filename. Use the new api in a compatible way with the old behavior, no output change intended. * libpp/format_output.cpp: * libpp/format_output.h: * libpp/locate_images.cpp: * libpp/locate_images.h: * libpp/name_storage.cpp: * libpp/name_storage.h: * libpp/symbol.cpp: * libpp/symbol.h: * libpp/xml_utils.cpp: * libpp/xml_utils.h: * pp/opreport.cpp: 2007-10-29 Philippe Elie * libpp/image_errors.cpp: Pass to image_errors the archive_path through an extra_images to ensure no duplicate error message occur nor we miss error, this fix two bugs, one with differential profile an error message was missing when two binary are missing, another with opreport where the same error message was duplicate because in on case we passed the real binary name (prefixed with archive_path) while latter we passed the short form of the binary name. * libpp/image_errors.h: * libpp/callgraph_container.cpp: * libpp/populate.cpp: * libpp/populate_for_spu.cpp: * libpp/xml_utils.cpp: * libutil++/op_bfd.h: * pp/opannotate.cpp: global var archive_path is no longer used * pp/opannotate_options.cpp: * pp/opannotate_options.h: * pp/oparchive.cpp: * pp/opgprof.cpp: * pp/opgprof_options.h: * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: 2007-10-29 Philippe Elie Cleanup the way per spec archive_path is handled, as extra_images is built using an archive_path it make no sense to pass archive_path as parameter all over the place, rather make it a member of extra_images and use it, anyway it was required the archive_path passed to find_image_path() was the same as used to build the extra_images. As a side effect it fix a corner case: oparchive archive:tmp1 -o tmp2 was not working for module, archiving from an archive should work now. * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * libpp/locate_images.cpp: * libpp/locate_images.h: * libpp/populate.cpp: * libpp/populate.h: * libpp/populate_for_spu.cpp: * libpp/populate_for_spu.h: * libpp/profile_spec.cpp: * libpp/xml_utils.cpp: * libpp/xml_utils.h: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * libutil++/op_spu_bfd.cpp: * pp/opannotate.cpp: * pp/oparchive.cpp: * pp/oparchive_options.cpp: * pp/oparchive_options.h: * pp/opgprof.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: 2007-10-29 Philippe Elie * libutil++/file_manip.cpp: do not create the output file if the input file can not be read. It change oparchive behavior which created empty file with input file like -rws--x--x 1 root root 2007-10-28 Philippe Elie * libpp/format_output.cpp: minor overkill 2007-10-27 Philippe Elie Fix #1819350, it turned out this implied another fix for differential profile, extra_images must be built per profile specification not globally so most of this patch pass an extra_images down to op_bfd. The way image name resolution has changed. We fixup an image name only when really needed, when opening a bfd file, when checking a binary exists and when we try matching an image name with a profile specification, this robustify differential profile. This patch also allow a profile_spec ala image:*oprofile.ko which was broken too. It's now mandatory to use the same -p option used with oparchive when using an archive with other pp tools, it was already the case but was broken, this patch does not clarify the documentation about this point because I suspect oparchive should be modified to save at the top level directory the contents of -p option, pp tools will use that automatically and --image_path will be obsoleted when used with an archive. This patch except clarifying than --image-path with archive: is a bit special does not add any user level visible change. * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * libpp/locate_images.cpp: * libpp/locate_images.h: * libpp/populate.cpp: * libpp/populate_for_spu.cpp: * libpp/profile_container.cpp: * libpp/profile_container.h: * libpp/profile_spec.cpp: * libpp/profile_spec.h: * libpp/xml_utils.cpp: * libpp/xml_utils.h: * libutil++/Makefile.am: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * libutil++/op_spu_bfd.cpp: * pp/common_option.cpp: * pp/common_option.h: * pp/opannotate.cpp: * pp/opannotate_options.cpp: * pp/oparchive.cpp: * pp/oparchive_options.cpp: * pp/opgprof.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: 2007-10-27 Philippe Elie * libpp/profile_spec.cpp: look like an obvious typo, we must fixup the string we are parsing not a previously seen or empty string 2007-10-25 Philippe Elie * libutil++/sparse_array.h: size() return the max index while we want the max index + 1, the only user is diff_container, differential container is broken in 0.9.3. This fix bug #1820202 2007-10-25 Philippe Elie * utils/opcontrol: fix the previous opcontrol --reset patch, it was broken if the daemon is running because --reset imply --dump so we can use this --reset shortcut only if the daemon is not running. 2007-10-25 Philippe Elie * utils/opcontrol: if objdump is missing the error message is obscure, this fix bug #1564920 by checking if objdump exists and is an executable before using it 2007-10-25 Philippe Elie * utils/opcontrol: --reset doesn't need to load the module, it was counter-intuitive than the sequence opcontrol --deinit; opcontrol --reset must be followed by another opcontrol --deinit 2007-10-25 Philippe Elie * utils/opcontrol: error out earlier if the module is not loaded even for --list-events or --dump to avoid obscure error message 2007-10-24 Philippe Elie * libop/op_config.h: bump sample filename format, should have been done before 0.9.3 * libpp/op_header.cpp: do not use odb_open() to read the sample file header, if it fails it can return EINVAL if sanity checking fails so we can't know if the failure came from a sample file format change or some other failure. This explain some "sample_filename: Invalid argument" we got in bug report when user didn't cleanup the sample file directory. * libpp/profile.cpp: use read_header() first to check the sample file format to get better error message. 2007-10-19 Philippe Elie * libop/op_events.c: force the use of hexa notation in event file for the field intended to be in hexacidemal so make check will catch attempt to use decimal notation for them. * events/mips/20K/events: all event number were in decimal but parsed as hexadecimal, this fix bug #1717298 * events/mips/24K/events: * events/mips/25K/events: * events/mips/5K/events: * events/mips/r12000/events: * events/mips/sb1/events: * events/mips/vr5432/events: * events/mips/vr5500/events: * events/mips/34K/events: comment a bunch of overlapping event. * events/ppc64/cell-be/unit_masks: well, 0 == 0x0 but it's easier to catch real error by forcing hexa notation for default unit mask. * libop/tests/alloc_counter_tests.c: fix mips/34K test, the used event has been remoded 2007-10-17 Philippe Elie * doc/oprofile.xml: fix dead url * utils/ophelp.c: 2007-10-17 Jason Yeh * events/x86-64/family10/events: This patch updates the events and unit_masks files to match the BIOS and Kernel Developer's Guide For AMD Family 10h Processors Rev 3.00 released on September 07, 2007. The notable changes are L3 cache events and updates to corresponding unit masks. * events/x86-64/family10/unit_masks: 2007-10-17 Philippe Elie * utils/opcontrol: newer shell accept if -z ... but older need if test -z. This broke opcontrol --dump with bash 2.x and probably other shell. With bash the error when running opcontrol as non root was: /usr/local/bin/opcontrol: line 1670: -z: command not found 2007-10-12 Philippe Elie * libop/op_events.c: check for '.' inside event name, they can't work * events/i386/core_2/events: change '.' by '_' in events name * events/ppc64/cell-be/events: 2007-10-11 Maynard Johnson * events/ppc64/970MP/event_mappings: Turn off profiling in hypervisor on 970MP to prevent lost interrupts 2007-10-10 Maynard Johnson * events/ppc64/970MP/events: * events/ppc64/970MP/event_mappings: Fix MMCR values and counter-to-event mappings on a few 970MP groups 2007-10-09 Melchior Franz * libregex/op_regex.cpp: Fix broken string concatenation 2007-10-05 Will Cohen * utils/opcontrol: Modify opcontrol to allow short form -l and -d for normal users. 2007-09-25 Brian Twichell * utils/opcontrol: Modify opcontrol to use a more inclusive kernel range 2007-08-23 Maynard Johnson * daemon/opd_anon.c: Make anonymous sample recording work with 32-bit OProfile and 64-bit anonymous code 2007-08-14 John Levon * doc/oprofile.xml: * doc/opcontrol.1.in: clarify behaviour of opcontrol -e 2007-08-02 Jens Wilke * ChangeLog: Correct the date from previous patch (maynardj) * libutil++/op_bfd.cpp: Fix sym_offset calculation. Bug triggers on 64 bit systems with code mapped with an address >4G. 2007-08-02 Jens Wilke * libpp/profile_container.cpp: Remove unnecessary offset calculation. 2007-07-18 Maynard Johnson * doc/Makefile.am: Include buffers diagram in dist * doc/oprofile.xml: Correct filename reference to opreport.xsd 2007-07-16 Maynard Johnson * configure.in: Bump to 0.9.4cvs. 2007-07-16 Maynard Johnson * configure.in: * Makefile.am: Bump release to 0.9.3 and add a line to EXTRA_DIST to distribute ChangeLog-2006. 2007-07-09 Maynard Johnson * doc/opreport.xsd: * libpp/xml_utils.cpp: Correct schema version bump 2007-07-02 Maynard Johnson * libpp/populate_for_spu.cpp: Fix logic in is_spu_profile() to handle '--separate=thread' option. 2007-06-27 Maynard Johnson * ChangeLog: ChangeLog cleanup 2007-06-15 Maynard Johnson * doc/opreport.xsd: * libpp/xml_utils.cpp: Bump schema version to 2.0 to coincide with callgraph elements added recently to the schema 2007-06-13 Maynard Johnson * doc/oprofile.xml: * events/Makefile.am: * events/ppc64/power5++/event_mappings: * events/ppc64/power5++/events: * events/ppc64/power5++/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/opcontrol: * utils/ophelp.c: Add support for POWER5++ (i.e., POWER5+ with PMU set to POWER6 mode) 2007-06-12 dean gaudet * events/i386/core_2/events: * events/i386/core_2/unit_masks: updates to match 253669-022US ISA vol 3B from Intel. (Including fix for #1580064 from Arun Sharma.) 2007-06-08 dean gaudet * events/x86-64/hammer/events: * events/x86-64/hammer/unit_masks: updates from December 2006 AMD update 2007-05-31 Maynard Johnson * libpp/symbol.h: * libutil++/bfd_support.h: * m4/cellspubfdsupport.m4: Fixups for compile failures on older Linux distributions 2007-05-29 Dave Nomura * libregex/demangle_symbol.cpp: Strip off leading '.' generated for elf6r-powerpc targets in mangled symbol names. 2007-05-24 Richard Purdie * events/arm/xscale1/events: * events/arm/xscale2/events: Add extra Xscale PMU event definitions 2007-05-24 Richard Purdie * events/arm/armv6/events: * events/arm/armv6/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: Name ARM11 support to be consistent with the kernel, remove some duplicate code and add some extra events 2007-05-24 Richard Purdie * oprofile/pp/oparchive.cpp: If the debug files have the same name as the original binary, the binary gets overwritten. Add in a .debug directory to avoid this. 2007-05-23 Joerg Wagner * events/Makefile.am: * events/arm/mpcore/events: * events/arm/mpcore/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: ARM MPCore support 2007-05-23 Riku Voipio * events/Makefile.am: * events/arm/armv6/events: * events/arm/armv6/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: ARM11 support 2007-05-21 Richard Purdie * doc/opreport.xsd: * libpp/format_output.cpp: * libpp/format_output.h: * libpp/xml_utils.cpp: * libutil++/xml_output.cpp: * libutil++/xml_output.h: * pp/opreport.cpp: * pp/opreport_options.cpp: Add callgraph XML output 2007-05-20 Dean Gaudet * events/i386/core_2/events: ITLB_MISS_RETIRED,MEM_LOAD_RETIRED only work with counter 0 2007-05-20 Richard Purdie * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * libpp/format_output.cpp: * libpp/format_output.h: * libpp/symbol.h: * libpp/symbol_sort.cpp: * libpp/symbol_sort.h: * pp/opreport.cpp: Convert cg_collection to symbol_collection and use dynamic casting allowing more code reuse for callgraphs 2007-05-19 Richard Purdie * doc/oparchive.1.in: * doc/oprofile.xml: * pp/oparchive.cpp: * pp/oparchive_options.cpp: * pp/oparchive_options.h: Add --list-files option to list all files that would be handled by oparchive. 2007-05-19 Olof Johansson * events/Makefile.in: * events/ppc64/pa6t/event_mappings: * events/ppc64/pa6t/events: * events/ppc64/pa6t/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/opcontrol: * utils/ophelp.c: PA Semi 6T support 2007-05-09 Richard Purdie * oprofile/daemon/opd_cookie.c: Fix syscall for ARM EABI 2007-05-10 Maynard Johnson * libpp/Makefile.am: * libpp/populate.cpp: * libpp/populate_for_spu.cpp: * libpp/populate_for_spu.h: * libpp/profile.h: * libpp/profile.cpp: * libutil++/Makefile.am: * libutil++/bfd_spu_support.cpp: * libutil++/bfd_support.h: * libutil++/op_bfd.h: * libutil++/op_spu_bfd.cpp: * libpp/xml_utils.cpp: * libpp/profile_container.cpp: * libpp/symbol.h: Patch 3 of 3 for adding support for profiling Cell Broadband Engine SPU 2007-05-10 Maynard Johnson * daemon/liblegacy/opd_sample_files.c: * daemon/opd_events.c: * daemon/opd_events.h: * daemon/opd_interface.h: * daemon/Makefile.am: * daemon/opd_mangling.c: * daemon/opd_sfile.c: * daemon/opd_sfile.h: * daemon/opd_spu.c: * daemon/opd_trans.c: * daemon/opd_trans.h: * libop/op_sample_file.h: Patch 2 of 3 for adding support for profiling Cell Broadband Engine SPU 2007-05-10 Maynard Johnson * configure.in: * doc/oprofile.xml: * events/ppc64/cell-be/events: * m4/Makefile.am: * m4/cellspubfdsupport.m4: * utils/opcontrol: Patch 1 of 3 for adding support for profiling Cell Broadband Engine SPU 2007-04-25 Manoj Ekbote * events/mips/sb1/events: fix SB1 events 2007-04-19 Dave Nomura * events/ppc64/power6/events: counter 3 should have been used in the specification of the default CYCLES event, not counter 1 2007-04-13 Will Cohen * libop/op_cpu_type.c: * libop/op_cpu_type.h: Move new entries to end of list to improve backward compatibility with enum values. 2007-04-11 John Levon * doc/oprofile.xml: IRC channel is on OFTC 2007-04-10 Philippe Elie * utils/ophelp.c: if userspace doesn't recognize the cpu type warn the user it can use timer mode or upgrade oprofile. 2007-04-04 Maynard johnson * libutil++/file_manip.cpp: catch result from chown() to avoid compilation warning (treated as error) 2007-03-23 Jason Yeh * events/Makefile.am: * events/x86-64/family10/events: * events/x86-64/family10/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: Add AMD Family 10 support. 2007-02-28 Rob Bradford * pp/oparchive.cpp: return from main 2007-02-21 Rob Bradford Reverted previous patches. * pp/oparchive.cpp: Save debuginfo files in .debug sub directory. * pp/oparchive.cpp: * pp/oparchive_options.h: * pp/oparchive_options.cpp: List files option. 2007-02-21 Rob Bradford * pp/oparchive.cpp: Save debuginfo files in .debug sub directory. * pp/oparchive.cpp: * pp/oparchive_options.h: * pp/oparchive_options.cpp: List files option. 2007-02-16 Philippe Elie * daemon/opd_mangling.c: missing initialisation when mangling an anon and callgraph filename. Fix given by Amitabha Roy. 2007-02-06 Dave Nomura * libpp/symbol.h: * libutil++/Makefile.am: * libutil++/sparse_array.h: represent count_array_t as a sparse array type based on std::map rather than growable_vector which is based on std::vector to reduce the excessive heap usage on large profiles. 2007-02-02 Amitabha Roy * daemon/opd_anon.c: * daemon/opd_anon.h: * daemon/opd_mangling.c: * libop/op_mangle.c: * libop/op_mangle.h: * libpp/parse_filename.cpp: save and report name of anonymous mapping if there is one (as self-contradictory as that sounds). 2007-02-02 Dave Nomura * events/Makefile.am: * events/ppc64/970MP/event_mappings: * events/ppc64/970MP/events: * events/ppc64/970MP/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: PPC970MP has different hardware counters than the rest of the PPC family and must be treated as a different architecture by oprofile. 2007-01-31 Dave Nomura * libpp/xml_utils.cpp: opreport -X was still getting some incorrect symbols attributed to the when processing a --separate=lib profile. 2007-01-29 Philippe Elie * daemon/oprofiled.c: no need for 0755 for the log file mode, use 0644 * utils/opcontrol: don't create the log in opcontrol 2007-01-26 Dave Nomura * libpp/format_output.cpp: * libpp/xml_utils.cpp: opreport -X was mixing the symbols associated with an application with those of a library when processing a --separate=lib profile. 2007-01-02 Dave Nomura * events/Makefile.am: * events/ppc64/power6/event_mappings: * events/ppc64/power6/events: * events/ppc64/power6/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/opcontrol: * utils/ophelp.c: Add support for Power6 See ChangeLog-2006 for earlier changelogs. oprofile-1.3.0/depcomp0000755000175000017500000005601612535323746011652 00000000000000#! /bin/sh # depcomp - compile a program generating dependencies as side-effects scriptversion=2013-05-30.07; # UTC # Copyright (C) 1999-2013 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Alexandre Oliva . case $1 in '') echo "$0: No command. Try '$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: depcomp [--help] [--version] PROGRAM [ARGS] Run PROGRAMS ARGS to compile a file, generating dependencies as side-effects. Environment variables: depmode Dependency tracking mode. source Source file read by 'PROGRAMS ARGS'. object Object file output by 'PROGRAMS ARGS'. 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"little" : "big") << " endian" << endl; } } template void extract(T & targ, void const * src_, char const * sz, char const * off); }; template void extractor::extract(T & targ, void const * src_, char const * sz, char const * off) { unsigned char const * src = static_cast(src_) + theabi.need(string(off)); size_t nbytes = theabi.need(string(sz)); targ = 0; if (nbytes == 0) return; assert(nbytes <= sizeof(T)); assert(src >= begin); assert(src + nbytes <= end); if (verbose) { ostringstream message; message << hex << "get " << sz << " = " << nbytes << " bytes @ " << off << " = " << (src - begin) << " : "; cerr << message.str(); } if (little_endian) while(nbytes--) targ = (targ << 8) | src[nbytes]; else for(size_t i = 0; i < nbytes; ++i) targ = (targ << 8) | src[i]; if (verbose) cerr << " = " << targ << endl; } void import_from_abi(abi const & abi, void const * srcv, size_t len, odb_t * dest) { struct opd_header * head = static_cast(odb_get_data(dest)); unsigned char const * src = static_cast(srcv); unsigned char const * const begin = src; extractor ext(abi, src, len); memcpy(head->magic, src + abi.need("offsetof_header_magic"), 4); // begin extracting opd header ext.extract(head->version, src, "sizeof_u32", "offsetof_header_version"); ext.extract(head->cpu_type, src, "sizeof_u32", "offsetof_header_cpu_type"); ext.extract(head->ctr_event, src, "sizeof_u32", "offsetof_header_ctr_event"); ext.extract(head->ctr_um, src, "sizeof_u32", "offsetof_header_ctr_um"); ext.extract(head->ctr_count, src, "sizeof_u32", "offsetof_header_ctr_count"); ext.extract(head->is_kernel, src, "sizeof_u32", "offsetof_header_is_kernel"); // "double" extraction is unlikely to work head->cpu_speed = 0.0; ext.extract(head->mtime, src, "sizeof_u64", "offsetof_header_mtime"); ext.extract(head->cg_to_is_kernel, src, "sizeof_u32", "offsetof_header_cg_to_is_kernel"); ext.extract(head->anon_start, src, "sizeof_u32", "offsetof_header_anon_start"); ext.extract(head->cg_to_anon_start, src, "sizeof_u32", "offsetof_header_cg_to_anon_start"); src += abi.need("sizeof_struct_opd_header"); // done extracting opd header // begin extracting necessary parts of descr odb_node_nr_t node_nr; ext.extract(node_nr, src, "sizeof_odb_node_nr_t", "offsetof_descr_current_size"); src += abi.need("sizeof_odb_descr_t"); // done extracting descr // skip node zero, it is reserved and contains nothing usefull src += abi.need("sizeof_odb_node_t"); // begin extracting nodes unsigned int step = abi.need("sizeof_odb_node_t"); if (verbose) cerr << "extracting " << node_nr << " nodes of " << step << " bytes each " << endl; assert(src + (node_nr * step) <= begin + len); for (odb_node_nr_t i = 1 ; i < node_nr ; ++i, src += step) { odb_key_t key; odb_value_t val; ext.extract(key, src, "sizeof_odb_key_t", "offsetof_node_key"); ext.extract(val, src, "sizeof_odb_value_t", "offsetof_node_value"); int rc = odb_add_node(dest, key, val); if (rc != EXIT_SUCCESS) { cerr << strerror(rc) << endl; exit(EXIT_FAILURE); } } // done extracting nodes } int main(int argc, char const ** argv) { vector inputs; popt::parse_options(argc, argv, inputs); if (inputs.size() != 1) { cerr << "error: must specify exactly 1 input file" << endl; exit(1); } if (inputs[0].rfind(".jo") == inputs[0].size() - 3) { if (verbose) { cerr << "Found a .jo file. Import is not allowed or necessary. Done." << endl; cerr << inputs[0] << endl; } // Silently exit with success. exit(EXIT_SUCCESS); } abi current_abi, input_abi; { ifstream abi_file(abi_filename.c_str()); if (!abi_file) { cerr << "error: cannot open abi file " << abi_filename << endl; exit(1); } abi_file >> input_abi; } if (!force && current_abi == input_abi) { cerr << "input abi is identical to native. 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namespace { string db_filename; string abi_filename; } popt::option options_array[] = { popt::option(db_filename, "db", 'd', "output db to file", "filename"), popt::option(abi_filename, "abi", 'a', "output abi to file", "filename") }; int main(int argc, char const ** argv) { vector rest; popt::parse_options(argc, argv, rest); if (abi_filename.empty() && db_filename.empty()) { cerr << "error: no file specified to work on" << endl; exit(1); } if (!abi_filename.empty()) { ofstream file(abi_filename.c_str()); if (!file) { cerr << "error: cannot open " << abi_filename << " for writing" << endl; exit(1); } file << abi(); } if (!db_filename.empty()) { odb_t dest; int rc = odb_open(&dest, db_filename.c_str(), ODB_RDWR, sizeof(struct opd_header)); if (rc) { cerr << "odb_open() fail:\n" << strerror(rc) << endl; exit(EXIT_FAILURE); } struct opd_header * header; header = static_cast(odb_get_data(&dest)); memset(header, '\0', sizeof(struct opd_header)); header->version = OPD_VERSION; memcpy(header->magic, OPD_MAGIC, sizeof(header->magic)); header->is_kernel = 1; /* ICACHE_FETCHES */ header->ctr_event = 0x80; header->ctr_um = 0x0; header->cpu_type = CPU_ATHLON; header->ctr_count = 0xdeadbeef; header->cpu_speed = 0; header->mtime = 1034790063; header->cg_to_is_kernel = 1; header->anon_start = 0; header->cg_to_anon_start = 0; for (int i = 0; i < 3793; ++i) { int rc = odb_add_node(&dest, i, i); if (rc != EXIT_SUCCESS) { cerr << strerror(rc) << endl; exit(EXIT_FAILURE); } } odb_close(&dest); } } oprofile-1.3.0/libabi/op_abi.c0000664000175000017500000000570712534404406013107 00000000000000/** * @file op_abi.c * This file contains a simple C interface to the ABI-describing functionality, * the majority of which is implemented in C++. This is the file which is * intended for use in files outside the /libabi directory. * * @remark Copyright 2002, 2005 OProfile authors * @remark Read the file COPYING * * @author Graydon Hoare * @author Philippe Elie */ #include "op_abi.h" #include "odb.h" #include "op_sample_file.h" #include #include #include static struct op_abi_entry const abi_entries[] = { { "sizeof_double", sizeof(double) }, { "sizeof_u64", sizeof(u64) }, { "sizeof_u8", sizeof(u8) }, { "sizeof_u32", sizeof(u32) }, { "sizeof_int", sizeof(int) }, { "sizeof_unsigned_int", sizeof(unsigned int) }, { "sizeof_odb_key_t", sizeof(odb_key_t) }, { "sizeof_odb_index_t", sizeof(odb_index_t) }, { "sizeof_odb_value_t", sizeof(odb_value_t) }, { "sizeof_odb_node_nr_t", sizeof(odb_node_nr_t) }, { "sizeof_odb_descr_t", sizeof(odb_descr_t) }, { "sizeof_odb_node_t", sizeof(odb_node_t) }, { "sizeof_struct_opd_header", sizeof(struct opd_header) }, { "offsetof_node_key", offsetof(odb_node_t, key) }, { "offsetof_node_value", offsetof(odb_node_t, value) }, { "offsetof_node_next", offsetof(odb_node_t, next) }, { "offsetof_descr_size", offsetof(odb_descr_t, size) }, { "offsetof_descr_current_size", offsetof(odb_descr_t, current_size) }, { "offsetof_header_magic", offsetof(struct opd_header, magic) }, { "offsetof_header_version", offsetof(struct opd_header, version) }, { "offsetof_header_cpu_type", offsetof(struct opd_header, cpu_type) }, { "offsetof_header_ctr_event", offsetof(struct opd_header, ctr_event) }, { "offsetof_header_ctr_um", offsetof(struct opd_header, ctr_um) }, { "offsetof_header_ctr_count", offsetof(struct opd_header, ctr_count) }, { "offsetof_header_is_kernel", offsetof(struct opd_header, is_kernel) }, { "offsetof_header_cpu_speed", offsetof(struct opd_header, cpu_speed) }, { "offsetof_header_mtime", offsetof(struct opd_header, mtime) }, { "offsetof_header_cg_to_is_kernel", offsetof(struct opd_header, cg_to_is_kernel), }, { "offsetof_header_anon_start", offsetof(struct opd_header, anon_start) }, { "offsetof_header_cg_to_anon_start", offsetof(struct opd_header, cg_to_anon_start) }, { NULL, 0 }, }; struct op_abi_entry const * get_abi(void) { return abi_entries; } int op_little_endian(void) { unsigned int probe = 0xff; size_t sz = sizeof(unsigned int); unsigned char * probe_byte = (unsigned char *)&probe; assert(probe_byte[0] == 0xff || probe_byte[sz - 1] == 0xff); return probe_byte[0] == 0xff; } int op_write_abi_to_file(char const * abi_file) { FILE * fp; struct op_abi_entry const * abi_entry; if ((fp = fopen(abi_file, "w")) == NULL) return 0; for (abi_entry = get_abi() ; abi_entry->name != NULL; ++abi_entry) fprintf(fp, "%s %u\n", abi_entry->name, abi_entry->offset); fprintf(fp, "little_endian %d\n", op_little_endian()); fclose(fp); return 1; } oprofile-1.3.0/libabi/abi.h0000664000175000017500000000134113124774026012410 00000000000000/** * @file abi.h * * Contains internal ABI management class * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Graydon Hoare */ #ifndef OPROF_ABI_H #define OPROF_ABI_H #include #include #include struct abi_exception : std::exception { std::string const desc; explicit abi_exception(std::string const d); ~abi_exception() throw() {} }; class abi { public: abi(); int need(std::string const key) const; bool operator==(abi const & other) const; friend std::ostream & operator<<(std::ostream & o, abi const & abi); friend std::istream & operator>>(std::istream & i, abi & abi); private: std::map slots; }; #endif // OPROF_ABI_H oprofile-1.3.0/libabi/abi.cpp0000664000175000017500000000234713124774026012752 00000000000000/** * @file abi.cpp * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Graydon Hoare * @author John Levon * @author Philippe Elie */ #include "abi.h" #include "op_abi.h" #include "odb.h" #include "op_sample_file.h" #include #include using namespace std; typedef map abi_map; typedef abi_map::const_iterator abi_iter; abi_exception::abi_exception(string const d) : desc(d) {} abi::abi() { op_abi_entry const * entry = get_abi(); for ( ; entry->name != 0; ++entry) slots[entry->name] = entry->offset; slots["little_endian"] = op_little_endian(); } int abi::need(string const key) const { if (slots.find(key) != slots.end()) return slots.find(key)->second; else throw abi_exception(string("missing ABI key: ") + key); } bool abi::operator==(abi const & other) const { return slots == other.slots; } ostream & operator<<(ostream & o, abi const & abi) { abi_iter i = abi.slots.begin(); abi_iter e = abi.slots.end(); for (; i != e; ++i) o << i->first << " " << i->second << endl; return o; } istream & operator>>(istream & i, abi & abi) { string key; int val; abi.slots.clear(); while(i >> key >> val) abi.slots[key] = val; return i; } oprofile-1.3.0/libregex/0000775000175000017500000000000013323173530012136 500000000000000oprofile-1.3.0/libregex/stl.pat.in0000664000175000017500000002330512534404406014000 00000000000000# format : # $name = "regular_definition" # "pattern" = "substitued_pattern" # pattern can contain reference to regular definition with ${name} # this occurence are substitued in pattern by their definition # regular_definition containing other regular_definition refer always to a # previously defined regular definition so they can look like recursive but are # not. op_regex.cpp do sucessive apply of pattern whilst change occur (with a # hard limit on number of subsitutions) so you can apply successive change to # translate first to an intermediate simplified form then continue substitution # in another pattern (see iosfwd section). The number of grouping regexp is # limited, see static const size_t max_match; in op_regex.h. Note than mangled # name produce can be illegal as I choose to output like vector> rather # than vector > # man regex is a friend, is it your ? $integer = "\<[0-9]+" $identifier = "\<[_a-zA-Z][_a-zA-Z0-9]*" $typename = "${identifier}(::${identifier})*" $typename = "${typename}(<${typename}(, ${typename})*>)*" # adding more substitution allow more nested templated type but we run out of # \digit which is a wall. Indeed if you add more () grouping you need to # rename all relevant \digit in pattern which use this regular definition # $typename = "${typename}(<${typename}(, ${typename})*>)*" # finally add standard C type not recognized by above patterns, the way to add # pointer is ugly but we can't add any grouping to not overrun 9 max group # in left pattern rules side.. $typename = "(${typename}[ ]*\**|unsigned short[ ]**\**|unsigned int[ ]*\**|unsigned long[ ]*\**|unsigned char[ ]*\**|signed char[ ]*\**|long long[ ]*\**|unsigned long long[ ]*\**|long double[ ]*\**)" $ptrdiff_t_type = "(int|long)" # FIXME: really discussable but simplify output and the next pattern. "\" = ">" # for these two we can't match begin of word. "\{anonymous\}::" = "" "\(anonymous namespace\)::" = "" # specific to gcc 2.95 "\, __default_alloc_template>" = "string" # two pass, first shrink allocator<> then less<> allowing map with user defined # comparator "\<(multi)?map<${typename}, ${typename}, ${typename}, allocator<\8>>" = "\1map<\2, \8, \e>" "\<(multi)?map<${typename}, ${typename}, less<\2>>" = "\1map<\2, \8>" "\" = "bitset<\1>" "\<([io]stream_iterator)" = "\1" # common to all supported gcc version. "\, 0>" = "deque<\1>" "\<(stack|queue)<${typename}, deque<\2>>" = "\1<\2>" "\<(vector|list|deque)<${typename}, allocator<\2>>" = "\1<\2>" # strictly speaking 3rd parameters is less "\, less<\1>>" = "priority_queue<\1>" # two pass, first shrink allocator<> then less<> allowing map with user defined # comparator "\<(multi)?set<${typename}, ${typename}, allocator<\2>>" = "\1set<\2, \8>" "\<(multi)?set<${typename}, less<\2>>" = "\1set<\2>" # get ride of _Rb_tree iterator typedef, these are also mapped by map/set but # we can't distinguish a set>::iterator and a # map::iterator as they decay to an identical typedef so we don't try # to be clever here. "\<_Rb_tree_iterator<${typename}, \1 const[ ]*&, \1 const[ ]*\*>" = "_Rb_tree<\1>::const_iterator" "\<_Rb_tree_iterator<${typename}, \1[ ]*&, \1[ ]*\*>" = "_Rb_tree<\1>::iterator" # important special case for map/multimap iterator "\<_Rb_tree_iterator<(pair<${typename} const, ${typename}>), \1 const[ ]*&, \1 const[ ]*\*>" = "_Rb_tree<\1>::const_iterator" "\<_Rb_tree_iterator<(pair<${typename} const, ${typename}>), \1[ ]*&, \1[ ]*\*>" = "_Rb_tree<\1>::iterator" # 2.95/3.2 set/multiset implementation "\<_Rb_tree<${typename}, \1, _Identity<\1>, ${typename}, allocator<\1>>" = "_Rb_tree<\1, \1, _Identity<\1>, \7>" "_Rb_tree<${typename}, \1, _Identity<\1>, less<\1>>" = "_Rb_tree<\1, \1, _Identity<\1>>" # 2.95 map/multimap implementation "\<_Rb_tree<${typename}, pair<\1 const, (${typename}( const)?)>, _Select1st>, less<\1>, allocator<\7>>" = "_Rb_tree<\1, pair<\1 const, \7>, _Select1st>, less<\1>>" # 3.2 map/multimap implementation "\<_Rb_tree<${typename}, pair<\1 const, ${typename}>, _Select1st>, less<\1>, allocator>>" = "_Rb_tree<\1, pair<\1 const, \7>, _Select1st>, less<\1>>" # now we can shrink default comparator. "\<_Rb_tree<${typename}, pair<\1 const, (${typename}( const)?)>, _Select1st>, less<\1>>" = "_Rb_tree<\1, pair<\1 const, \7>, _Select1st>>" # get rid of _Select1st and _Identity # FIXME: the presence od _Identity<> and _Select1st<> allowed to quickly # differentiate a set or a map, the rule now to differentiate them is: # second parameter to _Rb_tree* is a pair<> ==> map else set<>. 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Run it through: * $ java_test * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include "demangle_java_symbol.h" #include "op_regex.h" #include #include #include using namespace std; namespace { void check_result(string const & input, string const & output, string const & result) { if (result != output) { cerr << "for:\n\"" << input << "\"\n" << "expect:\n\"" << output << "\"\n" << "found:\n\"" << result << "\"\n"; exit(EXIT_FAILURE); } } struct input_output { char const * mangled; char const * expect; }; input_output mangle_tests[] = { { "Ltest$test_1;f2(I)V", "void test$test_1.f2(int)" }, { "Ltest;f4()V", "void test.f4()" }, { "Ltest;f2(II)V", "void test.f2(int, int)" }, { "Ltest$HelloThread;run()V~1", "void test$HelloThread.run()~1" }, { "Lsun/security/provider/SHA;implCompress([BI)V", "void sun.security.provider.SHA.implCompress(byte[], int)" }, { "Ljava/lang/String;equals(Ljava/lang/Object;)Z", "boolean java.lang.String.equals(java.lang.Object)" }, { "Lorg/eclipse/swt/graphics/ImageData;blit(I[BIIIIIIIIIII[BIII[BIIIIIIIIIIZZ)V", "void org.eclipse.swt.graphics.ImageData.blit(int, byte[], int, int, int, int, int, int, int, int, int, int, int, byte[], int, int, int, byte[], int, int, int, int, int, int, int, int, int, int, boolean, boolean)" }, { 0, 0 } }; } // anonymous namespace int main(void) { input_output const * cur; for (cur = mangle_tests; cur->mangled; ++cur) { string result = demangle_java_symbol(cur->mangled); check_result(cur->mangled, cur->expect, result); } return 0; } oprofile-1.3.0/libregex/tests/Makefile.am0000664000175000017500000000063112534404406015256 00000000000000AM_CPPFLAGS = \ -I ${top_srcdir}/libutil++ \ -I ${top_srcdir}/libregex AM_CXXFLAGS = @OP_CXXFLAGS@ check_PROGRAMS = regex_test java_test regex_test_SOURCES = regex_test.cpp regex_test_LDADD = \ ../libop_regex.a \ ../../libutil++/libutil++.a java_test_SOURCES = java_test.cpp java_test_LDADD = \ ../libop_regex.a \ ../../libutil++/libutil++.a EXTRA_DIST = mangled-name.in TESTS = ${check_PROGRAMS} oprofile-1.3.0/libregex/tests/mangled-name.in0000664000175000017500000003673312534404406016113 00000000000000# test for stl beautifier, do op_regex_test < mangled-name.txt # line go by couple mangled name then expected name after run, line # starting by # and blank line are ignored. The test must output nothing if # successfull # before removing tests think it take time to write them. This is intended # to be a coverage test of all pattern in stl.pat. # g++ 2.95 stl mangled name basic_string, __default_alloc_template > string prefix_basic_string, __default_alloc_template > prefix_basic_string, __default_alloc_template> vector, __default_alloc_template >, allocator, __default_alloc_template > > > vector map, allocator > map map, __default_alloc_template >, image_name, less, __default_alloc_template > >, allocator > map multimap, allocator > multimap prefix_multimap, allocator > prefix_multimap, allocator> map > map bitset<33, unsigned long> bitset<33> istream_iterator istream_iterator ostream_iterator ostream_iterator # shared between all supported gcc version deque, 0> deque std::deque, 0> deque prefix_deque, 0> prefix_deque, 0> list > list list > list _List_iterator list::const_iterator _List_iterator list::iterator prefix_list > prefix_list> std::list > list queue, 0> > queue prefix_queue, 0> > prefix_queue> std::queue, 0> > queue # get ride of _Rb_tree typedef, these are also mapped by map/set but we can't # distinguish a set>::iterator and a map::iterator # as they decay to an identical typedef so we don't try to be clever here. _Rb_tree_iterator _Rb_tree::const_iterator _Rb_tree_iterator _Rb_tree::iterator # this run through special case pattern _Rb_tree_iterator, pair const &, pair const *> _Rb_tree>::const_iterator _Rb_tree_iterator, pair &, pair *> _Rb_tree>::iterator _Rb_tree, less, allocator > _Rb_tree _Rb_tree, _Select1st>, less, allocator> _Rb_tree, string const> _Select1st > int const _Select1st > int const _Select1st> string const _Identity int # this test fail since pair<> is not recognized as a type # _Select1st const, sample_entry>> # pair const # 2.95 map/multimap _Rb_tree, _Select1st >, less, allocator > _Rb_tree, int const> # 3.2 map/multimap _Rb_tree, _Select1st >, less, allocator > > _Rb_tree, int const> _List_base> _List_base # strictly speaking 3rd parameters is less priority_queue >, less > priority_queue prefix_priority_queue >, less > prefix_priority_queue, less> std::priority_queue >, std::less > priority_queue vector > vector vector > vector vector > vector stack, 0> > stack prefix_stack, 0> > prefix_stack> std::stack, 0> > stack # test complex typename, we don't support more than one level of nesting vector >, allocator > > > vector> std::vector >, std::allocator > > > vector> set, allocator > set set, __default_alloc_template >, less, __default_alloc_template > >, allocator, __default_alloc_template > > > set set > set prefix_set, allocator > prefix_set, allocator> prefix_set, allocator > prefix_set, allocator> multiset, allocator > multiset # test than pointer and reference to pointer are handled vector > vector vector > vector # algorithm, will work for 3.2 too. int * find(int *, int *, int const &, random_access_iterator_tag) int * find(int *, int *, int const &, random_access_iterator_tag) char const * find_if(char const *, char const *, compare, random_access_iterator_tag) char const * find_if(char const *, char const *, compare, random_access_iterator_tag) # gcc 3.2 std::basic_string, std::allocator > string std::basic_string, std::allocator > wstring # __normal_iterator are treated a part __gnu_cxx::__normal_iterator string::const_iterator __gnu_cxx::__normal_iterator string::iterator __gnu_cxx::__normal_iterator wstring::iterator __gnu_cxx::__normal_iterator wstring::const_iterator std::reverse_iterator<__gnu_cxx::__normal_iterator> reverse_iterator __gnu_cxx::__normal_iterator> vector::const_iterator __gnu_cxx::__normal_iterator> vector::iterator std::reverse_iterator<__gnu_cxx::__normal_iterator> reverse_iterator::const_iterator std::map, std::allocator > > map std::multimap, std::allocator > > multimap std::map > > map # parameter is size_t on x86 it's an unsigned bitset<(@SIZE_T_TYPE@)33> bitset<33> # 3, 4, 5th params are ptrdiff_t it's an int on x86 std::iterator iterator std::iterator iterator std::iterator iterator std::iterator iterator std::iterator iterator # 4th parms is ptrdiff_t std::istream_iterator, @PTRDIFF_T_TYPE@> istream_iterator std::ostream_iterator, @PTRDIFF_T_TYPE@> ostream_iterator # simple enough, it's just std::basic_ios > basic_ios std::basic_streambuf > basic_streambuf std::basic_istream > basic_istream std::basic_ostream > basic_ostream std::basic_iostream > basic_iostream std::basic_filebuf > basic_filebuf std::basic_ifstream > basic_ifstream std::basic_ofstream > basic_ofstream std::basic_fstream > basic_fstream std::istreambuf_iterator > istreambuf_iterator std::ostreambuf_iterator > ostreambuf_iterator std::basic_stringbuf, std::allocator > basic_stringbuf std::basic_istringstream, std::allocator > basic_istringstream std::basic_ostringstream, std::allocator > basic_ostringstream std::basic_stringstream, std::allocator > basic_stringstream # all the above intantiated with char and wchar_t fallback to standardised # typedef except istreambuf_iterator and ostreambuf_iterator std::basic_ios > ios std::basic_ios > wios std::basic_streambuf > streambuf std::basic_streambuf > wstreambuf std::basic_istream > istream std::basic_istream > wistream std::basic_ostream > ostream std::basic_ostream > wostream std::basic_iostream > iostream std::basic_iostream > wiostream std::basic_filebuf > filebuf std::basic_filebuf > wfilebuf std::basic_ifstream > ifstream std::basic_ifstream > wifstream std::basic_ofstream > ofstream std::basic_ofstream > wofstream std::basic_fstream > fstream std::basic_fstream > wfstream std::basic_stringbuf, std::allocator > stringbuf std::basic_stringbuf, std::allocator > wstringbuf std::basic_istringstream, std::allocator > istringstream std::basic_istringstream, std::allocator > wistringstream std::basic_ostringstream, std::allocator > ostringstream std::basic_ostringstream, std::allocator > wostringstream std::basic_stringstream, std::allocator > stringstream std::basic_stringstream, std::allocator > wstringstream # these two are also in iosfw, namely # typedef fpos::state_type> streampos; # typedef fpos::state_type> wstreampos; # but twice decay to fpos<__mbstate>, we choosed to translate to streampos std::fpos<__mbstate_t> streampos # locale std::num_put > num_put std::num_put > num_put std::num_get > num_get std::num_get > num_get std::time_put > time_put std::time_put > time_put std::time_get > time_get std::time_get > time_get std::money_put > money_put std::money_put > money_put std::money_get > money_get std::money_get > money_get std::moneypunct moneypunct std::moneypunct moneypunct std::moneypunct_byname moneypunct_byname std::moneypunct_byname moneypunct_byname # algorithm vector::iterator find::iterator, string>(vector::iterator, vector::iterator, string const&, random_access_iterator_tag) vector::iterator find(vector::iterator, vector::iterator, string const&, random_access_iterator_tag) string::iterator find(string::iterator, string::iterator, int const&, random_access_iterator_tag) string::iterator find(string::iterator, string::iterator, int const&, random_access_iterator_tag) vector::iterator find::iterator, int>(vector::iterator, vector::iterator, int const&, random_access_iterator_tag) vector::iterator find(vector::iterator, vector::iterator, int const&, random_access_iterator_tag) char const * find(char const *, char const *, int const &, random_access_iterator_tag) char const * find(char const *, char const *, int const &, random_access_iterator_tag) string::const_iterator find(string::const_iterator, string::const_iterator, int const&, random_access_iterator_tag) string::const_iterator find(string::const_iterator, string::const_iterator, int const&, random_access_iterator_tag) string::const_iterator find_if(string::const_iterator, string::const_iterator, compare, random_access_iterator_tag) string::const_iterator find_if(string::const_iterator, string::const_iterator, compare, random_access_iterator_tag) vector::iterator find_if::iterator, compare>(vector::iterator, vector::iterator, compare, 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Run it through: * $ regex_test * or * $ regex_test filename(s) * when no argument is provided "mangled-name" is used, * see it for the input file format * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include "string_manip.h" #include "op_regex.h" #include #include #include using namespace std; static int nr_error = 0; static void do_test(istream& fin) { regular_expression_replace rep; setup_regex(rep, "../stl.pat"); string test, expect, last; bool first = true; while (getline(fin, last)) { last = trim(last); if (last.length() == 0 || last[0] == '#') continue; if (first) { test = last; first = false; } else { expect = last; first = true; string str(test); rep.execute(str); if (str != expect) { cerr << "mistmatch: test, expect, returned\n" << '"' << test << '"' << endl << '"' << expect << '"' << endl << '"' << str << '"' << endl; ++nr_error; } } } if (!first) cerr << "input file ill formed\n"; } int main(int argc, char * argv[]) { try { if (argc > 1) { for (int i = 1; i < argc; ++i) { ifstream fin(argv[i]); do_test(fin); } } else { ifstream fin("mangled-name"); if (!fin) { cerr << "Unable to open input test " << "\"mangled_name\"\n" << endl; exit(EXIT_FAILURE); } do_test(fin); } } catch (bad_regex const & e) { cerr << "bad_regex " << e.what() << endl; return EXIT_FAILURE; } catch (exception const & e) { cerr << "exception: " << e.what() << endl; return EXIT_FAILURE; } return nr_error ? EXIT_FAILURE : EXIT_SUCCESS; } oprofile-1.3.0/libregex/demangle_symbol.cpp0000664000175000017500000000315612534404406015732 00000000000000/** * @file demangle_symbol.cpp * Demangle a C++ symbol * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #include #include "config.h" #include "demangle_symbol.h" #include "demangle_java_symbol.h" #include "op_regex.h" // from libiberty /*@{\name demangle option parameter */ #ifndef DMGL_PARAMS # define DMGL_PARAMS (1 << 0) /**< Include function args */ #endif #ifndef DMGL_ANSI # define DMGL_ANSI (1 << 1) /**< Include const, volatile, etc */ #endif /*@}*/ extern "C" char * cplus_demangle(char const * mangled, int options); using namespace std; namespace options { extern demangle_type demangle; } string const demangle_symbol(string const & name) { if (options::demangle == dmt_none) return name; // Do not try to strip leading underscore, as this leads to many // C++ demangling failures. However we strip off a leading '.' // as generated on PPC64 string const & tmp = (name[0] == '.' ? name.substr(1) : name); char * unmangled = cplus_demangle(tmp.c_str(), DMGL_PARAMS | DMGL_ANSI); if (!unmangled) { string result = demangle_java_symbol(name); if (!result.empty()) return result; return name; } string result(unmangled); free(unmangled); if (options::demangle == dmt_smart) { static bool init = false; static regular_expression_replace regex; if (init == false) { setup_regex(regex, OP_DATADIR "/stl.pat"); init = true; } // we don't protect against exception here, pattern must be // right and user can easily work-around by using -d regex.execute(result); } return result; } oprofile-1.3.0/libregex/demangle_symbol.h0000664000175000017500000000152212534404406015372 00000000000000/** * @file demangle_symbol.h * Demangle a C++ symbol * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author John Levon */ #ifndef DEMANGLE_SYMBOL_H #define DEMANGLE_SYMBOL_H #include /// demangle type: specify what demangling we use enum demangle_type { /// no demangling. dmt_none, /// use cplus_demangle() dmt_normal, /// normal plus a pass through the regular expression to simplify /// the mangled name dmt_smart }; /** * demangle_symbol - demangle a symbol * @param name the mangled symbol name * @return the demangled name * * Demangle the symbol name, if the global * variable demangle is true. * * The demangled name lists the parameters and type * qualifiers such as "const". */ std::string const demangle_symbol(std::string const & name); #endif // DEMANGLE_SYMBOL_H oprofile-1.3.0/libregex/op_regex.h0000664000175000017500000000773412534404406014054 00000000000000/** * @file op_regex.h * This file contains various definitions and interface for a * lightweight wrapper around libc regex, providing match * and replace facility. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * @remark Idea comes from TextFilt project * * @author Philippe Elie */ #ifndef OP_REGEX_H #define OP_REGEX_H // required by posix before including regex.h #include #include #include #include #include #include "op_exception.h" /** * ill formed regular expression or expression throw such exception */ struct bad_regex : op_exception { bad_regex(std::string const & pattern); }; /** * lightweight encapsulation of regex lib search and replace * * See stl.pat for further details and examples of used syntax. */ class regular_expression_replace { public: /** * @param limit limit on number of search and replace done * @param limit_defs_expansion limit on number of expansion done * during replacement of regular definition name by their expansion * * build an object holding regular defintion and regular expression * & replace, preparing it for substitution ala sed */ regular_expression_replace(size_t limit = 100, size_t limit_defs_expansion = 100); ~regular_expression_replace(); /** * @param name a regular definition name * @param replace the string to subsitute in other regular definition * or regular exepression when this regular defintion name is * encoutered. */ void add_definition(std::string const & name, std::string const & replace); /** * @param pattern a regular expression pattern, POSIX extended notation * @param replace the replace string to use when this regular * expression is matched * * You can imbed regular definition in pattern but not in replace. */ void add_pattern(std::string const & pattern, std::string const & replace); /** * @param str the input/output string where we search pattern and * replace them. * * Execute loop at max limit time on the set of regular expression * * Return true if too many match occur and replacing has been stopped * due to reach limit_defs_expansion. You can test if some pattern has * been matched by saving the input string and comparing it to the new * value. There is no way to detect s/a/a because the output string * will be identical to the input string. */ bool execute(std::string & str) const; private: struct replace_t { // when this regexp is matched regex_t regexp; // replace the matched part with this string std::string replace; }; // helper to execute bool do_execute(std::string & str, replace_t const & regexp) const; void do_replace(std::string & str, std::string const & replace, regmatch_t const * match) const; // helper to add_definition() and add_pattern() std::string expand_string(std::string const & input); // helper to add_pattern std::string substitute_definition(std::string const & pattern); // return the match of throw if idx is invalid regmatch_t const & get_match(regmatch_t const * match, char idx) const; // don't increase too, it have direct impact on performance. This limit // the number of grouping expression allowed in a regular expression // Note than you can use grouping match operator > 9 only in the // replace rule not in match regular expression since POSIX don't allow // more than \9 in matching sequence. static const size_t max_match = 16; size_t limit; size_t limit_defs_expansion; std::vector regex_replace; /// dictionary of regular definition typedef std::map defs_dict; defs_dict defs; }; /** * @param regex the regular_expression_replace to fill * @param filename the filename from where the deifnition and pattern are read * * add to regex pattern and regular definition read from the given file */ void setup_regex(regular_expression_replace& regex, std::string const & filename); #endif /* !OP_REGEX_H */ oprofile-1.3.0/libregex/op_regex.cpp0000664000175000017500000001641612534404406014404 00000000000000/** * @file op_regex.cpp * This file contains implementation for a lightweight wrapper around * libc regex, providing regular expression match and replace facility. * * @remark Copyright 2003 OProfile authors * @remark Read the file COPYING * @remark Idea comes from TextFilt project * * @author Philippe Elie */ #include #include #include #include "string_manip.h" #include "op_regex.h" using namespace std; namespace { string op_regerror(int err, regex_t const & regexp) { size_t needed_size = regerror(err, ®exp, 0, 0); char * buffer = new char[needed_size]; regerror(err, ®exp, buffer, needed_size); string retval = buffer; delete [] buffer; return retval; } void op_regcomp(regex_t & regexp, string const & pattern) { int err = regcomp(®exp, pattern.c_str(), REG_EXTENDED); if (err) { throw bad_regex("regcomp error: " + op_regerror(err, regexp) + " for pattern : " + pattern); } } bool op_regexec(regex_t const & regex, string const & str, regmatch_t * match, size_t nmatch) { return regexec(®ex, str.c_str(), nmatch, match, 0) != REG_NOMATCH; } void op_regfree(regex_t & regexp) { regfree(®exp); } // return the index number associated with a char seen in a "\x". // Allowed range are for x is [0-9a-z] return size_t(-1) if x is not in // these ranges. size_t subexpr_index(char ch) { if (isdigit(ch)) return ch - '0'; if (ch >= 'a' && ch <= 'z') return ch - 'a' + 10; return size_t(-1); } } // anonymous namespace bad_regex::bad_regex(string const & pattern) : op_exception(pattern) { } regular_expression_replace::regular_expression_replace(size_t limit_, size_t limit_defs) : limit(limit_), limit_defs_expansion(limit_defs) { } regular_expression_replace::~regular_expression_replace() { for (size_t i = 0 ; i < regex_replace.size() ; ++i) op_regfree(regex_replace[i].regexp); } void regular_expression_replace::add_definition(string const & name, string const & definition) { defs[name] = expand_string(definition); } void regular_expression_replace::add_pattern(string const & pattern, string const & replace) { string expanded_pattern = expand_string(pattern); regex_t regexp; op_regcomp(regexp, expanded_pattern); replace_t regex = { regexp, replace }; regex_replace.push_back(regex); } string regular_expression_replace::expand_string(string const & input) { string last, expanded(input); size_t i = 0; for (i = 0 ; i < limit_defs_expansion ; ++i) { last = expanded; expanded = substitute_definition(last); if (expanded == last) break; } if (i == limit_defs_expansion) throw bad_regex("too many substitution for: + input"); return last; } string regular_expression_replace::substitute_definition(string const & pattern) { string result; bool previous_is_escape = false; for (size_t i = 0 ; i < pattern.length() ; ++i) { if (pattern[i] == '$' && !previous_is_escape) { size_t pos = pattern.find('{', i); if (pos != i + 1) { throw bad_regex("invalid $ in pattern: " + pattern); } size_t end = pattern.find('}', i); if (end == string::npos) { throw bad_regex("no matching '}' in pattern: " + pattern); } string def_name = pattern.substr(pos+1, (end-pos) - 1); if (defs.find(def_name) == defs.end()) { throw bad_regex("definition not found and used in pattern: (" + def_name + ") " + pattern); } result += defs[def_name]; i = end; } else { if (pattern[i] == '\\' && !previous_is_escape) previous_is_escape = true; else previous_is_escape = false; result += pattern[i]; } } return result; } // FIXME limit output string size ? (cause we can have exponential growing // of output string through a rule "a" = "aa") bool regular_expression_replace::execute(string & str) const { bool changed = true; for (size_t nr_iter = 0; changed && nr_iter < limit ; ++nr_iter) { changed = false; for (size_t i = 0 ; i < regex_replace.size() ; ++i) { if (do_execute(str, regex_replace[i])) changed = true; } } // this don't return if the input string has been changed but if // we reach the limit number of iteration. return changed == false; } bool regular_expression_replace::do_execute(string & str, replace_t const & regexp) const { bool changed = false; regmatch_t match[max_match]; for (size_t iter = 0; op_regexec(regexp.regexp, str, match, max_match) && iter < limit; iter++) { changed = true; do_replace(str, regexp.replace, match); } return changed; } regmatch_t const & regular_expression_replace::get_match(regmatch_t const * match, char idx) const { size_t sub_expr = subexpr_index(idx); if (sub_expr == size_t(-1)) throw bad_regex("expect group index: " + idx); if (sub_expr >= max_match) throw bad_regex("illegal group index :" + idx); return match[sub_expr]; } void regular_expression_replace::do_replace (string & str, string const & replace, regmatch_t const * match) const { string inserted; for (size_t i = 0 ; i < replace.length() ; ++i) { if (replace[i] == '\\') { if (i == replace.length() - 1) { throw bad_regex("illegal \\ trailer: " + replace); } ++i; if (replace[i] == '\\') { inserted += '\\'; } else { regmatch_t const & matched = get_match(match, replace[i]); if (matched.rm_so == -1 && matched.rm_eo == -1) { // empty match: nothing todo } else if (matched.rm_so == -1 || matched.rm_eo == -1) { throw bad_regex("illegal match: " + replace); } else { inserted += str.substr(matched.rm_so, matched.rm_eo - matched.rm_so); } } } else { inserted += replace[i]; } } size_t first = match[0].rm_so; size_t count = match[0].rm_eo - match[0].rm_so; str.replace(first, count, inserted); } void setup_regex(regular_expression_replace & regex, string const & filename) { ifstream in(filename.c_str()); if (!in) { throw op_runtime_error("Can't open file " + filename + " for reading", errno); } regular_expression_replace var_name_rule; var_name_rule.add_pattern("^\\$([_a-zA-Z][_a-zA-Z0-9]*)[ ]*=.*", "\\1"); regular_expression_replace var_value_rule; var_value_rule.add_pattern(".*=[ ]*\"(.*)\"", "\\1"); regular_expression_replace left_rule; left_rule.add_pattern("[ ]*\"(.*)\"[ ]*=.*", "\\1"); regular_expression_replace right_rule; right_rule.add_pattern(".*=[ ]*\"(.*)\"", "\\1"); string line; while (getline(in, line)) { line = trim(line); if (line.empty() || line[0] == '#') continue; string temp = line; var_name_rule.execute(temp); if (temp == line) { string left = line; left_rule.execute(left); if (left == line) { throw bad_regex("invalid input file: \"" + line + '"'); } string right = line; right_rule.execute(right); if (right == line) { throw bad_regex("invalid input file: \"" + line + '"'); } regex.add_pattern(left, right); } else { // temp != line ==> var_name_rule succeed to substitute // into temp the var_name present in line string var_name = temp; string var_value = line; var_value_rule.execute(var_value); if (var_value == line) { throw bad_regex("invalid input file: \"" + line + '"'); } regex.add_definition(var_name, var_value); } } } oprofile-1.3.0/libregex/demangle_java_symbol.h0000664000175000017500000000061012534404406016370 00000000000000/** * @file demangle_java_symbol.h * Demangle a java symbol * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef DEMANGLE_JAVA_SYMBOL_H #define DEMANGLE_JAVA_SYMBOL_H #include /// Return an empty string on error std::string const demangle_java_symbol(std::string const & name); #endif // DEMANGLE_JAVA_SYMBOL_H oprofile-1.3.0/libregex/demangle_java_symbol.cpp0000664000175000017500000001035112534404406016726 00000000000000/** * @file demangle_java_symbol.cpp * Demangle a java symbol * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include "demangle_java_symbol.h" #include using namespace std; namespace { /** * The grammar we implement: * * field_type: * base_type | object_type | array_type * base_type: * B | C | D | F | I | J | S | Z * object_type: * L; * array_type: * [field_type * method_descriptor: * ( field_type* ) return_descriptor * return_descriptor: * field_type | V * method_signature: * object_type method_name method_descriptor * */ bool array_type(string & result, string::const_iterator & begin, string::const_iterator end); bool object_type(string & result, string::const_iterator & begin, string::const_iterator end); bool base_type(string & result, string::const_iterator & begin, string::const_iterator end) { bool ret = true; if (begin == end) return false; switch (*begin) { case 'B': result += "byte"; break; case 'C': result += "char"; break; case 'D': result += "double"; break; case 'F': result += "float"; break; case 'I': result += "int"; break; case 'J': result += "long"; break; case 'S': result += "short"; break; case 'Z': result += "boolean"; break; default: ret = false; break; } if (ret) ++begin; return ret; } bool field_type(string & result, string::const_iterator & begin, string::const_iterator end) { if (base_type(result, begin, end)) return true; if (object_type(result, begin, end)) return true; if (array_type(result, begin, end)) return true; return false; } bool array_type(string & result, string::const_iterator & begin, string::const_iterator end) { if (begin == end || *begin != '[') return false; ++begin; if (field_type(result, begin, end)) { result += "[]"; return true; } return false; } bool list_of_field_type(string & result, string::const_iterator & begin, string::const_iterator end) { bool first = false; while (begin != end) { if (first) result += ", "; if (!field_type(result, begin, end)) return false; first = true; } return true; } bool return_descriptor(string & result, string::const_iterator & begin, string::const_iterator end) { if (begin == end) return false; if (*begin == 'V') { ++begin; result = "void " + result; return true; } string temp; if (!field_type(temp, begin, end)) return false; result = temp + " " + result; return true; } bool method_descriptor(string & result, string::const_iterator & begin, string::const_iterator end) { if (begin == end || *begin != '(') return false; ++begin; string::const_iterator pos = find(begin, end, ')'); if (pos == end) return false; result += "("; if (!list_of_field_type(result, begin, pos)) return false; if (begin == end || *begin != ')') return false; ++begin; if (!return_descriptor(result, begin, end)) return false; result += ')'; return true; } bool methode_name(string & result, string::const_iterator & begin, string::const_iterator end) { if (begin == end) return false; string::const_iterator pos = find(begin, end, '('); if (pos == end) return false; result += '.' + string(begin, pos); begin = pos; return true; } bool object_type(string & result, string::const_iterator & begin, string::const_iterator end) { if (begin == end || *begin != 'L') return false; string::const_iterator pos = find(begin, end, ';'); if (pos == end) return false; string temp = string(begin + 1, pos); replace(temp.begin(), temp.end(), '/', '.'); result += temp; begin = pos + 1; return true; } string demangle_symbol(string::const_iterator begin, string::const_iterator end) { string result; if (!object_type(result, begin, end)) return string(); if (!methode_name(result, begin, end)) return string(); if (!method_descriptor(result, begin, end)) return string(); if (begin != end) { if (*begin == '~') { // special case for disambiguated symbol. result += string(begin, end); } else { return string(); } } return result; } } // anonymous namespace string const demangle_java_symbol(string const & name) { return demangle_symbol(name.begin(), name.end()); } oprofile-1.3.0/ChangeLog-20110000664000175000017500000000107012534404406012410 000000000000002011-02-25 Maynard Johnson From this date forward, ChangeLog entries will not be necessary, since 'git log' can now be used to show changes in the repository. 2011-02-09 William Cohen * libpp/format_output.h: Do not use mutable for reference variable. 2011-01-17 Will Deacon * events/arm/armv7-ca9/events: Add missing TLB event 2011-01-05 William Cohen * utils/opcontrol: Add argument checking for numerical arguments See ChangeLog-2010 for earlier changelogs. oprofile-1.3.0/libperf_events/0000775000175000017500000000000013323173530013344 500000000000000oprofile-1.3.0/libperf_events/operf_process_info.cpp0000664000175000017500000003361712534404406017670 00000000000000/* * @file pe_profiling/operf_process_info.cpp * This file contains functions for storing process information, * handling exectuable mmappings, etc. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 13, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 * * Modified by Maynard Johnson * (C) Copyright IBM Corporation 2013 * */ #include #include #include #include #include #include #include #include "operf_process_info.h" #include "file_manip.h" #include "operf_utils.h" using namespace std; using namespace OP_perf_utils; operf_process_info::operf_process_info(pid_t tgid, const char * appname, bool app_arg_is_fullname, bool is_valid) : pid(tgid), valid(is_valid), appname_valid(false), look_for_appname_match(false), forked(false), appname_is_fullname(NOT_FULLNAME), num_app_chars_matched(-1) { _appname = ""; set_appname(appname, app_arg_is_fullname); parent_of_fork = NULL; } operf_process_info::~operf_process_info() { map::iterator it; map::iterator end; if (valid) { it = mmappings.begin(); end = mmappings.end(); } mmappings.clear(); } void operf_process_info::set_appname(const char * appname, bool app_arg_is_fullname) { char exe_symlink[64]; char exe_realpath[PATH_MAX]; /* A combination of non-null appname and app_arg_is_fullname==true may be passed * from various locations. But a non-null appname and app_arg_is_fullname==false * may only be passed as a result of a PERF_RECORD_COMM event. */ bool from_COMM_event = (appname && !app_arg_is_fullname); if (appname_valid) return; /* If stored _appname is not empty, it implies we've been through this function before * (and would have tried the readlink method or, perhaps, fallen back to some other * method to set the stored _appname). If we're here because of something other than * a COMM event (e.g. MMAP event), then we should compare our stored _appname with our * collection of mmapping basenames to see if we can find an appname match; otherwise, * if the passed appname is NULL, we just return, since a NULL appname won't help us here. */ if (_appname.length()) { if (look_for_appname_match && !from_COMM_event) return find_best_match_appname_all_mappings(); else if (!appname) return; } snprintf(exe_symlink, 64, "/proc/%d/exe", pid); memset(exe_realpath, '\0', PATH_MAX); /* If the user is running a command via taskset, the kernel will send us a PERF_RECORD_COMM * for both comm=taskset and comm= for the same process ID !! * The user will not be interested in taskset samples; thus, we ignore such COMM events. * This is a hack, but there doesn't seem to be a better way around the possibility of having * application samples attributed to "taskset" instead of the application. */ if (readlink(exe_symlink, exe_realpath, sizeof(exe_realpath)-1) > 0) { _appname = exe_realpath; app_basename = op_basename(_appname); if (!strncmp(app_basename.c_str(), "taskset", strlen("taskset"))) { _appname = "unknown"; app_basename = "unknown"; } else { appname_valid = true; } } else { /* Most likely that the process has ended already, so we'll need to determine * the appname through different means. */ if (cverb << vmisc) { ostringstream message; message << "PID: " << hex << pid << " Unable to obtain appname from " << exe_symlink << endl << "\t" << strerror(errno) << endl; cout << message.str(); } if (appname && strcmp(appname, "taskset")) { _appname = appname; if (app_arg_is_fullname) { appname_valid = true; } else { look_for_appname_match = true; } } else { _appname = "unknown"; } app_basename = _appname; } ostringstream message; message << "PID: " << hex << pid << " appname is set to " << _appname << endl; cverb << vmisc << message.str(); if (look_for_appname_match) find_best_match_appname_all_mappings(); } /* This operf_process_info object may be a parent to processes that it has forked. * If the forked process has not done an 'exec' yet (i.e., we've not received a * COMM event for it), then it's still a dependent process of its parent. * If so, it will be in the parent's collection of forked processes. So, * when adding a new mapping, we should copy that mapping to each forked * child's operf_process_info object. Then, if samples are taken for that * mapping for that forked process, the samples can be correctly attributed. */ void operf_process_info::process_mapping(struct operf_mmap * mapping, bool do_self) { if (!appname_valid && !is_forked()) { if (look_for_appname_match) check_mapping_for_appname(mapping); else set_appname(NULL, false); } set_new_mapping_recursive(mapping, do_self); } int operf_process_info::get_num_matching_chars(string mapped_filename, string & basename) { size_t app_length; size_t basename_length; const char * app_cstr, * basename_cstr; string app_basename; basename = op_basename(mapped_filename); if (appname_is_fullname == NOT_FULLNAME) { // This implies _appname is storing a short name from a COMM event app_length = _appname.length(); app_cstr = _appname.c_str(); } else { app_basename = op_basename(_appname); app_length = app_basename.length(); app_cstr = app_basename.c_str(); } basename_length = basename.length(); if (app_length > basename_length) return -1; basename_cstr = basename.c_str(); int num_matched_chars = 0; for (size_t i = 0; i < app_length; i++) { if (app_cstr[i] == basename_cstr[i]) num_matched_chars++; else break; } return num_matched_chars ? num_matched_chars : -1; } /* If we do not know the full pathname of our app yet, * let's try to determine if the passed filename is a good * candidate appname. * ASSUMPTION: This function is called only when look_for_appname_match==true. */ void operf_process_info::check_mapping_for_appname(struct operf_mmap * mapping) { if (!mapping->is_anon_mapping) { string basename; int num_matched_chars = get_num_matching_chars(mapping->filename, basename); if (num_matched_chars > num_app_chars_matched) { if (num_matched_chars == (int)app_basename.length()) { appname_is_fullname = YES_FULLNAME; look_for_appname_match = false; appname_valid = true; } else { appname_is_fullname = MAYBE_FULLNAME; } _appname = mapping->filename; app_basename = basename; num_app_chars_matched = num_matched_chars; cverb << vmisc << "Best appname match is " << _appname << endl; } } } void operf_process_info::find_best_match_appname_all_mappings(void) { map::iterator it; // We may not even have a candidate shortname (from a COMM event) for the app yet if (_appname == "unknown") return; it = mmappings.begin(); while (it != mmappings.end()) { check_mapping_for_appname(it->second); it++; } } const struct operf_mmap * operf_process_info::find_mapping_for_sample(u64 sample_addr, bool hypervisor_sample) { map::iterator it = mmappings.begin(); while (it != mmappings.end()) { if (sample_addr >= it->second->start_addr && sample_addr <= it->second->end_addr && it->second->is_hypervisor == hypervisor_sample) return it->second; it++; } return NULL; } /** * Hypervisor samples cannot be attributed to any real binary, so we synthesize * an operf_mmap object with the name of "[hypervisor_bucket]". We mark this * mmaping as "is_anon" so that hypervisor samples are handled in the same way as * anon samples (and vdso, heap, and stack) -- i.e., a sample file is created * with the following pieces of information in its name: * - [hypervisor_bucket] * - PID * - address range * * The address range part is problematic for hypervisor samples, since we don't * know the range of sample addresses until we process all the samples. This is * why we need to adjust the hypervisor_mmaping when we detect an ip that's * outside of the current address range. This is also why we defer processing * hypervisor samples the first time through the processing of sample * data. See operf_utils::__handle_sample_event for details relating to how we * defer processing of such samples. */ void operf_process_info::process_hypervisor_mapping(u64 ip) { bool create_new_hyperv_mmap = true; u64 curr_start, curr_end; map::iterator it; map::iterator end; curr_end = curr_start = ~0ULL; it = mmappings.begin(); end = mmappings.end(); while (it != end) { if (it->second->is_hypervisor) { struct operf_mmap * _mmap = it->second; curr_start = _mmap->start_addr; curr_end = _mmap->end_addr; if (curr_start > ip) { mmappings.erase(it); delete _mmap; } else { create_new_hyperv_mmap = false; if (curr_end <= ip) _mmap->end_addr = ip; } break; } it++; } if (create_new_hyperv_mmap) { struct operf_mmap * hypervisor_mmap = new struct operf_mmap; memset(hypervisor_mmap, 0, sizeof(struct operf_mmap)); hypervisor_mmap->start_addr = ip; hypervisor_mmap->end_addr = ((curr_end == ~0ULL) || (curr_end < ip)) ? ip : curr_end; strcpy(hypervisor_mmap->filename, "[hypervisor_bucket]"); hypervisor_mmap->is_anon_mapping = true; hypervisor_mmap->pgoff = 0; hypervisor_mmap->is_hypervisor = true; if (cverb << vmisc) { ostringstream message; message << "Synthesize mmapping for " << hypervisor_mmap->filename << endl; message << "\tstart_addr: " << hex << hypervisor_mmap->start_addr; message << "; end addr: " << hypervisor_mmap->end_addr << endl; cout << message.str(); } process_mapping(hypervisor_mmap, false); } } void operf_process_info::copy_mappings_to_forked_process(operf_process_info * forked_pid) { map::iterator it = mmappings.begin(); while (it != mmappings.end()) { struct operf_mmap * mapping = it->second; /* We can pass just the pointer of the operf_mmap object because the * original object is created in operf_utils:__handle_mmap_event and * is saved in the global all_images_map. */ forked_pid->process_mapping(mapping, true); it++; } } void operf_process_info::set_fork_info(operf_process_info * parent) { forked = true; parent_of_fork = parent; parent_of_fork->add_forked_pid_association(this); parent_of_fork->copy_mappings_to_forked_process(this); } /* ASSUMPTION: This function should only be called during reprocessing phase * since we blindly set the _appname to that of the parent. If this function * were called from elsewhere, the parent's _appname might not yet be fully baked. */ void operf_process_info::connect_forked_process_to_parent(void) { if (cverb << vmisc) cout << "Connecting forked proc " << pid << " to parent " << parent_of_fork << endl; valid = true; _appname = parent_of_fork->get_app_name(); app_basename = op_basename(_appname); appname_valid = true; } void operf_process_info::remove_forked_process(pid_t forked_pid) { std::vector::iterator it = forked_processes.begin(); while (it != forked_processes.end()) { operf_process_info * p = *it; if (p->pid == forked_pid) { forked_processes.erase(it); break; } it++; } } /* See comment in operf_utils::__handle_comm_event for conditions under * which this function is called. */ void operf_process_info::try_disassociate_from_parent(char * app_shortname) { if (parent_of_fork && (parent_of_fork->pid == this->pid)) return; if (cverb << vmisc && parent_of_fork) cout << "Dis-associating forked proc " << pid << " from parent " << parent_of_fork->pid << endl; valid = true; set_appname(app_shortname, false); map::iterator it = mmappings.begin(); while (it != mmappings.end()) { operf_mmap * cur = it->second; /* mmappings from the parent may have been added to this proc info prior * to this proc info becoming valid since we could not know at the time if * this proc would ever be valid. But now we know it's valid (which is why * we're dis-associating from the parent), so we remove these unnecessary * parent mmappings. */ if (mmappings_from_parent[cur->start_addr]) { mmappings_from_parent[cur->start_addr] = false; mmappings.erase(it++); } else { process_mapping(cur, false); it++; } } if (parent_of_fork) { parent_of_fork->remove_forked_process(this->pid); parent_of_fork = NULL; } forked = false; } /* This function adds a new mapping to the current operf_process_info * and then calls the same function on each of its forked children. * If do_self==true, it means this function is being called by a parent * on a forked child's operf_process_info. Then, if the mapping already * exists, we do not set the corresponding mmappings_from_parent since we * want to retain the knowledge that the mapping had already been added for * this process versus from the parent. If do_self==false, it means this * operf_process_info is the top-level parent and should set the corresponding * mmappings_from_parent to false. The mmappings_from_parent map allows us to * know whether to keep or discard the mapping if/when we dis-associate from * the parent, */ void operf_process_info::set_new_mapping_recursive(struct operf_mmap * mapping, bool do_self) { if (do_self) { map::iterator it = mmappings.find(mapping->start_addr); if (it == mmappings.end()) mmappings_from_parent[mapping->start_addr] = true; else mmappings_from_parent[mapping->start_addr] = false; } else { mmappings_from_parent[mapping->start_addr] = false; } mmappings[mapping->start_addr] = mapping; std::vector::iterator it = forked_processes.begin(); while (it != forked_processes.end()) { operf_process_info * fp = *it; fp->set_new_mapping_recursive(mapping, true); cverb << vmisc << "Copied new parent mapping for " << mapping->filename << " for forked process " << fp->pid << endl; it++; } } oprofile-1.3.0/libperf_events/operf_process_info.h0000664000175000017500000001024112550016636017323 00000000000000/* * @file pe_profiling/operf_process_info.h * This file contains functions for storing process information, * handling exectuable mmappings, etc. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 7, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 */ #ifndef OPERF_PROCESS_INFO_H_ #define OPERF_PROCESS_INFO_H_ #include #include #include "op_types.h" #include "cverb.h" extern verbose vmisc; struct operf_mmap { u64 start_addr; u64 end_addr; u64 pgoff; u32 pid; bool is_anon_mapping; bool is_hypervisor; char filename[PATH_MAX]; }; /* This class is designed to hold information about a process for which a COMM event * has been recorded in the profile data: application name, process ID, and a map * containing all of the libraries and executable anonymous memory mappings used by this * process. * * The COMM event provides only a 16-char (possibly abbreviated) "comm" field for the * executable's basename. If operf is being run in single-process mode vs system-wide, * then we will know what the full pathname of the executable is, in which case, that * will be the value stored in the app_name field; otherwise, as MMAP events are * processed, we compare their basenames to the short name we got from the COMM event. * The mmap'ing whose basename has the most matching characters is chosen to use as * the full pathname of the application. TODO: It's possible that this choice may be wrong; * we should verify the choice by looking at the ELF data (ELF header e_type field should * be "ET_EXEC"). * * This class is designed to handle the possibility that MMAP events may occur for a process * prior to the COMM event. */ class operf_process_info { public: operf_process_info(pid_t tgid, const char * appname, bool app_arg_is_fullname, bool is_valid); ~operf_process_info(void); bool is_valid(void) { return (valid); } bool is_appname_valid(void) { return (valid && appname_valid); } void set_valid(void) { valid = true; } void set_appname_valid(void) { appname_valid = true; } bool is_forked(void) { return forked; } void process_mapping(struct operf_mmap * mapping, bool do_self); void process_hypervisor_mapping(u64 ip); void connect_forked_process_to_parent(void); void set_fork_info(operf_process_info * parent); void add_forked_pid_association(operf_process_info * forked_pid) { forked_processes.push_back(forked_pid); } void copy_mappings_to_forked_process(operf_process_info * forked_pid); void try_disassociate_from_parent(char * appname); void remove_forked_process(pid_t forked_pid); std::string get_app_name(void) { return _appname; } const struct operf_mmap * find_mapping_for_sample(u64 sample_addr, bool hypervisor_sample); void set_appname(const char * appname, bool app_arg_is_fullname); void check_mapping_for_appname(struct operf_mmap * mapping); private: typedef enum { NOT_FULLNAME, MAYBE_FULLNAME, YES_FULLNAME } op_fullname_t; pid_t pid; std::string _appname; bool valid, appname_valid, look_for_appname_match; bool forked; op_fullname_t appname_is_fullname; std::string app_basename; int num_app_chars_matched; std::map mmappings; std::map mmappings_from_parent; /* When a FORK event is received, we associate that forked process * with its parent by adding it to the parent's forked_processes * collection. The main reason we need this collection is because * PERF_RECORD_MMAP events may arrive for the parent out of order, * after a PERF_RECORD_FORK. Since forked processes inherit their * parent's mmappings, we want to make sure those mmappings exist * for the forked process so that samples may be properly attributed. * Therefore, the various paths of adding mmapings to a parent, will * also result in adding those mmappings to forked children. */ std::vector forked_processes; operf_process_info * parent_of_fork; void set_new_mapping_recursive(struct operf_mmap * mapping, bool do_self); int get_num_matching_chars(std::string mapped_filename, std::string & basename); void find_best_match_appname_all_mappings(void); }; #endif /* OPERF_PROCESS_INFO_H_ */ oprofile-1.3.0/libperf_events/operf_event.h0000664000175000017500000000677312534404406015770 00000000000000/* * @file pe_profiling/operf_event.h * Definitions of structures and methods for handling perf_event data * from the kernel. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 7, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 */ #ifndef OPERF_EVENT_H_ #define OPERF_EVENT_H_ #include #include #include #include "op_types.h" #define OP_MAX_EVT_NAME_LEN 64 #define OP_MAX_UM_NAME_LEN 64 #define OP_MAX_UM_NAME_STR_LEN 17 #define OP_MAX_NUM_EVENTS 512 struct ip_event { struct perf_event_header header; u64 ip; u32 pid, tid; unsigned char __more_data[]; }; struct mmap_event { struct perf_event_header header; u32 pid, tid; u64 start; u64 len; u64 pgoff; char filename[PATH_MAX]; }; struct comm_event { struct perf_event_header header; u32 pid, tid; char comm[16]; }; struct fork_event { struct perf_event_header header; u32 pid, ppid; u32 tid, ptid; u64 time; }; struct lost_event { struct perf_event_header header; u64 id; u64 lost; }; struct read_event { struct perf_event_header header; u32 pid, tid; u64 value; u64 time_enabled; u64 time_running; u64 id; }; struct sample_event { struct perf_event_header header; u64 array[]; }; struct throttle_event { struct perf_event_header header; u64 time; u64 id; u64 stream_id; }; typedef union event_union { struct perf_event_header header; struct ip_event ip; struct mmap_event mmap; struct comm_event comm; struct fork_event fork; struct lost_event lost; struct read_event read; struct sample_event sample; struct throttle_event throttle; } event_t; struct mmap_data { void *base; u64 mask; u64 prev; }; struct ip_callchain { u64 nr; u64 ips[0]; }; struct sample_data { u64 ip; u32 pid, tid; u64 time; u64 addr; u64 id; u32 cpu; u64 period; u32 raw_size; void *raw_data; struct ip_callchain * callchain; }; typedef struct operf_event { char name[OP_MAX_EVT_NAME_LEN]; // code for perf_events u64 evt_code; /* Base event code for oprofile sample file management; may be the same as evt_code, * but different for certain architectures (e.g., ppc64). Also, when unit masks * are used, the evt_code to be passed to perf_events includes both the * base code from op_evt_code and the left-shifted unit mask bits. */ u64 op_evt_code; // Make the evt_um and count fields unsigned long to match op_default_event_descr unsigned long evt_um; char um_name[OP_MAX_UM_NAME_LEN]; unsigned long count; bool no_kernel; bool no_user; bool no_hv; bool mode_specified; /* user specified user or kernel modes */ bool umask_specified; /* user specified a unit mask */ char um_numeric_val_as_str[OP_MAX_UM_NAME_STR_LEN]; bool throttled; /* set to true if the event is ever throttled */ } operf_event_t; struct mmap_info { u64 offset, file_data_size, file_data_offset, head; char * buf; int traceFD; }; struct op_file_section { u64 size; u64 offset; }; struct op_file_attr { struct perf_event_attr attr; struct op_file_section ids; }; struct op_header_evt_info { struct perf_event_attr attr; std::vector ids; off_t id_offset; }; struct OP_file_header { u64 magic; u64 size; u64 attr_size; struct op_file_section attrs; struct op_file_section data; }; struct OP_header { struct op_header_evt_info h_attrs[OP_MAX_NUM_EVENTS]; off_t attr_offset; off_t data_offset; u64 data_size; }; /* Some of the above definitions were borrowed from the perf tool's util/event.h file. */ #endif /* OPERF_EVENT_H_ */ oprofile-1.3.0/libperf_events/operf_mangling.h0000664000175000017500000000160012534404406016423 00000000000000/* * @file pe_profiling/operf_mangling.h * This file is based on daemon/opd_mangling and is used for * mangling and opening of sample files for operf. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 15, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 */ #ifndef OPERF_MANGLING_H_ #define OPERF_MANGLING_H_ #include "odb.h" struct operf_sfile; /* * operf_open_sample_file - open a sample file * @param sf operf_sfile to open sample file for * @param counter counter number * @param cg if this is a callgraph file * * Open image sample file for the sfile, counter * counter and set up memory mappings for it. * * Returns 0 on success. */ int operf_open_sample_file(odb_t *file, struct operf_sfile *last, struct operf_sfile * sf, int counter, int cg); #endif /* OPERF_MANGLING_H_ */ oprofile-1.3.0/libperf_events/Makefile.am0000664000175000017500000000124612534404406015325 00000000000000if BUILD_FOR_PERF_EVENT AM_CPPFLAGS = \ -I ${top_srcdir}/libabi \ -I ${top_srcdir}/libutil \ -I ${top_srcdir}/libutil++ \ -I ${top_srcdir}/libop \ -I ${top_srcdir}/libdb \ -I ${top_srcdir}/libperf_events \ -I ${top_srcdir}/libpe_utils \ @PERF_EVENT_FLAGS@ \ @OP_CPPFLAGS@ AM_CXXFLAGS = @OP_CXXFLAGS@ noinst_LIBRARIES = libperf_events.a libperf_events_a_SOURCES = \ operf_utils.h \ operf_utils.cpp \ operf_event.h \ operf_counter.h \ operf_counter.cpp \ operf_process_info.h \ operf_process_info.cpp \ operf_kernel.cpp \ operf_kernel.h \ operf_mangling.cpp \ operf_mangling.h \ operf_sfile.cpp \ operf_sfile.h \ operf_stats.cpp \ operf_stats.h endif oprofile-1.3.0/libperf_events/operf_stats.cpp0000664000175000017500000001432512534404406016330 00000000000000/** * @file libperf_events/operf_stats.cpp * Management of operf statistics * * @remark Copyright 2012 OProfile authors * @remark Read the file COPYING * * Created on: June 11, 2012 * @author Maynard Johnson * (C) Copyright IBM Corp. 2012 */ #include #include #include #include #include #include #include #include "operf_stats.h" #include "op_get_time.h" unsigned long operf_stats[OPERF_MAX_STATS]; /** * operf_print_stats - print out latest statistics to operf.log */ using namespace std; static string create_stats_dir(string const & cur_sampledir); static void write_throttled_event_files(vector< operf_event_t> const & events, string const & stats_dir); static void _write_stats_file(string const & stats_filename, unsigned long lost_sample_count) { ofstream stats_file(stats_filename.c_str(), ios_base::out); if (stats_file.good()) { stats_file << lost_sample_count; stats_file.close(); } else { cerr << "Unable to write to stats file " << stats_filename << endl; } } void operf_print_stats(string sessiondir, char * starttime, bool throttled, vector< operf_event_t> const & events) { string operf_log (sessiondir); unsigned long total_lost_samples = 0; bool stats_dir_valid = true; string stats_dir = create_stats_dir(sessiondir + "/" + "samples/current/"); if (strcmp(stats_dir.c_str(), "") != 0) { // If there are throttled events print them if (throttled) write_throttled_event_files(events, stats_dir); } else { stats_dir_valid = false; perror("Unable to create stats dir"); } operf_log.append("/samples/operf.log"); FILE * fp = fopen(operf_log.c_str(), "a"); if (!fp) { fprintf(stderr, "Unable to open %s file.\n", operf_log.c_str()); return; } fprintf(fp, "\nProfiling started at %s", starttime); fprintf(fp, "Profiling stopped at %s", op_get_time()); fprintf(fp, "\n-- OProfile/operf Statistics --\n"); fprintf(fp, "Nr. non-backtrace samples: %lu\n", operf_stats[OPERF_SAMPLES]); fprintf(fp, "Nr. kernel samples: %lu\n", operf_stats[OPERF_KERNEL]); fprintf(fp, "Nr. user space samples: %lu\n", operf_stats[OPERF_PROCESS]); fprintf(fp, "Nr. samples lost due to sample address not in expected range for domain: %lu\n", operf_stats[OPERF_INVALID_CTX]); fprintf(fp, "Nr. lost kernel samples: %lu\n", operf_stats[OPERF_LOST_KERNEL]); fprintf(fp, "Nr. samples lost due to sample file open failure: %lu\n", operf_stats[OPERF_LOST_SAMPLEFILE]); fprintf(fp, "Nr. samples lost due to no permanent mapping: %lu\n", operf_stats[OPERF_LOST_NO_MAPPING]); fprintf(fp, "Nr. user context kernel samples lost due to no app info available: %lu\n", operf_stats[OPERF_NO_APP_KERNEL_SAMPLE]); fprintf(fp, "Nr. user samples lost due to no app info available: %lu\n", operf_stats[OPERF_NO_APP_USER_SAMPLE]); fprintf(fp, "Nr. backtraces skipped due to no file mapping: %lu\n", operf_stats[OPERF_BT_LOST_NO_MAPPING]); fprintf(fp, "Nr. hypervisor samples dropped due to address out-of-range: %lu\n", operf_stats[OPERF_LOST_INVALID_HYPERV_ADDR]); fprintf(fp, "Nr. samples lost reported by perf_events kernel: %lu\n", operf_stats[OPERF_RECORD_LOST_SAMPLE]); if (operf_stats[OPERF_RECORD_LOST_SAMPLE]) { fprintf(stderr, "\n\n * * * ATTENTION: The kernel lost %lu samples. * * *\n", operf_stats[OPERF_RECORD_LOST_SAMPLE]); fprintf(stderr, "Decrease the sampling rate to eliminate (or reduce) lost samples.\n"); } else if (throttled) { fprintf(stderr, "* * * * WARNING: Profiling rate was throttled back by the kernel * * * *\n"); fprintf(stderr, "The number of samples actually recorded is less than expected, but is\n"); fprintf(stderr, "probably still statistically valid. Decreasing the sampling rate is the\n"); fprintf(stderr, "best option if you want to avoid throttling.\n"); } for (int i = OPERF_INDEX_OF_FIRST_LOST_STAT; i < OPERF_MAX_STATS; i++) { if (stats_dir_valid && operf_stats[i]) _write_stats_file(stats_dir + "/" + stats_filenames[i], operf_stats[i]); total_lost_samples += operf_stats[i]; } // Write total_samples into stats file if we see any indication of lost samples if (total_lost_samples) _write_stats_file(stats_dir + "/" + stats_filenames[OPERF_SAMPLES], operf_stats[OPERF_SAMPLES]); if (total_lost_samples > (int)(OPERF_WARN_LOST_SAMPLES_THRESHOLD * operf_stats[OPERF_SAMPLES])) { fprintf(stderr, "\nWARNING: Lost samples detected! See %s for details.\n", operf_log.c_str()); fprintf(stderr, "Lowering the sampling rate may reduce or eliminate lost samples.\n"); fprintf(stderr, "See the '--events' option description in the operf man page for help.\n"); } fflush(fp); fclose(fp); }; static void write_throttled_event_files(vector< operf_event_t> const & events, string const & stats_dir) { string outputfile; ofstream outfile; string event_name; string throttled_dir; bool throttled_dir_created = false; int rc; throttled_dir = stats_dir + "/throttled"; for (unsigned index = 0; index < events.size(); index++) { if (events[index].throttled == true) { if (!throttled_dir_created) { rc = mkdir(throttled_dir.c_str(), S_IRWXU | S_IRWXG | S_IROTH | S_IXOTH); if (rc && (errno != EEXIST)) { cerr << "Error trying to create " << throttled_dir << endl; perror("mkdir failed with"); return; } throttled_dir_created = true; } /* Write file entry to indicate if the data sample was * throttled. */ outputfile = throttled_dir + "/" + events[index].name; outfile.open(outputfile.c_str()); if (!outfile.is_open()) { cerr << "Internal error: Could not create " << outputfile << strerror(errno) << endl; } else { outfile.close(); } } } } static string create_stats_dir(string const & cur_sampledir) { int rc; std::string stats_dir; /* Assumption: cur_sampledir ends in slash */ stats_dir = cur_sampledir + "stats"; rc = mkdir(stats_dir.c_str(), S_IRWXU | S_IRWXG | S_IROTH | S_IXOTH); if (rc && (errno != EEXIST)) { cerr << "Error trying to create stats dir. " << endl; perror("mkdir failed with"); return NULL; } return stats_dir; } oprofile-1.3.0/libperf_events/operf_stats.h0000664000175000017500000000107512534404406015773 00000000000000/** * @file libperf_events/operf_stats.h * Management of operf statistics * * @remark Copyright 2012 OProfile authors * @remark Read the file COPYING * * Created on: June 11, 2012 * @author Maynard Johnson * (C) Copyright IBM Corp. 2012 */ #include #include #include "operf_counter.h" #ifndef OPERF_STATS_H #define OPERF_STATS_H extern unsigned long operf_stats[]; void operf_print_stats(std::string sampledir, char * starttime, bool throttled, std::vector< operf_event_t> const & events); #endif /* OPERF_STATS_H */ oprofile-1.3.0/libperf_events/operf_kernel.cpp0000664000175000017500000000554312534404406016454 00000000000000/* * @file pe_profiling/operf_kernel.cpp * This file is based on daemon/opd_kernel and is used for * dealing with the kernel and kernel module samples. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 12, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 */ #include #include #include #include #include #include "operf_kernel.h" #include "operf_sfile.h" #include "op_list.h" #include "op_libiberty.h" #include "cverb.h" #include "op_fileio.h" extern verbose vmisc; extern bool no_vmlinux; static LIST_HEAD(modules); static struct operf_kernel_image vmlinux_image; using namespace std; void operf_create_vmlinux(char const * name, char const * arg) { /* vmlinux is *not* on the list of modules */ list_init(&vmlinux_image.list); /* for no vmlinux */ if (no_vmlinux) { vmlinux_image.name = xstrdup("no-vmlinux"); return; } vmlinux_image.name = xstrdup(name); sscanf(arg, "%llx,%llx", &vmlinux_image.start, &vmlinux_image.end); ostringstream message; message << "kernel_start = " << hex << vmlinux_image.start << "; kernel_end = " << vmlinux_image.end << endl; cverb << vmisc << message.str(); if (!vmlinux_image.start && !vmlinux_image.end) { ostringstream message; message << "error: mis-parsed kernel range: " << hex << vmlinux_image.start << "; kernel_end = " << vmlinux_image.end << endl; cerr << message.str(); exit(EXIT_FAILURE); } } /** * Allocate and initialise a kernel module image description. * @param name image name * @param start start address * @param end end address */ void operf_create_module(char const * name, vma_t start, vma_t end) { struct operf_kernel_image * image =(struct operf_kernel_image *) xmalloc(sizeof(struct operf_kernel_image)); image->name = xstrdup(name); image->start = start; image->end = end; list_add(&image->list, &modules); } void operf_free_modules_list(void) { struct list_head * pos; struct list_head * pos2; struct operf_kernel_image * image; list_for_each_safe(pos, pos2, &modules) { image = list_entry(pos, struct operf_kernel_image, list); free(image->name); list_del(&image->list); free(image); } } /** * find a kernel image by PC value * @param trans holds PC value to look up * * find the kernel image which contains this PC. * * Return %NULL if not found. */ struct operf_kernel_image * operf_find_kernel_image(vma_t pc) { struct list_head * pos; struct operf_kernel_image * image = &vmlinux_image; if (no_vmlinux) return image; if (image->start <= pc && image->end > pc) return image; list_for_each(pos, &modules) { image = list_entry(pos, struct operf_kernel_image, list); if (image->start <= pc && image->end > pc) return image; } return NULL; } const char * operf_get_vmlinux_name(void) { return vmlinux_image.name; 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install-ps install-ps-am install-strip installcheck \ installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ tags tags-am uninstall uninstall-am .PRECIOUS: Makefile # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: oprofile-1.3.0/libperf_events/operf_sfile.h0000664000175000017500000000722712603572700015744 00000000000000/** * @file pe_profiling/operf_sfile.h * Management of sample files generated from operf * This file is modeled after daemon/opd_sfile.c * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * @author Maynard Johnson * (C) Copyright IBM Corporation 2011 */ #ifndef OPD_SFILE_H #define OPD_SFILE_H #include "operf_utils.h" #include "odb.h" #include "op_hw_config.h" #include "op_types.h" #include "op_list.h" #include "operf_process_info.h" #include struct operf_transient; struct operf_kernel_image; #define CG_HASH_SIZE 16 #define INVALID_IMAGE "INVALID IMAGE" #define VMA_SHIFT 13 /** * Each set of sample files (where a set is over the physical counter * types) will have one of these for it. We match against the * descriptions here to find which sample DB file we need to modify. * * cg files are stored in the hash. */ struct operf_sfile { /** hash value for this sfile */ unsigned long hashval; const char * image_name; const char * app_filename; size_t image_len, app_len; /** thread ID, -1 if not set */ pid_t tid; /** thread group ID, -1 if not set */ pid_t tgid; /** CPU number */ unsigned int cpu; /** kernel image if applicable */ struct operf_kernel_image * kernel; bool is_anon; vma_t start_addr; vma_t end_addr; /** hash table link */ struct list_head hash; /** lru list */ struct list_head lru; /** true if this file should be ignored in profiles */ int ignored; /** opened sample files */ odb_t files[OP_MAX_EVENTS]; /** extended sample files */ odb_t * ext_files; /** hash table of opened cg sample files */ struct list_head cg_hash[CG_HASH_SIZE]; }; /** a call-graph entry */ struct operf_cg_entry { /** where arc is to */ struct operf_sfile to; /** next in the hash slot */ struct list_head hash; }; /** * Transient values used for parsing the event buffer. * Note that these are reset for each buffer read, but * that should be ok as in the kernel, cpu_buffer_reset() * ensures that a correct context starts off the buffer. */ struct operf_transient { struct operf_sfile * current; struct operf_sfile * last; bool is_anon; operf_process_info * cur_procinfo; vma_t pc; const char * image_name; char app_filename[PATH_MAX]; size_t image_len, app_len; vma_t last_pc; int event; u64 sample_id; int in_kernel; unsigned long cpu; u32 tid; u32 tgid; vma_t start_addr; vma_t end_addr; bool cg; // TODO: handle extended //void * ext; }; /** clear any sfiles that are for the kernel */ void operf_sfile_clear_kernel(void); /** sync sample files */ void operf_sfile_sync_files(void); /** close sample files */ void operf_sfile_close_files(void); /** clear out a certain amount of LRU entries * return non-zero if the lru is already empty */ int operf_sfile_lru_clear(void); /** remove a sfile from the lru list, protecting it from operf_sfile_lru_clear() */ void operf_sfile_get(struct operf_sfile * sf); /** add this sfile to lru list */ void operf_sfile_put(struct operf_sfile * sf); /** * Find the sfile for the current parameters. Note that is required * that the PC value be set appropriately (needed for kernel images) */ struct operf_sfile * operf_sfile_find(struct operf_transient const * trans); /** Log the sample in a previously located sfile. */ void operf_sfile_log_sample(struct operf_transient const * trans); /** Log the event/cycle count in a previously located sfile */ void operf_sfile_log_sample_count(struct operf_transient const * trans, unsigned long int count); /** Log a callgraph arc. */ void operf_sfile_log_arc(struct operf_transient const * trans); /** initialise hashes */ void operf_sfile_init(void); #endif /* OPD_SFILE_H */ oprofile-1.3.0/libperf_events/operf_counter.cpp0000664000175000017500000011065413127452476016664 00000000000000/** * @file libperf_events/operf_counter.cpp * C++ class implementation that abstracts the user-to-kernel interface * for using Linux Performance Events Subsystem. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 7, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 * * Modified by Maynard Johnson * (C) Copyright IBM Corporation 2012, 2014 * */ #include #include #include #include #include #include #include #include #include #include "op_events.h" #include "operf_counter.h" #include "op_abi.h" #include "cverb.h" #include "operf_process_info.h" #include "op_libiberty.h" #include "operf_stats.h" #include "op_pe_utils.h" using namespace std; using namespace OP_perf_utils; volatile bool quit; int sample_reads; int num_mmap_pages; unsigned int pagesize; verbose vrecord("record"); verbose vconvert("convert"); extern bool first_time_processing; extern bool throttled; extern size_t mmap_size; extern size_t pg_sz; extern bool use_cpu_minus_one; extern bool track_new_forks; namespace { vector event_names; static const char __op_magic[8] = {'O', 'P', 'F', 'I', 'L', 'E', '\0', '\0'}; static bool _print_pp_progress(int fd) { int msg; if (read(fd, &msg, sizeof(msg)) > 0) return true; else return false; } /* This function for reading an event from the sample data pipe must * be robust enough to handle the situation where the operf_record process * writes an event record to the pipe in multiple chunks. */ #define OP_PIPE_READ_OK 0 #define OP_PIPE_CLOSED -1 static int _get_perf_event_from_pipe(event_t * event, int sample_data_fd) { static size_t pe_header_size = sizeof(perf_event_header); size_t read_size = pe_header_size; int rc = OP_PIPE_READ_OK; char * evt = (char *)event; ssize_t num_read; perf_event_header * header = (perf_event_header *)event; memset(header, '\0', pe_header_size); /* A signal handler was setup for the operf_read process to handle interrupts * (i.e., from ctrl-C), so the read syscalls below may get interrupted. But the * operf_read process should ignore the interrupt and continue processing * until there's no more data to read or until the parent operf process * forces us to stop. So we must try the read operation again if it was * interrupted. */ again: errno = 0; if ((num_read = read(sample_data_fd, header, read_size)) < 0) { cverb << vdebug << "Read 1 of sample data pipe returned with " << strerror(errno) << endl; if (errno == EINTR) { goto again; } else { rc = OP_PIPE_CLOSED; goto out; } } else if (num_read == 0) { // Implies pipe has been closed on the write end, so return -1 to quit reading rc = OP_PIPE_CLOSED; goto out; } else if (num_read != (ssize_t)read_size) { header += num_read; read_size -= num_read; goto again; } read_size = header->size - pe_header_size; if (read_size == 0) /* This is technically a valid record -- it's just empty. I'm not * sure if this can happen (i.e., if the kernel ever creates empty * records), but we'll handle it just in case. */ goto again; if (!header->size || (header->size < pe_header_size)) /* Bogus header size detected. In this case, we don't set rc to -1, * because the caller will catch this error when it calls is_header_valid(). * I've seen such bogus stuff occur when profiling lots of processes at * a very high sampling frequency. This issue is still being investigated, * so for now, we'll just do our best to detect and handle gracefully. */ goto out; evt += pe_header_size; again2: if ((num_read = read(sample_data_fd, evt, read_size)) < 0) { cverb << vdebug << "Read 2 of sample data pipe returned with " << strerror(errno) << endl; if (errno == EINTR) { goto again2; } else { rc = OP_PIPE_CLOSED; if (errno == EFAULT) cerr << "Size of event record: " << header->size << endl; goto out; } } else if (num_read == 0) { // Implies pipe has been closed on the write end, so return -1 to quit reading rc = OP_PIPE_CLOSED; goto out; } else if (num_read != (ssize_t)read_size) { evt += num_read; read_size -= num_read; goto again2; } out: return rc; } static event_t * _get_perf_event_from_file(struct mmap_info & info) { uint32_t size = 0; static int num_remaps = 0; event_t * event; size_t pe_header_size = sizeof(struct perf_event_header); try_again: event = NULL; if (info.offset + info.head + pe_header_size > info.file_data_size) goto out; if (info.head + pe_header_size <= mmap_size) event = (event_t *)(info.buf + info.head); if (unlikely(!event || (info.head + event->header.size > mmap_size))) { int ret; u64 shift = pg_sz * (info.head / pg_sz); cverb << vdebug << "Remapping perf data file: " << dec << ++num_remaps << endl; ret = munmap(info.buf, mmap_size); if (ret) { string errmsg = "Internal error: munmap of perf data file failed with errno: "; errmsg += strerror(errno); throw runtime_error(errmsg); } info.offset += shift; info.head -= shift; ret = op_mmap_trace_file(info, false); if (ret) { string errmsg = "Internal error: mmap of perf data file failed with errno: "; errmsg += strerror(errno); throw runtime_error(errmsg); } goto try_again; } size = event->header.size; info.head += size; out: if (unlikely(!event)) { cverb << vdebug << "No more event records in file. info.offset: " << dec << info.offset << "; info.head: " << info.head << "; info.file_data_size: " << info.file_data_size << endl << "; mmap_size: " << mmap_size << "; current record size: " << size << endl; } return event; } } // end anonymous namespace operf_counter::operf_counter(operf_event_t & evt, bool enable_on_exec, bool do_cg, bool separate_cpu, bool inherit, int event_number) { memset(&attr, 0, sizeof(attr)); attr.size = sizeof(attr); attr.sample_type = OP_BASIC_SAMPLE_FORMAT; if (do_cg) attr.sample_type |= PERF_SAMPLE_CALLCHAIN; if (separate_cpu) attr.sample_type |= PERF_SAMPLE_CPU; #ifdef __s390__ attr.type = PERF_TYPE_HARDWARE; #else attr.type = PERF_TYPE_RAW; #endif #if ((defined(__i386__) || defined(__x86_64__)) && (HAVE_PERF_PRECISE_IP)) if (evt.evt_code & EXTRA_PEBS) { attr.precise_ip = 2; evt.evt_code ^= EXTRA_PEBS; } #endif attr.exclude_hv = evt.no_hv; attr.config = evt.evt_code; attr.sample_period = evt.count; attr.inherit = inherit ? 1 : 0; attr.enable_on_exec = enable_on_exec ? 1 : 0; attr.disabled = 1; attr.exclude_idle = 0; attr.exclude_kernel = evt.no_kernel; attr.read_format = PERF_FORMAT_ID; event_name = evt.name; fd = id = -1; evt_num = event_number; } operf_counter::~operf_counter() { } int operf_counter::perf_event_open(pid_t pid, int cpu, operf_record * rec, bool print_error) { struct { u64 count; u64 id; } read_data; if (evt_num == 0) { attr.mmap = 1; attr.comm = 1; } fd = op_perf_event_open(&attr, pid, cpu, -1, 0); if (fd < 0) { int ret = -1; cverb << vrecord << "perf_event_open failed: " << strerror(errno) << endl; if (errno == EBUSY) { if (print_error) { cerr << "The performance monitoring hardware reports EBUSY. Is another profiling tool in use?" << endl << "On some architectures, tools such as oprofile and perf being used in system-wide " << "mode can cause this problem." << endl; } ret = OP_PERF_HANDLED_ERROR; } else if (errno == ESRCH) { if (print_error) { cerr << "!!!! No samples collected !!!" << endl; cerr << "The target program/command ended before profiling was started." << endl; } ret = OP_PERF_HANDLED_ERROR; } else { if (print_error) cerr << "perf_event_open failed with " << strerror(errno) << endl; } return ret; } if (read(fd, &read_data, sizeof(read_data)) == -1) { perror("Error reading perf_event fd"); return -1; } rec->register_perf_event_id(evt_num, read_data.id, attr); cverb << vrecord << "perf_event_open returning fd " << fd << endl; return fd; } operf_record::~operf_record() { cverb << vrecord << "operf_record::~operf_record()" << endl; opHeader.data_size = total_bytes_recorded; // If recording to a file, we re-write the op_header info // in order to update the data_size field. if (total_bytes_recorded && write_to_file) write_op_header_info(); if (poll_data) delete[] poll_data; for (size_t i = 0; i < samples_array.size(); i++) { struct mmap_data *md = &samples_array[i]; munmap(md->base, (num_mmap_pages + 1) * pagesize); } samples_array.clear(); evts.clear(); perfCounters.clear(); /* Close output_fd last. If sample data was being written to a pipe, we want * to give the pipe reader (i.e., operf_read::convertPerfData) as much time * as possible in order to drain the pipe of any remaining data. */ close(output_fd); } operf_record::operf_record(int out_fd, bool sys_wide, pid_t the_pid, bool pid_running, vector & events, vmlinux_info_t vi, bool do_cg, bool separate_by_cpu, bool out_fd_is_file, int _convert_read_pipe, int _convert_write_pipe) { struct sigaction sa; sigset_t ss; vmlinux_file = vi.image_name; kernel_start = vi.start; kernel_end = vi.end; pid_to_profile = the_pid; pid_started = pid_running; system_wide = sys_wide; callgraph = do_cg; separate_cpu = separate_by_cpu; total_bytes_recorded = 0; poll_count = 0; evts = events; valid = false; poll_data = NULL; num_mmaps = 0; output_fd = out_fd; read_comm_pipe = _convert_read_pipe; write_comm_pipe = _convert_write_pipe; write_to_file = out_fd_is_file; opHeader.data_size = 0; num_cpus = -1; if (system_wide && (pid_to_profile != -1 || pid_started)) return; // object is not valid cverb << vrecord << "operf_record ctor using output fd " << output_fd << endl; memset(&sa, 0, sizeof(struct sigaction)); sa.sa_sigaction = op_perfrecord_sigusr1_handler; sigemptyset(&sa.sa_mask); sigemptyset(&ss); sigaddset(&ss, SIGUSR1); sigprocmask(SIG_UNBLOCK, &ss, NULL); sa.sa_mask = ss; sa.sa_flags = SA_NOCLDSTOP | SA_SIGINFO; cverb << vrecord << "calling sigaction" << endl; if (sigaction(SIGUSR1, &sa, NULL) == -1) { cverb << vrecord << "operf_record ctor: sigaction failed; errno is: " << strerror(errno) << endl; _exit(EXIT_FAILURE); } cverb << vrecord << "calling setup" << endl; setup(); } int operf_record::_write_header_to_file(void) { struct OP_file_header f_header; struct op_file_attr f_attr; int total = 0; if (lseek(output_fd, sizeof(f_header), SEEK_SET) == (off_t)-1) goto err_out; for (unsigned i = 0; i < evts.size(); i++) { opHeader.h_attrs[i].id_offset = lseek(output_fd, 0, SEEK_CUR); if (opHeader.h_attrs[i].id_offset == (off_t)-1) goto err_out; total += op_write_output(output_fd, &opHeader.h_attrs[i].ids[0], opHeader.h_attrs[i].ids.size() * sizeof(u64)); } opHeader.attr_offset = lseek(output_fd, 0, SEEK_CUR); if (opHeader.attr_offset == (off_t)-1) goto err_out; for (unsigned i = 0; i < evts.size(); i++) { struct op_header_evt_info attr = opHeader.h_attrs[i]; f_attr.attr = attr.attr; f_attr.ids.offset = attr.id_offset; f_attr.ids.size = attr.ids.size() * sizeof(u64); total += op_write_output(output_fd, &f_attr, sizeof(f_attr)); } opHeader.data_offset = lseek(output_fd, 0, SEEK_CUR); if (opHeader.data_offset == (off_t)-1) goto err_out; memcpy(&f_header.magic, __op_magic, sizeof(f_header.magic)); f_header.size = sizeof(f_header); f_header.attr_size = sizeof(f_attr); f_header.attrs.offset = opHeader.attr_offset; f_header.attrs.size = evts.size() * sizeof(f_attr); f_header.data.offset = opHeader.data_offset; f_header.data.size = opHeader.data_size; if (lseek(output_fd, 0, SEEK_SET) == (off_t)-1) goto err_out; total += op_write_output(output_fd, &f_header, sizeof(f_header)); if (lseek(output_fd, opHeader.data_offset + opHeader.data_size, SEEK_SET) == (off_t)-1) goto err_out; return total; err_out: string errmsg = "Internal error doing lseek: "; errmsg += strerror(errno); throw runtime_error(errmsg); } int operf_record::_write_header_to_pipe(void) { struct OP_file_header f_header; struct op_file_attr f_attr; int total; memcpy(&f_header.magic, __op_magic, sizeof(f_header.magic)); f_header.size = sizeof(f_header); f_header.attr_size = sizeof(f_attr); f_header.attrs.size = evts.size() * sizeof(f_attr); f_header.data.size = 0; total = op_write_output(output_fd, &f_header, sizeof(f_header)); for (unsigned i = 0; i < evts.size(); i++) { struct op_header_evt_info attr = opHeader.h_attrs[i]; f_attr.attr = attr.attr; f_attr.ids.size = attr.ids.size() * sizeof(u64); total += op_write_output(output_fd, &f_attr, sizeof(f_attr)); } for (unsigned i = 0; i < evts.size(); i++) { total += op_write_output(output_fd, &opHeader.h_attrs[i].ids[0], opHeader.h_attrs[i].ids.size() * sizeof(u64)); } return total; } void operf_record::register_perf_event_id(unsigned event, u64 id, perf_event_attr attr) { // It's overkill to blindly do this assignment below every time, since this function // is invoked once for each event for each cpu; but it's not worth the bother of trying // to avoid it. opHeader.h_attrs[event].attr = attr; ostringstream message; message << "Perf header: id = " << hex << (unsigned long long)id << " for event num " << event << ", code " << attr.config << endl; cverb << vrecord << message.str(); opHeader.h_attrs[event].ids.push_back(id); } void operf_record::write_op_header_info() { if (write_to_file) add_to_total(_write_header_to_file()); else add_to_total(_write_header_to_pipe()); } int operf_record::_prepare_to_record_one_fd(int idx, int fd) { struct mmap_data md; md.prev = 0; md.mask = num_mmap_pages * pagesize - 1; if (fcntl(fd, F_SETFL, O_NONBLOCK) < 0) { perror("fcntl failed"); return -1; } poll_data[idx].fd = fd; poll_data[idx].events = POLLIN; poll_count++; md.base = mmap(NULL, (num_mmap_pages + 1) * pagesize, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0); if (md.base == MAP_FAILED) { if (errno == EPERM) { cerr << "Failed to mmap kernel profile data." << endl; cerr << "This issue may be caused by a non-root user running multiple operf" << endl; cerr << "sessions simultaneously. Try running as root or increasing the value of" << endl; cerr << "/proc/sys/kernel/perf_event_mlock_kb to resolve the problem." << endl << endl; return OP_PERF_HANDLED_ERROR; } else { perror("failed to mmap"); } return -1; } samples_array.push_back(md); return 0; } int operf_record::prepareToRecord(void) { int op_ctr_idx = 0; int rc = 0; errno = 0; if (pid_started && (procs.size() > 1)) { /* Implies we're profiling a thread group, where we call perf_event_open * on each thread (process) in the group, passing cpu=-1. So we'll do * one mmap per thread (by way of the _prepare_to_record_one_fd function). * If more than one event has been specified to profile on, we just do an * ioctl PERF_EVENT_IOC_SET_OUTPUT to tie that perf_event fd with the fd * of the first event of the thread. */ // Sanity check if ((procs.size() * evts.size()) != perfCounters.size()) { cerr << "Internal error: Number of fds[] (" << perfCounters.size() << ") != number of processes x number of events (" << procs.size() << " x " << evts.size() << ")." << endl; return -1; } for (unsigned int proc_idx = 0; proc_idx < procs.size(); proc_idx++) { int fd_for_set_output = perfCounters[op_ctr_idx].get_fd(); for (unsigned event = 0; event < evts.size(); event++) { int fd = perfCounters[op_ctr_idx].get_fd(); if (event == 0) { rc = _prepare_to_record_one_fd(proc_idx, fd); } else { if ((rc = ioctl(fd, PERF_EVENT_IOC_SET_OUTPUT, fd_for_set_output)) < 0) perror("prepareToRecord: ioctl #1 failed"); } if (rc < 0) return rc; if ((rc = ioctl(fd, PERF_EVENT_IOC_ENABLE)) < 0) { perror("prepareToRecord: ioctl #2 failed"); return rc; } op_ctr_idx++; } } } else { /* We're either doing a system-wide profile or a profile of a single process. * We'll do one mmap per cpu. If more than one event has been specified * to profile on, we just do an ioctl PERF_EVENT_IOC_SET_OUTPUT to tie * that perf_event fd with the fd of the first event of the cpu. */ if ((num_cpus * evts.size()) != perfCounters.size()) { cerr << "Internal error: Number of fds[] (" << perfCounters.size() << ") != number of cpus x number of events (" << num_cpus << " x " << evts.size() << ")." << endl; return -1; } for (int cpu = 0; cpu < num_cpus; cpu++) { int fd_for_set_output = perfCounters[op_ctr_idx].get_fd(); for (unsigned event = 0; event < evts.size(); event++) { int fd = perfCounters[op_ctr_idx].get_fd(); if (event == 0) { rc = _prepare_to_record_one_fd(cpu, fd); } else { if ((rc = ioctl(fd, PERF_EVENT_IOC_SET_OUTPUT, fd_for_set_output)) < 0) perror("prepareToRecord: ioctl #3 failed"); } if (rc < 0) return rc; if ((rc = ioctl(fd, PERF_EVENT_IOC_ENABLE)) < 0) { perror("prepareToRecord: ioctl #4 failed"); return rc; } op_ctr_idx++; } } } return rc; } void operf_record::setup() { bool all_cpus_avail = true; int rc = 0; struct dirent *entry = NULL; DIR *dir = NULL; string err_msg; char cpus_online[257]; bool profile_process_group = false; if (system_wide) cverb << vrecord << "operf_record::setup() for system-wide profiling" << endl; else cverb << vrecord << "operf_record::setup() with pid_started = " << pid_started << endl; if (pid_started || system_wide) { if ((rc = op_get_process_info(system_wide, pid_to_profile, this)) < 0) { if (rc == OP_PERF_HANDLED_ERROR) return; else throw runtime_error("Unexpected error in operf_record setup"); } // 'pid_started && (procs.size() > 1)' implies the process that the user // has requested us to profile has cloned one or more children. profile_process_group = pid_started && (procs.size() > 1); } pagesize = sysconf(_SC_PAGE_SIZE); // If profiling a process group, use a smaller mmap length to avoid EINVAL. num_mmap_pages = profile_process_group ? 1 : (512 * 1024)/pagesize; /* To set up to profile an existing thread group, we need call perf_event_open * for each thread, and we need to pass cpu=-1 on the syscall. */ use_cpu_minus_one = use_cpu_minus_one ? true : profile_process_group; num_cpus = use_cpu_minus_one ? 1 : sysconf(_SC_NPROCESSORS_ONLN); if (num_cpus < 1) { char int_str[256]; sprintf(int_str, "Number of online CPUs is %d; cannot continue", num_cpus); throw runtime_error(int_str); } cverb << vrecord << "calling perf_event_open for pid " << pid_to_profile << " on " << num_cpus << " cpus" << endl; FILE * online_cpus = fopen("/sys/devices/system/cpu/online", "r"); if (!online_cpus) { err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto error; } memset(cpus_online, 0, sizeof(cpus_online)); if (fgets(cpus_online, sizeof(cpus_online), online_cpus) == NULL) { fclose(online_cpus); err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto error; } if (index(cpus_online, ',') || cpus_online[0] != '0') { all_cpus_avail = false; if ((dir = opendir("/sys/devices/system/cpu")) == NULL) { fclose(online_cpus); err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto error; } } fclose(online_cpus); for (int cpu = 0; cpu < num_cpus; cpu++) { int real_cpu; if (use_cpu_minus_one) { real_cpu = -1; } else if (all_cpus_avail) { real_cpu = cpu; } else { real_cpu = op_pe_utils::op_get_next_online_cpu(dir, entry); if (real_cpu < 0) { err_msg = "Internal Error: Number of online cpus cannot be determined."; rc = -1; goto error; } } size_t num_procs = profile_process_group ? procs.size() : 1; /* To profile a parent and its children, the perf_events kernel subsystem * requires us to use cpu=-1 on the perf_event_open call for each of the * processes in the group. But perf_events also prevents us from specifying * "inherit" on the perf_event_attr we pass to perf_event_open when cpu is '-1'. */ bool inherit = !profile_process_group; std::map::iterator proc_it = procs.begin(); for (unsigned proc_idx = 0; proc_idx < num_procs; proc_idx++) { for (unsigned event = 0; event < evts.size(); event++) { /* For a parent process, comm.tid==comm.pid, but for child * processes in a process group, comm.pid is the parent, so * we must use comm.tid for the perf_event_open call. So * we can use comm.tid for all cases. */ pid_t pid_for_open; if (profile_process_group) pid_for_open = proc_it++->second.tid; else pid_for_open = pid_to_profile; operf_counter op_ctr(operf_counter(evts[event], (!pid_started && !system_wide), callgraph, separate_cpu, inherit, event)); if ((rc = op_ctr.perf_event_open(pid_for_open, real_cpu, this, true)) < 0) { err_msg = "Internal Error. Perf event setup failed."; goto error; } perfCounters.push_back(op_ctr); } } } if (pid_started && (procs.size() > 1)) num_mmaps = procs.size(); else num_mmaps = num_cpus; poll_data = new struct pollfd [num_mmaps]; if ((rc = prepareToRecord()) < 0) { err_msg = "Internal Error. Perf event setup failed."; goto error; } write_op_header_info(); // Set bit to indicate we're set to go. valid = true; if (dir) closedir(dir); return; error: delete[] poll_data; poll_data = NULL; for (size_t i = 0; i < samples_array.size(); i++) { struct mmap_data *md = &samples_array[i]; munmap(md->base, (num_mmap_pages + 1) * pagesize); } samples_array.clear(); if (dir) closedir(dir); close(output_fd); if (rc != OP_PERF_HANDLED_ERROR) throw runtime_error(err_msg); } void operf_record::record_process_info(void) { map pids_mapped; pid_t last_tgid = -1; std::map::iterator proc_it = procs.begin(); for (unsigned int proc_idx = 0; proc_idx < procs.size(); proc_idx++, proc_it++) { struct comm_event ce = proc_it->second; int num = OP_perf_utils::op_write_output(output_fd, &ce, ce.header.size); add_to_total(num); if (cverb << vrecord) cout << "Created COMM event for " << ce.comm << endl; if (((pid_t)(ce.pid) == last_tgid) || (pids_mapped.find(ce.pid) != pids_mapped.end())) continue; OP_perf_utils::op_record_process_exec_mmaps(ce.tid, ce.pid, output_fd, this); pids_mapped[ce.pid] = last_tgid = ce.pid; } } int operf_record::_start_recoding_new_thread(pid_t id) { string err_msg; int rc, fd_for_set_output = -1; struct comm_event ce; u64 sample_id; struct pollfd * old_polldata = poll_data; num_mmaps++; poll_data = new struct pollfd [num_mmaps]; // Copy only the existing pollfd objects from the array. The new pollfd will // be filled in via the call to _prepare_to_record_one_fd. for (int i = 0; i < num_mmaps - 1; i++) poll_data[i] = old_polldata[i]; delete[] old_polldata; // Make a pseudo comm_event object. At this point, the // only field we need to set is tid. memset(&ce, 0, sizeof(ce)); ce.tid = id; add_process(ce); for (unsigned event = 0; event < evts.size(); event++) { operf_counter op_ctr(operf_counter(evts[event], (!pid_started && !system_wide), callgraph, separate_cpu, false, event)); if (op_ctr.perf_event_open(id, -1, this, false) < 0) { sample_id = OP_PERF_NO_SAMPLE_ID; // Send special value to convert process to indicate failure ssize_t len = write(write_comm_pipe, &sample_id, sizeof(sample_id)); if (len < 0) perror("Internal error on convert write_comm_pipe"); return -1; } perfCounters.push_back(op_ctr); int fd = op_ctr.get_fd(); if (event == 0) { rc = _prepare_to_record_one_fd(num_mmaps - 1, fd); fd_for_set_output = fd; } else { if ((rc = ioctl(fd, PERF_EVENT_IOC_SET_OUTPUT, fd_for_set_output)) < 0) perror("_start_recoding_new_thread: ioctl #1 failed"); } if (rc < 0) return rc; if ((rc = ioctl(fd, PERF_EVENT_IOC_ENABLE)) < 0) { perror("_start_recoding_new_thread: ioctl #2 failed"); return rc; } sample_id = opHeader.h_attrs[event].ids.back(); ssize_t len = write(write_comm_pipe, &sample_id, sizeof(sample_id)); if (len < 0) perror("Internal error on convert write_comm_pipe"); else if (len != sizeof(sample_id)) cerr << "Incomplete write convert to write_comm_pipe" << endl; else cverb << vrecord << "Sent sample_id " << sample_id << " to convert process" << endl; } return 0; } void operf_record::recordPerfData(void) { bool disabled = false; if (pid_started || system_wide) record_process_info(); else op_get_vsyscall_mapping(pid_to_profile, output_fd, this); op_record_kernel_info(vmlinux_file, kernel_start, kernel_end, output_fd, this); cerr << "operf: Profiler started" << endl; while (1) { int prev = sample_reads; pid_t pi; ssize_t len; for (size_t i = 0; i < samples_array.size(); i++) { if (samples_array[i].base) op_get_kernel_event_data(&samples_array[i], this); } if (quit && disabled) break; if (prev == sample_reads) { (void)poll(poll_data, poll_count, -1); } if (!quit && track_new_forks && procs.size() > 1) { len = read(read_comm_pipe, &pi, sizeof(pi)); if (len < 0 && errno != EAGAIN) { cverb << vrecord << "Non-fatal error: read_comm_pipe returned too few bytes" << endl; } else if (len == sizeof(pi) && (procs.find(pi) == procs.end())) { // Start profiling this new thread cverb << vrecord << "Start recording for new thread " << pi << endl; // Don't treat as fatal error if it doesn't work if (_start_recoding_new_thread(pi) < 0) cerr << "Unable to collect samples for forked process " << pi << ". Process may have ended before recording could be started." << endl; } } if (quit) { for (unsigned int i = 0; i < perfCounters.size(); i++) ioctl(perfCounters[i].get_fd(), PERF_EVENT_IOC_DISABLE); disabled = true; cverb << vrecord << "operf_record::recordPerfData received signal to quit." << endl; } } cverb << vdebug << "operf recording finished." << endl; } void operf_read::init(int sample_data_pipe_fd, string input_filename, string samples_loc, op_cpu cputype, bool systemwide, int _record_write_pipe, int _record_read_pipe, int _post_profiling_pipe) { sample_data_fd = sample_data_pipe_fd; read_comm_pipe = _record_read_pipe; write_comm_pipe = _record_write_pipe; post_profiling_pipe = _post_profiling_pipe; inputFname = input_filename; sampledir = samples_loc; cpu_type = cputype; syswide = systemwide; } operf_read::~operf_read() { evts.clear(); } void operf_read::add_sample_id_to_opHeader(u64 sample_id) { for (unsigned int i = 0; i < evts.size(); i++) opHeader.h_attrs[i].ids.push_back(sample_id); } int operf_read::_read_header_info_with_ifstream(void) { struct OP_file_header fheader; int num_fattrs, ret = 0; size_t fattr_size; istrm.seekg(0, ios_base::beg); if (op_read_from_stream(istrm, (char *)&fheader, sizeof(fheader)) != sizeof(fheader)) { cerr << "Error: input file " << inputFname << " does not have enough data for header" << endl; ret = OP_PERF_HANDLED_ERROR; goto out; } if (memcmp(&fheader.magic, __op_magic, sizeof(fheader.magic))) { cerr << "Error: input file " << inputFname << " does not have expected header data" << endl; ret = OP_PERF_HANDLED_ERROR; goto out; } cverb << vconvert << "operf magic number " << (char *)&fheader.magic << " matches expected __op_magic " << __op_magic << endl; opHeader.attr_offset = fheader.attrs.offset; opHeader.data_offset = fheader.data.offset; opHeader.data_size = fheader.data.size; fattr_size = sizeof(struct op_file_attr); if (fattr_size != fheader.attr_size) { cerr << "Error: perf_events binary incompatibility. Event data collection was apparently " << endl << "performed under a different kernel version than current." << endl; ret = OP_PERF_HANDLED_ERROR; goto out; } num_fattrs = fheader.attrs.size/fheader.attr_size; cverb << vconvert << "num_fattrs is " << num_fattrs << endl; istrm.seekg(opHeader.attr_offset, ios_base::beg); for (int i = 0; i < num_fattrs; i++) { struct op_file_attr f_attr; streamsize fattr_size = sizeof(f_attr); if (op_read_from_stream(istrm, (char *)&f_attr, fattr_size) != fattr_size) { cerr << "Error: Unexpected end of input file " << inputFname << "." << endl; ret = OP_PERF_HANDLED_ERROR; goto out; } opHeader.h_attrs[i].attr = f_attr.attr; streampos next_f_attr = istrm.tellg(); int num_ids = f_attr.ids.size/sizeof(u64); istrm.seekg(f_attr.ids.offset, ios_base::beg); for (int id = 0; id < num_ids; id++) { u64 perf_id; streamsize perfid_size = sizeof(perf_id); if (op_read_from_stream(istrm, (char *)& perf_id, perfid_size) != perfid_size) { cerr << "Error: Unexpected end of input file " << inputFname << "." << endl; ret = OP_PERF_HANDLED_ERROR; goto out; } ostringstream message; message << "Perf header: id = " << hex << (unsigned long long)perf_id << endl; cverb << vconvert << message.str(); opHeader.h_attrs[i].ids.push_back(perf_id); } istrm.seekg(next_f_attr, ios_base::beg); } out: istrm.close(); return ret; } int operf_read::_read_perf_header_from_file(void) { int ret = 0; opHeader.data_size = 0; istrm.open(inputFname.c_str(), ios_base::in); if (!istrm.good()) { valid = false; cerr << "Input stream bad for " << inputFname << endl; ret = OP_PERF_HANDLED_ERROR; goto out; } istrm.peek(); if (istrm.eof()) { cverb << vconvert << "operf_read::readPerfHeader: Empty profile data file." << endl; valid = false; ret = OP_PERF_HANDLED_ERROR; goto out; } cverb << vconvert << "operf_read: successfully opened input file " << inputFname << endl; if ((ret = _read_header_info_with_ifstream()) == 0) { valid = true; cverb << vconvert << "Successfully read perf header" << endl; } else { valid = false; } out: return ret; } int operf_read::_read_perf_header_from_pipe(void) { struct OP_file_header fheader; string errmsg; int num_fattrs; size_t fattr_size; vector f_attr_cache; errno = 0; if (read(sample_data_fd, &fheader, sizeof(fheader)) != sizeof(fheader)) { errmsg = "Error reading header on sample data pipe: " + string(strerror(errno)); goto fail; } if (memcmp(&fheader.magic, __op_magic, sizeof(fheader.magic))) { errmsg = "Error: operf sample data does not have expected header data"; goto fail; } cverb << vconvert << "operf magic number " << (char *)&fheader.magic << " matches expected __op_magic " << __op_magic << endl; fattr_size = sizeof(struct op_file_attr); if (fattr_size != fheader.attr_size) { errmsg = "Error: perf_events binary incompatibility. Event data collection was apparently " "performed under a different kernel version than current."; goto fail; } num_fattrs = fheader.attrs.size/fheader.attr_size; cverb << vconvert << "num_fattrs is " << num_fattrs << endl; for (int i = 0; i < num_fattrs; i++) { struct op_file_attr f_attr; streamsize fattr_size = sizeof(f_attr); if (read(sample_data_fd, (char *)&f_attr, fattr_size) != fattr_size) { errmsg = "Error reading file attr on sample data pipe: " + string(strerror(errno)); goto fail; } opHeader.h_attrs[i].attr = f_attr.attr; f_attr_cache.push_back(f_attr); } for (int i = 0; i < num_fattrs; i++) { vector::iterator it = f_attr_cache.begin(); struct op_file_attr f_attr = *(it); int num_ids = f_attr.ids.size/sizeof(u64); for (int id = 0; id < num_ids; id++) { u64 perf_id; streamsize perfid_size = sizeof(perf_id); if (read(sample_data_fd, (char *)& perf_id, perfid_size) != perfid_size) { errmsg = "Error reading perf ID on sample data pipe: " + string(strerror(errno)); goto fail; } ostringstream message; message << "Perf header: id = " << hex << (unsigned long long)perf_id << endl; cverb << vconvert << message.str(); opHeader.h_attrs[i].ids.push_back(perf_id); } } valid = true; cverb << vconvert << "Successfully read perf header" << endl; return 0; fail: cerr << errmsg; return OP_PERF_HANDLED_ERROR; } int operf_read::readPerfHeader(void) { if (!inputFname.empty()) return _read_perf_header_from_file(); else return _read_perf_header_from_pipe(); } int operf_read::get_eventnum_by_perf_event_id(u64 id) const { for (unsigned i = 0; i < evts.size(); i++) { struct op_header_evt_info attr = opHeader.h_attrs[i]; for (unsigned j = 0; j < attr.ids.size(); j++) { if (attr.ids[j] == id) return i; } } return -1; } unsigned int operf_read::convertPerfData(void) { unsigned int num_bytes = 0; struct mmap_info info; bool error = false; event_t * event = NULL; if (fcntl(post_profiling_pipe, F_SETFL, O_NONBLOCK) < 0) { cerr << "Error: fcntl failed with errno:\n\t" << strerror(errno) << endl; throw runtime_error("Error: Unable to set post_profiling_pipe to non blocking"); } if (!inputFname.empty()) { info.file_data_offset = opHeader.data_offset; info.file_data_size = opHeader.data_size; cverb << vdebug << "Expecting to read approximately " << dec << info.file_data_size - info.file_data_offset << " bytes from operf sample data file." << endl; info.traceFD = open(inputFname.c_str(), O_RDONLY); if (info.traceFD == -1) { cerr << "Error: open failed with errno:\n\t" << strerror(errno) << endl; throw runtime_error("Error: Unable to open operf data file"); } cverb << vdebug << "operf_read opened " << inputFname << endl; pg_sz = sysconf(_SC_PAGESIZE); if (op_mmap_trace_file(info, true) < 0) { close(info.traceFD); throw runtime_error("Error: Unable to mmap operf data file"); } } else { // Allocate way more than enough space for a really big event with a long callchain event = (event_t *)xmalloc(65536); memset(event, '\0', 65536); } for (int i = 0; i < OPERF_MAX_STATS; i++) operf_stats[i] = 0; ostringstream message; message << "Converting operf data to oprofile sample data format" << endl; message << "sample type is " << hex << opHeader.h_attrs[0].attr.sample_type << endl; cverb << vdebug << message.str(); first_time_processing = true; int num_recs = 0; struct perf_event_header last_header; bool print_progress = !inputFname.empty() && syswide; bool printed_progress_msg = false; while (1) { streamsize rec_size = 0; if (!inputFname.empty()) { event = _get_perf_event_from_file(info); if (event == NULL) break; } else { if (_get_perf_event_from_pipe(event, sample_data_fd) < 0) break; } rec_size = event->header.size; if ((!is_header_valid(event->header)) || ((op_write_event(event, opHeader.h_attrs[0].attr.sample_type)) < 0)) { error = true; last_header = event->header; break; } num_bytes += rec_size; num_recs++; if ((num_recs % 1000000 == 0) && (print_progress || _print_pp_progress(post_profiling_pipe))) { if (!printed_progress_msg) { cerr << "\nConverting profile data to OProfile format " << endl; printed_progress_msg = true; } cerr << "."; } } if (unlikely(error)) { if (!inputFname.empty()) { cerr << "ERROR: operf_read::convertPerfData quitting. Bad data read from file." << endl; } else { cerr << "ERROR: operf_read::convertPerfData quitting. Bad data read from pipe." << endl; cerr << "Closing read end of data pipe. operf-record process will stop with SIGPIPE (13)." << endl; } cerr << "Try lowering the sample frequency to avoid this error; e.g., double the 'count'" << endl << "value in your event specification." << endl; cverb << vdebug << "Event header type: " << last_header.type << "; size: " << last_header.size << endl; } first_time_processing = false; if (!error) op_reprocess_unresolved_events(opHeader.h_attrs[0].attr.sample_type, print_progress); if (printed_progress_msg) cerr << endl; op_release_resources(); operf_print_stats(operf_options::session_dir, start_time_human_readable, throttled, evts); char * cbuf; cbuf = (char *)xmalloc(operf_options::session_dir.length() + 5); strcpy(cbuf, operf_options::session_dir.c_str()); strcat(cbuf, "/abi"); op_write_abi_to_file(cbuf); free(cbuf); if (!inputFname.empty()) close(info.traceFD); else free(event); return num_bytes; } oprofile-1.3.0/libperf_events/operf_utils.cpp0000664000175000017500000013056713323165335016343 00000000000000/** * @file operf_utils.cpp * Helper methods for perf_events-based OProfile. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 7, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 * * Modified by Maynard Johnson * (C) Copyright IBM Corporation 2012, 2013, 2014 * */ #include #include #include #include #include #include #include #include #include #include "operf_counter.h" #include "operf_utils.h" #ifdef HAVE_LIBPFM #include #endif #include "op_types.h" #include "operf_process_info.h" #include "file_manip.h" #include "operf_kernel.h" #include "operf_sfile.h" #include "op_fileio.h" #include "op_libiberty.h" #include "operf_stats.h" #include "utility.h" extern volatile bool quit; extern operf_read operfRead; extern int sample_reads; extern unsigned int pagesize; extern char * app_name; extern pid_t app_PID; extern verbose vrecord; extern verbose vconvert; extern void __set_event_throttled(int index); extern bool track_new_forks; using namespace std; map process_map; multimap all_images_map; map kernel_modules; struct operf_mmap * kernel_mmap; bool first_time_processing; bool throttled; size_t mmap_size; size_t pg_sz; static list unresolved_events; static struct operf_transient trans; static bool sfile_init_done; static inline void update_trans_last(struct operf_transient * trans) { trans->last = trans->current; trans->last_pc = trans->pc; } static inline void clear_trans(struct operf_transient * trans) { /* ~0U (-1) could be used by the kernel perf samples * for the TID/PID of exiting processes. To avoid * confusing the oprofile logic use ~1U as the * initialization value for tgid field to avoid * possibly matching the TID/PID values for exiting * processes. */ trans->tgid = ~1U; trans->cur_procinfo = NULL; } static void __handle_fork_event(event_t * event) { if (cverb << vconvert) cout << "PERF_RECORD_FORK for tgid/tid = " << event->fork.pid << "/" << event->fork.tid << "; parent " << event->fork.ppid << "/" << event->fork.ptid << endl; map::iterator it; operf_process_info * parent = NULL; operf_process_info * forked_proc = NULL; // First, see if we already have a proc_info object for the parent process // that did the fork it = process_map.find(event->fork.ppid); if (it != process_map.end()) { parent = it->second; } else { // Create a new proc info object for the parent, but mark it invalid since we have // not yet received a COMM event for this PID. parent = new operf_process_info(event->fork.ppid, app_name ? app_name : NULL, app_name != NULL, false); if (cverb << vconvert) cout << "Adding new proc info to collection for parent PID " << event->fork.ppid << endl; process_map[event->fork.ppid] = parent; } /* If the user requested to profile by "--pid", then we must notify the * recording process whenever we see a fork event. If the record process * isn't already recording samples for this thread/process, it will start * recording now. */ if (track_new_forks) { if (cverb << vconvert) cout << "Inform record process of new pid/tid " << event->fork.pid << "/" << event->fork.tid << endl; pid_t id = (event->fork.pid == event->fork.ppid) ? event->fork.tid : event->fork.pid; ssize_t len = write(operfRead.get_write_comm_pipe(), &id, sizeof(id)); if (len < 0) perror("Internal error on record write_comm_pipe"); else if (len != sizeof(id)) cerr << "Incomplete write to record write_comm_pipe" << endl; u64 sample_id; // get sample id from recording process len = read(operfRead.get_read_comm_pipe(), &sample_id, sizeof(sample_id)); if (sample_id == OP_PERF_NO_SAMPLE_ID) { cverb << vconvert << "convert: No sample_id from record process" << endl; } else { cverb << vconvert << "Add sample_id " << sample_id << " to opHeader" << endl; operfRead.add_sample_id_to_opHeader(sample_id); } } /* If the forked process's pid is the same as the parent's, we simply ignore * the FORK event. This is because operf_process_info objects are stored in the map * collection by pid, meaning that the forked process and its parent reference the same * operf_process_info object. */ if (event->fork.pid == event->fork.ppid) return; // Now try to find a proc_info for the forked process itself. it = process_map.find(event->fork.pid); if (it == process_map.end()) { forked_proc = new operf_process_info(event->fork.pid, NULL, false, false); if (cverb << vconvert) cout << "Adding new proc info to collection for forked PID " << event->fork.pid << endl; process_map[event->fork.pid] = forked_proc; forked_proc->set_fork_info(parent); } else { /* * Normally, if parent process A forks child process B which then does an exec, we * first see a FORK event, followed by a COMM event. In this case, the * operf_process_info created for the forked process is marked as valid. But there's * no guarantee what order these events may be seen by userspace -- we could easily * get MMAP, FORK, and finally a COMM event, which is opposite of "expected". So we * must handle this. * * For a valid operf_process_info, if the forked process pid is unique from that of * the parent, it implies a COMM event was already received for this forked process. * Such processes are treated as standalone processes, so we ignore the FORK event. * For all other cases, if the forked process has not already been associated with * its parent (i.e., !is_forked()), we go ahead and set that association. */ forked_proc = it->second; if (forked_proc->is_valid()) { // Ignore the FORK event if (cverb << vconvert) cout << "Forked proc " << event->fork.pid << " is currently valid (i.e., PERF_RECORD_COMM already received)," << " so is independent from parent " << event->fork.ppid << endl; return; } if (!forked_proc->is_forked()) { forked_proc->set_fork_info(parent); if (cverb << vconvert) cout << "Set fork info for PID " << event->fork.pid << " with parent " << event->fork.ppid << endl; } } } static void __handle_comm_event(event_t * event) { if (cverb << vconvert) cout << "PERF_RECORD_COMM for " << event->comm.comm << ", tgid/tid = " << event->comm.pid << "/" << event->comm.tid << endl; map::iterator it; it = process_map.find(event->comm.pid); if (it == process_map.end()) { /* A COMM event can occur as the result of the app doing a fork/exec, * where the COMM event is for the forked process. In that case, we * pass the event->comm field as the appname argument to the ctor. */ const char * appname_arg; bool is_complete_appname; if (app_name && (app_PID == (pid_t) event->comm.pid)) { appname_arg = app_name; is_complete_appname = true; } else { appname_arg = event->comm.comm; is_complete_appname = false; } /* If tid != pid, this may be a forked process for which we've not yet received * the PERF_RECORD_FORK event, nor have we received any other events for the * process (e.g., COMM event for parent). We mark such proc infos as "invalid" so we * don't falsely attribute samples to a child thread which should, instead, * be attributed to its parent. If this is indeed a forked process, we should * eventually receive a COMM event for the parent (where tid==pid), at which time, * we'll mark the proc info valid. If we never receive a COMM event for a parent, * the proc info will get marked valid during reprocessing so we can attribute * deferred samples at that time. */ bool valid_bit = (event->comm.pid == event->comm.tid); operf_process_info * proc = new operf_process_info(event->comm.pid, appname_arg, is_complete_appname, valid_bit); if (cverb << vconvert) cout << "Adding new proc info to collection for PID " << event->comm.pid << endl; process_map[event->comm.pid] = proc; } else { /* If we reach this point, it means a proc info object for this pid already exists; * however, if it was created by something other than a "valid" COMM event (e.g., MMAP event), * its 'valid' bit will be set to false. NOTE: A "valid" COMM event is one in which * tid==pid. * * We must handle the following situations: * o If valid: * - Existing proc info created for a parent (i.e., tid == pid), and the current * COMM event is for a child -- and we ignore all child COMM events. * - Existing proc info may have invalid appname, so we call set_appname() * and see if this COMM event has an appropriate appname. * * o If not valid: * - Existing proc info was created for the parent by an MMAP type of event, and the * current COMM event is for the parent. * - Existing proc info was created by FORK; now that we have a COMM event for it, * the process should be treated as a standalone process, so we call * try_disassociate_from_parent(). */ if (!it->second->is_valid()) { // Ignore child COMM events (i.e., pid != tid). if (event->comm.pid == event->comm.tid) { if (it->second->is_forked()) { it->second->try_disassociate_from_parent(event->comm.comm); } else { // Existing proc info created by MMAP event or some such it->second->set_valid(); it->second->set_appname(event->comm.comm, false); } } } else { if ((event->comm.pid == event->comm.tid) && !it->second->is_appname_valid()) { it->second->set_appname(event->comm.comm, false); } } } } static void __handle_mmap_event(event_t * event) { static bool kptr_restrict_warning_displayed_already = false; string image_basename = op_basename(event->mmap.filename); struct operf_mmap * mapping = NULL; multimap::iterator it; pair::iterator, multimap::iterator> range; range = all_images_map.equal_range(image_basename); for (it = range.first; it != range.second; it++) { if (((strcmp((*it).second->filename, image_basename.c_str())) == 0) && ((*it).second->pid == 0 || (*it).second->pid == event->mmap.pid) && ((*it).second->start_addr <= event->mmap.start && ((*it).second->end_addr >= event->mmap.start + event->mmap.len))) { mapping = (*it).second; break; } } if (!mapping) { mapping = new struct operf_mmap; memset(mapping, 0, sizeof(struct operf_mmap)); mapping->start_addr = event->mmap.start; strcpy(mapping->filename, event->mmap.filename); /* Mappings starting with "/" are for either a file or shared memory object. * From the kernel's perf_events subsystem, anon maps have labels like: * [heap], [stack], [vdso], //anon */ if (mapping->filename[0] == '[') { mapping->is_anon_mapping = true; mapping->pid = event->mmap.pid; } else if ((strncmp(mapping->filename, "//anon", strlen("//anon")) == 0)) { mapping->is_anon_mapping = true; mapping->pid = event->mmap.pid; strcpy(mapping->filename, "anon"); } else if ((strncmp(mapping->filename, "/anon_hugepage", strlen("/anon_hugepage")) == 0)) { mapping->pid = event->mmap.pid; mapping->is_anon_mapping = true; strcpy(mapping->filename, "anon"); } mapping->end_addr = (event->mmap.len == 0ULL)? 0ULL : mapping->start_addr + event->mmap.len - 1; mapping->pgoff = event->mmap.pgoff; if (cverb << vconvert) { cout << "PERF_RECORD_MMAP for process " << hex << event->mmap.pid << "/" << event->mmap.tid << ": " << event->mmap.filename << endl; cout << "\tstart_addr: " << hex << mapping->start_addr << "; end addr: " << mapping->end_addr << endl; } if (event->header.misc & PERF_RECORD_MISC_USER) all_images_map.insert(pair(image_basename, mapping)); } if (event->header.misc & PERF_RECORD_MISC_KERNEL) { if (!strncmp(mapping->filename, operf_get_vmlinux_name(), strlen(mapping->filename))) { /* The kernel_mmap is just a convenience variable * for use when mapping samples to kernel space, since * most of the kernel samples will be attributable to * the vmlinux file versus kernel modules. */ kernel_mmap = mapping; } else { if ((kptr_restrict == 1) && !no_vmlinux && (my_uid != 0)) { if (!kptr_restrict_warning_displayed_already) { kptr_restrict_warning_displayed_already = true; cerr << endl << "< < < WARNING > > >" << endl; cerr << "Samples for vmlinux kernel will be recorded, but kernel module profiling" << endl << "is not possible with current system config." << endl; cerr << "Set /proc/sys/kernel/kptr_restrict to 0 to see samples for kernel modules." << endl << "< < < < < > > > > >" << endl << endl; } } else { operf_create_module(mapping->filename, mapping->start_addr, mapping->end_addr); kernel_modules[mapping->start_addr] = mapping; } } } else { map::iterator it; it = process_map.find(event->mmap.pid); if (it == process_map.end()) { /* Create a new proc info object, but mark it invalid since we have * not yet received a COMM event for this PID. This MMAP event may * be on behalf of a process created as a result of a fork/exec. * The order of delivery of events is not guaranteed so we may see * this MMAP event before getting the COMM event for that process. * If this is the case here, we just pass NULL for appname arg. * It will get fixed up later when the COMM event occurs. */ const char * appname_arg; bool is_complete_appname; if (app_name && (app_PID == (pid_t)event->mmap.pid)) { appname_arg = app_name; is_complete_appname = true; } else { appname_arg = NULL; is_complete_appname = false; } operf_process_info * proc = new operf_process_info(event->mmap.pid, appname_arg, is_complete_appname, false); process_map[event->mmap.pid] = proc; proc->process_mapping(mapping, false); } else { it->second->process_mapping(mapping, false); } if (cverb << vconvert) cout << "Process mapping for " << event->mmap.filename << " on behalf of " << event->mmap.pid << endl; } } static struct operf_transient * __get_operf_trans(struct sample_data * data, bool hypervisor_domain, bool kernel_mode) { operf_process_info * proc = NULL; const struct operf_mmap * op_mmap = NULL; struct operf_transient * retval = NULL; if (trans.tgid == data->pid) { proc = trans.cur_procinfo; if (cverb << vconvert) cout << "trans.tgid == data->pid : " << data->pid << endl; } else { // Find operf_process info for data.tgid. std::map::const_iterator it = process_map.find(data->pid); if (it != process_map.end() && it->second->is_appname_valid()) { proc = it->second; } else { // This can validly happen if get a sample before getting a COMM event for the process if ((cverb << vconvert) && !first_time_processing) { cout << "Dropping sample -- process info unavailable for PID " << data->pid << endl; if (kernel_mode) operf_stats[OPERF_NO_APP_KERNEL_SAMPLE]++; else operf_stats[OPERF_NO_APP_USER_SAMPLE]++; } goto out; } } // Now find mmapping that contains the data.ip address. // Use that mmapping to set fields in trans. if (kernel_mode) { if (data->ip >= kernel_mmap->start_addr && data->ip <= kernel_mmap->end_addr) { op_mmap = kernel_mmap; } else { map::iterator it; it = kernel_modules.begin(); while (it != kernel_modules.end()) { if (data->ip >= it->second->start_addr && data->ip <= it->second->end_addr) { op_mmap = it->second; break; } it++; } } if (!op_mmap) { if ((kernel_mmap->start_addr == 0ULL) && (kernel_mmap->end_addr == 0ULL)) op_mmap = kernel_mmap; } if (!op_mmap) { /* This can happen if a kernel module is loaded after profiling * starts, and then we get samples for that kernel module. * TODO: Fix this. */ } } else { op_mmap = proc->find_mapping_for_sample(data->ip, hypervisor_domain); if (op_mmap && op_mmap->is_hypervisor && !hypervisor_domain) { cverb << vconvert << "Invalid sample: Address falls within hypervisor address range, but is not a hypervisor domain sample." << endl; operf_stats[OPERF_INVALID_CTX]++; op_mmap = NULL; } } if (op_mmap) { if (cverb << vconvert) cout << "Found mmap for sample; image_name is " << op_mmap->filename << " and app name is " << proc->get_app_name() << endl; trans.image_name = op_mmap->filename; trans.app_len = proc->get_app_name().size(); strncpy(trans.app_filename, proc->get_app_name().c_str(), trans.app_len); trans.app_filename[trans.app_len] = '\0'; trans.image_len = strlen(trans.image_name); trans.start_addr = op_mmap->start_addr; trans.end_addr = op_mmap->end_addr; trans.tgid = data->pid; trans.tid = data->tid; trans.cur_procinfo = proc; trans.cpu = data->cpu; trans.is_anon = op_mmap->is_anon_mapping; trans.in_kernel = kernel_mode; if (trans.in_kernel || trans.is_anon) trans.pc = data->ip; else trans.pc = data->ip - trans.start_addr; trans.sample_id = data->id; retval = &trans; } else { if (!first_time_processing) { if (cverb << vconvert) { string domain = trans.in_kernel ? "kernel" : "userspace"; ostringstream message; message << "Discarding " << domain << " sample for process " << data->pid << " where no appropriate mapping was found. (pc=0x" << hex << data->ip <<")" << endl; cout << message.str(); } operf_stats[OPERF_LOST_NO_MAPPING]++; } retval = NULL; } out: return retval; } static void __handle_callchain(u64 * array, struct sample_data * data) { bool in_kernel = false; u64 sampled_addr = data->ip; data->callchain = (struct ip_callchain *) array; if (data->callchain->nr) { if (cverb << vconvert) cout << "Processing callchain" << endl; for (u64 i = 0; i < data->callchain->nr; i++) { data->ip = data->callchain->ips[i]; if (data->ip >= PERF_CONTEXT_MAX) { switch (data->ip) { case PERF_CONTEXT_HV: // hypervisor samples are not supported for callgraph // TODO: log lost callgraph arc break; case PERF_CONTEXT_KERNEL: in_kernel = true; break; case PERF_CONTEXT_USER: in_kernel = false; break; default: break; } if (i == 0 && (data->callchain->ips[i+1]==sampled_addr)) i++; continue; } if (data->ip && __get_operf_trans(data, false, in_kernel)) { if ((trans.current = operf_sfile_find(&trans))) { operf_sfile_log_arc(&trans); update_trans_last(&trans); } } else { if (data->ip && !first_time_processing) operf_stats[OPERF_BT_LOST_NO_MAPPING]++; } } } } #if PPC64_ARCH static void __map_hypervisor_sample(u64 ip, u32 pid) { operf_process_info * proc; map::iterator it; it = process_map.find(pid); if (it == process_map.end()) { /* Create a new proc info object, but mark it invalid since we have * not yet received a COMM event for this PID. This sample may be * on behalf of a process created as a result of a fork/exec. * The order of delivery of events is not guaranteed so we may see * this sample event before getting the COMM event for that process. * If this is the case here, we just pass NULL for appname arg. * It will get fixed up later when the COMM event occurs. */ const char * appname_arg; bool is_complete_appname; if (app_name && (app_PID == (pid_t)pid)) { appname_arg = app_name; is_complete_appname = true; } else { appname_arg = NULL; is_complete_appname = false; } proc = new operf_process_info(pid, appname_arg, is_complete_appname, false); if (cverb << vconvert) cout << "Adding new proc info to collection for PID " << pid << endl; process_map[pid] = proc; } else { proc = it->second; } proc->process_hypervisor_mapping(ip); } #endif static int __handle_throttle_event(event_t * event) { int rc = 0; trans.event = operfRead.get_eventnum_by_perf_event_id(event->throttle.id); if (trans.event >= 0) __set_event_throttled(trans.event); else rc = -1; return rc; } static int __handle_sample_event(event_t * event, u64 sample_type) { struct sample_data data; bool found_trans = false; bool in_kernel; int rc = 0; bool hypervisor = (event->header.misc == PERF_RECORD_MISC_HYPERVISOR); u64 *array = event->sample.array; /* As we extract the various pieces of information from the sample data array, * if we find that the sample type does not match up with an expected mandatory * perf_event_sample_format, we consider this as corruption of the sample data * stream. Since it wouldn't make sense to continue with suspect data, we quit. */ if (sample_type & PERF_SAMPLE_IP) { data.ip = event->ip.ip; array++; } else { rc = -1; goto done; } if (sample_type & PERF_SAMPLE_TID) { u_int32_t *p = (u_int32_t *)array; data.pid = p[0]; data.tid = p[1]; array++; } else { rc = -1; goto done; } data.id = ~0ULL; if (sample_type & PERF_SAMPLE_ID) { data.id = *array; array++; } else { rc = -1; goto done; } // PERF_SAMPLE_CPU is optional (see --separate-cpu). if (sample_type & PERF_SAMPLE_CPU) { u_int32_t *p = (u_int32_t *)array; data.cpu = *p; array++; } if (event->header.misc == PERF_RECORD_MISC_KERNEL) { in_kernel = true; } else if (event->header.misc == PERF_RECORD_MISC_USER) { in_kernel = false; } #if PPC64_ARCH else if (event->header.misc == PERF_RECORD_MISC_HYPERVISOR) { #define MAX_HYPERVISOR_ADDRESS 0xfffffffULL if (data.ip > MAX_HYPERVISOR_ADDRESS) { cverb << vconvert << "Discarding out-of-range hypervisor sample: " << hex << data.ip << endl; operf_stats[OPERF_LOST_INVALID_HYPERV_ADDR]++; goto out; } in_kernel = false; if (first_time_processing) { __map_hypervisor_sample(data.ip, data.pid); } } #endif else { // TODO: Unhandled types are the guest kernel and guest user samples. // We should at least log what we're throwing away. if (cverb << vconvert) { const char * domain; switch (event->header.misc) { case PERF_RECORD_MISC_HYPERVISOR: domain = "hypervisor"; break; #if HAVE_PERF_GUEST_MACROS case PERF_RECORD_MISC_GUEST_KERNEL: domain = "guest OS"; break; case PERF_RECORD_MISC_GUEST_USER: domain = "guest user"; break; #endif default: domain = "unknown"; break; } ostringstream message; message << "Discarding sample from " << domain << " domain: " << hex << data.ip << endl; cout << message.str(); } goto out; } /* If the static variable trans.tgid is still holding its initial value of 0, * then we would incorrectly find trans.tgid and data.pid matching, and * and make wrong assumptions from that match -- ending seg fault. So we * will bail out early if we see a sample for PID 0 coming in and trans.image_name * is NULL (implying the trans object is still in its initial state). */ if (!trans.image_name && (data.pid == 0)) { cverb << vconvert << "Discarding sample for PID 0" << endl; goto out; } if (cverb << vconvert) { ostringstream message; message << "(IP, " << event->header.misc << "): " << dec << data.pid << "/" << data.tid << ": " << hex << (unsigned long long)data.ip << endl << "\tdata ID: " << data.id << endl; cout << message.str(); } // Verify the sample. if (data.id != trans.sample_id) { trans.event = operfRead.get_eventnum_by_perf_event_id(data.id); if (trans.event < 0) { cerr << "Event num " << trans.event << " for id " << data.id << " is invalid. Sample data appears to be corrupted." << endl; rc = -1; goto out; } } /* Only need to check for "no_user" since "no_kernel" is done by * perf_events code. */ if ((operfRead.get_event_by_counter(trans.event)->no_user) && (event->header.misc == PERF_RECORD_MISC_USER)) { // Dropping user domain sample by user request in event spec. goto out; } if ((event->header.misc == PERF_RECORD_MISC_HYPERVISOR) && first_time_processing) { /* We defer processing hypervisor samples until all the samples * are processed. We do this because we synthesize an mmapping * for hypervisor samples and need to modify it (start_addr and/or * end_addr) as new hypervisor samples arrive. If we completely * processed the hypervisor samples during "first_time_processing", * we would end up (usually) with multiple "[hypervisor_bucket]" sample files, * each with a unique address range. So we'll stick the event on * the unresolved_events list to be re-processed later. */ event_t * ev = (event_t *)xmalloc(event->header.size); memcpy(ev, event, event->header.size); unresolved_events.push_back(ev); if (cverb << vconvert) cout << "Deferring processing of hypervisor sample." << endl; goto out; } // This sample is for a different event than the last sample if (data.id != trans.sample_id) goto find_trans; /* Check for the common case first -- i.e., where the current sample is from * the same context as the previous sample. For the "no-vmlinux" case, start_addr * and end_addr will be zero, so need to make sure we detect that. * The last resort (and most expensive) is to call __get_operf_trans() if the * sample cannot be matched up with a previous tran object. */ if (in_kernel) { if (trans.image_name && trans.tgid == data.pid) { // For the no-vmlinux case . . . if ((trans.start_addr == 0ULL) && (trans.end_addr == 0ULL)) { trans.pc = data.ip; found_trans = true; // For samples in vmlinux or kernel module } else if (data.ip >= trans.start_addr && data.ip <= trans.end_addr) { trans.pc = data.ip; found_trans = true; } } } else if (trans.tgid == data.pid && data.ip >= trans.start_addr && data.ip <= trans.end_addr) { trans.tid = data.tid; if (trans.is_anon) trans.pc = data.ip; else trans.pc = data.ip - trans.start_addr; found_trans = true; } find_trans: if (!found_trans && __get_operf_trans(&data, hypervisor, in_kernel)) { trans.current = operf_sfile_find(&trans); found_trans = true; } /* * trans.current may be NULL if a kernel sample falls through * the cracks, or if it's a sample from an anon region we couldn't find */ if (found_trans && trans.current) { /* log the sample or arc */ operf_sfile_log_sample(&trans); update_trans_last(&trans); if (sample_type & PERF_SAMPLE_CALLCHAIN) __handle_callchain(array, &data); goto done; } if (first_time_processing) { event_t * ev = (event_t *)malloc(event->header.size); memcpy(ev, event, event->header.size); unresolved_events.push_back(ev); } out: clear_trans(&trans); done: return rc; } /* This function is used by operf_read::convertPerfData() to convert perf-formatted * data to oprofile sample data files. After the header information in the perf sample data, * the next piece of data is typically the PERF_RECORD_COMM record which tells us the name of the * application/command being profiled. This is followed by PERF_RECORD_MMAP records * which indicate what binary executables and libraries were mmap'ed into process memory * when profiling began. Additional PERF_RECORD_MMAP records may appear later in the data * stream (e.g., dlopen for single-process profiling or new process startup for system-wide * profiling. * * This function returns '0' on success and '-1' on failure. A failure implies the sample * data is probably corrupt and the calling function should handle appropriately. */ int OP_perf_utils::op_write_event(event_t * event, u64 sample_type) { #if 0 if (event->header.type < PERF_RECORD_MAX) { cverb << vconvert << "PERF_RECORD type " << hex << event->header.type << endl; } #endif switch (event->header.type) { case PERF_RECORD_SAMPLE: return __handle_sample_event(event, sample_type); case PERF_RECORD_MMAP: __handle_mmap_event(event); return 0; case PERF_RECORD_COMM: if (!sfile_init_done) { operf_sfile_init(); sfile_init_done = true; } __handle_comm_event(event); return 0; case PERF_RECORD_FORK: __handle_fork_event(event); return 0; case PERF_RECORD_THROTTLE: return __handle_throttle_event(event); case PERF_RECORD_LOST: operf_stats[OPERF_RECORD_LOST_SAMPLE] += event->lost.lost; return 0; case PERF_RECORD_EXIT: return 0; default: if (event->header.type > PERF_RECORD_MAX) { // Bad header ostringstream message; message << "Invalid event type " << hex << event->header.type << endl; message << "Sample data is probably corrupted." << endl; cerr << message.str(); return -1; } else { ostringstream message; message << "Event type "<< hex << event->header.type << " is ignored." << endl; cverb << vconvert << message.str(); return 0; } } } void OP_perf_utils::op_reprocess_unresolved_events(u64 sample_type, bool print_progress) { int num_recs = 0; cverb << vconvert << "Reprocessing samples" << endl; map::iterator procs = process_map.begin(); for (; procs != process_map.end(); procs++) { if (!procs->second->is_valid()) { if (procs->second->is_forked()) { procs->second->connect_forked_process_to_parent(); } else { procs->second->set_valid(); } } // Force the appname_valid to true so we don't drop any samples for this process. // The appname may not be accurate, but it's the best we can do now. procs->second->set_appname_valid(); } list::const_iterator it = unresolved_events.begin(); int data_error = 0; for (; it != unresolved_events.end(); it++) { event_t * evt = (*it); if (data_error < 0) { free(evt); continue; } // This is just a sanity check, since all events in this list // are unresolved sample events. if (evt->header.type == PERF_RECORD_SAMPLE) { data_error = __handle_sample_event(evt, sample_type); free(evt); num_recs++; if ((num_recs % 1000000 == 0) && print_progress) cerr << "."; } } } void OP_perf_utils::op_release_resources(void) { map::iterator it = process_map.begin(); while (it != process_map.end()) delete it++->second; process_map.clear(); multimap::iterator images_it = all_images_map.begin(); while (images_it != all_images_map.end()) delete images_it++->second; all_images_map.clear(); delete kernel_mmap; operf_sfile_close_files(); operf_free_modules_list(); } void OP_perf_utils::op_perfrecord_sigusr1_handler(int sig __attribute__((unused)), siginfo_t * siginfo __attribute__((unused)), void *u_context __attribute__((unused))) { quit = true; } int OP_perf_utils::op_read_from_stream(ifstream & is, char * buf, streamsize sz) { int rc = 0; is.read(buf, sz); if (!is.eof() && is.fail()) { cerr << "Internal error: Failed to read from input file." << endl; rc = -1; } else { rc = is.gcount(); } return rc; } static int __mmap_trace_file(struct mmap_info & info) { int mmap_prot = PROT_READ; int mmap_flags = MAP_SHARED; info.buf = (char *) mmap(NULL, mmap_size, mmap_prot, mmap_flags, info.traceFD, info.offset); if (info.buf == MAP_FAILED) { ostringstream message; message << "Error: mmap failed with errno:\n\t" << strerror(errno) << endl; message << "\tmmap_size: 0x" << hex << mmap_size << "; offset: 0x" << info.offset << endl; cerr << message.str(); return -1; } else { ostringstream message; message << hex << "mmap with the following parameters" << endl << "\tinfo.head: " << info.head << endl << "\tinfo.offset: " << info.offset << endl; cverb << vconvert << message.str(); return 0; } } int OP_perf_utils::op_mmap_trace_file(struct mmap_info & info, bool init) { u64 shift; if (init) { if (!mmap_size) { if (MMAP_WINDOW_SZ > info.file_data_size) { mmap_size = info.file_data_size; } else { mmap_size = MMAP_WINDOW_SZ; } } info.offset = 0; info.head = info.file_data_offset; shift = pg_sz * (info.head / pg_sz); info.offset += shift; info.head -= shift; } return __mmap_trace_file(info); } int OP_perf_utils::op_write_output(int output, void *buf, size_t size) { int sum = 0; while (size) { int ret = write(output, buf, size); if (ret < 0) { if (errno == EINTR) continue; string errmsg = "Internal error: Failed to write sample data to output fd. errno is "; errmsg += strerror(errno); throw runtime_error(errmsg); } size -= ret; buf = (char *)buf + ret; sum += ret; } return sum; } /* On certain architectures and older kernels (3.0 and older, I think), a static mapping * was placed into every process's memory map to provide vsyscall functionality. The * mapping is labeled '[vsyscall]'. For some reason (which I don't care to investigate, * since vsyscall is now obsolete), the kernel's perf_events subsystem does not send a * PERF_RECORD_MMAP message for this mapping. The function below is used to synthesize * such a message so that samples taken in the vsyscall memory range can be correctly * attributed. */ void OP_perf_utils::op_get_vsyscall_mapping(pid_t tgid, int output_fd, operf_record * pr) { char fname[PATH_MAX]; FILE *fp; char line_buffer[BUFSIZ]; char perms[5], pathname[PATH_MAX], dev[16]; unsigned long long start_addr, end_addr, offset; u_int32_t inode; struct mmap_event mmap; size_t size; memset(pathname, '\0', sizeof(pathname)); memset(&mmap, 0, sizeof(mmap)); snprintf(fname, sizeof(fname), "/proc/%d/maps", tgid); fp = fopen(fname, "r"); if (fp == NULL) { // Process must have exited already or invalid pid. cverb << vrecord << "couldn't open " << fname << endl; return; } while (1) { mmap.pgoff = 0; mmap.header.type = PERF_RECORD_MMAP; mmap.header.misc = PERF_RECORD_MISC_USER; if (fgets(line_buffer, sizeof(line_buffer), fp) == NULL) break; sscanf(line_buffer, "%llx-%llx %s %llx %s %d %s", &start_addr, &end_addr, perms, &offset, dev, &inode, pathname); if (perms[2] == 'x') { char * imagename; if ((imagename = strstr(pathname, "[vsyscall]")) == NULL) continue; size = strlen(imagename) + 1; strcpy(mmap.filename, imagename); size = align_64bit(size); mmap.start = start_addr; mmap.len = end_addr - mmap.start; mmap.pid = tgid; mmap.tid = tgid; mmap.header.size = (sizeof(mmap) - (sizeof(mmap.filename) - size)); int num = OP_perf_utils::op_write_output(output_fd, &mmap, mmap.header.size); if (cverb << vrecord) cout << "Created MMAP event for " << imagename << endl; pr->add_to_total(num); break; } } fclose(fp); return; } void OP_perf_utils::op_record_process_exec_mmaps(pid_t pid, pid_t tgid, int output_fd, operf_record * pr) { char fname[PATH_MAX]; FILE *fp; snprintf(fname, sizeof(fname), "/proc/%d/maps", tgid); fp = fopen(fname, "r"); if (fp == NULL) { // Process must have exited already or invalid pid. cverb << vrecord << "couldn't open " << fname << endl; return; } while (1) { char line_buffer[BUFSIZ]; char perms[5], pathname[PATH_MAX], dev[16]; unsigned long long start_addr, end_addr, offset; const char * anon_mem = "//anon"; u_int32_t inode; memset(pathname, '\0', sizeof(pathname)); struct mmap_event mmap; size_t size; memset(&mmap, 0, sizeof(mmap)); mmap.pgoff = 0; mmap.header.type = PERF_RECORD_MMAP; mmap.header.misc = PERF_RECORD_MISC_USER; if (fgets(line_buffer, sizeof(line_buffer), fp) == NULL) break; sscanf(line_buffer, "%llx-%llx %s %llx %s %d %s", &start_addr, &end_addr, perms, &offset, dev, &inode, pathname); if (perms[2] == 'x') { char *imagename = strchr(pathname, '/'); if (imagename == NULL) imagename = strstr(pathname, "[vdso]"); if (imagename == NULL) imagename = strstr(pathname, "[vsyscall]"); if ((imagename == NULL) && !strstr(pathname, "[")) imagename = (char *)anon_mem; if (imagename == NULL) continue; size = strlen(imagename) + 1; strcpy(mmap.filename, imagename); size = align_64bit(size); mmap.start = start_addr; mmap.len = end_addr - mmap.start; mmap.pid = tgid; mmap.tid = pid; mmap.header.size = (sizeof(mmap) - (sizeof(mmap.filename) - size)); int num = OP_perf_utils::op_write_output(output_fd, &mmap, mmap.header.size); if (cverb << vrecord) cout << "Created MMAP event for " << imagename << endl; pr->add_to_total(num); } } fclose(fp); return; } static int _get_one_process_info(bool sys_wide, pid_t pid, operf_record * pr) { struct comm_event comm; char fname[PATH_MAX]; char buff[BUFSIZ]; FILE *fp; pid_t tgid = 0; size_t size = 0; DIR *tids; struct dirent *dirent; int ret = 0; snprintf(fname, sizeof(fname), "/proc/%d/status", pid); fp = fopen(fname, "r"); if (fp == NULL) { /* Process must have finished or invalid PID passed into us. * If we're doing system-wide profiling, this case can naturally * occur, and it's not an error. But if profiling on a single * application, we can't continue after this, so we'll bail out now. */ if (!sys_wide) { cerr << "Unable to find process information for process " << pid << "." << endl; cverb << vrecord << "couldn't open " << fname << endl; return OP_PERF_HANDLED_ERROR; } else { return 0; } } memset(&comm, 0, sizeof(comm)); while (!comm.comm[0] || !comm.pid) { if (fgets(buff, sizeof(buff), fp) == NULL) { ret = -1; cverb << vrecord << "Did not find Name or PID field in status file." << endl; goto out; } if (!strncmp(buff, "Name:", 5)) { char *name = buff + 5; while (*name && isspace(*name)) ++name; size = strlen(name) - 1; // The "Name" field in /proc/pid/status currently only allows for 16 characters, // but I'm not going to count on that being stable. We'll ensure we copy no more // than 16 chars since the comm.comm char array only holds 16. size = size > 16 ? 16 : size; memcpy(comm.comm, name, size++); } else if (memcmp(buff, "Tgid:", 5) == 0) { char *tgids = buff + 5; while (*tgids && isspace(*tgids)) ++tgids; tgid = comm.pid = atoi(tgids); } } comm.header.type = PERF_RECORD_COMM; size = align_64bit(size); comm.header.size = sizeof(comm) - (sizeof(comm.comm) - size); if (tgid != pid) { // passed pid must have been a secondary thread, and we // don't go looking at the /proc//task of such processes. comm.tid = pid; pr->add_process(comm); goto out; } snprintf(fname, sizeof(fname), "/proc/%d/task", pid); tids = opendir(fname); if (tids == NULL) { // process must have exited ret = -1; cverb << vrecord << "Process " << pid << " apparently exited while " << "process info was being collected"<< endl; goto out; } while ((dirent = readdir(tids))) { char *end; pid = strtol(dirent->d_name, &end, 10); if (*end) continue; comm.tid = pid; pr->add_process(comm); } closedir(tids); out: fclose(fp); if (ret) { cverb << vrecord << "couldn't get app name and tgid for pid " << dec << pid << " from /proc fs." << endl; } return ret; } /* Obtain process information for an active process (where the user has * passed in a process ID via the --pid option) or all active processes * (where system_wide==true). */ int OP_perf_utils::op_get_process_info(bool system_wide, pid_t pid, operf_record * pr) { int ret = 0; if (cverb << vrecord) cout << "op_get_process_info" << endl; if (!system_wide) { ret = _get_one_process_info(system_wide, pid, pr); } else { DIR *pids; struct dirent *dirent; pids = opendir("/proc"); if (pids == NULL) { cerr << "Unable to open /proc." << endl; return -1; } while ((dirent = readdir(pids))) { char *end; pid = strtol(dirent->d_name, &end, 10); if (*end) continue; if ((ret = _get_one_process_info(system_wide, pid, pr)) < 0) break; } closedir(pids); } return ret; } /* * each line is in the format: * * module_name 16480 1 dependencies Live 0xe091e000 * * without any blank space in each field */ static void _record_module_info(int output_fd, operf_record * pr) { const char * fname = "/proc/modules"; FILE *fp; char * line; int module_size; char ref_count[32+1]; int ret; char module_name[256+1]; char live_info[32+1]; char dependencies[4096+1]; unsigned long long start_address; fp = fopen(fname, "r"); if (fp == NULL) { cerr << "Error opening /proc/modules. Unable to process module samples" << endl; cerr << strerror(errno) << endl; return; } while (1) { struct mmap_event mmap; size_t size; memset(&mmap, 0, sizeof(mmap)); mmap.pgoff = 0; line = op_get_line(fp); if (!line) break; if (line[0] == '\0') { free(line); continue; } ret = sscanf(line, "%256s %u %32s %4096s %32s %llx", module_name, &module_size, ref_count, dependencies, live_info, &start_address); if (ret != 6) { cerr << "op_record_kernel_info: Bad /proc/modules entry: \n\t" << line << endl; free(line); continue; } if (start_address == 0) { cerr << "Unable to obtain module information. Set " << "/proc/sys/kernel/kptr_restrict to 0 to " << "collect kernel module samples." << endl; fclose(fp); return; } mmap.header.type = PERF_RECORD_MMAP; mmap.header.misc = PERF_RECORD_MISC_KERNEL; size = strlen(module_name) + 1; strncpy(mmap.filename, module_name, sizeof(mmap.filename)); size = align_64bit(size); mmap.start = start_address; mmap.len = module_size; mmap.pid = 0; mmap.tid = 0; mmap.header.size = (sizeof(mmap) - (sizeof(mmap.filename) - size)); int num = OP_perf_utils::op_write_output(output_fd, &mmap, mmap.header.size); if (cverb << vrecord) cout << "Created MMAP event for " << module_name << ". Size: " << module_size << "; start addr: " << start_address << endl; pr->add_to_total(num); free(line); } fclose(fp); return; } void OP_perf_utils::op_record_kernel_info(string vmlinux_file, u64 start_addr, u64 end_addr, int output_fd, operf_record * pr) { struct mmap_event mmap; size_t size; memset(&mmap, 0, sizeof(mmap)); mmap.pgoff = 0; mmap.header.type = PERF_RECORD_MMAP; mmap.header.misc = PERF_RECORD_MISC_KERNEL; if (vmlinux_file.empty()) { if ((start_addr == 0) && (end_addr == 0)) { /* Did not have permission to read * /proc/kallsyms and no vmlinux file */ size = strlen( "no_vmlinux") + 1; strncpy(mmap.filename, "no-vmlinux", size); mmap.start = 0ULL; mmap.len = 0ULL; } else { size = sizeof(KALL_SYM_FILE) + 1; strncpy(mmap.filename, KALL_SYM_FILE, size); mmap.start = start_addr; mmap.len = end_addr - mmap.start; } } else { size = vmlinux_file.length() + 1; strncpy(mmap.filename, vmlinux_file.c_str(), size); mmap.start = start_addr; mmap.len = end_addr - mmap.start; } size = align_64bit(size); mmap.pid = 0; mmap.tid = 0; mmap.header.size = (sizeof(mmap) - (sizeof(mmap.filename) - size)); int num = op_write_output(output_fd, &mmap, mmap.header.size); if (cverb << vrecord) { ostringstream message; message << "Created MMAP event of size " << mmap.header.size << " for " <add_to_total(num); if (start_addr && end_addr) _record_module_info(output_fd, pr); } void OP_perf_utils::op_get_kernel_event_data(struct mmap_data *md, operf_record * pr) { struct perf_event_mmap_page *pc = (struct perf_event_mmap_page *)md->base; int out_fd = pr->out_fd(); uint64_t head = pc->data_head; // Comment in perf_event.h says "User-space reading the @data_head value should issue // an rmb(), on SMP capable platforms, after reading this value." rmb(); uint64_t old = md->prev; unsigned char *data = ((unsigned char *)md->base) + pagesize; uint64_t size; void *buf; int64_t diff; if (old == head) return; diff = head - old; if (diff < 0) { throw runtime_error("ERROR: event buffer wrapped, which should NEVER happen."); } if (old != head) sample_reads++; size = head - old; if ((old & md->mask) + size != (head & md->mask)) { buf = &data[old & md->mask]; size = md->mask + 1 - (old & md->mask); old += size; pr->add_to_total(op_write_output(out_fd, buf, size)); } buf = &data[old & md->mask]; size = head - old; old += size; pr->add_to_total(op_write_output(out_fd, buf, size)); md->prev = old; pc->data_tail = old; } oprofile-1.3.0/libperf_events/operf_utils.h0000664000175000017500000001154713127452476016013 00000000000000/** * @file operf_utils.h * Header file containing definitions for handling a user request to profile * using the new Linux Performance Events Subsystem. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 7, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 * */ #ifndef OPERF_H_ #define OPERF_H_ #include #include #include #include "config.h" #include "op_config.h" #include "op_types.h" #include "op_cpu_type.h" #include "operf_event.h" #include namespace operf_options { extern bool system_wide; extern int pid; extern int mmap_pages_mult; extern std::string session_dir; extern bool separate_cpu; extern bool separate_thread; } extern bool no_vmlinux; extern int kptr_restrict; extern uid_t my_uid; extern bool throttled; #define OP_APPNAME_LEN 1024 #if BITS_PER_LONG == 64 #define MMAP_WINDOW_SZ ULLONG_MAX #else #define MMAP_WINDOW_SZ (32 * 1024 * 1024ULL) #endif #define OP_MAX_EVENTS 24 # define likely(x) __builtin_expect(!!(x), 1) # define unlikely(x) __builtin_expect(!!(x), 0) #define is_header_valid(hdr) \ ((hdr.size > sizeof(hdr)) && \ (hdr.type) && (hdr.size)) extern unsigned int op_nr_events; static inline size_t align_64bit(u64 x) { u64 mask = 7ULL; return (x + mask) & ~mask; } class operf_record; namespace OP_perf_utils { typedef struct vmlinux_info { std::string image_name; u64 start, end; } vmlinux_info_t; void op_record_kernel_info(std::string vmlinux_file, u64 start_addr, u64 end_addr, int output_fd, operf_record * pr); void op_get_kernel_event_data(struct mmap_data *md, operf_record * pr); void op_perfrecord_sigusr1_handler(int sig __attribute__((unused)), siginfo_t * siginfo __attribute__((unused)), void *u_context __attribute__((unused))); int op_get_process_info(bool system_wide, pid_t pid, operf_record * pr); void op_record_process_exec_mmaps(pid_t pid, pid_t tgid, int output_fd, operf_record * pr); void op_get_vsyscall_mapping(pid_t tgid, int output_fd, operf_record * pr); int op_write_output(int output, void *buf, size_t size); int op_write_event(event_t * event, u64 sample_type); int op_read_from_stream(std::ifstream & is, char * buf, std::streamsize sz); int op_mmap_trace_file(struct mmap_info & info, bool init); void op_reprocess_unresolved_events(u64 sample_type, bool print_progress); void op_release_resources(void); } // The rmb() macros were borrowed from perf.h in the kernel tree #if defined(__i386__) #include #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define cpu_relax() asm volatile("rep; nop" ::: "memory"); #endif #if defined(__x86_64__) #include #define rmb() asm volatile("lfence" ::: "memory") #define cpu_relax() asm volatile("rep; nop" ::: "memory"); #endif #ifdef __powerpc__ #include #define rmb() asm volatile ("sync" ::: "memory") #define cpu_relax() asm volatile ("" ::: "memory"); #endif #ifdef __s390__ #include #define rmb() asm volatile("bcr 15,0" ::: "memory") #define cpu_relax() asm volatile("" ::: "memory"); #endif #ifdef __sh__ #include #if defined(__SH4A__) || defined(__SH5__) # define rmb() asm volatile("synco" ::: "memory") #else # define rmb() asm volatile("" ::: "memory") #endif #define cpu_relax() asm volatile("" ::: "memory") #endif #ifdef __hppa__ #include #define rmb() asm volatile("" ::: "memory") #define cpu_relax() asm volatile("" ::: "memory"); #endif #ifdef __sparc__ #include #define rmb() asm volatile("":::"memory") #define cpu_relax() asm volatile("":::"memory") #endif #ifdef __alpha__ #include #define rmb() asm volatile("mb" ::: "memory") #define cpu_relax() asm volatile("" ::: "memory") #endif #ifdef __ia64__ #include #define rmb() asm volatile ("mf" ::: "memory") #define cpu_relax() asm volatile ("hint @pause" ::: "memory") #endif #ifdef __arm__ #include /* * Use the __kuser_memory_barrier helper in the CPU helper page. See * arch/arm/kernel/entry-armv.S in the kernel source for details. */ #define rmb() ((void(*)(void))0xffff0fa0)() #define cpu_relax() asm volatile("":::"memory") #endif #ifdef __aarch64__ #define rmb() asm volatile("dmb ld" ::: "memory") #define cpu_relax() asm volatile("yield" ::: "memory") #endif #ifdef __mips__ #include #define rmb() asm volatile( \ ".set mips2\n\t" \ "sync\n\t" \ ".set mips0" \ : /* no output */ \ : /* no input */ \ : "memory") #define cpu_relax() asm volatile("" ::: "memory") #endif #ifdef __tile__ #include #define rmb() __insn_mf() #define cpu_relax() ({__insn_mfspr(SPR_PASS); barrier();}) #endif #ifdef __arc__ #include #define rmb() asm volatile("" ::: "memory") #define cpu_relax() rmb() #endif #endif // OPERF_H_ oprofile-1.3.0/libperf_events/operf_sfile.cpp0000664000175000017500000003114513323165335016275 00000000000000/** * @file pe_profiling/operf_sfile.cpp * Management of sample files generated from operf * This file is modeled after daemon/opd_sfile.c * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * @author Maynard Johnson * (C) Copyright IBM Corporation 2011 */ #include #include #include #include #include #include #include "operf_sfile.h" #include "operf_kernel.h" #include "operf_utils.h" #include "cverb.h" #include "op_string.h" #include "operf_mangling.h" #include "operf_stats.h" #include "op_libiberty.h" #define HASH_SIZE 2048 #define HASH_BITS (HASH_SIZE - 1) /** All sfiles are hashed into these lists */ static struct list_head hashes[HASH_SIZE]; /** All sfiles are on this list. */ static LIST_HEAD(lru_list); static unsigned long sfile_hash(struct operf_transient const * trans, struct operf_kernel_image * ki) { unsigned long val = 0; val ^= trans->tgid << 2; if (operf_options::separate_cpu) val ^= trans->cpu; if (trans->in_kernel) { val ^= ki->start >> 14; val ^= ki->end >> 7; } if (trans->is_anon) { val ^= trans->start_addr >> VMA_SHIFT; val ^= trans->end_addr >> (VMA_SHIFT + 1); } else { size_t fname_len = trans->app_len; /* fname_ptr will point at the first character in the binary file's name * which we'll use for hashing. We don't need to hash on the whole * pathname to get a decent hash. Arbitrarily, we'll hash on the * last 16 chars (or last fname_len chars if fname_len < 16). */ unsigned int fname_hash_len = (fname_len < 16) ? fname_len : 16; const char * fname_ptr = trans->app_filename + fname_len - fname_hash_len; for (unsigned int i = 0; i < fname_hash_len; i++) val = ((val << 5) + val) ^ fname_ptr[i]; // Now do the same for image name fname_len = trans->image_len; fname_hash_len = (fname_len < 16) ? fname_len : 16; fname_ptr = trans->image_name + fname_len - fname_hash_len; for (unsigned int i = 0; i < fname_hash_len; i++) val = ((val << 5) + val) ^ fname_ptr[i]; } return val & HASH_BITS; } static int do_match(struct operf_sfile const * sf, struct operf_kernel_image const * ki, bool is_anon, const char * image_name, size_t image_len, const char * appname, size_t app_len, pid_t tgid, pid_t tid, unsigned int cpu) { size_t shortest_image_len, shortest_app_len; /* this is a simplified check for "is a kernel image" AND * "is the right kernel image". Also handles no-vmlinux * correctly. */ if (sf->kernel != ki) return 0; if (sf->tid != tid || sf->tgid != tgid) return 0; if (sf->is_anon != is_anon) return 0; if ((sf->app_len != app_len) || (sf->image_len != image_len)) return 0; if (operf_options::separate_cpu) { if (sf->cpu != cpu) return 0; } if (ki) return 1; shortest_image_len = sf->image_len < image_len ? sf->image_len : image_len; if (strncmp(sf->image_name, image_name, shortest_image_len)) return 0; shortest_app_len = sf->app_len < app_len ? sf->app_len : app_len; return !strncmp(sf->app_filename, appname, shortest_app_len); } int operf_sfile_equal(struct operf_sfile const * sf, struct operf_sfile const * sf2) { return do_match(sf, sf2->kernel, sf2->is_anon, sf2->image_name, sf2->image_len, sf2->app_filename, sf2->app_len, sf2->tgid, sf2->tid, sf2->cpu); } /** create a new sfile matching the current transient parameters */ static struct operf_sfile * create_sfile(unsigned long hash, struct operf_transient const * trans, struct operf_kernel_image * ki) { size_t i; struct operf_sfile * sf; sf = (operf_sfile *)xmalloc(sizeof(struct operf_sfile)); sf->hashval = hash; sf->tid = trans->tid; sf->tgid = trans->tgid; sf->cpu = 0; sf->kernel = ki; sf->image_name = trans->image_name; sf->app_filename = trans->app_filename; sf->image_len = trans->image_len; sf->app_len = trans->app_len; sf->is_anon = trans->is_anon; sf->start_addr = trans->start_addr; sf->end_addr = trans->end_addr; for (i = 0 ; i < op_nr_events ; ++i) odb_init(&sf->files[i]); // TODO: handle extended /* if (trans->ext) opd_ext_operf_sfile_create(sf); else */ sf->ext_files = NULL; for (i = 0; i < CG_HASH_SIZE; ++i) list_init(&sf->cg_hash[i]); if (operf_options::separate_cpu) sf->cpu = trans->cpu; return sf; } #include using namespace std; struct operf_sfile * operf_sfile_find(struct operf_transient const * trans) { struct operf_sfile * sf; struct list_head * pos; struct operf_kernel_image * ki = NULL; unsigned long hash; // The code that calls this function would always have set trans->image_name, but coverity // isn't smart enough to know that. So we add the assert here just to shut up coverity. assert(trans->image_name); if (trans->in_kernel) { ki = operf_find_kernel_image(trans->pc); if (!ki) { if (cverb << vsfile) { ostringstream message; message << "Lost kernel sample " << std::hex << trans->pc << std::endl;; cout << message.str(); } operf_stats[OPERF_LOST_KERNEL]++; return NULL; } } hash = sfile_hash(trans, ki); list_for_each(pos, &hashes[hash]) { sf = list_entry(pos, struct operf_sfile, hash); if (do_match(sf, ki, trans->is_anon, trans->image_name, trans->image_len, trans->app_filename, trans->app_len, trans->tgid, trans->tid, trans->cpu)) { operf_sfile_get(sf); goto lru; } } sf = create_sfile(hash, trans, ki); list_add(&sf->hash, &hashes[hash]); lru: operf_sfile_put(sf); return sf; } void operf_sfile_dup(struct operf_sfile * to, struct operf_sfile * from) { size_t i; memcpy(to, from, sizeof (struct operf_sfile)); for (i = 0 ; i < op_nr_events ; ++i) odb_init(&to->files[i]); // TODO: handle extended //opd_ext_operf_sfile_dup(to, from); for (i = 0; i < CG_HASH_SIZE; ++i) list_init(&to->cg_hash[i]); list_init(&to->hash); list_init(&to->lru); } static odb_t * get_file(struct operf_transient const * trans, int is_cg) { struct operf_sfile * sf = trans->current; struct operf_sfile * last = trans->last; struct operf_cg_entry * cg; struct list_head * pos; unsigned long hash; odb_t * file; // TODO: handle extended /* if ((trans->ext) != NULL) return opd_ext_operf_sfile_get(trans, is_cg); */ if (trans->event >= (int)op_nr_events) { fprintf(stderr, "%s: Invalid counter %d\n", __FUNCTION__, trans->event); abort(); } file = &sf->files[trans->event]; if (!is_cg) goto open; hash = last->hashval & (CG_HASH_SIZE - 1); /* Need to look for the right 'to'. Since we're looking for * 'last', we use its hash. */ list_for_each(pos, &sf->cg_hash[hash]) { cg = list_entry(pos, struct operf_cg_entry, hash); if (operf_sfile_equal(last, &cg->to)) { file = &cg->to.files[trans->event]; goto open; } } cg = (operf_cg_entry *)xmalloc(sizeof(struct operf_cg_entry)); operf_sfile_dup(&cg->to, last); list_add(&cg->hash, &sf->cg_hash[hash]); file = &cg->to.files[trans->event]; open: if (!odb_open_count(file)) operf_open_sample_file(file, last, sf, trans->event, is_cg); /* Error is logged by opd_open_sample_file */ if (!odb_open_count(file)) return NULL; return file; } static void verbose_print_sample(struct operf_sfile * sf, vma_t pc, uint counter) { printf("0x%llx(%u): ", pc, counter); if (sf->is_anon) { printf("anon (tgid %u, 0x%llx-0x%llx), ", (unsigned int)sf->tgid, sf->start_addr, sf->end_addr); } else if (sf->kernel) { printf("kern (name %s, 0x%llx-0x%llx), ", sf->kernel->name, sf->kernel->start, sf->kernel->end); } else { printf("%s), ", sf->image_name); } printf("app: %s: ", sf->app_filename); } static void verbose_sample(struct operf_transient const * trans, vma_t pc) { printf("Sample "); verbose_print_sample(trans->current, pc, trans->event); printf("\n"); } static void verbose_arc(struct operf_transient const * trans, vma_t from, vma_t to) { printf("Arc "); verbose_print_sample(trans->current, from, trans->event); printf(" -> 0x%llx", to); printf("\n"); } void operf_sfile_log_arc(struct operf_transient const * trans) { int err; vma_t from = trans->pc; vma_t to = trans->last_pc; uint64_t key; odb_t * file; file = get_file(trans, 1); /* absolute value -> offset */ if (trans->current->kernel) from -= trans->current->kernel->start; if (trans->last->kernel) to -= trans->last->kernel->start; if (trans->current->is_anon) from -= trans->current->start_addr; if (trans->last->is_anon) to -= trans->last->start_addr; if (cverb << varcs) verbose_arc(trans, from, to); if (!file) { operf_stats[OPERF_LOST_SAMPLEFILE]++; return; } /* Possible narrowings to 32-bit value only. */ key = to & (0xffffffff); key |= ((uint64_t)from) << 32; err = odb_update_node(file, key); if (err) { fprintf(stderr, "%s: %s\n", __FUNCTION__, strerror(err)); abort(); } } void operf_sfile_log_sample(struct operf_transient const * trans) { operf_sfile_log_sample_count(trans, 1); } void operf_sfile_log_sample_count(struct operf_transient const * trans, unsigned long int count) { int err; vma_t pc = trans->pc; odb_t * file; file = get_file(trans, 0); /* absolute value -> offset */ if (trans->current->kernel) pc -= trans->current->kernel->start; if (trans->current->is_anon) pc -= trans->current->start_addr; if (cverb << vsfile) verbose_sample(trans, pc); if (!file) { operf_stats[OPERF_LOST_SAMPLEFILE]++; return; } err = odb_update_node_with_offset(file, (odb_key_t)pc, count); if (err) { fprintf(stderr, "%s: %s\n", __FUNCTION__, strerror(err)); abort(); } operf_stats[OPERF_SAMPLES]++; if (trans->in_kernel) operf_stats[OPERF_KERNEL]++; else operf_stats[OPERF_PROCESS]++; } static int close_sfile(struct operf_sfile * sf, void * data __attribute__((unused))) { size_t i; /* it's OK to close a non-open odb file */ for (i = 0; i < op_nr_events; ++i) odb_close(&sf->files[i]); // TODO: handle extended //opd_ext_operf_sfile_close(sf); return 0; } static void kill_sfile(struct operf_sfile * sf) { close_sfile(sf, NULL); list_del(&sf->hash); list_del(&sf->lru); } static int sync_sfile(struct operf_sfile * sf, void * data __attribute__((unused))) { size_t i; for (i = 0; i < op_nr_events; ++i) odb_sync(&sf->files[i]); // TODO: handle extended //opd_ext_operf_sfile_sync(sf); return 0; } static int is_sfile_kernel(struct operf_sfile * sf, void * data __attribute__((unused))) { return !!sf->kernel; } typedef int (*operf_sfile_func)(struct operf_sfile *, void *); static void for_one_sfile(struct operf_sfile * sf, operf_sfile_func func, void * data) { size_t i; int free_sf = func(sf, data); for (i = 0; i < CG_HASH_SIZE; ++i) { struct list_head * pos; struct list_head * pos2; list_for_each_safe(pos, pos2, &sf->cg_hash[i]) { struct operf_cg_entry * cg = list_entry(pos, struct operf_cg_entry, hash); if (free_sf || func(&cg->to, data)) { kill_sfile(&cg->to); list_del(&cg->hash); free(cg); } } } if (free_sf) { kill_sfile(sf); free(sf); } } static void for_each_sfile(operf_sfile_func func, void * data) { struct list_head * pos; struct list_head * pos2; list_for_each_safe(pos, pos2, &lru_list) { struct operf_sfile * sf = list_entry(pos, struct operf_sfile, lru); for_one_sfile(sf, func, data); } } void operf_sfile_clear_kernel(void) { for_each_sfile(is_sfile_kernel, NULL); } void operf_sfile_sync_files(void) { for_each_sfile(sync_sfile, NULL); } static int _release_resources(struct operf_sfile *sf __attribute__((unused)), void * p __attribute__((unused))) { return 1; } void operf_sfile_close_files(void) { for_each_sfile(_release_resources, NULL); } static int always_true(struct operf_sfile * sf __attribute__((unused)), void * data __attribute__((unused))) { return 1; } #define LRU_AMOUNT 256 /* * Clear out older sfiles. Note the current sfiles we're using * will not be present in this list, due to operf_sfile_get/put() pairs * around the caller of this. */ int operf_sfile_lru_clear(void) { struct list_head * pos; struct list_head * pos2; int amount = LRU_AMOUNT; if (list_empty(&lru_list)) return 1; list_for_each_safe(pos, pos2, &lru_list) { struct operf_sfile * sf; if (!--amount) break; sf = list_entry(pos, struct operf_sfile, lru); for_one_sfile(sf, (operf_sfile_func)always_true, NULL); } return 0; } void operf_sfile_get(struct operf_sfile * sf) { if (sf) list_del(&sf->lru); } void operf_sfile_put(struct operf_sfile * sf) { if (sf) list_add_tail(&sf->lru, &lru_list); } void operf_sfile_init(void) { size_t i = 0; for (; i < HASH_SIZE; ++i) list_init(&hashes[i]); } oprofile-1.3.0/libperf_events/operf_counter.h0000664000175000017500000001267613127452476016336 00000000000000/** * @file libperf_events/operf_counter.h * C++ class definition that abstracts the user-to-kernel interface * for using Linux Performance Events Subsystem. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 7, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 * * Modified by Maynard Johnson * (C) Copyright IBM Corporation 2012, 2014 * */ #ifndef OPERF_COUNTER_H_ #define OPERF_COUNTER_H_ #include #include #include #include #include #include #include #include #include #include #include #include #include "operf_event.h" #include "op_cpu_type.h" #include "operf_utils.h" extern char * start_time_human_readable; class operf_record; #define OP_BASIC_SAMPLE_FORMAT (PERF_SAMPLE_ID | PERF_SAMPLE_IP \ | PERF_SAMPLE_TID) static inline int op_perf_event_open(struct perf_event_attr * attr, pid_t pid, int cpu, int group_fd, unsigned long flags) { return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); } #define OP_PERF_HANDLED_ERROR -101 #define OP_PERF_NO_SAMPLE_ID 0xdeadbeefdeadbeefULL class operf_counter { public: operf_counter(operf_event_t & evt, bool enable_on_exec, bool callgraph, bool separate_by_cpu, bool inherit, int event_number); ~operf_counter(); int perf_event_open(pid_t pid, int cpu, operf_record * pr, bool print_error); const struct perf_event_attr * the_attr(void) const { return &attr; } int get_fd(void) const { return fd; } int get_id(void) const { return id; } int get_evt_num(void) const { return evt_num; } const std::string get_event_name(void) const { return event_name; } private: struct perf_event_attr attr; int fd; int id; int evt_num; std::string event_name; }; class operf_record { public: /* For system-wide profiling, set sys_wide=true, the_pid=-1, and pid_running=false. * For single app profiling, set sys_wide=false, the_pid=, * and pid_running=true if profiling an already active process; otherwise false. */ operf_record(int output_fd, bool sys_wide, pid_t the_pid, bool pid_running, std::vector & evts, OP_perf_utils::vmlinux_info_t vi, bool callgraph, bool separate_by_cpu, bool output_fd_is_file, int _convert_read_pipe, int _convert_write_pipe); ~operf_record(); void recordPerfData(void); int out_fd(void) const { return output_fd; } void add_to_total(int n) { total_bytes_recorded += n; } void add_process(struct comm_event proc) { procs[proc.tid] = proc; } unsigned int get_total_bytes_recorded(void) const { return total_bytes_recorded; } void register_perf_event_id(unsigned counter, u64 id, perf_event_attr evt_attr); bool get_valid(void) { return valid; } private: void create(std::string outfile, std::vector & evts); void setup(void); int prepareToRecord(void); int _prepare_to_record_one_fd(int idx, int fd); int _start_recoding_new_thread(pid_t id); void record_process_info(void); void write_op_header_info(void); int _write_header_to_file(void); int _write_header_to_pipe(void); int output_fd; int read_comm_pipe; int write_comm_pipe; bool write_to_file; // Array of size 'num_cpus_used_for_perf_event_open * num_pids * num_events' struct pollfd * poll_data; std::vector samples_array; int num_mmaps; int num_cpus; pid_t pid_to_profile; /* When doing --pid or --system-wide profiling, we'll obtain process information * for all processes to be profiled (including forked/cloned processes) and store * that information in a collection of type 'comm_event'. We'll use this collection * for synthesizing PERF_RECORD_COMM events into the profile data stream. */ std::map procs; bool pid_started; bool system_wide; bool callgraph; bool separate_cpu; std::vector perfCounters; unsigned int total_bytes_recorded; int poll_count; struct OP_header opHeader; std::vector evts; bool valid; std::string vmlinux_file; u64 kernel_start, kernel_end; }; class operf_read { public: operf_read(std::vector & _evts) : sample_data_fd(-1), inputFname(""), evts(_evts), cpu_type(CPU_NO_GOOD) { valid = syswide = false; write_comm_pipe = read_comm_pipe = 1; post_profiling_pipe = -1; } void init(int sample_data_pipe_fd, std::string input_filename, std::string samples_dir, op_cpu cputype, bool systemwide, int _record_write_pipe, int _record_read_pipe, int _post_profiling_pipe); ~operf_read(); int readPerfHeader(void); unsigned int convertPerfData(void); bool is_valid(void) {return valid; } int get_eventnum_by_perf_event_id(u64 id) const; inline const operf_event_t * get_event_by_counter(u32 counter) { return &evts[counter]; } int get_write_comm_pipe(void) { return write_comm_pipe; } int get_read_comm_pipe(void) { return read_comm_pipe; } void add_sample_id_to_opHeader(u64 sample_id); private: int sample_data_fd; int write_comm_pipe; int read_comm_pipe; int post_profiling_pipe; std::string inputFname; std::string sampledir; std::ifstream istrm; struct OP_header opHeader; std::vector & evts; bool valid; bool syswide; op_cpu cpu_type; int _read_header_info_with_ifstream(void); int _read_perf_header_from_file(void); int _read_perf_header_from_pipe(void); }; #endif /* OPERF_COUNTER_H_ */ oprofile-1.3.0/libperf_events/operf_kernel.h0000664000175000017500000000220512534404406016111 00000000000000/* * @file pe_profiling/operf_kernel.h * This file is based on daemon/opd_kernel and is used for * dealing with the kernel and kernel module samples. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 12, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 */ #ifndef OPERF_KERNEL_H_ #define OPERF_KERNEL_H_ #include "op_types.h" #include "op_list.h" /** create the kernel image */ void operf_create_vmlinux(char const * name, char const * arg); /** Describes a kernel module or vmlinux itself */ struct operf_kernel_image { char * name; vma_t start; vma_t end; struct list_head list; }; /** Find a kernel_image based upon the given pc address. */ struct operf_kernel_image * operf_find_kernel_image(vma_t pc); /** Return the name field of the stored vmlinux_image. */ const char * operf_get_vmlinux_name(void); /** Create a kernel image for a kernel module and place it on the * module_list. */ void operf_create_module(char const * name, vma_t start, vma_t end); /** Free resources in modules list. * */ void operf_free_modules_list(void); #endif /* OPERF_KERNEL_H_ */ oprofile-1.3.0/libperf_events/operf_mangling.cpp0000664000175000017500000001242412534404406016764 00000000000000/* * @file pe_profiling/operf_mangling.cpp * This file is based on daemon/opd_mangling and is used for * mangling and opening of sample files for operf. * * @remark Copyright 2011 OProfile authors * @remark Read the file COPYING * * Created on: Dec 15, 2011 * @author Maynard Johnson * (C) Copyright IBM Corp. 2011 */ #include #include #include "operf_utils.h" #include "operf_mangling.h" #include "operf_kernel.h" #include "operf_sfile.h" #include "operf_counter.h" #include "op_file.h" #include "op_sample_file.h" #include "op_mangle.h" #include "op_events.h" #include "op_libiberty.h" #include "cverb.h" #include "utility.h" #include #include #include #include #include extern operf_read operfRead; extern op_cpu cpu_type; extern double cpu_speed; using namespace std; static const char * mangle_anon(struct operf_sfile const * anon) { char * name = (char *)xmalloc(PATH_MAX); snprintf(name, 1024, "%u.0x%llx.0x%llx", (unsigned int)anon->tgid, anon->start_addr, anon->end_addr); return (const char *)name; } static char * mangle_filename(struct operf_sfile * last, struct operf_sfile const * sf, int counter, int cg) { char * mangled; struct mangle_values values = {0, NULL, NULL, NULL, NULL, NULL, 0, 0, -1, -1, -1}; const struct operf_event * event = operfRead.get_event_by_counter(counter); values.anon_name = NULL; values.flags = 0; if (sf->kernel) { values.image_name = sf->kernel->name; values.flags |= MANGLE_KERNEL; } else if (sf->is_anon) { values.flags |= MANGLE_ANON; values.image_name = mangle_anon(sf); values.anon_name = sf->image_name; } else { values.image_name = sf->image_name; } values.dep_name = sf->app_filename; if (operf_options::separate_thread) { values.flags |= MANGLE_TGID | MANGLE_TID; values.tid = sf->tid; values.tgid = sf->tgid; } if (operf_options::separate_cpu) { values.flags |= MANGLE_CPU; values.cpu = sf->cpu; } if (cg) { values.flags |= MANGLE_CALLGRAPH; if (last->kernel) { values.cg_image_name = last->kernel->name; } else if (last->is_anon) { values.flags |= MANGLE_CG_ANON; values.cg_image_name = mangle_anon((struct operf_sfile const *)last); values.anon_name = "anon"; } else { values.cg_image_name = last->image_name; } } values.event_name = event->name; values.count = event->count; values.unit_mask = event->evt_um; mangled = op_mangle_filename(&values); if (values.flags & MANGLE_ANON) free((char *)values.image_name); if (values.flags & MANGLE_CG_ANON) free((char *)values.cg_image_name); return mangled; } static void fill_header(struct opd_header * header, unsigned long counter, vma_t anon_start, vma_t cg_to_anon_start, int is_kernel, int cg_to_is_kernel, time_t mtime) { const operf_event_t * event = operfRead.get_event_by_counter(counter); memset(header, '\0', sizeof(struct opd_header)); header->version = OPD_VERSION; memcpy(header->magic, OPD_MAGIC, sizeof(header->magic)); header->cpu_type = cpu_type; header->ctr_event = event->op_evt_code; header->ctr_count = event->count; header->ctr_um = event->evt_um; header->is_kernel = is_kernel; header->cg_to_is_kernel = cg_to_is_kernel; header->cpu_speed = cpu_speed; header->mtime = mtime; header->anon_start = anon_start; header->cg_to_anon_start = cg_to_anon_start; } int operf_open_sample_file(odb_t *file, struct operf_sfile *last, struct operf_sfile * sf, int counter, int cg) { char * mangled; char const * binary; vma_t last_start = 0; int err; time_t mtime; mangled = mangle_filename(last, sf, counter, cg); if (!mangled) return EINVAL; cverb << vsfile << "Opening \"" << mangled << "\"" << endl; err = create_path(mangled); if (err) { cerr << "operf: create path for " << mangled << " failed: " << strerror(err) << endl; goto out; } /* locking sf will lock associated cg files too */ operf_sfile_get(sf); if (sf != last) operf_sfile_get(last); retry: err = odb_open(file, mangled, ODB_RDWR, sizeof(struct opd_header)); /* This should never happen unless someone is clearing out sample data dir. */ if (err) { if (err == EMFILE) { if (operf_sfile_lru_clear()) { cerr << "LRU cleared but odb_open() fails for " << mangled << endl; abort(); } goto retry; } if (err == EINTR) { cverb << vsfile << "operf: open of " << mangled << " was interrupted. Trying again." << endl; goto retry; } cerr << "operf: open of " << mangled << " failed: " << strerror(err) << endl; goto out; } if (!sf->kernel) { binary = sf->image_name; mtime = op_get_mtime(binary); } else { binary = sf->kernel->name; if (binary) { if (strncmp(KALL_SYM_FILE, binary, strlen(KALL_SYM_FILE)) == 0 ) /* The Kallsyms file is not a real file. op_get_mtime() may * return different values for each call. */ mtime = 0; else mtime = op_get_mtime(binary); } else { mtime = 0; } } if (last && last->is_anon) last_start = last->start_addr; fill_header((struct opd_header *)odb_get_data(file), counter, sf->is_anon ? sf->start_addr : 0, last_start, !!sf->kernel, last ? !!last->kernel : 0, mtime); out: operf_sfile_put(sf); if (sf != last) operf_sfile_put(last); free(mangled); return err; } oprofile-1.3.0/README_PACKAGERS0000664000175000017500000000664612534404406012533 00000000000000Building an RPM for OProfile ================================== When building an RPM for OProfile, please follow the RPM packaging guidelines described in: http://www.rpm.org/RPM-HOWTO/build.html New file to install as of release 0.9.3 --------------------------------------- As of release 0.9.3, opreport is capable of generating XML output. Tool developers who wish to use the xml output will need to have access to the doc/opreport.xsd file, which describes the schema. RPM packagers may install this file in the same package as the other standard OProfile components or in a separate devel package if desired. New files to install as of release 0.9.4 --------------------------------------- As of release 0.9.4, OProfile includes a JIT support library called libopagent. This library is needed at runtime when profiling JITed code from supported virtual machines. The install location for this library is: //oprofile And there's a new binary file to install that's used for JIT profiling called opjitconv. As with the other oprofile executables, this file is installed in the /bin directory. OProfile also includes support for profiling Java applications. This support must be configured by way of the '--with-java=' configure option. If your JDK is older than version 1.5, only a JVMPI agent library is built. If your JDK is version 1.5, both JVMPI and JVMTI agent libraries are built. If your JDK is 1.6 or newer, only the JVMTI agent library is built. As with libopagent described above, the install location for these is '/oprofile'. RPM packagers can install the /oprofile libraries in the same package as the other standard OProfile components or in a separate package if desired. It is recommended to run ldconfig in %post and %postun to add/remove the /oprofile path from the standard library search paths. On bi-arch platforms that support more than one "bitness" of userspace software (e.g., 32-bit and 64-bit programs), it is recommended that the libopagent and Java agent libraries be packaged in a separate RPM. You could then build OProfile twice -- once for each bitness type. You would then distribute both versions of the RPMs containing the libraries, but only one RPM containing the "base" OProfile (i.e., executables, scripts, etc.). The new JIT support also provides the ability for third parties to develop JIT agents for other virtual machines. The development files provided for this purpose are: doc/op-jit-devel.html include/opagent.h Again, the RPM packager may package these files in the default package or in a separate devel package. Requirement for building a binary RPM package ---------------------------------------- OProfile requires the special user account "oprofile" to exist for purposes of processing samples from JIT'ed code (e.g., Java applications). When defining the spec file for the OProfile RPM, you should add the automatic creation of the special "oprofile" user account. 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you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * @author Maynard Johnson * * Copyright IBM Corporation 2007 * */ #include #include #include #include #include #include extern "C" { #include #include #include } using namespace std; static bool debug = false; static op_agent_t agent_hdl; class class_details { public: string name; map method_names; map method_signatures; }; static pthread_mutex_t class_map_mutex = PTHREAD_MUTEX_INITIALIZER; static map loaded_classes; void class_load(JVMPI_Event * event) { class_details cls; cls.name = event->u.class_load.class_name; JVMPI_Method * passed_methods = event->u.class_load.methods; for (int i = 0; i < event->u.class_load.num_methods; i++, passed_methods++) { cls.method_names[passed_methods->method_id] = passed_methods->method_name; cls.method_signatures[passed_methods->method_id] = passed_methods->method_signature; } pthread_mutex_lock(&class_map_mutex); loaded_classes[event->u.class_load.class_id] = cls; pthread_mutex_unlock(&class_map_mutex); } void class_unload(JVMPI_Event * event) { pthread_mutex_lock(&class_map_mutex); loaded_classes.erase(event->u.class_load.class_id); pthread_mutex_unlock(&class_map_mutex); } JVMPI_Interface * jvmpi; void compiled_method_load(JVMPI_Event * event) { jmethodID method = event->u.compiled_method_load.method_id; void * code_addr = event->u.compiled_method_load.code_addr; jint code_size = event->u.compiled_method_load.code_size; jvmpi->DisableGC(); /* Get the class of the method */ jobjectID classID = jvmpi->GetMethodClass(method); jvmpi->EnableGC(); pthread_mutex_lock(&class_map_mutex); map::iterator iter = loaded_classes.find(classID); if (iter == loaded_classes.end()) { throw runtime_error("Error: Cannot find class for compiled" " method\n"); } class_details cls_info = ((class_details)iter->second); map::iterator method_it = cls_info.method_names.find(method); if (method_it == cls_info.method_names.end()) { throw runtime_error("Error: Cannot find method name for " "compiled method\n"); } char const * method_name = method_it->second.c_str(); method_it = cls_info.method_signatures.find(method); if (method_it == cls_info.method_signatures.end()) { throw runtime_error("Error: Cannot find method signature " "for compiled method\n"); } char const * method_signature = method_it->second.c_str(); string const class_signature = "L" + cls_info.name + ";"; pthread_mutex_unlock(&class_map_mutex); if (debug) { cerr << "load: class=" << class_signature << ", method =" << method_name << ", method signature = " << method_signature << ", addr=" << code_addr << ", size=" << code_size << endl; } // produce a symbol name out of class name and method name int cnt = strlen(method_name) + strlen(class_signature.c_str()) + strlen(method_signature) + 2; char buf[cnt]; strncpy(buf, class_signature.c_str(), cnt - 1); strncat(buf, method_name, cnt - strlen(buf) - 1); strncat(buf, method_signature, cnt - strlen(buf) - 1); if (op_write_native_code(agent_hdl, buf, (uint64_t) code_addr, code_addr, code_size)) perror("Error: op_write_native_code()"); } void compiled_method_unload(JVMPI_Event * event) { void * code_addr = event->u.compiled_method_load.code_addr; if (debug) { cerr << "unload: addr=" << (unsigned long long) (uintptr_t) code_addr << endl; } if (op_unload_native_code(agent_hdl, (uint64_t)code_addr)) perror("Error: op_unload_native_code()"); } void jvm_shutdown(JVMPI_Event * event) { /* Checking event here is not really necessary; added only to silence * the 'unused parameter' compiler warning. */ if (event) if (op_close_agent(agent_hdl)) perror("Error: op_close_agent()"); } void jvm_notify_event(JVMPI_Event * event) { switch (event->event_type) { case JVMPI_EVENT_COMPILED_METHOD_LOAD: compiled_method_load(event); break; case JVMPI_EVENT_COMPILED_METHOD_UNLOAD: compiled_method_unload(event); break; case JVMPI_EVENT_JVM_SHUT_DOWN: jvm_shutdown(event); break; case JVMPI_EVENT_CLASS_LOAD: class_load(event); break; case JVMPI_EVENT_CLASS_UNLOAD: class_unload(event); break; default: break; } } extern "C" { JNIEXPORT jint JNICALL JVM_OnLoad(JavaVM * jvm, char * options, void * reserved) { int err; if (options && strstr(options, "version")) { cerr << "jvmpi_oprofile: current libopagent version " << op_major_version() << "." << op_minor_version() << endl; throw runtime_error("Exiting"); } if (options && strstr(options, "debug=yes")) { debug = true; /* Add something braindead to silence the 'unused parameter' * compiler warning. */ if (reserved) debug = true; } if (debug) cerr << "jvmpi_oprofile: agent activated" << endl; agent_hdl = op_open_agent(); if (!agent_hdl) { perror("Error: op_open_agent()"); throw runtime_error("Exiting"); } /* The union below is used to avoid the 'dereferencing type-punned * pointer will break strict-aliasing rules' compiler warning on the * GetEnv call. */ union { JVMPI_Interface * jvmpi_ifc; void * jvmpi_ifc_ptr; } jvmpi_GetEnv_arg; err = jvm->GetEnv(&jvmpi_GetEnv_arg.jvmpi_ifc_ptr, JVMPI_VERSION_1); if (err < 0) { cerr << "GetEnv failed with rc=" << err << endl; throw runtime_error("Exiting"); } jvmpi = jvmpi_GetEnv_arg.jvmpi_ifc; jvmpi->EnableEvent(JVMPI_EVENT_COMPILED_METHOD_LOAD, NULL); jvmpi->EnableEvent(JVMPI_EVENT_COMPILED_METHOD_UNLOAD, NULL); jvmpi->EnableEvent(JVMPI_EVENT_JVM_SHUT_DOWN, NULL); jvmpi->EnableEvent(JVMPI_EVENT_CLASS_LOAD, NULL); jvmpi->NotifyEvent = jvm_notify_event; return JNI_OK; } } oprofile-1.3.0/agents/jvmti/0000775000175000017500000000000013323173530012747 500000000000000oprofile-1.3.0/agents/jvmti/Makefile.am0000664000175000017500000000054712534404406014733 00000000000000AM_CFLAGS = @OP_CFLAGS@ pkglib_LTLIBRARIES = libjvmti_oprofile.la libjvmti_oprofile_la_CFLAGS = $(AM_CFLAGS) -fPIC libjvmti_oprofile_la_LIBADD = ../../libopagent/libopagent.la libjvmti_oprofile_la_SOURCES = libjvmti_oprofile.c AM_CPPFLAGS = \ -I ${top_srcdir}/libopagent \ -I @JAVA_HOMEDIR@/include \ -I @JAVA_HOMEDIR@/include/linux oprofile-1.3.0/agents/jvmti/libjvmti_oprofile.c0000664000175000017500000002262312534404406016561 00000000000000/** * @file jvmti_oprofile.c * JVMTI agent implementation to report jitted JVM code to Oprofile * * @remark Copyright 2007 OProfile authors * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * @author Jens Wilke * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ #include #include #include #include #include #include #include "opagent.h" static int debug = 0; static int can_get_line_numbers = 0; static op_agent_t agent_hdl; /** * Handle an error or a warning, return 0 if the checked error is * JVMTI_ERROR_NONE, i.e. success */ static int handle_error(jvmtiError err, char const * msg, int severe) { if (err != JVMTI_ERROR_NONE) { fprintf(stderr, "%s: %s, err code %i\n", severe ? "Error" : "Warning", msg, err); } return err != JVMTI_ERROR_NONE; } /** * returned array is map_length length, params map and map_length != 0 * format of lineno information is JVMTI_JLOCATION_JVMBCI, map is an array * of { address, code byte index }, table_ptr an array of { byte code index, * lineno } */ static struct debug_line_info * create_debug_line_info(jint map_length, jvmtiAddrLocationMap const * map, jint entry_count, jvmtiLineNumberEntry* table_ptr, char const * source_filename) { struct debug_line_info * debug_line; int i, j; if (debug) { fprintf(stderr, "Source %s\n", source_filename); for (i = 0; i < map_length; ++i) { fprintf(stderr, "%p %lld\t", map[i].start_address, (long long)map[i].location); } fprintf(stderr, "\n"); for (i = 0; i < entry_count; ++i) { fprintf(stderr, "%lld %d\t", (long long)table_ptr[i].start_location, table_ptr[i].line_number); } fprintf(stderr, "\n"); } debug_line = calloc(map_length, sizeof(struct debug_line_info)); if (!debug_line) return 0; for (i = 0; i < map_length; ++i) { /* FIXME: likely to need a lower_bound on the array, but * documentation is a bit obscure about the contents of these * arrray **/ for (j = 0; j < entry_count - 1; ++j) { if (table_ptr[j].start_location > map[i].location) break; } debug_line[i].vma = (unsigned long)map[i].start_address; debug_line[i].lineno = table_ptr[j].line_number; debug_line[i].filename = source_filename; } if (debug) { for (i = 0; i < map_length; ++i) { fprintf(stderr, "%lx %d\t", debug_line[i].vma, debug_line[i].lineno); } fprintf(stderr, "\n"); } return debug_line; } static void JNICALL cb_compiled_method_load(jvmtiEnv * jvmti, jmethodID method, jint code_size, void const * code_addr, jint map_length, jvmtiAddrLocationMap const * map, void const * compile_info) { jclass declaring_class; char * class_signature = NULL; char * method_name = NULL; char * method_signature = NULL; jvmtiLineNumberEntry* table_ptr = NULL; char * source_filename = NULL; struct debug_line_info * debug_line = NULL; jvmtiError err; /* shut up compiler warning */ compile_info = compile_info; err = (*jvmti)->GetMethodDeclaringClass(jvmti, method, &declaring_class); if (handle_error(err, "GetMethodDeclaringClass()", 1)) goto cleanup2; if (can_get_line_numbers && map_length && map) { jint entry_count; err = (*jvmti)->GetLineNumberTable(jvmti, method, &entry_count, &table_ptr); if (err == JVMTI_ERROR_NONE) { err = (*jvmti)->GetSourceFileName(jvmti, declaring_class, &source_filename); if (err == JVMTI_ERROR_NONE) { debug_line = create_debug_line_info(map_length, map, entry_count, table_ptr, source_filename); } else if (err != JVMTI_ERROR_ABSENT_INFORMATION) { (void)handle_error(err, "GetSourceFileName()", 1); } } else if (err != JVMTI_ERROR_NATIVE_METHOD && err != JVMTI_ERROR_ABSENT_INFORMATION) { (void)handle_error(err, "GetLineNumberTable()", 1); } } err = (*jvmti)->GetClassSignature(jvmti, declaring_class, &class_signature, NULL); if (handle_error(err, "GetClassSignature()", 1)) goto cleanup1; err = (*jvmti)->GetMethodName(jvmti, method, &method_name, &method_signature, NULL); if (handle_error(err, "GetMethodName()", 1)) goto cleanup; if (debug) { fprintf(stderr, "load: declaring_class=%p, class=%s, " "method=%s, signature=%s, addr=%p, size=%i \n", declaring_class, class_signature, method_name, method_signature, code_addr, code_size); } { int cnt = strlen(method_name) + strlen(class_signature) + strlen(method_signature) + 2; char buf[cnt]; strncpy(buf, class_signature, cnt - 1); strncat(buf, method_name, cnt - strlen(buf) - 1); strncat(buf, method_signature, cnt - strlen(buf) - 1); if (op_write_native_code(agent_hdl, buf, (uint64_t)(uintptr_t) code_addr, code_addr, code_size)) { perror("Error: op_write_native_code()"); goto cleanup; } } if (debug_line) if (op_write_debug_line_info(agent_hdl, code_addr, map_length, debug_line)) perror("Error: op_write_debug_line_info()"); cleanup: (*jvmti)->Deallocate(jvmti, (unsigned char *)method_name); (*jvmti)->Deallocate(jvmti, (unsigned char *)method_signature); cleanup1: (*jvmti)->Deallocate(jvmti, (unsigned char *)class_signature); (*jvmti)->Deallocate(jvmti, (unsigned char *)table_ptr); (*jvmti)->Deallocate(jvmti, (unsigned char *)source_filename); cleanup2: free(debug_line); } static void JNICALL cb_compiled_method_unload(jvmtiEnv * jvmti_env, jmethodID method, void const * code_addr) { /* shut up compiler warning */ jvmti_env = jvmti_env; method = method; if (debug) fprintf(stderr, "unload: addr=%p\n", code_addr); if (op_unload_native_code(agent_hdl, (uint64_t)(uintptr_t) code_addr)) perror("Error: op_unload_native_code()"); } static void JNICALL cb_dynamic_code_generated(jvmtiEnv * jvmti_env, char const * name, void const * code_addr, jint code_size) { /* shut up compiler warning */ jvmti_env = jvmti_env; if (debug) { fprintf(stderr, "dyncode: name=%s, addr=%p, size=%i \n", name, code_addr, code_size); } if (op_write_native_code(agent_hdl, name, (uint64_t)(uintptr_t) code_addr, code_addr, code_size)) perror("Error: op_write_native_code()"); } JNIEXPORT jint JNICALL Agent_OnLoad(JavaVM * jvm, char * options, void * reserved) { jint rc; jvmtiEnv * jvmti = NULL; jvmtiEventCallbacks callbacks; jvmtiCapabilities caps; jvmtiJlocationFormat format; jvmtiError error; /* shut up compiler warning */ reserved = reserved; if (options && !strcmp("version", options)) { fprintf(stderr, "jvmti_oprofile: current libopagent version %i.%i.\n", op_major_version(), op_minor_version()); return -1; } if (options && !strcmp("debug", options)) debug = 1; if (debug) fprintf(stderr, "jvmti_oprofile: agent activated\n"); agent_hdl = op_open_agent(); if (!agent_hdl) { perror("Error: op_open_agent()"); return -1; } rc = (*jvm)->GetEnv(jvm, (void *)&jvmti, JVMTI_VERSION_1); if (rc != JNI_OK) { fprintf(stderr, "Error: GetEnv(), rc=%i\n", rc); return -1; } memset(&caps, '\0', sizeof(caps)); caps.can_generate_compiled_method_load_events = 1; error = (*jvmti)->AddCapabilities(jvmti, &caps); if (handle_error(error, "AddCapabilities()", 1)) return -1; /* FIXME: settable through command line, default on/off? */ error = (*jvmti)->GetJLocationFormat(jvmti, &format); if (!handle_error(error, "GetJLocationFormat", 1) && format == JVMTI_JLOCATION_JVMBCI) { memset(&caps, '\0', sizeof(caps)); caps.can_get_line_numbers = 1; caps.can_get_source_file_name = 1; error = (*jvmti)->AddCapabilities(jvmti, &caps); if (!handle_error(error, "AddCapabilities()", 1)) can_get_line_numbers = 1; } memset(&callbacks, 0, sizeof(callbacks)); callbacks.CompiledMethodLoad = cb_compiled_method_load; callbacks.CompiledMethodUnload = cb_compiled_method_unload; callbacks.DynamicCodeGenerated = cb_dynamic_code_generated; error = (*jvmti)->SetEventCallbacks(jvmti, &callbacks, sizeof(callbacks)); if (handle_error(error, "SetEventCallbacks()", 1)) return -1; error = (*jvmti)->SetEventNotificationMode(jvmti, JVMTI_ENABLE, JVMTI_EVENT_COMPILED_METHOD_LOAD, NULL); if (handle_error(error, "SetEventNotificationMode() " "JVMTI_EVENT_COMPILED_METHOD_LOAD", 1)) return -1; error = (*jvmti)->SetEventNotificationMode(jvmti, JVMTI_ENABLE, JVMTI_EVENT_COMPILED_METHOD_UNLOAD, NULL); if (handle_error(error, "SetEventNotificationMode() " "JVMTI_EVENT_COMPILED_METHOD_UNLOAD", 1)) return -1; error = (*jvmti)->SetEventNotificationMode(jvmti, JVMTI_ENABLE, JVMTI_EVENT_DYNAMIC_CODE_GENERATED, NULL); if (handle_error(error, "SetEventNotificationMode() " "JVMTI_EVENT_DYNAMIC_CODE_GENERATED", 1)) return -1; return 0; } JNIEXPORT void JNICALL Agent_OnUnload(JavaVM * jvm) { /* shut up compiler warning */ jvm = jvm; if (op_close_agent(agent_hdl)) perror("Error: op_close_agent()"); } oprofile-1.3.0/agents/jvmti/Makefile.in0000664000175000017500000005531213323172172014743 00000000000000# Makefile.in generated by automake 1.15.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2017 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; 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Create the # directory the slow way, step by step, checking for races as we go. case $dstdir in /*) prefix='/';; [-=\(\)!]*) prefix='./';; *) prefix='';; esac eval "$initialize_posix_glob" oIFS=$IFS IFS=/ $posix_glob set -f set fnord $dstdir shift $posix_glob set +f IFS=$oIFS prefixes= for d do test X"$d" = X && continue prefix=$prefix$d if test -d "$prefix"; then prefixes= else if $posix_mkdir; then (umask=$mkdir_umask && $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir") && break # Don't fail if two instances are running concurrently. test -d "$prefix" || exit 1 else case $prefix in *\'*) qprefix=`echo "$prefix" | sed "s/'/'\\\\\\\\''/g"`;; *) qprefix=$prefix;; esac prefixes="$prefixes '$qprefix'" fi fi prefix=$prefix/ done if test -n "$prefixes"; then # Don't fail if two instances are running concurrently. (umask $mkdir_umask && eval "\$doit_exec \$mkdirprog $prefixes") || test -d "$dstdir" || exit 1 obsolete_mkdir_used=true fi fi fi if test -n "$dir_arg"; then { test -z "$chowncmd" || $doit $chowncmd "$dst"; } && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } && { test "$obsolete_mkdir_used$chowncmd$chgrpcmd" = false || test -z "$chmodcmd" || $doit $chmodcmd $mode "$dst"; } || exit 1 else # Make a couple of temp file names in the proper directory. dsttmp=$dstdir/_inst.$$_ rmtmp=$dstdir/_rm.$$_ # Trap to clean up those temp files at exit. trap 'ret=$?; rm -f "$dsttmp" "$rmtmp" && exit $ret' 0 # Copy the file name to the temp name. (umask $cp_umask && $doit_exec $cpprog "$src" "$dsttmp") && # and set any options; do chmod last to preserve setuid bits. # # If any of these fail, we abort the whole thing. If we want to # ignore errors from any of these, just make sure not to ignore # errors from the above "$doit $cpprog $src $dsttmp" command. # { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } && { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } && { test -z "$chmodcmd" || $doit $chmodcmd $mode "$dsttmp"; } && # If -C, don't bother to copy if it wouldn't change the file. if $copy_on_change && old=`LC_ALL=C ls -dlL "$dst" 2>/dev/null` && new=`LC_ALL=C ls -dlL "$dsttmp" 2>/dev/null` && eval "$initialize_posix_glob" && $posix_glob set -f && set X $old && old=:$2:$4:$5:$6 && set X $new && new=:$2:$4:$5:$6 && $posix_glob set +f && test "$old" = "$new" && $cmpprog "$dst" "$dsttmp" >/dev/null 2>&1 then rm -f "$dsttmp" else # Rename the file to the real destination. $doit $mvcmd -f "$dsttmp" "$dst" 2>/dev/null || # The rename failed, perhaps because mv can't rename something else # to itself, or perhaps because mv is so ancient that it does not # support -f. { # Now remove or move aside any old file at destination location. # We try this two ways since rm can't unlink itself on some # systems and the destination file might be busy for other # reasons. In this case, the final cleanup might fail but the new # file should still install successfully. { test ! -f "$dst" || $doit $rmcmd -f "$dst" 2>/dev/null || { $doit $mvcmd -f "$dst" "$rmtmp" 2>/dev/null && { $doit $rmcmd -f "$rmtmp" 2>/dev/null; :; } } || { echo "$0: cannot unlink or rename $dst" >&2 (exit 1); exit 1 } } && # Now rename the file to the real destination. $doit $mvcmd "$dsttmp" "$dst" } fi || exit 1 trap '' 0 fi done # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: oprofile-1.3.0/include/0000775000175000017500000000000013323173527011766 500000000000000oprofile-1.3.0/include/sstream0000664000175000017500000001637312534404406013315 00000000000000/* This is part of libio/iostream, providing -*- C++ -*- input/output. Copyright (C) 2000 Free Software Foundation This file is part of the GNU IO Library. This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this library; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. As a special exception, if you link this library with files compiled with a GNU compiler to produce an executable, this does not cause the resulting executable to be covered by the GNU General Public License. This exception does not however invalidate any other reasons why the executable file might be covered by the GNU General Public License. */ /* Written by Magnus Fromreide (magfr@lysator.liu.se). */ /* seekoff and ideas for overflow is largely borrowed from libstdc++-v3 */ #ifndef __SSTREAM__ #define __SSTREAM__ #include #include #include namespace std { class stringbuf : public streambuf { public: typedef char char_type; typedef int int_type; typedef streampos pos_type; typedef streamoff off_type; explicit stringbuf(int which=ios::in|ios::out) : streambuf(), mode(static_cast(which)), stream(NULL), stream_len(0) { stringbuf_init(); } explicit stringbuf(const string &str, int which=ios::in|ios::out) : streambuf(), mode(static_cast(which)), stream(NULL), stream_len(0) { if (mode & (ios::in|ios::out)) { stream_len = str.size(); stream = new char_type[stream_len]; str.copy(stream, stream_len); } stringbuf_init(); } virtual ~stringbuf() { delete[] stream; } string str() const { if (pbase() != 0) return string(stream, pptr()-pbase()); else return string(); } void str(const string& str) { delete[] stream; stream_len = str.size(); stream = new char_type[stream_len]; str.copy(stream, stream_len); stringbuf_init(); } protected: // The buffer is already in gptr, so if it ends then it is out of data. virtual int underflow() { return EOF; } virtual int overflow(int c = EOF) { int res; if (mode & ios::out) { if (c != EOF) { streamsize old_stream_len = stream_len; stream_len += 1; char_type* new_stream = new char_type[stream_len]; memcpy(new_stream, stream, old_stream_len); delete[] stream; stream = new_stream; stringbuf_sync(gptr()-eback(), pptr()-pbase()); sputc(c); res = c; } else res = EOF; } else res = 0; return res; } virtual streambuf* setbuf(char_type* s, streamsize n) { if (n != 0) { delete[] stream; stream = new char_type[n]; memcpy(stream, s, n); stream_len = n; stringbuf_sync(0, 0); } return this; } virtual pos_type seekoff(off_type off, ios::seek_dir way, int which = ios::in | ios::out) { pos_type ret = pos_type(off_type(-1)); bool testin = which & ios::in && mode & ios::in; bool testout = which & ios::out && mode & ios::out; bool testboth = testin && testout && way != ios::cur; if (stream_len && ((testin != testout) || testboth)) { char_type* beg = stream; char_type* curi = NULL; char_type* curo = NULL; char_type* endi = NULL; char_type* endo = NULL; if (testin) { curi = gptr(); endi = egptr(); } if (testout) { curo = pptr(); endo = epptr(); } off_type newoffi = 0; off_type newoffo = 0; if (way == ios::beg) { newoffi = beg - curi; newoffo = beg - curo; } else if (way == ios::end) { newoffi = endi - curi; newoffo = endo - curo; } if (testin && newoffi + off + curi - beg >= 0 && endi - beg >= newoffi + off + curi - beg) { gbump(newoffi + off); ret = pos_type(newoffi + off + curi); } if (testout && newoffo + off + curo - beg >= 0 && endo - beg >= newoffo + off + curo - beg) { pbump(newoffo + off); ret = pos_type(newoffo + off + curo); } } return ret; } virtual pos_type seekpos(pos_type sp, int which = ios::in | ios::out) { pos_type ret = seekoff(sp, ios::beg, which); return ret; } private: void stringbuf_sync(streamsize i, streamsize o) { if (mode & ios::in) setg(stream, stream + i, stream + stream_len); if (mode & ios::out) { setp(stream, stream + stream_len); pbump(o); } } void stringbuf_init() { if (mode & ios::ate) stringbuf_sync(0, stream_len); else stringbuf_sync(0, 0); } private: ios::open_mode mode; char_type* stream; streamsize stream_len; }; class istringstream : public istream { public: typedef char char_type; typedef int int_type; typedef streampos pos_type; typedef streamoff off_type; explicit istringstream(int which=ios::in) : istream(&sb), sb(which | ios::in) { } explicit istringstream(const string& str, int which=ios::in) : istream(&sb), sb(str, which | ios::in) { } stringbuf* rdbuf() const { return const_cast(&sb); } string str() const { return rdbuf()->str(); } void str(const string& s) { rdbuf()->str(s); } private: stringbuf sb; }; class ostringstream : public ostream { public: typedef char char_type; typedef int int_type; typedef streampos pos_type; typedef streamoff off_type; explicit ostringstream(int which=ios::out) : ostream(&sb), sb(which | ios::out) { } explicit ostringstream(const string& str, int which=ios::out) : ostream(&sb), sb(str, which | ios::out) { } stringbuf* rdbuf() const { return const_cast(&sb); } string str() const { return rdbuf()->str(); } void str(const string& s) { rdbuf()->str(s); } private: stringbuf sb; }; class stringstream : public iostream { public: typedef char char_type; typedef int int_type; typedef streampos pos_type; typedef streamoff off_type; explicit stringstream(int which=ios::out|ios::in) : iostream(&sb), sb(which) { } explicit stringstream(const string& str, int which=ios::out|ios::in) : iostream(&sb), sb(str, which) { } stringbuf* rdbuf() const { return const_cast(&sb); } string str() const { return rdbuf()->str(); } void str(const string& s) { rdbuf()->str(s); } private: stringbuf sb; }; }; #endif /* not __STRSTREAM__ */ oprofile-1.3.0/test-driver0000755000175000017500000001027712535323747012473 00000000000000#! /bin/sh # test-driver - basic testsuite driver script. scriptversion=2013-07-13.22; # UTC # Copyright (C) 2011-2013 Free Software Foundation, Inc. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # This file is maintained in Automake, please report # bugs to or send patches to # . # Make unconditional expansion of undefined variables an error. This # helps a lot in preventing typo-related bugs. set -u usage_error () { echo "$0: $*" >&2 print_usage >&2 exit 2 } print_usage () { cat <$log_file 2>&1 estatus=$? if test $enable_hard_errors = no && test $estatus -eq 99; then estatus=1 fi case $estatus:$expect_failure in 0:yes) col=$red res=XPASS recheck=yes gcopy=yes;; 0:*) col=$grn res=PASS recheck=no gcopy=no;; 77:*) col=$blu res=SKIP recheck=no gcopy=yes;; 99:*) col=$mgn res=ERROR recheck=yes gcopy=yes;; *:yes) col=$lgn res=XFAIL recheck=no gcopy=yes;; *:*) col=$red res=FAIL recheck=yes gcopy=yes;; esac # Report outcome to console. echo "${col}${res}${std}: $test_name" # Register the test result, and other relevant metadata. echo ":test-result: $res" > $trs_file echo ":global-test-result: $res" >> $trs_file echo ":recheck: $recheck" >> $trs_file echo ":copy-in-global-log: $gcopy" >> $trs_file # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: oprofile-1.3.0/ChangeLog-20100000664000175000017500000001411412534404406012412 000000000000002010-12-16 John Villalovos * events/Makefile.am: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_hw_specific.h: * libop/op_events.c: * utils/ophelp.c: * events/i386/westmere/events (new): * events/i386/westmere/unit_masks (new): Add support for Intel Westmere micro-architecture processors 2010-12-15 Will Cohen * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_hw_specific.h: User-space identification of processors that support Intel architectural events 2010-12-14 Suravee Suthikulpanit * oprofile/daemon/opd_ibs_trans.c: Fix non-x86 build issue due to cpuid instruction 2010-11-7 Suravee Suthikulpanit * oprofile/utils/opcontrol: * oprofile/daemon/init.c: * oprofile/daemon/opd_extended.h: * oprofile/daemon/opd_extended.c: * oprofile/daemon/opd_ibs.h: * oprofile/daemon/opd_ibs.c: * oprofile/daemon/opd_ibs_trans.h: * oprofile/daemon/opd_ibs_trans.c: * oprofile/events/x86-64/family10/unit_masks: * oprofile/daemon/opd_ibs_macro.h: Additional IBS supports for family12/14/15h including: - IBS Op branch target address log - IBS Op memory access log - IBS Op extended count bits 2010-11-7 Suravee Suthikulpanit * events/Makefile.am: * libop/op_events.c: * libop/op_cpu_type.h: * libop/op_cpu_type.c: * utils/ophelp.c: * events/x86-64/family12h/events: New File * events/x86-64/family12h/unit_masks: New File * events/x86-64/family14h/events: New File * events/x86-64/family14h/unit_masks: New File * events/x86-64/family15h/events: New File * events/x86-64/family15h/unit_masks: New File Add support for new AMD processors (family12h/14h/15h) 2010-10-15 Roland Grunberg * libop/op_xml_events.c: * libop/op_xml_out.c: * libop/op_xml_out.h: * doc/ophelp.xsd: Add unit mask type attribute for an event in the ophelp schema 2010-10-15 Maynard Johnson * doc/ophelp.xsd: * libop/op_xml_events.c: Fix schema validation issues and error in xml generation 2010-10-13 Maynard Johnson * libabi/opimport.cpp: Fix uninitialized variable warning when building with gcc 4.4 2010-10-13 Maynard Johnson * events/mips/Makefile.am: Correction to 8/26 MIPS patch to add events and unit_masks to makefile 2010-10-07 William Cohen * events/i386/arch_perfmon/events: Correct filter values. 2010-08-26 Paul Lind * libop/op_cpu_type.[h,c]: * libop/op_events.c: * utils/ophelp.c: Add "mips/74K" and "mips/1004K" as valid cpu types, and change number of available 34K counters to 2. * libop/tests/alloc_counter_tests.c: correct 34K test to 2 counters. * events/mips/24K/events: correct the performance counters for 24K. * events/mips/34K/events: correct the performance counters for 34K. * events/mips/74K/[events,unit_masks]: Add events for 74K. * events/mips/1004K/[events,unit_masks]: Add events for 1004K. 2010-08-13 Maynard Johnson * utils/opcontrol: * doc/opcontrol.1.in: Update help and man page for opcontrol to indicate that buffer values may be reset to default values by passing a '0' 2010-08-02 Maynard Johnson * utils/opcontrol: * libpp/profile_spec.cpp: * pp/oparchive.cpp: Moved the copying of stats to opcontrol::do_dump_data and removed the unnecessary and confusing message that indicated when overflow stats were not available. 2010-07-13 Maynard Johnson * events/arm/armv7-common/events: (new) * events/arm/armv7-common/unit_masks: (new) * events/arm/armv7-ca9/events: (new) * events/arm/armv7-ca9/unit_masks: (new) I neglected to do 'cvs add' for these new files in the previous commit; doing so now. 2010-07-01 Will Deacon * events/arm/armv7-common/events: * events/arm/armv7-common/unit_masks: * events/arm/armv7/events: factor out ARMv7 common architectural events * events/Makefile.am: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/ophelp.c: correct usage of core terminology for v7 and MPCore * events/arm/armv7-ca9/events: * events/arm/armv7-ca9/unit_masks: add support for Cortex-A9 events 2010-06-21 John Villalovos * libop/op_cpu_type.[h,c]: * libop/op_events.c: * utils/ophelp.c: Add "i386/nehalem" as a valid cpu_type. This will allow the kernel in the future (if desired) to use "i386/nehalem" instead of "i386/core_i7". Core i7 processors can be either Nehalem or Westmere microarchitecture but the "i386/core_i7" cpu_type in Oprofile is only for Nehalem microarchitecture processors. 2010-06-11 William Cohen * libregex/stl.pat.in: Avoid machine specific configuration. 2010-05-18 Daniel Hansel * doc/oprofile.xml: Document that only kernel versions 2.6.13 or later provide support for anonymous mapped regions 2010-04-13 Maynard Johnson * libutil++/bfd_support.cpp: Fix up translate_debuginfo_syms so it doesn't rely on section index values being the same between real image and debuginfo file (to resolve problem reported by Will Cohen on Fedora 12) 2010-03-25 Oliver Schneider * libpp/parse_filename.cpp: Catch case where a basic_string::erase error can occur in opreport when parsing an invalid sample file name 2010-03-25 Maynard Johnson * events/mips/loongson2/events: New File * events/mips/loongson2/unit_masks: New File I neglected to do 'cvs add' for these new two new files back on Nov 25, 2009 when I committed the initial loongson2 support. This change corrects that error. 2010-03-01 Gabor Loki * daemon/opd_pipe.c: Fix memory leak * utils/opcontrol: Fix messages sending method to opd_pipe 2010-01-20 Maynard Johnson * m4/qt.m4: Fix qt lib check so it works on base 64-bit system See ChangeLog-2009 for earlier changelogs. oprofile-1.3.0/ChangeLog-20040000664000175000017500000007506712534404406012433 000000000000002004-12-25 Will Cohen * events/Makefile.am: Corrected type for events_files. 2004-12-12 John Levon * doc/oprofile.xml: expand list of supported CPU types. 2004-12-12 Ralf Baechle * daemon/opd_cookie.c: Define __NR_lookup_dcookie for all three supported MIPS ABIs. * events/mips/r10000/events: * events/mips/r10000/unit_masks: * events/mips/r12000/events: * events/mips/r12000/unit_masks: * events/mips/r5432/events: * events/mips/r5432/unit_masks: * events/mips/r5500/events: * events/mips/r5500/unit_masks: * events/mips/rm7000/events: * events/mips/rm7000/unit_masks: * events/mips/rm9000/events: * events/mips/rm9000/unit_masks: * events/mips/sb1/events: * events/mips/sb1/unit_masks: * events/Makefile.am: * libop/op_events.c: * utils/op_help.c: * libop/op_cpu_type.h: * libop/op_cpu_type.c: Add support for the MIPS R10000 and R12000, QED RM7000 and PMC-Sierra RM9000, NEC VR5432 and VR5500 and Sibyte SB1 processors. * README: List myself as the caretaker of the MIPS bits. 2004-11-25 Philippe Elie * libop/op_events.c: simplify a bit get_mapping() 2004-11-20 Philippe Elie * daemon/opd_stats.c: some statistics are useless, don't print them if we can't read the oprofilefs files. 2004-11-20 Philippe Elie * daemon/opd_sfile.c: sfile_clear_kenel() : clear also callgraph file depending on module. 2004-11-19 Philippe Elie * daemon/opd_sfile.h: * daemon/opd_sfile.c: fix #971487, daemon was unable to retrieve correctly callgraph sample file for kernel space samples. Fixed by adding relevant information to cg_hash_entry. * libpp/callgraph_container.cpp: more verbosity 2004-11-19 John Levon * doc/oprofile.xml: Fix AMD link (noticed by Emmanuel Araman). 2004-11-18 Philippe Elie * pp/opgprof.cpp: ensure we load all callgraph file 2004-11-18 Philippe Elie * libutil++/locate_images.cpp: ensure error is always set, callgraph_container was using an uninitialized value. 2004-11-17 Philippe Elie * libutil++/op_bfd.cpp: improve a bit the symbol chosen when multiple symbol live at same vma 2004-11-17 Philippe Elie * doc/oprofile.xml: some words about UP kernel > 2.6.9 and the need of lapic at boot. 2004-11-17 Philippe Elie * pp/common_option.h: * pp/common_option.cpp: move threshold option from here ... * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: * pp/opreport_options.cpp: * pp/opstack_options.cpp: to each of these file using it. Side effect is to remove this option from oparchive which didn't handle it. * doc/oparchive.1.in: * doc/oprofile.xml: there isn't any --threshold option to oparchive 2004-11-07 Kristis Makris * doc/internals.xml: fix typo 2004-11-01 Maynard Johnson * events/ppc64/970/events: Make min count 10000 for all PM_INST_CMPL; and remove redundant event in group 2 * events/ppc64/power4/event_mappings: Set LSB of MMCRA so kernel kludge can be removed at some later date * events/ppc64/power4/events: Make min counts consistent with ppc970 * events/ppc64/power5/events: Make min counts consistent with ppc970 2004-11-01 Greg Banks * libop/op_events.c: Make the default sample rate for IA64 sensible (i.e. 10 times smaller). 2004-10-15 Will Cohen * events/ppc64/power4/events: Corrected group 4 counter assignments. 2004-10-15 Maynard Johnson * events/Makefile.am: * events/ppc64/970/event_mappings: * events/ppc64/970/events: * events/ppc64/970/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/op_help.c: * utils/opcontrol: Added ppc64/970 support. 2004-10-14 Greg Banks * configure.in: * daemon/opd_perfmon.c: autoconf for sched_setaffinity and perfmonctl, fix sched_setaffinity call for early 2.6 kernels 2004-10-07 Will Cohen * utils/opcontrol: Correct ppc64 check that events are in same group. 2004-09-21 Will Cohen * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: Add logic to use the preferred symbol name. 2004-09-17 John Levon * utils/op_help.c: don't deref a NULL pointer on failure to read /dev/oprofile/cpu_type 2004-09-17 Anton Blanchard * libop/op_events.c: fix compile warnings 2004-09-16 John Levon * m4/configmodule.m4: disable x86-64 on 2.4 2004-09-15 Maynard P. Johnson * events/Makefile.am: * libop/op_cpu_type.h: * libop/op_events.h: * libop/op_events.c: * utils/op_help.c: * utils/opcontrol: PPC64 support 2004-09-13 John Levon * configure.in: bump to 0.8.2cvs 2004-09-11 John Levon * configure.in: bump to 0.8.1 2004-09-11 John Levon * libpp/locate_images.h: doxygen for archive_path 2004-08-18 Will Cohen * doc/oprofile.xml: List default events in documentation. 2004-08-12 John Levon * libutil++/op_bfd.cpp: we need to verify functionname is non-NULL in *both* places 2004-08-12 John Levon * libutil++/op_bfd.cpp: add a hack to support Objective C 2004-07-21 Philippe Elie * libdb/db_manage.c: thinko in #931871 bug fix. 2004-07-21 Philippe Elie * libpp/arrange_profiles.cpp: fix opreport -m lib, broken in 0.8 when using opcontrol --separate=kernel with message "add_to_profile_sample_files(): sample file parsed twice" 2004-07-18 John Levon * libop/op_mangling.c: dep image always used '{root}' token 2004-07-15 John Levon * doc/internals.xml: document some more 2004-07-09 John Levon * libpp/populate.cpp: quash timestamp warnings when using archive: profile specifier 2004-07-09 John Levon * pp/opstack_options.cpp: include call-graph files in archive. 2004-07-06 John Levon * doc/oprofile.1.in: * doc/oprofile.xml: * libpp/profile_spec.h: * libpp/profile_spec.cpp: remove sample-file and binary profile specifiers * doc/opcontrol.1.in: * doc/oprofile.xml: * pp/common_option.cpp: * utils/opcontrol: allow either "lib" or "library" for merge/separate option. Document "lib" 2004-07-06 Will Cohen * doc/oprofile.xml: * doc/Makefile.am: * doc/oparchive.1.in: * doc/oprofile.1.in: * libpp/profile_spec.cpp: * libpp/profile_spec.h: * libpp/populate.h: * libpp/populate.cpp: * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: * libpp/locate_images.cpp: * libpp/locate_images.h: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: * libutil++/file_manip.cpp: * libutil++/file_manip.h: * pp/Makefile.am: * pp/oparchive.cpp: * pp/oparchive_options.cpp: * pp/oparchive_options.h: * pp/opreport.cpp: * pp/opreport_options.h: * pp/opreport_options.cpp: * pp/opstack.cpp: * pp/opstack_options.h: * pp/opstack_options.cpp: * pp/opannotate_options.cpp: * pp/opannotate_options.h: * pp/opgprof.cpp: * pp/opgprof_options.cpp: * pp/opgprof_options.h: * pp/opannotate.cpp: * configure.in: Support for oparchive. 2004-07-05 John Levon * doc/oprofile.1.in: add opstack(1) to SEE ALSO 2004-06-21 John Levon * events/i386/p4/events: * events/i386/p4-ht/events: * module/x86/op_model_athlon.c: * module/x86/op_model_p4.c: * module/x86/op_model_ppro.c: * module/ia64/op_pmu.c: fix bug 964097 (event code of 0x00 doesn't work) by relying consistently on "enabled" not "event" 2004-05-29 John Levon * libdb/tests/Makefile.am: fix build * daemon/opd_mangling.c: * daemon/opd_mangling.h: * daemon/opd_sfile.c: * daemon/opd_sfile.h: * daemon/liblegacy/opd_sample_files.h: * libabi/abi.cpp: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libdb/Makefile.am: * libdb/db_debug.c: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/db_stat.c: * libdb/db_travel.c: * libdb/odb.h: * libdb/odb_hash.h: * libdb/tests/db_test.c: * libpp/op_header.cpp: * libpp/profile.cpp: * libpp/profile.h: s/samples_odb_t/odb_t/, move odb_hash.h to odb.h 2004-05-28 John Levon * daemon/opd_mangling.cpp: * daemon/opd_sfile.cpp: * daemon/liblegacy/opd_proc.c: * daemon/liblegacy/opd_sample_files.c: * libabi/abi_test.cpp: * libabi/op_import.cpp: * libdb/db_manage.cpp: * libdb/odb_hash.h: * libpp/profile.cpp: introduce and use odb_get_data(), odb_open_count() 2004-05-28 John Levon * libpp/callgraph_container.cpp: * libpp/arrange_profiles.cpp: trivialities 2004-05-28 Bin Ren * daemon/opd_mangling.c: * daemon/opd_sfile.c: * daemon/oprofiled.c: * daemon/liblegacy/opd_image.c: * daemon/liblegacy/opd_proc.c: * daemon/liblegacy/opd_sample_files.c: * libdb/db_debug.c: * libdb/db_insert.c: * libdb/db_manage.c: * libdb/db_stat.c: * libdb/odb_hash.h: * libdb/db_travel.c: * libpp/op_header.cpp: * libpp/profile.cpp: * libutil/op_string.c: * libutil/op_string.h: fix dcookie alias bug by introducing one level of indirection and hash sample files by path names (bug #931871) 2004-05-11 John Levon * libutil++/file_manip.h: clarify behaviour of op_realpath() * libpp/opannotate.cpp: add some checks to avoid creating files outside of the output directory 2004-05-11 Andi Kleen * libpp/callgraph_container.cpp: * libpp/profile_container.cpp: * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: use unsigned long in various places - u32 was breaking 64-bit usage 2004-05-11 John Levon * configure.in: bump to 0.8.1cvs 2004-05-07 John Levon * configure.in: bump to 0.8 2004-05-07 John Levon * libpp/filename_spec.h: * libpp/filename_spec.cpp: * libpp/profile_spec.cpp: "dependant" not "dependent" 2004-04-19 Will Cohen * events/i386/p4/unit_masks: * events/i386/p4-ht/unit_masks: Correct machine_clear unit mask. 2004-04-04 Will Cohen * m4/builtinexpect.m4: * m4/compileroption.m4: * m4/configmodule.m4: * m4/copyifchange.m4: * m4/docbook.m4: * m4/extradirs.m4: * m4/findkernel.m4: * m4/kerneloption.m4: * m4/kernelversion.m4: * m4/mallocattribute.m4: * m4/poptconst.m4: * m4/precompiledheader.m4: * m4/qt.m4: * m4/resultyn.m4: * m4/sstream.m4: * m4/typedef.m4: Add quotes as required for automake 1.8. 2004-04-04 John Levon * doc/oprofile.xml: improvements to the call-graph * documentation. 2004-03-28 Philippe Elie * libutil++/op_bfd.cpp: remove spurious cerr <<; fix a potential memory leak 2004-03-28 John Levon * libutil++/op_bfd.cpp: fix a BFD leak on format failure. Fix a small race when the binary changes, and we error fatally instead of recovering. 2004-03-22 Philippe Elie * module/x86/hammer_op_syscalls.c: use the first map with VM_EXECUTABLE bit to do the exec notification, this fix a 32 bits application profiling regression. We dunno exactly what is this second mmap ... but we must ignore one of these. Fix #921243 2004-03-22 Philippe Elie * module/ia64/op_pmu.c: the way to set pfm_syst_wide and pfm_dcr_pp changed between 2.4.19 and 2.4.20 2004-03-22 Will Cohen * utils/opcontrol: Correct order of do_init_daemon_vars and decide_orofile_devices. 2004-03-22 Will Cohen * utils/opcontrol: Tweak error messages and factor out common code. 2004-03-19 Anton Blanchard * daemon/opd_sfile.c: Add function name to some error messages 2004-03-04 Philippe Elie * utils/opcontrol: tweak a bit error message. 2004-03-03 Will Cohen * utils/opcontrol: Support --dump for normal users. 2004-02-29 Philippe Elie * libpp/callgraph_container.cpp: make g++ -D_GLIBCXX_DEBUG happy, see http://gcc.gnu.org/PR14340 * module/op_dcache.h: * module/op_dname.c: some gcc version are confused by extern declaration followed by later static. 2004-02-28 Zwane Mwaikambo * libutil++/op_bfd.cpp: * utils/opcontrol: This patch fixes the listing of symbols within the kernel image on ARM i was having. The problem was due to the fact that ARM/Linux kernel text starts with a section called .init unlike all the currently supported Linux architectures. So the solution is to start at section 0 2004-02-28 Philippe Elie * module/x86/op_syscalls.c: warning fix 2004-02-23 Philippe Elie * daemon/Makefile.am: * daemon/liblegacy/Makefile.am: force daemon build with frame pointer. If daemon is built w/o frame pointer we get random arc, some of them go in the vma used by an existing mmaped sample file, so cookie lookup return a sample filename which is used as a from or to component, this break pptools by creating invalid filename. Note this doesn't protect agaisnt a make CFLAGS=-fomit-frame-pointer. * libpp/callgraph_container.cpp: use the right {cg_}image_name for verbose output. 2004-02-21 Philippe Elie * libpp/format_flags.h: * libpp/format_output.cpp: * libpp/format_output.h: * pp/opstack.cpp: alternate output format. 2004-02-20 Philippe Elie * doc/srcdoc/Doxyfile.in: Fix for doxygen 1.3.6 * libpp/profile_spec.h: * libutil++/op_bfd.h: minor Doxygen comments fix 2004-02-20 Philippe Elie * libutil++/tests/string_manip_tests.cpp: fix a $ make check failure from the last format_percent() change 2004-02-18 Philippe Elie * libpp/format_output.cpp: change output spacing. 2004-02-17 Philippe Elie * pp/opstack_options.h: * pp/opstack.cpp: pass mege_options::lib to callgraph_container * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: handle merge_options::lib 2004-02-17 Philippe Elie * libpp/format_output.cpp: use "self/child" for header * libutil++/string_manip.cpp: format_percent() return "0" if value == 0.0 * libpp/callgraph_container.cpp: remove some dead code. 2004-02-16 Philippe Elie * module/compat24.h: * module/x86/cpu_type.c: * module/x86/op_apic.c: * module/x86/op_model_p4.c: * module/x86/op_nmi.c: * module/x86/op_x86_model.h: backport P4 HyperThreading support from 2.6 to 2.4. 2004-02-16 Philippe Elie * events/i386/p4/events: * events/i386/p4/unit_masks: * events/i386/p4-ht/events: * events/i386/p4-ht/unit_masks: fix MEMORY_COMPLETE unit mask 2004-02-15 Philippe Elie * libpp/profile.cpp: samples_range() throw if start > end 2004-02-15 Philippe Elie * events/ia64/itanium2/unit_masks: comments * utils/op_help.c: add --callgraph to sanitize min events count * utils/opcontrol: pass --callgraph to op_help 2004-02-15 Philippe Elie * daemon/oprofiled.c: send alarm() after fork not before, behavior changed between 2.4 and 2.6 and according to posix 2.6 is right. 2004-02-15 Philippe Elie * utils/op_help.c: output the default unit mask. when querying the default mask output it in decimal not hexadecimal * libpp/op_header.cpp: event number must be output as integer not as unsigned char type * libop/op_parse_event.c: clarify error message * libop/op_events.c: better validation of unit mask * events/ia64/itanium2/unit_masks: * events/x86-64/hammer/unit_masks: fix so make check pass, done through documentation reading. 2004-02-13 Philippe Elie * events/i386/p4-ht/events: multiply all minimum count by two 2004-02-12 Philippe Elie * daemon/opd_stats.c: handle new statistics added in callgraph patch 2004-02-11 Will Cohen * utils/opcontrol: fix normalise_events for default event. 2004-02-10 Will Cohen * events/i386/p6_mobile/events: * events/i386/p6_mobile/unit_masks: * events/Makefile.am: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/op_help.c: Add support for Pentium M (Centrino). 2004-02-10 Philippe Elie * events/i386/p4/events: s/instructions/uops/ when appropriate * events/i386/p4/unit_masks: change many bitmask to mandatory, fix invalid default value, remove mask only used with HyperThreading * events/i386/p4-ht/unit_masks: s/bitmask/mandatory. Remove unused unit mask * libop/op_events.h: * libop/op_events.c: warn if an unit mask is not used (this add a warning for Itanium2, added in TODO) * libop/op_parse_event.c: don't silently accept invalid value as zero (e.g FOO:3000:0xx21 was accepted as FOO:3000:0x0) * utils/opcontrol: mandatory default value was rejected because we checked the events before getting the default unit mask. 2004-02-08 Zwane Mwaikambo * daemon/opd_cookie.c: Fix syscall base number. 2004-02-08 Zwane Mwaikambo * daemon/opd_cookie.c: arm support for timer interrupt 2004-02-08 Philippe Elie * daemon/liblegacy/opd_sample_files.c: op_mangle_filename() presume mangle_values::dep_name is never NULL, this fix a daemon segfault with 2.4 kernel 2004-02-07 Philippe Elie * events/i386/p4/unit_masks: * events/i386/p4-ht/unit_masks: global_power_events need mandatory unit mask 2004-02-07 Philippe Elie * libpp/arrange_profiles.cpp: re-order function to fix a build problem with gcc 3.3.1 2004-02-05 Philippe Elie * libpp/callgraph_container.cpp: tweak computation of callee_counts 2004-02-05 Philippe Elie * libpp/callgraph_container.cpp: Big Thinko (tm), callee samples offset are unordered 2004-02-04 Philippe Elie * libpp/callgraph_container.cpp: * libpp/format_output.cpp: arc_recorder::get_caller()/get_callee() name was reversed (caught by Will Cohen) 2004-02-02 Philippe Elie * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * pp/opreport_options.h: * pp/opstack.cpp: implement --threshold 2004-02-02 Will Cohen * libpp/callgraph_container.h: * libpp/format_output.h: missing std:: in header. 2004-02-01 Philippe Elie * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: rewrite populate() and ehance caller_callee_recorder to support multiple profile classes. * pp/opstack_options.cpp: accept multiple profile class 2004-02-01 Philippe Elie * libpp/callgraph_container.cpp: get correct source filenname liner * libpp/format_output.cpp: re-factorize a bit by moving anon namespace from format_output:: to :: 2004-02-01 Philippe Elie * doc/oprofile.xml: * doc/opstack.1.in: document new options * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: improve readability, add linenr debug information recording partially, see TODO * libpp/format_output.h: s/formatter/opreport_formatter, define cg_formatter * libpp/format_output.cpp: implement cg_formatter, factorize some code in formatter base class * pp/opreport.cpp: s/formatter/opreport_formatter * pp/opstack_options.h: * pp/opstack_options.cpp: implement output selection/formatting options * pp/opstack.cpp: use cg_formatter for output. 2004-01-30 Philippe Elie commit not itended but tree is stable so add a ChangeLog ... * libpp/Makefile.am: * libpp/symbol.cpp: new file for output_hint() * libpp/profile_container.cpp: use output_hint() * libpp/callgraph_container.cpp: * libpp/callgraph_container.h: * libpp/symbol.h: * pp/opstack.cpp: get output hint from the callgraph container. 2004-01-29 Philippe Elie * daemon/init.c: * daemon/opd_events.c: * daemon/opd_kernel.c: * daemon/opd_mangling.c: * daemon/opd_printf.h: * daemon/opd_sfile.c: * daemon/opd_trans.c: * daemon/oprofiled.c: * daemon/oprofiled.h: * daemon/liblegacy/init.c: * daemon/liblegacy/opd_image.c: * daemon/liblegacy/opd_kernel.c: * daemon/liblegacy/opd_mapping.c: * daemon/liblegacy/opd_parse_proc.c: * daemon/liblegacy/opd_proc.c: * daemon/liblegacy/opd_sample_files.c: * utils/opcontrol: split daemon --verbose, w/o argument it's synonymous to --verbose=all. Better splitting is welcome * daemon/opd_sfile.c: Fix thinko, opcontrol --reset coredump'ed 2004-01-29 Philippe Elie * libop/op_events.c: * utils/op_help.c: don't use default in switch (cpu_type) to ensure adding a cpu type will issue a warning where we forget to handle it. 2004-01-28 Philippe Elie * daemon/opd_sfile.c: invert from/to start offset for kernel samples * pp/opstack.cpp: * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: if we can't bfd_open a binary and the sample file show it's a kernel sample file we must ignore completely the it. (Added to TODO, there is something fragile here) 2004-01-28 Philippe Elie * libpp/image_errors.cpp: typo, warn at first error not from second 2004-01-28 Philippe Elie * libutil++/tests/utility_tests.cpp: * libopt++/popt_options.cpp: s/template * daemon/init.c: show buffer read only when --verbose * libpp/image_errors.cpp: * libpp/image_errors.h: add needed API for callgraph image error * libpp/callgraph_container.cpp: use it. * pp/opstack.cpp: report_image_errors() 2004-01-27 Philippe Elie * libutil++/op_bfd.cpp: Fix bfd_find_nearest_line() and separate debug info, please test it. 2004-01-27 Philippe Elie * doc/opcontrol.1.in: * doc/oprofile.xml: * utils/opcontrol: add --cpu-buffer-size and document it. 2004-01-27 Will Cohen * events/i386/p4/unit_masks: * events/i386/p4-ht/unit_masks: correct branch_type unit mask. 2004-01-25 John Levon * doc/Makefile.am: fix make chunk * doc/buffers.dia: add editable source * doc/buffers.png: fix stupid typos * doc/internals.xml: add some more text 2004-01-25 Philippe Elie * libpp/parse_filename.h: * libpp/parse_filename.cpp: profile_spec_equal() new predicate * libpp/arrange_profiles.cpp: use it to ensure we create a new profile_samples_file when needed. 2004-01-24 John Levon * doc/oprofile.1.in: * doc/opstack.1.in: some cleanups * libop/tests/load_events_files_tests.c: * libop/tests/alloc_counter_tests.c: * libop/op_events.c: rename env var to OPROFILE_EVENTS_DIR 2004-01-20 Philippe Elie * daemon/opd_sfile.c: (getfile()) avoid out of bound sf->files[] access 2004-01-20 Philippe Elie * libpp/callgraph_container.cpp: tweak comparator to sort arcs. * pp/common_option.cpp: typo. 2004-01-20 Philippe Elie * doc/opannotate.1.in: * doc/opgprof.1.in: * doc/opreport.1.in: * doc/oprofile.xml: * doc/opstack.1.in: document --verbose options a bit * libutil++/cverb.cpp: * libutil++/cverb.h: * pp/common_option.cpp: remove vlevel2 verbose object 2004-01-20 Philippe Elie * libutil++/cverb.h: * libutil++/cverb.cpp: new cverb handling. most interresting are --verbose=sfile,bfd,level1 resp. sample filename handling bfd handling and more verbosity (only for bfd actually) * pp/opgprof.cpp: controlled by --verbose==bfd, add level1 to get verbose symbols. * libpp/callgraph_container.cpp: * libutil++/op_bfd.cpp: * pp/common_option.cpp: * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: * pp/opreport_options.cpp: * pp/opstack_options.cpp: use it 2004-01-19 John Levon * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: rename caller_callee_recorder to arc_recorder. * doc/CodingStyle: mention trailing comments * utils/opcontrol: fix formatting. Error if --note-table-size is passed on 2.6 kernels. 2004-01-18 Philippe Elie * libdb/db_debug.c: fix build on alpha * libpp/callgraph_container.cpp: missing std:: in header 2004-01-18 Philippe Elie * libpp/callgraph_container.cpp: Obviously not2(weak_ordering_function) is not a weak_ordering function leading to mysterious segfault during sort. 2004-01-18 Philippe Elie * doc/opstack.1.in: new file, describe opstack usage * doc/oprofile.xml: describe opstack 2004-01-18 Philippe Elie * libutil++/op_bfd.cpp: Don't fix symbol offset for symbol definition coming from the original file. A corner case remain broken: symbols definition coming from debug file and belonging to another section than .text are incorrecttly offseted. 2004-01-18 Philippe Elie * libop/op_sample_file.h: with cg file we need two field is_kernel. * daemon/opd_events.c: * daemon/opd_events.h: * daemon/opd_mangling.c: * daemon/liblegacy/opd_sample_files.c: handle cg_to_is_kernel * pp/populate.cpp: * pp/populate.h: * pp/image_errors.cpp: * pp/image_errors.h: move this four files to libpp * libpp/populate.cpp: we can get empty filename now, ignore them. * libpp/image_error.h: remove this file by moving its contents ... * libpp/image_errors.h here (this two filenames was confusing) * libpp/Makefile.am: update according to files move. * libpp/arrange_profiles.h: * libpp/arrange_profiles.cpp: Fix find_profile_sample_files(), I was creating to many profile_sample_files. Add a bunch of operator<<. * libpp/callgraph_container.h: * libpp/callgraph_container.cpp: * libpp/filename_spec.h: add cg_filename member * libpp/filename_spec.cpp: handle cg_filename, Fix an error in is_dependant(), I'm a bit nervous about this predicate... * libpp/locate_images.h: * libpp/locate_images.cpp: #include fix * libpp/parse_filename.cpp: Fix cg filename handling to not trigger some invalid_filename error with cg filename. * libpp/profile.h: * libpp/profile.cpp: we can no longer assume we use u32, so use odb_key_t in public interface. Add operator== acting on iterator * libpp/symbol_container.cpp: * libpp/symbol_container.h: add find(symbol const &); * libpp/profile_container.h: * libpp/profile_container.cpp: add a public interface to iterate over all smybols and to find a specific symbol * libpp/symbol.h: typo, missing include * pp/Makefile.am: handle opstack various new files and files move to libpp. * pp/opreport.cpp: * pp/opannotate.cpp: pass symbol_filter as params to populate() * pp/opannotate_options.cpp: add verbose output of profile_classes * pp/opgprof_options.cpp: * pp/opreport_options.cpp: * pp/opstack.cpp: * pp/opstack_options.cpp: * pp/opstack_options.h: new callgraph utility far to be complete but enough to start to play with callgraph. 2004-01-04 Philippe Elie * libutil/op_fileio.c: op_write_file(): allow to write zero byte. * libutil/op_fileio.h: add fatal error for opd_read_int_from_file() * daemon/init.c: add fatal error for opd_read_fs_int * daemon/oprofiled.c: * daemon/oprofiled.h: * daemon/liblegacy/init.c: * daemon/liblegacy/opd_24_stats.c: use this new fatal parameter * daemon/opd_stats.c: dump /dev/oprofile/stats/* * daemon/opd_sfile.c: * daemon/opd_sfile.h: augment opd_sfile with an hash table of related call graph file * daemon/opd_mangling.c: * daemon/opd_mangling.h: * daemon/liblegacy/opd_sample_files.c: * libop/op_mangle.c: * libop/op_mangle.h: use new mangling name scheme, in short word: {dep} part is no longer optionnal, a {cg}/binary_name can optionnally follow the {dep} part * libop/tests/mangle_tests.c: update test according to sample filename change * libpp/filename_spec.cpp: * libpp/filename_spec.h: filename_spec::is_dependant() new function * libpp/parse_filename.h: add a cg_image member * libpp/parse_filename.cpp: handle callgraph filename * libpp/arrange_profiles.cpp: * libpp/arrange_profiles.h: rather to use string for sample files, use a { string sample_filename, list cg_files }, if {dep} part != {cg} part it's a cross-call binary. Note the sample_filename string can be empty (callgraph file w/o any samples into a binary) * libpp/profile_spec.h: * libpp/profile_spec.cpp: fix filtering of callgraph filename (this fix Carlo problem where opreport die with an invalid_filename error) * pp/opgprof.cpp: use the new arrange_profiles.h API to acquire callgraph filename associated with a binary * pp/opgprof_options.cpp: don't filter callgraph filename * pp/opreport.cpp: * pp/populate.cpp: update according arrange_profile API change * utils/opcontrol: add --callgraph=#depth parameter * doc/opcontrol.1.in: * doc/oprofile.xml: document opcontrol --callgraph=#depth 2004-01-16 Will Cohen * libutil++/op_bfd.cpp: Always use filepos of original file. 2004-01-16 Will Cohen * libop/op_config.h (DEBUGDIR): New. * libutil/op_fileio.h: * libutil/op_fileio.c: New function calc_crc32 * libutil++/Makefile.am: Add libop to include directory. * libutil++/op_bfd.h: * libutil++/op_bfd.cpp: New functions separate_debug_file_exists, get_debug_link_info, find_separate_debug_file, open_bfd, and get_symbols_from_file to support separate debug files. 2004-01-02 Philippe Elie * pp/opgprof_options.cpp: use the proper type for options::demangle 2004-01-01 Philippe Elie * libregex/op_regex.cpp: * libregex/op_regex.h: tidy a bit private interface 2004-01-01 Philippe Elie * gui/oprof_start_config.h: * gui/oprof_start_util.h: * libpp/symbol.h: * libutil++/cverb.cpp: * libutil++/cverb.h: * pp/opannotate_options.cpp: * pp/opgprof_options.cpp: move some #include <> from .h to .cpp 2004-01-01 Philippe Elie * libregex/op_regex.cpp: don't assume int('a') > int('0') See ChangeLog-2004 for earlier changelogs. oprofile-1.3.0/compile0000755000175000017500000001624512535323746011653 00000000000000#! /bin/sh # Wrapper for compilers which do not understand '-c -o'. scriptversion=2012-10-14.11; # UTC # Copyright (C) 1999-2013 Free Software Foundation, Inc. # Written by Tom Tromey . # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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} static __inline odb_node_t * odb_to_node_base(odb_data_t * data) { return (odb_node_t *)(((char *)data->base_memory) + data->offset_node); } static __inline odb_index_t * odb_to_hash_base(odb_data_t * data) { return (odb_index_t *)(((char *)data->base_memory) + data->offset_node + (data->descr->size * sizeof(odb_node_t))); } /** * return the number of bytes used by hash table, node table and header. */ static unsigned int tables_size(odb_data_t const * data, odb_node_nr_t node_nr) { size_t size; size = node_nr * (sizeof(odb_index_t) * BUCKET_FACTOR); size += node_nr * sizeof(odb_node_t); size += data->offset_node; return size; } int odb_grow_hashtable(odb_data_t * data) { unsigned int old_file_size; unsigned int new_file_size; unsigned int pos; void * new_map; old_file_size = tables_size(data, data->descr->size); new_file_size = tables_size(data, data->descr->size * 2); if (ftruncate(data->fd, new_file_size)) return 1; new_map = mremap(data->base_memory, old_file_size, new_file_size, MREMAP_MAYMOVE); if (new_map == MAP_FAILED) return 1; data->base_memory = new_map; data->descr = odb_to_descr(data); data->descr->size *= 2; data->node_base = odb_to_node_base(data); data->hash_base = odb_to_hash_base(data); data->hash_mask = (data->descr->size * BUCKET_FACTOR) - 1; /* rebuild the hash table, node zero is never used. This works * because layout of file is node table then hash table, * sizeof(node) > sizeof(bucket) and when we grow table we * double size ==> old hash table and new hash table can't * overlap so on the new hash table is entirely in the new * memory area (the grown part) and we know the new hash * hash table is zeroed. That's why we don't need to zero init * the new table */ /* OK: the above is not exact * if BUCKET_FACTOR < sizeof(bd_node_t) / sizeof(bd_node_nr_t) * all things are fine and we don't need to init the hash * table because in this case the new hash table is completely * inside the new growed part. Avoiding to touch this memory is * useful. */ #if 0 for (pos = 0 ; pos < data->descr->size*BUCKET_FACTOR ; ++pos) data->hash_base[pos] = 0; #endif for (pos = 1; pos < data->descr->current_size; ++pos) { odb_node_t * node = &data->node_base[pos]; size_t index = odb_do_hash(data, node->key); node->next = data->hash_base[index]; data->hash_base[index] = pos; } return 0; } void odb_init(odb_t * odb) { odb->data = NULL; } /* the default number of page, calculated to fit in 4096 bytes */ #define DEFAULT_NODE_NR(offset_node) 128 #define FILES_HASH_SIZE 512 static struct list_head files_hash[FILES_HASH_SIZE]; static void init_hash() { size_t i; for (i = 0; i < FILES_HASH_SIZE; ++i) list_init(&files_hash[i]); } static odb_data_t * find_samples_data(size_t hash, char const * filename) { struct list_head * pos; /* FIXME: maybe an initial init routine ? */ if (files_hash[0].next == NULL) { init_hash(); return NULL; } list_for_each(pos, &files_hash[hash]) { odb_data_t * entry = list_entry(pos, odb_data_t, list); if (strcmp(entry->filename, filename) == 0) return entry; } return NULL; } int odb_open(odb_t * odb, char const * filename, enum odb_rw rw, size_t sizeof_header) { struct stat stat_buf; odb_node_nr_t nr_node; odb_data_t * data; size_t hash; int err = 0; int flags = (rw == ODB_RDWR) ? (O_CREAT | O_RDWR) : O_RDONLY; int mmflags = (rw == ODB_RDWR) ? (PROT_READ | PROT_WRITE) : PROT_READ; hash = op_hash_string(filename) % FILES_HASH_SIZE; data = find_samples_data(hash, filename); if (data) { odb->data = data; data->ref_count++; return 0; } data = xmalloc(sizeof(odb_data_t)); memset(data, '\0', sizeof(odb_data_t)); list_init(&data->list); data->offset_node = sizeof_header + sizeof(odb_descr_t); data->sizeof_header = sizeof_header; data->ref_count = 1; data->filename = xstrdup(filename); data->fd = open(filename, flags, 0644); if (data->fd < 0) { err = errno; goto out; } if (fstat(data->fd, &stat_buf)) { err = errno; goto fail; } if (stat_buf.st_size == 0) { size_t file_size; if (rw == ODB_RDONLY) { err = EIO; goto fail; } nr_node = DEFAULT_NODE_NR(data->offset_node); file_size = tables_size(data, nr_node); if (ftruncate(data->fd, file_size)) { err = errno; goto fail; } } else { /* Calculate nr node allowing a sanity check later */ nr_node = (stat_buf.st_size - data->offset_node) / ((sizeof(odb_index_t) * BUCKET_FACTOR) + sizeof(odb_node_t)); } data->base_memory = mmap(0, tables_size(data, nr_node), mmflags, MAP_SHARED, data->fd, 0); if (data->base_memory == MAP_FAILED) { err = errno; goto fail; } data->descr = odb_to_descr(data); if (stat_buf.st_size == 0) { data->descr->size = nr_node; /* page zero is not used */ data->descr->current_size = 1; } else { /* file already exist, sanity check nr node */ if (nr_node != data->descr->size) { err = EINVAL; goto fail_unmap; } } data->hash_base = odb_to_hash_base(data); data->node_base = odb_to_node_base(data); data->hash_mask = (data->descr->size * BUCKET_FACTOR) - 1; list_add(&data->list, &files_hash[hash]); odb->data = data; out: return err; fail_unmap: munmap(data->base_memory, tables_size(data, nr_node)); fail: close(data->fd); free(data->filename); free(data); odb->data = NULL; goto out; } void odb_close(odb_t * odb) { odb_data_t * data = odb->data; if (data) { data->ref_count--; if (data->ref_count == 0) { size_t size = tables_size(data, data->descr->size); list_del(&data->list); munmap(data->base_memory, size); if (data->fd >= 0) close(data->fd); free(data->filename); free(data); odb->data = NULL; } } } int odb_open_count(odb_t const * odb) { if (!odb->data) return 0; return odb->data->ref_count; } void * odb_get_data(odb_t * odb) { return odb->data->base_memory; } void odb_sync(odb_t const * odb) { odb_data_t * data = odb->data; size_t size; if (!data) return; size = tables_size(data, data->descr->size); msync(data->base_memory, size, MS_ASYNC); } oprofile-1.3.0/libdb/db_insert.c0000664000175000017500000000521512603572700013453 00000000000000/** * @file db_insert.c * Inserting a key-value pair into a DB * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #define _GNU_SOURCE #include #include #include #include #include "odb.h" static inline int add_node(odb_data_t * data, odb_key_t key, odb_value_t value) { odb_index_t new_node; odb_node_t * node; odb_index_t index; /* no locking is necessary: iteration interface retrieve data through * the node_base array, we doesn't increase current_size now but it's * done by odb_commit_reservation() so the new slot is visible only * after the increment */ if (data->descr->current_size >= data->descr->size) { if (odb_grow_hashtable(data)) return EINVAL; } new_node = data->descr->current_size; node = &data->node_base[new_node]; node->value = value; node->key = key; index = odb_do_hash(data, key); node->next = data->hash_base[index]; data->hash_base[index] = new_node; /* FIXME: we need wrmb() here */ odb_commit_reservation(data); return 0; } int odb_update_node(odb_t * odb, odb_key_t key) { return odb_update_node_with_offset(odb, key, 1); } int odb_update_node_with_offset(odb_t * odb, odb_key_t key, unsigned long int offset) { odb_index_t index; odb_node_t * node; odb_data_t * data; data = odb->data; index = data->hash_base[odb_do_hash(data, key)]; while (index) { node = &data->node_base[index]; if (node->key == key) { if (node->value + offset != 0) { node->value += offset; } else { /* post profile tools must handle overflow */ /* FIXME: the tricky way will be just to add * a goto to jump right before the return * add_node(), in this way we no longer can * overflow. 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static int verbose = 0; #define verbprintf(args...) \ do { \ if (verbose) \ printf(args); \ } while (0) static double used_time(void) { struct rusage usage; getrusage(RUSAGE_SELF, &usage); return (usage.ru_utime.tv_sec + usage.ru_stime.tv_sec) * 1E9 + ((usage.ru_utime.tv_usec + usage.ru_stime.tv_usec)) * 1000; } /* update nr item */ static void speed_test(int nr_item, char const * test_name) { int i; double begin, end; odb_t hash; int rc; rc = odb_open(&hash, TEST_FILENAME, ODB_RDWR, sizeof(struct opd_header)); if (rc) { fprintf(stderr, "%s", strerror(rc)); exit(EXIT_FAILURE); } begin = used_time(); for (i = 0 ; i < nr_item ; ++i) { rc = odb_update_node(&hash, i); if (rc != EXIT_SUCCESS) { fprintf(stderr, "%s", strerror(rc)); exit(EXIT_FAILURE); } } end = used_time(); odb_close(&hash); verbprintf("%s: nr item: %d, elapsed: %f ns\n", test_name, nr_item, (end - begin) / nr_item); } static void do_speed_test(void) { int i; for (i = 100000; i <= 10000000; i *= 10) { // first test count insertion, second fetch and incr count speed_test(i, "insert"); speed_test(i, "update"); remove(TEST_FILENAME); } } static int test(int nr_item, int nr_unique_item) { int i; odb_t hash; int ret; int rc; rc = odb_open(&hash, TEST_FILENAME, ODB_RDWR, sizeof(struct opd_header)); if (rc) { fprintf(stderr, "%s", strerror(rc)); exit(EXIT_FAILURE); } for (i = 0 ; i < nr_item ; ++i) { odb_key_t key = (random() % nr_unique_item) + 1; rc = odb_update_node(&hash, key); if (rc != EXIT_SUCCESS) { fprintf(stderr, "%s", strerror(rc)); exit(EXIT_FAILURE); } } ret = odb_check_hash(&hash); odb_close(&hash); remove(TEST_FILENAME); return ret; } static void do_test(void) { int i, j; for (i = 1000; i <= 100000; i *= 10) { for (j = 100 ; j <= i / 10 ; j *= 10) { if (test(i, j)) { fprintf(stderr, "%s:%d failure for %d %d\n", __FILE__, __LINE__, i, j); nr_error++; } else { verbprintf("test() ok %d %d\n", i, j); } } } } static void sanity_check(char const * filename) { odb_t hash; int rc; rc = odb_open(&hash, filename, ODB_RDONLY, sizeof(struct opd_header)); if (rc) { fprintf(stderr, "%s", strerror(rc)); exit(EXIT_FAILURE); } if (odb_check_hash(&hash)) { fprintf(stderr, "checking file %s FAIL\n", filename); ++nr_error; } else if (verbose) { odb_hash_stat_t * stats; stats = odb_hash_stat(&hash); odb_hash_display_stat(stats); odb_hash_free_stat(stats); } odb_close(&hash); } int main(int argc, char * argv[1]) { /* if a filename is given take it as: "check this db" */ if (argc > 1) { int i; verbose = 1; if (!strcmp(argv[1], "--speed")) goto speed_test; for (i = 1 ; i < argc ; ++i) sanity_check(argv[i]); return 0; } speed_test: remove(TEST_FILENAME); do_test(); do_speed_test(); if (nr_error) printf("%d error occured\n", nr_error); return nr_error ? EXIT_FAILURE : EXIT_SUCCESS; } oprofile-1.3.0/libdb/db_stat.c0000664000175000017500000000451112534404406013120 00000000000000/** * @file db_stat.c * Statistics routines for libdb * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include #include #include "odb.h" #include "op_types.h" /// hold various statistics data for a db file struct odb_hash_stat_t { odb_node_nr_t node_nr; /**< allocated node number */ odb_node_nr_t used_node_nr; /**< in use node number */ count_type total_count; /**< cumulated samples count */ odb_index_t hash_table_size; /**< hash table entry number */ odb_node_nr_t max_list_length; /**< worst case */ double average_list_length; /**< average case */ /* do we need variance ? */ }; odb_hash_stat_t * odb_hash_stat(odb_t const * odb) { size_t max_length = 0; double total_length = 0.0; size_t nr_non_empty_list = 0; size_t pos; odb_data_t * data = odb->data; odb_hash_stat_t * result = calloc(1, sizeof(odb_hash_stat_t)); if (!result) { fprintf(stderr, "not enough memory\n"); exit(EXIT_FAILURE); } result->node_nr = data->descr->size; result->used_node_nr = data->descr->current_size; result->hash_table_size = data->descr->size * BUCKET_FACTOR; /* FIXME: I'm dubious if this do right statistics for hash table * efficiency check */ for (pos = 0 ; pos < result->hash_table_size ; ++pos) { size_t cur_length = 0; size_t index = data->hash_base[pos]; while (index) { result->total_count += data->node_base[index].value; index = data->node_base[index].next; ++cur_length; } if (cur_length > max_length) max_length = cur_length; if (cur_length) { total_length += cur_length; ++nr_non_empty_list; } } result->max_list_length = max_length; result->average_list_length = (!nr_non_empty_list) ? 0 : total_length / nr_non_empty_list; return result; } void odb_hash_display_stat(odb_hash_stat_t const * stat) { printf("total node number: %d\n", stat->node_nr); printf("total used node: %d\n", stat->used_node_nr); printf("total count: %llu\n", stat->total_count); printf("hash table size: %d\n", stat->hash_table_size); printf("greater list length: %d\n", stat->max_list_length); printf("average non empty list length: %2.4f\n", stat->average_list_length); } void odb_hash_free_stat(odb_hash_stat_t * stat) { free(stat); } oprofile-1.3.0/libdb/odb.h0000664000175000017500000001760312603572700012257 00000000000000/** * @file odb.h * This file contains various definitions and interface for management * of in-memory, through mmaped file, growable hash table, that stores * sample files. * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #ifndef ODB_HASH_H #define ODB_HASH_H #include #include #include "op_list.h" /** the type of key. 64-bit because CG needs 32-bit pair {from,to} */ typedef uint64_t odb_key_t; /** the type of an information in the database */ typedef unsigned int odb_value_t; /** the type of index (node number), list are implemented through index */ typedef unsigned int odb_index_t; /** the type store node number */ typedef odb_index_t odb_node_nr_t; /** store the hash mask, hash table size are always power of two */ typedef odb_index_t odb_hash_mask_t; /* there is (bucket factor * nr node) entry in hash table, this can seem * excessive but hash coding eip don't give a good distributions and our * goal is to get a O(1) amortized insert time. bucket factor must be a * power of two. FIXME: see big comment in odb_hash_add_node, you must * re-enable zeroing hash table if BUCKET_FACTOR > 2 (roughly exact, you * want to read the comment in odb_hash_add_node() if you tune this define) */ #define BUCKET_FACTOR 1 /** a db hash node */ typedef struct { odb_key_t key; /**< eip */ odb_value_t value; /**< samples count */ odb_index_t next; /**< next entry for this bucket */ } odb_node_t; /** the minimal information which must be stored in the file to reload * properly the data base, following this header is the node array then * the hash table (when growing we avoid to copy node array) */ typedef struct { odb_node_nr_t size; /**< in node nr (power of two) */ odb_node_nr_t current_size; /**< nr used node + 1, node 0 unused */ int padding[6]; /**< for padding and future use */ } odb_descr_t; /** a "database". this is an in memory only description. * * We allow to manage a database inside a mapped file with an "header" of * unknown size so odb_open get a parameter to specify the size of this header. * A typical use is: * * struct header { int etc; ... }; * odb_open(&hash, filename, ODB_RW, sizeof(header)); * so on this library have no dependency on the header type. * * the internal memory layout from base_memory is: * the unknown header (sizeof_header) * odb_descr_t * the node array: (descr->size * sizeof(odb_node_t) entries * the hash table: array of odb_index_t indexing the node array * (descr->size * BUCKET_FACTOR) entries */ typedef struct odb_data { odb_node_t * node_base; /**< base memory area of the page */ odb_index_t * hash_base; /**< base memory of hash table */ odb_descr_t * descr; /**< the current state of database */ odb_hash_mask_t hash_mask; /**< == descr->size - 1 */ unsigned int sizeof_header; /**< from base_memory to odb header */ unsigned int offset_node; /**< from base_memory to node array */ void * base_memory; /**< base memory of the maped memory */ int fd; /**< mmaped memory file descriptor */ char * filename; /**< full path name of sample file */ int ref_count; /**< reference count */ struct list_head list; /**< hash bucket list */ } odb_data_t; typedef struct { odb_data_t * data; } odb_t; #ifdef __cplusplus extern "C" { #endif /* db_manage.c */ /** how to open the DB file */ enum odb_rw { ODB_RDONLY = 0, /**< open for read only */ ODB_RDWR = 1 /**< open for read and/or write */ }; /** * odb_init - initialize a DB file * @param odb the DB file to init */ void odb_init(odb_t * odb); /** * odb_open - open a DB file * @param odb the data base object to setup * @param filename the filename where go the maped memory * @param rw \enum ODB_RW if opening for writing, else \enum ODB_RDONLY * @param sizeof_header size of the file header if any * * The sizeof_header parameter allows the data file to have a header * at the start of the file which is skipped. * odb_open() always preallocate a few number of pages. * returns 0 on success, errno on failure */ int odb_open(odb_t * odb, char const * filename, enum odb_rw rw, size_t sizeof_header); /** Close the given ODB file */ void odb_close(odb_t * odb); /** return the number of times this sample file is open */ int odb_open_count(odb_t const * odb); /** return the start of the mapped data */ void * odb_get_data(odb_t * odb); /** issue a msync on the used size of the mmaped file */ void odb_sync(odb_t const * odb); /** * grow the hashtable in such way current_size is the index of the first free * node. Take care all node pointer can be invalidated by this call. * * Node allocation is done in a two step way 1st) ensure a free node exist * eventually, caller can setup it, 2nd) commit the node allocation with * odb_commit_reservation(). * This is done in this way to ensure node setup is visible from another * process like pp tools in an atomic way. * * returns 0 on success, non zero on failure in this case this function do * nothing and errno is set by the first libc call failure allowing to retry * after cleanup some program resource. */ int odb_grow_hashtable(odb_data_t * data); /** * commit a previously successfull node reservation. This can't fail. */ static __inline void odb_commit_reservation(odb_data_t * data) { ++data->descr->current_size; } /** "immpossible" node number to indicate an error from odb_hash_add_node() */ #define ODB_NODE_NR_INVALID ((odb_node_nr_t)-1) /* db_debug.c */ /** check that the hash is well built */ int odb_check_hash(odb_t const * odb); /* db_stat.c */ typedef struct odb_hash_stat_t odb_hash_stat_t; odb_hash_stat_t * odb_hash_stat(odb_t const * odb); void odb_hash_display_stat(odb_hash_stat_t const * stats); void odb_hash_free_stat(odb_hash_stat_t * stats); /* db_insert.c */ /** update info at key by incrementing its associated value by one, * if the key does not exist a new node is created and the value associated * is set to one. * * returns EXIT_SUCCESS on success, EXIT_FAILURE on failure */ int odb_update_node(odb_t * odb, odb_key_t key); /** * odb_update_node_with_offset * @param odb the data base object to setup * @param key the hash key * @param offset the offset to be added * * update info at key by adding the specified offset to its associated value, * if the key does not exist a new node is created and the value associated * is set to offset. * * returns EXIT_SUCCESS on success, EXIT_FAILURE on failure */ int odb_update_node_with_offset(odb_t * odb, odb_key_t key, unsigned long int offset); /** Add a new node w/o regarding if a node with the same key already exists * * returns EXIT_SUCCESS on success, EXIT_FAILURE on failure */ int odb_add_node(odb_t * odb, odb_key_t key, odb_value_t value); /* db_travel.c */ /** * return a base pointer to the node array and number of node in this array * caller then will iterate through: * * odb_node_nr_t node_nr, pos; * odb_node_t * node = odb_get_iterator(odb, &node_nr); * for ( pos = 0 ; pos < node_nr ; ++pos) * // do something * * note than caller does not need to filter nil key as it's a valid key, * The returned range is all valid (i.e. should never contain zero value). */ odb_node_t * odb_get_iterator(odb_t const * odb, odb_node_nr_t * nr); static __inline unsigned int odb_do_hash(odb_data_t const * data, odb_key_t value) { /* FIXME: better hash for eip value, needs to instrument code * and do a lot of tests ... */ /* trying to combine high order bits his a no-op: inside a binary image * high order bits don't vary a lot, hash table start with 7 bits mask * so this hash coding use bits 0-7, 8-15. Hash table is stored in * files avoiding to rebuilding them at profiling re-start so * on changing do_hash() change the file format! */ uint32_t temp = (value >> 32) ^ value; return ((temp << 0) ^ (temp >> 8)) & data->hash_mask; } #ifdef __cplusplus } #endif #endif /* !ODB_H */ oprofile-1.3.0/libdb/db_debug.c0000664000175000017500000000542312534404406013236 00000000000000/** * @file db_debug.c * Debug routines for libdb * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie */ #include #include #include #include "odb.h" static int check_circular_list(odb_data_t const * data) { odb_node_nr_t pos; int do_abort = 0; unsigned char * bitmap = malloc(data->descr->current_size); memset(bitmap, '\0', data->descr->current_size); for (pos = 0 ; pos < data->descr->size * BUCKET_FACTOR ; ++pos) { odb_index_t index = data->hash_base[pos]; if (index && !do_abort) { while (index) { if (bitmap[index]) do_abort = 1; bitmap[index] = 1; index = data->node_base[index].next; } } if (do_abort) { printf("circular list detected size: %d\n", data->descr->current_size); memset(bitmap, '\0', data->descr->current_size); index = data->hash_base[pos]; while (index) { printf("%d ", index); if (bitmap[index]) exit(1); bitmap[index] = 1; index = data->node_base[index].next; } } /* purely an optimization: intead of memset the map reset only * the needed part: not my use to optimize test but here the * test was so slow it was useless */ index = data->hash_base[pos]; while (index) { bitmap[index] = 1; index = data->node_base[index].next; } } free(bitmap); return do_abort; } static int check_redundant_key(odb_data_t const * data, odb_key_t max) { odb_node_nr_t pos; unsigned char * bitmap = malloc(max + 1); memset(bitmap, '\0', max + 1); for (pos = 1 ; pos < data->descr->current_size ; ++pos) { if (bitmap[data->node_base[pos].key]) { printf("redundant key found %lld\n", (unsigned long long)data->node_base[pos].key); free(bitmap); return 1; } bitmap[data->node_base[pos].key] = 1; } free(bitmap); return 0; } int odb_check_hash(odb_t const * odb) { odb_node_nr_t pos; odb_node_nr_t nr_node = 0; odb_node_nr_t nr_node_out_of_bound = 0; int ret = 0; odb_key_t max = 0; odb_data_t * data = odb->data; for (pos = 0 ; pos < data->descr->size * BUCKET_FACTOR ; ++pos) { odb_index_t index = data->hash_base[pos]; while (index) { if (index >= data->descr->current_size) { nr_node_out_of_bound++; break; } ++nr_node; if (data->node_base[index].key > max) max = data->node_base[index].key; index = data->node_base[index].next; } } if (nr_node != data->descr->current_size - 1) { printf("hash table walk found %d node expect %d node\n", nr_node, data->descr->current_size - 1); ret = 1; } if (nr_node_out_of_bound) { printf("out of bound node index: %d\n", nr_node_out_of_bound); ret = 1; } if (ret == 0) ret = check_circular_list(data); if (ret == 0) ret = check_redundant_key(data, max); return ret; } oprofile-1.3.0/ChangeLog-20060000664000175000017500000001737512534404406012433 000000000000002006-12-14 Maynard Johnson * doc/oprofile.xml: * events/Makefile.am: * events/ppc64/cell-be/events: * events/ppc64/cell-be/unit_masks: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * libop/op_events.c: * utils/opcontrol: * utils/ophelp.c Add support for Cell Broadband Engine 2006-12-14 Dave Nomura * daemon/init.c: move open_opd_files call to initialization phase 2006-12-11 Maynard Johnson * m4/kerneloption.m4: * m4/kernelversion.m4: eliminate/replace usage of obsolete kernel header linux/config.h 2006-12-06 Daniel Jacobowitz * libopt++/popt_options.cpp: complete fix for static initialisation ordering bug on ARM 2006-11-24 John Levon * doc/oprofile.xml: * doc/oprofile.1.in: warn about braces parsing in differential mode. * doc/opreport.1.in: * doc/oparchive.1.in: * doc/opannotate.1.in: * doc/opgprof.1.in: point explicitly to oprofile(1) * pp/opreport_options.cpp: --xml is incompatible with differential profiles. 2006-11-22 Philippe Elie * libop/op_alloc_counter.c: reapply 2006-8-03 Jeremiah Lott patch which was accidentally reverted, as a sideeffect this patch change counter allocation order. It can't hurt since our storage don't take care about counter number. * libop/tests/alloc_counter_tests.c: add a test case for this patch. Take care about counter allocation order change. 2006-11-19 Maynard Johnson * doc/oprofile.xml: Document platforms where callgraph is supported 2006-11-17 Dave Nomura * doc/Makefile.am: * doc/opreport.1.in: * doc/opreport.xsd: * doc/oprofile.xml: * libop/op_alloc_counter.c: * libpp/Makefile.am: * libpp/arrange_profiles.cpp: * libpp/format_output.cpp: * libpp/format_output.h: * libpp/op_header.cpp: * libpp/profile_container.cpp: * libpp/symbol.cpp: * libpp/symbol.h: * libpp/xml_utils.cpp: * libpp/xml_utils.h: * libutil++/Makefile.am: * libutil++/bfd_support.cpp: * libutil++/cverb.cpp: * libutil++/cverb.h: * libutil++/op_bfd.cpp: * libutil++/op_bfd.h: * libutil++/xml_output.cpp: * libutil++/xml_output.h: * pp/common_option.cpp: * pp/common_option.h: * pp/oparchive_options.cpp: * pp/opgprof_options.cpp: * pp/opreport.cpp: * pp/opreport_options.cpp: * pp/opreport_options.h: XML output support. 2006-8-03 Jeremiah Lott * libop/op_alloc_counter.c: allocate_counter(...) was returning prior to considering all possible allocation strategies. 2006-11-15 Adam Bordelon * doc/internals.xml: * doc/opannotate.1.in: * doc/oparchive.1.in: * doc/opcontrol.1.in: * doc/opgprof.1.in: * doc/opreport.1.in: * doc/oprofile.xml: Documented --session-dir option. * daemon/init.c: * daemon/liblegacy/init.c: * daemon/oprofiled.c: * libop/Makefile.am: * libop/op_config.c: * libop/op_config.h: * libop/op_config_24.h: * libop/op_mangle.c: * libpp/profile_spec.c: * pp/common_option.cpp: * utils/opcontrol: Added --session-dir option, to place sample database in dir instead of default location (/var/lib/oprofile), and program can be run as normal user. 2006-11-15 John Levon * events/x86-64/hammer/events: fix event names with '/' in them (bug 1597054) * libop/op_events.c: check for '/' and fail if so 2006-11-09 Philippe Elie * doc/opreport.1.in: * doc/oprofile.xml: --long-filenames : -f is the short opt, not -l 2006-10-16 Richard Purdie * libutil++/bfd_support.cpp: Ignore uninteresting arm mapping symbols 2006-10-16 Richard Purdie * utils/opcontrol: Remove a bashism in validate_separate_args() 2006-10-13 Maynard Johnson * doc/opcontrol.1.in: Document callgraph support for PowerPC 2006-09-25 Jon Callan * libopt++/popt_options.cpp: fix static init order problem, seen on ARM. 2006-09-21 Dean Gaudet * events/i386/core_2/events: rename some events * events/i386/core_2/unit_masks: various fixes for double-counting events 2006-09-21 Mark A. Greer * events/ppc/7450/events: * events/ppc/7450/unit_masks: * utils/ophelp.c: ppc 745x event improvements. 2006-09-15 Will Cohen * Makefile.am: Add ChangeLog-2004 and ChangeLog-2005 to distro. 2006-09-15 Will Cohen * configure.in: Bump to 0.9.3cvs. 2006-09-15 Will Cohen * configure.in: Bump to 0.9.2. 2006-09-11 Will Cohen * configure.in: Bump to 0.9.2.1rc1. 2006-09-11 Will Cohen * events/i386/core_2/unit_masks: * events/i386/core_2/events: Correct names and masks. 2006-09-07 Benjamin LaHaise * events/i386/core_2/events: Correct some event names. 2006-09-05 Will Cohen * configure.in: bump to 0.9.2 2006-09-05 Will Cohen * libpp/symbol_container.cpp: Explicit casting. 2006-08-27 Ray Bryant * events/x86-64/hammer/events: * events/x86-64/hammer/unit_masks: * libop/op_events.h: make names match the BKDG names from AMD 2006-08-22 Benjamin LaHaise * events/Makefile.am: * events/i386/core_2/events: * events/i386/core_2/unit_masks: * libop/op_cpu_type.h: * libop/op_cpu_type.c: * libop/op_events.c: * utils/ophelp.c: support Intel Core 2 events 2006-07-15 Luca Barbato * events/Makefile.am: * events/ppc/7450/events: * events/ppc/7450/unit_masks: * libop/op_cpu_type.h: * libop/op_cpu_type.c: * libop/op_events.c: * utils/ophelp.c: support PowerPC G4 events 2006-06-21 Ralf Baechle * libop/op_cpu_type.h: * utils/ophelp.c: * libop/op_cpu_type.c: * libop/op_events.c: * events/Makefile.am: * events/mips/5K: * events/mips/20K: * events/mips/25K: * events/mips/34K: add new MIPS support. 2006-05-13 Benjamin LaHaise * events/Makefile.am: * events/i386/core/events: * events/i386/core/unit_masks: * libop/op_cpu_type.h: * libop/op_cpu_type.c: * libop/op_events.c: * module/x86/cpu_type.c: * utils/ophelp.c: support Intel Core Duo events 2006-03-01 Andreas Krebbel * utils/opcontrol: (do_save_setup): Save KERNEL_RANGE and XEN_RANGE values into setup file. (do_load_setup): Print KERNEL_RANGE, XENIMAGE and XEN_RANGE values in verbose mode. 2006-03-19 John Levon * daemon/opd_anon.c: bump LRU size to avoid significant maps parsing overhead. 2006-03-19 John Levon * daemon/opd_anon.c: * daemon/opd_sfile.h: * daemon/opd_sfile.c: make sure we protect trans->last if it's an anon sf, and we need to do cleanup. Speed cleanup somewhat. 2006-02-17 Maynard Johnson * doc/oprofile.xml: * events/ppc64/power5+/events: * events/ppc64/power5+/event_mappings: * events/ppc64/unit_masks: * events/Makefile.am: * libop/op_events.c: * libop/op_cpu_type.c: * libop/op_cpu_type.h: * utils/opcontrol: * utils/ophelp.c: Add support for Power5+ 2006-02-10 Will Cohen * utils/opcontrol: Use full paths for which and dirname. 2006-01-22 John Levon * doc/oprofile.xml: mention 2.4 + power management 2006-01-16 Mike Carlson * doc/opcontrol.1.in: fix typo 2006-01-16 Jose Renato Santos * daemon/init.c: * daemon/opd_interface.h: * daemon/opd_kernel.h: * daemon/opd_kernel.c: * daemon/opd_trans.c: * daemon/oprofiled.h: * daemon/oprofiled.c: * doc/opcontrol.1.in: * utils/opcontrol: Added support for Xen See ChangeLog-2005 for earlier changelogs. oprofile-1.3.0/pe_counting/0000775000175000017500000000000013323173530012647 500000000000000oprofile-1.3.0/pe_counting/ocount.cpp0000664000175000017500000006753712752511121014621 00000000000000/** * @file ocount.cpp * Tool for event counting using the new Linux Performance Events Subsystem. * * @remark Copyright 2013 OProfile authors * @remark Read the file COPYING * * Created on: May 21, 2013 * @author Maynard Johnson * (C) Copyright IBM Corp. 2013 * */ #include "config.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "op_pe_utils.h" #include "ocount_counter.h" #include "op_cpu_type.h" #include "op_cpufreq.h" #include "operf_event.h" #include "cverb.h" #include "op_libiberty.h" // Globals char * app_name = NULL; bool use_cpu_minus_one = false; std::vector events; op_cpu cpu_type; #define OCOUNT_MSECS_PER_SEC 1000 // Current implementation supports a display interval of 100 ms #define OCOUNT_DSP_INTVL_MSECS 100 #define OCOUNT_DSP_INTVLS_PER_SEC (OCOUNT_MSECS_PER_SEC/OCOUNT_DSP_INTVL_MSECS) #define OCOUNT_NSECS_PER_MSEC 1000000 #define OCOUNT_NSECS_PER_DSP_INTVL (OCOUNT_NSECS_PER_MSEC * OCOUNT_DSP_INTVL_MSECS) static char * app_name_SAVE = NULL; static char ** app_args = NULL; static bool app_started; static bool startApp; static bool stop = false; static std::ofstream outfile; static pid_t my_uid; static double cpu_speed; static ocount_record * orecord; static pid_t app_PID = -1; using namespace std; using namespace op_pe_utils; typedef enum END_CODE { ALL_OK = 0, APP_ABNORMAL_END = 1, PERF_RECORD_ERROR = 2, PERF_READ_ERROR = 4, PERF_BOTH_ERROR = 8 } end_code_t; namespace ocount_options { bool verbose; bool system_wide; vector processes; vector threads; vector cpus; string outfile; bool separate_cpu; bool separate_thread; set evts; bool csv_output; long display_interval; long num_intervals; } static enum op_runmode runmode = OP_MAX_RUNMODE; static string runmode_options[] = { " [command-args]", "--system-wide", "--cpu-list", "--process-list", "--thread-list" }; struct option long_options [] = { {"verbose", no_argument, NULL, 'V'}, {"system-wide", no_argument, NULL, 's'}, {"cpu-list", required_argument, NULL, 'C'}, {"process-list", required_argument, NULL, 'p'}, {"thread-list", required_argument, NULL, 'r'}, {"events", required_argument, NULL, 'e'}, {"output-file", required_argument, NULL, 'f'}, {"separate-cpu", no_argument, NULL, 'c'}, {"separate-thread", no_argument, NULL, 't'}, {"brief-format", no_argument, NULL, 'b'}, {"time-interval", required_argument, NULL, 'i'}, {"help", no_argument, NULL, 'h'}, {"usage", no_argument, NULL, 'u'}, {"version", no_argument, NULL, 'v'}, {NULL, 9, NULL, 0} }; const char * short_options = "VsC:p:r:e:f:ctbi:huv"; static void cleanup(void) { free(app_name_SAVE); free(app_args); events.clear(); if (!ocount_options::outfile.empty()) outfile.close(); } // Signal handler for main (parent) process. static void op_sig_stop(int sigval __attribute__((unused))) { // Received a signal to quit, so we need to stop the // app being counted. size_t dummy __attribute__ ((__unused__)); stop = true; if (cverb << vdebug) dummy = write(1, "in op_sig_stop\n", 15); if (startApp) kill(app_PID, SIGKILL); } void set_signals_for_parent(void) { struct sigaction act; sigset_t ss; sigfillset(&ss); sigprocmask(SIG_UNBLOCK, &ss, NULL); act.sa_handler = op_sig_stop; act.sa_flags = 0; sigemptyset(&act.sa_mask); sigaddset(&act.sa_mask, SIGINT); if (sigaction(SIGINT, &act, NULL)) { perror("ocount: install of SIGINT handler failed: "); exit(EXIT_FAILURE); } } static void __print_usage_and_exit(const char * extra_msg) { if (extra_msg) cerr << extra_msg << endl; cerr << "usage: ocount [ options ] [ --system-wide | -p | -r | -C | [ command [ args ] ] ]" << endl; cerr << "See ocount man page for details." << endl; exit(EXIT_FAILURE); } static string args_to_string(void) { string ret; char * const * ptr = app_args + 1; while (*ptr != NULL) { ret.append(*ptr); ret += ' '; ptr++; } return ret; } static int app_ready_pipe[2], start_app_pipe[2]; void run_app(void) { // ASSUMPTION: app_name is a fully-qualified pathname char * app_fname = rindex(app_name, '/') + 1; app_args[0] = app_fname; string arg_str = args_to_string(); cverb << vdebug << "Exec args are: " << app_fname << " " << arg_str << endl; // Fake an exec to warm-up the resolver execvp("", app_args); // signal to the parent that we're ready to exec int startup = 1; if (write(app_ready_pipe[1], &startup, sizeof(startup)) < 0) { perror("Internal error on app_ready_pipe"); _exit(EXIT_FAILURE); } // wait for parent to tell us to start int startme = 0; if (read(start_app_pipe[0], &startme, sizeof(startme)) == -1) { perror("Internal error in run_app on start_app_pipe"); _exit(EXIT_FAILURE); } if (startme != 1) _exit(EXIT_SUCCESS); cverb << vdebug << "parent says start app " << app_name << endl; execvp(app_name, app_args); cerr << "Failed to exec " << app_fname << " " << arg_str << ": " << strerror(errno) << endl; /* We don't want any cleanup in the child */ _exit(EXIT_FAILURE); } bool start_counting(void) { vector proc_list; // May contain processes or threads // The only process that should return from this function is the process // which invoked it. Any forked process must do _exit() rather than return(). startApp = runmode == OP_START_APP; if (startApp) { if (pipe(app_ready_pipe) < 0 || pipe(start_app_pipe) < 0) { perror("Internal error: ocount-record could not create pipe"); return false; } app_PID = fork(); if (app_PID < 0) { perror("Internal error: fork failed"); return false; } else if (app_PID == 0) { // child process for exec'ing app run_app(); } } // parent int startup; if (startApp) { if (read(app_ready_pipe[0], &startup, sizeof(startup)) == -1) { perror("Internal error on app_ready_pipe"); return false; } else if (startup != 1) { cerr << "app is not ready to start; exiting" << endl; return false; } proc_list.push_back(app_PID); } else if (!ocount_options::threads.empty()) { proc_list = ocount_options::threads; } else if (!ocount_options::processes.empty()) { proc_list = ocount_options::processes; } orecord = new ocount_record(runmode, events, ocount_options::display_interval ? true : false); bool ret; switch (runmode) { case OP_START_APP: ret = orecord->start_counting_app_process(app_PID); break; case OP_SYSWIDE: ret = orecord->start_counting_syswide(); break; case OP_CPULIST: ret = orecord->start_counting_cpulist(ocount_options::cpus); break; case OP_PROCLIST: ret = orecord->start_counting_tasklist(ocount_options::processes, false); break; case OP_THREADLIST: ret = orecord->start_counting_tasklist(ocount_options::threads, true); break; default: ret = false; break; // impossible to get here, since we validate runmode prior to this point } if (!orecord->get_valid()) { /* If valid is false, it means that one of the "known" errors has * occurred: * - monitored process has already ended * - passed PID was invalid * - device or resource busy */ cverb << vdebug << "ocount record init failed" << endl; ret = false; } if (startApp && ret != false) { // Tell app_PID to start the app cverb << vdebug << "telling child to start app" << endl; if (write(start_app_pipe[1], &startup, sizeof(startup)) < 0) { perror("Internal error on start_app_pipe"); return false; } app_started = true; } return ret; } static void do_results(ostream & out) { try { orecord->output_results(out, ocount_options::separate_cpu | ocount_options::separate_thread, ocount_options::csv_output); } catch (const runtime_error & e) { cerr << "Caught runtime error from ocount_record::output_results" << endl; cerr << e.what() << endl; cleanup(); exit(EXIT_FAILURE); } } end_code_t _get_waitpid_status(int waitpid_status, int wait_rc) { end_code_t rc = ALL_OK; if (wait_rc < 0) { if (errno == EINTR) { // Ctrl-C will only kill the monitored app. See the op_sig_stop signal handler. cverb << vdebug << "Caught ctrl-C. Killed app process." << endl; } else { cerr << "waitpid for app process failed: " << strerror(errno) << endl; rc = APP_ABNORMAL_END; } } else if (wait_rc) { if (WIFEXITED(waitpid_status) && (!WEXITSTATUS(waitpid_status))) { cverb << vdebug << "app process ended normally." << endl; } else if (WIFEXITED(waitpid_status)) { cerr << "app process exited with the following status: " << WEXITSTATUS(waitpid_status) << endl; rc = APP_ABNORMAL_END; } else if (WIFSIGNALED(waitpid_status)) { if (WTERMSIG(waitpid_status) != SIGKILL) { cerr << "app process killed by signal " << WTERMSIG(waitpid_status) << endl; rc = APP_ABNORMAL_END; } } } return rc; } end_code_t _wait_for_app(ostream & out) { int wait_rc; end_code_t rc = ALL_OK; int waitpid_status = 0; bool done = false; cverb << vdebug << "going into waitpid on monitored app " << app_PID << endl; if (ocount_options::display_interval) { long number_intervals = ocount_options::num_intervals; do { struct timeval mytime; unsigned int countdown, dsp_intvl_in_100ms_units = 0; struct timespec ts_req; /* The display_interval is in milliseconds; but at this time, we only allow * 100ms granularity. */ dsp_intvl_in_100ms_units = (int)round(((double)ocount_options::display_interval/ OCOUNT_DSP_INTVL_MSECS)); if (dsp_intvl_in_100ms_units == 0) dsp_intvl_in_100ms_units = 1; // special case of rounding up; prevent 0 time interval countdown = dsp_intvl_in_100ms_units; cverb << vdebug << "Actual display interval used: " << dsp_intvl_in_100ms_units << "x100ms" << endl; ts_req.tv_nsec = countdown * OCOUNT_NSECS_PER_DSP_INTVL; ts_req.tv_sec = 0; while (countdown) { /* We want to avoid the scenario where, say, the user requests a * 10 second time interval and the app being counted ends * immediately after we call sleep(). If we called sleep() with * the full time interval, we'd be sleeping unnecessarily for * 10 seconds. So, for any time interval of one second or longer, * we do a one second sleep(), wake up and check if the app is * still alive. */ if (countdown >= OCOUNT_DSP_INTVLS_PER_SEC) { countdown -= OCOUNT_DSP_INTVLS_PER_SEC; sleep(1); if (countdown && (countdown < OCOUNT_DSP_INTVLS_PER_SEC)) { /* The next time through the loop, we'll be taking the * 'else' leg of this if-statement -- i.e., we will have * finished the specified time interval, modulo * OCOUNT_DSP_INTVLS_PER_SEC. So we set sleep time * accordingly and force dsp_intvl_in_100ms_units to be * equal to the current countdown value so the "-=" op * below makes the countdown finally zero. */ ts_req.tv_nsec = countdown * OCOUNT_NSECS_PER_DSP_INTVL; dsp_intvl_in_100ms_units = countdown; } } else { /* We don't bother keeping track of remaining time, since signals delivered * to this process will be rare (see nanosleep man page). The real time (in * the supported granularity of 100 ms) is printed out for each time interval, * so we leave it to the user to note any time gaps. */ (void)nanosleep(&ts_req, NULL); countdown -= dsp_intvl_in_100ms_units; } if (countdown == 0) { if (gettimeofday(&mytime, NULL) < 0) { cleanup(); perror("gettimeofday"); exit(EXIT_FAILURE); } if (!ocount_options::csv_output) out << endl << "Current time (seconds since epoch): "; else out << endl << "timestamp,"; if (dsp_intvl_in_100ms_units % OCOUNT_DSP_INTVLS_PER_SEC) { int tenths_secs = (int)round(((double)mytime.tv_usec/100000)); if (tenths_secs == 10) out << dec << mytime.tv_sec + 1 << "." << "0"; else out << dec << mytime.tv_sec << "." << tenths_secs; } else { out << dec << mytime.tv_sec; } do_results(out); } wait_rc = waitpid(app_PID, &waitpid_status, WNOHANG); if (wait_rc) { rc = _get_waitpid_status(waitpid_status, wait_rc); done = true; countdown = 0; } } if (--number_intervals == 0) { done = true; kill(app_PID, SIGKILL); } } while (!done); } else { wait_rc = waitpid(app_PID, &waitpid_status, 0); rc = _get_waitpid_status(waitpid_status, wait_rc); } return rc; } static end_code_t _run(ostream & out) { end_code_t rc = ALL_OK; // Fork processes with signals blocked. sigset_t ss; sigfillset(&ss); sigprocmask(SIG_BLOCK, &ss, NULL); try { if (!start_counting()) { return PERF_RECORD_ERROR; } } catch (const runtime_error & e) { cerr << "Caught runtime error while setting up counters" << endl; cerr << e.what() << endl; return PERF_RECORD_ERROR; } // parent continues here if (startApp) cverb << vdebug << "app " << app_PID << " is running" << endl; set_signals_for_parent(); if (startApp) { rc = _wait_for_app(out); } else { cout << "ocount: Press Ctl-c or 'kill -SIGINT " << getpid() << "' to stop counting" << endl; if (ocount_options::display_interval) { long number_intervals = ocount_options::num_intervals; struct timeval mytime; /* The display_interval is in milliseconds; but at this time, we only allow * 100ms granularity. */ struct timespec ts_req; unsigned int dsp_intvl_in_100ms_units = (int)round(((double)ocount_options::display_interval/ OCOUNT_DSP_INTVL_MSECS)); if (dsp_intvl_in_100ms_units == 0) dsp_intvl_in_100ms_units = 1; // special case of rounding up; prevent 0 time interval cverb << vdebug << "Actual display interval used: " << dsp_intvl_in_100ms_units << "x100ms" << endl; // 10 dsp_intvl_in_100ms_units is one second, so we set ts_req accordingly ts_req.tv_sec = dsp_intvl_in_100ms_units/10; ts_req.tv_nsec = (dsp_intvl_in_100ms_units % 10) * OCOUNT_NSECS_PER_DSP_INTVL; while (!stop) { (void)nanosleep(&ts_req, NULL); if (gettimeofday(&mytime, NULL) < 0) { cleanup(); perror("gettimeofday"); exit(EXIT_FAILURE); } if (!ocount_options::csv_output) out << endl << "Current time (seconds since epoch): "; else out << endl << "t:"; if (dsp_intvl_in_100ms_units % OCOUNT_DSP_INTVLS_PER_SEC) { int tenths_secs = (int)round(((double)mytime.tv_usec/100000)); if (tenths_secs == 10) out << dec << mytime.tv_sec + 1 << "." << "0"; else out << dec << mytime.tv_sec << "." << tenths_secs; } else { out << dec << mytime.tv_sec; } do_results(out); if (--number_intervals == 0) stop = true; } } else { while (!stop) sleep(1); } } return rc; } static void _parse_cpu_list(void) { char * comma_sep; char * endptr; char * aCpu = strtok_r(optarg, ",", &comma_sep); do { int tmp = strtol(aCpu, &endptr, 10); if ((endptr >= aCpu) && (endptr <= (aCpu + strlen(aCpu) - 1))) { // Check if user has passed a range of cpu numbers: e.g., '3-8' char * dash_sep; char * ending_cpu_str, * starting_cpu_str = strtok_r(aCpu, "-", &dash_sep); int starting_cpu, ending_cpu; if (starting_cpu_str) { ending_cpu_str = strtok_r(NULL, "-", &dash_sep); if (!ending_cpu_str) { __print_usage_and_exit("ocount: Invalid cpu range."); } starting_cpu = strtol(starting_cpu_str, &endptr, 10); if ((endptr >= starting_cpu_str) && (endptr <= (starting_cpu_str + strlen(starting_cpu_str) - 1))) { __print_usage_and_exit("ocount: Invalid numeric value for --cpu-list option."); } ending_cpu = strtol(ending_cpu_str, &endptr, 10); if ((endptr >= ending_cpu_str) && (endptr <= (ending_cpu_str + strlen(ending_cpu_str) - 1))) { __print_usage_and_exit("ocount: Invalid numeric value for --cpu-list option."); } for (int i = starting_cpu; i < ending_cpu + 1; i++) ocount_options::cpus.push_back(i); } else { __print_usage_and_exit("ocount: Invalid numeric value for --cpu-list option."); } } else { ocount_options::cpus.push_back(tmp); } } while ((aCpu = strtok_r(NULL, ",", &comma_sep))); } static void _parse_time_interval(void) { char * endptr; char * num_intervals, * interval = strtok(optarg, ":"); ocount_options::display_interval = strtol(interval, &endptr, 10); if (((endptr >= interval) && (endptr <= (interval + strlen(interval) - 1))) || (ocount_options::display_interval < 0)) __print_usage_and_exit("ocount: Invalid numeric value for interval_length."); // User has specified num_intervals: e.g., '-i 5:10' num_intervals = strtok(NULL, ":"); if (num_intervals) { ocount_options::num_intervals = strtol(num_intervals, &endptr, 10); if (((endptr >= num_intervals) && (endptr <= (num_intervals + strlen(num_intervals) - 1))) || (ocount_options::num_intervals < 0)) __print_usage_and_exit("ocount: Invalid numeric value for num_intervals."); } } static int _process_ocount_and_app_args(int argc, char * const argv[]) { bool keep_trying = true; int idx_of_non_options = 0; char * prev_env = getenv("POSIXLY_CORRECT"); setenv("POSIXLY_CORRECT", "1", 0); while (keep_trying) { int option_idx = 0; int c = getopt_long(argc, argv, short_options, long_options, &option_idx); switch (c) { char * endptr; char * event; case -1: if (optind != argc) { idx_of_non_options = optind; } keep_trying = false; break; case '?': cerr << "ocount: non-option detected at optind " << optind << endl; keep_trying = false; idx_of_non_options = -1; break; case 'V': ocount_options::verbose = true; break; case 's': ocount_options::system_wide = true; break; case 'C': _parse_cpu_list(); break; case 'p': { char * aPid = strtok(optarg, ","); do { ocount_options::processes.push_back(strtol(aPid, &endptr, 10)); if ((endptr >= aPid) && (endptr <= (aPid + strlen(aPid) - 1))) __print_usage_and_exit("ocount: Invalid numeric value for --process-list option."); } while ((aPid = strtok(NULL, ","))); break; } case 'r': { char * aTid = strtok(optarg, ","); do { ocount_options::threads.push_back(strtol(aTid, &endptr, 10)); if ((endptr >= aTid) && (endptr <= (aTid + strlen(aTid) - 1))) __print_usage_and_exit("ocount: Invalid numeric value for --thread-list option."); } while ((aTid = strtok(NULL, ","))); break; } case 'e': event = strtok(optarg, ","); do { ocount_options::evts.insert(event); } while ((event = strtok(NULL, ","))); break; case 'f': ocount_options::outfile = optarg; break; case 'c': ocount_options::separate_cpu = true; break; case 't': ocount_options::separate_thread = true; break; case 'b': ocount_options::csv_output = true; break; case 'i': _parse_time_interval(); break; case 'h': __print_usage_and_exit(NULL); break; case 'u': __print_usage_and_exit(NULL); break; case 'v': cout << argv[0] << ": " << PACKAGE << " " << VERSION << " compiled on " << __DATE__ << " " << __TIME__ << endl; exit(EXIT_SUCCESS); break; default: __print_usage_and_exit("ocount: unexpected end of arg parsing"); } } if (prev_env == NULL) unsetenv("POSIXLY_CORRECT"); return idx_of_non_options; } static enum op_runmode _get_runmode(int starting_point) { enum op_runmode ret_rm = OP_MAX_RUNMODE; for (int i = starting_point; i < OP_MAX_RUNMODE && ret_rm == OP_MAX_RUNMODE; i++) { switch (i) { // There is no option to check for OP_START_APP; we include a case // statement here just to silence Coverity. case OP_START_APP: break; case OP_SYSWIDE: if (ocount_options::system_wide) ret_rm = OP_SYSWIDE; break; case OP_CPULIST: if (!ocount_options::cpus.empty()) ret_rm = OP_CPULIST; break; case OP_PROCLIST: if (!ocount_options::processes.empty()) ret_rm = OP_PROCLIST; break; case OP_THREADLIST: if (!ocount_options::threads.empty()) ret_rm = OP_THREADLIST; break; default: break; } } return ret_rm; } static void _validate_args(void) { if (ocount_options::verbose && !verbose::setup("debug")) { cerr << "unknown --verbose= options\n"; __print_usage_and_exit(NULL); } if (runmode == OP_START_APP) { enum op_runmode conflicting_mode = OP_MAX_RUNMODE; if (ocount_options::system_wide) conflicting_mode = OP_SYSWIDE; else if (!ocount_options::cpus.empty()) conflicting_mode = OP_CPULIST; else if (!ocount_options::processes.empty()) conflicting_mode = OP_PROCLIST; else if (!ocount_options::threads.empty()) conflicting_mode = OP_THREADLIST; if (conflicting_mode != OP_MAX_RUNMODE) { cerr << "Run mode " << runmode_options[OP_START_APP] << " is incompatible with " << runmode_options[conflicting_mode] << endl; __print_usage_and_exit(NULL); } } else { enum op_runmode rm2; runmode = _get_runmode(OP_SYSWIDE); if (runmode == OP_MAX_RUNMODE) { __print_usage_and_exit("You must either pass in the name of a command or app to run or specify a run mode"); } rm2 = _get_runmode(runmode + 1); if (rm2 != OP_MAX_RUNMODE) { cerr << "Run mode " << runmode_options[rm2] << " is incompatible with " << runmode_options[runmode] << endl; __print_usage_and_exit(NULL); } } if (ocount_options::separate_cpu && !(ocount_options::system_wide || !ocount_options::cpus.empty())) { cerr << "The --separate-cpu option is only valid with --system-wide or --cpu-list." << endl; __print_usage_and_exit(NULL); } if (ocount_options::separate_thread && !(!ocount_options::threads.empty() || !ocount_options::processes.empty())) { cerr << "The --separate-thread option is only valid with --process_list or --thread_list." << endl; __print_usage_and_exit(NULL); } if (runmode == OP_CPULIST) { int num_cpus = use_cpu_minus_one ? 1 : sysconf(_SC_NPROCESSORS_ONLN); if (num_cpus < 1) { cerr << "System config says number of online CPUs is " << num_cpus << "; cannot continue" << endl; exit(EXIT_FAILURE); } set available_cpus = op_pe_utils::op_get_available_cpus(num_cpus); size_t k; for (k = 0; k < ocount_options::cpus.size(); k++) { if (available_cpus.find(ocount_options::cpus[k]) == available_cpus.end()) { cerr << "Specified CPU " << ocount_options::cpus[k] << " is not valid" << endl; __print_usage_and_exit(NULL); } } } } static void process_args(int argc, char * const argv[]) { int non_options_idx = _process_ocount_and_app_args(argc, argv); if (non_options_idx < 0) { __print_usage_and_exit(NULL); } else if ((non_options_idx) > 0) { runmode = OP_START_APP; app_name = (char *) xmalloc(strlen(argv[non_options_idx]) + 1); strcpy(app_name, argv[non_options_idx]); // Note 1: app_args[0] is placeholder for app_fname (filled in later). // Note 2: app_args[] is set to NULL (required by execvp) if (non_options_idx < (argc -1)) { app_args = (char **) xmalloc((sizeof *app_args) * (argc - non_options_idx + 1)); for(int i = non_options_idx + 1; i < argc; i++) { app_args[i - non_options_idx] = argv[i]; } app_args[argc - non_options_idx] = NULL; } else { app_args = (char **) xmalloc((sizeof *app_args) * 2); app_args[1] = NULL; } if (op_validate_app_name(&app_name, &app_name_SAVE) < 0) { __print_usage_and_exit(NULL); } } _validate_args(); /* At this point, we know which of the three counting modes the user requested: * - count events in named app * - count events in app by PID * - count events in whole system */ if (ocount_options::evts.empty()) { // Use default event op_pe_utils::op_get_default_event(false); } else { op_pe_utils::op_process_events_list(ocount_options::evts, false, false); } cverb << vdebug << "Number of events passed is " << events.size() << endl; return; } int main(int argc, char * const argv[]) { int rc; bool get_results = true; int perf_event_paranoid = op_get_sys_value("/proc/sys/kernel/perf_event_paranoid"); my_uid = geteuid(); rc = op_check_perf_events_cap(use_cpu_minus_one); if (rc == EACCES) { /* Early perf_events kernels required the cpu argument to perf_event_open * to be '-1' when setting up to monitor a single process if 1) the user is * not root; and 2) perf_event_paranoid is > 0. An EACCES error would be * returned if passing '0' or greater for the cpu arg and the above criteria * was not met. Unfortunately, later kernels turned this requirement around * such that the passed cpu arg must be '0' or greater when the user is not * root. * * We don't really have a good way to check whether we're running on such an * early kernel except to try the perf_event_open with different values to see * what works. */ if (my_uid != 0 && perf_event_paranoid > 0) { use_cpu_minus_one = true; rc = op_check_perf_events_cap(use_cpu_minus_one); } } if (rc == EBUSY) cerr << "Performance monitor unit is busy. Ensure that no other profilers are running on the system." << endl << "Note: For example, the obsolete opcontrol profiler (available in earlier oprofile releases)" << endl << "does not allow other performance tools to run simultaneously. To check for this, look for the" << endl << "'oprofiled' process using the 'ps' command." << endl; else if (rc == ENOSYS) cerr << "Your kernel does not implement a required syscall" << " for the ocount program." << endl; else if (rc == ENOENT) cerr << "Your kernel's Performance Events Subsystem does not support" << " your processor type." << endl; else if (rc) cerr << "Unexpected error running ocount: " << strerror(rc) << endl; if (rc) exit(1); cpu_type = op_get_cpu_type(); if (cpu_type == CPU_NO_GOOD) { cerr << "Unable to ascertain cpu type. Exiting." << endl; cleanup(); exit(1); } if (cpu_type == CPU_TIMER_INT) { cerr << "CPU type 'timer' was detected, but ocount does not support 'timer' as a cpu type." << endl << "Ensure the obsolete opcontrol profiler (available in pre-1.0 oprofile releases)" << endl << "is not running on the system. To check for this, look for the file" << endl << "/dev/oprofile/cpu_type; if this file exists, locate the pre-1.0 oprofile" << endl << "installation, and use its 'opcontrol' command with the --deinit option." << endl; cleanup(); exit(1); } cpu_speed = op_cpu_frequency(); try { process_args(argc, argv); } catch (const runtime_error & e) { cerr << "Caught runtime error while processing args" << endl; cerr << e.what() << endl; cleanup(); exit(EXIT_FAILURE); } if ((runmode == OP_SYSWIDE || runmode == OP_CPULIST) && ((my_uid != 0) && (perf_event_paranoid > 0))) { cerr << "To do "; if (runmode == OP_SYSWIDE) cerr << "system-wide "; else cerr << "cpu-list "; cerr << "event counting, either you must be root or" << endl; cerr << "/proc/sys/kernel/perf_event_paranoid must be set to 0 or -1." << endl; cleanup(); exit(1); } if (!ocount_options::outfile.empty()) { outfile.open(ocount_options::outfile.c_str()); } ostream & out = !ocount_options::outfile.empty() ? outfile : cout; end_code_t run_result; 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OP_CPULIST, OP_PROCLIST, OP_THREADLIST, OP_MAX_RUNMODE }; typedef struct ocount_accum { u64 count; u64 enabled_time; u64 running_time; } ocount_accum_t; static inline int op_perf_event_open(struct perf_event_attr * attr, pid_t pid, int cpu, int group_fd, unsigned long flags) { return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); } class ocount_record; class ocount_counter { public: ocount_counter(operf_event_t & evt, bool enable_on_exec, bool inherit); ~ocount_counter(); int perf_event_open(pid_t pid, int cpu); int get_cpu(void) { return cpu; } pid_t get_pid(void) { return pid; } const std::string get_umask_value(void) const { return event.um_name; } const std::string get_event_name(void) const { return event.name; } std::string get_um_numeric_val_as_str(void) { return event.um_numeric_val_as_str; } int get_no_user(void) const { return attr.exclude_user; } int get_no_kernel(void) const { return attr.exclude_kernel; } bool get_mode_specified(void) { return event.mode_specified; } bool get_um_specified(void) { return event.umask_specified; } int read_count_data(ocount_accum_t * accum); private: operf_event_t event; struct perf_event_attr attr; int fd; int cpu; pid_t pid; }; class ocount_record { public: ocount_record(enum op_runmode _runmode, std::vector & _evts, bool _with_time_interval); ~ocount_record(); bool start_counting_app_process(pid_t _pid); bool start_counting_tasklist(std::vector _tasks, bool _are_threads); bool start_counting_cpulist(std::vector _cpus); bool start_counting_syswide(void); void add_process(pid_t proc) { tasks_to_count.insert(proc); } void output_results(std::ostream & out, bool use_separation, bool short_format); bool get_valid(void) { return valid; } bool are_tasks_processes(void) { return !tasks_are_threads; } private: void setup(void); int get_process_info(const std::vector & _procs); int _get_one_process_info(pid_t pid); int do_counting_per_cpu(void); int do_counting_per_task(void); void output_short_results(std::ostream & out, bool use_separation, bool scaled); void output_long_results(std::ostream & out, bool use_separation, int longest_event_name, bool scaled, u64 time_enabled); enum op_runmode runmode; bool tasks_are_threads; int num_cpus; pid_t app_pid; std::set tasks_to_count; std::set cpus_to_count; bool system_wide; std::vector perfCounters; unsigned int total_bytes_recorded; std::vector evts; std::vector specified_tasks; std::vector specified_cpus; std::vector accum_counts; // accumulated across threads or cpus; one object per event /* The prev_accum_counts vector is used with time intervals for computing count values for just * the current time interval. The number of elements in this vector depends on the run mode: * - For [args] : vector size == evts.size() * - For system-wide or cpu list : vector size is number of processors * - For process or thread list : vector size is number of tasks */ std::vector prev_accum_counts; bool valid; bool with_time_interval; u64 start_time; }; #endif /* OCOUNT_COUNTER_H_ */ oprofile-1.3.0/pe_counting/ocount_counter.cpp0000664000175000017500000005664513124774026016367 00000000000000/** * @file ocount_counter.cpp * Functions and classes for ocount tool. * * @remark Copyright 2013 OProfile authors * @remark Read the file COPYING * * Created on: May 22, 2013 * @author Maynard Johnson * (C) Copyright IBM Corp. 2013 * */ #include #include #include #include #include #include #include #include #include #include #include #include "ocount_counter.h" #include "op_pe_utils.h" #include "operf_event.h" #include "cverb.h" extern verbose vdebug; extern bool use_cpu_minus_one; extern char * app_name; using namespace std; static string print_mask_modes(bool mode_specified,bool um_specified, int no_kernel, int no_user, string um_numeric_as_str, string umask_value) { ostringstream qualifier_string; if (um_specified) { if (umask_value.size() == 0) umask_value = um_numeric_as_str; qualifier_string << ":" << umask_value; } if (mode_specified) { if (no_kernel) qualifier_string << ":0"; else qualifier_string << ":1"; if (no_user) qualifier_string << ":0"; else qualifier_string << ":1"; } return qualifier_string.str(); } ocount_counter::ocount_counter(operf_event_t & evt, bool enable_on_exec, bool inherit) { memset(&attr, 0, sizeof(attr)); attr.size = sizeof(attr); attr.config = evt.evt_code; #ifdef __s390__ attr.type = PERF_TYPE_HARDWARE; if (evt.no_kernel && !evt.no_user) attr.config |= 32; #else attr.type = PERF_TYPE_RAW; #endif attr.exclude_hv = evt.no_hv; attr.inherit = inherit ? 1 : 0; attr.enable_on_exec = enable_on_exec ? 1 : 0; attr.disabled = attr.enable_on_exec; attr.exclude_idle = 0; attr.exclude_kernel = evt.no_kernel; attr.exclude_user = evt.no_user; // This format allows us to tell user percent of time an event was scheduled // when multiplexing has been done by the kernel. attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_TOTAL_TIME_RUNNING; event = evt; fd = cpu = pid = -1; } ocount_counter::~ocount_counter() { } #include int ocount_counter::perf_event_open(pid_t _pid, int _cpu) { fd = op_perf_event_open(&attr, _pid, _cpu, -1, 0); if (fd < 0) { int ret = -1; cverb << vdebug << "perf_event_open failed: " << strerror(errno) << endl; if (errno == EBUSY) { cerr << "The performance monitoring hardware reports EBUSY. Is another profiling tool in use?" << endl << "On some architectures, tools such as oprofile and perf being used in system-wide " << "mode can cause this problem." << endl; ret = OP_PERF_HANDLED_ERROR; } else if (errno == ESRCH) { cerr << "!!!! No samples collected !!!" << endl; cerr << "The target program/command ended before profiling was started." << endl; ret = OP_PERF_HANDLED_ERROR; } else { cerr << "perf_event_open failed with " << strerror(errno) << endl; } return ret; } pid = _pid; cpu = _cpu; cverb << vdebug << "perf_event_open returning fd " << fd << endl; return fd; } int ocount_counter::read_count_data(ocount_accum_t * count_data) { size_t len = 3 * sizeof(u64); char * buf = (char *)count_data; while (len) { int ret = read(fd, buf, len); if (ret <= 0) return ret; len -= ret; buf += ret; } return 0; } ocount_record::ocount_record(enum op_runmode _runmode, std::vector & _evts, bool _with_time_interval) { runmode = _runmode; with_time_interval = _with_time_interval; evts = _evts; valid = false; system_wide = false; tasks_are_threads = false; num_cpus = 0; app_pid = -1; start_time = 0ULL; total_bytes_recorded = 0; } bool ocount_record::start_counting_app_process(pid_t _pid) { if (valid) { cerr << "ocount internal error: ocount_record already initialized" << endl; return false; } if (runmode != OP_START_APP) { cerr << "ocount internal error: Current run mode " << runmode << " is incompatible with " "starting app." << endl; return false; } app_pid = _pid; setup(); return true; } /* * There are separate ocount options for counting events for a set of processes ("--process-list") * or a set of threads ("--thread-list"). This function is used for passing the set of either * processes or threads to ocount_record, along with a boolean argument to indicate whether or not * the set of passed tasks are threads. If they are threads, we set up perf_event_open to NOT * do "inherit". */ bool ocount_record::start_counting_tasklist(std::vector _tasks, bool _are_threads) { if (valid) { cerr << "ocount internal error: ocount_record already initialized" << endl; return false; } tasks_are_threads = _are_threads; specified_tasks = _tasks; if (tasks_are_threads) { if (runmode != OP_THREADLIST) { cerr << "ocount internal error: Current run mode " << runmode << " is incompatible with " "--thread-list option." << endl; return false; } } else { if (runmode != OP_PROCLIST) { cerr << "ocount internal error: Current run mode " << runmode << " is incompatible with " "--process-list option." << endl; return false; } } setup(); if (tasks_to_count.empty()) { cerr << "No valid tasks to monitor -- quitting." << endl; return false; } return true; } bool ocount_record::start_counting_cpulist(std::vector _cpus) { if (valid) { cerr << "ocount internal error: ocount_record already initialized" << endl; return false; } if (runmode != OP_CPULIST) { cerr << "ocount internal error: Current run mode " << runmode << " is incompatible with " "--cpu-list option." << endl; return false; } specified_cpus = _cpus; setup(); return true; } bool ocount_record::start_counting_syswide(void) { if (valid) { cerr << "ocount internal error: ocount_record already initialized" << endl; return false; } if (runmode != OP_SYSWIDE) { cerr << "ocount internal error: Current run mode " << runmode << " is incompatible with " "--system-wide option." << endl; return false; } system_wide = true; setup(); return true; } int ocount_record::do_counting_per_task(void) { string err_msg; int rc = 0; for (set::iterator it = tasks_to_count.begin(); it != tasks_to_count.end(); it++) { pid_t the_pid = *it; bool inherit = are_tasks_processes(); cverb << vdebug << "calling perf_event_open for task " << the_pid << endl; for (unsigned event = 0; event < evts.size(); event++) { ocount_accum_t count_data = {0ULL, 0ULL, 0ULL}; accum_counts.push_back(count_data); prev_accum_counts.push_back(0ULL); ocount_counter op_ctr(ocount_counter(evts[event], false, inherit)); if ((rc = op_ctr.perf_event_open(the_pid, -1)) < 0) { err_msg = "Internal Error. Perf event setup failed."; goto out; } else { rc = 0; } perfCounters.push_back(op_ctr); } } out: if (rc && rc != OP_PERF_HANDLED_ERROR) throw runtime_error(err_msg); return rc; } int ocount_record::do_counting_per_cpu(void) { string err_msg; int rc = 0; /* We'll do this sanity check here, but we also do it at the front-end where user * args are being validated. If we wait until we get here, the invalid CPU argument * becomes an ugly thrown exception. */ set available_cpus = op_pe_utils::op_get_available_cpus(num_cpus); if (runmode == OP_CPULIST) { size_t k; for (k = 0; k < specified_cpus.size(); k++) { if (available_cpus.find(specified_cpus[k]) == available_cpus.end()) { ostringstream err_msg_ostr; err_msg_ostr << "Specified CPU " << specified_cpus[k] << " is not valid"; err_msg = err_msg_ostr.str(); rc = -1; goto out; } else { cpus_to_count.insert(specified_cpus[k]); } } } else { cpus_to_count = available_cpus; } for (set::iterator it = cpus_to_count.begin(); it != cpus_to_count.end(); it++) { int the_cpu = *it; cverb << vdebug << "calling perf_event_open for cpu " << the_cpu << endl; for (unsigned event = 0; event < evts.size(); event++) { ocount_accum_t count_data = {0ULL, 0ULL, 0ULL}; accum_counts.push_back(count_data); prev_accum_counts.push_back(0ULL); ocount_counter op_ctr(ocount_counter(evts[event], false, true)); if ((rc = op_ctr.perf_event_open(-1, the_cpu)) < 0) { err_msg = "Internal Error. Perf event setup failed."; goto out; } else { rc = 0; } perfCounters.push_back(op_ctr); } } out: if (rc && rc != OP_PERF_HANDLED_ERROR) throw runtime_error(err_msg); return rc; } void ocount_record::setup() { int rc = 0; string err_msg; if (!specified_tasks.empty()) { if ((rc = get_process_info(specified_tasks)) < 0) { if (rc == OP_PERF_HANDLED_ERROR) return; else throw runtime_error("Unexpected error in ocount_record setup"); } } /* To set up to count events for an existing thread group, we need call perf_event_open * for each thread, and we need to pass cpu=-1 on the syscall. */ use_cpu_minus_one = use_cpu_minus_one ? true : ((system_wide || (runmode == OP_CPULIST)) ? false : true); num_cpus = use_cpu_minus_one ? 1 : sysconf(_SC_NPROCESSORS_ONLN); if (num_cpus < 1) { char int_str[256]; sprintf(int_str, "Number of online CPUs is %d; cannot continue", num_cpus); throw runtime_error(int_str); } if (system_wide || (runmode == OP_CPULIST)) { rc = do_counting_per_cpu(); } else if (!specified_tasks.empty()) { rc = do_counting_per_task(); } else { cverb << vdebug << "calling perf_event_open for pid " << app_pid << endl; for (unsigned event = 0; event < evts.size(); event++) { ocount_accum_t count_data = {0ULL, 0ULL, 0ULL}; accum_counts.push_back(count_data); prev_accum_counts.push_back(0ULL); ocount_counter op_ctr(ocount_counter(evts[event], true, true)); if ((rc = op_ctr.perf_event_open(app_pid, -1)) < 0) { err_msg = "Internal Error. Perf event setup failed."; goto error; } else { rc = 0; } perfCounters.push_back(op_ctr); } } if (!rc) { cverb << vdebug << "perf counter setup complete" << endl; // Set bit to indicate we're set to go. valid = true; // Now that all events are programmed to start counting, init the start time struct timespec tspec; clock_gettime(CLOCK_MONOTONIC, &tspec); start_time = tspec.tv_sec * 1000000000ULL + tspec.tv_nsec; return; } error: if (rc != OP_PERF_HANDLED_ERROR) throw runtime_error(err_msg); } void ocount_record::output_short_results(ostream & out, bool use_separation, bool scaled) { size_t num_iterations = use_separation ? perfCounters.size() : evts.size(); out << endl; for (size_t num = 0; num < num_iterations; num++) { ostringstream count_str; ocount_accum_t tmp_accum; double fraction_time_running; string qual_string; if (use_separation) { if (cpus_to_count.size()) { out << perfCounters[num].get_cpu(); } else { out << perfCounters[num].get_pid(); } out << "," << perfCounters[num].get_event_name(); qual_string = print_mask_modes(perfCounters[num].get_mode_specified(), perfCounters[num].get_um_specified(), perfCounters[num].get_no_kernel(), perfCounters[num].get_no_user(), perfCounters[num].get_um_numeric_val_as_str(), perfCounters[num].get_umask_value()); out << qual_string; out << ","; errno = 0; cverb << vdebug << "Reading counter data for event " << perfCounters[num].get_event_name() << endl; if (perfCounters[num].read_count_data(&tmp_accum) < 0) { string err_msg = "Internal error: read of perfCounter fd failed with "; err_msg += errno ? strerror(errno) : "unknown error"; throw runtime_error(err_msg); } fraction_time_running = scaled ? (double)tmp_accum.running_time/tmp_accum.enabled_time : 1; if (with_time_interval) { u64 save_prev = prev_accum_counts[num]; prev_accum_counts[num] = tmp_accum.count; tmp_accum.count -= save_prev; } u64 scaled_count = tmp_accum.count ? tmp_accum.count/fraction_time_running : 0; out << dec << scaled_count << ","; } else { fraction_time_running = scaled ? (double)accum_counts[num].running_time/accum_counts[num].enabled_time : 1; u64 scaled_count = accum_counts[num].count ? accum_counts[num].count/fraction_time_running : 0; out << perfCounters[num].get_event_name(); qual_string = print_mask_modes(perfCounters[num].get_mode_specified(), perfCounters[num].get_um_specified(), perfCounters[num].get_no_kernel(), perfCounters[num].get_no_user(), perfCounters[num].get_um_numeric_val_as_str(), perfCounters[num].get_umask_value()); out << qual_string; out << "," << dec << scaled_count << ","; } ostringstream strm_tmp; if (use_separation) { if (!tmp_accum.enabled_time) { out << 0 << endl; } else { strm_tmp.precision(2); strm_tmp << fixed << fraction_time_running * 100 << endl; out << strm_tmp.str(); } } else { if (!accum_counts[num].enabled_time) { out << "Event not counted" << endl; } else { strm_tmp.precision(2); strm_tmp << fixed << fraction_time_running * 100 << endl; out << strm_tmp.str(); } } } } void ocount_record::output_long_results(ostream & out, bool use_separation, int evt_name_col_size, bool scaled, u64 time_enabled) { #define COUNT_COLUMN_WIDTH 25 #define SEPARATION_ELEMENT_COLUMN_WIDTH 10 #define MIN_NAME_COLUMN_SPACING 8 char space_padding[64], temp[64]; char const * cpu, * task, * scaling; u64 num_seconds_enabled = time_enabled/1000000000; unsigned int num_minutes_enabled = num_seconds_enabled/60; cpu = "CPU"; task = "Task ID"; scaling = scaled ? "(scaled) " : "(actual) "; unsigned int begin_second_col; unsigned int num_pads; ostringstream debug_string; /* Need to account for any events that will be printing user/kernel * mode or unit mask names when setting up the columns of the data. */ begin_second_col = evt_name_col_size + MIN_NAME_COLUMN_SPACING; num_pads = begin_second_col - strlen("Event"); memset(space_padding, ' ', 64); strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; out << endl; if (!with_time_interval) { ostringstream strm; strm << "Events were actively counted for "; if (num_minutes_enabled) { strm << " "; strm << num_minutes_enabled; if (num_minutes_enabled > 1) strm << " minutes and "; else strm << " minute and "; strm << num_seconds_enabled % 60; strm << " seconds."; } else { if (num_seconds_enabled) { // Show 1/10's of seconds strm.precision(1); strm << fixed << (double)time_enabled/1000000000; strm << " seconds."; } else { // Show full nanoseconds strm << time_enabled << " nanoseconds."; } } out << strm.str() << endl; } out << "Event counts " << scaling; if (app_name) out << "for " << app_name << ":"; else if (system_wide) out << "for the whole system:"; else if (!cpus_to_count.empty()) out << "for the specified CPU(s):"; else if (tasks_are_threads) out << "for the specified thread(s):"; else out << "for the specified process(es):"; out << endl; out << "\tEvent" << temp; if (use_separation) { if (cpus_to_count.size()) { out << cpu; num_pads = SEPARATION_ELEMENT_COLUMN_WIDTH - strlen(cpu); } else { out << task; num_pads = SEPARATION_ELEMENT_COLUMN_WIDTH - strlen(task); } strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; out << temp; } out << "Count"; num_pads = COUNT_COLUMN_WIDTH - strlen("Count"); strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; out << temp << "% time counted" << endl; /* If counting per-cpu or per-thread, I refer generically to cpu or thread values * as "elements of separation". We will have one ocount_counter object per element of * separation per event. So if we're counting 2 events for 4 processes (or threads), * we'll have 2x4 (8) ocount_counter objects. * * If 'use_separation' is true, then we need to print individual counts for * each element of separation for each event; otherwise, we print aggregated counts * for each event. */ size_t num_iterations = use_separation ? perfCounters.size() : evts.size(); for (size_t num = 0; num < num_iterations; num++) { double fraction_time_running; string qual_string; out << "\t" << perfCounters[num].get_event_name(); qual_string = print_mask_modes(perfCounters[num].get_mode_specified(), perfCounters[num].get_um_specified(), perfCounters[num].get_no_kernel(), perfCounters[num].get_no_user(), perfCounters[num].get_um_numeric_val_as_str(), perfCounters[num].get_umask_value()); out << qual_string; num_pads = begin_second_col - qual_string.size() - perfCounters[num].get_event_name().size(); strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; out << temp; ostringstream count_str; ocount_accum_t tmp_accum; if (use_separation) { ostringstream separation_element_str; strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; if (cpus_to_count.size()) { separation_element_str << dec << perfCounters[num].get_cpu(); out << perfCounters[num].get_cpu(); } else { separation_element_str << dec << perfCounters[num].get_pid(); out << perfCounters[num].get_pid(); } num_pads = SEPARATION_ELEMENT_COLUMN_WIDTH - separation_element_str.str().length(); strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; out << temp; errno = 0; cverb << vdebug << "Reading counter data for event " << perfCounters[num].get_event_name() << endl; if (perfCounters[num].read_count_data(&tmp_accum) < 0) { string err_msg = "Internal error: read of perfCounter fd failed with "; err_msg += errno ? strerror(errno) : "unknown error"; throw runtime_error(err_msg); } fraction_time_running = scaled ? (double)tmp_accum.running_time/tmp_accum.enabled_time : 1; if (with_time_interval) { u64 save_prev = prev_accum_counts[num]; prev_accum_counts[num] = tmp_accum.count; tmp_accum.count -= save_prev; } u64 scaled_count = tmp_accum.count ? tmp_accum.count/fraction_time_running : 0; count_str << dec << scaled_count; } else { fraction_time_running = scaled ? (double)accum_counts[num].running_time/accum_counts[num].enabled_time : 1; u64 scaled_count = accum_counts[num].count ? accum_counts[num].count/fraction_time_running : 0; count_str << dec << scaled_count; } string count = count_str.str(); for (int i = count.size() - 3; i > 0; i-=3) { count.insert(i, 1, ','); } out << count; num_pads = COUNT_COLUMN_WIDTH - count.size(); strncpy(temp, space_padding, num_pads); temp[num_pads] = '\0'; out << temp; ostringstream strm_tmp; if (use_separation) { if (!tmp_accum.enabled_time) { out << "Event not counted" << endl; } else { strm_tmp.precision(2); strm_tmp << fixed << fraction_time_running * 100 << endl; out << strm_tmp.str(); } } else { if (!accum_counts[num].enabled_time) { out << "Event not counted" << endl; } else { strm_tmp.precision(2); strm_tmp << fixed << fraction_time_running * 100 << endl; out << strm_tmp.str(); } } } } void ocount_record::output_results(ostream & out, bool use_separation, bool short_format) { #define MODE_FIELD_SIZE 3 /* space for :KU in the output */ size_t evt_name_col_size = 0; u64 time_enabled = 0ULL; bool scaled = false; bool mode_specified = false; for (unsigned long evt_num = 0; evt_num < evts.size(); evt_num++) { unsigned int length = 0; /* calculate the longest name + unit mask + mode specifier */ length = strlen(evts[evt_num].um_name) + strlen(evts[evt_num].name) + 1; /* for colon */ if ((strlen(evts[evt_num].um_numeric_val_as_str) + strlen(evts[evt_num].name)) > length) length = strlen(evts[evt_num].um_numeric_val_as_str) + strlen(evts[evt_num].name) + 1; /* for colon */ if (evts[evt_num].mode_specified) length += MODE_FIELD_SIZE; if (length > evt_name_col_size) evt_name_col_size = length; mode_specified = mode_specified || evts[evt_num].mode_specified; } if (with_time_interval) { // reset the accum count values for (size_t i = 0; i < evts.size(); i++) { ocount_accum_t accum = accum_counts[i]; accum.count = 0ULL; accum_counts[i] = accum; } } /* We need to inspect all of the count data now to ascertain if scaling * is required, so we also collect aggregated counts into the accum_counts * vector (if needed). */ for (unsigned long ocounter = 0; ocounter < perfCounters.size(); ocounter++) { ocount_accum_t tmp_accum; int evt_key = ocounter % evts.size(); errno = 0; cverb << vdebug << "Reading counter data for event " << evts[evt_key].name << endl; if (perfCounters[ocounter].read_count_data(&tmp_accum) < 0) { string err_msg = "Internal error: read of perfCounter fd failed with "; err_msg += errno ? strerror(errno) : "unknown error"; throw runtime_error(err_msg); } if (!use_separation) { ocount_accum_t real_accum = accum_counts[evt_key]; real_accum.count += tmp_accum.count; real_accum.enabled_time += tmp_accum.enabled_time; real_accum.running_time += tmp_accum.running_time; accum_counts[evt_key] = real_accum; } if (tmp_accum.enabled_time != tmp_accum.running_time) { if (((double)(tmp_accum.enabled_time - tmp_accum.running_time)/tmp_accum.enabled_time) > 0.01) scaled = true; } } if (with_time_interval && !use_separation) { for (size_t i = 0; i < evts.size(); i++) { u64 save_prev = prev_accum_counts[i]; ocount_accum_t real_accum = accum_counts[i]; prev_accum_counts[i] = real_accum.count; real_accum.count -= save_prev; accum_counts[i] = real_accum; } } struct timespec tspec; clock_gettime(CLOCK_MONOTONIC, &tspec); time_enabled = (tspec.tv_sec * 1000000000ULL + tspec.tv_nsec) - start_time; if (short_format) output_short_results(out, use_separation, scaled); else output_long_results(out, use_separation, evt_name_col_size, scaled, time_enabled); } int ocount_record::_get_one_process_info(pid_t pid) { char fname[PATH_MAX]; DIR *tids; struct dirent *dirent; int ret = 0; add_process(pid); if (are_tasks_processes()) { snprintf(fname, sizeof(fname), "/proc/%d/task", pid); tids = opendir(fname); if (tids == NULL) { // process must have exited ret = -1; cverb << vdebug << "Process " << pid << " apparently exited while " << "process info was being collected"<< endl; goto out; } while ((dirent = readdir(tids))) { char *end; pid = strtol(dirent->d_name, &end, 10); if (*end) continue; add_process(pid); } closedir(tids); } out: return ret; } /* Obtain process information for one or more active process, where the user has * either passed in a set of processes via the --process-list option or has specified * --system_wide. */ int ocount_record::get_process_info(const vector & _procs) { int ret = 0; if (cverb << vdebug) cout << "op_get_process_info" << endl; for (size_t i = 0; i < _procs.size(); i++) { errno = 0; if (kill(_procs[i], 0) < 0) { if (errno == EPERM) { string errmsg = "You do not have permission to monitor "; errmsg += are_tasks_processes() ? "process " : "thread "; cerr << errmsg << _procs[i] << endl; ret = OP_PERF_HANDLED_ERROR; } break; } if ((ret = _get_one_process_info(_procs[i])) < 0) break; } return ret; } oprofile-1.3.0/ChangeLog-20010000664000175000017500000016431312534404406012421 000000000000002001-12-31 Philippe Elie * module/op_init.c: * module/oprofile.c: export cpu type preparing for user space cpu detection change * module/oprofile.h: preparatory work to add support for preempt patch * pp/oprofpp.cpp: cleanup #if 0 ... #else ... #endif * pp/orofpp_util.cpp: allow to deduce image name from shared lib samples files name produced with --separate-samples * gui/oprof_start.cpp: minor fix 2001-12-31 John Levon * various files: use op_cpu enum for cpu type * all .cvsignore: * Rules.make.in: * all Makefile.in: hide .d files in .deps directories 2001-12-31 John Levon * Makefile.in: move config.h.in to maintainerclean - it is included in a tarball so a distclean shouldn't remove it 2001-12-31 John Levon * TODO: update * gui/ui/oprof_start.base.ui: * doc/oprofile.sgml: * doc/oprofile.1.in: small updates * oprofile.c: more detail on locking requirements for wake_up 2001-12-31 Michel Dagenais * gui/oprof_start.cpp: * gui/oprof_start.h: show total samples so far 2001-12-29 Philippe Elie * dae/oprofiled.c: * dae/op_start: --separate-samples is working * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: handle separating for shared libs, off by default. * doc/oprofile.sgml: * doc/oprofile.1.in: document --show-shared-libs * pp/opf_filter.h: * pp/opf_container.cpp: new class samples_files_t to easier access to subset of symbols/samples or source filename from multiple image * pp/Makefile.in: * pp/op_time.cpp: * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: implement --show-shared-libs except for opf_filter * util/file_manip.h: * util/file_manip.cpp: new function to manipulate sample file name and list of sample file name. 2001-12-27 Philippe Elie * dae/op_stop: always do an op_dump before stopping * gui/oprof_start.cpp: op_dump before op_stop no longer required 2001-12-26 Philippe Elie * pp/opf_filter.cpp: * pp/opf_filter.h: * pp/oprofpp.h: * pp/opf_filter.cpp: * pp/oprofpp_util.cpp: * pp/oprofpp.cpp: * pp/op_time.c: remove some use of global var samplefile and imagefile * pp/oprofpp.cpp: do_dump_gprof() free memory too soon. (was bugged from 2001-12-05) * doc/oprofile.sgml: remove mention about oprof-thread 2001-12-23 Philippe Elie * util/string_manip.h: * util/string_manip.cpp: separate_token() new function * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/oprofpp_util.cpp: * doc/oprofil.1.in: * doc/oprofile.sgml: add support for --exclude-symbol * TODO: update 2001-12-22 Philippe Elie * dae/op_start: add --separate-samples * dae/oprofiled.c: ditto * dae/opd_proc.c: * dae/opd_util.h: * dae/opd_util.c: * dae/oprofiled.h: implementation of above * pp/op_time.cpp: * doc/oprofile.1.in: * doc/oprfile.sgml: handle and document above * pp/oprofpp_util.cpp: minor change related * dae/oprofiled.c: bug fix while blocking signal * doc/Makefile.in: avoid unecessary build of html doc 2001-12-22 Dave Jones * config.h.in: Readd to CVS. 2001-12-18 Dave Jones * Makefile.in: Make documentation build again. 2001-12-14 Philippe Elie * dae/opd_proc.c: memory leak fix in opd_init_images() 2001-12-12 Philippe Elie * module/oprofile.h: change slightly op_hash() * util/file_manip.h: * util/file_manip.cpp: * util/string_manip.h: * util/string_manip.cpp: * util/child_reader.h: * util/child_reader.cpp: cleanup John's FIXME * dae/opd_util.h: * dae/opd_util.c: move libiberty things to ... * util/misc.h: * util/misc.c: here * util/Makefile.in: update * dae/Makefile.in: * pp/Makefile.in: * doc/Makefile.in: install the html doc 2001-12-10 John Levon * dae/oprofiled.c: fix sigprocmask() blooper 2001-12-09 John Levon * TODO: update again * util/child_reader.h: * util/child_reader.cpp: * util/file_manip.cpp: * util/string_manip.cpp: pedantic cleanup + FIXMEs 2001-12-09 John Levon * configure.in: add FIXME comment * util/file_manip.h: add FIXME comment, avoid warning with // 2001-12-09 John Levon * TODO: update 2001-12-09 Philippe Elie * dae/opd_proc.c: verbprintf() what cause the deletion of a sample file + minor cleanup * doc/oprofile.sgml: document samples files backup 2001-12-07 Philippe Elie * dae/oprofiled.h: * dae/opd_proc.c: handle an accessed field of deleted of deleted procs to defer deleting the procs. This greatly reduce the Nr of lost samples due to no proc information. 2001-12-06 Philippe Elie * dae/oprofiled.h: * dae/opd_proc.c: separate stats for kernel and modules address space and minor cleanup 2001-12-05 Philippe Elie * Rules.make.in: * dae/Makefile.in: * events/Makefile.in: * pp/Makefile.in: * util/Makefile.in: tidy * module/Makefile.in: * gui/Makefile.in: use auto-deps * util/child_reader.h: allow to compile with -ansi * util/child_reader.cpp: fix memory leak fix * pp/oprofpp.cpp: fix memory leak * TODO: update 2001-12-05 Philippe Elie * autogen.sh: use autoheader to create config.h * configure.in: handle missing libiberty.h and missing xcalloc in libiberty.a * dae/opd_util.cpp: * dae/opd_proc.c: * dae/opd_util.h: * dae/oprofiled.c: * evets/Makefile.in * pp/oprof_convert.c: * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: replace opd_malloc() and related by xmalloc. * util/op_popt.c: add call to xmalloc_set_program_name() * ./cvsignore: add config.h, config.h.in 2001-12-04 Dave Jones * events/op_events_desc.c: Add recognition for alternative PIII string. Reported by Lev Iserovich 2001-12-04 Philippe Elie * dae/opd_util.c: * dae/opd_util.c: move common fuctionnality to ... * util/file_manip.h * util/file_manip.c: here * pp/oprof_convert.c: reflect above change * pp/oprof_convert.c: * pp/opf_filter.cpp: ditto + minor cleanup * gui/Makefile.in: * pp/Makefile.in: reflect above change 2001-12-02 Philippe Elie * pp/oprofpp.h: * pp/oprofpp.cpp: * pp/oprofpp_util.cpp: * pp/opf_filter.cpp: small tidies 2001-12-01 Philippe Elie * Makefile.in: build util sub-dir first * dae/opd_util.h: * dae/opd_util.c: move opd_GetContext() ... * util/opd_popt.h: * util/opd_popt.c: in these new files * pp/oprofpp.cpp: * pp/opf_filter.cpp: * pp/op_time.cpp: * dae/oprofiled.c: free the poptContext + cleanup popt * events/op_help.c: * events/Makefile.in: use the popt library * pp/oprofpp.cpp: allow to use --output-linenr-info with --list-symbols. * doc/oprofile.1.in: * doc/oprofile.sgml: reflect it 2001-12-01 Philippe Elie * dae/opd_proc.c: * dae/opd_util.c: * dae/opd_util.h: * dae/oprofiled.c: backup if needed old samples files in a separate directory * pp/oprofpp.h: * pp/oprofpp_util.cpp: cleanup + minor buglet fix * util/file_manip.h: * util/file_manip.cpp: create_file_list() new to create a list of all the file in a directory * pp/op_time.cpp: new utility * pp/Makefile.in: handle op_time * doc/oprofile.sgml: * doc/oprofile.1.in: Document op_time 2001-11-30 Philippe Elie * configure.in: cvs add Rules.make.in. 2001-11-30 Dave Jones * configure.in: suppress reference to an inexistant Rules.make.in 2001-11-29 Philippe Elie * pp/oprofpp_util.cpp: do not remove leading underscore to avoid C++ demangling failure 2001-11-27 Philippe Elie * configure.in: * pp/Makefile.in: work-around for gcc 3.0 and bfd pre-1998 * doc/oprofile.sgml: typo 2001-11-26 Philippe Elie * Rules.make.in: new to add autodeps and share commons definitions * all Makefile.in except module, gui: use autodeps * doc/oprofile.1.in: typo * util/filemanip.h: missing std:: 2001-11-25 Philippe Elie * oprofile-tests/understanding/persistent.cpp: new * util/persistent.h: new. An attempt to provide a better configuration saving/restoring library. Not yet linked to oprof_start. 2001-11-22 Philippe Elie * pp/oprofpp_util.cpp: take care than get_linenr() get line nr and filename info from bfd for the right symbol and not for the nearest symbol with debug info (#484660) 2001-11-15 Philippe Elie * module/oprofile.h: work around against a gcc 2.91.66 code generation bug in oprof_exit() 2001-11-14 Philippe Elie * dae/op_start: do not pass bufsize, note_bufsize and kernel_only as option to the daemon but ... * dae/oprofiled.c: read them from sysctl * dae/opd_proc.c: in opd_handle_old_sample_file() do not delete sample file if mtime differ but backup it. * doc/oprofile.sgml: * pp/oprof_convert.c: * pp/oprofpp_util.cpp: replace session number by backup number * util/string_manip.cpp: fix stupid bug in rtrim() 2001-11-13 Philippe Elie * gui/oprof_start.h: * gui/oprof_start.cpp: * dae/opd_util.h: * dae/opd_util.cpp: small cleanup * module/oprofile.c: simplify a little what the nmi handler * doc/oprofile.sgml: clarify op_to_source options * pp/child_reader.cpp: * pp/child_reader.h: move these ... * util/child_reader.cpp: * util/child_reader.h: here * util/file_manip.h: * util/file_manip.cpp: new * gui/Makefile.in: * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: * pp/Makefile.in: * pp/opf_filter.cpp: use child_reader and file_manip * pp/oprofpp_util.cpp: change ordering of opening in opp_bfd ctr to avoid cryptic error message * TODO: update 2001-11-12 Philippe Elie * events: new directory * events/Makefile.in: * events/op_events.c: * events/op_events_desc.c: * events/op_help.c: new, splitted from op_events.c * pp/oprofpp_util.cpp: new, splitted from oprofpp.cpp * pp/oprofpp.h: * pp/oprofpp.c: * op_user.h: * all Makefile.in: update * op_events.c: remove 2001-11-12 Philippe Elie * op_events.c: last commit was bad * pp/oprofpp.c: use sstream 2001-11-12 Philippe Elie * util: new directory * util/string_manip.cpp: * util/string_manip.h: new * Makefile.in: handle util directory * pp/Makefile.in: * pp/opf_filter.h: * pp/opf_filter.cpp: * gui/Makefile.in: * gui/oprof_start_util.cpp: * gui/oprof_start_util.h: update to use string_manip.cpp * op_events.c: * op_user.h: * pp/opf_filter.h: * pp/opf_filter.cpp: * pp/opf_container.cpp: remove dead code 2001-11-11 Dave Jones * module/oprofile.[c|h]: Change MSR defines from MSR_IA32_xxx from MSR_P6_xxx, based on info on Linux kernel from Mikael Pettersson that these MSRs don't exist on Pentium 4. 2001-11-11 Philippe Elie * gui/oprof_start.cpp: fix record_config() * op_user.h: fix one comment 2001-11-10 Bob Montgomery * module/oprofile.c: fix pid/pgrp filter to reset counter 2001-11-08 John Levon * TODO: update * configure.in: bump to 0.0.8cvs 2001-11-07 John Levon * acinclude.m4: * configure.in: fixes for configuration when Qt2 not found * child_reader.h: * child_reader.cpp: compile with gcc 3.0 2001-11-07 John Levon * configure.in: bump to 0.0.7 2001-11-07 John Levon * configure.in: * module/oprofile.h: * module/oprofile.c: fail if hard_get_current() exists - this won't work 2001-11-06 Philippe Elie * doc/oprofile.1.in: reformat options * doc/oprofile.sgml: clarify options that require argument. Document short option * gui/oprof_start_util.cpp: fix basename() * pp/oprofpp.cpp: * pp/oprofpp.h: * pp/opf_filter.cpp: better options handling * module/oprofile.c: update one comment * TODO: update 2001-11-06 John Levon * configure.in: * module/oprofile.h: * module/oprofile.c: support for hard_get_current() 2001-11-06 John Levon * module/oprofile.h: * module/oprofile.c: make allow_unload exist for UP too (default to 1) 2001-11-05 John Levon * TODO: update * module/oprofile.c: fix nr_interrupts sysctl 2001-11-04 Philippe Elie * dae/op_start: * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/ui/oprof_start.base.ui: handle note table size sysctl * module/op_syscalls.c: handle dname hash coding collision with a linear search. * module/oprofile.c: * module/oprofile.h: * module/op_syscalls.c: Use a struct to hold the whole sysctl settable things rather global var. 2001-11-03 Philippe Elie * modules/oprofile.h: add a sysctl struct to hold all sysctl set-able variable * modules/oprofile.c: two bugs fixes. 2001-11-02 Philippe Elie * modules/oprofile.h: minor cleanup * modules/oprofile.c: better handling of irq statistics 2001-10-31 John Levon * module/oprofile.c: add comment about unfixable races. 2001-10-30 John Levon * Move module code into module/ subdir. Bye bye CVS history :/ 2001-10-30 John Levon * op_x86.c: complain properly about lAPIC-less machines 2001-10-26 John Levon * TODO: update 2001-10-26 H. J. Lu * Makefile.in: use $(LD) not ld 2001-10-25 Philippe Elie * configure.in: fix version.h checking for gcc 2.91.66 2001-10-25 John Levon * Makefile.in: * doc/Makefile.in: * dae/Makefile.in: * pp/Makefile.in: * gui/Makefile.in: add $DESTDIR to prefix (part from H.J. Lu) 2001-10-25 H. J. Lu * configure.in: better version.h workaround * doc/*.1: * doc/Makefile.in: better .so manpage install 2001-10-25 Philippe Elie * doc/oprofile.sgml: minor change. * pp/opf_filter.cpp: repair short option -a and -s 2001-10-24 Philippe Elie * pp/op_to_source: remove from cvs * pp/Makefile.in: opf_filter application renamed to op_to_source * pp/child_reader.h: new * pp/child_reader.cpp: new, allow to fork a child and read its stdout/stderr * pp/opf_filter.h: * pp/opf_filter.cpp: use child_reader to launch objdump. op_to_source -a and -s must be specified with long form --assembly and --source-with-assembly. This also speed-up assembly output. Doc not updated. 2001-10-18 John Levon * configure.in: workaround #2, hopefully fixing Mandrake (bug #471448) 2001-10-17 John Levon * oprofile.c: don't mask when restoring MSR values * doc/Makefile.in: don't use man symlinks 2001-10-17 John Levon * oprofile.c: save original counter setup and restore on unload (bug #464094) 2001-10-16 John Levon * configure.in: * oprofile.h: workaround for Mandrake randomly back-porting things. 2001-10-16 John Levon * dae/opd_proc.c: * gui/oprof_start.cpp: * gui/oprof_start_config.cpp: * gui/oprof_start_config.h: * gui/oprof_start_util.cpp: * pp/opf_container.cpp: * pp/opf_filter.h: * pp/opf_filter.cpp: * pp/oprof_convert.cpp: add note device to gui, general cleanup 2001-10-16 John Levon * oprofile.h: fix likely() macro 2001-10-14 John Levon * TODO: update * op_syscalls.c: * op_user.h: * oprofile.h: * oprofile.c: * dae/op_start: * dae/opd_proc.c: * dae/oprofiled.h: * dae/oprofiled.c: use a separate map buffer. 2001-10-14 John Levon * acinclude.m4: don't give up if we can't find moc 2001-10-14 John Levon * oprofile.c: merge no-thread code 2001-10-14 John Levon * dae/opd_proc.c: * dae/oprofiled.c: * op_user.h: * oprofile.h: * op_syscalls.c: use string pool. Prime hash table with common entries. Consider parent in name_hash. 2001-10-13 Philippe Elie * doc/oprofile.sgml: minor change * pp/opf_filter.cpp: better warning 2001-10-13 John Levon * configure.in: 0.0.6 has been released -> 0.0.7cvs 2001-10-12 John Levon * TODO: update * doc/oprofile.sgml: new docs for annotation filter 2001-10-12 John Levon * pp/opf_filter.cpp: make output filters more like diff (needs doc), briefer info message 2001-10-12 John Levon * doc/Makefile.in: add FIXME * gui/oprof_start.cpp: fix std:: * acinclude.m4: more fixes 2001-10-12 Philippe Elie * gui/oprof_start_util.cpp: use select() rather non-blocking mode to read output from the child process 2001-10-11 Philippe Elie * doc/oprofile.sgml: * doc/oprofile.1.in: * pp/opf_filter: make --output and --no-output more intuitive 2001-10-09 Philippe Elie * doc/oprofile.sgml: * doc/oprofile.1.in: clarify doc * pp/opf_filter.cpp: corner case fix in --output-dir and --source-dir handling. 2001-10-08 John Levon * acinclude.m4: * configure.in: * gui/Makefile.in: fix idiot config bug of mine 2001-10-06 Philippe Elie * pp/opf_filter.cpp: * pp/op_to_source: small cleanup 2001-10-05 Philippe Elie * doc/oprofile.1.in: * doc/oprofile.sgml: * pp/op_to_source: * pp/opf_filter.cpp: implement --output and --no-output to allow output file generation filtering 2001-10-04 John Levon * TODO: update 2001-10-03 Philippe Elie * doc/oprofile.1.in: * doc/oprofile.sgml: * pp/op_to_source: * pp/opf_filter.cpp: implement --source-dir and --output-dir to generated separated annoted source file. 2001-10-03 Philippe Elie * pp/oprofpp.cpp * pp/oprofpp.h * pp/opf_filter.cpp: minor cleanup 2001-10-03 John Levon * TODO: update * Makefile.in: remove generated files on make distclean * acinclude.m4: update from source 2001-10-02 Philippe Elie * pp/oprofpp.cpp: fix a silly bug in do_list_symbols (oprofpp -l) 2001-10-02 John Levon * doc/oprofile.sgml: fix * Makefile.in: dist fix 2001-10-02 John Levon * TODO: update * configure.in: -> 0.0.5 for release 2001-10-01 Philippe Elie * pp/opf_container.cpp: * pp/opf_filter.h: comment * pp/opf_filter.cpp: speed-up 2001-09-30 Philippe Elie * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/oprofpp.cpp: * pp/oprofpp.h: cleanup 2001-09-30 Philippe Elie * gui/oprof_start.cpp: * gui/oprof_start.h: * gui/ui/oprof_start.base.ui: cleanup 2001-09-29 Philippe Elie * pp/opf_filter.cpp: check if we need debug info to work. * gui/oprof_start.cpp: use one config file by counter. Store selected counter in oprof_start_config * gui/oprof_start.cpp: * gui/persistent_config.h: remove dirty flag in persistent_config_t template class 2001-09-29 John Levon * TODO: update * gui/oprof_start.cpp: * gui/ui/oprof_start_base.ui: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: add verbose option * pp/opf_container.cpp: * pp/opf_filter.cpp: some FIXMEs and little cleanups 2001-09-29 Philippe Elie * pp/oprofpp.cpp: bug fix when calling the bfd lib. 2001-09-29 Philippe Elie * gui/oprof_start.cpp: two minor fixes. 2001-09-28 John Levon * various files: the footer is now a header ! * dae/opd_start.c: fix msync !! * gui/oprof_start.cpp: * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: better default event count value. Save CPU type to oprofile file. 2001-09-28 Philippe Elie * pp/opf_filter.c: fix op_to_source [-a] [-s] 2001-09-28 Philippe Elie * doc/oprofile.sgml: oops, correct bad merging with John's last update. 2001-09-27 Philippe Elie * doc/oprofile.1.in: minor change * op_events.c: remove --gui-description stuff * pp/opf_filter.cpp: remove use of temporary array to pass argument to the popt library 2001-09-27 John Levon * doc/oprofile.sgml: updates * gui/oprof_start_util.cpp: fix compile, revert g++ extension (different on g++ 3.0) 2001-09-27 John Levon * gui/oprof_start_util.cpp: use g++ extension to avoid using temporary files 2001-09-27 John Levon * gui/oprof_start_util.cpp: fix crasher bug 2001-09-27 John Levon * gui/oprof_start.h: * gui/oprof_start.cpp: get per-counter config working 2001-09-27 John Levon * pp/Makefile.in: * pp/oprofpp.c: * pp/oprofpp.cpp: rename file 2001-09-27 John Levon * pp/opf_container.cpp: * pp/oprofpp.h: * pp/oprofpp.c: speed improvements 2001-09-26 Philippe Elie * configure.in: typo * pp/oprofpp.c: fix oprofpp -s. Use std::string (work not yet finish) * pp/oprofpp.h: ditto * pp/opf_filter.cpp: ditto 2001-09-26 John Levon * oprofile.c: add nr_interrupts * gui/oprof_start.h: * gui/oprof_start.cpp: * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: * gui/ui/oprof_start_base.ui: add daemon status display, fix basename() 2001-09-26 John Levon * configure.in: remove broken bit * pp/Makefile.in: fix options * doc/oprofile.sgml: minor changes 2001-09-26 Philippe Elie * pp/Makefile.in: increase level of warning * pp/oprof_convert.c: minor fix to avoid warning * dae/opd_util.c: ditto * pp/oprofpp.c: get_linenr() never return null in filename (fix bug #464482). symcomp() ensure correct vma comparison (fix #464093) * dae/opd_util.c: minor fixe in op_poptGetContext() * gui/oprof_start.cpp: minor cleanup 2001-09-25 John Levon * dae/op_stop: * gui/oprof_start_config.cpp: use pidof instead 2001-09-25 John Levon * gui/oprof_start_config.cpp: fix is_profiler_started() too 2001-09-25 John Levon * dae/op_stop: fix terribly stupid error 2001-09-25 John Levon * op_event.c: whooops 2001-09-25 John Levon * gui/oprof_start.cpp: std:: fix * dae/op_start: * op_events.c: robustness fix 2001-09-25 John Levon * gui/oprof_start.cpp: fix silly bug 2001-09-24 John Levon * pp/opf_filter.cpp: "fix" compile error 2001-09-24 John Levon * gui/oprofile: * gui/Makefile.in: remove old gui 2001-09-24 John Levon * dae/op_start: make a little more robust 2001-09-24 John Levon * include/sstream: * Makefile.in: * configure.in: * pp/Makefile.in: * gui/Makefile.in: configure/make fixes * op_events.c: re-order for Athlon 2001-09-23 John Levon * pp/oprofpp.c: small cleanup 2001-09-23 John Levon * oprofile.h: * op_x86.c: support for 2.4.10 2001-09-23 John Levon * gui/oprof_start.h: * gui/oprof_start.cpp: rework validator stuff a bit 2001-09-23 John Levon * gui/oprof_start.cpp: use std::find_if * gui/oprof_start_config.cpp: * gui/oprof_start_util.cpp: minor tidies 2001-09-23 John Levon * dae/op_dump: * dae/op_start: echo errors to stderr * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: * gui/oprof_start.cpp: use fork/exec to spawn children 2001-09-23 John Levon * TODO: update * gui/Makefile.in: * gui/oprof_start_config.h: * gui/oprof_start_config.cpp: * gui/oprof_start_util.h: * gui/oprof_start_util.cpp: * gui/oprof_start.h: * gui/oprof_start.cpp: new file for util functions 2001-09-23 John Levon * dae/opd_util.c: * dae/opd_util.h: * dae/oprofiled.c: * pp/oprofpp.c: * pp/opf_filter.cpp: * configure.in: enable __builtin_expect, fix popt problem * pp/oprof_convert.c: small fixes * op_events.c: shorten event descriptions for GUI * gui/*: many more updates * pp/Makefile.in: fix 2001-09-21 John Levon * dae/opd_proc.c: removed over-verbose line * configure.in: * oprofile.h: * oprofile.c: add likely/unlikely, take note lock on dump 2001-09-21 Philippe Elie * pp/opf_filter.h: move declaration of counter_array_t to * pp/oprofpp.h: here * pp/oprofpp.c: define and use counter_array_t + minor cleanup * pp/opf_filter.cpp: remove definition of counter_array_t 2001-09-21 Philippe Elie * Makefile.in: remove aclocal.m4 in distclean * pp/Makefile.in: use $(CXX) and $(CXXFLAGS) * pp/opf_container.cpp: * pp/opf_filter.cpp: * pp/opf_filter.h: * pp/oprofpp.c: * pp/oprofpp.h: cleanup 2001-09-20 Philippe Elie * Makefile.in: minor change in module building * pp/Makefile.in: link oprofpp with opf_filter * pp/op_to_source: avoid pipe from oprofpp to opf_filter * pp/opf_filter.h: remove a few member function * pp/opf_container.cpp: ditto + minor cleanup * pp/opf_filter.cpp: oprofpp is no longer piped to opf_filter but linked with it. Many change, needs additional cleanup * pp/oprofpp.c: group all stuff in two class. Rather a a C with class than a full C++ file for now. Fix a bug in filename handling. * pp/oprofpp.h: add opp_bfd and opp_samples_files class. * dae/opd_util.c: add a few explicit cast for C++ compile * dae/opd_util.h: wrap function declaratio with extern "C" 2001-09-19 John Levon * oprofile.c: fix silly read valid bug 2001-09-19 John Levon * Makefile.in: whoops, missed op_util.o from build 2001-09-19 John Levon * dae/oprofiled.c: fix little bug, tidy a bit * TODO: update 2001-09-18 John Levon * Makefile.in: * op_syscalls.c: * op_util.c: * oprofile.h: move some code around * oprofile.c: fix a tiny bug 2001-09-18 John Levon * dae/opd_proc.c: * dae/oprofiled.h: implement hashing of images * doc/oprofile.sgml: fix -- issue and use 2001-09-18 John Levon * .cvsignore: * README: update * configure.in: small cleanup * op_init.c: add comment * oprofile.h: * op_syscalls.c: * op_x86.c: move fixmap stuff, remove disable APIC * oprofile.c: init failure fix * doc/oprofile.sgml: * dae/opd_proc.c: fix handle_old_sample_files() bug, check mtime hasn't changed on a new map 2001-09-16 John Levon * acinclude.m4: * autogen.sh: * configure.in: * gui/Makefile.in: * gui/ui/Makefile.in: * gui/ui/oprof_start.base.ui: * gui/oprof_start.h: autoconfiscation for Qt2 * gui/oprof_start_config.cpp: add comments 2001-09-16 Philippe Elie * pp/opf_filter.cpp: fix unrecognized input * pp/opf_container.cpp: better error messages. put op_nr_counters in the global namespace (gcc 2.91 work around) 2001-09-16 John Levon * pp/oprofpp.cpp: small tidy 2001-09-16 Philippe Elie * pp/opf_filter.cpp: minor tidy * gui/oprof_start.base.ui: new oprof_start gui * gui/oprof_start.cpp: new, derived class of oprof_start_base * gui/oprof_start.h: ditto * gui/oprof_start_impl.cpp: implementation of oprof_start class * gui/oprof_start_config.cpp: utilities function for oprof_start * gui/oprof_start_config.h: ditto * gui/persistent_config.h: utility template * gui/oprof_start_main.cpp: main() for oprof_start * gui/Makefile.in: handle this stuff 2001-09-15 John Levon * pp/oprofpp.c: some cleanup 2001-09-15 John Levon * pp/oprofpp.c: allow non-matching mtimes in order to allow pp on different machines. Make conflicting counter specifications a fatal error 2001-09-15 John Levon * all Makefile.in: install should depend on all * pp/oprofpp.c: fixes for Athlon 4 counters. Enable debug info for list-symbol. Some stricter checking 2001-09-15 Philippe Elie * op_events.c: some static variable to global * op_user.h: export these * oprofile.c: typo in comment * dae/opd_proc.c: fix size of samples files 2001-09-13 Dave Jones * doc/oprofile.1.in: Update so it doesn't say 'Intel only' * dae/op_start: Fix output so that it prints [0-3] instead of [0-4[ 2001-09-12 Philippe Elie * pp/oprofpp.c: fix cpu type output for opf_filter * dae/op_stop: return error code properly 2001-09-12 John Levon * pp/oprofpp.c: print name of cpu type * dae/op_stop: * dae/op_start: re-organise, tidy 2001-09-12 John Levon * oprofile.c: fix small but triggerable SMP dump race 2001-09-12 John Levon * oprofile.h: * oprofile.c: * op_x86.c: move some code about * op_syscalls.c: add comment 2001-09-12 John Levon * configure.in: remove warning * op_user.h: * op_events.c: fix and clean up cpu type detection * op_init.c: fix email * oprofile.c: add IRQ stats. Not sure whether to keep... 2001-09-12 John Levon * oprofile.h: * oprofile.c: use cpu_number_map (pedantry thing) 2001-09-07 Philippe Elie * oprofile.c: remove /proc/.../cpu_type. Check if user mode cpu type detection is identical to module cpu type * op_events.h: * op_events.c: add op_get_cpu_type(). script can get cpu_type by op_help --get-cpu-type * gui/oprofile: use it * dae/oprofiled.c: ditto * dae/op_start: ditto, pass expected_cpu_type to module * doc/oprofile.sgml: update * doc/oprofile.1.in: update * pp/oprofpp.c: get cpu_type from samples file * pp/opf_filter.cpp: get cpu type from stdin 2001-09-06 John Levon * dae/opd_proc.c: use j not i in msync ! 2001-09-06 John Levon * dae/op_start: more sanity checking of options 2001-09-06 John Levon * doc/oprofile.sgml: update a bit 2001-09-06 John Levon * : make op_nr_counters a var (no pp support for > 2 yet) * dae/oprofiled.c: don't print help when counter event etc. are wrong 2001-09-06 John Levon * oprofile.h: * oprofile.c: use MODULE_LICENSE 2001-09-06 John Levon * op_user.h: add missing prototype * dae/op_start: fix counter extraction 2001-09-05 Philippe Elie * pp/oprofpp.c: fix a few corner case, cleanup. * dae/opd_proc: ditto. * dae/op_start: better handling of counter number * dae/opd_proc: minor change. * op_user.h: enable support for four counters * oprofile.c: ditto. Split functions * op_events.c: expose op_get_cpu_type_str(int) to world. 2001-09-04 John Levon * oprofile.h: * oprofile.c: don't restore delivery mode to LVTPC (causes APIC error on SMP). Fix for silly sem hang with do_dump 2001-09-04 John Levon * dae/op_start: fix typo bug 2001-09-04 John Levon * doc/oprofile.sgml: some small tidies 2001-09-04 John Levon * oprofile.c: change lvtpc_apic_restore to be more careful ! 2001-09-02 John Levon * oprofile.c: don't allow unload on SMP unless allow_unload is set. Still needs docs (no point till SMP works). 2001-09-02 John Levon * dae/op_dump: complain if not root more clearly. 2001-09-02 John Levon * oprofile.c: remove bogus setting for NMI oopser. smp_apic_restore() -> lvtpc_apic_restore() 2001-09-01 Philippe Elie * oprofile.c: fix pmc_setup() * pp/Makefile.in: * dae/Makefile.in: fix uninstall problem 2001-08-31 Philippe Elie * oprofile.h: * dae/oprofiled.h: * op_user.h: * oprofpp.h: * dae/opd_util.h: share commmon declarations, put it in op_user.h, include op_user.h in other .h when necessary. * op_events.c: * all Makefile.in: update dependancies. 2001-08-30 Philippe Elie * oprofile.c: use loop instead of fixed counter number 2001-08-26 Philippe Elie * op_events.c: add option to op_help for the gui * gui/oprofile: use op_help to build description of events, accept Athlon (only 2 counters) 2001-08-25 Philippe Elie * pp/oprofpp.c: * dae/op_start: use loop instead of fixed number of counter. 2001-08-24 Philippe Elie * pp/oprof_convert.c: add v4 --> v5 conversion 2001-08-23 Philippe Elie * oprofile.c: correct some comment. 2001-08-22 Philippe Elie * op_user.h: * dae/opd_proc.c: * dae/opd_util.c: * dae/opd_util.h: * dae/oprofiled.h: * dae/oprofiled.c: * dae/oprofiled.c: row to column file format, lot of changes. 2001-08-21 Philippe Elie * op_events.c: Add Athlon string/unit maks description 2001-08-20 Philippe Elie * op_events.c: change in handling of search/check events * dae/oprofiled.c: * dae/oprofiled.h: * oprofile.c: * oprofile.h: * pp/oprofpp.c: * pp/oprofpp.h: reflects caller/prototype, lot of changes. 2001-08-31 John Levon * Makefile.in: * op_x86.c: * oprofile.h: * oprofile.c: a prototype detector for SMP hardware, some small cleanup 2001-08-20 Dave Jones * doc/oprofile.sgml: Updated to reflect new Athlon/Duron capabilities. * pp/oprof_convert.c: * pp/oprofpp.c: use EXIT_FAILURE | EXIT_SUCCESS in exit() calls. * oprofile.c: Make non-exported functions static and remove duplicate definitions. 2001-08-19 John Levon * dae/op_start: handle celeries in cpu type 2001-08-19 John Levon * op_init.c: * oprofile.h: * oprofile.c: small tidies of the Athlon support 2001-08-19 Dave Jones * op_events.c: * op_init.c: * oprofile.h: * oprofile.c: * dae/op_start: * dae/oprofiled.h: * dae/oprofiled.c: initial Athlon support 2001-08-19 Philippe Elie * oprofile.c: use symbolic constant for all apic setup, no generated code change 2001-08-18 Philippe Elie * Makefile.in: * dae/Makefile.in: * pp/Makefile.in: * doc/Makefile.in: * gui/Makefile.in: add uninstall target 2001-08-18 John Levon * dae/opd_proc.c: tiny cleanup 2001-08-17 Philippe Elie * dae/opd_proc.c: * TODO: minor cleanup. 2001-08-16 Philippe Elie * gui/oprofile: * dae/op_start: * doc/oprofile.1.in: document and use op_dump 2001-08-16 John Levon * configure.in: bump version to 0.0.5cvs 2001-08-16 John Levon * all Makefile.in: mkdir install files 2001-08-15 Philippe Elie * dae/opd_proc.c: fix a FILE* leak in opd_get_ascii_maps() 2001-08-14 John Levon * op_syscalls.c: don't return negative hashes ! revert dname len "fix" use a much better hash function * dae/opd_proc.c: protect against negative hashes 2001-08-14 John Levon * op_syscalls.c: some small fixes * oprofile.c: add back unmasking code during set_gate, but only LVTPC 2001-08-11 John Levon * oprofile.h: 2.4.8 doesn't either. *sigh*. looks like we need some autoconfery :( 2001-08-11 John Levon * oprofile.h: 2.4.7-linus doesn't include the Andrew Morton complete_and_exit(). Hopefully this will make it into 2.4.8, I'm banking on this. 2001-08-11 John Levon * dae/op_dump: * doc/oprofile.sgml: * dae/Makefile.in: a little utility for dumping 2001-08-11 Dave Jones * oprofile.h: * oprofile.c: back-compat code and use of new struct completion for the thread 2001-08-11 John Levon * oprofile.c: corner case where an a miss against a full count, we were attributing wrong (reported by Bob Montgomery) 2001-08-11 John Levon * oprofile.c: use a simple cli/sti when installing the NMI handler. It should work and avoids the unmasking problem. 2001-08-10 John Levon * dae/oprofiled.h: fix header include (from Dave Jones) * op_syscalls.c: * oprofile.c: fix undefined symbol (from Dave Jones) 2001-08-10 John Levon * oprofile.c: small tidy in apic setup 2001-08-02 John Levon * oprofile.c: fix mod unload race, small fixes * dae/op_start: make sysctl error actually appear * doc/oprofile.sgml: document need for modutils 2.4.6 * op_syscalls.c: fix stupid mod use count problem 2001-07-28 John Levon * dae/opd_proc.c: d'oh, fat-fingered a slow memleak in the a-ksymoops modules fix 2001-07-27 Philippe Elie * pp/oprof_convert.c: fix bug when conversion skip more than one version. 2001-07-27 John Levon * doc/Makefile.in: ln -s -> ln -sf * dae/opd_util.c: actually include the right header * dae/opd_util.h: compile freestanding from oprofiled.h 2001-07-26 John Levon * oprofile.c: fix comment * doc/oprofile.sgml: document symbolless modules not working * dae/Makefile.in: * dae/opd_proc.c: * dae/oprofiled.h: catch modules with no symbols via query_module() and ignore samples for them quickly 2001-07-25 Philippe Elie * dae/op_start: beautify the output of op_start --help * pp/op_to_source: ditto. better argument checking. * pp/oprof_convert.c: * pp/oprofpp.h: * dae/oprofiled.h: fix problem with opd_footer, don't bump opd_footer version number ! 2001-07-25 John Levon * pp/Makefile.in: * pp/oprof_convert.c: convert to v4 * pp/oprofpp.c: use opd_strdup 2001-07-25 John Levon * dae/opd_util.c: small tidy 2001-07-24 Philippe Elie * dae/opd_util.c: * dae/opd_util.h: add relative path name to absolute path name stuff * pp/oprofpp.c: use it. * pp/op_to_source: simplify code to reflect above change. 2001-07-25 John Levon * dae/opd_proc.c: fix uninitialised pointer access (reported by ) that could segfault oprofile in case of module load/unload activity * Makefile.in: * dae/opd_proc.c: * dae/opd_util.c: * dae/opd_util.h: * dae/oprofiled.c: * dae/oprofiled.h: * pp/Makefile.in: * pp/oprofpp.c: * pp/oprofpp.h: use mtime() instead of md5sum(). Still doesn't handle "./a; gcc -o a a.c; ./a" 2001-07-22 Philippe Elie * doc/oprofile.1.in: * doc/oprofile.sgml: * pp/opf_filter.h: * pp/opf_filter.cpp: * pp/opf_container.cpp: implement and document filtering for assembly output. 2001-07-21 Philippe Elie * doc/oprofile.sgml: * gui/oprofile: * oprofile.c: remove edge_detect support. * pp/oprofpp.c: check counter range for each event type. * oprofile.c: ditto. * gui/oprofile: ditto and save setup for each event type. * oprofile.h: op_check_range() : display the allowed range. 2001-07-18 Philippe Elie * dae/op_start: disable all counters before starting the setup. 2001-07-18 John Levon * doc/oprofile.sgml: add in bit I forgot about not profiling ring 0 2001-07-18 John Levon * doc/oprofile.sgml: added a warning about very low counter values (from Philippe, modified) 2001-07-15 John Levon * oprofile.c: * oprofile.h: * dae/op_start: * dae/oprofiled.c: * doc/oprofile.sgml: remove ability to set different values on different CPUs 2001-07-15 John Levon * TODO: remove done thing 2001-07-15 John Levon * dae/opd_proc.c: backup old sample files if the profiling details (count, unit mask etc.) disagree. Fixes #435245 2001-07-15 Philippe Elie * dae/oprofiled.c: fix oprofiled --version to work even if the profiler is not already started. * gui/oprofile: many cleanup. Fix bug track #435248. Make the gui more independant on the number of counter. * pp/op_to_source: fix bug in command line arguments handling. * pp/opf_filter.h: * pp/opf_filter.cpp: * pp/opf_container.cpp: Apply some cleanup suggested by John, principally change few inheritance to composition. * pp/oprof_convert.c: fix --version. 2001-07-14 Philippe Elie * doc/oprofile.sgml: * doc/oprofile.1.in: minor doc fix. 2001-07-14 John Levon * doc/oprofile.sgml: small tidies 2001-07-01 Philippe Elie * doc/oprofile.1.in: * doc/oprofile.sgml: document op_to_source, oprof_convert and the oprofile gui * gui/oprofile: onStartProfiling() check that count is in the allowed range. onStopProfiling() flush the samples 2001-07-14 John Levon * Makefile.in: dist fix 2001-07-14 John Levon * doc/oprofile.sgml: make it clear we want vmlinux not vmlinuz * doc/html/: remove generated files from CVS * Makefile.in: changes to create HTML files on dist 2001-06-30 John Levon * pp/Makefile.in: fix the fix * pp/opf_filter.h: very minor changes 2001-06-29 John Levon * pp/Makefile.in: fix up for opf_filter * configure.in: add AC_PROG_CXX 2001-06-29 Philippe Elie * pp/opf_filter.cpp: * pp/opf_container.cpp: * pp/opf_filter.h: * pp/op_to_source: new file which provide a source annotation utility. * pp/Makefile.in: build and install opf_filter / op_to_source 2001-06-29 John Levon * configure.in: * dae/opd_util.h: hide __attribute__((malloc)) warnings when necessary. Document --with-cc bug. 2001-06-29 Philippe Elie * gui/oprofile: more saving of the user setup. 2001-06-27 John Levon * dae/opd_util.c: document get_line() restriction 2001-06-27 Philippe Elie * dae/oprofiled.c: fix cpu_speed_str/cpu_speed variable setup logic. * gui/oprofile: save advanced setup form to persistent storage. Add many validation. 2001-06-25 John Levon * op_events.c: * pp/oprof_convert.c: add missing headers, remove CVS blip * dae/opd_util.h: specify malloc attribute. gives warnings on older compilers, who cares. I doubt this will help but it can't harm 2001-06-25 John Levon * pp/oprof_convert.c: continue if an error with one file occurs * dae/op_stop: remove rmmod again - it is user's choice on when/whether to unload 2001-06-23 Philippe Elie * pp/op_start: add missing support for specifying the log filename. Get correct cpu speed information for smp as suggested by John. * dae/oprofiled.c: Correct a warning with some older version of the popt library. * pp/oprofpp: as above. * gui/oprofile: advanced setup form added. * pp/oprof_convert.c: version and help option support. 2001-06-23 John Levon * pp/.cvsignore: add oprof_convert 2001-06-23 Philippe Elie * pp/oprof_convert.c: new utility to convert samples files when the opd_footer struct is changed. * pp/Makefile.in: reflect the above change. Tidy some unnecessary blank. * Makefile.in: Tidy some unnecessary blank/tabulation. 2001-06-23 John Levon * README: update 2001-06-22 John Levon * oprofile.c: always have smp_apic_restore() 2001-06-22 John Levon * various: made spacing more consistent in C source, removed unused utility functions. 2001-06-22 John Levon * oprofile.c: actually call smp_apic_restore() on UP * dae/op_start: don't remove the module immediately after inserting it ! 2001-06-22 Philippe Elie * dae/oprofiled.h, pp/oprofpp.h: change the opd_footer struct. Bump OPD_VERSION to reflect the file format change. * pp/oprofpp.c: reflect the above change * dae/oprofiled.c: reflect the above change, many options supressed because setup is read from the /proc/sys/dev/oprofile files. * dae/opd_proc: suppress some "extern variable" which no longer exist. * dae/op_start: reflect the above change 2001-06-22 Philippe Elie * dae/op_start: add --ctr[0|1]-edge-detect * gui/oprofile: add edge detect stuff * oprofile.c: add edge-detect stuff, the edge-detect is an experimental feature which do not work actually (no effect for now). Because this is experimental no documentation are provided on this option. 2001-06-22 John Levon * configure.in: * dae/op_stop: * doc/oprofile.sgml: * op_init.c: * op_syscalls.c: * oprofile.h: * oprofile.c: add and document the ability to make the module unloadable. Not well tested (but seems to work). * doc/oprofile.sgml: document compile-time options better, thank Philippe 2001-06-21 John Levon * oprofile.c: remove stale comments. fix theoretical memory leaks when setting up the sysctls fails, small tidy 2001-06-19 John Levon * README: * doc/oprofile.sgml: * doc/html/: s/sourceforge/sf/ 2001-06-16 Philippe Elie * op_events.c: op_check_events() fix two bad use of op_check_unit_mask(). op_get_um_desc() fix a typo. 2001-06-14 Philippe Elie * op_events.c: struct op_unit_mask, struct op_unit_desc allow up to seven unit masks. Reflect this change in data, op_check_unit_mask() and callers of op_check_unit_mask(). 2001-06-12 John Levon * results/intro: tidy up * results/kernel-compile/time-aves.pl: fix regexps * results/latex/: results from the LaTeX runs 2001-06-09 Philippe Elie * dae/op_start: avoid chmod to a non existing directory and setup access mode from 700 to 755. Replace use of the sysctl utility by a do_sysctl() function. * gui/oprofile: some cleanup and bugfix. * pp/oprofpp.c: add new output options --list-all-symbols-details, --output-linenr-info * doc/oprofile.1.in: * doc/oprofile.sgml: update documentation about the new oprofpp option 2001-06-09 John Levon * configure.in: fix build with CONFIG_MODVERSIONS enabled. 2001-06-04 John Levon * dae/oprofiled.c: move logfile message to before close(1) to not need to use stderr 2001-06-03 John Levon * gui/: new directory * Makefile.in: * configure.in: * gui/.cvsignore: * gui/Makefile.in: * gui/oprofile: Philippe's prototype tcl/tk startup script. Requires more work. 2001-06-03 John Levon * pp/oprofpp.h: remove libiberty header that was apparently breaking install on slackware 2001-06-03 John Levon * README: update 2001-06-03 Philippe Elie * op_events.c: allow unit mask option to be bit mask 2001-06-01 John Levon * dae/opd_proc.c: actually use opd_get_count - fix bug with counter 1 reported results * dae/op_start: fix broken shell scripting * dae/oprofpp.c: fix list-symbols output 2001-04-30 John Levon * dae/op_start: better error reporting * dae/opd_proc.c: fix indentation 2001-04-08 John Levon * configure.in: 0.0.3 has been released. Bump cvs version to 0.0.4 2001-04-05 John Levon * dae/opd_proc.c: remove forced dumping. It was causing overhead spikes * doc/html/results.html: * doc/oprofile.sgml: * dae/op_start: Hopefully document dump clearly enough 2001-04-05 John Levon * oprofile.h: * op_syscalls.c: 2.4.3 and above have a rw mmap_sem 2001-04-05 John Levon * doc/html/: added missing files 2001-04-05 John Levon * doc/oprofile.sgml: * doc/html/resources.html: add URLs 2001-04-05 John Levon * pp/oprofpp.c: fix gprof output bug. It works OK now, but MULTIPLIER == 1 will break for some reason 2001-04-05 John Levon * doc/oprofile.sgml: * doc/html/: finish SGML documentation (for now) 2001-04-04 John Levon * doc/Makefile.in: * doc/oprofile.sgml: * doc/oprofile: start SGML documentation 2001-04-04 John Levon * configure.in: * Makefile.in: * doc/Makefile.in: * doc/oprofile.1.in: add a manpage 2001-04-04 John Levon * pp/oprofpp.c: get some sort of half-working output in gprof format. Currently the numbers are screwed up, need a major trawl through gprof source to see what's going on. 2001-04-04 John Levon * dae/Makefile.in: * dae/md5.c: * dae/md5.h: * dae/opd_proc.c: * dae/oprofiled.h: * pp/Makefile.in: * pp/oprofpp.c: * pp/oprofpp.h: use md5sums to verify sample file integrity. Stored in each sample file footer are md5sums of the binary. These are checked by the daemon when re-using an old file, and by the post-processor. Bump OPD_VERSION to reflect the file format change. * dae/oprofiled.c: make start up more friendly * dae/op_start: make script more friendly 2001-03-10 John Levon * dae/opd_proc.c: fixed some error messages * results/kernel-compile/raw/ccu.gnuplot: add 2001-02-05 John Levon * TODO: update * results/intro: update * results/kernel-compile/: update, add FIG files * results/lmbench: lmbench results * results/output/kernel-ac12-output: add readprofile output 2001-02-04 John Levon * TODO: update * op_syscalls.c: small re-org, some micro-optimisations to do_hash() * pp/oprofpp.c: clean up --list-symbol output a little * results/kernel-compile/overhead: update with results * results/kernel-compile/time-aves.pl: add gnuplot output * results/kernel-compile/raw/ : raw output files * results/output/ : new dir for example output * results/output/libc-2.1.92.so: output from libc profile * results/output/kernel-ac12-output: output from kernel profile * results/output/do_anonymous_page: detailed symbol profile * results/output/oprofile.module: output for oprofile module 2001-02-03 John Levon * TODO: update * oprofile.h: * op_syscalls.c: make do_hash() non-recursive * oprofile.c: make thread wake up half as often * dae/opd_proc.c: quiesce dump sysctl make resilient against broken sample (don't exceed mmap) * pp/oprofpp.c: --gcc-demangle -> --demangle, just too annoying to live 2001-02-01 John Levon * oprofile.h: add op_save_syscalls() * oprofile.c: let interrupt_sleep_on() die add kernel_only option sysctl dumps everything it can now * op_syscalls.c: add op_save_syscalls() * dae/opd_proc.c: * dae/oprofiled.c: * dae/op_start: add --kernel-only * doc/guide.lyx: mention --kernel-only * TODO: update 2001-02-01 John Levon * Makefile.in: split out op_init.c * autogen.sh: new file * configure.in: fix --with-cc. Split out op_init.c * op_init.c: new file, to allow rest -march=i686 * oprofile.c: cut out init stuff to op_init.c * opd_proc.c: more verbose * results/kernel-compile/time-aves.pl: work with other time format too 2001-01-25 John Levon * configure.in: add --with-cc option * pp/oprofpp.c: fix const discard warnings 2001-01-25 John Levon * configure.in: must check for liberty *after* libdl 2001-01-24 John Levon * oprofile.c: we're not using op_check_ctr() return value, so don't have one 2001-01-23 John Levon * configure.in: * op_syscalls.c: * oprofile.c: * oprofile.h: stripped the NMI error handling stuff * op_events.c: fixed silly bug in the other place too :P * dae/oprofiled.c: improved error messages 2001-01-22 John Levon * op_events.c: fix silly bug so you can set both counters at once * oprofile.c: don't disable/enable counters in the interrupt handler. It's expensive and doesn't really buy anything. Fix a silly EBUSY bug when open fails once. * dae/op_start: don't remove old sample files pass correct event to daemon for ctr1 2001-01-22 John Levon * op_syscalls.c:do_hash(): use strcpy not strncpy. It's probably faster, and if d_name.len is corrupted the kernel has bigger things to worry about. 2001-01-22 John Levon * dae/guide.lyx: * dae/guide.html: update docs a little 2001-01-22 John Levon * dae/op_start: * op_user.h: bump up hash table size * results/kernel-compile/overhead: intro to kernel compile tests * results/kernel-compile/time-aves.pl: script to generate averages + overheads * op_syscalls.c: three fixes to do_hash(). It's going to be a pain to make iterative :( 2001-01-21 John Levon * results/: Started a collection of results 2001-01-20 John Levon * TODO: update * configure.in: add comment * Makefile.in: moved oprofile_k.c to op_syscalls.c, op_user.h added * op_syscalls.c: rename of oprofile_k.c map buffer is dead now use vmalloc() and friends for hash map Reworking of hash_map stuff into abb's linked hash map structure * op_user.h: new file representing shared structs etc. between daemon and kernel module Reworked OP_ flags in count. Reworked hash map structure * oprofile.c: get along with the new UP APIC stuff in 2.4.0ac9 remove extraneous lock_kernel() default buffer size added map buffer died Use up_and_exit() in kernel thread to fix zombies :P Set diethreaddie = 0 in start_thread() oprof_put_mapping() added we weren't turning OFF kernel/user counting when asked to * oprofile.h: move shared stuff to op_user.h increase the watermark to a much safer 768 * dae/Makefile.in: dependencies on op_user.h and version.h * dae/op_start: hide confusing output of op_stop --verbose option map buffer died * dae/opd_proc.c: --verbose option don't insist on new sample files Rework mapping code Be a little more forgiving with unstattable images * dae/opd_util.h: * dae/opd_util.c: add fatal flag to opd_get_fsize(). * dae/oprofiled.h: --verbose option move common code to op_user.h * dae/oprofiled.c: add --verbose option (very verbose !) map buffer died Add code for unpacking mapping notifications, rework mapping recognition * doc/guide.html: * doc/guide.lyx: some small updates * pp/oprofpp.c: fix segfault on failure to open binary. add --verbose option * pp/oprofpp.h: add --verbose option 2000-01-12 John Levon * oprofile.c: use standard kernel names for MSRs. Don't re-do fixmap if UP oopser patch is installed. Allow UP oopser to work if patches enabled, disable otherwise * oprofile.h: use standard kernel names for MSRs. * oprofile_k.c: only include fixmap code if necessary * configure.in: bump minor version 2000-12-15 John Levon * configure.in: default to /lib/modules/`uname -r`/build as kernel source directory * doc/guide.lyx: * doc/guide.html: update documentation 2000-12-13 John Levon * configure.in: bump minor version * oprofile.c: added KERN_ where needed, exclude the Pentium IV * pp/oprofpp.c: allow "oprofpp -l /bin/mv" and friends, some minor fixes 2000-12-12 John Levon * Makefile.in: * configure.in: approximate working modversions a little more * op_events.c: op_help INST_RETIRED will print out the value now * op_ioctl.h: * oprofile.c: * oprofile.h: * oprofile_k.c: * dae/Makefile.in: * dae/op_start: * dae/op_stop: * dae/opd_proc.c: * dae/oprofctl.c: * dae/oprofctl.h: * dae/oprofiled.h: ioctl() didn't last long. Replaced with sysctls. This has had a knock-on effect of moving the start/stop mechanism into the driver open/close routines * dae/oprofiled.c: must open devices in "reverse" order now * oprofile_k.c: fix X86_FEATURE_PGE testing * oprofile.c: use daemonize() * pp/oprofpp.c: fix working on constant argv 2000-11-04 John Levon * oprofile.c: what if signal happens later ? * dae/opd_util.c: clarify opd_read_device() API 2000-11-04 John Levon * ChangeLog: started ChangeLog (cue gc koan) * op_ioctl.h: added FIXME comment * oprofile.c: slight cleanup * oprofile.h: cleanups, use u16 for data->ctrs, data->next * pp/oprofpp.c: added comments * pp/oprofpp.h: fixed #defines oprofile-1.3.0/libopagent/0000775000175000017500000000000013323173527012467 500000000000000oprofile-1.3.0/libopagent/opagent_symbols.ver0000664000175000017500000000030112534404406016320 00000000000000OPAGENT_1.0 { global: op_open_agent; op_close_agent; op_write_native_code; op_write_debug_line_info; op_unload_native_code; op_major_version; op_minor_version; local: *; }; oprofile-1.3.0/libopagent/jitdump.h0000664000175000017500000000331612534404406014233 00000000000000/** * @file jitdump.h * Header structure of a JIT-dump file. * * @remark Copyright 2007 OProfile authors * @remark Read the file COPYING * * @author Jens Wilke * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ #include #include #include #include "op_types.h" #ifndef JITDUMP_H #define JITDUMP_H /** * Magic to do a sanity check that this is a dump file * characters "jItO" */ #define JITHEADER_MAGIC 0x4F74496A /** * Macro to calculate count of padding bytes * to extend a size to be 8-byte aligned. */ #define PADDING_8ALIGNED(x) ((((x) + 7) & 7) ^ 7) /** * Version number to avoid conflicts, increase * this whenever the header is changed */ #define JITHEADER_VERSION 1 struct jitheader { /* characters "jItO" */ u32 magic; /* version of the dump */ u32 version; u32 totalsize; u32 bfd_arch; u32 bfd_mach; u64 timestamp; char bfd_target[0]; }; enum jit_record_type { JIT_CODE_LOAD=0, JIT_CODE_UNLOAD=1, JIT_CODE_CLOSE=2, JIT_CODE_DEBUG_INFO=3 }; /* each record starts always with a id and a total_size */ struct jr_prefix { u32 id; u32 total_size; }; /* record0 (id=0) logs a jitted code */ struct jr_code_load { u32 id; u32 total_size; u64 timestamp; u64 vma; u64 code_addr; u32 code_size; u32 align; }; /* record1 (id=1) logs a code unload */ struct jr_code_unload { u32 id; u32 total_size; u64 timestamp; u64 vma; }; /* record2 (id=2) logs end of JVM livetime */ struct jr_code_close { u32 id; u32 total_size; u64 timestamp; }; /* record3 (id=3) logs debug line information. */ struct jr_code_debug_info { u32 id; u32 total_size; u64 timestamp; u64 code_addr; u32 nr_entry; u32 align; }; #endif /* !JITDUMP_H */ oprofile-1.3.0/libopagent/Makefile.am0000664000175000017500000000200212534404406014431 00000000000000pkglib_LTLIBRARIES = libopagent.la # install opagent.h to include directory include_HEADERS = opagent.h libopagent_la_SOURCES = opagent.c \ jitdump.h \ opagent.h EXTRA_DIST = opagent_symbols.ver libopagent_la_CFLAGS = -fPIC libopagent_la_CPPFLAGS = -I ${top_srcdir}/libop \ -I ${top_srcdir}/libutil \ @OP_CPPFLAGS@ libopagent_la_LIBADD = $(BFD_LIBS) # Do not increment the major version for this library except to # intentionally break backward ABI compatability. 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you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * @author Jens Wilke * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ #ifndef _LIB_OPAGENT_H #define _LIB_OPAGENT_H #include #include #if defined(__cplusplus) extern "C" { #endif struct debug_line_info { unsigned long vma; unsigned int lineno; /* The filename format is unspecified, absolute path, relative etc. */ char const * filename; }; typedef void * op_agent_t; /** * This function must be called by agents before any other function. * Creates and opens a JIT dump file in /tmp/.oprofile/jitdump * using the naming convention .dump. * * Returns a valid op_agent_t handle or NULL. If NULL is returned, errno * is set to indicate the nature of the error. **/ op_agent_t op_open_agent(void); /** * Frees all resources and closes open file handles. * * hdl: Handle returned from an earlier call to op_open_agent() * * Returns 0 on success; -1 otherwise. If -1 is returned, errno is * set to indicate the nature of the error. **/ int op_close_agent(op_agent_t hdl); /** * Signal the dynamic generation of native code from a virtual machine. * Writes a JIT dump record to the open JIT dump file using * the passed information. * * hdl: Handle returned from an earlier call to op_open_agent() * symbol_name: The name of the symbol being dynamically compiled. * This name can (and should) contain all necessary * information to disambiguate it from symbols of the * same name; e.g., class, method signature. * vma: The virtual memory address of the executable code. * code: Pointer to the location of the compiled code. * Theoretically, this may be a different location from * that given by the vma argument. For some JIT compilers, * obtaining the code may be impractical. For this (or any other) * reason, the agent can choose to pass NULL for this paraemter. * If NULL is passed, no code will be copied into the JIT dump * file. * code_size: Size of the compiled code. * * Returns 0 on success; -1 otherwise. If -1 is returned, errno is * set to indicate the nature of the error. **/ int op_write_native_code(op_agent_t hdl, char const * symbol_name, uint64_t vma, void const * code, const unsigned int code_size); /** * Add debug line information to a piece of code. An op_write_native_code() * with the same code pointer should have occurred before this call. It's not * necessary to provide one lineno information entry per machine instruction; * the array can contain hole. * * hdl: Handle returned from an earlier call to op_open_agent() * code: Pointer to the location of the code with debug info * nr_entry: Number of entries in compile_map * compile_map: Array of struct debug_line_info. See the JVMTI agent * library implementation for an example of what information * should be retrieved from a VM to fill out this data structure. * * Returns 0 on success; -1 otherwise. If -1 is returned, errno is * set to indicate the nature of the error. **/ int op_write_debug_line_info(op_agent_t hdl, void const * code, size_t nr_entry, struct debug_line_info const * compile_map); /** * Signal the invalidation of native code from a virtual machine. * * hdl: Handle returned from an earlier call to op_open_agent() * vma: The virtual memory address of the compiled code being unloaded. * An op_write_native_code() with the same vma should have * occurred before this call. * * Returns 0 on success; -1 otherwise. If -1 is returned, errno is * set to indicate the nature of the error. **/ int op_unload_native_code(op_agent_t hdl, uint64_t vma); /** * Returns the major version number of the libopagent library that will be used. **/ int op_major_version(void); /** * Returns the minor version number of the libopagent library that will be used. **/ int op_minor_version(void); /* idea how to post additional information for a piece of code. we use the code address as reference int op_write_loader_name(const void* code_addr, char const * loader_name); */ #if defined(__cplusplus) } #endif #endif oprofile-1.3.0/libopagent/opagent.c0000664000175000017500000003650212546756165014231 00000000000000/** * @file opagent.c * Interface to report symbol names and dynamically generated code to Oprofile * * @remark Copyright 2007 OProfile authors * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * @author Jens Wilke * @Modifications Daniel Hansel * * Copyright IBM Corporation 2007 * */ /****************************************************************** * ATTENTION: * When adding new functions to this interface, you MUST update * opagent_symbols.ver. * * If a change is made to an existing exported function, perform the * the following steps. As an example, assume op_open_agent() * is being updated to include a 'dump_code' parameter. * 1. Update the opagent.ver file with a new version node, and * add the op_open_agent to it. Note that op_open_agent * is also still declared in the original version node. * 2. Add '__asm__(".symver ") directives to this .c source file. * For this example, the directives would be as follows: * __asm__(".symver op_open_agent_1_0,op_open_agent@OPAGENT_1.0"); * __asm__(".symver op_open_agent_2_0,op_open_agent@@OPAGENT_2.0"); * 3. Update the declaration of op_open_agent in the header file with * the additional parameter. * 4. Change the name of the original op_open_agent to "op_open_agent_1_0" * in this .c source file. * 5. Add the new op_open_agent_2_0(int dump_code) function in this * .c source file. * * See libopagent/Makefile.am for more information. *******************************************************************/ #include "config.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include "opagent.h" #include "op_config.h" #include "jitdump.h" // Declare BFD-related global variables. static char * _bfd_target_name; static int _bfd_arch; static unsigned int _bfd_mach; // Define BFD-related global variables. static int define_bfd_vars(void) { bfd * bfd; bfd_boolean r; int len; #define MAX_PATHLENGTH 2048 char mypath[MAX_PATHLENGTH]; len = readlink("/proc/self/exe", mypath, sizeof(mypath)); if (len < 0) { fprintf(stderr, "libopagent: readlink /proc/self/exe failed\n"); return -1; } if (len >= MAX_PATHLENGTH) { fprintf(stderr, "libopagent: readlink /proc/self/exe returned" " path length longer than %d.\n", MAX_PATHLENGTH); return -1; } mypath[len] = '\0'; bfd_init(); bfd = bfd_openr(mypath, NULL); if (bfd == NULL) { bfd_perror("bfd_openr error. Cannot get required BFD info"); return -1; } r = bfd_check_format(bfd, bfd_object); if (!r) { bfd_perror("bfd_get_arch error. Cannot get required BFD info"); return -1; } _bfd_target_name = bfd->xvec->name; _bfd_arch = bfd_get_arch(bfd); _bfd_mach = bfd_get_mach(bfd); return 0; } /** * Define the version of the opagent library. */ #define OP_MAJOR_VERSION 1 #define OP_MINOR_VERSION 0 #define TMP_OPROFILE_DIR "/tmp/.oprofile" #define JITDUMP_DIR TMP_OPROFILE_DIR "/jitdump" #define MSG_MAXLEN 20 op_agent_t op_open_agent(void) { #define OP_JITCONV_USECS_TO_WAIT 1000 unsigned int usecs_waited = 0; char pad_bytes[7] = {0, 0, 0, 0, 0, 0, 0}; int pad_cnt; char dump_path[PATH_MAX]; char err_msg[PATH_MAX + 16]; int rc; struct jitheader header; int fd; struct timeval tv; FILE * dumpfile = NULL; /* Coverity complains about 'time-of-check-time-of-use' race if we do stat() on * a file (or directory) and then open or create it afterwards. So instead, * we'll try to open it and see what happens. */ int create_dir = 0; DIR * dir1 = opendir(TMP_OPROFILE_DIR); if (!dir1) { if (errno == ENOENT) { create_dir = 1; } else if (errno == ENOTDIR) { fprintf(stderr, "Error: Creation of directory %s failed. File exists where directory is expected.\n", TMP_OPROFILE_DIR); return NULL; } } else { closedir(dir1); } if (create_dir) { create_dir = 0; rc = mkdir(TMP_OPROFILE_DIR, S_IRWXU | S_IRWXG | S_IRWXO); if (rc && (errno != EEXIST)) { fprintf(stderr, "Error trying to create %s dir.\n", TMP_OPROFILE_DIR); return NULL; } } dir1 = opendir(JITDUMP_DIR); if (!dir1) { if (errno == ENOENT) { create_dir = 1; } else if (errno == ENOTDIR) { fprintf(stderr, "Error: Creation of directory %s failed. File exists where directory is expected.\n", JITDUMP_DIR); return NULL; } } else { closedir(dir1); } if (create_dir) { rc = mkdir(JITDUMP_DIR, S_IRWXU | S_IRWXG | S_IRWXO); if (rc && (errno != EEXIST)) { fprintf(stderr, "Error trying to create %s dir.\n", JITDUMP_DIR); return NULL; } } snprintf(dump_path, PATH_MAX, "%s/%i.dump", JITDUMP_DIR, getpid()); snprintf(err_msg, PATH_MAX + 16, "Error opening %s\n", dump_path); // make the dump file only accessible for the user for security reason. fd = creat(dump_path, S_IRUSR|S_IWUSR); if (fd == -1) { fprintf(stderr, "%s\n", err_msg); return NULL; } dumpfile = fdopen(fd, "w"); if (!dumpfile) { fprintf(stderr, "%s\n", err_msg); close(fd); return NULL; } again: /* We need OS-level file locking here because the opjitconv process may need to * copy the dumpfile while the JIT agent is still writing to it. */ rc = flock(fd, LOCK_EX | LOCK_NB); if (rc) { if (usecs_waited < OP_JITCONV_USECS_TO_WAIT) { usleep(100); usecs_waited += 100; goto again; } else { printf("opagent: Unable to obtain lock on JIT dumpfile (#1)\n"); fclose(dumpfile); return NULL; } } if (define_bfd_vars()) { fclose(dumpfile); return NULL; } header.magic = JITHEADER_MAGIC; header.version = JITHEADER_VERSION; header.totalsize = sizeof(header) + strlen(_bfd_target_name) + 1; /* calculate amount of padding '\0' */ pad_cnt = PADDING_8ALIGNED(header.totalsize); header.totalsize += pad_cnt; header.bfd_arch = _bfd_arch; header.bfd_mach = _bfd_mach; if (gettimeofday(&tv, NULL)) { fclose(dumpfile); fprintf(stderr, "gettimeofday failed\n"); return NULL; } header.timestamp = tv.tv_sec; snprintf(err_msg, PATH_MAX + 16, "Error writing to %s", dump_path); if (!fwrite_unlocked(&header, sizeof(header), 1, dumpfile)) { fclose(dumpfile); fprintf(stderr, "%s\n", err_msg); return NULL; } if (!fwrite_unlocked(_bfd_target_name, strlen(_bfd_target_name) + 1, 1, dumpfile)) { fclose(dumpfile); fprintf(stderr, "%s\n", err_msg); return NULL; } /* write padding '\0' if necessary */ if (pad_cnt && !fwrite_unlocked(pad_bytes, pad_cnt, 1, dumpfile)) { fclose(dumpfile); fprintf(stderr, "%s\n", err_msg); return NULL; } fflush_unlocked(dumpfile); flock(fd, LOCK_UN); #undef OP_JITCONV_USECS_TO_WAIT return (op_agent_t)dumpfile; } int op_close_agent(op_agent_t hdl) { #define OP_JITCONV_USECS_TO_WAIT 1000 unsigned int usecs_waited = 0; int dumpfd, rc; struct jr_code_close rec; struct timeval tv; FILE * dumpfile = (FILE *) hdl; if (!dumpfile) { errno = EINVAL; return -1; } rec.id = JIT_CODE_CLOSE; rec.total_size = sizeof(rec); if (gettimeofday(&tv, NULL)) { fprintf(stderr, "gettimeofday failed\n"); return -1; } rec.timestamp = tv.tv_sec; if ((dumpfd = fileno(dumpfile)) < 0) { fprintf(stderr, "opagent: Unable to get file descriptor for JIT dumpfile (#1)\n"); return -1; } again: /* We need OS-level file locking here because the opjitconv process may need to * copy the dumpfile while the JIT agent is still writing to it. */ rc = flock(dumpfd, LOCK_EX | LOCK_NB); if (rc) { if (usecs_waited < OP_JITCONV_USECS_TO_WAIT) { usleep(100); usecs_waited += 100; goto again; } else { printf("opagent: Unable to obtain lock on JIT dumpfile (#2)\n"); return -1; } } if (!fwrite_unlocked(&rec, sizeof(rec), 1, dumpfile)) return -1; fclose(dumpfile); flock(dumpfd, LOCK_UN); #undef OP_JITCONV_USECS_TO_WAIT dumpfile = NULL; return 0; } int op_write_native_code(op_agent_t hdl, char const * symbol_name, uint64_t vma, void const * code, unsigned int const size) { #define OP_JITCONV_USECS_TO_WAIT 1000 unsigned int usecs_waited = 0; int dumpfd, rc; struct jr_code_load rec; struct timeval tv; size_t sz_symb_name; char pad_bytes[7] = { 0, 0, 0, 0, 0, 0, 0 }; size_t padding_count; FILE * dumpfile = (FILE *) hdl; if (!dumpfile) { errno = EINVAL; fprintf(stderr, "Invalid hdl argument (#1)\n"); return -1; } sz_symb_name = strlen(symbol_name) + 1; rec.id = JIT_CODE_LOAD; rec.code_size = size; rec.vma = vma; rec.code_addr = (u64) (uintptr_t) code; rec.total_size = code ? sizeof(rec) + sz_symb_name + size : sizeof(rec) + sz_symb_name; /* calculate amount of padding '\0' */ padding_count = PADDING_8ALIGNED(rec.total_size); rec.total_size += padding_count; if (gettimeofday(&tv, NULL)) { fprintf(stderr, "gettimeofday failed\n"); return -1; } rec.timestamp = tv.tv_sec; if ((dumpfd = fileno(dumpfile)) < 0) { fprintf(stderr, "opagent: Unable to get file descriptor for JIT dumpfile (#2)\n"); return -1; } again: /* We need OS-level file locking here because the opjitconv process may need to * copy the dumpfile while the JIT agent is still writing to it. */ rc = flock(dumpfd, LOCK_EX | LOCK_NB); if (rc) { if (usecs_waited < OP_JITCONV_USECS_TO_WAIT) { usleep(100); usecs_waited += 100; goto again; } else { printf("opagent: Unable to obtain lock on JIT dumpfile (#3)\n"); return -1; } } /* This locking makes sure that we continuously write this record if * we are called within a multi-threaded context */ flockfile(dumpfile); /* Write record, symbol name, code (optionally), and (if necessary) * additional padding \0 bytes. */ if (fwrite_unlocked(&rec, sizeof(rec), 1, dumpfile) && fwrite_unlocked(symbol_name, sz_symb_name, 1, dumpfile)) { size_t expected_sz, sz; expected_sz = sz = 0; // Note: Some JVMs always pass size=zero, so it's not enough just to check // if 'code' is non-null. if (code && size) { sz = fwrite_unlocked(code, size, 1, dumpfile); expected_sz++; } if (padding_count) { sz += fwrite_unlocked(pad_bytes, padding_count, 1, dumpfile); expected_sz++; } /* Always flush to ensure conversion code to elf will see * data as soon as possible */ fflush_unlocked(dumpfile); funlockfile(dumpfile); flock(dumpfd, LOCK_UN); if (sz != expected_sz) { printf("opagent: fwrite_unlocked failed\n"); return -1; } return 0; } fflush_unlocked(dumpfile); funlockfile(dumpfile); flock(dumpfd, LOCK_UN); #undef OP_JITCONV_USECS_TO_WAIT return -1; } int op_write_debug_line_info(op_agent_t hdl, void const * code, size_t nr_entry, struct debug_line_info const * compile_map) { #define OP_JITCONV_USECS_TO_WAIT 1000 unsigned int usecs_waited = 0; struct jr_code_debug_info rec; long cur_pos, last_pos; struct timeval tv; size_t i; size_t padding_count; char padd_bytes[7] = {0, 0, 0, 0, 0, 0, 0}; int dumpfd, rc = -1; FILE * dumpfile = (FILE *) hdl; if (!dumpfile) { errno = EINVAL; fprintf(stderr, "Invalid hdl argument (#2)\n"); return -1; } /* write nothing if no entries are provided */ if (nr_entry == 0) return 0; rec.id = JIT_CODE_DEBUG_INFO; rec.code_addr = (uint64_t)(uintptr_t)code; /* will be fixed after writing debug line info */ rec.total_size = 0; rec.nr_entry = nr_entry; if (gettimeofday(&tv, NULL)) { fprintf(stderr, "gettimeofday failed\n"); return -1; } rec.timestamp = tv.tv_sec; if ((dumpfd = fileno(dumpfile)) < 0) { fprintf(stderr, "opagent: Unable to get file descriptor for JIT dumpfile (#3)\n"); return -1; } again: /* We need OS-level file locking here because the opjitconv process may need to * copy the dumpfile while the JIT agent is still writing to it. */ rc = flock(dumpfd, LOCK_EX | LOCK_NB); if (rc) { if (usecs_waited < OP_JITCONV_USECS_TO_WAIT) { usleep(100); usecs_waited += 100; goto again; } else { printf("opagent: Unable to obtain lock on JIT dumpfile (#4)\n"); return -1; } } /* This locking makes sure that we continuously write this record if * we are called within a multi-threaded context. */ flockfile(dumpfile); if ((cur_pos = ftell(dumpfile)) == -1l) goto error; if (!fwrite_unlocked(&rec, sizeof(rec), 1, dumpfile)) goto error; for (i = 0; i < nr_entry; ++i) { if (!fwrite_unlocked(&compile_map[i].vma, sizeof(compile_map[i].vma), 1, dumpfile) || !fwrite_unlocked(&compile_map[i].lineno, sizeof(compile_map[i].lineno), 1, dumpfile) || !fwrite_unlocked(compile_map[i].filename, strlen(compile_map[i].filename) + 1, 1, dumpfile)) goto error; } if ((last_pos = ftell(dumpfile)) == -1l) goto error; rec.total_size = last_pos - cur_pos; padding_count = PADDING_8ALIGNED(rec.total_size); rec.total_size += padding_count; if (padding_count && !fwrite(padd_bytes, padding_count, 1, dumpfile)) goto error; if (fseek(dumpfile, cur_pos, SEEK_SET) == -1l) goto error; if (!fwrite_unlocked(&rec, sizeof(rec), 1, dumpfile)) goto error; if (fseek(dumpfile, last_pos + padding_count, SEEK_SET) == -1) goto error; rc = 0; error: fflush_unlocked(dumpfile); funlockfile(dumpfile); flock(dumpfd, LOCK_UN); #undef OP_JITCONV_USECS_TO_WAIT return rc; } int op_unload_native_code(op_agent_t hdl, uint64_t vma) { #define OP_JITCONV_USECS_TO_WAIT 1000 int dumpfd, rc; unsigned int usecs_waited = 0; struct jr_code_unload rec; struct timeval tv; FILE * dumpfile = (FILE *) hdl; if (!dumpfile) { errno = EINVAL; fprintf(stderr, "Invalid hdl argument (#3)\n"); return -1; } rec.id = JIT_CODE_UNLOAD; rec.vma = vma; rec.total_size = sizeof(rec); if (gettimeofday(&tv, NULL)) { fprintf(stderr, "gettimeofday failed\n"); return -1; } rec.timestamp = tv.tv_sec; if ((dumpfd = fileno(dumpfile)) < 0) { fprintf(stderr, "opagent: Unable to get file descriptor for JIT dumpfile (#4)\n"); return -1; } again: /* We need OS-level file locking here because the opjitconv process may need to * copy the dumpfile while the JIT agent is still writing to it. */ rc = flock(dumpfd, LOCK_EX | LOCK_NB); if (rc) { if (usecs_waited < OP_JITCONV_USECS_TO_WAIT) { usleep(100); usecs_waited += 100; goto again; } else { printf("opagent: Unable to obtain lock on JIT dumpfile (#5)\n"); return -1; } } /* This locking makes sure that we continuously write this record if * we are called within a multi-threaded context. */ flockfile(dumpfile); if (!fwrite_unlocked(&rec, sizeof(rec), 1, dumpfile)) return -1; fflush_unlocked(dumpfile); funlockfile(dumpfile); flock(dumpfd, LOCK_UN); #undef OP_JITCONV_USECS_TO_WAIT return 0; } int op_major_version(void) { return OP_MAJOR_VERSION; } int op_minor_version(void) { return OP_MINOR_VERSION; } oprofile-1.3.0/libopt++/0000775000175000017500000000000013323173527011762 500000000000000oprofile-1.3.0/libopt++/popt_options.cpp0000664000175000017500000001720713323165335015150 00000000000000/** * @file popt_options.cpp * option parsing * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #include #include "op_popt.h" #include "op_version.h" #include "popt_options.h" #include "string_manip.h" using namespace std; namespace popt { /** * option_base - base class for implementation of a command line option * * Every command line option added before calling parse_options() * is of this type. */ class option_base { public: /** * option_base - construct an option with the given options. * @param option_name name part of long form e.g. --option * @param short_name short form name e.g. -o * @param help_str short description of the option * @param arg_help_str short description of the argument (if any) * @param data a pointer to the data to fill in * @param popt_flags the popt library data type */ option_base(char const * option_name, char short_name, char const * help_str, char const * arg_help_str, void * data, unsigned int popt_flags); virtual ~option_base() {} /** * post_process - perform any necessary post-processing */ virtual void post_process() {} protected: char const * option_name; }; /** the popt array singleton options */ static vector & popt_options(void) { static vector *x = new(vector); return *x; } static vector & options_list(void) { static vector *x = new(vector); return *x; } static int showvers; static struct poptOption appended_options[] = { { "version", 'v', POPT_ARG_NONE, &showvers, 0, "show version", NULL, }, POPT_AUTOHELP POPT_TABLEEND }; /* options parameter can't be a local variable because caller can use the * returned poptContext which contains pointer inside the options array */ static poptContext do_parse_options(int argc, char const ** argv, vector & options, vector & additional_params) { options = popt_options(); int const nr_appended_options = sizeof(appended_options) / sizeof(appended_options[0]); options.insert(options.end(), appended_options, appended_options + nr_appended_options); poptContext con = op_poptGetContext(NULL, argc, argv, &options[0], 0); if (showvers) show_version(argv[0]); char const * file; while ((file = poptGetArg(con)) != 0) additional_params.push_back(file); for (size_t i = 0 ; i < options_list().size() ; ++i) options_list()[i]->post_process(); return con; } void parse_options(int argc, char const ** argv, vector & additional_params) { vector options; poptContext con = do_parse_options(argc, argv, options, additional_params); poptFreeContext(con); } template class option_imp; /** * option - a binary option * * Use this option type for constructing specified / not-specified * options e.g. --frob */ template <> class option_imp : public option_base { public: option_imp(bool & value, char const * option_name, char short_name, char const * help_str); ~option_imp() {} void post_process(); private: bool & value; int popt_value; }; /** * option - a integer option * * Use this for options taking an integer e.g. --frob 6 */ template <> class option_imp : public option_base { public: option_imp(int & value, char const * option_name, char short_name, char const * help_str, char const * arg_help_str); ~option_imp() {} }; /** * option - a string option * * Use this for options taking a string e.g. --frob parsley */ template <> class option_imp : public option_base { public: option_imp(string & value, char const * option_name, char short_name, char const * help_str, char const * arg_help_str); void post_process(); ~option_imp() {} private: // we need an intermediate char array to pass to popt libs char * popt_value; string & value; }; /** * option< vector > - a string vector option * * Use this for options taking a number of string arguments, * separated by the given separator. */ template <> class option_imp< vector > : public option_base { public: option_imp(vector & value, char const * option_name, char short_name, char const * help_str, char const * arg_help_str, char separator = ','); void post_process(); ~option_imp() {} private: vector & value; // we need an intermediate char array to pass to popt libs char * popt_value; char const separator; }; option::~option() { delete the_option; } /// non templatized ctor for boolean option option::option(bool & value, char const * name, char short_name, char const * help) : the_option(new option_imp(value, name, short_name, help)) { } /// specialization of option ctor for integer option template <> option::option(int & value, char const * name, char short_name, char const * help, char const * arg_help) : the_option(new option_imp (value, name, short_name, help, arg_help)) { } /// specialization of option ctor for string option template <> option::option(string & value, char const * name, char short_name, char const * help, char const * arg_help) : the_option(new option_imp (value, name, short_name, help, arg_help)) { } /// specialization of option ctor for vector option template <> option::option(vector & value, char const * name, char short_name, char const * help, char const * arg_help) : the_option(new option_imp< vector > (value, name, short_name, help, arg_help)) { } option_base::option_base(char const * name, char short_name, char const * help, char const * arg_help, void * data, unsigned int popt_flags) : option_name(name) { poptOption const opt = { name, short_name, popt_flags, data, 0, help, arg_help }; popt_options().push_back(opt); options_list().push_back(this); } option_imp::option_imp(bool & val, char const * name, char short_name, char const * help) : option_base(name, short_name, help, 0, &popt_value, POPT_ARG_NONE), value(val), popt_value(0) { } void option_imp::post_process() { if (popt_value) { if (is_prefix(option_name, "no-")) value = !popt_value; else value = popt_value; } } option_imp::option_imp(int & value, char const * name, char short_name, char const * help, char const * arg_help) : option_base(name, short_name, help, arg_help, &value, POPT_ARG_INT) { } option_imp::option_imp(string & val, char const * name, char short_name, char const * help, char const * arg_help) : option_base(name, short_name, help, arg_help, &popt_value, POPT_ARG_STRING), popt_value(0), value(val) { } void option_imp::post_process() { if (popt_value) { value = popt_value; popt_value = 0; } } option_imp< vector >::option_imp(vector & val, char const * name, char short_name, char const * help, char const * arg_help, char sepchar) : option_base(name, short_name, help, arg_help, &popt_value, POPT_ARG_STRING), value(val), popt_value(0), separator(sepchar) { } void option_imp< vector >::post_process() { if (popt_value) { value = separate_token(popt_value, separator); popt_value = 0; } } } // namespace popt oprofile-1.3.0/libopt++/Makefile.am0000664000175000017500000000027612534404406013737 00000000000000AM_CPPFLAGS=-I ${top_srcdir}/libutil++ -I ${top_srcdir}/libutil @OP_CPPFLAGS@ AM_CXXFLAGS = @OP_CXXFLAGS@ noinst_LIBRARIES = libopt++.a libopt___a_SOURCES = popt_options.cpp popt_options.h oprofile-1.3.0/libopt++/Makefile.in0000664000175000017500000004632013323172172013747 00000000000000# Makefile.in generated by automake 1.15.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2017 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; 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* string frob; * static popt::option allow_frob_opt(allow_frob, "allow-frob", 'a', "allow frobs"); * static popt::option frob_opt(frob, "frob", 'f', "what to frob", "name"); * * ... * popt::parse_options(argc, argv, add_params); * \endcode * * Note than if you try to implement an option for an unsupported type like : * \code * static unsigned int i; * static popt::option i_opt(i, ....); * \endcode * you don't get a compile time error but a link time error. * * The call to parse_options() will fill in allow_frob and frob, if they * are passed to the program (myfrobber --allow-frob --frob foo), and place * any left over command line arguments in the add_params vector. Note * that the template parameter denotes the type of the option argument. * * When the template parameter type is bool, option starting with "no-" prefix * are implicitely considered as negated before writing the associated bool so * this will work as expected: * \code * bool demangle; * popt::option(demangle, "demangle", 'd', "demangle C++ symbols"), * popt::option(demangle, "no-demangle", '\0', "don't demangle C++ symbols"), * \endcode * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING * * @author Philippe Elie * @author John Levon */ #ifndef POPT_OPTIONS_H #define POPT_OPTIONS_H #include #include namespace popt { /** * parse_options - parse command line options * @param argc like the parameter of main() * @param argv like the parameter of main() * @param additional_params additional options are stored here * * Parse the given command line with the previous * options created. Multiple additional arguments * that are not recognised will be added to the additional_params * vector. */ void parse_options(int argc, char const ** argv, std::vector & additional_params); class option_base; /** * option - base class for a command line option * * Every command line option added before calling parse_options() * is of this type. */ class option { public: /** * Templatized constructor for an option. This adds the option * to the option list on construction. This is specialized for * each recognised option value type below. */ template option(T &, char const * option_name, char short_name, char const * help_str, char const * arg_help_str); /** * boolean operations don't get the same set of parameters as other * option, as there is no argument to give help for. * Due to a bug in gcc 2.95 we can't use a default parameter * in the templatized ctor above because 2.95 is unable to match * the right ctor. So on we add a non-templatized ctor with an exact * match for boolean option. */ option(bool &, char const * option_name, char short_name, char const * help_str); ~option(); private: option_base * the_option; }; /** * The supported option type, boolean option are matched by a non templatized * ctor above. */ template <> option::option(int &, char const * option_name, char short_name, char const * help_str, char const * arg_help_str); template <> option::option(std::string &, char const * option_name, char short_name, char const * help_str, char const * arg_help_str); template <> option::option(std::vector &, char const * option_name, char short_name, char const * help_str, char const * arg_help_str); } // namespace popt #endif // POPT_OPTIONS_H