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all-local check check-am clean clean-generic \ clean-local dist-info distclean distclean-generic distdir dvi \ dvi-am html html-am info info-am install install-am \ install-data install-data-am install-data-local install-exec \ install-exec-am install-info install-info-am install-man \ install-strip installcheck installcheck-am installdirs \ maintainer-clean maintainer-clean-aminfo \ maintainer-clean-generic maintainer-clean-vti mostlyclean \ mostlyclean-aminfo mostlyclean-generic mostlyclean-vti pdf \ pdf-am ps ps-am uninstall uninstall-am uninstall-info-am \ uninstall-local all-local: html $(TARGET_PS) $(TARGET_PDF) # Rule for generating postscript output. ps: simulavr.ps $(TARGET_DOX_PS) install-ps: ps $(INSTALL_DOX_PS) $(mkinstalldirs) $(DOC_INST_DIR) $(INSTALL_DATA) simulavr.ps $(DOC_INST_DIR)/simulavr.ps # Rule for generating html output. html: $(info_TEXINFOS) $(TARGET_DOX_HTML) mkdir -p html texi2html -split_node $(srcdir)/$(info_TEXINFOS) mv *.html html if test -f html/simulavr.html ; then \ cp html/simulavr.html html/index.html ; \ else \ if test -f html/simulavr_toc.html ; then \ cp html/simulavr_toc.html html/index.html ; \ fi \ fi install-html: html $(INSTALL_DOX_HTML) $(mkinstalldirs) $(DOC_INST_DIR)/html @list='$(wildcard html/*.html)' ; \ for file in $$list ; do \ echo " $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file"; \ $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file; \ done # General rule for installing documentation install-data-local: install-html install-ps $(INSTALL_PDF) uninstall-local: rm -rf $(DOC_INST_DIR) clean-local: rm -rf html internals_html internals # # I'm not generating PDF files by default. pdftex seems to # generate some warnings I don't like and can't figure out # how to get rid of. The generated pdf file seems to be alright # though, so you can still get a pdf file via `make pdf`. # # Rule for generating PDF output pdf: simulavr.pdf $(TARGET_DOX_PDF) simulavr.pdf: $(info_TEXINFOS) .texi.pdf: texi2pdf $< install-pdf: pdf $(INSTALL_DOX_PDF) $(mkinstalldirs) $(DOC_INST_DIR) $(INSTALL_DATA) simulavr.pdf $(DOC_INST_DIR)/simulavr.pdf # # Rules for generating documentation with doxygen # dox: internals_html internals internals_html internals: doxygen doxygen.config dox-html: internals_html dox-pdf: internals ${MAKE} -C internals pdf cp internals/refman.pdf simulavr-internals.pdf dox-ps: internals ${MAKE} -C internals ps cp internals/refman.ps simulavr-internals.ps install-dox-html: internals_html $(mkinstalldirs) $(DOC_INST_DIR)/internals_html @list='$(wildcard internals_html/*.html internals_html/*.css)' ; \ for file in $$list ; do \ echo " $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file"; \ $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file; \ done install-dox-pdf: dox-pdf $(mkinstalldirs) $(DOC_INST_DIR) $(INSTALL_DATA) internals/refman.pdf $(DOC_INST_DIR)/simulavr-internals.pdf install-dox-ps: dox-ps $(mkinstalldirs) $(DOC_INST_DIR) $(INSTALL_DATA) internals/refman.ps $(DOC_INST_DIR)/simulavr-internals.ps .PHONY: ps pdf dox dox-pdf install-pdf install-html install-ps install-dox-html \ install-dox-ps install-dox-pdf # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: simulavr-0.1.2.2/doc/doxygen.config.in0000644000175000001440000010624307735134246014470 00000000000000# $Id: doxygen.config.in,v 1.10 2003/09/26 22:07:34 troth Exp $ # @configure_input@ # Doxygen configuration file for the simulavr project. # Doxyfile 1.2.13 # This file describes the settings to be used by the documentation system # doxygen (www.doxygen.org) for a project # # All text after a hash (#) is considered a comment and will be ignored # The format is: # TAG = value [value, ...] # For lists items can also be appended using: # TAG += value [value, ...] # Values that contain spaces should be placed between quotes (" ") #--------------------------------------------------------------------------- # General configuration options #--------------------------------------------------------------------------- # The PROJECT_NAME tag is a single word (or a sequence of words surrounded # by quotes) that should identify the project. PROJECT_NAME = Simulavr # The PROJECT_NUMBER tag can be used to enter a project or revision number. # This could be handy for archiving the generated documentation or # if some version control system is used. PROJECT_NUMBER = @VERSION@ # The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) # base path where the generated documentation will be put. # If a relative path is entered, it will be relative to the location # where doxygen was started. If left blank the current directory will be used. OUTPUT_DIRECTORY = # The OUTPUT_LANGUAGE tag is used to specify the language in which all # documentation generated by doxygen is written. Doxygen will use this # information to generate all constant output in the proper language. # The default language is English, other supported languages are: # Brazilian, Chinese, Croatian, Czech, Danish, Dutch, Finnish, French, # German, Greek, Hungarian, Italian, Japanese, Korean, Norwegian, Polish, # Portuguese, Romanian, Russian, Slovak, Slovene, Spanish and Swedish. OUTPUT_LANGUAGE = English # If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in # documentation are documented, even if no documentation was available. # Private class members and static file members will be hidden unless # the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES EXTRACT_ALL = NO # If the EXTRACT_PRIVATE tag is set to YES all private members of a class # will be included in the documentation. EXTRACT_PRIVATE = NO # If the EXTRACT_STATIC tag is set to YES all static members of a file # will be included in the documentation. EXTRACT_STATIC = NO # If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) # defined locally in source files will be included in the documentation. # If set to NO only classes defined in header files are included. EXTRACT_LOCAL_CLASSES = YES # If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all # undocumented members of documented classes, files or namespaces. # If set to NO (the default) these members will be included in the # various overviews, but no documentation section is generated. # This option has no effect if EXTRACT_ALL is enabled. HIDE_UNDOC_MEMBERS = NO # If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all # undocumented classes that are normally visible in the class hierarchy. # If set to NO (the default) these class will be included in the various # overviews. This option has no effect if EXTRACT_ALL is enabled. HIDE_UNDOC_CLASSES = NO # If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will # include brief member descriptions after the members that are listed in # the file and class documentation (similar to JavaDoc). # Set to NO to disable this. BRIEF_MEMBER_DESC = NO # If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend # the brief description of a member or function before the detailed description. # Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the # brief descriptions will be completely suppressed. REPEAT_BRIEF = YES # If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then # Doxygen will generate a detailed section even if there is only a brief # description. ALWAYS_DETAILED_SEC = YES # If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited # members of a class in the documentation of that class as if those members were # ordinary class members. Constructors, destructors and assignment operators of # the base classes will not be shown. INLINE_INHERITED_MEMB = NO # If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full # path before files name in the file list and in the header files. If set # to NO the shortest path that makes the file name unique will be used. FULL_PATH_NAMES = NO # If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag # can be used to strip a user defined part of the path. Stripping is # only done if one of the specified strings matches the left-hand part of # the path. It is allowed to use relative paths in the argument list. STRIP_FROM_PATH = # The INTERNAL_DOCS tag determines if documentation # that is typed after a \internal command is included. If the tag is set # to NO (the default) then the documentation will be excluded. # Set it to YES to include the internal documentation. INTERNAL_DOCS = NO # Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct # doxygen to hide any special comment blocks from generated source code # fragments. Normal C and C++ comments will always remain visible. STRIP_CODE_COMMENTS = NO # If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate # file names in lower case letters. If set to YES upper case letters are also # allowed. This is useful if you have classes or files whose names only differ # in case and if your file system supports case sensitive file names. Windows # users are adviced to set this option to NO. CASE_SENSE_NAMES = YES # If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter # (but less readable) file names. This can be useful is your file systems # doesn't support long names like on DOS, Mac, or CD-ROM. SHORT_NAMES = NO # If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen # will show members with their full class and namespace scopes in the # documentation. If set to YES the scope will be hidden. HIDE_SCOPE_NAMES = NO # If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen # will generate a verbatim copy of the header file for each class for # which an include is specified. Set to NO to disable this. VERBATIM_HEADERS = NO # If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen # will put list of the files that are included by a file in the documentation # of that file. SHOW_INCLUDE_FILES = NO # If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen # will interpret the first line (until the first dot) of a JavaDoc-style # comment as the brief description. If set to NO, the JavaDoc # comments will behave just like the Qt-style comments (thus requiring an # explict @brief command for a brief description. JAVADOC_AUTOBRIEF = NO # If the INHERIT_DOCS tag is set to YES (the default) then an undocumented # member inherits the documentation from any documented member that it # reimplements. INHERIT_DOCS = YES # If the INLINE_INFO tag is set to YES (the default) then a tag [inline] # is inserted in the documentation for inline members. INLINE_INFO = NO # If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen # will sort the (detailed) documentation of file and class members # alphabetically by member name. If set to NO the members will appear in # declaration order. SORT_MEMBER_DOCS = NO # If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC # tag is set to YES, then doxygen will reuse the documentation of the first # member in the group (if any) for the other members of the group. By default # all members of a group must be documented explicitly. DISTRIBUTE_GROUP_DOC = NO # The TAB_SIZE tag can be used to set the number of spaces in a tab. # Doxygen uses this value to replace tabs by spaces in code fragments. TAB_SIZE = 4 # The GENERATE_TODOLIST tag can be used to enable (YES) or # disable (NO) the todo list. This list is created by putting \todo # commands in the documentation. GENERATE_TODOLIST = YES # The GENERATE_TESTLIST tag can be used to enable (YES) or # disable (NO) the test list. This list is created by putting \test # commands in the documentation. GENERATE_TESTLIST = YES # The GENERATE_BUGLIST tag can be used to enable (YES) or # disable (NO) the bug list. This list is created by putting \bug # commands in the documentation. GENERATE_BUGLIST = YES # This tag can be used to specify a number of aliases that acts # as commands in the documentation. An alias has the form "name=value". # For example adding "sideeffect=\par Side Effects:\n" will allow you to # put the command \sideeffect (or @sideeffect) in the documentation, which # will result in a user defined paragraph with heading "Side Effects:". # You can put \n's in the value part of an alias to insert newlines. ALIASES = # The ENABLED_SECTIONS tag can be used to enable conditional # documentation sections, marked by \if sectionname ... \endif. ENABLED_SECTIONS = # The MAX_INITIALIZER_LINES tag determines the maximum number of lines # the initial value of a variable or define consist of for it to appear in # the documentation. If the initializer consists of more lines than specified # here it will be hidden. Use a value of 0 to hide initializers completely. # The appearance of the initializer of individual variables and defines in the # documentation can be controlled using \showinitializer or \hideinitializer # command in the documentation regardless of this setting. MAX_INITIALIZER_LINES = 30 # Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources # only. Doxygen will then generate output that is more tailored for C. # For instance some of the names that are used will be different. The list # of all members will be omitted, etc. OPTIMIZE_OUTPUT_FOR_C = YES # Set the SHOW_USED_FILES tag to NO to disable the list of files generated # at the bottom of the documentation of classes and structs. If set to YES the # list will mention the files that were used to generate the documentation. SHOW_USED_FILES = YES #--------------------------------------------------------------------------- # configuration options related to warning and progress messages #--------------------------------------------------------------------------- # The QUIET tag can be used to turn on/off the messages that are generated # by doxygen. Possible values are YES and NO. If left blank NO is used. QUIET = NO # The WARNINGS tag can be used to turn on/off the warning messages that are # generated by doxygen. Possible values are YES and NO. If left blank # NO is used. WARNINGS = YES # If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings # for undocumented members. If EXTRACT_ALL is set to YES then this flag will # automatically be disabled. WARN_IF_UNDOCUMENTED = YES # The WARN_FORMAT tag determines the format of the warning messages that # doxygen can produce. The string should contain the $file, $line, and $text # tags, which will be replaced by the file and line number from which the # warning originated and the warning text. WARN_FORMAT = "$file:$line: $text" # The WARN_LOGFILE tag can be used to specify a file to which warning # and error messages should be written. If left blank the output is written # to stderr. WARN_LOGFILE = #--------------------------------------------------------------------------- # configuration options related to the input files #--------------------------------------------------------------------------- # The INPUT tag can be used to specify the files and/or directories that contain # documented source files. You may enter file names like "myfile.cpp" or # directories like "/usr/src/myproject". Separate the files or directories # with spaces. INPUT = @top_srcdir@/src \ @top_srcdir@/doc # If the value of the INPUT tag contains directories, you can use the # FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp # and *.h) to filter out the source-files in the directories. If left # blank the following patterns are tested: # *.c *.cc *.cxx *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp # *.h++ *.idl FILE_PATTERNS = *.c \ *.dox # The RECURSIVE tag can be used to turn specify whether or not subdirectories # should be searched for input files as well. Possible values are YES and NO. # If left blank NO is used. RECURSIVE = NO # The EXCLUDE tag can be used to specify files and/or directories that should # excluded from the INPUT source files. This way you can easily exclude a # subdirectory from a directory tree whose root is specified with the INPUT tag. EXCLUDE = # If the value of the INPUT tag contains directories, you can use the # EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude # certain files from those directories. EXCLUDE_PATTERNS = # The EXAMPLE_PATH tag can be used to specify one or more files or # directories that contain example code fragments that are included (see # the \include command). EXAMPLE_PATH = # If the value of the EXAMPLE_PATH tag contains directories, you can use the # EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp # and *.h) to filter out the source-files in the directories. If left # blank all files are included. EXAMPLE_PATTERNS = # If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be # searched for input files to be used with the \include or \dontinclude # commands irrespective of the value of the RECURSIVE tag. # Possible values are YES and NO. If left blank NO is used. EXAMPLE_RECURSIVE = NO # The IMAGE_PATH tag can be used to specify one or more files or # directories that contain image that are included in the documentation (see # the \image command). IMAGE_PATH = # The INPUT_FILTER tag can be used to specify a program that doxygen should # invoke to filter for each input file. Doxygen will invoke the filter program # by executing (via popen()) the command , where # is the value of the INPUT_FILTER tag, and is the name of an # input file. Doxygen will then use the output that the filter program writes # to standard output. INPUT_FILTER = # If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using # INPUT_FILTER) will be used to filter the input files when producing source # files to browse. FILTER_SOURCE_FILES = NO #--------------------------------------------------------------------------- # configuration options related to source browsing #--------------------------------------------------------------------------- # If the SOURCE_BROWSER tag is set to YES then a list of source files will # be generated. Documented entities will be cross-referenced with these sources. SOURCE_BROWSER = YES # Setting the INLINE_SOURCES tag to YES will include the body # of functions and classes directly in the documentation. INLINE_SOURCES = NO # If the REFERENCED_BY_RELATION tag is set to YES (the default) # then for each documented function all documented # functions referencing it will be listed. REFERENCED_BY_RELATION = YES # If the REFERENCES_RELATION tag is set to YES (the default) # then for each documented function all documented entities # called/used by that function will be listed. REFERENCES_RELATION = YES #--------------------------------------------------------------------------- # configuration options related to the alphabetical class index #--------------------------------------------------------------------------- # If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index # of all compounds will be generated. Enable this if the project # contains a lot of classes, structs, unions or interfaces. ALPHABETICAL_INDEX = YES # If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then # the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns # in which this list will be split (can be a number in the range [1..20]) COLS_IN_ALPHA_INDEX = 4 # In case all classes in a project start with a common prefix, all # classes will be put under the same header in the alphabetical index. # The IGNORE_PREFIX tag can be used to specify one or more prefixes that # should be ignored while generating the index headers. IGNORE_PREFIX = #--------------------------------------------------------------------------- # configuration options related to the HTML output #--------------------------------------------------------------------------- # If the GENERATE_HTML tag is set to YES (the default) Doxygen will # generate HTML output. GENERATE_HTML = YES # The HTML_OUTPUT tag is used to specify where the HTML docs will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `html' will be used as the default path. HTML_OUTPUT = internals_html # The HTML_HEADER tag can be used to specify a personal HTML header for # each generated HTML page. If it is left blank doxygen will generate a # standard header. HTML_HEADER = @srcdir@/dox_html_header # The HTML_FOOTER tag can be used to specify a personal HTML footer for # each generated HTML page. If it is left blank doxygen will generate a # standard footer. HTML_FOOTER = @srcdir@/dox_html_footer # The HTML_STYLESHEET tag can be used to specify a user defined cascading # style sheet that is used by each HTML page. It can be used to # fine-tune the look of the HTML output. If the tag is left blank doxygen # will generate a default style sheet HTML_STYLESHEET = @srcdir@/dox.css # If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, # files or namespaces will be aligned in HTML using tables. If set to # NO a bullet list will be used. HTML_ALIGN_MEMBERS = YES # If the GENERATE_HTMLHELP tag is set to YES, additional index files # will be generated that can be used as input for tools like the # Microsoft HTML help workshop to generate a compressed HTML help file (.chm) # of the generated HTML documentation. GENERATE_HTMLHELP = NO # If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag # controls if a separate .chi index file is generated (YES) or that # it should be included in the master .chm file (NO). GENERATE_CHI = NO # If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag # controls whether a binary table of contents is generated (YES) or a # normal table of contents (NO) in the .chm file. BINARY_TOC = NO # The TOC_EXPAND flag can be set to YES to add extra items for group members # to the contents of the Html help documentation and to the tree view. TOC_EXPAND = NO # The DISABLE_INDEX tag can be used to turn on/off the condensed index at # top of each HTML page. The value NO (the default) enables the index and # the value YES disables it. DISABLE_INDEX = NO # This tag can be used to set the number of enum values (range [1..20]) # that doxygen will group on one line in the generated HTML documentation. ENUM_VALUES_PER_LINE = 1 # If the GENERATE_TREEVIEW tag is set to YES, a side panel will be # generated containing a tree-like index structure (just like the one that # is generated for HTML Help). For this to work a browser that supports # JavaScript and frames is required (for instance Mozilla, Netscape 4.0+, # or Internet explorer 4.0+). Note that for large projects the tree generation # can take a very long time. In such cases it is better to disable this feature. # Windows users are probably better off using the HTML help feature. GENERATE_TREEVIEW = YES # If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be # used to set the initial width (in pixels) of the frame in which the tree # is shown. TREEVIEW_WIDTH = 200 #--------------------------------------------------------------------------- # configuration options related to the LaTeX output #--------------------------------------------------------------------------- # If the GENERATE_LATEX tag is set to YES (the default) Doxygen will # generate Latex output. GENERATE_LATEX = YES # The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `latex' will be used as the default path. LATEX_OUTPUT = internals # If the COMPACT_LATEX tag is set to YES Doxygen generates more compact # LaTeX documents. This may be useful for small projects and may help to # save some trees in general. COMPACT_LATEX = YES # The PAPER_TYPE tag can be used to set the paper type that is used # by the printer. Possible values are: a4, a4wide, letter, legal and # executive. If left blank a4wide will be used. PAPER_TYPE = letter # The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX # packages that should be included in the LaTeX output. EXTRA_PACKAGES = # The LATEX_HEADER tag can be used to specify a personal LaTeX header for # the generated latex document. The header should contain everything until # the first chapter. If it is left blank doxygen will generate a # standard header. Notice: only use this tag if you know what you are doing! LATEX_HEADER = # If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated # is prepared for conversion to pdf (using ps2pdf). The pdf file will # contain links (just like the HTML output) instead of page references # This makes the output suitable for online browsing using a pdf viewer. PDF_HYPERLINKS = YES # If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of # plain latex in the generated Makefile. Set this option to YES to get a # higher quality PDF documentation. USE_PDFLATEX = NO # If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. # command to the generated LaTeX files. This will instruct LaTeX to keep # running if errors occur, instead of asking the user for help. # This option is also used when generating formulas in HTML. LATEX_BATCHMODE = NO #--------------------------------------------------------------------------- # configuration options related to the RTF output #--------------------------------------------------------------------------- # If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output # The RTF output is optimised for Word 97 and may not look very pretty with # other RTF readers or editors. GENERATE_RTF = NO # The RTF_OUTPUT tag is used to specify where the RTF docs will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `rtf' will be used as the default path. RTF_OUTPUT = # If the COMPACT_RTF tag is set to YES Doxygen generates more compact # RTF documents. This may be useful for small projects and may help to # save some trees in general. COMPACT_RTF = NO # If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated # will contain hyperlink fields. The RTF file will # contain links (just like the HTML output) instead of page references. # This makes the output suitable for online browsing using WORD or other # programs which support those fields. # Note: wordpad (write) and others do not support links. RTF_HYPERLINKS = NO # Load stylesheet definitions from file. Syntax is similar to doxygen's # config file, i.e. a series of assigments. You only have to provide # replacements, missing definitions are set to their default value. RTF_STYLESHEET_FILE = # Set optional variables used in the generation of an rtf document. # Syntax is similar to doxygen's config file. RTF_EXTENSIONS_FILE = #--------------------------------------------------------------------------- # configuration options related to the man page output #--------------------------------------------------------------------------- # If the GENERATE_MAN tag is set to YES (the default) Doxygen will # generate man pages GENERATE_MAN = NO # The MAN_OUTPUT tag is used to specify where the man pages will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `man' will be used as the default path. MAN_OUTPUT = # The MAN_EXTENSION tag determines the extension that is added to # the generated man pages (default is the subroutine's section .3) MAN_EXTENSION = # If the MAN_LINKS tag is set to YES and Doxygen generates man output, # then it will generate one additional man file for each entity # documented in the real man page(s). These additional files # only source the real man page, but without them the man command # would be unable to find the correct page. The default is NO. MAN_LINKS = NO #--------------------------------------------------------------------------- # configuration options related to the XML output #--------------------------------------------------------------------------- # If the GENERATE_XML tag is set to YES Doxygen will # generate an XML file that captures the structure of # the code including all documentation. Note that this # feature is still experimental and incomplete at the # moment. GENERATE_XML = NO #--------------------------------------------------------------------------- # configuration options for the AutoGen Definitions output #--------------------------------------------------------------------------- # If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will # generate an AutoGen Definitions (see autogen.sf.net) file # that captures the structure of the code including all # documentation. Note that this feature is still experimental # and incomplete at the moment. GENERATE_AUTOGEN_DEF = NO #--------------------------------------------------------------------------- # Configuration options related to the preprocessor #--------------------------------------------------------------------------- # If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will # evaluate all C-preprocessor directives found in the sources and include # files. ENABLE_PREPROCESSING = YES # If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro # names in the source code. If set to NO (the default) only conditional # compilation will be performed. Macro expansion can be done in a controlled # way by setting EXPAND_ONLY_PREDEF to YES. MACRO_EXPANSION = NO # If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES # then the macro expansion is limited to the macros specified with the # PREDEFINED and EXPAND_AS_PREDEFINED tags. EXPAND_ONLY_PREDEF = NO # If the SEARCH_INCLUDES tag is set to YES (the default) the includes files # in the INCLUDE_PATH (see below) will be search if a #include is found. SEARCH_INCLUDES = YES # The INCLUDE_PATH tag can be used to specify one or more directories that # contain include files that are not input files but should be processed by # the preprocessor. INCLUDE_PATH = # You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard # patterns (like *.h and *.hpp) to filter out the header-files in the # directories. If left blank, the patterns specified with FILE_PATTERNS will # be used. INCLUDE_FILE_PATTERNS = # The PREDEFINED tag can be used to specify one or more macro names that # are defined before the preprocessor is started (similar to the -D option of # gcc). The argument of the tag is a list of macros of the form: name # or name=definition (no spaces). If the definition and the = are # omitted =1 is assumed. PREDEFINED = MACRO_DOCUMENTATION DOXYGEN # If the MACRO_EXPANSION and EXPAND_PREDEF_ONLY tags are set to YES then # this tag can be used to specify a list of macro names that should be expanded. # The macro definition that is found in the sources will be used. # Use the PREDEFINED tag if you want to use a different macro definition. EXPAND_AS_DEFINED = # If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then # doxygen's preprocessor will remove all function-like macros that are alone # on a line and do not end with a semicolon. Such function macros are typically # used for boiler-plate code, and will confuse the parser if not removed. SKIP_FUNCTION_MACROS = YES #--------------------------------------------------------------------------- # Configuration::addtions related to external references #--------------------------------------------------------------------------- # The TAGFILES tag can be used to specify one or more tagfiles. TAGFILES = # When a file name is specified after GENERATE_TAGFILE, doxygen will create # a tag file that is based on the input files it reads. GENERATE_TAGFILE = # If the ALLEXTERNALS tag is set to YES all external classes will be listed # in the class index. If set to NO only the inherited external classes # will be listed. ALLEXTERNALS = NO # The PERL_PATH should be the absolute path and name of the perl script # interpreter (i.e. the result of `which perl'). PERL_PATH = #--------------------------------------------------------------------------- # Configuration options related to the dot tool #--------------------------------------------------------------------------- # If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will # generate a inheritance diagram (in Html, RTF and LaTeX) for classes with base or # super classes. Setting the tag to NO turns the diagrams off. Note that this # option is superceded by the HAVE_DOT option below. This is only a fallback. It is # recommended to install and use dot, since it yield more powerful graphs. CLASS_DIAGRAMS = YES # If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is # available from the path. This tool is part of Graphviz, a graph visualization # toolkit from AT&T and Lucent Bell Labs. The other options in this section # have no effect if this option is set to NO (the default) HAVE_DOT = NO # If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen # will generate a graph for each documented class showing the direct and # indirect inheritance relations. Setting this tag to YES will force the # the CLASS_DIAGRAMS tag to NO. CLASS_GRAPH = YES # If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen # will generate a graph for each documented class showing the direct and # indirect implementation dependencies (inheritance, containment, and # class references variables) of the class with other documented classes. COLLABORATION_GRAPH = YES # If set to YES, the inheritance and collaboration graphs will show the # relations between templates and their instances. TEMPLATE_RELATIONS = YES # If set to YES, the inheritance and collaboration graphs will hide # inheritance and usage relations if the target is undocumented # or is not a class. HIDE_UNDOC_RELATIONS = YES # If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT # tags are set to YES then doxygen will generate a graph for each documented # file showing the direct and indirect include dependencies of the file with # other documented files. INCLUDE_GRAPH = YES # If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and # HAVE_DOT tags are set to YES then doxygen will generate a graph for each # documented header file showing the documented files that directly or # indirectly include this file. INCLUDED_BY_GRAPH = YES # If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen # will graphical hierarchy of all classes instead of a textual one. GRAPHICAL_HIERARCHY = YES # The tag DOT_PATH can be used to specify the path where the dot tool can be # found. If left blank, it is assumed the dot tool can be found on the path. DOT_PATH = # The DOTFILE_DIRS tag can be used to specify one or more directories that # contain dot files that are included in the documentation (see the # \dotfile command). DOTFILE_DIRS = # The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width # (in pixels) of the graphs generated by dot. If a graph becomes larger than # this value, doxygen will try to truncate the graph, so that it fits within # the specified constraint. Beware that most browsers cannot cope with very # large images. MAX_DOT_GRAPH_WIDTH = 1024 # The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height # (in pixels) of the graphs generated by dot. If a graph becomes larger than # this value, doxygen will try to truncate the graph, so that it fits within # the specified constraint. Beware that most browsers cannot cope with very # large images. MAX_DOT_GRAPH_HEIGHT = 1024 # If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will # generate a legend page explaining the meaning of the various boxes and # arrows in the dot generated graphs. GENERATE_LEGEND = YES # If the DOT_CLEANUP tag is set to YES (the default) Doxygen will # remove the intermedate dot files that are used to generate # the various graphs. DOT_CLEANUP = YES #--------------------------------------------------------------------------- # Configuration::addtions related to the search engine #--------------------------------------------------------------------------- # The SEARCHENGINE tag specifies whether or not a search engine should be # used. If set to NO the values of all tags below this one will be ignored. SEARCHENGINE = NO # The CGI_NAME tag should be the name of the CGI script that # starts the search engine (doxysearch) with the correct parameters. # A script with this name will be generated by doxygen. CGI_NAME = # The CGI_URL tag should be the absolute URL to the directory where the # cgi binaries are located. See the documentation of your http daemon for # details. CGI_URL = # The DOC_URL tag should be the absolute URL to the directory where the # documentation is located. If left blank the absolute path to the # documentation, with file:// prepended to it, will be used. DOC_URL = # The DOC_ABSPATH tag should be the absolute path to the directory where the # documentation is located. If left blank the directory on the local machine # will be used. DOC_ABSPATH = # The BIN_ABSPATH tag must point to the directory where the doxysearch binary # is installed. BIN_ABSPATH = # The EXT_DOC_PATHS tag can be used to specify one or more paths to # documentation generated for other projects. This allows doxysearch to search # the documentation for these projects as well. EXT_DOC_PATHS = simulavr-0.1.2.2/doc/stamp-vti0000644000175000001440000000014710204750217013045 00000000000000@set UPDATED 18 January 2004 @set UPDATED-MONTH January 2004 @set EDITION 0.1.2.2 @set VERSION 0.1.2.2 simulavr-0.1.2.2/doc/version.texi0000644000175000001440000000014710204750217013556 00000000000000@set UPDATED 18 January 2004 @set UPDATED-MONTH January 2004 @set EDITION 0.1.2.2 @set VERSION 0.1.2.2 simulavr-0.1.2.2/doc/mdate-sh0000755000175000001440000001147510203247651012636 00000000000000#!/bin/sh # Get modification time of a file or directory and pretty-print it. scriptversion=2003-11-09.00 # Copyright (C) 1995, 1996, 1997, 2003 Free Software Foundation, Inc. # written by Ulrich Drepper , June 1995 # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software Foundation, # Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # This file is maintained in Automake, please report # bugs to or send patches to # . case $1 in '') echo "$0: No file. Try \`$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: mdate-sh [--help] [--version] FILE Pretty-print the modification time of FILE. Report bugs to . EOF exit 0 ;; -v | --v*) echo "mdate-sh $scriptversion" exit 0 ;; esac # Prevent date giving response in another language. LANG=C export LANG LC_ALL=C export LC_ALL LC_TIME=C export LC_TIME save_arg1="$1" # Find out how to get the extended ls output of a file or directory. if ls -L /dev/null 1>/dev/null 2>&1; then ls_command='ls -L -l -d' else ls_command='ls -l -d' fi # A `ls -l' line looks as follows on OS/2. # drwxrwx--- 0 Aug 11 2001 foo # This differs from Unix, which adds ownership information. # drwxrwx--- 2 root root 4096 Aug 11 2001 foo # # To find the date, we split the line on spaces and iterate on words # until we find a month. This cannot work with files whose owner is a # user named `Jan', or `Feb', etc. However, it's unlikely that `/' # will be owned by a user whose name is a month. So we first look at # the extended ls output of the root directory to decide how many # words should be skipped to get the date. # On HPUX /bin/sh, "set" interprets "-rw-r--r--" as options, so the "x" below. set - x`$ls_command /` # Find which argument is the month. month= command= until test $month do shift # Add another shift to the command. command="$command shift;" case $1 in Jan) month=January; nummonth=1;; Feb) month=February; nummonth=2;; Mar) month=March; nummonth=3;; Apr) month=April; nummonth=4;; May) month=May; nummonth=5;; Jun) month=June; nummonth=6;; Jul) month=July; nummonth=7;; Aug) month=August; nummonth=8;; Sep) month=September; nummonth=9;; Oct) month=October; nummonth=10;; Nov) month=November; nummonth=11;; Dec) month=December; nummonth=12;; esac done # Get the extended ls output of the file or directory. set - x`eval "$ls_command \"\$save_arg1\""` # Remove all preceding arguments eval $command # Get the month. Next argument is day, followed by the year or time. case $1 in Jan) month=January; nummonth=1;; Feb) month=February; nummonth=2;; Mar) month=March; nummonth=3;; Apr) month=April; nummonth=4;; May) month=May; nummonth=5;; Jun) month=June; nummonth=6;; Jul) month=July; nummonth=7;; Aug) month=August; nummonth=8;; Sep) month=September; nummonth=9;; Oct) month=October; nummonth=10;; Nov) month=November; nummonth=11;; Dec) month=December; nummonth=12;; esac day=$2 # Here we have to deal with the problem that the ls output gives either # the time of day or the year. case $3 in *:*) set `date`; eval year=\$$# case $2 in Jan) nummonthtod=1;; Feb) nummonthtod=2;; Mar) nummonthtod=3;; Apr) nummonthtod=4;; May) nummonthtod=5;; Jun) nummonthtod=6;; Jul) nummonthtod=7;; Aug) nummonthtod=8;; Sep) nummonthtod=9;; Oct) nummonthtod=10;; Nov) nummonthtod=11;; Dec) nummonthtod=12;; esac # For the first six month of the year the time notation can also # be used for files modified in the last year. if (expr $nummonth \> $nummonthtod) > /dev/null; then year=`expr $year - 1` fi;; *) year=$3;; esac # The result. echo $day $month $year # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-end: "$" # End: simulavr-0.1.2.2/doc/texinfo.tex0000644000175000001440000060700307431532346013411 00000000000000% texinfo.tex -- TeX macros to handle Texinfo files. % % Load plain if necessary, i.e., if running under initex. \expandafter\ifx\csname fmtname\endcsname\relax\input plain\fi % \def\texinfoversion{1999-09-25.10} % % Copyright (C) 1985, 86, 88, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 % Free Software Foundation, Inc. % % This texinfo.tex file is free software; you can redistribute it and/or % modify it under the terms of the GNU General Public License as % published by the Free Software Foundation; either version 2, or (at % your option) any later version. % % This texinfo.tex file is distributed in the hope that it will be % useful, but WITHOUT ANY WARRANTY; without even the implied warranty % of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU % General Public License for more details. % % You should have received a copy of the GNU General Public License % along with this texinfo.tex file; see the file COPYING. If not, write % to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, % Boston, MA 02111-1307, USA. % % In other words, you are welcome to use, share and improve this program. % You are forbidden to forbid anyone else to use, share and improve % what you give them. Help stamp out software-hoarding! % % Please try the latest version of texinfo.tex before submitting bug % reports; you can get the latest version from: % ftp://ftp.gnu.org/gnu/texinfo.tex % (and all GNU mirrors, see http://www.gnu.org/order/ftp.html) % ftp://texinfo.org/tex/texinfo.tex % ftp://us.ctan.org/macros/texinfo/texinfo.tex % (and all CTAN mirrors, finger ctan@us.ctan.org for a list). % /home/gd/gnu/doc/texinfo.tex on the GNU machines. % The texinfo.tex in any given Texinfo distribution could well be out % of date, so if that's what you're using, please check. % Texinfo has a small home page at http://texinfo.org/. % % Send bug reports to bug-texinfo@gnu.org. Please include including a % complete document in each bug report with which we can reproduce the % problem. Patches are, of course, greatly appreciated. % % To process a Texinfo manual with TeX, it's most reliable to use the % texi2dvi shell script that comes with the distribution. For a simple % manual foo.texi, however, you can get away with this: % tex foo.texi % texindex foo.?? % tex foo.texi % tex foo.texi % dvips foo.dvi -o # or whatever, to process the dvi file; this makes foo.ps. % The extra runs of TeX get the cross-reference information correct. % Sometimes one run after texindex suffices, and sometimes you need more % than two; texi2dvi does it as many times as necessary. % % It is possible to adapt texinfo.tex for other languages. You can get % the existing language-specific files from ftp://ftp.gnu.org/gnu/texinfo/. \message{Loading texinfo [version \texinfoversion]:} % If in a .fmt file, print the version number % and turn on active characters that we couldn't do earlier because % they might have appeared in the input file name. \everyjob{\message{[Texinfo version \texinfoversion]}% \catcode`+=\active \catcode`\_=\active} % Save some parts of plain tex whose names we will redefine. \let\ptexb=\b \let\ptexbullet=\bullet \let\ptexc=\c \let\ptexcomma=\, \let\ptexdot=\. \let\ptexdots=\dots \let\ptexend=\end \let\ptexequiv=\equiv \let\ptexexclam=\! \let\ptexi=\i \let\ptexlbrace=\{ \let\ptexrbrace=\} \let\ptexstar=\* \let\ptext=\t % We never want plain's outer \+ definition in Texinfo. % For @tex, we can use \tabalign. \let\+ = \relax \message{Basics,} \chardef\other=12 % If this character appears in an error message or help string, it % starts a new line in the output. \newlinechar = `^^J % Set up fixed words for English if not already set. \ifx\putwordAppendix\undefined \gdef\putwordAppendix{Appendix}\fi \ifx\putwordChapter\undefined \gdef\putwordChapter{Chapter}\fi \ifx\putwordfile\undefined \gdef\putwordfile{file}\fi \ifx\putwordin\undefined \gdef\putwordin{in}\fi \ifx\putwordIndexIsEmpty\undefined \gdef\putwordIndexIsEmpty{(Index is empty)}\fi \ifx\putwordIndexNonexistent\undefined \gdef\putwordIndexNonexistent{(Index is nonexistent)}\fi \ifx\putwordInfo\undefined \gdef\putwordInfo{Info}\fi \ifx\putwordInstanceVariableof\undefined \gdef\putwordInstanceVariableof{Instance Variable of}\fi \ifx\putwordMethodon\undefined \gdef\putwordMethodon{Method on}\fi \ifx\putwordNoTitle\undefined \gdef\putwordNoTitle{No Title}\fi \ifx\putwordof\undefined \gdef\putwordof{of}\fi \ifx\putwordon\undefined \gdef\putwordon{on}\fi \ifx\putwordpage\undefined \gdef\putwordpage{page}\fi \ifx\putwordsection\undefined \gdef\putwordsection{section}\fi \ifx\putwordSection\undefined \gdef\putwordSection{Section}\fi \ifx\putwordsee\undefined \gdef\putwordsee{see}\fi \ifx\putwordSee\undefined \gdef\putwordSee{See}\fi \ifx\putwordShortTOC\undefined \gdef\putwordShortTOC{Short Contents}\fi \ifx\putwordTOC\undefined \gdef\putwordTOC{Table of Contents}\fi % \ifx\putwordMJan\undefined \gdef\putwordMJan{January}\fi \ifx\putwordMFeb\undefined \gdef\putwordMFeb{February}\fi \ifx\putwordMMar\undefined \gdef\putwordMMar{March}\fi \ifx\putwordMApr\undefined \gdef\putwordMApr{April}\fi \ifx\putwordMMay\undefined \gdef\putwordMMay{May}\fi \ifx\putwordMJun\undefined \gdef\putwordMJun{June}\fi \ifx\putwordMJul\undefined \gdef\putwordMJul{July}\fi \ifx\putwordMAug\undefined \gdef\putwordMAug{August}\fi \ifx\putwordMSep\undefined \gdef\putwordMSep{September}\fi \ifx\putwordMOct\undefined \gdef\putwordMOct{October}\fi \ifx\putwordMNov\undefined \gdef\putwordMNov{November}\fi \ifx\putwordMDec\undefined \gdef\putwordMDec{December}\fi % \ifx\putwordDefmac\undefined \gdef\putwordDefmac{Macro}\fi \ifx\putwordDefspec\undefined \gdef\putwordDefspec{Special Form}\fi \ifx\putwordDefvar\undefined \gdef\putwordDefvar{Variable}\fi \ifx\putwordDefopt\undefined \gdef\putwordDefopt{User Option}\fi \ifx\putwordDeftypevar\undefined\gdef\putwordDeftypevar{Variable}\fi \ifx\putwordDeffunc\undefined \gdef\putwordDeffunc{Function}\fi \ifx\putwordDeftypefun\undefined\gdef\putwordDeftypefun{Function}\fi % Ignore a token. % \def\gobble#1{} \hyphenation{ap-pen-dix} \hyphenation{mini-buf-fer mini-buf-fers} \hyphenation{eshell} \hyphenation{white-space} % Margin to add to right of even pages, to left of odd pages. \newdimen \bindingoffset \newdimen \normaloffset \newdimen\pagewidth \newdimen\pageheight % Sometimes it is convenient to have everything in the transcript file % and nothing on the terminal. We don't just call \tracingall here, % since that produces some useless output on the terminal. % \def\gloggingall{\begingroup \globaldefs = 1 \loggingall \endgroup}% \ifx\eTeXversion\undefined \def\loggingall{\tracingcommands2 \tracingstats2 \tracingpages1 \tracingoutput1 \tracinglostchars1 \tracingmacros2 \tracingparagraphs1 \tracingrestores1 \showboxbreadth\maxdimen\showboxdepth\maxdimen }% \else \def\loggingall{\tracingcommands3 \tracingstats2 \tracingpages1 \tracingoutput1 \tracinglostchars1 \tracingmacros2 \tracingparagraphs1 \tracingrestores1 \tracingscantokens1 \tracingassigns1 \tracingifs1 \tracinggroups1 \tracingnesting2 \showboxbreadth\maxdimen\showboxdepth\maxdimen }% \fi % For @cropmarks command. % Do @cropmarks to get crop marks. % \newif\ifcropmarks \let\cropmarks = \cropmarkstrue % % Dimensions to add cropmarks at corners. % Added by P. A. MacKay, 12 Nov. 1986 % \newdimen\outerhsize \newdimen\outervsize % set by the paper size routines \newdimen\cornerlong \cornerlong=1pc \newdimen\cornerthick \cornerthick=.3pt \newdimen\topandbottommargin \topandbottommargin=.75in % Main output routine. \chardef\PAGE = 255 \output = {\onepageout{\pagecontents\PAGE}} \newbox\headlinebox \newbox\footlinebox % \onepageout takes a vbox as an argument. Note that \pagecontents % does insertions, but you have to call it yourself. \def\onepageout#1{% \ifcropmarks \hoffset=0pt \else \hoffset=\normaloffset \fi % \ifodd\pageno \advance\hoffset by \bindingoffset \else \advance\hoffset by -\bindingoffset\fi % % Do this outside of the \shipout so @code etc. will be expanded in % the headline as they should be, not taken literally (outputting ''code). \setbox\headlinebox = \vbox{\let\hsize=\pagewidth \makeheadline}% \setbox\footlinebox = \vbox{\let\hsize=\pagewidth \makefootline}% % {% % Have to do this stuff outside the \shipout because we want it to % take effect in \write's, yet the group defined by the \vbox ends % before the \shipout runs. % \escapechar = `\\ % use backslash in output files. \indexdummies % don't expand commands in the output. \normalturnoffactive % \ in index entries must not stay \, e.g., if % the page break happens to be in the middle of an example. \shipout\vbox{% \ifcropmarks \vbox to \outervsize\bgroup \hsize = \outerhsize \vskip-\topandbottommargin \vtop to0pt{% \line{\ewtop\hfil\ewtop}% \nointerlineskip \line{% \vbox{\moveleft\cornerthick\nstop}% \hfill \vbox{\moveright\cornerthick\nstop}% }% \vss}% \vskip\topandbottommargin \line\bgroup \hfil % center the page within the outer (page) hsize. \ifodd\pageno\hskip\bindingoffset\fi \vbox\bgroup \fi % \unvbox\headlinebox \pagebody{#1}% \ifdim\ht\footlinebox > 0pt % Only leave this space if the footline is nonempty. % (We lessened \vsize for it in \oddfootingxxx.) % The \baselineskip=24pt in plain's \makefootline has no effect. \vskip 2\baselineskip \unvbox\footlinebox \fi % \ifpdfmakepagedest \pdfmkdest{\the\pageno} \fi % \ifcropmarks \egroup % end of \vbox\bgroup \hfil\egroup % end of (centering) \line\bgroup \vskip\topandbottommargin plus1fill minus1fill \boxmaxdepth = \cornerthick \vbox to0pt{\vss \line{% \vbox{\moveleft\cornerthick\nsbot}% \hfill \vbox{\moveright\cornerthick\nsbot}% }% \nointerlineskip \line{\ewbot\hfil\ewbot}% }% \egroup % \vbox from first cropmarks clause \fi }% end of \shipout\vbox }% end of group with \turnoffactive \advancepageno \ifnum\outputpenalty>-20000 \else\dosupereject\fi } \newinsert\margin \dimen\margin=\maxdimen \def\pagebody#1{\vbox to\pageheight{\boxmaxdepth=\maxdepth #1}} {\catcode`\@ =11 \gdef\pagecontents#1{\ifvoid\topins\else\unvbox\topins\fi % marginal hacks, juha@viisa.uucp (Juha Takala) \ifvoid\margin\else % marginal info is present \rlap{\kern\hsize\vbox to\z@{\kern1pt\box\margin \vss}}\fi \dimen@=\dp#1 \unvbox#1 \ifvoid\footins\else\vskip\skip\footins\footnoterule \unvbox\footins\fi \ifr@ggedbottom \kern-\dimen@ \vfil \fi} } % Here are the rules for the cropmarks. Note that they are % offset so that the space between them is truly \outerhsize or \outervsize % (P. A. MacKay, 12 November, 1986) % \def\ewtop{\vrule height\cornerthick depth0pt width\cornerlong} \def\nstop{\vbox {\hrule height\cornerthick depth\cornerlong width\cornerthick}} \def\ewbot{\vrule height0pt depth\cornerthick width\cornerlong} \def\nsbot{\vbox {\hrule height\cornerlong depth\cornerthick width\cornerthick}} % Parse an argument, then pass it to #1. The argument is the rest of % the input line (except we remove a trailing comment). #1 should be a % macro which expects an ordinary undelimited TeX argument. % \def\parsearg#1{% \let\next = #1% \begingroup \obeylines \futurelet\temp\parseargx } % If the next token is an obeyed space (from an @example environment or % the like), remove it and recurse. Otherwise, we're done. \def\parseargx{% % \obeyedspace is defined far below, after the definition of \sepspaces. \ifx\obeyedspace\temp \expandafter\parseargdiscardspace \else \expandafter\parseargline \fi } % Remove a single space (as the delimiter token to the macro call). {\obeyspaces % \gdef\parseargdiscardspace {\futurelet\temp\parseargx}} {\obeylines % \gdef\parseargline#1^^M{% \endgroup % End of the group started in \parsearg. % % First remove any @c comment, then any @comment. % Result of each macro is put in \toks0. \argremovec #1\c\relax % \expandafter\argremovecomment \the\toks0 \comment\relax % % % Call the caller's macro, saved as \next in \parsearg. \expandafter\next\expandafter{\the\toks0}% }% } % Since all \c{,omment} does is throw away the argument, we can let TeX % do that for us. The \relax here is matched by the \relax in the call % in \parseargline; it could be more or less anything, its purpose is % just to delimit the argument to the \c. \def\argremovec#1\c#2\relax{\toks0 = {#1}} \def\argremovecomment#1\comment#2\relax{\toks0 = {#1}} % \argremovec{,omment} might leave us with trailing spaces, though; e.g., % @end itemize @c foo % will have two active spaces as part of the argument with the % `itemize'. Here we remove all active spaces from #1, and assign the % result to \toks0. % % This loses if there are any *other* active characters besides spaces % in the argument -- _ ^ +, for example -- since they get expanded. % Fortunately, Texinfo does not define any such commands. (If it ever % does, the catcode of the characters in questionwill have to be changed % here.) But this means we cannot call \removeactivespaces as part of % \argremovec{,omment}, since @c uses \parsearg, and thus the argument % that \parsearg gets might well have any character at all in it. % \def\removeactivespaces#1{% \begingroup \ignoreactivespaces \edef\temp{#1}% \global\toks0 = \expandafter{\temp}% \endgroup } % Change the active space to expand to nothing. % \begingroup \obeyspaces \gdef\ignoreactivespaces{\obeyspaces\let =\empty} \endgroup \def\flushcr{\ifx\par\lisppar \def\next##1{}\else \let\next=\relax \fi \next} %% These are used to keep @begin/@end levels from running away %% Call \inENV within environments (after a \begingroup) \newif\ifENV \ENVfalse \def\inENV{\ifENV\relax\else\ENVtrue\fi} \def\ENVcheck{% \ifENV\errmessage{Still within an environment; press RETURN to continue} \endgroup\fi} % This is not perfect, but it should reduce lossage % @begin foo is the same as @foo, for now. \newhelp\EMsimple{Press RETURN to continue.} \outer\def\begin{\parsearg\beginxxx} \def\beginxxx #1{% \expandafter\ifx\csname #1\endcsname\relax {\errhelp=\EMsimple \errmessage{Undefined command @begin #1}}\else \csname #1\endcsname\fi} % @end foo executes the definition of \Efoo. % \def\end{\parsearg\endxxx} \def\endxxx #1{% \removeactivespaces{#1}% \edef\endthing{\the\toks0}% % \expandafter\ifx\csname E\endthing\endcsname\relax \expandafter\ifx\csname \endthing\endcsname\relax % There's no \foo, i.e., no ``environment'' foo. \errhelp = \EMsimple \errmessage{Undefined command `@end \endthing'}% \else \unmatchedenderror\endthing \fi \else % Everything's ok; the right environment has been started. \csname E\endthing\endcsname \fi } % There is an environment #1, but it hasn't been started. Give an error. % \def\unmatchedenderror#1{% \errhelp = \EMsimple \errmessage{This `@end #1' doesn't have a matching `@#1'}% } % Define the control sequence \E#1 to give an unmatched @end error. % \def\defineunmatchedend#1{% \expandafter\def\csname E#1\endcsname{\unmatchedenderror{#1}}% } % Single-spacing is done by various environments (specifically, in % \nonfillstart and \quotations). \newskip\singlespaceskip \singlespaceskip = 12.5pt \def\singlespace{% % Why was this kern here? It messes up equalizing space above and below % environments. --karl, 6may93 %{\advance \baselineskip by -\singlespaceskip %\kern \baselineskip}% \setleading \singlespaceskip } %% Simple single-character @ commands % @@ prints an @ % Kludge this until the fonts are right (grr). \def\@{{\tt\char64}} % This is turned off because it was never documented % and you can use @w{...} around a quote to suppress ligatures. %% Define @` and @' to be the same as ` and ' %% but suppressing ligatures. %\def\`{{`}} %\def\'{{'}} % Used to generate quoted braces. \def\mylbrace {{\tt\char123}} \def\myrbrace {{\tt\char125}} \let\{=\mylbrace \let\}=\myrbrace \begingroup % Definitions to produce actual \{ & \} command in an index. \catcode`\{ = 12 \catcode`\} = 12 \catcode`\[ = 1 \catcode`\] = 2 \catcode`\@ = 0 \catcode`\\ = 12 @gdef@lbracecmd[\{]% @gdef@rbracecmd[\}]% @endgroup % Accents: @, @dotaccent @ringaccent @ubaraccent @udotaccent % Others are defined by plain TeX: @` @' @" @^ @~ @= @v @H. \let\, = \c \let\dotaccent = \. \def\ringaccent#1{{\accent23 #1}} \let\tieaccent = \t \let\ubaraccent = \b \let\udotaccent = \d % Other special characters: @questiondown @exclamdown % Plain TeX defines: @AA @AE @O @OE @L (and lowercase versions) @ss. \def\questiondown{?`} \def\exclamdown{!`} % Dotless i and dotless j, used for accents. \def\imacro{i} \def\jmacro{j} \def\dotless#1{% \def\temp{#1}% \ifx\temp\imacro \ptexi \else\ifx\temp\jmacro \j \else \errmessage{@dotless can be used only with i or j}% \fi\fi } % Be sure we're in horizontal mode when doing a tie, since we make space % equivalent to this in @example-like environments. Otherwise, a space % at the beginning of a line will start with \penalty -- and % since \penalty is valid in vertical mode, we'd end up putting the % penalty on the vertical list instead of in the new paragraph. {\catcode`@ = 11 % Avoid using \@M directly, because that causes trouble % if the definition is written into an index file. \global\let\tiepenalty = \@M \gdef\tie{\leavevmode\penalty\tiepenalty\ } } % @: forces normal size whitespace following. \def\:{\spacefactor=1000 } % @* forces a line break. \def\*{\hfil\break\hbox{}\ignorespaces} % @. is an end-of-sentence period. \def\.{.\spacefactor=3000 } % @! is an end-of-sentence bang. \def\!{!\spacefactor=3000 } % @? is an end-of-sentence query. \def\?{?\spacefactor=3000 } % @w prevents a word break. Without the \leavevmode, @w at the % beginning of a paragraph, when TeX is still in vertical mode, would % produce a whole line of output instead of starting the paragraph. \def\w#1{\leavevmode\hbox{#1}} % @group ... @end group forces ... to be all on one page, by enclosing % it in a TeX vbox. We use \vtop instead of \vbox to construct the box % to keep its height that of a normal line. According to the rules for % \topskip (p.114 of the TeXbook), the glue inserted is % max (\topskip - \ht (first item), 0). If that height is large, % therefore, no glue is inserted, and the space between the headline and % the text is small, which looks bad. % \def\group{\begingroup \ifnum\catcode13=\active \else \errhelp = \groupinvalidhelp \errmessage{@group invalid in context where filling is enabled}% \fi % % The \vtop we start below produces a box with normal height and large % depth; thus, TeX puts \baselineskip glue before it, and (when the % next line of text is done) \lineskip glue after it. (See p.82 of % the TeXbook.) Thus, space below is not quite equal to space % above. But it's pretty close. \def\Egroup{% \egroup % End the \vtop. \endgroup % End the \group. }% % \vtop\bgroup % We have to put a strut on the last line in case the @group is in % the midst of an example, rather than completely enclosing it. % Otherwise, the interline space between the last line of the group % and the first line afterwards is too small. But we can't put the % strut in \Egroup, since there it would be on a line by itself. % Hence this just inserts a strut at the beginning of each line. \everypar = {\strut}% % % Since we have a strut on every line, we don't need any of TeX's % normal interline spacing. \offinterlineskip % % OK, but now we have to do something about blank % lines in the input in @example-like environments, which normally % just turn into \lisppar, which will insert no space now that we've % turned off the interline space. Simplest is to make them be an % empty paragraph. \ifx\par\lisppar \edef\par{\leavevmode \par}% % % Reset ^^M's definition to new definition of \par. \obeylines \fi % % Do @comment since we are called inside an environment such as % @example, where each end-of-line in the input causes an % end-of-line in the output. We don't want the end-of-line after % the `@group' to put extra space in the output. Since @group % should appear on a line by itself (according to the Texinfo % manual), we don't worry about eating any user text. \comment } % % TeX puts in an \escapechar (i.e., `@') at the beginning of the help % message, so this ends up printing `@group can only ...'. % \newhelp\groupinvalidhelp{% group can only be used in environments such as @example,^^J% where each line of input produces a line of output.} % @need space-in-mils % forces a page break if there is not space-in-mils remaining. \newdimen\mil \mil=0.001in \def\need{\parsearg\needx} % Old definition--didn't work. %\def\needx #1{\par % %% This method tries to make TeX break the page naturally %% if the depth of the box does not fit. %{\baselineskip=0pt% %\vtop to #1\mil{\vfil}\kern -#1\mil\nobreak %\prevdepth=-1000pt %}} \def\needx#1{% % Ensure vertical mode, so we don't make a big box in the middle of a % paragraph. \par % % If the @need value is less than one line space, it's useless. \dimen0 = #1\mil \dimen2 = \ht\strutbox \advance\dimen2 by \dp\strutbox \ifdim\dimen0 > \dimen2 % % Do a \strut just to make the height of this box be normal, so the % normal leading is inserted relative to the preceding line. % And a page break here is fine. \vtop to #1\mil{\strut\vfil}% % % TeX does not even consider page breaks if a penalty added to the % main vertical list is 10000 or more. But in order to see if the % empty box we just added fits on the page, we must make it consider % page breaks. On the other hand, we don't want to actually break the % page after the empty box. So we use a penalty of 9999. % % There is an extremely small chance that TeX will actually break the % page at this \penalty, if there are no other feasible breakpoints in % sight. (If the user is using lots of big @group commands, which % almost-but-not-quite fill up a page, TeX will have a hard time doing % good page breaking, for example.) However, I could not construct an % example where a page broke at this \penalty; if it happens in a real % document, then we can reconsider our strategy. \penalty9999 % % Back up by the size of the box, whether we did a page break or not. \kern -#1\mil % % Do not allow a page break right after this kern. \nobreak \fi } % @br forces paragraph break \let\br = \par % @dots{} output an ellipsis using the current font. % We do .5em per period so that it has the same spacing in a typewriter % font as three actual period characters. % \def\dots{% \leavevmode \hbox to 1.5em{% \hskip 0pt plus 0.25fil minus 0.25fil .\hss.\hss.% \hskip 0pt plus 0.5fil minus 0.5fil }% } % @enddots{} is an end-of-sentence ellipsis. % \def\enddots{% \leavevmode \hbox to 2em{% \hskip 0pt plus 0.25fil minus 0.25fil .\hss.\hss.\hss.% \hskip 0pt plus 0.5fil minus 0.5fil }% \spacefactor=3000 } % @page forces the start of a new page % \def\page{\par\vfill\supereject} % @exdent text.... % outputs text on separate line in roman font, starting at standard page margin % This records the amount of indent in the innermost environment. % That's how much \exdent should take out. \newskip\exdentamount % This defn is used inside fill environments such as @defun. \def\exdent{\parsearg\exdentyyy} \def\exdentyyy #1{{\hfil\break\hbox{\kern -\exdentamount{\rm#1}}\hfil\break}} % This defn is used inside nofill environments such as @example. \def\nofillexdent{\parsearg\nofillexdentyyy} \def\nofillexdentyyy #1{{\advance \leftskip by -\exdentamount \leftline{\hskip\leftskip{\rm#1}}}} % @inmargin{TEXT} puts TEXT in the margin next to the current paragraph. \def\inmargin#1{% \strut\vadjust{\nobreak\kern-\strutdepth \vtop to \strutdepth{\baselineskip\strutdepth\vss \llap{\rightskip=\inmarginspacing \vbox{\noindent #1}}\null}}} \newskip\inmarginspacing \inmarginspacing=1cm \def\strutdepth{\dp\strutbox} %\hbox{{\rm#1}}\hfil\break}} % @include file insert text of that file as input. % Allow normal characters that we make active in the argument (a file name). \def\include{\begingroup \catcode`\\=12 \catcode`~=12 \catcode`^=12 \catcode`_=12 \catcode`|=12 \catcode`<=12 \catcode`>=12 \catcode`+=12 \parsearg\includezzz} % Restore active chars for included file. \def\includezzz#1{\endgroup\begingroup % Read the included file in a group so nested @include's work. \def\thisfile{#1}% \input\thisfile \endgroup} \def\thisfile{} % @center line outputs that line, centered \def\center{\parsearg\centerzzz} \def\centerzzz #1{{\advance\hsize by -\leftskip \advance\hsize by -\rightskip \centerline{#1}}} % @sp n outputs n lines of vertical space \def\sp{\parsearg\spxxx} \def\spxxx #1{\vskip #1\baselineskip} % @comment ...line which is ignored... % @c is the same as @comment % @ignore ... @end ignore is another way to write a comment \def\comment{\begingroup \catcode`\^^M=\other% \catcode`\@=\other \catcode`\{=\other \catcode`\}=\other% \commentxxx} {\catcode`\^^M=\other \gdef\commentxxx#1^^M{\endgroup}} \let\c=\comment % @paragraphindent NCHARS % We'll use ems for NCHARS, close enough. % We cannot implement @paragraphindent asis, though. % \def\asisword{asis} % no translation, these are keywords \def\noneword{none} % \def\paragraphindent{\parsearg\doparagraphindent} \def\doparagraphindent#1{% \def\temp{#1}% \ifx\temp\asisword \else \ifx\temp\noneword \defaultparindent = 0pt \else \defaultparindent = #1em \fi \fi \parindent = \defaultparindent } % @exampleindent NCHARS % We'll use ems for NCHARS like @paragraphindent. % It seems @exampleindent asis isn't necessary, but % I preserve it to make it similar to @paragraphindent. \def\exampleindent{\parsearg\doexampleindent} \def\doexampleindent#1{% \def\temp{#1}% \ifx\temp\asisword \else \ifx\temp\noneword \lispnarrowing = 0pt \else \lispnarrowing = #1em \fi \fi } % @asis just yields its argument. Used with @table, for example. % \def\asis#1{#1} % @math means output in math mode. % We don't use $'s directly in the definition of \math because control % sequences like \math are expanded when the toc file is written. Then, % we read the toc file back, the $'s will be normal characters (as they % should be, according to the definition of Texinfo). So we must use a % control sequence to switch into and out of math mode. % % This isn't quite enough for @math to work properly in indices, but it % seems unlikely it will ever be needed there. % \let\implicitmath = $ \def\math#1{\implicitmath #1\implicitmath} % @bullet and @minus need the same treatment as @math, just above. \def\bullet{\implicitmath\ptexbullet\implicitmath} \def\minus{\implicitmath-\implicitmath} % @refill is a no-op. \let\refill=\relax % If working on a large document in chapters, it is convenient to % be able to disable indexing, cross-referencing, and contents, for test runs. % This is done with @novalidate (before @setfilename). % \newif\iflinks \linkstrue % by default we want the aux files. \let\novalidate = \linksfalse % @setfilename is done at the beginning of every texinfo file. % So open here the files we need to have open while reading the input. % This makes it possible to make a .fmt file for texinfo. \def\setfilename{% \iflinks \readauxfile \fi % \openindices needs to do some work in any case. \openindices \fixbackslash % Turn off hack to swallow `\input texinfo'. \global\let\setfilename=\comment % Ignore extra @setfilename cmds. % % If texinfo.cnf is present on the system, read it. % Useful for site-wide @afourpaper, etc. % Just to be on the safe side, close the input stream before the \input. \openin 1 texinfo.cnf \ifeof1 \let\temp=\relax \else \def\temp{\input texinfo.cnf }\fi \closein1 \temp % \comment % Ignore the actual filename. } % Called from \setfilename. % \def\openindices{% \newindex{cp}% \newcodeindex{fn}% \newcodeindex{vr}% \newcodeindex{tp}% \newcodeindex{ky}% \newcodeindex{pg}% } % @bye. \outer\def\bye{\pagealignmacro\tracingstats=1\ptexend} \message{pdf,} % adobe `portable' document format \newcount\tempnum \newcount\lnkcount \newtoks\filename \newcount\filenamelength \newcount\pgn \newtoks\toksA \newtoks\toksB \newtoks\toksC \newtoks\toksD \newbox\boxA \newcount\countA \newif\ifpdf \newif\ifpdfmakepagedest \ifx\pdfoutput\undefined \pdffalse \let\pdfmkdest = \gobble \let\pdfurl = \gobble \let\endlink = \relax \let\linkcolor = \relax \let\pdfmakeoutlines = \relax \else \pdftrue \pdfoutput = 1 \input pdfcolor \def\dopdfimage#1#2#3{% \def\imagewidth{#2}% \def\imageheight{#3}% \ifnum\pdftexversion < 14 \pdfimage \else \pdfximage \fi \ifx\empty\imagewidth\else width \imagewidth \fi \ifx\empty\imageheight\else height \imageheight \fi {#1.pdf}% \ifnum\pdftexversion < 14 \else \pdfrefximage \pdflastximage \fi} \def\pdfmkdest#1{\pdfdest name{#1@} xyz} \def\pdfmkpgn#1{#1@} \let\linkcolor = \Cyan \def\endlink{\Black\pdfendlink} % Adding outlines to PDF; macros for calculating structure of outlines % come from Petr Olsak \def\expnumber#1{\expandafter\ifx\csname#1\endcsname\relax 0% \else \csname#1\endcsname \fi} \def\advancenumber#1{\tempnum=\expnumber{#1}\relax \advance\tempnum by1 \expandafter\xdef\csname#1\endcsname{\the\tempnum}} \def\pdfmakeoutlines{{% \openin 1 \jobname.toc \ifeof 1\else\bgroup \closein 1 \indexnofonts \def\tt{} % thanh's hack / proper braces in bookmarks \edef\mylbrace{\iftrue \string{\else}\fi}\let\{=\mylbrace \edef\myrbrace{\iffalse{\else\string}\fi}\let\}=\myrbrace % \def\chapentry ##1##2##3{} \def\unnumbchapentry ##1##2{} \def\secentry ##1##2##3##4{\advancenumber{chap##2}} \def\unnumbsecentry ##1##2{} \def\subsecentry ##1##2##3##4##5{\advancenumber{sec##2.##3}} \def\unnumbsubsecentry ##1##2{} \def\subsubsecentry ##1##2##3##4##5##6{\advancenumber{subsec##2.##3.##4}} \def\unnumbsubsubsecentry ##1##2{} \input \jobname.toc \def\chapentry ##1##2##3{% \pdfoutline goto name{\pdfmkpgn{##3}}count-\expnumber{chap##2}{##1}} \def\unnumbchapentry ##1##2{% \pdfoutline goto name{\pdfmkpgn{##2}}{##1}} \def\secentry ##1##2##3##4{% \pdfoutline goto name{\pdfmkpgn{##4}}count-\expnumber{sec##2.##3}{##1}} \def\unnumbsecentry ##1##2{% \pdfoutline goto name{\pdfmkpgn{##2}}{##1}} \def\subsecentry ##1##2##3##4##5{% \pdfoutline goto name{\pdfmkpgn{##5}}count-\expnumber{subsec##2.##3.##4}{##1}} \def\unnumbsubsecentry ##1##2{% \pdfoutline goto name{\pdfmkpgn{##2}}{##1}} \def\subsubsecentry ##1##2##3##4##5##6{% \pdfoutline goto name{\pdfmkpgn{##6}}{##1}} \def\unnumbsubsubsecentry ##1##2{% \pdfoutline goto name{\pdfmkpgn{##2}}{##1}} \input \jobname.toc \egroup\fi }} \def\makelinks #1,{% \def\params{#1}\def\E{END}% \ifx\params\E \let\nextmakelinks=\relax \else \let\nextmakelinks=\makelinks \ifnum\lnkcount>0,\fi \picknum{#1}% \startlink attr{/Border [0 0 0]} goto name{\pdfmkpgn{\the\pgn}}% \linkcolor #1% \advance\lnkcount by 1% \endlink \fi \nextmakelinks } \def\picknum#1{\expandafter\pn#1} \def\pn#1{% \def\p{#1}% \ifx\p\lbrace \let\nextpn=\ppn \else \let\nextpn=\ppnn \def\first{#1} \fi \nextpn } \def\ppn#1{\pgn=#1\gobble} \def\ppnn{\pgn=\first} \def\pdfmklnk#1{\lnkcount=0\makelinks #1,END,} \def\addtokens#1#2{\edef\addtoks{\noexpand#1={\the#1#2}}\addtoks} \def\skipspaces#1{\def\PP{#1}\def\D{|}% \ifx\PP\D\let\nextsp\relax \else\let\nextsp\skipspaces \ifx\p\space\else\addtokens{\filename}{\PP}% \advance\filenamelength by 1 \fi \fi \nextsp} \def\getfilename#1{\filenamelength=0\expandafter\skipspaces#1|\relax} \ifnum\pdftexversion < 14 \let \startlink \pdfannotlink \else \let \startlink \pdfstartlink \fi \def\pdfurl#1{% \begingroup \normalturnoffactive\def\@{@}% \leavevmode\Red \startlink attr{/Border [0 0 0]}% user{/Subtype /Link /A << /S /URI /URI (#1) >>}% % #1 \endgroup} \def\pdfgettoks#1.{\setbox\boxA=\hbox{\toksA={#1.}\toksB={}\maketoks}} \def\addtokens#1#2{\edef\addtoks{\noexpand#1={\the#1#2}}\addtoks} \def\adn#1{\addtokens{\toksC}{#1}\global\countA=1\let\next=\maketoks} \def\poptoks#1#2|ENDTOKS|{\let\first=#1\toksD={#1}\toksA={#2}} \def\maketoks{% \expandafter\poptoks\the\toksA|ENDTOKS| \ifx\first0\adn0 \else\ifx\first1\adn1 \else\ifx\first2\adn2 \else\ifx\first3\adn3 \else\ifx\first4\adn4 \else\ifx\first5\adn5 \else\ifx\first6\adn6 \else\ifx\first7\adn7 \else\ifx\first8\adn8 \else\ifx\first9\adn9 \else \ifnum0=\countA\else\makelink\fi \ifx\first.\let\next=\done\else \let\next=\maketoks \addtokens{\toksB}{\the\toksD} \ifx\first,\addtokens{\toksB}{\space}\fi \fi \fi\fi\fi\fi\fi\fi\fi\fi\fi\fi \next} \def\makelink{\addtokens{\toksB}% {\noexpand\pdflink{\the\toksC}}\toksC={}\global\countA=0} \def\pdflink#1{% \startlink attr{/Border [0 0 0]} goto name{\mkpgn{#1}} \linkcolor #1\endlink} \def\mkpgn#1{#1@} \def\done{\edef\st{\global\noexpand\toksA={\the\toksB}}\st} \fi % \ifx\pdfoutput \message{fonts,} % Font-change commands. % Texinfo sort of supports the sans serif font style, which plain TeX does not. % So we set up a \sf analogous to plain's \rm, etc. \newfam\sffam \def\sf{\fam=\sffam \tensf} \let\li = \sf % Sometimes we call it \li, not \sf. % We don't need math for this one. \def\ttsl{\tenttsl} % Use Computer Modern fonts at \magstephalf (11pt). \newcount\mainmagstep \mainmagstep=\magstephalf % Set the font macro #1 to the font named #2, adding on the % specified font prefix (normally `cm'). % #3 is the font's design size, #4 is a scale factor \def\setfont#1#2#3#4{\font#1=\fontprefix#2#3 scaled #4} % Use cm as the default font prefix. % To specify the font prefix, you must define \fontprefix % before you read in texinfo.tex. \ifx\fontprefix\undefined \def\fontprefix{cm} \fi % Support font families that don't use the same naming scheme as CM. \def\rmshape{r} \def\rmbshape{bx} %where the normal face is bold \def\bfshape{b} \def\bxshape{bx} \def\ttshape{tt} \def\ttbshape{tt} \def\ttslshape{sltt} \def\itshape{ti} \def\itbshape{bxti} \def\slshape{sl} \def\slbshape{bxsl} \def\sfshape{ss} \def\sfbshape{ss} \def\scshape{csc} \def\scbshape{csc} \ifx\bigger\relax \let\mainmagstep=\magstep1 \setfont\textrm\rmshape{12}{1000} \setfont\texttt\ttshape{12}{1000} \else \setfont\textrm\rmshape{10}{\mainmagstep} \setfont\texttt\ttshape{10}{\mainmagstep} \fi % Instead of cmb10, you many want to use cmbx10. % cmbx10 is a prettier font on its own, but cmb10 % looks better when embedded in a line with cmr10. \setfont\textbf\bfshape{10}{\mainmagstep} \setfont\textit\itshape{10}{\mainmagstep} \setfont\textsl\slshape{10}{\mainmagstep} \setfont\textsf\sfshape{10}{\mainmagstep} \setfont\textsc\scshape{10}{\mainmagstep} \setfont\textttsl\ttslshape{10}{\mainmagstep} \font\texti=cmmi10 scaled \mainmagstep \font\textsy=cmsy10 scaled \mainmagstep % A few fonts for @defun, etc. \setfont\defbf\bxshape{10}{\magstep1} %was 1314 \setfont\deftt\ttshape{10}{\magstep1} \def\df{\let\tentt=\deftt \let\tenbf = \defbf \bf} % Fonts for indices, footnotes, small examples (9pt). \setfont\smallrm\rmshape{9}{1000} \setfont\smalltt\ttshape{9}{1000} \setfont\smallbf\bfshape{10}{900} \setfont\smallit\itshape{9}{1000} \setfont\smallsl\slshape{9}{1000} \setfont\smallsf\sfshape{9}{1000} \setfont\smallsc\scshape{10}{900} \setfont\smallttsl\ttslshape{10}{900} \font\smalli=cmmi9 \font\smallsy=cmsy9 % Fonts for title page: \setfont\titlerm\rmbshape{12}{\magstep3} \setfont\titleit\itbshape{10}{\magstep4} \setfont\titlesl\slbshape{10}{\magstep4} \setfont\titlett\ttbshape{12}{\magstep3} \setfont\titlettsl\ttslshape{10}{\magstep4} \setfont\titlesf\sfbshape{17}{\magstep1} \let\titlebf=\titlerm \setfont\titlesc\scbshape{10}{\magstep4} \font\titlei=cmmi12 scaled \magstep3 \font\titlesy=cmsy10 scaled \magstep4 \def\authorrm{\secrm} % Chapter (and unnumbered) fonts (17.28pt). \setfont\chaprm\rmbshape{12}{\magstep2} \setfont\chapit\itbshape{10}{\magstep3} \setfont\chapsl\slbshape{10}{\magstep3} \setfont\chaptt\ttbshape{12}{\magstep2} \setfont\chapttsl\ttslshape{10}{\magstep3} \setfont\chapsf\sfbshape{17}{1000} \let\chapbf=\chaprm \setfont\chapsc\scbshape{10}{\magstep3} \font\chapi=cmmi12 scaled \magstep2 \font\chapsy=cmsy10 scaled \magstep3 % Section fonts (14.4pt). \setfont\secrm\rmbshape{12}{\magstep1} \setfont\secit\itbshape{10}{\magstep2} \setfont\secsl\slbshape{10}{\magstep2} \setfont\sectt\ttbshape{12}{\magstep1} \setfont\secttsl\ttslshape{10}{\magstep2} \setfont\secsf\sfbshape{12}{\magstep1} \let\secbf\secrm \setfont\secsc\scbshape{10}{\magstep2} \font\seci=cmmi12 scaled \magstep1 \font\secsy=cmsy10 scaled \magstep2 % \setfont\ssecrm\bxshape{10}{\magstep1} % This size an font looked bad. % \setfont\ssecit\itshape{10}{\magstep1} % The letters were too crowded. % \setfont\ssecsl\slshape{10}{\magstep1} % \setfont\ssectt\ttshape{10}{\magstep1} % \setfont\ssecsf\sfshape{10}{\magstep1} %\setfont\ssecrm\bfshape{10}{1315} % Note the use of cmb rather than cmbx. %\setfont\ssecit\itshape{10}{1315} % Also, the size is a little larger than %\setfont\ssecsl\slshape{10}{1315} % being scaled magstep1. %\setfont\ssectt\ttshape{10}{1315} %\setfont\ssecsf\sfshape{10}{1315} %\let\ssecbf=\ssecrm % Subsection fonts (13.15pt). \setfont\ssecrm\rmbshape{12}{\magstephalf} \setfont\ssecit\itbshape{10}{1315} \setfont\ssecsl\slbshape{10}{1315} \setfont\ssectt\ttbshape{12}{\magstephalf} \setfont\ssecttsl\ttslshape{10}{1315} \setfont\ssecsf\sfbshape{12}{\magstephalf} \let\ssecbf\ssecrm \setfont\ssecsc\scbshape{10}{\magstep1} \font\sseci=cmmi12 scaled \magstephalf \font\ssecsy=cmsy10 scaled 1315 % The smallcaps and symbol fonts should actually be scaled \magstep1.5, % but that is not a standard magnification. % In order for the font changes to affect most math symbols and letters, % we have to define the \textfont of the standard families. Since % texinfo doesn't allow for producing subscripts and superscripts, we % don't bother to reset \scriptfont and \scriptscriptfont (which would % also require loading a lot more fonts). % \def\resetmathfonts{% \textfont0 = \tenrm \textfont1 = \teni \textfont2 = \tensy \textfont\itfam = \tenit \textfont\slfam = \tensl \textfont\bffam = \tenbf \textfont\ttfam = \tentt \textfont\sffam = \tensf } % The font-changing commands redefine the meanings of \tenSTYLE, instead % of just \STYLE. We do this so that font changes will continue to work % in math mode, where it is the current \fam that is relevant in most % cases, not the current font. Plain TeX does \def\bf{\fam=\bffam % \tenbf}, for example. By redefining \tenbf, we obviate the need to % redefine \bf itself. \def\textfonts{% \let\tenrm=\textrm \let\tenit=\textit \let\tensl=\textsl \let\tenbf=\textbf \let\tentt=\texttt \let\smallcaps=\textsc \let\tensf=\textsf \let\teni=\texti \let\tensy=\textsy \let\tenttsl=\textttsl \resetmathfonts} \def\titlefonts{% \let\tenrm=\titlerm \let\tenit=\titleit \let\tensl=\titlesl \let\tenbf=\titlebf \let\tentt=\titlett \let\smallcaps=\titlesc \let\tensf=\titlesf \let\teni=\titlei \let\tensy=\titlesy \let\tenttsl=\titlettsl \resetmathfonts \setleading{25pt}} \def\titlefont#1{{\titlefonts\rm #1}} \def\chapfonts{% \let\tenrm=\chaprm \let\tenit=\chapit \let\tensl=\chapsl \let\tenbf=\chapbf \let\tentt=\chaptt \let\smallcaps=\chapsc \let\tensf=\chapsf \let\teni=\chapi \let\tensy=\chapsy \let\tenttsl=\chapttsl \resetmathfonts \setleading{19pt}} \def\secfonts{% \let\tenrm=\secrm \let\tenit=\secit \let\tensl=\secsl \let\tenbf=\secbf \let\tentt=\sectt \let\smallcaps=\secsc \let\tensf=\secsf \let\teni=\seci \let\tensy=\secsy \let\tenttsl=\secttsl \resetmathfonts \setleading{16pt}} \def\subsecfonts{% \let\tenrm=\ssecrm \let\tenit=\ssecit \let\tensl=\ssecsl \let\tenbf=\ssecbf \let\tentt=\ssectt \let\smallcaps=\ssecsc \let\tensf=\ssecsf \let\teni=\sseci \let\tensy=\ssecsy \let\tenttsl=\ssecttsl \resetmathfonts \setleading{15pt}} \let\subsubsecfonts = \subsecfonts % Maybe make sssec fonts scaled magstephalf? \def\smallfonts{% \let\tenrm=\smallrm \let\tenit=\smallit \let\tensl=\smallsl \let\tenbf=\smallbf \let\tentt=\smalltt \let\smallcaps=\smallsc \let\tensf=\smallsf \let\teni=\smalli \let\tensy=\smallsy \let\tenttsl=\smallttsl \resetmathfonts \setleading{11pt}} % Set up the default fonts, so we can use them for creating boxes. % \textfonts % Define these so they can be easily changed for other fonts. \def\angleleft{$\langle$} \def\angleright{$\rangle$} % Count depth in font-changes, for error checks \newcount\fontdepth \fontdepth=0 % Fonts for short table of contents. \setfont\shortcontrm\rmshape{12}{1000} \setfont\shortcontbf\bxshape{12}{1000} \setfont\shortcontsl\slshape{12}{1000} %% Add scribe-like font environments, plus @l for inline lisp (usually sans %% serif) and @ii for TeX italic % \smartitalic{ARG} outputs arg in italics, followed by an italic correction % unless the following character is such as not to need one. \def\smartitalicx{\ifx\next,\else\ifx\next-\else\ifx\next.\else\/\fi\fi\fi} \def\smartslanted#1{{\sl #1}\futurelet\next\smartitalicx} \def\smartitalic#1{{\it #1}\futurelet\next\smartitalicx} \let\i=\smartitalic \let\var=\smartslanted \let\dfn=\smartslanted \let\emph=\smartitalic \let\cite=\smartslanted \def\b#1{{\bf #1}} \let\strong=\b % We can't just use \exhyphenpenalty, because that only has effect at % the end of a paragraph. Restore normal hyphenation at the end of the % group within which \nohyphenation is presumably called. % \def\nohyphenation{\hyphenchar\font = -1 \aftergroup\restorehyphenation} \def\restorehyphenation{\hyphenchar\font = `- } \def\t#1{% {\tt \rawbackslash \frenchspacing #1}% \null } \let\ttfont=\t \def\samp#1{`\tclose{#1}'\null} \setfont\keyrm\rmshape{8}{1000} \font\keysy=cmsy9 \def\key#1{{\keyrm\textfont2=\keysy \leavevmode\hbox{% \raise0.4pt\hbox{\angleleft}\kern-.08em\vtop{% \vbox{\hrule\kern-0.4pt \hbox{\raise0.4pt\hbox{\vphantom{\angleleft}}#1}}% \kern-0.4pt\hrule}% \kern-.06em\raise0.4pt\hbox{\angleright}}}} % The old definition, with no lozenge: %\def\key #1{{\ttsl \nohyphenation \uppercase{#1}}\null} \def\ctrl #1{{\tt \rawbackslash \hat}#1} % @file, @option are the same as @samp. \let\file=\samp \let\option=\samp % @code is a modification of @t, % which makes spaces the same size as normal in the surrounding text. \def\tclose#1{% {% % Change normal interword space to be same as for the current font. \spaceskip = \fontdimen2\font % % Switch to typewriter. \tt % % But `\ ' produces the large typewriter interword space. \def\ {{\spaceskip = 0pt{} }}% % % Turn off hyphenation. \nohyphenation % \rawbackslash \frenchspacing #1% }% \null } % We *must* turn on hyphenation at `-' and `_' in \code. % Otherwise, it is too hard to avoid overfull hboxes % in the Emacs manual, the Library manual, etc. % Unfortunately, TeX uses one parameter (\hyphenchar) to control % both hyphenation at - and hyphenation within words. % We must therefore turn them both off (\tclose does that) % and arrange explicitly to hyphenate at a dash. % -- rms. { \catcode`\-=\active \catcode`\_=\active % \global\def\code{\begingroup \catcode`\-=\active \let-\codedash \catcode`\_=\active \let_\codeunder \codex } % % If we end up with any active - characters when handling the index, % just treat them as a normal -. \global\def\indexbreaks{\catcode`\-=\active \let-\realdash} } \def\realdash{-} \def\codedash{-\discretionary{}{}{}} \def\codeunder{\ifusingtt{\normalunderscore\discretionary{}{}{}}{\_}} \def\codex #1{\tclose{#1}\endgroup} %\let\exp=\tclose %Was temporary % @kbd is like @code, except that if the argument is just one @key command, % then @kbd has no effect. % @kbdinputstyle -- arg is `distinct' (@kbd uses slanted tty font always), % `example' (@kbd uses ttsl only inside of @example and friends), % or `code' (@kbd uses normal tty font always). \def\kbdinputstyle{\parsearg\kbdinputstylexxx} \def\kbdinputstylexxx#1{% \def\arg{#1}% \ifx\arg\worddistinct \gdef\kbdexamplefont{\ttsl}\gdef\kbdfont{\ttsl}% \else\ifx\arg\wordexample \gdef\kbdexamplefont{\ttsl}\gdef\kbdfont{\tt}% \else\ifx\arg\wordcode \gdef\kbdexamplefont{\tt}\gdef\kbdfont{\tt}% \fi\fi\fi } \def\worddistinct{distinct} \def\wordexample{example} \def\wordcode{code} % Default is kbdinputdistinct. (Too much of a hassle to call the macro, % the catcodes are wrong for parsearg to work.) \gdef\kbdexamplefont{\ttsl}\gdef\kbdfont{\ttsl} \def\xkey{\key} \def\kbdfoo#1#2#3\par{\def\one{#1}\def\three{#3}\def\threex{??}% \ifx\one\xkey\ifx\threex\three \key{#2}% \else{\tclose{\kbdfont\look}}\fi \else{\tclose{\kbdfont\look}}\fi} % For @url, @env, @command quotes seem unnecessary, so use \code. \let\url=\code \let\env=\code \let\command=\code % @uref (abbreviation for `urlref') takes an optional (comma-separated) % second argument specifying the text to display and an optional third % arg as text to display instead of (rather than in addition to) the url % itself. First (mandatory) arg is the url. Perhaps eventually put in % a hypertex \special here. % \def\uref#1{\douref #1,,,\finish} \def\douref#1,#2,#3,#4\finish{\begingroup \unsepspaces \pdfurl{#1}% \setbox0 = \hbox{\ignorespaces #3}% \ifdim\wd0 > 0pt \unhbox0 % third arg given, show only that \else \setbox0 = \hbox{\ignorespaces #2}% \ifdim\wd0 > 0pt \ifpdf \unhbox0 % PDF: 2nd arg given, show only it \else \unhbox0\ (\code{#1})% DVI: 2nd arg given, show both it and url \fi \else \code{#1}% only url given, so show it \fi \fi \endlink \endgroup} % rms does not like angle brackets --karl, 17may97. % So now @email is just like @uref, unless we are pdf. % %\def\email#1{\angleleft{\tt #1}\angleright} \ifpdf \def\email#1{\doemail#1,,\finish} \def\doemail#1,#2,#3\finish{\begingroup \unsepspaces \pdfurl{mailto:#1}% \setbox0 = \hbox{\ignorespaces #2}% \ifdim\wd0>0pt\unhbox0\else\code{#1}\fi \endlink \endgroup} \else \let\email=\uref \fi % Check if we are currently using a typewriter font. Since all the % Computer Modern typewriter fonts have zero interword stretch (and % shrink), and it is reasonable to expect all typewriter fonts to have % this property, we can check that font parameter. % \def\ifmonospace{\ifdim\fontdimen3\font=0pt } % Typeset a dimension, e.g., `in' or `pt'. The only reason for the % argument is to make the input look right: @dmn{pt} instead of @dmn{}pt. % \def\dmn#1{\thinspace #1} \def\kbd#1{\def\look{#1}\expandafter\kbdfoo\look??\par} % @l was never documented to mean ``switch to the Lisp font'', % and it is not used as such in any manual I can find. We need it for % Polish suppressed-l. --karl, 22sep96. %\def\l#1{{\li #1}\null} % Explicit font changes: @r, @sc, undocumented @ii. \def\r#1{{\rm #1}} % roman font \def\sc#1{{\smallcaps#1}} % smallcaps font \def\ii#1{{\it #1}} % italic font % @acronym downcases the argument and prints in smallcaps. \def\acronym#1{{\smallcaps \lowercase{#1}}} % @pounds{} is a sterling sign. \def\pounds{{\it\$}} \message{page headings,} \newskip\titlepagetopglue \titlepagetopglue = 1.5in \newskip\titlepagebottomglue \titlepagebottomglue = 2pc % First the title page. Must do @settitle before @titlepage. \newif\ifseenauthor \newif\iffinishedtitlepage % Do an implicit @contents or @shortcontents after @end titlepage if the % user says @setcontentsaftertitlepage or @setshortcontentsaftertitlepage. % \newif\ifsetcontentsaftertitlepage \let\setcontentsaftertitlepage = \setcontentsaftertitlepagetrue \newif\ifsetshortcontentsaftertitlepage \let\setshortcontentsaftertitlepage = \setshortcontentsaftertitlepagetrue \def\shorttitlepage{\parsearg\shorttitlepagezzz} \def\shorttitlepagezzz #1{\begingroup\hbox{}\vskip 1.5in \chaprm \centerline{#1}% \endgroup\page\hbox{}\page} \def\titlepage{\begingroup \parindent=0pt \textfonts \let\subtitlerm=\tenrm \def\subtitlefont{\subtitlerm \normalbaselineskip = 13pt \normalbaselines}% % \def\authorfont{\authorrm \normalbaselineskip = 16pt \normalbaselines}% % % Leave some space at the very top of the page. \vglue\titlepagetopglue % % Now you can print the title using @title. \def\title{\parsearg\titlezzz}% \def\titlezzz##1{\leftline{\titlefonts\rm ##1} % print a rule at the page bottom also. \finishedtitlepagefalse \vskip4pt \hrule height 4pt width \hsize \vskip4pt}% % No rule at page bottom unless we print one at the top with @title. \finishedtitlepagetrue % % Now you can put text using @subtitle. \def\subtitle{\parsearg\subtitlezzz}% \def\subtitlezzz##1{{\subtitlefont \rightline{##1}}}% % % @author should come last, but may come many times. \def\author{\parsearg\authorzzz}% \def\authorzzz##1{\ifseenauthor\else\vskip 0pt plus 1filll\seenauthortrue\fi {\authorfont \leftline{##1}}}% % % Most title ``pages'' are actually two pages long, with space % at the top of the second. We don't want the ragged left on the second. \let\oldpage = \page \def\page{% \iffinishedtitlepage\else \finishtitlepage \fi \oldpage \let\page = \oldpage \hbox{}}% % \def\page{\oldpage \hbox{}} } \def\Etitlepage{% \iffinishedtitlepage\else \finishtitlepage \fi % It is important to do the page break before ending the group, % because the headline and footline are only empty inside the group. % If we use the new definition of \page, we always get a blank page % after the title page, which we certainly don't want. \oldpage \endgroup % % If they want short, they certainly want long too. \ifsetshortcontentsaftertitlepage \shortcontents \contents \global\let\shortcontents = \relax \global\let\contents = \relax \fi % \ifsetcontentsaftertitlepage \contents \global\let\contents = \relax \global\let\shortcontents = \relax \fi % \ifpdf \pdfmakepagedesttrue \fi % \HEADINGSon } \def\finishtitlepage{% \vskip4pt \hrule height 2pt width \hsize \vskip\titlepagebottomglue \finishedtitlepagetrue } %%% Set up page headings and footings. \let\thispage=\folio \newtoks\evenheadline % headline on even pages \newtoks\oddheadline % headline on odd pages \newtoks\evenfootline % footline on even pages \newtoks\oddfootline % footline on odd pages % Now make Tex use those variables \headline={{\textfonts\rm \ifodd\pageno \the\oddheadline \else \the\evenheadline \fi}} \footline={{\textfonts\rm \ifodd\pageno \the\oddfootline \else \the\evenfootline \fi}\HEADINGShook} \let\HEADINGShook=\relax % Commands to set those variables. % For example, this is what @headings on does % @evenheading @thistitle|@thispage|@thischapter % @oddheading @thischapter|@thispage|@thistitle % @evenfooting @thisfile|| % @oddfooting ||@thisfile \def\evenheading{\parsearg\evenheadingxxx} \def\oddheading{\parsearg\oddheadingxxx} \def\everyheading{\parsearg\everyheadingxxx} \def\evenfooting{\parsearg\evenfootingxxx} \def\oddfooting{\parsearg\oddfootingxxx} \def\everyfooting{\parsearg\everyfootingxxx} {\catcode`\@=0 % \gdef\evenheadingxxx #1{\evenheadingyyy #1@|@|@|@|\finish} \gdef\evenheadingyyy #1@|#2@|#3@|#4\finish{% \global\evenheadline={\rlap{\centerline{#2}}\line{#1\hfil#3}}} \gdef\oddheadingxxx #1{\oddheadingyyy #1@|@|@|@|\finish} \gdef\oddheadingyyy #1@|#2@|#3@|#4\finish{% \global\oddheadline={\rlap{\centerline{#2}}\line{#1\hfil#3}}} \gdef\everyheadingxxx#1{\oddheadingxxx{#1}\evenheadingxxx{#1}}% \gdef\evenfootingxxx #1{\evenfootingyyy #1@|@|@|@|\finish} \gdef\evenfootingyyy #1@|#2@|#3@|#4\finish{% \global\evenfootline={\rlap{\centerline{#2}}\line{#1\hfil#3}}} \gdef\oddfootingxxx #1{\oddfootingyyy #1@|@|@|@|\finish} \gdef\oddfootingyyy #1@|#2@|#3@|#4\finish{% \global\oddfootline = {\rlap{\centerline{#2}}\line{#1\hfil#3}}% % % Leave some space for the footline. Hopefully ok to assume % @evenfooting will not be used by itself. \global\advance\pageheight by -\baselineskip \global\advance\vsize by -\baselineskip } \gdef\everyfootingxxx#1{\oddfootingxxx{#1}\evenfootingxxx{#1}} % }% unbind the catcode of @. % @headings double turns headings on for double-sided printing. % @headings single turns headings on for single-sided printing. % @headings off turns them off. % @headings on same as @headings double, retained for compatibility. % @headings after turns on double-sided headings after this page. % @headings doubleafter turns on double-sided headings after this page. % @headings singleafter turns on single-sided headings after this page. % By default, they are off at the start of a document, % and turned `on' after @end titlepage. \def\headings #1 {\csname HEADINGS#1\endcsname} \def\HEADINGSoff{ \global\evenheadline={\hfil} \global\evenfootline={\hfil} \global\oddheadline={\hfil} \global\oddfootline={\hfil}} \HEADINGSoff % When we turn headings on, set the page number to 1. % For double-sided printing, put current file name in lower left corner, % chapter name on inside top of right hand pages, document % title on inside top of left hand pages, and page numbers on outside top % edge of all pages. \def\HEADINGSdouble{ \global\pageno=1 \global\evenfootline={\hfil} \global\oddfootline={\hfil} \global\evenheadline={\line{\folio\hfil\thistitle}} \global\oddheadline={\line{\thischapter\hfil\folio}} \global\let\contentsalignmacro = \chapoddpage } \let\contentsalignmacro = \chappager % For single-sided printing, chapter title goes across top left of page, % page number on top right. \def\HEADINGSsingle{ \global\pageno=1 \global\evenfootline={\hfil} \global\oddfootline={\hfil} \global\evenheadline={\line{\thischapter\hfil\folio}} \global\oddheadline={\line{\thischapter\hfil\folio}} \global\let\contentsalignmacro = \chappager } \def\HEADINGSon{\HEADINGSdouble} \def\HEADINGSafter{\let\HEADINGShook=\HEADINGSdoublex} \let\HEADINGSdoubleafter=\HEADINGSafter \def\HEADINGSdoublex{% \global\evenfootline={\hfil} \global\oddfootline={\hfil} \global\evenheadline={\line{\folio\hfil\thistitle}} \global\oddheadline={\line{\thischapter\hfil\folio}} \global\let\contentsalignmacro = \chapoddpage } \def\HEADINGSsingleafter{\let\HEADINGShook=\HEADINGSsinglex} \def\HEADINGSsinglex{% \global\evenfootline={\hfil} \global\oddfootline={\hfil} \global\evenheadline={\line{\thischapter\hfil\folio}} \global\oddheadline={\line{\thischapter\hfil\folio}} \global\let\contentsalignmacro = \chappager } % Subroutines used in generating headings % Produces Day Month Year style of output. \def\today{% \number\day\space \ifcase\month \or\putwordMJan\or\putwordMFeb\or\putwordMMar\or\putwordMApr \or\putwordMMay\or\putwordMJun\or\putwordMJul\or\putwordMAug \or\putwordMSep\or\putwordMOct\or\putwordMNov\or\putwordMDec \fi \space\number\year} % @settitle line... specifies the title of the document, for headings. % It generates no output of its own. \def\thistitle{\putwordNoTitle} \def\settitle{\parsearg\settitlezzz} \def\settitlezzz #1{\gdef\thistitle{#1}} \message{tables,} % Tables -- @table, @ftable, @vtable, @item(x), @kitem(x), @xitem(x). % default indentation of table text \newdimen\tableindent \tableindent=.8in % default indentation of @itemize and @enumerate text \newdimen\itemindent \itemindent=.3in % margin between end of table item and start of table text. \newdimen\itemmargin \itemmargin=.1in % used internally for \itemindent minus \itemmargin \newdimen\itemmax % Note @table, @vtable, and @vtable define @item, @itemx, etc., with % these defs. % They also define \itemindex % to index the item name in whatever manner is desired (perhaps none). \newif\ifitemxneedsnegativevskip \def\itemxpar{\par\ifitemxneedsnegativevskip\nobreak\vskip-\parskip\nobreak\fi} \def\internalBitem{\smallbreak \parsearg\itemzzz} \def\internalBitemx{\itemxpar \parsearg\itemzzz} \def\internalBxitem "#1"{\def\xitemsubtopix{#1} \smallbreak \parsearg\xitemzzz} \def\internalBxitemx "#1"{\def\xitemsubtopix{#1} \itemxpar \parsearg\xitemzzz} \def\internalBkitem{\smallbreak \parsearg\kitemzzz} \def\internalBkitemx{\itemxpar \parsearg\kitemzzz} \def\kitemzzz #1{\dosubind {kw}{\code{#1}}{for {\bf \lastfunction}}% \itemzzz {#1}} \def\xitemzzz #1{\dosubind {kw}{\code{#1}}{for {\bf \xitemsubtopic}}% \itemzzz {#1}} \def\itemzzz #1{\begingroup % \advance\hsize by -\rightskip \advance\hsize by -\tableindent \setbox0=\hbox{\itemfont{#1}}% \itemindex{#1}% \nobreak % This prevents a break before @itemx. % % If the item text does not fit in the space we have, put it on a line % by itself, and do not allow a page break either before or after that % line. We do not start a paragraph here because then if the next % command is, e.g., @kindex, the whatsit would get put into the % horizontal list on a line by itself, resulting in extra blank space. \ifdim \wd0>\itemmax % % Make this a paragraph so we get the \parskip glue and wrapping, % but leave it ragged-right. \begingroup \advance\leftskip by-\tableindent \advance\hsize by\tableindent \advance\rightskip by0pt plus1fil \leavevmode\unhbox0\par \endgroup % % We're going to be starting a paragraph, but we don't want the % \parskip glue -- logically it's part of the @item we just started. \nobreak \vskip-\parskip % % Stop a page break at the \parskip glue coming up. Unfortunately % we can't prevent a possible page break at the following % \baselineskip glue. \nobreak \endgroup \itemxneedsnegativevskipfalse \else % The item text fits into the space. Start a paragraph, so that the % following text (if any) will end up on the same line. \noindent % Do this with kerns and \unhbox so that if there is a footnote in % the item text, it can migrate to the main vertical list and % eventually be printed. \nobreak\kern-\tableindent \dimen0 = \itemmax \advance\dimen0 by \itemmargin \advance\dimen0 by -\wd0 \unhbox0 \nobreak\kern\dimen0 \endgroup \itemxneedsnegativevskiptrue \fi } \def\item{\errmessage{@item while not in a table}} \def\itemx{\errmessage{@itemx while not in a table}} \def\kitem{\errmessage{@kitem while not in a table}} \def\kitemx{\errmessage{@kitemx while not in a table}} \def\xitem{\errmessage{@xitem while not in a table}} \def\xitemx{\errmessage{@xitemx while not in a table}} % Contains a kludge to get @end[description] to work. \def\description{\tablez{\dontindex}{1}{}{}{}{}} % @table, @ftable, @vtable. \def\table{\begingroup\inENV\obeylines\obeyspaces\tablex} {\obeylines\obeyspaces% \gdef\tablex #1^^M{% \tabley\dontindex#1 \endtabley}} \def\ftable{\begingroup\inENV\obeylines\obeyspaces\ftablex} {\obeylines\obeyspaces% \gdef\ftablex #1^^M{% \tabley\fnitemindex#1 \endtabley \def\Eftable{\endgraf\afterenvbreak\endgroup}% \let\Etable=\relax}} \def\vtable{\begingroup\inENV\obeylines\obeyspaces\vtablex} {\obeylines\obeyspaces% \gdef\vtablex #1^^M{% \tabley\vritemindex#1 \endtabley \def\Evtable{\endgraf\afterenvbreak\endgroup}% \let\Etable=\relax}} \def\dontindex #1{} \def\fnitemindex #1{\doind {fn}{\code{#1}}}% \def\vritemindex #1{\doind {vr}{\code{#1}}}% {\obeyspaces % \gdef\tabley#1#2 #3 #4 #5 #6 #7\endtabley{\endgroup% \tablez{#1}{#2}{#3}{#4}{#5}{#6}}} \def\tablez #1#2#3#4#5#6{% \aboveenvbreak % \begingroup % \def\Edescription{\Etable}% Necessary kludge. \let\itemindex=#1% \ifnum 0#3>0 \advance \leftskip by #3\mil \fi % \ifnum 0#4>0 \tableindent=#4\mil \fi % \ifnum 0#5>0 \advance \rightskip by #5\mil \fi % \def\itemfont{#2}% \itemmax=\tableindent % \advance \itemmax by -\itemmargin % \advance \leftskip by \tableindent % \exdentamount=\tableindent \parindent = 0pt \parskip = \smallskipamount \ifdim \parskip=0pt \parskip=2pt \fi% \def\Etable{\endgraf\afterenvbreak\endgroup}% \let\item = \internalBitem % \let\itemx = \internalBitemx % \let\kitem = \internalBkitem % \let\kitemx = \internalBkitemx % \let\xitem = \internalBxitem % \let\xitemx = \internalBxitemx % } % This is the counter used by @enumerate, which is really @itemize \newcount \itemno \def\itemize{\parsearg\itemizezzz} \def\itemizezzz #1{% \begingroup % ended by the @end itemize \itemizey {#1}{\Eitemize} } \def\itemizey #1#2{% \aboveenvbreak % \itemmax=\itemindent % \advance \itemmax by -\itemmargin % \advance \leftskip by \itemindent % \exdentamount=\itemindent \parindent = 0pt % \parskip = \smallskipamount % \ifdim \parskip=0pt \parskip=2pt \fi% \def#2{\endgraf\afterenvbreak\endgroup}% \def\itemcontents{#1}% \let\item=\itemizeitem} % Set sfcode to normal for the chars that usually have another value. % These are `.?!:;,' \def\frenchspacing{\sfcode46=1000 \sfcode63=1000 \sfcode33=1000 \sfcode58=1000 \sfcode59=1000 \sfcode44=1000 } % \splitoff TOKENS\endmark defines \first to be the first token in % TOKENS, and \rest to be the remainder. % \def\splitoff#1#2\endmark{\def\first{#1}\def\rest{#2}}% % Allow an optional argument of an uppercase letter, lowercase letter, % or number, to specify the first label in the enumerated list. No % argument is the same as `1'. % \def\enumerate{\parsearg\enumeratezzz} \def\enumeratezzz #1{\enumeratey #1 \endenumeratey} \def\enumeratey #1 #2\endenumeratey{% \begingroup % ended by the @end enumerate % % If we were given no argument, pretend we were given `1'. \def\thearg{#1}% \ifx\thearg\empty \def\thearg{1}\fi % % Detect if the argument is a single token. If so, it might be a % letter. Otherwise, the only valid thing it can be is a number. % (We will always have one token, because of the test we just made. % This is a good thing, since \splitoff doesn't work given nothing at % all -- the first parameter is undelimited.) \expandafter\splitoff\thearg\endmark \ifx\rest\empty % Only one token in the argument. It could still be anything. % A ``lowercase letter'' is one whose \lccode is nonzero. % An ``uppercase letter'' is one whose \lccode is both nonzero, and % not equal to itself. % Otherwise, we assume it's a number. % % We need the \relax at the end of the \ifnum lines to stop TeX from % continuing to look for a . % \ifnum\lccode\expandafter`\thearg=0\relax \numericenumerate % a number (we hope) \else % It's a letter. \ifnum\lccode\expandafter`\thearg=\expandafter`\thearg\relax \lowercaseenumerate % lowercase letter \else \uppercaseenumerate % uppercase letter \fi \fi \else % Multiple tokens in the argument. We hope it's a number. \numericenumerate \fi } % An @enumerate whose labels are integers. The starting integer is % given in \thearg. % \def\numericenumerate{% \itemno = \thearg \startenumeration{\the\itemno}% } % The starting (lowercase) letter is in \thearg. \def\lowercaseenumerate{% \itemno = \expandafter`\thearg \startenumeration{% % Be sure we're not beyond the end of the alphabet. \ifnum\itemno=0 \errmessage{No more lowercase letters in @enumerate; get a bigger alphabet}% \fi \char\lccode\itemno }% } % The starting (uppercase) letter is in \thearg. \def\uppercaseenumerate{% \itemno = \expandafter`\thearg \startenumeration{% % Be sure we're not beyond the end of the alphabet. \ifnum\itemno=0 \errmessage{No more uppercase letters in @enumerate; get a bigger alphabet} \fi \char\uccode\itemno }% } % Call itemizey, adding a period to the first argument and supplying the % common last two arguments. Also subtract one from the initial value in % \itemno, since @item increments \itemno. % \def\startenumeration#1{% \advance\itemno by -1 \itemizey{#1.}\Eenumerate\flushcr } % @alphaenumerate and @capsenumerate are abbreviations for giving an arg % to @enumerate. % \def\alphaenumerate{\enumerate{a}} \def\capsenumerate{\enumerate{A}} \def\Ealphaenumerate{\Eenumerate} \def\Ecapsenumerate{\Eenumerate} % Definition of @item while inside @itemize. \def\itemizeitem{% \advance\itemno by 1 {\let\par=\endgraf \smallbreak}% \ifhmode \errmessage{In hmode at itemizeitem}\fi {\parskip=0in \hskip 0pt \hbox to 0pt{\hss \itemcontents\hskip \itemmargin}% \vadjust{\penalty 1200}}% \flushcr} % @multitable macros % Amy Hendrickson, 8/18/94, 3/6/96 % % @multitable ... @end multitable will make as many columns as desired. % Contents of each column will wrap at width given in preamble. Width % can be specified either with sample text given in a template line, % or in percent of \hsize, the current width of text on page. % Table can continue over pages but will only break between lines. % To make preamble: % % Either define widths of columns in terms of percent of \hsize: % @multitable @columnfractions .25 .3 .45 % @item ... % % Numbers following @columnfractions are the percent of the total % current hsize to be used for each column. You may use as many % columns as desired. % Or use a template: % @multitable {Column 1 template} {Column 2 template} {Column 3 template} % @item ... % using the widest term desired in each column. % % For those who want to use more than one line's worth of words in % the preamble, break the line within one argument and it % will parse correctly, i.e., % % @multitable {Column 1 template} {Column 2 template} {Column 3 % template} % Not: % @multitable {Column 1 template} {Column 2 template} % {Column 3 template} % Each new table line starts with @item, each subsequent new column % starts with @tab. Empty columns may be produced by supplying @tab's % with nothing between them for as many times as empty columns are needed, % ie, @tab@tab@tab will produce two empty columns. % @item, @tab, @multitable or @end multitable do not need to be on their % own lines, but it will not hurt if they are. % Sample multitable: % @multitable {Column 1 template} {Column 2 template} {Column 3 template} % @item first col stuff @tab second col stuff @tab third col % @item % first col stuff % @tab % second col stuff % @tab % third col % @item first col stuff @tab second col stuff % @tab Many paragraphs of text may be used in any column. % % They will wrap at the width determined by the template. % @item@tab@tab This will be in third column. % @end multitable % Default dimensions may be reset by user. % @multitableparskip is vertical space between paragraphs in table. % @multitableparindent is paragraph indent in table. % @multitablecolmargin is horizontal space to be left between columns. % @multitablelinespace is space to leave between table items, baseline % to baseline. % 0pt means it depends on current normal line spacing. % \newskip\multitableparskip \newskip\multitableparindent \newdimen\multitablecolspace \newskip\multitablelinespace \multitableparskip=0pt \multitableparindent=6pt \multitablecolspace=12pt \multitablelinespace=0pt % Macros used to set up halign preamble: % \let\endsetuptable\relax \def\xendsetuptable{\endsetuptable} \let\columnfractions\relax \def\xcolumnfractions{\columnfractions} \newif\ifsetpercent % #1 is the part of the @columnfraction before the decimal point, which % is presumably either 0 or the empty string (but we don't check, we % just throw it away). #2 is the decimal part, which we use as the % percent of \hsize for this column. \def\pickupwholefraction#1.#2 {% \global\advance\colcount by 1 \expandafter\xdef\csname col\the\colcount\endcsname{.#2\hsize}% \setuptable } \newcount\colcount \def\setuptable#1{% \def\firstarg{#1}% \ifx\firstarg\xendsetuptable \let\go = \relax \else \ifx\firstarg\xcolumnfractions \global\setpercenttrue \else \ifsetpercent \let\go\pickupwholefraction \else \global\advance\colcount by 1 \setbox0=\hbox{#1\unskip }% Add a normal word space as a separator; % typically that is always in the input, anyway. \expandafter\xdef\csname col\the\colcount\endcsname{\the\wd0}% \fi \fi \ifx\go\pickupwholefraction % Put the argument back for the \pickupwholefraction call, so % we'll always have a period there to be parsed. \def\go{\pickupwholefraction#1}% \else \let\go = \setuptable \fi% \fi \go } % This used to have \hskip1sp. But then the space in a template line is % not enough. That is bad. So let's go back to just & until we % encounter the problem it was intended to solve again. % --karl, nathan@acm.org, 20apr99. \def\tab{&} % @multitable ... @end multitable definitions: % \def\multitable{\parsearg\dotable} \def\dotable#1{\bgroup \vskip\parskip \let\item\crcr \tolerance=9500 \hbadness=9500 \setmultitablespacing \parskip=\multitableparskip \parindent=\multitableparindent \overfullrule=0pt \global\colcount=0 \def\Emultitable{\global\setpercentfalse\cr\egroup\egroup}% % % To parse everything between @multitable and @item: \setuptable#1 \endsetuptable % % \everycr will reset column counter, \colcount, at the end of % each line. Every column entry will cause \colcount to advance by one. % The table preamble % looks at the current \colcount to find the correct column width. \everycr{\noalign{% % % \filbreak%% keeps underfull box messages off when table breaks over pages. % Maybe so, but it also creates really weird page breaks when the table % breaks over pages. Wouldn't \vfil be better? Wait until the problem % manifests itself, so it can be fixed for real --karl. \global\colcount=0\relax}}% % % This preamble sets up a generic column definition, which will % be used as many times as user calls for columns. % \vtop will set a single line and will also let text wrap and % continue for many paragraphs if desired. \halign\bgroup&\global\advance\colcount by 1\relax \multistrut\vtop{\hsize=\expandafter\csname col\the\colcount\endcsname % % In order to keep entries from bumping into each other % we will add a \leftskip of \multitablecolspace to all columns after % the first one. % % If a template has been used, we will add \multitablecolspace % to the width of each template entry. % % If the user has set preamble in terms of percent of \hsize we will % use that dimension as the width of the column, and the \leftskip % will keep entries from bumping into each other. Table will start at % left margin and final column will justify at right margin. % % Make sure we don't inherit \rightskip from the outer environment. \rightskip=0pt \ifnum\colcount=1 % The first column will be indented with the surrounding text. \advance\hsize by\leftskip \else \ifsetpercent \else % If user has not set preamble in terms of percent of \hsize % we will advance \hsize by \multitablecolspace. \advance\hsize by \multitablecolspace \fi % In either case we will make \leftskip=\multitablecolspace: \leftskip=\multitablecolspace \fi % Ignoring space at the beginning and end avoids an occasional spurious % blank line, when TeX decides to break the line at the space before the % box from the multistrut, so the strut ends up on a line by itself. % For example: % @multitable @columnfractions .11 .89 % @item @code{#} % @tab Legal holiday which is valid in major parts of the whole country. % Is automatically provided with highlighting sequences respectively marking % characters. \noindent\ignorespaces##\unskip\multistrut}\cr } \def\setmultitablespacing{% test to see if user has set \multitablelinespace. % If so, do nothing. If not, give it an appropriate dimension based on % current baselineskip. \ifdim\multitablelinespace=0pt \setbox0=\vbox{X}\global\multitablelinespace=\the\baselineskip \global\advance\multitablelinespace by-\ht0 %% strut to put in table in case some entry doesn't have descenders, %% to keep lines equally spaced \let\multistrut = \strut \else %% FIXME: what is \box0 supposed to be? \gdef\multistrut{\vrule height\multitablelinespace depth\dp0 width0pt\relax} \fi %% Test to see if parskip is larger than space between lines of %% table. If not, do nothing. %% If so, set to same dimension as multitablelinespace. \ifdim\multitableparskip>\multitablelinespace \global\multitableparskip=\multitablelinespace \global\advance\multitableparskip-7pt %% to keep parskip somewhat smaller %% than skip between lines in the table. \fi% \ifdim\multitableparskip=0pt \global\multitableparskip=\multitablelinespace \global\advance\multitableparskip-7pt %% to keep parskip somewhat smaller %% than skip between lines in the table. \fi} \message{conditionals,} % Prevent errors for section commands. % Used in @ignore and in failing conditionals. \def\ignoresections{% \let\chapter=\relax \let\unnumbered=\relax \let\top=\relax \let\unnumberedsec=\relax \let\unnumberedsection=\relax \let\unnumberedsubsec=\relax \let\unnumberedsubsection=\relax \let\unnumberedsubsubsec=\relax \let\unnumberedsubsubsection=\relax \let\section=\relax \let\subsec=\relax \let\subsubsec=\relax \let\subsection=\relax \let\subsubsection=\relax \let\appendix=\relax \let\appendixsec=\relax \let\appendixsection=\relax \let\appendixsubsec=\relax \let\appendixsubsection=\relax \let\appendixsubsubsec=\relax \let\appendixsubsubsection=\relax \let\contents=\relax \let\smallbook=\relax \let\titlepage=\relax } % Used in nested conditionals, where we have to parse the Texinfo source % and so want to turn off most commands, in case they are used % incorrectly. % \def\ignoremorecommands{% \let\defcodeindex = \relax \let\defcv = \relax \let\deffn = \relax \let\deffnx = \relax \let\defindex = \relax \let\defivar = \relax \let\defmac = \relax \let\defmethod = \relax \let\defop = \relax \let\defopt = \relax \let\defspec = \relax \let\deftp = \relax \let\deftypefn = \relax \let\deftypefun = \relax \let\deftypeivar = \relax \let\deftypeop = \relax \let\deftypevar = \relax \let\deftypevr = \relax \let\defun = \relax \let\defvar = \relax \let\defvr = \relax \let\ref = \relax \let\xref = \relax \let\printindex = \relax \let\pxref = \relax \let\settitle = \relax \let\setchapternewpage = \relax \let\setchapterstyle = \relax \let\everyheading = \relax \let\evenheading = \relax \let\oddheading = \relax \let\everyfooting = \relax \let\evenfooting = \relax \let\oddfooting = \relax \let\headings = \relax \let\include = \relax \let\lowersections = \relax \let\down = \relax \let\raisesections = \relax \let\up = \relax \let\set = \relax \let\clear = \relax \let\item = \relax } % Ignore @ignore ... @end ignore. % \def\ignore{\doignore{ignore}} % Ignore @ifinfo, @ifhtml, @ifnottex, @html, @menu, and @direntry text. % \def\ifinfo{\doignore{ifinfo}} \def\ifhtml{\doignore{ifhtml}} \def\ifnottex{\doignore{ifnottex}} \def\html{\doignore{html}} \def\menu{\doignore{menu}} \def\direntry{\doignore{direntry}} % @dircategory CATEGORY -- specify a category of the dir file % which this file should belong to. Ignore this in TeX. \let\dircategory = \comment % Ignore text until a line `@end #1'. % \def\doignore#1{\begingroup % Don't complain about control sequences we have declared \outer. \ignoresections % % Define a command to swallow text until we reach `@end #1'. % This @ is a catcode 12 token (that is the normal catcode of @ in % this texinfo.tex file). We change the catcode of @ below to match. \long\def\doignoretext##1@end #1{\enddoignore}% % % Make sure that spaces turn into tokens that match what \doignoretext wants. \catcode32 = 10 % % Ignore braces, too, so mismatched braces don't cause trouble. \catcode`\{ = 9 \catcode`\} = 9 % % We must not have @c interpreted as a control sequence. \catcode`\@ = 12 % % Make the letter c a comment character so that the rest of the line % will be ignored. This way, the document can have (for example) % @c @end ifinfo % and the @end ifinfo will be properly ignored. % (We've just changed @ to catcode 12.) \catcode`\c = 14 % % And now expand that command. \doignoretext } % What we do to finish off ignored text. % \def\enddoignore{\endgroup\ignorespaces}% \newif\ifwarnedobs\warnedobsfalse \def\obstexwarn{% \ifwarnedobs\relax\else % We need to warn folks that they may have trouble with TeX 3.0. % This uses \immediate\write16 rather than \message to get newlines. \immediate\write16{} \immediate\write16{WARNING: for users of Unix TeX 3.0!} \immediate\write16{This manual trips a bug in TeX version 3.0 (tex hangs).} \immediate\write16{If you are running another version of TeX, relax.} \immediate\write16{If you are running Unix TeX 3.0, kill this TeX process.} \immediate\write16{ Then upgrade your TeX installation if you can.} \immediate\write16{ (See ftp://ftp.gnu.org/pub/gnu/TeX.README.)} \immediate\write16{If you are stuck with version 3.0, run the} \immediate\write16{ script ``tex3patch'' from the Texinfo distribution} \immediate\write16{ to use a workaround.} \immediate\write16{} \global\warnedobstrue \fi } % **In TeX 3.0, setting text in \nullfont hangs tex. For a % workaround (which requires the file ``dummy.tfm'' to be installed), % uncomment the following line: %%%%%\font\nullfont=dummy\let\obstexwarn=\relax % Ignore text, except that we keep track of conditional commands for % purposes of nesting, up to an `@end #1' command. % \def\nestedignore#1{% \obstexwarn % We must actually expand the ignored text to look for the @end % command, so that nested ignore constructs work. Thus, we put the % text into a \vbox and then do nothing with the result. To minimize % the change of memory overflow, we follow the approach outlined on % page 401 of the TeXbook: make the current font be a dummy font. % \setbox0 = \vbox\bgroup % Don't complain about control sequences we have declared \outer. \ignoresections % % Define `@end #1' to end the box, which will in turn undefine the % @end command again. \expandafter\def\csname E#1\endcsname{\egroup\ignorespaces}% % % We are going to be parsing Texinfo commands. Most cause no % trouble when they are used incorrectly, but some commands do % complicated argument parsing or otherwise get confused, so we % undefine them. % % We can't do anything about stray @-signs, unfortunately; % they'll produce `undefined control sequence' errors. \ignoremorecommands % % Set the current font to be \nullfont, a TeX primitive, and define % all the font commands to also use \nullfont. We don't use % dummy.tfm, as suggested in the TeXbook, because not all sites % might have that installed. Therefore, math mode will still % produce output, but that should be an extremely small amount of % stuff compared to the main input. % \nullfont \let\tenrm=\nullfont \let\tenit=\nullfont \let\tensl=\nullfont \let\tenbf=\nullfont \let\tentt=\nullfont \let\smallcaps=\nullfont \let\tensf=\nullfont % Similarly for index fonts (mostly for their use in smallexample). \let\smallrm=\nullfont \let\smallit=\nullfont \let\smallsl=\nullfont \let\smallbf=\nullfont \let\smalltt=\nullfont \let\smallsc=\nullfont \let\smallsf=\nullfont % % Don't complain when characters are missing from the fonts. \tracinglostchars = 0 % % Don't bother to do space factor calculations. \frenchspacing % % Don't report underfull hboxes. \hbadness = 10000 % % Do minimal line-breaking. \pretolerance = 10000 % % Do not execute instructions in @tex \def\tex{\doignore{tex}}% % Do not execute macro definitions. % `c' is a comment character, so the word `macro' will get cut off. \def\macro{\doignore{ma}}% } % @set VAR sets the variable VAR to an empty value. % @set VAR REST-OF-LINE sets VAR to the value REST-OF-LINE. % % Since we want to separate VAR from REST-OF-LINE (which might be % empty), we can't just use \parsearg; we have to insert a space of our % own to delimit the rest of the line, and then take it out again if we % didn't need it. Make sure the catcode of space is correct to avoid % losing inside @example, for instance. % \def\set{\begingroup\catcode` =10 \catcode`\-=12 \catcode`\_=12 % Allow - and _ in VAR. \parsearg\setxxx} \def\setxxx#1{\setyyy#1 \endsetyyy} \def\setyyy#1 #2\endsetyyy{% \def\temp{#2}% \ifx\temp\empty \global\expandafter\let\csname SET#1\endcsname = \empty \else \setzzz{#1}#2\endsetzzz % Remove the trailing space \setxxx inserted. \fi \endgroup } % Can't use \xdef to pre-expand #2 and save some time, since \temp or % \next or other control sequences that we've defined might get us into % an infinite loop. Consider `@set foo @cite{bar}'. \def\setzzz#1#2 \endsetzzz{\expandafter\gdef\csname SET#1\endcsname{#2}} % @clear VAR clears (i.e., unsets) the variable VAR. % \def\clear{\parsearg\clearxxx} \def\clearxxx#1{\global\expandafter\let\csname SET#1\endcsname=\relax} % @value{foo} gets the text saved in variable foo. { \catcode`\_ = \active % % We might end up with active _ or - characters in the argument if % we're called from @code, as @code{@value{foo-bar_}}. So \let any % such active characters to their normal equivalents. \gdef\value{\begingroup \catcode`\-=12 \catcode`\_=12 \indexbreaks \let_\normalunderscore \valuexxx} } \def\valuexxx#1{\expandablevalue{#1}\endgroup} % We have this subroutine so that we can handle at least some @value's % properly in indexes (we \let\value to this in \indexdummies). Ones % whose names contain - or _ still won't work, but we can't do anything % about that. The command has to be fully expandable, since the result % winds up in the index file. This means that if the variable's value % contains other Texinfo commands, it's almost certain it will fail % (although perhaps we could fix that with sufficient work to do a % one-level expansion on the result, instead of complete). % \def\expandablevalue#1{% \expandafter\ifx\csname SET#1\endcsname\relax {[No value for ``#1'']}% \else \csname SET#1\endcsname \fi } % @ifset VAR ... @end ifset reads the `...' iff VAR has been defined % with @set. % \def\ifset{\parsearg\ifsetxxx} \def\ifsetxxx #1{% \expandafter\ifx\csname SET#1\endcsname\relax \expandafter\ifsetfail \else \expandafter\ifsetsucceed \fi } \def\ifsetsucceed{\conditionalsucceed{ifset}} \def\ifsetfail{\nestedignore{ifset}} \defineunmatchedend{ifset} % @ifclear VAR ... @end ifclear reads the `...' iff VAR has never been % defined with @set, or has been undefined with @clear. % \def\ifclear{\parsearg\ifclearxxx} \def\ifclearxxx #1{% \expandafter\ifx\csname SET#1\endcsname\relax \expandafter\ifclearsucceed \else \expandafter\ifclearfail \fi } \def\ifclearsucceed{\conditionalsucceed{ifclear}} \def\ifclearfail{\nestedignore{ifclear}} \defineunmatchedend{ifclear} % @iftex, @ifnothtml, @ifnotinfo always succeed; we read the text % following, through the first @end iftex (etc.). Make `@end iftex' % (etc.) valid only after an @iftex. % \def\iftex{\conditionalsucceed{iftex}} \def\ifnothtml{\conditionalsucceed{ifnothtml}} \def\ifnotinfo{\conditionalsucceed{ifnotinfo}} \defineunmatchedend{iftex} \defineunmatchedend{ifnothtml} \defineunmatchedend{ifnotinfo} % We can't just want to start a group at @iftex (for example) and end it % at @end iftex, since then @set commands inside the conditional have no % effect (they'd get reverted at the end of the group). So we must % define \Eiftex to redefine itself to be its previous value. (We can't % just define it to fail again with an ``unmatched end'' error, since % the @ifset might be nested.) % \def\conditionalsucceed#1{% \edef\temp{% % Remember the current value of \E#1. \let\nece{prevE#1} = \nece{E#1}% % % At the `@end #1', redefine \E#1 to be its previous value. \def\nece{E#1}{\let\nece{E#1} = \nece{prevE#1}}% }% \temp } % We need to expand lots of \csname's, but we don't want to expand the % control sequences after we've constructed them. % \def\nece#1{\expandafter\noexpand\csname#1\endcsname} % @defininfoenclose. \let\definfoenclose=\comment \message{indexing,} % Index generation facilities % Define \newwrite to be identical to plain tex's \newwrite % except not \outer, so it can be used within \newindex. {\catcode`\@=11 \gdef\newwrite{\alloc@7\write\chardef\sixt@@n}} % \newindex {foo} defines an index named foo. % It automatically defines \fooindex such that % \fooindex ...rest of line... puts an entry in the index foo. % It also defines \fooindfile to be the number of the output channel for % the file that accumulates this index. The file's extension is foo. % The name of an index should be no more than 2 characters long % for the sake of vms. % \def\newindex#1{% \iflinks \expandafter\newwrite \csname#1indfile\endcsname \openout \csname#1indfile\endcsname \jobname.#1 % Open the file \fi \expandafter\xdef\csname#1index\endcsname{% % Define @#1index \noexpand\doindex{#1}} } % @defindex foo == \newindex{foo} \def\defindex{\parsearg\newindex} % Define @defcodeindex, like @defindex except put all entries in @code. \def\newcodeindex#1{% \iflinks \expandafter\newwrite \csname#1indfile\endcsname \openout \csname#1indfile\endcsname \jobname.#1 \fi \expandafter\xdef\csname#1index\endcsname{% \noexpand\docodeindex{#1}} } \def\defcodeindex{\parsearg\newcodeindex} % @synindex foo bar makes index foo feed into index bar. % Do this instead of @defindex foo if you don't want it as a separate index. % The \closeout helps reduce unnecessary open files; the limit on the % Acorn RISC OS is a mere 16 files. \def\synindex#1 #2 {% \expandafter\let\expandafter\synindexfoo\expandafter=\csname#2indfile\endcsname \expandafter\closeout\csname#1indfile\endcsname \expandafter\let\csname#1indfile\endcsname=\synindexfoo \expandafter\xdef\csname#1index\endcsname{% define \xxxindex \noexpand\doindex{#2}}% } % @syncodeindex foo bar similar, but put all entries made for index foo % inside @code. \def\syncodeindex#1 #2 {% \expandafter\let\expandafter\synindexfoo\expandafter=\csname#2indfile\endcsname \expandafter\closeout\csname#1indfile\endcsname \expandafter\let\csname#1indfile\endcsname=\synindexfoo \expandafter\xdef\csname#1index\endcsname{% define \xxxindex \noexpand\docodeindex{#2}}% } % Define \doindex, the driver for all \fooindex macros. % Argument #1 is generated by the calling \fooindex macro, % and it is "foo", the name of the index. % \doindex just uses \parsearg; it calls \doind for the actual work. % This is because \doind is more useful to call from other macros. % There is also \dosubind {index}{topic}{subtopic} % which makes an entry in a two-level index such as the operation index. \def\doindex#1{\edef\indexname{#1}\parsearg\singleindexer} \def\singleindexer #1{\doind{\indexname}{#1}} % like the previous two, but they put @code around the argument. \def\docodeindex#1{\edef\indexname{#1}\parsearg\singlecodeindexer} \def\singlecodeindexer #1{\doind{\indexname}{\code{#1}}} \def\indexdummies{% \def\ { }% % Take care of the plain tex accent commands. \def\"{\realbackslash "}% \def\`{\realbackslash `}% \def\'{\realbackslash '}% \def\^{\realbackslash ^}% \def\~{\realbackslash ~}% \def\={\realbackslash =}% \def\b{\realbackslash b}% \def\c{\realbackslash c}% \def\d{\realbackslash d}% \def\u{\realbackslash u}% \def\v{\realbackslash v}% \def\H{\realbackslash H}% % Take care of the plain tex special European modified letters. \def\oe{\realbackslash oe}% \def\ae{\realbackslash ae}% \def\aa{\realbackslash aa}% \def\OE{\realbackslash OE}% \def\AE{\realbackslash AE}% \def\AA{\realbackslash AA}% \def\o{\realbackslash o}% \def\O{\realbackslash O}% \def\l{\realbackslash l}% \def\L{\realbackslash L}% \def\ss{\realbackslash ss}% % Take care of texinfo commands likely to appear in an index entry. % (Must be a way to avoid doing expansion at all, and thus not have to % laboriously list every single command here.) \def\@{@}% will be @@ when we switch to @ as escape char. % Need these in case \tex is in effect and \{ is a \delimiter again. % But can't use \lbracecmd and \rbracecmd because texindex assumes % braces and backslashes are used only as delimiters. \let\{ = \mylbrace \let\} = \myrbrace \def\_{{\realbackslash _}}% \def\w{\realbackslash w }% \def\bf{\realbackslash bf }% %\def\rm{\realbackslash rm }% \def\sl{\realbackslash sl }% \def\sf{\realbackslash sf}% \def\tt{\realbackslash tt}% \def\gtr{\realbackslash gtr}% \def\less{\realbackslash less}% \def\hat{\realbackslash hat}% \def\TeX{\realbackslash TeX}% \def\dots{\realbackslash dots }% \def\result{\realbackslash result}% \def\equiv{\realbackslash equiv}% \def\expansion{\realbackslash expansion}% \def\print{\realbackslash print}% \def\error{\realbackslash error}% \def\point{\realbackslash point}% \def\copyright{\realbackslash copyright}% \def\tclose##1{\realbackslash tclose {##1}}% \def\code##1{\realbackslash code {##1}}% \def\uref##1{\realbackslash uref {##1}}% \def\url##1{\realbackslash url {##1}}% \def\env##1{\realbackslash env {##1}}% \def\command##1{\realbackslash command {##1}}% \def\option##1{\realbackslash option {##1}}% \def\dotless##1{\realbackslash dotless {##1}}% \def\samp##1{\realbackslash samp {##1}}% \def\,##1{\realbackslash ,{##1}}% \def\t##1{\realbackslash t {##1}}% \def\r##1{\realbackslash r {##1}}% \def\i##1{\realbackslash i {##1}}% \def\b##1{\realbackslash b {##1}}% \def\sc##1{\realbackslash sc {##1}}% \def\cite##1{\realbackslash cite {##1}}% \def\key##1{\realbackslash key {##1}}% \def\file##1{\realbackslash file {##1}}% \def\var##1{\realbackslash var {##1}}% \def\kbd##1{\realbackslash kbd {##1}}% \def\dfn##1{\realbackslash dfn {##1}}% \def\emph##1{\realbackslash emph {##1}}% \def\acronym##1{\realbackslash acronym {##1}}% % % Handle some cases of @value -- where the variable name does not % contain - or _, and the value does not contain any % (non-fully-expandable) commands. \let\value = \expandablevalue % \unsepspaces % Turn off macro expansion \turnoffmacros } % If an index command is used in an @example environment, any spaces % therein should become regular spaces in the raw index file, not the % expansion of \tie (\\leavevmode \penalty \@M \ ). {\obeyspaces \gdef\unsepspaces{\obeyspaces\let =\space}} % \indexnofonts no-ops all font-change commands. % This is used when outputting the strings to sort the index by. \def\indexdummyfont#1{#1} \def\indexdummytex{TeX} \def\indexdummydots{...} \def\indexnofonts{% % Just ignore accents. \let\,=\indexdummyfont \let\"=\indexdummyfont \let\`=\indexdummyfont \let\'=\indexdummyfont \let\^=\indexdummyfont \let\~=\indexdummyfont \let\==\indexdummyfont \let\b=\indexdummyfont \let\c=\indexdummyfont \let\d=\indexdummyfont \let\u=\indexdummyfont \let\v=\indexdummyfont \let\H=\indexdummyfont \let\dotless=\indexdummyfont % Take care of the plain tex special European modified letters. \def\oe{oe}% \def\ae{ae}% \def\aa{aa}% \def\OE{OE}% \def\AE{AE}% \def\AA{AA}% \def\o{o}% \def\O{O}% \def\l{l}% \def\L{L}% \def\ss{ss}% \let\w=\indexdummyfont \let\t=\indexdummyfont \let\r=\indexdummyfont \let\i=\indexdummyfont \let\b=\indexdummyfont \let\emph=\indexdummyfont \let\strong=\indexdummyfont \let\cite=\indexdummyfont \let\sc=\indexdummyfont %Don't no-op \tt, since it isn't a user-level command % and is used in the definitions of the active chars like <, >, |... %\let\tt=\indexdummyfont \let\tclose=\indexdummyfont \let\code=\indexdummyfont \let\url=\indexdummyfont \let\uref=\indexdummyfont \let\env=\indexdummyfont \let\acronym=\indexdummyfont \let\command=\indexdummyfont \let\option=\indexdummyfont \let\file=\indexdummyfont \let\samp=\indexdummyfont \let\kbd=\indexdummyfont \let\key=\indexdummyfont \let\var=\indexdummyfont \let\TeX=\indexdummytex \let\dots=\indexdummydots \def\@{@}% } % To define \realbackslash, we must make \ not be an escape. % We must first make another character (@) an escape % so we do not become unable to do a definition. {\catcode`\@=0 \catcode`\\=\other @gdef@realbackslash{\}} \let\indexbackslash=0 %overridden during \printindex. \let\SETmarginindex=\relax % put index entries in margin (undocumented)? % For \ifx comparisons. \def\emptymacro{\empty} % Most index entries go through here, but \dosubind is the general case. % \def\doind#1#2{\dosubind{#1}{#2}\empty} % Workhorse for all \fooindexes. % #1 is name of index, #2 is stuff to put there, #3 is subentry -- % \empty if called from \doind, as we usually are. The main exception % is with defuns, which call us directly. % \def\dosubind#1#2#3{% % Put the index entry in the margin if desired. \ifx\SETmarginindex\relax\else \insert\margin{\hbox{\vrule height8pt depth3pt width0pt #2}}% \fi {% \count255=\lastpenalty {% \indexdummies % Must do this here, since \bf, etc expand at this stage \escapechar=`\\ {% \let\folio = 0% We will expand all macros now EXCEPT \folio. \def\rawbackslashxx{\indexbackslash}% \indexbackslash isn't defined now % so it will be output as is; and it will print as backslash. % \def\thirdarg{#3}% % % If third arg is present, precede it with space in sort key. \ifx\thirdarg\emptymacro \let\subentry = \empty \else \def\subentry{ #3}% \fi % % First process the index entry with all font commands turned % off to get the string to sort by. {\indexnofonts \xdef\indexsorttmp{#2\subentry}}% % % Now the real index entry with the fonts. \toks0 = {#2}% % % If third (subentry) arg is present, add it to the index % string. And include a space. \ifx\thirdarg\emptymacro \else \toks0 = \expandafter{\the\toks0 \space #3}% \fi % % Set up the complete index entry, with both the sort key % and the original text, including any font commands. We write % three arguments to \entry to the .?? file, texindex reduces to % two when writing the .??s sorted result. \edef\temp{% \write\csname#1indfile\endcsname{% \realbackslash entry{\indexsorttmp}{\folio}{\the\toks0}}% }% % % If a skip is the last thing on the list now, preserve it % by backing up by \lastskip, doing the \write, then inserting % the skip again. Otherwise, the whatsit generated by the % \write will make \lastskip zero. The result is that sequences % like this: % @end defun % @tindex whatever % @defun ... % will have extra space inserted, because the \medbreak in the % start of the @defun won't see the skip inserted by the @end of % the previous defun. % % But don't do any of this if we're not in vertical mode. We % don't want to do a \vskip and prematurely end a paragraph. % % Avoid page breaks due to these extra skips, too. % \iflinks \ifvmode \skip0 = \lastskip \ifdim\lastskip = 0pt \else \nobreak\vskip-\lastskip \fi \fi % \temp % do the write % % \ifvmode \ifdim\skip0 = 0pt \else \nobreak\vskip\skip0 \fi \fi \fi }% }% \penalty\count255 }% } % The index entry written in the file actually looks like % \entry {sortstring}{page}{topic} % or % \entry {sortstring}{page}{topic}{subtopic} % The texindex program reads in these files and writes files % containing these kinds of lines: % \initial {c} % before the first topic whose initial is c % \entry {topic}{pagelist} % for a topic that is used without subtopics % \primary {topic} % for the beginning of a topic that is used with subtopics % \secondary {subtopic}{pagelist} % for each subtopic. % Define the user-accessible indexing commands % @findex, @vindex, @kindex, @cindex. \def\findex {\fnindex} \def\kindex {\kyindex} \def\cindex {\cpindex} \def\vindex {\vrindex} \def\tindex {\tpindex} \def\pindex {\pgindex} \def\cindexsub {\begingroup\obeylines\cindexsub} {\obeylines % \gdef\cindexsub "#1" #2^^M{\endgroup % \dosubind{cp}{#2}{#1}}} % Define the macros used in formatting output of the sorted index material. % @printindex causes a particular index (the ??s file) to get printed. % It does not print any chapter heading (usually an @unnumbered). % \def\printindex{\parsearg\doprintindex} \def\doprintindex#1{\begingroup \dobreak \chapheadingskip{10000}% % \smallfonts \rm \tolerance = 9500 \indexbreaks % % See if the index file exists and is nonempty. % Change catcode of @ here so that if the index file contains % \initial {@} % as its first line, TeX doesn't complain about mismatched braces % (because it thinks @} is a control sequence). \catcode`\@ = 11 \openin 1 \jobname.#1s \ifeof 1 % \enddoublecolumns gets confused if there is no text in the index, % and it loses the chapter title and the aux file entries for the % index. The easiest way to prevent this problem is to make sure % there is some text. \putwordIndexNonexistent \else % % If the index file exists but is empty, then \openin leaves \ifeof % false. We have to make TeX try to read something from the file, so % it can discover if there is anything in it. \read 1 to \temp \ifeof 1 \putwordIndexIsEmpty \else % Index files are almost Texinfo source, but we use \ as the escape % character. It would be better to use @, but that's too big a change % to make right now. \def\indexbackslash{\rawbackslashxx}% \catcode`\\ = 0 \escapechar = `\\ \begindoublecolumns \input \jobname.#1s \enddoublecolumns \fi \fi \closein 1 \endgroup} % These macros are used by the sorted index file itself. % Change them to control the appearance of the index. \def\initial#1{{% % Some minor font changes for the special characters. \let\tentt=\sectt \let\tt=\sectt \let\sf=\sectt % % Remove any glue we may have, we'll be inserting our own. \removelastskip % % We like breaks before the index initials, so insert a bonus. \penalty -300 % % Typeset the initial. Making this add up to a whole number of % baselineskips increases the chance of the dots lining up from column % to column. It still won't often be perfect, because of the stretch % we need before each entry, but it's better. % % No shrink because it confuses \balancecolumns. \vskip 1.67\baselineskip plus .5\baselineskip \leftline{\secbf #1}% \vskip .33\baselineskip plus .1\baselineskip % % Do our best not to break after the initial. \nobreak }} % This typesets a paragraph consisting of #1, dot leaders, and then #2 % flush to the right margin. It is used for index and table of contents % entries. The paragraph is indented by \leftskip. % \def\entry#1#2{\begingroup % % Start a new paragraph if necessary, so our assignments below can't % affect previous text. \par % % Do not fill out the last line with white space. \parfillskip = 0in % % No extra space above this paragraph. \parskip = 0in % % Do not prefer a separate line ending with a hyphen to fewer lines. \finalhyphendemerits = 0 % % \hangindent is only relevant when the entry text and page number % don't both fit on one line. In that case, bob suggests starting the % dots pretty far over on the line. Unfortunately, a large % indentation looks wrong when the entry text itself is broken across % lines. So we use a small indentation and put up with long leaders. % % \hangafter is reset to 1 (which is the value we want) at the start % of each paragraph, so we need not do anything with that. \hangindent = 2em % % When the entry text needs to be broken, just fill out the first line % with blank space. \rightskip = 0pt plus1fil % % A bit of stretch before each entry for the benefit of balancing columns. \vskip 0pt plus1pt % % Start a ``paragraph'' for the index entry so the line breaking % parameters we've set above will have an effect. \noindent % % Insert the text of the index entry. TeX will do line-breaking on it. #1% % The following is kludged to not output a line of dots in the index if % there are no page numbers. The next person who breaks this will be % cursed by a Unix daemon. \def\tempa{{\rm }}% \def\tempb{#2}% \edef\tempc{\tempa}% \edef\tempd{\tempb}% \ifx\tempc\tempd\ \else% % % If we must, put the page number on a line of its own, and fill out % this line with blank space. (The \hfil is overwhelmed with the % fill leaders glue in \indexdotfill if the page number does fit.) \hfil\penalty50 \null\nobreak\indexdotfill % Have leaders before the page number. % % The `\ ' here is removed by the implicit \unskip that TeX does as % part of (the primitive) \par. Without it, a spurious underfull % \hbox ensues. \ifpdf \pdfgettoks#2.\ \the\toksA % The page number ends the paragraph. \else \ #2% The page number ends the paragraph. \fi \fi% \par \endgroup} % Like \dotfill except takes at least 1 em. \def\indexdotfill{\cleaders \hbox{$\mathsurround=0pt \mkern1.5mu ${\it .}$ \mkern1.5mu$}\hskip 1em plus 1fill} \def\primary #1{\line{#1\hfil}} \newskip\secondaryindent \secondaryindent=0.5cm \def\secondary #1#2{ {\parfillskip=0in \parskip=0in \hangindent =1in \hangafter=1 \noindent\hskip\secondaryindent\hbox{#1}\indexdotfill #2\par }} % Define two-column mode, which we use to typeset indexes. % Adapted from the TeXbook, page 416, which is to say, % the manmac.tex format used to print the TeXbook itself. \catcode`\@=11 \newbox\partialpage \newdimen\doublecolumnhsize \def\begindoublecolumns{\begingroup % ended by \enddoublecolumns % Grab any single-column material above us. \output = {% % % Here is a possibility not foreseen in manmac: if we accumulate a % whole lot of material, we might end up calling this \output % routine twice in a row (see the doublecol-lose test, which is % essentially a couple of indexes with @setchapternewpage off). In % that case we just ship out what is in \partialpage with the normal % output routine. Generally, \partialpage will be empty when this % runs and this will be a no-op. See the indexspread.tex test case. \ifvoid\partialpage \else \onepageout{\pagecontents\partialpage}% \fi % \global\setbox\partialpage = \vbox{% % Unvbox the main output page. \unvbox\PAGE \kern-\topskip \kern\baselineskip }% }% \eject % run that output routine to set \partialpage % % Use the double-column output routine for subsequent pages. \output = {\doublecolumnout}% % % Change the page size parameters. We could do this once outside this % routine, in each of @smallbook, @afourpaper, and the default 8.5x11 % format, but then we repeat the same computation. Repeating a couple % of assignments once per index is clearly meaningless for the % execution time, so we may as well do it in one place. % % First we halve the line length, less a little for the gutter between % the columns. We compute the gutter based on the line length, so it % changes automatically with the paper format. The magic constant % below is chosen so that the gutter has the same value (well, +-<1pt) % as it did when we hard-coded it. % % We put the result in a separate register, \doublecolumhsize, so we % can restore it in \pagesofar, after \hsize itself has (potentially) % been clobbered. % \doublecolumnhsize = \hsize \advance\doublecolumnhsize by -.04154\hsize \divide\doublecolumnhsize by 2 \hsize = \doublecolumnhsize % % Double the \vsize as well. (We don't need a separate register here, % since nobody clobbers \vsize.) \advance\vsize by -\ht\partialpage \vsize = 2\vsize } % The double-column output routine for all double-column pages except % the last. % \def\doublecolumnout{% \splittopskip=\topskip \splitmaxdepth=\maxdepth % Get the available space for the double columns -- the normal % (undoubled) page height minus any material left over from the % previous page. \dimen@ = \vsize \divide\dimen@ by 2 % % box0 will be the left-hand column, box2 the right. \setbox0=\vsplit255 to\dimen@ \setbox2=\vsplit255 to\dimen@ \onepageout\pagesofar \unvbox255 \penalty\outputpenalty } \def\pagesofar{% % Re-output the contents of the output page -- any previous material, % followed by the two boxes we just split, in box0 and box2. \unvbox\partialpage % \hsize = \doublecolumnhsize \wd0=\hsize \wd2=\hsize \hbox to\pagewidth{\box0\hfil\box2}% } \def\enddoublecolumns{% \output = {% % Split the last of the double-column material. Leave it on the % current page, no automatic page break. \balancecolumns % % If we end up splitting too much material for the current page, % though, there will be another page break right after this \output % invocation ends. Having called \balancecolumns once, we do not % want to call it again. Therefore, reset \output to its normal % definition right away. (We hope \balancecolumns will never be % called on to balance too much material, but if it is, this makes % the output somewhat more palatable.) \global\output = {\onepageout{\pagecontents\PAGE}}% }% \eject \endgroup % started in \begindoublecolumns % % \pagegoal was set to the doubled \vsize above, since we restarted % the current page. We're now back to normal single-column % typesetting, so reset \pagegoal to the normal \vsize (after the % \endgroup where \vsize got restored). \pagegoal = \vsize } \def\balancecolumns{% % Called at the end of the double column material. \setbox0 = \vbox{\unvbox255}% like \box255 but more efficient, see p.120. \dimen@ = \ht0 \advance\dimen@ by \topskip \advance\dimen@ by-\baselineskip \divide\dimen@ by 2 % target to split to %debug\message{final 2-column material height=\the\ht0, target=\the\dimen@.}% \splittopskip = \topskip % Loop until we get a decent breakpoint. {% \vbadness = 10000 \loop \global\setbox3 = \copy0 \global\setbox1 = \vsplit3 to \dimen@ \ifdim\ht3>\dimen@ \global\advance\dimen@ by 1pt \repeat }% %debug\message{split to \the\dimen@, column heights: \the\ht1, \the\ht3.}% \setbox0=\vbox to\dimen@{\unvbox1}% \setbox2=\vbox to\dimen@{\unvbox3}% % \pagesofar } \catcode`\@ = \other \message{sectioning,} % Chapters, sections, etc. \newcount\chapno \newcount\secno \secno=0 \newcount\subsecno \subsecno=0 \newcount\subsubsecno \subsubsecno=0 % This counter is funny since it counts through charcodes of letters A, B, ... \newcount\appendixno \appendixno = `\@ % \def\appendixletter{\char\the\appendixno} % We do the following for the sake of pdftex, which needs the actual % letter in the expansion, not just typeset. \def\appendixletter{% \ifnum\appendixno=`A A% \else\ifnum\appendixno=`B B% \else\ifnum\appendixno=`C C% \else\ifnum\appendixno=`D D% \else\ifnum\appendixno=`E E% \else\ifnum\appendixno=`F F% \else\ifnum\appendixno=`G G% \else\ifnum\appendixno=`H H% \else\ifnum\appendixno=`I I% \else\ifnum\appendixno=`J J% \else\ifnum\appendixno=`K K% \else\ifnum\appendixno=`L L% \else\ifnum\appendixno=`M M% \else\ifnum\appendixno=`N N% \else\ifnum\appendixno=`O O% \else\ifnum\appendixno=`P P% \else\ifnum\appendixno=`Q Q% \else\ifnum\appendixno=`R R% \else\ifnum\appendixno=`S S% \else\ifnum\appendixno=`T T% \else\ifnum\appendixno=`U U% \else\ifnum\appendixno=`V V% \else\ifnum\appendixno=`W W% \else\ifnum\appendixno=`X X% \else\ifnum\appendixno=`Y Y% \else\ifnum\appendixno=`Z Z% % The \the is necessary, despite appearances, because \appendixletter is % expanded while writing the .toc file. \char\appendixno is not % expandable, thus it is written literally, thus all appendixes come out % with the same letter (or @) in the toc without it. \else\char\the\appendixno \fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi \fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi} % Each @chapter defines this as the name of the chapter. % page headings and footings can use it. @section does likewise. \def\thischapter{} \def\thissection{} \newcount\absseclevel % used to calculate proper heading level \newcount\secbase\secbase=0 % @raise/lowersections modify this count % @raisesections: treat @section as chapter, @subsection as section, etc. \def\raisesections{\global\advance\secbase by -1} \let\up=\raisesections % original BFox name % @lowersections: treat @chapter as section, @section as subsection, etc. \def\lowersections{\global\advance\secbase by 1} \let\down=\lowersections % original BFox name % Choose a numbered-heading macro % #1 is heading level if unmodified by @raisesections or @lowersections % #2 is text for heading \def\numhead#1#2{\absseclevel=\secbase\advance\absseclevel by #1 \ifcase\absseclevel \chapterzzz{#2} \or \seczzz{#2} \or \numberedsubseczzz{#2} \or \numberedsubsubseczzz{#2} \else \ifnum \absseclevel<0 \chapterzzz{#2} \else \numberedsubsubseczzz{#2} \fi \fi } % like \numhead, but chooses appendix heading levels \def\apphead#1#2{\absseclevel=\secbase\advance\absseclevel by #1 \ifcase\absseclevel \appendixzzz{#2} \or \appendixsectionzzz{#2} \or \appendixsubseczzz{#2} \or \appendixsubsubseczzz{#2} \else \ifnum \absseclevel<0 \appendixzzz{#2} \else \appendixsubsubseczzz{#2} \fi \fi } % like \numhead, but chooses numberless heading levels \def\unnmhead#1#2{\absseclevel=\secbase\advance\absseclevel by #1 \ifcase\absseclevel \unnumberedzzz{#2} \or \unnumberedseczzz{#2} \or \unnumberedsubseczzz{#2} \or \unnumberedsubsubseczzz{#2} \else \ifnum \absseclevel<0 \unnumberedzzz{#2} \else \unnumberedsubsubseczzz{#2} \fi \fi } % @chapter, @appendix, @unnumbered. \def\thischaptername{No Chapter Title} \outer\def\chapter{\parsearg\chapteryyy} \def\chapteryyy #1{\numhead0{#1}} % normally numhead0 calls chapterzzz \def\chapterzzz #1{% \secno=0 \subsecno=0 \subsubsecno=0 \global\advance \chapno by 1 \message{\putwordChapter\space \the\chapno}% \chapmacro {#1}{\the\chapno}% \gdef\thissection{#1}% \gdef\thischaptername{#1}% % We don't substitute the actual chapter name into \thischapter % because we don't want its macros evaluated now. \xdef\thischapter{\putwordChapter{} \the\chapno: \noexpand\thischaptername}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash chapentry{\the\toks0}% {\the\chapno}}}% \temp \donoderef \global\let\section = \numberedsec \global\let\subsection = \numberedsubsec \global\let\subsubsection = \numberedsubsubsec } \outer\def\appendix{\parsearg\appendixyyy} \def\appendixyyy #1{\apphead0{#1}} % normally apphead0 calls appendixzzz \def\appendixzzz #1{% \secno=0 \subsecno=0 \subsubsecno=0 \global\advance \appendixno by 1 \message{\putwordAppendix\space \appendixletter}% \chapmacro {#1}{\putwordAppendix{} \appendixletter}% \gdef\thissection{#1}% \gdef\thischaptername{#1}% \xdef\thischapter{\putwordAppendix{} \appendixletter: \noexpand\thischaptername}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash chapentry{\the\toks0}% {\putwordAppendix{} \appendixletter}}}% \temp \appendixnoderef \global\let\section = \appendixsec \global\let\subsection = \appendixsubsec \global\let\subsubsection = \appendixsubsubsec } % @centerchap is like @unnumbered, but the heading is centered. \outer\def\centerchap{\parsearg\centerchapyyy} \def\centerchapyyy #1{{\let\unnumbchapmacro=\centerchapmacro \unnumberedyyy{#1}}} % @top is like @unnumbered. \outer\def\top{\parsearg\unnumberedyyy} \outer\def\unnumbered{\parsearg\unnumberedyyy} \def\unnumberedyyy #1{\unnmhead0{#1}} % normally unnmhead0 calls unnumberedzzz \def\unnumberedzzz #1{% \secno=0 \subsecno=0 \subsubsecno=0 % % This used to be simply \message{#1}, but TeX fully expands the % argument to \message. Therefore, if #1 contained @-commands, TeX % expanded them. For example, in `@unnumbered The @cite{Book}', TeX % expanded @cite (which turns out to cause errors because \cite is meant % to be executed, not expanded). % % Anyway, we don't want the fully-expanded definition of @cite to appear % as a result of the \message, we just want `@cite' itself. We use % \the to achieve this: TeX expands \the only once, % simply yielding the contents of . (We also do this for % the toc entries.) \toks0 = {#1}\message{(\the\toks0)}% % \unnumbchapmacro {#1}% \gdef\thischapter{#1}\gdef\thissection{#1}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash unnumbchapentry{\the\toks0}}}% \temp \unnumbnoderef \global\let\section = \unnumberedsec \global\let\subsection = \unnumberedsubsec \global\let\subsubsection = \unnumberedsubsubsec } % Sections. \outer\def\numberedsec{\parsearg\secyyy} \def\secyyy #1{\numhead1{#1}} % normally calls seczzz \def\seczzz #1{% \subsecno=0 \subsubsecno=0 \global\advance \secno by 1 % \gdef\thissection{#1}\secheading {#1}{\the\chapno}{\the\secno}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash secentry{\the\toks0}% {\the\chapno}{\the\secno}}}% \temp \donoderef \nobreak } \outer\def\appendixsection{\parsearg\appendixsecyyy} \outer\def\appendixsec{\parsearg\appendixsecyyy} \def\appendixsecyyy #1{\apphead1{#1}} % normally calls appendixsectionzzz \def\appendixsectionzzz #1{% \subsecno=0 \subsubsecno=0 \global\advance \secno by 1 % \gdef\thissection{#1}\secheading {#1}{\appendixletter}{\the\secno}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash secentry{\the\toks0}% {\appendixletter}{\the\secno}}}% \temp \appendixnoderef \nobreak } \outer\def\unnumberedsec{\parsearg\unnumberedsecyyy} \def\unnumberedsecyyy #1{\unnmhead1{#1}} % normally calls unnumberedseczzz \def\unnumberedseczzz #1{% \plainsecheading {#1}\gdef\thissection{#1}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash unnumbsecentry{\the\toks0}}}% \temp \unnumbnoderef \nobreak } % Subsections. \outer\def\numberedsubsec{\parsearg\numberedsubsecyyy} \def\numberedsubsecyyy #1{\numhead2{#1}} % normally calls numberedsubseczzz \def\numberedsubseczzz #1{% \gdef\thissection{#1}\subsubsecno=0 \global\advance \subsecno by 1 % \subsecheading {#1}{\the\chapno}{\the\secno}{\the\subsecno}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash subsecentry{\the\toks0}% {\the\chapno}{\the\secno}{\the\subsecno}}}% \temp \donoderef \nobreak } \outer\def\appendixsubsec{\parsearg\appendixsubsecyyy} \def\appendixsubsecyyy #1{\apphead2{#1}} % normally calls appendixsubseczzz \def\appendixsubseczzz #1{% \gdef\thissection{#1}\subsubsecno=0 \global\advance \subsecno by 1 % \subsecheading {#1}{\appendixletter}{\the\secno}{\the\subsecno}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash subsecentry{\the\toks0}% {\appendixletter}{\the\secno}{\the\subsecno}}}% \temp \appendixnoderef \nobreak } \outer\def\unnumberedsubsec{\parsearg\unnumberedsubsecyyy} \def\unnumberedsubsecyyy #1{\unnmhead2{#1}} %normally calls unnumberedsubseczzz \def\unnumberedsubseczzz #1{% \plainsubsecheading {#1}\gdef\thissection{#1}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash unnumbsubsecentry% {\the\toks0}}}% \temp \unnumbnoderef \nobreak } % Subsubsections. \outer\def\numberedsubsubsec{\parsearg\numberedsubsubsecyyy} \def\numberedsubsubsecyyy #1{\numhead3{#1}} % normally numberedsubsubseczzz \def\numberedsubsubseczzz #1{% \gdef\thissection{#1}\global\advance \subsubsecno by 1 % \subsubsecheading {#1} {\the\chapno}{\the\secno}{\the\subsecno}{\the\subsubsecno}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash subsubsecentry{\the\toks0}% {\the\chapno}{\the\secno}{\the\subsecno}{\the\subsubsecno}}}% \temp \donoderef \nobreak } \outer\def\appendixsubsubsec{\parsearg\appendixsubsubsecyyy} \def\appendixsubsubsecyyy #1{\apphead3{#1}} % normally appendixsubsubseczzz \def\appendixsubsubseczzz #1{% \gdef\thissection{#1}\global\advance \subsubsecno by 1 % \subsubsecheading {#1} {\appendixletter}{\the\secno}{\the\subsecno}{\the\subsubsecno}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash subsubsecentry{\the\toks0}% {\appendixletter}{\the\secno}{\the\subsecno}{\the\subsubsecno}}}% \temp \appendixnoderef \nobreak } \outer\def\unnumberedsubsubsec{\parsearg\unnumberedsubsubsecyyy} \def\unnumberedsubsubsecyyy #1{\unnmhead3{#1}} %normally unnumberedsubsubseczzz \def\unnumberedsubsubseczzz #1{% \plainsubsubsecheading {#1}\gdef\thissection{#1}% \toks0 = {#1}% \edef\temp{\noexpand\writetocentry{\realbackslash unnumbsubsubsecentry% {\the\toks0}}}% \temp \unnumbnoderef \nobreak } % These are variants which are not "outer", so they can appear in @ifinfo. % Actually, they should now be obsolete; ordinary section commands should work. \def\infotop{\parsearg\unnumberedzzz} \def\infounnumbered{\parsearg\unnumberedzzz} \def\infounnumberedsec{\parsearg\unnumberedseczzz} \def\infounnumberedsubsec{\parsearg\unnumberedsubseczzz} \def\infounnumberedsubsubsec{\parsearg\unnumberedsubsubseczzz} \def\infoappendix{\parsearg\appendixzzz} \def\infoappendixsec{\parsearg\appendixseczzz} \def\infoappendixsubsec{\parsearg\appendixsubseczzz} \def\infoappendixsubsubsec{\parsearg\appendixsubsubseczzz} \def\infochapter{\parsearg\chapterzzz} \def\infosection{\parsearg\sectionzzz} \def\infosubsection{\parsearg\subsectionzzz} \def\infosubsubsection{\parsearg\subsubsectionzzz} % These macros control what the section commands do, according % to what kind of chapter we are in (ordinary, appendix, or unnumbered). % Define them by default for a numbered chapter. \global\let\section = \numberedsec \global\let\subsection = \numberedsubsec \global\let\subsubsection = \numberedsubsubsec % Define @majorheading, @heading and @subheading % NOTE on use of \vbox for chapter headings, section headings, and such: % 1) We use \vbox rather than the earlier \line to permit % overlong headings to fold. % 2) \hyphenpenalty is set to 10000 because hyphenation in a % heading is obnoxious; this forbids it. % 3) Likewise, headings look best if no \parindent is used, and % if justification is not attempted. Hence \raggedright. \def\majorheading{\parsearg\majorheadingzzz} \def\majorheadingzzz #1{% {\advance\chapheadingskip by 10pt \chapbreak }% {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 \parindent=0pt\raggedright \rm #1\hfill}}\bigskip \par\penalty 200} \def\chapheading{\parsearg\chapheadingzzz} \def\chapheadingzzz #1{\chapbreak % {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 \parindent=0pt\raggedright \rm #1\hfill}}\bigskip \par\penalty 200} % @heading, @subheading, @subsubheading. \def\heading{\parsearg\plainsecheading} \def\subheading{\parsearg\plainsubsecheading} \def\subsubheading{\parsearg\plainsubsubsecheading} % These macros generate a chapter, section, etc. heading only % (including whitespace, linebreaking, etc. around it), % given all the information in convenient, parsed form. %%% Args are the skip and penalty (usually negative) \def\dobreak#1#2{\par\ifdim\lastskip<#1\removelastskip\penalty#2\vskip#1\fi} \def\setchapterstyle #1 {\csname CHAPF#1\endcsname} %%% Define plain chapter starts, and page on/off switching for it % Parameter controlling skip before chapter headings (if needed) \newskip\chapheadingskip \def\chapbreak{\dobreak \chapheadingskip {-4000}} \def\chappager{\par\vfill\supereject} \def\chapoddpage{\chappager \ifodd\pageno \else \hbox to 0pt{} \chappager\fi} \def\setchapternewpage #1 {\csname CHAPPAG#1\endcsname} \def\CHAPPAGoff{% \global\let\contentsalignmacro = \chappager \global\let\pchapsepmacro=\chapbreak \global\let\pagealignmacro=\chappager} \def\CHAPPAGon{% \global\let\contentsalignmacro = \chappager \global\let\pchapsepmacro=\chappager \global\let\pagealignmacro=\chappager \global\def\HEADINGSon{\HEADINGSsingle}} \def\CHAPPAGodd{ \global\let\contentsalignmacro = \chapoddpage \global\let\pchapsepmacro=\chapoddpage \global\let\pagealignmacro=\chapoddpage \global\def\HEADINGSon{\HEADINGSdouble}} \CHAPPAGon \def\CHAPFplain{ \global\let\chapmacro=\chfplain \global\let\unnumbchapmacro=\unnchfplain \global\let\centerchapmacro=\centerchfplain} % Plain chapter opening. % #1 is the text, #2 the chapter number or empty if unnumbered. \def\chfplain#1#2{% \pchapsepmacro {% \chapfonts \rm \def\chapnum{#2}% \setbox0 = \hbox{#2\ifx\chapnum\empty\else\enspace\fi}% \vbox{\hyphenpenalty=10000 \tolerance=5000 \parindent=0pt \raggedright \hangindent = \wd0 \centerparametersmaybe \unhbox0 #1\par}% }% \nobreak\bigskip % no page break after a chapter title \nobreak } % Plain opening for unnumbered. \def\unnchfplain#1{\chfplain{#1}{}} % @centerchap -- centered and unnumbered. \let\centerparametersmaybe = \relax \def\centerchfplain#1{{% \def\centerparametersmaybe{% \advance\rightskip by 3\rightskip \leftskip = \rightskip \parfillskip = 0pt }% \chfplain{#1}{}% }} \CHAPFplain % The default \def\unnchfopen #1{% \chapoddpage {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 \parindent=0pt\raggedright \rm #1\hfill}}\bigskip \par\nobreak } \def\chfopen #1#2{\chapoddpage {\chapfonts \vbox to 3in{\vfil \hbox to\hsize{\hfil #2} \hbox to\hsize{\hfil #1} \vfil}}% \par\penalty 5000 % } \def\centerchfopen #1{% \chapoddpage {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 \parindent=0pt \hfill {\rm #1}\hfill}}\bigskip \par\nobreak } \def\CHAPFopen{ \global\let\chapmacro=\chfopen \global\let\unnumbchapmacro=\unnchfopen \global\let\centerchapmacro=\centerchfopen} % Section titles. \newskip\secheadingskip \def\secheadingbreak{\dobreak \secheadingskip {-1000}} \def\secheading#1#2#3{\sectionheading{sec}{#2.#3}{#1}} \def\plainsecheading#1{\sectionheading{sec}{}{#1}} % Subsection titles. \newskip \subsecheadingskip \def\subsecheadingbreak{\dobreak \subsecheadingskip {-500}} \def\subsecheading#1#2#3#4{\sectionheading{subsec}{#2.#3.#4}{#1}} \def\plainsubsecheading#1{\sectionheading{subsec}{}{#1}} % Subsubsection titles. \let\subsubsecheadingskip = \subsecheadingskip \let\subsubsecheadingbreak = \subsecheadingbreak \def\subsubsecheading#1#2#3#4#5{\sectionheading{subsubsec}{#2.#3.#4.#5}{#1}} \def\plainsubsubsecheading#1{\sectionheading{subsubsec}{}{#1}} % Print any size section title. % % #1 is the section type (sec/subsec/subsubsec), #2 is the section % number (maybe empty), #3 the text. \def\sectionheading#1#2#3{% {% \expandafter\advance\csname #1headingskip\endcsname by \parskip \csname #1headingbreak\endcsname }% {% % Switch to the right set of fonts. \csname #1fonts\endcsname \rm % % Only insert the separating space if we have a section number. \def\secnum{#2}% \setbox0 = \hbox{#2\ifx\secnum\empty\else\enspace\fi}% % \vbox{\hyphenpenalty=10000 \tolerance=5000 \parindent=0pt \raggedright \hangindent = \wd0 % zero if no section number \unhbox0 #3}% }% \ifdim\parskip<10pt \nobreak\kern10pt\nobreak\kern-\parskip\fi \nobreak } \message{toc,} % Table of contents. \newwrite\tocfile % Write an entry to the toc file, opening it if necessary. % Called from @chapter, etc. We supply {\folio} at the end of the % argument, which will end up as the last argument to the \...entry macro. % % We open the .toc file here instead of at @setfilename or any other % given time so that @contents can be put in the document anywhere. % \newif\iftocfileopened \def\writetocentry#1{% \iftocfileopened\else \immediate\openout\tocfile = \jobname.toc \global\tocfileopenedtrue \fi \iflinks \write\tocfile{#1{\folio}}\fi } \newskip\contentsrightmargin \contentsrightmargin=1in \newcount\savepageno \newcount\lastnegativepageno \lastnegativepageno = -1 % Finish up the main text and prepare to read what we've written % to \tocfile. % \def\startcontents#1{% % If @setchapternewpage on, and @headings double, the contents should % start on an odd page, unlike chapters. Thus, we maintain % \contentsalignmacro in parallel with \pagealignmacro. % From: Torbjorn Granlund \contentsalignmacro \immediate\closeout\tocfile % % Don't need to put `Contents' or `Short Contents' in the headline. % It is abundantly clear what they are. \unnumbchapmacro{#1}\def\thischapter{}% \savepageno = \pageno \begingroup % Set up to handle contents files properly. \catcode`\\=0 \catcode`\{=1 \catcode`\}=2 \catcode`\@=11 % We can't do this, because then an actual ^ in a section % title fails, e.g., @chapter ^ -- exponentiation. --karl, 9jul97. %\catcode`\^=7 % to see ^^e4 as \"a etc. juha@piuha.ydi.vtt.fi \raggedbottom % Worry more about breakpoints than the bottom. \advance\hsize by -\contentsrightmargin % Don't use the full line length. % % Roman numerals for page numbers. \ifnum \pageno>0 \pageno = \lastnegativepageno \fi } % Normal (long) toc. \def\contents{% \startcontents{\putwordTOC}% \openin 1 \jobname.toc \ifeof 1 \else \closein 1 \input \jobname.toc \fi \vfill \eject \contentsalignmacro % in case @setchapternewpage odd is in effect \pdfmakeoutlines \endgroup \lastnegativepageno = \pageno \pageno = \savepageno } % And just the chapters. \def\summarycontents{% \startcontents{\putwordShortTOC}% % \let\chapentry = \shortchapentry \let\unnumbchapentry = \shortunnumberedentry % We want a true roman here for the page numbers. \secfonts \let\rm=\shortcontrm \let\bf=\shortcontbf \let\sl=\shortcontsl \rm \hyphenpenalty = 10000 \advance\baselineskip by 1pt % Open it up a little. \def\secentry ##1##2##3##4{} \def\unnumbsecentry ##1##2{} \def\subsecentry ##1##2##3##4##5{} \def\unnumbsubsecentry ##1##2{} \def\subsubsecentry ##1##2##3##4##5##6{} \def\unnumbsubsubsecentry ##1##2{} \openin 1 \jobname.toc \ifeof 1 \else \closein 1 \input \jobname.toc \fi \vfill \eject \contentsalignmacro % in case @setchapternewpage odd is in effect \endgroup \lastnegativepageno = \pageno \pageno = \savepageno } \let\shortcontents = \summarycontents \ifpdf \pdfcatalog{/PageMode /UseOutlines}% \fi % These macros generate individual entries in the table of contents. % The first argument is the chapter or section name. % The last argument is the page number. % The arguments in between are the chapter number, section number, ... % Chapter-level things, for both the long and short contents. \def\chapentry#1#2#3{\dochapentry{#2\labelspace#1}{#3}} % See comments in \dochapentry re vbox and related settings \def\shortchapentry#1#2#3{% \tocentry{\shortchaplabel{#2}\labelspace #1}{\doshortpageno\bgroup#3\egroup}% } % Typeset the label for a chapter or appendix for the short contents. % The arg is, e.g. `Appendix A' for an appendix, or `3' for a chapter. % We could simplify the code here by writing out an \appendixentry % command in the toc file for appendices, instead of using \chapentry % for both, but it doesn't seem worth it. % \newdimen\shortappendixwidth % \def\shortchaplabel#1{% % Compute width of word "Appendix", may change with language. \setbox0 = \hbox{\shortcontrm \putwordAppendix}% \shortappendixwidth = \wd0 % % We typeset #1 in a box of constant width, regardless of the text of % #1, so the chapter titles will come out aligned. \setbox0 = \hbox{#1}% \dimen0 = \ifdim\wd0 > \shortappendixwidth \shortappendixwidth \else 0pt \fi % % This space should be plenty, since a single number is .5em, and the % widest letter (M) is 1em, at least in the Computer Modern fonts. % (This space doesn't include the extra space that gets added after % the label; that gets put in by \shortchapentry above.) \advance\dimen0 by 1.1em \hbox to \dimen0{#1\hfil}% } \def\unnumbchapentry#1#2{\dochapentry{#1}{#2}} \def\shortunnumberedentry#1#2{\tocentry{#1}{\doshortpageno\bgroup#2\egroup}} % Sections. \def\secentry#1#2#3#4{\dosecentry{#2.#3\labelspace#1}{#4}} \def\unnumbsecentry#1#2{\dosecentry{#1}{#2}} % Subsections. \def\subsecentry#1#2#3#4#5{\dosubsecentry{#2.#3.#4\labelspace#1}{#5}} \def\unnumbsubsecentry#1#2{\dosubsecentry{#1}{#2}} % And subsubsections. \def\subsubsecentry#1#2#3#4#5#6{% \dosubsubsecentry{#2.#3.#4.#5\labelspace#1}{#6}} \def\unnumbsubsubsecentry#1#2{\dosubsubsecentry{#1}{#2}} % This parameter controls the indentation of the various levels. \newdimen\tocindent \tocindent = 3pc % Now for the actual typesetting. In all these, #1 is the text and #2 is the % page number. % % If the toc has to be broken over pages, we want it to be at chapters % if at all possible; hence the \penalty. \def\dochapentry#1#2{% \penalty-300 \vskip1\baselineskip plus.33\baselineskip minus.25\baselineskip \begingroup \chapentryfonts \tocentry{#1}{\dopageno\bgroup#2\egroup}% \endgroup \nobreak\vskip .25\baselineskip plus.1\baselineskip } \def\dosecentry#1#2{\begingroup \secentryfonts \leftskip=\tocindent \tocentry{#1}{\dopageno\bgroup#2\egroup}% \endgroup} \def\dosubsecentry#1#2{\begingroup \subsecentryfonts \leftskip=2\tocindent \tocentry{#1}{\dopageno\bgroup#2\egroup}% \endgroup} \def\dosubsubsecentry#1#2{\begingroup \subsubsecentryfonts \leftskip=3\tocindent \tocentry{#1}{\dopageno\bgroup#2\egroup}% \endgroup} % Final typesetting of a toc entry; we use the same \entry macro as for % the index entries, but we want to suppress hyphenation here. (We % can't do that in the \entry macro, since index entries might consist % of hyphenated-identifiers-that-do-not-fit-on-a-line-and-nothing-else.) \def\tocentry#1#2{\begingroup \vskip 0pt plus1pt % allow a little stretch for the sake of nice page breaks % Do not use \turnoffactive in these arguments. Since the toc is % typeset in cmr, so characters such as _ would come out wrong; we % have to do the usual translation tricks. \entry{#1}{#2}% \endgroup} % Space between chapter (or whatever) number and the title. \def\labelspace{\hskip1em \relax} \def\dopageno#1{{\rm #1}} \def\doshortpageno#1{{\rm #1}} \def\chapentryfonts{\secfonts \rm} \def\secentryfonts{\textfonts} \let\subsecentryfonts = \textfonts \let\subsubsecentryfonts = \textfonts \message{environments,} % @foo ... @end foo. % Since these characters are used in examples, it should be an even number of % \tt widths. Each \tt character is 1en, so two makes it 1em. % Furthermore, these definitions must come after we define our fonts. \newbox\dblarrowbox \newbox\longdblarrowbox \newbox\pushcharbox \newbox\bullbox \newbox\equivbox \newbox\errorbox %{\tentt %\global\setbox\dblarrowbox = \hbox to 1em{\hfil$\Rightarrow$\hfil} %\global\setbox\longdblarrowbox = \hbox to 1em{\hfil$\mapsto$\hfil} %\global\setbox\pushcharbox = \hbox to 1em{\hfil$\dashv$\hfil} %\global\setbox\equivbox = \hbox to 1em{\hfil$\ptexequiv$\hfil} % Adapted from the manmac format (p.420 of TeXbook) %\global\setbox\bullbox = \hbox to 1em{\kern.15em\vrule height .75ex width .85ex % depth .1ex\hfil} %} % @point{}, @result{}, @expansion{}, @print{}, @equiv{}. \def\point{$\star$} \def\result{\leavevmode\raise.15ex\hbox to 1em{\hfil$\Rightarrow$\hfil}} \def\expansion{\leavevmode\raise.1ex\hbox to 1em{\hfil$\mapsto$\hfil}} \def\print{\leavevmode\lower.1ex\hbox to 1em{\hfil$\dashv$\hfil}} \def\equiv{\leavevmode\lower.1ex\hbox to 1em{\hfil$\ptexequiv$\hfil}} % Adapted from the TeXbook's \boxit. {\tentt \global\dimen0 = 3em}% Width of the box. \dimen2 = .55pt % Thickness of rules % The text. (`r' is open on the right, `e' somewhat less so on the left.) \setbox0 = \hbox{\kern-.75pt \tensf error\kern-1.5pt} \global\setbox\errorbox=\hbox to \dimen0{\hfil \hsize = \dimen0 \advance\hsize by -5.8pt % Space to left+right. \advance\hsize by -2\dimen2 % Rules. \vbox{ \hrule height\dimen2 \hbox{\vrule width\dimen2 \kern3pt % Space to left of text. \vtop{\kern2.4pt \box0 \kern2.4pt}% Space above/below. \kern3pt\vrule width\dimen2}% Space to right. \hrule height\dimen2} \hfil} % The @error{} command. \def\error{\leavevmode\lower.7ex\copy\errorbox} % @tex ... @end tex escapes into raw Tex temporarily. % One exception: @ is still an escape character, so that @end tex works. % But \@ or @@ will get a plain tex @ character. \def\tex{\begingroup \catcode `\\=0 \catcode `\{=1 \catcode `\}=2 \catcode `\$=3 \catcode `\&=4 \catcode `\#=6 \catcode `\^=7 \catcode `\_=8 \catcode `\~=13 \let~=\tie \catcode `\%=14 \catcode 43=12 % plus \catcode`\"=12 \catcode`\==12 \catcode`\|=12 \catcode`\<=12 \catcode`\>=12 \escapechar=`\\ % \let\b=\ptexb \let\bullet=\ptexbullet \let\c=\ptexc \let\,=\ptexcomma \let\.=\ptexdot \let\dots=\ptexdots \let\equiv=\ptexequiv \let\!=\ptexexclam \let\i=\ptexi \let\{=\ptexlbrace \let\+=\tabalign \let\}=\ptexrbrace \let\*=\ptexstar \let\t=\ptext % \def\endldots{\mathinner{\ldots\ldots\ldots\ldots}}% \def\enddots{\relax\ifmmode\endldots\else$\mathsurround=0pt \endldots\,$\fi}% \def\@{@}% \let\Etex=\endgroup} % Define @lisp ... @endlisp. % @lisp does a \begingroup so it can rebind things, % including the definition of @endlisp (which normally is erroneous). % Amount to narrow the margins by for @lisp. \newskip\lispnarrowing \lispnarrowing=0.4in % This is the definition that ^^M gets inside @lisp, @example, and other % such environments. \null is better than a space, since it doesn't % have any width. \def\lisppar{\null\endgraf} % Make each space character in the input produce a normal interword % space in the output. Don't allow a line break at this space, as this % is used only in environments like @example, where each line of input % should produce a line of output anyway. % {\obeyspaces % \gdef\sepspaces{\obeyspaces\let =\tie}} % Define \obeyedspace to be our active space, whatever it is. This is % for use in \parsearg. {\sepspaces% \global\let\obeyedspace= } % This space is always present above and below environments. \newskip\envskipamount \envskipamount = 0pt % Make spacing and below environment symmetrical. We use \parskip here % to help in doing that, since in @example-like environments \parskip % is reset to zero; thus the \afterenvbreak inserts no space -- but the % start of the next paragraph will insert \parskip % \def\aboveenvbreak{{\advance\envskipamount by \parskip \endgraf \ifdim\lastskip<\envskipamount \removelastskip \penalty-50 \vskip\envskipamount \fi}} \let\afterenvbreak = \aboveenvbreak % \nonarrowing is a flag. If "set", @lisp etc don't narrow margins. \let\nonarrowing=\relax % @cartouche ... @end cartouche: draw rectangle w/rounded corners around % environment contents. \font\circle=lcircle10 \newdimen\circthick \newdimen\cartouter\newdimen\cartinner \newskip\normbskip\newskip\normpskip\newskip\normlskip \circthick=\fontdimen8\circle % \def\ctl{{\circle\char'013\hskip -6pt}}% 6pt from pl file: 1/2charwidth \def\ctr{{\hskip 6pt\circle\char'010}} \def\cbl{{\circle\char'012\hskip -6pt}} \def\cbr{{\hskip 6pt\circle\char'011}} \def\carttop{\hbox to \cartouter{\hskip\lskip \ctl\leaders\hrule height\circthick\hfil\ctr \hskip\rskip}} \def\cartbot{\hbox to \cartouter{\hskip\lskip \cbl\leaders\hrule height\circthick\hfil\cbr \hskip\rskip}} % \newskip\lskip\newskip\rskip \long\def\cartouche{% \begingroup \lskip=\leftskip \rskip=\rightskip \leftskip=0pt\rightskip=0pt %we want these *outside*. \cartinner=\hsize \advance\cartinner by-\lskip \advance\cartinner by-\rskip \cartouter=\hsize \advance\cartouter by 18.4pt % allow for 3pt kerns on either % side, and for 6pt waste from % each corner char, and rule thickness \normbskip=\baselineskip \normpskip=\parskip \normlskip=\lineskip % Flag to tell @lisp, etc., not to narrow margin. \let\nonarrowing=\comment \vbox\bgroup \baselineskip=0pt\parskip=0pt\lineskip=0pt \carttop \hbox\bgroup \hskip\lskip \vrule\kern3pt \vbox\bgroup \hsize=\cartinner \kern3pt \begingroup \baselineskip=\normbskip \lineskip=\normlskip \parskip=\normpskip \vskip -\parskip \def\Ecartouche{% \endgroup \kern3pt \egroup \kern3pt\vrule \hskip\rskip \egroup \cartbot \egroup \endgroup }} % This macro is called at the beginning of all the @example variants, % inside a group. \def\nonfillstart{% \aboveenvbreak \inENV % This group ends at the end of the body \hfuzz = 12pt % Don't be fussy \sepspaces % Make spaces be word-separators rather than space tokens. \singlespace \let\par = \lisppar % don't ignore blank lines \obeylines % each line of input is a line of output \parskip = 0pt \parindent = 0pt \emergencystretch = 0pt % don't try to avoid overfull boxes % @cartouche defines \nonarrowing to inhibit narrowing % at next level down. \ifx\nonarrowing\relax \advance \leftskip by \lispnarrowing \exdentamount=\lispnarrowing \let\exdent=\nofillexdent \let\nonarrowing=\relax \fi } % Define the \E... control sequence only if we are inside the particular % environment, so the error checking in \end will work. % % To end an @example-like environment, we first end the paragraph (via % \afterenvbreak's vertical glue), and then the group. That way we keep % the zero \parskip that the environments set -- \parskip glue will be % inserted at the beginning of the next paragraph in the document, after % the environment. % \def\nonfillfinish{\afterenvbreak\endgroup} % @lisp: indented, narrowed, typewriter font. \def\lisp{\begingroup \nonfillstart \let\Elisp = \nonfillfinish \tt \let\kbdfont = \kbdexamplefont % Allow @kbd to do something special. \gobble % eat return } % @example: Same as @lisp. \def\example{\begingroup \def\Eexample{\nonfillfinish\endgroup}\lisp} % @small... is usually equivalent to the non-small (@smallbook % redefines). We must call \example (or whatever) last in the % definition, since it reads the return following the @example (or % whatever) command. % % This actually allows (for example) @end display inside an % @smalldisplay. Too bad, but makeinfo will catch the error anyway. % \def\smalldisplay{\begingroup\def\Esmalldisplay{\nonfillfinish\endgroup}\display} \def\smallexample{\begingroup\def\Esmallexample{\nonfillfinish\endgroup}\lisp} \def\smallformat{\begingroup\def\Esmallformat{\nonfillfinish\endgroup}\format} \def\smalllisp{\begingroup\def\Esmalllisp{\nonfillfinish\endgroup}\lisp} % Real @smallexample and @smalllisp (when @smallbook): use smaller fonts. % Originally contributed by Pavel@xerox. \def\smalllispx{\begingroup \def\Esmalllisp{\nonfillfinish\endgroup}% \def\Esmallexample{\nonfillfinish\endgroup}% \smallfonts \lisp } % @display: same as @lisp except keep current font. % \def\display{\begingroup \nonfillstart \let\Edisplay = \nonfillfinish \gobble } % @smalldisplay (when @smallbook): @display plus smaller fonts. % \def\smalldisplayx{\begingroup \def\Esmalldisplay{\nonfillfinish\endgroup}% \smallfonts \rm \display } % @format: same as @display except don't narrow margins. % \def\format{\begingroup \let\nonarrowing = t \nonfillstart \let\Eformat = \nonfillfinish \gobble } % @smallformat (when @smallbook): @format plus smaller fonts. % \def\smallformatx{\begingroup \def\Esmallformat{\nonfillfinish\endgroup}% \smallfonts \rm \format } % @flushleft (same as @format). % \def\flushleft{\begingroup \def\Eflushleft{\nonfillfinish\endgroup}\format} % @flushright. % \def\flushright{\begingroup \let\nonarrowing = t \nonfillstart \let\Eflushright = \nonfillfinish \advance\leftskip by 0pt plus 1fill \gobble } % @quotation does normal linebreaking (hence we can't use \nonfillstart) % and narrows the margins. % \def\quotation{% \begingroup\inENV %This group ends at the end of the @quotation body {\parskip=0pt \aboveenvbreak}% because \aboveenvbreak inserts \parskip \singlespace \parindent=0pt % We have retained a nonzero parskip for the environment, since we're % doing normal filling. So to avoid extra space below the environment... \def\Equotation{\parskip = 0pt \nonfillfinish}% % % @cartouche defines \nonarrowing to inhibit narrowing at next level down. \ifx\nonarrowing\relax \advance\leftskip by \lispnarrowing \advance\rightskip by \lispnarrowing \exdentamount = \lispnarrowing \let\nonarrowing = \relax \fi } \message{defuns,} % @defun etc. % Allow user to change definition object font (\df) internally \def\setdeffont #1 {\csname DEF#1\endcsname} \newskip\defbodyindent \defbodyindent=.4in \newskip\defargsindent \defargsindent=50pt \newskip\deftypemargin \deftypemargin=12pt \newskip\deflastargmargin \deflastargmargin=18pt \newcount\parencount % define \functionparens, which makes ( and ) and & do special things. % \functionparens affects the group it is contained in. \def\activeparens{% \catcode`\(=\active \catcode`\)=\active \catcode`\&=\active \catcode`\[=\active \catcode`\]=\active} % Make control sequences which act like normal parenthesis chars. \let\lparen = ( \let\rparen = ) {\activeparens % Now, smart parens don't turn on until &foo (see \amprm) % Be sure that we always have a definition for `(', etc. For example, % if the fn name has parens in it, \boldbrax will not be in effect yet, % so TeX would otherwise complain about undefined control sequence. \global\let(=\lparen \global\let)=\rparen \global\let[=\lbrack \global\let]=\rbrack \gdef\functionparens{\boldbrax\let&=\amprm\parencount=0 } \gdef\boldbrax{\let(=\opnr\let)=\clnr\let[=\lbrb\let]=\rbrb} % This is used to turn on special parens % but make & act ordinary (given that it's active). \gdef\boldbraxnoamp{\let(=\opnr\let)=\clnr\let[=\lbrb\let]=\rbrb\let&=\ampnr} % Definitions of (, ) and & used in args for functions. % This is the definition of ( outside of all parentheses. \gdef\oprm#1 {{\rm\char`\(}#1 \bf \let(=\opnested \global\advance\parencount by 1 } % % This is the definition of ( when already inside a level of parens. \gdef\opnested{\char`\(\global\advance\parencount by 1 } % \gdef\clrm{% Print a paren in roman if it is taking us back to depth of 0. % also in that case restore the outer-level definition of (. \ifnum \parencount=1 {\rm \char `\)}\sl \let(=\oprm \else \char `\) \fi \global\advance \parencount by -1 } % If we encounter &foo, then turn on ()-hacking afterwards \gdef\amprm#1 {{\rm\}\let(=\oprm \let)=\clrm\ } % \gdef\normalparens{\boldbrax\let&=\ampnr} } % End of definition inside \activeparens %% These parens (in \boldbrax) actually are a little bolder than the %% contained text. This is especially needed for [ and ] \def\opnr{{\sf\char`\(}\global\advance\parencount by 1 } \def\clnr{{\sf\char`\)}\global\advance\parencount by -1 } \let\ampnr = \& \def\lbrb{{\bf\char`\[}} \def\rbrb{{\bf\char`\]}} % Active &'s sneak into the index arguments, so make sure it's defined. { \catcode`& = 13 \global\let& = \ampnr } % First, defname, which formats the header line itself. % #1 should be the function name. % #2 should be the type of definition, such as "Function". \def\defname #1#2{% % Get the values of \leftskip and \rightskip as they were % outside the @def... \dimen2=\leftskip \advance\dimen2 by -\defbodyindent \noindent \setbox0=\hbox{\hskip \deflastargmargin{\rm #2}\hskip \deftypemargin}% \dimen0=\hsize \advance \dimen0 by -\wd0 % compute size for first line \dimen1=\hsize \advance \dimen1 by -\defargsindent %size for continuations \parshape 2 0in \dimen0 \defargsindent \dimen1 % Now output arg 2 ("Function" or some such) % ending at \deftypemargin from the right margin, % but stuck inside a box of width 0 so it does not interfere with linebreaking {% Adjust \hsize to exclude the ambient margins, % so that \rightline will obey them. \advance \hsize by -\dimen2 \rlap{\rightline{{\rm #2}\hskip -1.25pc }}}% % Make all lines underfull and no complaints: \tolerance=10000 \hbadness=10000 \advance\leftskip by -\defbodyindent \exdentamount=\defbodyindent {\df #1}\enskip % Generate function name } % Actually process the body of a definition % #1 should be the terminating control sequence, such as \Edefun. % #2 should be the "another name" control sequence, such as \defunx. % #3 should be the control sequence that actually processes the header, % such as \defunheader. \def\defparsebody #1#2#3{\begingroup\inENV% Environment for definitionbody \medbreak % % Define the end token that this defining construct specifies % so that it will exit this group. \def#1{\endgraf\endgroup\medbreak}% \def#2{\begingroup\obeylines\activeparens\spacesplit#3}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup % \catcode 61=\active % 61 is `=' \obeylines\activeparens\spacesplit#3} % #1 is the \E... control sequence to end the definition (which we define). % #2 is the \...x control sequence for consecutive fns (which we define). % #3 is the control sequence to call to resume processing. % #4, delimited by the space, is the class name. % \def\defmethparsebody#1#2#3#4 {\begingroup\inENV % \medbreak % % Define the end token that this defining construct specifies % so that it will exit this group. \def#1{\endgraf\endgroup\medbreak}% \def#2##1 {\begingroup\obeylines\activeparens\spacesplit{#3{##1}}}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup\obeylines\activeparens\spacesplit{#3{#4}}} % Used for @deftypemethod and @deftypeivar. % #1 is the \E... control sequence to end the definition (which we define). % #2 is the \...x control sequence for consecutive fns (which we define). % #3 is the control sequence to call to resume processing. % #4, delimited by a space, is the class name. % #5 is the method's return type. % \def\deftypemethparsebody#1#2#3#4 #5 {\begingroup\inENV \medbreak \def#1{\endgraf\endgroup\medbreak}% \def#2##1 ##2 {\begingroup\obeylines\activeparens\spacesplit{#3{##1}{##2}}}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup\obeylines\activeparens\spacesplit{#3{#4}{#5}}} % Used for @deftypeop. The change from \deftypemethparsebody is an % extra argument at the beginning which is the `category', instead of it % being the hardwired string `Method' or `Instance Variable'. We have % to account for this both in the \...x definition and in parsing the % input at hand. Thus also need a control sequence (passed as #5) for % the \E... definition to assign the category name to. % \def\deftypeopparsebody#1#2#3#4#5 #6 {\begingroup\inENV \medbreak \def#1{\endgraf\endgroup\medbreak}% \def#2##1 ##2 ##3 {% \def#4{##1}% \begingroup\obeylines\activeparens\spacesplit{#3{##2}{##3}}}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup\obeylines\activeparens\spacesplit{#3{#5}{#6}}} \def\defopparsebody #1#2#3#4#5 {\begingroup\inENV % \medbreak % % Define the end token that this defining construct specifies % so that it will exit this group. \def#1{\endgraf\endgroup\medbreak}% \def#2##1 ##2 {\def#4{##1}% \begingroup\obeylines\activeparens\spacesplit{#3{##2}}}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup\obeylines\activeparens\spacesplit{#3{#5}}} % These parsing functions are similar to the preceding ones % except that they do not make parens into active characters. % These are used for "variables" since they have no arguments. \def\defvarparsebody #1#2#3{\begingroup\inENV% Environment for definitionbody \medbreak % % Define the end token that this defining construct specifies % so that it will exit this group. \def#1{\endgraf\endgroup\medbreak}% \def#2{\begingroup\obeylines\spacesplit#3}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup % \catcode 61=\active % \obeylines\spacesplit#3} % This is used for \def{tp,vr}parsebody. It could probably be used for % some of the others, too, with some judicious conditionals. % \def\parsebodycommon#1#2#3{% \begingroup\inENV % \medbreak % % Define the end token that this defining construct specifies % so that it will exit this group. \def#1{\endgraf\endgroup\medbreak}% \def#2##1 {\begingroup\obeylines\spacesplit{#3{##1}}}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup\obeylines } \def\defvrparsebody#1#2#3#4 {% \parsebodycommon{#1}{#2}{#3}% \spacesplit{#3{#4}}% } % This loses on `@deftp {Data Type} {struct termios}' -- it thinks the % type is just `struct', because we lose the braces in `{struct % termios}' when \spacesplit reads its undelimited argument. Sigh. % \let\deftpparsebody=\defvrparsebody % % So, to get around this, we put \empty in with the type name. That % way, TeX won't find exactly `{...}' as an undelimited argument, and % won't strip off the braces. % \def\deftpparsebody #1#2#3#4 {% \parsebodycommon{#1}{#2}{#3}% \spacesplit{\parsetpheaderline{#3{#4}}}\empty } % Fine, but then we have to eventually remove the \empty *and* the % braces (if any). That's what this does. % \def\removeemptybraces\empty#1\relax{#1} % After \spacesplit has done its work, this is called -- #1 is the final % thing to call, #2 the type name (which starts with \empty), and #3 % (which might be empty) the arguments. % \def\parsetpheaderline#1#2#3{% #1{\removeemptybraces#2\relax}{#3}% }% \def\defopvarparsebody #1#2#3#4#5 {\begingroup\inENV % \medbreak % % Define the end token that this defining construct specifies % so that it will exit this group. \def#1{\endgraf\endgroup\medbreak}% \def#2##1 ##2 {\def#4{##1}% \begingroup\obeylines\spacesplit{#3{##2}}}% \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent \begingroup\obeylines\spacesplit{#3{#5}}} % Split up #2 at the first space token. % call #1 with two arguments: % the first is all of #2 before the space token, % the second is all of #2 after that space token. % If #2 contains no space token, all of it is passed as the first arg % and the second is passed as empty. {\obeylines \gdef\spacesplit#1#2^^M{\endgroup\spacesplitfoo{#1}#2 \relax\spacesplitfoo}% \long\gdef\spacesplitfoo#1#2 #3#4\spacesplitfoo{% \ifx\relax #3% #1{#2}{}\else #1{#2}{#3#4}\fi}} % So much for the things common to all kinds of definitions. % Define @defun. % First, define the processing that is wanted for arguments of \defun % Use this to expand the args and terminate the paragraph they make up \def\defunargs#1{\functionparens \sl % Expand, preventing hyphenation at `-' chars. % Note that groups don't affect changes in \hyphenchar. % Set the font temporarily and use \font in case \setfont made \tensl a macro. {\tensl\hyphenchar\font=0}% #1% {\tensl\hyphenchar\font=45}% \ifnum\parencount=0 \else \errmessage{Unbalanced parentheses in @def}\fi% \interlinepenalty=10000 \advance\rightskip by 0pt plus 1fil \endgraf\nobreak\vskip -\parskip\nobreak } \def\deftypefunargs #1{% % Expand, preventing hyphenation at `-' chars. % Note that groups don't affect changes in \hyphenchar. % Use \boldbraxnoamp, not \functionparens, so that & is not special. \boldbraxnoamp \tclose{#1}% avoid \code because of side effects on active chars \interlinepenalty=10000 \advance\rightskip by 0pt plus 1fil \endgraf\nobreak\vskip -\parskip\nobreak } % Do complete processing of one @defun or @defunx line already parsed. % @deffn Command forward-char nchars \def\deffn{\defmethparsebody\Edeffn\deffnx\deffnheader} \def\deffnheader #1#2#3{\doind {fn}{\code{#2}}% \begingroup\defname {#2}{#1}\defunargs{#3}\endgroup % \catcode 61=\other % Turn off change made in \defparsebody } % @defun == @deffn Function \def\defun{\defparsebody\Edefun\defunx\defunheader} \def\defunheader #1#2{\doind {fn}{\code{#1}}% Make entry in function index \begingroup\defname {#1}{\putwordDeffunc}% \defunargs {#2}\endgroup % \catcode 61=\other % Turn off change made in \defparsebody } % @deftypefun int foobar (int @var{foo}, float @var{bar}) \def\deftypefun{\defparsebody\Edeftypefun\deftypefunx\deftypefunheader} % #1 is the data type. #2 is the name and args. \def\deftypefunheader #1#2{\deftypefunheaderx{#1}#2 \relax} % #1 is the data type, #2 the name, #3 the args. \def\deftypefunheaderx #1#2 #3\relax{% \doind {fn}{\code{#2}}% Make entry in function index \begingroup\defname {\defheaderxcond#1\relax$$$#2}{\putwordDeftypefun}% \deftypefunargs {#3}\endgroup % \catcode 61=\other % Turn off change made in \defparsebody } % @deftypefn {Library Function} int foobar (int @var{foo}, float @var{bar}) \def\deftypefn{\defmethparsebody\Edeftypefn\deftypefnx\deftypefnheader} % \defheaderxcond#1\relax$$$ % puts #1 in @code, followed by a space, but does nothing if #1 is null. \def\defheaderxcond#1#2$$${\ifx#1\relax\else\code{#1#2} \fi} % #1 is the classification. #2 is the data type. #3 is the name and args. \def\deftypefnheader #1#2#3{\deftypefnheaderx{#1}{#2}#3 \relax} % #1 is the classification, #2 the data type, #3 the name, #4 the args. \def\deftypefnheaderx #1#2#3 #4\relax{% \doind {fn}{\code{#3}}% Make entry in function index \begingroup \normalparens % notably, turn off `&' magic, which prevents % at least some C++ text from working \defname {\defheaderxcond#2\relax$$$#3}{#1}% \deftypefunargs {#4}\endgroup % \catcode 61=\other % Turn off change made in \defparsebody } % @defmac == @deffn Macro \def\defmac{\defparsebody\Edefmac\defmacx\defmacheader} \def\defmacheader #1#2{\doind {fn}{\code{#1}}% Make entry in function index \begingroup\defname {#1}{\putwordDefmac}% \defunargs {#2}\endgroup % \catcode 61=\other % Turn off change made in \defparsebody } % @defspec == @deffn Special Form \def\defspec{\defparsebody\Edefspec\defspecx\defspecheader} \def\defspecheader #1#2{\doind {fn}{\code{#1}}% Make entry in function index \begingroup\defname {#1}{\putwordDefspec}% \defunargs {#2}\endgroup % \catcode 61=\other % Turn off change made in \defparsebody } % @defop CATEGORY CLASS OPERATION ARG... % \def\defop #1 {\def\defoptype{#1}% \defopparsebody\Edefop\defopx\defopheader\defoptype} % \def\defopheader#1#2#3{% \dosubind {fn}{\code{#2}}{\putwordon\ #1}% Make entry in function index \begingroup\defname {#2}{\defoptype\ \putwordon\ #1}% \defunargs {#3}\endgroup % } % @deftypeop CATEGORY CLASS TYPE OPERATION ARG... % \def\deftypeop #1 {\def\deftypeopcategory{#1}% \deftypeopparsebody\Edeftypeop\deftypeopx\deftypeopheader \deftypeopcategory} % % #1 is the class name, #2 the data type, #3 the operation name, #4 the args. \def\deftypeopheader#1#2#3#4{% \dosubind{fn}{\code{#3}}{\putwordon\ \code{#1}}% entry in function index \begingroup \defname{\defheaderxcond#2\relax$$$#3} {\deftypeopcategory\ \putwordon\ \code{#1}}% \deftypefunargs{#4}% \endgroup } % @deftypemethod CLASS TYPE METHOD ARG... % \def\deftypemethod{% \deftypemethparsebody\Edeftypemethod\deftypemethodx\deftypemethodheader} % % #1 is the class name, #2 the data type, #3 the method name, #4 the args. \def\deftypemethodheader#1#2#3#4{% \dosubind{fn}{\code{#3}}{\putwordon\ \code{#1}}% entry in function index \begingroup \defname{\defheaderxcond#2\relax$$$#3}{\putwordMethodon\ \code{#1}}% \deftypefunargs{#4}% \endgroup } % @deftypeivar CLASS TYPE VARNAME % \def\deftypeivar{% \deftypemethparsebody\Edeftypeivar\deftypeivarx\deftypeivarheader} % % #1 is the class name, #2 the data type, #3 the variable name. \def\deftypeivarheader#1#2#3{% \dosubind{vr}{\code{#3}}{\putwordof\ \code{#1}}% entry in variable index \begingroup \defname{#3}{\putwordInstanceVariableof\ \code{#1}}% \defvarargs{#3}% \endgroup } % @defmethod == @defop Method % \def\defmethod{\defmethparsebody\Edefmethod\defmethodx\defmethodheader} % % #1 is the class name, #2 the method name, #3 the args. \def\defmethodheader#1#2#3{% \dosubind{fn}{\code{#2}}{\putwordon\ \code{#1}}% entry in function index \begingroup \defname{#2}{\putwordMethodon\ \code{#1}}% \defunargs{#3}% \endgroup } % @defcv {Class Option} foo-class foo-flag \def\defcv #1 {\def\defcvtype{#1}% \defopvarparsebody\Edefcv\defcvx\defcvarheader\defcvtype} \def\defcvarheader #1#2#3{% \dosubind {vr}{\code{#2}}{\putwordof\ #1}% Make entry in var index \begingroup\defname {#2}{\defcvtype\ \putwordof\ #1}% \defvarargs {#3}\endgroup % } % @defivar CLASS VARNAME == @defcv {Instance Variable} CLASS VARNAME % \def\defivar{\defvrparsebody\Edefivar\defivarx\defivarheader} % \def\defivarheader#1#2#3{% \dosubind {vr}{\code{#2}}{\putwordof\ #1}% entry in var index \begingroup \defname{#2}{\putwordInstanceVariableof\ #1}% \defvarargs{#3}% \endgroup } % @defvar % First, define the processing that is wanted for arguments of @defvar. % This is actually simple: just print them in roman. % This must expand the args and terminate the paragraph they make up \def\defvarargs #1{\normalparens #1% \interlinepenalty=10000 \endgraf\nobreak\vskip -\parskip\nobreak} % @defvr Counter foo-count \def\defvr{\defvrparsebody\Edefvr\defvrx\defvrheader} \def\defvrheader #1#2#3{\doind {vr}{\code{#2}}% \begingroup\defname {#2}{#1}\defvarargs{#3}\endgroup} % @defvar == @defvr Variable \def\defvar{\defvarparsebody\Edefvar\defvarx\defvarheader} \def\defvarheader #1#2{\doind {vr}{\code{#1}}% Make entry in var index \begingroup\defname {#1}{\putwordDefvar}% \defvarargs {#2}\endgroup % } % @defopt == @defvr {User Option} \def\defopt{\defvarparsebody\Edefopt\defoptx\defoptheader} \def\defoptheader #1#2{\doind {vr}{\code{#1}}% Make entry in var index \begingroup\defname {#1}{\putwordDefopt}% \defvarargs {#2}\endgroup % } % @deftypevar int foobar \def\deftypevar{\defvarparsebody\Edeftypevar\deftypevarx\deftypevarheader} % #1 is the data type. #2 is the name, perhaps followed by text that % is actually part of the data type, which should not be put into the index. \def\deftypevarheader #1#2{% \dovarind#2 \relax% Make entry in variables index \begingroup\defname {\defheaderxcond#1\relax$$$#2}{\putwordDeftypevar}% \interlinepenalty=10000 \endgraf\nobreak\vskip -\parskip\nobreak \endgroup} \def\dovarind#1 #2\relax{\doind{vr}{\code{#1}}} % @deftypevr {Global Flag} int enable \def\deftypevr{\defvrparsebody\Edeftypevr\deftypevrx\deftypevrheader} \def\deftypevrheader #1#2#3{\dovarind#3 \relax% \begingroup\defname {\defheaderxcond#2\relax$$$#3}{#1} \interlinepenalty=10000 \endgraf\nobreak\vskip -\parskip\nobreak \endgroup} % Now define @deftp % Args are printed in bold, a slight difference from @defvar. \def\deftpargs #1{\bf \defvarargs{#1}} % @deftp Class window height width ... \def\deftp{\deftpparsebody\Edeftp\deftpx\deftpheader} \def\deftpheader #1#2#3{\doind {tp}{\code{#2}}% \begingroup\defname {#2}{#1}\deftpargs{#3}\endgroup} % These definitions are used if you use @defunx (etc.) % anywhere other than immediately after a @defun or @defunx. % \def\defcvx#1 {\errmessage{@defcvx in invalid context}} \def\deffnx#1 {\errmessage{@deffnx in invalid context}} \def\defivarx#1 {\errmessage{@defivarx in invalid context}} \def\defmacx#1 {\errmessage{@defmacx in invalid context}} \def\defmethodx#1 {\errmessage{@defmethodx in invalid context}} \def\defoptx #1 {\errmessage{@defoptx in invalid context}} \def\defopx#1 {\errmessage{@defopx in invalid context}} \def\defspecx#1 {\errmessage{@defspecx in invalid context}} \def\deftpx#1 {\errmessage{@deftpx in invalid context}} \def\deftypefnx#1 {\errmessage{@deftypefnx in invalid context}} \def\deftypefunx#1 {\errmessage{@deftypefunx in invalid context}} \def\deftypeivarx#1 {\errmessage{@deftypeivarx in invalid context}} \def\deftypemethodx#1 {\errmessage{@deftypemethodx in invalid context}} \def\deftypeopx#1 {\errmessage{@deftypeopx in invalid context}} \def\deftypevarx#1 {\errmessage{@deftypevarx in invalid context}} \def\deftypevrx#1 {\errmessage{@deftypevrx in invalid context}} \def\defunx#1 {\errmessage{@defunx in invalid context}} \def\defvarx#1 {\errmessage{@defvarx in invalid context}} \def\defvrx#1 {\errmessage{@defvrx in invalid context}} \message{macros,} % @macro. % To do this right we need a feature of e-TeX, \scantokens, % which we arrange to emulate with a temporary file in ordinary TeX. \ifx\eTeXversion\undefined \newwrite\macscribble \def\scanmacro#1{% \begingroup \newlinechar`\^^M % Undo catcode changes of \startcontents and \doprintindex \catcode`\@=0 \catcode`\\=12 \escapechar=`\@ % Append \endinput to make sure that TeX does not see the ending newline. \toks0={#1\endinput}% \immediate\openout\macscribble=\jobname.tmp \immediate\write\macscribble{\the\toks0}% \immediate\closeout\macscribble \let\xeatspaces\eatspaces \input \jobname.tmp \endgroup } \else \def\scanmacro#1{% \begingroup \newlinechar`\^^M % Undo catcode changes of \startcontents and \doprintindex \catcode`\@=0 \catcode`\\=12 \escapechar=`\@ \let\xeatspaces\eatspaces\scantokens{#1\endinput}\endgroup} \fi \newcount\paramno % Count of parameters \newtoks\macname % Macro name \newif\ifrecursive % Is it recursive? \def\macrolist{} % List of all defined macros in the form % \do\macro1\do\macro2... % Utility routines. % Thisdoes \let #1 = #2, except with \csnames. \def\cslet#1#2{% \expandafter\expandafter \expandafter\let \expandafter\expandafter \csname#1\endcsname \csname#2\endcsname} % Trim leading and trailing spaces off a string. % Concepts from aro-bend problem 15 (see CTAN). {\catcode`\@=11 \gdef\eatspaces #1{\expandafter\trim@\expandafter{#1 }} \gdef\trim@ #1{\trim@@ @#1 @ #1 @ @@} \gdef\trim@@ #1@ #2@ #3@@{\trim@@@\empty #2 @} \def\unbrace#1{#1} \unbrace{\gdef\trim@@@ #1 } #2@{#1} } % Trim a single trailing ^^M off a string. {\catcode`\^^M=12\catcode`\Q=3% \gdef\eatcr #1{\eatcra #1Q^^MQ}% \gdef\eatcra#1^^MQ{\eatcrb#1Q}% \gdef\eatcrb#1Q#2Q{#1}% } % Macro bodies are absorbed as an argument in a context where % all characters are catcode 10, 11 or 12, except \ which is active % (as in normal texinfo). It is necessary to change the definition of \. % It's necessary to have hard CRs when the macro is executed. This is % done by making ^^M (\endlinechar) catcode 12 when reading the macro % body, and then making it the \newlinechar in \scanmacro. \def\macrobodyctxt{% \catcode`\~=12 \catcode`\^=12 \catcode`\_=12 \catcode`\|=12 \catcode`\<=12 \catcode`\>=12 \catcode`\+=12 \catcode`\{=12 \catcode`\}=12 \catcode`\@=12 \catcode`\^^M=12 \usembodybackslash} \def\macroargctxt{% \catcode`\~=12 \catcode`\^=12 \catcode`\_=12 \catcode`\|=12 \catcode`\<=12 \catcode`\>=12 \catcode`\+=12 \catcode`\@=12 \catcode`\\=12} % \mbodybackslash is the definition of \ in @macro bodies. % It maps \foo\ => \csname macarg.foo\endcsname => #N % where N is the macro parameter number. % We define \csname macarg.\endcsname to be \realbackslash, so % \\ in macro replacement text gets you a backslash. {\catcode`@=0 @catcode`@\=@active @gdef@usembodybackslash{@let\=@mbodybackslash} @gdef@mbodybackslash#1\{@csname macarg.#1@endcsname} } \expandafter\def\csname macarg.\endcsname{\realbackslash} \def\macro{\recursivefalse\parsearg\macroxxx} \def\rmacro{\recursivetrue\parsearg\macroxxx} \def\macroxxx#1{% \getargs{#1}% now \macname is the macname and \argl the arglist \ifx\argl\empty % no arguments \paramno=0% \else \expandafter\parsemargdef \argl;% \fi \if1\csname ismacro.\the\macname\endcsname \message{Warning: redefining \the\macname}% \else \expandafter\ifx\csname \the\macname\endcsname \relax \else \errmessage{The name \the\macname\space is reserved}\fi \global\cslet{macsave.\the\macname}{\the\macname}% \global\expandafter\let\csname ismacro.\the\macname\endcsname=1% % Add the macroname to \macrolist \toks0 = \expandafter{\macrolist\do}% \xdef\macrolist{\the\toks0 \expandafter\noexpand\csname\the\macname\endcsname}% \fi \begingroup \macrobodyctxt \ifrecursive \expandafter\parsermacbody \else \expandafter\parsemacbody \fi} \def\unmacro{\parsearg\unmacroxxx} \def\unmacroxxx#1{% \if1\csname ismacro.#1\endcsname \global\cslet{#1}{macsave.#1}% \global\expandafter\let \csname ismacro.#1\endcsname=0% % Remove the macro name from \macrolist \begingroup \edef\tempa{\expandafter\noexpand\csname#1\endcsname}% \def\do##1{% \def\tempb{##1}% \ifx\tempa\tempb % remove this \else \toks0 = \expandafter{\newmacrolist\do}% \edef\newmacrolist{\the\toks0\expandafter\noexpand\tempa}% \fi}% \def\newmacrolist{}% % Execute macro list to define \newmacrolist \macrolist \global\let\macrolist\newmacrolist \endgroup \else \errmessage{Macro #1 not defined}% \fi } % This makes use of the obscure feature that if the last token of a % is #, then the preceding argument is delimited by % an opening brace, and that opening brace is not consumed. \def\getargs#1{\getargsxxx#1{}} \def\getargsxxx#1#{\getmacname #1 \relax\getmacargs} \def\getmacname #1 #2\relax{\macname={#1}} \def\getmacargs#1{\def\argl{#1}} % Parse the optional {params} list. Set up \paramno and \paramlist % so \defmacro knows what to do. Define \macarg.blah for each blah % in the params list, to be ##N where N is the position in that list. % That gets used by \mbodybackslash (above). % We need to get `macro parameter char #' into several definitions. % The technique used is stolen from LaTeX: let \hash be something % unexpandable, insert that wherever you need a #, and then redefine % it to # just before using the token list produced. % % The same technique is used to protect \eatspaces till just before % the macro is used. \def\parsemargdef#1;{\paramno=0\def\paramlist{}% \let\hash\relax\let\xeatspaces\relax\parsemargdefxxx#1,;,} \def\parsemargdefxxx#1,{% \if#1;\let\next=\relax \else \let\next=\parsemargdefxxx \advance\paramno by 1% \expandafter\edef\csname macarg.\eatspaces{#1}\endcsname {\xeatspaces{\hash\the\paramno}}% \edef\paramlist{\paramlist\hash\the\paramno,}% \fi\next} % These two commands read recursive and nonrecursive macro bodies. % (They're different since rec and nonrec macros end differently.) \long\def\parsemacbody#1@end macro% {\xdef\temp{\eatcr{#1}}\endgroup\defmacro}% \long\def\parsermacbody#1@end rmacro% {\xdef\temp{\eatcr{#1}}\endgroup\defmacro}% % This defines the macro itself. There are six cases: recursive and % nonrecursive macros of zero, one, and many arguments. % Much magic with \expandafter here. % \xdef is used so that macro definitions will survive the file % they're defined in; @include reads the file inside a group. \def\defmacro{% \let\hash=##% convert placeholders to macro parameter chars \ifrecursive \ifcase\paramno % 0 \expandafter\xdef\csname\the\macname\endcsname{% \noexpand\scanmacro{\temp}}% \or % 1 \expandafter\xdef\csname\the\macname\endcsname{% \bgroup\noexpand\macroargctxt \noexpand\braceorline \expandafter\noexpand\csname\the\macname xxx\endcsname}% \expandafter\xdef\csname\the\macname xxx\endcsname##1{% \egroup\noexpand\scanmacro{\temp}}% \else % many \expandafter\xdef\csname\the\macname\endcsname{% \bgroup\noexpand\macroargctxt \noexpand\csname\the\macname xx\endcsname}% \expandafter\xdef\csname\the\macname xx\endcsname##1{% \expandafter\noexpand\csname\the\macname xxx\endcsname ##1,}% \expandafter\expandafter \expandafter\xdef \expandafter\expandafter \csname\the\macname xxx\endcsname \paramlist{\egroup\noexpand\scanmacro{\temp}}% \fi \else \ifcase\paramno % 0 \expandafter\xdef\csname\the\macname\endcsname{% \noexpand\norecurse{\the\macname}% \noexpand\scanmacro{\temp}\egroup}% \or % 1 \expandafter\xdef\csname\the\macname\endcsname{% \bgroup\noexpand\macroargctxt \noexpand\braceorline \expandafter\noexpand\csname\the\macname xxx\endcsname}% \expandafter\xdef\csname\the\macname xxx\endcsname##1{% \egroup \noexpand\norecurse{\the\macname}% \noexpand\scanmacro{\temp}\egroup}% \else % many \expandafter\xdef\csname\the\macname\endcsname{% \bgroup\noexpand\macroargctxt \expandafter\noexpand\csname\the\macname xx\endcsname}% \expandafter\xdef\csname\the\macname xx\endcsname##1{% \expandafter\noexpand\csname\the\macname xxx\endcsname ##1,}% \expandafter\expandafter \expandafter\xdef \expandafter\expandafter \csname\the\macname xxx\endcsname \paramlist{% \egroup \noexpand\norecurse{\the\macname}% \noexpand\scanmacro{\temp}\egroup}% \fi \fi} \def\norecurse#1{\bgroup\cslet{#1}{macsave.#1}} % \braceorline decides whether the next nonwhitespace character is a % {. If so it reads up to the closing }, if not, it reads the whole % line. Whatever was read is then fed to the next control sequence % as an argument (by \parsebrace or \parsearg) \def\braceorline#1{\let\next=#1\futurelet\nchar\braceorlinexxx} \def\braceorlinexxx{% \ifx\nchar\bgroup\else \expandafter\parsearg \fi \next} % We mant to disable all macros during \shipout so that they are not % expanded by \write. \def\turnoffmacros{\begingroup \def\do##1{\let\noexpand##1=\relax}% \edef\next{\macrolist}\expandafter\endgroup\next} % @alias. % We need some trickery to remove the optional spaces around the equal % sign. Just make them active and then expand them all to nothing. \def\alias{\begingroup\obeyspaces\parsearg\aliasxxx} \def\aliasxxx #1{\aliasyyy#1\relax} \def\aliasyyy #1=#2\relax{\ignoreactivespaces \edef\next{\global\let\expandafter\noexpand\csname#1\endcsname=% \expandafter\noexpand\csname#2\endcsname}% \expandafter\endgroup\next} \message{cross references,} % @xref etc. \newwrite\auxfile \newif\ifhavexrefs % True if xref values are known. \newif\ifwarnedxrefs % True if we warned once that they aren't known. % @inforef is relatively simple. \def\inforef #1{\inforefzzz #1,,,,**} \def\inforefzzz #1,#2,#3,#4**{\putwordSee{} \putwordInfo{} \putwordfile{} \file{\ignorespaces #3{}}, node \samp{\ignorespaces#1{}}} % @node's job is to define \lastnode. \def\node{\ENVcheck\parsearg\nodezzz} \def\nodezzz#1{\nodexxx [#1,]} \def\nodexxx[#1,#2]{\gdef\lastnode{#1}} \let\nwnode=\node \let\lastnode=\relax % The sectioning commands (@chapter, etc.) call these. \def\donoderef{% \ifx\lastnode\relax\else \expandafter\expandafter\expandafter\setref{\lastnode}% {Ysectionnumberandtype}% \global\let\lastnode=\relax \fi } \def\unnumbnoderef{% \ifx\lastnode\relax\else \expandafter\expandafter\expandafter\setref{\lastnode}{Ynothing}% \global\let\lastnode=\relax \fi } \def\appendixnoderef{% \ifx\lastnode\relax\else \expandafter\expandafter\expandafter\setref{\lastnode}% {Yappendixletterandtype}% \global\let\lastnode=\relax \fi } % @anchor{NAME} -- define xref target at arbitrary point. % \newcount\savesfregister \gdef\savesf{\relax \ifhmode \savesfregister=\spacefactor \fi} \gdef\restoresf{\relax \ifhmode \spacefactor=\savesfregister \fi} \gdef\anchor#1{\savesf \setref{#1}{Ynothing}\restoresf \ignorespaces} % \setref{NAME}{SNT} defines a cross-reference point NAME, namely % NAME-title, NAME-pg, and NAME-SNT. Called from \foonoderef. We have % to set \indexdummies so commands such as @code in a section title % aren't expanded. It would be nicer not to expand the titles in the % first place, but there's so many layers that that is hard to do. % \def\setref#1#2{{% \indexdummies \pdfmkdest{#1}% \dosetq{#1-title}{Ytitle}% \dosetq{#1-pg}{Ypagenumber}% \dosetq{#1-snt}{#2}% }} % @xref, @pxref, and @ref generate cross-references. For \xrefX, #1 is % the node name, #2 the name of the Info cross-reference, #3 the printed % node name, #4 the name of the Info file, #5 the name of the printed % manual. All but the node name can be omitted. % \def\pxref#1{\putwordsee{} \xrefX[#1,,,,,,,]} \def\xref#1{\putwordSee{} \xrefX[#1,,,,,,,]} \def\ref#1{\xrefX[#1,,,,,,,]} \def\xrefX[#1,#2,#3,#4,#5,#6]{\begingroup \unsepspaces \def\printedmanual{\ignorespaces #5}% \def\printednodename{\ignorespaces #3}% \setbox1=\hbox{\printedmanual}% \setbox0=\hbox{\printednodename}% \ifdim \wd0 = 0pt % No printed node name was explicitly given. \expandafter\ifx\csname SETxref-automatic-section-title\endcsname\relax % Use the node name inside the square brackets. \def\printednodename{\ignorespaces #1}% \else % Use the actual chapter/section title appear inside % the square brackets. Use the real section title if we have it. \ifdim \wd1 > 0pt % It is in another manual, so we don't have it. \def\printednodename{\ignorespaces #1}% \else \ifhavexrefs % We know the real title if we have the xref values. \def\printednodename{\refx{#1-title}{}}% \else % Otherwise just copy the Info node name. \def\printednodename{\ignorespaces #1}% \fi% \fi \fi \fi % % If we use \unhbox0 and \unhbox1 to print the node names, TeX does not % insert empty discretionaries after hyphens, which means that it will % not find a line break at a hyphen in a node names. Since some manuals % are best written with fairly long node names, containing hyphens, this % is a loss. Therefore, we give the text of the node name again, so it % is as if TeX is seeing it for the first time. \ifpdf \leavevmode \getfilename{#4}% \ifnum\filenamelength>0 \startlink attr{/Border [0 0 0]}% goto file{\the\filename.pdf} name{#1@}% \else \startlink attr{/Border [0 0 0]}% goto name{#1@}% \fi \linkcolor \fi % \ifdim \wd1 > 0pt \putwordsection{} ``\printednodename'' \putwordin{} \cite{\printedmanual}% \else % _ (for example) has to be the character _ for the purposes of the % control sequence corresponding to the node, but it has to expand % into the usual \leavevmode...\vrule stuff for purposes of % printing. So we \turnoffactive for the \refx-snt, back on for the % printing, back off for the \refx-pg. {\normalturnoffactive % Only output a following space if the -snt ref is nonempty; for % @unnumbered and @anchor, it won't be. \setbox2 = \hbox{\ignorespaces \refx{#1-snt}{}}% \ifdim \wd2 > 0pt \refx{#1-snt}\space\fi }% % [mynode], [\printednodename],\space % page 3 \turnoffactive \putwordpage\tie\refx{#1-pg}{}% \fi \endlink \endgroup} % \dosetq is the interface for calls from other macros % Use \normalturnoffactive so that punctuation chars such as underscore % and backslash work in node names. (\turnoffactive doesn't do \.) \def\dosetq#1#2{% {\let\folio=0% \normalturnoffactive \edef\next{\write\auxfile{\internalsetq{#1}{#2}}}% \iflinks \next \fi }% } % \internalsetq {foo}{page} expands into % CHARACTERS 'xrdef {foo}{...expansion of \Ypage...} % When the aux file is read, ' is the escape character \def\internalsetq #1#2{'xrdef {#1}{\csname #2\endcsname}} % Things to be expanded by \internalsetq \def\Ypagenumber{\folio} \def\Ytitle{\thissection} \def\Ynothing{} \def\Ysectionnumberandtype{% \ifnum\secno=0 \putwordChapter\xreftie\the\chapno % \else \ifnum \subsecno=0 \putwordSection\xreftie\the\chapno.\the\secno % \else \ifnum \subsubsecno=0 % \putwordSection\xreftie\the\chapno.\the\secno.\the\subsecno % \else % \putwordSection\xreftie\the\chapno.\the\secno.\the\subsecno.\the\subsubsecno % \fi \fi \fi } \def\Yappendixletterandtype{% \ifnum\secno=0 \putwordAppendix\xreftie'char\the\appendixno{}% \else \ifnum \subsecno=0 \putwordSection\xreftie'char\the\appendixno.\the\secno % \else \ifnum \subsubsecno=0 % \putwordSection\xreftie'char\the\appendixno.\the\secno.\the\subsecno % \else % \putwordSection\xreftie'char\the\appendixno.\the\secno.\the\subsecno.\the\subsubsecno % \fi \fi \fi } \gdef\xreftie{'tie} % Use TeX 3.0's \inputlineno to get the line number, for better error % messages, but if we're using an old version of TeX, don't do anything. % \ifx\inputlineno\thisisundefined \let\linenumber = \empty % Non-3.0. \else \def\linenumber{\the\inputlineno:\space} \fi % Define \refx{NAME}{SUFFIX} to reference a cross-reference string named NAME. % If its value is nonempty, SUFFIX is output afterward. \def\refx#1#2{% \expandafter\ifx\csname X#1\endcsname\relax % If not defined, say something at least. \angleleft un\-de\-fined\angleright \iflinks \ifhavexrefs \message{\linenumber Undefined cross reference `#1'.}% \else \ifwarnedxrefs\else \global\warnedxrefstrue \message{Cross reference values unknown; you must run TeX again.}% \fi \fi \fi \else % It's defined, so just use it. \csname X#1\endcsname \fi #2% Output the suffix in any case. } % This is the macro invoked by entries in the aux file. % \def\xrdef#1{\begingroup % Reenable \ as an escape while reading the second argument. \catcode`\\ = 0 \afterassignment\endgroup \expandafter\gdef\csname X#1\endcsname } % Read the last existing aux file, if any. No error if none exists. \def\readauxfile{\begingroup \catcode`\^^@=\other \catcode`\^^A=\other \catcode`\^^B=\other \catcode`\^^C=\other \catcode`\^^D=\other \catcode`\^^E=\other \catcode`\^^F=\other \catcode`\^^G=\other \catcode`\^^H=\other \catcode`\^^K=\other \catcode`\^^L=\other \catcode`\^^N=\other \catcode`\^^P=\other \catcode`\^^Q=\other \catcode`\^^R=\other \catcode`\^^S=\other \catcode`\^^T=\other \catcode`\^^U=\other \catcode`\^^V=\other \catcode`\^^W=\other \catcode`\^^X=\other \catcode`\^^Z=\other \catcode`\^^[=\other \catcode`\^^\=\other \catcode`\^^]=\other \catcode`\^^^=\other \catcode`\^^_=\other \catcode`\@=\other \catcode`\^=\other % It was suggested to define this as 7, which would allow ^^e4 etc. % in xref tags, i.e., node names. But since ^^e4 notation isn't % supported in the main text, it doesn't seem desirable. Furthermore, % that is not enough: for node names that actually contain a ^ % character, we would end up writing a line like this: 'xrdef {'hat % b-title}{'hat b} and \xrdef does a \csname...\endcsname on the first % argument, and \hat is not an expandable control sequence. It could % all be worked out, but why? Either we support ^^ or we don't. % % The other change necessary for this was to define \auxhat: % \def\auxhat{\def^{'hat }}% extra space so ok if followed by letter % and then to call \auxhat in \setq. % \catcode`\~=\other \catcode`\[=\other \catcode`\]=\other \catcode`\"=\other \catcode`\_=\other \catcode`\|=\other \catcode`\<=\other \catcode`\>=\other \catcode`\$=\other \catcode`\#=\other \catcode`\&=\other \catcode`+=\other % avoid \+ for paranoia even though we've turned it off % Make the characters 128-255 be printing characters {% \count 1=128 \def\loop{% \catcode\count 1=\other \advance\count 1 by 1 \ifnum \count 1<256 \loop \fi }% }% % The aux file uses ' as the escape (for now). % Turn off \ as an escape so we do not lose on % entries which were dumped with control sequences in their names. % For example, 'xrdef {$\leq $-fun}{page ...} made by @defun ^^ % Reference to such entries still does not work the way one would wish, % but at least they do not bomb out when the aux file is read in. \catcode`\{=1 \catcode`\}=2 \catcode`\%=\other \catcode`\'=0 \catcode`\\=\other % \openin 1 \jobname.aux \ifeof 1 \else \closein 1 \input \jobname.aux \global\havexrefstrue \global\warnedobstrue \fi % Open the new aux file. TeX will close it automatically at exit. \openout\auxfile=\jobname.aux \endgroup} % Footnotes. \newcount \footnoteno % The trailing space in the following definition for supereject is % vital for proper filling; pages come out unaligned when you do a % pagealignmacro call if that space before the closing brace is % removed. (Generally, numeric constants should always be followed by a % space to prevent strange expansion errors.) \def\supereject{\par\penalty -20000\footnoteno =0 } % @footnotestyle is meaningful for info output only. \let\footnotestyle=\comment \let\ptexfootnote=\footnote {\catcode `\@=11 % % Auto-number footnotes. Otherwise like plain. \gdef\footnote{% \global\advance\footnoteno by \@ne \edef\thisfootno{$^{\the\footnoteno}$}% % % In case the footnote comes at the end of a sentence, preserve the % extra spacing after we do the footnote number. \let\@sf\empty \ifhmode\edef\@sf{\spacefactor\the\spacefactor}\/\fi % % Remove inadvertent blank space before typesetting the footnote number. \unskip \thisfootno\@sf \footnotezzz }% % Don't bother with the trickery in plain.tex to not require the % footnote text as a parameter. Our footnotes don't need to be so general. % % Oh yes, they do; otherwise, @ifset and anything else that uses % \parseargline fail inside footnotes because the tokens are fixed when % the footnote is read. --karl, 16nov96. % \long\gdef\footnotezzz{\insert\footins\bgroup % We want to typeset this text as a normal paragraph, even if the % footnote reference occurs in (for example) a display environment. % So reset some parameters. \interlinepenalty\interfootnotelinepenalty \splittopskip\ht\strutbox % top baseline for broken footnotes \splitmaxdepth\dp\strutbox \floatingpenalty\@MM \leftskip\z@skip \rightskip\z@skip \spaceskip\z@skip \xspaceskip\z@skip \parindent\defaultparindent % \smallfonts \rm % % Hang the footnote text off the number. \hang \textindent{\thisfootno}% % % Don't crash into the line above the footnote text. Since this % expands into a box, it must come within the paragraph, lest it % provide a place where TeX can split the footnote. \footstrut \futurelet\next\fo@t } \def\fo@t{\ifcat\bgroup\noexpand\next \let\next\f@@t \else\let\next\f@t\fi \next} \def\f@@t{\bgroup\aftergroup\@foot\let\next} \def\f@t#1{#1\@foot} \def\@foot{\strut\par\egroup} }%end \catcode `\@=11 % Set the baselineskip to #1, and the lineskip and strut size % correspondingly. There is no deep meaning behind these magic numbers % used as factors; they just match (closely enough) what Knuth defined. % \def\lineskipfactor{.08333} \def\strutheightpercent{.70833} \def\strutdepthpercent {.29167} % \def\setleading#1{% \normalbaselineskip = #1\relax \normallineskip = \lineskipfactor\normalbaselineskip \normalbaselines \setbox\strutbox =\hbox{% \vrule width0pt height\strutheightpercent\baselineskip depth \strutdepthpercent \baselineskip }% } % @| inserts a changebar to the left of the current line. It should % surround any changed text. This approach does *not* work if the % change spans more than two lines of output. To handle that, we would % have adopt a much more difficult approach (putting marks into the main % vertical list for the beginning and end of each change). % \def\|{% % \vadjust can only be used in horizontal mode. \leavevmode % % Append this vertical mode material after the current line in the output. \vadjust{% % We want to insert a rule with the height and depth of the current % leading; that is exactly what \strutbox is supposed to record. \vskip-\baselineskip % % \vadjust-items are inserted at the left edge of the type. So % the \llap here moves out into the left-hand margin. \llap{% % % For a thicker or thinner bar, change the `1pt'. \vrule height\baselineskip width1pt % % This is the space between the bar and the text. \hskip 12pt }% }% } % For a final copy, take out the rectangles % that mark overfull boxes (in case you have decided % that the text looks ok even though it passes the margin). % \def\finalout{\overfullrule=0pt} % @image. We use the macros from epsf.tex to support this. % If epsf.tex is not installed and @image is used, we complain. % % Check for and read epsf.tex up front. If we read it only at @image % time, we might be inside a group, and then its definitions would get % undone and the next image would fail. \openin 1 = epsf.tex \ifeof 1 \else \closein 1 % Do not bother showing banner with post-v2.7 epsf.tex (available in % doc/epsf.tex until it shows up on ctan). \def\epsfannounce{\toks0 = }% \input epsf.tex \fi % % We will only complain once about lack of epsf.tex. \newif\ifwarnednoepsf \newhelp\noepsfhelp{epsf.tex must be installed for images to work. It is also included in the Texinfo distribution, or you can get it from ftp://tug.org/tex/epsf.tex.} % \def\image#1{% \ifx\epsfbox\undefined \ifwarnednoepsf \else \errhelp = \noepsfhelp \errmessage{epsf.tex not found, images will be ignored}% \global\warnednoepsftrue \fi \else \imagexxx #1,,,\finish \fi } % % Arguments to @image: % #1 is (mandatory) image filename; we tack on .eps extension. % #2 is (optional) width, #3 is (optional) height. % #4 is just the usual extra ignored arg for parsing this stuff. \def\imagexxx#1,#2,#3,#4\finish{% \ifpdf \centerline{\dopdfimage{#1}{#2}{#3}}% \else % \epsfbox itself resets \epsf?size at each figure. \setbox0 = \hbox{\ignorespaces #2}\ifdim\wd0 > 0pt \epsfxsize=#2\relax \fi \setbox0 = \hbox{\ignorespaces #3}\ifdim\wd0 > 0pt \epsfysize=#3\relax \fi \begingroup \catcode`\^^M = 5 % in case we're inside an example % If the image is by itself, center it. \ifvmode \nobreak\bigskip % Usually we'll have text after the image which will insert % \parskip glue, so insert it here too to equalize the space % above and below. \nobreak\vskip\parskip \nobreak \centerline{\epsfbox{#1.eps}}% \bigbreak \else % In the middle of a paragraph, no extra space. \epsfbox{#1.eps}% \fi \endgroup \fi } \message{localization,} % and i18n. % @documentlanguage is usually given very early, just after % @setfilename. If done too late, it may not override everything % properly. Single argument is the language abbreviation. % It would be nice if we could set up a hyphenation file here. % \def\documentlanguage{\parsearg\dodocumentlanguage} \def\dodocumentlanguage#1{% \tex % read txi-??.tex file in plain TeX. % Read the file if it exists. \openin 1 txi-#1.tex \ifeof1 \errhelp = \nolanghelp \errmessage{Cannot read language file txi-#1.tex}% \let\temp = \relax \else \def\temp{\input txi-#1.tex }% \fi \temp \endgroup } \newhelp\nolanghelp{The given language definition file cannot be found or is empty. Maybe you need to install it? In the current directory should work if nowhere else does.} % @documentencoding should change something in TeX eventually, most % likely, but for now just recognize it. \let\documentencoding = \comment % Page size parameters. % \newdimen\defaultparindent \defaultparindent = 15pt \chapheadingskip = 15pt plus 4pt minus 2pt \secheadingskip = 12pt plus 3pt minus 2pt \subsecheadingskip = 9pt plus 2pt minus 2pt % Prevent underfull vbox error messages. \vbadness = 10000 % Don't be so finicky about underfull hboxes, either. \hbadness = 2000 % Following George Bush, just get rid of widows and orphans. \widowpenalty=10000 \clubpenalty=10000 % Use TeX 3.0's \emergencystretch to help line breaking, but if we're % using an old version of TeX, don't do anything. We want the amount of % stretch added to depend on the line length, hence the dependence on % \hsize. We call this whenever the paper size is set. % \def\setemergencystretch{% \ifx\emergencystretch\thisisundefined % Allow us to assign to \emergencystretch anyway. \def\emergencystretch{\dimen0}% \else \emergencystretch = .15\hsize \fi } % Parameters in order: 1) textheight; 2) textwidth; 3) voffset; % 4) hoffset; 5) binding offset; 6) topskip. Then whoever calls us can % set \parskip and call \setleading for \baselineskip. % \def\internalpagesizes#1#2#3#4#5#6{% \voffset = #3\relax \topskip = #6\relax \splittopskip = \topskip % \vsize = #1\relax \advance\vsize by \topskip \outervsize = \vsize \advance\outervsize by 2\topandbottommargin \pageheight = \vsize % \hsize = #2\relax \outerhsize = \hsize \advance\outerhsize by 0.5in \pagewidth = \hsize % \normaloffset = #4\relax \bindingoffset = #5\relax % \parindent = \defaultparindent \setemergencystretch } % @letterpaper (the default). \def\letterpaper{{\globaldefs = 1 \parskip = 3pt plus 2pt minus 1pt \setleading{13.2pt}% % % If page is nothing but text, make it come out even. \internalpagesizes{46\baselineskip}{6in}{\voffset}{.25in}{\bindingoffset}{36pt}% }} % Use @smallbook to reset parameters for 7x9.5 (or so) format. \def\smallbook{{\globaldefs = 1 \parskip = 2pt plus 1pt \setleading{12pt}% % \internalpagesizes{7.5in}{5.in}{\voffset}{.25in}{\bindingoffset}{16pt}% % \lispnarrowing = 0.3in \tolerance = 700 \hfuzz = 1pt \contentsrightmargin = 0pt \deftypemargin = 0pt \defbodyindent = .5cm % \let\smalldisplay = \smalldisplayx \let\smallexample = \smalllispx \let\smallformat = \smallformatx \let\smalllisp = \smalllispx }} % Use @afourpaper to print on European A4 paper. \def\afourpaper{{\globaldefs = 1 \setleading{12pt}% \parskip = 3pt plus 2pt minus 1pt % \internalpagesizes{53\baselineskip}{160mm}{\voffset}{4mm}{\bindingoffset}{44pt}% % \tolerance = 700 \hfuzz = 1pt }} % A specific text layout, 24x15cm overall, intended for A4 paper. Top margin % 29mm, hence bottom margin 28mm, nominal side margin 3cm. \def\afourlatex{{\globaldefs = 1 \setleading{13.6pt}% % \afourpaper \internalpagesizes{237mm}{150mm}{3.6mm}{3.6mm}{3mm}{7mm}% % \globaldefs = 0 }} % Use @afourwide to print on European A4 paper in wide format. \def\afourwide{% \afourpaper \internalpagesizes{9.5in}{6.5in}{\hoffset}{\normaloffset}{\bindingoffset}{7mm}% % \globaldefs = 0 } % @pagesizes TEXTHEIGHT[,TEXTWIDTH] % Perhaps we should allow setting the margins, \topskip, \parskip, % and/or leading, also. Or perhaps we should compute them somehow. % \def\pagesizes{\parsearg\pagesizesxxx} \def\pagesizesxxx#1{\pagesizesyyy #1,,\finish} \def\pagesizesyyy#1,#2,#3\finish{{% \setbox0 = \hbox{\ignorespaces #2}\ifdim\wd0 > 0pt \hsize=#2\relax \fi \globaldefs = 1 % \parskip = 3pt plus 2pt minus 1pt \setleading{13.2pt}% % \internalpagesizes{#1}{\hsize}{\voffset}{\normaloffset}{\bindingoffset}{44pt}% }} % Set default to letter. % \letterpaper \message{and turning on texinfo input format.} % Define macros to output various characters with catcode for normal text. \catcode`\"=\other \catcode`\~=\other \catcode`\^=\other \catcode`\_=\other \catcode`\|=\other \catcode`\<=\other \catcode`\>=\other \catcode`\+=\other \catcode`\$=\other \def\normaldoublequote{"} \def\normaltilde{~} \def\normalcaret{^} \def\normalunderscore{_} \def\normalverticalbar{|} \def\normalless{<} \def\normalgreater{>} \def\normalplus{+} \def\normaldollar{$} % This macro is used to make a character print one way in ttfont % where it can probably just be output, and another way in other fonts, % where something hairier probably needs to be done. % % #1 is what to print if we are indeed using \tt; #2 is what to print % otherwise. Since all the Computer Modern typewriter fonts have zero % interword stretch (and shrink), and it is reasonable to expect all % typewriter fonts to have this, we can check that font parameter. % \def\ifusingtt#1#2{\ifdim \fontdimen3\font=0pt #1\else #2\fi} % Same as above, but check for italic font. Actually this also catches % non-italic slanted fonts since it is impossible to distinguish them from % italic fonts. But since this is only used by $ and it uses \sl anyway % this is not a problem. \def\ifusingit#1#2{\ifdim \fontdimen1\font>0pt #1\else #2\fi} % Turn off all special characters except @ % (and those which the user can use as if they were ordinary). % Most of these we simply print from the \tt font, but for some, we can % use math or other variants that look better in normal text. \catcode`\"=\active \def\activedoublequote{{\tt\char34}} \let"=\activedoublequote \catcode`\~=\active \def~{{\tt\char126}} \chardef\hat=`\^ \catcode`\^=\active \def^{{\tt \hat}} \catcode`\_=\active \def_{\ifusingtt\normalunderscore\_} % Subroutine for the previous macro. \def\_{\leavevmode \kern.06em \vbox{\hrule width.3em height.1ex}} \catcode`\|=\active \def|{{\tt\char124}} \chardef \less=`\< \catcode`\<=\active \def<{{\tt \less}} \chardef \gtr=`\> \catcode`\>=\active \def>{{\tt \gtr}} \catcode`\+=\active \def+{{\tt \char 43}} \catcode`\$=\active \def${\ifusingit{{\sl\$}}\normaldollar} %\catcode 27=\active %\def^^[{$\diamondsuit$} % Set up an active definition for =, but don't enable it most of the time. {\catcode`\==\active \global\def={{\tt \char 61}}} \catcode`+=\active \catcode`\_=\active % If a .fmt file is being used, characters that might appear in a file % name cannot be active until we have parsed the command line. % So turn them off again, and have \everyjob (or @setfilename) turn them on. % \otherifyactive is called near the end of this file. \def\otherifyactive{\catcode`+=\other \catcode`\_=\other} \catcode`\@=0 % \rawbackslashxx output one backslash character in current font \global\chardef\rawbackslashxx=`\\ %{\catcode`\\=\other %@gdef@rawbackslashxx{\}} % \rawbackslash redefines \ as input to do \rawbackslashxx. {\catcode`\\=\active @gdef@rawbackslash{@let\=@rawbackslashxx }} % \normalbackslash outputs one backslash in fixed width font. \def\normalbackslash{{\tt\rawbackslashxx}} % \catcode 17=0 % Define control-q \catcode`\\=\active % Used sometimes to turn off (effectively) the active characters % even after parsing them. @def@turnoffactive{@let"=@normaldoublequote @let\=@realbackslash @let~=@normaltilde @let^=@normalcaret @let_=@normalunderscore @let|=@normalverticalbar @let<=@normalless @let>=@normalgreater @let+=@normalplus @let$=@normaldollar} @def@normalturnoffactive{@let"=@normaldoublequote @let\=@normalbackslash @let~=@normaltilde @let^=@normalcaret @let_=@normalunderscore @let|=@normalverticalbar @let<=@normalless @let>=@normalgreater @let+=@normalplus @let$=@normaldollar} % Make _ and + \other characters, temporarily. % This is canceled by @fixbackslash. @otherifyactive % If a .fmt file is being used, we don't want the `\input texinfo' to show up. % That is what \eatinput is for; after that, the `\' should revert to printing % a backslash. % @gdef@eatinput input texinfo{@fixbackslash} @global@let\ = @eatinput % On the other hand, perhaps the file did not have a `\input texinfo'. Then % the first `\{ in the file would cause an error. This macro tries to fix % that, assuming it is called before the first `\' could plausibly occur. % Also back turn on active characters that might appear in the input % file name, in case not using a pre-dumped format. % @gdef@fixbackslash{% @ifx\@eatinput @let\ = @normalbackslash @fi @catcode`+=@active @catcode`@_=@active } % Say @foo, not \foo, in error messages. @escapechar = `@@ % These look ok in all fonts, so just make them not special. @catcode`@& = @other @catcode`@# = @other @catcode`@% = @other @c Set initial fonts. @textfonts @rm @c Local variables: @c eval: (add-hook 'write-file-hooks 'time-stamp) @c page-delimiter: "^\\\\message" @c time-stamp-start: "def\\\\texinfoversion{" @c time-stamp-format: "%:y-%02m-%02d.%02H" @c time-stamp-end: "}" @c End: simulavr-0.1.2.2/doc/simulavr.texi0000644000175000001440000004366110002412655013740 00000000000000%% -*-texinfo-*- \input texinfo @c @c $Id: simulavr.texi,v 1.23 2004/01/18 05:12:13 troth Exp $ @c @c %**start of header @setfilename simulavr.info @settitle Simulavr @c %**end of header @include version.texi @c This is a dir.info fragment to support semi-automated addition of @c manuals to an info tree. @dircategory AVR Programming & development tools. @direntry * Simulavr: (simulavr). A simulator for Atmel AVR microcontrollers. @end direntry @ifinfo This file documents the simulavr program. For simulavr version @value{VERSION}, @value{UPDATED}. Copyright @copyright{} 2001, 2002, 2003, 2004 Theodore A. Roth Permission is granted to make and distribute verbatim copies of this manual provided the copyright notice and this permission notice are preserved on all copies. @ignore Permission is granted to process this file through TeX and print the results, provided the printed document carries copying permission notice identical to this one except for the removal of this paragraph (this paragraph not being relevant to the printed manual). @end ignore Permission is granted to copy and distribute modified versions of this manual under the conditions for verbatim copying, provided that the entire resulting derived work is distributed under the terms of a permission notice identical to this one. Permission is granted to copy and distribute translations of this manual into another language, under the above conditions for modified versions, except that this permission notice may be stated in a translation approved by the Free Software Foundation. @end ifinfo @titlepage @title Simulavr @subtitle A simulator for the Atmel AVR family of microcontrollers. @subtitle For simulavr version @value{VERSION}, @value{UPDATED}. @author by Theodore A. Roth @page @hfill Send bugs and comments on Simulavr to@* @hfill @w{@email{simulavr-devel@@nongnu.org}} @vskip 0pt plus 1filll Copyright @copyright{} 2001, 2002, 2003, 2004 Theodore A. Roth @sp 2 Permission is granted to make and distribute verbatim copies of this manual provided the copyright notice and this permission notice are preserved on all copies. Permission is granted to copy and distribute modified versions of this manual under the conditions for verbatim copying, provided that the entire resulting derived work is distributed under the terms of a permission notice identical to this one. Permission is granted to copy and distribute translations of this manual into another language, under the above conditions for modified versions, except that this permission notice may be stated in a translation approved by the Free Software Foundation. @end titlepage @comment @shortcontents @contents @c @c Top Node @c @node Top, Introduction, (dir), (dir) @comment node-name, next, previous, up @ifinfo This file documents the simulavr program for simulating Atmel AVR microcontrollers. For simulavr version @value{VERSION}, @value{UPDATED}. @end ifinfo @menu * Introduction:: What is simulavr? * Invoking:: How to run simulavr * Using with GDB:: How to use simulavr with gdb * Display Coprocesses:: How to display the processors state * Internals:: Developing simulavr * Problems:: Reporting bugs * Concept Index:: @end menu @c @c Introduction @c @node Introduction, Invoking, Top, Top @comment node-name, next, previous, up @chapter Introduction: What is simulavr? @cindex introduction @quotation It's just a model. @sp 1 --- Monty Python @end quotation @sp 1 The Simulavr program is a simulator for the Atmel AVR family of microcontrollers. Simulavr can be used either standalone or as a remote target for gdb. When used in gdbserver mode, the simulator is used as a backend so that gdb can be used as a source level debugger for AVR programs. The official website for Simulavr is @uref{http://savannah.nongnu.org/projects/simulavr/}. Because it is protected by the GNU General Public License, users are free to share and change it. Simulavr was written by Theodore A. Roth @c @c Invoking @c @node Invoking, Using with GDB, Introduction, Top @comment node-name, next, previous, up @chapter Invoking Simulavr @cindex invoking @cindex running The format for running the simulavr program is: @example simulavr @var{options} @dots{} [flash_image] @end example If the optional @file{flash_image} file is supplied, it will be loaded into the flash program memory space of the virtual device. @menu * Aliasing:: Simplifying invokation by aliasing. * Options:: Command line options for simulavr. @end menu @c @c Aliasing @c @node Aliasing, Options, Invoking, Invoking @comment node-name, next, previous, up @section Aliasing @cindex aliasing @cindex symbolic linking On most systems, if the simulavr executable is renamed to the name of an available device, it can be started without specifying the device type. The easiest way to achieve this is to create symbolic links for all the supported devices which point to the simulavr executable. For instance, this command will create a sym link for the at90s8515 device on a Unix system: @example ln -s simulavr at90s8515 @end example Once the links have been created, the following two commands are equivalent: @example simulavr -d at90s8515 myprog.bin at90s8515 myprog.bin @end example @c @c Options @c @node Options, , Aliasing, Invoking @comment node-name, next, previous, up @section Options @cindex options @noindent simulavr supports the following options: @table @code @cindex @code{--help} @item --help @itemx -h Print an informative help message describing the options and available device types, then exit. @cindex @code{--debug} @item --debug @itemx -D Print assembly instruction mnemonics and program counter (@samp{PC}) to output as device program is running. @cindex @code{--version} @item --version @itemx -v Print out the version number and exit. @cindex @code{--gdbserver} @item --gdbserver @itemx -g Run as a gdbserver process. @cindex @code{--gdb-debug} @item --gdb-debug @itemx -G Print out messages for debugging the gdb remote serial protocol interface. @cindex @code{--port} @item --port @var{} @itemx -p Listen for gdb connection on TCP port. If not specified, a default will be used. Run @samp{simulavr --help} to see what the default is. This option is ignored if the @option{--gdbserver} is not specified. @cindex @code{--device} @item --device @var{} @itemx -d Specify device type. The device types available for use with a specific version of simulavr can be obtained using the @option{--list-devices} option. @cindex @code{--eeprom-image} @item --eeprom-image @var{} @itemx -e Specify an optional eeprom image file to be loaded into the device's eeprom memory space. @cindex @code{--eeprom-type} @item --eeprom-type @var{} @itemx -E Specify the type of the eeprom image file. If not specified, the default is binary. @cindex @code{--flash-type} @item --flash-type @var{} @itemx -F Specify the type of the flash image file. If not specified, the default is binary. @cindex @code{--list-devices} @item --list-devices @itemx -L Prints a list of supported devices to stdout and exits. @cindex @code{--disp-prog} @item --disp-prog @var{} @itemx -P Specify a program to be used to display register and memory information in real time as a child process. The display program can also be specified by setting the @code{SIM_DISP_PROG} environment variable. @cindex @code{--without-xterm} @item --without-xterm @itemx -X Don't start display coprocess program in an xterm. This is useful if the display coprocess supplies it's own window for input and output, such as a process which uses a GUI. @cindex @code{--core-dump} @item --core-dump @itemx -C Dump a core memory image to file on exit. This isn't as useful as it sounds. The display coprocess mechanism is much more informative. @cindex @code{--clock-freq} @item --clock-freq @var{} @itemx -c Set the simulated mcu clock freqency in Hz. @cindex @code{--breakpoint} @item --breakpoint @var{} @itemx -B Set a breakpoint at @var{}. Note that the break address is interpreted as a byte address instead of a word address. This makes it easier on the user since binutils, gcc and gdb all work in terms of byte addresses. The address can be specified in any base (decimal, hexidecimal, octal, etc). @end table @c @c Using with GDB @c @node Using with GDB, Display Coprocesses, Invoking, Top @comment node-name, next, previous, up @chapter Using with GDB @cindex gdb @cindex gdbserver If you want to use gdb as a source-level debugger with simulavr running as a remote target, start simulavr with the @option{--gdbserver} or @option{-g} option. This will put simulavr into gdbserver mode. simulavr will then act as a TCP server program on the localhost listening for a connection from gdb. Once simulavr has accepted a connection from gdb, the two programs communicate via gdb's remote serial protocol (@pxref{Top, GDB Remote Serial Protocol, Protocol, gdb, Debugging with GDB}). Here's how you would start up simulavr in gdbserver mode: @example @cartouche $ simulavr -d at90s8515 -g @end cartouche @end example Here's a sample gdb session showing what to do on the gdb side to get gdb to talk to simulavr: @example @cartouche This GDB was configured as "--host=i686-pc-linux-gnu --target=avr". (gdb) file demo_kr.elf Reading symbols from demo_kr.elf...done. (gdb) target remote localhost:1212 Remote debugging using localhost:1212 0x0 in .__start_of_init__ () (gdb) load Loading section .text, size 0x76 lma 0x0 Start address 0x0 , load size 118 Transfer rate: 944 bits in <1 sec, 29 bytes/write. (gdb) break main Breakpoint 1 at 0x6e: file demo_kr.c, line 17. (gdb) continue Continuing. Breakpoint 1, main () at demo_kr.c:17 17 sbi(DDRC, ( (gdb) quit The program is running. Exit anyway? (y or n) y @end cartouche @end example Notice that simulavr knew nothing about the program to debug when it was started. Gdb was told which file to debug with the @samp{file} command. After gdb has read in the program and connected to simulavr, the program's instructions are downloaded into the simulator via the @samp{load} command. The @samp{load} command is not necessary if simulavr already has the program loaded into it's flash memory area. It is ok to issue multiple @samp{load} commands. Also, notice that no @samp{run} command was given to gdb. Gdb assumes that the simulator has started and is ready to continue. Giving gdb the @samp{run} command, will cause it to stop the current debug session and start a new one, which is not likely to be what you want to do. When specifying the remote target to connect to, it is sufficient to write ``target remote :1212'' instead of ``target remote localhost:1212''. Hitting @kbd{CTRL-c} in gdb can be used to interrupt the simulator while it is processing instructions and return control back to gdb. This is most useful when gdb is waiting for a response from the simulator and the program running in the simulator is in an infinite loop. Issuing a @samp{signal SIGxxx} command from gdb will send the signal to the simulator via a @i{continue with signal} packet. The simulator will process and interpret the signal, but will not pass it on to the AVR program running in the simulator since it really makes no sense to do so. In some circumstances, it may make sense to use the gdb signal mechanism as a way to initiate some sort of external stimulus to be passed on to the virtual hardware system of the simulator. Signals from gdb which are processed have the following meanings: @table @code @cindex SIGHUP, from gdb @item SIGHUP Initiate a reset of the simulator. (Simulates a hardware reset). @end table @c @c GDB Hints @c @menu * GDB Hints:: * Building GDB:: @end menu @node GDB Hints, Building GDB, Using with GDB, Using with GDB @comment node-name, next, previous, up @section GDB Hints @cindex gdb, hints Since debugging an AVR program with gdb requires gdb to connect to a remote target (either simulavr or some other debugging tool, such as avarice), a series of commands must be issued every time gdb is started. The easiest way around this is to put the commands into a @file{.gdbinit} file in the project directory. The following example is from a @file{.gdbinit} which I use for many projects. @example @cartouche ## Print out structures in a sane way echo (gdb) set print pretty set print pretty ## Use this for debugging the remote protocol. (Don't use unless ## debugging simulavr or avr-gdb) #echo (gdb) set debug remote 1\n #set debug remote 1 ## If you don't want specify the program to debug when invoking gdb, ## you can tell gdb to read it in here. The file should be an elf file ## compiled with debugging information (-g for C files and -gstabs for ## asm files). #echo (gdb) file myprog.elf\n #file myprog.elf ## Connect to the remote target via a TCP socket on host:port. echo (gdb) target remote localhost:1212\n target remote localhost:1212 ## If you are using simulavr as the remote target, this will upload ## the program into flash memory for you. echo (gdb) load\n load ## Set a break point at the beginning of main(). echo (gdb) break main\n break main ## Run the program up to the first break point. Gdb's `run` command ## does not work when using a remote target, must use continue. echo (gdb) continue\n continue @end cartouche @end example As you can see, I @code{echo} every command so I can see what gdb has done when it runs the commands in the @file{.gdbinit} file. @c @c Building GDB for AVR @c @node Building GDB, , GDB Hints, Using with GDB @comment node-name, next, previous, up @section Building GDB for AVR @cindex gdb, building @cindex avr-gdb In order to use simulavr as a backend to gdb, you must build a special AVR version of gdb. All gdb versions starting with gdb-5.2.1 officially support the AVR target. You can just configure gdb with the @code{--target=avr} option. For example, you can use this procedure to install avr-gdb in /usr/local/bin: @example @cartouche $ ./configure --target=avr $ make $ su # make install # exit @end cartouche @end example @c @c Display Coprocesses @c @node Display Coprocesses, Internals, Using with GDB, Top @comment node-name, next, previous, up @chapter Display Coprocesses @cindex display @cindex display protocol @cindex @code{SIM_DISP_PROG} @cindex @code{SIM_PIPE_FD} This chapter documents the protocol that simulavr uses to pass register and memory information to a display coprocess. A display coprocess is a separate program started by simulavr for the sole purpose of displaying register and memory information while an AVR program is running in the simulator. Using a separate program and a standardized communication protocol, keeps the simulavr code simpler and allows for a variety of display programs to be used. When the user asks simulavr to display register and memory information during execution, simulavr will start a coprocess to perform the display work. A pipe will be opened in simulavr into which the data will be written using the following commands: @multitable @columnfractions .30 .70 @item @samp{q} @tab Quit. @item @samp{r:} @tab Set register to val. @item @samp{p} @tab Set program counter to val. @item @samp{i:} @tab Set io register to val. @item @samp{I:} @tab Set io register name. @item @samp{s,:XX} @tab Set sram addrs to values (one XX pair per addr). @item @samp{e,:XX} @tab Set eeprom addrs to values (one XX pair per addr). @item @samp{f,:XXXX} @tab Set flash addrs to values (one XXXX quad per addr). @item @samp{n} @tab Update the number of clock ticks. @end multitable All values are hexidecimal numbers, except for which is a string. In order for the display process to know which pipe to read the information, it must handle either the @samp{--pfd } option or check the @code{SIM_PIPE_FD} enviroment variable. The value passed using either method will be the file descriptor number of the pipe from which the display prgram will read the informtion. Simulavr will start all display programs like so (sizes are decimal numbers of bytes and sram_start is just the decimal address of the first byte of sram, usually 0x60 [96] or 0x100 [256]): @samp{ --pfd } The user can specify the display program to use via the @samp{--disp-prog} option to simulavr or using the @code{SIM_DISP_PROG} environment variable. If both are not specified, then no display will be used. @c @c Simulavr Internals @c @node Internals, Problems, Display Coprocesses, Top @comment node-name, next, previous, up @chapter Simulavr Internals @cindex internals @cindex developing Simulavr internals are documented using the doxygen system to automate generation of the documentation from the source code comments. The documentation for the latest release is always available at: @uref{http://savannah.nongnu.org/download/simulavr/doc/internals_html/} The most up-to-date documents will most likely be those in the source code itself. If you wish to help develop simulavr, it is highly recommended that you get the latest source from cvs and consult the internals documents there. @c @c Problems @c @node Problems, Concept Index, Internals, Top @comment node-name, next, previous, up @chapter Reporting Bugs @cindex bugs @cindex problems If you find a bug in simulavr, please send electronic mail to @w{@email{simulavr-devel@@nongnu.org}}. Include the version number, which you can find by running @w{@samp{simulavr --version}}. Also include in your message the output that simulavr produced, a simple AVR program which reproduces the bug, and the output you expected. If you are using avr-gdb also include the version number reported by @w{@samp{avr-gdb --version}}. If you have other questions, comments or suggestions about simulavr, contact me via electronic mail at the above address. @c @c Concept Index @c @node Concept Index, , Problems, Top @comment node-name, next, previous, up @unnumbered Concept Index @printindex cp @bye simulavr-0.1.2.2/doc/dox.css0000644000175000001440000000223407431561353012512 00000000000000H1 { text-align: center; } A.qindex {} A.qindexRef {} A.el { text-decoration: none; font-weight: bold } A.elRef { font-weight: bold } A.code { text-decoration: none; font-weight: normal; color: #4444ee } A.codeRef { font-weight: normal; color: #4444ee } A:hover { text-decoration: none; background-color: #f2f2ff } DL.el { margin-left: -1cm } DIV.fragment { width: 100%; border: none; background-color: #eeeeee } DIV.ah { background-color: black; font-weight: bold; color: #ffffff; margin-bottom: 3px; margin-top: 3px } TD.md { background-color: #f2f2ff; font-weight: bold; } TD.mdname1 { background-color: #f2f2ff; font-weight: bold; color: #602020; } TD.mdname { background-color: #f2f2ff; font-weight: bold; color: #602020; width: 600px; } DIV.groupHeader { margin-left: 16px; margin-top: 12px; margin-bottom: 6px; font-weight: bold } DIV.groupText { margin-left: 16px; font-style: italic; font-size: smaller } FONT.keyword { color: #008000 } FONT.keywordtype { color: #604020 } FONT.keywordflow { color: #e08000 } FONT.comment { color: #800000 } FONT.preprocessor { color: #806020 } FONT.stringliteral { color: #002080 } FONT.charliteral { color: #008080 } simulavr-0.1.2.2/doc/dox_html_header0000644000175000001440000000042707431561353014261 00000000000000 Main Page simulavr-0.1.2.2/doc/dox_html_footer0000644000175000001440000000017007431561353014322 00000000000000

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simulavr-0.1.2.2/doc/main.dox0000644000175000001440000003113307754115133012645 00000000000000/* -*- mode: text -*- * $Id: main.dox,v 1.2 2003/11/11 08:14:19 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* * This file is only for documentation. There should never be any real code in * this file. * * Note: that each \page must be in it's own comment block. * * Note: section and page names must only contain the characters [a-z0-9_]. * * Note: You must use C++ style comments within code examples. */ /** \mainpage Simulavr Internals \section intro Introduction \addindex introduction This chapter documents the internals of simulavr for those wishing to work with the source code to fix bugs, add features, or to just see how it all works. If you only wish to know how to use simulavr, you don't need to read this. Internals Topics: - \link memory_management Memory Management \endlink - \link object_system Objects \endlink - \link insn_decoder Instruction Decoder \endlink - \link interrupts Interrupts \endlink - \link virtual_devs Virtual Devices \endlink - \link ext_devs External Devices \endlink - \link break_watch_pts Breakpoints and Watchpoints \endlink */ /** \page memory_management Memory Management \addindex memory management Every program ever written has had to deal with memory management. Simulavr is no exception. For portability and to potentially aid in memory debugging, simulavr supplies it's own functions and macros for handling the allocation and releasing of memory resources. For memory which could be used by many differing parts of the simulator, an object referencing system has been implemented (see \ref object_system). \section memory_functions Memory Functions \addindex memory functions The following functions provide wrappers for all library functions that return memory which simulavr must manage. - avr_malloc() - avr_malloc0() - avr_realloc() - avr_strdup() - avr_free() All functions which return allocated memory will only return if the allocation was successful. If the allocation failed, an error message is issued and the program is aborted. Thus, the developer does not need write any code to check the returned value. \section memory_macros Memory Macros \addindex memory macros The following C-preprocessor macro definitions are provided for convenience and should be used instead of the underlying functions. These macros relieve the programmer from having to perform manual type-casting thus making the code easier to read. - avr_new() - avr_new0() - avr_renew() */ /** \page object_system Objects \addindex objects Simulavr uses a simple object oriented system for handling the data structure creation and destruction. Since simulavr is written in C, a class system must be manually implemented and the basis for this class system is the AvrClass structure. All higher level structures are ultimately based on the AvrClass structure. How the AvrClass structure is defined is not as import as how it is used as a base or parent class structure. A concrete example of simulavr's object system will be discussed (see \ref example_derived_class), but before jumping into the example, the AvrClass method functions will be introduced. \section avrclass AvrClass Methods The following functions provide the user interfaces to the AvrClass structure. - class_new() - class_construct() - class_destroy() - class_overload_destroy() - class_ref() - class_unref() All classes must provide their own creation function, \_new(). The purpose of the creation function is to: - Allocate memory for the class's data structure. - Call class_overload_destroy() to install the class's own destroy method. - Call the class's constructor method to fill in the data structure information. \section example_derived_class Derived Class Example \addindex example, derived class Simulavr's inheritance mechanism is a little more complicated than that of C++, but is still relatively easy to use once it is understood. An example should make it clear how the system works. First we need to create some objects. Assume that we need to add two new objects to simulavr, \c foo and \c bar. To keep things simple, they are both integers. Another requirement is that any time we need to access a \c foo, we'll also need to access a \c bar, but sometimes we only need a \c bar without a \c foo. Thus, we will have a class hierarchy \c FooClass->BarClass->AvrClass, or \c FooClass derives from \c BarClass which derives from \c AvrClass. To achieve this, we create the following two data structures: \addindex BarClass structure definition \addindex BarClass \addindex FooClass structure definition \addindex FooClass \code // Define BarClass with AvrClass as parent typedef struct _BarClass BarClass; struct _BarClass { AvrClass parent; int bar; }; // Define FooClass with BarClass as parent typedef struct _FooClass FooClass; struct _FooClass { BarClass parent; int foo; }; \endcode Notice that in both struct definitions, the parent element is not a pointer. When you allocate memory for a \c BarClass, you automatically allocate memory for an \c AvrClass at the same time. It's important that the parent is always the first element of any derived class structure. The trick here is that once we have a class object, we can get at any object in it's class hierarchy with a simple type-cast. \code void func( void ) { int num; FooClass *Foo = foo_new( 12, 21 ); // get foo from FooClass num = Foo->foo; // get bar from BarClass num = ((BarClass *)Foo)->bar; class_unref( (AvrClass *)Foo ); } \endcode Although the example above works, it assumes that the programmer knows what the \c FooClass and \c BarClass structures look like. The programmer has broken the encapsulation of both \c FooClass and \c BarClass objects. To solve this problem, we need to write method functions for both classes. Here's the methods for \c BarClass: \addindex BarClass \code // BarClass allocator BarClass *bar_new( int bar ) { BarClass *bc; bc = avr_new( BarClass, 1 ); bar_construct( bc, bar ); class_overload_destroy( (AvrClass *)bc, bar_destroy ); return bc; } // BarClass constructor void bar_construct( BarClass *bc, int bar ) { class_construct( (AvrClass *)bc ); bc->bar = bar; } // BarClass destructor void bar_destroy( void *bc ) { if (bc == NULL) return; class_destroy( bc ); } // BarClass public data access methods int bar_get_bar( BarClass *bc ) { return bc->bar; } void bar_set_bar( BarClass *bc, int val ) { bc->bar = val; } \endcode And here's the methods for \c FooClass: \addindex FooClass \code // FooClass allocator FooClass *foo_new( int foo, int bar ) { FooClass *fc; fc = avr_new( FooClass, 1 ); foo_construct( fc, foo, bar ); class_overload_destroy( (AvrClass *)fc, foo_destroy ); return fc; } // FooClass constructor void foo_construct( FooClass *fc, int foo, bar ) { bar_construct( (BarClass *)fc, bar ); fc->foo = foo; } // FooClass destructor void foo_destroy( void *fc ) { if (fc == NULL) return; class_destroy( fc ); } // FooClass public data access methods int foo_get_foo( FooClass *fc ) { return fc->foo; } void foo_set_foo( FooClass *fc, int val ) { fc->foo = val; } int foo_get_bar( FooClass *fc ) { return bar_get_bar( (BarClass *)fc ); } void foo_set_bar( FooClass *fc, int val ) { bar_set_bar( (BarClass *)fc, val ); } \endcode Take a good look at the \c *_new(), \c *_construct() and \c *_destroy() functions in the above examples and make sure you understand what's going on. Of particluar importance is how the constructor and destructor functions are chained up along the various classes. This pattern is used extensively throughout the simulavr source code and once understood, makes some complicated concepts incredibly easy to implement. Now that we have the method functions, we can rewrite our original example function without the broken encapsulation. \code void func( void ) { int num; FooClass *Foo = foo_new( 12, 21 ); num = foo_get_foo( Foo ); num = foo_get_bar( Foo ); class_unref( (AvrClass *)Foo ); } \endcode Now that's better, but you might think that we are breaking encapsulation when we cast \c Foo to \c AvrClass. Well, in a way we are, but since \em all class objects \em must be derived from \c AvrClass either directly or indirectly, this is acceptable. \section object_refencing Object Referencing \addindex object referencing You may have noticed by this point that we haven't called avr_free() to free the memory we allocated for our objects. We called class_unref() instead. This mechanism allows us to store many references to a single object without having to keep track of all of them. The only thing we must do when we store a reference to an object in a new variable, is call class_ref() on the object. Then, when that stored reference is no longer needed, we simply call class_unref() on the object. Once the reference count reaches zero, the object's destroy method is automatically called for us. The only hard part for us is knowing when to ref and unref the object. Here's an example from the simulavr code for callbacks: \code void callback_construct( CallBack *cb, CallBack_FP func, AvrClass *data ) { if (cb == NULL) avr_error( "passed null ptr"); class_construct( (AvrClass *)cb ); cb->func = func; cb->data = data; class_ref( data ); } void callback_destroy( void *cb ) { CallBack *_cb = (CallBack *)cb; if (cb == NULL) return; class_unref( _cb->data ); class_destroy( cb ); } \endcode Notice that \c data is a pointer to \c AvrClass and thus can be any class defined by simulavr. \c CallBack is another class which happens to store a reference to \c data and must therefore call class_ref() on the \c data object. When the callback is destroyed (because the reference count reached zero), the callback destroy method calls class_unref() on the \c data object. It is assumed that the original reference to \c data still exists when the callback is created, but may or may not exist when the callback is destroyed. */ /** \page insn_decoder Instruction Decoder \addindex instruction decoder Instruction decoding and processing is implemented in the \c decode.c file. The heart of the instruction decoder is the decode_opcode() function. The decode_opcode() function examines the given opcode to determine which instruction applies and returns a pointer to a function to handle performing the instruction's operation. If the given opcode does not map to an instruction handler, \c NULL is returned indicating an invalid instruction. Nearly every instruction in Atmel's Instruction Set Data Sheet will have a handler function defined. Each handler will perform all the operations described in the data sheet for a given instruction. A few instructions have synonyms. For example, \c CBR is a synonym for \c ANDI. This should all be fairly straight forward. */ /** \page interrupts Interrupts \addindex interrupts \b FIXME: empty place holder */ /** \page virtual_devs Virtual Devices \addindex virtual devices \b FIXME: empty place holder */ /** \page ext_devs External Devices \addindex external devices \b FIXME: empty place holder */ /** \page break_watch_pts Breakpoints and Watchpoints \addindex breakpoints \addindex watchpoints Using gdb, it is possible to set breakpoints. Watch points are not currently implemented. \b This \b is \b only \b an \b idea \b right \b now: The way breakpoints are implemented within simulavr, it would be possible at init time to read a file containing breakpoint information. Then, as breakpoints are reached, have something happen which allows the user to check the state of the program. Anyone interested in implementing this, please step forward. */ simulavr-0.1.2.2/doc/simulavr.info0000644000175000001440000004353610204750217013726 00000000000000This is simulavr.info, produced by makeinfo version 4.7 from simulavr.texi. INFO-DIR-SECTION AVR Programming & development tools. START-INFO-DIR-ENTRY * Simulavr: (simulavr). A simulator for Atmel AVR microcontrollers. END-INFO-DIR-ENTRY This file documents the simulavr program. For simulavr version 0.1.2.2, 18 January 2004. Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth Permission is granted to make and distribute verbatim copies of this manual provided the copyright notice and this permission notice are preserved on all copies. Permission is granted to copy and distribute modified versions of this manual under the conditions for verbatim copying, provided that the entire resulting derived work is distributed under the terms of a permission notice identical to this one. Permission is granted to copy and distribute translations of this manual into another language, under the above conditions for modified versions, except that this permission notice may be stated in a translation approved by the Free Software Foundation.  File: simulavr.info, Node: Top, Next: Introduction, Prev: (dir), Up: (dir) This file documents the simulavr program for simulating Atmel AVR microcontrollers. For simulavr version 0.1.2.2, 18 January 2004. * Menu: * Introduction:: What is simulavr? * Invoking:: How to run simulavr * Using with GDB:: How to use simulavr with gdb * Display Coprocesses:: How to display the processors state * Internals:: Developing simulavr * Problems:: Reporting bugs * Concept Index::  File: simulavr.info, Node: Introduction, Next: Invoking, Prev: Top, Up: Top 1 Introduction: What is simulavr? ********************************* It's just a model. -- Monty Python The Simulavr program is a simulator for the Atmel AVR family of microcontrollers. Simulavr can be used either standalone or as a remote target for gdb. When used in gdbserver mode, the simulator is used as a backend so that gdb can be used as a source level debugger for AVR programs. The official website for Simulavr is `http://savannah.nongnu.org/projects/simulavr/'. Because it is protected by the GNU General Public License, users are free to share and change it. Simulavr was written by Theodore A. Roth  File: simulavr.info, Node: Invoking, Next: Using with GDB, Prev: Introduction, Up: Top 2 Invoking Simulavr ******************* The format for running the simulavr program is: simulavr OPTIONS ... [flash_image] If the optional `flash_image' file is supplied, it will be loaded into the flash program memory space of the virtual device. * Menu: * Aliasing:: Simplifying invokation by aliasing. * Options:: Command line options for simulavr.  File: simulavr.info, Node: Aliasing, Next: Options, Prev: Invoking, Up: Invoking 2.1 Aliasing ============ On most systems, if the simulavr executable is renamed to the name of an available device, it can be started without specifying the device type. The easiest way to achieve this is to create symbolic links for all the supported devices which point to the simulavr executable. For instance, this command will create a sym link for the at90s8515 device on a Unix system: ln -s simulavr at90s8515 Once the links have been created, the following two commands are equivalent: simulavr -d at90s8515 myprog.bin at90s8515 myprog.bin  File: simulavr.info, Node: Options, Prev: Aliasing, Up: Invoking 2.2 Options =========== simulavr supports the following options: `--help' `-h' Print an informative help message describing the options and available device types, then exit. `--debug' `-D' Print assembly instruction mnemonics and program counter (`PC') to output as device program is running. `--version' `-v' Print out the version number and exit. `--gdbserver' `-g' Run as a gdbserver process. `--gdb-debug' `-G' Print out messages for debugging the gdb remote serial protocol interface. `--port ' `-p' Listen for gdb connection on TCP port. If not specified, a default will be used. Run `simulavr --help' to see what the default is. This option is ignored if the `--gdbserver' is not specified. `--device ' `-d' Specify device type. The device types available for use with a specific version of simulavr can be obtained using the `--list-devices' option. `--eeprom-image ' `-e' Specify an optional eeprom image file to be loaded into the device's eeprom memory space. `--eeprom-type ' `-E' Specify the type of the eeprom image file. If not specified, the default is binary. `--flash-type ' `-F' Specify the type of the flash image file. If not specified, the default is binary. `--list-devices' `-L' Prints a list of supported devices to stdout and exits. `--disp-prog ' `-P' Specify a program to be used to display register and memory information in real time as a child process. The display program can also be specified by setting the `SIM_DISP_PROG' environment variable. `--without-xterm' `-X' Don't start display coprocess program in an xterm. This is useful if the display coprocess supplies it's own window for input and output, such as a process which uses a GUI. `--core-dump' `-C' Dump a core memory image to file on exit. This isn't as useful as it sounds. The display coprocess mechanism is much more informative. `--clock-freq ' `-c' Set the simulated mcu clock freqency in Hz. `--breakpoint ' `-B' Set a breakpoint at . Note that the break address is interpreted as a byte address instead of a word address. This makes it easier on the user since binutils, gcc and gdb all work in terms of byte addresses. The address can be specified in any base (decimal, hexidecimal, octal, etc).  File: simulavr.info, Node: Using with GDB, Next: Display Coprocesses, Prev: Invoking, Up: Top 3 Using with GDB **************** If you want to use gdb as a source-level debugger with simulavr running as a remote target, start simulavr with the `--gdbserver' or `-g' option. This will put simulavr into gdbserver mode. simulavr will then act as a TCP server program on the localhost listening for a connection from gdb. Once simulavr has accepted a connection from gdb, the two programs communicate via gdb's remote serial protocol (*note GDB Remote Serial Protocol: (gdb)Top.). Here's how you would start up simulavr in gdbserver mode: $ simulavr -d at90s8515 -g Here's a sample gdb session showing what to do on the gdb side to get gdb to talk to simulavr: This GDB was configured as "--host=i686-pc-linux-gnu --target=avr". (gdb) file demo_kr.elf Reading symbols from demo_kr.elf...done. (gdb) target remote localhost:1212 Remote debugging using localhost:1212 0x0 in .__start_of_init__ () (gdb) load Loading section .text, size 0x76 lma 0x0 Start address 0x0 , load size 118 Transfer rate: 944 bits in <1 sec, 29 bytes/write. (gdb) break main Breakpoint 1 at 0x6e: file demo_kr.c, line 17. (gdb) continue Continuing. Breakpoint 1, main () at demo_kr.c:17 17 sbi(DDRC, ( (gdb) quit The program is running. Exit anyway? (y or n) y Notice that simulavr knew nothing about the program to debug when it was started. Gdb was told which file to debug with the `file' command. After gdb has read in the program and connected to simulavr, the program's instructions are downloaded into the simulator via the `load' command. The `load' command is not necessary if simulavr already has the program loaded into it's flash memory area. It is ok to issue multiple `load' commands. Also, notice that no `run' command was given to gdb. Gdb assumes that the simulator has started and is ready to continue. Giving gdb the `run' command, will cause it to stop the current debug session and start a new one, which is not likely to be what you want to do. When specifying the remote target to connect to, it is sufficient to write "target remote :1212" instead of "target remote localhost:1212". Hitting `CTRL-c' in gdb can be used to interrupt the simulator while it is processing instructions and return control back to gdb. This is most useful when gdb is waiting for a response from the simulator and the program running in the simulator is in an infinite loop. Issuing a `signal SIGxxx' command from gdb will send the signal to the simulator via a continue with signal packet. The simulator will process and interpret the signal, but will not pass it on to the AVR program running in the simulator since it really makes no sense to do so. In some circumstances, it may make sense to use the gdb signal mechanism as a way to initiate some sort of external stimulus to be passed on to the virtual hardware system of the simulator. Signals from gdb which are processed have the following meanings: `SIGHUP' Initiate a reset of the simulator. (Simulates a hardware reset). * Menu: * GDB Hints:: * Building GDB::  File: simulavr.info, Node: GDB Hints, Next: Building GDB, Prev: Using with GDB, Up: Using with GDB 3.1 GDB Hints ============= Since debugging an AVR program with gdb requires gdb to connect to a remote target (either simulavr or some other debugging tool, such as avarice), a series of commands must be issued every time gdb is started. The easiest way around this is to put the commands into a `.gdbinit' file in the project directory. The following example is from a `.gdbinit' which I use for many projects. ## Print out structures in a sane way echo (gdb) set print pretty set print pretty ## Use this for debugging the remote protocol. (Don't use unless ## debugging simulavr or avr-gdb) #echo (gdb) set debug remote 1\n #set debug remote 1 ## If you don't want specify the program to debug when invoking gdb, ## you can tell gdb to read it in here. The file should be an elf file ## compiled with debugging information (-g for C files and -gstabs for ## asm files). #echo (gdb) file myprog.elf\n #file myprog.elf ## Connect to the remote target via a TCP socket on host:port. echo (gdb) target remote localhost:1212\n target remote localhost:1212 ## If you are using simulavr as the remote target, this will upload ## the program into flash memory for you. echo (gdb) load\n load ## Set a break point at the beginning of main(). echo (gdb) break main\n break main ## Run the program up to the first break point. Gdb's `run` command ## does not work when using a remote target, must use continue. echo (gdb) continue\n continue As you can see, I `echo' every command so I can see what gdb has done when it runs the commands in the `.gdbinit' file.  File: simulavr.info, Node: Building GDB, Prev: GDB Hints, Up: Using with GDB 3.2 Building GDB for AVR ======================== In order to use simulavr as a backend to gdb, you must build a special AVR version of gdb. All gdb versions starting with gdb-5.2.1 officially support the AVR target. You can just configure gdb with the `--target=avr' option. For example, you can use this procedure to install avr-gdb in /usr/local/bin: $ ./configure --target=avr $ make $ su # make install # exit  File: simulavr.info, Node: Display Coprocesses, Next: Internals, Prev: Using with GDB, Up: Top 4 Display Coprocesses ********************* This chapter documents the protocol that simulavr uses to pass register and memory information to a display coprocess. A display coprocess is a separate program started by simulavr for the sole purpose of displaying register and memory information while an AVR program is running in the simulator. Using a separate program and a standardized communication protocol, keeps the simulavr code simpler and allows for a variety of display programs to be used. When the user asks simulavr to display register and memory information during execution, simulavr will start a coprocess to perform the display work. A pipe will be opened in simulavr into which the data will be written using the following commands: `q' Quit. `r:' Set register to val. `p' Set program counter to val. `i:' Set io register to val. `I:' Set io register name. `s,:XX' Set sram addrs to values (one XX pair per addr). `e,:XX' Set eeprom addrs to values (one XX pair per addr). `f,:XXXX' Set flash addrs to values (one XXXX quad per addr). `n' Update the number of clock ticks. All values are hexidecimal numbers, except for which is a string. In order for the display process to know which pipe to read the information, it must handle either the `--pfd ' option or check the `SIM_PIPE_FD' enviroment variable. The value passed using either method will be the file descriptor number of the pipe from which the display prgram will read the informtion. Simulavr will start all display programs like so (sizes are decimal numbers of bytes and sram_start is just the decimal address of the first byte of sram, usually 0x60 [96] or 0x100 [256]): ` --pfd ' The user can specify the display program to use via the `--disp-prog' option to simulavr or using the `SIM_DISP_PROG' environment variable. If both are not specified, then no display will be used.  File: simulavr.info, Node: Internals, Next: Problems, Prev: Display Coprocesses, Up: Top 5 Simulavr Internals ******************** Simulavr internals are documented using the doxygen system to automate generation of the documentation from the source code comments. The documentation for the latest release is always available at: `http://savannah.nongnu.org/download/simulavr/doc/internals_html/' The most up-to-date documents will most likely be those in the source code itself. If you wish to help develop simulavr, it is highly recommended that you get the latest source from cvs and consult the internals documents there.  File: simulavr.info, Node: Problems, Next: Concept Index, Prev: Internals, Up: Top 6 Reporting Bugs **************** If you find a bug in simulavr, please send electronic mail to . Include the version number, which you can find by running `simulavr --version'. Also include in your message the output that simulavr produced, a simple AVR program which reproduces the bug, and the output you expected. If you are using avr-gdb also include the version number reported by `avr-gdb --version'. If you have other questions, comments or suggestions about simulavr, contact me via electronic mail at the above address.  File: simulavr.info, Node: Concept Index, Prev: Problems, Up: Top Concept Index ************* [index] * Menu: * --breakpoint: Options. (line 85) * --clock-freq: Options. (line 81) * --core-dump: Options. (line 75) * --debug: Options. (line 13) * --device: Options. (line 37) * --disp-prog: Options. (line 62) * --eeprom-image: Options. (line 43) * --eeprom-type: Options. (line 48) * --flash-type: Options. (line 53) * --gdb-debug: Options. (line 26) * --gdbserver: Options. (line 22) * --help: Options. (line 8) * --list-devices: Options. (line 58) * --port: Options. (line 31) * --version: Options. (line 18) * --without-xterm: Options. (line 69) * aliasing: Aliasing. (line 6) * avr-gdb: Building GDB. (line 6) * bugs: Problems. (line 6) * developing: Internals. (line 6) * display: Display Coprocesses. (line 6) * display protocol: Display Coprocesses. (line 6) * gdb: Using with GDB. (line 6) * gdb, building: Building GDB. (line 6) * gdb, hints: GDB Hints. (line 6) * gdbserver: Using with GDB. (line 6) * internals: Internals. (line 6) * introduction: Introduction. (line 6) * invoking: Invoking. (line 6) * options: Options. (line 6) * problems: Problems. (line 6) * running: Invoking. (line 6) * SIGHUP, from gdb: Using with GDB. (line 73) * SIM_DISP_PROG: Display Coprocesses. (line 6) * SIM_PIPE_FD: Display Coprocesses. (line 6) * symbolic linking: Aliasing. (line 6)  Tag Table: Node: Top1078 Node: Introduction1657 Node: Invoking2385 Node: Aliasing2884 Node: Options3545 Node: Using with GDB6080 Node: GDB Hints9333 Node: Building GDB11152 Node: Display Coprocesses11680 Node: Internals13922 Node: Problems14565 Node: Concept Index15218  End Tag Table simulavr-0.1.2.2/regress/0000777000175000001440000000000010204750217012165 500000000000000simulavr-0.1.2.2/regress/README0000644000175000001440000000031107432264133012762 00000000000000Requirements: simulavr-0.0.13 or greater (savannah.gnu.org/projects/simulavr) python-2.1.1 or greater (www.python.org) See the top-level INSTALL file for examples of running the regression tests. simulavr-0.1.2.2/regress/Makefile.am0000644000175000001440000000103107434534006014137 00000000000000# # $Id: Makefile.am,v 1.2 2002/02/19 20:39:34 troth Exp $ # MAINTAINERCLEANFILES = Makefile.in stamp-vti EXTRA_DIST = README regress.py.in SUBDIRS = modules test_opcodes check-local: regression clean-local: rm -f *.py[co] *.err *.out rm -f $(srcdir)/modules/*.py[co] rm -f $(srcdir)/test_*/*.py[co] regression: if COND_HAS_PYTHON python regress.py 2> regress.err | tee regress.out else @echo " Configure could not find python on your system so regression" @echo " tests can not be automated." endif simulavr-0.1.2.2/regress/Makefile.in0000644000175000001440000003521710204750203014151 00000000000000# Makefile.in generated by automake 1.8.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # # 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############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: regress.py.in,v 1.9 2003/03/25 20:09:37 troth Exp $ # # # @configure_input@ import os, sys, fnmatch, glob # Check the python version _v = sys.version_info _ver = (int(_v[0]) << 16) + (int(_v[1]) << 8) + int(_v[2]) if _ver < 0x020101: sys.write('You need python >= 2.1.1 to run this program.\n') sys.write('Your python version is:\n%s\n' %(sys.version)) sys.exit(1) # This should let you run the regress.py.in script directly for testing. # Remember that configure will replace '@@'. if '@srcdir@' == '@'+'srcdir'+'@': srcdir = '.' else: srcdir = '@srcdir@' regressdir = os.getcwd() # Change dir to srcdir so that building in other dir works os.chdir(srcdir) # default path to simulator sim_path = regressdir+'/../src/simulavr' # Add modules dir to module search path sys.path.append('modules') import avr_target, base_test """Main regression test driver program. Test cases are organised into three levels: directories -> modules -> classes. Directories are the most generic and classes are the most specific. This program will search the current directory for subdirectories with names matching 'test_*'. Each matching subdirectory will be searched for python modules with names matching test_*.py. Each module will be loaded and the attributes searched for classes with names beginning with 'test_'. Each class will perform a single test and if the test fails, an exception derived from base_test.TestFail is raised to indicate that the test has failed. There can be many matches are each level. """ EXIT_STATUS_PASS = 0 EXIT_STATUS_FAIL = 1 def run_tests(target, tdir=None, tmodule=None, tname=None): result = EXIT_STATUS_PASS num_tests = 0 num_passes = 0 num_fails = 0 start_time = os.times()[4] if tdir is None: test_dirs = glob.glob('test_*') else: if tdir[:5] != 'test_': tdir = 'test_'+tdir test_dirs = [tdir] for test_dir in test_dirs: if tmodule is None: try: test_modules = os.listdir(test_dir) except OSError: # problem getting dir listing, go to next dir continue else: if tmodule[:5] != 'test_': tmodule = 'test_'+tmodule if tmodule[-3:] != '.py': tmodule += '.py' test_modules = [tmodule] print '='*8 + ' running tests in %s directory' % (test_dir) # add tests dir to module search patch sys.path.append(test_dir) # Loop through all files in test dir for file in test_modules: # skip files which are not test modules (test modules are 'test_*.py') if not fnmatch.fnmatch(file, 'test_*.py'): continue # get test module name by stripping off .py from file name test_module_name = file[:-3] print '-'*4 + ' loading tests from %s module' %(test_module_name) test_module = __import__(test_module_name) if tname is None: test_names = dir(test_module) else: if tname[:5] != 'test_': tname = 'test_'+tname test_names = [tname] # Loop through all attributes of test_module for test_name in test_names: # If attribute is not a test case, skip it. if test_name[:5] != 'test_': continue try: # Create an instance of the test case object and run it test = apply( getattr(test_module,test_name), (target,) ) print '%-30s -> ' %(test_name), test.run() except base_test.TestFail, reason: print 'FAILED: %s' %(reason) num_fails += 1 # Could also do a sys.exit(1) here is user wishes result = EXIT_STATUS_FAIL else: num_passes += 1 print 'passed' num_tests += 1 # reset the target after each test target.reset() test_names = None test_modules = None # remove test_dir from the module search path sys.path.remove(test_dir) elapsed = os.times()[4] - start_time print print 'Ran %d tests in %.3f seconds [%0.3f tests/second].' % \ (num_tests, elapsed, num_tests/elapsed) print ' Number of Passing Tests: %d' %(num_passes) print ' Number of Failing Tests: %d' %(num_fails) print return result def usage(): print >> sys.stderr, """ Usage: regress.py [options] [[test_]dir] [[test_]module[.py]] [[test_]case] The 'test_' prefix on all args is optional. The '.py' extension on the test_module arg is also optional. Options: -h, --help : print this message and exit -s, --sim= : path to simulavr executable --stall : stall the regression engine when done """ sys.exit(1) def run_simulator(prog, port=1212, dev="at90s8515"): """Attempt to start up a simulator and return pid. """ # Check if prog file exists if not os.path.isfile(prog): print >> sys.stderr, '%s does not exist' %(prog) sys.exit(1) pid = os.fork() if pid == 0: # child process sys.stdout.close() sys.stderr.close() out = os.open(regressdir+'/sim.out', os.O_WRONLY | os.O_CREAT | os.O_TRUNC, 0644) os.dup2(out, 1) os.close(out) err = os.open(regressdir+'/sim.err', os.O_WRONLY | os.O_CREAT | os.O_TRUNC, 0644) os.dup2(err, 2) os.close(err) os.execlp( prog, prog, '-g', '-G', '-d', dev, '-p', str(port) ) assert 0, 'error starting program' # should never get here. return pid if __name__ == '__main__': import getopt, time, socket, signal # Parse command line options try: opts, args = getopt.getopt(sys.argv[1:], "hs:", ["help", "sim=", "stall"]) except getopt.GetoptError: # print help information and exit: usage() stall = 0 for o, a in opts: if o in ("-h", "--help"): usage() if o in ("-s", "--sim"): sim_path = a if o in ("--stall",): stall = 1 if len(args) > 3: usage() sim_pid = run_simulator(sim_path) # Open a connection to the target tries = 5 while (tries > 0): try: target = avr_target.AvrTarget() except socket.error: print >> sys.stderr, 'Simulator not responding, wait a second and try again' tries -= 1 time.sleep(1) else: break if tries == 0: print >> sys.stderr, 'Fatal error: simulator did not start' sys.exit(1) # run the tests try: status = apply(run_tests, [target]+args) finally: # We always want to shut down the simulator target.close() if stall: raw_input('hit enter to quit...') # make sure that the simulator has quit os.kill(sim_pid, signal.SIGINT) os.waitpid(sim_pid, os.WNOHANG) sys.exit( status ) simulavr-0.1.2.2/regress/modules/0000777000175000001440000000000010204750217013635 500000000000000simulavr-0.1.2.2/regress/modules/Makefile.am0000644000175000001440000000030207427627624015622 00000000000000# # $Id: Makefile.am,v 1.1 2002/02/05 01:04:20 troth Exp $ # MAINTAINERCLEANFILES = Makefile.in stamp-vti EXTRA_DIST = \ avr_target.py \ base_test.py \ gdb_rsp.py \ registers.py simulavr-0.1.2.2/regress/modules/Makefile.in0000644000175000001440000002176710204750203015626 00000000000000# Makefile.in generated by automake 1.8.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; 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Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: avr_target.py,v 1.1 2002/02/05 01:04:20 troth Exp $ # import sys, array, signal import gdb_rsp class AvrTarget(gdb_rsp.GdbRemoteSerialProtocol): offset_flash = 0x0 offset_sram = 0x00800000 def __init__(self, host='localhost', port=1212, ofile=None): gdb_rsp.GdbRemoteSerialProtocol.__init__(self,host,port,ofile) def read_flash(self, addr, _len): return self.read_mem( addr+self.offset_flash, _len ) def write_flash(self, addr, _len, buf): self.write_mem( addr+self.offset_flash, _len, buf ) def read_sram(self, addr, _len): return self.read_mem( addr+self.offset_sram, _len ) def write_sram(self, addr, _len, buf): self.write_mem( addr+self.offset_sram, _len, buf ) def load_binary(self, file): f = open(file) bin = array.array('B', f.read()) self.write_flash(0x0, len(bin), bin) f.close() def reset(self): self.cont_with_signal(signal.SIGHUP) if __name__ == '__main__': # Open a connection to the target target = AvrTarget(ofile=sys.stderr) demo = '/home/troth/develop/avr/sav/build-sim-debug/test_c/demo.bin' target.load_binary(demo) target.close() simulavr-0.1.2.2/regress/modules/base_test.py0000644000175000001440000001532407453174154016115 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: base_test.py,v 1.6 2002/04/05 01:05:48 troth Exp $ # import array, struct from registers import Reg, Addr """This module provides base classes for regression test cases. """ class TestFail: def __init__(self, reason): self.reason = reason def __repr__(self): return self.reason class opcode_test: """Base Class for testing opcodes. """ def __init__(self,target): self.target = target def __repr__(self): return self.__name__ def mem_byte_write(self, addr, val): self.target.write_sram(addr, 1, [val]) def mem_byte_read(self, addr): return self.target.read_sram(addr, 1)[0] def prog_word_write(self, addr, val): self.target.write_flash(addr, 2, self.common_build_opcode(val)) def run(self): """Execute the test. If the test fails, an exception will be raised. """ self.common_setup() # setup the test self.target.step() # execute the opcode test self.common_analyze_results() # do the analysis def common_setup(self): """Perform common setup operations. All access to target for setup should be done here. This could be over-ridden by a more specific base class if needed. """ # Fetch all registers (might be able to get away with just creating an # array of zero'd out registers instead of going to target. self.setup_regs = self.target.read_regs() # Run the test case setup and insert opcode into target. raw_opcode = self.setup() opcode = self.common_build_opcode(raw_opcode) self.target.write_flash(self.setup_regs[Reg.PC], len(opcode), opcode) # The test case should modify setup_regs as necessary so here we make sure # the target gets those changes self.target.write_regs(self.setup_regs) def common_build_opcode(self, raw_opcode): """Build up the opcode array for a 16 bit opcode. """ return array.array( 'B', struct.pack('> 16) & 0xffff, (raw_opcode & 0xffff)) ) class opcode_stack_mixin: """Mixin Class for testing opcodes which perform stack operations. """ # Assume an at90s8515 device with end of ram 0x025f (32 + 64 + 512 - 1). # Use 0x0250 so we can pop things off and not go past end of ram. SP_val = 0x0250 def common_setup(self): """Initialize the stack and then call the base class common_setup. """ self.target.write_reg(Reg.SP, self.SP_val) opcode_test.common_setup(self) def setup_write_to_current_stack(self, val): # Since a push is a post-decrement operation and pop is pre-increment, # we need to use SP+1 here. # Also, note that this should only be used in setup. self.target.write_sram(self.SP_val+1, 1, [val]) def setup_word_to_stack(self, val): # used by RET, RETI setup, since they pop at least a word self.target.write_sram(self.SP_val+1, 2, [(val & 0xff00)>>8, val & 0xff]) def analyze_read_from_current_stack(self): return self.target.read_sram(self.SP_val, 1)[0] class opcode_32_test(opcode_32_mixin, opcode_test): pass class opcode_stack_test(opcode_stack_mixin, opcode_test): pass class opcode_stack_32_test(opcode_32_mixin, opcode_stack_mixin, opcode_test): """Base Class for testing 32 bit opcodes with stack operations. """ pass simulavr-0.1.2.2/regress/modules/gdb_rsp.py0000644000175000001440000001671707455177171015577 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: gdb_rsp.py,v 1.3 2002/04/11 03:09:45 troth Exp $ # import socket, struct, array, sys from registers import Reg class GdbRSP_Exception(Exception): pass class ErrCheckSum(GdbRSP_Exception): pass class ErrPacket(GdbRSP_Exception): pass class ErrReply(GdbRSP_Exception): pass class ErrMemRead(GdbRSP_Exception): pass class GdbRemoteSerialProtocol: """GDB Remote Serial Protocol client implemntation. Simulates what GDB does. This class only implements a minimal subset of the remote serial protocol as needed to perform regression testing. The following packets types are implemented: g read registers G write registers p read single register P write single register k kill request m read memory M write memory c continue C continue with signal s step S step with signal z remove break or watchpoint Z insert break or watchpoint """ def __init__(self, host='localhost', port=1212, ofile=None): """Open a connection to a remote target. """ # where to write the output of print statements self.ofile = ofile # connect to remote target self.socket = socket.socket(socket.AF_INET, socket.SOCK_STREAM) self.socket.connect((host,port)) self.ack() def __del__(self): try: self.close() except: # close() most likely already called pass def close(self): self.send('k') reply = self.recv() self.out('Recv: "%s"' % (reply)) self.socket.close() def out(self, s): if self.ofile: print >> self.ofile, s def cksum(self,pkt): sum = 0 for c in pkt: sum += ord(c) return sum & 0xff def ack(self): self.out( 'Send: "+" (Ack)' ) self.socket.send('+') def send(self, msg): s = '$'+msg+'#'+'%02x'%(self.cksum(msg)) self.out( 'Sent: "%s"' % (s) ) self.socket.send(s) reply = self.socket.recv(1) if reply != '+': raise ErrReply, reply else: self.out( '-> Ack' ) def recv(self): c = self.socket.recv(1) if c == '$': max_buf = 400 pkt = '' while max_buf: c = self.socket.recv(1) if c == '#': break pkt += c max_buf -= 1 sum = self.cksum(pkt) cccc = self.socket.recv(1) cccc += self.socket.recv(1) csum = int( cccc, 16 ) if sum != csum: raise ErrCheckSum, 'pkt="%s#%s", %02x : %02x' %(pkt,cccc,sum,csum) return pkt elif c == '+': self.out( 'Ack' ) else: raise ErrPacket, c return None def str2bin(self, s): """Convert a string of ascii hex digit pairs to an array of 8-bit binary values. """ arr = array.array('B') for i in range( 0, len(s), 2 ): arr.append( int(s[i:i+2], 16) ) return arr def bin2str(self, arr): """Convert an array of 8-bit binary values to a string of ascii hex digit pairs. """ ss = '' for i in arr: ss += '%02x' % (i) return ss def read_regs(self): self.send('g') reply = self.recv() self.out( 'Recv: "%s"' % (reply) ) # little endian + 32 reg (B=8-bit) + SREG (B=8-bit) + SP (H=16-bit) + PC (L=32-bit) regs = [ i for i in struct.unpack( '<33BHL', self.str2bin(reply) ) ] return regs def write_regs(self, regs): arr = array.array('B') arr.fromstring(struct.pack('<33BHL', *regs)) self.send('G'+self.bin2str(arr)) reply = self.recv() if reply != 'OK': raise ErrReply self.out( 'Recv: "%s"' % (reply) ) def read_reg(self, reg): self.send('p%x'%(reg)) reply = self.str2bin(self.recv()) if reg < Reg.SP: val = struct.unpack( '> 3) & 1 V = (((self.Vd & self.Vr & ~res) | (~self.Vd & ~self.Vr & res)) >> 7) & 1 N = ((expect & 0x80) != 0) expect_sreg += H << SREG.H expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z expect_sreg += (res > 0xff) << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ADC r%02d, r%02d: 0x%02x + 0x%02x + %d -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, self.C, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ADC_rd%02d_vd%02x_rr%02d_vr%02x_C%d_TestFail(ADC_TestFail): pass class test_ADC_rd%02d_vd%02x_rr%02d_vr%02x_C%d(base_ADC): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x C = %d def fail(self,s): raise ADC_rd%02d_vd%02x_rr%02d_vr%02x_C%d_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x7f, 0x01 ) ) # # automagically generate the test_ADC_rdNN_vdXX_rrNN_vrXX_C[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for c in (0,1): for d in range(0,32,8): for r in range(1,32,8): for vd,vr in vals: args = (d,vd,r,vr,c)*4 code += template % args # # This is effectively a ROL operation (Rd == Rr) # for c in (0,1): for d in range(0,32,8): for vd,vr in vals: args = (d,vd,d,vd,c)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ADD.py0000644000175000001440000000751707435624256016626 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ADD.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the ADD opcode. """ import base_test from registers import Reg, SREG class ADD_TestFail(base_test.TestFail): pass class base_ADD(base_test.opcode_test): """Generic test case for testing ADD opcode. Add without Carry. [Rd <- Rd + Rr] opcode is '0000 11rd dddd rrrr' where r and d are registers (d is destination). Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero or only C flag set self.setup_regs[Reg.SREG] = self.C << SREG.C # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x0C00 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct res = (self.Vd + self.Vr) expect = res & 0xff got = self.anal_regs[self.Rd] if expect != got: self.fail('ADD r%02d, r%02d: 0x%02x + 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) H = (((self.Vd & self.Vr) | (self.Vr & ~res) | (~res & self.Vd)) >> 3) & 1 V = (((self.Vd & self.Vr & ~res) | (~self.Vd & ~self.Vr & res)) >> 7) & 1 N = ((expect & 0x80) != 0) expect_sreg += H << SREG.H expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z expect_sreg += (res > 0xff) << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ADD r%02d, r%02d: 0x%02x + 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ADD_rd%02d_vd%02x_rr%02d_vr%02x_C%d_TestFail(ADD_TestFail): pass class test_ADD_rd%02d_vd%02x_rr%02d_vr%02x_C%d(base_ADD): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x C = %d def fail(self,s): raise ADD_rd%02d_vd%02x_rr%02d_vr%02x_C%d_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x7f, 0x01 ), ) # # automagically generate the test_ADD_rdNN_vdXX_rrNN_vrXX_C[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for c in (0,1): for d in range(0,32,8): for r in range(1,32,8): for vd,vr in vals: args = (d,vd,r,vr,c)*4 code += template % args # # This is effectively a LSL operation (Rd == Rr) # for c in (0,1): for d in range(0,32,8): for vd,vr in vals: args = (d,vd,d,vd,c)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ADIW.py0000644000175000001440000000674207435624256016761 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ADIW.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the ADIW opcode. """ import base_test from registers import Reg, SREG class ADIW_TestFail(base_test.TestFail): pass class base_ADIW(base_test.opcode_test): """Generic test case for testing ADIW opcode. Add Immediate to Word. [Rd+1:Rd <- Rd+1:Rd + K] opcode is '1001 0110 KKdd KKKK' where d is {24,26,28,30}, and K is [0,63] Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0x00 # Set the register values self.setup_regs[self.Rd] = (self.vd & 0xff) self.setup_regs[self.Rd+1] = (self.vd >> 8) # Return the raw opcode return 0x9600 | (((self.Rd/2)-12) << 4) | ((self.vk & 0x30) << 2) | (self.vk & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, self.Rd+1, Reg.SREG] ) # check that result is correct res = (self.vd + self.vk) expect = res & 0xffff got = self.anal_regs[self.Rd] + (self.anal_regs[self.Rd+1] << 8) if expect != got: self.fail('ADIW r%02d, r%02x: 0x%04x + 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.vk, self.vd, self.vk, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T and H should be zero) V = ((~self.vd & res) >> 15) & 1 N = ((expect >> 15) & 1) expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z expect_sreg += (((~res & self.vd) >> 15) & 1) << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ADIW r%02d, r%02x: 0x%04x + 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.vk, self.vd, self.vk, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ADIW_r%02d_v%04x_k%02x_TestFail(ADIW_TestFail): pass class test_ADIW_r%02d_v%04x_k%02x(base_ADIW): Rd = %d vd = 0x%x vk = 0x%x def fail(self,s): raise ADIW_r%02d_v%04x_k%02x_TestFail, s """ # reg val, k val (0x00 <= k <= 0x3f) vals = ( ( 0x0000, 0x00 ), ( 0x0000, 0x3f ), ( 0x00ff, 0x01 ), ( 0xffbf, 0x3f ), ( 0xffff, 0x01 ), ( 0x7fff, 0x01 ), ( 0x8000, 0x00 ), ( 0x8000, 0x01 ) ) # # automagically generate the test_ADIW_rdNN_vdXX_rrNN_vrXX_C[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for d in range(24,32,2): for vd,vk in vals: args = (d,vd,vk)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_AND.py0000644000175000001440000000677207435624256016642 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_AND.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the AND opcode. """ import base_test from registers import Reg, SREG class AND_TestFail(base_test.TestFail): pass class base_AND(base_test.opcode_test): """Generic test case for testing AND opcode. AND - Logical AND opcode is '0010 00rd dddd rrrr' where r and d are registers (d is destination). Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have only V set (opcode should clear it) self.setup_regs[Reg.SREG] = 1 << SREG.V # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x2000 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((self.Vd & self.Vr) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('AND r%02d, r%02d: 0x%02x & 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H, V and C should be zero) V = 0 N = ((expect & 0x80) != 0) expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('AND r%02d, r%02d: 0x%02x + 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class AND_rd%02d_vd%02x_rr%02d_vr%02x_TestFail(AND_TestFail): pass class test_AND_rd%02d_vd%02x_rr%02d_vr%02x(base_AND): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x def fail(self,s): raise AND_rd%02d_vd%02x_rr%02d_vr%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x80, 0x80 ) ) # # automagically generate the test_AND_rdNN_vdXX_rrNN_vrXX class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for d in range(0,32,4): for r in range(1,32,4): for vd,vr in vals: args = (d,vd,r,vr)*4 code += template % args # # This is effectively a TST operation (Rd == Rr) # for d in range(0,32,4): for vd,vr in vals: args = (d,vd,d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ANDI.py0000644000175000001440000000631007435624256016737 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ANDI.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the ANDI opcode. """ import base_test from registers import Reg, SREG class ANDI_TestFail(base_test.TestFail): pass class base_ANDI(base_test.opcode_test): """Generic test case for testing ANDI opcode. ANDI - Logical AND with Immediate opcode is '0111 KKKK dddd KKKK' where 16 <= d <= 31, 0 <= K <= 255 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have only V set (opcode should clear it) self.setup_regs[Reg.SREG] = 1 << SREG.V # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x7000 | ((self.Rd - 16) << 4) | ((self.Vk & 0xf0) << 4) | (self.Vk & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((self.Vd & self.Vk) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('ANDI r%02d, 0x%02x: 0x%02x & 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H, V and C should be zero) V = 0 N = ((expect & 0x80) != 0) expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ANDI r%02d, 0x%02x: 0x%02x + 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ANDI_r%02d_v%02x_k%02x_TestFail(ANDI_TestFail): pass class test_ANDI_r%02d_v%02x_k%02x(base_ANDI): Rd = %d Vd = 0x%x Vk = 0x%x def fail(self,s): raise ANDI_r%02d_v%02x_k%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x80, 0x80 ) ) # # automagically generate the test_ANDI_rNN_vXX_rrNN_kXX class definitions. # code = '' for d in range(16,32): for vd,vk in vals: args = (d,vd,vk)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ASR.py0000644000175000001440000000600107435570402016637 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ASR.py,v 1.2 2002/02/23 01:31:46 troth Exp $ # """Test the ASR opcode. """ import base_test from registers import Reg, SREG class ASR_TestFail(base_test.TestFail): pass class base_ASR(base_test.opcode_test): """Generic test case for testing ASR opcode. ASR - Arithmetic ShiftRight opcode is '1001 010d dddd 0101' where d is register (0-31) Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x9405 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ( ((self.Vd >> 1) & 0x7f) | (self.Vd & 0x80)) got = self.anal_regs[self.Rd] if expect != got: self.fail('ASR r%02d: 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T and H should be zero) C = self.Vd & 1 N = ((expect & 0x80) != 0) V = N ^ C expect_sreg += (N ^ V) << SREG.S expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (expect == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ASR r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ASR_r%02d_v%02x_TestFail(ASR_TestFail): pass class test_ASR_r%02d_v%02x(base_ASR): Rd = %d Vd = 0x%x def fail(self,s): raise ASR_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0x10, 0x80, 0xaa ) # # automagically generate the test_ASR_rNN_vXX_rrNN_kXX class definitions. # code = '' for d in range(32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_BCLR.py0000644000175000001440000000446507435012377016752 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_BCLR.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the BCLR opcode. The following opcodes are pseudonyms for BCLR: CLC, CLZ, CLN, CLV, CLS, CLH, CLT, CLI """ import base_test from registers import Reg class BCLR_TestFail(base_test.TestFail): pass class base_BCLR(base_test.opcode_test): """Generic test case for testing BCLR opcode. Bit set in SREG. opcode is '1001 0100 1sss 1000' where s is the sreg bit. No registers except for PC and SREG should have changed. """ def setup(self): # set the sreg to 0xff (all ones so that we check that only one bit was cleared) self.setup_regs[Reg.SREG] = 0xff return 0x9488 | (self.bit << 4) def analyze_results(self): # check that correct SREG bit is cleared self.reg_changed.append(Reg.SREG) expect = 0xff & ~(1 << self.bit) got = self.anal_regs[Reg.SREG] if expect != got: self.fail('SREG bit %d not set: expect=%02x, got=%02x' % (self.bit, expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class BCLR_bit%d_TestFail(BCLR_TestFail): pass class test_BCLR_bit%d(base_BCLR): bit = %d def fail(self,s): raise BCLR_bit%d_TestFail, s """ # # automagically generate the test_BCLR_bitN_is_[01] class definitions # code = '' for b in range(8): code += template % (b,b,b,b) exec code simulavr-0.1.2.2/regress/test_opcodes/test_BLD.py0000644000175000001440000000510007435012377016614 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_BLD.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the BLD opcode. """ import base_test from registers import Reg, SREG class BLD_TestFail(base_test.TestFail): pass class base_BLD(base_test.opcode_test): """Generic test case for testing BLD opcode. Bit load from the T flag in SREG to bin in register. opcode is '1111 100d dddd 0bbb' where d is register and b is the register bit. Only registers PC and Rd should be changed. """ def setup(self): # set the T flag in sreg self.setup_regs[Reg.SREG] = self.T << SREG.T # set the given register's bits to complement of T value if self.T == 0: self.setup_regs[self.reg] = 0xff else: self.setup_regs[self.reg] = 0x0 return 0xF800 | (self.reg << 4) | self.bit def analyze_results(self): self.reg_changed.append(self.reg) # check that register value is correct if self.T == 0: expect = 0xff & ~(1 << self.bit) else: expect = (1 << self.bit) got = self.anal_regs[self.reg] if expect != got: self.fail('r%02d bit %d not T(%d): expect=%02x, got=%02x' % ( self.reg, self.bit, self.T, expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class BLD_r%02d_bit%d_T%d_TestFail(BLD_TestFail): pass class test_BLD_r%02d_bit%d_T%d(base_BLD): reg = %d bit = %d T = %d def fail(self,s): raise BLD_r%02d_bit%d_T%d_TestFail, s """ # # automagically generate the test_BLD_rNN_bitN_T[01] class definitions # code = '' for t in (0,1): for r in range(32): for b in range(8): code += template % (r,b,t, r,b,t, r,b,t, r,b,t) exec code simulavr-0.1.2.2/regress/test_opcodes/test_BRBC.py0000644000175000001440000000476507435012377016743 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_BRBC.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the BRBC opcode. The following opcodes are pseudonyms for BRBC: BRNE, BRCC, BRSH, BRPL, BRGE, BRHC, BRTC, BRVC, BRID """ import base_test from registers import Reg class BRBC_TestFail(base_test.TestFail): pass class base_BRBC(base_test.opcode_test): """Generic test case for testing BRBC opcode. Branch if sreg bit cleared. opcode is '1111 01kk kkkk ksss' where k is pc offset and s is sreg bit. No registers except for PC should have changed. """ # FIXME: Offsets can wrap around ends of flash. Need to mask expect value # with size of flash. Once done, need to test it. k = 20 def setup(self): # set the sreg bit we are interrested in self.setup_regs[Reg.SREG] = self.val << self.bit return 0xF400 | self.bit | ((self.k&0x7f)<<3) def analyze_results(self): self.is_pc_checked = 1 expect = self.setup_regs[Reg.PC] + 2 if self.val == 0: expect += (self.k * 2) got = self.anal_regs[Reg.PC] if expect != got: self.fail('PC not incremented: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class BRBC_bit%d_is_%d_TestFail(BRBC_TestFail): pass class test_BRBC_bit%d_is_%d(base_BRBC): bit = %d val = %d def fail(self,s): raise BRBC_bit%d_is_%d_TestFail, s """ # # automagically generate the test_BRBC_bitN_is_[01] class definitions # code = '' for b in range(8): for v in range(2): code += template % (b,v,b,v,b,v,b,v) exec code simulavr-0.1.2.2/regress/test_opcodes/test_BRBS.py0000644000175000001440000000476107435012377016757 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_BRBS.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the BRBS opcode. The following opcodes are pseudonyms for BRBS: BREQ, BRCS, BRLO, BRMI, BRLT, BRHS, BRTS, BRVS, BRIE """ import base_test from registers import Reg class BRBS_TestFail(base_test.TestFail): pass class base_BRBS(base_test.opcode_test): """Generic test case for testing BRBS opcode. Branch if sreg bit set. opcode is '1111 00kk kkkk ksss' where k is pc offset and s is sreg bit. No registers except for PC should have changed. """ # FIXME: Offsets can wrap around ends of flash. Need to mask expect value # with size of flash. Once done, need to test it. k = 20 def setup(self): # set the sreg bit we are interrested in self.setup_regs[Reg.SREG] = self.val << self.bit return 0xF000 | self.bit | ((self.k&0x7f)<<3) def analyze_results(self): self.is_pc_checked = 1 expect = self.setup_regs[Reg.PC] + 2 if self.val == 1: expect += (self.k * 2) got = self.anal_regs[Reg.PC] if expect != got: self.fail('PC not incremented: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class BRBS_bit%d_is_%d_TestFail(BRBS_TestFail): pass class test_BRBS_bit%d_is_%d(base_BRBS): bit = %d val = %d def fail(self,s): raise BRBS_bit%d_is_%d_TestFail, s """ # # automagically generate the test_BRBS_bitN_is_[01] class definitions # code = '' for b in range(8): for v in range(2): code += template % (b,v,b,v,b,v,b,v) exec code simulavr-0.1.2.2/regress/test_opcodes/test_BSET.py0000644000175000001440000000435207435012377016760 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_BSET.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the BSET opcode. The following opcodes are pseudonyms for BSET: SEC, SEZ, SEN, SEV, SES, SEH, SET, SEI """ import base_test from registers import Reg class BSET_TestFail(base_test.TestFail): pass class base_BSET(base_test.opcode_test): """Generic test case for testing BSET opcode. Bit set in SREG. opcode is '1001 0100 0sss 1000' where s is the sreg bit. No registers except for PC and SREG should have changed. """ def setup(self): # set the sreg to zero self.setup_regs[Reg.SREG] = 0 return 0x9408 | (self.bit << 4) def analyze_results(self): # check that correct SREG bit is set self.reg_changed.append(Reg.SREG) expect = (1 << self.bit) got = self.anal_regs[Reg.SREG] if expect != got: self.fail('SREG bit %d not set: expect=%02x, got=%02x' % (self.bit, expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class BSET_bit%d_TestFail(BSET_TestFail): pass class test_BSET_bit%d(base_BSET): bit = %d def fail(self,s): raise BSET_bit%d_TestFail, s """ # # automagically generate the test_BSET_bitN_is_[01] class definitions # code = '' for b in range(8): code += template % (b,b,b,b) exec code simulavr-0.1.2.2/regress/test_opcodes/test_BST.py0000644000175000001440000000515007435012377016650 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_BST.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the BST opcode. """ import base_test from registers import Reg, SREG class BST_TestFail(base_test.TestFail): pass class base_BST(base_test.opcode_test): """Generic test case for testing BST opcode. Bit store from bit in register to T flag in SREG. opcode is '1111 101d dddd 0bbb' where d is register and b is the register bit. Only registers PC and SREG should be changed. """ def setup(self): # set SREG and the given register's bits to complement of expected T value if self.T == 0: self.setup_regs[Reg.SREG] = 0xff self.setup_regs[self.reg] = 0xff & ~(1 << self.bit) else: self.setup_regs[Reg.SREG] = 0x00 self.setup_regs[self.reg] = (1 << self.bit) return 0xFA00 | (self.reg << 4) | self.bit def analyze_results(self): self.reg_changed.append(Reg.SREG) # check that register value is correct if self.T == 0: expect = 0xff & ~(1 << SREG.T) else: expect = (1 << SREG.T) got = self.anal_regs[Reg.SREG] if expect != got: self.fail('r%02d bit %d not T(%d): expect=%02x, got=%02x' % ( self.reg, self.bit, self.T, expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class BST_r%02d_bit%d_T%d_TestFail(BST_TestFail): pass class test_BST_r%02d_bit%d_T%d(base_BST): reg = %d bit = %d T = %d def fail(self,s): raise BST_r%02d_bit%d_T%d_TestFail, s """ # # automagically generate the test_BST_rNN_bitN_T[01] class definitions # code = '' for t in (0,1): for r in range(32): for b in range(8): code += template % (r,b,t, r,b,t, r,b,t, r,b,t) exec code simulavr-0.1.2.2/regress/test_opcodes/test_CALL.py0000644000175000001440000000546607450003236016734 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_CALL.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the CALL opcode. """ import base_test from registers import Reg class CALL_TestFail(base_test.TestFail): pass class base_CALL(base_test.opcode_stack_32_test): """Generic test case for testing CALL opcode. The derived class must provide the reg member and the fail method. CALL - Relative call to subroutine PC <- k STACK <- PC + 2 SP <- SP - 2 __or__ SP <- SP - 3 (2 bytes, 16 bit PC) (3 bytes, 22 bit PC) opcode is '1001 010k kkkk 111k kkkk kkkk kkkk kkkk' 0 <= k < 4M """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 tmp = self.k >> 16 & 0x3f op = 0x940e | (tmp << 3) & 0x1f0 | tmp & 0x1 op = (op << 16 | self.k & 0xffff) #print 'setting up op: %x' %(op) return op def analyze_results(self): self.reg_changed.append( Reg.SP ) self.is_pc_checked = 1 expect = self.k got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('CALL failed: expect=%x, got=%x' % (expect, got)) sp_expect = self.setup_regs[Reg.SP] - 2 # 16 bit PC sp_got = self.anal_regs[Reg.SP] if sp_got != sp_expect: self.fail('CALL stack push failed: expect=%x, got=%x' % ( sp_expect, sp_got )) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class CALL_%06x_TestFail(CALL_TestFail): pass class test_CALL_%06x(base_CALL): k = 0x%x def fail(self,s): raise CALL_%06x_TestFail, s """ # # automagically generate the test_CALL_* class definitions # # FIXME: TRoth 2002-02-22: Really need to check jumps which wrap around the # ends of flash memory. Will need to know the size of the device's flash space # to do that though. # code = '' for k in (0x100, 0x3ff): code += template % ((k & 0xffffff), (k & 0xffffff), k, (k & 0xffffff)) exec code simulavr-0.1.2.2/regress/test_opcodes/test_COM.py0000644000175000001440000000572307435544207016646 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_COM.py,v 1.2 2002/02/22 22:39:03 troth Exp $ # """Test the COM opcode. """ import base_test from registers import Reg, SREG class COM_TestFail(base_test.TestFail): pass class base_COM(base_test.opcode_test): """Generic test case for testing COM opcode. COM - One's Complement opcode is '1001 010d dddd 0000' where 0 <= d <= 31, Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have only V set (opcode should clear it) self.setup_regs[Reg.SREG] = 1 << SREG.V # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x9400 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((0xff - self.Vd) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('COM r%02d: 0x%02x & 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H and V should be zero) V = 0 N = ((expect & 0x80) != 0) expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z expect_sreg += 1 << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('COM r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class COM_r%02d_v%02x_TestFail(COM_TestFail): pass class test_COM_r%02d_v%02x(base_COM): Rd = %d Vd = 0x%x def fail(self,s): raise COM_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0xaa, 0xf0, 0x01 ) # # automagically generate the test_COM_rNN_vXX class definitions. # code = '' for d in range(32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_CP.py0000644000175000001440000000637307435310610016521 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_CP.py,v 1.1 2002/02/22 00:32:08 troth Exp $ # """Test the CP opcode. """ import base_test from registers import Reg, SREG class CP_TestFail(base_test.TestFail): pass class base_CP(base_test.opcode_test): """Generic test case for testing CP opcode. CP - Compare opcode is '0001 01rd dddd rrrr' where 0 <= d,r <= 31 Only registers PC and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x1400 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.append( Reg.SREG ) # calculate the compare value res = (self.Vd - self.Vr) & 0xff expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = (~self.Vd & self.Vr) | (self.Vr & res) | (res & ~self.Vd) H = ( carry >> 3) & 1 C = ( carry >> 7) & 1 N = ((res & 0x80) != 0) V = (( (self.Vd & ~self.Vr & ~res) | (~self.Vd & self.Vr & res)) >> 7) & 1 expect_sreg += H << SREG.H expect_sreg += N << SREG.N expect_sreg += V << SREG.V expect_sreg += (N ^ V) << SREG.S expect_sreg += (res == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('CP r%02d r%02d: 0x%02x 0x%02x: (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class CP_rd%02d_v%02x_rr%02d_v%02x_TestFail(CP_TestFail): pass class test_CP_rd%02d_v%02x_rr%02d_v%02x(base_CP): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x def fail(self,s): raise CP_rd%02d_v%02x_rr%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0xff ), ( 0xff, 0x00 ), ( 0x00, 0xff ), ( 0xaa, 0x55 ), ( 0x55, 0xaa ), ( 0x01, 0x00 ), ( 0x00, 0x01 ) ) # # automagically generate the test_CP_rNN_vXX class definitions. # code = '' for d in range(0,32,8): for r in range(1,32,8): for vd,vr in vals: args = (d,vd,r,vr)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_CPC.py0000644000175000001440000000716307435310610016622 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_CPC.py,v 1.1 2002/02/22 00:32:08 troth Exp $ # """Test the CPC opcode. """ import base_test from registers import Reg, SREG class CPC_TestFail(base_test.TestFail): pass class base_CPC(base_test.opcode_test): """Generic test case for testing CPC opcode. CPC - Compare with Carry opcode is '0000 01rd dddd rrrr' where 0 <= d,r <= 31 Only registers PC and SREG should be changed. """ def setup(self): # Set SREG to have only C set to self.C self.setup_regs[Reg.SREG] = (self.C << SREG.C) + (self.Z << SREG.Z) # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x0400 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.append( Reg.SREG ) # calculate the compare value res = (self.Vd - self.Vr - self.C) & 0xff expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = (~self.Vd & self.Vr) | (self.Vr & res) | (res & ~self.Vd) H = ( carry >> 3) & 1 C = ( carry >> 7) & 1 N = ((res & 0x80) != 0) V = (( (self.Vd & ~self.Vr & ~res) | (~self.Vd & self.Vr & res)) >> 7) & 1 expect_sreg += H << SREG.H expect_sreg += N << SREG.N expect_sreg += V << SREG.V expect_sreg += (N ^ V) << SREG.S expect_sreg += C << SREG.C # Z unchanged from previous operation if res is zero. Cleared otherwise. # In our case, prev Z is self.Z if res == 0: expect_sreg += self.Z << SREG.Z else: # Z flag already zero in expect_sreg pass got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('CPC r%02d r%02d: 0x%02x 0x%02x: (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class CPC_rd%02d_v%02x_rr%02d_v%02x_C%d_Z%d_TestFail(CPC_TestFail): pass class test_CPC_rd%02d_v%02x_rr%02d_v%02x_C%d_Z%d(base_CPC): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x C = %d Z = %d def fail(self,s): raise CPC_rd%02d_v%02x_rr%02d_v%02x_C%d_Z%d_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0xff ), ( 0xff, 0x00 ), ( 0x00, 0xff ), ( 0xaa, 0x55 ), ( 0x55, 0xaa ), ( 0x01, 0x00 ), ( 0x00, 0x01 ) ) # # automagically generate the test_CPC_rNN_vXX_C[01]_Z[01] class definitions. # code = '' for c,z in [ (0,0), (0,1), (1,0), (1,1) ]: for d in range(0,32,8): for r in range(1,32,8): for vd,vr in vals: args = (d,vd,r,vr,c,z)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_CPI.py0000644000175000001440000000631407435624256016643 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_CPI.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the CPI opcode. """ import base_test from registers import Reg, SREG class CPI_TestFail(base_test.TestFail): pass class base_CPI(base_test.opcode_test): """Generic test case for testing CPI opcode. CPI - Compare with Immediate opcode is '0011 KKKK dddd KKKK' where 16 <= d <= 31, 0 <= K <= 255 Only registers PC and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x3000 | ((self.Rd - 16) << 4) | ((self.Vk & 0xf0) << 4) | (self.Vk & 0xf) def analyze_results(self): self.reg_changed.append( Reg.SREG ) # calculate the compare value res = (self.Vd - self.Vk) & 0xff expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = (~self.Vd & self.Vk) | (self.Vk & res) | (res & ~self.Vd) H = ( carry >> 3) & 1 C = ( carry >> 7) & 1 N = ((res & 0x80) != 0) V = (( (self.Vd & ~self.Vk & ~res) | (~self.Vd & self.Vk & res)) >> 7) & 1 expect_sreg += H << SREG.H expect_sreg += N << SREG.N expect_sreg += V << SREG.V expect_sreg += (N ^ V) << SREG.S expect_sreg += (res == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('CPI r%02d 0x%02x: 0x%02x 0x%02x: (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class CPI_r%02d_v%02x_k%02x_TestFail(CPI_TestFail): pass class test_CPI_r%02d_v%02x_k%02x(base_CPI): Rd = %d Vd = 0x%x Vk = 0x%x def fail(self,s): raise CPI_r%02d_v%02x_k%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0xff ), ( 0xff, 0x00 ), ( 0x00, 0xff ), ( 0xaa, 0x55 ), ( 0x55, 0xaa ), ( 0x01, 0x00 ), ( 0x00, 0x01 ) ) # # automagically generate the test_CPI_rNN_vXX_kXX class definitions. # code = '' for d in range(16,32): for vd,vk in vals: args = (d,vd,vk)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_CPSE.py0000644000175000001440000000611407453174154016755 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_CPSE.py,v 1.1 2002/04/05 01:05:48 troth Exp $ # """Test the CPSE opcode. """ import base_test from registers import Reg class CPSE_TestFail(base_test.TestFail): pass class base_CPSE(base_test.opcode_test): """Generic test case for testing CPSE opcode. The derived class must provide the reg member and the fail method. CPSE - Compare, Skip if Equal opcode is '0001 11rd dddd rrrr' """ def setup(self): self.setup_regs[self.Rd] = self.vd self.setup_regs[self.Rr] = self.vr self.setup_regs[Reg.PC] = 0xff * 2 # Need to make sure the PC+2 is a real insn if self.ni == 16: # just use a nop (0000 0000 0000 0000) next_op = 0x0000 else: # use high byte of LDS (1001 000d dddd 0000) (d=0) next_op = 0x9000 self.prog_word_write(self.setup_regs[Reg.PC]+2, next_op) return 0x1000 | (self.Rd << 4) | (self.Rr & 0xf) | ((self.Rr & 0x10) << 5) def analyze_results(self): self.is_pc_checked = 1 if self.vd == self.vr: if self.ni == 16: expect = self.setup_regs[Reg.PC]/2 + 2 else: expect = self.setup_regs[Reg.PC]/2 + 3 else: expect = self.setup_regs[Reg.PC]/2 + 1 got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('CPSE failed: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class CPSE_rd%02d_vd%02x_rr%02d_vr%02x_ni%d_TestFail(CPSE_TestFail): pass class test_CPSE_rd%02d_vd%02x_rr%02d_vr%02x_ni%d(base_CPSE): Rd = %d vd = 0x%x Rr = %d vr = 0x%x ni = %d def fail(self,s): raise CPSE_rd%02d_vd%02x_rr%02d_vr%02x_ni%d_TestFail, s """ vals = ( ( 0xaa, 0x55 ), ( 0xa0, 0xa0 ), ) # # automagically generate the test_CPSE_* class definitions # code = '' step = 4 for d in range(0,32,step): for r in range(1,32,step): for vr,vd in vals: for ni in (16,32): # is next insn 16 or 32 bits args = (d,vd,r,vr,ni)*4 code += template % args # Special case when Rd==Rr, set Vd==Vr for d in range(0,32,step): for vr,vd in vals: for ni in (16,32): # is next insn 16 or 32 bits args = (d,vd,d,vd,ni)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_DEC.py0000644000175000001440000000561507435624256016626 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_DEC.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the DEC opcode. """ import base_test from registers import Reg, SREG class DEC_TestFail(base_test.TestFail): pass class base_DEC(base_test.opcode_test): """Generic test case for testing DEC opcode. DEC - Decrement opcode is '1001 010d dddd 1010' where 0 <= d <= 31 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x940A | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct exp = (self.Vd - 1) & 0xff got = self.anal_regs[self.Rd] if exp != got: self.fail('DEC r%02d: 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, exp, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H and C should be zero) V = (self.Vd == 0x80) N = ((exp & 0x80) != 0) expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (exp == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('DEC r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class DEC_r%02d_v%02x_TestFail(DEC_TestFail): pass class test_DEC_r%02d_v%02x(base_DEC): Rd = %d Vd = 0x%x def fail(self,s): raise DEC_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0xaa, 0xf0, 0x01, 0x80 ) # # automagically generate the test_DEC_rNN_vXX class definitions. # code = '' for d in range(32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_EOR.py0000644000175000001440000000640407435570753016657 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_EOR.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the EOR opcode. """ import base_test from registers import Reg, SREG class EOR_TestFail(base_test.TestFail): pass class base_EOR(base_test.opcode_test): """Generic test case for testing EOR opcode. EOR - Exclusive OR opcode is '0010 01rd dddd rrrr' where 0 <= d,r <= 31 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have only V set (opcode should clear it) self.setup_regs[Reg.SREG] = 1 << SREG.V # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x2400 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((self.Vd ^ self.Vr) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('EOR r%02d, r%02d: 0x%02x ^ 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H, v and C should be zero) V = 0 N = ((expect & 0x80) != 0) expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('EOR r%02d, r%02d: 0x%02x ^ 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class EOR_r%02d_v%02x_r%02d_v%02x_TestFail(EOR_TestFail): pass class test_EOR_r%02d_v%02x_r%02d_v%02x(base_EOR): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x def fail(self,s): raise EOR_r%02d_v%02x_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0xff ), ( 0xff, 0xff ), ( 0xaa, 0x55 ), ( 0xf0, 0x0f ), ( 0x01, 0x02 ) ) # # automagically generate the test_EOR_rNN_vXX class definitions. # When Rd == Rr, this is the same as CLR # code = '' for d in range(0,32,4): for r in range(0,32,4): for vd,vr in vals: if d == r: vr = vd args = (d,vd,r,vr)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ICALL.py0000644000175000001440000000514707450003236017041 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ICALL.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the ICALL opcode. """ import base_test from registers import Reg class ICALL_TestFail(base_test.TestFail): pass class base_ICALL(base_test.opcode_stack_test): """Generic test case for testing ICALL opcode. The derived class must provide the reg member and the fail method. ICALL - Indirect call to subroutine PC(15:0) <- Z(15:0) STACK <- PC + 1 SP <- SP - 2 __or__ SP <- SP - 3 (2 bytes, 16 bit PC) (3 bytes, 22 bit PC) opcode is '1001 0101 0000 1001' """ def setup(self): # setup PC self.setup_regs[Reg.PC] = 0xff * 2 # setup Z register (Z = R31:R30) self.setup_regs[Reg.R30] = self.k & 0xff self.setup_regs[Reg.R31] = self.k >> 8 & 0xff return 0x9509 def analyze_results(self): self.reg_changed.append( Reg.SP ) self.is_pc_checked = 1 expect = self.k got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('ICALL failed: expect=%x, got=%x' % (expect, got)) expect = self.setup_regs[Reg.SP] - 2 # 16 bit PC got = self.anal_regs[Reg.SP] if got != expect: self.fail('ICALL stack push failed: expect=%04x, got=%04x' % ( expect, got )) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ICALL_%04x_TestFail(ICALL_TestFail): pass class test_ICALL_%04x(base_ICALL): k = 0x%x def fail(self,s): raise ICALL_%04x_TestFail, s """ # # automagically generate the test_ICALL_* class definitions # code = '' for k in (0x100,0x3ff): code += template % ((k & 0xffff), (k & 0xffff), k, (k & 0xffff)) exec code simulavr-0.1.2.2/regress/test_opcodes/test_IJMP.py0000644000175000001440000000430007450003236016742 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_IJMP.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the IJMP opcode. """ import base_test from registers import Reg class IJMP_TestFail(base_test.TestFail): pass class base_IJMP(base_test.opcode_test): """Generic test case for testing IJMP opcode. The derived class must provide the reg member and the fail method. IJMP - Relative Jump [PC <- Z(15:0)] opcode is '1001 0100 0000 1001' """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 # Load the Z register (reg 31:30) with PC to jump to self.setup_regs[Reg.R31] = (self.k >> 8) & 0xff self.setup_regs[Reg.R30] = (self.k & 0xff) return 0x9409 def analyze_results(self): self.is_pc_checked = 1 expect = self.k got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('IJMP failed: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class IJMP_%06x_TestFail(IJMP_TestFail): pass class test_IJMP_%06x(base_IJMP): k = 0x%x def fail(self,s): raise IJMP_%06x_TestFail, s """ # # automagically generate the test_IJMP_* class definitions # code = '' for k in (0x36, 0x100, 0x3ff): code += template % (k, k, k, k) exec code simulavr-0.1.2.2/regress/test_opcodes/test_INC.py0000644000175000001440000000562307436006505016633 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_INC.py,v 1.3 2002/02/23 21:44:37 troth Exp $ # """Test the INC opcode. """ import base_test from registers import Reg, SREG class INC_TestFail(base_test.TestFail): pass class base_INC(base_test.opcode_test): """Generic test case for testing INC opcode. INC - Increment opcode is '1001 010d dddd 0011' where 0 <= d <= 31 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x9403 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct exp = (self.Vd + 1) & 0xff got = self.anal_regs[self.Rd] if exp != got: self.fail('INC r%02d: 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, exp, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H and C should be zero) V = (self.Vd == 0x7f) N = ((exp & 0x80) != 0) expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (exp == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('INC r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class INC_r%02d_v%02x_TestFail(INC_TestFail): pass class test_INC_r%02d_v%02x(base_INC): Rd = %d Vd = 0x%x def fail(self,s): raise INC_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0xaa, 0xf0, 0x01, 0x7f, 0x80 ) # # automagically generate the test_INC_rNN_vXX class definitions. # code = '' for d in range(32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_JMP.py0000644000175000001440000000421707450003236016640 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_JMP.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the JMP opcode. """ import base_test from registers import Reg class JMP_TestFail(base_test.TestFail): pass class base_JMP(base_test.opcode_32_test): """Generic test case for testing JMP opcode. The derived class must provide the reg member and the fail method. JMP - Relative Jump [PC <- k] opcode is '1001 010k kkkk 110k kkkk kkkk kkkk kkkk' 0 <= k < 4M """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 tmp = self.k >> 16 op = 0x940c | (tmp << 3) & 0x1f0 | tmp & 0x1 return (op << 16 | self.k & 0xffff) def analyze_results(self): self.is_pc_checked = 1 expect = self.k got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('JMP failed: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class JMP_%06x_TestFail(JMP_TestFail): pass class test_JMP_%06x(base_JMP): k = 0x%x def fail(self,s): raise JMP_%06x_TestFail, s """ # # automagically generate the test_JMP_* class definitions # code = '' for k in (0x100, 0x3ff): code += template % (k, k, k, k) exec code simulavr-0.1.2.2/regress/test_opcodes/test_LDD_Y.py0000644000175000001440000000525007453131325017107 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LDD_Y.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LDD_Y opcode. """ import base_test from registers import Reg, SREG class LDD_Y_TestFail(base_test.TestFail): pass class base_LDD_Y(base_test.opcode_test): """Generic test case for testing LDD_Y opcode. LDD_Y - Load Indirect from data space to Register using index Y with displacement, q. Operation: Rd <- (Y+q) opcode is '10q0 qq0d dddd 1qqq' where 0 <= d <= 31, 0 <= q <= 63 Only registers PC and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R28] = (self.Y & 0xff) self.setup_regs[Reg.R29] = (self.Y >> 8) # set up the val in memory self.mem_byte_write( self.Y + self.q, self.Vd ) # Return the raw opcode op_q = ((self.q & 0x20) << 8) | ((self.q & 0x18) << 7) | (self.q & 0x3) return 0x8008 | (self.Rd << 4) | op_q def analyze_results(self): self.reg_changed.extend( [self.Rd] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LDD_Y: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LDD_Y_r%02d_Y%04x_q%02x_v%02x_TestFail(LDD_Y_TestFail): pass class test_LDD_Y_r%02d_Y%04x_q%02x_v%02x(base_LDD_Y): Rd = %d Y = 0x%x q = 0x%x Vd = 0x%x def fail(self,s): raise LDD_Y_r%02d_Y%04x_q%02x_v%02x_TestFail, s """ # # automagically generate the test_LDD_Y_* class definitions. # code = '' for d in range(0,32,4): for y in (0x10f, 0x1ff): for q in range(0,64,0x10): for v in (0xaa, 0x55): args = (d,y,q,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LDD_Z.py0000644000175000001440000000525007453131325017110 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LDD_Z.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LDD_Z opcode. """ import base_test from registers import Reg, SREG class LDD_Z_TestFail(base_test.TestFail): pass class base_LDD_Z(base_test.opcode_test): """Generic test case for testing LDD_Z opcode. LDD_Z - Load Indirect from data space to Register using index Z with displacement, q. Operation: Rd <- (Z+q) opcode is '10q0 qq0d dddd 0qqq' where 0 <= d <= 31, 0 <= q <= 63 Only registers PC and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # set up the val in memory self.mem_byte_write( self.Z + self.q, self.Vd ) # Return the raw opcode op_q = ((self.q & 0x20) << 8) | ((self.q & 0x18) << 7) | (self.q & 0x3) return 0x8000 | (self.Rd << 4) | op_q def analyze_results(self): self.reg_changed.extend( [self.Rd] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LDD_Z: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LDD_Z_r%02d_Z%04x_q%02x_v%02x_TestFail(LDD_Z_TestFail): pass class test_LDD_Z_r%02d_Z%04x_q%02x_v%02x(base_LDD_Z): Rd = %d Z = 0x%x q = 0x%x Vd = 0x%x def fail(self,s): raise LDD_Z_r%02d_Z%04x_q%02x_v%02x_TestFail, s """ # # automagically generate the test_LDD_Z_* class definitions. # code = '' for d in range(0,32,4): for z in (0x10f, 0x1ff): for q in range(0,64,0x10): for v in (0xaa, 0x55): args = (d,z,q,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LDI.py0000644000175000001440000000461407435570753016643 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LDI.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the LDI opcode. """ import base_test from registers import Reg, SREG class LDI_TestFail(base_test.TestFail): pass class base_LDI(base_test.opcode_test): """Generic test case for testing LDI opcode. LDI - Load Immediate opcode is '1110 kkkk dddd kkkk' where 16 <= d <= 31 Only registers PC and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 # Return the raw opcode return 0xE000 | ((self.Rd - 16) << 4) | ((self.Vd & 0xf0) << 4) | (self.Vd & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd] ) # check that result is correct exp = self.Vd got = self.anal_regs[self.Rd] if exp != got: self.fail('LDI r%02d: 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, exp, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LDI_r%02d_v%02x_TestFail(LDI_TestFail): pass class test_LDI_r%02d_v%02x(base_LDI): Rd = %d Vd = 0x%x def fail(self,s): raise LDI_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0xaa, 0xf0, 0x01 ) # # automagically generate the test_LDI_rNN_vXX class definitions. # code = '' for d in range(16,32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LDS.py0000644000175000001440000000511107452674141016641 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LDS.py,v 1.1 2002/04/03 21:47:13 troth Exp $ # """Test the LDS opcode. """ import base_test from registers import Reg class LDS_TestFail(base_test.TestFail): pass class base_LDS(base_test.opcode_32_test): """Generic test case for testing LDS opcode. The derived class must provide the reg member and the fail method. LDS - Load Direct from data space: copy the data pointed to by k (in data space) in to Rd Operation: Rd <- (k) 32-bit opcode: '1001 000d dddd 0000 kkkk kkkk kkkk kkkk' 0 <= k < 64K """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 self.setup_regs[self.Rd] = 0x0 self.mem_byte_write(self.k,self.v) op = 0x9000 | (self.Rd << 4) return ( (op << 16) | (self.k & 0xffff) ) def analyze_results(self): self.reg_changed.extend( [self.Rd] ) self.is_pc_checked = 1 expect = self.setup_regs[Reg.PC] + 4 got = self.anal_regs[Reg.PC] if expect != got: self.fail('LDS pc check: expect=%x, got=%x' % (expect, got)) expect = self.v got = self.anal_regs[self.Rd] if expect != got: self.fail('LDS register: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LDS_r%02d_k%04x_v%02x_TestFail(LDS_TestFail): pass class test_LDS_r%02d_k%04x_v%02x(base_LDS): Rd = %d k = 0x%x v = 0x%x def fail(self,s): raise LDS_r%02d_k%04x_v%02x_TestFail, s """ # # automagically generate the test_LDS_* class definitions # code = '' for d in range(0,32): for k in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,k,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_X.py0000644000175000001440000000474007453131325017005 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_X.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_X opcode. """ import base_test from registers import Reg, SREG class LD_X_TestFail(base_test.TestFail): pass class base_LD_X(base_test.opcode_test): """Generic test case for testing LD_X opcode. LD_X - Load Indirect from data space to Register using index X Operation: Rd <- (X) opcode is '1001 000d dddd 1100' where 0 <= d <= 31 Only registers PC and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R26] = (self.X & 0xff) self.setup_regs[Reg.R27] = (self.X >> 8) # set up the val in memory self.mem_byte_write( self.X, self.Vd ) # Return the raw opcode return 0x900C | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_X: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_X_r%02d_X%04x_v%02x_TestFail(LD_X_TestFail): pass class test_LD_X_r%02d_X%04x_v%02x(base_LD_X): Rd = %d X = 0x%x Vd = 0x%x def fail(self,s): raise LD_X_r%02d_X%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_X_rNN_vXX class definitions. # code = '' for d in range(0,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_X_decr.py0000644000175000001440000000600607453131325017777 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_X_decr.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_X_decr opcode. """ import base_test from registers import Reg, SREG class LD_X_decr_TestFail(base_test.TestFail): pass class base_LD_X_decr(base_test.opcode_test): """Generic test case for testing LD_X_decr opcode. LD_X_decr - Load Indirect from data space to Register using index X and pre decrement X. Operation: X <- X - 1 then Rd <- (X) opcode is '1001 000d dddd 1110' where 0 <= d <= 31 and d != {26,27} Only registers PC, R26, R27 and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R26] = (self.X & 0xff) self.setup_regs[Reg.R27] = ((self.X >> 8) & 0xff) # set up the val in memory (memory is read after X is decremented, # thus we need to write to memory _at_ X - 1) self.mem_byte_write( self.X - 1, self.Vd ) # Return the raw opcode return 0x900E | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R26, Reg.R27] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_X_decr: expect=%02x, got=%02x' % (expect, got)) # check that X was decremented expect = self.X - 1 got = (self.anal_regs[Reg.R26] & 0xff) | ((self.anal_regs[Reg.R27] << 8) & 0xff00) if expect != got: self.fail('LD_X_decr X not decr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_X_decr_r%02d_X%04x_v%02x_TestFail(LD_X_decr_TestFail): pass class test_LD_X_decr_r%02d_X%04x_v%02x(base_LD_X_decr): Rd = %d X = 0x%x Vd = 0x%x def fail(self,s): raise LD_X_decr_r%02d_X%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_X_decr_rNN_vXX class definitions. # # Operation is undefined for d = 26 and d = 27. # code = '' for d in range(0,26)+range(28,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_X_incr.py0000644000175000001440000000600007453131325020007 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_X_incr.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_X_incr opcode. """ import base_test from registers import Reg, SREG class LD_X_incr_TestFail(base_test.TestFail): pass class base_LD_X_incr(base_test.opcode_test): """Generic test case for testing LD_X_incr opcode. LD_X_incr - Load Indirect from data space to Register using index X and post increment X. Operation: Rd <- (X) then X <- X + 1 opcode is '1001 000d dddd 1101' where 0 <= d <= 31 and d != {26,27} Only registers PC, R26, R27 and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R26] = (self.X & 0xff) self.setup_regs[Reg.R27] = ((self.X >> 8) & 0xff) # set up the val in memory (memory is read before X is incremented, # thus we need to write to memory _at_ X) self.mem_byte_write( self.X, self.Vd ) # Return the raw opcode return 0x900D | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R26, Reg.R27] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_X_incr: expect=%02x, got=%02x' % (expect, got)) # check that X was incremented expect = self.X + 1 got = (self.anal_regs[Reg.R26] & 0xff) | ((self.anal_regs[Reg.R27] << 8) & 0xff00) if expect != got: self.fail('LD_X_incr X not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_X_incr_r%02d_X%04x_v%02x_TestFail(LD_X_incr_TestFail): pass class test_LD_X_incr_r%02d_X%04x_v%02x(base_LD_X_incr): Rd = %d X = 0x%x Vd = 0x%x def fail(self,s): raise LD_X_incr_r%02d_X%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_X_incr_rNN_vXX class definitions. # # Operation is undefined for d = 26 and d = 27. # code = '' for d in range(0,26)+range(28,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_Y_decr.py0000644000175000001440000000600607453131325020000 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_Y_decr.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_Y_decr opcode. """ import base_test from registers import Reg, SREG class LD_Y_decr_TestFail(base_test.TestFail): pass class base_LD_Y_decr(base_test.opcode_test): """Generic test case for testing LD_Y_decr opcode. LD_Y_decr - Load Indirect from data space to Register using index Y and pre decrement Y. Operation: Y <- Y - 1 then Rd <- (Y) opcode is '1001 000d dddd 1010' where 0 <= d <= 31 and d != {28,29} Only registers PC, R28, R29 and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R28] = (self.Y & 0xff) self.setup_regs[Reg.R29] = ((self.Y >> 8) & 0xff) # set up the val in memory (memory is read after Y is decremented, # thus we need to write to memory _at_ Y - 1) self.mem_byte_write( self.Y - 1, self.Vd ) # Return the raw opcode return 0x900A | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R28, Reg.R29] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_Y_decr: expect=%02x, got=%02x' % (expect, got)) # check that Y was decremented expect = self.Y - 1 got = (self.anal_regs[Reg.R28] & 0xff) | ((self.anal_regs[Reg.R29] << 8) & 0xff00) if expect != got: self.fail('LD_Y_decr Y not decr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_Y_decr_r%02d_Y%04x_v%02x_TestFail(LD_Y_decr_TestFail): pass class test_LD_Y_decr_r%02d_Y%04x_v%02x(base_LD_Y_decr): Rd = %d Y = 0x%x Vd = 0x%x def fail(self,s): raise LD_Y_decr_r%02d_Y%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_Y_decr_rNN_vXX class definitions. # # Operation is undefined for d = 28 and d = 29. # code = '' for d in range(0,28)+range(30,32): for y in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,y,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_Y_incr.py0000644000175000001440000000600007453131325020010 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_Y_incr.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_Y_incr opcode. """ import base_test from registers import Reg, SREG class LD_Y_incr_TestFail(base_test.TestFail): pass class base_LD_Y_incr(base_test.opcode_test): """Generic test case for testing LD_Y_incr opcode. LD_Y_incr - Load Indirect from data space to Register using index Y and post increment Y. Operation: Rd <- (Y) then Y <- Y + 1 opcode is '1001 000d dddd 1001' where 0 <= d <= 31 and d != {28,29} Only registers PC, R28, R29 and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R28] = (self.Y & 0xff) self.setup_regs[Reg.R29] = ((self.Y >> 8) & 0xff) # set up the val in memory (memory is read before Y is incremented, # thus we need to write to memory _at_ Y) self.mem_byte_write( self.Y, self.Vd ) # Return the raw opcode return 0x9009 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R28, Reg.R29] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_Y_incr: expect=%02x, got=%02x' % (expect, got)) # check that Y was incremented expect = self.Y + 1 got = (self.anal_regs[Reg.R28] & 0xff) | ((self.anal_regs[Reg.R29] << 8) & 0xff00) if expect != got: self.fail('LD_Y_incr Y not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_Y_incr_r%02d_Y%04x_v%02x_TestFail(LD_Y_incr_TestFail): pass class test_LD_Y_incr_r%02d_Y%04x_v%02x(base_LD_Y_incr): Rd = %d Y = 0x%x Vd = 0x%x def fail(self,s): raise LD_Y_incr_r%02d_Y%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_Y_incr_rNN_vXX class definitions. # # Operation is undefined for d = 28 and d = 29. # code = '' for d in range(0,28)+range(30,32): for y in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,y,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_Z_decr.py0000644000175000001440000000577107453131325020011 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_Z_decr.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_Z_decr opcode. """ import base_test from registers import Reg, SREG class LD_Z_decr_TestFail(base_test.TestFail): pass class base_LD_Z_decr(base_test.opcode_test): """Generic test case for testing LD_Z_decr opcode. LD_Z_decr - Load Indirect from data space to Register using index Z and pre decrement Z. Operation: Z <- Z - 1 then Rd <- (Z) opcode is '1001 000d dddd 0010' where 0 <= d <= 31 and d != {30,31} Only registers PC, R30, R31 and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = ((self.Z >> 8) & 0xff) # set up the val in memory (memory is read after Z is decremented, # thus we need to write to memory _at_ Z - 1) self.mem_byte_write( self.Z - 1, self.Vd ) # Return the raw opcode return 0x9002 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R30, Reg.R31] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_Z_decr: expect=%02x, got=%02x' % (expect, got)) # check that Z was decremented expect = self.Z - 1 got = (self.anal_regs[Reg.R30] & 0xff) | ((self.anal_regs[Reg.R31] << 8) & 0xff00) if expect != got: self.fail('LD_Z_decr Z not decr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_Z_decr_r%02d_Z%04x_v%02x_TestFail(LD_Z_decr_TestFail): pass class test_LD_Z_decr_r%02d_Z%04x_v%02x(base_LD_Z_decr): Rd = %d Z = 0x%x Vd = 0x%x def fail(self,s): raise LD_Z_decr_r%02d_Z%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_Z_decr_rNN_vXX class definitions. # # Operation is undefined for d = 30 and d = 31. # code = '' for d in range(0,30): for z in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,z,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LD_Z_incr.py0000644000175000001440000000576307453131325020030 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LD_Z_incr.py,v 1.1 2002/04/04 20:08:53 troth Exp $ # """Test the LD_Z_incr opcode. """ import base_test from registers import Reg, SREG class LD_Z_incr_TestFail(base_test.TestFail): pass class base_LD_Z_incr(base_test.opcode_test): """Generic test case for testing LD_Z_incr opcode. LD_Z_incr - Load Indirect from data space to Register using index Z and post increment Z. Operation: Rd <- (Z) then Z <- Z + 1 opcode is '1001 000d dddd 0001' where 0 <= d <= 31 and d != {30,31} Only registers PC, R30, R31 and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = ((self.Z >> 8) & 0xff) # set up the val in memory (memory is read before Z is incremented, # thus we need to write to memory _at_ Z) self.mem_byte_write( self.Z, self.Vd ) # Return the raw opcode return 0x9001 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R30, Reg.R31] ) # check that result is correct expect = self.Vd got = self.anal_regs[self.Rd] if expect != got: self.fail('LD_Z_incr: expect=%02x, got=%02x' % (expect, got)) # check that Z was incremented expect = self.Z + 1 got = (self.anal_regs[Reg.R30] & 0xff) | ((self.anal_regs[Reg.R31] << 8) & 0xff00) if expect != got: self.fail('LD_Z_incr Z not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LD_Z_incr_r%02d_Z%04x_v%02x_TestFail(LD_Z_incr_TestFail): pass class test_LD_Z_incr_r%02d_Z%04x_v%02x(base_LD_Z_incr): Rd = %d Z = 0x%x Vd = 0x%x def fail(self,s): raise LD_Z_incr_r%02d_Z%04x_v%02x_TestFail, s """ # # automagically generate the test_LD_Z_incr_rNN_vXX class definitions. # # Operation is undefined for d = 30 and d = 31. # code = '' for d in range(0,30): for z in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,z,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LPM.py0000644000175000001440000000452707453174154016661 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LPM.py,v 1.1 2002/04/05 01:05:48 troth Exp $ # """Test the LPM opcode. """ import base_test from registers import Reg, SREG class LPM_TestFail(base_test.TestFail): pass class base_LPM(base_test.opcode_test): """Generic test case for testing LPM opcode. LPM - Load Program Memory Operation: R0 <- (Z) opcode is '1001 0101 1100 1000' Only registers PC and R00 should be changed. """ def setup(self): # Set the register values self.setup_regs[Reg.R00] = 0 self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # set up the val in memory self.prog_word_write( self.Z & 0xfffe, 0xaa55 ) # Return the raw opcode return 0x95C8 def analyze_results(self): self.reg_changed.extend( [Reg.R00] ) # check that result is correct if self.Z & 0x1: expect = 0xaa else: expect = 0x55 got = self.anal_regs[Reg.R00] if expect != got: self.fail('LPM: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LPM_Z%04x_TestFail(LPM_TestFail): pass class test_LPM_Z%04x(base_LPM): Z = 0x%x def fail(self,s): raise LPM_Z%04x_TestFail, s """ # # automagically generate the test_LPM_* class definitions. # code = '' for z in (0x10, 0x11, 0x100, 0x101): args = (z,)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LPM_Z.py0000644000175000001440000000466407453174154017154 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LPM_Z.py,v 1.1 2002/04/05 01:05:48 troth Exp $ # """Test the LPM_Z opcode. """ import base_test from registers import Reg, SREG class LPM_Z_TestFail(base_test.TestFail): pass class base_LPM_Z(base_test.opcode_test): """Generic test case for testing LPM_Z opcode. LPM_Z - Load Program Memory Operation: Rd <- (Z) opcode is '1001 000d dddd 0100' Only registers PC and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # set up the val in memory self.prog_word_write( self.Z & 0xfffe, 0xaa55 ) # Return the raw opcode return 0x9004 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd] ) # check that result is correct if self.Z & 0x1: expect = 0xaa else: expect = 0x55 got = self.anal_regs[self.Rd] if expect != got: self.fail('LPM_Z: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LPM_Z_r%02d_Z%04x_TestFail(LPM_Z_TestFail): pass class test_LPM_Z_r%02d_Z%04x(base_LPM_Z): Rd = %d Z = 0x%x def fail(self,s): raise LPM_Z_r%02d_Z%04x_TestFail, s """ # # automagically generate the test_LPM_Z_* class definitions. # code = '' for d in range(32): for z in (0x10, 0x11, 0x100, 0x101): args = (d,z)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LPM_Z_incr.py0000644000175000001440000000547307453174154020166 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LPM_Z_incr.py,v 1.1 2002/04/05 01:05:48 troth Exp $ # """Test the LPM_Z_incr opcode. """ import base_test from registers import Reg, SREG class LPM_Z_incr_TestFail(base_test.TestFail): pass class base_LPM_Z_incr(base_test.opcode_test): """Generic test case for testing LPM_Z_incr opcode. LPM_Z_incr - Load Program Memory (and post-increment Z) Operation: Rd <- (Z) then Z <- Z + 1 opcode is '1001 000d dddd 0101' Only registers PC and Rd should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = 0 self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # set up the val in memory self.prog_word_write( self.Z & 0xfffe, 0xaa55 ) # Return the raw opcode return 0x9005 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.R30, Reg.R31] ) # check that result is correct if self.Z & 0x1: expect = 0xaa else: expect = 0x55 got = self.anal_regs[self.Rd] if expect != got: self.fail('LPM_Z_incr: expect=%02x, got=%02x' % (expect, got)) # check that Z was incremented expect = self.Z + 1 got = (self.anal_regs[Reg.R30] & 0xff) | ((self.anal_regs[Reg.R31] << 8) & 0xff00) if expect != got: self.fail('LPM_Z_incr Z not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LPM_Z_incr_r%02d_Z%04x_TestFail(LPM_Z_incr_TestFail): pass class test_LPM_Z_incr_r%02d_Z%04x(base_LPM_Z_incr): Rd = %d Z = 0x%x def fail(self,s): raise LPM_Z_incr_r%02d_Z%04x_TestFail, s """ # # automagically generate the test_LPM_Z_incr_* class definitions. # # Undefined for r30 and r31 # code = '' for d in range(30): for z in (0x10, 0x11, 0x100, 0x101): args = (d,z)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_LSR.py0000644000175000001440000000571507435570753016676 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_LSR.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the LSR opcode. """ import base_test from registers import Reg, SREG class LSR_TestFail(base_test.TestFail): pass class base_LSR(base_test.opcode_test): """Generic test case for testing LSR opcode. LSR - Arithmetic ShiftRight opcode is '1001 010d dddd 0110' where d is register (0-31) Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have N set (operation should clear N) self.setup_regs[Reg.SREG] = 1 << SREG.N # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x9406 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((self.Vd >> 1) & 0x7f) got = self.anal_regs[self.Rd] if expect != got: self.fail('LSR r%02d: 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T and H should be zero) C = self.Vd & 1 N = 0 V = N ^ C expect_sreg += (N ^ V) << SREG.S expect_sreg += V << SREG.V expect_sreg += (expect == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('LSR r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class LSR_r%02d_v%02x_TestFail(LSR_TestFail): pass class test_LSR_r%02d_v%02x(base_LSR): Rd = %d Vd = 0x%x def fail(self,s): raise LSR_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0x10, 0x80, 0xaa ) # # automagically generate the test_LSR_rNN_vXX class definitions. # code = '' for d in range(32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_MOV.py0000644000175000001440000000425707435116277016674 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_MOV.py,v 1.1 2002/02/21 07:07:43 troth Exp $ # """Test the MOV opcode. """ import base_test from registers import Reg class MOV_TestFail(base_test.TestFail): pass class base_MOV(base_test.opcode_test): """Generic test case for testing MOV opcode. The derived class must provide the reg member and the fail method. MOV - Copy Register """ def setup(self): self.setup_regs[self.Rd] = 0x00 self.setup_regs[self.Rr] = 0xa5 # opcode is '0010 11rd dddd rrrr' where d is reg number (0-31) return 0x2C00 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.append(self.Rd) if self.anal_regs[self.Rd] != 0xa5: self.fail('MOV failed: expect=a5, got=%02x' % (self.anal_regs[self.Rd])) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class MOV_r%02d_r%02d_TestFail(MOV_TestFail): pass class test_MOV_r%02d_r%02d(base_MOV): Rd = %d Rr = %d def fail(self,s): raise MOV_r%02d_r%02d_TestFail, s """ # # automagically generate the test_MOV_* class definitions # code = '' for d in range(0,32,8): for r in range(1,32,8): args = (d,r)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_MOVW.py0000644000175000001440000000452707435116277017023 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_MOVW.py,v 1.1 2002/02/21 07:07:43 troth Exp $ # """Test the MOVW opcode. """ import base_test from registers import Reg class MOVW_TestFail(base_test.TestFail): pass class base_MOVW(base_test.opcode_test): """Generic test case for testing MOVW opcode. The derived class must provide the reg member and the fail method. MOVW - Copy Register Word """ def setup(self): self.setup_regs[self.Rd] = 0x00 self.setup_regs[self.Rd+1] = 0x00 self.setup_regs[self.Rr] = 0xa5 self.setup_regs[self.Rr+1] = 0x5a # opcode is '0000 0001 dddd rrrr' where d and r are Rd/2 and Rr/2 return 0x0100 | ((self.Rd/2) << 4) | ((self.Rr/2) & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd,self.Rd+1] ) if self.anal_regs[self.Rd] != 0xa5 or self.anal_regs[self.Rd+1] != 0x5a: self.fail('MOVW failed: expect=a55a, got=%02x%02x' % ( self.anal_regs[self.Rd], self.anal_regs[self.Rd+1])) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class MOVW_r%02d_r%02d_TestFail(MOVW_TestFail): pass class test_MOVW_r%02d_r%02d(base_MOVW): Rd = %d Rr = %d def fail(self,s): raise MOVW_r%02d_r%02d_TestFail, s """ # # automagically generate the test_MOVW_* class definitions # code = '' for d in range(0,32,4): for r in range(2,32,4): args = (d,r)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_MUL.py0000644000175000001440000000671507452354207016665 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_MUL.py,v 0.5 josef # """Test the MUL opcode. """ import base_test from registers import Reg, SREG class MUL_TestFail(base_test.TestFail): pass class base_MUL(base_test.opcode_test): """Generic test case for testing MUL opcode. description: multiply two unsigned numbers and save the result in R1:R0 (highb:lowbyte) opcode: 1001 11rd dddd rrrr changes: R1,R0,SREG: C set if R15 set, Z set if result 0x0000 """ def setup(self): # Set SREG to zero or only C flag set self.setup_regs[Reg.SREG] = 0x0 # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x9C00 | (self.Rr & 0x0f) | (self.Rd & 0x1f) << 4 | (self.Rr & 0x10) << 5 def analyze_results(self): self.reg_changed.extend( [Reg.R00,Reg.R01, Reg.SREG] ) # check that result is correct res = (self.Vd * self.Vr) expect = res & 0xffff got = self.anal_regs[Reg.R00] | self.anal_regs[Reg.R01] << 8 if expect != got: self.fail('MUL calc r%02d, r%02d: 0x%02x * 0x%02x = (expect=%d, got=%d)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be C = (expect & 0x8000) >> 15 expect_sreg += (expect == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('MUL flag setting: 0x%d * 0x%d -> SREG (expect=%02x, got=%02x)' % ( self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class MUL_rd%02d_vd%02x_rr%02d_vr%02xTestFail(MUL_TestFail): pass class test_MUL_rd%02d_vd%02x_rr%02d_vr%02x(base_MUL): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x def fail(self,s): raise MUL_rd%02d_vd%02x_rr%02d_vr%02xTestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0x01, 0x00 ), ( 0x00, 0x4d ), ( 0xff, 0xff ), ( 0xff, 0x4d ), ( 0x01, 0xff ), ) # # automagically generate the test_MUL_rdNN_vdXX_rrNN_vrXX class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' step = 8 for d in range(0,32,step): for r in range(1,32,8): for vd,vr in vals: args = (d,vd,r,vr)*4 code += template % args # # This is a special case (Rd == Rr) make sure that Vd == Vr. # for d in range(0,32,step): for vd,vr in vals: args = (d, vd, d, vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_MULS.py0000644000175000001440000000735207452354207017006 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_MULS.py,v 1.1 2002/04/02 16:12:55 troth Exp $ # """Test the MULS opcode. """ import base_test from registers import Reg, SREG class MULS_TestFail(base_test.TestFail): pass class base_MULS(base_test.opcode_test): """Generic test case for testing MULS opcode. description: multiply two signed numbers and save the result in R1:R0 (highb:lowbyte) opcode: 0000 0010 dddd rrrr 16 <= d,r <= 31 changes: R1,R0,SREG: C set if R15 set, Z set if result 0x0000 """ def setup(self): # Set SREG to zero or only C flag set self.setup_regs[Reg.SREG] = 0x0 # Set the register values self.setup_regs[self.Rd] = self.Vd & 0xff self.setup_regs[self.Rr] = self.Vr & 0xff # Return the raw opcode return 0x0200 | (self.Rr & 0x0f) | (self.Rd & 0x0f) << 4 def analyze_results(self): self.reg_changed.extend( [Reg.R00, Reg.R01, Reg.SREG] ) if (self.Vd & 0x80): # Vd is a negative 8 bit number, so convert to 32 bit self.Vd |= -256 if (self.Vr & 0x80): # Vd is a negative 8 bit number, so convert to 32 bit self.Vr |= -256 # check that result is correct res = (self.Vd * self.Vr) expect = res & 0xffff got = self.anal_regs[Reg.R00] | self.anal_regs[Reg.R01] << 8 if expect != got: self.fail('MULS calc r%02d, r%02d: %d * %d = (expect=%04x, got=%04x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be C = (expect & 0x8000) >> 15 expect_sreg += (expect == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('MULS flag setting: 0x%d * 0x%d -> SREG (expect=%02x, got=%02x)' % ( self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class MULS_rd%02d_vd%02x_rr%02d_vr%02x_TestFail(MULS_TestFail): pass class test_MULS_rd%02d_vd%02x_rr%02d_vr%02x(base_MULS): Rd = %d Vd = %d Rr = %d Vr = %d def fail(self,s): raise MULS_rd%02d_vd%02x_rr%02d_vr%02x_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00), ( 0xff, 0x01), ( 0x01, 0xff), ( 0xff, 0xff), ( 0xff, 0x00), ( 0x00, 0xb3), ( 0x80, 0x7f), ( 0x80, 0x80), ( 0x7f, 0x7f), ( 0x4d, 0x4d), ) # # automagically generate the test_MULS_rdNN_vdXX_rrNN_vrXX_C[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' step = 3 for d in range(16,32,step): for r in range(17,32,step): for vd,vr in vals: args = (d, vd, r, vr)*4 code += template % args # # Special case when Rd==Rr, make sure Vd==Vr. # for d in range(16,32,step): for vd,vr in vals: args = (d, vd, d, vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_MULSU.py0000644000175000001440000000741107452354207017127 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_MULSU.py,v 1.1 2002/04/02 16:12:55 troth Exp $ # """Test the MULSU opcode. """ import base_test from registers import Reg, SREG class MULSU_TestFail(base_test.TestFail): pass class base_MULSU(base_test.opcode_test): """Generic test case for testing MULSU opcode. description: multiply one signed (Rd) and an unsigned number and save the signed result in R1:R0 (highb:lowbyte) opcode: 0000 0011 0ddd 0rrr 16 <= d,r <= 23 changes: R1,R0,SREG: C set if R15 set, Z set if result 0x0000 """ def setup(self): # Set SREG to zero or only C flag set self.setup_regs[Reg.SREG] = 0x0 # Set the register values self.setup_regs[self.Rd] = self.Vd & 0xff self.setup_regs[self.Rr] = self.Vr & 0xff # Return the raw opcode return 0x0300 | self.Rr & 0x07 | (self.Rd & 0x07) << 4 def analyze_results(self): self.reg_changed.extend( [Reg.R00, Reg.R01, Reg.SREG] ) # only Rd is signed for this operation if (self.Vd & 0x80): # Vd is a negative 8 bit number, so convert to 32 bit self.Vd |= -256 # check that result is correct expect = (self.Vd * self.Vr) expect = expect & 0xffff got = (self.anal_regs[Reg.R00] | self.anal_regs[Reg.R01] << 8) if expect != got: self.fail('MULSU calc r%02d, r%02d: 0x%02x * 0x%02x = (expect=%04x, got=%04x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be C = (expect & 0x8000) >> 15 expect_sreg += (expect == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('MULSU flag setting: 0x%d * 0x%d -> SREG (expect=%02x, got=%02x)' % ( self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class MULSU_rd%02d_vd%02x_rr%02d_vr%02x_TestFail(MULSU_TestFail): pass class test_MULSU_rd%02d_vd%02x_rr%02d_vr%02x(base_MULSU): Rd = %d Vd = %d Rr = %d Vr = %d def fail(self,s): raise MULSU_rd%02d_vd%02x_rr%02d_vr%02x_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00), ( 0xff, 0x01), ( 0x01, 0xff), ( 0xff, 0xff), ( 0xff, 0x00), ( 0x00, 0xb3), ( 0x80, 0x7f), ( 0x80, 0x80), ( 0x7f, 0x7f), ( 0x4d, 0x4d), ( 0x80, 0xff), ( 0x7f, 0xff), ) # # automagically generate the test_MULSU_rdNN_vdXX_rrNN_vrXX class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' step = 2 for d in range(16,24,step): for r in range(17,24,step): for vd,vr in vals: args = (d, vd, r, vr)*4 code += template % args # # Special case when Rd==Rr, make sure Vd==Vr. # for d in range(16,24,step): for vd,vr in vals: args = (d, vd, d, vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_NEG.py0000644000175000001440000000605207435624256016640 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_NEG.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the NEG opcode. """ import base_test from registers import Reg, SREG class NEG_TestFail(base_test.TestFail): pass class base_NEG(base_test.opcode_test): """Generic test case for testing NEG opcode. NEG - Two's Complement opcode is '1001 010d dddd 0001' where 0 <= d <= 31 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x9401 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((0x00 - self.Vd) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('NEG r%02d: 0x%02x & 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) V = (expect == 0x80) N = ((expect & 0x80) != 0) H = ( (expect | self.Vd) >> 3) & 1 expect_sreg += H << SREG.H expect_sreg += N << SREG.N expect_sreg += V << SREG.V expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z expect_sreg += (expect != 0) << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('NEG r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class NEG_r%02d_v%02x_TestFail(NEG_TestFail): pass class test_NEG_r%02d_v%02x(base_NEG): Rd = %d Vd = 0x%x def fail(self,s): raise NEG_r%02d_v%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0xaa, 0xf0, 0x01, 0x80 ) # # automagically generate the test_NEG_rNN_vXX class definitions. # code = '' for d in range(32): for vd in vals: args = (d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_NOP.py0000644000175000001440000000306707435012377016661 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_NOP.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the NOP opcode. """ import base_test from registers import Reg class NOP_TestFail(base_test.TestFail): pass class test_NOP(base_test.opcode_test): """Test the NOP opcode. A NOP should only change the PC (PC <- PC + 1). If any other registers change, test fails. PC should be incremented by two bytes (1 word). Data sheet uses 1 word and gdb interface uses 2 bytes. """ def setup(self): return 0x0000 def analyze_results(self): # the base class checks PC and that no registers were changed. pass simulavr-0.1.2.2/regress/test_opcodes/test_OR.py0000644000175000001440000000643007435570753016551 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_OR.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the OR opcode. """ import base_test from registers import Reg, SREG class OR_TestFail(base_test.TestFail): pass class base_OR(base_test.opcode_test): """Generic test case for testing OR opcode. OR - Logical OR opcode is '0010 10rd dddd rrrr' where r and d are registers (d is destination). Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have only V set (opcode should clear it) self.setup_regs[Reg.SREG] = 1 << SREG.V # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x2800 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((self.Vd | self.Vr) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('OR r%02d, r%02d: 0x%02x | 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H, V and C should be zero) V = 0 N = ((expect & 0x80) != 0) expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('OR r%02d, r%02d: 0x%02x | 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class OR_rd%02d_vd%02x_rr%02d_vr%02x_TestFail(OR_TestFail): pass class test_OR_rd%02d_vd%02x_rr%02d_vr%02x(base_OR): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x def fail(self,s): raise OR_rd%02d_vd%02x_rr%02d_vr%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ) ) # # automagically generate the test_OR_rdNN_vdXX_rrNN_vrXX class definitions. # code = '' for d in range(0,32,4): for r in range(0,32,4): for vd,vr in vals: if d == r: vr = vd args = (d,vd,r,vr)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ORI.py0000644000175000001440000000633107435570753016662 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FORI A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ORI.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the ORI opcode. """ import base_test from registers import Reg, SREG class ORI_TestFail(base_test.TestFail): pass class base_ORI(base_test.opcode_test): """Generic test case for testing ORI opcode. ORI - Logical OR with Immediate opcode is '0110 kkkk dddd kkkk' where 16 <= d <= 31, 0 <= k <= 255 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to have only V set (opcode should clear it) self.setup_regs[Reg.SREG] = 1 << SREG.V # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x6000 | ((self.Rd - 16) << 4) | ((self.Vk & 0xf0) << 4) | (self.Vk & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ((self.Vd | self.Vk) & 0xff) got = self.anal_regs[self.Rd] if expect != got: self.fail('ORI r%02d, 0x%02x: 0x%02x | 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T, H, V and C should be zero) V = 0 N = ((expect & 0x80) != 0) expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ORI r%02d, 0x%02x: 0x%02x | 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ORI_r%02d_v%02x_k%02x_TestFail(ORI_TestFail): pass class test_ORI_r%02d_v%02x_k%02x(base_ORI): Rd = %d Vd = 0x%x Vk = 0x%x def fail(self,s): raise ORI_r%02d_v%02x_k%02x_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x23, 0xff ) ) # # automagically generate the test_ORI_rNN_vXX_kXX class definitions. # When K=0xff, this is effectively a SER operation. # code = '' for d in range(16,32): for vd,vk in vals: args = (d,vd,vk)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_POP.py0000644000175000001440000000503107450003236016643 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_POP.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the POP opcode. """ import base_test from registers import Reg class POP_TestFail(base_test.TestFail): pass class base_POP(base_test.opcode_stack_test): """Generic test case for testing POP opcode. The derived class must provide the reg member and the fail method. POP - Pop a register from the stack Rd <- STACK PC <- PC + 1 SP <- SP + 1 opcode is '1001 000d dddd 1111' """ def setup(self): # zero out the register is question self.setup_regs[self.Rd] = 0 # put the value on the stack self.setup_write_to_current_stack(self.k) return 0x900f | self.Rd << 4 def analyze_results(self): self.reg_changed.extend( [ self.Rd, Reg.SP ] ) # check that SP changed correctly expect = self.setup_regs[Reg.SP] + 1 got = self.anal_regs[Reg.SP] if got != expect: self.fail('POP stack push failed: expect=%04x, got=%04x' % ( expect, got )) # check that Rd now has k expect = self.k got = self.anal_regs[self.Rd] if got != expect: self.fail('POP operation failed: expect=%02x, got=%02x' % ( expect, got )) # # Template code for test case. # The fail method will raise a test specific exception. # template = """class POP_r%02d_%02x_TestFail(POP_TestFail): pass class test_POP_r%02d_%02x(base_POP): Rd = %d k = 0x%x def fail(self,s): raise POP_r%02d_%02x_TestFail, s """ # # automagically generate the test_POP_* class definitions # code = '' for rd in range(32): for k in (0x55,0xaa): args = (rd,k)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_PUSH.py0000644000175000001440000000476507450003236017001 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_PUSH.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the PUSH opcode. """ import base_test from registers import Reg class PUSH_TestFail(base_test.TestFail): pass class base_PUSH(base_test.opcode_stack_test): """Generic test case for testing PUSH opcode. The derived class must provide the reg member and the fail method. PUSH - Push a register on to the stack STACK <- Rd PC <- PC + 1 SP <- SP - 1 opcode is '1001 001d dddd 1111' """ def setup(self): # set the register is question self.setup_regs[self.Rd] = self.k return 0x920f | self.Rd << 4 def analyze_results(self): self.reg_changed.extend( [ self.Rd, Reg.SP ] ) # check that SP changed correctly expect = self.setup_regs[Reg.SP] - 1 got = self.anal_regs[Reg.SP] if got != expect: self.fail('PUSH stack push failed: expect=%04x, got=%04x' % ( expect, got )) # check that k is now on the stack expect = self.k got = self.analyze_read_from_current_stack() if got != expect: self.fail('PUSH operation failed: expect=%02x, got=%02x' % ( expect, got )) # # Template code for test case. # The fail method will raise a test specific exception. # template = """class PUSH_r%02d_%02x_TestFail(PUSH_TestFail): pass class test_PUSH_r%02d_%02x(base_PUSH): Rd = %d k = 0x%x def fail(self,s): raise PUSH_r%02d_%02x_TestFail, s """ # # automagically generate the test_PUSH_* class definitions # code = '' for rd in range(32): for k in (0x55,0xaa): args = (rd,k)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_RCALL.py0000644000175000001440000000531007450003236017042 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_RCALL.py,v 1.1 2002/03/26 05:26:54 troth Exp $ # """Test the RCALL opcode. """ import base_test from registers import Reg class RCALL_TestFail(base_test.TestFail): pass class base_RCALL(base_test.opcode_stack_test): """Generic test case for testing RCALL opcode. The derived class must provide the reg member and the fail method. RCALL - Relative call to subroutine PC <- PC + k + 1 STACK <- PC + 1 SP <- SP - 2 __or__ SP <- SP - 3 (2 bytes, 16 bit PC) (3 bytes, 22 bit PC) opcode is '1101 kkkk kkkk kkkk' -2K <= k < 2K """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 return 0xD000 | (self.k & 0x0fff) def analyze_results(self): self.reg_changed.append( Reg.SP ) self.is_pc_checked = 1 expect = self.setup_regs[Reg.PC]/2 + self.k + 1 got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('RCALL failed: expect=%x, got=%x' % (expect, got)) expect = self.setup_regs[Reg.SP] - 2 # 16 bit PC got = self.anal_regs[Reg.SP] if got != expect: self.fail('RCALL stack push failed: expect=%04x, got=%04x' % ( expect, got )) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class RCALL_%03x_TestFail(RCALL_TestFail): pass class test_RCALL_%03x(base_RCALL): k = 0x%x def fail(self,s): raise RCALL_%03x_TestFail, s """ # # automagically generate the test_RCALL_* class definitions # # FIXME: TRoth 2002-02-22: Really need to check jumps which wrap around the # ends of flash memory. Will need to know the size of the device's flash space # to do that though. # code = '' for k in (-100,100): code += template % ((k & 0xfff), (k & 0xfff), k, (k & 0xfff)) exec code simulavr-0.1.2.2/regress/test_opcodes/test_RET.py0000644000175000001440000000525707452354207016662 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_RET.py,v 1.1 2002/04/02 16:12:55 troth Exp $ # """Test the RET opcode. """ import base_test from registers import Reg class RET_TestFail(base_test.TestFail): pass class base_RET(base_test.opcode_stack_test): """Generic test case for testing RET opcode. The derived class must provide the reg member and the fail method. description: RET - return from called function the return address is loaded from the stack syntax: RET opcode is '1001 0101 0000 1000' """ def setup(self): # set the pc to a different position self.setup_regs[Reg.PC] = self.old_pc * 2 # put the value on the stack self.setup_word_to_stack(self.new_pc) return 0x9508 def analyze_results(self): self.is_pc_checked = 1 self.reg_changed.extend( [ Reg.SP ] ) # check that SP changed correctly expect = self.setup_regs[Reg.SP] + 2 got = self.anal_regs[Reg.SP] if got != expect: self.fail('RET stack pop failed! SP: expect=%x, got=%x' % ( expect, got )) # check that PC changed correctly expect = self.new_pc got = self.anal_regs[Reg.PC]/2 if got != expect: self.fail('RET operation failed! PC: expect=%x, got=%x' % ( expect, got )) # # Template code for test case. # The fail method will raise a test specific exception. # template = """class RET_new_%06x_old_%06x_TestFail(RET_TestFail): pass class test_RET_old_%06x_new_%06x(base_RET): old_pc = %d new_pc = %d def fail(self,s): raise RET_new_%06x_old_%06x_TestFail, s """ # # automagically generate the test_RET_* class definitions # code = '' for old_pc in (0,255,256,(8*1024/2-1)): for new_pc in (0,1,2,3,255,256,(8*1024/2-1)): args = (old_pc,new_pc)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_RETI.py0000644000175000001440000000575107452354207016772 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_RETI.py,v 0.5 josef # """Test the RETI opcode. """ import base_test from registers import Reg, SREG class RETI_TestFail(base_test.TestFail): pass class base_RETI(base_test.opcode_stack_test): """Generic test case for testing RETI opcode. The derived class must provide the reg member and the fail method. description: RETI - return from interrupt routine the return address is loaded from the stack and set the global interrupt flag syntax: RETI opcode is '1001 0101 0001 1000' """ def setup(self): # set the pc to a different position self.setup_regs[Reg.PC] = self.old_pc * 2 # put the value on the stack self.setup_word_to_stack(self.new_pc) # zero the SREG self.setup_regs[Reg.SREG] = 0 return 0x9518 def analyze_results(self): self.is_pc_checked = 1 self.reg_changed.extend( [ Reg.SP, Reg.SREG ] ) # check that SP changed correctly expect = self.setup_regs[Reg.SP] + 2 got = self.anal_regs[Reg.SP] if got != expect: self.fail('RETI stack pop failed! SP: expect=%x, got=%x' % ( expect, got )) # check that PC changed correctly expect = self.new_pc got = self.anal_regs[Reg.PC]/2 if got != expect: self.fail('RETI operation failed! PC: expect=%x, got=%x' % ( expect, got )) # check that the SREG.I flag is set and no others changed expect = 0x1 << SREG.I got = self.anal_regs[Reg.SREG] if got != expect: self.fail('SREG incorrectly updated: expect=%02x, got=%02x' %(expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """class RETI_new_%06x_old_%06x_TestFail(RETI_TestFail): pass class test_RETI_old_%06x_new_%06x(base_RETI): old_pc = 0x%06x new_pc = 0x%06x def fail(self,s): raise RETI_new_%06x_old_%06x_TestFail, s """ # # automagically generate the test_RETI_* class definitions # code = '' for old_pc in (0,255,256,(8*1024/2-1)): for new_pc in (0,1,2,3,255,256,(8*1024/2-1)): args = (old_pc,new_pc)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_RJMP.py0000644000175000001440000000446407435570753017006 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_RJMP.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the RJMP opcode. """ import base_test from registers import Reg class RJMP_TestFail(base_test.TestFail): pass class base_RJMP(base_test.opcode_test): """Generic test case for testing RJMP opcode. The derived class must provide the reg member and the fail method. RJMP - Relative Jump [PC <- PC + k + 1] opcode is '1100 kkkk kkkk kkkk' -2K <= k < 2K """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 return 0xC000 | (self.k & 0x0fff) def analyze_results(self): self.is_pc_checked = 1 expect = self.setup_regs[Reg.PC]/2 + self.k + 1 got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('RJMP failed: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class RJMP_%03x_TestFail(RJMP_TestFail): pass class test_RJMP_%03x(base_RJMP): k = 0x%x def fail(self,s): raise RJMP_%03x_TestFail, s """ # # automagically generate the test_RJMP_* class definitions # # FIXME: TRoth 2002-02-22: Really need to check jumps which wrap around the # ends of flash memory. Will need to know the size of the device's flash space # to do that though. # code = '' for k in (-100,100): code += template % ((k & 0xfff), (k & 0xfff), k, (k & 0xfff)) exec code simulavr-0.1.2.2/regress/test_opcodes/test_ROR.py0000644000175000001440000000610307435570753016670 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ROR.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the ROR opcode. """ import base_test from registers import Reg, SREG class ROR_TestFail(base_test.TestFail): pass class base_ROR(base_test.opcode_test): """Generic test case for testing ROR opcode. ROR - Rotate Right through Carry opcode is '1001 010d dddd 0111' where d is register (0-31) Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG self.setup_regs[Reg.SREG] = (self.C << SREG.C) # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x9407 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct expect = ( ((self.Vd >> 1) & 0x7f) | (self.C << 7)) got = self.anal_regs[self.Rd] if expect != got: self.fail('ROR r%02d: 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T and H should be zero) C = self.Vd & 1 N = ((expect & 0x80) != 0) V = N ^ C expect_sreg += (N ^ V) << SREG.S expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (expect == 0) << SREG.Z expect_sreg += C << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('ROR r%02d: 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vd, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ROR_r%02d_v%02x_C%d_TestFail(ROR_TestFail): pass class test_ROR_r%02d_v%02x_C%d(base_ROR): Rd = %d Vd = 0x%x C = %d def fail(self,s): raise ROR_r%02d_v%02x_C%d_TestFail, s """ # # Define a list of test values such that we test all the cases of SREG bits being set. # vals = ( 0x00, 0xff, 0x10, 0x80, 0xaa, 0x01, 0x08 ) # # automagically generate the test_ROR_rNN_vXX_rrNN_kXX class definitions. # code = '' for c in (0,1): for d in range(32): for vd in vals: args = (d,vd,c)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SBC.py0000644000175000001440000001001607435624256016631 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SBC.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the SBC opcode. """ import base_test from registers import Reg, SREG class SBC_TestFail(base_test.TestFail): pass class base_SBC(base_test.opcode_test): """Generic test case for testing SBC opcode. SBC - Subtract with Carry. [Rd <- Rd - Rr - C] opcode is '0000 10rd dddd rrrr' where r and d are registers (d is destination). Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero or (Z and/or C flag set) self.setup_regs[Reg.SREG] = (self.C << SREG.C) | (self.Z << SREG.Z) # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x0800 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct res = (self.Vd - self.Vr - self.C) expect = res & 0xff got = self.anal_regs[self.Rd] if expect != got: self.fail('SBC r%02d, r%02d: 0x%02x - 0x%02x - %d = (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, self.C, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = ((~self.Vd & self.Vr) | (self.Vr & res) | (res & ~self.Vd)) H = (carry >> 3) & 1 C = (carry >> 7) & 1 V = (((self.Vd & ~self.Vr & ~res) | (~self.Vd & self.Vr & res)) >> 7) & 1 N = ((expect & 0x80) != 0) expect_sreg += H << SREG.H expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += C << SREG.C if expect == 0: expect_sreg += self.Z << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('SBC r%02d, r%02d: 0x%02x - 0x%02x - %d -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, self.C, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SBC_rd%02d_vd%02x_rr%02d_vr%02x_C%d_Z%d_TestFail(SBC_TestFail): pass class test_SBC_rd%02d_vd%02x_rr%02d_vr%02x_C%d_Z%d(base_SBC): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x C = %d Z = %d def fail(self,s): raise SBC_rd%02d_vd%02x_rr%02d_vr%02x_C%d_Z%d_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x80, 0x00 ) ) # # automagically generate the test_SBC_rdNN_vdXX_rrNN_vrXX_C[01]_Z[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for c,z in ((0,0), (1,0), (0,1), (1,1)): for d in range(0,32,8): for r in range(1,32,8): for vd,vr in vals: args = (d,vd,r,vr,c,z)*4 code += template % args # make sure things work if Rd == Rr for c,z in ((0,0), (1,0), (0,1), (1,1)): for d in range(0,32,8): for vd,vr in vals: args = (d,vd,d,vd,c,z)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SBCI.py0000644000175000001440000000737007435570753016755 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SBCI.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the SBCI opcode. """ import base_test from registers import Reg, SREG class SBCI_TestFail(base_test.TestFail): pass class base_SBCI(base_test.opcode_test): """Generic test case for testing SBCI opcode. SBCI - Subtract Immediate with Carry. [Rd <- Rd - K - C] opcode is '0100 kkkk dddd kkkk' where d is 16-31 and K is 0-255 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero or (Z and/or C flag set) self.setup_regs[Reg.SREG] = (self.C << SREG.C) | (self.Z << SREG.Z) # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x4000 | ((self.Rd - 16) << 4) | ((self.Vk & 0xf0) << 4) | (self.Vk & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct res = (self.Vd - self.Vk - self.C) expect = res & 0xff got = self.anal_regs[self.Rd] if expect != got: self.fail('SBCI r%02d, 0x%02x: 0x%02x - 0x%02x - %d = (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, self.C, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = ((~self.Vd & self.Vk) | (self.Vk & res) | (res & ~self.Vd)) H = (carry >> 3) & 1 C = (carry >> 7) & 1 V = (((self.Vd & ~self.Vk & ~res) | (~self.Vd & self.Vk & res)) >> 7) & 1 N = ((expect & 0x80) != 0) expect_sreg += H << SREG.H expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += C << SREG.C if expect == 0: expect_sreg += self.Z << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('SBCI r%02d, 0x%02x: 0x%02x - 0x%02x - %d -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, self.C, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SBCI_r%02d_v%02x_k%02x_C%d_Z%d_TestFail(SBCI_TestFail): pass class test_SBCI_r%02d_v%02x_k%02x_C%d_Z%d(base_SBCI): Rd = %d Vd = 0x%x Vk = 0x%x C = %d Z = %d def fail(self,s): raise SBCI_r%02d_v%02x_k%02x_C%d_Z%d_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x80, 0x01 ) ) # # automagically generate the test_SBCI_rNN_vXX_kXX_C[01]_Z[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for c,z in ((0,0), (1,0), (0,1), (1,1)): for d in range(16,32): for vd,vk in vals: args = (d,vd,vk,c,z)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SBIW.py0000644000175000001440000000671707435624256017003 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SBIW.py,v 1.2 2002/02/23 05:29:18 troth Exp $ # """Test the SBIW opcode. """ import base_test from registers import Reg, SREG class SBIW_TestFail(base_test.TestFail): pass class base_SBIW(base_test.opcode_test): """Generic test case for testing SBIW opcode. Add Immediate to Word. [Rd+1:Rd <- Rd+1:Rd - K] opcode is '1001 0111 KKdd KKKK' where d is {24,26,28,30}, and K is [0,63] Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0x00 # Set the register values self.setup_regs[self.Rd] = (self.vd & 0xff) self.setup_regs[self.Rd+1] = (self.vd >> 8) # Return the raw opcode return 0x9700 | (((self.Rd/2)-12) << 4) | ((self.vk & 0x30) << 2) | (self.vk & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, self.Rd+1, Reg.SREG] ) # check that result is correct res = (self.vd - self.vk) expect = res & 0xffff got = self.anal_regs[self.Rd] + (self.anal_regs[self.Rd+1] << 8) if expect != got: self.fail('SBIW r%02d, r%02x: 0x%04x - 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.vk, self.vd, self.vk, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I, T and H should be zero) V = ((self.vd & ~res) >> 15) & 1 N = ((expect >> 15) & 1) expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += (expect == 0) << SREG.Z expect_sreg += (((res & ~self.vd >> 15)) & 1) << SREG.C got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('SBIW r%02d, r%02x: 0x%04x - 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.vk, self.vd, self.vk, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SBIW_r%02d_v%04x_k%02x_TestFail(SBIW_TestFail): pass class test_SBIW_r%02d_v%04x_k%02x(base_SBIW): Rd = %d vd = 0x%x vk = 0x%x def fail(self,s): raise SBIW_r%02d_v%04x_k%02x_TestFail, s """ # reg val, k val (0x00 <= k <= 0x3f) vals = ( ( 0x0000, 0x00 ), ( 0x0000, 0x3f ), ( 0x00ff, 0x01 ), ( 0xffbf, 0x3f ), ( 0xffff, 0x01 ), ( 0x0000, 0x01 ), ( 0x8000, 0x01 ) ) # # automagically generate the test_SBIW_rdNN_vdXX_rrNN_vrXX_C[01] class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for d in range(24,32,2): for vd,vk in vals: args = (d,vd,vk)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SBRC.py0000644000175000001440000000532607453174154016760 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SBRC.py,v 1.1 2002/04/05 01:05:48 troth Exp $ # """Test the SBRC opcode. """ import base_test from registers import Reg class SBRC_TestFail(base_test.TestFail): pass class base_SBRC(base_test.opcode_test): """Generic test case for testing SBRC opcode. The derived class must provide the reg member and the fail method. SBRC - Skip if Bit in Register is Cleared opcode is '1111 110d dddd 0bbb' """ def setup(self): self.setup_regs[self.Rd] = self.v self.setup_regs[Reg.PC] = 0xff * 2 # Need to make sure the PC+2 is a real insn if self.ni == 16: # just use a nop (0000 0000 0000 0000) next_op = 0x0000 else: # use high byte of LDS (1001 000d dddd 0000) (d=0) next_op = 0x9000 self.prog_word_write(self.setup_regs[Reg.PC]+2, next_op) return 0xFC00 | (self.Rd << 4) | (self.b & 0x7) def analyze_results(self): self.is_pc_checked = 1 if self.v == 0: if self.ni == 16: expect = self.setup_regs[Reg.PC]/2 + 2 else: expect = self.setup_regs[Reg.PC]/2 + 3 else: expect = self.setup_regs[Reg.PC]/2 + 1 got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('SBRC failed: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SBRC_r%02d_b%d_v%02x_ni%d_TestFail(SBRC_TestFail): pass class test_SBRC_r%02d_b%d_v%02x_ni%d(base_SBRC): Rd = %d b = %d v = %d ni = %d def fail(self,s): raise SBRC_r%03d_b%d_v%02x_ni%d_TestFail, s """ # # automagically generate the test_SBRC_* class definitions # code = '' for d in range(32): for b in range(8): for v in (0,0xff): for ni in (16,32): # is next insn 16 or 32 bits args = (d,b,v,ni)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SBRS.py0000644000175000001440000000532207453174154016774 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SBRS.py,v 1.1 2002/04/05 01:05:48 troth Exp $ # """Test the SRBS opcode. """ import base_test from registers import Reg class SRBS_TestFail(base_test.TestFail): pass class base_SRBS(base_test.opcode_test): """Generic test case for testing SRBS opcode. The derived class must provide the reg member and the fail method. SRBS - Skip if Bit in Register is Set opcode is '1111 110d dddd 0bbb' """ def setup(self): self.setup_regs[self.Rd] = self.v self.setup_regs[Reg.PC] = 0xff * 2 # Need to make sure the PC+2 is a real insn if self.ni == 16: # just use a nop (0000 0000 0000 0000) next_op = 0x0000 else: # use high byte of LDS (1001 000d dddd 0000) (d=0) next_op = 0x9000 self.prog_word_write(self.setup_regs[Reg.PC]+2, next_op) return 0xFE00 | (self.Rd << 4) | (self.b & 0x7) def analyze_results(self): self.is_pc_checked = 1 if self.v != 0: if self.ni == 16: expect = self.setup_regs[Reg.PC]/2 + 2 else: expect = self.setup_regs[Reg.PC]/2 + 3 else: expect = self.setup_regs[Reg.PC]/2 + 1 got = self.anal_regs[Reg.PC] / 2 if expect != got: self.fail('SRBS failed: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SRBS_r%02d_b%d_v%02x_ni%d_TestFail(SRBS_TestFail): pass class test_SRBS_r%02d_b%d_v%02x_ni%d(base_SRBS): Rd = %d b = %d v = %d ni = %d def fail(self,s): raise SRBS_r%03d_b%d_v%02x_ni%d_TestFail, s """ # # automagically generate the test_SRBS_* class definitions # code = '' for d in range(32): for b in range(8): for v in (0,0xff): for ni in (16,32): # is next insn 16 or 32 bits args = (d,b,v,ni)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_STD_Y.py0000644000175000001440000000541407453150326017142 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_STD_Y.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the STD_Y opcode. """ import base_test from registers import Reg, SREG class STD_Y_TestFail(base_test.TestFail): pass class base_STD_Y(base_test.opcode_test): """Generic test case for testing STD_Y opcode. STD_Y - Store Indirect to data space from Register using index Y with displacement, q. Operation: (Y+q) <- Rd opcode is '10q0 qq1d dddd 1qqq' where 0 <= d <= 31, 0 <= q <= 63 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R28] = (self.Y & 0xff) self.setup_regs[Reg.R29] = (self.Y >> 8) # Return the raw opcode op_q = ((self.q & 0x20) << 8) | ((self.q & 0x18) << 7) | (self.q & 0x3) return 0x8208 | (self.Rd << 4) | op_q def analyze_results(self): # check that result is correct # FIXME: [TRoth 2002/04/04] Is this really what we should expect? if self.Rd == Reg.R28: expect = self.setup_regs[Reg.R28] elif self.Rd == Reg.R29: expect = self.setup_regs[Reg.R29] else: expect = self.Vd got = self.mem_byte_read( self.Y + self.q ) if expect != got: self.fail('STD_Y: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class STD_Y_r%02d_Y%04x_q%02x_v%02x_TestFail(STD_Y_TestFail): pass class test_STD_Y_r%02d_Y%04x_q%02x_v%02x(base_STD_Y): Rd = %d Y = 0x%x q = 0x%x Vd = 0x%x def fail(self,s): raise STD_Y_r%02d_Y%04x_q%02x_v%02x_TestFail, s """ # # automagically generate the test_STD_Y_* class definitions. # code = '' for d in range(0,32): for y in (0x10f, 0x1ff): for q in range(0,64,0x10): for v in (0xaa, 0x55): args = (d,y,q,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_STD_Z.py0000644000175000001440000000541407453150326017143 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_STD_Z.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the STD_Z opcode. """ import base_test from registers import Reg, SREG class STD_Z_TestFail(base_test.TestFail): pass class base_STD_Z(base_test.opcode_test): """Generic test case for testing STD_Z opcode. STD_Z - Store Indirect to data space from Register using index Z with displacement, q. Operation: (Z+q) <- Rd opcode is '10q0 qq1d dddd 0qqq' where 0 <= d <= 31, 0 <= q <= 63 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # Return the raw opcode op_q = ((self.q & 0x20) << 8) | ((self.q & 0x18) << 7) | (self.q & 0x3) return 0x8200 | (self.Rd << 4) | op_q def analyze_results(self): # check that result is correct # FIXME: [TRoth 2002/04/04] Is this really what we should expect? if self.Rd == Reg.R30: expect = self.setup_regs[Reg.R30] elif self.Rd == Reg.R31: expect = self.setup_regs[Reg.R31] else: expect = self.Vd got = self.mem_byte_read( self.Z + self.q ) if expect != got: self.fail('STD_Z: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class STD_Z_r%02d_Z%04x_q%02x_v%02x_TestFail(STD_Z_TestFail): pass class test_STD_Z_r%02d_Z%04x_q%02x_v%02x(base_STD_Z): Rd = %d Z = 0x%x q = 0x%x Vd = 0x%x def fail(self,s): raise STD_Z_r%02d_Z%04x_q%02x_v%02x_TestFail, s """ # # automagically generate the test_STD_Z_* class definitions. # code = '' for d in range(0,32): for z in (0x10f, 0x1ff): for q in range(0,64,0x10): for v in (0xaa, 0x55): args = (d,z,q,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_STS.py0000644000175000001440000000477207452674141016704 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_STS.py,v 1.1 2002/04/03 21:47:13 troth Exp $ # """Test the STS opcode. """ import base_test from registers import Reg class STS_TestFail(base_test.TestFail): pass class base_STS(base_test.opcode_32_test): """Generic test case for testing STS opcode. The derived class must provide the reg member and the fail method. STS - Store Direct to data space: copy the data from Rd to addr k (in data space) Operation: (k) <- Rd 32-bit opcode: '1001 001d dddd 0000 kkkk kkkk kkkk kkkk' 0 <= k < 64K """ def setup(self): self.setup_regs[Reg.PC] = 0xff * 2 self.setup_regs[self.Rd] = self.v op = 0x9200 | (self.Rd << 4) return ( (op << 16) | (self.k & 0xffff) ) def analyze_results(self): self.is_pc_checked = 1 expect = self.setup_regs[Reg.PC] + 4 got = self.anal_regs[Reg.PC] if expect != got: self.fail('STS pc check: expect=%x, got=%x' % (expect, got)) expect = self.v got = self.mem_byte_read(self.k) if expect != got: self.fail('STS register: expect=%x, got=%x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class STS_r%02d_k%04x_v%02x_TestFail(STS_TestFail): pass class test_STS_r%02d_k%04x_v%02x(base_STS): Rd = %d k = 0x%x v = 0x%x def fail(self,s): raise STS_r%02d_k%04x_v%02x_TestFail, s """ # # automagically generate the test_STS_* class definitions # code = '' for d in range(0,32): for k in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,k,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_X.py0000644000175000001440000000507607453150326017041 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_X.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_X opcode. """ import base_test from registers import Reg, SREG class ST_X_TestFail(base_test.TestFail): pass class base_ST_X(base_test.opcode_test): """Generic test case for testing ST_X opcode. ST_X - Store Indirect to data space from Register using index X Operation: (X) <- Rd opcode is '1001 001d dddd 1100' where 0 <= d <= 31 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R26] = (self.X & 0xff) self.setup_regs[Reg.R27] = (self.X >> 8) # Return the raw opcode return 0x920C | (self.Rd << 4) def analyze_results(self): # check that result is correct # FIXME: [TRoth 2002/04/04] Is this really what we should expect? if self.Rd == Reg.R26: expect = self.setup_regs[Reg.R26] elif self.Rd == Reg.R27: expect = self.setup_regs[Reg.R27] else: expect = self.Vd got = self.mem_byte_read( self.X ) if expect != got: self.fail('ST_X: expect=%02x, got=%02x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_X_r%02d_X%04x_v%02x_TestFail(ST_X_TestFail): pass class test_ST_X_r%02d_X%04x_v%02x(base_ST_X): Rd = %d X = 0x%x Vd = 0x%x def fail(self,s): raise ST_X_r%02d_X%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_X_* class definitions. # code = '' for d in range(0,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_X_decr.py0000644000175000001440000000553107453150326020032 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_X_decr.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_X_decr opcode. """ import base_test from registers import Reg, SREG class ST_X_decr_TestFail(base_test.TestFail): pass class base_ST_X_decr(base_test.opcode_test): """Generic test case for testing ST_X_decr opcode. ST_X_decr - Store Indirect to data space from Register using index X with pre-decrement. Operation: X <- X - 1 then (X) <- Rd opcode is '1001 001d dddd 1110' where 0 <= d <= 31 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R26] = (self.X & 0xff) self.setup_regs[Reg.R27] = (self.X >> 8) # Return the raw opcode return 0x920E | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [Reg.R26, Reg.R27] ) # check that result is correct expect = self.Vd # must account for pre-decrement got = self.mem_byte_read( self.X - 1 ) if expect != got: self.fail('ST_X_decr: expect=%02x, got=%02x' % (expect, got)) # check that X was decremented expect = self.X - 1 got = (self.anal_regs[Reg.R26] & 0xff) | ((self.anal_regs[Reg.R27] << 8) & 0xff00) if expect != got: self.fail('LD_X_decr X not decr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_X_decr_r%02d_X%04x_v%02x_TestFail(ST_X_decr_TestFail): pass class test_ST_X_decr_r%02d_X%04x_v%02x(base_ST_X_decr): Rd = %d X = 0x%x Vd = 0x%x def fail(self,s): raise ST_X_decr_r%02d_X%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_X_decr_* class definitions. # # Operation is undefined for d = 26 and d = 27. # code = '' for d in range(0,26)+range(28,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_X_incr.py0000644000175000001440000000546207453150326020053 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_X_incr.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_X_incr opcode. """ import base_test from registers import Reg, SREG class ST_X_incr_TestFail(base_test.TestFail): pass class base_ST_X_incr(base_test.opcode_test): """Generic test case for testing ST_X_incr opcode. ST_X_incr - Store Indirect to data space from Register using index X with post-increment. Operation: (X) <- Rd then X <- X + 1 opcode is '1001 001d dddd 1101' where 0 <= d <= 31 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R26] = (self.X & 0xff) self.setup_regs[Reg.R27] = (self.X >> 8) # Return the raw opcode return 0x920D | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [Reg.R26, Reg.R27] ) # check that result is correct expect = self.Vd got = self.mem_byte_read( self.X ) if expect != got: self.fail('ST_X_incr: expect=%02x, got=%02x' % (expect, got)) # check that X was incremented expect = self.X + 1 got = (self.anal_regs[Reg.R26] & 0xff) | ((self.anal_regs[Reg.R27] << 8) & 0xff00) if expect != got: self.fail('LD_X_incr X not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_X_incr_r%02d_X%04x_v%02x_TestFail(ST_X_incr_TestFail): pass class test_ST_X_incr_r%02d_X%04x_v%02x(base_ST_X_incr): Rd = %d X = 0x%x Vd = 0x%x def fail(self,s): raise ST_X_incr_r%02d_X%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_X_incr_* class definitions. # # Operation is undefined for d = 26 and d = 27. # code = '' for d in range(0,26)+range(28,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_Y_decr.py0000644000175000001440000000554607453150326020041 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_Y_decr.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_Y_decr opcode. """ import base_test from registers import Reg, SREG class ST_Y_decr_TestFail(base_test.TestFail): pass class base_ST_Y_decr(base_test.opcode_test): """Generic test case for testing ST_Y_decr opcode. ST_Y_decr - Store Indirect to data space from Register using index Y with pre-decrement. Operation: Y <- Y - 1 then (Y) <- Rd opcode is '1001 001d dddd 1010' where 0 <= d <= 31 Only registers PC, R28 and R29 should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R28] = (self.Y & 0xff) self.setup_regs[Reg.R29] = (self.Y >> 8) # Return the raw opcode return 0x920A | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [Reg.R28, Reg.R29] ) # check that result is correct expect = self.Vd # must account for pre-decrement got = self.mem_byte_read( self.Y - 1 ) if expect != got: self.fail('ST_Y_decr: expect=%02x, got=%02x' % (expect, got)) # check that Y was decremented expect = self.Y - 1 got = (self.anal_regs[Reg.R28] & 0xff) | ((self.anal_regs[Reg.R29] << 8) & 0xff00) if expect != got: self.fail('LD_Y_decr Y not decr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_Y_decr_r%02d_Y%04x_v%02x_TestFail(ST_Y_decr_TestFail): pass class test_ST_Y_decr_r%02d_Y%04x_v%02x(base_ST_Y_decr): Rd = %d Y = 0x%x Vd = 0x%x def fail(self,s): raise ST_Y_decr_r%02d_Y%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_Y_decr_* class definitions. # # Operation is undefined for d = 28 and d = 29. # code = '' for d in range(0,28)+range(30,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_Y_incr.py0000644000175000001440000000547707453150326020062 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_Y_incr.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_Y_incr opcode. """ import base_test from registers import Reg, SREG class ST_Y_incr_TestFail(base_test.TestFail): pass class base_ST_Y_incr(base_test.opcode_test): """Generic test case for testing ST_Y_incr opcode. ST_Y_incr - Store Indirect to data space from Register using index Y with post-increment. Operation: (Y) <- Rd then Y <- Y + 1 opcode is '1001 001d dddd 1001' where 0 <= d <= 31 Only registers PC, R28 and R29 should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R28] = (self.Y & 0xff) self.setup_regs[Reg.R29] = (self.Y >> 8) # Return the raw opcode return 0x9209 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [Reg.R28, Reg.R29] ) # check that result is correct expect = self.Vd got = self.mem_byte_read( self.Y ) if expect != got: self.fail('ST_Y_incr: expect=%02x, got=%02x' % (expect, got)) # check that Y was incremented expect = self.Y + 1 got = (self.anal_regs[Reg.R28] & 0xff) | ((self.anal_regs[Reg.R29] << 8) & 0xff00) if expect != got: self.fail('LD_Y_incr Y not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_Y_incr_r%02d_Y%04x_v%02x_TestFail(ST_Y_incr_TestFail): pass class test_ST_Y_incr_r%02d_Y%04x_v%02x(base_ST_Y_incr): Rd = %d Y = 0x%x Vd = 0x%x def fail(self,s): raise ST_Y_incr_r%02d_Y%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_Y_incr_* class definitions. # # Operation is undefined for d = 28 and d = 29. # code = '' for d in range(0,28)+range(30,32): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_Z_decr.py0000644000175000001440000000551407453150326020035 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_Z_decr.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_Z_decr opcode. """ import base_test from registers import Reg, SREG class ST_Z_decr_TestFail(base_test.TestFail): pass class base_ST_Z_decr(base_test.opcode_test): """Generic test case for testing ST_Z_decr opcode. ST_Z_decr - Store Indirect to data space from Register using index Z with pre-decrement. Operation: Z <- Z - 1 then (Z) <- Rd opcode is '1001 001d dddd 0010' where 0 <= d <= 31 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # Return the raw opcode return 0x9202 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [Reg.R30, Reg.R31] ) # check that result is correct expect = self.Vd # must account for pre-decrement got = self.mem_byte_read( self.Z - 1 ) if expect != got: self.fail('ST_Z_decr: expect=%02x, got=%02x' % (expect, got)) # check that Z was decremented expect = self.Z - 1 got = (self.anal_regs[Reg.R30] & 0xff) | ((self.anal_regs[Reg.R31] << 8) & 0xff00) if expect != got: self.fail('LD_Z_decr Z not decr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_Z_decr_r%02d_Z%04x_v%02x_TestFail(ST_Z_decr_TestFail): pass class test_ST_Z_decr_r%02d_Z%04x_v%02x(base_ST_Z_decr): Rd = %d Z = 0x%x Vd = 0x%x def fail(self,s): raise ST_Z_decr_r%02d_Z%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_Z_decr_* class definitions. # # Operation is undefined for d = 30 and d = 31. # code = '' for d in range(0,30): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_ST_Z_incr.py0000644000175000001440000000544507453150326020056 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_ST_Z_incr.py,v 1.1 2002/04/04 22:16:54 troth Exp $ # """Test the ST_Z_incr opcode. """ import base_test from registers import Reg, SREG class ST_Z_incr_TestFail(base_test.TestFail): pass class base_ST_Z_incr(base_test.opcode_test): """Generic test case for testing ST_Z_incr opcode. ST_Z_incr - Store Indirect to data space from Register using index Z with post-increment. Operation: (Z) <- Rd then Z <- Z + 1 opcode is '1001 001d dddd 0001' where 0 <= d <= 31 Only registers PC should be changed. """ def setup(self): # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[Reg.R30] = (self.Z & 0xff) self.setup_regs[Reg.R31] = (self.Z >> 8) # Return the raw opcode return 0x9201 | (self.Rd << 4) def analyze_results(self): self.reg_changed.extend( [Reg.R30, Reg.R31] ) # check that result is correct expect = self.Vd got = self.mem_byte_read( self.Z ) if expect != got: self.fail('ST_Z_incr: expect=%02x, got=%02x' % (expect, got)) # check that Z was incremented expect = self.Z + 1 got = (self.anal_regs[Reg.R30] & 0xff) | ((self.anal_regs[Reg.R31] << 8) & 0xff00) if expect != got: self.fail('LD_Z_incr Z not incr: expect=%04x, got=%04x' % (expect, got)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class ST_Z_incr_r%02d_Z%04x_v%02x_TestFail(ST_Z_incr_TestFail): pass class test_ST_Z_incr_r%02d_Z%04x_v%02x(base_ST_Z_incr): Rd = %d Z = 0x%x Vd = 0x%x def fail(self,s): raise ST_Z_incr_r%02d_Z%04x_v%02x_TestFail, s """ # # automagically generate the test_ST_Z_incr_* class definitions. # # Operation is undefined for d = 30 and d = 31. # code = '' for d in range(0,30): for x in (0x10f, 0x1ff): for v in (0xaa, 0x55): args = (d,x,v)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SUB.py0000644000175000001440000000740507435570753016665 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SUB.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the SUB opcode. """ import base_test from registers import Reg, SREG class SUB_TestFail(base_test.TestFail): pass class base_SUB(base_test.opcode_test): """Generic test case for testing SUB opcode. SUB - Subtract without Carry. [Rd <- Rd - Rr] opcode is '0001 10rd dddd rrrr' where r and d are registers (d is destination). Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd self.setup_regs[self.Rr] = self.Vr # Return the raw opcode return 0x1800 | (self.Rd << 4) | ((self.Rr & 0x10) << 5) | (self.Rr & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct res = (self.Vd - self.Vr) expect = res & 0xff got = self.anal_regs[self.Rd] if expect != got: self.fail('SUB r%02d, r%02d: 0x%02x - 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = ((~self.Vd & self.Vr) | (self.Vr & res) | (res & ~self.Vd)) H = (carry >> 3) & 1 C = (carry >> 7) & 1 V = (((self.Vd & ~self.Vr & ~res) | (~self.Vd & self.Vr & res)) >> 7) & 1 N = ((expect & 0x80) != 0) expect_sreg += H << SREG.H expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += C << SREG.C expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('SUB r%02d, r%02d: 0x%02x - 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Rr, self.Vd, self.Vr, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SUB_rd%02d_vd%02x_rr%02d_vr%02x_TestFail(SUB_TestFail): pass class test_SUB_rd%02d_vd%02x_rr%02d_vr%02x(base_SUB): Rd = %d Vd = 0x%x Rr = %d Vr = 0x%x def fail(self,s): raise SUB_rd%02d_vd%02x_rr%02d_vr%02x_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x80, 0x01 ) ) # # automagically generate the test_SUB_rdNN_vdXX_rrNN_vrXX class definitions. # For these, we don't want Rd=Rr as that is a special case handled below. # code = '' for d in range(0,32,4): for r in range(1,32,4): for vd,vr in vals: args = (d,vd,r,vr)*4 code += template % args # make sure things work if Rd == Rr for d in range(2,32,4): for vd,vr in vals: args = (d,vd,d,vd)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SUBI.py0000644000175000001440000000671707435570753017003 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SUBI.py,v 1.1 2002/02/23 01:35:39 troth Exp $ # """Test the SUBI opcode. """ import base_test from registers import Reg, SREG class SUBI_TestFail(base_test.TestFail): pass class base_SUBI(base_test.opcode_test): """Generic test case for testing SUBI opcode. SUBI - Subtract Immediate. [Rd <- Rd - K] opcode is '0101 KKKK dddd KKKK' where d = 16-31 and K is 0-255 Only registers PC, Rd and SREG should be changed. """ def setup(self): # Set SREG to zero self.setup_regs[Reg.SREG] = 0 # Set the register values self.setup_regs[self.Rd] = self.Vd # Return the raw opcode return 0x5000 | ((self.Rd - 16) << 4) | ((self.Vk & 0xf0) << 4) | (self.Vk & 0xf) def analyze_results(self): self.reg_changed.extend( [self.Rd, Reg.SREG] ) # check that result is correct res = (self.Vd - self.Vk) expect = res & 0xff got = self.anal_regs[self.Rd] if expect != got: self.fail('SUBI r%02d, 0x%02x: 0x%02x - 0x%02x = (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect, got)) expect_sreg = 0 # calculate what we expect sreg to be (I and T should be zero) carry = ((~self.Vd & self.Vk) | (self.Vk & res) | (res & ~self.Vd)) H = (carry >> 3) & 1 C = (carry >> 7) & 1 V = (((self.Vd & ~self.Vk & ~res) | (~self.Vd & self.Vk & res)) >> 7) & 1 N = ((expect & 0x80) != 0) expect_sreg += H << SREG.H expect_sreg += V << SREG.V expect_sreg += N << SREG.N expect_sreg += (N ^ V) << SREG.S expect_sreg += C << SREG.C expect_sreg += (expect == 0) << SREG.Z got_sreg = self.anal_regs[Reg.SREG] if expect_sreg != got_sreg: self.fail('SUBI r%02d, r%02d: 0x%02x - 0x%02x -> SREG (expect=%02x, got=%02x)' % ( self.Rd, self.Vk, self.Vd, self.Vk, expect_sreg, got_sreg)) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SUBI_r%02d_v%02x_k%02x_TestFail(SUBI_TestFail): pass class test_SUBI_r%02d_v%02x_k%02x(base_SUBI): Rd = %d Vd = 0x%x Vk = 0x%x def fail(self,s): raise SUBI_r%02d_v%02x_k%02x_TestFail, s """ # # Define a list of test values such that we all the cases of SREG bits being set. # vals = ( ( 0x00, 0x00 ), ( 0xff, 0x00 ), ( 0xfe, 0x01 ), ( 0x0f, 0x00 ), ( 0x0f, 0xf0 ), ( 0x01, 0x02 ), ( 0x80, 0x01 ) ) # # automagically generate the test_SUBI_rdNN_vdXX_rrNN_vrXX class definitions. # code = '' for d in range(16,32): for vd,vk in vals: args = (d,vd,vk)*4 code += template % args exec code simulavr-0.1.2.2/regress/test_opcodes/test_SWAP.py0000644000175000001440000000435507435012377017000 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: test_SWAP.py,v 1.2 2002/02/20 21:28:31 troth Exp $ # """Test the SWAP opcode. """ import base_test from registers import Reg class SWAP_TestFail(base_test.TestFail): pass class base_SWAP(base_test.opcode_test): """Generic test case for testing SWAP opcode. The derived class must provide the reg member and the fail method. This opcode should swap the nibbles of the given register. PC should be incremented by two bytes (1 word). Data sheet uses 1 word and gdb interface uses 2 bytes. [checked by base_test.opcode_test class] """ def setup(self): self.setup_regs[self.reg] = 0xa5 # opcode is '1001 010d dddd 0010' where d is reg number (0-31) return 0x9402 | (self.reg << 4) def analyze_results(self): self.reg_changed.append(self.reg) if self.anal_regs[self.reg] != 0x5a: self.fail('nibbles not swapped: old=a5, new=%02x' % (self.anal_regs[self.reg])) # # Template code for test case. # The fail method will raise a test specific exception. # template = """ class SWAP_r%02d_TestFail(SWAP_TestFail): pass class test_SWAP_r%02d(base_SWAP): reg = %d def fail(self,s): raise SWAP_r%02d_TestFail, s """ # # automagically generate the test_SWAP_* class definitions # code = '' for i in range(32): code += template % (i,i,i,i) exec code simulavr-0.1.2.2/README0000644000175000001440000000424310203246517011314 00000000000000# # $Id: README,v 1.10 2002/04/12 23:12:21 troth Exp $ # Simulavr: A simulator for the Atmel AVR family of microcontrollers. This program is still under development and is not ready for production use. The simulator is stable enough for rudimentary debugging work in conjuction with a gdb-5.2 (see README.gdb). At this early stage of development, when simulavr enters a failure mode, it will print an error message and abort, thus generating a core file. This is actually quite useful, since you can examine the core file and see what caused simulavr to get confused. This is similar to what happens when a program seg faults and dumps core, but the error message should at least tell you where to start looking since it gives the file name and line number where the error message was generated. As of version 0.0.14, I haven't seen simulavr abort in quite some time. Take that with a grain of salt. :) I've only been testing this with the at90s8515 since that's the only device I have right now to compare with. I am hoping to support all AVR devices, but am not going to work on the TINY's and MEGA's until I get all the features of the at90s* devices working, and have solid gdb support. If someone else would like to contribute code for TINY or MEGA support, that would be greatly appreciated. To build the simulator, you need to use gcc for now. There is some gcc specific code in the source. I'm only doing this for now since it makes debugging a little bit easier. I'll gladly accept porting feedback if someone wishes to work on that front. I'm currently only developing using RedHat 7.2. Some preliminary porting has been done on NetBSD and FreeBSD. To build my test asm and C files, you need to have gcc and binutils build for avr and installed in your path. See the INSTALL file for more information on building and installing the simulator. There is the beginnings of documentation in the doc/ directory. The build system should automatically build the info, postscript and html formats of the documentation. If for some reason you have trouble building the documentation from the texinfo source, check the simulavr web site. I hope to keep the latest versions of the documenation there. simulavr-0.1.2.2/configure.ac0000644000175000001440000003350510204750146012724 00000000000000# -*- Autoconf -*- # Process this file with autoconf to produce a configure script. # # $Id: configure.ac,v 1.43 2004/09/15 15:17:40 troth Exp $ # ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### AC_PREREQ(2.57) AC_INIT(simulavr, 0.1.2.2, simulavr-devel@nongnu.org) AC_CONFIG_SRCDIR([src/main.c]) AC_CONFIG_HEADER([src/config.h:src/config-h.in]) AC_CANONICAL_BUILD AC_CANONICAL_HOST AC_CANONICAL_TARGET AM_INIT_AUTOMAKE # Checks for programs. AC_PROG_CC AC_PROG_LEX AC_PROG_YACC AC_PROG_LN_S AC_PROG_RANLIB AC_CHECK_PROG(AVR_AS, avr-as, avr-as) if test -z "$AVR_AS"; then AC_MSG_ERROR([no acceptable avr assembler found in \$PATH]) fi AC_CHECK_PROG(AVR_LD, avr-ld, avr-ld) if test -z "$AVR_LD"; then AC_MSG_ERROR([no acceptable avr linker found in \$PATH]) fi AC_CHECK_PROG(AVR_OBJCOPY, avr-objcopy, avr-objcopy) if test -z "$AVR_OBJCOPY"; then AC_MSG_ERROR([no acceptable avr objcopy found in \$PATH]) fi AC_CHECK_PROG(AVR_OBJDUMP, avr-objdump, avr-objdump) if test -z "$AVR_OBJDUMP"; then AC_MSG_ERROR([no acceptable avr objdump found in \$PATH]) fi AC_CHECK_PROG(AVR_NM, avr-nm, avr-nm) if test -z "$AVR_NM"; then AC_MSG_ERROR([no acceptable avr nm found in \$PATH]) fi AC_SUBST([AVR_AS]) AC_SUBST([AVR_LD]) AC_SUBST([AVR_OBJCOPY]) AC_SUBST([AVR_OBJDUMP]) AC_SUBST([AVR_NM]) AC_CHECK_PROG([AVR_CC], [avr-gcc], [avr-gcc]) if test -z "$AVR_CC"; then AC_MSG_ERROR([no acceptable cc found in \$PATH]) fi AC_SUBST([AVR_CC]) dnl This macro searches for python version 2.1.1 or newer AC_CACHE_CHECK(for python >= 2.1.1, _cv_python_211, [ changequote(<@, @>) _cv_python_211='no' ; if python -V 2>&1 | grep -q Python ; then cat < py_ver.py import sys v = sys.version_info ver = (int(v[0]) << 16) + (int(v[1]) << 8) + int(v[2]) if ver < 0x020101: print 'no' else: print 'yes' EOF _cv_python_211=`python py_ver.py` rm -f py_ver.py fi changequote([, ]) ]) if test "x$_cv_python_211" = "xyes" ; then ac_regression_subdir="regress" else AC_MSG_WARN([ ]) AC_MSG_WARN([Python >= 2.1.1 not found.]) AC_MSG_WARN([Regression tests will not be run.]) AC_MSG_WARN([ ]) fi AC_SUBST([ac_regression_subdir]) AM_CONDITIONAL(COND_HAS_PYTHON, test "x$_cv_python_211" = "xyes") dnl This macro searches for a GNU version of make. If a match is found, the dnl makefile variable `ifGNUmake' is set to the empty string, otherwise it is dnl set to "#". This is useful for including a special features in a Makefile, dnl which cannot be handled by other versions of make. The variable dnl _cv_gnu_make_command is set to the command to invoke GNU make if it exists, dnl the empty string otherwise. dnl dnl Here is an example of its use: dnl dnl Makefile.in might contain: dnl dnl # A failsafe way of putting a dependency rule into a makefile dnl $(DEPEND): dnl $(CC) -MM $(srcdir)/*.c > $(DEPEND) dnl dnl @ifGNUmake@ ifeq ($(DEPEND),$(wildcard $(DEPEND))) dnl @ifGNUmake@ include $(DEPEND) dnl @ifGNUmake@ endif dnl dnl Then configure.in would normally contain: dnl dnl CHECK_GNU_MAKE() dnl AC_OUTPUT(Makefile) dnl dnl Then perhaps to cause gnu make to override any other make, we could do dnl something like this (note that GNU make always looks for GNUmakefile first): dnl dnl if ! test x$_cv_gnu_make_command = x ; then dnl mv Makefile GNUmakefile dnl echo .DEFAULT: > Makefile ; dnl echo \ $_cv_gnu_make_command \$@ >> Makefile; dnl fi dnl dnl Then, if any (well almost any) other make is called, and GNU make also exists, dnl then the other make wraps the GNU make. dnl dnl @author John Darrington dnl @version $Id: configure.ac,v 1.43 2004/09/15 15:17:40 troth Exp $ dnl AC_CACHE_CHECK([for GNU make], [_cv_gnu_make_command], [ _cv_gnu_make_command='' ; dnl Search all the common names for GNU make for a in "$MAKE" make gmake gnumake ; do if ( $a --version 2> /dev/null | grep -q GNU ) ; then _cv_gnu_make_command=$a ; break; fi done ; ]) dnl dnl If there was a GNU version, then set @ifGNUmake@ to the empty string, dnl '#' otherwise if test "x$_cv_gnu_make_command" != "x" ; then ifGNUmake="" else ifGNUmake="#" fi AC_SUBST([ifGNUmake]) dnl This macro check to see if texinfo is installed. dnl If texinfo is not found, documentation will not be built. dnl dnl This should check for all of the programs which are needed to produce dnl all of the various documentation formats. dnl AC_CHECK_PROG(has_makeinfo, makeinfo, "yes") AC_CHECK_PROG(has_texi2dvi, texi2dvi, "yes") AC_CHECK_PROG(has_texindex, texindex, "yes") if test -n "$has_makeinfo" && test -n "$has_texi2dvi" && test -n "$has_texindex"; then ac_doc_subdir="doc" else AC_MSG_WARN([ ]) AC_MSG_WARN([You don not seem to have texinfo installed on your system.]) AC_MSG_WARN([Documentation will not be build. If you wish to build the]) AC_MSG_WARN([documentation files, you will have to install texinfo-4.0b]) AC_MSG_WARN([or newer.]) AC_MSG_WARN([ ]) fi dnl Checks for some programs in the tetex package. if test -n "$ac_doc_subdir"; then AC_CHECK_PROG(has_tex, tex, "yes") AC_CHECK_PROG(has_pdftex, pdftex, "yes") AC_CHECK_PROG(has_texi2html, texi2html, "yes") if test -z "$has_tex" || test -z "$has_pdftex" || test -z "$has_texi2html"; then ac_doc_subdir="" AC_MSG_WARN([ ]) AC_MSG_WARN([You do not seem to have tetex installed on your system.]) AC_MSG_WARN([Documentation will not be build. If you wish to build the]) AC_MSG_WARN([documentation files, you will have to install tetex.]) AC_MSG_WARN([ ]) fi fi dnl Checks for programs in the tetex-dvips package. if test -n "$ac_doc_subdir"; then AC_CHECK_PROG(has_dvips, dvips, "yes") if test -z "$has_dvips"; then ac_doc_subdir="" AC_MSG_WARN([ ]) AC_MSG_WARN([You do not seem to have dvips installed on your system.]) AC_MSG_WARN([Documentation will not be build. If you wish to build the]) AC_MSG_WARN([documentation files, you will have to install dvips.]) AC_MSG_WARN([ ]) fi fi AC_SUBST([ac_doc_subdir]) # Checks for libraries. dnl This macro defines a user switch to enable building of the curses dnl display interface: dnl dnl ./configure --enable-curses dnl dnl The default behavior is enabled. dnl dnl The dir_list argument is a space separated list of sources directories dnl used to build the curses interface programs. dnl dnl If enabled, this macro will check to see if a usable curses library dnl can be found. dnl AC_DEFUN([TROTH_ENABLE_CURSES], [ dnl AC_MSG_CHECKING([if user wants a curses display]) AC_ARG_ENABLE([curses], [ --disable-curses do not build with curses display (same as --enable-curses=no)], [ if test "$enable_curses" = "" -o "$enable_curses" = "yes"; then ac_curses_disp_dirs="$1" AC_MSG_RESULT(yes) else AC_MSG_RESULT(no, curses display program will not be built) fi ], [ ac_curses_disp_dirs="$1" AC_MSG_RESULT(yes) ]) if test -n "$ac_curses_disp_dirs"; then AC_CHECK_LIB(ncurses, initscr, CursesLib=ncurses AC_DEFINE(HAS_NCURSES, 1, System has ncurses library)) dnl if we can't find ncurses, try curses if test -z "$CursesLib"; then AC_CHECK_LIB(curses, initscr, CursesLib=curses) fi dnl Make sure that we found a curses library. if test -n "$CursesLib"; then AC_CHECK_LIB($CursesLib, resizeterm, AC_DEFINE(HAS_CURSES_RESIZETERM, 1, Curses library has resizeterm function), AC_MSG_ERROR([Your curses library lacks the resizeterm function. You have two choices: 1: upgrade your curses library. 2: disable curses by configuring with the '--disable-curses' option. ])) ac_lib_curses="-l$CursesLib" AC_DEFINE(USE_CURSES, 1, Build support for curses display) AC_SUBST([ac_curses_disp_dirs]) AC_SUBST([ac_lib_curses]) else AC_MSG_WARN([ ]) AC_MSG_WARN([No curses library found]) AC_MSG_WARN([Curses display program will not be built]) AC_MSG_WARN([ ]) fi fi ]) TROTH_ENABLE_CURSES(disp) # Checks for header files. AC_HEADER_STDC AC_HEADER_SYS_WAIT AC_CHECK_HEADERS([arpa/inet.h fcntl.h netinet/in.h stdlib.h string.h strings.h sys/ioctl.h sys/socket.h sys/time.h termios.h unistd.h inttypes.h]) # Checks for typedefs, structures, and compiler characteristics. AC_C_CONST AC_C_INLINE AC_TYPE_PID_T AC_TYPE_SIZE_T AC_HEADER_TIME AC_C_VOLATILE dnl Available from the GNU Autoconf Macro Archive at: dnl http://www.gnu.org/software/ac-archive/htmldoc/type_socklen_t.html dnl AC_CACHE_CHECK([for socklen_t], ac_cv_type_socklen_t, [ AC_TRY_COMPILE( [#include #include ], [socklen_t len = 42; return 0;], ac_cv_type_socklen_t=yes, ac_cv_type_socklen_t=no) ]) if test $ac_cv_type_socklen_t != yes; then AC_DEFINE([socklen_t], [int], [Define missing socklen_t.]) fi # Checks for library functions. AC_FUNC_FORK AC_PROG_GCC_TRADITIONAL AC_FUNC_MALLOC AC_FUNC_REALLOC AC_FUNC_SELECT_ARGTYPES AC_TYPE_SIGNAL AC_FUNC_VPRINTF AC_CHECK_FUNCS([atexit gettimeofday inet_ntoa memset putenv select socket strdup strerror strrchr strtol]) # Documentation checks AC_ARG_ENABLE(versioned-doc, [ --enable-versioned-doc install docs in directory with version name (default)], [case "${enableval}" in yes) versioned_doc=yes ;; no) versioned_doc=no ;; *) AC_MSG_ERROR(bad value ${enableval} for versioned-doc option) ;; esac], [versioned_doc=yes]) if test "$versioned_doc" = "yes"; then ac_doc_inst_dir='$(DESTDIR)$(datadir)/doc/simulavr-$(VERSION)' else ac_doc_inst_dir='$(DESTDIR)$(datadir)/doc/simulavr' fi AC_SUBST(ac_doc_inst_dir) dnl This macro defines a user switch to enable building of the documentation dnl in pdf format: dnl dnl ./configure --enable-pdf dnl dnl The default behavior is disabled. AC_MSG_CHECKING(if user wants to build the documentation in pdf format) AC_ARG_ENABLE(pdf, [ --enable-pdf enable generation of the documentation in pdf format], if test "$enable_pdf" = "yes"; then AC_MSG_RESULT(yes) TARGET_PDF=pdf INSTALL_PDF=install-pdf else AC_MSG_RESULT(no) fi , AC_MSG_RESULT(no) ) AC_SUBST(TARGET_PDF) AC_SUBST(INSTALL_PDF) dnl This macro defines a user switch to enable building of the documentation dnl in ps format (including doxygen): dnl dnl ./configure --enable-ps AC_MSG_CHECKING(if user wants to build the documentation in ps format) AC_ARG_ENABLE(ps, [ --enable-ps, enable generation of the documentation in ps format], if test "$enable_ps" = "yes"; then AC_MSG_RESULT(yes) TARGET_PS=ps INSTALL_PS=install-ps else AC_MSG_RESULT(no) fi , AC_MSG_RESULT(no) ) AC_SUBST(TARGET_PS) AC_SUBST(INSTALL_PS) dnl This macro checks if doxygen is installed on the build system dnl dnl inherits --enable-ps and --enable-pdf options dnl (thus, should be called after AVR_DOC_{PS,PDF}) dnl AC_DEFUN([CHECK_DOXYGEN],[ AC_MSG_CHECKING(for doxygen) dox_ver=`doxygen --version 2>/dev/null` if test "x$dox_ver" = "x"; then AC_MSG_RESULT(no) else # FIXME: should also check for dox_ver >= 1.3.3 AC_MSG_RESULT(yes) TARGET_DOX_PS=${TARGET_PS:+dox-ps} TARGET_DOX_PDF=${TARGET_PDF:+dox-pdf} TARGET_DOX_HTML=dox-html INSTALL_DOX_PS=${TARGET_DOX_PS:+install-dox-ps} INSTALL_DOX_PDF=${TARGET_DOX_PDF:+install-dox-pdf} INSTALL_DOX_HTML=install-dox-html fi ]) CHECK_DOXYGEN AC_SUBST(TARGET_DOX_PS) AC_SUBST(TARGET_DOX_PDF) AC_SUBST(TARGET_DOX_HTML) AC_SUBST(INSTALL_DOX_PS) AC_SUBST(INSTALL_DOX_PDF) AC_SUBST(INSTALL_DOX_HTML) dnl This macro defines a user switch to disable building of the test dnl programs as such: dnl dnl ./configure --disable-tests dnl dnl The default behavior is enabled. dnl dnl The dir_list argument is a space separated list of test directories. dnl AC_DEFUN(TROTH_ENABLE_TESTS,[ AC_MSG_CHECKING(if avr test programs will be built) AC_ARG_ENABLE(tests, [ --disable-tests do not build avr tests (same as --enable-tests=no)], if test "$enable_tests" = "" -o "$enable_tests" = "yes"; then ac_test_dirs="$1" AC_MSG_RESULT(yes) else ac_test_dirs="" AC_MSG_RESULT(no) fi , ac_test_dirs="$1" AC_MSG_RESULT(yes)) AC_SUBST([ac_test_dirs]) #if test -n "$ac_test_dirs"; then # TROTH_PROG_AVR_CC # TROTH_PROG_AVR_BINUTILS # TROTH_WITH_AVR_INCLUDES #fi ]) dnl My checks for the avr cross compiler and friends. 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do \ echo " $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file"; \ $(INSTALL_DATA) $(srcdir)/$$file $(DOC_INST_DIR)/$$file; \ done uninstall-local: rm -rf $(DOC_INST_DIR) pdf ps: (cd doc && $(MAKE) $(AM_MAKEFLAGS) $@) install-pdf: (cd doc && $(MAKE) $(AM_MAKEFLAGS) install-pdf) dist-hook: simulavr.spec cp simulavr.spec $(distdir)/simulavr.spec rm -rf $(distdir)/misc/CVS rm -rf $(distdir)/gdb-patches/CVS # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: simulavr-0.1.2.2/simulavr-disp.1.in0000644000175000001440000000154410203246517013723 00000000000000.TH SIMULAVR-DISP "1" "@DATE@" "simulavr-disp" "User Commands" .SH NAME simulavr-disp \- Atmel AVR simulator display .SH SYNOPSIS .B simulavr-disp [-p|--pfd=nn] flash_size sram_size sram_start eeprom_size .SH DESCRIPTION Displays register and memory information in real time as a child process to simulavr. .SS Options .TP \fB\-p\fR, \fB\-\-pfd\fR=nn The file descriptor number of the pipe used for getting information from simulavr. .SH "AUTHOR" Written by Theodore A. Roth. .SH "REPORTING BUGS" Report bugs to .SH "COPYRIGHT" Copyright 2001, 2002 Theodore A. Roth. simulavr-disp is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under the conditions of the GNU General Public License. .SH "SEE ALSO" http://savannah.nongnu.org/projects/simulavr/ simulavr-0.1.2.2/simulavr.1.in0000644000175000001440000000560510203246517012770 00000000000000.TH SIMULAVR "1" "@DATE@" "simulavr @VERSION@" "User Commands" .SH NAME simulavr \- Atmel AVR simulator .SH SYNOPSIS .B simulavr [\fIOPTIONS\fR]... -d DEVICE [\fIIMAGE\fR] .SH DESCRIPTION Simulate an avr device. The optional IMAGE file is loaded into the flash program memory space of the device. .SS Options .TP \fB\-h\fR, \fB\-\-help\fR Show this message .TP \fB\-D\fR, \fB\-\-debug\fR Debug instruction output .TP \fB\-v\fR, \fB\-\-version\fR Print out the version number and exit .TP \fB\-g\fR, \fB\-\-gdbserver\fR Run as a gdbserver process .TP \fB\-G\fR, \fB\-\-gdb\-debug\fR Print out debug messages for gdbserver .TP \fB\-p\fR, \fB\-\-port \fR Listen for gdb connection on TCP port .TP \fB\-d\fR, \fB\-\-device \fR Specify device type .TP \fB\-e\fR, \fB\-\-eeprom\-image \fR Specify an eeprom image file .TP \fB\-E\fR, \fB\-\-eeprom\-type \fR Specify the type of the eeprom image file .TP \fB\-F\fR, \fB\-\-flash\-type \fR Specify the type of the flash image file .TP \fB\-L\fR, \fB\-\-list\-devices\fR Print supported devices to stdout and exit .TP \fB\-P\fR, \fB\-\-disp\-prog \fR Display register and memory info with prog .TP \fB\-X\fR, \fB\-\-without\-xterm\fR Don't start disp prog in an xterm .TP \fB\-C\fR, \fB\-\-core\-dump\fR Dump a core memory image to file on exit .TP \fB\-c\fR, \fB\-\-clock\-freq \fR Set the simulated mcu clock freqency (in Hz) .TP \fB\-B\fR, \fB\-\-breakpoint \fR Set a breakpoint (address is a byte address) .PP If the image file types for eeprom or flash images are not given, the default file type is binary. .PP If you wish to run the simulator in gdbserver mode, you do not have to specify a flash-image file since the program can be loaded from gdb via the `load` command. .PP If '--port' option is given, and '--gdbserver' is not, port is ignored .PP If running in gdbserver mode and port is not specified, a default port of 1212 is used. .PP If using the '--breakpoint' option, note the simulator will terminate when the address is hit if you are not running in gdbserver mode. This feature not intended for use in gdbserver mode. It is really intended for testing the simulator itself, but may be useful for testing avr programs too. .SS "Currently available device types:" Use the '--list-devices' option to obtain the list your version of simulavr supports. .IP at90s1200 at90s2313 at90s4414 at90s8515 atmega8 atmega16 atmega103 atmega128 at43usb351 at43usb353 at43usb355 at43usb320 at43usb324 at43usb325 at43usb326 .SH "AUTHOR" Written by Theodore A. Roth. .SH "REPORTING BUGS" Report bugs to .SH "COPYRIGHT" Copyright 2001, 2002, 2003 Theodore A. Roth. simulavr is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under the conditions of the GNU General Public License. .SH "SEE ALSO" http://savannah.nongnu.org/projects/simulavr/ simulavr-0.1.2.2/simulavr.spec.in0000644000175000001440000000551010203246517013555 00000000000000## -*- mode: rpm-spec; -*- ## ## $Id: simulavr.spec.in,v 1.9 2003/08/28 06:18:58 troth Exp $ ## ## @configure_input@ ## %define debug_package %{nil} %define SimulavrVersion @VERSION@ Summary: A simulator for Atmel's AVR family of microcontrollers Name: simulavr Version: %{SimulavrVersion} Release: 1 License: GPL Group: Development/Debuggers Source: http://savannah.nongnu.org/download/simulavr/simulavr-%{version}.tar.gz Buildroot: %{_tmppath}/%{name}-%{version}-root BuildRequires: ncurses-devel, glibc-devel, gcc, make, gzip, texinfo, doxygen Requires: avr-gdb >= 5.3 Prereq: info %description Simulavr is a simulator for the Atmel AVR family of microcontrollers. Simulavr can be used either standalone or as a remote target for gdb. When used as a remote target for gdb, the simulator is used as a backend to gdb such that gdb can be used as a source level debugger. ## The simulavr-docs subpackage %package docs Summary: Documentation for Simulavr. Group: Documentation %description docs Documentation for simulavr in html, postscript and pdf formats. %prep %setup -q %build export CFLAGS="$RPM_OPT_FLAGS -fomit-frame-pointer -finline-functions -Wall" ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man \ --infodir=/usr/share/info --disable-tests --enable-ps make %install rm -rf $RPM_BUILD_ROOT %makeinstall infodir=$RPM_BUILD_ROOT%{_infodir} \ prefix=$RPM_BUILD_ROOT%{_prefix} rm -f $RPM_BUILD_ROOT%{_infodir}/dir %clean rm -rf $RPM_BUILD_ROOT %post [ -f %{_infodir}/simulavr.info ] && \ /sbin/install-info %{_infodir}/simulavr.info %{_infodir}/dir || : [ -f %{_infodir}/simulavr.info.gz ] && \ /sbin/install-info %{_infodir}/simulavr.info.gz %{_infodir}/dir || : %preun if [ $1 = 0 ]; then [ -f %{_infodir}/avr-gdb.info ] && \ /sbin/install-info --delete %{_infodir}/simulavr.info %{_infodir}/dir || : [ -f %{_infodir}/avr-gdb.info.gz ] && \ /sbin/install-info --delete %{_infodir}/simulavr.info.gz %{_infodir}/dir || : fi %files %defattr(-,root,root) /usr/bin/* %{_mandir}/man1/simulavr* %{_infodir}/*info* %doc AUTHORS ChangeLog COPYING INSTALL ProjSummary %doc README README.gdb README.opcodes TODO %files docs %doc doc/html/*.html %doc doc/internals_html/*.html %doc doc/simulavr.ps #%doc doc/simulavr.pdf %doc doc/simulavr-internals.ps #%doc doc/simulavr-internals.pdf %changelog * Wed Aug 27 2003 Theodore A. Roth - Fix broken rpmbuild on RedHat-9. * Fri Jun 20 2003 Theodore A. Roth - Bump avr-gdb requirement to 5.3. * Sat Oct 12 2002 Theodore A. Roth - Add man pages. * Thu Sep 05 2002 Theodore A. Roth - Require gdb-5.2.1. - Don't build pdf dox. * Sun Feb 10 2002 Theodore A. Roth - Moved documentation into simulavr-docs subpackage. * Thu Feb 07 2002 Theodore A. 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PACKAGE='simulavr' VERSION='0.1.2.2' cat >>confdefs.h <<_ACEOF #define PACKAGE "$PACKAGE" _ACEOF cat >>confdefs.h <<_ACEOF #define VERSION "$VERSION" _ACEOF # Some tools Automake needs. ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal-${am__api_version}"} AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"} AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake-${am__api_version}"} AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"} MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"} AMTAR=${AMTAR-"${am_missing_run}tar"} install_sh=${install_sh-"$am_aux_dir/install-sh"} # Installed binaries are usually stripped using `strip' when the user # run `make install-strip'. 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The system "awk" is bad on # some platforms. # Checks for programs. ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. set dummy ${ac_tool_prefix}gcc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_CC="${ac_tool_prefix}gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$ac_cv_prog_CC"; then ac_ct_CC=$CC # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_CC="gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 echo "${ECHO_T}$ac_ct_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi CC=$ac_ct_CC else CC="$ac_cv_prog_CC" fi if test -z "$CC"; then if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. set dummy ${ac_tool_prefix}cc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_CC="${ac_tool_prefix}cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$ac_cv_prog_CC"; then ac_ct_CC=$CC # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_CC="cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 echo "${ECHO_T}$ac_ct_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi CC=$ac_ct_CC else CC="$ac_cv_prog_CC" fi fi if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else ac_prog_rejected=no as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then ac_prog_rejected=yes continue fi ac_cv_prog_CC="cc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done if test $ac_prog_rejected = yes; then # We found a bogon in the path, so make sure we never use it. set dummy $ac_cv_prog_CC shift if test $# != 0; then # We chose a different compiler from the bogus one. # However, it has the same basename, so the bogon will be chosen # first if we set CC to just the basename; use the full file name. shift ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" fi fi fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$CC"; then if test -n "$ac_tool_prefix"; then for ac_prog in cl do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_CC="$ac_tool_prefix$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then echo "$as_me:$LINENO: result: $CC" >&5 echo "${ECHO_T}$CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi test -n "$CC" && break done fi if test -z "$CC"; then ac_ct_CC=$CC for ac_prog in cl do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_CC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then echo "$as_me:$LINENO: result: $ac_ct_CC" >&5 echo "${ECHO_T}$ac_ct_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi test -n "$ac_ct_CC" && break done CC=$ac_ct_CC fi fi test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH See \`config.log' for more details." >&5 echo "$as_me: error: no acceptable C compiler found in \$PATH See \`config.log' for more details." >&2;} { (exit 1); exit 1; }; } # Provide some information about the compiler. echo "$as_me:$LINENO:" \ "checking for C compiler version" >&5 ac_compiler=`set X $ac_compile; echo $2` { (eval echo "$as_me:$LINENO: \"$ac_compiler --version &5\"") >&5 (eval $ac_compiler --version &5) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } { (eval echo "$as_me:$LINENO: \"$ac_compiler -v &5\"") >&5 (eval $ac_compiler -v &5) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } { (eval echo "$as_me:$LINENO: \"$ac_compiler -V &5\"") >&5 (eval $ac_compiler -V &5) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ int main () { ; return 0; } _ACEOF ac_clean_files_save=$ac_clean_files ac_clean_files="$ac_clean_files a.out a.exe b.out" # Try to create an executable without -o first, disregard a.out. # It will help us diagnose broken compilers, and finding out an intuition # of exeext. echo "$as_me:$LINENO: checking for C compiler default output file name" >&5 echo $ECHO_N "checking for C compiler default output file name... $ECHO_C" >&6 ac_link_default=`echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` if { (eval echo "$as_me:$LINENO: \"$ac_link_default\"") >&5 (eval $ac_link_default) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; then # Find the output, starting from the most likely. This scheme is # not robust to junk in `.', hence go to wildcards (a.*) only as a last # resort. # Be careful to initialize this variable, since it used to be cached. # Otherwise an old cache value of `no' led to `EXEEXT = no' in a Makefile. ac_cv_exeext= # b.out is created by i960 compilers. for ac_file in a_out.exe a.exe conftest.exe a.out conftest a.* conftest.* b.out do test -f "$ac_file" || continue case $ac_file in *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.o | *.obj ) ;; conftest.$ac_ext ) # This is the source file. ;; [ab].out ) # We found the default executable, but exeext='' is most # certainly right. break;; *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` # FIXME: I believe we export ac_cv_exeext for Libtool, # but it would be cool to find out if it's true. Does anybody # maintain Libtool? --akim. export ac_cv_exeext break;; * ) break;; esac done else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 { { echo "$as_me:$LINENO: error: C compiler cannot create executables See \`config.log' for more details." >&5 echo "$as_me: error: C compiler cannot create executables See \`config.log' for more details." >&2;} { (exit 77); exit 77; }; } fi ac_exeext=$ac_cv_exeext echo "$as_me:$LINENO: result: $ac_file" >&5 echo "${ECHO_T}$ac_file" >&6 # Check the compiler produces executables we can run. If not, either # the compiler is broken, or we cross compile. echo "$as_me:$LINENO: checking whether the C compiler works" >&5 echo $ECHO_N "checking whether the C compiler works... $ECHO_C" >&6 # FIXME: These cross compiler hacks should be removed for Autoconf 3.0 # If not cross compiling, check that we can run a simple program. if test "$cross_compiling" != yes; then if { ac_try='./$ac_file' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then cross_compiling=no else if test "$cross_compiling" = maybe; then cross_compiling=yes else { { echo "$as_me:$LINENO: error: cannot run C compiled programs. If you meant to cross compile, use \`--host'. See \`config.log' for more details." >&5 echo "$as_me: error: cannot run C compiled programs. If you meant to cross compile, use \`--host'. See \`config.log' for more details." >&2;} { (exit 1); exit 1; }; } fi fi fi echo "$as_me:$LINENO: result: yes" >&5 echo "${ECHO_T}yes" >&6 rm -f a.out a.exe conftest$ac_cv_exeext b.out ac_clean_files=$ac_clean_files_save # Check the compiler produces executables we can run. If not, either # the compiler is broken, or we cross compile. echo "$as_me:$LINENO: checking whether we are cross compiling" >&5 echo $ECHO_N "checking whether we are cross compiling... $ECHO_C" >&6 echo "$as_me:$LINENO: result: $cross_compiling" >&5 echo "${ECHO_T}$cross_compiling" >&6 echo "$as_me:$LINENO: checking for suffix of executables" >&5 echo $ECHO_N "checking for suffix of executables... $ECHO_C" >&6 if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; then # If both `conftest.exe' and `conftest' are `present' (well, observable) # catch `conftest.exe'. For instance with Cygwin, `ls conftest' will # work properly (i.e., refer to `conftest.exe'), while it won't with # `rm'. for ac_file in conftest.exe conftest conftest.*; do test -f "$ac_file" || continue case $ac_file in *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.o | *.obj ) ;; *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` export ac_cv_exeext break;; * ) break;; esac done else { { echo "$as_me:$LINENO: error: cannot compute suffix of executables: cannot compile and link See \`config.log' for more details." >&5 echo "$as_me: error: cannot compute suffix of executables: cannot compile and link See \`config.log' for more details." >&2;} { (exit 1); exit 1; }; } fi rm -f conftest$ac_cv_exeext echo "$as_me:$LINENO: result: $ac_cv_exeext" >&5 echo "${ECHO_T}$ac_cv_exeext" >&6 rm -f conftest.$ac_ext EXEEXT=$ac_cv_exeext ac_exeext=$EXEEXT echo "$as_me:$LINENO: checking for suffix of object files" >&5 echo $ECHO_N "checking for suffix of object files... $ECHO_C" >&6 if test "${ac_cv_objext+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ int main () { ; return 0; } _ACEOF rm -f conftest.o conftest.obj if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? 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grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_lib_fl_yywrap=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_lib_fl_yywrap=no fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi echo "$as_me:$LINENO: result: $ac_cv_lib_fl_yywrap" >&5 echo "${ECHO_T}$ac_cv_lib_fl_yywrap" >&6 if test $ac_cv_lib_fl_yywrap = yes; then LEXLIB="-lfl" else echo "$as_me:$LINENO: checking for yywrap in -ll" >&5 echo $ECHO_N "checking for yywrap in -ll... $ECHO_C" >&6 if test "${ac_cv_lib_l_yywrap+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ll $LIBS" cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Override any gcc2 internal prototype to avoid an error. */ #ifdef __cplusplus extern "C" #endif /* We use char because int might match the return type of a gcc2 builtin and then its argument prototype would still apply. */ char yywrap (); int main () { yywrap (); ; return 0; } _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_lib_l_yywrap=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_lib_l_yywrap=no fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi echo "$as_me:$LINENO: result: $ac_cv_lib_l_yywrap" >&5 echo "${ECHO_T}$ac_cv_lib_l_yywrap" >&6 if test $ac_cv_lib_l_yywrap = yes; then LEXLIB="-ll" fi fi fi if test "x$LEX" != "x:"; then echo "$as_me:$LINENO: checking lex output file root" >&5 echo $ECHO_N "checking lex output file root... $ECHO_C" >&6 if test "${ac_cv_prog_lex_root+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else # The minimal lex program is just a single line: %%. But some broken lexes # (Solaris, I think it was) want two %% lines, so accommodate them. cat >conftest.l <<_ACEOF %% %% _ACEOF { (eval echo "$as_me:$LINENO: \"$LEX conftest.l\"") >&5 (eval $LEX conftest.l) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } if test -f lex.yy.c; then ac_cv_prog_lex_root=lex.yy elif test -f lexyy.c; then ac_cv_prog_lex_root=lexyy else { { echo "$as_me:$LINENO: error: cannot find output from $LEX; giving up" >&5 echo "$as_me: error: cannot find output from $LEX; giving up" >&2;} { (exit 1); exit 1; }; } fi fi echo "$as_me:$LINENO: result: $ac_cv_prog_lex_root" >&5 echo "${ECHO_T}$ac_cv_prog_lex_root" >&6 rm -f conftest.l LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root echo "$as_me:$LINENO: checking whether yytext is a pointer" >&5 echo $ECHO_N "checking whether yytext is a pointer... $ECHO_C" >&6 if test "${ac_cv_prog_lex_yytext_pointer+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else # POSIX says lex can declare yytext either as a pointer or an array; the # default is implementation-dependent. Figure out which it is, since # not all implementations provide the %pointer and %array declarations. ac_cv_prog_lex_yytext_pointer=no echo 'extern char *yytext;' >>$LEX_OUTPUT_ROOT.c ac_save_LIBS=$LIBS LIBS="$LIBS $LEXLIB" cat >conftest.$ac_ext <<_ACEOF `cat $LEX_OUTPUT_ROOT.c` _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_prog_lex_yytext_pointer=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_save_LIBS rm -f "${LEX_OUTPUT_ROOT}.c" fi echo "$as_me:$LINENO: result: $ac_cv_prog_lex_yytext_pointer" >&5 echo "${ECHO_T}$ac_cv_prog_lex_yytext_pointer" >&6 if test $ac_cv_prog_lex_yytext_pointer = yes; then cat >>confdefs.h <<\_ACEOF #define YYTEXT_POINTER 1 _ACEOF fi fi for ac_prog in 'bison -y' byacc do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_YACC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$YACC"; then ac_cv_prog_YACC="$YACC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_YACC="$ac_prog" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi YACC=$ac_cv_prog_YACC if test -n "$YACC"; then echo "$as_me:$LINENO: result: $YACC" >&5 echo "${ECHO_T}$YACC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi test -n "$YACC" && break done test -n "$YACC" || YACC="yacc" echo "$as_me:$LINENO: checking whether ln -s works" >&5 echo $ECHO_N "checking whether ln -s works... $ECHO_C" >&6 LN_S=$as_ln_s if test "$LN_S" = "ln -s"; then echo "$as_me:$LINENO: result: yes" >&5 echo "${ECHO_T}yes" >&6 else echo "$as_me:$LINENO: result: no, using $LN_S" >&5 echo "${ECHO_T}no, using $LN_S" >&6 fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_RANLIB+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$RANLIB"; then ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi RANLIB=$ac_cv_prog_RANLIB if test -n "$RANLIB"; then echo "$as_me:$LINENO: result: $RANLIB" >&5 echo "${ECHO_T}$RANLIB" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi fi if test -z "$ac_cv_prog_RANLIB"; then ac_ct_RANLIB=$RANLIB # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_ac_ct_RANLIB+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$ac_ct_RANLIB"; then ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_RANLIB="ranlib" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done test -z "$ac_cv_prog_ac_ct_RANLIB" && ac_cv_prog_ac_ct_RANLIB=":" fi fi ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB if test -n "$ac_ct_RANLIB"; then echo "$as_me:$LINENO: result: $ac_ct_RANLIB" >&5 echo "${ECHO_T}$ac_ct_RANLIB" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi RANLIB=$ac_ct_RANLIB else RANLIB="$ac_cv_prog_RANLIB" fi # Extract the first word of "avr-as", so it can be a program name with args. set dummy avr-as; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_AVR_AS+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$AVR_AS"; then ac_cv_prog_AVR_AS="$AVR_AS" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AVR_AS="avr-as" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi AVR_AS=$ac_cv_prog_AVR_AS if test -n "$AVR_AS"; then echo "$as_me:$LINENO: result: $AVR_AS" >&5 echo "${ECHO_T}$AVR_AS" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$AVR_AS"; then { { echo "$as_me:$LINENO: error: no acceptable avr assembler found in \$PATH" >&5 echo "$as_me: error: no acceptable avr assembler found in \$PATH" >&2;} { (exit 1); exit 1; }; } fi # Extract the first word of "avr-ld", so it can be a program name with args. set dummy avr-ld; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_AVR_LD+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$AVR_LD"; then ac_cv_prog_AVR_LD="$AVR_LD" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AVR_LD="avr-ld" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi AVR_LD=$ac_cv_prog_AVR_LD if test -n "$AVR_LD"; then echo "$as_me:$LINENO: result: $AVR_LD" >&5 echo "${ECHO_T}$AVR_LD" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$AVR_LD"; then { { echo "$as_me:$LINENO: error: no acceptable avr linker found in \$PATH" >&5 echo "$as_me: error: no acceptable avr linker found in \$PATH" >&2;} { (exit 1); exit 1; }; } fi # Extract the first word of "avr-objcopy", so it can be a program name with args. set dummy avr-objcopy; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_AVR_OBJCOPY+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$AVR_OBJCOPY"; then ac_cv_prog_AVR_OBJCOPY="$AVR_OBJCOPY" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AVR_OBJCOPY="avr-objcopy" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi AVR_OBJCOPY=$ac_cv_prog_AVR_OBJCOPY if test -n "$AVR_OBJCOPY"; then echo "$as_me:$LINENO: result: $AVR_OBJCOPY" >&5 echo "${ECHO_T}$AVR_OBJCOPY" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$AVR_OBJCOPY"; then { { echo "$as_me:$LINENO: error: no acceptable avr objcopy found in \$PATH" >&5 echo "$as_me: error: no acceptable avr objcopy found in \$PATH" >&2;} { (exit 1); exit 1; }; } fi # Extract the first word of "avr-objdump", so it can be a program name with args. set dummy avr-objdump; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_AVR_OBJDUMP+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$AVR_OBJDUMP"; then ac_cv_prog_AVR_OBJDUMP="$AVR_OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AVR_OBJDUMP="avr-objdump" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi AVR_OBJDUMP=$ac_cv_prog_AVR_OBJDUMP if test -n "$AVR_OBJDUMP"; then echo "$as_me:$LINENO: result: $AVR_OBJDUMP" >&5 echo "${ECHO_T}$AVR_OBJDUMP" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$AVR_OBJDUMP"; then { { echo "$as_me:$LINENO: error: no acceptable avr objdump found in \$PATH" >&5 echo "$as_me: error: no acceptable avr objdump found in \$PATH" >&2;} { (exit 1); exit 1; }; } fi # Extract the first word of "avr-nm", so it can be a program name with args. set dummy avr-nm; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_AVR_NM+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$AVR_NM"; then ac_cv_prog_AVR_NM="$AVR_NM" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AVR_NM="avr-nm" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi AVR_NM=$ac_cv_prog_AVR_NM if test -n "$AVR_NM"; then echo "$as_me:$LINENO: result: $AVR_NM" >&5 echo "${ECHO_T}$AVR_NM" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$AVR_NM"; then { { echo "$as_me:$LINENO: error: no acceptable avr nm found in \$PATH" >&5 echo "$as_me: error: no acceptable avr nm found in \$PATH" >&2;} { (exit 1); exit 1; }; } fi # Extract the first word of "avr-gcc", so it can be a program name with args. set dummy avr-gcc; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_AVR_CC+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$AVR_CC"; then ac_cv_prog_AVR_CC="$AVR_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AVR_CC="avr-gcc" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi AVR_CC=$ac_cv_prog_AVR_CC if test -n "$AVR_CC"; then echo "$as_me:$LINENO: result: $AVR_CC" >&5 echo "${ECHO_T}$AVR_CC" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$AVR_CC"; then { { echo "$as_me:$LINENO: error: no acceptable cc found in \$PATH" >&5 echo "$as_me: error: no acceptable cc found in \$PATH" >&2;} { (exit 1); exit 1; }; } fi echo "$as_me:$LINENO: checking for python >= 2.1.1" >&5 echo $ECHO_N "checking for python >= 2.1.1... $ECHO_C" >&6 if test "${_cv_python_211+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else _cv_python_211='no' ; if python -V 2>&1 | grep -q Python ; then cat < py_ver.py import sys v = sys.version_info ver = (int(v[0]) << 16) + (int(v[1]) << 8) + int(v[2]) if ver < 0x020101: print 'no' else: print 'yes' EOF _cv_python_211=`python py_ver.py` rm -f py_ver.py fi fi echo "$as_me:$LINENO: result: $_cv_python_211" >&5 echo "${ECHO_T}$_cv_python_211" >&6 if test "x$_cv_python_211" = "xyes" ; then ac_regression_subdir="regress" else { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} { echo "$as_me:$LINENO: WARNING: Python >= 2.1.1 not found." >&5 echo "$as_me: WARNING: Python >= 2.1.1 not found." >&2;} { echo "$as_me:$LINENO: WARNING: Regression tests will not be run." >&5 echo "$as_me: WARNING: Regression tests will not be run." >&2;} { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} fi if test "x$_cv_python_211" = "xyes"; then COND_HAS_PYTHON_TRUE= COND_HAS_PYTHON_FALSE='#' else COND_HAS_PYTHON_TRUE='#' COND_HAS_PYTHON_FALSE= fi echo "$as_me:$LINENO: checking for GNU make" >&5 echo $ECHO_N "checking for GNU make... $ECHO_C" >&6 if test "${_cv_gnu_make_command+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else _cv_gnu_make_command='' ; for a in "$MAKE" make gmake gnumake ; do if ( $a --version 2> /dev/null | grep -q GNU ) ; then _cv_gnu_make_command=$a ; break; fi done ; fi echo "$as_me:$LINENO: result: $_cv_gnu_make_command" >&5 echo "${ECHO_T}$_cv_gnu_make_command" >&6 if test "x$_cv_gnu_make_command" != "x" ; then ifGNUmake="" else ifGNUmake="#" fi # Extract the first word of "makeinfo", so it can be a program name with args. set dummy makeinfo; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_makeinfo+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_makeinfo"; then ac_cv_prog_has_makeinfo="$has_makeinfo" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_makeinfo=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_makeinfo=$ac_cv_prog_has_makeinfo if test -n "$has_makeinfo"; then echo "$as_me:$LINENO: result: $has_makeinfo" >&5 echo "${ECHO_T}$has_makeinfo" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi # Extract the first word of "texi2dvi", so it can be a program name with args. set dummy texi2dvi; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_texi2dvi+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_texi2dvi"; then ac_cv_prog_has_texi2dvi="$has_texi2dvi" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_texi2dvi=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_texi2dvi=$ac_cv_prog_has_texi2dvi if test -n "$has_texi2dvi"; then echo "$as_me:$LINENO: result: $has_texi2dvi" >&5 echo "${ECHO_T}$has_texi2dvi" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi # Extract the first word of "texindex", so it can be a program name with args. set dummy texindex; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_texindex+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_texindex"; then ac_cv_prog_has_texindex="$has_texindex" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_texindex=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_texindex=$ac_cv_prog_has_texindex if test -n "$has_texindex"; then echo "$as_me:$LINENO: result: $has_texindex" >&5 echo "${ECHO_T}$has_texindex" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -n "$has_makeinfo" && test -n "$has_texi2dvi" && test -n "$has_texindex"; then ac_doc_subdir="doc" else { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} { echo "$as_me:$LINENO: WARNING: You don not seem to have texinfo installed on your system." >&5 echo "$as_me: WARNING: You don not seem to have texinfo installed on your system." >&2;} { echo "$as_me:$LINENO: WARNING: Documentation will not be build. If you wish to build the" >&5 echo "$as_me: WARNING: Documentation will not be build. If you wish to build the" >&2;} { echo "$as_me:$LINENO: WARNING: documentation files, you will have to install texinfo-4.0b" >&5 echo "$as_me: WARNING: documentation files, you will have to install texinfo-4.0b" >&2;} { echo "$as_me:$LINENO: WARNING: or newer." >&5 echo "$as_me: WARNING: or newer." >&2;} { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} fi if test -n "$ac_doc_subdir"; then # Extract the first word of "tex", so it can be a program name with args. set dummy tex; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_tex+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_tex"; then ac_cv_prog_has_tex="$has_tex" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_tex=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_tex=$ac_cv_prog_has_tex if test -n "$has_tex"; then echo "$as_me:$LINENO: result: $has_tex" >&5 echo "${ECHO_T}$has_tex" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi # Extract the first word of "pdftex", so it can be a program name with args. set dummy pdftex; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_pdftex+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_pdftex"; then ac_cv_prog_has_pdftex="$has_pdftex" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_pdftex=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_pdftex=$ac_cv_prog_has_pdftex if test -n "$has_pdftex"; then echo "$as_me:$LINENO: result: $has_pdftex" >&5 echo "${ECHO_T}$has_pdftex" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi # Extract the first word of "texi2html", so it can be a program name with args. set dummy texi2html; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_texi2html+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_texi2html"; then ac_cv_prog_has_texi2html="$has_texi2html" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_texi2html=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_texi2html=$ac_cv_prog_has_texi2html if test -n "$has_texi2html"; then echo "$as_me:$LINENO: result: $has_texi2html" >&5 echo "${ECHO_T}$has_texi2html" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$has_tex" || test -z "$has_pdftex" || test -z "$has_texi2html"; then ac_doc_subdir="" { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} { echo "$as_me:$LINENO: WARNING: You do not seem to have tetex installed on your system." >&5 echo "$as_me: WARNING: You do not seem to have tetex installed on your system." >&2;} { echo "$as_me:$LINENO: WARNING: Documentation will not be build. If you wish to build the" >&5 echo "$as_me: WARNING: Documentation will not be build. If you wish to build the" >&2;} { echo "$as_me:$LINENO: WARNING: documentation files, you will have to install tetex." >&5 echo "$as_me: WARNING: documentation files, you will have to install tetex." >&2;} { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} fi fi if test -n "$ac_doc_subdir"; then # Extract the first word of "dvips", so it can be a program name with args. set dummy dvips; ac_word=$2 echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6 if test "${ac_cv_prog_has_dvips+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test -n "$has_dvips"; then ac_cv_prog_has_dvips="$has_dvips" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_has_dvips=""yes"" echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done fi fi has_dvips=$ac_cv_prog_has_dvips if test -n "$has_dvips"; then echo "$as_me:$LINENO: result: $has_dvips" >&5 echo "${ECHO_T}$has_dvips" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi if test -z "$has_dvips"; then ac_doc_subdir="" { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} { echo "$as_me:$LINENO: WARNING: You do not seem to have dvips installed on your system." >&5 echo "$as_me: WARNING: You do not seem to have dvips installed on your system." >&2;} { echo "$as_me:$LINENO: WARNING: Documentation will not be build. If you wish to build the" >&5 echo "$as_me: WARNING: Documentation will not be build. If you wish to build the" >&2;} { echo "$as_me:$LINENO: WARNING: documentation files, you will have to install dvips." >&5 echo "$as_me: WARNING: documentation files, you will have to install dvips." >&2;} { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} fi fi # Checks for libraries. echo "$as_me:$LINENO: checking if user wants a curses display" >&5 echo $ECHO_N "checking if user wants a curses display... $ECHO_C" >&6 # Check whether --enable-curses or --disable-curses was given. if test "${enable_curses+set}" = set; then enableval="$enable_curses" if test "$enable_curses" = "" -o "$enable_curses" = "yes"; then ac_curses_disp_dirs="disp" echo "$as_me:$LINENO: result: yes" >&5 echo "${ECHO_T}yes" >&6 else echo "$as_me:$LINENO: result: no" >&5 echo "${ECHO_T}no" >&6 fi else ac_curses_disp_dirs="disp" echo "$as_me:$LINENO: result: yes" >&5 echo "${ECHO_T}yes" >&6 fi; if test -n "$ac_curses_disp_dirs"; then echo "$as_me:$LINENO: checking for initscr in -lncurses" >&5 echo $ECHO_N "checking for initscr in -lncurses... $ECHO_C" >&6 if test "${ac_cv_lib_ncurses_initscr+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-lncurses $LIBS" cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Override any gcc2 internal prototype to avoid an error. */ #ifdef __cplusplus extern "C" #endif /* We use char because int might match the return type of a gcc2 builtin and then its argument prototype would still apply. */ char initscr (); int main () { initscr (); ; return 0; } _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_lib_ncurses_initscr=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_lib_ncurses_initscr=no fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi echo "$as_me:$LINENO: result: $ac_cv_lib_ncurses_initscr" >&5 echo "${ECHO_T}$ac_cv_lib_ncurses_initscr" >&6 if test $ac_cv_lib_ncurses_initscr = yes; then CursesLib=ncurses cat >>confdefs.h <<\_ACEOF #define HAS_NCURSES 1 _ACEOF fi if test -z "$CursesLib"; then echo "$as_me:$LINENO: checking for initscr in -lcurses" >&5 echo $ECHO_N "checking for initscr in -lcurses... $ECHO_C" >&6 if test "${ac_cv_lib_curses_initscr+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-lcurses $LIBS" cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Override any gcc2 internal prototype to avoid an error. */ #ifdef __cplusplus extern "C" #endif /* We use char because int might match the return type of a gcc2 builtin and then its argument prototype would still apply. */ char initscr (); int main () { initscr (); ; return 0; } _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_lib_curses_initscr=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_lib_curses_initscr=no fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi echo "$as_me:$LINENO: result: $ac_cv_lib_curses_initscr" >&5 echo "${ECHO_T}$ac_cv_lib_curses_initscr" >&6 if test $ac_cv_lib_curses_initscr = yes; then CursesLib=curses fi fi if test -n "$CursesLib"; then as_ac_Lib=`echo "ac_cv_lib_$CursesLib''_resizeterm" | $as_tr_sh` echo "$as_me:$LINENO: checking for resizeterm in -l$CursesLib" >&5 echo $ECHO_N "checking for resizeterm in -l$CursesLib... $ECHO_C" >&6 if eval "test \"\${$as_ac_Lib+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-l$CursesLib $LIBS" cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Override any gcc2 internal prototype to avoid an error. */ #ifdef __cplusplus extern "C" #endif /* We use char because int might match the return type of a gcc2 builtin and then its argument prototype would still apply. */ char resizeterm (); int main () { resizeterm (); ; return 0; } _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then eval "$as_ac_Lib=yes" else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 eval "$as_ac_Lib=no" fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Lib'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Lib'}'`" >&6 if test `eval echo '${'$as_ac_Lib'}'` = yes; then cat >>confdefs.h <<\_ACEOF #define HAS_CURSES_RESIZETERM 1 _ACEOF else { { echo "$as_me:$LINENO: error: Your curses library lacks the resizeterm function. You have two choices: 1: upgrade your curses library. 2: disable curses by configuring with the '--disable-curses' option. " >&5 echo "$as_me: error: Your curses library lacks the resizeterm function. You have two choices: 1: upgrade your curses library. 2: disable curses by configuring with the '--disable-curses' option. " >&2;} { (exit 1); exit 1; }; } fi ac_lib_curses="-l$CursesLib" cat >>confdefs.h <<\_ACEOF #define USE_CURSES 1 _ACEOF else { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} { echo "$as_me:$LINENO: WARNING: No curses library found" >&5 echo "$as_me: WARNING: No curses library found" >&2;} { echo "$as_me:$LINENO: WARNING: Curses display program will not be built" >&5 echo "$as_me: WARNING: Curses display program will not be built" >&2;} { echo "$as_me:$LINENO: WARNING: " >&5 echo "$as_me: WARNING: " >&2;} fi fi # Checks for header files. ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5 echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= fi if test -z "$CPP"; then if test "${ac_cv_prog_CPP+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else # Double quotes because CPP needs to be expanded for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" do ac_preproc_ok=false for ac_c_preproc_warn_flag in '' yes do # Use a header file that comes with gcc, so configuring glibc # with a fresh cross-compiler works. # Prefer to if __STDC__ is defined, since # exists even on freestanding compilers. # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. "Syntax error" is here to catch this case. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #ifdef __STDC__ # include #else # include #endif Syntax error _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Broken: fails on valid input. continue fi rm -f conftest.err conftest.$ac_ext # OK, works on sane cases. Now check whether non-existent headers # can be detected and how. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Passes both tests. ac_preproc_ok=: break fi rm -f conftest.err conftest.$ac_ext done # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. rm -f conftest.err conftest.$ac_ext if $ac_preproc_ok; then break fi done ac_cv_prog_CPP=$CPP fi CPP=$ac_cv_prog_CPP else ac_cv_prog_CPP=$CPP fi echo "$as_me:$LINENO: result: $CPP" >&5 echo "${ECHO_T}$CPP" >&6 ac_preproc_ok=false for ac_c_preproc_warn_flag in '' yes do # Use a header file that comes with gcc, so configuring glibc # with a fresh cross-compiler works. # Prefer to if __STDC__ is defined, since # exists even on freestanding compilers. # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. "Syntax error" is here to catch this case. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #ifdef __STDC__ # include #else # include #endif Syntax error _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then : else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Broken: fails on valid input. continue fi rm -f conftest.err conftest.$ac_ext # OK, works on sane cases. Now check whether non-existent headers # can be detected and how. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then # Broken: success on invalid input. continue else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 # Passes both tests. ac_preproc_ok=: break fi rm -f conftest.err conftest.$ac_ext done # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. rm -f conftest.err conftest.$ac_ext if $ac_preproc_ok; then : else { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check See \`config.log' for more details." >&5 echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check See \`config.log' for more details." >&2;} { (exit 1); exit 1; }; } fi ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu echo "$as_me:$LINENO: checking for egrep" >&5 echo $ECHO_N "checking for egrep... $ECHO_C" >&6 if test "${ac_cv_prog_egrep+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if echo a | (grep -E '(a|b)') >/dev/null 2>&1 then ac_cv_prog_egrep='grep -E' else ac_cv_prog_egrep='egrep' fi fi echo "$as_me:$LINENO: result: $ac_cv_prog_egrep" >&5 echo "${ECHO_T}$ac_cv_prog_egrep" >&6 EGREP=$ac_cv_prog_egrep echo "$as_me:$LINENO: checking for ANSI C header files" >&5 echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6 if test "${ac_cv_header_stdc+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #include #include #include int main () { ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_header_stdc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_header_stdc=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | $EGREP "memchr" >/dev/null 2>&1; then : else ac_cv_header_stdc=no fi rm -f conftest* fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include _ACEOF if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | $EGREP "free" >/dev/null 2>&1; then : else ac_cv_header_stdc=no fi rm -f conftest* fi if test $ac_cv_header_stdc = yes; then # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. if test "$cross_compiling" = yes; then : else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #if ((' ' & 0x0FF) == 0x020) # define ISLOWER(c) ('a' <= (c) && (c) <= 'z') # define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) #else # define ISLOWER(c) \ (('a' <= (c) && (c) <= 'i') \ || ('j' <= (c) && (c) <= 'r') \ || ('s' <= (c) && (c) <= 'z')) # define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) #endif #define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) int main () { int i; for (i = 0; i < 256; i++) if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } _ACEOF rm -f conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='./conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then : else echo "$as_me: program exited with status $ac_status" >&5 echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ( exit $ac_status ) ac_cv_header_stdc=no fi rm -f core *.core gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext fi fi fi echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5 echo "${ECHO_T}$ac_cv_header_stdc" >&6 if test $ac_cv_header_stdc = yes; then cat >>confdefs.h <<\_ACEOF #define STDC_HEADERS 1 _ACEOF fi echo "$as_me:$LINENO: checking for sys/wait.h that is POSIX.1 compatible" >&5 echo $ECHO_N "checking for sys/wait.h that is POSIX.1 compatible... $ECHO_C" >&6 if test "${ac_cv_header_sys_wait_h+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #include #ifndef WEXITSTATUS # define WEXITSTATUS(stat_val) ((unsigned)(stat_val) >> 8) #endif #ifndef WIFEXITED # define WIFEXITED(stat_val) (((stat_val) & 255) == 0) #endif int main () { int s; wait (&s); s = WIFEXITED (s) ? WEXITSTATUS (s) : 1; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_header_sys_wait_h=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_header_sys_wait_h=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_header_sys_wait_h" >&5 echo "${ECHO_T}$ac_cv_header_sys_wait_h" >&6 if test $ac_cv_header_sys_wait_h = yes; then cat >>confdefs.h <<\_ACEOF #define HAVE_SYS_WAIT_H 1 _ACEOF fi # On IRIX 5.3, sys/types and inttypes.h are conflicting. for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ inttypes.h stdint.h unistd.h do as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then eval "$as_ac_Header=yes" else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 eval "$as_ac_Header=no" fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 if test `eval echo '${'$as_ac_Header'}'` = yes; then cat >>confdefs.h <<_ACEOF #define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 _ACEOF fi done for ac_header in arpa/inet.h fcntl.h netinet/in.h stdlib.h string.h strings.h sys/ioctl.h sys/socket.h sys/time.h termios.h unistd.h inttypes.h do as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` if eval "test \"\${$as_ac_Header+set}\" = set"; then echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 else # Is the header compilable? echo "$as_me:$LINENO: checking $ac_header usability" >&5 echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_compiler=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 echo "${ECHO_T}$ac_header_compiler" >&6 # Is the header present? echo "$as_me:$LINENO: checking $ac_header presence" >&5 echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_header> _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_preproc=no fi rm -f conftest.err conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 echo "${ECHO_T}$ac_header_preproc" >&6 # So? What about this header? case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in yes:no: ) { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} ac_header_preproc=yes ;; no:yes:* ) { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} ( cat <<\_ASBOX ## ---------------------------------------- ## ## Report this to simulavr-devel@nongnu.org ## ## ---------------------------------------- ## _ASBOX ) | sed "s/^/$as_me: WARNING: /" >&2 ;; esac echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else eval "$as_ac_Header=\$ac_header_preproc" fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 fi if test `eval echo '${'$as_ac_Header'}'` = yes; then cat >>confdefs.h <<_ACEOF #define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 _ACEOF fi done # Checks for typedefs, structures, and compiler characteristics. echo "$as_me:$LINENO: checking for an ANSI C-conforming const" >&5 echo $ECHO_N "checking for an ANSI C-conforming const... $ECHO_C" >&6 if test "${ac_cv_c_const+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ int main () { /* FIXME: Include the comments suggested by Paul. */ #ifndef __cplusplus /* Ultrix mips cc rejects this. */ typedef int charset[2]; const charset x; /* SunOS 4.1.1 cc rejects this. */ char const *const *ccp; char **p; /* NEC SVR4.0.2 mips cc rejects this. */ struct point {int x, y;}; static struct point const zero = {0,0}; /* AIX XL C 1.02.0.0 rejects this. It does not let you subtract one const X* pointer from another in an arm of an if-expression whose if-part is not a constant expression */ const char *g = "string"; ccp = &g + (g ? g-g : 0); /* HPUX 7.0 cc rejects these. */ ++ccp; p = (char**) ccp; ccp = (char const *const *) p; { /* SCO 3.2v4 cc rejects this. */ char *t; char const *s = 0 ? (char *) 0 : (char const *) 0; *t++ = 0; } { /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */ int x[] = {25, 17}; const int *foo = &x[0]; ++foo; } { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */ typedef const int *iptr; iptr p = 0; ++p; } { /* AIX XL C 1.02.0.0 rejects this saying "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */ struct s { int j; const int *ap[3]; }; struct s *b; b->j = 5; } { /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */ const int foo = 10; } #endif ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_c_const=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_c_const=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_c_const" >&5 echo "${ECHO_T}$ac_cv_c_const" >&6 if test $ac_cv_c_const = no; then cat >>confdefs.h <<\_ACEOF #define const _ACEOF fi echo "$as_me:$LINENO: checking for inline" >&5 echo $ECHO_N "checking for inline... $ECHO_C" >&6 if test "${ac_cv_c_inline+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #ifndef __cplusplus typedef int foo_t; static $ac_kw foo_t static_foo () {return 0; } $ac_kw foo_t foo () {return 0; } #endif _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_c_inline=$ac_kw; break else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext done fi echo "$as_me:$LINENO: result: $ac_cv_c_inline" >&5 echo "${ECHO_T}$ac_cv_c_inline" >&6 case $ac_cv_c_inline in inline | yes) ;; *) case $ac_cv_c_inline in no) ac_val=;; *) ac_val=$ac_cv_c_inline;; esac cat >>confdefs.h <<_ACEOF #ifndef __cplusplus #define inline $ac_val #endif _ACEOF ;; esac echo "$as_me:$LINENO: checking for pid_t" >&5 echo $ECHO_N "checking for pid_t... $ECHO_C" >&6 if test "${ac_cv_type_pid_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default int main () { if ((pid_t *) 0) return 0; if (sizeof (pid_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_pid_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_pid_t=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_pid_t" >&5 echo "${ECHO_T}$ac_cv_type_pid_t" >&6 if test $ac_cv_type_pid_t = yes; then : else cat >>confdefs.h <<_ACEOF #define pid_t int _ACEOF fi echo "$as_me:$LINENO: checking for size_t" >&5 echo $ECHO_N "checking for size_t... $ECHO_C" >&6 if test "${ac_cv_type_size_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default int main () { if ((size_t *) 0) return 0; if (sizeof (size_t)) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_size_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_size_t=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_size_t" >&5 echo "${ECHO_T}$ac_cv_type_size_t" >&6 if test $ac_cv_type_size_t = yes; then : else cat >>confdefs.h <<_ACEOF #define size_t unsigned _ACEOF fi echo "$as_me:$LINENO: checking whether time.h and sys/time.h may both be included" >&5 echo $ECHO_N "checking whether time.h and sys/time.h may both be included... $ECHO_C" >&6 if test "${ac_cv_header_time+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #include #include int main () { if ((struct tm *) 0) return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_header_time=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_header_time=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_header_time" >&5 echo "${ECHO_T}$ac_cv_header_time" >&6 if test $ac_cv_header_time = yes; then cat >>confdefs.h <<\_ACEOF #define TIME_WITH_SYS_TIME 1 _ACEOF fi echo "$as_me:$LINENO: checking for working volatile" >&5 echo $ECHO_N "checking for working volatile... $ECHO_C" >&6 if test "${ac_cv_c_volatile+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ int main () { volatile int x; int * volatile y; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_c_volatile=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_c_volatile=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_c_volatile" >&5 echo "${ECHO_T}$ac_cv_c_volatile" >&6 if test $ac_cv_c_volatile = no; then cat >>confdefs.h <<\_ACEOF #define volatile _ACEOF fi echo "$as_me:$LINENO: checking for socklen_t" >&5 echo $ECHO_N "checking for socklen_t... $ECHO_C" >&6 if test "${ac_cv_type_socklen_t+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #include int main () { socklen_t len = 42; return 0; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_socklen_t=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_socklen_t=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_socklen_t" >&5 echo "${ECHO_T}$ac_cv_type_socklen_t" >&6 if test $ac_cv_type_socklen_t != yes; then cat >>confdefs.h <<\_ACEOF #define socklen_t int _ACEOF fi # Checks for library functions. for ac_header in unistd.h vfork.h do as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` if eval "test \"\${$as_ac_Header+set}\" = set"; then echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 else # Is the header compilable? echo "$as_me:$LINENO: checking $ac_header usability" >&5 echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_compiler=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 echo "${ECHO_T}$ac_header_compiler" >&6 # Is the header present? echo "$as_me:$LINENO: checking $ac_header presence" >&5 echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_header> _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_preproc=no fi rm -f conftest.err conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 echo "${ECHO_T}$ac_header_preproc" >&6 # So? What about this header? case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in yes:no: ) { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} ac_header_preproc=yes ;; no:yes:* ) { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} ( cat <<\_ASBOX ## ---------------------------------------- ## ## Report this to simulavr-devel@nongnu.org ## ## ---------------------------------------- ## _ASBOX ) | sed "s/^/$as_me: WARNING: /" >&2 ;; esac echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else eval "$as_ac_Header=\$ac_header_preproc" fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 fi if test `eval echo '${'$as_ac_Header'}'` = yes; then cat >>confdefs.h <<_ACEOF #define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 _ACEOF fi done for ac_func in fork vfork do as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` echo "$as_me:$LINENO: checking for $ac_func" >&5 echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6 if eval "test \"\${$as_ac_var+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Define $ac_func to an innocuous variant, in case declares $ac_func. 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echo "$as_me:$LINENO: checking $ac_header usability" >&5 echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_compiler=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 echo "${ECHO_T}$ac_header_compiler" >&6 # Is the header present? echo "$as_me:$LINENO: checking $ac_header presence" >&5 echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_header> _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_preproc=no fi rm -f conftest.err conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 echo "${ECHO_T}$ac_header_preproc" >&6 # So? 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echo "$as_me:$LINENO: checking $ac_header usability" >&5 echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_compiler=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 echo "${ECHO_T}$ac_header_compiler" >&6 # Is the header present? echo "$as_me:$LINENO: checking $ac_header presence" >&5 echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_header> _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_preproc=no fi rm -f conftest.err conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 echo "${ECHO_T}$ac_header_preproc" >&6 # So? What about this header? case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in yes:no: ) { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} ac_header_preproc=yes ;; no:yes:* ) { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} ( cat <<\_ASBOX ## ---------------------------------------- ## ## Report this to simulavr-devel@nongnu.org ## ## ---------------------------------------- ## _ASBOX ) | sed "s/^/$as_me: WARNING: /" >&2 ;; esac echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else eval "$as_ac_Header=\$ac_header_preproc" fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 fi if test `eval echo '${'$as_ac_Header'}'` = yes; then cat >>confdefs.h <<_ACEOF #define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 _ACEOF fi done echo "$as_me:$LINENO: checking for GNU libc compatible realloc" >&5 echo $ECHO_N "checking for GNU libc compatible realloc... $ECHO_C" >&6 if test "${ac_cv_func_realloc_0_nonnull+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else if test "$cross_compiling" = yes; then ac_cv_func_realloc_0_nonnull=no else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #if STDC_HEADERS || HAVE_STDLIB_H # include #else char *realloc (); #endif int main () { exit (realloc (0, 0) ? 0 : 1); ; return 0; } _ACEOF rm -f conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='./conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_func_realloc_0_nonnull=yes else echo "$as_me: program exited with status $ac_status" >&5 echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ( exit $ac_status ) ac_cv_func_realloc_0_nonnull=no fi rm -f core *.core gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext fi fi echo "$as_me:$LINENO: result: $ac_cv_func_realloc_0_nonnull" >&5 echo "${ECHO_T}$ac_cv_func_realloc_0_nonnull" >&6 if test $ac_cv_func_realloc_0_nonnull = yes; then cat >>confdefs.h <<\_ACEOF #define HAVE_REALLOC 1 _ACEOF else cat >>confdefs.h <<\_ACEOF #define HAVE_REALLOC 0 _ACEOF case $LIBOBJS in "realloc.$ac_objext" | \ *" realloc.$ac_objext" | \ "realloc.$ac_objext "* | \ *" realloc.$ac_objext "* ) ;; *) LIBOBJS="$LIBOBJS realloc.$ac_objext" ;; esac cat >>confdefs.h <<\_ACEOF #define realloc rpl_realloc _ACEOF fi for ac_header in sys/select.h sys/socket.h do as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` if eval "test \"\${$as_ac_Header+set}\" = set"; then echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 else # Is the header compilable? echo "$as_me:$LINENO: checking $ac_header usability" >&5 echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #include <$ac_header> _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_header_compiler=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_compiler=no fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 echo "${ECHO_T}$ac_header_compiler" >&6 # Is the header present? echo "$as_me:$LINENO: checking $ac_header presence" >&5 echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6 cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include <$ac_header> _ACEOF if { (eval echo "$as_me:$LINENO: \"$ac_cpp conftest.$ac_ext\"") >&5 (eval $ac_cpp conftest.$ac_ext) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } >/dev/null; then if test -s conftest.err; then ac_cpp_err=$ac_c_preproc_warn_flag ac_cpp_err=$ac_cpp_err$ac_c_werror_flag else ac_cpp_err= fi else ac_cpp_err=yes fi if test -z "$ac_cpp_err"; then ac_header_preproc=yes else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_header_preproc=no fi rm -f conftest.err conftest.$ac_ext echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 echo "${ECHO_T}$ac_header_preproc" >&6 # So? What about this header? case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in yes:no: ) { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} ac_header_preproc=yes ;; no:yes:* ) { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} ( cat <<\_ASBOX ## ---------------------------------------- ## ## Report this to simulavr-devel@nongnu.org ## ## ---------------------------------------- ## _ASBOX ) | sed "s/^/$as_me: WARNING: /" >&2 ;; esac echo "$as_me:$LINENO: checking for $ac_header" >&5 echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6 if eval "test \"\${$as_ac_Header+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else eval "$as_ac_Header=\$ac_header_preproc" fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_Header'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_Header'}'`" >&6 fi if test `eval echo '${'$as_ac_Header'}'` = yes; then cat >>confdefs.h <<_ACEOF #define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 _ACEOF fi done echo "$as_me:$LINENO: checking types of arguments for select" >&5 echo $ECHO_N "checking types of arguments for select... $ECHO_C" >&6 if test "${ac_cv_func_select_args+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else for ac_arg234 in 'fd_set *' 'int *' 'void *'; do for ac_arg1 in 'int' 'size_t' 'unsigned long' 'unsigned'; do for ac_arg5 in 'struct timeval *' 'const struct timeval *'; do cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ $ac_includes_default #if HAVE_SYS_SELECT_H # include #endif #if HAVE_SYS_SOCKET_H # include #endif int main () { extern int select ($ac_arg1, $ac_arg234, $ac_arg234, $ac_arg234, $ac_arg5); ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_func_select_args="$ac_arg1,$ac_arg234,$ac_arg5"; break 3 else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext done done done # Provide a safe default value. : ${ac_cv_func_select_args='int,int *,struct timeval *'} fi echo "$as_me:$LINENO: result: $ac_cv_func_select_args" >&5 echo "${ECHO_T}$ac_cv_func_select_args" >&6 ac_save_IFS=$IFS; IFS=',' set dummy `echo "$ac_cv_func_select_args" | sed 's/\*/\*/g'` IFS=$ac_save_IFS shift cat >>confdefs.h <<_ACEOF #define SELECT_TYPE_ARG1 $1 _ACEOF cat >>confdefs.h <<_ACEOF #define SELECT_TYPE_ARG234 ($2) _ACEOF cat >>confdefs.h <<_ACEOF #define SELECT_TYPE_ARG5 ($3) _ACEOF rm -f conftest* echo "$as_me:$LINENO: checking return type of signal handlers" >&5 echo $ECHO_N "checking return type of signal handlers... $ECHO_C" >&6 if test "${ac_cv_type_signal+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ #include #include #ifdef signal # undef signal #endif #ifdef __cplusplus extern "C" void (*signal (int, void (*)(int)))(int); #else void (*signal ()) (); #endif int main () { int i; ; return 0; } _ACEOF rm -f conftest.$ac_objext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest.$ac_objext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then ac_cv_type_signal=void else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 ac_cv_type_signal=int fi rm -f conftest.err conftest.$ac_objext conftest.$ac_ext fi echo "$as_me:$LINENO: result: $ac_cv_type_signal" >&5 echo "${ECHO_T}$ac_cv_type_signal" >&6 cat >>confdefs.h <<_ACEOF #define RETSIGTYPE $ac_cv_type_signal _ACEOF for ac_func in vprintf do as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` echo "$as_me:$LINENO: checking for $ac_func" >&5 echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6 if eval "test \"\${$as_ac_var+set}\" = set"; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Define $ac_func to an innocuous variant, in case declares $ac_func. For example, HP-UX 11i declares gettimeofday. */ #define $ac_func innocuous_$ac_func /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func (); below. Prefer to if __STDC__ is defined, since exists even on freestanding compilers. */ #ifdef __STDC__ # include #else # include #endif #undef $ac_func /* Override any gcc2 internal prototype to avoid an error. */ #ifdef __cplusplus extern "C" { #endif /* We use char because int might match the return type of a gcc2 builtin and then its argument prototype would still apply. */ char $ac_func (); /* The GNU C library defines this for functions which it implements to always fail with ENOSYS. Some functions are actually named something starting with __ and the normal name is an alias. */ #if defined (__stub_$ac_func) || defined (__stub___$ac_func) choke me #else char (*f) () = $ac_func; #endif #ifdef __cplusplus } #endif int main () { return f != $ac_func; ; return 0; } _ACEOF rm -f conftest.$ac_objext conftest$ac_exeext if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 (eval $ac_link) 2>conftest.er1 ac_status=$? grep -v '^ *+' conftest.er1 >conftest.err rm -f conftest.er1 cat conftest.err >&5 echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); } && { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; } && { ac_try='test -s conftest$ac_exeext' { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 (eval $ac_try) 2>&5 ac_status=$? echo "$as_me:$LINENO: \$? = $ac_status" >&5 (exit $ac_status); }; }; then eval "$as_ac_var=yes" else echo "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 eval "$as_ac_var=no" fi rm -f conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext fi echo "$as_me:$LINENO: result: `eval echo '${'$as_ac_var'}'`" >&5 echo "${ECHO_T}`eval echo '${'$as_ac_var'}'`" >&6 if test `eval echo '${'$as_ac_var'}'` = yes; then cat >>confdefs.h <<_ACEOF #define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 _ACEOF echo "$as_me:$LINENO: checking for _doprnt" >&5 echo $ECHO_N "checking for _doprnt... $ECHO_C" >&6 if test "${ac_cv_func__doprnt+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else cat >conftest.$ac_ext <<_ACEOF /* confdefs.h. */ _ACEOF cat confdefs.h >>conftest.$ac_ext cat >>conftest.$ac_ext <<_ACEOF /* end confdefs.h. */ /* Define _doprnt to an innocuous variant, in case declares _doprnt. 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This is necessary, for # example, in the case of _POSIX_SOURCE, which is predefined and required # on some systems where configure will not decide to define it. cat >>conftest.undefs <<\_ACEOF s,^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*,/* & */, _ACEOF # Break up conftest.defines because some shells have a limit on the size # of here documents, and old seds have small limits too (100 cmds). echo ' # Handle all the #define templates only if necessary.' >>$CONFIG_STATUS echo ' if grep "^[ ]*#[ ]*define" $tmp/in >/dev/null; then' >>$CONFIG_STATUS echo ' # If there are no defines, we may have an empty if/fi' >>$CONFIG_STATUS echo ' :' >>$CONFIG_STATUS rm -f conftest.tail while grep . conftest.defines >/dev/null do # Write a limited-size here document to $tmp/defines.sed. echo ' cat >$tmp/defines.sed <>$CONFIG_STATUS # Speed up: don't consider the non `#define' lines. echo '/^[ ]*#[ ]*define/!b' >>$CONFIG_STATUS # Work around the forget-to-reset-the-flag bug. echo 't clr' >>$CONFIG_STATUS echo ': clr' >>$CONFIG_STATUS sed ${ac_max_here_lines}q conftest.defines >>$CONFIG_STATUS echo 'CEOF sed -f $tmp/defines.sed $tmp/in >$tmp/out rm -f $tmp/in mv $tmp/out $tmp/in ' >>$CONFIG_STATUS sed 1,${ac_max_here_lines}d conftest.defines >conftest.tail rm -f conftest.defines mv conftest.tail conftest.defines done rm -f conftest.defines echo ' fi # grep' >>$CONFIG_STATUS echo >>$CONFIG_STATUS # Break up conftest.undefs because some shells have a limit on the size # of here documents, and old seds have small limits too (100 cmds). echo ' # Handle all the #undef templates' >>$CONFIG_STATUS rm -f conftest.tail while grep . conftest.undefs >/dev/null do # Write a limited-size here document to $tmp/undefs.sed. echo ' cat >$tmp/undefs.sed <>$CONFIG_STATUS # Speed up: don't consider the non `#undef' echo '/^[ ]*#[ ]*undef/!b' >>$CONFIG_STATUS # Work around the forget-to-reset-the-flag bug. echo 't clr' >>$CONFIG_STATUS echo ': clr' >>$CONFIG_STATUS sed ${ac_max_here_lines}q conftest.undefs >>$CONFIG_STATUS echo 'CEOF sed -f $tmp/undefs.sed $tmp/in >$tmp/out rm -f $tmp/in mv $tmp/out $tmp/in ' >>$CONFIG_STATUS sed 1,${ac_max_here_lines}d conftest.undefs >conftest.tail rm -f conftest.undefs mv conftest.tail conftest.undefs done rm -f conftest.undefs cat >>$CONFIG_STATUS <<\_ACEOF # Let's still pretend it is `configure' which instantiates (i.e., don't # use $as_me), people would be surprised to read: # /* config.h. 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So we exec the FD to /dev/null, # effectively closing config.log, so it can be properly (re)opened and # appended to by config.status. When coming back to configure, we # need to make the FD available again. if test "$no_create" != yes; then ac_cs_success=: ac_config_status_args= test "$silent" = yes && ac_config_status_args="$ac_config_status_args --quiet" exec 5>/dev/null $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false exec 5>>config.log # Use ||, not &&, to avoid exiting from the if with $? = 1, which # would make configure fail if this is the last instruction. $ac_cs_success || { (exit 1); exit 1; } fi simulavr-0.1.2.2/AUTHORS0000644000175000001440000000051010203246516011474 00000000000000# # $Id: AUTHORS,v 1.4 2003/07/24 16:42:39 troth Exp $ # Main Developer: Theodore A. Roth Contributors: Ken Restivo Reinhard Jessich Josef Angermeier See the ChangeLog file for more contributions. simulavr-0.1.2.2/COPYING0000644000175000001440000004311010203246516011462 00000000000000 GNU GENERAL PUBLIC LICENSE Version 2, June 1991 Copyright (C) 1989, 1991 Free Software Foundation, Inc. 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. Preamble The licenses for most software are designed to take away your freedom to share and change it. By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users. This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. 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If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. Copyright (C) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than `show w' and `show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program `Gnomovision' (which makes passes at compilers) written by James Hacker. , 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. simulavr-0.1.2.2/ChangeLog0000644000175000001440000001633410203246516012211 000000000000002005-01-13 Klaus Rudolph [Thanks to Joerg Wunsch] * src/avrcore.c bugfix: bugfix: devision by zero 2004-09-15 Theodore A. Roth [Thanks to Nils Springob for catching this.] * configure.ac (AC_INIT): Bump version. * src/defn/mega128.h: Fix PORTF addr. 2004-05-19 Theodore A. Roth [Contributed by Alexander Stohr ] * configure.ac (AC_INIT): Bump version. * src/memory.c (mem_read): Increase verbosity of warning. (mem_write): Ditto. 2004-04-16 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c (avr_core_construct): Don't call display_clock since the display hasn't been opened yet. * src/main.c (main): Call display_clock to send init cycles to display after opening the display. * src/main.c (parse_cmd_line): Update copyright year for -v option. * test_asm/test_8515/Makefile.am (all-local): Fix to allow building with gcc-3.4/binutils-2.15. 2004-04-15 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/Makefile.am (simulavr_SOURCES): Remove defn/43usb324.h. 2004-03-13 Theodore A. Roth [Contributed by Keith Gudger ] * configure.ac (AC_INIT): Bump version. * src/adc.c: * src/adc.h: * src/spi.c: * src/spi.h: * src/timers.c: * src/timers.h: * src/uart.c: * src/uart.h: * src/usb.c: * src/usb.h: * src/defn/43usb320.h: * src/defn/43usb325.h: * src/defn/43usb326.h: * src/defn/43usb351.h: * src/defn/43usb353.h: * src/defn/43usb355.h: Update to new vdev/memory infrastructure. 2004-03-11 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/disp-vcd/vcd.c: * src/disp-vcd/vcd.h: Don't inline vcd_set_clock. 2004-02-25 Theodore A. Roth * src/decoder.c (avr_op_BREAK): Print out a message whenever a break point is hit. * src/disp-vcd/config_scanner.l: Fix flex compile problem. 2004-02-25 Theodore A. Roth [Contributed by Keith Gudger ] * src/devsupp.c: * src/intvects.c: * src/defn/43usb320.h: * src/defn/43usb324.h: * src/defn/43usb325.h: * src/defn/43usb326.h: * src/defn/43usb351.h: * src/defn/43usb353.h: * src/defn/43usb355.h: Drop support for 324 devices. Stub out the usb device register names. 2004-02-13 Theodore A. Roth [Thanks to John Regehr for reporting this.] * src/avrcore.c (avr_run_core): Avoid division by zero when calculating the executed instructions and clock cycles. 2004-02-13 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/disp-vcd/config_scanner.l: Disable generation of yyunput() function by flex. 2004-02-01 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * misc/gpl_header: Update copyright year. * misc/gpl_header_c: Ditto. * misc/gpl_header_h: Ditto. * misc/gpl_header_py: Ditto. * misc/defn_tmpl_h: New file. * src/Makefile.am (simulavr_SOURCES): Add defn dir headers. * src/devsupp.c (defn_at90s1200): Move def to header. (defn_at90s2313): Ditto. (defn_at90s4414): Ditto. (defn_at90s8515): Ditto. (defn_atmega8): Ditto. (defn_atmega16): Ditto. (defn_atmega103): Ditto. (defn_atmega128): Ditto. (defn_at43usb351): Ditto. (defn_at43usb353): Ditto. (defn_at43usb355): Ditto. (defn_at43usb320): Ditto. (defn_at43usb324): Ditto. (defn_at43usb325): Ditto. (defn_at43usb326): Ditto. * src/defn/43usb320.h: New file. * src/defn/43usb324.h: New file. * src/defn/43usb325.h: New file. * src/defn/43usb326.h: New file. * src/defn/43usb351.h: New file. * src/defn/43usb353.h: New file. * src/defn/43usb355.h: New file. * src/defn/90s1200.h: New file. * src/defn/90s2313.h: New file. * src/defn/90s4414.h: New file. * src/defn/90s8515.h: New file. * src/defn/mega103.h: New file. * src/defn/mega128.h: New file. * src/defn/mega16.h: New file. * src/defn/mega8.h: New file. 2004-01-29 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/adc.c: * src/adc.h: * src/avrcore.c: * src/avrcore.h: * src/avrerror.c: * src/device.c: * src/devsupp.c: * src/devsupp.h: * src/eeprom.c: * src/main.c: * src/memory.c: * src/memory.h: * src/ports.c: * src/ports.h: * src/register.c: * src/spi.c: * src/spi.h: * src/sram.c: * src/stack.c: * src/stack.h: * src/timers.c: * src/timers.h: * src/uart.c: * src/uart.h: * src/usb.c: * src/vdevs.h: Convert Memory from a linked list to an array of memory cells. This gives a significant improvement in speed (more than 50% when running the test/deep_frame.c program). Convert core constructor to use new structures previously committed. There's still alot of registers vdevs that need updated to work properly with all this changes. The ports are now much more generic under the new memory attachment system and all the specfic ports are gone. The "find vdev by name" mechanism is gone since it was much too expensive. A single VDevice can now be installed at many discontinuous memory addresses. 2004-01-28 Theodore A. Roth * src/devsupp.c (struct io_reg_defn): Define. (IO_REG_DEFN_TERMINATOR): Define. (struct _DevSuppDefn): Add io_reg array field. (defn_at90s1200): Add io_reg initializer. (defn_at90s2313): Ditto. (defn_at90s4414): Ditto. (defn_at90s8515): Ditto. (defn_atmega8): Ditto. (defn_atmega16): Ditto. (defn_atmega103): Ditto. (defn_atmega123): Ditto. (defn_at43usb351): Ditto. (defn_at43usb353): Ditto. (defn_at43usb355): Ditto. (defn_at43usb320): Ditto. (defn_at43usb324): Ditto. (defn_at43usb325): Ditto. (defn_at43usb326): Ditto. * src/ports.c (port_create): Stub out new function. * src/register.c (sreg_create): Ditto. (rampz_create): Ditto. * src/stack.c (sp_create): Ditto. * src/ports.h (port_create): Prototype. * src/register.h (sreg_create): Ditto. (rampz_create): Ditto. * src/stack.h (sp_create): Ditto. * src/vdevs.h (VDevCreate): New typedef. (VDevFP_AddAddr): Ditto. 2004-01-28 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * README.mem_vdev: Updated. * misc/io_gen.py: New file. * test_c/deep_frame.c: Modified to be a little more useful in testing. 2004-01-18 Theodore A. Roth * Released 0.1.2.1. 2004-01-18 Theodore A. Roth * Makefile.am: Update copyright year. (EXTRA_DIST): Add ChangeLog-200[123] files. (install_aux_files): Ditto. * configure.ac (AC_INIT): Set version to 0.1.2.1. 2004-01-17 Theodore A. Roth * Released 0.1.2. 2004-01-17 Theodore A. Roth * configure.ac: Update copyright year. (AC_INIT): Set version to 0.1.2. * doc/simulavr.texi: Update copyright year. 2004-01-01 Theodore A. Roth [Contributed by Keith Gudger ] * configure.ac (AC_INIT): Bump version. * src/Makefile.am (simulavr_SOURCES): Add uart.c, uart.h and usb.c. * src/devsupp.c: Add uart and usb support. * src/uart.c: New file. * src/uart.h: New file. * src/usb.c: New file. 2004-01-01 Theodore A. Roth * ChangeLog: Cycle ChangeLog file. * ChangeLog-2001: New file. * ChangeLog-2002: New file. * ChangeLog-2003: New file. simulavr-0.1.2.2/INSTALL0000644000175000001440000000551010203246517011463 00000000000000# # $Id: INSTALL,v 1.8 2002/04/12 23:12:21 troth Exp $ # This file documents how to build and install simulavr on a unix-like system using the provided configure script. Although it is not required, you should have already built and installed binutils for avr, avr-gcc, uisp and possibly avr-gdb. In order to build and use the test programs in test_asm/ and test_c/ directories, you must have avr gcc and avr binutils properly installed and in your PATH. If you don't have them installed, you should pass configure the "--disable-tests" option. If you want to use simulavr as a backend to gdb, see the README.gdb file in the simulavr source. To build simulavr, run this command in the top level directory: $ ./configure This will configure simulavr to be installed in the default "/usr/local/" location. If you wish to install it in another location, use the "--prefix=" option to configure. It is posible to install in your home directory if you don't have root access to the "/usr/local/". For instance, I like to install software like this: $ ./configure --prefix=$HOME/local/simulavr In this case, if you think that simulavr is crappy software, you can easily remove it by removing the "$HOME/local/simulavr" directory. If you wish to keep it, you might need to add "$HOME/local/simulavr/bin" to your PATH environment variable so that you can run it by just typing `simulavr` instead of the full path. Theoretically, you should be able to uninstall the installed files using the 'make uninstall' command. If you wish to include more agressive build optimizations, do this: $ my_CFLAGS='-g -O2 -Wall -fomit-frame-pointer -finline-functions \ > -march=i686 -mcpu=i686" $ CFLAGS=$my_CFLAGS ./configure I have seen significant speedups using the above optimizations on my Pentium Pro development system. You may have better luck with other CFLAGS values. See `man gcc` for other compiler flags. Of course, if you aren't using gcc, your CFLAGS choices may be quite different. Once you have run the configure script, you can build and install the simulator. $ make $ make install If the build fails while trying to build the programs in the test_c directory complaining about not being able to find the avr libc header files, you will have to tell the build system where those files are located. This is done by passing an option to configure: $ ./configure --with-avr-include= To view all the available configure options, use the "--help" configure option: $ ./configure --help If you wish to verify that your build of the simulator works, run the regression tests like this: $ make check This will automatically build simulavr if needed. The regression test engine automatically starts up an instance of simulavr to run the tests. If any test fails, I want to hear about it, so send me an email. simulavr-0.1.2.2/TODO0000644000175000001440000000500410203246517011120 00000000000000During 0.1.x: - complete simulation of 8515 device. - external peripheral device connection interface. - write, read and access watchpoints - documentation During 0.2.x: - add support for all at90s**** devices (Is this too ambitious?) - speed improvements (optimization) During 0.3.x: - add support for megas and tiny's (This might require some redesign work to get the atmega128 like devices right) Misc TODO's: The conversion to autoconf/automake configuration is working, but still needs to have the actual porting issues worked into the project. Also, the autoconf macros (the config/*.m4 files) could be robustified. For instance, the TROTH_PROG_AVR_CC macro really should do more than just checking if avr-gcc is in yout $PATH. It should also make sure that avr-gcc works. Like wise for the other macros. It's a start at least. Build the virtual hardware harness and gui. I'm thinking it be able to plug a device into something like the Atmel stk200 board thus giving the user LEDs for visual feed back and push buttons for supplying inputs to the ports. Also, I'd like to simulate the analog comparators and ADCs if possible. It might also be interesting to simulate a popular LCD display. More interesting might be the potential for custom user designed virtual peripherals which could be plugged into the virtual board. I wonder if I can use the same interface as gpsim, thus allowing the sharing of modules between the two projects? Make a python module out of the library. Need to write functions for loading/dumping eeprom from/to files. Add support for ihex, srec, elf, and whatever else input file formats. The interrupt code looks like it needs a major re-thinking. It doesn't handle the interrupt flag mechanism and doesn't support automatic vectoring into ISRs that occurred when the interrupt occured and was disabled either globally or by the specific control register and then the interrupt was subsequently enabled. This looks like it might be yucky. I'm seriously thinking that interrupts need to be handled via some asyncronous mechanism like unix signals. Also, some way to implement the interrupt response time needs to be thought out. Add code to output number of instructions executed (and per second) and total number of clocks (and per second). Should go in main.c. There's a bunch of FIXME comments in the code in places where someone needs to give more thought to the logic. These io registers still need to be implemented: GIMSK GIFR All the timer/counter 1 stuff. Lots of others too. simulavr-0.1.2.2/config.guess0000755000175000001440000012414010203247651012753 00000000000000#! /bin/sh # Attempt to guess a canonical system name. # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, # 2000, 2001, 2002, 2003 Free Software Foundation, Inc. timestamp='2004-02-02' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Per Bothner . # Please send patches to . Submit a context # diff and a properly formatted ChangeLog entry. # # This script attempts to guess a canonical system name similar to # config.sub. If it succeeds, it prints the system name on stdout, and # exits with 0. Otherwise, it exits with 1. # # The plan is that this can be called by configure scripts if you # don't specify an explicit build system type. me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] Output the configuration name of the system \`$me' is run on. Operation modes: -h, --help print this help, then exit -t, --time-stamp print date of last modification, then exit -v, --version print version number, then exit Report bugs and patches to ." version="\ GNU config.guess ($timestamp) Originally written by Per Bothner. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. This is free software; see the source for copying conditions. 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We still # use `HOST_CC' if defined, but it is deprecated. # Portable tmp directory creation inspired by the Autoconf team. set_cc_for_build=' trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ; trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ; : ${TMPDIR=/tmp} ; { tmp=`(umask 077 && mktemp -d -q "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } || { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } || { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ; dummy=$tmp/dummy ; tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ; case $CC_FOR_BUILD,$HOST_CC,$CC in ,,) echo "int x;" > $dummy.c ; for c in cc gcc c89 c99 ; do if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then CC_FOR_BUILD="$c"; break ; fi ; done ; if test x"$CC_FOR_BUILD" = x ; then CC_FOR_BUILD=no_compiler_found ; fi ;; ,,*) CC_FOR_BUILD=$CC ;; ,*,*) CC_FOR_BUILD=$HOST_CC ;; esac ;' # This is needed to find uname on a Pyramid OSx when run in the BSD universe. # (ghazi@noc.rutgers.edu 1994-08-24) if (test -f /.attbin/uname) >/dev/null 2>&1 ; then PATH=$PATH:/.attbin ; export PATH fi UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown # Note: order is significant - the case branches are not exclusive. case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in *:NetBSD:*:*) # NetBSD (nbsd) targets should (where applicable) match one or # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, # *-*-netbsdecoff* and *-*-netbsd*. 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However, they do not need # kernel version information, so it can be replaced with a # suitable tag, in the style of linux-gnu. case "${UNAME_VERSION}" in Debian*) release='-gnu' ;; *) release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` ;; esac # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: # contains redundant information, the shorter form: # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. echo "${machine}-${os}${release}" exit 0 ;; amiga:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; arc:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; hp300:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mac68k:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; macppc:OpenBSD:*:*) echo powerpc-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mvme68k:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mvme88k:OpenBSD:*:*) echo m88k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; mvmeppc:OpenBSD:*:*) echo powerpc-unknown-openbsd${UNAME_RELEASE} exit 0 ;; pegasos:OpenBSD:*:*) echo powerpc-unknown-openbsd${UNAME_RELEASE} exit 0 ;; pmax:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; sgi:OpenBSD:*:*) echo mipseb-unknown-openbsd${UNAME_RELEASE} exit 0 ;; sun3:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; wgrisc:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; *:OpenBSD:*:*) echo ${UNAME_MACHINE}-unknown-openbsd${UNAME_RELEASE} exit 0 ;; *:ekkoBSD:*:*) echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} exit 0 ;; alpha:OSF1:*:*) if test $UNAME_RELEASE = "V4.0"; then UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` fi # According to Compaq, /usr/sbin/psrinfo has been available on # OSF/1 and Tru64 systems produced since 1995. I hope that # covers most systems running today. This code pipes the CPU # types through head -n 1, so we only detect the type of CPU 0. ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` case "$ALPHA_CPU_TYPE" in "EV4 (21064)") UNAME_MACHINE="alpha" ;; "EV4.5 (21064)") UNAME_MACHINE="alpha" ;; "LCA4 (21066/21068)") UNAME_MACHINE="alpha" ;; "EV5 (21164)") UNAME_MACHINE="alphaev5" ;; "EV5.6 (21164A)") UNAME_MACHINE="alphaev56" ;; "EV5.6 (21164PC)") UNAME_MACHINE="alphapca56" ;; "EV5.7 (21164PC)") UNAME_MACHINE="alphapca57" ;; "EV6 (21264)") UNAME_MACHINE="alphaev6" ;; "EV6.7 (21264A)") UNAME_MACHINE="alphaev67" ;; "EV6.8CB (21264C)") UNAME_MACHINE="alphaev68" ;; "EV6.8AL (21264B)") UNAME_MACHINE="alphaev68" ;; "EV6.8CX (21264D)") UNAME_MACHINE="alphaev68" ;; "EV6.9A (21264/EV69A)") UNAME_MACHINE="alphaev69" ;; "EV7 (21364)") UNAME_MACHINE="alphaev7" ;; "EV7.9 (21364A)") UNAME_MACHINE="alphaev79" ;; esac # A Vn.n version is a released version. # A Tn.n version is a released field test version. # A Xn.n version is an unreleased experimental baselevel. # 1.2 uses "1.2" for uname -r. echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[VTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` exit 0 ;; Alpha*:OpenVMS:*:*) echo alpha-hp-vms exit 0 ;; Alpha\ *:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # Should we change UNAME_MACHINE based on the output of uname instead # of the specific Alpha model? echo alpha-pc-interix exit 0 ;; 21064:Windows_NT:50:3) echo alpha-dec-winnt3.5 exit 0 ;; Amiga*:UNIX_System_V:4.0:*) echo m68k-unknown-sysv4 exit 0;; *:[Aa]miga[Oo][Ss]:*:*) echo ${UNAME_MACHINE}-unknown-amigaos exit 0 ;; *:[Mm]orph[Oo][Ss]:*:*) echo ${UNAME_MACHINE}-unknown-morphos exit 0 ;; *:OS/390:*:*) echo i370-ibm-openedition exit 0 ;; *:OS400:*:*) echo powerpc-ibm-os400 exit 0 ;; arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) echo arm-acorn-riscix${UNAME_RELEASE} exit 0;; SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) echo hppa1.1-hitachi-hiuxmpp exit 0;; Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. if test "`(/bin/universe) 2>/dev/null`" = att ; then echo pyramid-pyramid-sysv3 else echo pyramid-pyramid-bsd fi exit 0 ;; NILE*:*:*:dcosx) echo pyramid-pyramid-svr4 exit 0 ;; DRS?6000:unix:4.0:6*) echo sparc-icl-nx6 exit 0 ;; DRS?6000:UNIX_SV:4.2*:7*) case `/usr/bin/uname -p` in sparc) echo sparc-icl-nx7 && exit 0 ;; esac ;; sun4H:SunOS:5.*:*) echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; i86pc:SunOS:5.*:*) echo i386-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; sun4*:SunOS:6*:*) # According to config.sub, this is the proper way to canonicalize # SunOS6. Hard to guess exactly what SunOS6 will be like, but # it's likely to be more like Solaris than SunOS4. echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; sun4*:SunOS:*:*) case "`/usr/bin/arch -k`" in Series*|S4*) UNAME_RELEASE=`uname -v` ;; esac # Japanese Language versions have a version number like `4.1.3-JL'. echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` exit 0 ;; sun3*:SunOS:*:*) echo m68k-sun-sunos${UNAME_RELEASE} exit 0 ;; sun*:*:4.2BSD:*) UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 case "`/bin/arch`" in sun3) echo m68k-sun-sunos${UNAME_RELEASE} ;; sun4) echo sparc-sun-sunos${UNAME_RELEASE} ;; esac exit 0 ;; aushp:SunOS:*:*) echo sparc-auspex-sunos${UNAME_RELEASE} exit 0 ;; # The situation for MiNT is a little confusing. The machine name # can be virtually everything (everything which is not # "atarist" or "atariste" at least should have a processor # > m68000). The system name ranges from "MiNT" over "FreeMiNT" # to the lowercase version "mint" (or "freemint"). Finally # the system name "TOS" denotes a system which is actually not # MiNT. But MiNT is downward compatible to TOS, so this should # be no problem. atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit 0 ;; atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit 0 ;; *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit 0 ;; milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) echo m68k-milan-mint${UNAME_RELEASE} exit 0 ;; hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) echo m68k-hades-mint${UNAME_RELEASE} exit 0 ;; *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) echo m68k-unknown-mint${UNAME_RELEASE} exit 0 ;; m68k:machten:*:*) echo m68k-apple-machten${UNAME_RELEASE} exit 0 ;; powerpc:machten:*:*) echo powerpc-apple-machten${UNAME_RELEASE} exit 0 ;; RISC*:Mach:*:*) echo mips-dec-mach_bsd4.3 exit 0 ;; RISC*:ULTRIX:*:*) echo mips-dec-ultrix${UNAME_RELEASE} exit 0 ;; VAX*:ULTRIX*:*:*) echo vax-dec-ultrix${UNAME_RELEASE} exit 0 ;; 2020:CLIX:*:* | 2430:CLIX:*:*) echo clipper-intergraph-clix${UNAME_RELEASE} exit 0 ;; mips:*:*:UMIPS | mips:*:*:RISCos) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #ifdef __cplusplus #include /* for printf() prototype */ int main (int argc, char *argv[]) { #else int main (argc, argv) int argc; char *argv[]; { #endif #if defined (host_mips) && defined (MIPSEB) #if defined (SYSTYPE_SYSV) printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_SVR4) printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); #endif #endif exit (-1); } EOF $CC_FOR_BUILD -o $dummy $dummy.c \ && $dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \ && exit 0 echo mips-mips-riscos${UNAME_RELEASE} exit 0 ;; Motorola:PowerMAX_OS:*:*) echo powerpc-motorola-powermax exit 0 ;; Motorola:*:4.3:PL8-*) echo powerpc-harris-powermax exit 0 ;; Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) echo powerpc-harris-powermax exit 0 ;; Night_Hawk:Power_UNIX:*:*) echo powerpc-harris-powerunix exit 0 ;; m88k:CX/UX:7*:*) echo m88k-harris-cxux7 exit 0 ;; m88k:*:4*:R4*) echo m88k-motorola-sysv4 exit 0 ;; m88k:*:3*:R3*) echo m88k-motorola-sysv3 exit 0 ;; AViiON:dgux:*:*) # DG/UX returns AViiON for all architectures UNAME_PROCESSOR=`/usr/bin/uname -p` if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] then if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ [ ${TARGET_BINARY_INTERFACE}x = x ] then echo m88k-dg-dgux${UNAME_RELEASE} else echo m88k-dg-dguxbcs${UNAME_RELEASE} fi else echo i586-dg-dgux${UNAME_RELEASE} fi exit 0 ;; M88*:DolphinOS:*:*) # DolphinOS (SVR3) echo m88k-dolphin-sysv3 exit 0 ;; M88*:*:R3*:*) # Delta 88k system running SVR3 echo m88k-motorola-sysv3 exit 0 ;; XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) echo m88k-tektronix-sysv3 exit 0 ;; Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) echo m68k-tektronix-bsd exit 0 ;; *:IRIX*:*:*) echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` exit 0 ;; ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id exit 0 ;; # Note that: echo "'`uname -s`'" gives 'AIX ' i*86:AIX:*:*) echo i386-ibm-aix exit 0 ;; ia64:AIX:*:*) if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} exit 0 ;; *:AIX:2:3) if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include main() { if (!__power_pc()) exit(1); puts("powerpc-ibm-aix3.2.5"); exit(0); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && $dummy && exit 0 echo rs6000-ibm-aix3.2.5 elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then echo rs6000-ibm-aix3.2.4 else echo rs6000-ibm-aix3.2 fi exit 0 ;; *:AIX:*:[45]) IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then IBM_ARCH=rs6000 else IBM_ARCH=powerpc fi if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${IBM_ARCH}-ibm-aix${IBM_REV} exit 0 ;; *:AIX:*:*) echo rs6000-ibm-aix exit 0 ;; ibmrt:4.4BSD:*|romp-ibm:BSD:*) echo romp-ibm-bsd4.4 exit 0 ;; ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to exit 0 ;; # report: romp-ibm BSD 4.3 *:BOSX:*:*) echo rs6000-bull-bosx exit 0 ;; DPX/2?00:B.O.S.:*:*) echo m68k-bull-sysv3 exit 0 ;; 9000/[34]??:4.3bsd:1.*:*) echo m68k-hp-bsd exit 0 ;; hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) echo m68k-hp-bsd4.4 exit 0 ;; 9000/[34678]??:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` case "${UNAME_MACHINE}" in 9000/31? ) HP_ARCH=m68000 ;; 9000/[34]?? ) HP_ARCH=m68k ;; 9000/[678][0-9][0-9]) if [ -x /usr/bin/getconf ]; then sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` case "${sc_cpu_version}" in 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 532) # CPU_PA_RISC2_0 case "${sc_kernel_bits}" in 32) HP_ARCH="hppa2.0n" ;; 64) HP_ARCH="hppa2.0w" ;; '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 esac ;; esac fi if [ "${HP_ARCH}" = "" ]; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #define _HPUX_SOURCE #include #include int main () { #if defined(_SC_KERNEL_BITS) long bits = sysconf(_SC_KERNEL_BITS); #endif long cpu = sysconf (_SC_CPU_VERSION); switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0"); break; case CPU_PA_RISC1_1: puts ("hppa1.1"); break; case CPU_PA_RISC2_0: #if defined(_SC_KERNEL_BITS) switch (bits) { case 64: puts ("hppa2.0w"); break; case 32: puts ("hppa2.0n"); break; default: puts ("hppa2.0"); break; } break; #else /* !defined(_SC_KERNEL_BITS) */ puts ("hppa2.0"); break; #endif default: puts ("hppa1.0"); break; } exit (0); } EOF (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` test -z "$HP_ARCH" && HP_ARCH=hppa fi ;; esac if [ ${HP_ARCH} = "hppa2.0w" ] then # avoid double evaluation of $set_cc_for_build test -n "$CC_FOR_BUILD" || eval $set_cc_for_build if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E -) | grep __LP64__ >/dev/null then HP_ARCH="hppa2.0w" else HP_ARCH="hppa64" fi fi echo ${HP_ARCH}-hp-hpux${HPUX_REV} exit 0 ;; ia64:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` echo ia64-hp-hpux${HPUX_REV} exit 0 ;; 3050*:HI-UX:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include int main () { long cpu = sysconf (_SC_CPU_VERSION); /* The order matters, because CPU_IS_HP_MC68K erroneously returns true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct results, however. */ if (CPU_IS_PA_RISC (cpu)) { switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; default: puts ("hppa-hitachi-hiuxwe2"); break; } } else if (CPU_IS_HP_MC68K (cpu)) puts ("m68k-hitachi-hiuxwe2"); else puts ("unknown-hitachi-hiuxwe2"); exit (0); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && $dummy && exit 0 echo unknown-hitachi-hiuxwe2 exit 0 ;; 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) echo hppa1.1-hp-bsd exit 0 ;; 9000/8??:4.3bsd:*:*) echo hppa1.0-hp-bsd exit 0 ;; *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) echo hppa1.0-hp-mpeix exit 0 ;; hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) echo hppa1.1-hp-osf exit 0 ;; hp8??:OSF1:*:*) echo hppa1.0-hp-osf exit 0 ;; i*86:OSF1:*:*) if [ -x /usr/sbin/sysversion ] ; then echo ${UNAME_MACHINE}-unknown-osf1mk else echo ${UNAME_MACHINE}-unknown-osf1 fi exit 0 ;; parisc*:Lites*:*:*) echo hppa1.1-hp-lites exit 0 ;; C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) echo c1-convex-bsd exit 0 ;; C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit 0 ;; C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) echo c34-convex-bsd exit 0 ;; C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) echo c38-convex-bsd exit 0 ;; C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) echo c4-convex-bsd exit 0 ;; CRAY*Y-MP:*:*:*) echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; CRAY*[A-Z]90:*:*:*) echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ -e 's/\.[^.]*$/.X/' exit 0 ;; CRAY*TS:*:*:*) echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; CRAY*T3E:*:*:*) echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; CRAY*SV1:*:*:*) echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; *:UNICOS/mp:*:*) echo nv1-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit 0 ;; 5000:UNIX_System_V:4.*:*) FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit 0 ;; i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit 0 ;; sparc*:BSD/OS:*:*) echo sparc-unknown-bsdi${UNAME_RELEASE} exit 0 ;; *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit 0 ;; *:FreeBSD:*:*) # Determine whether the default compiler uses glibc. eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include #if __GLIBC__ >= 2 LIBC=gnu #else LIBC= #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=` # GNU/KFreeBSD systems have a "k" prefix to indicate we are using # FreeBSD's kernel, but not the complete OS. case ${LIBC} in gnu) kernel_only='k' ;; esac echo ${UNAME_MACHINE}-unknown-${kernel_only}freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`${LIBC:+-$LIBC} exit 0 ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin exit 0 ;; i*:MINGW*:*) echo ${UNAME_MACHINE}-pc-mingw32 exit 0 ;; i*:PW*:*) echo ${UNAME_MACHINE}-pc-pw32 exit 0 ;; x86:Interix*:[34]*) echo i586-pc-interix${UNAME_RELEASE}|sed -e 's/\..*//' exit 0 ;; [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) echo i${UNAME_MACHINE}-pc-mks exit 0 ;; i*:Windows_NT*:* | Pentium*:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # It also conflicts with pre-2.0 versions of AT&T UWIN. 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mips64:Linux:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #undef CPU #undef mips64 #undef mips64el #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) CPU=mips64el #else #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) CPU=mips64 #else CPU= #endif #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=` test x"${CPU}" != x && echo "${CPU}-unknown-linux-gnu" && exit 0 ;; ppc:Linux:*:*) echo powerpc-unknown-linux-gnu exit 0 ;; ppc64:Linux:*:*) echo powerpc64-unknown-linux-gnu exit 0 ;; alpha:Linux:*:*) case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in EV5) UNAME_MACHINE=alphaev5 ;; EV56) UNAME_MACHINE=alphaev56 ;; PCA56) UNAME_MACHINE=alphapca56 ;; PCA57) UNAME_MACHINE=alphapca56 ;; EV6) UNAME_MACHINE=alphaev6 ;; EV67) UNAME_MACHINE=alphaev67 ;; EV68*) UNAME_MACHINE=alphaev68 ;; esac objdump --private-headers /bin/sh | grep ld.so.1 >/dev/null if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} exit 0 ;; parisc:Linux:*:* | hppa:Linux:*:*) # Look for CPU level case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in PA7*) echo hppa1.1-unknown-linux-gnu ;; PA8*) echo hppa2.0-unknown-linux-gnu ;; *) echo hppa-unknown-linux-gnu ;; esac exit 0 ;; parisc64:Linux:*:* | hppa64:Linux:*:*) echo hppa64-unknown-linux-gnu exit 0 ;; s390:Linux:*:* | s390x:Linux:*:*) echo ${UNAME_MACHINE}-ibm-linux exit 0 ;; sh64*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit 0 ;; sh*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit 0 ;; sparc:Linux:*:* | sparc64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit 0 ;; x86_64:Linux:*:*) echo x86_64-unknown-linux-gnu exit 0 ;; i*86:Linux:*:*) # The BFD linker knows what the default object file format is, so # first see if it will tell us. cd to the root directory to prevent # problems with other programs or directories called `ld' in the path. # Set LC_ALL=C to ensure ld outputs messages in English. ld_supported_targets=`cd /; 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i*86:DYNIX/ptx:4*:*) # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. # earlier versions are messed up and put the nodename in both # sysname and nodename. echo i386-sequent-sysv4 exit 0 ;; i*86:UNIX_SV:4.2MP:2.*) # Unixware is an offshoot of SVR4, but it has its own version # number series starting with 2... # I am not positive that other SVR4 systems won't match this, # I just have to hope. -- rms. # Use sysv4.2uw... so that sysv4* matches it. echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} exit 0 ;; i*86:OS/2:*:*) # If we were able to find `uname', then EMX Unix compatibility # is probably installed. echo ${UNAME_MACHINE}-pc-os2-emx exit 0 ;; i*86:XTS-300:*:STOP) echo ${UNAME_MACHINE}-unknown-stop exit 0 ;; i*86:atheos:*:*) echo ${UNAME_MACHINE}-unknown-atheos exit 0 ;; i*86:syllable:*:*) echo ${UNAME_MACHINE}-pc-syllable exit 0 ;; i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*) echo i386-unknown-lynxos${UNAME_RELEASE} exit 0 ;; i*86:*DOS:*:*) echo ${UNAME_MACHINE}-pc-msdosdjgpp exit 0 ;; i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} else echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} fi exit 0 ;; i*86:*:5:[78]*) case `/bin/uname -X | grep "^Machine"` in *486*) UNAME_MACHINE=i486 ;; *Pentium) UNAME_MACHINE=i586 ;; *Pent*|*Celeron) UNAME_MACHINE=i686 ;; esac echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} exit 0 ;; i*86:*:3.2:*) if test -f /usr/options/cb.name; then UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ && UNAME_MACHINE=i586 (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ && UNAME_MACHINE=i686 (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ && UNAME_MACHINE=i686 echo ${UNAME_MACHINE}-pc-sco$UNAME_REL else echo ${UNAME_MACHINE}-pc-sysv32 fi exit 0 ;; pc:*:*:*) # Left here for compatibility: # uname -m prints for DJGPP always 'pc', but it prints nothing about # the processor, so we play safe by assuming i386. echo i386-pc-msdosdjgpp exit 0 ;; Intel:Mach:3*:*) echo i386-pc-mach3 exit 0 ;; paragon:*:*:*) echo i860-intel-osf1 exit 0 ;; i860:*:4.*:*) # i860-SVR4 if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 else # Add other i860-SVR4 vendors below as they are discovered. echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 fi exit 0 ;; mini*:CTIX:SYS*5:*) # "miniframe" echo m68010-convergent-sysv exit 0 ;; mc68k:UNIX:SYSTEM5:3.51m) echo m68k-convergent-sysv exit 0 ;; M680?0:D-NIX:5.3:*) echo m68k-diab-dnix exit 0 ;; M68*:*:R3V[567]*:*) test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;; 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0) OS_REL='' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && echo i486-ncr-sysv4.3${OS_REL} && exit 0 /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && echo i586-ncr-sysv4.3${OS_REL} && exit 0 ;; 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && echo i486-ncr-sysv4 && exit 0 ;; m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) echo m68k-unknown-lynxos${UNAME_RELEASE} exit 0 ;; mc68030:UNIX_System_V:4.*:*) echo m68k-atari-sysv4 exit 0 ;; TSUNAMI:LynxOS:2.*:*) echo sparc-unknown-lynxos${UNAME_RELEASE} exit 0 ;; rs6000:LynxOS:2.*:*) echo rs6000-unknown-lynxos${UNAME_RELEASE} exit 0 ;; PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.0*:*) echo powerpc-unknown-lynxos${UNAME_RELEASE} exit 0 ;; SM[BE]S:UNIX_SV:*:*) echo mips-dde-sysv${UNAME_RELEASE} exit 0 ;; RM*:ReliantUNIX-*:*:*) echo mips-sni-sysv4 exit 0 ;; RM*:SINIX-*:*:*) echo mips-sni-sysv4 exit 0 ;; *:SINIX-*:*:*) if uname -p 2>/dev/null >/dev/null ; then UNAME_MACHINE=`(uname -p) 2>/dev/null` echo ${UNAME_MACHINE}-sni-sysv4 else echo ns32k-sni-sysv fi exit 0 ;; PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort # says echo i586-unisys-sysv4 exit 0 ;; *:UNIX_System_V:4*:FTX*) # From Gerald Hewes . # How about differentiating between stratus architectures? -djm echo hppa1.1-stratus-sysv4 exit 0 ;; *:*:*:FTX*) # From seanf@swdc.stratus.com. echo i860-stratus-sysv4 exit 0 ;; *:VOS:*:*) # From Paul.Green@stratus.com. echo hppa1.1-stratus-vos exit 0 ;; mc68*:A/UX:*:*) echo m68k-apple-aux${UNAME_RELEASE} exit 0 ;; news*:NEWS-OS:6*:*) echo mips-sony-newsos6 exit 0 ;; R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) if [ -d /usr/nec ]; then echo mips-nec-sysv${UNAME_RELEASE} else echo mips-unknown-sysv${UNAME_RELEASE} fi exit 0 ;; BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. echo powerpc-be-beos exit 0 ;; BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. echo powerpc-apple-beos exit 0 ;; BePC:BeOS:*:*) # BeOS running on Intel PC compatible. echo i586-pc-beos exit 0 ;; SX-4:SUPER-UX:*:*) echo sx4-nec-superux${UNAME_RELEASE} exit 0 ;; SX-5:SUPER-UX:*:*) echo sx5-nec-superux${UNAME_RELEASE} exit 0 ;; SX-6:SUPER-UX:*:*) echo sx6-nec-superux${UNAME_RELEASE} exit 0 ;; Power*:Rhapsody:*:*) echo powerpc-apple-rhapsody${UNAME_RELEASE} exit 0 ;; *:Rhapsody:*:*) echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} exit 0 ;; *:Darwin:*:*) case `uname -p` in *86) UNAME_PROCESSOR=i686 ;; powerpc) UNAME_PROCESSOR=powerpc ;; esac echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE} exit 0 ;; *:procnto*:*:* | *:QNX:[0123456789]*:*) UNAME_PROCESSOR=`uname -p` if test "$UNAME_PROCESSOR" = "x86"; then UNAME_PROCESSOR=i386 UNAME_MACHINE=pc fi echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE} exit 0 ;; *:QNX:*:4*) echo i386-pc-qnx exit 0 ;; NSR-?:NONSTOP_KERNEL:*:*) echo nsr-tandem-nsk${UNAME_RELEASE} exit 0 ;; *:NonStop-UX:*:*) echo mips-compaq-nonstopux exit 0 ;; BS2000:POSIX*:*:*) echo bs2000-siemens-sysv exit 0 ;; DS/*:UNIX_System_V:*:*) echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} exit 0 ;; *:Plan9:*:*) # "uname -m" is not consistent, so use $cputype instead. 386 # is converted to i386 for consistency with other x86 # operating systems. if test "$cputype" = "386"; then UNAME_MACHINE=i386 else UNAME_MACHINE="$cputype" fi echo ${UNAME_MACHINE}-unknown-plan9 exit 0 ;; *:TOPS-10:*:*) echo pdp10-unknown-tops10 exit 0 ;; *:TENEX:*:*) echo pdp10-unknown-tenex exit 0 ;; KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) echo pdp10-dec-tops20 exit 0 ;; XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) echo pdp10-xkl-tops20 exit 0 ;; *:TOPS-20:*:*) echo pdp10-unknown-tops20 exit 0 ;; *:ITS:*:*) echo pdp10-unknown-its exit 0 ;; SEI:*:*:SEIUX) echo mips-sei-seiux${UNAME_RELEASE} exit 0 ;; *:DragonFly:*:*) echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` exit 0 ;; esac #echo '(No uname command or uname output not recognized.)' 1>&2 #echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 eval $set_cc_for_build cat >$dummy.c < # include #endif main () { #if defined (sony) #if defined (MIPSEB) /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, I don't know.... */ printf ("mips-sony-bsd\n"); exit (0); #else #include printf ("m68k-sony-newsos%s\n", #ifdef NEWSOS4 "4" #else "" #endif ); exit (0); #endif #endif #if defined (__arm) && defined (__acorn) && defined (__unix) printf ("arm-acorn-riscix"); exit (0); #endif #if defined (hp300) && !defined (hpux) printf ("m68k-hp-bsd\n"); exit (0); #endif #if defined (NeXT) #if !defined (__ARCHITECTURE__) #define __ARCHITECTURE__ "m68k" #endif int version; version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; if (version < 4) printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); else printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); exit (0); #endif #if defined (MULTIMAX) || defined (n16) #if defined (UMAXV) printf ("ns32k-encore-sysv\n"); exit (0); #else #if defined (CMU) printf ("ns32k-encore-mach\n"); exit (0); #else printf ("ns32k-encore-bsd\n"); exit (0); #endif #endif #endif #if defined (__386BSD__) printf ("i386-pc-bsd\n"); exit (0); #endif #if defined (sequent) #if defined (i386) printf ("i386-sequent-dynix\n"); exit (0); #endif #if defined (ns32000) printf ("ns32k-sequent-dynix\n"); exit (0); #endif #endif #if defined (_SEQUENT_) struct utsname un; uname(&un); if (strncmp(un.version, "V2", 2) == 0) { printf ("i386-sequent-ptx2\n"); exit (0); } if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ printf ("i386-sequent-ptx1\n"); exit (0); } printf ("i386-sequent-ptx\n"); exit (0); #endif #if defined (vax) # if !defined (ultrix) # include # if defined (BSD) # if BSD == 43 printf ("vax-dec-bsd4.3\n"); exit (0); # else # if BSD == 199006 printf ("vax-dec-bsd4.3reno\n"); exit (0); # else printf ("vax-dec-bsd\n"); exit (0); # endif # endif # else printf ("vax-dec-bsd\n"); exit (0); # endif # else printf ("vax-dec-ultrix\n"); exit (0); # endif #endif #if defined (alliant) && defined (i860) printf ("i860-alliant-bsd\n"); exit (0); #endif exit (1); } EOF $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && $dummy && exit 0 # Apollos put the system type in the environment. test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit 0; } # Convex versions that predate uname can use getsysinfo(1) if [ -x /usr/convex/getsysinfo ] then case `getsysinfo -f cpu_type` in c1*) echo c1-convex-bsd exit 0 ;; c2*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit 0 ;; c34*) echo c34-convex-bsd exit 0 ;; c38*) echo c38-convex-bsd exit 0 ;; c4*) echo c4-convex-bsd exit 0 ;; esac fi cat >&2 < in order to provide the needed information to handle your system. config.guess timestamp = $timestamp uname -m = `(uname -m) 2>/dev/null || echo unknown` uname -r = `(uname -r) 2>/dev/null || echo unknown` uname -s = `(uname -s) 2>/dev/null || echo unknown` uname -v = `(uname -v) 2>/dev/null || echo unknown` /usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` /bin/uname -X = `(/bin/uname -X) 2>/dev/null` hostinfo = `(hostinfo) 2>/dev/null` /bin/universe = `(/bin/universe) 2>/dev/null` /usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` /bin/arch = `(/bin/arch) 2>/dev/null` /usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` /usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` UNAME_MACHINE = ${UNAME_MACHINE} UNAME_RELEASE = ${UNAME_RELEASE} UNAME_SYSTEM = ${UNAME_SYSTEM} UNAME_VERSION = ${UNAME_VERSION} EOF exit 1 # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "timestamp='" # time-stamp-format: "%:y-%02m-%02d" # time-stamp-end: "'" # End: simulavr-0.1.2.2/config.sub0000755000175000001440000007447710203247651012437 00000000000000#! /bin/sh # Configuration validation subroutine script. # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, # 2000, 2001, 2002, 2003 Free Software Foundation, Inc. timestamp='2004-02-11' # This file is (in principle) common to ALL GNU software. # The presence of a machine in this file suggests that SOME GNU software # can handle that machine. It does not imply ALL GNU software can. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, # Boston, MA 02111-1307, USA. # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Please send patches to . Submit a context # diff and a properly formatted ChangeLog entry. # # Configuration subroutine to validate and canonicalize a configuration type. # Supply the specified configuration type as an argument. # If it is invalid, we print an error message on stderr and exit with code 1. # Otherwise, we print the canonical config type on stdout and succeed. # This file is supposed to be the same for all GNU packages # and recognize all the CPU types, system types and aliases # that are meaningful with *any* GNU software. # Each package is responsible for reporting which valid configurations # it does not support. The user should be able to distinguish # a failure to support a valid configuration from a meaningless # configuration. # The goal of this file is to map all the various variations of a given # machine specification into a single specification in the form: # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM # or in some cases, the newer four-part form: # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM # It is wrong to echo any other type of specification. me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] CPU-MFR-OPSYS $0 [OPTION] ALIAS Canonicalize a configuration name. Operation modes: -h, --help print this help, then exit -t, --time-stamp print date of last modification, then exit -v, --version print version number, then exit Report bugs and patches to ." version="\ GNU config.sub ($timestamp) Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." help=" Try \`$me --help' for more information." # Parse command line while test $# -gt 0 ; do case $1 in --time-stamp | --time* | -t ) echo "$timestamp" ; exit 0 ;; --version | -v ) echo "$version" ; exit 0 ;; --help | --h* | -h ) echo "$usage"; exit 0 ;; -- ) # Stop option processing shift; break ;; - ) # Use stdin as input. break ;; -* ) echo "$me: invalid option $1$help" exit 1 ;; *local*) # First pass through any local machine types. echo $1 exit 0;; * ) break ;; esac done case $# in 0) echo "$me: missing argument$help" >&2 exit 1;; 1) ;; *) echo "$me: too many arguments$help" >&2 exit 1;; esac # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). # Here we must recognize all the valid KERNEL-OS combinations. maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` case $maybe_os in nto-qnx* | linux-gnu* | linux-dietlibc | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | \ kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | storm-chaos* | os2-emx* | rtmk-nova*) os=-$maybe_os basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` ;; *) basic_machine=`echo $1 | sed 's/-[^-]*$//'` if [ $basic_machine != $1 ] then os=`echo $1 | sed 's/.*-/-/'` else os=; fi ;; esac ### Let's recognize common machines as not being operating systems so ### that things like config.sub decstation-3100 work. We also ### recognize some manufacturers as not being operating systems, so we ### can provide default operating systems below. case $os in -sun*os*) # Prevent following clause from handling this invalid input. ;; -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ -apple | -axis) os= basic_machine=$1 ;; -sim | -cisco | -oki | -wec | -winbond) os= basic_machine=$1 ;; -scout) ;; -wrs) os=-vxworks basic_machine=$1 ;; -chorusos*) os=-chorusos basic_machine=$1 ;; -chorusrdb) os=-chorusrdb basic_machine=$1 ;; -hiux*) os=-hiuxwe2 ;; -sco5) os=-sco3.2v5 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco4) os=-sco3.2v4 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2.[4-9]*) os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco3.2v[4-9]*) # Don't forget version if it is 3.2v4 or newer. basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -sco*) os=-sco3.2v2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -udk*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -isc) os=-isc2.2 basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -clix*) basic_machine=clipper-intergraph ;; -isc*) basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` ;; -lynx*) os=-lynxos ;; -ptx*) basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` ;; -windowsnt*) os=`echo $os | sed -e 's/windowsnt/winnt/'` ;; -psos*) os=-psos ;; -mint | -mint[0-9]*) basic_machine=m68k-atari os=-mint ;; esac # Decode aliases for certain CPU-COMPANY combinations. case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. 1750a | 580 \ | a29k \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ | am33_2.0 \ | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \ | c4x | clipper \ | d10v | d30v | dlx | dsp16xx \ | fr30 | frv \ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | i370 | i860 | i960 | ia64 \ | ip2k | iq2000 \ | m32r | m68000 | m68k | m88k | mcore \ | mips | mipsbe | mipseb | mipsel | mipsle \ | mips16 \ | mips64 | mips64el \ | mips64vr | mips64vrel \ | mips64orion | mips64orionel \ | mips64vr4100 | mips64vr4100el \ | mips64vr4300 | mips64vr4300el \ | mips64vr5000 | mips64vr5000el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa64 | mipsisa64el \ | mipsisa64r2 | mipsisa64r2el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipstx39 | mipstx39el \ | mn10200 | mn10300 \ | msp430 \ | ns16k | ns32k \ | openrisc | or32 \ | pdp10 | pdp11 | pj | pjl \ | powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \ | pyramid \ | sh | sh[1234] | sh[23]e | sh[34]eb | shbe | shle | sh[1234]le | sh3ele \ | sh64 | sh64le \ | sparc | sparc64 | sparc86x | sparclet | sparclite | sparcv9 | sparcv9b \ | strongarm \ | tahoe | thumb | tic4x | tic80 | tron \ | v850 | v850e \ | we32k \ | x86 | xscale | xstormy16 | xtensa \ | z8k) basic_machine=$basic_machine-unknown ;; m6811 | m68hc11 | m6812 | m68hc12) # Motorola 68HC11/12. basic_machine=$basic_machine-unknown os=-none ;; m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and # (2) the word "unknown" tends to confuse beginning users. i*86 | x86_64) basic_machine=$basic_machine-pc ;; # Object if more than one company name word. *-*-*) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; # Recognize the basic CPU types with company name. 580-* \ | a29k-* \ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ | avr-* \ | bs2000-* \ | c[123]* | c30-* | [cjt]90-* | c4x-* | c54x-* | c55x-* | c6x-* \ | clipper-* | cydra-* \ | d10v-* | d30v-* | dlx-* \ | elxsi-* \ | f30[01]-* | f700-* | fr30-* | frv-* | fx80-* \ | h8300-* | h8500-* \ | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ | i*86-* | i860-* | i960-* | ia64-* \ | ip2k-* | iq2000-* \ | m32r-* \ | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ | m88110-* | m88k-* | mcore-* \ | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ | mips16-* \ | mips64-* | mips64el-* \ | mips64vr-* | mips64vrel-* \ | mips64orion-* | mips64orionel-* \ | mips64vr4100-* | mips64vr4100el-* \ | mips64vr4300-* | mips64vr4300el-* \ | mips64vr5000-* | mips64vr5000el-* \ | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa64-* | mipsisa64el-* \ | mipsisa64r2-* | mipsisa64r2el-* \ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipstx39-* | mipstx39el-* \ | msp430-* \ | none-* | np1-* | nv1-* | ns16k-* | ns32k-* \ | orion-* \ | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \ | pyramid-* \ | romp-* | rs6000-* \ | sh-* | sh[1234]-* | sh[23]e-* | sh[34]eb-* | shbe-* \ | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ | sparc-* | sparc64-* | sparc86x-* | sparclet-* | sparclite-* \ | sparcv9-* | sparcv9b-* | strongarm-* | sv1-* | sx?-* \ | tahoe-* | thumb-* \ | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* \ | tron-* \ | v850-* | v850e-* | vax-* \ | we32k-* \ | x86-* | x86_64-* | xps100-* | xscale-* | xstormy16-* \ | xtensa-* \ | ymp-* \ | z8k-*) ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) basic_machine=i386-unknown os=-bsd ;; 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) basic_machine=m68000-att ;; 3b*) basic_machine=we32k-att ;; a29khif) basic_machine=a29k-amd os=-udi ;; abacus) basic_machine=abacus-unknown ;; adobe68k) basic_machine=m68010-adobe os=-scout ;; alliant | fx80) basic_machine=fx80-alliant ;; altos | altos3068) basic_machine=m68k-altos ;; am29k) basic_machine=a29k-none os=-bsd ;; amd64) basic_machine=x86_64-pc ;; amd64-*) basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; amdahl) basic_machine=580-amdahl os=-sysv ;; amiga | amiga-*) basic_machine=m68k-unknown ;; amigaos | amigados) basic_machine=m68k-unknown os=-amigaos ;; amigaunix | amix) basic_machine=m68k-unknown os=-sysv4 ;; apollo68) basic_machine=m68k-apollo os=-sysv ;; apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; aux) basic_machine=m68k-apple os=-aux ;; balance) basic_machine=ns32k-sequent os=-dynix ;; c90) basic_machine=c90-cray os=-unicos ;; convex-c1) basic_machine=c1-convex os=-bsd ;; convex-c2) basic_machine=c2-convex os=-bsd ;; convex-c32) basic_machine=c32-convex os=-bsd ;; convex-c34) basic_machine=c34-convex os=-bsd ;; convex-c38) basic_machine=c38-convex os=-bsd ;; cray | j90) basic_machine=j90-cray os=-unicos ;; cr16c) basic_machine=cr16c-unknown os=-elf ;; crds | unos) basic_machine=m68k-crds ;; cris | cris-* | etrax*) basic_machine=cris-axis ;; da30 | da30-*) basic_machine=m68k-da30 ;; decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) basic_machine=mips-dec ;; decsystem10* | dec10*) basic_machine=pdp10-dec os=-tops10 ;; decsystem20* | dec20*) basic_machine=pdp10-dec os=-tops20 ;; delta | 3300 | motorola-3300 | motorola-delta \ | 3300-motorola | delta-motorola) basic_machine=m68k-motorola ;; delta88) basic_machine=m88k-motorola os=-sysv3 ;; dpx20 | dpx20-*) basic_machine=rs6000-bull os=-bosx ;; dpx2* | dpx2*-bull) basic_machine=m68k-bull os=-sysv3 ;; ebmon29k) basic_machine=a29k-amd os=-ebmon ;; elxsi) basic_machine=elxsi-elxsi os=-bsd ;; encore | umax | mmax) basic_machine=ns32k-encore ;; es1800 | OSE68k | ose68k | ose | OSE) basic_machine=m68k-ericsson os=-ose ;; fx2800) basic_machine=i860-alliant ;; genix) basic_machine=ns32k-ns ;; gmicro) basic_machine=tron-gmicro os=-sysv ;; go32) basic_machine=i386-pc os=-go32 ;; h3050r* | hiux*) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; h8300hms) basic_machine=h8300-hitachi os=-hms ;; h8300xray) basic_machine=h8300-hitachi os=-xray ;; h8500hms) basic_machine=h8500-hitachi os=-hms ;; harris) basic_machine=m88k-harris os=-sysv3 ;; hp300-*) basic_machine=m68k-hp ;; hp300bsd) basic_machine=m68k-hp os=-bsd ;; hp300hpux) basic_machine=m68k-hp os=-hpux ;; hp3k9[0-9][0-9] | hp9[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k2[0-9][0-9] | hp9k31[0-9]) basic_machine=m68000-hp ;; hp9k3[2-9][0-9]) basic_machine=m68k-hp ;; hp9k6[0-9][0-9] | hp6[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k7[0-79][0-9] | hp7[0-79][0-9]) basic_machine=hppa1.1-hp ;; hp9k78[0-9] | hp78[0-9]) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[0-9][13679] | hp8[0-9][13679]) basic_machine=hppa1.1-hp ;; hp9k8[0-9][0-9] | hp8[0-9][0-9]) basic_machine=hppa1.0-hp ;; hppa-next) os=-nextstep3 ;; hppaosf) basic_machine=hppa1.1-hp os=-osf ;; hppro) basic_machine=hppa1.1-hp os=-proelf ;; i370-ibm* | ibm*) basic_machine=i370-ibm ;; # I'm not sure what "Sysv32" means. Should this be sysv3.2? i*86v32) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv32 ;; i*86v4*) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv4 ;; i*86v) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv ;; i*86sol2) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-solaris2 ;; i386mach) basic_machine=i386-mach os=-mach ;; i386-vsta | vsta) basic_machine=i386-unknown os=-vsta ;; iris | iris4d) basic_machine=mips-sgi case $os in -irix*) ;; *) os=-irix4 ;; esac ;; isi68 | isi) basic_machine=m68k-isi os=-sysv ;; m88k-omron*) basic_machine=m88k-omron ;; magnum | m3230) basic_machine=mips-mips os=-sysv ;; merlin) basic_machine=ns32k-utek os=-sysv ;; mingw32) basic_machine=i386-pc os=-mingw32 ;; miniframe) basic_machine=m68000-convergent ;; *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) basic_machine=m68k-atari os=-mint ;; mips3*-*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` ;; mips3*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown ;; mmix*) basic_machine=mmix-knuth os=-mmixware ;; monitor) basic_machine=m68k-rom68k os=-coff ;; morphos) basic_machine=powerpc-unknown os=-morphos ;; msdos) basic_machine=i386-pc os=-msdos ;; mvs) basic_machine=i370-ibm os=-mvs ;; ncr3000) basic_machine=i486-ncr os=-sysv4 ;; netbsd386) basic_machine=i386-unknown os=-netbsd ;; netwinder) basic_machine=armv4l-rebel os=-linux ;; news | news700 | news800 | news900) basic_machine=m68k-sony os=-newsos ;; news1000) basic_machine=m68030-sony os=-newsos ;; news-3600 | risc-news) basic_machine=mips-sony os=-newsos ;; necv70) basic_machine=v70-nec os=-sysv ;; next | m*-next ) basic_machine=m68k-next case $os in -nextstep* ) ;; -ns2*) os=-nextstep2 ;; *) os=-nextstep3 ;; esac ;; nh3000) basic_machine=m68k-harris os=-cxux ;; nh[45]000) basic_machine=m88k-harris os=-cxux ;; nindy960) basic_machine=i960-intel os=-nindy ;; mon960) basic_machine=i960-intel os=-mon960 ;; nonstopux) basic_machine=mips-compaq os=-nonstopux ;; np1) basic_machine=np1-gould ;; nv1) basic_machine=nv1-cray os=-unicosmp ;; nsr-tandem) basic_machine=nsr-tandem ;; op50n-* | op60c-*) basic_machine=hppa1.1-oki os=-proelf ;; or32 | or32-*) basic_machine=or32-unknown os=-coff ;; os400) basic_machine=powerpc-ibm os=-os400 ;; OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose ;; os68k) basic_machine=m68k-none os=-os68k ;; pa-hitachi) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; paragon) basic_machine=i860-intel os=-osf ;; pbd) basic_machine=sparc-tti ;; pbb) basic_machine=m68k-tti ;; pc532 | pc532-*) basic_machine=ns32k-pc532 ;; pentium | p5 | k5 | k6 | nexgen | viac3) basic_machine=i586-pc ;; pentiumpro | p6 | 6x86 | athlon | athlon_*) basic_machine=i686-pc ;; pentiumii | pentium2 | pentiumiii | pentium3) basic_machine=i686-pc ;; pentium4) basic_machine=i786-pc ;; pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumpro-* | p6-* | 6x86-* | athlon-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium4-*) basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pn) basic_machine=pn-gould ;; power) basic_machine=power-ibm ;; ppc) basic_machine=powerpc-unknown ;; ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppcle | powerpclittle | ppc-le | powerpc-little) basic_machine=powerpcle-unknown ;; ppcle-* | powerpclittle-*) basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64) basic_machine=powerpc64-unknown ;; ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64le | powerpc64little | ppc64-le | powerpc64-little) basic_machine=powerpc64le-unknown ;; ppc64le-* | powerpc64little-*) basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ps2) basic_machine=i386-ibm ;; pw32) basic_machine=i586-unknown os=-pw32 ;; rom68k) basic_machine=m68k-rom68k os=-coff ;; rm[46]00) basic_machine=mips-siemens ;; rtpc | rtpc-*) basic_machine=romp-ibm ;; s390 | s390-*) basic_machine=s390-ibm ;; s390x | s390x-*) basic_machine=s390x-ibm ;; sa29200) basic_machine=a29k-amd os=-udi ;; sb1) basic_machine=mipsisa64sb1-unknown ;; sb1el) basic_machine=mipsisa64sb1el-unknown ;; sei) basic_machine=mips-sei os=-seiux ;; sequent) basic_machine=i386-sequent ;; sh) basic_machine=sh-hitachi os=-hms ;; sh64) basic_machine=sh64-unknown ;; sparclite-wrs | simso-wrs) basic_machine=sparclite-wrs os=-vxworks ;; sps7) basic_machine=m68k-bull os=-sysv2 ;; spur) basic_machine=spur-unknown ;; st2000) basic_machine=m68k-tandem ;; stratus) basic_machine=i860-stratus os=-sysv4 ;; sun2) basic_machine=m68000-sun ;; sun2os3) basic_machine=m68000-sun os=-sunos3 ;; sun2os4) basic_machine=m68000-sun os=-sunos4 ;; sun3os3) basic_machine=m68k-sun os=-sunos3 ;; sun3os4) basic_machine=m68k-sun os=-sunos4 ;; sun4os3) basic_machine=sparc-sun os=-sunos3 ;; sun4os4) basic_machine=sparc-sun os=-sunos4 ;; sun4sol2) basic_machine=sparc-sun os=-solaris2 ;; sun3 | sun3-*) basic_machine=m68k-sun ;; sun4) basic_machine=sparc-sun ;; sun386 | sun386i | roadrunner) basic_machine=i386-sun ;; sv1) basic_machine=sv1-cray os=-unicos ;; symmetry) basic_machine=i386-sequent os=-dynix ;; t3e) basic_machine=alphaev5-cray os=-unicos ;; t90) basic_machine=t90-cray os=-unicos ;; tic54x | c54x*) basic_machine=tic54x-unknown os=-coff ;; tic55x | c55x*) basic_machine=tic55x-unknown os=-coff ;; tic6x | c6x*) basic_machine=tic6x-unknown os=-coff ;; tx39) basic_machine=mipstx39-unknown ;; tx39el) basic_machine=mipstx39el-unknown ;; toad1) basic_machine=pdp10-xkl os=-tops20 ;; tower | tower-32) basic_machine=m68k-ncr ;; tpf) basic_machine=s390x-ibm os=-tpf ;; udi29k) basic_machine=a29k-amd os=-udi ;; ultra3) basic_machine=a29k-nyu os=-sym1 ;; v810 | necv810) basic_machine=v810-nec os=-none ;; vaxv) basic_machine=vax-dec os=-sysv ;; vms) basic_machine=vax-dec os=-vms ;; vpp*|vx|vx-*) basic_machine=f301-fujitsu ;; vxworks960) basic_machine=i960-wrs os=-vxworks ;; vxworks68) basic_machine=m68k-wrs os=-vxworks ;; vxworks29k) basic_machine=a29k-wrs os=-vxworks ;; w65*) basic_machine=w65-wdc os=-none ;; w89k-*) basic_machine=hppa1.1-winbond os=-proelf ;; xps | xps100) basic_machine=xps100-honeywell ;; ymp) basic_machine=ymp-cray os=-unicos ;; z8k-*-coff) basic_machine=z8k-unknown os=-sim ;; none) basic_machine=none-none os=-none ;; # Here we handle the default manufacturer of certain CPU types. It is in # some cases the only manufacturer, in others, it is the most popular. w89k) basic_machine=hppa1.1-winbond ;; op50n) basic_machine=hppa1.1-oki ;; op60c) basic_machine=hppa1.1-oki ;; romp) basic_machine=romp-ibm ;; rs6000) basic_machine=rs6000-ibm ;; vax) basic_machine=vax-dec ;; pdp10) # there are many clones, so DEC is not a safe bet basic_machine=pdp10-unknown ;; pdp11) basic_machine=pdp11-dec ;; we32k) basic_machine=we32k-att ;; sh3 | sh4 | sh[34]eb | sh[1234]le | sh[23]ele) basic_machine=sh-unknown ;; sh64) basic_machine=sh64-unknown ;; sparc | sparcv9 | sparcv9b) basic_machine=sparc-sun ;; cydra) basic_machine=cydra-cydrome ;; orion) basic_machine=orion-highlevel ;; orion105) basic_machine=clipper-highlevel ;; mac | mpw | mac-mpw) basic_machine=m68k-apple ;; pmac | pmac-mpw) basic_machine=powerpc-apple ;; *-unknown) # Make sure to match an already-canonicalized machine name. ;; *) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; 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See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA # 02111-1307, USA. # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Alexandre Oliva . case $1 in '') echo "$0: No command. Try \`$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: depcomp [--help] [--version] PROGRAM [ARGS] Run PROGRAMS ARGS to compile a file, generating dependencies as side-effects. Environment variables: depmode Dependency tracking mode. source Source file read by `PROGRAMS ARGS'. object Object file output by `PROGRAMS ARGS'. depfile Dependency file to output. tmpdepfile Temporary file to use when outputing dependencies. libtool Whether libtool is used (yes/no). Report bugs to . EOF exit 0 ;; -v | --v*) echo "depcomp $scriptversion" exit 0 ;; esac if test -z "$depmode" || test -z "$source" || test -z "$object"; then echo "depcomp: Variables source, object and depmode must be set" 1>&2 exit 1 fi # `libtool' can also be set to `yes' or `no'. if test -z "$depfile"; then base=`echo "$object" | sed -e 's,^.*/,,' -e 's,\.\([^.]*\)$,.P\1,'` dir=`echo "$object" | sed 's,/.*$,/,'` if test "$dir" = "$object"; then dir= fi # FIXME: should be _deps on DOS. depfile="$dir.deps/$base" fi tmpdepfile=${tmpdepfile-`echo "$depfile" | sed 's/\.\([^.]*\)$/.T\1/'`} rm -f "$tmpdepfile" # Some modes work just like other modes, but use different flags. We # parameterize here, but still list the modes in the big case below, # to make depend.m4 easier to write. Note that we *cannot* use a case # here, because this file can only contain one case statement. if test "$depmode" = hp; then # HP compiler uses -M and no extra arg. gccflag=-M depmode=gcc fi if test "$depmode" = dashXmstdout; then # This is just like dashmstdout with a different argument. dashmflag=-xM depmode=dashmstdout fi case "$depmode" in gcc3) ## gcc 3 implements dependency tracking that does exactly what ## we want. Yay! Note: for some reason libtool 1.4 doesn't like ## it if -MD -MP comes after the -MF stuff. Hmm. "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" stat=$? if test $stat -eq 0; then : else rm -f "$tmpdepfile" exit $stat fi mv "$tmpdepfile" "$depfile" ;; gcc) ## There are various ways to get dependency output from gcc. Here's ## why we pick this rather obscure method: ## - Don't want to use -MD because we'd like the dependencies to end ## up in a subdir. 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Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # Extra Rules common to building avr objects. # DEFS = CFLAGS = -g -Wall $(AVR_TARGET) INCLUDES = -I$(srcdir) $(AVR_INC_DIR) CC = $(AVR_CC) .elf.hex: $(AVR_OBJCOPY) -O ihex $< $@ .elf.bin: $(AVR_OBJCOPY) -O binary $< $@ .elf.lst: $(AVR_OBJDUMP) -h -S -D --stabs --disassemble-zeroes $< > $@ .asm.elf: $(AVR_AS) --gstabs $(AVR_TARGET) $(INCLUDES) -o $@ $< SUFFIXES = .asm .elf .hex .bin .lst simulavr-0.1.2.2/README.gdb0000644000175000001440000000251310203246517012045 00000000000000## ## $Id: README.gdb,v 1.5 2003/09/19 19:59:20 troth Exp $ ## This README file discusses the issues involved with using the simulator remotely from gdb. First off, you will need to compile gdb >= 5.2.1 with the avr target support. Once you've built and installed gdb for avr, you need to know how to use it to debug a remote program. It's an easy, two step process. First, you need to start up simulavr in gdbserver mode as such: $ simulavr --gdbserver [other options] Second, just start up avr-gdb with an avr elf program, connect to the remote target, and load the program into the sim with these commands: $ avr-gdb myprog.elf (gdb) target remote localhost: (gdb) load where is the port number that simulavr is listening on. You need to have the simulavr running before giving gdb the target command. In most cases, you'll be running simulavr on the same host as gdb, thus the "localhost" part. You must use the same port number for simulavr and in the gdb target command. If you feel the need to run simulavr on another host, just change localhost to the name of the host that simulavr will be running on. After gdb has connected to the remote target, you should be able to use gdb just as if you were debugging a program natively. For more detailed information, see the documentation in the doc subdirectory. simulavr-0.1.2.2/README.opcodes0000644000175000001440000003547710203246517012764 00000000000000# # $Id: README.opcodes,v 1.3 2001/12/02 21:54:45 troth Exp $ # ############################################################################## ## ## Most of the information in this file was taken directly from the Atmel ## data sheets and is most likely copyrighted by Atmel. As such, this file ## may need to disappear. ## ############################################################################## Instruction Set Nomenclature: Status Register (SREG) SREG: Status register C: Carry flag in status register Z: Zero flag in status register N: Negative flag in status register V: Two's complement overflow indicator S: N A* V, For signed tests H: Half Carry flag in the status register T: Transfer bit used by BLD and BST instructions I: Global interrupt enable/disable flag Registers and Operands Rd: Destination (and source) register in the register file Rr: Source register in the register file R: Result after instruction is executed K: Constant data k: Constant address b: Bit in the register file or I/O register (3 bit) s: Bit in the status register (3 bit) X,Y,Z: Indirect address register (X=R27:R26, Y=R29:R28 and Z=R31:R30) A: I/O location address q: Displacement for direct addressing (6 bit) I/O Registers RAMPX, RAMPY, RAMPZ Registers concatenated with the X, Y and Z registers enabling indirect addressing of the whole data space on MCUs withmore than 64K bytes data space, and constant data fetch on MCUs with more than 64K bytes program space. RAMPD Register concatenated with the Z register enabling direct addressing of the whole data space on MCUs with more than 64Kbytes data space. EIND Register concatenated with the instruction word enabling indirect jump and call to the whole program space on MCUs withmore than 64K bytes program space. Stack STACK: Stack for return address and pushed registers SP: Stack Pointer to STACK Flags <=>: Flag affected by instruction 0: Flag cleared by instruction 1: Flag set by instruction -: Flag not affected by instruction Conditional Branch Summary Note: 1. Interchange Rd and Rr in the operation before the test. i.e. CP Rd,Rr -> CP Rr,Rd Test Boolean Mnemonic Complementary Boolean Mnemonic Comment Rd > Rr Z&(N ^ V) = 0 BRLT(1) Rd <= Rr Z+(N ^ V) = 1 BRGE* Signed Rd >= Rr (N ^ V) = 0 BRGE Rd < Rr (N ^ V) = 1 BRLT Signed Rd = Rr Z = 1 BREQ Rd != Rr Z = 0 BRNE Signed Rd <= Rr Z+(N ^ V) = 1 BRGE(1) Rd > Rr Z&(N ^ V) = 0 BRLT* Signed Rd < Rr (N ^ V) = 1 BRLT Rd >= Rr (N ^ V) = 0 BRGE Signed Rd > Rr C + Z = 0 BRLO(1) Rd <= Rr C + Z = 1 BRSH* Unsigned Rd >= Rr C = 0 BRSH/BRCC Rd < Rr C = 1 BRLO/BRCS Unsigned Rd = Rr Z = 1 BREQ Rd != Rr Z = 0 BRNE Unsigned Rd <= Rr C + Z = 1 BRSH(1) Rd > Rr C + Z = 0 BRLO* Unsigned Rd < Rr C = 1 BRLO/BRCS Rd >= Rr C = 0 BRSH/BRCC Unsigned Carry C = 1 BRCS No carry C = 0 BRCC Simple Negative N = 1 BRMI Positive N = 0 BRPL Simple Overflow V = 1 BRVS No overflow V = 0 BRVC Simple Zero Z = 1 BREQ Not zero Z = 0 BRNE Simple Complete Instruction Set Summary Notes: 1. Not all instructions are available in all devices. Refer to the device specific instruction summary. 2. Cycle times for data memory accesses assume internal memory accesses, and are not valid for accesses via the external RAM interface. For LD, ST, LDS, STS, PUSH, POP, add one cycle plus one cycle for each wait state. For CALL, ICALL, EICALL, RCALL, RET, RETI in devices with 16 bit PC, add three cycles plus two cycles for each wait state. For CALL, ICALL, EICALL, RCALL, RET, RETI in devices with 22 bit PC, add five cycles plus three cycles for each wait state. Instruction Set Summary Arithmetic and Logic Instructions | | | | Device Availability| Mnem | Opcode | Operands | Method Name | 1200 | 4414 | 8515 | =======|=====================|==========|=============|======|======|======| ADC | 0001 11rd dddd rrrr | Rd, Rr | ADC | * | * | * | ADD | 0000 11rd dddd rrrr | Rd, Rr | ADD | * | * | * | ADIW | 1001 0110 KKdd KKKK | Rd, Rr | ADIW | - | * | * | AND | 0010 00rd dddd rrrr | Rd, Rr | AND | * | * | * | ANDI | 0111 KKKK dddd KKKK | Rd, K | ANDI | * | * | * | ASR | 1001 010d dddd 0101 | Rd | ASR | * | * | * | BCLR | 1001 0100 1sss 1000 | s | BCLR | * | * | * | BLD | 1111 100d dddd 0bbb | Rd, b | BLD | * | * | * | BRBC | 1111 01kk kkkk ksss | s, k | BRCS | * | * | * | BRBS | 1111 00kk kkkk ksss | s, k | BRBS | * | * | * | BRCC | 1111 01kk kkkk k000 | k | BRCC | * | * | * | BRCS | 1111 00kk kkkk k000 | k | BRCS | * | * | * | BREQ | 1111 00kk kkkk k001 | k | BREQ | * | * | * | BRGE | 1111 01kk kkkk k100 | k | BRGE | * | * | * | BRHC | 1111 01kk kkkk k101 | k | BRHC | * | * | * | BRHS | 1111 00kk kkkk k101 | k | BRHS | * | * | * | BRID | 1111 01kk kkkk k111 | k | BRID | * | * | * | BRIE | 1111 00kk kkkk k111 | k | BRIE | * | * | * | BRLO | 1111 00kk kkkk k000 | k | BRCS | * | * | * | BRLT | 1111 00kk kkkk k100 | k | BRLT | * | * | * | BRMI | 1111 00kk kkkk k010 | k | BRMI | * | * | * | BRNE | 1111 01kk kkkk k001 | k | BRNE | * | * | * | BRPL | 1111 01kk kkkk k010 | k | BRPL | * | * | * | BRSH | 1111 01kk kkkk k000 | k | BRCC | * | * | * | BRTC | 1111 01kk kkkk k110 | k | BRTC | * | * | * | BRTS | 1111 00kk kkkk k110 | k | BRTS | * | * | * | BRVC | 1111 01kk kkkk k011 | k | BRVC | * | * | * | BRVS | 1111 00kk kkkk k011 | k | BRVS | * | * | * | BSET | 1001 0100 0sss 1000 | s | BSET | * | * | * | BST | 1111 101d dddd 0bbb | Rr, b | BST | * | * | * | CALL | 1001 010k kkkk 111k | k | CALL | - | - | - | | kkkk kkkk kkkk kkkk | | | | | | CBI | 1001 1000 AAAA Abbb | A, b | CBI | * | * | * | CBR | 0111 KKKK dddd KKKK | Rd, K | CBR | * | * | * | CLC | 1001 0100 1000 1000 | | CLC | * | * | * | CLH | 1001 0100 1101 1000 | | CLH | * | * | * | CLI | 1001 0100 1111 1000 | | CLI | * | * | * | CLN | 1001 0100 1010 1000 | | CLN | * | * | * | CLR | 0010 01dd dddd dddd | Rd | EOR | * | * | * | CLS | 1001 0100 1100 1000 | | CLS | * | * | * | CLT | 1001 0100 1110 1000 | | CLT | * | * | * | CLV | 1001 0100 1011 1000 | | CLV | * | * | * | CLZ | 1001 0100 1001 1000 | | CLZ | * | * | * | COM | 1001 010d dddd 0000 | Rd | COM | * | * | * | CP | 0001 01rd dddd rrrr | Rd, Rr | CP | * | * | * | CPC | 0000 01rd dddd rrrr | Rd, Rr | CPC | * | * | * | CPI | 0011 KKKK dddd KKKK | Rd, K | CPI | * | * | * | CPSE | 0001 00rd dddd rrrr | Rd, Rr | CPSE | * | * | * | DEC | 1001 010d dddd 1010 | Rd | DEC | * | * | * | EICALL | 1001 0101 0001 1001 | | EICALL | - | - | - | EIJMP | 1001 0100 0001 1001 | | EIJMP | - | - | - | ELPM | 1001 0101 1101 1000 | | ELPM | - | - | - | ELPM | 1001 000d dddd 0110 | Rd, Z | ELPM_Z | - | - | - | ELPM | 1001 000d dddd 0111 | Rd, Z+ | ELPM_Z_incr | - | - | - | EOR | 0010 01rd dddd rrrr | Rd, Rr | EOR | * | * | * | ESPM | 1001 0101 1111 1000 | | ESPM | - | - | - | FMUL | 0000 0011 0ddd 1rrr | Rd, Rr | FMUL | - | - | - | FMULS | 0000 0011 1ddd 0rrr | Rd, Rr | FMULS | - | - | - | FMULSU | 0000 0011 1ddd 1rrr | Rd, Rr | FMULSU | - | - | - | ICALL | 1001 0101 0000 1001 | | ICALL | - | * | * | IJMP | 1001 0100 0000 1001 | | IJMP | - | * | * | IN | 1011 0AAd dddd AAAA | Rd, A | IN | * | * | * | INC | 1001 010d dddd 0011 | Rd | INC | * | * | * | JMP | 1001 010k kkkk 110k | k | JMP | - | - | - | | kkkk kkkk kkkk kkkk | | | | | | LD | 1000 000d dddd 1000 | Rd, Y | LDD_Y | - | * | * | LD | 1001 000d dddd 1001 | Rd, Y+ | LD_Y_incr | - | * | * | LD | 1000 000d dddd 0000 | Rd, Z | LDD_Z | * | * | * | LD | 1001 000d dddd 0001 | Rd, Z+ | LD_Z_incr | - | * | * | LD | 1001 000d dddd 1110 | Rd, -X | LD_X_decr | - | * | * | LD | 1001 000d dddd 1010 | Rd, -Y | LD_Y_decr | - | * | * | LD | 1001 000d dddd 0010 | Rd, -Z | LD_Z_decr | - | * | * | LD | 1001 000d dddd 1100 | Rd, X | LD_X | - | * | * | LD | 1001 000d dddd 1101 | Rd, X+ | LD_X_incr | - | * | * | LDD | 10q0 qq0d dddd 1qqq | Rd, Y+q | LDD_Y | - | * | * | LDD | 10q0 qq0d dddd 0qqq | Rd, Z+q | LDD_Z | - | * | * | LDI | 1110 KKKK dddd KKKK | Rd, K | LDI | * | * | * | LDS | 1001 000d dddd 0000 | Rd, k | LDS | - | * | * | | kkkk kkkk kkkk kkkk | | | | | | LPM | 1001 0101 1100 1000 | | LPM | - | * | * | LPM | 1001 000d dddd 0100 | Rd, Z | LPM_Z | - | - | - | LPM | 1001 000d dddd 0101 | Rd, Z+ | LPM_Z_incr | - | - | - | LSL | 0000 11dd dddd dddd | Rd | AND | * | * | * | LSR | 1001 010d dddd 0110 | Rd | LSR | * | * | * | MOV | 0010 11rd dddd rrrr | Rd, Rr | MOV | * | * | * | MOVW | 0000 0001 dddd rrrr | Rd, Rr | MOVW | - | - | - | MUL | 1001 11rd dddd rrrr | Rd, Rr | MUL | - | - | - | MULS | 0000 0010 dddd rrrr | Rd, Rr | MULS | - | - | - | MULSU | 0000 0011 dddd rrrr | Rd, Rr | MULSU | - | - | - | NEG | 1001 010d dddd 0001 | Rd | NEG | * | * | * | NOP | 0000 0000 0000 0000 | | NOP | * | * | * | OR | 0010 10rd dddd rrrr | Rd, Rr | OR | * | * | * | ORI | 0110 KKKK dddd KKKK | Rd, K | ORI | * | * | * | OUT | 1011 1AAd dddd AAAA | A, Rd | OUT | * | * | * | POP | 1001 000d dddd 1111 | Rd | POP | - | * | * | PUSH | 1001 001d dddd 1111 | Rd | PUSH | - | * | * | RCALL | 1101 kkkk kkkk kkkk | k | RCALL | * | * | * | RET | 1001 0101 0000 1000 | | RET | * | * | * | RETI | 1001 0101 0001 1000 | | RETI | * | * | * | RJMP | 1100 kkkk kkkk kkkk | k | RJMP | * | * | * | ROL | 0001 11dd dddd dddd | Rd | ADC | * | * | * | ROR | 1001 010d dddd 0111 | Rd | ROR | * | * | * | SBC | 0000 10rd dddd rrrr | Rd, Rr | SBC | * | * | * | SBCI | 0100 KKKK dddd KKKK | Rd, K | SBCI | * | * | * | SBI | 1001 1010 AAAA Abbb | A, b | SBI | * | * | * | SBIC | 1001 1001 AAAA Abbb | A, b | SBIC | * | * | * | SBIS | 1001 1011 AAAA Abbb | A, b | SBIS | * | * | * | SBIW | 1001 0111 KKdd KKKK | Rd, K | SBIW | - | - | - | SBR | 0110 KKKK dddd KKKK | Rd, K | SBR | * | * | * | SBRC | 1111 110d dddd 0bbb | Rd, b | SBRC | * | * | * | SBRS | 1111 111d dddd 0bbb | Rd, b | SBRS | * | * | * | SEC | 1001 0100 0000 1000 | | SEC | * | * | * | SEH | 1001 0100 0101 1000 | | SEH | * | * | * | SEI | 1001 0100 0111 1000 | | SEI | * | * | * | SEN | 1001 0100 0010 1000 | | SEN | * | * | * | SER | 1110 1111 dddd 1111 | Rd | LDI | * | * | * | SES | 1001 0100 0100 1000 | | SES | * | * | * | SET | 1001 0100 0110 1000 | | SET | * | * | * | SEV | 1001 0100 0011 1000 | | SEV | * | * | * | SEZ | 1001 0100 0001 1000 | | SEZ | * | * | * | SLEEP | 1001 0101 1000 1000 | | SLEEP | * | * | * | SPM | 1001 0101 1110 1000 | | SPM | - | - | - | ST | 1001 001d dddd 1101 | X+, Rd | ST_X_incr | - | * | * | ST | 1001 001d dddd 1100 | X, Rd | ST_X | - | * | * | ST | 1001 001d dddd 1001 | Y+, Rd | ST_Y_incr | - | * | * | ST | 1000 001d dddd 1000 | Y, Rd | STD_Y | - | * | * | ST | 1001 001d dddd 0001 | Z+, Rd | ST_Z_incr | - | * | * | ST | 1000 001d dddd 0000 | Z, Rd | STD_Z | * | * | * | ST | 1001 001d dddd 1110 |-X, Rd | ST_X_decr | - | * | * | ST | 1001 001d dddd 1010 |-Y, Rd | ST_Y_decr | - | * | * | ST | 1001 001d dddd 0010 |-Z, Rd | ST_Z_decr | - | * | * | STD | 10q0 qq1d dddd 1qqq | Y+q, Rd | STD_Y | - | * | * | STD | 10q0 qq1d dddd 0qqq | Z+q, Rd | STD_Z | - | * | * | STS | 1001 001d dddd 0000 | k, Rd | STS | - | * | * | | kkkk kkkk kkkk kkkk | | | | | | SUB | 0001 10rd dddd rrrr | Rd, Rr | SUB | * | * | * | SUBI | 0101 KKKK dddd KKKK | Rd, K | SUBI | * | * | * | SWAP | 1001 010d dddd 0010 | Rd | SWAP | * | * | * | TST | 0010 00dd dddd dddd | Rd | AND | * | * | * | WDR | 1001 0101 1010 1000 | | WDR | * | * | * | simulavr-0.1.2.2/ProjSummary0000644000175000001440000000255710203246517012655 00000000000000The Simulavr project is a simulator for the Atmel AVR family of 8-bit, risc microcontrollers. Currently supported devices include the at90s1200, at90s2313, at90s4414 and at90s8515. The simulation of these devices is not quite complete, but most of the useful functionality is present. Support is also present for running the simulator as a remote target of gdb-5.x. Since gdb does not currently support the AVR micros, a patch is supplied with simulavr to provide that support with the hopes that the gdb patch will eventually be integrated into the gdb source tree proper. Texinfo based documentation has already been started, but needs much work done in documenting the internals of the simulator in order to help new developers learn how to add support for new devices as Atmel introduces them. The Simulavr project is expected to progress in the following stages: 1. Solidify support for running as a gdb remote target. 2. Acheive 100% simulation of the existing supported devices. 3. Design and implement a modular external periheral interface to allow simulation of peripherals such as LCD displays, ethernet ports, etc. 4. Add support for all at90sXXXX series devices. 5. Add support for atMegaXXX series devices. 6. Add support for atTinyXXX series devices. 7. ??? The project already exists and you can see it at http://savannah.gnu.org/projects/simulavr/ simulavr-0.1.2.2/misc/0000777000175000001440000000000010204750220011440 500000000000000simulavr-0.1.2.2/misc/defn_tmpl_h0000644000175000001440000000217610007326245013573 00000000000000/* * $Id: defn_tmpl_h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/misc/gpl_header0000644000175000001440000000172110007326245013401 00000000000000############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2004 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### simulavr-0.1.2.2/misc/gpl_header_c0000644000175000001440000000176110007326245013707 00000000000000/* * $Id$ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ simulavr-0.1.2.2/misc/gpl_header_h0000644000175000001440000000206110007326245013706 00000000000000/* * $Id$ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_File_H #define SIM_File_H #endif /* SIM_File_H */ simulavr-0.1.2.2/misc/gpl_header_py0000644000175000001440000000204610007326245014112 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2004 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: gpl_header_py,v 1.3 2004/02/02 01:49:25 troth Exp $ # simulavr-0.1.2.2/misc/io_gen.py0000644000175000001440000000460510006115645013201 00000000000000#! /usr/bin/env python ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2004 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ############################################################################### # # $Id: io_gen.py,v 1.1 2004/01/29 05:35:33 troth Exp $ # # # This script is for generating the .io_reg field initializer of the # DevSuppDefn for a specfic device. The input should be one of the io*.h files # provided by avr-libc in the include/avr/ directory. # # Usage: io_gen.py # # This best way to use this script is while using vim to edit the # devsupp.c. You can run the script from vim and have the output of the script # inserted directly into the devsupp.c file with a command like this: # # :r!../misc/io_gen.py ~/dev/tools/avr-libc-cvs/include/avr/io1200.h # import sys, re base_regx = r'[#]define\s*?(\S+)\s*?%s\s*[(]\s*?(\S+?)\s*?[)]' re_io8 = re.compile (base_regx % ('_SFR_IO8')) re_mem8 = re.compile (base_regx % ('_SFR_MEM8')) # Open the input file. f = open (sys.argv[1]).read () register = {} # Find all the _SFR_IO8 defs. for name, addr_str in re_io8.findall (f): addr = int (addr_str, 0) + 0x20 register[addr] = name # Find all the _SFR_MEM8 defs. for name, addr_str in re_mem8.findall (f): addr = int (addr_str, 0) register[addr] = name # Print the field initializer to stdout. print ' .io_reg = {' addrs = register.keys () addrs.sort () for addr in addrs: print ' { .addr = 0x%02x, .name = "%s", },' % (addr, register[addr]) print ' /* May need to add SREG, SPL, SPH, and eeprom registers. */' print ' IO_REG_DEFN_TERMINATOR' print ' }' simulavr-0.1.2.2/misc/irq.py0000755000175000001440000000047207762065062012551 00000000000000#! /usr/bin/env python # # $Id: irq.py,v 1.1 2003/11/29 09:43:14 troth Exp $ # # Use this script to generate new gdb commands for telling the simulator to # fire off an irq. # BASE_IRQ = 80 for i in range(1,35): print print "define irq_%d" % (i) print " signal SIG%d" % (BASE_IRQ+i) print "end" simulavr-0.1.2.2/misc/refmt.sh0000755000175000001440000000306707762553062013062 00000000000000#! /bin/bash # # $Id: refmt.sh,v 1.5 2003/12/01 05:48:34 troth Exp $ # # Please use this script to indent your C code before submitting patches. # set -x OPTS="\ --no-tabs \ --no-blank-lines-after-declarations \ --blank-lines-after-procedures \ --no-blank-lines-after-commas \ --break-before-boolean-operator \ --braces-after-if-line \ --brace-indent0 \ --braces-after-struct-decl-line \ --no-comment-delimiters-on-blank-lines \ --dont-cuddle-else \ --else-endif-column1 \ --declaration-indentation2 \ --dont-format-first-column-comments \ --dont-format-comments \ --indent-level4 \ --parameter-indentation5 \ --continue-at-parentheses \ --space-after-procedure-calls \ --no-space-after-parentheses \ --procnames-start-lines \ --space-after-for \ --space-after-if \ --space-after-while \ --dont-star-comments \ --swallow-optional-blank-lines \ --no-space-after-casts \ --case-indentation4 \ --ignore-newlines \ --tab-size1 \ " if [ "x${STATIC_TYPES}" != "x" ] then TYPES="-T AvrClass -T BreakPt -T Irq -T AvrCore -T CallBack -T DevSuppDefn \ -T EEProm -T Flash -T GdbComm_T -T IntVect -T IntVectTable -T Memory \ -T Port -T PortA -T PortB -T PortC -T PortD -T PortE -T PortF -T SREG \ -T GPWR -T ACSR -T MCUCR -T WDTCR -T RAMPZ -T SPIIntr_T -T SPI_T -T SRAM \ -T StackPointer -T Stack -T HWStack -T MemStack -T Storage -T TimerIntr_T \ -T Timer0_T -T OCReg16Def -T OCReg16_T -T Timer16Def -T Timer16_T -T DList \ -T VDevice" else # This is the default case. TYPES=$(grep typedef *.[ch] | awk '/struct/ {print "-T " $NF}' | sed 's/;//') fi indent -v ${OPTS} ${TYPES} $@ simulavr-0.1.2.2/README.cygwin0000644000175000001440000000306510203246517012614 00000000000000## ## $Id: README.cygwin,v 1.2 2003/09/19 21:27:39 troth Exp $ ## [This file was contributed by Eric Weddingtion ] To build simulavr for Windows requires the use of Cygwin Specifically, this was built using the Previous package of Cygwin. In the Cygwin installer, select the Prev radio button up top when installing the packages. This should install cygwin 1.3.22-1, from the Base tree in the Cygwin setup. Get simulavr from anonymous CVS as explained on the simulavr project web page. Then, in the simulavr project directory: $ export $PREFIX= $ ./bootstrap $ mkdir build $ cd build $ ../configure --prefix=$PREFIX --datadir=$PREFIX --disable-tests --enable-pdf LDFLAGS='-static' $ make $ make install This will create simulavr.exe, simulavr-vcd.exe, and simulavr-disp.exe. All three applications will require cygwin1.dll to execute. In Cygwin, you can check to see what, if any, DLLs are required of an executable by using the program cygcheck.exe that comes with Cygwin. For example if you cd to the $PREFIX/bin directory after building the project, and execute $ cygcheck ./simulavr*.exe You should get something like (depending on where your OS is installed): .\simulavr-disp.exe .\cygwin1.dll C:\WINNT\System32\KERNEL32.dll C:\WINNT\System32\NTDLL.DLL .\simulavr-vcd.exe .\cygwin1.dll C:\WINNT\System32\KERNEL32.dll C:\WINNT\System32\NTDLL.DLL .\simulavr.exe .\cygwin1.dll C:\WINNT\System32\KERNEL32.dll C:\WINNT\System32\NTDLL.DLL simulavr-0.1.2.2/ChangeLog-20030000644000175000001440000005050510203246517012572 000000000000002003-12-03 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c (avr_core_step): Make sure that one instruction is executed after a RETI (return from interrupt). 2003-12-02 Theodore A. Roth * src/avrcore.c (avr_core_check_interrupts): Don't inline since some versions of gcc can't inline this function. 2003-12-02 Theodore A. Roth [Contributed by Keith Gudger ] * configure.ac (AC_INIT): Bump version. * src/devsupp.c (defn_atmega103): Enable adc support. * src/intvects.c (vtab_at43usb355): Fix TIMER1_COMPB irq name. (vtab_at43usb320): Ditto. (vtab_at43usb325): Ditto. 2003-12-02 Theodore A. Roth * src/avrcore.c: * src/decoder.c: * src/decoder.h: * src/device.c: * src/flash.c: * src/flash.h: * src/storage.c: * src/storage.h: * src/vdevs.h: Make some speed critical functions inlined. * src/timers.c (timer0_clk_incr_cb): Eliminate an expensive use of modulus operation. (timer16_clk_incr_cb): Ditto. * src/spi.c: (spi_clk_incr_cb): Ditto. 2003-12-01 Theodore A. Roth * src/devsupp.c: Use .field initialization for device definitions. Clean up after indent and disable it for the device defns. 2003-12-01 Theodore A. Roth * src/gdb.h: * src/gdbserver.c: Rename CommFuncDisableBreakpoints, CommFuncEnableBreakpoints, enable_breakpoints and disable_breakpoints to allow sorter lines. * src/main.c (global_gdb_comm): Use .field initialization. 2003-12-01 Theodore A. Roth * src/adc.c: * src/avrclass.c: * src/avrcore.c: * src/avrerror.c: * src/avrmalloc.c: * src/callback.c: * src/decoder.c: * src/device.c: * src/devsupp.c: * src/display.c: * src/eeprom.c: * src/flash.c: * src/gdbserver.c: * src/intvects.c: * src/main.c: * src/memory.c: * src/op_names.c: * src/ports.c: * src/register.c: * src/sig.c: * src/spi.c: * src/sram.c: * src/stack.c: * src/storage.c: * src/timers.c: * src/utils.c: Reformat with misc/refmt.sh script. Update Copyright year. 2003-12-01 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/adc.h: * src/avrclass.h: * src/avrcore.h: * src/avrerror.h: * src/avrmalloc.h: * src/callback.h: * src/decoder.h: * src/devsupp.h: * src/display.h: * src/eeprom.h: * src/flash.h: * src/gdb.h: * src/intvects.h: * src/memory.h: * src/op_names.h: * src/ports.h: * src/register.h: * src/sig.h: * src/spi.h: * src/sram.h: * src/stack.h: * src/storage.h: * src/timers.h: * src/usb.h: * src/utils.h: * src/vdevs.h: Reformat with misc/refmt.sh script. Update Copyright year. 2003-11-30 Theodore A. Roth * misc/refmt.sh: Ignore newlines instead of honouring them. Set the tab size to 1 to avoid comments to the right of code being pushed farther to the right. Make grepping for typedefs the default behaviour. * src/disp/disp.c: Reformat with misc/refmt.sh script. Wrap long comments. * src/disp-vcd/disp.c: Ditto. * src/disp-vcd/vcd.c: Ditto. 2003-11-30 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c: * src/avrcore.h: * src/decoder.c: * src/register.c: * src/register.h: * src/utils.c: * src/utils.h: Inline simple functions to boost performance a bit. 2003-11-29 Theodore A. Roth [Contributed by John Regehr ] * src/intvects.c: Add enable and flag initializers to all vector tables. Change ANA_COMP to USB_HW for usb devices. * src/intvects.h (struct _IrqCtrlBit): Define. (struct _IntVect): Add enable and flag fields. (struct _IntVectTable): Add USB_HW field. 2003-11-29 Theodore A. Roth * src/main.c: Modify handling of --breakpoint option to allow multiple instances on the command line. 2003-11-29 Theodore A. Roth * src/Makefile.am: Remove vars for dtest. * src/dtest.c: Remove file. 2003-11-29 Theodore A. Roth * configure.ac: Add check for avr-nm. [Contributed by Keith Gudger ] * src/Makefile.am (simulavr_SOURCES): Add adc.c, adc.h, and usb.h. * src/devsupp.c: Add adcsr and uier masks. Install adc vdev. * src/adc.c: New file. * src/adc.h: New file. * src/usb.h: New file. 2003-11-29 Theodore A. Roth * misc/refmt.sh: Add indentation of case labels in switch statements. Let the user select how to get the type info. [Contributed by Keith Gudger ] * src/Makefile.am (simulavr_SOURCES): Add spi.c and spi.h. * src/devsupp.c (struct _DevSuppDefn): Add spcr field. * src/spi.c: New file. * src/spi.h: New file. 2003-11-29 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * README.ext_int: Add some new notes. * misc/gpl_header: Update copyright year. * misc/gpl_header_c: Update copyright year. * misc/gpl_header_h: Update copyright year. * misc/gpl_header_py: Update copyright year. * misc/irq.py: New file. * misc/refmt.sh: New file. * src/avrcore.c: Allow disabling of irq diagnostics at compile time. * test_asm/test_8515/test_toie0.asm: Exit the idle loop when the interrupts are done and then go into a done loop. 2003-11-27 Theodore A. Roth * simulavr.1.in: Document new options. Add new usb support to device list. * doc/simulavr.texi: Document new options. * src/main.c: Reorder usage strings to improve readability. Add stub for --clock-freq option. Add --breakpoint option and implement it. 2003-11-27 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c (avr_core_run): Track the run time and print out the insns/sec and clks/sec when the program is terminated. (avr_core_run) (avr_core_reset): Don't reset the clock counter since doing so screws up the clks/sec calculation and the vcd output. * src/devsupp.c (defn_atmega103): Fix sram size, should be 4000 instead of 4096. 2003-11-22 Theodore A. Roth * configure.ac (AC_INIT): Bump version. If using gcc, enable extra warnings. * src/Makefile.am: * src/disp/Makefile.am: * src/disp-vcd/Makefile.am: Update copyright year. Only add gcc specific warnings if compiling with gcc. 2003-11-17 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/timers.c: Dox cleanups. 2003-11-12 Theodore A. Roth [Thanks to Hermann Krauss for the original patch and Keith Gudger for revising it and testing with the usb devices.] * configure.ac (AC_INIT): Bump version. * src/devsupp.c: * src/timers.c: * src/timers.h: Add support for 16 bit timers 1 and 3. 2003-11-11 Theodore A. Roth * test_c/timer.c: Tweaks to allow compiling for at43usb320. 2003-11-11 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * doc/main.dox: Clean up some doxygen warnings. * src/avrclass.c: Clean up some doxygen warnings. 2003-11-02 Theodore A. Roth * src/gdbserver.c (gdb_parse_packet): When gdb sends the 'D' packet, it actually does expect the "OK" response. That wasn't clear from the gdb documentation. 2003-11-02 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/gdbserver.c: Handle 'D' packets (detach request from gdb). When insight 'disconnects' from the target, it sends a 'D' packet which caused simulavr to generate a fatal error since gdb closed down the connection after sending the packet. 2003-11-01 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/gdb.h: Add irq_raise method. * src/gdbserver.c (gdb_continue_with_signal): If gdb sends a signal number greater than 94 (e.g. 'signal SIG80' sends signal number 94), interpret that as being a request to raise avr interrupt number signal_num-94. * src/main.c (global_gdb_comm): Add irq_raise method. 2003-10-29 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c (avr_core_irq_raise): Display more info about the irq in the output message. 2003-10-20 Theodore A. Roth [Thanks to Keith Gudger ] * src/devsupp.c: * src/intvects.c: Add support for at43USB355, at43USB320, at43USB324, at43USB325, and at43USB326. 2003-10-20 Theodore A. Roth [Thanks to Keith Gudger ] * configure.ac (AC_INIT): Bump version. * src/devsupp.c (dev_supp_create_core): Extend port width to be from 1 to 8 bits. Fix error output to print chars instead of ints. Add support for ports E and F. * src/ports.c (name_PIN): Add "PINE" and "PINF". (name_DDR): Add "DDRE" and "DDRF". (name_PORT): Add "PORTE" and "PORTF". (porte_new, porte_construct, porte_destroy): New functions. (portf_new, portf_construct, portf_destroy): New functions. * src/ports.h: Add support for port widths of 1-6. Add prototypes to support ports E and F. 2003-10-14 Theodore A. Roth * src/avrcore.c (avr_core_construct): Cast irq_vtable structure to an array of IntVect to perform irq indexing. (avr_core_check_interrupts): Change IRQ_RESET to IRQ_RESET_ADDR to avoid subtle confusion of array index versus vector address. * src/intvects.c: * src/intvects.h: Simplify vector table initialization by using a structure for the interrupt vector table instead of an array. Define irq_vect_table_index() macro for calculating indices. Define IRQ_RESET_ADDR. * src/register.c (wdtcr_timer_cb): Use irq_vect_table_index() instead of enum value. * src/timers.c (timer_intr_cb): Ditto. 2003-10-14 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c (avr_core_irq_raise): Print out a message when raising an interrupt. (avr_core_check_interrupts): Print out a message when vectoring into the interrupt table. 2003-10-03 Theodore A. Roth * src/avrcore.c (avr_core_run): Add note to comment about keeping functionality out of the avr_core_run function and todo item about adding rudimentary breakpoint handling to the loop. 2003-09-29 Theodore A. Roth * src/devsupp.c: * src/intvects.c: Revert previous patch. It didn't even compile (my fault for not checking that before committing it), so I am assuming that it is not tested and sending it back to the submitter. 2003-09-26 Theodore A. Roth [Contributed by Keith Gudger ] * src/devsupp.c: * src/intvects.c: Add support for at43USB355, at43USB320, at43USB324, at43USB325, and at43USB326. 2003-09-26 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * doc/Makefile.am (EXTRA_DIST): Add main.dox. * doc/doxygen.config.in (INPUT): Add @top_srcdir@/doc to search path. (FILE_PATTERNS): Add *.dox pattern. * doc/main.dox: Rename of src/maindoc.c. * src/Makefile.am (EXTRA_DIST): Remove. * src/maindoc.c: Rename to doc/main.dox. 2003-09-19 Theodore A. Roth * README.cygwin: Change CFLAGS to LDFLAGS in configure example. 2003-09-19 Theodore A. Roth * configure.ac (AC_INIT): Bump version. Add AC_CANONICAL_BUILD, AC_CANONICAL_HOST and AC_CANONICAL_TARGET. * Makefile.am (EXTRA_DIST): Add README.cygwin. * README.gdb: Remove references to gdb patches directory. [Contributed by Eric Weddingtion ] * README.cygwin: New file. 2003-09-15 Theodore A. Roth * configure.ac (AC_INIT): Bump version. (AC_CONFIG_FILES): Untabify src/getopt/Makefile line. 2003-09-12 Theodore A. Roth * configure.ac (AC_INIT): Bump version. * src/avrcore.c: Hide struct bp_enable_data from doxygen. * src/callback.c: Hide struct _CallBack from doxygen. * src/devsupp.c: Hide struct _DevSuppDefn from doxygen. 2003-09-12 Theodore A. Roth * configure.ac: Remove typedefs for byte, word, dword, qword, sbyte, sword, sdword, and sqword. * src/avrcore.c: Replace byte with uint8_t. Replace word with uint16_t. Replace dword with uint32_t. Replace qword with uint64_t. Replace sbyte with int8_t. Replace sword with int16_t. Replace sdword with int32_t. Replace sqword with int64_t. * src/avrcore.h: Ditto. * src/callback.c: Ditto. * src/callback.h: Ditto. * src/decoder.c: Ditto. * src/decoder.h: Ditto. * src/device.c: Ditto. * src/devsupp.c: Ditto. * src/display.c: Ditto. * src/display.h: Ditto. * src/eeprom.c: Ditto. * src/eeprom.h: Ditto. * src/flash.c: Ditto. * src/flash.h: Ditto. * src/gdb.h: Ditto. * src/gdbserver.c: Ditto. * src/intvects.h: Ditto. * src/main.c: Ditto. * src/memory.c: Ditto. * src/memory.h: Ditto. * src/ports.c: Ditto. * src/ports.h: Ditto. * src/register.c: Ditto. * src/register.h: Ditto. * src/sram.c: Ditto. * src/stack.c: Ditto. * src/stack.h: Ditto. * src/storage.c: Ditto. * src/storage.h: Ditto. * src/timers.c: Ditto. * src/timers.h: Ditto. * src/utils.c: Ditto. * src/utils.h: Ditto. * src/vdevs.h: Ditto. 2003-09-09 Theodore A. Roth [Contributed by Hermann Kraus ] * test_c/Makefile.am: Update copyright year. Add timer program. Add common.h to all SOURCES variables. * test_c/common.h: New file. * test_c/deep_frame.c: Use common.h. Use 'sfr = val' idiom instead of sbi function. * test_c/demo.c: Ditto. * test_c/demo_kr.c: Ditto. * test_c/timer.c: New file. 2003-09-09 Theodore A. Roth [Contributed by Hermann Kraus ] * configure.ac (AC_INIT): Bump version. * src/callback.c (callback_construct): Check data pointer before passing to class_ref. (callback_destroy): Check data pointer before passing to class_unref. 2003-08-29 Theodore A. Roth [Thanks to Hermann Kraus ] * configure.ac (AC_INIT): Bump version. * simulavr.1.in: Remove '=' from option descriptions since it is confusing people. * src/main.c: Diddo. * doc/simulavr.texi: Diddo. Update savannah references. Remove notes about needing to patch gdb for avr. 2003-08-27 Theodore A. Roth * configure.ac (AC_INIT): Bump version. Add missing call to CHECK_DOXYGEN. * simulavr.spec.in: Fix broken rpmbuild on RedHat-9. 2003-08-26 Theodore A. Roth * configure.ac (AC_INIT): Bump version. (AC_CHECK_HEADERS): Remove check for libintl.h so it doesn't get used in gnu_getopt.c. * src/getopt/gnu_getopt.c: Don't allow _ to be defined to gettext(). 2003-08-18 Theodore A. Roth * simulavr.1.in: Add version to output. Add mega8 and mega16 to supported list. * src/gdbserver.c: Shorten up some long lines. 2003-08-18 Theodore A. Roth * configure.ac: Bump version. * src/gdbserver.c (gdb_interact): Set addrLength correctly so source IP addresses are reported correctly. 2003-08-13 Theodore A. Roth * Makefile.am: Rename @DOC_INST_DIR@ to @ac_doc_inst_dir@. * configure.ac: Bump version. Remove --with-docdir option. Re-instate --enable-versioned-doc option and set ac_doc_inst_dir relative to $(datadir). * doc/Makefile.am: Rename @DOC_INST_DIR@ to @ac_doc_inst_dir@. * test_asm/test_8515/Makefile.am: Add clean-local rule to make sure final binaries are removed. 2003-08-13 Theodore A. Roth * src/device.c: Update copyright year. 2003-08-13 Theodore A. Roth [Thanks to Hermann Kraus ] * doc/simulavr.texi: Fix 'target remote' note. * src/avrcore.c: Wrap some line lines. Document all functions via doxygen. * src/device.c: Document all functions via doxygen. 2003-08-12 Theodore A. Roth * Makefile.am: Remove AUX_DIST and AUX_DIST_EXTRA vars. Remove refs to acconfig.h and config/. * configure.ac: Add check for RANLIB. Add src/getopt/Makefile to output. * src/Makefile.am: Add getopt subdir. (AM_CFLAGS): Add src/getopt via -I. (simulavr_LDADD): Define. (simulavr_SOURCES): Remove gnu_getopt* sources. * src/disp/Makefile.am: Link to ../getopt/libgnugetopt.a. * src/disp-vcd/Makefile.am: Link to ../getopt/libgnugetopt.a. * src/getopt/Makefile.am: New file to build ../getopt/libgnugetopt.a. * src/gnu_getopt.c, src/getopt/gnu_getopt.c: Move gnu_getopt.c into src/getopt subdir. * src/gnu_getopt.h, src/getopt/gnu_getopt.h: Move gnu_getopt.h into src/getopt subdir. * src/gnu_getopt1.c, src/getopt/gnu_getopt1.c: Move gnu_getopt1.c into src/getopt subdir. 2003-08-12 Theodore A. Roth * Makefile.am: Convert to use autoconf-2.57 and automake-1.7.x. * bootstrap: Convert to use autoconf-2.57 and automake-1.7.x. * configure.ac: New file. * acconfig.h: Remove file. * configure.in: Remove file. * config/avr_binutils.m4: Remove file. * config/avr_cc.m4: Remove file. * config/avr_doc_dirsuffix.m4: Remove file. * config/avr_doc_pdf.m4: Remove file. * config/avr_doc_ps.m4: Remove file. * config/avr_libc_headers.m4: Remove file. * config/check_autoconf213.m4: Remove file. * config/check_doxygen.m4: Remove file. * config/check_gnu_make.m4: Remove file. * config/check_python.m4: Remove file. * config/check_texinfo.m4: Remove file. * config/enable_curses.m4: Remove file. * config/enable_tests.m4: Remove file. * config/type_socklen_t.m4: Remove file. 2003-08-12 Theodore A. Roth * simulavr.1.in: Update bug report email address. 2003-08-12 Theodore A. Roth * configure.in: Add more checks as found by autoscan. 2003-08-08 Theodore A. Roth * src/gnu_getopt.h: Define HAVE_DECL_GETOPT to fix declaration clash. 2003-08-08 Theodore A. Roth [Contributed by Tuukka Pasanen] * src/devsupp.c: * src/intvects.c: Add basic support for mega8. 2003-08-01 Theodore A. Roth * acconfig.h: Handle missing socklen_t type. 2003-08-01 Theodore A. Roth * configure.in: Bump version. Add check to socklen_t. * config/type_socklen_t.m4: New file. 2003-07-24 Theodore A. Roth * AUTHORS: * ChangeLog: * config/avr_binutils.m4: * config/avr_cc.m4: * config/avr_libc_headers.m4: * config/check_doxygen.m4: * config/check_gnu_make.m4: * config/check_python.m4: * config/check_texinfo.m4: * config/enable_curses.m4: * config/enable_tests.m4: Update my email address. 2003-07-02 Theodore A. Roth * configure.in: Bump version. * src/main.c: Update copyright year for --version output. 2003-06-20 Theodore A. Roth * configure.in: Bump version. 2003-06-20 Theodore A. Roth * gdb-patches/README: Remove file. * simulavr.spec.in: Bump avr-gdb requirement to 5.3. * src/avrcore.c: * src/avrcore.h: * src/gdb.h: * src/main.c: Add enable_breakpoints and disable breakpoints methods. * src/gdbserver.c: Ditto. Disable breakpoints when a break point is hit. This restores the insn which was previously replaced with a BREAK insn if the break point was set by gdb. This was needed to get the sim to send the correct insn back to gdb instead of the BREAK insn. 2003-06-20 Theodore A. Roth * src/gdbserver.c: Fix a bug in handled of 'P' packets causing PC to be truncated. 2003-06-20 Theodore A. Roth * src/gdbserver.c: Update copyright year. If-def out use of EEPROM space since gdb handle it. 2003-04-06 Theodore A. Roth [Thanks to Hermann Kraus ] * src/devsupp.c: * src/intvects.c: Added support for the ATMega16 device 2003-04-04 Theodore A. Roth * src/avrcore.c: * src/decoder.c: * src/decoder.h: Speed up the opcode handlers by calculating the argument values at init time and passing them to the handler when it is called. My tests show this to be a 1.5 to 3.5 % increase. 2003-04-04 Theodore A. Roth * configure.in: Bump version. * src/disp/disp.c: Include termios.h to get winsize decl on cygwin. [Thanks to Slawomir Kawalek ]. 2003-03-25 Theodore A. Roth * regress/regress.py.in: Fix --sim option to take an argument. 2003-03-04 Theodore A. Roth * src/avrcore.c: * src/gdb.h: * src/gdbserver.c: * src/main.c: Implement the io_fetch method for the gdbserver interface. 2003-02-22 Theodore A. Roth * doc/simulavr.texi: Fix gdb configure target argument. simulavr-0.1.2.2/ChangeLog-20020000644000175000001440000007062010203246516012570 000000000000002002-11-16 Theodore A. Roth * configure.in: Bump version. * src/disp-vcd/config_parser.y: Reformat code. * src/disp-vcd/config_scanner.l: Reformat code. * src/disp-vcd/disp.c: Reformat code. Remove dead code. * src/disp-vcd/vcd.c: Reformat code. * src/disp-vcd/vcd.h: #define VCD_H. 2002-11-15 Theodore A. Roth * configure.in: Add checks for yacc and lex. Add creation of src/disp-vcd/Makefile. * src/Makefile.am: Add disp-vcd subdir. * src/disp-vcd/Makefile.am: New file. Thanks to Carsten Beth for contributing the following files: * src/disp-vcd/config_parser.y: New file. * src/disp-vcd/config_scanner.l: New file. * src/disp-vcd/disp.c: New file. * src/disp-vcd/vcd.c: New file. * src/disp-vcd/vcd.cfg: New file. * src/disp-vcd/vcd.h: New file. 2002-11-13 Theodore A. Roth [Thanks to Carsten Beth for the display_clock code.] * configure.in: Bump version. * doc/simulavr.texi: Add clock ticks to display protocol. * src/avrcore.c: Add code for displaying clock ticks. Fix some minor typos. * src/display.c: Add display_clock() function. * src/display.h: Add display_clock() prototype. * src/flash.c: Fix a comment typo. 2002-10-28 Theodore A. Roth * configure.in: Check for autoconf-2.13. Bump version. * config/check_autoconf213.m4: New file. 2002-10-20 Theodore A. Roth * configure.in: Bump version. * bootstrap: Make compatible with RedHat-8.0 autotools. 2002-10-15 Theodore A. Roth * src/avrcore.c: Add real simulation of rampz register. * src/avrcore.h: Ditto. * src/decoder.c: Ditto. * src/register.c: Ditto. * src/register.h: Ditto. 2002-10-15 Theodore A. Roth * src/avrcore.c src/avrcore.h src/decoder.c * src/gdb.h * src/gdbserver.c src/op_names.c src/op_names.h: Add BREAK insn handling to decoder. Refactor break point mechanism to use the BREAK instruction. Remove some dead code. Remove INVALID_VALID opcode usage. Streamlining of opcode execution loop. * configure.in: Bump version. 2002-10-12 Theodore A. Roth * src/gdb.h: Define BREAK_POINT and INVALID_OPCODE. Use sdword instead of dword in CommFunc*PC typedefs. * src/gdbserver.c: Remove BREAK_POINT and INVALID_OPCODE enum entries. (gdb_write_memory): Reply to gdb with error if target can't write flash. * src/op_names.h: Define BREAK_POINT and INVALID_OPCODE instead of enums. 2002-10-12 Theodore A. Roth * Makefile.am: Add man pages. * configure.in: Add man pages. Bump version. * simulavr-disp.1.in: New file (Thanks to Shaun Jackman). * simulavr.1.in: New file (Thanks to Shaun Jackman). * simulavr.spec.in: Add man pages. 2002-10-12 Theodore A. Roth * src/main.c: Print usage to stdout instead of stderr. 2002-10-08 Theodore A. Roth * src/avrcore.c: Make core PC access methods use signed 32 bit values. * src/avrcore.h: Ditto. 2002-10-08 Theodore A. Roth * config/avr_doc_pdf.m4: Use '=' instead of '==' in tests. * config/avr_doc_ps.m4: Ditto. * config/enable_curses.m4: Ditto. 2002-09-30 Theodore A. Roth * src/avrcore.c, src/eeprom.c, src/eeprom.h, src/main.c: Add ability to load an eeprom data image into eeprom space. 2002-09-20 Theodore A. Roth * src/avrcore.h: Change PC values to signed (fix rjmp wrap problem). 2002-09-19 Theodore A. Roth * doc/simulavr.texi: Document -X and -C options. Overfill fixups. * src/main.c: Add -C option so core dumps are only generated at users request. 2002-09-15 Theodore A. Roth * src/Makefile.am src/disp/Makefile.am: Add -Wall and -Werror to AM_CFLAGS. * src/avrcore.c, src/ports.c, src/disp/disp.c: Quell warnings. 2002-09-15 Theodore A. Roth * src/avrcore.c, src/decoder.c, src/op_names.h: Handle unknown opcodes as NOP's. 2002-09-11 Theodore A. Roth * src/gdb.h, src/gdbserver.c, src/main.c: Make gdbserver.c generic so it can be used by other projects. 2002-09-09 Theodore A. Roth * Tagged for 0.1.1 release. * configure.in: Set version to 0.1.1. 2002-09-09 Theodore A. Roth * doc/simulavr.texi: Add note about use of :1212 instead of localhost:1212. 2002-09-08 Theodore A. Roth * src/display.c: Remove display debug output. (speeds things up) 2002-09-08 Joerg Wunsch * src/disp/disp.c: Stop cursor flicker on screen updates. 2002-09-06 Theodore A. Roth * src/disp/disp.c: Indent switch statement. 2002-09-06 Theodore A. Roth * src/disp/disp.c: Finish implementing the 'g' command. 2002-09-06 Theodore A. Roth * src/disp/disp.c: Add floating point register display. 2002-09-05 Joerg Wunsch * src/disp/disp.c: Speed up disp by only refreshing when idle. 2002-09-05 Theodore A. Roth * src/gdbserver.c: Reorder some includes to stop errors on FreeBSD. 2002-09-05 Theodore A. Roth * configure.in: Bump version to 0.1.1pre1. * simulavr.spec.in: Require avr-gdb >= 5.2.1. Disable pdf dox (temp). * test_c/deep_frame.c: Update to use latest avr-libc headers. * test_c/demo.c: Update to use latest avr-libc headers. * test_c/demo_kr.c: Update to use latest avr-libc headers. 2002-09-05 Theodore A. Roth * bootstrap: Improve checks for correct autotools. (Joerg Wunsch) * Makefile.am, configure.in, doc/Makefile.am: Allow installation of docs into a directory without the version number. (Joerg Wunsch) 2002-09-05 Theodore A. Roth * src/disp/Makefile.am: Use supplied gnu_getopt.c/gnu_getopt1.c. * src/disp/disp.c: Include gnu_getopt.h instead of getopt.h. 2002-09-04 Theodore A. Roth * doc/simulavr.texi, src/avrcore.c, src/avrcore.h, src/display.c, * src/display.h, src/dtest.c, src/main.c, src/sram.c, src/sram.h, * src/storage.c, src/storage.h, src/disp/disp.c: Change way disp co-process is called to include sram start addr. New keyboard movement commands for simulavr-disp: - Home key jumps to addr 0x00. - End key jumps to last sram addr. - Page Up key moves cursor up a screen of data. - Page Down key moves cursor down a screen of data. - 'g' key will allow user to jump (goto) an addr (not fully implemented, but stubbed out). 2002-09-04 Theodore A. Roth * doc/Makefile.am: s/make -C/${MAKE} -C/ for portability. * doc/doxygen.config.in: Set USE_PDFLATEX to no. 2002-09-02 Theodore A. Roth * doc/simulavr.texi: Add note about avr support in gdb-5.2.1. 2002-08-28 Theodore A. Roth * src/ports.c: Fix bug when reading io ports. 2002-08-28 Theodore A. Roth * src/devsupp.c, src/intvects.c, src/sram.h: Add mega103 support. * src/decoder.c: Comment out warning message in avr_op_ELPM_Z_incr(). 2002-08-27 Theodore A. Roth * configure.in: Add AVR_DOC_PS. * config/avr_doc_ps.m4: New file. * config/check_doxygen.m4: Inherit from AVR_DOC_P{S,DF}. * doc/Makefile.am(all-local): ps -> $(TARGET_PS) 2002-08-09 Theodore A. Roth * bootstrap: Check for correct versions of automake/autoconf. 2002-08-02 Theodore A. Roth * src/gdbserver.c: Fix to stop gdb_write_register() from parsing to many characters when setting PC. 2002-07-31 Theodore A. Roth * src/gdbserver.c: Fix 'P' and 'p' packets to write/read PC as 4 bytes. 2002-07-19 Theodore A. Roth * src/intvects.c: Fix interrupt vector addresses for mega128. 2002-07-16 Theodore A. Roth * src/avrcore.c, src/avrcore.h, src/decoder.c, src/devsupp.c, src/disp/disp.c, src/intvects.c, src/intvects.h, src/sram.h, src/utils.c, src/utils.h: Refactored interrupt internals to improve flexibility. Added minimal mega128 support. * doc/doxygen.config.in: Config tweaks. 2002-07-10 Theodore A. Roth * src/decoder.c: Fixed bug in elpm opcodes. 2002-06-08 Theodore A. Roth * src/decoder.c: Fix fmul* opcodes. Thanks to Jeff Mock. 2002-05-27 Theodore A. Roth * src/display.c, src/display.h, src/dtest.c, src/main.c: Added -X, --without-xterm command line options. * src/register.c: Fix copy and paste error. D'oh! 2002-05-26 Theodore A. Roth * Makefile.am: Add removal of CVS control dirs from distribution. * src/register.c: Fix bug in which mcucr and acsr constructors didn't init func_mask. 2002-04-29 Theodore A. Roth * src/avrcore.c: Fixed typo in comment. 2002-04-18 Theodore A. Roth * README.ext_int: Added temp file for working out external interface design. * doc/simulavr.texi: Send bug reports to simulavr development mailing list instead of me. Updated gdb hints section. 2002-04-17 Theodore A. Roth * src/device.c, src/devsupp.c, src/devsupp.h, src/disp/Makefile.am, src/disp/disp.c, src/display.h, src/dtest.c, src/eeprom.c, src/flash.c, src/gdb.h, src/gnu_getopt.c, src/gnu_getopt.h, src/gnu_getopt1.c, src/intvects.c, src/memory.c, src/op_names.c, src/ports.c, src/register.c, src/sig.c, src/sig.h, src/sram.c, src/stack.c, src/storage.c, src/timers.c, src/utils.c, src/vdevs.h, test_asm/Makefile.am, test_asm/test_8515/Makefile.am, test_c/Makefile.am, test_c/demo_kr.c, Makefile.am, Makefile_AVR_Rules, acconfig.h, doc/Makefile.am, src/Makefile.am, src/avrclass.c, src/avrcore.c, src/avrcore.h, src/avrerror.c, src/avrmalloc.c, src/decoder.c: Updated copyright year. * doc/simulavr.texi: Removed unused indices. Updated copyright year. 2002-04-15 Theodore A. Roth * Released 0.1.0 ("The Tax Man Commeth" release ;-). * configure.in: Bumped version to 0.1.0. 2002-04-12 Theodore A. Roth * INSTALL, README, TODO, regress/test_opcodes/TODO: Minor documentation cleanups. * simulavr.spec.in: Added avr-gdb >= 5.1.90 as a install requirement. Added doxygen as a build requirement. 2002-04-11 Theodore A. Roth * README.gdb, gdb-patches/README, regress/modules/gdb_rsp.py, src/gdbserver.c: Changed size of PC as passed to and from gdb from 2 to 4 bytes to sync up with new gdb behaviour. * src/avrcore.c, src/avrcore.h: Changed PC from int to dword to avoid potential problems with truncation. * gdb-patches/patcher.sh, gdb-patches/get_gdb_patches.sh: Removed obsolete files. 2002-04-05 Theodore A. Roth * configure.in: Bumped version to 0.1.0pre. * doc/simulavr.texi: Moved Internals chapter to doxygen. * src/maindoc.c: Moved Internals documentation from texinfo file to here. * src/Makefile.am: Added maindoc.c to EXTRA_DIST list. * src/main.c: Updated copyright year. * regress/modules/base_test.py, regress/test_opcodes/Makefile.am: * regress/test_opcodes/TODO, regress/test_opcodes/test_CPSE.py: * regress/test_opcodes/test_LPM.py: * regress/test_opcodes/test_LPM_Z.py: * regress/test_opcodes/test_LPM_Z_incr.py: * regress/test_opcodes/test_SBRC.py: * regress/test_opcodes/test_SBRS.py: Added more regression test cases. * src/decoder.c: Removed another check for undefined op which is defined. Fixed LPM_Z_incr where Z should not be div 2. 2002-04-04 Theodore A. Roth * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO: * regress/test_opcodes/test_STD_Y.py: * regress/test_opcodes/test_STD_Z.py: * regress/test_opcodes/test_ST_X.py: * regress/test_opcodes/test_ST_X_decr.py: * regress/test_opcodes/test_ST_X_incr.py: * regress/test_opcodes/test_ST_Y_decr.py: * regress/test_opcodes/test_ST_Y_incr.py: * regress/test_opcodes/test_ST_Z_decr.py: * regress/test_opcodes/test_ST_Z_incr.py: Added more regression test cases. * src/decoder.c: Removed some invalid error checks (operations are not undefined). * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO: * regress/test_opcodes/test_LDD_Y.py: * regress/test_opcodes/test_LDD_Z.py: * regress/test_opcodes/test_LD_X.py: * regress/test_opcodes/test_LD_X_decr.py: * regress/test_opcodes/test_LD_X_incr.py: * regress/test_opcodes/test_LD_Y_decr.py: * regress/test_opcodes/test_LD_Y_incr.py: * regress/test_opcodes/test_LD_Z_decr.py: * regress/test_opcodes/test_LD_Z_incr.py: Added more regression tests. * src/decoder.c: Make X, Y and Z registers words instead of ints. 2002-04-03 Theodore A. Roth * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO: * regress/test_opcodes/test_LDS.py: * regress/test_opcodes/test_STS.py: Added new test cases. * regress/modules/base_test.py: Added mem_byte_{read,write}() methods for accessing memory. 2002-04-02 Theodore A. Roth * regress/modules/base_test.py, regress/test_opcodes/Makefile.am: * regress/test_opcodes/TODO, regress/test_opcodes/test_MUL.py * regress/test_opcodes/test_MULS.py: * regress/test_opcodes/test_MULSU.py: * regress/test_opcodes/test_RET.py: * regress/test_opcodes/test_RETI.py: Added more opcode tests (thanks Josef Angermeier). * src/decoder.c: Untabified file (probably shouldn't have though). Fixed some bugs in avr_op_{MUL,MULS,MULSU}() (thanks Josef Angermeier). Fixed bug in which MULSU instruction wasn't decoded correctly. * acconfig.h: Added signed versions of byte, word, dword and qword. * AUTHORS: Added Josef Angermeier to contributors. 2002-04-01 Theodore A. Roth * src/disp/disp.c: Fixed bug in which io reg names were lost if window was resized. * src/gdbserver.c: Disabled attempt to catch zero pointer dereferencing since it's not working right. 2002-03-26 Theodore A. Roth * src/stack.c: Updated comments about push/pop. Fixed bug in which display_io_reg() was called twice. * src/display.c: Catch interrupted write to make sure co-process can be told to quit. 2002-03-24 Theodore A. Roth * src/avrclass.c, src/avrcore.c, src/ports.c: More documentation updates. 2002-03-19 Theodore A. Roth * src/timers.c, src/utils.c, src/avrcore.c, src/devsupp.c, src/flash.c, src/memory.c, src/ports.c, src/sig.c, src/stack.c: More conversion of comments to doxygen documentation. * AUTHORS: Updated. 2002-03-18 Theodore A. Roth * misc/gpl_header_h, src/avrclass.h, src/avrcore.h, src/avrerror.h, src/avrmalloc.h, src/callback.h, src/decoder.h, src/devsupp.h, src/display.h, src/eeprom.h, src/flash.h, src/gdb.h, src/intvects.h, src/memory.h, src/op_names.h, src/ports.h, src/register.h, src/sig.h, src/sram.h, src/stack.h, src/storage.h, src/timers.h, src/utils.h, src/vdevs.h: Changed all header protection defines to SIM_xxxx_H to avoid cpp clashes. 2002-02-26 Theodore A. Roth * doc/simulavr.texi: Make info dir entry consistent with other avr tool entries. * Makefile.am, src/Makefile.am: Use DIST_SUBDIRS to put files is dist tarball which are conditionally set. 2002-02-25 Theodore A. Roth * src/display.c, src/sig.c, src/sig.h: Include signal.h in *.c not *.h. 2002-02-24 Theodore A. Roth * src/callback.c: New file. * configure.in: Changed init to use avrcore.h instead of avr.h. * acconfig.h, src/Makefile.am, src/avr.h, src/avrclass.c, src/avrclass.h, src/avrcore.c, src/avrcore.h, src/avrerror.c, src/callback.h, src/decoder.c, src/decoder.h, src/device.c, src/devsupp.c, src/devsupp.h, src/display.c, src/dtest.c, src/eeprom.c, src/eeprom.h, src/flash.c, src/flash.h, src/gdbserver.c, src/intvects.c, src/intvects.h, src/main.c, src/memory.c, src/memory.h, src/op_names.c, src/op_names.h, src/ports.c, src/ports.h, src/register.c, src/register.h, src/sig.c, src/sram.c, src/sram.h, src/stack.c, src/stack.h, src/storage.c, src/storage.h, src/timers.c, src/timers.h, src/utils.c, src/utils.h, src/vdevs.h: Header file reorganization. * doc/doxygen.config.in: Added DOXYGEN to PREDEFINED. Set ENUM_VALUES_PER_LINE to 1. 2002-02-23 Theodore A. Roth * src/Makefile.am: Added avrerror.h and avrmalloc.h. * src/avr.h, src/vdevs.h: Moved _VDevice and methods from avr.h to vdevs.h. * src/avr.h, src/avrmalloc.c, src/avrmalloc.h, src/avrerror.c: * src/avrerror.h: Header file cleanup and documentation update. * doc/doxygen.config.in: Added MACRO_DOCUMENTATION for precompiler parser. * regress/test_opcodes/test_INC.py: Fixed bug in calculation of expect V flag. * regress/test_opcodes/test_ADC.py, regress/test_opcodes/test_ADD.py, regress/test_opcodes/test_ADIW.py, regress/test_opcodes/test_AND.py, regress/test_opcodes/test_ANDI.py, regress/test_opcodes/test_CPI.py, regress/test_opcodes/test_DEC.py, regress/test_opcodes/test_INC.py, regress/test_opcodes/test_NEG.py, regress/test_opcodes/test_SBC.py, regress/test_opcodes/test_SBIW.py: Fixed a few minor problems. Added more test values to make sure all sreg bits are exercised. * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO, regress/test_opcodes/test_DEC.py, regress/test_opcodes/test_EOR.py, regress/test_opcodes/test_INC.py, regress/test_opcodes/test_LDI.py, regress/test_opcodes/test_LSR.py, regress/test_opcodes/test_NEG.py, regress/test_opcodes/test_OR.py, regress/test_opcodes/test_ORI.py, regress/test_opcodes/test_RJMP.py, regress/test_opcodes/test_ROR.py, regress/test_opcodes/test_SBC.py, regress/test_opcodes/test_SBCI.py, regress/test_opcodes/test_SBIW.py, regress/test_opcodes/test_SUB.py, regress/test_opcodes/test_SUBI.py: Added new test cases. * regress/test_opcodes/test_ASR.py: Made expect value calculation more explicit. 2002-02-22 Theodore A. Roth * regress/regress.py.in: Change to insure that simulator is killed. * regress/test_opcodes/test_COM.py: Added missing underscore. * src/decoder.c: Fixed bug in avr_op_NEG: H flag wasn't set correctly. * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO, regress/test_opcodes/test_COM.py, regress/test_opcodes/test_CP.py, regress/test_opcodes/test_CPC.py, regress/test_opcodes/test_CPI.py: Added new test cases. 2002-02-21 Theodore A. Roth * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO, regress/test_opcodes/test_ADIW.py, regress/test_opcodes/test_AND.py, regress/test_opcodes/test_ANDI.py, regress/test_opcodes/test_ASR.py: Added new test cases. 2002-02-20 Theodore A. Roth * regress/regress.py.in: Changed test case message. * regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO, regress/test_opcodes/test_ADC.py, regress/test_opcodes/test_ADD.py, regress/test_opcodes/test_MOV.py, regress/test_opcodes/test_MOVW.py: Added new test cases. * regress/modules/base_test.py, regress/test_opcodes/Makefile.am, regress/test_opcodes/test_BCLR.py, regress/test_opcodes/test_BLD.py, regress/test_opcodes/test_BRBC.py, regress/test_opcodes/test_BRBS.py, regress/test_opcodes/test_BSET.py, regress/test_opcodes/test_BST.py, regress/test_opcodes/test_NOP.py, regress/test_opcodes/test_SWAP.py: Simplified test cases by moving target access and repeated checks into base_test.py. * regress/test_opcodes/TODO: Fix cvs Id tag. 2002-02-19 Theodore A. Roth * TODO, INSTALL: Updated regression test suite information. * regress/Makefile.am: Tee regression output to a file. * regress/regress.py.in: Added code to automate spawning an instance of the simulator. * regress/regress.py.in: Reverted threading. With latest change to gdbserver.c, it's faster to run regression tests from a single thread. * src/gdbserver.c: Fix a problem in which latest cvs gdb would timeout in mid-packet. As a side effect, gdb-to-simulavr communication is faster. 2002-02-16 Theodore A. Roth * src/gdbserver.c: Fixed incorrect removal of addr offset bits. Stubbed out read/write of eeprom space from gdb (`x/b 0x81xxxx`). 2002-02-15 Theodore A. Roth * doc/doxygen.config.in: Turn on html tree view. 2002-02-13 Theodore A. Roth * src/Makefile.am, src/gdb.c: Removed src/gdb.c. Old and in the way. * src/gdbserver.c: Renamed gdb_extract_reg_num() to gdb_extract_hex_num() and made it more general. Code cleanups. Made output for -G more consistent. * src/gdbserver.c: Tell TCP not to delay small packets, this speeds up response. * src/main.c: Issue a warning if user selects unimplemented file format. * src/utils.c: Fix so '-F bin' option works. 2002-02-12 Theodore A. Roth * Released 0.0.14 * INSTALL, README, README.gdb, doc/simulavr.texi, gdb-patches/README, regress/README: Documentation updates. * configure.in: Set version to 0.0.14. * regress/regress.py.in: Fixed a typo. * regress/regress.py.in: Added threading to speed up running test cases. Added command line option parser. * regress/modules/gdb_rsp.py: Fix to only ever recv 1 byte at a time. Threading was causing recv(2) to only return a single byte. Added arguments when raising exceptions. * src/gdbserver.c: Added missing cksum output if debug is on. 2002-02-11 Theodore A. Roth * Makefile.am, simulavr.spec.in: Fix to keep regress in SUBDIRS if python not found. Sync up what is installed in docdir. 2002-02-10 Theodore A. Roth * Makefile.am: Fix to get spec file into dist file. * simulavr.spec.in: Moved documentation into simulavr-docs subpackage. * config/check_doxygen.m4: Removed unused AC_SUBST(). * Makefile.am, configure.in, doc/Makefile.am: Remove --with-docdir configure option, install docs relative to datadir instead. * doc/Makefile.am: Added EXTRA_DIST files. * TODO, config/check_doxygen.m4, configure.in, doc/Makefile.am: Integration of doxygen into build system. * doc/doxygen.config.in: Added custom html files. Changed directory structure. Added LaTeX output to get ps/pdf files. * doc/dox.css, doc/dox_html_footer, doc/dox_html_header: Added customized html files. * src/display.c: Fixed doxygen comment. * doc/texinfo.tex: Added to avoid using broken texinfo.tex files for pdf generation. 2002-02-08 Theodore A. Roth * src/avrcore.c, src/device.c, src/flash.c, src/memory.c, src/ports.c, src/register.c, src/stack.c, src/utils.c: Removed inline modifiers. Better to let the compiler do it. * src/gdb.h, src/gdbserver.c, src/main.c: Added command line option to turn gdb debug messages on (off by default). * simulavr.spec.in: Added optimization flags. * INSTALL: Added notes on optimizing and regression tests. * Makefile.am, configure.in, simulavr.spec.in: Added rpm spec file. * doc/simulavr.texi: Added dir.info fragment. Updated description. * src/disp/Makefile.am: Changed disp program name to simulavr-disp. * ProjSummary: Changed URL. 2002-02-05 Theodore A. Roth * config/avr_doc_pdf.m4: Corrected grammar. * regress/test_opcodes/TODO, regress/test_opcodes/test_BST.py, regress/test_opcodes/Makefile.am: Added test case for BST. * regress/test_opcodes/TODO, regress/test_opcodes/test_BLD.py, regress/test_opcodes/Makefile.am: Added test case for BLD. * regress/modules/registers.py: Added SREG class for naming sreg bits. * src/decoder.c: Fixed bug in avr_op_BLD. * Makefile.am, config/check_python.m4, configure.in, misc/gpl_header_py, regress/Makefile.am, regress/README, regress/modules/Makefile.am, regress/modules/avr_target.py, regress/modules/base_test.py, regress/modules/gdb_rsp.py, regress/modules/registers.py, regress/regress.py.in, regress/test_opcodes/Makefile.am, regress/test_opcodes/TODO, regress/test_opcodes/test_BCLR.py, regress/test_opcodes/test_BRBC.py, regress/test_opcodes/test_BRBS.py, regress/test_opcodes/test_BSET.py, regress/test_opcodes/test_NOP.py, regress/test_opcodes/test_SWAP.py: Added regression test framework. 2002-02-02 Theodore A. Roth * src/gdbserver.c: Send 'E' reply when gdb tries to read/write memory in reg range. 2002-01-31 Theodore A. Roth * src/avr.h, src/avrcore.c, src/decoder.c: Speed optimization for decoder by using a lookup table. * src/gdbserver.c: Perform a reset when gdb sends the kill command. * src/decoder.c: Fixed some comments. 2002-01-29 Theodore A. Roth * src/gdbserver.c: Fixed read/write of PC reg with 'P' and 'p' packets. 2002-01-26 Theodore A. Roth * src/gdbserver.c: Added support for 'P' and 'p' packets. * src/avrclass.c: Converted comments to doxygen format. 2002-01-25 Theodore A. Roth * src/Makefile.am, src/gnu_getopt.c, src/gnu_getopt.h, src/gnu_getopt1.c, src/main.c: Added gnu getopt files to improve portability of getopt_long. 2002-01-24 Theodore A. Roth * src/gdbserver.c: Fix to allow interruption of stepping on infinite loop. 2002-01-09 Theodore A. Roth * Released 0.0.13 * configure.in: Updated copyright date and set version to 0.0.13. * config/check_texinfo.m4: Added more program checks. 2002-01-08 Theodore A. Roth * ChangeLog: Updated. * doc/doxygen.config.in: Set BRIEF_MEMBER_DESC to NO. * src/display.c, src/gdbserver.c: Updated comments for doxygen. * Makefile.am, config/check_texinfo.m4, configure.in: Added check for texinfo: if not found, do not build doc dir. * doc/doxygen.config.in: Updated configuration. * src/utils.c: Updated comments for doxygen. * config/enable_curses.m4: Added check for resizeterm function. Only check for libs if enabled. * src/utils.c: Changed get_program_time() to make it more portable. * configure.in: Bumped version to 13-pre4. * misc/gpl_header, misc/gpl_header_c, misc/gpl_header_h: Updated copyright date. * TODO, src/gdbserver.c: Implemented writing to sram. 2002-01-07 Theodore A. Roth * TODO: Removed disp term resizing. * src/decoder.c: Fixed bug setting carry flag in LSR handler * src/disp/disp.c, src/display.c: Implemented terminal resizing of display. Removed forking of xterm in psuedo term mode. 2002-01-06 Theodore A. Roth * ChangeLog, TODO: Updated. * src/display.c, src/gdbserver.c: Fixed problem with display zombies. * src/register.c: Set all general purpose registers to zero on reset. * test_asm/test_8515/Makefile.am: Fix problem with 'make dist' from directory other than source. Run elf files through linker to allow source stepping in gdb. * Makefile.am: Fix problem with 'make dist' from directory other than source. * config/avr_doc_dirsuffix.m4: Added version to doc install dir. * config/avr_binutils.m4: Added check for avr-ld. * configure.in: Bumped version to 13-pre3. * src/gdbserver.c, doc/simulavr.texi: Added support for 'C' and 'S' packets (cont/step with signal). Issuing a 'signal SIGHUP' command from gdb will cause sim to reset. Documented SIGHUP behaviour. * TODO: Updated, added road map. * Makefile_AVR_Rules: Added --gstabs when assembling. 2002-01-05 Theodore A. Roth * test_asm/test_8515/test_blink.asm: Fix to allow avr-ld to create a relocated object. 2002-01-04 Theodore A. Roth * doc/Makefile.am, config/acconfig.h, config/avr_doc_dirsuffix.m4, config/avr_doc_pdf.m4, Makefile.am, acconfig.h, bootstrap, configure.in: Applied Reinhard Jessich's patch for installing docs. Fixed problem with config.h not getting updated which would break compiling. 2002-01-03 Theodore A. Roth * src/gdbserver.c: Added documentation comments for doxygen. Added infinite loop around tcp server. * src/gdbserver.c: Removed redundant if clause. * src/Makefile.am, src/avr.h, src/avrcore.c, src/gdbserver.c, src/sig.c, src/sig.h: Encapsulated signal handling into sig.c. 2002-01-02 Theodore A. Roth * src/gdbserver.c: Correctly handle gdb sending C-c interrupt. * src/gdbserver.c: Modified to allow gdb to send an interrupt while sim is in continue loop. * src/gdbserver.c: Applied Tor Ringstad's patch to improve SIGINT handling. simulavr-0.1.2.2/ChangeLog-20010000644000175000001440000005427410203246516012576 000000000000002001-12-31 Theodore A. Roth * gdb-patches/README, gdb-patches/patcher.sh: Updated to refer to gdb-5.1 patches. Removed references to gdb-5.0 patches. * gdb-patches/gdb-5.0-avr-patch-0.1, gdb-patches/gdb-5.0-avr-troth-patch: Removed obsolete gdb-5.0 patches. * doc/Makefile.am, Makefile.am, Makefile_AVR_Rules: Fixes to allow building from separate directory. (thanks to Reinhard Jessich) 2001-12-30 Theodore A. Roth * ChangeLog: Updated. * Released version 0.0.12. * ChangeLog, configure.in: Set version to 0.0.12 * Makefile_AVR_Rules: Added -h and --stabs when generating .lst files. * doc/simulavr.texi: Documented instruction decoder. Misc cleanups. * src/avr.h, src/avrcore.c, src/eeprom.c, src/register.c, src/timers.c, src/vdevs.h: Renamed CB_T/CB_FP_T to CallBack/CallBack_FP. Twuz a silly a name. * src/disp/disp.c: Fixed bug: sreg bit display was reversed. 2001-12-29 Theodore A. Roth * src/decoder.c: Fixed bug: some of the LD/LDD cases I thought were undefined, are defined. 2001-12-28 Theodore A. Roth * src/avrcore.c: When dumping core output, print PC and PC*2. 2001-12-27 Theodore A. Roth * src/decoder.c: Fixed bug in SBIW handler: res was byte, now is word. 2001-12-22 Theodore A. Roth * ChangeLog: Updated. * ChangeLog: Tagged and released version 0.0.11. * doc/simulavr.texi: Fixed some typos. * ProjSummary: Fixed some typos. * src/devsupp.c: Fixed compiler warning about potential uninitialized variables. * ChangeLog: Removed duplicate entries. * configure.in: Set version to 0.0.11. * gdb-patches/README, ChangeLog, TODO: Updated. 2001-12-21 Theodore A. Roth * src/disp/disp.c: Made pipe fd nonblocking to fix problem with blocking read. Fixed wrefresh()es so that cursor is always in sram window. * src/Makefile.am: Fixed dtest dependencies. * src/main.c: Notify user if they didn't spec a program to run and sim expects one. * src/avr.h, src/stack.c: fixed stack pointer display update ommision. * src/disp/disp.c: Changed main loop to use select() for multiplexing the inputs. 2001-12-20 Theodore A. Roth * src/decoder.c: Changed how sreg is set in opcode handlers so as to only send display sreg changes once per handler. * src/avr.h, src/register.c, src/utils.c: Moved set_bit_in_byte() to utils.c and made it public. Add set_bit_in_word(). * src/avrcore.c: Print out PC and (PC*2) when -D option is given. * src/decoder.c: Fixed bug: Z flag wasn't using previous value in avr_op_CPC instruction. 2001-12-19 Theodore A. Roth * src/disp/Makefile.am, src/disp/disp.c, src/Makefile.am, src/avr.h, src/avrcore.c, src/display.c, src/display.h, src/dtest.c, src/eeprom.c, src/flash.c, src/main.c, src/memory.c, src/register.c, src/sram.c, src/vdevs.h, doc/simulavr.texi, config/enable_curses.m4, TODO, configure.in: Added curses based register and memory display. * ChangeLog: updated 2001-12-16 Theodore A. Roth * misc/gpl_header_h: Changed multiple inclusion macros to reduce potential for clashes. * src/decoder.c: Fixed a bug in the CP instruction which was clobbering a register. 2001-12-11 Theodore A. Roth * src/avrcore.c, src/memory.c: Fixed potential memory leaks due to incorrect object referencing. * src/avr.h, src/device.c, src/memory.c: Changed memory vdev list to use DList. * src/utils.c: Added dlist_add_head() function. * src/vdevs.h: Typedef'd an enum which wasn't. * TODO: Updated * src/avr.h, src/avrcore.c, src/devsupp.c, src/devsupp.h: Simplified mechanism for adding support for new microcontroller devices. * src/vdevs.h: Fixed a typo in a comment. * Makefile.am: Added ProjSummary to EXTRA_DIST. * src/devsupp.c, src/devsupp.h: Added files. Preparing to rework core-creation design to make adding support for new devices easier. * src/avrcore.c: Moved device creation functions to devsupp.c. * src/main.c: Added -L, --list-devices command line option. Changed to use devsupp.[ch] interface. * src/avr.h, src/gdb.h, src/vdevs.h: Changed multiple inclusion macros to reduce potential for clashes. * src/Makefile.am: Added devsupp.h to sources. * src/Makefile.am: Added gdb.c to EXTRA_DIST. Added devsupp.c to sources. 2001-12-10 Theodore A. Roth * ChangeLog: Converted to format which allows use of emacs to update from cvs logs. * ChangeLog, TODO, configure.in: 0.0.11-pre2 * Makefile_AVR_Rules: When generating .lst files for avr, dump .data section too. * src/stack.c, src/storage.c, src/timers.c, src/utils.c, src/avrcore.c, src/avrerror.c, src/avrmalloc.c, src/eeprom.c, src/flash.c, src/gdb.c, src/gdbserver.c, src/ports.c, src/register.c: Removed newlines from error message strings (do it in _avr_error()). * src/decoder.c: Removed newlines from error message strings (do it in _avr_error()). Fixed lpm/elpm addressing problem. (Is the fix right though?) * src/main.c: Removed newlines from error message strings (do it in _avr_error()). Dump core to a file instead of stderr. Dump core whenever avr_errror() is called. 2001-12-09 Theodore A. Roth * ChangeLog, TODO, configure.in: 0.0.11-pre1 * test_c/Makefile.am, test_c/deep_frame.c: Added deep_frame.c test program to project. * test_c/big_str.h, test_c/demo.c: Moved ugly string into big_str.h header. * src/avr.h, src/avrcore.c, src/gdbserver.c, src/memory.c: Added support for gdb querying io registers. 2001-12-08 Theodore A. Roth * src/gdbserver.c: Added support for writing registers via gdb remote protocol. 2001-12-07 Theodore A. Roth * src/gdbserver.c: Changed DATA_OFFSET to match what you get from avr-objdump output. * src/utils.c: Fixed: Adding dlist node after head would be immediately unref'd. 2001-12-06 Theodore A. Roth * TODO: Updated. * doc/simulavr.texi: Added object examples and discussion. * ChangeLog: Updated. * src/avrmalloc.c: Added newlines to error message string. Fixed avr_strdup so that it checks ptr before returning. * Makefile.am: Formating cleanup. * src/avrclass.c: Added comments for all the functions. * doc/simulavr.texi: Updated documentation. * doc/Makefile.am: Added html and pdf generation rules. 2001-12-05 Theodore A. Roth * src/avr.h, src/utils.c: Changed some dlist names for consistency * test_c/Makefile.am, test_c/demo_kr.c: Added demo_kr.c * test_c/demo.c: cond-compile out uglystring. * gdb-patches/README: updated * gdb-patches/gdb-5.0-avr-troth-patch: synced up with autogenerated patch * gdb-patches/get_gdb_patches.sh: synced up with gdb cvs tree * src/avrcore.c: Plugged potential memory leak. 2001-12-04 Theodore A. Roth * src/avr.h, src/avrcore.c, src/utils.c: Changed callback mechanism to use generic DList linked list. * src/avrcore.c, src/utils.c: Moved str2ffmt() and get_program_time() from avrcore.c to utils.c. * src/Makefile.am, src/avr.h, src/avrcore.c, src/utils.c: Added generic doubly, linked list (DList). Changed break point list to use DList. 2001-12-03 Theodore A. Roth * gdb-patches/get_gdb_patches.sh: Corrected comments explaining how to setup my gdb cvs. 2001-12-02 Theodore A. Roth * TODO, INSTALL, README, README.gdb, README.opcodes: Updated. * gdb-patches/README, gdb-patches/gdb-5.0-avr-gdbserver-patch, gdb-patches/gdb-5.0-avr-troth-patch, gdb-patches/get_gdb_patches.sh, gdb-patches/patcher.sh: Updated to handled my gdb branching scheme. * src/memory.c: Dumping core now outputs io register info in more readable format. 2001-11-30 Theodore A. Roth * src/gdbserver.c: Really fixed accept(2) failure mode problem. * gdb-patches/gdb-5.0-avr-troth-patch: Renaming of gdb-5.0-avr-gdbserver-patch to gdb-5.0-avr-troth-patch. * gdb-patches/get_gdb_patches.sh: Script for creating patches for gdb-5.0 from my gdb cvs tree. * src/Makefile.am: Delete symbolic links on a dist clean. * src/gdbserver.c: Made addrLength volatile so gcc won't compile it away when optimizing. 2001-11-29 Theodore A. Roth * Makefile.am: Moved doc dir to end of subdirs list. * src/Makefile.am, src/avr.h, src/avrcore.c, src/avrmalloc.c, src/gdb.c, src/gdb.h, src/gdbserver.c, src/main.c, src/memory.c: Deprecate gdb.c in favor of gdbserver.c - adds support for talking to gdb without the need for gdbserver. Improved breakpoint support. 2001-11-25 Theodore A. Roth * src/main.c: Made usage message values more concise. 2001-11-24 Theodore A. Roth * src/main.c, ChangeLog: Added -v, -version command line options. * ChangeLog, configure.in: Set version to 0.0.10 * src/avr.h, config/acconfig.h, Makefile.am, bootstrap, configure.in: Use acconfig.h to set byte, word, dword and qword sizes. 2001-11-22 Theodore A. Roth * TODO: Formatting and added more ac macro notes. 2001-11-21 Theodore A. Roth * Makefile.am: Added Makefile_AVR_Rules. Fixed typo. * Makefile.am: Added patcher.sh to EXTRA_DIST. * Makefile.am: Add -p to mkdir on dist-hook. * configure.in, test_c/Makefile.am, test_asm/test_8515/8515def.inc, test_asm/test_8515/Makefile.am, test_asm/test_8515/test_cntr.asm, test_asm/8515def.inc, test_asm/Makefile.am, test_asm/test.asm, src/Makefile.am, config/avr_binutils.m4, config/avr_cc.m4, config/avr_libc_headers.m4, config/check_gnu_make.m4, config/enable_tests.m4, ChangeLog, INSTALL, Makefile.am, Makefile_AVR_Rules, README, TODO: Convertion to autotools for build system. * doc/Makefile.am, doc/simulavr.texi: Added beginnings of texinfo based documentation. 2001-11-17 Theodore A. Roth * src/avr.h, src/avrcore.c, src/flash.c, src/gdb.c: Fixed to allow gdb to send odd memaddr or odd len on flash read/writes. 2001-11-16 Theodore A. Roth * bootstrap: Added autotools bootstrap script. * test_c/Makefile, test_asm/test_8515/Makefile, test_asm/Makefile, src/Makefile, Makefile, setup.py, MANIFEST.in: Removed Makefiles in convertions to gnu autotools. * ChangeLog: updated. * test_c/demo.c: Added a really long string to test PC wrapping. * src/avr.h, src/avrcore.c: Fixed problem with larger programs in which PC needed to wrap around. * misc/gpl_header_c, misc/gpl_header_h: Added gpl headers for c programs. 2001-11-14 Theodore A. Roth * ChangeLog, MANIFEST.in, setup.py: Updated for version 0.0.8. * gdb-patches/gdb-5.0-avr-gdbserver-patch: Fixed stepping bug. Added version comment to head of file. * gdb-patches/README: Added patcher.sh description. Removed comment about bug in stepping. * gdb-patches/patcher.sh: Simple script to automate patching and installing avr-gdb. * src/gdb.c: Commented out some diagnostic messages. * Makefile: Added MANIFEST to clean rule. * test_c/Makefile: Added *.lst to clean rule. * Makefile: Added test_c to sub_dirs. * src/gdb.h: Header file for gdb.c. * ChangeLog: updated * README.gdb: Readme file for controlling simulator with gdb * src/gdb.c: Support for running in gdb mode as an inferior of gdbserver. * src/main.c: Added gdb mode. * src/avrcore.c, src/avr.h: Added stack constants. Added BREAK_POINT and INVALID_OPCODE constants. Added break_pt field. Added Program Memory Space Access Methods. Added Break point access methods. * src/stack.c: Use STACK_POINTER_BASE and STACK_POINTER_SIZE instead of hardcoded values in constructor. * src/Makefile: Added gdb.c to main src list. * test_c/Makefile: Generated .lst file by default. * gdb-patches/README: Updated for first semi working gdb patch. * gdb-patches/gdb-5.0-avr-gdbserver-patch: Updated patch. Seems to be mostly working now. 2001-11-13 Theodore A. Roth * gdb-patches/gdb-5.0-avr-gdbserver-patch: Updated patch. Mostly works, but still not done. 2001-11-07 Theodore A. Roth * MANIFEST.in, setup.py, test_c/Makefile, test_c/demo.c: Added a simple avr C program to the project. * src/main.c: Changed getopt() to getopt_long. Added gdbserver mode option. * gdb-patches/README, gdb-patches/gdb-5.0-avr-gdbserver-patch, gdb-patches/gdb-5.0-avr-patch-0.1: Added gdb patches and README. 2001-11-02 Theodore A. Roth * ChangeLog, TODO, harness.py: Updated. Removed harness.py. * src/avrcore.c: Print out how many clock cycles were executed. * src/avrcore.c, src/timers.c, src/vdevs.h: Added TIMSK, TIFR registers via TimerIntr_T class. Added Timer/Counter 0 support. Added ability to stop simulator with a Ctrl-C keyboard interrupt. * src/main.c: Added -D command line option. * src/ports.c: Eliminated possible use of uninitialized variable. * src/avr.h: Added global_debug_inst_output. * src/register.c: Got rid of a few unnecessary casts. 2001-11-01 Theodore A. Roth * src/vdevs.h, src/register.c: Added core field to VDevice class and removed core field from any VDevice derived class. * src/eeprom.c: Added core field to VDevice class and removed core field from any VDevice derived class. Fixed contructor to use reset function correctly. * src/device.c, src/avrcore.c, src/avr.h: Added core field to VDevice class and removed core field from any VDevice derived class. * src/avr.h: Added comments to clk_cb and async_cb fields of core. * src/avrcore.c: Move get_program_time() out of avr_core_cb_exec. Now time val is passed as argument to allow time to either mean clocks or system time. * test_asm/test_8515/Makefile, test_asm/test_8515/test_toie0.asm, test_asm/test_8515/test_toie0_2.asm: Added tests for timer/counter 0 interrupts. 2001-10-31 Theodore A. Roth * INSTALL, README: Updated. * setup.py: Updated version. Modified so that it knows about move of python scripts into python dir. * test_asm/Makefile, Makefile: Added depend rule. * src/vdevs.h, src/register.c, src/eeprom.c, src/avrcore.c, src/avr.h: Added async_cb to core struct: Now there are two callback lists in the core. The old clk_cb list is only for callbacks that should be called every clock cycle. The new async_cb list is for callbacks that are called periodically even if the device is not being clocked. Changed ClkCB -> CB_T, ClkCB_FP -> CB_FP_T to make the existing callback code generic. Removed the callback type field and methods. Added CK and inst_CKS fields and methods. Added async_cb methods. 2001-10-30 Theodore A. Roth * src/decoder.c: Added inst_CKS setting to all opcode handlers. * src/register.c: Make sure that an installed toe_cb is removed after a reset. * ChangeLog, TODO: Updated. * src/vdevs.h: Split TimerIntr class into TIMSK and TIFR. * src/timers.c: Code to handle timer/counter functionality. * src/register.c: Removed TimerIntr comment. * src/avr.h, src/avrcore.c: Added clk_cb type methods. * src/Makefile: Added timers.c. 2001-10-29 Theodore A. Roth * src/avr.h, src/avrcore.c, src/eeprom.c, src/register.c: Added clock callback type distinctions. * src/avr.h, src/avrcore.c, src/decoder.c, src/register.c, src/vdevs.h: Encapsulation cleanups. Renaming to make some functions more descriptive. Added code to handle SLEEP modes via MCUCR. * src/Makefile: Added NDEBUG to DEBUG_FLAGS. Compile lib before main. 2001-10-26 Theodore A. Roth * ChangeLog: updated 2001-10-21 Theodore A. Roth * src/avr.h, src/avrcore.c, src/main.c, src/memory.c, src/ports.c, src/vdevs.h, ChangeLog, TODO: Got io ports as general digital io working. * test_asm/test_8515/test_port.asm: Rewrote to work correctly after testing on real hardware. 2001-10-19 Theodore A. Roth * src/ports.c, src/vdevs.h: Simplified port code. * test_asm/test_8515/test_port.asm: Added port test to project. * setup.py: ver to 0.0.5 * src/Makefile, src/avrcore.c, src/ports.c, src/vdevs.h: First cut at IO Ports. * src/main.c: Added device type listing to usage function. 2001-10-18 Theodore A. Roth * src/Makefile, src/avr.h, src/avrcore.c, src/intvects.c, src/main.c: Added support for 2313 device. * ChangeLog, TODO: Updated * test_asm/test.asm: Removed some commented out code. * src/register.c, src/vdevs.h: Starting timer/counter implementation. 2001-10-16 Theodore A. Roth * src/avr.h, src/avrcore.c, src/register.c: Added irq raise and clear functions. * src/register.c: Use interrupts issue the reset. * src/avrcore.c: Clear the interrupt flag after handling the interrupt. * src/Makefile, src/avr.h, src/avrcore.c, src/intvects.c: Added interrupt infrastructure. * src/avr.h: Removed eeprom property from AvrCore struct. * src/eeprom.c: Fixed a typo in a comment. * src/avrcore.c, src/register.c, src/vdevs.h: Renamed ascr -> acsr. That's the way it should have been named. * src/eeprom.c: Fixed use of uninitialized local variable. * TODO: updated * MANIFEST.in: Explicitly added Makefile to test_asm/test_8515. * test_asm/Makefile: Added tests to all rule. * ChangeLog, setup.py: updated * src/eeprom.c: Finished up the eeprom implementation. * src/vdevs.h: Finished up eeprom implementation. * src/register.c: Changed clock callback functions to have data be AvrClass. * src/avrcore.c: Changed callback result check to be more sane. Moved debug print statement. Updated eeprom_new arg lists. * src/avr.h: Changed ClkCB_FP typedef args. * Makefile: Added realclean rule. * test_asm/test_8515/test_eeprom.asm: Program to test the eeprom code. 2001-10-15 Theodore A. Roth * TODO, ChangeLog: updated * test_asm/test_8515/test_stack.asm: Improve use of macros. * setup.py: Updated version. * src/main.c: Added a global storage for the avrcore as an aid in debugging. * src/vdevs.h: Completed wdtcr class. * src/stack.c: Added reset handler for mem based stack pointer virtual device. * src/sram.c: Added reset handler. * src/register.c: Added reset handlers. Added wdtcr virtual device. * src/memory.c, src/eeprom.c: Added reset handler. * src/device.c: Added reset handler to VDevice. * src/decoder.c: Completed wdr instruction handler. Renamed opcode_FP to Opcode_FP. * src/avrcore.c: Improved get_program_time() to safely handle system clock rollovers. Added state property to avrcore class. Changed exec_instruction to exec_next_instruction and fixed bug in which PC/opcode weren't updated in the right order. Fixed bug in adding new nodes to clk_cb list. Added wdtcr vdevice to device generators. * src/avr.h: Added reset code. Added watchdog control register based reset. Reordered some typedefs for predeclarations. Added state codes to avrcore class. * test_asm/test_8515/test_wdr.asm, test_asm/test_8515/test_wdr2.asm: Test files for wdr instruction and wdtcr functionality. 2001-10-13 Theodore A. Roth * src/avr.h: Added program time to callback system. * src/avrcore.c: Added program time to clock callback functions. 2001-10-12 Theodore A. Roth * MANIFEST.in: Added asm include files * src/register.c, src/vdevs.h: Added watchdog class. * src/avrcore.c, src/avr.h: Added clock callback class. * src/avrcore.c: Added ascr. * src/register.c: Added ASCR methods. Fixed mcucr destroy. * src/vdevs.h: argument name changes. * src/avrcore.c, src/device.c, src/eeprom.c, src/register.c: * src/vdevs.h: Got rid of some magic numbers. Added mcucr vdevice. * src/avr.h: Added name field to virtual devices. Added avr_core_step(), mem_get_vdevice_by_{name,addr}() functions. * src/avrcore.c: Added avr_core_step() function. * src/eeprom.c: Added name to vdevice. * src/memory.c: Added vdev lookup by addr and name functions. Look up devices for core dump by name instead of address. * src/register.c, src/sram.c, src/stack.c: Added name to vdevice. * src/device.c: Added name field to vdevice. * src/Makefile: Changed dependency generation. 2001-10-11 Theodore A. Roth * src/vdevs.h: Added eecr mask. Added analog comp device. * src/eeprom.c: Added eecr mask. * src/avrcore.c: Added eecr_mask. * src/vdevs.h: Header for virtual devices. * src/avr.h: Moved virtual devices to vdevs.h. * src/avr.h, src/decoder.c: Made opcode handlers static. * src/Makefile, src/avr.h, src/avrcore.c, src/eeprom.c, * src/main.c, src/memory.c: Added eeprom virtual device. * src/avr.h, src/avrerror.c: Modified message functions to output file and line numbers. * src/Makefile: Added conditional rules to allow compiling with or without optimizations. * MANIFEST.in, Makefile, setup.py: Distribution updates. * README, TODO, harness.py: Updates. * src/Makefile, src/avr.h, src/avrclass.c, src/avrcore.c, src/avrerror.c, src/avrmalloc.c, src/decoder.c, src/device.c, src/flash.c, src/main.c, src/memory.c, src/op_names.c, src/register.c, src/sram.c, src/stack.c, src/storage.c: First checkin of source for C coded simulator. * test_asm/test_8515/test_blink.asm, test_asm/test_8515/test_stack.asm, test_asm/8515def.inc, test_asm/Makefile, test_asm/test.asm: Modified to work with avr-as instead of Atmel's avrasm. 2001-10-01 Theodore A. Roth * TODO: updated * Makefile, setup.py, MANIFEST.in: Updated to use setup.py and MANIFEST.in to build a distribution. * ChangeLog, INSTALL: Added. * harness.py: updated usage * README, README.opcodes, TODO: updated * Makefile, README, harness.py, setup.py, test_asm/Makefile: Added GPL header. * AUTHORS, COPYING, misc/gpl_header: Added. * harness.py: Added Connections class for handling port connections. * TODO, test_asm/test.asm: updated 2001-09-28 Theodore A. Roth * MANIFEST.in, Makefile, README, README.opcodes, TODO, harness.py, setup.py, test_asm/Makefile, test_asm/test.asm, test_asm/test_8515/test_blink.asm, test_asm/test_8515/test_stack.asm: Imported source. * MANIFEST.in, Makefile, README, README.opcodes, TODO, harness.py, setup.py, test_asm/Makefile, test_asm/test.asm, test_asm/test_8515/test_blink.asm, test_asm/test_8515/test_stack.asm: New file. simulavr-0.1.2.2/src/0000777000175000001440000000000010204750217011302 500000000000000simulavr-0.1.2.2/src/Makefile.am0000644000175000001440000000536510037661057013272 00000000000000# # $Id: Makefile.am,v 1.27 2004/04/16 04:33:51 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002, 2003 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # MAINTAINERCLEANFILES = Makefile.in SUBDIRS = getopt @ac_curses_disp_dirs@ disp-vcd DIST_SUBDIRS = getopt disp disp-vcd AM_CFLAGS = @ENABLE_WARNINGS@ \ -I$(top_srcdir)/src/getopt bin_PROGRAMS = simulavr simulavr_LDADD = getopt/libgnugetopt.a simulavr_SOURCES = \ adc.c \ adc.h \ avrclass.c \ avrclass.h \ avrcore.c \ avrcore.h \ avrerror.c \ avrerror.h \ avrmalloc.c \ avrmalloc.h \ callback.c \ callback.h \ decoder.c \ decoder.h \ device.c \ devsupp.c \ devsupp.h \ display.c \ display.h \ eeprom.c \ eeprom.h \ flash.c \ flash.h \ gdb.h \ gdbserver.c \ intvects.c \ intvects.h \ main.c \ memory.c \ memory.h \ op_names.c \ op_names.h \ ports.c \ ports.h \ register.c \ register.h \ sig.c \ sig.h \ spi.c \ spi.h \ sram.c \ sram.h \ stack.c \ stack.h \ storage.c \ storage.h \ timers.c \ timers.h \ uart.c \ uart.h \ usb.c \ usb.h \ utils.c \ utils.h \ vdevs.h \ defn/90s1200.h \ defn/90s2313.h \ defn/90s4414.h \ defn/90s8515.h \ defn/mega8.h \ defn/mega16.h \ defn/mega103.h \ defn/mega128.h \ defn/43usb320.h \ defn/43usb325.h \ defn/43usb326.h \ defn/43usb351.h \ defn/43usb353.h \ defn/43usb355.h links: @for i in `./simulavr -L`; do ln -s simulavr $$i; done simulavr-0.1.2.2/src/Makefile.in0000644000175000001440000005646510204750204013277 00000000000000# Makefile.in generated by automake 1.8.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # # $Id: Makefile.am,v 1.27 2004/04/16 04:33:51 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002, 2003 Theodore A. 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Warning: valid code using `volatile' can become incorrect without. Disable with care. */ #undef volatile #if defined HAVE_INTTYPES_H #include #endif simulavr-0.1.2.2/src/adc.c0000644000175000001440000002742110024663466012130 00000000000000/* * $Id: adc.c,v 1.4 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003, 2004 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file adc.c * \brief Module to simulate the AVR's ADC module. * */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "adc.h" #include "avrcore.h" #include "intvects.h" /****************************************************************************\ * * ADC Interrupts * \****************************************************************************/ static void adc_iadd_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t adc_intr_read (VDevice *dev, int addr); static void adc_intr_write (VDevice *dev, int addr, uint8_t val); static void adc_intr_reset (VDevice *dev); static int adc_intr_cb (uint64_t time, AvrClass *data); static int adc_clk_incr_cb (uint64_t ck, AvrClass *data); /** \brief Allocate a new ADC interrupt */ VDevice * adc_int_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)adc_intr_new (addr, name, rel_addr); } ADCIntr_T * adc_intr_new (int addr, char *name, int rel_addr) { ADCIntr_T *adc; adc = avr_new (ADCIntr_T, 1); adc_intr_construct (adc, addr, name, rel_addr); class_overload_destroy ((AvrClass *)adc, adc_intr_destroy); return adc; } /** \brief Constructor for adc interrupt object. */ void adc_intr_construct (ADCIntr_T *adc, int addr, char *name, int rel_addr) { if (adc == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)adc, adc_intr_read, adc_intr_write, adc_intr_reset, adc_iadd_addr); if (rel_addr) adc->rel_addr = rel_addr; adc_iadd_addr ((VDevice *)adc, addr, name, 0, NULL); adc_intr_reset ((VDevice *)adc); } static void adc_iadd_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { ADCIntr_T *adc = (ADCIntr_T *)vdev; if (strncmp ("ADCSR", name, 5) == 0) { adc->adcsr_addr = addr; } else if (strncmp ("ADMUX", name, 5) == 0) { adc->admux_addr = addr; } else { avr_error ("invalid ADC register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for adc interrupt object. */ void adc_intr_destroy (void *adc) { if (adc == NULL) return; vdev_destroy (adc); } static uint8_t adc_intr_read (VDevice *dev, int addr) { ADCIntr_T *adc = (ADCIntr_T *)dev; if (addr == adc->adcsr_addr) return (adc->adcsr); else if (addr == adc->admux_addr) return (adc->admux); else avr_error ("Bad address: 0x%04x", addr); return 0; /* will never get here */ } static void adc_intr_write (VDevice *dev, int addr, uint8_t val) { ADCIntr_T *adc = (ADCIntr_T *)dev; CallBack *cb; ADC_T *adc_d; adc_d = (ADC_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *)adc), adc->rel_addr); if (addr == adc->adcsr_addr) { if (val & mask_ADIF) /* clears interrupt flag */ adc->adcsr = val & ~mask_ADIF; else adc->adcsr = val; if ((val & mask_ADSC) && (val & mask_ADEN)) { if ((adc->intr_cb == NULL)) { /* we need to install the intr_cb function */ cb = callback_new (adc_intr_cb, (AvrClass *)adc); adc->intr_cb = cb; avr_core_async_cb_add ((AvrCore *)vdev_get_core (dev), cb); } if ((adc_d->clk_cb == NULL)) { /* we need to install the clk_cb function */ cb = callback_new (adc_clk_incr_cb, (AvrClass *)adc_d); adc_d->clk_cb = cb; avr_core_clk_cb_add ((AvrCore *) vdev_get_core ((VDevice *)adc_d), cb); } adc_d->adc_count = 13; switch ((adc->adcsr) & (mask_ADPS0 | mask_ADPS1 | mask_ADPS2)) { case ADC_CK_0: case ADC_CK_2: adc_d->divisor = 2; break; case ADC_CK_4: adc_d->divisor = 4; break; case ADC_CK_8: adc_d->divisor = 8; break; case ADC_CK_16: adc_d->divisor = 16; break; case ADC_CK_32: adc_d->divisor = 32; break; case ADC_CK_64: adc_d->divisor = 64; break; case ADC_CK_128: adc_d->divisor = 128; break; default: avr_error ("The impossible happened!"); } } else { adc->intr_cb = NULL; /* no interrupt are enabled, remove the callback */ } } else if (addr == adc->admux_addr) { adc->admux = val; } else { avr_error ("Bad address: 0x%04x", addr); } } static void adc_intr_reset (VDevice *dev) { ADCIntr_T *adc = (ADCIntr_T *)dev; adc->intr_cb = NULL; adc->adcsr = 0; adc->admux = 0; } static int adc_intr_cb (uint64_t time, AvrClass *data) { ADCIntr_T *adc = (ADCIntr_T *)data; if (adc->intr_cb == NULL) return CB_RET_REMOVE; if ((adc->adcsr & mask_ADEN) && (adc->adcsr & mask_ADIE) && (adc->adcsr & mask_ADIF)) { /* an enabled interrupt occured */ AvrCore *core = (AvrCore *)vdev_get_core ((VDevice *)adc); avr_core_irq_raise (core, irq_vect_table_index (ADC)); adc->adcsr &= ~mask_ADIF; } return CB_RET_RETAIN; } /****************************************************************************\ * * ADC * \****************************************************************************/ static void adc_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t adc_read (VDevice *dev, int addr); static void adc_write (VDevice *dev, int addr, uint8_t val); static void adc_reset (VDevice *dev); /** \brief Allocate a new ADC structure. */ VDevice * adc_create (int addr, char *name, int rel_addr, void *data) { uint8_t *data_ptr = (uint8_t *) data; if (data) return (VDevice *)adc_new (addr, name, (uint8_t) * data_ptr, rel_addr); else avr_error ("Attempted A/D create with NULL data pointer"); return 0; } ADC_T * adc_new (int addr, char *name, uint8_t uier, int rel_addr) { ADC_T *adc; adc = avr_new (ADC_T, 1); adc_construct (adc, addr, name, uier, rel_addr); class_overload_destroy ((AvrClass *)adc, adc_destroy); return adc; } /** \brief Constructor for ADC object. */ void adc_construct (ADC_T *adc, int addr, char *name, uint8_t uier, int rel_addr) { if (adc == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)adc, adc_read, adc_write, adc_reset, adc_add_addr); if (rel_addr) adc->rel_addr = rel_addr; adc_add_addr ((VDevice *)adc, addr, name, 0, NULL); adc_reset ((VDevice *)adc); adc->u_divisor = uier ? 12 : 1; } static void adc_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { ADC_T *adc = (ADC_T *)vdev; if (strncmp ("ADCL", name, 4) == 0) { adc->adcl_addr = addr; } else if (strncmp ("ADCH", name, 4) == 0) { adc->adch_addr = addr; } else { avr_error ("invalid ADC register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for ADC object. */ void adc_destroy (void *adc) { if (adc == NULL) return; vdev_destroy (adc); } static uint8_t adc_read (VDevice *dev, int addr) { ADC_T *adc = (ADC_T *)dev; if (addr == adc->adcl_addr) return adc->adcl; else if (addr == adc->adch_addr) return adc->adch; else avr_error ("Bad address: 0x%04x", addr); return 0; /* will never get here */ } static void adc_write (VDevice *dev, int addr, uint8_t val) { avr_error ("Bad ADC write address: 0x%04x", addr); } static void adc_reset (VDevice *dev) { ADC_T *adc = (ADC_T *)dev; adc->clk_cb = NULL; adc->adcl = 0; adc->adch = 0; adc->adc_count = 0; adc->adc_in = 0; adc->divisor = 0; } static int adc_clk_incr_cb (uint64_t ck, AvrClass *data) { ADC_T *adc = (ADC_T *)data; uint8_t last = adc->adc_count; ADCIntr_T *adc_ti; adc_ti = (ADCIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) adc), adc->rel_addr); if (adc->clk_cb == NULL) return CB_RET_REMOVE; if (adc->divisor <= 0) avr_error ("Bad divisor value: %d", adc->divisor); /* decrement clock if ck is a multiple of divisor */ adc->adc_count -= ((ck % (adc->divisor * adc->u_divisor)) == 0); if (adc->adc_count != last) /* we've changed the counter */ { if (adc->adc_count == 0) { adc_ti->adcsr |= mask_ADIF; adc_ti->adcsr &= ~mask_ADSC; adc->adc_in = adc_port_rd (adc_ti->admux); adc->adcl = (adc->adc_in) & 0xff; /* update adcl to what we read */ adc->adch = ((adc->adc_in) >> 8) & 0x03; /* update adch */ if (adc_ti->adcsr & mask_ADFR) /* free running mode */ adc->adc_count = 13; else { adc->clk_cb = NULL; return CB_RET_REMOVE; } } } return CB_RET_RETAIN; } /* FIXME: TRoth/2003-11-29: These will eventually need to be plugged into an external connection interface. */ uint16_t adc_port_rd (uint8_t mux) { int data; char line[80]; while (1) { fprintf (stderr, "\nEnter data to read into the ADC for channel %d: ", mux); /* try to read in a line of input */ if (fgets (line, sizeof (line), stdin) == NULL) continue; /* try to parse the line for a byte of data */ if (sscanf (line, "%d\n", &data) != 1) continue; break; } return (uint16_t) (data & 0x3ff); } void adc_port_wr (uint8_t val) { fprintf (stderr, "wrote 0x%02x to ADC\n", val); } simulavr-0.1.2.2/src/adc.h0000644000175000001440000001347010024663466012134 00000000000000/* * $Id: adc.h,v 1.4 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef ADC_H #define ADC_H /****************************************************************************\ * * ADCInter_T(VDevice) : ADC Interrupt and Control Register * \****************************************************************************/ enum _adc_intr_constants { ADC_INTR_BASE_A = 0x26, /* base address for vdev */ ADC_INTR_BASE_U = 0x27, /* base address for vdev */ ADC_INTR_SIZE = 2, /* SPCR, SPSR */ ADC_INTR_ADCSR_ADDR = 0, ADC_INTR_ADMUX_ADDR = 1, }; typedef enum { bit_ADPS0 = 0, /* Clock Rate Select 0 */ bit_ADPS1 = 1, /* Clock Rate Select 1 */ bit_ADPS2 = 2, /* Clock Rate Select 1 */ bit_ADIE = 3, /* ADC Interrupt Enable */ bit_ADIF = 4, /* ADC Interrupt Flag */ bit_ADFR = 5, /* Free Run Select */ bit_ADSC = 6, /* ADC Start Conversion */ bit_ADEN = 7, /* ADC Enable */ } ADCSR_BITS; typedef enum { mask_ADPS0 = 1 << bit_ADPS0, mask_ADPS1 = 1 << bit_ADPS1, mask_ADPS2 = 1 << bit_ADPS2, mask_ADIE = 1 << bit_ADIE, mask_ADIF = 1 << bit_ADIF, mask_ADFR = 1 << bit_ADFR, mask_ADSC = 1 << bit_ADSC, mask_ADEN = 1 << bit_ADEN, } ADCSR_MASKS; typedef enum { bit_MUX0 = 0, /* MUX Channel Select Bit */ bit_MUX1 = 1, /* MUX Channel Select Bit */ bit_MUX2 = 2, /* MUX Channel Select Bit */ bit_MUX3 = 3, /* MUX Channel Select Bit */ } ADMUX_BITS; typedef enum { mask_MUX0 = 1 << bit_MUX0, mask_MUX1 = 1 << bit_MUX1, mask_MUX2 = 1 << bit_MUX2, mask_MUX3 = 1 << bit_MUX3, } ADMUX_MASKS; /* FIXME: This should be combined with the adc vdev (ADC_T). */ typedef struct _ADCIntr_T ADCIntr_T; struct _ADCIntr_T { VDevice parent; uint16_t adcsr_addr; uint16_t admux_addr; uint16_t rel_addr; /* address of ADC data registers */ uint8_t adcsr; /* ADC Interrupt control and status register */ uint8_t admux; /* ADC Multiplexer Select register */ CallBack *intr_cb; /* callback for checking and raising interrupts */ }; extern VDevice *adc_int_create (int addr, char *name, int rel_addr, void *data); extern ADCIntr_T *adc_intr_new (int addr, char *name, int rel_addr); extern void adc_intr_construct (ADCIntr_T *ti, int addr, char *name, int rel_addr); extern void adc_intr_destroy (void *ti); /****************************************************************************\ * * General ADC bits and masks. * \****************************************************************************/ enum _adc_cs_constants { ADC_CK_0 = 0x00, /* CK/2 */ ADC_CK_2 = 0x01, /* CK/2 */ ADC_CK_4 = 0x02, /* CK/4 */ ADC_CK_8 = 0x03, /* CK/8 */ ADC_CK_16 = 0x04, /* CK/16 */ ADC_CK_32 = 0x05, /* CK/32 */ ADC_CK_64 = 0x06, /* CK/64 */ ADC_CK_128 = 0x07, /* CK/128 */ }; /****************************************************************************\ * * ADC(VDevice) : ADC * \****************************************************************************/ enum _adc_constants { ADC_BASE_A = 0x24, /* base memory address */ ADC_BASE_U = 0x22, /* base memory address */ ADC_SIZE = 2, /* ADC Data Register Size = 2 bytes */ ADC_ADCL_ADDR = 0, /* offset from base to ADCL Register */ ADC_ADCH_ADDR = 1, /* offset from base to ADCH Register */ }; typedef struct _ADC ADC_T; struct _ADC { VDevice parent; uint16_t adcl_addr; /* data low register address */ uint8_t adcl; /* data low register */ uint16_t adch_addr; /* data high register address */ uint8_t adch; /* data high register */ uint16_t rel_addr; /* address of ADC int registers */ uint16_t adc_count; /* 16 bit count register */ uint16_t adc_in; /* new data register */ uint16_t divisor; /* clock divisor */ uint8_t u_divisor; /* extra usb clock divisor */ CallBack *clk_cb; /* incr timer tied to clock */ }; extern VDevice *adc_create (int addr, char *name, int rel_addr, void *data); extern ADC_T *adc_new (int addr, char *name, uint8_t data, int rel_addr); extern void adc_construct (ADC_T *adc, int addr, char *name, uint8_t data, int rel_addr); extern void adc_destroy (void *adc); extern void adc_intr_set_flag (ADCIntr_T *ti); extern void adc_intr_clear_flag (ADCIntr_T *ti); extern uint16_t adc_port_rd (uint8_t mux); extern void adc_port_wr (uint8_t val); #endif simulavr-0.1.2.2/src/avrclass.c0000644000175000001440000000677407762602565013237 00000000000000/* * $Id: avrclass.c,v 1.8 2003/12/01 09:10:13 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file avrclass.c * \brief Methods to provide user interfaces to the AvrClass structure. * * This module provides the basis for simulavr's object mechanism. For a * detailed discussion on using simulavr's class mechanism, see the simulavr * users manual. FIXME: [TRoth 2002/03/19] move the discussion here. */ #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" /** \brief This function should never be used. * * The only potential use for it as a template for derived classes. * Do Not Use This Function! */ AvrClass * class_new (void) { AvrClass *klass = avr_new (AvrClass, 1); class_construct (klass); return klass; } /** \brief Initializes the AvrClass data structure. * * A derived class should call this function from their own * \_construct() function. All classes should * have their constructor function call their parent's constructor * function. */ void class_construct (AvrClass *klass) { if (klass == NULL) avr_error ("passed null ptr"); klass->ref_count = 1; class_overload_destroy (klass, class_destroy); } /** \brief Releases resources allocated by class's \_new() function. * * This function should never be called except as the last statement * of a directly derived class's destroy method. * All classes should have their destroy method call their parent's * destroy method. */ void class_destroy (void *klass) { if (klass == NULL) return; avr_free (klass); } /** \brief Overload the default destroy method. * * Derived classes will call this to replace class_destroy() with their own * destroy method. */ void class_overload_destroy (AvrClass *klass, AvrClassFP_Destroy destroy) { if (klass == NULL) avr_error ("passed null ptr"); klass->destroy = destroy; } /** \brief Increments the reference count for the klass object. * * The programmer must call this whenever a reference to an object * is stored in more than one place. */ void class_ref (AvrClass *klass) { if (klass == NULL) avr_error ("passed null ptr"); klass->ref_count++; } /** \brief Decrements the reference count for the klass object. * * When the reference count reaches zero, the class's destroy method * is called on the object. */ void class_unref (AvrClass *klass) { if (klass == NULL) avr_error ("passed null ptr"); klass->ref_count--; if (klass->ref_count == 0) klass->destroy (klass); } simulavr-0.1.2.2/src/avrclass.h0000644000175000001440000000354107762567530013233 00000000000000/* * $Id: avrclass.h,v 1.3 2003/12/01 07:35:52 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_AVRCLASS_H #define SIM_AVRCLASS_H /****************************************************************************\ * * OOP Implementaion built up from AvrClass structure. * \****************************************************************************/ typedef struct _AvrClass AvrClass; typedef void (*AvrClassFP_Destroy) (void *klass); struct _AvrClass { int type; int ref_count; AvrClassFP_Destroy destroy; /* can be overridden */ }; extern AvrClass *class_new (void); extern void class_construct (AvrClass *klass); extern void class_destroy (void *klass); extern void class_overload_destroy (AvrClass *klass, AvrClassFP_Destroy destroy); extern void class_ref (AvrClass *klass); extern void class_unref (AvrClass *klass); #endif /* SIM_AVRCLASS_H */ simulavr-0.1.2.2/src/avrcore.c0000644000175000001440000010231110171554717013033 00000000000000/* * $Id: avrcore.c,v 1.81 2005/01/13 20:27:59 zfrdh Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file avrcore.c * \brief Module for the core AvrCore object, which is the AVR CPU to be * simulated. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "ports.h" #include "avrcore.h" #include "display.h" #include "decoder.h" #include "sig.h" #include "devsupp.h" /** \brief Flag for enabling output of instruction debug messages. */ int global_debug_inst_output = 0; /***************************************************************************\ * * BreakPt(AvrClass) Methods * \***************************************************************************/ #ifndef DOXYGEN /* don't expose to doxygen */ typedef struct _BreakPt BreakPt; struct _BreakPt { AvrClass parent; int pc; uint16_t opcode; }; #endif static inline BreakPt *brk_pt_new (int pc, uint16_t opcode); static inline void brk_pt_construct (BreakPt *bp, int pc, uint16_t opcode); static inline void brk_pt_destroy (void *bp); static inline BreakPt * brk_pt_new (int pc, uint16_t opcode) { BreakPt *bp; bp = avr_new (BreakPt, 1); brk_pt_construct (bp, pc, opcode); class_overload_destroy ((AvrClass *)bp, brk_pt_destroy); return bp; } static inline void brk_pt_construct (BreakPt *bp, int pc, uint16_t opcode) { if (bp == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)bp); bp->pc = pc; bp->opcode = opcode; } static inline void brk_pt_destroy (void *bp) { BreakPt *_bp = (BreakPt *)bp; if (_bp == NULL) return; class_destroy (bp); } static inline DList *brk_pt_list_add (DList *head, int pc, uint16_t opcode); static inline DList *brk_pt_list_delete (DList *head, int pc); static inline BreakPt *brk_pt_list_lookup (DList *head, int pc); static int brk_pt_cmp (AvrClass *d1, AvrClass *d2); /* Compare function for break points. */ static int brk_pt_cmp (AvrClass *d1, AvrClass *d2) { return ((BreakPt *)d1)->pc - ((BreakPt *)d2)->pc; } static inline DList * brk_pt_list_add (DList *head, int pc, uint16_t opcode) { BreakPt *bp = brk_pt_new (pc, opcode); return dlist_add (head, (AvrClass *)bp, brk_pt_cmp); } static inline DList * brk_pt_list_delete (DList *head, int pc) { BreakPt *bp = brk_pt_new (pc, 0); head = dlist_delete (head, (AvrClass *)bp, brk_pt_cmp); class_unref ((AvrClass *)bp); return head; } static inline BreakPt * brk_pt_list_lookup (DList *head, int pc) { BreakPt *found; BreakPt *bp = brk_pt_new (pc, 0); found = (BreakPt *)dlist_lookup (head, (AvrClass *)bp, brk_pt_cmp); class_unref ((AvrClass *)bp); return found; } static inline DList * brk_pt_iterator (DList *head, DListFP_Iter func, void *user_data) { return dlist_iterator (head, func, user_data); } /***************************************************************************\ * * Irq(AvrClass) Methods: For managing the irq_pending list. * \***************************************************************************/ #ifndef DOXYGEN /* don't expose to doxygen */ typedef struct _Irq Irq; struct _Irq { AvrClass parent; IntVect *vector; /* These are only used for storing lookup information. Copies of core->{state,sleep_mode}. */ int state; unsigned int sleep_mode; }; #endif static inline Irq *irq_new (IntVect *vector, int state, unsigned int sleep_mode); static inline void irq_construct (Irq *irq, IntVect *vector, int state, unsigned int sleep_mode); static inline void irq_destroy (void *irq); static inline Irq * irq_new (IntVect *vector, int state, unsigned int sleep_mode) { Irq *irq; irq = avr_new (Irq, 1); irq_construct (irq, vector, state, sleep_mode); class_overload_destroy ((AvrClass *)irq, irq_destroy); return irq; } static inline void irq_construct (Irq *irq, IntVect *vector, int state, unsigned int sleep_mode) { if (irq == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)irq); irq->vector = vector; irq->state = state; irq->sleep_mode = sleep_mode; } static inline void irq_destroy (void *irq) { Irq *_irq = (Irq *)irq; if (_irq == NULL) return; class_destroy (irq); } static inline DList *irq_list_add (DList *head, IntVect *vector); static inline DList *irq_list_delete (DList *head, IntVect *vector); #if 0 /* TRoth/2002-09-15: This isn't used. ??? */ static inline Irq *irq_list_lookup_addr (DList *head, IntVect *vector); #endif static int irq_cmp_addr (AvrClass *d1, AvrClass *d2); static int irq_cmp_pending (AvrClass *d1, AvrClass *d2); /* Compare function for break points. */ static int irq_cmp_addr (AvrClass *d1, AvrClass *d2) { return ((Irq *)d1)->vector->addr - ((Irq *)d2)->vector->addr; } static inline DList * irq_list_add (DList *head, IntVect *vector) { Irq *irq = irq_new (vector, 0, 0); return dlist_add (head, (AvrClass *)irq, irq_cmp_addr); } static inline DList * irq_list_delete (DList *head, IntVect *vector) { Irq *irq = irq_new (vector, 0, 0); head = dlist_delete (head, (AvrClass *)irq, irq_cmp_addr); class_unref ((AvrClass *)irq); return head; } #if 0 /* TRoth/2002-09-15: This isn't used. ??? */ static inline Irq * irq_list_lookup_addr (DList *head, IntVect *vector) { Irq *found; Irq *irq = irq_new (vector, 0, 0); found = (Irq *)dlist_lookup (head, (AvrClass *)irq, irq_cmp_addr); class_unref ((AvrClass *)irq); return found; } #endif static int irq_cmp_pending (AvrClass *d1, AvrClass *d2) { Irq *i1 = (Irq *)d1; /* This is the irq which might be ready to be vectored into. */ int state = ((Irq *)d2)->state; /* The state the device is currently in. */ unsigned int sleep_mode = ((Irq *)d2)->sleep_mode; /* This is the sleep mode the device in currently in. Only one bit should be set. */ if (state == STATE_SLEEP) { /* If device is in the sleep state, the irq will only pending if it can wake up the device. */ if (sleep_mode & i1->vector->can_wake) return 0; /* vector into the irq */ else return -1; /* try the next irq */ } /* If the state is not STATE_SLEEP, any irq we see is automatically pending, so vector it. */ return 0; } /* Walk the list looking for a pending irq which can be handled. If the device is in a sleep state, the can_wake mask could force the head of the list to not be the irq which gets vectored. */ static inline IntVect * irq_get_pending_vector (DList *head, int state, unsigned int sleep_mode) { Irq *found; Irq *irq = irq_new (NULL, state, sleep_mode); found = (Irq *)dlist_lookup (head, (AvrClass *)irq, irq_cmp_pending); class_unref ((AvrClass *)irq); return found->vector; } #if 0 /* TRoth/2002-09-15: This isn't used. ??? */ static inline IntVect * irq_get_head_vector (DList *head) { return ((Irq *)dlist_get_head_data (head))->vector; } #endif /***************************************************************************\ * * AvrCore(AvrClass) Methods * \***************************************************************************/ static void avr_core_construct (AvrCore *core, DevSuppDefn *dev); /** \name AvrCore handling methods */ /*@{*/ /** \brief Allocate a new AvrCore object. */ AvrCore * avr_core_new (char *dev_name) { AvrCore *core = NULL; DevSuppDefn *dev = dev_supp_lookup_device (dev_name); if (dev) { fprintf (stderr, "\nSimulating a %s device.\n\n", dev_name); core = avr_new (AvrCore, 1); avr_core_construct (core, dev); class_overload_destroy ((AvrClass *)core, avr_core_destroy); } return core; } /** \brief Constructor for the AvrCore class. */ static void avr_core_construct (AvrCore *core, DevSuppDefn *dev) { int flash_sz = dev_supp_get_flash_sz (dev); int PC_sz = dev_supp_get_PC_sz (dev); int stack_sz = dev_supp_get_stack_sz (dev); int sram_sz = dev_supp_get_sram_sz (dev); int vtab_idx = dev_supp_get_vtab_idx (dev); int addr; if (core == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)core); core->state = STATE_STOPPED; core->sleep_mode = 0; /* each bit represents a sleep mode */ core->PC = 0; core->PC_size = PC_sz; core->PC_max = flash_sz / 2; /* flash_sz is in bytes, need number of words here */ core->flash = flash_new (flash_sz); core->breakpoints = NULL; core->irq_pending = NULL; core->irq_vtable = (IntVect *)(global_vtable_list[vtab_idx]); core->irq_offset = 0; core->CK = 0; core->inst_CKS = 0; core->clk_cb = NULL; core->async_cb = NULL; /* FIXME: hack to get it to compile. */ if (dev_supp_has_ext_io_reg (dev)) core->mem = mem_new (0x1f, 0xff, 0xff + sram_sz, 0xffff); else core->mem = mem_new (0x1f, 0x5f, 0x5f + sram_sz, 0xffff); /* Attach the gpwr's to the memory bus. */ core->gpwr = gpwr_new (); for (addr = 0; addr < 0x20; addr++) { static char *reg_name[] = { "r00", "r01", "r02", "r03", "r04", "r05", "r06", "r07", "r08", "r09", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" }; avr_core_attach_vdev (core, addr, reg_name[addr], (VDevice *)core->gpwr, 0, 0, 0xff, 0xff); } dev_supp_attach_io_regs (core, dev); /* Set up the stack. */ if (stack_sz) { core->stack = (Stack *)hwstack_new (stack_sz); } else { /* Assuming that SPL is always at 0x5d. */ core->stack = (Stack *)memstack_new (core->mem, 0x5d); } /* Assuming the SREG is always at 0x5f. */ core->sreg = (SREG *)avr_core_get_vdev_by_addr (core, 0x5f); class_ref ((AvrClass *)core->sreg); /* Assuming that RAMPZ is always at 0x5b. If the device doesn't support RAMPZ, install a NULL pointer. */ core->rampz = (RAMPZ *)avr_core_get_vdev_by_addr (core, 0x5b); if (core->rampz) class_ref ((AvrClass *)core->rampz); /* Attach the internal sram to the memory bus if needed. */ if (sram_sz) { int base; VDevice *sram; if (dev_supp_has_ext_io_reg (dev)) base = SRAM_EXTENDED_IO_BASE; else base = SRAM_BASE; core->sram = sram_new (base, sram_sz); sram = (VDevice *)core->sram; avr_message ("attach: Internal SRAM from 0x%04x to 0x%04x\n", base, (base + sram_sz - 1)); for (addr = base; addr < (base + sram_sz); addr++) { avr_core_attach_vdev (core, addr, "Internal SRAM", sram, 0, 0, 0xff, 0xff); } } else { core->sram = NULL; } /* Initialize the decoder lookup table */ decode_init_lookup_table (); } /** * \brief Destructor for the AvrCore class. * * Not to be called directly, except by a derived class. * Called via class_unref. */ void avr_core_destroy (void *core) { AvrCore *_core = (AvrCore *)core; if (_core == NULL) return; class_unref ((AvrClass *)_core->sreg); class_unref ((AvrClass *)_core->flash); class_unref ((AvrClass *)_core->gpwr); class_unref ((AvrClass *)_core->mem); class_unref ((AvrClass *)_core->stack); dlist_delete_all (_core->breakpoints); dlist_delete_all (_core->clk_cb); dlist_delete_all (_core->async_cb); dlist_delete_all (_core->irq_pending); class_destroy (core); } /** \brief Query the sizes of the 3 memory spaces: flash, sram, and eeprom. */ void avr_core_get_sizes (AvrCore *core, int *flash, int *sram, int *sram_start, int *eeprom) { *flash = flash_get_size (core->flash); if (core->sram) { *sram = sram_get_size (core->sram); *sram_start = sram_get_base (core->sram); } else { *sram = 0; *sram_start = 0; } if (core->eeprom) *eeprom = eeprom_get_size (core->eeprom); else *eeprom = 0; } /** \brief Attach a virtual device into the Memory. */ extern inline void avr_core_attach_vdev (AvrCore *core, uint16_t addr, char *name, VDevice *vdev, int flags, uint8_t reset_value, uint8_t rd_mask, uint8_t wr_mask); /** \brief Returns the \c VDevice with the name \a name. */ extern inline VDevice *avr_core_get_vdev_by_name (AvrCore *core, char *name); /** \brief Returns the \c VDevice which handles the address \a addr. */ extern inline VDevice *avr_core_get_vdev_by_addr (AvrCore *core, int addr); /** \brief Sets the device's state (running, stopped, breakpoint, sleep). */ extern inline void avr_core_set_state (AvrCore *core, StateType state); /** \brief Returns the device's state (running, stopped, breakpoint, sleep). */ extern inline int avr_core_get_state (AvrCore *core); /** \brief Sets the device to a sleep state. * \param core Pointer to the core. * \param sleep_mode The BITNUMBER of the sleepstate. */ extern inline void avr_core_set_sleep_mode (AvrCore *core, int sleep_mode); /** \brief Return the device's sleepmode. */ extern inline int avr_core_get_sleep_mode (AvrCore *core); /*@}*/ /** \name Program Memory Space Access Methods */ /*@{*/ /** \brief Reads a word from flash memory. */ static inline uint16_t avr_core_flash_read (AvrCore *core, int addr); /** \brief Writes a word to flash memory. */ static inline void avr_core_flash_write (AvrCore *core, int addr, uint16_t val); /** \brief Writes a byte to flash memory. * * This function writes the lower 8 bit of a flash word. * Use avr_core_flash_write() write to write a full word, * or avr_core_flash_write_hi8() to write the upper 8 bits. */ static inline void avr_core_flash_write_lo8 (AvrCore *core, int addr, uint8_t val); /** \brief Writes a byte to flash memory. * * This function writes the upper 8 bit of a flash word. * Use avr_core_flash_write() write to write a full word, * or avr_core_flash_write_lo8() to write the lower 8 bits. */ static inline void avr_core_flash_write_hi8 (AvrCore *core, int addr, uint8_t val); /*@}*/ /** \name Data Memory Space Access Methods */ /*@{*/ /** \brief Reads a byte from memory. * * This accesses the \a register \a file and the \a SRAM. */ static inline uint8_t avr_core_mem_read (AvrCore *core, int addr); /** \brief Writes a byte to memory. * * This accesses the \a register \a file and the \a SRAM. */ static inline void avr_core_mem_write (AvrCore *core, int addr, uint8_t val); /*@}*/ /** \name Status Register Access Methods */ /*@{*/ /** \brief Get the value of the status register. */ static inline uint8_t avr_core_sreg_get (AvrCore *core); /** \brief Set the value of the status register. */ static inline void avr_core_sreg_set (AvrCore *core, uint8_t v); /** \brief Get the value of bit \c b of the status register. */ extern inline int avr_core_sreg_get_bit (AvrCore *core, int b); /** \brief Set the value of bit \c b of the status register. */ extern inline void avr_core_sreg_set_bit (AvrCore *core, int b, int v); /*@}*/ /** \name RAMPZ access methods */ /*@{*/ /** \brief Get the value of the rampz register. */ extern inline uint8_t avr_core_rampz_get (AvrCore *core); /** \brief Set the value of the rampz register. */ extern inline void avr_core_rampz_set (AvrCore *core, uint8_t v); /*@}*/ /** * \Name General Purpose Working Register Access Methods */ /*@{*/ /** \brief Returns a GPWR's(\a r0-r31) value. */ static inline uint8_t avr_core_gpwr_get (AvrCore *core, int reg); /** \brief Writes a GPWR's (\a r0-r31) value. */ static inline void avr_core_gpwr_set (AvrCore *core, int reg, uint8_t val); /*@}*/ /** * \name Direct I/O Register Access Methods * * IO Registers are mapped in memory directly after the 32 (0x20) * general registers. */ /*@{*/ /** \brief Displays all registers. */ void avr_core_io_display_names (AvrCore *core) { int i; uint8_t val; char name[80]; for (i = IO_REG_ADDR_BEGIN; i < IO_REG_ADDR_END; i++) { mem_io_fetch (core->mem, i, &val, name, sizeof (name) - 1); display_io_reg_name (i - IO_REG_ADDR_BEGIN, name); } } /** \brief Reads the value of a register. * \param core Pointer to the core. * \param reg The registers address. This address is counted above the * beginning of the registers memory block (0x20). */ extern inline uint8_t avr_core_io_read (AvrCore *core, int reg); /** \brief Writes the value of a register. * See avr_core_io_read() for a discussion of \a reg. */ extern inline void avr_core_io_write (AvrCore *core, int reg, uint8_t val); /** \brief Read an io register into val and put the name of the register into * buf. */ static inline void avr_core_io_fetch (AvrCore *core, int reg, uint8_t * val, char *buf, int bufsiz); /*@}*/ /** \name Stack Methods */ /*@{*/ /** \brief Pop 1-4 bytes off of the stack. * * See stack_pop() for more details. */ extern inline uint32_t avr_core_stack_pop (AvrCore *core, int bytes); /** \brief Push 1-4 bytes onto the stack. * * See stack_push() for more details. */ extern inline void avr_core_stack_push (AvrCore *core, int bytes, uint32_t val); /*@}*/ /** \name Program Counter Methods */ /*@{*/ /** \brief Returns the size of the Program Counter in bytes. * * Most devices have a 16-bit PC (2 bytes), but some larger ones * (e.g. mega256), have a 22-bit PC (3 bytes). */ extern inline int32_t avr_core_PC_size (AvrCore *core); /** \brief Returns the maximum value of the Program Counter. * * This is flash_size / 2. */ static inline int32_t avr_core_PC_max (AvrCore *core); /** \brief Return the current of the Program Counter. */ static inline int32_t avr_core_PC_get (AvrCore *core); /** \brief Set the Program Counter to val. * * If val is not in the valid range of PC values, it is adjusted to fall in * the valid range. */ static inline void avr_core_PC_set (AvrCore *core, int32_t val); /** \brief Increment the Program Counter by val. * * val can be either positive or negative. * * If the result of the incrememt is outside the valid range for PC, it is * adjusted to fall in the valid range. This allows addresses to wrap around * the end of the insn space. */ extern inline void avr_core_PC_incr (AvrCore *core, int val); /*@}*/ /** \name Methods for accessing CK and instruction Clocks */ /*@{*/ /** \brief Get the current clock counter. */ extern inline uint64_t avr_core_CK_get (AvrCore *core); /** \brief Increment the clock counter. */ extern inline void avr_core_CK_incr (AvrCore *core); /** \brief Get the number of clock cycles remaining for the currently * executing instruction. */ extern inline int avr_core_inst_CKS_get (AvrCore *core); /** \brief Set the number of clock cycles for the instruction being * executed. */ extern inline void avr_core_inst_CKS_set (AvrCore *core, int val); /** \name Interrupt Access Methods. */ /*@{*/ /** \brief Gets the first pending irq. */ IntVect * avr_core_irq_get_pending (AvrCore *core) { return irq_get_pending_vector (core->irq_pending, core->state, core->sleep_mode); } /** \brief Raises an irq by adding it's data to the irq_pending list. */ void avr_core_irq_raise (AvrCore *core, int irq) { IntVect *irq_ptr = &core->irq_vtable[irq]; #if !defined(DISABLE_IRQ_MESSAGES) avr_message ("Raising irq # %d [%s at 0x%x]\n", irq, irq_ptr->name, irq_ptr->addr * 2); #endif core->irq_pending = irq_list_add (core->irq_pending, irq_ptr); } /** \brief Calls the interrupt's callback to clear the flag. */ void avr_core_irq_clear (AvrCore *core, IntVect *irq) { core->irq_pending = irq_list_delete (core->irq_pending, irq); } /** \brief Removes all irqs from the irq_pending list. */ extern inline void avr_core_irq_clear_all (AvrCore *core); /*@}*/ /** \name Break point access methods. */ /*@{*/ /** \brief Inserts a break point. */ void avr_core_insert_breakpoint (AvrCore *core, int pc) { #define BREAK_OPCODE 0x9598 uint16_t insn = flash_read (core->flash, pc); core->breakpoints = brk_pt_list_add (core->breakpoints, pc, insn); flash_write (core->flash, pc, BREAK_OPCODE); } /** \brief Removes a break point. */ void avr_core_remove_breakpoint (AvrCore *core, int pc) { BreakPt *bp; bp = brk_pt_list_lookup (core->breakpoints, pc); if (bp) { uint16_t insn = bp->opcode; core->breakpoints = brk_pt_list_delete (core->breakpoints, pc); flash_write (core->flash, pc, insn); } } #ifndef DOXYGEN /* don't expose to doxygen */ struct bp_enable_data { AvrCore *core; int enable; }; #endif /* DOXYGEN */ static int iter_enable_breakpoint (AvrClass *data, void *user_data) { BreakPt *bp = (BreakPt *)data; struct bp_enable_data *bed = (struct bp_enable_data *)user_data; if (bed->enable) { uint16_t insn = flash_read (bed->core->flash, bp->pc); if (insn != BREAK_OPCODE) { /* Enable the breakpoint */ bp->opcode = insn; flash_write (bed->core->flash, bp->pc, BREAK_OPCODE); } } else { /* Disable the breakpoint */ flash_write (bed->core->flash, bp->pc, bp->opcode); } return 0; /* Don't delete any item from the list. */ } /** \brief Disable breakpoints. Disables all breakpoints that where set using avr_core_insert_breakpoint(). The breakpoints are not removed from the breakpoint list. */ void avr_core_disable_breakpoints (AvrCore *core) { struct bp_enable_data bed = { core, 0 }; core->breakpoints = brk_pt_iterator (core->breakpoints, iter_enable_breakpoint, &bed); } /** \brief Enable breakpoints. Enables all breakpoints that where previous disabled. */ void avr_core_enable_breakpoints (AvrCore *core) { struct bp_enable_data bed = { core, 1 }; core->breakpoints = brk_pt_iterator (core->breakpoints, iter_enable_breakpoint, &bed); } /*@}*/ /* Private Execute an instruction. Presets the number of instruction clocks to zero so that break points and invalid opcodes don't add extraneous clock counts. Also checks for software breakpoints. Any opcode except 0xffff can be a breakpoint. Returns BREAK_POINT, or >= 0. */ static int exec_next_instruction (AvrCore *core) { int result, pc; uint16_t opcode; struct opcode_info *opi; pc = avr_core_PC_get (core); opcode = flash_read (core->flash, pc); /* Preset the number of instruction clocks to zero so that break points and invalid opcodes don't add extraneous clock counts. */ avr_core_inst_CKS_set (core, 0); opi = decode_opcode (opcode); result = opi->func (core, opcode, opi->arg1, opi->arg2); if (global_debug_inst_output) fprintf (stderr, "0x%06x (0x%06x) : 0x%04x : %s\n", pc, pc * 2, opcode, global_opcode_name[result]); return result; } /** \name Program control methods */ /*@{*/ /* * Private * * Checks to see if an interrupt is pending. If any are pending, and * if SREG(I) is set, the following will occur: * - push current PC onto stack * - PC <- interrupt vector * - I flag of SREG is cleared * * Reset vector is not controlled by the SREG(I) flag, thus if reset * interrupt has occurred, the device will be reset irregardless of state * of SREG(I). * * \note There are different ways of doing this: * - In register.c wdtcr_intr_cb() we can directly reset the MCU without * the use of irqs. This would require to make the callback an async * callback and it would allow the speed improvments commented out below * to be activated. * - Keep it as an interrupt an waste CPU time. * * Ted, what do you think we should do? */ static void avr_core_check_interrupts (AvrCore *core) { IntVect *irq; if (core->irq_pending) { irq = avr_core_irq_get_pending (core); if (irq) { if (irq->name == NULL) { avr_error ("Raised an invalid irq for device"); } if (irq->addr == IRQ_RESET_ADDR) { /* The global interrupt (SREG.I) never blocks a reset. We don't need to clear the irq since a reset clears all pending irq's. */ avr_core_reset (core); } if (avr_core_sreg_get_bit (core, SREG_I)) { int pc = avr_core_PC_get (core); int pc_bytes = avr_core_PC_size (core); avr_core_stack_push (core, pc_bytes, pc); avr_core_sreg_set_bit (core, SREG_I, 0); #if !defined(DISABLE_IRQ_MESSAGES) avr_message ("Vectoring to irq at addr:0x%x offset:0x%x\n", irq->addr * 2, core->irq_offset * 2); #endif avr_core_PC_set (core, irq->addr + core->irq_offset); avr_core_irq_clear (core, irq); } } } } /** * \brief Process a single program instruction, all side effects and * peripheral stimulii. * * Executes instructions, calls callbacks, and checks for interrupts. */ int avr_core_step (AvrCore *core) { int res = 0; int state; /* The MCU is stopped when in one of the many sleep modes */ state = avr_core_get_state (core); if (state != STATE_SLEEP) { /* execute an instruction; may change state */ res = exec_next_instruction (core); } /* Execute the clock callbacks */ while (core->inst_CKS > 0) { /* propagate clocks here */ avr_core_clk_cb_exec (core); avr_core_CK_incr (core); core->inst_CKS--; } /* FIXME: async cb's and interrupt checking might need to be put somewhere else. */ /* Execute the asynchronous callbacks */ avr_core_async_cb_exec (core); /* Check interrupts here. If the previous instruction was a reti, then we need to delay handling of any pending IRQs until after the next instruction is executed. */ if (res != opcode_RETI) avr_core_check_interrupts (core); return res; } /** \brief Start the processing of instructions by the simulator. * * The simulated device will run until one of the following occurs: * - The state of the core is no longer STATE_RUNNING. * - The simulator receives a SIGINT signal. * - A breakpoint is reached (currently causes core to stop running). * - A fatal internal error occurs. * * \note When running simulavr in gdb server mode, this function is not * used. The avr_core_step() function is called repeatedly in a loop when the * continue command is issued from gdb. As such, the functionality in this * loop should be kept to a minimum. * * \todo Should add some basic breakpoint handling here. Maybe allow * continuing, and simple breakpoint management (disable, delete, set) */ void avr_core_run (AvrCore *core) { uint64_t cnt = 0; int res; uint64_t start_time, run_time; avr_core_reset (core); /* make sure the device is in a sane state. */ core->state = STATE_RUNNING; signal_watch_start (SIGINT); /* FIXME: [TRoth 2002/03/19] This loop isn't going to handle sleep or idle modes properly. */ start_time = get_program_time (); while (core->state == STATE_RUNNING) { if (signal_has_occurred (SIGINT)) break; res = avr_core_step (core); if (res == BREAK_POINT) break; cnt++; } run_time = get_program_time () - start_time; signal_watch_stop (SIGINT); /* avoid division by zero below */ if (run_time == 0) run_time = 1; avr_message ("Run time was %lld.%03lld seconds.\n", run_time / 1000, run_time % 1000); if (run_time == 0) run_time = 1; /* Avoid division by zero. */ avr_message ("Executed %lld instructions.\n", cnt); avr_message (" %lld insns/sec\n", (cnt * 1000) / run_time); avr_message ("Executed %lld clock cycles.\n", avr_core_CK_get (core)); avr_message (" %lld clks/sec\n", (avr_core_CK_get (core) * 1000) / run_time); } /** \brief Sets the simulated CPU back to its initial state. * * Zeroes out PC, IRQ's, clock, and memory. */ void avr_core_reset (AvrCore *core) { avr_core_PC_set (core, 0); avr_core_irq_clear_all (core); avr_core_inst_CKS_set (core, 0); /* Send clock cycles to display. Normaly the clockcycles must not be reset here! This leads to an error in the vcd file. */ display_clock (core->CK); mem_reset (core->mem); } /*@}*/ /** \name Callback Handling Methods */ /*@{*/ /** * \brief For adding external read and write callback functions. * * rd and wr should come in pairs, but it is safe to add * empty function via passing a NULL pointer for either function. * * \param core A pointer to an AvrCore object. * * \param port_id The ID for handling the simulavr inheritance model. * * \param ext_rd Function for the device core to call when it needs to * communicate with the external world via I/O Ports. * * \param ext_wr Function for the device core to call when it needs to * communicate with the external world via I/O Ports. * */ void avr_core_add_ext_rd_wr (AvrCore *core, int addr, PortFP_ExtRd ext_rd, PortFP_ExtWr ext_wr) { Port *p = (Port *)mem_get_vdevice_by_addr (core->mem, addr); if (p == NULL) { avr_warning ("Device does not have vdevice at 0x%04x.\n", addr); return; } port_add_ext_rd_wr (p, ext_rd, ext_wr); } /** * \brief Add a new clock callback to list. */ extern inline void avr_core_clk_cb_add (AvrCore *core, CallBack *cb); /** * \brief Add a new asynchronous callback to list. */ extern inline void avr_core_async_cb_add (AvrCore *core, CallBack *cb); /** \brief Run all the callbacks in the list. If a callback returns non-zero (true), then it is done with it's job and wishes to be removed from the list. The time argument has dual meaning. If the callback list is for the clock callbacks, time is the value of the CK clock counter. If the callback list is for the asynchronous callback, time is the number of milliseconds from some unknown, arbitrary time on the host system. */ extern inline void avr_core_clk_cb_exec (AvrCore *core); /** * \brief Run all the asynchronous callbacks. */ extern inline void avr_core_async_cb_exec (AvrCore *core); /*@}*/ /** * \brief Dump the contents of the entire CPU core. * * \param core A pointer to an AvrCore object. * \param f_core An open file descriptor. */ void avr_core_dump_core (AvrCore *core, FILE * f_core) { unsigned int pc = avr_core_PC_get (core); fprintf (f_core, "PC = 0x%06x (PC*2 = 0x%06x)\n\n", pc, pc * 2); mem_dump_core (core->mem, f_core); flash_dump_core (core->flash, f_core); } /** * \brief Load a program from an input file. */ int avr_core_load_program (AvrCore *core, char *file, int format) { return flash_load_from_file (core->flash, file, format); } /** \brief Load a program from an input file. */ int avr_core_load_eeprom (AvrCore *core, char *file, int format) { EEProm *ee = (EEProm *)mem_get_vdevice_by_name (core->mem, "EEProm"); return eeprom_load_from_file (ee, file, format); } simulavr-0.1.2.2/src/avrcore.h0000644000175000001440000003120110006401504013015 00000000000000/* * $Id: avrcore.h,v 1.15 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_AVRCORE_H #define SIM_AVRCORE_H #include "intvects.h" #include "display.h" /****************************************************************************\ * * AvrCore(AvrClass) Definition * \****************************************************************************/ extern int global_debug_inst_output; typedef enum { STATE_RUNNING, /* normal running */ STATE_STOPPED, /* stopped, not running */ STATE_BREAK_PT, /* at a break point */ STATE_SLEEP, /* Sleep mode (there are many sleep modes. */ } StateType; typedef struct _AvrCore AvrCore; struct _AvrCore { AvrClass parent; int state; /* What state is the device in */ int sleep_mode; /* If in sleep state, what mode? */ int32_t PC; /* Program Counter */ int32_t PC_size; /* size of Program Counter in bytes */ int32_t PC_max; /* maximum value PC can hold for a given device (is flash_sz/2) */ SREG *sreg; /* Status Register */ GPWR *gpwr; /* General Purpose Working Registers */ Flash *flash; /* flash program memory */ EEProm *eeprom; /* internal eeprom memory */ SRAM *sram; /* internal sram memory */ Memory *mem; /* memory space (gp reg, io reg, sram, ext sram, etc) */ Stack *stack; /* a stack implementaton */ DList *breakpoints; /* head of list of active breakpoints */ DList *irq_pending; /* head of list of pending interrupts (sorted by priority) */ IntVect *irq_vtable; /* interrupt vector table array */ int irq_offset; /* Some devices (e.g. mega128) will let you add an offset to the vector addr. */ uint64_t CK; /* for keeping track of how many clock cycles have occurred */ int inst_CKS; /* number of clocks the previously executed instruction took */ DList *clk_cb; /* head of list of clock callback items. If a clock callback function uses the time argument, it is to be interpreted as the number of clock cycles that have occured since a reset. */ DList *async_cb; /* head of list of asynchronous callback items. If an async callback function uses the time argument, it is to be interpreted as the approximate number of milliseconds that have elapsed from some unknown time on the host system. */ /* * These registers will go somewhere else once I see a device that * actually uses them. */ uint8_t RAMPX; /* Registers concatenated with the X, Y and Z registers */ uint8_t RAMPY; /* enabling indirect addressing of the wholw data space */ RAMPZ *rampz; /* on MCUs with more than 64K bytes date space, and constant */ /* data fetch on MCUs with more than 64K bytes profram space. */ uint8_t RAMPD; /* Register concatenated with the Z register enabling direct addressing of the while data space on MCUs with more than 64K bytes data space */ uint8_t EIND; /* Register concatenated with the instruction word enabling indirect jump and call to the whole program space on MCUs with more than 64K bytes program space. */ }; extern AvrCore *avr_core_new (char *dev_name); extern void avr_core_destroy (void *core); extern void avr_core_get_sizes (AvrCore *core, int *flash, int *sram, int *sram_start, int *eeprom); /* Attach a Virtual Device to the core */ extern inline void avr_core_attach_vdev (AvrCore *core, uint16_t addr, char *name, VDevice *vdev, int flags, uint8_t reset_value, uint8_t rd_mask, uint8_t wr_mask) { vdev_set_core (vdev, (AvrClass *)core); mem_attach (core->mem, addr, name, vdev, flags, reset_value, rd_mask, wr_mask); } extern inline VDevice * avr_core_get_vdev_by_name (AvrCore *core, char *name) { return mem_get_vdevice_by_name (core->mem, name); } extern inline VDevice * avr_core_get_vdev_by_addr (AvrCore *core, int addr) { return mem_get_vdevice_by_addr (core->mem, addr); } extern inline void avr_core_set_addr_name (AvrCore *core, int addr, char *name) { mem_set_addr_name (core->mem, addr, name); } /* State Access Methods */ extern inline int avr_core_get_state (AvrCore *core) { return core->state; } extern inline void avr_core_set_state (AvrCore *core, StateType state) { core->state = state; } /* Sleep Mode Access Methods */ extern inline void avr_core_set_sleep_mode (AvrCore *core, int sleep_mode) { core->state = STATE_SLEEP; core->sleep_mode = ((unsigned int)1 << sleep_mode); } extern inline int avr_core_get_sleep_mode (AvrCore *core) { return core->sleep_mode; } /* Program Memory Space Access Methods */ static inline uint16_t avr_core_flash_read (AvrCore *core, int addr) { return flash_read (core->flash, addr); } static inline void avr_core_flash_write (AvrCore *core, int addr, uint16_t val) { flash_write (core->flash, addr, val); } static inline void avr_core_flash_write_lo8 (AvrCore *core, int addr, uint8_t val) { flash_write_lo8 (core->flash, addr, val); } static inline void avr_core_flash_write_hi8 (AvrCore *core, int addr, uint8_t val) { flash_write_hi8 (core->flash, addr, val); } /* Data Memory Space Access Methods */ static inline uint8_t avr_core_mem_read (AvrCore *core, int addr) { return mem_read (core->mem, addr); } static inline void avr_core_mem_write (AvrCore *core, int addr, uint8_t val) { mem_write (core->mem, addr, val); } /* Status Register Access Methods */ static inline uint8_t avr_core_sreg_get (AvrCore *core) { return sreg_get (core->sreg); } static inline void avr_core_sreg_set (AvrCore *core, uint8_t v) { sreg_set (core->sreg, v); } extern inline int avr_core_sreg_get_bit (AvrCore *core, int b) { return sreg_get_bit (core->sreg, b); } extern inline void avr_core_sreg_set_bit (AvrCore *core, int b, int v) { sreg_set_bit (core->sreg, b, v); } /* RAMPZ Access Methods */ extern inline uint8_t avr_core_rampz_get (AvrCore *core) { if (core->rampz) return rampz_get (core->rampz); else return 0; } extern inline void avr_core_rampz_set (AvrCore *core, uint8_t v) { if (core->rampz) rampz_set (core->rampz, v); } /* General Purpose Working Register Access Methods */ static inline uint8_t avr_core_gpwr_get (AvrCore *core, int reg) { return gpwr_get (core->gpwr, reg); } static inline void avr_core_gpwr_set (AvrCore *core, int reg, uint8_t val) { gpwr_set (core->gpwr, reg, val); } /* Direct I/O Register Access Methods */ extern void avr_core_io_display_names (AvrCore *core); extern inline uint8_t avr_core_io_read (AvrCore *core, int reg) { return avr_core_mem_read (core, reg + IO_REG_ADDR_BEGIN); } extern inline void avr_core_io_write (AvrCore *core, int reg, uint8_t val) { avr_core_mem_write (core, reg + IO_REG_ADDR_BEGIN, val); } static inline void avr_core_io_fetch (AvrCore *core, int reg, uint8_t * val, char *buf, int bufsiz) { mem_io_fetch (core->mem, reg + IO_REG_ADDR_BEGIN, val, buf, bufsiz); } /* Stack Access Methods */ extern inline uint32_t avr_core_stack_pop (AvrCore *core, int bytes) { return stack_pop (core->stack, bytes); } extern inline void avr_core_stack_push (AvrCore *core, int bytes, uint32_t val) { stack_push (core->stack, bytes, val); } /* Private Deal with PC reach-arounds. It's possible to set/incrment the program counter with large negative values which go past zero. These should be interpreted as wrapping back around the last address in the flash. */ extern inline void _adjust_PC_to_max (AvrCore *core) { if (core->PC < 0) core->PC = core->PC_max + core->PC; if (core->PC >= core->PC_max) core->PC -= core->PC_max; } /* Program Counter Access Methods */ extern inline int32_t avr_core_PC_size (AvrCore *core) { return core->PC_size; } static inline int32_t avr_core_PC_max (AvrCore *core) { return core->PC_max; } static inline int32_t avr_core_PC_get (AvrCore *core) { return core->PC; } static inline void avr_core_PC_set (AvrCore *core, int32_t val) { core->PC = val; _adjust_PC_to_max (core); display_pc (core->PC); } extern inline void avr_core_PC_incr (AvrCore *core, int val) { core->PC += val; _adjust_PC_to_max (core); display_pc (core->PC); } /* Interrupt Access Methods */ extern void avr_core_irq_raise (AvrCore *core, int irq); extern void avr_core_irq_clear (AvrCore *core, IntVect *irq); extern inline void avr_core_irq_clear_all (AvrCore *core) { dlist_delete_all (core->irq_pending); core->irq_pending = NULL; } extern IntVect *avr_core_irq_get_pending (AvrCore *core); /* Loading files into various memory areas */ extern int avr_core_load_program (AvrCore *core, char *file, int format); extern int avr_core_load_eeprom (AvrCore *core, char *file, int format); /* Dump a core file */ extern void avr_core_dump_core (AvrCore *core, FILE * f_core); /* Methods for running programs */ extern int avr_core_step (AvrCore *core); extern void avr_core_run (AvrCore *core); extern void avr_core_reset (AvrCore *core); /* Methods for accessing CK and inst_CKS */ extern inline uint64_t avr_core_CK_get (AvrCore *core) { return core->CK; } extern inline void avr_core_CK_incr (AvrCore *core) { core->CK++; /* Send clock cycles to display */ display_clock (core->CK); } extern inline int avr_core_inst_CKS_get (AvrCore *core) { return core->inst_CKS; } extern inline void avr_core_inst_CKS_set (AvrCore *core, int val) { core->inst_CKS = val; } /* Methods for handling clock callbacks */ extern inline void avr_core_clk_cb_add (AvrCore *core, CallBack *cb) { core->clk_cb = callback_list_add (core->clk_cb, cb); } extern inline void avr_core_clk_cb_exec (AvrCore *core) { core->clk_cb = callback_list_execute_all (core->clk_cb, avr_core_CK_get (core)); } /* Methods for handling asynchronous callbacks */ extern inline void avr_core_async_cb_add (AvrCore *core, CallBack *cb) { core->async_cb = callback_list_add (core->async_cb, cb); } extern inline void avr_core_async_cb_exec (AvrCore *core) { core->async_cb = callback_list_execute_all (core->async_cb, get_program_time ()); } /* For adding external read and write callback functions */ extern void avr_core_add_ext_rd_wr (AvrCore *core, int addr, PortFP_ExtRd ext_rd, PortFP_ExtWr ext_wr); /* Break point access methods */ extern void avr_core_insert_breakpoint (AvrCore *core, int pc); extern void avr_core_remove_breakpoint (AvrCore *core, int pc); extern void avr_core_enable_breakpoints (AvrCore *core); extern void avr_core_disable_breakpoints (AvrCore *core); #endif /* SIM_AVRCORE_H */ simulavr-0.1.2.2/src/avrerror.c0000644000175000001440000000645010006401504013221 00000000000000/* * $Id: avrerror.c,v 1.8 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** \file avrerror.c \brief Functions for printing messages, warnings and errors. This module provides output printing facilities. */ #include #include #include #include #include "avrerror.h" #if MACRO_DOCUMENTATION /** \brief Print an ordinary message to stdout. */ #define avr_message(fmt, args...) \ private_avr_message(__FILE__, __LINE__, fmt, ## args) /** \brief Print a warning message to stderr. */ #define avr_warning(fmt, args...) \ private_avr_warning(__FILE__, __LINE__, fmt, ## args) /** \brief Print an error message to stderr and terminate program. */ #define avr_error(fmt, args...) \ private_avr_error(__FILE__, __LINE__, fmt, ## args) #else /* Not Documentation */ #if 1 static char * strip_dir (char *path) { char *p = path; /* Find the end. */ while (*p++) ; /* Find the last '/'. */ while (p != path) { if (*p == '/') { p++; break; } p--; } return p; } #else # define strip_dir(path) (path) #endif #define FLUSH_OUTPUT 1 void private_avr_message (char *file, int line, char *fmt, ...) { va_list ap; char ffmt[128]; snprintf (ffmt, sizeof (ffmt), "%s:%d: MESSAGE: %s", strip_dir (file), line, fmt); ffmt[127] = '\0'; va_start (ap, fmt); vfprintf (stdout, ffmt, ap); va_end (ap); #if defined (FLUSH_OUTPUT) fflush (stdout); #endif } void private_avr_warning (char *file, int line, char *fmt, ...) { va_list ap; char ffmt[128]; snprintf (ffmt, sizeof (ffmt), "%s:%d: WARNING: %s", strip_dir (file), line, fmt); ffmt[127] = '\0'; va_start (ap, fmt); vfprintf (stderr, ffmt, ap); va_end (ap); #if defined (FLUSH_OUTPUT) fflush (stderr); #endif } void private_avr_error (char *file, int line, char *fmt, ...) { va_list ap; char ffmt[128]; snprintf (ffmt, sizeof (ffmt), "\n%s:%d: ERROR: %s\n\n", strip_dir (file), line, fmt); ffmt[127] = '\0'; va_start (ap, fmt); vfprintf (stderr, ffmt, ap); va_end (ap); #if defined (FLUSH_OUTPUT) fflush (stderr); #endif exit (1); /* exit instead of abort */ } #endif /* Not documenation */ simulavr-0.1.2.2/src/avrerror.h0000644000175000001440000000356407762567530013264 00000000000000/* * $Id: avrerror.h,v 1.3 2003/12/01 07:35:52 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_AVRERROR_H #define SIM_AVRERROR_H /* FIXME: TRoth 2002-02-23 : '## args' is gcc specific. If porting to another compiler, this will have to be handled. Although, I beleive the C99 standard added this to precompiler. */ /* If these macros are changed, update the documentation in avrerror.c */ #define avr_message(fmt, args...) \ private_avr_message(__FILE__, __LINE__, fmt, ## args) #define avr_warning(fmt, args...) \ private_avr_warning(__FILE__, __LINE__, fmt, ## args) #define avr_error(fmt, args...) \ private_avr_error(__FILE__, __LINE__, fmt, ## args) extern void private_avr_message (char *file, int line, char *fmt, ...); extern void private_avr_warning (char *file, int line, char *fmt, ...); extern void private_avr_error (char *file, int line, char *fmt, ...); #endif /* SIM_AVRERROR_H */ simulavr-0.1.2.2/src/avrmalloc.c0000644000175000001440000001230107762602566013361 00000000000000/* * $Id: avrmalloc.c,v 1.7 2003/12/01 09:10:14 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** \file avrmalloc.c \brief Memory Management Functions. This module provides facilities for managing memory. There is no need to check the returned values from any of these functions. Any memory allocation failure is considered fatal and the program is terminated. We want to wrap all functions that allocate memory. This way we can add secret code to track memory usage and debug memory leaks if we want. Right now, I don't want to ;). */ #include #include #include "avrerror.h" #include "avrmalloc.h" /* These macros are only here for documentation purposes. */ #if MACRO_DOCUMENTATION /** \brief Macro for allocating memory. \param type The C type of the memory to allocate. \param count Allocate enough memory hold count types. This macro is just a wrapper for avr_malloc() and should be used to avoid the repetitive task of casting the returned pointer. */ #define avr_new(type, count) \ ((type *) avr_malloc ((unsigned) sizeof (type) * (count))) /** \brief Macro for allocating memory and initializing it to zero. \param type The C type of the memory to allocate. \param count Allocate enough memory hold count types. This macro is just a wrapper for avr_malloc0() and should be used to avoid the repetitive task of casting the returned pointer. */ #define avr_new0(type, count) \ ((type *) avr_malloc0 ((unsigned) sizeof (type) * (count))) /** \brief Macro for allocating memory. \param type The C type of the memory to allocate. \param mem Pointer to existing memory. \param count Allocate enough memory hold count types. This macro is just a wrapper for avr_malloc() and should be used to avoid the repetitive task of casting the returned pointer. */ #define avr_renew(type, mem, count) \ ((type *) avr_realloc (mem, (unsigned) sizeof (type) * (count))) #endif /* MACRO_DOCUMENTATION */ /** \brief Allocate memory and initialize to zero. Use the avr_new() macro instead of this function. There is no need to check the returned value, since this function will terminate the program if the memory allocation fails. No memory is allocated if passed a size of zero. */ void * avr_malloc (size_t size) { if (size) { void *ptr; ptr = malloc (size); if (ptr) return ptr; avr_error ("malloc failed"); } return NULL; } /** \brief Allocate memory and initialize to zero. Use the avr_new0() macro instead of this function. There is no need to check the returned value, since this function will terminate the program if the memory allocation fails. No memory is allocated if passed a size of zero. */ void * avr_malloc0 (size_t size) { if (size) { void *ptr; ptr = calloc (1, size); if (ptr) return ptr; avr_error ("malloc0 failed"); } return NULL; } /** \brief Wrapper for realloc(). x Resizes and possibly allocates more memory for an existing memory block. Use the avr_renew() macro instead of this function. There is no need to check the returned value, since this function will terminate the program if the memory allocation fails. No memory is allocated if passed a size of zero. */ void * avr_realloc (void *ptr, size_t size) { if (size) { ptr = realloc (ptr, size); if (ptr) return ptr; avr_error ("realloc failed\n"); } return NULL; } /** \brief Wrapper for strdup(). Returns a copy of the passed in string. The returned copy must be free'd. There is no need to check the returned value, since this function will terminate the program if the memory allocation fails. It is safe to pass a NULL pointer. No memory is allocated if a NULL is passed. */ char * avr_strdup (const char *s) { if (s) { char *ptr; ptr = strdup (s); if (ptr) return ptr; avr_error ("strdup failed"); } return NULL; } /** \brief Free malloc'd memory. It is safe to pass a null pointer to this function. */ void avr_free (void *ptr) { if (ptr) free (ptr); } simulavr-0.1.2.2/src/avrmalloc.h0000644000175000001440000000423007762567530013371 00000000000000/* * $Id: avrmalloc.h,v 1.3 2003/12/01 07:35:52 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_AVRMALLOC_H #define SIM_AVRMALLOC_H /* Macros for allocating new memory. Automatically performs type cast. If these definitions are changed, the documentation in avrmalloc.c must be changed. */ /** \brief Macro for allocating memory. \param type The C type of the memory to allocate. \param count Allocate enough memory hold count types. This macro is just a wrapper for avr_malloc() and should be used to avoid the repetitive task of casting the returned pointer. */ #define avr_new(type, count) \ ((type *) avr_malloc ((unsigned) sizeof (type) * (count))) #define avr_new0(type, count) \ ((type *) avr_malloc0 ((unsigned) sizeof (type) * (count))) #define avr_renew(type, mem, count) \ ((type *) avr_realloc (mem, (unsigned) sizeof (type) * (count))) /* * Malloc and free wrappers. Perform sanity checks for you. */ extern void *avr_malloc (size_t size); extern void *avr_malloc0 (size_t size); extern void *avr_realloc (void *ptr, size_t size); extern char *avr_strdup (const char *s); extern void avr_free (void *ptr); #endif /* SIM_AVRMALLOC_H */ simulavr-0.1.2.2/src/callback.c0000644000175000001440000000543707762602566013151 00000000000000/* * $Id: callback.c,v 1.5 2003/12/01 09:10:14 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" /****************************************************************************\ * * Clock Call Back methods * \****************************************************************************/ #ifndef DOXYGEN /* don't expose to doxygen */ struct _CallBack { AvrClass parent; CallBack_FP func; /* the callback function */ AvrClass *data; /* user data to be passed to callback function */ }; #endif /* DOXYGEN */ CallBack * callback_new (CallBack_FP func, AvrClass *data) { CallBack *cb; cb = avr_new (CallBack, 1); callback_construct (cb, func, data); class_overload_destroy ((AvrClass *)cb, callback_destroy); return cb; } void callback_construct (CallBack *cb, CallBack_FP func, AvrClass *data) { if (cb == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)cb); cb->func = func; cb->data = data; if (data) class_ref (data); } void callback_destroy (void *cb) { CallBack *_cb = (CallBack *)cb; if (cb == NULL) return; if (_cb->data) class_unref (_cb->data); class_destroy (cb); } DList * callback_list_add (DList *head, CallBack *cb) { return dlist_add (head, (AvrClass *)cb, NULL); } static int callback_execute (AvrClass *data, void *user_data) { CallBack *cb = (CallBack *)data; uint64_t time = *(uint64_t *) user_data; return cb->func (time, cb->data); } DList * callback_list_execute_all (DList *head, uint64_t time) { return dlist_iterator (head, callback_execute, &time); } simulavr-0.1.2.2/src/callback.h0000644000175000001440000000420107762567530013143 00000000000000/* * $Id: callback.h,v 1.4 2003/12/01 07:35:52 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_CALLBACK_H #define SIM_CALLBACK_H /****************************************************************************\ * * CallBack(AvrClass) : Callback Definition * * This structure provides a generic method for installing functions that * should be called by main loop or clock propagator on behave of a virtual * device. * \****************************************************************************/ typedef struct _CallBack CallBack; typedef int (*CallBack_FP) (uint64_t time, AvrClass *data); enum _cb_ret_codes { CB_RET_RETAIN = 0, /* Give the callback in the list and run it again */ CB_RET_REMOVE = 1, /* Remove callback from list */ }; extern CallBack *callback_new (CallBack_FP func, AvrClass *data); extern void callback_construct (CallBack *cb, CallBack_FP func, AvrClass *data); extern void callback_destroy (void *cb); extern DList *callback_list_add (DList *head, CallBack *cb); extern DList *callback_list_execute_all (DList *head, uint64_t time); #endif /* SIM_CALLBACK_H */ simulavr-0.1.2.2/src/decoder.c0000644000175000001440000031440410017320516012772 00000000000000/* * $Id: decoder.c,v 1.35 2004/02/26 07:33:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file decoder.c * \brief Module for handling opcode decoding. * * The heart of the instruction decoder is the decode_opcode() function. * * The decode_opcode() function examines the given opcode to * determine which instruction applies and returns a pointer to a function to * handler performing the instruction's operation. If the given opcode does * not map to an instruction handler, NULL is returned. * * Nearly every instruction in Atmel's Instruction Set Data Sheet will have a * handler function defined. Each handler will perform all the operations * described in the data sheet for a given instruction. A few instructions * have synonyms. For example, CBR is a synonym for ANDI. * * This should all be fairly straight forward. */ #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "decoder.h" struct opcode_info *global_opcode_lookup_table; /** \brief Masks to help extracting information from opcodes. */ enum decoder_operand_masks { /** 2 bit register id ( R24, R26, R28, R30 ) */ mask_Rd_2 = 0x0030, /** 3 bit register id ( R16 - R23 ) */ mask_Rd_3 = 0x0070, /** 4 bit register id ( R16 - R31 ) */ mask_Rd_4 = 0x00f0, /** 5 bit register id ( R00 - R31 ) */ mask_Rd_5 = 0x01f0, /** 3 bit register id ( R16 - R23 ) */ mask_Rr_3 = 0x0007, /** 4 bit register id ( R16 - R31 ) */ mask_Rr_4 = 0x000f, /** 5 bit register id ( R00 - R31 ) */ mask_Rr_5 = 0x020f, /** for 8 bit constant */ mask_K_8 = 0x0F0F, /** for 6 bit constant */ mask_K_6 = 0x00CF, /** for 7 bit relative address */ mask_k_7 = 0x03F8, /** for 12 bit relative address */ mask_k_12 = 0x0FFF, /** for 22 bit absolute address */ mask_k_22 = 0x01F1, /** register bit select */ mask_reg_bit = 0x0007, /** status register bit select */ mask_sreg_bit = 0x0070, /** address displacement (q) */ mask_q_displ = 0x2C07, /** 5 bit register id ( R00 - R31 ) */ mask_A_5 = 0x00F8, /** 6 bit IO port id */ mask_A_6 = 0x060F, }; /* Some handlers need predeclared */ static int avr_op_CALL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2); static int avr_op_JMP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2); static int avr_op_LDS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2); static int avr_op_STS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2); /****************************************************************************\ * * Helper functions to extract information from the opcodes. * \***************************************************************************/ static inline int get_rd_2 (uint16_t opcode) { int reg = ((opcode & mask_Rd_2) >> 4) & 0x3; return (reg * 2) + 24; } static inline int get_rd_3 (uint16_t opcode) { int reg = opcode & mask_Rd_3; return ((reg >> 4) & 0x7) + 16; } static inline int get_rd_4 (uint16_t opcode) { int reg = opcode & mask_Rd_4; return ((reg >> 4) & 0xf) + 16; } static inline int get_rd_5 (uint16_t opcode) { int reg = opcode & mask_Rd_5; return ((reg >> 4) & 0x1f); } static inline int get_rr_3 (uint16_t opcode) { return (opcode & mask_Rr_3) + 16; } static inline int get_rr_4 (uint16_t opcode) { return (opcode & mask_Rr_4) + 16; } static inline int get_rr_5 (uint16_t opcode) { int reg = opcode & mask_Rr_5; return (reg & 0xf) + ((reg >> 5) & 0x10); } static inline uint8_t get_K_8 (uint16_t opcode) { int K = opcode & mask_K_8; return ((K >> 4) & 0xf0) + (K & 0xf); } static inline uint8_t get_K_6 (uint16_t opcode) { int K = opcode & mask_K_6; return ((K >> 2) & 0x0030) + (K & 0xf); } static inline int get_k_7 (uint16_t opcode) { return (((opcode & mask_k_7) >> 3) & 0x7f); } static inline int get_k_12 (uint16_t opcode) { return (opcode & mask_k_12); } static inline int get_k_22 (uint16_t opcode) { /* Masks only the upper 6 bits of the address, the other 16 bits * are in PC + 1. */ int k = opcode & mask_k_22; return ((k >> 3) & 0x003e) + (k & 0x1); } static inline int get_reg_bit (uint16_t opcode) { return opcode & mask_reg_bit; } static inline int get_sreg_bit (uint16_t opcode) { return (opcode & mask_sreg_bit) >> 4; } static inline int get_q (uint16_t opcode) { /* 00q0 qq00 0000 0qqq : Yuck! */ int q = opcode & mask_q_displ; int qq = (((q >> 1) & 0x1000) + (q & 0x0c00)) >> 7; return (qq & 0x0038) + (q & 0x7); } static inline int get_A_5 (uint16_t opcode) { return (opcode & mask_A_5) >> 3; } static inline int get_A_6 (uint16_t opcode) { int A = opcode & mask_A_6; return ((A >> 5) & 0x0030) + (A & 0xf); } /****************************************************************************\ * * Helper functions for calculating the status register bit values. * See the Atmel data sheet for the instuction set for more info. * \****************************************************************************/ static inline int get_add_carry (uint8_t res, uint8_t rd, uint8_t rr, int b) { uint8_t resb = res >> b & 0x1; uint8_t rdb = rd >> b & 0x1; uint8_t rrb = rr >> b & 0x1; return (rdb & rrb) | (rrb & ~resb) | (~resb & rdb); } static inline int get_add_overflow (uint8_t res, uint8_t rd, uint8_t rr) { uint8_t res7 = res >> 7 & 0x1; uint8_t rd7 = rd >> 7 & 0x1; uint8_t rr7 = rr >> 7 & 0x1; return (rd7 & rr7 & ~res7) | (~rd7 & ~rr7 & res7); } static inline int get_sub_carry (uint8_t res, uint8_t rd, uint8_t rr, int b) { uint8_t resb = res >> b & 0x1; uint8_t rdb = rd >> b & 0x1; uint8_t rrb = rr >> b & 0x1; return (~rdb & rrb) | (rrb & resb) | (resb & ~rdb); } static inline int get_sub_overflow (uint8_t res, uint8_t rd, uint8_t rr) { uint8_t res7 = res >> 7 & 0x1; uint8_t rd7 = rd >> 7 & 0x1; uint8_t rr7 = rr >> 7 & 0x1; return (rd7 & ~rr7 & ~res7) | (~rd7 & rr7 & res7); } static inline int get_compare_carry (uint8_t res, uint8_t rd, uint8_t rr, int b) { uint8_t resb = res >> b & 0x1; uint8_t rdb = rd >> b & 0x1; uint8_t rrb = rr >> b & 0x1; return (~rdb & rrb) | (rrb & resb) | (resb & ~rdb); } static inline int get_compare_overflow (uint8_t res, uint8_t rd, uint8_t rr) { uint8_t res7 = res >> 7 & 0x1; uint8_t rd7 = rd >> 7 & 0x1; uint8_t rr7 = rr >> 7 & 0x1; /* The atmel data sheet says the second term is ~rd7 for CP * but that doesn't make any sense. You be the judge. */ return (rd7 & ~rr7 & ~res7) | (~rd7 & rr7 & res7); } /****************************************************************************\ * * Misc Helper functions * \****************************************************************************/ static inline int is_next_inst_2_words (AvrCore *core) { /* See if next is a two word instruction * CALL, JMP, LDS, and STS are the only two word (32 bit) instructions. */ uint16_t next_opcode = flash_read (core->flash, avr_core_PC_get (core) + 1); struct opcode_info *opi = decode_opcode (next_opcode); return ((opi->func == avr_op_CALL) || (opi->func == avr_op_JMP) || (opi->func == avr_op_LDS) || (opi->func == avr_op_STS)); } static inline int n_bit_unsigned_to_signed (unsigned int val, int n) { /* Convert n-bit unsigned value to a signed value. */ unsigned int mask; if ((val & (1 << (n - 1))) == 0) return (int)val; /* manually calculate two's complement */ mask = (1 << n) - 1; return -1 * ((~val & mask) + 1); } /****************************************************************************\ * * Opcode handler functions. * \****************************************************************************/ static int avr_op_ADC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Add with Carry. * * Opcode : 0001 11rd dddd rrrr * Usage : ADC Rd, Rr * Operation : Rd <- Rd + Rr + C * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int H, V, N, S, Z, C; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd + rr + avr_core_sreg_get_bit (core, SREG_C); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = get_add_carry (res, rd, rr, 3)); sreg = set_bit_in_byte (sreg, SREG_V, V = get_add_overflow (res, rd, rr)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = get_add_carry (res, rd, rr, 7)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_ADC; } static int avr_op_ADD (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Add without Carry. * * Opcode : 0000 11rd dddd rrrr * Usage : ADD Rd, Rr * Operation : Rd <- Rd + Rr * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int H, V, N, S, Z, C; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd + rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = get_add_carry (res, rd, rr, 3)); sreg = set_bit_in_byte (sreg, SREG_V, V = get_add_overflow (res, rd, rr)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = get_add_carry (res, rd, rr, 7)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_ADD; } static int avr_op_ADIW (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Add Immediate to Word. * * Opcode : 1001 0110 KKdd KKKK * Usage : ADIW Rd, K * Operation : Rd+1:Rd <- Rd+1:Rd + K * Flags : Z,C,N,V,S * Num Clocks : 2 */ int C, Z, S, N, V; int Rd = arg1; uint8_t K = arg2; uint8_t rdl = avr_core_gpwr_get (core, Rd); uint8_t rdh = avr_core_gpwr_get (core, Rd + 1); uint16_t rd = (rdh << 8) + rdl; uint16_t res = rd + K; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = (~(rdh >> 7 & 0x1) & (res >> 15 & 0x1))); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 15) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = (~(res >> 15 & 0x1) & (rdh >> 7 & 0x1))); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res & 0xff); avr_core_gpwr_set (core, Rd + 1, res >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ADIW; } static int avr_op_AND (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Logical AND. * * Opcode : 0010 00rd dddd rrrr * Usage : AND Rd, Rr * Operation : Rd <- Rd & Rr * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd & rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = 0); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_AND; } static int avr_op_ANDI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Logical AND with Immed. * * Opcode : 0111 KKKK dddd KKKK * Usage : ANDI Rd, K * Operation : Rd <- Rd & K * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; uint8_t K = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = rd & K; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = 0); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_ANDI; } static int avr_op_ASR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Arithmetic Shift Right. * * Opcode : 1001 010d dddd 0101 * Usage : ASR Rd * Operation : Rd(n) <- Rd(n+1), n=0..6 * Flags : Z,C,N,V,S * Num Clocks : 1 */ int Z, C, N, V, S; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = (rd >> 1) + (rd & 0x80); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_C, C = (rd & 0x1)); sreg = set_bit_in_byte (sreg, SREG_V, V = (N ^ C)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_ASR; } static int avr_op_BCLR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Clear a single flag or bit in SREG. * * Opcode : 1001 0100 1sss 1000 * Usage : BCLR * Operation : SREG(s) <- 0 * Flags : SREG(s) * Num Clocks : 1 */ avr_core_sreg_set_bit (core, arg1, 0); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_BCLR; } static int avr_op_BLD (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* Bit load from T to Register. * * Opcode : 1111 100d dddd 0bbb * Usage : BLD Rd, b * Operation : Rd(b) <- T * Flags : None * Num Clocks : 1 */ int Rd = arg1; int bit = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); int T = avr_core_sreg_get_bit (core, SREG_T); uint8_t res; if (T == 0) res = rd & ~(1 << bit); else res = rd | (1 << bit); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_BLD; } static int avr_op_BRBC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Branch if Status Flag Cleared. * * Pass control directly to the specific bit operation. * * Opcode : 1111 01kk kkkk ksss * Usage : BRBC s, k * Operation : if (SREG(s) = 0) then PC <- PC + k + 1 * Flags : None * Num Clocks : 1 / 2 * * k is an relative address represented in two's complements. * (64 < k <= 64) */ int bit = arg1; int k = arg2; if (avr_core_sreg_get_bit (core, bit) == 0) { avr_core_PC_incr (core, k + 1); avr_core_inst_CKS_set (core, 2); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_BRBC; } static int avr_op_BRBS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Branch if Status Flag Set. * * Pass control directly to the specific bit operation. * * Opcode : 1111 00kk kkkk ksss * Usage : BRBS s, k * Operation : if (SREG(s) = 1) then PC <- PC + k + 1 * Flags : None * Num Clocks : 1 / 2 * * k is an relative address represented in two's complements. * (64 < k <= 64) */ int bit = arg1; int k = arg2; if (avr_core_sreg_get_bit (core, bit) != 0) { avr_core_PC_incr (core, k + 1); avr_core_inst_CKS_set (core, 2); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_BRBS; } static int avr_op_BREAK (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * The BREAK instruction only available on devices with JTAG support. We * use it to implement break points for all devices though. When the * debugger sets a break point we will replace the insn at the requested * PC with the BREAK insn and save the PC and original insn on the break * point list. Thus, we only need to walk the break point list when we * reach a break insn. * * When a break occurs, we will return control to the caller _without_ * incrementing PC as the insn set datasheet says. * * Opcode : 1001 0101 1001 1000 * Usage : BREAK * Operation : Puts the in Stopped Mode if supported, NOP otherwise. * Flags : None * Num Clocks : 1 */ avr_message ("BREAK POINT: PC = 0x%08x: clock = %lld\n", avr_core_PC_get (core), avr_core_CK_get (core)); /* FIXME: TRoth/2002-10-15: Should we execute the original insn which the break replaced here or let the caller handle that? For now we defer that to the caller. */ /* return opcode_BREAK; */ return BREAK_POINT; } static int avr_op_BSET (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Set a single flag or bit in SREG. * * Opcode : 1001 0100 0sss 1000 * Usage : BSET * Operation : SREG(s) <- 1 * Flags : SREG(s) * Num Clocks : 1 */ avr_core_sreg_set_bit (core, arg1, 1); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_BSET; } static int avr_op_BST (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Bit Store from Register to T. * * Opcode : 1111 101d dddd 0bbb * Usage : BST Rd, b * Operation : T <- Rd(b) * Flags : T * Num Clocks : 1 */ int Rd = arg1; int bit = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); avr_core_sreg_set_bit (core, SREG_T, (rd >> bit) & 0x1); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_BST; } static int avr_op_CALL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Call Subroutine. * * Opcode : 1001 010k kkkk 111k kkkk kkkk kkkk kkkk * Usage : CALL k * Operation : PC <- k * Flags : None * Num Clocks : 4 / 5 */ int pc = avr_core_PC_get (core); int pc_bytes = avr_core_PC_size (core); int kh = arg1; int kl = flash_read (core->flash, pc + 1); int k = (kh << 16) + kl; if ((pc_bytes == 2) && (k > 0xffff)) avr_error ("Address out of allowed range: 0x%06x", k); avr_core_stack_push (core, pc_bytes, pc + 2); avr_core_PC_set (core, k); avr_core_inst_CKS_set (core, pc_bytes + 2); return opcode_CALL; } static int avr_op_CBI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Clear Bit in I/O Register. * * Opcode : 1001 1000 AAAA Abbb * Usage : CBI A, b * Operation : I/O(A, b) <- 0 * Flags : None * Num Clocks : 2 */ int A = arg1; int b = arg2; uint8_t val = avr_core_io_read (core, A); avr_core_io_write (core, A, val & ~(1 << b)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_CBI; } static int avr_op_COM (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * One's Complement. * * Opcode : 1001 010d dddd 0000 * Usage : COM Rd * Operation : Rd <- $FF - Rd * Flags : Z,C,N,V,S * Num Clocks : 1 */ int Z, C, N, V, S; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = 0xff - rd; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_C, C = 1); sreg = set_bit_in_byte (sreg, SREG_V, V = 0); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_COM; } static int avr_op_CP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Compare. * * Opcode : 0001 01rd dddd rrrr * Usage : CP Rd, Rr * Operation : Rd - Rr * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd - rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = get_compare_carry (res, rd, rr, 3)); sreg = set_bit_in_byte (sreg, SREG_V, V = get_compare_overflow (res, rd, rr)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = get_compare_carry (res, rd, rr, 7)); avr_core_sreg_set (core, sreg); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_CP; } static int avr_op_CPC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Compare with Carry. * * Opcode : 0000 01rd dddd rrrr * Usage : CPC Rd, Rr * Operation : Rd - Rr - C * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H, prev_Z; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd - rr - avr_core_sreg_get_bit (core, SREG_C); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = get_compare_carry (res, rd, rr, 3)); sreg = set_bit_in_byte (sreg, SREG_V, V = get_compare_overflow (res, rd, rr)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_C, C = get_compare_carry (res, rd, rr, 7)); /* Previous value remains unchanged when result is 0; cleared otherwise */ Z = ((res & 0xff) == 0); prev_Z = avr_core_sreg_get_bit (core, SREG_Z); sreg = set_bit_in_byte (sreg, SREG_Z, Z && prev_Z); avr_core_sreg_set (core, sreg); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_CPC; } static int avr_op_CPI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Compare with Immediate. * * Opcode : 0011 KKKK dddd KKKK * Usage : CPI Rd, K * Operation : Rd - K * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; uint8_t K = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = rd - K; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = get_compare_carry (res, rd, K, 3)); sreg = set_bit_in_byte (sreg, SREG_V, V = get_compare_overflow (res, rd, K)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = get_compare_carry (res, rd, K, 7)); avr_core_sreg_set (core, sreg); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_CPI; } static int avr_op_CPSE (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Compare, Skip if Equal. * * Opcode : 0001 00rd dddd rrrr * Usage : CPSE Rd, Rr * Operation : if (Rd = Rr) PC <- PC + 2 or 3 * Flags : None * Num Clocks : 1 / 2 / 3 */ int skip; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); if (is_next_inst_2_words (core)) skip = 3; else skip = 2; if (rd == rr) { avr_core_PC_incr (core, skip); avr_core_inst_CKS_set (core, skip); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_CPSE; } static int avr_op_DEC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Decrement. * * Opcode : 1001 010d dddd 1010 * Usage : DEC Rd * Operation : Rd <- Rd - 1 * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = rd - 1; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_V, V = (rd == 0x80)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_DEC; } static int avr_op_EICALL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Extended Indirect Call to (Z). * * Opcode : 1001 0101 0001 1001 * Usage : EICALL * Operation : PC(15:0) <- Z, PC(21:16) <- EIND * Flags : None * Num Clocks : 4 */ int pc = avr_core_PC_get (core); int pc_bytes = 3; /* Z is R31:R30 */ int new_pc = ((core->EIND & 0x3f) << 16) + (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_warning ("needs serious code review\n"); avr_core_stack_push (core, pc_bytes, pc + 1); avr_core_PC_set (core, new_pc); avr_core_inst_CKS_set (core, 4); return opcode_EICALL; } static int avr_op_EIJMP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Extended Indirect Jmp to (Z). * * Opcode : 1001 0100 0001 1001 * Usage : EIJMP * Operation : PC(15:0) <- Z, PC(21:16) <- EIND * Flags : None * Num Clocks : 2 */ /* Z is R31:R30 */ int new_pc = ((core->EIND & 0x3f) << 16) + (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_warning ("needs serious code review\n"); avr_core_PC_set (core, new_pc); avr_core_inst_CKS_set (core, 2); return opcode_EIJMP; } static int avr_op_ELPM_Z (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Extended Load Program Memory. * * Opcode : 1001 000d dddd 0110 * Usage : ELPM Rd, Z * Operation : R <- (RAMPZ:Z) * Flags : None * Num Clocks : 3 */ int Z, high_byte, flash_addr; uint16_t data; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined"); avr_warning ("needs serious code review\n"); /* FIXME: Is this correct? */ /* Z is R31:R30 */ Z = ((avr_core_rampz_get (core) & 0x3f) << 16) + (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); high_byte = Z & 0x1; flash_addr = Z / 2; data = flash_read (core->flash, flash_addr); if (high_byte == 1) avr_core_gpwr_set (core, Rd, data >> 8); else avr_core_gpwr_set (core, Rd, data & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 3); return opcode_ELPM_Z; } static int avr_op_ELPM_Z_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Extended Ld Prg Mem and Post-Incr. * * Opcode : 1001 000d dddd 0111 * Usage : ELPM Rd, Z+ * Operation : Rd <- (RAMPZ:Z), Z <- Z + 1 * Flags : None * Num Clocks : 3 */ int Z, high_byte, flash_addr; uint16_t data; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined"); /* TRoth/2002-08-14: This seems to work ok for me. */ /* avr_warning( "needs serious code review\n" ); */ /* FIXME: Is this correct? */ /* Z is R31:R30 */ Z = ((avr_core_rampz_get (core) & 0x3f) << 16) + (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); high_byte = Z & 0x1; flash_addr = Z / 2; data = flash_read (core->flash, flash_addr); if (high_byte == 1) avr_core_gpwr_set (core, Rd, data >> 8); else avr_core_gpwr_set (core, Rd, data & 0xff); /* post increment Z */ Z += 1; avr_core_gpwr_set (core, 30, Z & 0xff); avr_core_gpwr_set (core, 31, Z >> 8); avr_core_rampz_set (core, (Z >> 16) & 0x3f); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 3); return opcode_ELPM_Z_incr; } static int avr_op_ELPM (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Extended Load Program Memory. * * This is the same as avr_op_ELPM_Z with Rd = R0. * * Opcode : 1001 0101 1101 1000 * Usage : ELPM * Operation : R0 <- (RAMPZ:Z) * Flags : None * Num Clocks : 3 */ avr_op_ELPM_Z (core, 0x9006, arg1, arg2); return opcode_ELPM; } static int avr_op_EOR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Exclusive OR. * * Opcode : 0010 01rd dddd rrrr * Usage : EOR Rd, Rr * Operation : Rd <- Rd ^ Rr * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd ^ rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = 0); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_EOR; } static int avr_op_ESPM (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Extended Store Program Memory. * * Opcode : 1001 0101 1111 1000 * Usage : ESPM * Operation : (RAMPZ:Z) <- R1:R0 * Flags : None * Num Clocks : - */ avr_error ("This opcode is not implemented yet: 0x%04x", opcode); return opcode_ESPM; } /** ** I don't know how this Fractional Multiplication works. ** If someone wishes to enlighten me, I write these. **/ static int avr_op_FMUL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Fractional Mult Unsigned. * * Opcode : 0000 0011 0ddd 1rrr * Usage : FMUL Rd, Rr * Operation : R1:R0 <- (Rd * Rr)<<1 (UU) * Flags : Z,C * Num Clocks : 2 */ int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint16_t resp = rd * rr; uint16_t res = resp << 1; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_Z, ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, ((resp >> 15) & 0x1)); avr_core_sreg_set (core, sreg); /* result goes in R1:R0 */ avr_core_gpwr_set (core, 1, res >> 8); avr_core_gpwr_set (core, 0, res & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_FMUL; } static int avr_op_FMULS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Fractional Mult Signed. * * Opcode : 0000 0011 1ddd 0rrr * Usage : FMULS Rd, Rr * Operation : R1:R0 <- (Rd * Rr)<<1 (SS) * Flags : Z,C * Num Clocks : 2 */ int Rd = arg1; int Rr = arg2; int8_t rd = avr_core_gpwr_get (core, Rd); int8_t rr = avr_core_gpwr_get (core, Rr); uint16_t resp = rd * rr; uint16_t res = resp << 1; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_Z, ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, ((resp >> 15) & 0x1)); avr_core_sreg_set (core, sreg); /* result goes in R1:R0 */ avr_core_gpwr_set (core, 1, res >> 8); avr_core_gpwr_set (core, 0, res & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_FMULS; } static int avr_op_FMULSU (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Fract Mult Signed w/ Unsigned. * * Opcode : 0000 0011 1ddd 1rrr * Usage : FMULSU Rd, Rr * Operation : R1:R0 <- (Rd * Rr)<<1 (SU) * Flags : Z,C * Num Clocks : 2 */ int Rd = arg1; int Rr = arg2; int8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint16_t resp = rd * rr; uint16_t res = resp << 1; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_Z, ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, ((resp >> 15) & 0x1)); avr_core_sreg_set (core, sreg); /* result goes in R1:R0 */ avr_core_gpwr_set (core, 1, res >> 8); avr_core_gpwr_set (core, 0, res & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_FMULSU; } static int avr_op_ICALL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Indirect Call to (Z). * * Opcode : 1001 0101 0000 1001 * Usage : ICALL * Operation : PC(15:0) <- Z, PC(21:16) <- 0 * Flags : None * Num Clocks : 3 / 4 */ int pc = avr_core_PC_get (core); int pc_bytes = avr_core_PC_size (core); /* Z is R31:R30 */ int new_pc = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_core_stack_push (core, pc_bytes, pc + 1); avr_core_PC_set (core, new_pc); avr_core_inst_CKS_set (core, pc_bytes + 1); return opcode_ICALL; } static int avr_op_IJMP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Indirect Jump to (Z). * * Opcode : 1001 0100 0000 1001 * Usage : IJMP * Operation : PC(15:0) <- Z, PC(21:16) <- 0 * Flags : None * Num Clocks : 2 */ /* Z is R31:R30 */ int new_pc = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_core_PC_set (core, new_pc); avr_core_inst_CKS_set (core, 2); return opcode_IJMP; } static int avr_op_IN (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * In From I/O Location. * * Opcode : 1011 0AAd dddd AAAA * Usage : IN Rd, A * Operation : Rd <- I/O(A) * Flags : None * Num Clocks : 1 */ int Rd = arg1; int A = arg2; avr_core_gpwr_set (core, Rd, avr_core_io_read (core, A)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_IN; } static int avr_op_INC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Increment. * * Opcode : 1001 010d dddd 0011 * Usage : INC Rd * Operation : Rd <- Rd + 1 * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = rd + 1; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_V, V = (rd == 0x7f)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_INC; } static int avr_op_JMP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Jump. * * Opcode : 1001 010k kkkk 110k kkkk kkkk kkkk kkkk * Usage : JMP k * Operation : PC <- k * Flags : None * Num Clocks : 3 */ int kh = arg1; int kl = flash_read (core->flash, avr_core_PC_get (core) + 1); int k = (kh << 16) + kl; avr_core_PC_set (core, k); avr_core_inst_CKS_set (core, 3); return opcode_JMP; } static int avr_op_LDD_Y (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect with Displacement using index Y. * * Opcode : 10q0 qq0d dddd 1qqq * Usage : LDD Rd, Y+q * Operation : Rd <- (Y + q) * Flags : None * Num Clocks : 2 */ uint16_t Y; int Rd = arg1; int q = arg2; /* Y is R29:R28 */ Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Y + q)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LDD_Y; } static int avr_op_LDD_Z (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect with Displacement using index Z. * * Opcode : 10q0 qq0d dddd 0qqq * Usage : LDD Rd, Z+q * Operation : Rd <- (Z + q) * Flags : None * Num Clocks : 2 */ uint16_t Z; int Rd = arg1; int q = arg2; /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Z + q)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LDD_Z; } static int avr_op_LDI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Immediate. * * Opcode : 1110 KKKK dddd KKKK * Usage : LDI Rd, K * Operation : Rd <- K * Flags : None * Num Clocks : 1 */ int Rd = arg1; uint8_t K = arg2; avr_core_gpwr_set (core, Rd, K); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_LDI; } static int avr_op_LDS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Direct from data space. * * Opcode : 1001 000d dddd 0000 kkkk kkkk kkkk kkkk * Usage : LDS Rd, k * Operation : Rd <- (k) * Flags : None * Num Clocks : 2 */ int Rd = arg1; /* Get data at k in current data segment and put into Rd */ int k_pc = avr_core_PC_get (core) + 1; int k = flash_read (core->flash, k_pc); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, k)); avr_core_PC_incr (core, 2); avr_core_inst_CKS_set (core, 2); return opcode_LDS; } static int avr_op_LD_X (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect using index X. * * Opcode : 1001 000d dddd 1100 * Usage : LD Rd, X * Operation : Rd <- (X) * Flags : None * Num Clocks : 2 */ uint16_t X; int Rd = arg1; /* X is R27:R26 */ X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, X)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_X; } static int avr_op_LD_X_decr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect and Pre-Decrement using index X. * * Opcode : 1001 000d dddd 1110 * Usage : LD Rd, -X * Operation : X <- X - 1, Rd <- (X) * Flags : None * Num Clocks : 2 */ uint16_t X; int Rd = arg1; if ((Rd == 26) || (Rd == 27)) avr_error ("Results of operation are undefined"); /* X is R27:R26 */ X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26); /* Perform pre-decrement */ X -= 1; avr_core_gpwr_set (core, 26, X & 0xff); avr_core_gpwr_set (core, 27, X >> 8); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, X)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_X_decr; } static int avr_op_LD_X_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect and Post-Increment using index X. * * Opcode : 1001 000d dddd 1101 * Usage : LD Rd, X+ * Operation : Rd <- (X), X <- X + 1 * Flags : None * Num Clocks : 2 */ uint16_t X; int Rd = arg1; if ((Rd == 26) || (Rd == 27)) avr_error ("Results of operation are undefined"); /* X is R27:R26 */ X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, X)); /* Perform post-increment */ X += 1; avr_core_gpwr_set (core, 26, X & 0xff); avr_core_gpwr_set (core, 27, X >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_X_incr; } static int avr_op_LD_Y_decr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect and PreDecrement using index Y. * * Opcode : 1001 000d dddd 1010 * Usage : LD Rd, -Y * Operation : Y <- Y - 1, Rd <- (Y) * Flags : None * Num Clocks : 2 */ uint16_t Y; int Rd = arg1; if ((Rd == 28) || (Rd == 29)) avr_error ("Results of operation are undefined"); /* Y is R29:R28 */ Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28); /* Perform pre-decrement */ Y -= 1; avr_core_gpwr_set (core, 28, Y & 0xff); avr_core_gpwr_set (core, 29, Y >> 8); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Y)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_Y_decr; } static int avr_op_LD_Y_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect and Post-Increment using index Y. * * Opcode : 1001 000d dddd 1001 * Usage : LD Rd, Y+ * Operation : Rd <- (Y), Y <- Y + 1 * Flags : None * Num Clocks : 2 */ uint16_t Y; int Rd = arg1; if ((Rd == 28) || (Rd == 29)) avr_error ("Results of operation are undefined"); /* Y is R29:R28 */ Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Y)); /* Perform post-increment */ Y += 1; avr_core_gpwr_set (core, 28, Y & 0xff); avr_core_gpwr_set (core, 29, Y >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_Y_incr; } static int avr_op_LD_Z_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect and Post-Increment using index Z. * * Opcode : 1001 000d dddd 0001 * Usage : LD Rd, Z+ * Operation : Rd <- (Z), Z <- Z+1 * Flags : None * Num Clocks : 2 */ uint16_t Z; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined"); /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Z)); /* Perform post-increment */ Z += 1; avr_core_gpwr_set (core, 30, Z & 0xff); avr_core_gpwr_set (core, 31, Z >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_Z_incr; } static int avr_op_LD_Z_decr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Indirect and Pre-Decrement using index Z. * * Opcode : 1001 000d dddd 0010 * Usage : LD Rd, -Z * Operation : Z <- Z - 1, Rd <- (Z) * Flags : None * Num Clocks : 2 */ uint16_t Z; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined"); /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); /* Perform pre-decrement */ Z -= 1; avr_core_gpwr_set (core, 30, Z & 0xff); avr_core_gpwr_set (core, 31, Z >> 8); avr_core_gpwr_set (core, Rd, avr_core_mem_read (core, Z)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_LD_Z_decr; } static int avr_op_LPM_Z (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Program Memory. * * Opcode : 1001 000d dddd 0100 * Usage : LPM Rd, Z * Operation : Rd <- (Z) * Flags : None * Num Clocks : 3 */ uint16_t Z, high_byte; uint16_t data; int Rd = arg1; /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); high_byte = Z & 0x1; /* FIXME: I don't know if this is the right thing to do. I'm not sure that I understand what the instruction data sheet is saying about Z. Dividing by 2 seems to give the address that we want though. */ data = flash_read (core->flash, Z / 2); if (high_byte == 1) avr_core_gpwr_set (core, Rd, data >> 8); else avr_core_gpwr_set (core, Rd, data & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 3); return opcode_LPM_Z; } static int avr_op_LPM (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* Load Program Memory. * * This the same as avr_op_LPM_Z with Rd = R0. * * Opcode : 1001 0101 1100 1000 * Usage : LPM * Operation : R0 <- (Z) * Flags : None * Num Clocks : 3 */ return avr_op_LPM_Z (core, 0x9004, 0, arg2); } static int avr_op_LPM_Z_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Load Program Memory and Post-Incr. * * Opcode : 1001 000d dddd 0101 * Usage : LPM Rd, Z+ * Operation : Rd <- (Z), Z <- Z + 1 * Flags : None * Num Clocks : 3 */ uint16_t Z, high_byte; uint16_t data; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined"); /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); high_byte = Z & 0x1; /* FIXME: I don't know if this is the right thing to do. I'm not sure that I understand what the instruction data sheet is saying about Z. Dividing by 2 seems to give the address that we want though. */ data = flash_read (core->flash, Z / 2); if (high_byte == 1) avr_core_gpwr_set (core, Rd, data >> 8); else avr_core_gpwr_set (core, Rd, data & 0xff); /* Perform post-increment */ Z += 1; avr_core_gpwr_set (core, 30, Z & 0xff); avr_core_gpwr_set (core, 31, Z >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 3); return opcode_LPM_Z_incr; } static int avr_op_LSR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Logical Shift Right. * * Opcode : 1001 010d dddd 0110 * Usage : LSR Rd * Operation : Rd(n) <- Rd(n+1), Rd(7) <- 0, C <- Rd(0) * Flags : Z,C,N,V,S * Num Clocks : 1 */ int Z, C, N, V, S; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = (rd >> 1) & 0x7f; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_C, C = (rd & 0x1)); sreg = set_bit_in_byte (sreg, SREG_N, N = (0)); sreg = set_bit_in_byte (sreg, SREG_V, V = (N ^ C)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_LSR; } static int avr_op_MOV (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* Copy Register. * * Opcode : 0010 11rd dddd rrrr * Usage : MOV Rd, Rr * Operation : Rd <- Rr * Flags : None * Num Clocks : 1 */ int Rd = arg1; int Rr = arg2; avr_core_gpwr_set (core, Rd, avr_core_gpwr_get (core, Rr)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_MOV; } static int avr_op_MOVW (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* *Copy Register Pair. * * Opcode : 0000 0001 dddd rrrr * Usage : MOVW Rd, Rr * Operation : Rd+1:Rd <- Rr+1:Rr * Flags : None * Num Clocks : 1 */ int Rd = arg1; int Rr = arg2; /* get_rd_4() returns 16 <= r <= 31, but here Rd and Rr */ /* are even from 0 <= r <= 30. So we translate. */ Rd = (Rd - 16) * 2; Rr = (Rr - 16) * 2; avr_core_gpwr_set (core, Rd, avr_core_gpwr_get (core, Rr)); avr_core_gpwr_set (core, Rd + 1, avr_core_gpwr_get (core, Rr + 1)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_MOVW; } static int avr_op_MUL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Mult Unsigned. * * Opcode : 1001 11rd dddd rrrr * Usage : MUL Rd, Rr * Operation : R1:R0 <- Rd * Rr (UU) * Flags : Z,C * Num Clocks : 2 */ int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint16_t res = rd * rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_Z, ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, ((res >> 15) & 0x1)); avr_core_sreg_set (core, sreg); /* result goes in R1:R0 */ avr_core_gpwr_set (core, 1, res >> 8); avr_core_gpwr_set (core, 0, res & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_MUL; } static int avr_op_MULS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Mult Signed. * * Opcode : 0000 0010 dddd rrrr * Usage : MULS Rd, Rr * Operation : R1:R0 <- Rd * Rr (SS) * Flags : Z,C * Num Clocks : 2 */ int Rd = arg1; int Rr = arg2; int8_t rd = (int8_t) avr_core_gpwr_get (core, Rd); int8_t rr = (int8_t) avr_core_gpwr_get (core, Rr); int16_t res = rd * rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_Z, ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, ((res >> 15) & 0x1)); avr_core_sreg_set (core, sreg); /* result goes in R1:R0 */ avr_core_gpwr_set (core, 1, res >> 8); avr_core_gpwr_set (core, 0, res & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_MULS; } static int avr_op_MULSU (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Mult Signed with Unsigned. * * Rd(unsigned),Rr(signed), result (signed) * * Opcode : 0000 0011 0ddd 0rrr * Usage : MULSU Rd, Rr * Operation : R1:R0 <- Rd * Rr (SU) * Flags : Z,C * Num Clocks : 2 */ int Rd = arg1; int Rr = arg2; int8_t rd = (int8_t) avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); int16_t res = rd * rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_Z, ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, ((res >> 15) & 0x1)); avr_core_sreg_set (core, sreg); /* result goes in R1:R0 */ avr_core_gpwr_set (core, 1, res >> 8); avr_core_gpwr_set (core, 0, res & 0xff); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_MULSU; } static int avr_op_NEG (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Two's Complement. * * Opcode : 1001 010d dddd 0001 * Usage : NEG Rd * Operation : Rd <- $00 - Rd * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = (0x0 - rd) & 0xff; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = (((res >> 3) | (rd >> 3)) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_V, V = (res == 0x80)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = (res == 0x0)); sreg = set_bit_in_byte (sreg, SREG_C, C = (res != 0x0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_NEG; } static int avr_op_NOP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * No Operation. * * Opcode : 0000 0000 0000 0000 * Usage : NOP * Operation : None * Flags : None * Num Clocks : 1 */ avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_NOP; } static int avr_op_OR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Logical OR. * * Opcode : 0010 10rd dddd rrrr * Usage : OR Rd, Rr * Operation : Rd <- Rd or Rr * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; int Rr = arg2; uint8_t res = avr_core_gpwr_get (core, Rd) | avr_core_gpwr_get (core, Rr); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = (0)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = (res == 0x0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_OR; } static int avr_op_ORI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Logical OR with Immed. * * Opcode : 0110 KKKK dddd KKKK * Usage : ORI Rd, K * Operation : Rd <- Rd or K * Flags : Z,N,V,S * Num Clocks : 1 */ int Z, N, V, S; int Rd = arg1; uint8_t K = arg2; uint8_t res = avr_core_gpwr_get (core, Rd) | K; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = (0)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = (res == 0x0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_ORI; } static int avr_op_OUT (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Out To I/O Location. * * Opcode : 1011 1AAd dddd AAAA * Usage : OUT A, Rd * Operation : I/O(A) <- Rd * Flags : None * Num Clocks : 1 */ /* Even though the args in the comment are reversed (out arg2, arg1), the following is correct: Rd=arg1, A=arg2. */ int Rd = arg1; int A = arg2; avr_core_io_write (core, A, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_OUT; } static int avr_op_POP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Pop Register from Stack. * * Opcode : 1001 000d dddd 1111 * Usage : POP Rd * Operation : Rd <- STACK * Flags : None * Num Clocks : 2 */ int Rd = arg1; avr_core_gpwr_set (core, Rd, avr_core_stack_pop (core, 1)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_POP; } static int avr_op_PUSH (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Push Register on Stack. * * Opcode : 1001 001d dddd 1111 * Usage : PUSH Rd * Operation : STACK <- Rd * Flags : None * Num Clocks : 2 */ int Rd = arg1; avr_core_stack_push (core, 1, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_PUSH; } static int avr_op_RCALL (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Relative Call Subroutine. * * Opcode : 1101 kkkk kkkk kkkk * Usage : RCALL k * Operation : PC <- PC + k + 1 * Flags : None * Num Clocks : 3 / 4 */ int k = arg1; int pc = avr_core_PC_get (core); int pc_bytes = avr_core_PC_size (core); avr_core_stack_push (core, pc_bytes, pc + 1); avr_core_PC_incr (core, k + 1); avr_core_inst_CKS_set (core, pc_bytes + 1); return opcode_RCALL; } static int avr_op_RET (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Subroutine Return. * * Opcode : 1001 0101 0000 1000 * Usage : RET * Operation : PC <- STACK * Flags : None * Num Clocks : 4 / 5 */ int pc_bytes = avr_core_PC_size (core); int pc = avr_core_stack_pop (core, pc_bytes); avr_core_PC_set (core, pc); avr_core_inst_CKS_set (core, pc_bytes + 2); return opcode_RET; } static int avr_op_RETI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Interrupt Return. * * Opcode : 1001 0101 0001 1000 * Usage : RETI * Operation : PC <- STACK * Flags : I * Num Clocks : 4 / 5 */ int pc_bytes = avr_core_PC_size (core); int pc = avr_core_stack_pop (core, pc_bytes); avr_core_PC_set (core, pc); avr_core_inst_CKS_set (core, pc_bytes + 2); avr_core_sreg_set_bit (core, SREG_I, 1); return opcode_RETI; } static int avr_op_RJMP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Relative Jump. * * Opcode : 1100 kkkk kkkk kkkk * Usage : RJMP k * Operation : PC <- PC + k + 1 * Flags : None * Num Clocks : 2 */ int k = arg1; avr_core_PC_incr (core, k + 1); avr_core_inst_CKS_set (core, 2); return opcode_RJMP; } static int avr_op_ROR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Rotate Right Though Carry. * * Opcode : 1001 010d dddd 0111 * Usage : ROR Rd * Operation : Rd(7) <- C, Rd(n) <- Rd(n+1), C <- Rd(0) * Flags : Z,C,N,V,S * Num Clocks : 1 */ int Z, C, N, V, S; int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = (rd >> 1) | ((avr_core_sreg_get_bit (core, SREG_C) << 7) & 0x80); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_C, C = (rd & 0x1)); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_V, V = (N ^ C)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = (res == 0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_ROR; } static int avr_op_SBC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Subtract with Carry. * * Opcode : 0000 10rd dddd rrrr * Usage : SBC Rd, Rr * Operation : Rd <- Rd - Rr - C * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd - rr - avr_core_sreg_get_bit (core, SREG_C); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = (get_sub_carry (res, rd, rr, 3))); sreg = set_bit_in_byte (sreg, SREG_V, V = (get_sub_overflow (res, rd, rr))); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_C, C = (get_sub_carry (res, rd, rr, 7))); if ((res & 0xff) != 0) sreg = set_bit_in_byte (sreg, SREG_Z, Z = (0)); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_SBC; } static int avr_op_SBCI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Subtract Immediate with Carry. * * Opcode : 0100 KKKK dddd KKKK * Usage : SBCI Rd, K * Operation : Rd <- Rd - K - C * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; uint8_t K = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = rd - K - avr_core_sreg_get_bit (core, SREG_C); uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = (get_sub_carry (res, rd, K, 3))); sreg = set_bit_in_byte (sreg, SREG_V, V = (get_sub_overflow (res, rd, K))); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_C, C = (get_sub_carry (res, rd, K, 7))); if ((res & 0xff) != 0) sreg = set_bit_in_byte (sreg, SREG_Z, Z = 0); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_SBCI; } static int avr_op_SBI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Set Bit in I/O Register. * * Opcode : 1001 1010 AAAA Abbb * Usage : SBI A, b * Operation : I/O(A, b) <- 1 * Flags : None * Num Clocks : 2 */ int A = arg1; int b = arg2; uint8_t val = avr_core_io_read (core, A); avr_core_io_write (core, A, val | (1 << b)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_SBI; } static int avr_op_SBIC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Skip if Bit in I/O Reg Cleared. * * Opcode : 1001 1001 AAAA Abbb * Usage : SBIC A, b * Operation : if (I/O(A,b) = 0) PC <- PC + 2 or 3 * Flags : None * Num Clocks : 1 / 2 / 3 */ int skip; int A = arg1; int b = arg2; if (is_next_inst_2_words (core)) skip = 3; else skip = 2; if ((avr_core_io_read (core, A) & (1 << b)) == 0) { avr_core_PC_incr (core, skip); avr_core_inst_CKS_set (core, skip); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_SBIC; } static int avr_op_SBIS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Skip if Bit in I/O Reg Set. * * Opcode : 1001 1011 AAAA Abbb * Usage : SBIS A, b * Operation : if (I/O(A,b) = 1) PC <- PC + 2 or 3 * Flags : None * Num Clocks : 1 / 2 / 3 */ int skip; int A = arg1; int b = arg2; if (is_next_inst_2_words (core)) skip = 3; else skip = 2; if ((avr_core_io_read (core, A) & (1 << b)) != 0) { avr_core_PC_incr (core, skip); avr_core_inst_CKS_set (core, skip); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_SBIS; } static int avr_op_SBIW (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Subtract Immed from Word. * * Opcode : 1001 0111 KKdd KKKK * Usage : SBIW Rd, K * Operation : Rd+1:Rd <- Rd+1:Rd - K * Flags : Z,C,N,V,S * Num Clocks : 2 */ int Z, C, N, V, S; int Rd = arg1; uint8_t K = arg2; uint8_t rdl = avr_core_gpwr_get (core, Rd); uint8_t rdh = avr_core_gpwr_get (core, Rd + 1); uint16_t rd = (rdh << 8) + rdl; uint16_t res = rd - K; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_V, V = ((rdh >> 7 & 0x1) & ~(res >> 15 & 0x1))); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 15) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xffff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = ((res >> 15 & 0x1) & ~(rdh >> 7 & 0x1))); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res & 0xff); avr_core_gpwr_set (core, Rd + 1, res >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_SBIW; } static int avr_op_SBRC (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Skip if Bit in Reg Cleared. * * Opcode : 1111 110d dddd 0bbb * Usage : SBRC Rd, b * Operation : if (Rd(b) = 0) PC <- PC + 2 or 3 * Flags : None * Num Clocks : 1 / 2 / 3 */ int skip; int Rd = arg1; int b = arg2; if (is_next_inst_2_words (core)) skip = 3; else skip = 2; if (((avr_core_gpwr_get (core, Rd) >> b) & 0x1) == 0) { avr_core_PC_incr (core, skip); avr_core_inst_CKS_set (core, skip); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_SBRC; } static int avr_op_SBRS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Skip if Bit in Reg Set. * * Opcode : 1111 111d dddd 0bbb * Usage : SBRS Rd, b * Operation : if (Rd(b) = 1) PC <- PC + 2 or 3 * Flags : None * Num Clocks : 1 / 2 / 3 */ int skip; int Rd = arg1; int b = arg2; if (is_next_inst_2_words (core)) skip = 3; else skip = 2; if (((avr_core_gpwr_get (core, Rd) >> b) & 0x1) != 0) { avr_core_PC_incr (core, skip); avr_core_inst_CKS_set (core, skip); } else { avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); } return opcode_SBRS; } static int avr_op_SLEEP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Sleep. * * This is device specific and should be overridden by sub-class. * * Opcode : 1001 0101 1000 1000 * Usage : SLEEP * Operation : (see specific hardware specification for Sleep) * Flags : None * Num Clocks : 1 */ MCUCR *mcucr = (MCUCR *)avr_core_get_vdev_by_name (core, "MCUCR"); if (mcucr == NULL) avr_error ("MCUCR register not installed"); /* See if sleep mode is enabled */ if (mcucr_get_bit (mcucr, bit_SE)) { if (mcucr_get_bit (mcucr, bit_SM) == 0) { /* Idle Mode */ avr_core_set_sleep_mode (core, SLEEP_MODE_IDLE); } else { /* Power Down Mode */ avr_core_set_sleep_mode (core, SLEEP_MODE_PWR_DOWN); } } avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_SLEEP; } static int avr_op_SPM (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Program Memory. * * Opcode : 1001 0101 1110 1000 * Usage : SPM * Operation : (Z) <- R1:R0 * Flags : None * Num Clocks : - */ avr_error ("This opcode is not implemented yet: 0x%04x", opcode); return opcode_SPM; } static int avr_op_STD_Y (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect with Displacement. * * Opcode : 10q0 qq1d dddd 1qqq * Usage : STD Y+q, Rd * Operation : (Y + q) <- Rd * Flags : None * Num Clocks : 2 */ int Y; int q = arg2; int Rd = arg1; /* Y is R29:R28 */ Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28); avr_core_mem_write (core, Y + q, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_STD_Y; } static int avr_op_STD_Z (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect with Displacement. * * Opcode : 10q0 qq1d dddd 0qqq * Usage : STD Z+q, Rd * Operation : (Z + q) <- Rd * Flags : None * Num Clocks : 2 */ int Z; int q = arg2; int Rd = arg1; /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_core_mem_write (core, Z + q, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_STD_Z; } static int avr_op_STS (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Direct to data space. * * Opcode : 1001 001d dddd 0000 kkkk kkkk kkkk kkkk * Usage : STS k, Rd * Operation : (k) <- Rd * Flags : None * Num Clocks : 2 */ int Rd = arg1; /* Get data at k in current data segment and put into Rd */ int k_pc = avr_core_PC_get (core) + 1; int k = flash_read (core->flash, k_pc); avr_core_mem_write (core, k, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 2); avr_core_inst_CKS_set (core, 2); return opcode_STS; } static int avr_op_ST_X (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect using index X. * * Opcode : 1001 001d dddd 1100 * Usage : ST X, Rd * Operation : (X) <- Rd * Flags : None * Num Clocks : 2 */ uint16_t X; int Rd = arg1; /* X is R27:R26 */ X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26); avr_core_mem_write (core, X, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_X; } static int avr_op_ST_X_decr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect and Pre-Decrement using index X. * * Opcode : 1001 001d dddd 1110 * Usage : ST -X, Rd * Operation : X <- X - 1, (X) <- Rd * Flags : None * Num Clocks : 2 */ uint16_t X; int Rd = arg1; if ((Rd == 26) || (Rd == 27)) avr_error ("Results of operation are undefined: 0x%04x", opcode); /* X is R27:R26 */ X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26); /* Perform pre-decrement */ X -= 1; avr_core_gpwr_set (core, 26, X & 0xff); avr_core_gpwr_set (core, 27, X >> 8); avr_core_mem_write (core, X, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_X_decr; } static int avr_op_ST_X_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect and Post-Increment using index X. * * Opcode : 1001 001d dddd 1101 * Usage : ST X+, Rd * Operation : (X) <- Rd, X <- X + 1 * Flags : None * Num Clocks : 2 */ uint16_t X; int Rd = arg1; if ((Rd == 26) || (Rd == 27)) avr_error ("Results of operation are undefined: 0x%04x", opcode); /* X is R27:R26 */ X = (avr_core_gpwr_get (core, 27) << 8) + avr_core_gpwr_get (core, 26); avr_core_mem_write (core, X, avr_core_gpwr_get (core, Rd)); /* Perform post-increment */ X += 1; avr_core_gpwr_set (core, 26, X & 0xff); avr_core_gpwr_set (core, 27, X >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_X_incr; } static int avr_op_ST_Y_decr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect and Pre-Decrement using index Y. * * Opcode : 1001 001d dddd 1010 * Usage : ST -Y, Rd * Operation : Y <- Y - 1, (Y) <- Rd * Flags : None * Num Clocks : 2 */ uint16_t Y; int Rd = arg1; if ((Rd == 28) || (Rd == 29)) avr_error ("Results of operation are undefined: 0x%04x", opcode); /* Y is R29:R28 */ Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28); /* Perform pre-decrement */ Y -= 1; avr_core_gpwr_set (core, 28, Y & 0xff); avr_core_gpwr_set (core, 29, Y >> 8); avr_core_mem_write (core, Y, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_Y_decr; } static int avr_op_ST_Y_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect and Post-Increment using index Y. * * Opcode : 1001 001d dddd 1001 * Usage : ST Y+, Rd * Operation : (Y) <- Rd, Y <- Y + 1 * Flags : None * Num Clocks : 2 */ uint16_t Y; int Rd = arg1; if ((Rd == 28) || (Rd == 29)) avr_error ("Results of operation are undefined: 0x%04x", opcode); /* Y is R29:R28 */ Y = (avr_core_gpwr_get (core, 29) << 8) + avr_core_gpwr_get (core, 28); avr_core_mem_write (core, Y, avr_core_gpwr_get (core, Rd)); /* Perform post-increment */ Y += 1; avr_core_gpwr_set (core, 28, Y & 0xff); avr_core_gpwr_set (core, 29, Y >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_Y_incr; } static int avr_op_ST_Z_decr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect and Pre-Decrement using index Z. * * Opcode : 1001 001d dddd 0010 * Usage : ST -Z, Rd * Operation : Z <- Z - 1, (Z) <- Rd * Flags : None * Num Clocks : 2 */ uint16_t Z; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined: 0x%04x", opcode); /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); /* Perform pre-decrement */ Z -= 1; avr_core_gpwr_set (core, 30, Z & 0xff); avr_core_gpwr_set (core, 31, Z >> 8); avr_core_mem_write (core, Z, avr_core_gpwr_get (core, Rd)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_Z_decr; } static int avr_op_ST_Z_incr (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Store Indirect and Post-Increment using index Z. * * Opcode : 1001 001d dddd 0001 * Usage : ST Z+, Rd * Operation : (Z) <- Rd, Z <- Z + 1 * Flags : None * Num Clocks : 2 */ uint16_t Z; int Rd = arg1; if ((Rd == 30) || (Rd == 31)) avr_error ("Results of operation are undefined: 0x%04x", opcode); /* Z is R31:R30 */ Z = (avr_core_gpwr_get (core, 31) << 8) + avr_core_gpwr_get (core, 30); avr_core_mem_write (core, Z, avr_core_gpwr_get (core, Rd)); /* Perform post-increment */ Z += 1; avr_core_gpwr_set (core, 30, Z & 0xff); avr_core_gpwr_set (core, 31, Z >> 8); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 2); return opcode_ST_Z_incr; } static int avr_op_SUB (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Subtract without Carry. * * Opcode : 0001 10rd dddd rrrr * Usage : SUB Rd, Rr * Operation : Rd <- Rd - Rr * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; int Rr = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t rr = avr_core_gpwr_get (core, Rr); uint8_t res = rd - rr; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = (get_sub_carry (res, rd, rr, 3))); sreg = set_bit_in_byte (sreg, SREG_V, V = (get_sub_overflow (res, rd, rr))); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = (get_sub_carry (res, rd, rr, 7))); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_SUB; } static int avr_op_SUBI (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Subtract Immediate. * * Opcode : 0101 KKKK dddd KKKK * Usage : SUBI Rd, K * Operation : Rd <- Rd - K * Flags : Z,C,N,V,S,H * Num Clocks : 1 */ int Z, C, N, V, S, H; int Rd = arg1; uint8_t K = arg2; uint8_t rd = avr_core_gpwr_get (core, Rd); uint8_t res = rd - K; uint8_t sreg = avr_core_sreg_get (core); sreg = set_bit_in_byte (sreg, SREG_H, H = (get_sub_carry (res, rd, K, 3))); sreg = set_bit_in_byte (sreg, SREG_V, V = (get_sub_overflow (res, rd, K))); sreg = set_bit_in_byte (sreg, SREG_N, N = ((res >> 7) & 0x1)); sreg = set_bit_in_byte (sreg, SREG_S, S = (N ^ V)); sreg = set_bit_in_byte (sreg, SREG_Z, Z = ((res & 0xff) == 0)); sreg = set_bit_in_byte (sreg, SREG_C, C = (get_sub_carry (res, rd, K, 7))); avr_core_sreg_set (core, sreg); avr_core_gpwr_set (core, Rd, res); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_SUBI; } static int avr_op_SWAP (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Swap Nibbles. * * Opcode : 1001 010d dddd 0010 * Usage : SWAP Rd * Operation : Rd(3..0) <--> Rd(7..4) * Flags : None * Num Clocks : 1 */ int Rd = arg1; uint8_t rd = avr_core_gpwr_get (core, Rd); avr_core_gpwr_set (core, Rd, ((rd << 4) & 0xf0) | ((rd >> 4) & 0x0f)); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_SWAP; } static int avr_op_WDR (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * Watchdog Reset. * * This is device specific and must be overridden by sub-class. * * Opcode : 1001 0101 1010 1000 * Usage : WDR * Operation : (see specific hardware specification for WDR) * Flags : None * Num Clocks : 1 */ WDTCR *wdtcr = (WDTCR *)avr_core_get_vdev_by_name (core, "WDTCR"); if (wdtcr == NULL) avr_error ("Core device doesn't have WDTCR attached"); wdtcr_update (wdtcr); avr_core_PC_incr (core, 1); avr_core_inst_CKS_set (core, 1); return opcode_WDR; } int avr_op_UNKNOWN (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2) { /* * An unknown opcode was seen. Treat it as a NOP, but return the UNKNOWN * so that the main loop can issue a warning. */ avr_op_NOP (core, opcode, arg1, arg2); return opcode_UNKNOWN; } /******************************************************************************\ * * Decode an opcode into the opcode handler function. * * Generates a warning and returns NULL if opcode is invalid. * * Returns a pointer to the function to handle the opcode. * \******************************************************************************/ static void lookup_opcode (uint16_t opcode, struct opcode_info *opi) { uint16_t decode; opi->arg1 = -1; opi->arg2 = -1; switch (opcode) { /* opcodes with no operands */ case 0x9598: opi->func = avr_op_BREAK; return; /* 1001 0101 1001 1000 | BREAK */ case 0x9519: opi->func = avr_op_EICALL; return; /* 1001 0101 0001 1001 | EICALL */ case 0x9419: opi->func = avr_op_EIJMP; return; /* 1001 0100 0001 1001 | EIJMP */ case 0x95D8: opi->func = avr_op_ELPM; return; /* 1001 0101 1101 1000 | ELPM */ case 0x95F8: opi->func = avr_op_ESPM; return; /* 1001 0101 1111 1000 | ESPM */ case 0x9509: opi->func = avr_op_ICALL; return; /* 1001 0101 0000 1001 | ICALL */ case 0x9409: opi->func = avr_op_IJMP; return; /* 1001 0100 0000 1001 | IJMP */ case 0x95C8: opi->func = avr_op_LPM; return; /* 1001 0101 1100 1000 | LPM */ case 0x0000: opi->func = avr_op_NOP; return; /* 0000 0000 0000 0000 | NOP */ case 0x9508: opi->func = avr_op_RET; return; /* 1001 0101 0000 1000 | RET */ case 0x9518: opi->func = avr_op_RETI; return; /* 1001 0101 0001 1000 | RETI */ case 0x9588: opi->func = avr_op_SLEEP; return; /* 1001 0101 1000 1000 | SLEEP */ case 0x95E8: opi->func = avr_op_SPM; return; /* 1001 0101 1110 1000 | SPM */ case 0x95A8: opi->func = avr_op_WDR; return; /* 1001 0101 1010 1000 | WDR */ default: { /* opcodes with two 5-bit register (Rd and Rr) operands */ decode = opcode & ~(mask_Rd_5 | mask_Rr_5); opi->arg1 = get_rd_5 (opcode); opi->arg2 = get_rr_5 (opcode); switch (decode) { case 0x1C00: opi->func = avr_op_ADC; return; /* 0001 11rd dddd rrrr | ADC or ROL */ case 0x0C00: opi->func = avr_op_ADD; return; /* 0000 11rd dddd rrrr | ADD or LSL */ case 0x2000: opi->func = avr_op_AND; return; /* 0010 00rd dddd rrrr | AND or TST */ case 0x1400: opi->func = avr_op_CP; return; /* 0001 01rd dddd rrrr | CP */ case 0x0400: opi->func = avr_op_CPC; return; /* 0000 01rd dddd rrrr | CPC */ case 0x1000: opi->func = avr_op_CPSE; return; /* 0001 00rd dddd rrrr | CPSE */ case 0x2400: opi->func = avr_op_EOR; return; /* 0010 01rd dddd rrrr | EOR or CLR */ case 0x2C00: opi->func = avr_op_MOV; return; /* 0010 11rd dddd rrrr | MOV */ case 0x9C00: opi->func = avr_op_MUL; return; /* 1001 11rd dddd rrrr | MUL */ case 0x2800: opi->func = avr_op_OR; return; /* 0010 10rd dddd rrrr | OR */ case 0x0800: opi->func = avr_op_SBC; return; /* 0000 10rd dddd rrrr | SBC */ case 0x1800: opi->func = avr_op_SUB; return; /* 0001 10rd dddd rrrr | SUB */ } /* opcode with a single register (Rd) as operand */ decode = opcode & ~(mask_Rd_5); opi->arg1 = get_rd_5 (opcode); opi->arg2 = -1; switch (decode) { case 0x9405: opi->func = avr_op_ASR; return; /* 1001 010d dddd 0101 | ASR */ case 0x9400: opi->func = avr_op_COM; return; /* 1001 010d dddd 0000 | COM */ case 0x940A: opi->func = avr_op_DEC; return; /* 1001 010d dddd 1010 | DEC */ case 0x9006: opi->func = avr_op_ELPM_Z; return; /* 1001 000d dddd 0110 | ELPM */ case 0x9007: opi->func = avr_op_ELPM_Z_incr; return; /* 1001 000d dddd 0111 | ELPM */ case 0x9403: opi->func = avr_op_INC; return; /* 1001 010d dddd 0011 | INC */ case 0x9000: opi->func = avr_op_LDS; return; /* 1001 000d dddd 0000 | LDS */ case 0x900C: opi->func = avr_op_LD_X; return; /* 1001 000d dddd 1100 | LD */ case 0x900E: opi->func = avr_op_LD_X_decr; return; /* 1001 000d dddd 1110 | LD */ case 0x900D: opi->func = avr_op_LD_X_incr; return; /* 1001 000d dddd 1101 | LD */ case 0x900A: opi->func = avr_op_LD_Y_decr; return; /* 1001 000d dddd 1010 | LD */ case 0x9009: opi->func = avr_op_LD_Y_incr; return; /* 1001 000d dddd 1001 | LD */ case 0x9002: opi->func = avr_op_LD_Z_decr; return; /* 1001 000d dddd 0010 | LD */ case 0x9001: opi->func = avr_op_LD_Z_incr; return; /* 1001 000d dddd 0001 | LD */ case 0x9004: opi->func = avr_op_LPM_Z; return; /* 1001 000d dddd 0100 | LPM */ case 0x9005: opi->func = avr_op_LPM_Z_incr; return; /* 1001 000d dddd 0101 | LPM */ case 0x9406: opi->func = avr_op_LSR; return; /* 1001 010d dddd 0110 | LSR */ case 0x9401: opi->func = avr_op_NEG; return; /* 1001 010d dddd 0001 | NEG */ case 0x900F: opi->func = avr_op_POP; return; /* 1001 000d dddd 1111 | POP */ case 0x920F: opi->func = avr_op_PUSH; return; /* 1001 001d dddd 1111 | PUSH */ case 0x9407: opi->func = avr_op_ROR; return; /* 1001 010d dddd 0111 | ROR */ case 0x9200: opi->func = avr_op_STS; return; /* 1001 001d dddd 0000 | STS */ case 0x920C: opi->func = avr_op_ST_X; return; /* 1001 001d dddd 1100 | ST */ case 0x920E: opi->func = avr_op_ST_X_decr; return; /* 1001 001d dddd 1110 | ST */ case 0x920D: opi->func = avr_op_ST_X_incr; return; /* 1001 001d dddd 1101 | ST */ case 0x920A: opi->func = avr_op_ST_Y_decr; return; /* 1001 001d dddd 1010 | ST */ case 0x9209: opi->func = avr_op_ST_Y_incr; return; /* 1001 001d dddd 1001 | ST */ case 0x9202: opi->func = avr_op_ST_Z_decr; return; /* 1001 001d dddd 0010 | ST */ case 0x9201: opi->func = avr_op_ST_Z_incr; return; /* 1001 001d dddd 0001 | ST */ case 0x9402: opi->func = avr_op_SWAP; return; /* 1001 010d dddd 0010 | SWAP */ } /* opcodes with a register (Rd) and a constant data (K) as operands */ decode = opcode & ~(mask_Rd_4 | mask_K_8); opi->arg1 = get_rd_4 (opcode); opi->arg2 = get_K_8 (opcode); switch (decode) { case 0x7000: opi->func = avr_op_ANDI; return; /* 0111 KKKK dddd KKKK | CBR or ANDI */ case 0x3000: opi->func = avr_op_CPI; return; /* 0011 KKKK dddd KKKK | CPI */ case 0xE000: opi->func = avr_op_LDI; return; /* 1110 KKKK dddd KKKK | LDI or SER */ case 0x6000: opi->func = avr_op_ORI; return; /* 0110 KKKK dddd KKKK | SBR or ORI */ case 0x4000: opi->func = avr_op_SBCI; return; /* 0100 KKKK dddd KKKK | SBCI */ case 0x5000: opi->func = avr_op_SUBI; return; /* 0101 KKKK dddd KKKK | SUBI */ } /* opcodes with a register (Rd) and a register bit number (b) as operands */ decode = opcode & ~(mask_Rd_5 | mask_reg_bit); opi->arg1 = get_rd_5 (opcode); opi->arg2 = get_reg_bit (opcode); switch (decode) { case 0xF800: opi->func = avr_op_BLD; return; /* 1111 100d dddd 0bbb | BLD */ case 0xFA00: opi->func = avr_op_BST; return; /* 1111 101d dddd 0bbb | BST */ case 0xFC00: opi->func = avr_op_SBRC; return; /* 1111 110d dddd 0bbb | SBRC */ case 0xFE00: opi->func = avr_op_SBRS; return; /* 1111 111d dddd 0bbb | SBRS */ } /* opcodes with a relative 7-bit address (k) and a register bit number (b) as operands */ decode = opcode & ~(mask_k_7 | mask_reg_bit); opi->arg1 = get_reg_bit (opcode); opi->arg2 = n_bit_unsigned_to_signed (get_k_7 (opcode), 7); switch (decode) { case 0xF400: opi->func = avr_op_BRBC; return; /* 1111 01kk kkkk kbbb | BRBC */ case 0xF000: opi->func = avr_op_BRBS; return; /* 1111 00kk kkkk kbbb | BRBS */ } /* opcodes with a 6-bit address displacement (q) and a register (Rd) as operands */ decode = opcode & ~(mask_Rd_5 | mask_q_displ); opi->arg1 = get_rd_5 (opcode); opi->arg2 = get_q (opcode); switch (decode) { case 0x8008: opi->func = avr_op_LDD_Y; return; /* 10q0 qq0d dddd 1qqq | LDD */ case 0x8000: opi->func = avr_op_LDD_Z; return; /* 10q0 qq0d dddd 0qqq | LDD */ case 0x8208: opi->func = avr_op_STD_Y; return; /* 10q0 qq1d dddd 1qqq | STD */ case 0x8200: opi->func = avr_op_STD_Z; return; /* 10q0 qq1d dddd 0qqq | STD */ } /* opcodes with a absolute 22-bit address (k) operand */ decode = opcode & ~(mask_k_22); opi->arg1 = get_k_22 (opcode); opi->arg2 = -1; switch (decode) { case 0x940E: opi->func = avr_op_CALL; return; /* 1001 010k kkkk 111k | CALL */ case 0x940C: opi->func = avr_op_JMP; return; /* 1001 010k kkkk 110k | JMP */ } /* opcode with a sreg bit select (s) operand */ decode = opcode & ~(mask_sreg_bit); opi->arg1 = get_sreg_bit (opcode); opi->arg2 = -1; switch (decode) { /* BCLR takes place of CL{C,Z,N,V,S,H,T,I} */ /* BSET takes place of SE{C,Z,N,V,S,H,T,I} */ case 0x9488: opi->func = avr_op_BCLR; return; /* 1001 0100 1sss 1000 | BCLR */ case 0x9408: opi->func = avr_op_BSET; return; /* 1001 0100 0sss 1000 | BSET */ } /* opcodes with a 6-bit constant (K) and a register (Rd) as operands */ decode = opcode & ~(mask_K_6 | mask_Rd_2); opi->arg1 = get_rd_2 (opcode); opi->arg2 = get_K_6 (opcode); switch (decode) { case 0x9600: opi->func = avr_op_ADIW; return; /* 1001 0110 KKdd KKKK | ADIW */ case 0x9700: opi->func = avr_op_SBIW; return; /* 1001 0111 KKdd KKKK | SBIW */ } /* opcodes with a 5-bit IO Addr (A) and register bit number (b) as operands */ decode = opcode & ~(mask_A_5 | mask_reg_bit); opi->arg1 = get_A_5 (opcode); opi->arg2 = get_reg_bit (opcode); switch (decode) { case 0x9800: opi->func = avr_op_CBI; return; /* 1001 1000 AAAA Abbb | CBI */ case 0x9A00: opi->func = avr_op_SBI; return; /* 1001 1010 AAAA Abbb | SBI */ case 0x9900: opi->func = avr_op_SBIC; return; /* 1001 1001 AAAA Abbb | SBIC */ case 0x9B00: opi->func = avr_op_SBIS; return; /* 1001 1011 AAAA Abbb | SBIS */ } /* opcodes with a 6-bit IO Addr (A) and register (Rd) as operands */ decode = opcode & ~(mask_A_6 | mask_Rd_5); opi->arg1 = get_rd_5 (opcode); opi->arg2 = get_A_6 (opcode); switch (decode) { case 0xB000: opi->func = avr_op_IN; return; /* 1011 0AAd dddd AAAA | IN */ case 0xB800: opi->func = avr_op_OUT; return; /* 1011 1AAd dddd AAAA | OUT */ } /* opcodes with a relative 12-bit address (k) operand */ decode = opcode & ~(mask_k_12); opi->arg1 = n_bit_unsigned_to_signed (get_k_12 (opcode), 12); opi->arg2 = -1; switch (decode) { case 0xD000: opi->func = avr_op_RCALL; return; /* 1101 kkkk kkkk kkkk | RCALL */ case 0xC000: opi->func = avr_op_RJMP; return; /* 1100 kkkk kkkk kkkk | RJMP */ } /* opcodes with two 4-bit register (Rd and Rr) operands */ decode = opcode & ~(mask_Rd_4 | mask_Rr_4); opi->arg1 = get_rd_4 (opcode); opi->arg2 = get_rr_4 (opcode); switch (decode) { case 0x0100: opi->func = avr_op_MOVW; return; /* 0000 0001 dddd rrrr | MOVW */ case 0x0200: opi->func = avr_op_MULS; return; /* 0000 0010 dddd rrrr | MULS */ } /* opcodes with two 3-bit register (Rd and Rr) operands */ decode = opcode & ~(mask_Rd_3 | mask_Rr_3); opi->arg1 = get_rd_3 (opcode); opi->arg2 = get_rr_3 (opcode); switch (decode) { case 0x0300: opi->func = avr_op_MULSU; return; /* 0000 0011 0ddd 0rrr | MULSU */ case 0x0308: opi->func = avr_op_FMUL; return; /* 0000 0011 0ddd 1rrr | FMUL */ case 0x0380: opi->func = avr_op_FMULS; return; /* 0000 0011 1ddd 0rrr | FMULS */ case 0x0388: opi->func = avr_op_FMULSU; return; /* 0000 0011 1ddd 1rrr | FMULSU */ } } /* default */ } /* first switch */ opi->func = avr_op_UNKNOWN; opi->arg1 = -1; opi->arg2 = -1; } /* decode opcode function */ /** * \brief Initialize the decoder lookup table. * * This is automatically called by avr_core_construct(). * * It is safe to call this function many times, since if will only create the * table the first time it is called. */ void decode_init_lookup_table (void) { if (global_opcode_lookup_table == NULL) { int num_ops = 0x10000; int i; avr_message ("generating opcode lookup_table\n"); global_opcode_lookup_table = avr_new0 (struct opcode_info, num_ops); for (i = 0; i < num_ops; i++) { lookup_opcode (i, global_opcode_lookup_table + i); } } } /** * \brief Decode an opcode into the opcode handler function. * * Generates a warning and returns NULL if opcode is invalid. * * Returns a pointer to the function to handle the opcode. */ extern inline struct opcode_info *decode_opcode (uint16_t opcode); simulavr-0.1.2.2/src/decoder.h0000644000175000001440000000401607763046134013011 00000000000000/* * $Id: decoder.h,v 1.6 2003/12/02 08:25:00 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_DECODER_H #define SIM_DECODER_H /****************************************************************************\ * * Avr Opcode Decoder and Opcode handler routines * \****************************************************************************/ typedef int (*Opcode_FP) (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2); struct opcode_info { Opcode_FP func; unsigned int arg1; unsigned int arg2; }; extern struct opcode_info *global_opcode_lookup_table; extern void decode_init_lookup_table (void); extern int avr_op_UNKNOWN (AvrCore *core, uint16_t opcode, unsigned int arg1, unsigned int arg2); extern inline struct opcode_info * decode_opcode (uint16_t opcode) { struct opcode_info *opi; opi = global_opcode_lookup_table + opcode; if (opi->func == avr_op_UNKNOWN) avr_warning ("Unknown opcode: 0x%04x\n", opcode); return opi; } #endif /* SIM_DECODER_H */ simulavr-0.1.2.2/src/device.c0000644000175000001440000001264010006401504012614 00000000000000/* * $Id: device.c,v 1.15 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" /** \file device.c * \brief VDevice methods * * These functions are the base for all other devices * mapped into the device space. */ /** \brief Create a new VDevice. */ VDevice * vdev_new (char *name, VDevFP_Read rd, VDevFP_Write wr, VDevFP_Reset reset, VDevFP_AddAddr add_addr) { VDevice *dev; dev = avr_new0 (VDevice, 1); vdev_construct (dev, rd, wr, reset, add_addr); class_overload_destroy ((AvrClass *)dev, vdev_destroy); return dev; } /** \brief Default AddAddr method. This generate a warning that the should let the developer know that the vdev needs to be updated. */ void vdev_def_AddAddr (VDevice *dev, int addr, char *name, int related_addr, void *data) { avr_warning ("Default AddAddr called [addr=0x%x; '%s']\n", addr, name); } /** \brief Constructor for a VDevice. */ void vdev_construct (VDevice *dev, VDevFP_Read rd, VDevFP_Write wr, VDevFP_Reset reset, VDevFP_AddAddr add_addr) { if (dev == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)dev); dev->read = rd; dev->write = wr; dev->reset = reset; dev->add_addr = add_addr; } /** \brief Destructor for a VDevice. */ void vdev_destroy (void *dev) { if (dev == NULL) return; class_destroy (dev); } #if 0 /** \brief Compare the names of 2 devices * \param c1 The first device. * \param c2 is a string and not an AvrClass object, because this function is * called by dlist_lookup() which passes two AvrClass pointers. So the string * is casted to an *AvrClass. */ int vdev_name_cmp (AvrClass *c1, AvrClass *c2) { return strcmp (((VDevice *)c1)->name, (char *)c2); } #endif #if 0 /** \brief Checks if a address is in the device's address range * \param c1 \c AvrClass to check. * \param c2 The address to check. * * \return The different between the device's address bounds and \a c2 or if * \a c2 is within the address range 0. * * \note When comparing an addr, c2 is really just a pointer (see * vdev_name_cmp() for details) to int and then we see if d1->base <= addr < * (d1->base+d1->size). */ int vdev_addr_cmp (AvrClass *c1, AvrClass *c2) { VDevice *d1 = (VDevice *)c1; int addr = *(int *)c2; if (addr < d1->base) return (addr - d1->base); if (addr >= (d1->base + d1->size)) /* Add one to ensure we don't return zero. */ return (1 + addr - (d1->base + d1->size)); /* addr is in device's range */ return 0; } #endif /** \brief Reads the device's value in the register at \a addr. */ uint8_t vdev_read (VDevice *dev, int addr) { return dev->read (dev, addr); } /** \brief Writes an value to the register at \a addr. */ void vdev_write (VDevice *dev, int addr, uint8_t val) { dev->write (dev, addr, val); } /** \brief Resets a device. */ void vdev_reset (VDevice *dev) { dev->reset (dev); } /** \brief Set the core field. */ void vdev_set_core (VDevice *dev, AvrClass *core) { dev->core = (AvrClass *)core; } /** \brief Get the core field. */ extern inline AvrClass *vdev_get_core (VDevice *dev); /** \brief Inform the vdevice that it needs to handle another address. This is primarily used when creating the core in dev_supp_create_core(). */ extern void vdev_add_addr (VDevice *dev, int addr, char *name, int rel_addr, void *data) { if (dev->add_addr) { dev->add_addr (dev, addr, name, rel_addr, data); } else { avr_warning ("attempt to add addr to vdev with no add_addr() method: " "%s [0x%04x]\n", name, addr); } } #if 0 /** \brief Get the device's base address. */ int vdev_get_base (VDevice *dev) { return dev->base; } #endif #if 0 /** \brief Set the device's size (the number of bytes of the address space it * consumes). */ int vdev_get_size (VDevice *dev) { return dev->size; } #endif #if 0 /** \brief Get the device's name. */ char * vdev_get_name (VDevice *dev) { return dev->name; } #endif simulavr-0.1.2.2/src/devsupp.c0000644000175000001440000002357710017317247013072 00000000000000/* * $Id: devsupp.c,v 1.28 2004/02/26 07:22:15 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file devsupp.c * \brief Contains definitions for device types (i.e. at90s8515, at90s2313, * etc.) * * This module is used to define the attributes for each device in the AVR * family. A generic constructor is used to create a new AvrCore object with * the proper ports, built-in peripherals, memory layout, registers, and * interrupt vectors, etc. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "spi.h" #include "adc.h" #include "usb.h" #include "uart.h" #include "avrcore.h" #include "devsupp.h" #ifndef DOXYGEN /* don't expose to doxygen */ /* * Used to select which vector table the device uses. * The value is an index into the global_vtable_list[] array * defined in intvects.c. */ enum _vector_table_select { VTAB_AT90S1200 = 0, VTAB_AT90S2313, VTAB_AT90S4414, VTAB_ATMEGA8, VTAB_ATMEGA16, VTAB_ATMEGA103, VTAB_ATMEGA128, VTAB_AT43USB355, VTAB_AT43USB320, VTAB_AT43USB325, VTAB_AT43USB326, }; /* IO Register Definition. */ struct io_reg_defn { uint16_t addr; /* The address of the register (in memory space, not IO space). */ char *name; /* The register name as given by the datasheet. */ uint16_t ref_addr; /* Use the vdev reference at the given address. If not zero, use the same vdev pointer at the given register address. The vdev must have already been created at that address. Remember that address zero is General Register 0 which is not an IO register. This value should never be less than 0x20. */ uint16_t related; /* A related address. For example, if a device has more than one timer, each timer has it's own instance of the timer vdev, but all timers need access to the TIMSK register which should have the addr specified here. There might be more than one related address for a vdev, so this may need to become an array. */ VDevCreate vdev_create; /* The vdev creation function to be used to create the vdev. Note that this should be a wrapper around the vdev's new method. This field is ignored if rel_addr is greater than 0x1f. */ void *data; /* Optional data that may be needed by the vdev. May be address specific too. */ int flags; /* Flags that can change the behaviour of the value. (e.g. FL_SET_ON_RESET) */ uint8_t reset_value; /* Initialize the register to this value after reset. */ /* These should handle PORT width automagically. */ uint8_t rd_mask; /* Mask of the readable bits in the register. */ uint8_t wr_mask; /* Mask of the writable bits in the register. */ }; #define IO_REG_DEFN_TERMINATOR { .name = NULL, } /* Structure for defining a supported device */ struct _DevSuppDefn { char *name; /* name of device type */ StackType stack_type; /* STACK_HARDWARE or STACK_MEMORY */ int has_ext_io_reg; /* does the device have extened IO registers */ int irq_vect_idx; /* interrupt vector table index */ struct { int pc; /* width of program counter (usually 2, maybe 3) */ int stack; /* depth of stack (only used by hardware stack) */ int flash; /* bytes of flash memory */ int sram; /* bytes of sram memory */ int eeprom; /* bytes of eeprom memory */ } size; /* This _must_ be the last field of the structure since it is a variable length array. (This is new in C99.) */ struct io_reg_defn io_reg[]; /* Definitions for for all the IO registers the device provides. */ }; #endif /* DOXYGEN */ int dev_supp_has_ext_io_reg (DevSuppDefn *dev) { return dev->has_ext_io_reg; } int dev_supp_get_flash_sz (DevSuppDefn *dev) { return dev->size.flash; } int dev_supp_get_PC_sz (DevSuppDefn *dev) { return dev->size.pc; } int dev_supp_get_stack_sz (DevSuppDefn *dev) { return dev->size.stack; } int dev_supp_get_vtab_idx (DevSuppDefn *dev) { return dev->irq_vect_idx; } int dev_supp_get_sram_sz (DevSuppDefn *dev) { return dev->size.sram; } /* * Device Definitions */ #define IN_DEVSUPP_C #include "defn/90s1200.h" #include "defn/90s2313.h" #include "defn/90s4414.h" #include "defn/90s8515.h" #include "defn/mega8.h" #include "defn/mega16.h" #include "defn/mega103.h" #include "defn/mega128.h" #include "defn/43usb320.h" #include "defn/43usb325.h" #include "defn/43usb326.h" #include "defn/43usb351.h" #include "defn/43usb353.h" #include "defn/43usb355.h" #undef IN_DEVSUPP_C /** \brief List of supported devices. */ static DevSuppDefn *devices_supported[] = { &defn_at90s1200, &defn_at90s2313, &defn_at90s4414, &defn_at90s8515, &defn_atmega8, &defn_atmega16, &defn_atmega103, &defn_atmega128, &defn_at43usb351, &defn_at43usb353, &defn_at43usb355, &defn_at43usb320, &defn_at43usb325, &defn_at43usb326, NULL }; /** * \brief Look up a device name in support list. * * \returns An opaque pointer to DevSuppDefn or NULL if not found. */ DevSuppDefn * dev_supp_lookup_device (char *dev_name) { DevSuppDefn **dev = devices_supported; int len; while ((*dev)) { len = strlen ((*dev)->name); if (strncmp ((*dev)->name, dev_name, len) == 0) return (*dev); dev++; } return NULL; } /** \brief Print a list of supported devices to a file pointer. */ void dev_supp_list_devices (FILE * fp) { DevSuppDefn **dev; for (dev = devices_supported; (*dev); dev++) fprintf (fp, " %s\n", (*dev)->name); } void dev_supp_attach_io_regs (AvrCore *core, DevSuppDefn *dev) { VDevice *vdev; struct io_reg_defn *reg = dev->io_reg; while (reg->name) { if (reg->ref_addr) { if (reg->ref_addr < 0x20) { avr_error ("can't attach IO reg into general register space"); } /* Get the referenced vdev. */ vdev = avr_core_get_vdev_by_addr (core, reg->ref_addr); if (vdev == NULL) { /* This means that the implementor of the vdev screwed up. */ avr_error ("reference vdev hasn't been created yet"); } vdev_add_addr (vdev, reg->addr, reg->name, reg->related, reg->data); avr_core_attach_vdev (core, reg->addr, reg->name, vdev, reg->flags, reg->reset_value, reg->rd_mask, reg->wr_mask); avr_message ("attach: IO Reg '%s' at 0x%04x: ref = 0x%04x\n", reg->name, reg->addr, reg->ref_addr); } else if (reg->vdev_create) { vdev = reg->vdev_create (reg->addr, reg->name, reg->related, reg->data); avr_core_attach_vdev (core, reg->addr, reg->name, vdev, reg->flags, reg->reset_value, reg->rd_mask, reg->wr_mask); /* Attaching implicitly references the device so we need to unref the newly created vdev since we're done with it here. */ class_unref ((AvrClass *)vdev); avr_message ("attach: IO Reg '%s' at 0x%04x: created\n", reg->name, reg->addr); } else { avr_message ("TODO: attach IO Reg '%s' at 0x%04x\n", reg->name, reg->addr); avr_core_set_addr_name (core, reg->addr, reg->name); } reg++; } } simulavr-0.1.2.2/src/devsupp.h0000644000175000001440000000322710006401504013051 00000000000000/* * $Id: devsupp.h,v 1.7 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_DEVSUPP_H #define SIM_DEVSUPP_H typedef struct _DevSuppDefn DevSuppDefn; extern void dev_supp_list_devices (FILE * fp); extern DevSuppDefn *dev_supp_lookup_device (char *dev_name); extern void dev_supp_attach_io_regs (AvrCore *core, DevSuppDefn *dev); extern int dev_supp_get_flash_sz (DevSuppDefn *dev); extern int dev_supp_get_sram_sz (DevSuppDefn *dev); extern int dev_supp_get_PC_sz (DevSuppDefn *dev); extern int dev_supp_get_stack_sz (DevSuppDefn *dev); extern int dev_supp_get_vtab_idx (DevSuppDefn *dev); extern int dev_supp_has_ext_io_reg (DevSuppDefn *dev); #endif /* SIM_DEVSUPP_H */ simulavr-0.1.2.2/src/display.c0000644000175000001440000002721407762602566013057 00000000000000/* * $Id: display.c,v 1.14 2003/12/01 09:10:14 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file display.c * \brief Interface for using display coprocesses. * * Simulavr has the ability to use a coprocess to display register and memory * values in near real time. */ #include #include #include #include #include #include #include #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "display.h" enum { MAX_BUF = 1024, }; /* I really don't want to use a global here, but I also don't want to have to track the pipe's fd in the core. */ static int global_pipe_fd = -1; /* Need to store the child's pid so that we can kill and waitpid it when you close the display. Otherwise we have problems with zombies. */ static pid_t global_child_pid = -1; /** \brief Open a display as a coprocess. \param prog The program to use as a display coprocess. \param no_xterm If non-zero, don't run the disply in an xterm. \param flash_sz The size of the flash memory space in bytes. \param sram_sz The size of the sram memory space in bytes. \param sram_start The addr of the first byte of sram (usually 0x60 or 0x100). \param eeprom_sz The size of the eeprom memory space in bytes. Try to start up a helper program as a child process for displaying registers and memory. If the prog argument is NULL, don't start up a display. Returns an open file descriptor of a pipe used to send data to the helper program. Returns -1 if something failed. */ int display_open (char *prog, int no_xterm, int flash_sz, int sram_sz, int sram_start, int eeprom_sz) { pid_t pid; int pfd[2]; /* pipe file desc: pfd[0] is read, pfd[1] is write */ int res; if (prog == NULL) { prog = getenv ("SIM_DISP_PROG"); if (prog == NULL) return -1; } /* Open a pipe for writing from the simulator to the display program. We don't want to use popen() since the display program might need to use stdin/stdout for it's own uses. */ res = pipe (pfd); if (res < 0) { avr_warning ("pipe failed: %s\n", strerror (errno)); return -1; } /* Fork off a new process. */ pid = fork (); if (pid < 0) { avr_warning ("fork failed: %s\n", strerror (errno)); return -1; } else if (pid > 0) /* parent process */ { /* close the read side of the pipe */ close (pfd[0]); /* remember the child's pid */ global_child_pid = pid; global_pipe_fd = pfd[1]; return global_pipe_fd; } else /* child process */ { char pfd_env[20]; char fl_sz[20], sr_sz[20], sr_start[20], eep_sz[20]; char spfd[10]; /* close the write side of the pipe */ close (pfd[1]); /* setup the args for display program */ snprintf (fl_sz, sizeof (fl_sz) - 1, "%d", flash_sz); snprintf (sr_sz, sizeof (sr_sz) - 1, "%d", sram_sz); snprintf (sr_start, sizeof (sr_start) - 1, "%d", sram_start); snprintf (eep_sz, sizeof (eep_sz) - 1, "%d", eeprom_sz); snprintf (spfd, sizeof (spfd) - 1, "%d", pfd[0]); /* set the SIM_PIPE_FD env variable */ snprintf (pfd_env, sizeof (pfd_env), "SIM_PIPE_FD=%d", pfd[0]); putenv (pfd_env); /* The user can specify not to use an xterm since some display programs might not need (or want) to be run in an xterm. For example, a gtk+ program would be able to handle it's own windowing. Of course, starting 'prog' up with it's own xterm, will not hurt and 'prog' will put stdout/stderr there instead of mixing with simulavr's output. The default is to start prog in an xterm. */ if (no_xterm) { execlp (prog, prog, "--pfd", spfd, fl_sz, sr_sz, sr_start, eep_sz, NULL); } else { /* try to start up the display program in it's own xterm */ execlp ("xterm", "xterm", "-geom", "100x50", "-e", prog, "--pfd", spfd, fl_sz, sr_sz, sr_start, eep_sz, NULL); } /* if the exec returns, an error occurred */ avr_warning ("exec failed: %s\n", strerror (errno)); _exit (1); } return -1; /* should never get here */ } /** \brief Close a display and send coprocess a quit message. */ void display_close (void) { if (global_pipe_fd < 0) return; display_send_msg ("q"); close (global_pipe_fd); global_pipe_fd = -1; kill (global_child_pid, SIGINT); waitpid (0, NULL, 0); } static unsigned char checksum (char *s) { unsigned char CC = 0; while (*s) { CC += *s; s++; } return CC; } /** \brief Encode the message and send to display. \param msg The message string to be sent to the display process. Encoding is the same as that used by the gdb remote protocol: '\$...\#CC' where '...' is msg, CC is checksum. There is no newline termination for encoded messages. FIXME: TRoth: This should be a private function. It is only public so that dtest.c can be kept simple. dtest.c should be changed to avoid direct use of this function. [dtest.c has served it's purpose and will be retired soon.] */ void display_send_msg (char *msg) { int len = strlen (msg) + 4 + 1; int res; char *enc_msg; /* the encoded msg */ enc_msg = avr_new0 (char, len + 1); snprintf (enc_msg, len, "$%s#%02x", msg, checksum (msg)); #if defined(DISP_DEBUG_OUTPUT_ON) fprintf (stderr, "DISP: %s\n", enc_msg); #endif res = write (global_pipe_fd, enc_msg, len); if ((res < 0) && (errno == EINTR)) { /* write() was interrupted, try again and if it still fails, let it be fatal. */ avr_warning ("Interrupted write()\n"); res = write (global_pipe_fd, enc_msg, len); } if (res < 0) avr_error ("write failed: %s\n", strerror (errno)); if (res < len) avr_error ("incomplete write\n"); avr_free (enc_msg); } static char global_buf[MAX_BUF + 1]; /** \brief Update the time in the display. \param clock The new time in number of clocks. */ void display_clock (int clock) { if (global_pipe_fd < 0) return; snprintf (global_buf, MAX_BUF, "n%x", clock); global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Update the Program Counter in the display. \param val The new value of the program counter. */ void display_pc (int val) { if (global_pipe_fd < 0) return; snprintf (global_buf, MAX_BUF, "p%x", val); global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Update a register in the display. \param reg The register number. \param val The new value of the register. */ void display_reg (int reg, uint8_t val) { if (global_pipe_fd < 0) return; snprintf (global_buf, MAX_BUF, "r%x:%02x", reg, val); global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Update an IO register in the display. \param reg The IO register number. \param val The new value of the register. */ void display_io_reg (int reg, uint8_t val) { if (global_pipe_fd < 0) return; snprintf (global_buf, MAX_BUF, "i%x:%02x", reg, val); global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Specify a name for an IO register. \param reg The IO register number. \param name The symbolic name of the register. Names of IO registers may be different from device to device. */ void display_io_reg_name (int reg, char *name) { if (global_pipe_fd < 0) return; snprintf (global_buf, MAX_BUF, "I%x:%s", reg, name); global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Update a block of flash addresses in the display. \param addr Address of beginning of the block. \param len Length of the block (number of words). \param vals Pointer to an array of \a len words. The display will update each addr of the block to the coresponding value in the \a vals array. Each address in the flash references a single 16-bit wide word (or opcode or instruction). Therefore, flash addresses are aligned to 16-bit boundaries. It is simplest to consider the flash an array of 16-bit values indexed by the address. */ void display_flash (int addr, int len, uint16_t * vals) { int bytes; int i; if (global_pipe_fd < 0) return; bytes = snprintf (global_buf, MAX_BUF, "f%x,%x:", addr, len); for (i = 0; i < len; i++) { if (MAX_BUF - bytes < 0) avr_error ("buffer overflow"); bytes += snprintf (global_buf + bytes, MAX_BUF - bytes, "%04x", vals[i]); } global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Update a block of sram addresses in the display. \param addr Address of beginning of the block. \param len Length of the block (number of bytes). \param vals Pointer to an array of \a len bytes. The display will update each addr of the block to the coresponding value in the \a vals array. */ void display_sram (int addr, int len, uint8_t * vals) { int bytes; int i; if (global_pipe_fd < 0) return; bytes = snprintf (global_buf, MAX_BUF, "s%x,%x:", addr, len); for (i = 0; i < len; i++) { if (MAX_BUF - bytes < 0) avr_error ("buffer overflow"); bytes += snprintf (global_buf + bytes, MAX_BUF - bytes, "%02x", vals[i]); } global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } /** \brief Update a block of eeprom addresses in the display. \param addr Address of beginning of the block. \param len Length of the block (number of bytes). \param vals Pointer to an array of \a len bytes. The display will update each addr of the block to the coresponding value in the \a vals array. */ void display_eeprom (int addr, int len, uint8_t * vals) { int bytes; int i; if (global_pipe_fd < 0) return; bytes = snprintf (global_buf, MAX_BUF, "e%x,%x:", addr, len); for (i = 0; i < len; i++) { if (MAX_BUF - bytes < 0) avr_error ("buffer overflow"); bytes += snprintf (global_buf + bytes, MAX_BUF - bytes, "%02x", vals[i]); } global_buf[MAX_BUF] = '\0'; display_send_msg (global_buf); } simulavr-0.1.2.2/src/display.h0000644000175000001440000000355607762567530013070 00000000000000/* * $Id: display.h,v 1.8 2003/12/01 07:35:52 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_DISPLAY_H #define SIM_DISPLAY_H extern int display_open (char *prog, int no_xterm, int flash_sz, int sram_sz, int sram_start, int eeprom_sz); extern void display_close (void); /* These functions will tell the display to update the given value */ extern void display_clock (int clock); extern void display_pc (int val); extern void display_reg (int reg, uint8_t val); extern void display_io_reg (int reg, uint8_t val); extern void display_io_reg_name (int reg, char *name); extern void display_flash (int addr, int len, uint16_t * vals); extern void display_sram (int addr, int len, uint8_t * vals); extern void display_eeprom (int addr, int len, uint8_t * vals); /* FIXME: this isn't going to be public for much longer */ extern void display_send_msg (char *msg); #endif /* SIM_DISPLAY_H */ simulavr-0.1.2.2/src/eeprom.c0000644000175000001440000002444410006401504012651 00000000000000/* * $Id: eeprom.c,v 1.20 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include #include #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "display.h" static uint8_t eeprom_reg_read (VDevice *dev, int addr); static void eeprom_reg_write (VDevice *dev, int addr, uint8_t val); static void eeprom_reg_reset (VDevice *dev); static void eeprom_wr_eecr (EEProm *ee, uint8_t val); static int eeprom_wr_op_cb (uint64_t time, AvrClass *data); static int eeprom_mwe_clr_cb (uint64_t time, AvrClass *data); EEProm * eeprom_new (int size, uint8_t eecr_mask) { EEProm *eeprom; eeprom = avr_new (EEProm, 1); eeprom_construct (eeprom, size, eecr_mask); class_overload_destroy ((AvrClass *)eeprom, eeprom_destroy); return eeprom; } void eeprom_construct (EEProm *eeprom, int size, uint8_t eecr_mask) { int i; if (eeprom == NULL) avr_error ("passed null ptr"); eeprom->stor = storage_new (0 /*base */ , size); /* init eeprom to ones */ for (i = 0; i < size; i++) storage_writeb (eeprom->stor, i, 0xff); eeprom->eecr_mask = eecr_mask; eeprom_reg_reset ((VDevice *)eeprom); vdev_construct ((VDevice *)eeprom, eeprom_reg_read, eeprom_reg_write, eeprom_reg_reset, vdev_def_AddAddr); } void eeprom_destroy (void *eeprom) { EEProm *_eeprom = (EEProm *)eeprom; if (eeprom == NULL) return; class_unref ((AvrClass *)_eeprom->stor); vdev_destroy (eeprom); } int eeprom_get_size (EEProm *eeprom) { return storage_get_size (eeprom->stor); } static uint8_t eeprom_reg_read (VDevice *dev, int addr) { EEProm *ee = (EEProm *)dev; switch (addr) { case EECR_ADDR: return ee->eecr; case EEDR_ADDR: return ee->eedr; case EEARL_ADDR: return ee->eearl; case EEARH_ADDR: return ee->eearh; } avr_error ("Bad address: %d", addr); return 0; } static void eeprom_reg_write (VDevice *dev, int addr, uint8_t val) { EEProm *ee = (EEProm *)dev; if (ee->eecr & mask_EEWE) { /* * From the 8515 data sheet: The user should poll the EEWE bit before * starting the read operaton. If a write operation is in progress * when new data or address is written to the EEPROM I/O registers, * the write operation will be interrupted, and the result is * undefined. */ avr_error ("Attempt to write to EEPROM I/O reg during write " "operation"); } switch (addr) { case EECR_ADDR: eeprom_wr_eecr (ee, val); return; case EEDR_ADDR: ee->eedr = val; return; case EEARL_ADDR: ee->eearl = val; return; case EEARH_ADDR: ee->eearh = val; return; } avr_error ("Bad address: %d", addr); } static void eeprom_reg_reset (VDevice *dev) { EEProm *ee = (EEProm *)dev; ee->wr_op_cb = NULL; ee->wr_op_clk = 0; ee->mwe_clr_cb = NULL; ee->mwe_clk = 0; ee->eecr = ee->eedr = ee->eearl = ee->eearh = 0; } static void eeprom_wr_eecr (EEProm *ee, uint8_t val) { int addr = (ee->eearh << 8) | ee->eearl; CallBack *cb; switch (val & ee->eecr_mask) { case mask_EERE: /* * we never need to set EERE bit one, * just more data from eeprom array into eedr. */ ee->eedr = storage_readb (ee->stor, addr); break; case mask_EEWE: if (((ee->eecr_mask & mask_EEMWE) == 0) /* device has no MWE function */ || (ee->eecr & ee->eecr_mask & mask_EEMWE)) /* or MWE bit is set */ { ee->eecr |= mask_EEWE; ee->wr_op_clk = EEPROM_WR_OP_CLKS; /* start write operation */ if (ee->wr_op_cb == NULL) { cb = callback_new (eeprom_wr_op_cb, (AvrClass *)ee); ee->wr_op_cb = cb; avr_core_async_cb_add ((AvrCore *) vdev_get_core ((VDevice *)ee), cb); } } break; case mask_EEMWE: ee->eecr |= mask_EEMWE; ee->mwe_clk = EEPROM_MWE_CLKS; if (ee->mwe_clr_cb == NULL) { cb = callback_new (eeprom_mwe_clr_cb, (AvrClass *)ee); ee->mwe_clr_cb = cb; avr_core_clk_cb_add ((AvrCore *)vdev_get_core ((VDevice *)ee), cb); } break; case (mask_EEMWE | mask_EEWE): /* just call this function again, but without EEMWE set in val */ eeprom_wr_eecr (ee, mask_EEWE); break; default: avr_error ("Unknown eeprom control register write operation: " "0x%02x", val); } } /* * The data sheets say that a write operation takes 2.5 to 4.0 ms to complete * depending on Vcc voltage. Since the get_program_time() function only has * 10 ms resolution, we'll just simulate a timer with counting down from * EEPROM_WR_OP_CLKS to zero. 2500 clocks would be 2.5 ms if simulator is * running at 1 MHz. I really don't think that this variation should be * critical in most apps, but I'd wouldn't mind being proven wrong. */ static int eeprom_wr_op_cb (uint64_t time, AvrClass *data) { EEProm *ee = (EEProm *)data; int addr; /* * FIXME: At some point in the future, we might need to check if * any of the I/O registers have been written to during the write * operation which would cause the write op to be interrupted. * Right now, the simulator is aborted in that situation. */ if (ee->wr_op_clk > 0) { /* write is not complete yet */ ee->wr_op_clk--; return CB_RET_RETAIN; } /* write the data in eedr into eeprom at addr */ addr = (ee->eearh << 8) | ee->eearl; avr_warning ("writing 0x%02x to eeprom at 0x%04x\n", ee->eedr, addr); display_eeprom (addr, 1, &ee->eedr); storage_writeb (ee->stor, addr, ee->eedr); /* Now it's ok to start another write operation */ ee->eecr &= ~(mask_EEWE); /* clear the write enable bit */ ee->wr_op_cb = NULL; /* remove callback */ return CB_RET_REMOVE; } /* * Once set, the hardware will automatically clear the EEMWE bit * after EEPROM_MWE_CLKS clock cycles. */ static int eeprom_mwe_clr_cb (uint64_t time, AvrClass *data) { EEProm *ee = (EEProm *)data; if (ee->mwe_clk > 0) { ee->mwe_clk--; return CB_RET_RETAIN; } ee->eecr &= ~(mask_EEMWE); /* clear the EEMWE bit */ ee->mwe_clr_cb = NULL; /* remove callback */ return CB_RET_REMOVE; } static int eeprom_load_from_bin_file (EEProm *eeprom, char *file) { int fd, res; int addr = 0; uint8_t datum; fd = open (file, O_RDONLY); if (fd < 0) avr_error ("Couldn't open binary eeprom image file: %s: %s", file, strerror (errno)); while ((res = read (fd, &datum, sizeof (datum))) != 0) { if (res == -1) avr_error ("Error reading binary eeprom image file: %s: %s", file, strerror (errno)); storage_writeb (eeprom->stor, addr, datum); addr++; } close (fd); return 0; } /** \brief Load data into eeprom from a file. */ int eeprom_load_from_file (EEProm *eeprom, char *file, int format) { switch (format) { case FFMT_BIN: return eeprom_load_from_bin_file (eeprom, file); case FFMT_IHEX: case FFMT_ELF: default: avr_warning ("Unsupported file format\n"); } return -1; } void eeprom_dump_core (EEProm *eeprom, FILE * f_core) { int i; int dup = 0; int ndat = 16; char line[80]; char last_line[80]; char buf[80]; int size = storage_get_size (eeprom->stor); fprintf (f_core, "EEPROM Memory Dump:\n"); line[0] = last_line[0] = '\0'; for (i = 0; i < size; i++) { if (((i % ndat) == 0) && strlen (line)) { if (strncmp (line, last_line, 80) == 0) { dup++; } else { if (dup > 0) fprintf (f_core, " -- last line repeats --\n"); fprintf (f_core, "%04x : %s\n", i - ndat, line); dup = 0; } strncpy (last_line, line, 80); line[0] = '\0'; } snprintf (buf, 80, "%02x ", storage_readb (eeprom->stor, i)); strncat (line, buf, 80); } if (dup > 0) { fprintf (f_core, " -- last line repeats --\n"); fprintf (f_core, "%04x : %s\n", i - ndat, line); } fprintf (f_core, "\n"); } simulavr-0.1.2.2/src/eeprom.h0000644000175000001440000000651507762567530012710 00000000000000/* * $Id: eeprom.h,v 1.5 2003/12/01 07:35:52 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_EEPROM_H #define SIM_EEPROM_H /****************************************************************************\ * * EEPRom(VDevice) Definition * \****************************************************************************/ typedef enum { bit_EERE = 0, /* eeprom read enable strobe */ bit_EEWE = 1, /* eeprom write enable strobe */ bit_EEMWE = 2, /* eeprom master write enable strobe */ } EECR_BITS; typedef enum { mask_EERE = 1 << bit_EERE, mask_EEWE = 1 << bit_EEWE, mask_EEMWE = 1 << bit_EEMWE, } EECR_MASKS; enum _eeprom_constants { EEPROM_BASE = 0x3c, /* base eeprom mem addr */ EEPROM_SIZE = 4, /* EECR, EEDR, EEARL, EEARH */ EECR_ADDR = 0x3c, EEDR_ADDR = 0x3d, EEARL_ADDR = 0x3e, EEARH_ADDR = 0x3f, EEPROM_WR_OP_CLKS = 2500, /* clocks used to simulate write 2.5-4.0 ms write time */ EEPROM_MWE_CLKS = 4, /* hw clears EEMWE after 4 clocks */ }; typedef struct _EEProm EEProm; struct _EEProm { VDevice parent; Storage *stor; /* storage for eeprom memory */ uint8_t eecr; /* eeprom control register */ uint8_t eecr_mask; /* mask of bits available for device */ uint8_t eedr; /* eeprom data register */ uint8_t eearl; /* eeprom address register low byte */ uint8_t eearh; /* eeprom address register high byte */ CallBack *wr_op_cb; /* clock callback for write to eeprom operation */ int wr_op_clk; /* clock counter for write to eeprom operation */ CallBack *mwe_clr_cb; /* clock callback for hw clearing of MWE bit */ int mwe_clk; /* clock counter for hw clearing of MWE bit */ }; extern EEProm *eeprom_new (int size, uint8_t eecr_mask); extern void eeprom_construct (EEProm *eeprom, int size, uint8_t eecr_mask); extern void eeprom_destroy (void *eeprom); extern int eeprom_get_size (EEProm *eeprom); extern int eeprom_load_from_file (EEProm *eeprom, char *file, int format); extern void eeprom_dump_core (EEProm *eeprom, FILE * f_core); #endif /* SIM_EEPROM_H */ simulavr-0.1.2.2/src/flash.c0000644000175000001440000001422107763046134012473 00000000000000/* * $Id: flash.c,v 1.12 2003/12/02 08:25:00 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file flash.c * \brief Flash memory methods * * This module provides functions for reading and writing to flash memory. * Flash memory is the program (.text) memory in AVR's Harvard architecture. * It is completely separate from RAM, which is simulated in the memory.c * file. */ #include #include #include #include #include #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "storage.h" #include "flash.h" #include "display.h" /***************************************************************************\ * * Local Static Function Prototypes * \***************************************************************************/ static int flash_load_from_bin_file (Flash *flash, char *file); /***************************************************************************\ * * Flash(Storage) Methods * \***************************************************************************/ /** * \brief Reads a 16-bit word from flash. * \return A word. */ extern inline uint16_t flash_read (Flash *flash, int addr); /** * \brief Reads a 16-bit word from flash. * \param flash A pointer to a flash object. * \param addr The address to which to write. * \param val The byte to write there. */ void flash_write (Flash *flash, int addr, uint16_t val) { display_flash (addr, 1, &val); storage_writew ((Storage *)flash, addr * 2, val); } /** \brief Write the low-order byte of an address. * * AVRs are little-endian, so lo8 bits in odd addresses. */ void flash_write_lo8 (Flash *flash, int addr, uint8_t val) { storage_writeb ((Storage *)flash, addr * 2 + 1, val); } /** \brief Write the high-order byte of an address. * * AVRs are little-endian, so hi8 bits in even addresses. */ void flash_write_hi8 (Flash *flash, int addr, uint8_t val) { storage_writeb ((Storage *)flash, addr * 2, val); } /** \brief Allocate a new Flash object. */ Flash * flash_new (int size) { Flash *flash; flash = avr_new (Flash, 1); flash_construct (flash, size); class_overload_destroy ((AvrClass *)flash, flash_destroy); return flash; } /** \brief Constructor for the flash object. */ void flash_construct (Flash *flash, int size) { int base = 0; int i; if (flash == NULL) avr_error ("passed null ptr"); storage_construct ((Storage *)flash, base, size); /* Init the flash to ones. */ for (i = 0; i < size; i++) storage_writeb ((Storage *)flash, i, 0xff); } /** * \brief Destructor for the flash class. * * Not to be called directly, except by a derived class. * Called via class_unref. */ void flash_destroy (void *flash) { if (flash == NULL) return; storage_destroy (flash); } /** \brief Load program data into flash from a file. */ int flash_load_from_file (Flash *flash, char *file, int format) { switch (format) { case FFMT_BIN: return flash_load_from_bin_file (flash, file); case FFMT_IHEX: case FFMT_ELF: default: avr_warning ("Unsupported file format\n"); } return -1; } static int flash_load_from_bin_file (Flash *flash, char *file) { int fd, res; int addr = 0; uint16_t inst; fd = open (file, O_RDONLY); if (fd < 0) avr_error ("Couldn't open binary flash image file: %s: %s", file, strerror (errno)); while ((res = read (fd, &inst, sizeof (inst))) != 0) { if (res == -1) avr_error ("Error reading binary flash image file: %s: %s", file, strerror (errno)); flash_write (flash, addr, inst); addr++; } close (fd); return 0; } /** \brief Accessor method to get the size of a flash. */ int flash_get_size (Flash *flash) { return storage_get_size ((Storage *)flash); } /** * \brief Dump the contents of the flash to a file descriptor in text format. * * \param flash A pointer to a flash object. * \param f_core An open file descriptor. */ void flash_dump_core (Flash *flash, FILE * f_core) { int size = storage_get_size ((Storage *)flash) / 2; int i; int dup = 0; int ndat = 8; char line[80]; char last_line[80]; char buf[80]; line[0] = last_line[0] = '\0'; fprintf (f_core, "Program Flash Memory Dump:\n"); for (i = 0; i < size; i++) { if (((i % ndat) == 0) && strlen (line)) { if (strncmp (line, last_line, 80) == 0) { dup++; } else { if (dup > 0) fprintf (f_core, " -- last line repeats --\n"); fprintf (f_core, "%04x : %s\n", i - ndat, line); dup = 0; } strncpy (last_line, line, 80); line[0] = '\0'; } snprintf (buf, 80, "%04x ", flash_read (flash, i)); strncat (line, buf, 80); } if (dup > 0) { fprintf (f_core, " -- last line repeats --\n"); fprintf (f_core, "%04x : %s\n", i - ndat, line); } } simulavr-0.1.2.2/src/flash.h0000644000175000001440000000374007763046134012504 00000000000000/* * $Id: flash.h,v 1.5 2003/12/02 08:25:00 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_FLASH_H #define SIM_FLASH_H /***************************************************************************\ * * Flash(Storage) Object * \***************************************************************************/ typedef struct _Flash Flash; struct _Flash { Storage parent; }; extern Flash *flash_new (int size); extern void flash_construct (Flash *flash, int size); extern void flash_destroy (void *flash); extern int flash_get_size (Flash *flash); extern void flash_dump_core (Flash *flash, FILE * f_core); extern inline uint16_t flash_read (Flash *flash, int addr) { return storage_readw ((Storage *)flash, addr * 2); } extern void flash_write (Flash *flash, int addr, uint16_t val); extern void flash_write_lo8 (Flash *flash, int addr, uint8_t val); extern void flash_write_hi8 (Flash *flash, int addr, uint8_t val); extern int flash_load_from_file (Flash *flash, char *file, int format); #endif /* SIM_FLASH_H */ simulavr-0.1.2.2/src/gdb.h0000644000175000001440000000772407763006575012156 00000000000000/* * $Id: gdb.h,v 1.15 2003/12/02 03:56:45 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_GDB_H #define SIM_GDB_H #ifndef BREAK_POINT # define BREAK_POINT -1 #endif /* Prototypes for pointers to function. */ typedef uint8_t (*CommFuncReadReg) (void *user_data, int reg_num); typedef void (*CommFuncWriteReg) (void *user_data, int reg_num, uint8_t val); typedef uint8_t (*CommFuncReadSREG) (void *user_data); typedef void (*CommFuncWriteSREG) (void *user_data, uint8_t val); typedef int32_t (*CommFuncReadPC) (void *user_data); typedef void (*CommFuncWritePC) (void *user_data, int32_t val); typedef int32_t (*CommFuncMaxPC) (void *user_data); typedef uint8_t (*CommFuncReadSRAM) (void *user_data, int addr); typedef void (*CommFuncWriteSRAM) (void *user_data, int addr, uint8_t val); typedef uint16_t (*CommFuncReadFlash) (void *user_data, int addr); typedef void (*CommFuncWriteFlash) (void *user_data, int addr, uint16_t val); typedef void (*CommFuncWriteFlashLo8) (void *user_data, int addr, uint8_t val); typedef void (*CommFuncWriteFlashHi8) (void *user_data, int addr, uint8_t val); typedef void (*CommFuncInsertBreak) (void *user_data, int addr); typedef void (*CommFuncRemoveBreak) (void *user_data, int addr); typedef void (*CommFuncDisableBrkpts) (void *user_data); typedef void (*CommFuncEnableBrkpts) (void *user_data); typedef int (*CommFuncStep) (void *user_data); typedef void (*CommFuncReset) (void *user_data); typedef void (*CommFuncIORegFetch) (void *user_data, int addr, uint8_t * val, char *reg_name, size_t reg_name_size); typedef void (*CommFuncIrqRaise) (void *user_data, int irq); /* This structure allows the target to supply handler functions to the gdb interact for performing various tasks. */ typedef struct GdbComm GdbComm_T; /* *INDENT-OFF* */ struct GdbComm { void *user_data; /* Pass anything you want here. Will be passed on to all CommFunc* functions you provide. */ CommFuncReadReg read_reg; CommFuncWriteReg write_reg; CommFuncReadSREG read_sreg; CommFuncWriteSREG write_sreg; CommFuncReadPC read_pc; CommFuncWritePC write_pc; CommFuncMaxPC max_pc; CommFuncReadSRAM read_sram; CommFuncWriteSRAM write_sram; CommFuncReadFlash read_flash; CommFuncWriteFlash write_flash; CommFuncWriteFlashLo8 write_flash_lo8; CommFuncWriteFlashHi8 write_flash_hi8; CommFuncInsertBreak insert_break; CommFuncRemoveBreak remove_break; CommFuncEnableBrkpts enable_breakpts; CommFuncDisableBrkpts disable_breakpts; CommFuncStep step; CommFuncReset reset; CommFuncIORegFetch io_fetch; CommFuncIrqRaise irq_raise; }; /* *INDENT-ON* */ extern void gdb_interact (GdbComm_T *comm, int port, int debug_on); #endif /* SIM_GDB_H */ simulavr-0.1.2.2/src/gdbserver.c0000644000175000001440000012107610135260146013354 00000000000000/* * $Id: gdbserver.c,v 1.50 2004/10/19 18:43:50 zfrdh Exp $ * **************************************************************************** * * gdbserver.c - Provide interface to a remote debugging target of gdb. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file gdbserver.c * \brief Provide an interface to gdb's remote serial protocol. * * This module allows a program to be used by gdb as a remote target. The * remote target and gdb communicate via gdb's remote serial protocol. The * protocol is documented in the gdb manual and will not be repeated here. * * Hitting Ctrl-c in gdb can be used to interrupt the remote target while it * is processing instructions and return control back to gdb. * * Issuing a 'signal SIGxxx' command from gdb will send the signal to the * remote target via a "continue with signal" packet. The target will process * and interpret the signal, but not pass it on to the AVR program running in * the target since it really makes no sense to do so. In some circumstances, * it may make sense to use the gdb signal mechanism as a way to initiate some * sort of external stimulus to be passed on to the virtual hardware system. * * Signals from gdb which are processed have the following meanings: * * \li \c SIGHUP Initiate a reset of the target. (Simulates a hardware reset) */ #include #include #include #include #include #include #include #include #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "gdb.h" #include "sig.h" /* *INDENT-OFF* */ #ifndef DOXYGEN /* have doxygen system ignore this. */ enum { MAX_BUF = 400, /* Maximum size of read/write buffers. */ MAX_READ_RETRY = 10, /* Maximum number of retries if a read is incomplete. */ #if defined(USE_EEPROM_SPACE) MEM_SPACE_MASK = 0x00ff0000, /* mask to get bits which determine memory space */ FLASH_OFFSET = 0x00000000, /* Data in flash has this offset from gdb */ SRAM_OFFSET = 0x00800000, /* Data in sram has this offset from gdb */ EEPROM_OFFSET = 0x00810000, /* Data in eeprom has this offset from gdb */ #else MEM_SPACE_MASK = 0x00f00000, /* mask to get bits which determine memory space */ FLASH_OFFSET = 0x00000000, /* Data in flash has this offset from gdb */ SRAM_OFFSET = 0x00800000, /* Data in sram has this offset from gdb */ #endif GDB_BLOCKING_OFF = 0, /* Signify that a read is non-blocking. */ GDB_BLOCKING_ON = 1, /* Signify that a read will block. */ GDB_RET_CTRL_C = -2, /* gdb has sent Ctrl-C to interrupt what is doing */ GDB_RET_KILL_REQUEST = -1, /* gdb has requested that sim be killed */ GDB_RET_OK = 0, /* continue normal processing of gdb requests */ SPL_ADDR = 0x5d, SPH_ADDR = 0x5e, }; #endif /* not DOXYGEN */ /* *INDENT-ON* */ /* Use HEX_DIGIT as a lookup table to convert a nibble to hex digit. */ static char HEX_DIGIT[] = "0123456789abcdef"; /* There are a couple of nested infinite loops, this allows escaping them all. */ static int global_server_quit = 0; /* Flag if debug messages should be printed out. */ static int global_debug_on; /* prototypes */ static int gdb_pre_parse_packet (GdbComm_T *comm, int fd, int blocking); /* Wrap read(2) so we can read a byte without having to do a shit load of error checking every time. */ static int gdb_read_byte (int fd) { char c; int res; int cnt = MAX_READ_RETRY; while (cnt--) { res = read (fd, &c, 1); if (res < 0) { if (errno == EAGAIN) /* fd was set to non-blocking and no data was available */ return -1; avr_error ("read failed: %s", strerror (errno)); } if (res == 0) { avr_warning ("incomplete read\n"); continue; } return c; } avr_error ("Maximum read reties reached"); return 0; /* make compiler happy */ } /* Convert a hexidecimal digit to a 4 bit nibble. */ static uint8_t hex2nib (char hex) { if ((hex >= 'A') && (hex <= 'F')) return (10 + (hex - 'A')); else if ((hex >= 'a') && (hex <= 'f')) return (10 + (hex - 'a')); else if ((hex >= '0') && (hex <= '9')) return (hex - '0'); /* Shouldn't get here unless the developer screwed up ;) */ avr_error ("Invalid hexidecimal digit: 0x%02x", hex); return 0; /* make compiler happy */ } /* Wrapper for write(2) which hides all the repetitive error checking crap. */ static void gdb_write (int fd, const void *buf, size_t count) { int res; res = write (fd, buf, count); /* FIXME: should we try and catch interrupted system calls here? */ if (res < 0) avr_error ("write failed: %s", strerror (errno)); /* FIXME: if this happens a lot, we could try to resend the unsent bytes. */ if (res != count) avr_error ("write only wrote %d of %d bytes", res, count); } /* Use a single function for storing/getting the last reply message. If reply is NULL, return pointer to the last reply saved. Otherwise, make a copy of the buffer pointed to by reply. */ static char * gdb_last_reply (char *reply) { static char *last_reply = NULL; if (reply == NULL) { if (last_reply == NULL) return ""; else return last_reply; } avr_free (last_reply); last_reply = avr_strdup (reply); return last_reply; } /* Acknowledge a packet from GDB */ static void gdb_send_ack (int fd) { if (global_debug_on) fprintf (stderr, " Ack -> gdb\n"); gdb_write (fd, "+", 1); } /* Send a reply to GDB. */ static void gdb_send_reply (int fd, char *reply) { int cksum = 0; int bytes; static char buf[MAX_BUF]; /* Save the reply to last reply so we can resend if need be. */ gdb_last_reply (reply); if (global_debug_on) fprintf (stderr, "Sent: $%s#", reply); if (*reply == '\0') { gdb_write (fd, "$#00", 4); if (global_debug_on) fprintf (stderr, "%02x\n", cksum & 0xff); } else { memset (buf, '\0', sizeof (buf)); buf[0] = '$'; bytes = 1; while (*reply) { cksum += (unsigned char)*reply; buf[bytes] = *reply; bytes++; reply++; /* must account for "#cc" to be added */ if (bytes == (MAX_BUF - 3)) { /* FIXME: TRoth 2002/02/18 - splitting reply would be better */ avr_error ("buffer overflow"); } } if (global_debug_on) fprintf (stderr, "%02x\n", cksum & 0xff); buf[bytes++] = '#'; buf[bytes++] = HEX_DIGIT[(cksum >> 4) & 0xf]; buf[bytes++] = HEX_DIGIT[cksum & 0xf]; gdb_write (fd, buf, bytes); } } /* GDB needs the 32 8-bit, gpw registers (r00 - r31), the 8-bit SREG, the 16-bit SP (stack pointer) and the 32-bit PC (program counter). Thus need to send a reply with r00, r01, ..., r31, SREG, SPL, SPH, PCL, PCH Low bytes before High since AVR is little endian. */ static void gdb_read_registers (GdbComm_T *comm, int fd) { int i; uint32_t val; /* ensure it's 32 bit value */ /* (32 gpwr, SREG, SP, PC) * 2 hex bytes + terminator */ size_t buf_sz = (32 + 1 + 2 + 4) * 2 + 1; char *buf; buf = avr_new0 (char, buf_sz); /* 32 gen purpose working registers */ for (i = 0; i < 32; i++) { val = comm->read_reg (comm->user_data, i); buf[i * 2] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 1] = HEX_DIGIT[val & 0xf]; } /* GDB thinks SREG is register number 32 */ val = comm->read_sreg (comm->user_data); buf[i * 2] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 1] = HEX_DIGIT[val & 0xf]; i++; /* GDB thinks SP is register number 33 */ val = comm->read_sram (comm->user_data, SPL_ADDR); buf[i * 2] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 1] = HEX_DIGIT[val & 0xf]; i++; val = comm->read_sram (comm->user_data, SPH_ADDR); buf[i * 2] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 1] = HEX_DIGIT[val & 0xf]; i++; /* GDB thinks PC is register number 34. GDB stores PC in a 32 bit value (only uses 23 bits though). GDB thinks PC is bytes into flash, not words like in simulavr. */ val = comm->read_pc (comm->user_data) * 2; buf[i * 2] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 1] = HEX_DIGIT[val & 0xf]; val >>= 8; buf[i * 2 + 2] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 3] = HEX_DIGIT[val & 0xf]; val >>= 8; buf[i * 2 + 4] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 5] = HEX_DIGIT[val & 0xf]; val >>= 8; buf[i * 2 + 6] = HEX_DIGIT[(val >> 4) & 0xf]; buf[i * 2 + 7] = HEX_DIGIT[val & 0xf]; gdb_send_reply (fd, buf); avr_free (buf); } /* GDB is sending values to be written to the registers. Registers are the same and in the same order as described in gdb_read_registers() above. */ static void gdb_write_registers (GdbComm_T *comm, int fd, char *pkt) { int i; uint8_t bval; uint32_t val; /* ensure it's a 32 bit value */ /* 32 gen purpose working registers */ for (i = 0; i < 32; i++) { bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_reg (comm->user_data, i, bval); } /* GDB thinks SREG is register number 32 */ bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_sreg (comm->user_data, bval); /* GDB thinks SP is register number 33 */ bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_sram (comm->user_data, SPL_ADDR, bval); bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_sram (comm->user_data, SPH_ADDR, bval); /* GDB thinks PC is register number 34. GDB stores PC in a 32 bit value (only uses 23 bits though). GDB thinks PC is bytes into flash, not words like in simulavr. Must cast to uint32_t so as not to get mysterious truncation. */ val = ((uint32_t) hex2nib (*pkt++)) << 4; val += ((uint32_t) hex2nib (*pkt++)); val += ((uint32_t) hex2nib (*pkt++)) << 12; val += ((uint32_t) hex2nib (*pkt++)) << 8; val += ((uint32_t) hex2nib (*pkt++)) << 20; val += ((uint32_t) hex2nib (*pkt++)) << 16; val += ((uint32_t) hex2nib (*pkt++)) << 28; val += ((uint32_t) hex2nib (*pkt++)) << 24; comm->write_pc (comm->user_data, val / 2); gdb_send_reply (fd, "OK"); } /* Extract a hexidecimal number from the pkt. Keep scanning pkt until stop char is reached or size of int is exceeded or a NULL is reached. pkt is modified to point to stop char when done. Use this function to extract a num with an arbitrary num of hex digits. This should _not_ be used to extract n digits from a m len string of digits (n <= m). */ static int gdb_extract_hex_num (char **pkt, char stop) { int i = 0; int num = 0; char *p = *pkt; int max_shifts = sizeof (int) * 2 - 1; /* max number of nibbles to shift through */ while ((*p != stop) && (*p != '\0')) { if (i > max_shifts) avr_error ("number too large"); num = (num << 4) | hex2nib (*p); i++; p++; } *pkt = p; return num; } /* Read a single register. Packet form: 'pn' where n is a hex number with no zero padding. */ static void gdb_read_register (GdbComm_T *comm, int fd, char *pkt) { int reg; char reply[MAX_BUF]; memset (reply, '\0', sizeof (reply)); reg = gdb_extract_hex_num (&pkt, '\0'); if ((reg >= 0) && (reg < 32)) { /* general regs */ uint8_t val = comm->read_reg (comm->user_data, reg); snprintf (reply, sizeof (reply) - 1, "%02x", val); } else if (reg == 32) /* sreg */ { uint8_t val = comm->read_sreg (comm->user_data); snprintf (reply, sizeof (reply) - 1, "%02x", val); } else if (reg == 33) /* SP */ { uint8_t spl, sph; spl = comm->read_sram (comm->user_data, SPL_ADDR); sph = comm->read_sram (comm->user_data, SPH_ADDR); snprintf (reply, sizeof (reply) - 1, "%02x%02x", spl, sph); } else if (reg == 34) /* PC */ { int val = comm->read_pc (comm->user_data) * 2; snprintf (reply, sizeof (reply) - 1, "%02x%02x" "%02x%02x", val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff, (val >> 24) & 0xff); } else { avr_warning ("Bad register value: %d\n", reg); gdb_send_reply (fd, "E00"); return; } gdb_send_reply (fd, reply); } /* Write a single register. Packet form: 'Pn=r' where n is a hex number with no zero padding and r is two hex digits for each byte in register (target byte order). */ static void gdb_write_register (GdbComm_T *comm, int fd, char *pkt) { int reg; uint32_t dval, hval; reg = gdb_extract_hex_num (&pkt, '='); pkt++; /* skip over '=' character */ /* extract the low byte of value from pkt */ dval = hex2nib (*pkt++) << 4; dval += hex2nib (*pkt++); if ((reg >= 0) && (reg < 33)) { /* r0 to r31 and SREG */ if (reg == 32) /* gdb thinks SREG is register 32 */ { comm->write_sreg (comm->user_data, dval & 0xff); } else { comm->write_reg (comm->user_data, reg, dval & 0xff); } } else if (reg == 33) { /* SP is 2 bytes long so extract upper byte */ hval = hex2nib (*pkt++) << 4; hval += hex2nib (*pkt++); comm->write_sram (comm->user_data, SPL_ADDR, dval & 0xff); comm->write_sram (comm->user_data, SPH_ADDR, hval & 0xff); } else if (reg == 34) { /* GDB thinks PC is register number 34. GDB stores PC in a 32 bit value (only uses 23 bits though). GDB thinks PC is bytes into flash, not words like in simulavr. Must cast to uint32_t so as not to get mysterious truncation. */ /* we already read the first two nibbles */ dval += ((uint32_t) hex2nib (*pkt++)) << 12; dval += ((uint32_t) hex2nib (*pkt++)) << 8; dval += ((uint32_t) hex2nib (*pkt++)) << 20; dval += ((uint32_t) hex2nib (*pkt++)) << 16; dval += ((uint32_t) hex2nib (*pkt++)) << 28; dval += ((uint32_t) hex2nib (*pkt++)) << 24; comm->write_pc (comm->user_data, dval / 2); } else { avr_warning ("Bad register value: %d\n", reg); gdb_send_reply (fd, "E00"); return; } gdb_send_reply (fd, "OK"); } /* Parse the pkt string for the addr and length. a_end is first char after addr. l_end is first char after len. Returns number of characters to advance pkt. */ static int gdb_get_addr_len (char *pkt, char a_end, char l_end, int *addr, int *len) { char *orig_pkt = pkt; *addr = 0; *len = 0; /* Get the addr from the packet */ while (*pkt != a_end) *addr = (*addr << 4) + hex2nib (*pkt++); pkt++; /* skip over a_end */ /* Get the length from the packet */ while (*pkt != l_end) *len = (*len << 4) + hex2nib (*pkt++); pkt++; /* skip over l_end */ /* fprintf( stderr, "+++++++++++++ addr = 0x%08x\n", *addr ); */ /* fprintf( stderr, "+++++++++++++ len = %d\n", *len ); */ return (pkt - orig_pkt); } static void gdb_read_memory (GdbComm_T *comm, int fd, char *pkt) { int addr = 0; int len = 0; uint8_t *buf; uint8_t bval; uint16_t wval; int i; int is_odd_addr; pkt += gdb_get_addr_len (pkt, ',', '\0', &addr, &len); buf = avr_new0 (uint8_t, (len * 2) + 1); if ((addr & MEM_SPACE_MASK) == SRAM_OFFSET) { /* addressing sram */ addr = addr & ~MEM_SPACE_MASK; /* remove the offset bits */ /* Return an error to gdb if it tries to read or write any of the 32 general purpse registers. This allows gdb to know when a zero pointer has been dereferenced. */ /* FIXME: [TRoth 2002/03/31] This isn't working quite the way I thought it would so I've removed it for now. */ /* if ( (addr >= 0) && (addr < 32) ) */ if (0) { snprintf (buf, len * 2, "E%02x", EIO); } else { for (i = 0; i < len; i++) { bval = comm->read_sram (comm->user_data, addr + i); buf[i * 2] = HEX_DIGIT[bval >> 4]; buf[i * 2 + 1] = HEX_DIGIT[bval & 0xf]; } } } else if ((addr & MEM_SPACE_MASK) == FLASH_OFFSET) { /* addressing flash */ addr = addr & ~MEM_SPACE_MASK; /* remove the offset bits */ is_odd_addr = addr % 2; i = 0; if (is_odd_addr) { bval = comm->read_flash (comm->user_data, addr / 2) >> 8; buf[i++] = HEX_DIGIT[bval >> 4]; buf[i++] = HEX_DIGIT[bval & 0xf]; addr++; len--; } while (len > 1) { wval = comm->read_flash (comm->user_data, addr / 2); bval = wval & 0xff; buf[i++] = HEX_DIGIT[bval >> 4]; buf[i++] = HEX_DIGIT[bval & 0xf]; bval = wval >> 8; buf[i++] = HEX_DIGIT[bval >> 4]; buf[i++] = HEX_DIGIT[bval & 0xf]; len -= 2; addr += 2; } if (len == 1) { bval = comm->read_flash (comm->user_data, addr / 2) & 0xff; buf[i++] = HEX_DIGIT[bval >> 4]; buf[i++] = HEX_DIGIT[bval & 0xf]; } } #if defined(USE_EEPROM_SPACE) else if ((addr & MEM_SPACE_MASK) == EEPROM_OFFSET) { /* addressing eeprom */ addr = addr & ~MEM_SPACE_MASK; /* remove the offset bits */ avr_warning ("reading of eeprom not yet implemented: 0x%x.\n", addr); snprintf (buf, len * 2, "E%02x", EIO); } #endif else { /* gdb asked for memory space which doesn't exist */ avr_warning ("Invalid memory address: 0x%x.\n", addr); snprintf (buf, len * 2, "E%02x", EIO); } gdb_send_reply (fd, buf); avr_free (buf); } static void gdb_write_memory (GdbComm_T *comm, int fd, char *pkt) { int addr = 0; int len = 0; uint8_t bval; uint16_t wval; int is_odd_addr; int i; char reply[10]; /* Set the default reply. */ strncpy (reply, "OK", sizeof (reply)); pkt += gdb_get_addr_len (pkt, ',', ':', &addr, &len); if ((addr & MEM_SPACE_MASK) == SRAM_OFFSET) { /* addressing sram */ addr = addr & ~MEM_SPACE_MASK; /* remove the offset bits */ /* Return error. See gdb_read_memory for reasoning. */ /* FIXME: [TRoth 2002/03/31] This isn't working quite the way I thought it would so I've removed it for now. */ /* if ( (addr >= 0) && (addr < 32) ) */ if (0) { snprintf (reply, sizeof (reply), "E%02x", EIO); } else { for (i = addr; i < addr + len; i++) { bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_sram (comm->user_data, i, bval); } } } else if ((addr & MEM_SPACE_MASK) == FLASH_OFFSET) { /* addressing flash */ /* Some targets might not allow writing to flash */ if (comm->write_flash && comm->write_flash_lo8 && comm->write_flash_hi8) { addr = addr & ~MEM_SPACE_MASK; /* remove the offset bits */ is_odd_addr = addr % 2; if (is_odd_addr) { bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_flash_hi8 (comm->user_data, addr / 2, bval); len--; addr++; } while (len > 1) { wval = hex2nib (*pkt++) << 4; /* low byte first */ wval += hex2nib (*pkt++); wval += hex2nib (*pkt++) << 12; /* high byte last */ wval += hex2nib (*pkt++) << 8; comm->write_flash (comm->user_data, addr / 2, wval); len -= 2; addr += 2; } if (len == 1) { /* one more byte to write */ bval = hex2nib (*pkt++) << 4; bval += hex2nib (*pkt++); comm->write_flash_lo8 (comm->user_data, addr / 2, bval); } } else { /* target can't write to flash, so complain to gdb */ avr_warning ("Gdb asked to write to flash and target can't.\n"); snprintf (reply, sizeof (reply), "E%02x", EIO); } } #if defined (USE_EEPROM_SPACE) else if ((addr & MEM_SPACE_MASK) == EEPROM_OFFSET) { /* addressing eeprom */ addr = addr & ~MEM_SPACE_MASK; /* remove the offset bits */ avr_warning ("writing of eeprom not yet implemented: 0x%x.\n", addr); snprintf (reply, sizeof (reply), "E%02x", EIO); } #endif else { /* gdb asked for memory space which doesn't exist */ avr_warning ("Invalid memory address: 0x%x.\n", addr); snprintf (reply, sizeof (reply), "E%02x", EIO); } gdb_send_reply (fd, reply); } /* Format of breakpoint commands (both insert and remove): "z,," - remove break/watch point "Z,r," - insert break/watch point In both cases t can be the following: t = '0' - software breakpoint t = '1' - hardware breakpoint t = '2' - write watch point t = '3' - read watch point t = '4' - access watch point addr is address. length is in bytes For a software breakpoint, length specifies the size of the instruction to be patched. For hardware breakpoints and watchpoints, length specifies the memory region to be monitored. To avoid potential problems, the operations should be implemented in an idempotent way. -- GDB 5.0 manual. */ static void gdb_break_point (GdbComm_T *comm, int fd, char *pkt) { int addr = 0; int len = 0; char z = *(pkt - 1); /* get char parser already looked at */ char t = *pkt++; pkt++; /* skip over first ',' */ gdb_get_addr_len (pkt, ',', '\0', &addr, &len); switch (t) { case '0': /* software breakpoint */ /* addr/2 since addr refers to PC */ if (comm->max_pc && ((addr / 2) >= comm->max_pc (comm->user_data))) { avr_warning ("Attempt to set break at invalid addr\n"); gdb_send_reply (fd, "E01"); return; } if (z == 'z') comm->remove_break (comm->user_data, addr / 2); else comm->insert_break (comm->user_data, addr / 2); break; case '1': /* hardware breakpoint */ case '2': /* write watchpoint */ case '3': /* read watchpoint */ case '4': /* access watchpoint */ gdb_send_reply (fd, ""); return; /* unsupported yet */ } gdb_send_reply (fd, "OK"); } /* Handle an io registers query. Query has two forms: "avr.io_reg" and "avr.io_reg:addr,len". The "avr.io_reg" has already been stripped off at this point. The first form means, "return the number of io registers for this target device." Second form means, "send data len io registers starting with register addr." */ static void gdb_fetch_io_registers (GdbComm_T *comm, int fd, char *pkt) { int addr, len; int i; uint8_t val; char reply[400]; char reg_name[80]; int pos = 0; if (comm->io_fetch) { if (pkt[0] == '\0') { /* gdb is asking how many io registers the device has. */ gdb_send_reply (fd, "40"); } else if (pkt[0] == ':') { /* gdb is asking for io registers addr to (addr + len) */ gdb_get_addr_len (pkt + 1, ',', '\0', &addr, &len); memset (reply, '\0', sizeof (reply)); for (i = 0; i < len; i++) { comm->io_fetch (comm->user_data, addr + i, &val, reg_name, sizeof (reg_name)); pos += snprintf (reply + pos, sizeof (reply) - pos, "%s,%x;", reg_name, val); } gdb_send_reply (fd, reply); /* do nothing for now */ } else gdb_send_reply (fd, "E01"); /* An error occurred */ } else gdb_send_reply (fd, ""); /* tell gdb we don't handle info io command. */ } /* Dispatch various query request to specific handler functions. If a query is not handled, send an empry reply. */ static void gdb_query_request (GdbComm_T *comm, int fd, char *pkt) { int len; switch (*pkt++) { case 'R': len = strlen ("avr.io_reg"); if (strncmp (pkt, "avr.io_reg", len) == 0) { gdb_fetch_io_registers (comm, fd, pkt + len); return; } } gdb_send_reply (fd, ""); } /* Continue command format: "c" or "s" If addr is given, resume at that address, otherwise, resume at current address. */ static void gdb_continue (GdbComm_T *comm, int fd, char *pkt) { char reply[MAX_BUF + 1]; int res; int pc; char step = *(pkt - 1); /* called from 'c' or 's'? */ int signo = SIGTRAP; static int is_running = 0; /* This allows gdb_continue to be reentrant while it's running. */ if (is_running == 1) { return; } is_running = 1; memset (reply, 0, sizeof (reply)); if (*pkt != '\0') { /* NOTE: from what I've read on the gdb lists, gdb never uses the "continue at address" functionality. That may change, so let's catch that case. */ /* get addr to resume at */ avr_error ("attempt to resume at other than current"); } while (1) { if (signal_has_occurred (SIGINT)) { global_server_quit = 1; break; } res = comm->step (comm->user_data); if (res == BREAK_POINT) { if (comm->disable_breakpts) comm->disable_breakpts (comm->user_data); break; } /* check if gdb sent any messages */ res = gdb_pre_parse_packet (comm, fd, GDB_BLOCKING_OFF); if (res < 0) { if (res == GDB_RET_CTRL_C) { signo = SIGINT; } break; } /* If called from 's' or 'S', only want to step once */ if ((step == 's') || (step == 'S')) break; } /* If reply hasn't been set, respond as if a breakpoint was hit. */ if (reply[0] == '\0') { /* Send gdb SREG, SP, PC */ int bytes = 0; pc = comm->read_pc (comm->user_data) * 2; bytes = snprintf (reply, MAX_BUF, "T%02x", signo); /* SREG, SP & PC */ snprintf (reply + bytes, MAX_BUF - bytes, "20:%02x;" "21:%02x%02x;" "22:%02x%02x%02x%02x;", comm->read_sreg (comm->user_data), comm->read_sram (comm->user_data, SPL_ADDR), comm->read_sram (comm->user_data, SPH_ADDR), pc & 0xff, (pc >> 8) & 0xff, (pc >> 16) & 0xff, (pc >> 24) & 0xff); } gdb_send_reply (fd, reply); is_running = 0; } /* Continue with signal command format: "C;" or "S;" "" should always be 2 hex digits, possibly zero padded. ";" part is optional. If addr is given, resume at that address, otherwise, resume at current address. */ static void gdb_continue_with_signal (GdbComm_T *comm, int fd, char *pkt) { int signo; char step = *(pkt - 1); /* strip out the signal part of the packet */ signo = (hex2nib (*pkt++) << 4); signo += (hex2nib (*pkt++) & 0xf); if (global_debug_on) fprintf (stderr, "GDB sent signal: %d\n", signo); /* Process signals send via remote protocol from gdb. Signals really don't make sense to the program running in the simulator, so we are using them sort of as an 'out of band' data. */ switch (signo) { case SIGHUP: /* Gdb user issuing the 'signal SIGHUP' command tells sim to reset itself. We reply with a SIGTRAP the same as we do when gdb makes first connection with simulator. */ comm->reset (comm->user_data); gdb_send_reply (fd, "S05"); return; default: /* Gdb user issuing the 'signal ' command where signum is >= 80 is interpreted as a request to trigger an interrupt vector. The vector to trigger is signo-80. (there's an offset of 14) */ if (signo >= 94) { if (comm->irq_raise) { comm->irq_raise (comm->user_data, signo - 94); } } } /* Modify pkt to look like what gdb_continue() expects and send it to gdb_continue(): *pkt should now be either '\0' or ';' */ if (*pkt == '\0') { *(pkt - 1) = step; } else if (*pkt == ';') { *pkt = step; } else { avr_warning ("Malformed packet: \"%s\"\n", pkt); gdb_send_reply (fd, ""); return; } gdb_continue (comm, fd, pkt); } /* Parse the packet. Assumes that packet is null terminated. Return GDB_RET_KILL_REQUEST if packet is 'kill' command, GDB_RET_OK otherwise. */ static int gdb_parse_packet (GdbComm_T *comm, int fd, char *pkt) { switch (*pkt++) { case '?': /* last signal */ gdb_send_reply (fd, "S05"); /* signal # 5 is SIGTRAP */ break; case 'g': /* read registers */ gdb_read_registers (comm, fd); break; case 'G': /* write registers */ gdb_write_registers (comm, fd, pkt); break; case 'p': /* read a single register */ gdb_read_register (comm, fd, pkt); break; case 'P': /* write single register */ gdb_write_register (comm, fd, pkt); break; case 'm': /* read memory */ gdb_read_memory (comm, fd, pkt); break; case 'M': /* write memory */ gdb_write_memory (comm, fd, pkt); break; case 'k': /* kill request */ case 'D': /* Detach request */ /* Reset the simulator since there may be another connection before the simulator stops running. */ comm->reset (comm->user_data); gdb_send_reply (fd, "OK"); return GDB_RET_KILL_REQUEST; case 'C': /* continue with signal */ case 'S': /* step with signal */ gdb_continue_with_signal (comm, fd, pkt); break; case 'c': /* continue */ case 's': /* step */ gdb_continue (comm, fd, pkt); break; case 'z': /* remove break/watch point */ case 'Z': /* insert break/watch point */ gdb_break_point (comm, fd, pkt); break; case 'q': /* query requests */ gdb_query_request (comm, fd, pkt); break; default: gdb_send_reply (fd, ""); } return GDB_RET_OK; } static void gdb_set_blocking_mode (int fd, int mode) { if (mode) { /* turn non-blocking mode off */ if (fcntl (fd, F_SETFL, fcntl (fd, F_GETFL, 0) & ~O_NONBLOCK) < 0) avr_warning ("fcntl failed: %s\n", strerror (errno)); } else { /* turn non-blocking mode on */ if (fcntl (fd, F_SETFL, fcntl (fd, F_GETFL, 0) | O_NONBLOCK) < 0) avr_warning ("fcntl failed: %s\n", strerror (errno)); } } /* Perform pre-packet parsing. This will handle messages from gdb which are outside the realm of packets or prepare a packet for parsing. Use the static block_on flag to reduce the over head of turning blocking on and off every time this function is called. */ static int gdb_pre_parse_packet (GdbComm_T *comm, int fd, int blocking) { int i, res; int c; char pkt_buf[MAX_BUF + 1]; int cksum, pkt_cksum; static int block_on = 1; /* default is blocking mode */ if (block_on != blocking) { gdb_set_blocking_mode (fd, blocking); block_on = blocking; } c = gdb_read_byte (fd); switch (c) { case '$': /* read a packet */ /* insure that packet is null terminated. */ memset (pkt_buf, 0, sizeof (pkt_buf)); /* make sure we block on fd */ gdb_set_blocking_mode (fd, GDB_BLOCKING_ON); pkt_cksum = i = 0; c = gdb_read_byte (fd); while ((c != '#') && (i < MAX_BUF)) { pkt_buf[i++] = c; pkt_cksum += (unsigned char)c; c = gdb_read_byte (fd); } cksum = hex2nib (gdb_read_byte (fd)) << 4; cksum |= hex2nib (gdb_read_byte (fd)); /* FIXME: Should send "-" (Nak) instead of aborting when we get checksum errors. Leave this as an error until it is actually seen (I've yet to see a bad checksum - TRoth). It's not a simple matter of sending (Nak) since you don't want to get into an infinite loop of (bad cksum, nak, resend, repeat). */ if ((pkt_cksum & 0xff) != cksum) avr_error ("Bad checksum: sent 0x%x <--> computed 0x%x", cksum, pkt_cksum); if (global_debug_on) fprintf (stderr, "Recv: \"$%s#%02x\"\n", pkt_buf, cksum); /* always acknowledge a well formed packet immediately */ gdb_send_ack (fd); res = gdb_parse_packet (comm, fd, pkt_buf); if (res < 0) return res; break; case '-': if (global_debug_on) fprintf (stderr, " gdb -> Nak\n"); gdb_send_reply (fd, gdb_last_reply (NULL)); break; case '+': if (global_debug_on) fprintf (stderr, " gdb -> Ack\n"); break; case 0x03: /* Gdb sends this when the user hits C-c. This is gdb's way of telling the simulator to interrupt what it is doing and return control back to gdb. */ return GDB_RET_CTRL_C; case -1: /* fd is non-blocking and no data to read */ break; default: avr_warning ("Unknown request from gdb: %c (0x%02x)\n", c, c); } return GDB_RET_OK; } static void gdb_main_loop (GdbComm_T *comm, int fd) { int res; char reply[MAX_BUF]; while (1) { res = gdb_pre_parse_packet (comm, fd, GDB_BLOCKING_ON); switch (res) { case GDB_RET_KILL_REQUEST: return; case GDB_RET_CTRL_C: gdb_send_ack (fd); snprintf (reply, MAX_BUF, "S%02x", SIGINT); gdb_send_reply (fd, reply); break; default: break; } } } /** * \brief Start interacting with gdb. * \param comm A previously initialized simulator comm * \param port Port which server will listen for connections on. * \param debug_on Turn on gdb debug diagnostic messages. * * Start a tcp server socket on localhost listening for connections on the * given port. Once a connection is established, enter an infinite loop and * process command requests from gdb using the remote serial protocol. Only a * single connection is allowed at a time. */ void gdb_interact (GdbComm_T *comm, int port, int debug_on) { struct sockaddr_in address[1]; int sock, conn, i; socklen_t addrLength[1]; global_debug_on = debug_on; if ((sock = socket (PF_INET, SOCK_STREAM, 0)) < 0) avr_error ("Can't create socket: %s", strerror (errno)); /* Let the kernel reuse the socket address. This lets us run twice in a row, without waiting for the (ip, port) tuple to time out. */ i = 1; setsockopt (sock, SOL_SOCKET, SO_REUSEADDR, &i, sizeof (i)); address->sin_family = AF_INET; address->sin_port = htons (port); memset (&address->sin_addr, 0, sizeof (address->sin_addr)); if (bind (sock, (struct sockaddr *)address, sizeof (address))) avr_error ("Can not bind socket: %s", strerror (errno)); signal_watch_start (SIGINT); while (global_server_quit == 0) { if (listen (sock, 1)) { int saved_errno = errno; if (signal_has_occurred (SIGINT)) { break; /* SIGINT will cause listen to be interrupted */ } avr_error ("Can not listen on socket: %s", strerror (saved_errno)); } fprintf (stderr, "Waiting on port %d for gdb client to connect...\n", port); /* accept() needs this set, or it fails (sometimes) */ addrLength[0] = sizeof (struct sockaddr); /* We only want to accept a single connection, thus don't need a loop. */ conn = accept (sock, (struct sockaddr *)address, addrLength); if (conn < 0) { int saved_errno = errno; if (signal_has_occurred (SIGINT)) { break; /* SIGINT will cause accept to be interrupted */ } avr_error ("Accept connection failed: %s", strerror (saved_errno)); } /* Tell TCP not to delay small packets. This greatly speeds up interactive response. WARNING: If TCP_NODELAY is set on, then gdb may timeout in mid-packet if the (gdb)packet is not sent within a single (tcp)packet, thus all outgoing (gdb)packets _must_ be sent with a single call to write. (see Stevens "Unix Network Programming", Vol 1, 2nd Ed, page 202 for more info) */ i = 1; setsockopt (conn, IPPROTO_TCP, TCP_NODELAY, &i, sizeof (i)); /* If we got this far, we now have a client connected and can start processing. */ fprintf (stderr, "Connection opened by host %s, port %hd.\n", inet_ntoa (address->sin_addr), ntohs (address->sin_port)); gdb_main_loop (comm, conn); comm->reset (comm->user_data); close (conn); /* FIXME: How do we correctly break out of this loop? This keeps the simulator server up so you don't have to restart it with every gdb session. To exit the server loop, you have to hit C-c or send some signal which causes the program to terminate, in which case, you won't get a dump of the simulator's state. This might actually be acceptable behavior. */ if (signal_has_occurred (SIGINT)) { break; } } signal_watch_stop (SIGINT); close (sock); } simulavr-0.1.2.2/src/intvects.c0000644000175000001440000005136210017317247013234 00000000000000/* * $Id: intvects.c,v 1.17 2004/02/26 07:22:15 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include "intvects.h" /****************************************************************************\ * * Interrupt Vector Tables: * * Since each device could have a different set of available interrupts, the * following tables map all interrupts to the addr to jump to when the * interrupt happens. If the device doesn't support an interrupt, the table * will contain a NULL entry. Only one table will be installed into the core * for a given device. * \****************************************************************************/ /* *INDENT-OFF* */ /* * Vector Table for devices: * at90s1200 */ static IntVectTable vtab_at90s1200 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x01, 0x00, { 0x5b, 1<<6 }, NO_BIT }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x02, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .ANA_COMP = { "IRQ_ANA_COMP", 0x03, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } } }; /* * Vector Table for devices: * at90s2313 */ static IntVectTable vtab_at90s2313 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x01, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x02, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x03, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x04, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x05, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x06, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .UART_RX = { "IRQ_UART_RX", 0x07, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .UART_UDRE = { "IRQ_UART_UDRE", 0x08, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .UART_TX = { "IRQ_UART_TX", 0x09, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .ANA_COMP = { "IRQ_ANA_COMP", 0x0a, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } } }; /* * Vector Table for devices: * at90s4414, at90s8515 */ static IntVectTable vtab_at90s4414 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x01, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x02, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x03, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x04, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x05, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x06, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x07, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .SPI_STC = { "IRQ_SPI_STC", 0x08, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .UART_RX = { "IRQ_UART_RX", 0x09, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .UART_UDRE = { "IRQ_UART_UDRE", 0x0a, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .UART_TX = { "IRQ_UART_TX", 0x0b, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .ANA_COMP = { "IRQ_ANA_COMP", 0x0c, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } } }; /* * Vector Table for devices: * atmega8 */ static IntVectTable vtab_atmega8 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x01, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x02, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER2_COMP = { "IRQ_TIMER2_COMP", 0x03, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER2_OVF = { "IRQ_TIMER2_OVF", 0x04, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x05, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x06, 0x00, { 0x59, 1<<4 }, { 0x58, 1<<4 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x07, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x08, 0x00, { 0x59, 1<<2 }, { 0x58, 1<<2 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x09, 0x00, { 0x59, 1<<0 }, { 0x58, 1<<0 } }, .SPI_STC = { "IRQ_SPI_STC", 0x0a, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .UART_RX = { "IRQ_UART_RX", 0x0b, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .UART_UDRE = { "IRQ_UART_UDRE", 0x0c, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .UART_TX = { "IRQ_UART_TX", 0x0d, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .ADC = { "IRQ_ADC", 0x0e, 0x00, { 0x26, 1<<3 }, { 0x26, 1<<4 } }, .EE_READY = { "IRQ_EE_READY", 0x0f, 0x00, { 0x3c, 1<<3 }, NO_BIT }, .ANA_COMP = { "IRQ_ANA_COMP", 0x10, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } }, .TWI = { "IRQ_TWI", 0x11, 0x00, { 0x56, 1<<0 }, { 0x56, 1<<7 } }, .SPM_READY = { "IRQ_SPM_READY", 0x12, 0x00, { 0x57, 1<<7 }, NO_BIT } }; /* * Vector Table for devices: * atmega16 */ static IntVectTable vtab_atmega16 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x04, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER2_COMP = { "IRQ_TIMER2_COMP", 0x06, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER2_OVF = { "IRQ_TIMER2_OVF", 0x08, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x0a, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x0c, 0x00, { 0x59, 1<<4 }, { 0x58, 1<<4 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x0e, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x10, 0x00, { 0x59, 1<<2 }, { 0x58, 1<<2 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x12, 0x00, { 0x59, 1<<0 }, { 0x58, 1<<0 } }, .SPI_STC = { "IRQ_SPI_STC", 0x14, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .UART_RX = { "IRQ_UART_RX", 0x16, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .UART_UDRE = { "IRQ_UART_UDRE", 0x18, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .UART_TX = { "IRQ_UART_TX", 0x1a, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .ADC = { "IRQ_ADC", 0x1c, 0x00, { 0x26, 1<<3 }, { 0x26, 1<<4 } }, .EE_READY = { "IRQ_EE_READY", 0x1e, 0x00, { 0x3c, 1<<3 }, NO_BIT }, .ANA_COMP = { "IRQ_ANA_COMP", 0x20, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } }, .TWI = { "IRQ_TWI", 0x22, 0x00, { 0x57, 1<<0 }, { 0x56, 1<<7 } }, .INT2 = { "IRQ_INT2", 0x24, 0x00, { 0x5b, 1<<5 }, { 0x5a, 1<<5 } }, .TIMER0_COMP = { "IRQ_TIMER0_COMP", 0x26, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .SPM_READY = { "IRQ_SPM_READY", 0x28, 0x00, { 0x57, 1<<7 }, NO_BIT } }; /* * Vector Table for devices: * atmega103 */ static IntVectTable vtab_atmega103 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x59, 1<<0 }, NO_BIT }, .INT1 = { "IRQ_INT1", 0x04, 0x00, { 0x59, 1<<1 }, NO_BIT }, .INT2 = { "IRQ_INT2", 0x06, 0x00, { 0x59, 1<<2 }, NO_BIT }, .INT3 = { "IRQ_INT3", 0x08, 0x00, { 0x59, 1<<3 }, NO_BIT }, .INT4 = { "IRQ_INT4", 0x0a, 0x00, { 0x59, 1<<4 }, { 0x58, 1<<4 } }, .INT5 = { "IRQ_INT5", 0x0c, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .INT6 = { "IRQ_INT6", 0x0e, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .INT7 = { "IRQ_INT7", 0x10, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER2_COMP = { "IRQ_TIMER2_COMP", 0x12, 0x00, { 0x57, 1<<7 }, { 0x56, 1<<7 } }, .TIMER2_OVF = { "IRQ_TIMER2_OVF", 0x14, 0x00, { 0x57, 1<<6 }, { 0x56, 1<<6 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x16, 0x00, { 0x57, 1<<5 }, { 0x56, 1<<5 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x18, 0x00, { 0x57, 1<<4 }, { 0x56, 1<<4 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x1a, 0x00, { 0x57, 1<<3 }, { 0x56, 1<<3 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x1c, 0x00, { 0x57, 1<<2 }, { 0x56, 1<<2 } }, .TIMER0_COMP = { "IRQ_TIMER0_COMP", 0x1e, 0x00, { 0x57, 1<<1 }, { 0x56, 1<<1 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x20, 0x00, { 0x57, 1<<0 }, { 0x56, 1<<0 } }, .SPI_STC = { "IRQ_SPI_STC", 0x22, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .UART_RX = { "IRQ_UART_RX", 0x24, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .UART_UDRE = { "IRQ_UART_UDRE", 0x26, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .UART_TX = { "IRQ_UART_TX", 0x28, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .ADC = { "IRQ_ADC", 0x2a, 0x00, { 0x26, 1<<3 }, { 0x26, 1<<4 } }, .ANA_COMP = { "IRQ_ANA_COMP", 0x2e, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } }, .EE_READY = { "IRQ_EE_READY", 0x2c, 0x00, { 0x3c, 1<<3 }, NO_BIT } }; /* * Vector Table for devices: * atmega128 */ /* Note that the mega128 has BOOTRST and IVSEL fuses which can be used to change the interrupt vectors. If used, the new vectors are just the following plus some Boot Reset Address. This could be implemented just as we vector to handler. */ /* Note that the vectors address for mega128 are two insn's. This is needed since they can use jmp (32-bit) insn at the vector address. */ static IntVectTable vtab_atmega128 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .INT1 = { "IRQ_INT1", 0x04, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .INT2 = { "IRQ_INT2", 0x06, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .INT3 = { "IRQ_INT3", 0x08, 0x00, { 0x59, 1<<4 }, { 0x58, 1<<4 } }, .INT4 = { "IRQ_INT4", 0x0a, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .INT5 = { "IRQ_INT5", 0x0c, 0x00, { 0x59, 1<<2 }, { 0x58, 1<<2 } }, .INT6 = { "IRQ_INT6", 0x0e, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .INT7 = { "IRQ_INT7", 0x10, 0x00, { 0x59, 1<<0 }, { 0x58, 1<<0 } }, .TIMER2_COMP = { "IRQ_TIMER2_COMP", 0x12, 0x00, { 0x57, 1<<7 }, { 0x56, 1<<7 } }, .TIMER2_OVF = { "IRQ_TIMER2_OVF", 0x14, 0x00, { 0x57, 1<<6 }, { 0x56, 1<<6 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x16, 0x00, { 0x57, 1<<5 }, { 0x56, 1<<5 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x18, 0x00, { 0x57, 1<<4 }, { 0x56, 1<<4 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x1a, 0x00, { 0x57, 1<<3 }, { 0x56, 1<<3 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x1c, 0x00, { 0x57, 1<<2 }, { 0x56, 1<<2 } }, .TIMER0_COMP = { "IRQ_TIMER0_COMP", 0x1e, 0x00, { 0x57, 1<<1 }, { 0x56, 1<<1 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x20, 0x00, { 0x57, 1<<0 }, { 0x56, 1<<0 } }, .SPI_STC = { "IRQ_SPI_STC", 0x22, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .USART0_RX = { "IRQ_USART0_RX", 0x24, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .USART0_UDRE = { "IRQ_USART0_UDRE", 0x26, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .USART0_TX = { "IRQ_USART0_TX", 0x28, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .ADC = { "IRQ_ADC", 0x2a, 0x00, { 0x26, 1<<3 }, { 0x26, 1<<4 } }, .EE_READY = { "IRQ_EE_READY", 0x2c, 0x00, { 0x3c, 1<<3 }, NO_BIT }, .ANA_COMP = { "IRQ_ANA_COMP", 0x2e, 0x00, { 0x28, 1<<3 }, { 0x28, 1<<4 } }, .TIMER1_COMPC = { "IRQ_TIMER1_COMPC", 0x30, 0x00, { 0x7d, 1<<0 }, { 0x7c, 1<<0 } }, .TIMER3_CAPT = { "IRQ_TIMER3_CAPT", 0x32, 0x00, { 0x7d, 1<<5 }, { 0x7c, 1<<5 } }, .TIMER3_COMPA = { "IRQ_TIMER3_COMPA", 0x34, 0x00, { 0x7d, 1<<4 }, { 0x7c, 1<<4 } }, .TIMER3_COMPB = { "IRQ_TIMER3_COMPB", 0x36, 0x00, { 0x7d, 1<<3 }, { 0x7c, 1<<3 } }, .TIMER3_COMPC = { "IRQ_TIMER3_COMPC", 0x38, 0x00, { 0x7d, 1<<1 }, { 0x7c, 1<<1 } }, .TIMER3_OVF = { "IRQ_TIMER3_OVF", 0x3a, 0x00, { 0x7d, 1<<2 }, { 0x7c, 1<<2 } }, .USART1_RX = { "IRQ_USART1_RX", 0x3c, 0x00, { 0x9a, 1<<7 }, { 0x9b, 1<<7 } }, .USART1_UDRE = { "IRQ_USART1_UDRE", 0x3e, 0x00, { 0x9a, 1<<5 }, { 0x9b, 1<<5 } }, .USART1_TX = { "IRQ_USART1_TX", 0x40, 0x00, { 0x9a, 1<<6 }, { 0x9b, 1<<6 } }, .TWI = { "IRQ_TWI", 0x42, 0x00, { 0x74, 1<<0 }, { 0x74, 1<<7 } }, .SPM_READY = { "IRQ_SPM_READY", 0x44, 0x00, { 0x68, 1<<7 }, NO_BIT } }; /* supports 355, 353, 351 NOTE: The vector addresses are not sequential. */ static IntVectTable vtab_at43usb355 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x04, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x06, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x08, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x0a, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x0c, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x0e, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .SPI_STC = { "IRQ_SPI_STC", 0x10, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .ADC = { "IRQ_ADC", 0x16, 0x00, { 0x27, 1<<3 }, { 0x27, 1<<4 } }, .USB_HW = { "IRQ_USB_HW", 0x18, 0x00, NO_BIT, NO_BIT } /* TODO */ }; /* supports 320 */ static IntVectTable vtab_at43usb320 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x04, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x06, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x08, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x0a, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x0c, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x0e, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .SPI_STC = { "IRQ_SPI_STC", 0x10, 0x00, { 0x2d, 1<<7 }, NO_BIT }, .UART_RX = { "IRQ_UART_RX", 0x12, 0x00, { 0x2a, 1<<7 }, { 0x2b, 1<<7 } }, .UART_UDRE = { "IRQ_UART_UDRE", 0x14, 0x00, { 0x2a, 1<<5 }, { 0x2b, 1<<5 } }, .UART_TX = { "IRQ_UART_TX", 0x16, 0x00, { 0x2a, 1<<6 }, { 0x2b, 1<<6 } }, .USB_HW = { "IRQ_USB", 0x18, 0x00, NO_BIT, NO_BIT } /* TODO */ }; /* supports 325 NOTE: The vector addresses are not sequential. */ static IntVectTable vtab_at43usb325 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .INT1 = { "IRQ_INT1", 0x04, 0x00, { 0x5b, 1<<7 }, { 0x5a, 1<<7 } }, .TIMER1_CAPT = { "IRQ_TIMER1_CAPT", 0x06, 0x00, { 0x59, 1<<3 }, { 0x58, 1<<3 } }, .TIMER1_COMPA = { "IRQ_TIMER1_COMPA", 0x08, 0x00, { 0x59, 1<<6 }, { 0x58, 1<<6 } }, .TIMER1_COMPB = { "IRQ_TIMER1_COMPB", 0x0a, 0x00, { 0x59, 1<<5 }, { 0x58, 1<<5 } }, .TIMER1_OVF = { "IRQ_TIMER1_OVF", 0x0c, 0x00, { 0x59, 1<<7 }, { 0x58, 1<<7 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x0e, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .USB_HW = { "IRQ_USB_HW", 0x18, 0x00, NO_BIT, NO_BIT } /* TODO */ }; /* supports 326 NOTE: The vector addresses are not sequential. */ static IntVectTable vtab_at43usb326 = { .RESET = { "IRQ_RESET", 0x00, 0x00, NO_BIT, NO_BIT }, .INT0 = { "IRQ_INT0", 0x02, 0x00, { 0x5b, 1<<6 }, { 0x5a, 1<<6 } }, .TIMER0_OVF = { "IRQ_TIMER0_OVF", 0x0e, 0x00, { 0x59, 1<<1 }, { 0x58, 1<<1 } }, .USB_HW = { "IRQ_USB_HW", 0x18, 0x00, NO_BIT, NO_BIT } /* TODO */ }; /* *INDENT-ON* */ /* * Vector Table Lookup List. * * Maps a _vector_table_name to a device vector table. */ IntVectTable *global_vtable_list[] = { &vtab_at90s1200, &vtab_at90s2313, &vtab_at90s4414, &vtab_atmega8, &vtab_atmega16, &vtab_atmega103, &vtab_atmega128, &vtab_at43usb355, &vtab_at43usb320, &vtab_at43usb325, &vtab_at43usb326, NULL }; simulavr-0.1.2.2/src/intvects.h0000644000175000001440000001376407762567531013265 00000000000000/* * $Id: intvects.h,v 1.7 2003/12/01 07:35:53 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_INTVECTS_H #define SIM_INTVECTS_H enum _sleep_modes { SLEEP_MODE_IDLE, SLEEP_MODE_ADC_REDUX, SLEEP_MODE_PWR_DOWN, SLEEP_MODE_PWR_SAVE, SLEEP_MODE_reserved1, SLEEP_MODE_reserved2, SLEEP_MODE_STANDBY, SLEEP_MODE_EXT_STANDBY }; /* The reset address is always 0x00. */ #define IRQ_RESET_ADDR 0x00 /* NOTE: When an interrupt occurs, we just place a pointer to IntVect into the pending vector list (sorted by addr). */ typedef struct _IrqCtrlBit IrqCtrlBit; struct _IrqCtrlBit { uint16_t addr; /* Address of the IO Register which controlls wether the interrupt is enabled or not. */ uint8_t mask; /* Mask denoting which bit (or bits) in the register to consider. */ }; #define NO_BIT { 0, 0 } typedef struct _IntVect IntVect; struct _IntVect { char *name; /* The name of the interrupt. */ int addr; /* Where to vector to when interrupt occurs. */ uint32_t can_wake; /* If the interrupt occurs while in sleep mode, can it wake the processor? Each bit represents a different sleep mode which the processor might be in. */ /* For an interrupt to be serviced, both enable and flag bits must be set. The exception is if the interrupt flag doesn't exist, in which case, the flag mask is set to zero and having only the enable bit set is sufficient to have the interrupt be sreviced. */ IrqCtrlBit enable; /* This bit, if set, marks the interrupt as enabled. */ IrqCtrlBit flag; /* This bit, if set, marks the interrupt as flagged pending. */ }; /* Macro to calculate the field index into the structure instead of maintaining an index enumeration. */ #define irq_vect_table_index(vect) \ ( ((int) (&( ((IntVectTable *)(0)) -> vect))) / sizeof(IntVect) ) /* No device will have all of these vectors, but must define a structure which has a slot for each interrupt. If the device doesn't support the interrrupt, a NULL vector will be held in the slot. */ typedef struct _IntVectTable IntVectTable; struct _IntVectTable { IntVect RESET; /* external reset, power-on reset and watchdog reset */ IntVect INT0; /* external interrupt request 0 */ IntVect INT1; /* external interrupt request 1 */ IntVect INT2; /* external interrupt request 2 */ IntVect INT3; /* external interrupt request 3 */ IntVect INT4; /* external interrupt request 4 */ IntVect INT5; /* external interrupt request 5 */ IntVect INT6; /* external interrupt request 6 */ IntVect INT7; /* external interrupt request 7 */ IntVect TIMER0_COMP; /* timer/counter 0 compare match */ IntVect TIMER0_OVF; /* timer/counter 0 overflow */ IntVect TIMER1_CAPT; /* timer/counter 1 capture event */ IntVect TIMER1_COMPA; /* timer/counter 1 compare match A */ IntVect TIMER1_COMPB; /* timer/counter 1 compare match B */ IntVect TIMER1_COMPC; /* timer/counter 1 compare match C */ IntVect TIMER1_OVF; /* timer/counter 1 overflow */ IntVect TIMER2_COMP; /* timer/counter 2 compare match */ IntVect TIMER2_OVF; /* timer/counter 2 overflow */ IntVect TIMER3_CAPT; /* timer/counter 3 capture event */ IntVect TIMER3_COMPA; /* timer/counter 3 compare match A */ IntVect TIMER3_COMPB; /* timer/counter 3 compare match B */ IntVect TIMER3_COMPC; /* timer/counter 3 compare match C */ IntVect TIMER3_OVF; /* timer/counter 3 overflow */ IntVect SPI_STC; /* serial transfer complete */ IntVect TWI; /* Two-wire Serial Interface */ IntVect UART_RX; /* uart Rx complete */ IntVect UART_UDRE; /* uart data register empty */ IntVect UART_TX; /* uart Tx complete */ IntVect USART0_RX; /* usart0 Rx complete */ IntVect USART0_UDRE; /* usart0 data register empty */ IntVect USART0_TX; /* usart0 Tx complete */ IntVect USART1_RX; /* usart1 Rx complete */ IntVect USART1_UDRE; /* usart1 data register empty */ IntVect USART1_TX; /* usart1 Tx complete */ IntVect ADC; /* ADC conversion complete */ IntVect ANA_COMP; /* analog comparator */ IntVect EE_READY; /* EEPROM Ready */ IntVect SPM_READY; /* Store Program Memeory Ready */ IntVect USB_HW; /* USB Hardware */ }; /* Global list of vector tables defined in intvects.c */ extern IntVectTable *global_vtable_list[]; #endif /* SIM_INTVECTS_H */ simulavr-0.1.2.2/src/main.c0000644000175000001440000003645010040072147012313 00000000000000/* * $Id: main.c,v 1.40 2004/04/17 00:03:51 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "devsupp.h" #include "display.h" #include "gdb.h" #include "gnu_getopt.h" /****************************************************************************\ * * global variables (keep them to a minimum) * \****************************************************************************/ static char *global_device_type = NULL; static int global_eeprom_image_type = FFMT_BIN; static char *global_eeprom_image_file = NULL; static int global_flash_image_type = FFMT_BIN; static char *global_flash_image_file = NULL; static int global_gdbserver_mode = 0; static int global_gdbserver_port = 1212; /* default port number */ static int global_gdb_debug = 0; static char *global_disp_prog = NULL; static int global_disp_without_xterm = 0; static int global_dump_core = 0; static int global_clock_freq = 8000000; /* Default is 8 MHz. */ /* If the user needs more than LEN_BREAK_LIST on the command line, they've got bigger problems. */ #define LEN_BREAK_LIST 50 static int global_break_count = 0; static int global_break_list[LEN_BREAK_LIST]; static AvrCore *global_core = NULL; /* *INDENT-OFF* */ static GdbComm_T global_gdb_comm[1] = {{ .user_data = NULL, /* user_data: will be global_core later */ .read_reg = (CommFuncReadReg) avr_core_gpwr_get, .write_reg = (CommFuncWriteReg) avr_core_gpwr_set, .read_sreg = (CommFuncReadSREG) avr_core_sreg_get, .write_sreg = (CommFuncWriteSREG) avr_core_sreg_set, .read_pc = (CommFuncReadPC) avr_core_PC_get, .write_pc = (CommFuncWritePC) avr_core_PC_set, .max_pc = (CommFuncMaxPC) avr_core_PC_max, .read_sram = (CommFuncReadSRAM) avr_core_mem_read, .write_sram = (CommFuncWriteSRAM) avr_core_mem_write, .read_flash = (CommFuncReadFlash) avr_core_flash_read, .write_flash = (CommFuncWriteFlash) avr_core_flash_write, .write_flash_lo8 = (CommFuncWriteFlashLo8) avr_core_flash_write_lo8, .write_flash_hi8 = (CommFuncWriteFlashHi8) avr_core_flash_write_hi8, .insert_break = (CommFuncInsertBreak) avr_core_insert_breakpoint, .remove_break = (CommFuncRemoveBreak) avr_core_remove_breakpoint, .enable_breakpts = (CommFuncEnableBrkpts) avr_core_enable_breakpoints, .disable_breakpts = (CommFuncDisableBrkpts) avr_core_disable_breakpoints, .step = (CommFuncStep) avr_core_step, .reset = (CommFuncReset) avr_core_reset, .io_fetch = (CommFuncIORegFetch) avr_core_io_fetch, .irq_raise = (CommFuncIrqRaise) avr_core_irq_raise, }}; static char *usage_fmt_str = "\nUsage: %s [OPTIONS]... [flash_image]\n" "\n" "Simulate an avr device. The optional flash_image file is loaded\n" "into the flash program memory space of the device.\n" "\n" "Options:\n" " -h, --help : Show this message\n" " -D, --debug : Debug instruction output\n" " -v, --version : Print out the version number and exit\n" " -g, --gdbserver : Run as a gdbserver process\n" " -G, --gdb-debug : Print out debug messages for gdbserver\n" " -p, --port : Listen for gdb connection on TCP port\n" " -d, --device : Specify device type\n" " -e, --eeprom-image : Specify an eeprom image file\n" " -E, --eeprom-type : Specify the type of the eeprom image file\n" " -F, --flash-type : Specify the type of the flash image file\n" " -L, --list-devices : Print supported devices to stdout and exit\n" " -P, --disp-prog : Display register and memory info with prog\n" " -X, --without-xterm : Don't start disp prog in an xterm\n" " -C, --core-dump : Dump a core memory image to file on exit\n" " -c, --clock-freq : Set the simulated mcu clock freqency (in Hz)\n" " -B, --breakpoint : Set a breakpoint (address is a byte address)\n" "\n" "If the image file types for eeprom or flash images are not given,\n" "the default file type is binary.\n" "\n" "If you wish to run the simulator in gdbserver mode, you do not\n" "have to specify a flash-image file since the program can be loaded\n" "from gdb via the `load` command.\n" "\n" "If '--port' option is given, and '--gdbserver' is not, port is ignored\n" "\n" "If running in gdbserver mode and port is not specified, a default\n" "port of 1212 is used.\n" "\n" "If using the '--breakpoint' option, note the simulator will terminate when\n" "the address is hit if you are not running in gdbserver mode. This feature\n" "not intended for use in gdbserver mode. It is really intended for testing\n" "the simulator itself, but may be useful for testing avr programs too.\n" "\n" "Currently available device types:\n"; /* *INDENT-ON* */ /* * Print usage message. */ static void usage (char *prog) { fprintf (stdout, usage_fmt_str, prog); dev_supp_list_devices (stdout); fprintf (stdout, "\n"); exit (1); } /* *INDENT-OFF* */ static struct option long_opts[] = { /* name, has_arg, flag, val */ { "help", 0, 0, 'h' }, { "debug", 0, 0, 'D' }, { "version", 0, 0, 'v' }, { "gdbserver", 0, 0, 'g' }, { "gdb-debug", 0, 0, 'G' }, { "port", 1, 0, 'p' }, { "device", 1, 0, 'd' }, { "eeprom-type", 1, 0, 'E' }, { "eeprom-image", 1, 0, 'e' }, { "flash-type", 1, 0, 'F' }, { "list-devices", 0, 0, 'L' }, { "disp-prog", 1, 0, 'P' }, { "without-xterm", 1, 0, 'X' }, { "core-dump", 0, 0, 'C' }, { "clock-freq", 1, 0, 'c' }, { "breakpoint", 1, 0, 'B' }, { NULL, 0, 0, 0 } }; /* *INDENT-ON* */ /* * Parse the command line arguments. */ static void parse_cmd_line (int argc, char **argv) { int c; char *prog = argv[0]; char *basename; int option_index; char dummy_char; int break_addr; opterr = 0; /* disable default error message */ while (1) { c = getopt_long (argc, argv, "hgGvDLd:e:E:F:p:P:XCc:B:", long_opts, &option_index); if (c == -1) break; /* no more options */ switch (c) { case 'h': case '?': usage (prog); case 'g': global_gdbserver_mode = 1; break; case 'G': global_gdb_debug = 1; break; case 'p': global_gdbserver_port = atoi (optarg); break; case 'v': printf ("\n%s version %s\n", PACKAGE, VERSION); printf ("Copyright 2001, 2002, 2003, 2004" " Theodore A. Roth.\n"); printf ("\n%s is free software, covered by the GNU General " "Public License,\n", PACKAGE); printf ("and you are welcome to change it and/or distribute " "copies of it under\n"); printf ("the conditions of the GNU General Public License." "\n\n"); exit (0); case 'D': global_debug_inst_output = 1; break; case 'd': global_device_type = optarg; break; case 'e': global_eeprom_image_file = avr_strdup (optarg); break; case 'E': break; global_eeprom_image_type = str2ffmt (optarg); case 'F': global_flash_image_type = str2ffmt (optarg); break; case 'L': dev_supp_list_devices (stdout); exit (0); case 'P': global_disp_prog = avr_strdup (optarg); break; case 'X': global_disp_without_xterm = 1; break; case 'C': global_dump_core = 1; break; case 'c': if (sscanf (optarg, "%d%c", &global_clock_freq, &dummy_char) != 1) { avr_error ("Invalid clock value: %s", optarg); } avr_warning ("Clock frequency option is not yet " "implemented.\n"); break; case 'B': if (sscanf (optarg, "%i%c", &break_addr, &dummy_char) != 1) { avr_error ("Ignoring invalid break addres: %s", optarg); } if (global_break_count < LEN_BREAK_LIST) { global_break_list[global_break_count] = break_addr; global_break_count++; } else { avr_warning ("Too many break points: igoring %s\n", optarg); } break; default: avr_error ("getop() did something screwey"); } } if ((optind + 1) == argc) global_flash_image_file = argv[optind]; else if (optind != argc) usage (prog); /* FIXME: Issue a warning and bail out if user selects a file format type we haven't implemented yet. */ if ((global_eeprom_image_type != FFMT_BIN) || (global_flash_image_type != FFMT_BIN)) { fprintf (stderr, "Only the bin file format is currently " "implemented. Sorry.\n"); exit (1); } /* If user didn't specify a device type, see if it can be gleaned from the name of the program. */ if (global_device_type == NULL) { /* find the last '/' in dev_name */ basename = strrchr (prog, '/'); if (basename == NULL) /* no slash in dev_name */ global_device_type = prog; else global_device_type = ++basename; } } uint8_t ext_port_rd (int addr) { int data; char line[80]; while (1) { fprintf (stderr, "\nEnter a byte of data to read into 0x%04x: ", addr); /* try to read in a line of input */ if (fgets (line, sizeof (line), stdin) == NULL) continue; /* try to parse the line for a byte of data */ if (sscanf (line, "%i\n", &data) != 1) continue; break; } return (uint8_t) (data & 0xff); } void ext_port_wr (int addr, uint8_t val) { fprintf (stderr, "writing 0x%02x to 0x%04x\n", val, addr); fflush (stderr); } /* This is called whenever the program terminates via a call to exit(). */ void atexit_cleanup (void) { FILE *dump; if (global_dump_core) { if ((dump = fopen ("core_avr_dump.core", "w")) == NULL) { /* can't call avr_error here since it could have called us */ fprintf (stderr, "fopen failed: core_avr_dump.core: %s\n", strerror (errno)); } else { avr_core_dump_core (global_core, dump); fclose (dump); } } class_unref ((AvrClass *)global_core); } /* * Symlinks should be created for each supported device to the * simulavr program. */ int main (int argc, char **argv) { int i; int flash_sz = 0, sram_sz = 0, eeprom_sz = 0; int sram_start = 0; parse_cmd_line (argc, argv); global_core = avr_core_new (global_device_type); if (global_core == NULL) { avr_warning ("Device not supported: %s\n", global_device_type); exit (1); } avr_message ("Simulating clock frequency of %d Hz\n", global_clock_freq); avr_core_get_sizes (global_core, &flash_sz, &sram_sz, &sram_start, &eeprom_sz); display_open (global_disp_prog, global_disp_without_xterm, flash_sz, sram_sz, sram_start, eeprom_sz); avr_core_io_display_names (global_core); /* Send initial clock cycles to display */ display_clock (0); /* install my_atexit to be called when exit() is called */ if (atexit (atexit_cleanup)) avr_error ("Failed to install exit handler"); #if 0 /* Add external device hooks to ports */ avr_core_add_ext_rd_wr (global_core, PORT_B_BASE, ext_port_rd, ext_port_wr); avr_core_add_ext_rd_wr (global_core, PORT_C_BASE, ext_port_rd, ext_port_wr); avr_core_add_ext_rd_wr (global_core, PORT_D_BASE, ext_port_rd, ext_port_wr); #endif /* Load program into flash */ if (global_flash_image_file) avr_core_load_program (global_core, global_flash_image_file, global_flash_image_type); /* Load eeprom data image into eeprom */ if (global_eeprom_image_file) avr_core_load_eeprom (global_core, global_eeprom_image_file, global_eeprom_image_type); for (i = 0; i < global_break_count; i++) { /* Note that we interpret the break address from the user as a byte address instead of a word address. This makes it easier on the user since binutils, gcc and gdb all work in terms of byte addresses. */ avr_message ("Setting breakpoint at 0x%x.\n", global_break_list[i]); avr_core_insert_breakpoint (global_core, global_break_list[i] / 2); } if (global_gdbserver_mode == 1) { global_gdb_comm->user_data = global_core; gdb_interact (global_gdb_comm, global_gdbserver_port, global_gdb_debug); } else { if (global_flash_image_file) /* Run the program */ avr_core_run (global_core); else fprintf (stderr, "No program was specified to be run.\n"); } display_close (); /* close down the display coprocess */ exit (0); return 0; } simulavr-0.1.2.2/src/memory.c0000644000175000001440000002702210052763563012706 00000000000000/* * $Id: memory.c,v 1.19 2004/05/19 23:02:11 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file memory.c * \brief Memory access functions. * * This module provides functions for reading and writing to simulated memory. * The Memory class is a subclass of AvrClass. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "display.h" /** \brief Allocates memory for a new memory object. */ Memory * mem_new (int gpwr_end, int io_reg_end, int sram_end, int xram_end) { Memory *mem; mem = avr_new0 (Memory, 1); mem_construct (mem, gpwr_end, io_reg_end, sram_end, xram_end); class_overload_destroy ((AvrClass *)mem, mem_destroy); return mem; } /** \brief Constructor for the memory object. */ void mem_construct (Memory *mem, int gpwr_end, int io_reg_end, int sram_end, int xram_end) { if (mem == NULL) avr_error ("passed null ptr"); mem->gpwr_end = gpwr_end; mem->io_reg_end = io_reg_end; mem->sram_end = sram_end; mem->xram_end = xram_end; mem->cell = avr_new0 (MemoryCell, xram_end + 1); class_construct ((AvrClass *)mem); } /** \brief Descructor for the memory object. */ void mem_destroy (void *mem) { int i; Memory *this = (Memory *)mem; if (mem == NULL) return; for (i = 0; i < this->xram_end; i++) { if (this->cell[i].vdev) { class_unref ((AvrClass *)this->cell[i].vdev); } } avr_free (this->cell); class_destroy (mem); } /** \brief Attach a device to the device list. Devices that are accessed more often should be attached last so that they will be at the front of the list. A default virtual device can be overridden by attaching a new device ahead of it in the list. */ void mem_attach (Memory *mem, int addr, char *name, VDevice *vdev, int flags, uint8_t reset_value, uint8_t rd_mask, uint8_t wr_mask) { MemoryCell *cell; if (mem == NULL) avr_error ("passed null ptr"); if (vdev == NULL) avr_error ("attempt to attach null device"); if ((addr < 0) || (addr >= mem->xram_end)) avr_error ("address out of range"); cell = &mem->cell[addr]; cell->name = name; cell->flags = flags; cell->reset_value = reset_value; cell->rd_mask = rd_mask; cell->wr_mask = wr_mask; class_ref ((AvrClass *)vdev); cell->vdev = vdev; } /** \brief Find the VDevice associated with the given address. */ VDevice * mem_get_vdevice_by_addr (Memory *mem, int addr) { return mem->cell[addr].vdev; } /** \brief Find the VDevice associated with the given name. \deprecated */ VDevice * mem_get_vdevice_by_name (Memory *mem, char *name) { #if 0 return (VDevice *)dlist_lookup (mem->dev, (AvrClass *)name, vdev_name_cmp); #else avr_error ("use of deprecated interface"); return NULL; #endif } static inline MemoryCell * mem_get_cell (Memory *mem, int addr) { return mem->cell + addr; } static inline int mem_is_io_reg (Memory *mem, int addr) { return ((addr > mem->gpwr_end) && (addr <= mem->io_reg_end)); } static inline char * mem_get_name (Memory *mem, int addr) { return mem->cell[addr].name; } void mem_set_addr_name (Memory *mem, int addr, char *name) { mem->cell[addr].name = name; } /** \brief Reads byte from memory and sanity-checks for valid address. * * \param mem A pointer to the memory object * \param addr The address to be read * \return The byte found at that address addr */ uint8_t mem_read (Memory *mem, int addr) { MemoryCell *cell = mem_get_cell (mem, addr); if (cell->vdev == NULL) { char *name = mem_get_name (mem, addr); if (name) { avr_warning ("**** Attempt to read invalid %s: %s at 0x%04x\n", mem_is_io_reg (mem, addr) ? "io reg" : "mem addr", name, addr); } else { avr_warning ("**** Attempt to read invalid %s: 0x%04x\n", mem_is_io_reg (mem, addr) ? "io reg" : "mem addr", addr); } return 0; } return (vdev_read (cell->vdev, addr) & cell->rd_mask); } /** \brief Writes byte to memory and updates display for io registers. * * \param mem A pointer to a memory object * \param addr The address to be written to * \param val The value to be written there */ void mem_write (Memory *mem, int addr, uint8_t val) { MemoryCell *cell = mem_get_cell (mem, addr); if (cell->vdev == NULL) { char *name = mem_get_name (mem, addr); if (name) { avr_warning ("**** Attempt to write invalid %s: %s at 0x%04x\n", mem_is_io_reg (mem, addr) ? "io reg" : "mem addr", name, addr); } else { avr_warning ("**** Attempt to write invalid %s: 0x%04x\n", mem_is_io_reg (mem, addr) ? "io reg" : "mem addr", addr); } return; } /* update the display for io registers here */ if (mem_is_io_reg (mem, addr)) display_io_reg (addr - (mem->gpwr_end + 1), val & cell->wr_mask); vdev_write (cell->vdev, addr, val & cell->wr_mask); } /** \brief Resets every device in the memory object. * \param mem A pointer to the memory object. */ void mem_reset (Memory *mem) { int i; for (i = 0; i < mem->xram_end; i++) { MemoryCell *cell = mem_get_cell (mem, i); if (cell->vdev) vdev_reset (cell->vdev); } } static void mem_reg_dump_core (Memory *mem, FILE * f_core) { int i, j; fprintf (f_core, "General Purpose Register Dump:\n"); for (i = 0; i < 32; i += 8) { for (j = i; j < (i + 8); j++) fprintf (f_core, "r%02d=%02x ", j, mem_read (mem, j)); fprintf (f_core, "\n"); } fprintf (f_core, "\n"); } /** \brief Fetch the name and value of the io register (addr). * * \param mem A pointer to the memory object. * \param addr The address to fetch from. * \param val A pointer where the value of the register is to be copied. * \param buf A pointer to where the name of the register should be copied. * \param bufsiz The maximum size of the the buf string. */ void mem_io_fetch (Memory *mem, int addr, uint8_t * val, char *buf, int bufsiz) { MemoryCell *cell; if (mem_is_io_reg (mem, addr)) { cell = mem_get_cell (mem, addr); if (cell->name == NULL) { strncpy (buf, "Reserved", bufsiz); *val = 0; } else { strncpy (buf, cell->name, bufsiz); if (cell->vdev) { /* FIXME: Add vdev_read_no_ext () interface to avoid calling the external functions during a read. This will require a reworking of how the vdev invokes the external read method. */ *val = (vdev_read (cell->vdev, addr) & cell->rd_mask); } else { *val = 0; } } } else { *val = 0; strncpy (buf, "NOT AN IO REG", bufsiz); } } static void mem_io_reg_dump_core (Memory *mem, FILE * f_core) { int i, j; char name[80]; uint8_t val; int begin = mem->gpwr_end + 1; int end = mem->io_reg_end; int half = (end - begin) / 2; int mid = begin + half; fprintf (f_core, "IO Register Dump:\n"); for (i = begin; i < mid; i++) { for (j = i; j < end; j += half) { memset (name, '\0', sizeof (name)); mem_io_fetch (mem, j, &val, name, sizeof (name) - 1); fprintf (f_core, "%02x : %-10s : 0x%02x ", j - half, name, val); } fprintf (f_core, "\n"); } fprintf (f_core, "\n"); } static void mem_sram_display (Memory *mem, FILE * f_core, int base, int size) { int i; int dup = 0; int ndat = 16; char line[80]; char last_line[80]; char buf[80]; line[0] = last_line[0] = '\0'; for (i = base; i < (base + size); i++) { if (((i % ndat) == 0) && strlen (line)) { if (strncmp (line, last_line, 80) == 0) { dup++; } else { if (dup > 0) fprintf (f_core, " -- last line repeats --\n"); fprintf (f_core, "%04x : %s\n", i - ndat, line); dup = 0; } strncpy (last_line, line, 80); line[0] = '\0'; } snprintf (buf, 80, "%02x ", mem_read (mem, i)); strncat (line, buf, 80); } if (dup > 0) { fprintf (f_core, " -- last line repeats --\n"); fprintf (f_core, "%04x : %s\n", i - ndat, line); } fprintf (f_core, "\n"); } static void mem_sram_dump_core (Memory *mem, FILE * f_core) { int size, base; /* * Dump the internal sram */ if (mem->io_reg_end == mem->sram_end) return; /* device has no sram */ fprintf (f_core, "Internal SRAM Memory Dump:\n"); base = mem->io_reg_end + 1; size = mem->sram_end; mem_sram_display (mem, f_core, base, size); /* * If external sram present, dump it too. */ if (mem->sram_end == mem->xram_end) return; /* device has no xram */ fprintf (f_core, "External SRAM Memory Dump:\n"); base = mem->sram_end + 1; size = mem->xram_end; mem_sram_display (mem, f_core, base, size); } #if 0 /* FIXME: Still need to figure out a sane way to look up a specific type of vdev by generic name. */ static void mem_eeprom_dump_core (Memory *mem, FILE * f_core) { VDevice *dev = mem_get_vdevice_by_name (mem, "EEProm"); if (dev != NULL) eeprom_dump_core ((EEProm *)dev, f_core); } #endif /** \brief Dump all the various memory locations to a file descriptor * in text format. * * \param mem A memory object. * \param f_core An open file descriptor. */ void mem_dump_core (Memory *mem, FILE * f_core) { mem_reg_dump_core (mem, f_core); mem_io_reg_dump_core (mem, f_core); mem_sram_dump_core (mem, f_core); /* mem_eeprom_dump_core (mem, f_core); */ } simulavr-0.1.2.2/src/memory.h0000644000175000001440000000630310006401504012671 00000000000000/* * $Id: memory.h,v 1.5 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_MEMORY_H #define SIM_MEMORY_H typedef struct _MemoryCell MemoryCell; struct _MemoryCell { char *name; VDevice *vdev; int flags; uint8_t reset_value; uint8_t rd_mask; uint8_t wr_mask; }; /****************************************************************************\ * * Memory(AvrClass) Definition. * \****************************************************************************/ typedef struct _Memory Memory; struct _Memory { AvrClass parent; int gpwr_end; /* Usually 0x1f. */ int io_reg_end; /* Usually 0x5f or 0xff. */ int sram_end; /* Depends on the device. XRAM starts directly after. This may be the same as io_reg_end if the device has no sram. */ int xram_end; /* The last address of external memory. If the device doesn't support the XRAM feature, this should be set to the same value as sram_end. */ MemoryCell *cell; /* Dynamically allocated to len xram_end+1. */ }; extern Memory *mem_new (int gpwr_end, int io_reg_end, int sram_end, int xram_end); extern void mem_construct (Memory *mem, int gpwer_end, int io_reg_end, int sram_end, int xram_end); extern void mem_destroy (void *mem); extern void mem_attach (Memory *mem, int addr, char *name, VDevice *vdev, int flags, uint8_t reset_value, uint8_t rd_mask, uint8_t wr_mask); extern VDevice *mem_get_vdevice_by_addr (Memory *mem, int addr); extern VDevice *mem_get_vdevice_by_name (Memory *mem, char *name); extern void mem_set_addr_name (Memory *mem, int addr, char *name); extern uint8_t mem_read (Memory *mem, int addr); extern void mem_write (Memory *mem, int addr, uint8_t val); extern void mem_reset (Memory *mem); extern void mem_io_fetch (Memory *mem, int addr, uint8_t * val, char *buf, int bufsiz); extern void mem_dump_core (Memory *mem, FILE * f_core); #endif /* SIM_MEMORY_H */ simulavr-0.1.2.2/src/op_names.c0000644000175000001440000002210607762602567013207 00000000000000/* * $Id: op_names.c,v 1.5 2003/12/01 09:10:15 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include "op_names.h" /* * Define a global array of opcode Name strings. */ /* *INDENT-OFF */ char *global_opcode_name[NUM_OPCODE_HANLDERS] = { /* opcodes with no operands */ "BREAK", /* 0x9598 - 1001 0101 1001 1000 | BREAK */ "EICALL", /* 0x9519 - 1001 0101 0001 1001 | EICALL */ "EIJMP", /* 0x9419 - 1001 0100 0001 1001 | EIJMP */ "ELPM", /* 0x95D8 - 1001 0101 1101 1000 | ELPM */ "ESPM", /* 0x95F8 - 1001 0101 1111 1000 | ESPM */ "ICALL", /* 0x9509 - 1001 0101 0000 1001 | ICALL */ "IJMP", /* 0x9409 - 1001 0100 0000 1001 | IJMP */ "LPM", /* 0x95C8 - 1001 0101 1100 1000 | LPM */ "NOP", /* 0x0000 - 0000 0000 0000 0000 | NOP */ "RET", /* 0x9508 - 1001 0101 0000 1000 | RET */ "RETI", /* 0x9518 - 1001 0101 0001 1000 | RETI */ "SLEEP", /* 0x9588 - 1001 0101 1000 1000 | SLEEP */ "SPM", /* 0x95E8 - 1001 0101 1110 1000 | SPM */ "WDR", /* 0x95A8 - 1001 0101 1010 1000 | WDR */ /* opcode with a single register (Rd) as operand */ "ASR", /* 0x9405 - 1001 010d dddd 0101 | ASR */ "COM", /* 0x9400 - 1001 010d dddd 0000 | COM */ "DEC", /* 0x940A - 1001 010d dddd 1010 | DEC */ "ELPM_Z", /* 0x9006 - 1001 000d dddd 0110 | ELPM */ "ELPM_Z_incr", /* 0x9007 - 1001 000d dddd 0111 | ELPM */ "INC", /* 0x9403 - 1001 010d dddd 0011 | INC */ "LDS", /* 0x9000 - 1001 000d dddd 0000 | LDS */ "LD_X", /* 0x900C - 1001 000d dddd 1100 | LD */ "LD_X_decr", /* 0x900E - 1001 000d dddd 1110 | LD */ "LD_X_incr", /* 0x900D - 1001 000d dddd 1101 | LD */ "LD_Y_decr", /* 0x900A - 1001 000d dddd 1010 | LD */ "LD_Y_incr", /* 0x9009 - 1001 000d dddd 1001 | LD */ "LD_Z_decr", /* 0x9002 - 1001 000d dddd 0010 | LD */ "LD_Z_incr", /* 0x9001 - 1001 000d dddd 0001 | LD */ "LPM_Z", /* 0x9004 - 1001 000d dddd 0100 | LPM */ "LPM_Z_incr", /* 0x9005 - 1001 000d dddd 0101 | LPM */ "LSR", /* 0x9406 - 1001 010d dddd 0110 | LSR */ "NEG", /* 0x9401 - 1001 010d dddd 0001 | NEG */ "POP", /* 0x900F - 1001 000d dddd 1111 | POP */ "PUSH", /* 0x920F - 1001 001d dddd 1111 | PUSH */ "ROR", /* 0x9407 - 1001 010d dddd 0111 | ROR */ "STS", /* 0x9200 - 1001 001d dddd 0000 | STS */ "ST_X", /* 0x920C - 1001 001d dddd 1100 | ST */ "ST_X_decr", /* 0x920E - 1001 001d dddd 1110 | ST */ "ST_X_incr", /* 0x920D - 1001 001d dddd 1101 | ST */ "ST_Y_decr", /* 0x920A - 1001 001d dddd 1010 | ST */ "ST_Y_incr", /* 0x9209 - 1001 001d dddd 1001 | ST */ "ST_Z_decr", /* 0x9202 - 1001 001d dddd 0010 | ST */ "ST_Z_incr", /* 0x9201 - 1001 001d dddd 0001 | ST */ "SWAP", /* 0x9402 - 1001 010d dddd 0010 | SWAP */ /* opcodes with two 5-bit register (Rd and Rr) operands */ "ADC", /* 0x1C00 - 0001 11rd dddd rrrr | ADC or ROL */ "ADD", /* 0x0C00 - 0000 11rd dddd rrrr | ADD or LSL */ "AND", /* 0x2000 - 0010 00rd dddd rrrr | AND or TST or LSL */ "CP", /* 0x1400 - 0001 01rd dddd rrrr | CP */ "CPC", /* 0x0400 - 0000 01rd dddd rrrr | CPC */ "CPSE", /* 0x1000 - 0001 00rd dddd rrrr | CPSE */ "EOR", /* 0x2400 - 0010 01rd dddd rrrr | EOR or CLR */ "MOV", /* 0x2C00 - 0010 11rd dddd rrrr | MOV */ "MUL", /* 0x9C00 - 1001 11rd dddd rrrr | MUL */ "OR", /* 0x2800 - 0010 10rd dddd rrrr | OR */ "SBC", /* 0x0800 - 0000 10rd dddd rrrr | SBC */ "SUB", /* 0x1800 - 0001 10rd dddd rrrr | SUB */ /* opcodes with two 4-bit register (Rd and Rr) operands */ "MOVW", /* 0x0100 - 0000 0001 dddd rrrr | MOVW */ "MULS", /* 0x0200 - 0000 0010 dddd rrrr | MULS */ "MULSU", /* 0x0300 - 0000 0011 dddd rrrr | MULSU */ /* opcodes with two 3-bit register (Rd and Rr) operands */ "FMUL", /* 0x0308 - 0000 0011 0ddd 1rrr | FMUL */ "FMULS", /* 0x0380 - 0000 0011 1ddd 0rrr | FMULS */ "FMULSU", /* 0x0388 - 0000 0011 1ddd 1rrr | FMULSU */ /* opcodes with a register (Rd) and a constant data (K) as operands */ "ANDI", /* 0x7000 - 0111 KKKK dddd KKKK | CBR or ANDI */ "CPI", /* 0x3000 - 0011 KKKK dddd KKKK | CPI */ "LDI", /* 0xE000 - 1110 KKKK dddd KKKK | LDI */ "ORI", /* 0x6000 - 0110 KKKK dddd KKKK | SBR or ORI */ "SBCI", /* 0x4000 - 0100 KKKK dddd KKKK | SBCI */ "SUBI", /* 0x5000 - 0101 KKKK dddd KKKK | SUBI */ /* opcodes with a register (Rd) and a register bit number (b) as operands */ "BLD", /* 0xF800 - 1111 100d dddd 0bbb | BLD */ "BST", /* 0xFA00 - 1111 101d dddd 0bbb | BST */ "SBRC", /* 0xFC00 - 1111 110d dddd 0bbb | SBRC */ "SBRS", /* 0xFE00 - 1111 111d dddd 0bbb | SBRS */ /* opcodes with a relative 7-bit address (k) and a register bit number (b) as operands */ "BRBC", /* 0xF400 - 1111 01kk kkkk kbbb | BRBC */ "BRBS", /* 0xF000 - 1111 00kk kkkk kbbb | BRBS */ /* opcodes with a 6-bit address displacement (q) and a register (Rd) as operands */ "LDD_Y", /* 0x8008 - 10q0 qq0d dddd 1qqq | LDD */ "LDD_Z", /* 0x8000 - 10q0 qq0d dddd 0qqq | LDD */ "STD_Y", /* 0x8208 - 10q0 qq1d dddd 1qqq | STD */ "STD_Z", /* 0x8200 - 10q0 qq1d dddd 0qqq | STD */ /* opcodes with a absolute 22-bit address (k) operand */ "CALL", /* 0x940E - 1001 010k kkkk 111k | CALL */ "JMP", /* 0x940C - 1001 010k kkkk 110k | JMP */ /* opcode with a sreg bit select (s) operand */ "BCLR", /* 0x9488 - 1001 0100 1sss 1000 | BCLR or CL{C,Z,N,V,S,H,T,I} */ "BSET", /* 0x9408 - 1001 0100 0sss 1000 | BSET or SE{C,Z,N,V,S,H,T,I} */ /* opcodes with a 6-bit constant (K) and a register (Rd) as operands */ "ADIW", /* 0x9600 - 1001 0110 KKdd KKKK | ADIW */ "SBIW", /* 0x9700 - 1001 0111 KKdd KKKK | SBIW */ /* opcodes with a 5-bit IO Addr (A) and register bit number (b) as operands */ "CBI", /* 0x9800 - 1001 1000 AAAA Abbb | CBI */ "SBI", /* 0x9A00 - 1001 1010 AAAA Abbb | SBI */ "SBIC", /* 0x9900 - 1001 1001 AAAA Abbb | SBIC */ "SBIS", /* 0x9B00 - 1001 1011 AAAA Abbb | SBIS */ /* opcodes with a 6-bit IO Addr (A) and register (Rd) as operands */ "IN", /* 0xB000 - 1011 0AAd dddd AAAA | IN */ "OUT", /* 0xB800 - 1011 1AAd dddd AAAA | OUT */ /* opcodes with a relative 12-bit address (k) operand */ "RCALL", /* 0xD000 - 1101 kkkk kkkk kkkk | RCALL */ "RJMP" /* 0xC000 - 1100 kkkk kkkk kkkk | RJMP */ }; /* *INDENT-ON */ simulavr-0.1.2.2/src/op_names.h0000644000175000001440000002233307762567531013217 00000000000000/* * $Id: op_names.h,v 1.6 2003/12/01 07:35:53 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_OP_NAMES_H #define SIM_OP_NAMES_H enum _opcode_name { /* opcodes with no operands */ opcode_BREAK, /* 0x9598 - 1001 0101 1001 1000 | BREAK */ opcode_EICALL, /* 0x9519 - 1001 0101 0001 1001 | EICALL */ opcode_EIJMP, /* 0x9419 - 1001 0100 0001 1001 | EIJMP */ opcode_ELPM, /* 0x95D8 - 1001 0101 1101 1000 | ELPM */ opcode_ESPM, /* 0x95F8 - 1001 0101 1111 1000 | ESPM */ opcode_ICALL, /* 0x9509 - 1001 0101 0000 1001 | ICALL */ opcode_IJMP, /* 0x9409 - 1001 0100 0000 1001 | IJMP */ opcode_LPM, /* 0x95C8 - 1001 0101 1100 1000 | LPM */ opcode_NOP, /* 0x0000 - 0000 0000 0000 0000 | NOP */ opcode_RET, /* 0x9508 - 1001 0101 0000 1000 | RET */ opcode_RETI, /* 0x9518 - 1001 0101 0001 1000 | RETI */ opcode_SLEEP, /* 0x9588 - 1001 0101 1000 1000 | SLEEP */ opcode_SPM, /* 0x95E8 - 1001 0101 1110 1000 | SPM */ opcode_WDR, /* 0x95A8 - 1001 0101 1010 1000 | WDR */ /* opcode with a single register (Rd) as operand */ opcode_ASR, /* 0x9405 - 1001 010d dddd 0101 | ASR */ opcode_COM, /* 0x9400 - 1001 010d dddd 0000 | COM */ opcode_DEC, /* 0x940A - 1001 010d dddd 1010 | DEC */ opcode_ELPM_Z, /* 0x9006 - 1001 000d dddd 0110 | ELPM */ opcode_ELPM_Z_incr, /* 0x9007 - 1001 000d dddd 0111 | ELPM */ opcode_INC, /* 0x9403 - 1001 010d dddd 0011 | INC */ opcode_LDS, /* 0x9000 - 1001 000d dddd 0000 | LDS */ opcode_LD_X, /* 0x900C - 1001 000d dddd 1100 | LD */ opcode_LD_X_decr, /* 0x900E - 1001 000d dddd 1110 | LD */ opcode_LD_X_incr, /* 0x900D - 1001 000d dddd 1101 | LD */ opcode_LD_Y_decr, /* 0x900A - 1001 000d dddd 1010 | LD */ opcode_LD_Y_incr, /* 0x9009 - 1001 000d dddd 1001 | LD */ opcode_LD_Z_decr, /* 0x9002 - 1001 000d dddd 0010 | LD */ opcode_LD_Z_incr, /* 0x9001 - 1001 000d dddd 0001 | LD */ opcode_LPM_Z, /* 0x9004 - 1001 000d dddd 0100 | LPM */ opcode_LPM_Z_incr, /* 0x9005 - 1001 000d dddd 0101 | LPM */ opcode_LSR, /* 0x9406 - 1001 010d dddd 0110 | LSR */ opcode_NEG, /* 0x9401 - 1001 010d dddd 0001 | NEG */ opcode_POP, /* 0x900F - 1001 000d dddd 1111 | POP */ opcode_PUSH, /* 0x920F - 1001 001d dddd 1111 | PUSH */ opcode_ROR, /* 0x9407 - 1001 010d dddd 0111 | ROR */ opcode_STS, /* 0x9200 - 1001 001d dddd 0000 | STS */ opcode_ST_X, /* 0x920C - 1001 001d dddd 1100 | ST */ opcode_ST_X_decr, /* 0x920E - 1001 001d dddd 1110 | ST */ opcode_ST_X_incr, /* 0x920D - 1001 001d dddd 1101 | ST */ opcode_ST_Y_decr, /* 0x920A - 1001 001d dddd 1010 | ST */ opcode_ST_Y_incr, /* 0x9209 - 1001 001d dddd 1001 | ST */ opcode_ST_Z_decr, /* 0x9202 - 1001 001d dddd 0010 | ST */ opcode_ST_Z_incr, /* 0x9201 - 1001 001d dddd 0001 | ST */ opcode_SWAP, /* 0x9402 - 1001 010d dddd 0010 | SWAP */ /* opcodes with two 5-bit register (Rd and Rr) operands */ opcode_ADC, /* 0x1C00 - 0001 11rd dddd rrrr | ADC or ROL */ opcode_ADD, /* 0x0C00 - 0000 11rd dddd rrrr | ADD or LSL */ opcode_AND, /* 0x2000 - 0010 00rd dddd rrrr | AND or TST or LSL */ opcode_CP, /* 0x1400 - 0001 01rd dddd rrrr | CP */ opcode_CPC, /* 0x0400 - 0000 01rd dddd rrrr | CPC */ opcode_CPSE, /* 0x1000 - 0001 00rd dddd rrrr | CPSE */ opcode_EOR, /* 0x2400 - 0010 01rd dddd rrrr | EOR or CLR */ opcode_MOV, /* 0x2C00 - 0010 11rd dddd rrrr | MOV */ opcode_MUL, /* 0x9C00 - 1001 11rd dddd rrrr | MUL */ opcode_OR, /* 0x2800 - 0010 10rd dddd rrrr | OR */ opcode_SBC, /* 0x0800 - 0000 10rd dddd rrrr | SBC */ opcode_SUB, /* 0x1800 - 0001 10rd dddd rrrr | SUB */ /* opcodes with two 4-bit register (Rd and Rr) operands */ opcode_MOVW, /* 0x0100 - 0000 0001 dddd rrrr | MOVW */ opcode_MULS, /* 0x0200 - 0000 0010 dddd rrrr | MULS */ opcode_MULSU, /* 0x0300 - 0000 0011 dddd rrrr | MULSU */ /* opcodes with two 3-bit register (Rd and Rr) operands */ opcode_FMUL, /* 0x0308 - 0000 0011 0ddd 1rrr | FMUL */ opcode_FMULS, /* 0x0380 - 0000 0011 1ddd 0rrr | FMULS */ opcode_FMULSU, /* 0x0388 - 0000 0011 1ddd 1rrr | FMULSU */ /* opcodes with a register (Rd) and a constant data (K) as operands */ opcode_ANDI, /* 0x7000 - 0111 KKKK dddd KKKK | CBR or ANDI */ opcode_CPI, /* 0x3000 - 0011 KKKK dddd KKKK | CPI */ opcode_LDI, /* 0xE000 - 1110 KKKK dddd KKKK | LDI */ opcode_ORI, /* 0x6000 - 0110 KKKK dddd KKKK | SBR or ORI */ opcode_SBCI, /* 0x4000 - 0100 KKKK dddd KKKK | SBCI */ opcode_SUBI, /* 0x5000 - 0101 KKKK dddd KKKK | SUBI */ /* opcodes with a register (Rd) and a register bit number (b) as operands */ opcode_BLD, /* 0xF800 - 1111 100d dddd 0bbb | BLD */ opcode_BST, /* 0xFA00 - 1111 101d dddd 0bbb | BST */ opcode_SBRC, /* 0xFC00 - 1111 110d dddd 0bbb | SBRC */ opcode_SBRS, /* 0xFE00 - 1111 111d dddd 0bbb | SBRS */ /* opcodes with a relative 7-bit address (k) and a register bit number (b) as operands */ opcode_BRBC, /* 0xF400 - 1111 01kk kkkk kbbb | BRBC */ opcode_BRBS, /* 0xF000 - 1111 00kk kkkk kbbb | BRBS */ /* opcodes with a 6-bit address displacement (q) and a register (Rd) as operands */ opcode_LDD_Y, /* 0x8008 - 10q0 qq0d dddd 1qqq | LDD */ opcode_LDD_Z, /* 0x8000 - 10q0 qq0d dddd 0qqq | LDD */ opcode_STD_Y, /* 0x8208 - 10q0 qq1d dddd 1qqq | STD */ opcode_STD_Z, /* 0x8200 - 10q0 qq1d dddd 0qqq | STD */ /* opcodes with a absolute 22-bit address (k) operand */ opcode_CALL, /* 0x940E - 1001 010k kkkk 111k | CALL */ opcode_JMP, /* 0x940C - 1001 010k kkkk 110k | JMP */ /* opcode with a sreg bit select (s) operand */ opcode_BCLR, /* 0x9488 - 1001 0100 1sss 1000 | BCLR or CL{C,Z,N,V,S,H,T,I} */ opcode_BSET, /* 0x9408 - 1001 0100 0sss 1000 | BSET or SE{C,Z,N,V,S,H,T,I} */ /* opcodes with a 6-bit constant (K) and a register (Rd) as operands */ opcode_ADIW, /* 0x9600 - 1001 0110 KKdd KKKK | ADIW */ opcode_SBIW, /* 0x9700 - 1001 0111 KKdd KKKK | SBIW */ /* opcodes with a 5-bit IO Addr (A) and register bit number (b) as operands */ opcode_CBI, /* 0x9800 - 1001 1000 AAAA Abbb | CBI */ opcode_SBI, /* 0x9A00 - 1001 1010 AAAA Abbb | SBI */ opcode_SBIC, /* 0x9900 - 1001 1001 AAAA Abbb | SBIC */ opcode_SBIS, /* 0x9B00 - 1001 1011 AAAA Abbb | SBIS */ /* opcodes with a 6-bit IO Addr (A) and register (Rd) as operands */ opcode_IN, /* 0xB000 - 1011 0AAd dddd AAAA | IN */ opcode_OUT, /* 0xB800 - 1011 1AAd dddd AAAA | OUT */ /* opcodes with a relative 12-bit address (k) operand */ opcode_RCALL, /* 0xD000 - 1101 kkkk kkkk kkkk | RCALL */ opcode_RJMP, /* 0xC000 - 1100 kkkk kkkk kkkk | RJMP */ opcode_UNKNOWN, NUM_OPCODE_HANLDERS, }; #ifndef BREAK_POINT # define BREAK_POINT -1 #endif /* global array for mapping handler codes to name strings */ extern char *global_opcode_name[NUM_OPCODE_HANLDERS]; #endif /* SIM_OP_NAMES_H */ simulavr-0.1.2.2/src/ports.c0000644000175000001440000001732410006401504012530 00000000000000/* * $Id: ports.c,v 1.17 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file ports.c * \brief Module for accessing simulated I/O ports. * * Defines an abstract Port class as well as subclasses for each individual * port. * * \todo Remove the pins argument and the mask field. That's handled at a * higher level so is obsolete here now. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" /****************************************************************************\ * * Local static prototypes. * \****************************************************************************/ static Port *port_new (int addr, char *name); static void port_construct (Port *p, int addr, char *name); static void port_destroy (void *p); static uint8_t port_reg_read (VDevice *dev, int addr); static void port_reg_write (VDevice *dev, int addr, uint8_t val); static void port_reset (VDevice *dev); static uint8_t port_read_pin (Port *p, int addr); static void port_write_port (Port *p, int addr, uint8_t val); static void port_write_ddr (Port *p, int addr, uint8_t val); static void port_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); /****************************************************************************\ * * Port(VDevice) : I/O Port registers * \****************************************************************************/ /** * \brief Create a new Port instance. * * This should only be used in DevSuppDefn initializers. */ VDevice * port_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)port_new (addr, name); } /** * \brief Allocates a new Port object. */ static Port * port_new (int addr, char *name) { Port *p; p = avr_new0 (Port, 1); port_construct (p, addr, name); class_overload_destroy ((AvrClass *)p, port_destroy); return p; } /** * \brief Constructor for the Port object. */ static void port_construct (Port *p, int addr, char *name) { if (p == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)p, port_reg_read, port_reg_write, port_reset, port_add_addr); port_add_addr ((VDevice *)p, addr, name, 0, NULL); p->ext_rd = NULL; p->ext_wr = NULL; port_reset ((VDevice *)p); } static void port_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { Port *p = (Port *)vdev; if (strncmp ("PORT", name, 4) == 0) { p->port_addr = addr; } else if (strncmp ("DDR", name, 3) == 0) { p->ddr_addr = addr; } else if (strncmp ("PIN", name, 3) == 0) { p->pin_addr = addr; } else { avr_error ("invalid port register name: '%s' @ 0x%04x", name, addr); } } static void port_reset (VDevice *dev) { Port *p = (Port *)dev; p->port = 0; p->ddr = 0; p->pin = 0; p->ext_enable = 1; } /** * \brief Destructor for the Port object * * This is a virtual method for higher level port implementations and as such * should not be used directly. */ void port_destroy (void *p) { if (p == NULL) return; vdev_destroy (p); } /** \brief Disable external port functionality. * * This is only used when dumping memory to core file. See mem_io_fetch(). */ void port_ext_disable (Port *p) { p->ext_enable = 0; } /** \brief Enable external port functionality. * * This is only used when dumping memory to core file. See mem_io_fetch(). */ void port_ext_enable (Port *p) { p->ext_enable = 1; } /** * \brief Attaches read and write functions to a particular port * * I think I may have this backwards. Having the virtual hardware supply * functions for the core to call on every io read/write, might cause missed * events (like edge triggered). I'm really not too sure how to handle this. * * In the future, it might be better to have the core supply a function for * the virtual hardware to call when data is written to the device. The device * supplied function could then check if an interrupt should be generated or * just simply write to the port data register. * * For now, leave it as is since it's easier to test if you can block when the * device is reading from the virtual hardware. */ void port_add_ext_rd_wr (Port *p, PortFP_ExtRd ext_rd, PortFP_ExtWr ext_wr) { p->ext_rd = ext_rd; p->ext_wr = ext_wr; } static uint8_t port_read_pin (Port *p, int addr) { uint8_t data; /* get the data from the external virtual hardware if connected */ if (p->ext_rd && p->ext_enable) data = p->ext_rd (addr); else data = 0; /* * For a pin n to be enabled as input, DDRn == 0, * otherwise it will always read 0. */ data &= ~(p->ddr); /* * Pass data to alternate read so as to check alternate functions of * pins for that port. */ /* if (p->alt_rd) */ /* data = p->alt_rd(p, addr, data); */ return data; } static void port_write_port (Port *p, int addr, uint8_t val) { /* update port register */ p->port = val; /* * Since changing p->port might change what the virtual hardware * sees, we need to call ext_wr() to pass change along. */ if (p->ext_wr && p->ext_enable) p->ext_wr (addr, (p->port & p->ddr)); } static void port_write_ddr (Port *p, int addr, uint8_t val) { /* update ddr register */ p->ddr = val; #if 0 /* * Since changing p->ddr might change what the virtual hardware * sees, we need to call ext_wr() to pass change allong. */ if (p->ext_wr && p->ext_enable) p->ext_wr (addr, (p->port & p->ddr)); #endif } static uint8_t port_reg_read (VDevice *dev, int addr) { Port *p = (Port *)dev; if (addr == p->ddr_addr) return p->ddr; else if (addr == p->pin_addr) return port_read_pin (p, addr); else if (addr == p->port_addr) return p->port; else avr_error ("Invalid Port Address: 0x%02x", addr); return 0; } static void port_reg_write (VDevice *dev, int addr, uint8_t val) { Port *p = (Port *)dev; if (addr == p->pin_addr) { avr_warning ("Attempt to write to readonly PINx register\n"); } else if (addr == p->ddr_addr) { port_write_ddr ((Port *)p, addr, val); } else if (addr == p->port_addr) { port_write_port ((Port *)p, addr, val); } else { avr_error ("Invalid Port Address: 0x%02x", addr); } } simulavr-0.1.2.2/src/ports.h0000644000175000001440000000761410006401504012536 00000000000000/* * $Id: ports.h,v 1.7 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_PORTS_H #define SIM_PORTS_H /****************************************************************************\ * * Port(VDevice) : I/O Port registers * \****************************************************************************/ enum _port_constants { PORT_A = 0, PORT_B = 1, PORT_C = 2, PORT_D = 3, PORT_E = 4, PORT_F = 5, PORT_A_BASE = 0x39, /* Base Memory address for port */ PORT_B_BASE = 0x36, /* Base Memory address for port */ PORT_C_BASE = 0x33, /* Base Memory address for port */ PORT_D_BASE = 0x30, /* Base Memory address for port */ /* NOTE: these are only valid addresses for the USB devices. */ PORT_E_BASE = 0x21, /* Base Memory address for port */ PORT_F_BASE = 0x24, /* Base Memory address for port */ PORT_PIN = 0, /* offset to pin io */ PORT_DDR = 1, /* offset to ddr register */ PORT_PORT = 2, /* offset to data register (PORTx) */ PORT_SIZE = 3, /* All ports use 3 registers: PINx, DDRx, PORTx */ PORT_1_BIT = 1, /* Some ports are 1 bits wide */ PORT_2_BIT = 2, /* Some ports are 2 bits wide */ PORT_3_BIT = 3, /* Some ports are 3 bits wide */ PORT_4_BIT = 4, /* Some ports are 4 bits wide */ PORT_5_BIT = 5, /* Some ports are 5 bits wide */ PORT_6_BIT = 6, /* Some ports are 6 bits wide */ PORT_7_BIT = 7, /* Some ports are 7 bits wide */ PORT_8_BIT = 8, /* Most ports are 8 bits wide */ }; /* Generic I/O Port */ typedef struct _Port Port; /* Hooks for external device connections */ typedef uint8_t (*PortFP_ExtRd) (int addr); typedef void (*PortFP_ExtWr) (int addr, uint8_t val); struct _Port { VDevice parent; uint16_t port_addr; /* port data register address */ uint16_t ddr_addr; /* data direction register address */ uint16_t pin_addr; /* input register address */ uint8_t port; /* port data register */ uint8_t ddr; /* data direction register */ uint8_t pin; /* input register */ int ext_enable; /* allows disabling external read functions */ PortFP_ExtRd ext_rd; /* hook to read from external device via port */ PortFP_ExtWr ext_wr; /* hook to write to external device via port */ }; extern VDevice *port_create (int addr, char *name, int rel_addr, void *data); extern void port_add_ext_rd_wr (Port *p, PortFP_ExtRd ext_rd, PortFP_ExtWr ext_wr); extern void port_ext_enable (Port *p); extern void port_ext_disable (Port *p); #endif /* SIM_PORTS_H */ simulavr-0.1.2.2/src/register.c0000644000175000001440000003451410006401504013205 00000000000000/* * $Id: register.c,v 1.35 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "display.h" #include "intvects.h" /****************************************************************************\ * * Status Register Methods. * \****************************************************************************/ static inline uint8_t sreg_read (VDevice *dev, int addr); static inline void sreg_write (VDevice *dev, int addr, uint8_t val); static inline void sreg_reset (VDevice *dev); static void sreg_add_addr (VDevice *dev, int addr, char *name, int rel_addr, void *data); VDevice * sreg_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)sreg_new (); } SREG * sreg_new (void) { SREG *sreg; sreg = avr_new (SREG, 1); sreg_construct (sreg); class_overload_destroy ((AvrClass *)sreg, sreg_destroy); return sreg; } void sreg_construct (SREG *sreg) { if (sreg == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)sreg, sreg_read, sreg_write, sreg_reset, sreg_add_addr); sreg->sreg.reg = 0; } void sreg_destroy (void *sreg) { if (sreg == NULL) return; vdev_destroy (sreg); } extern inline uint8_t sreg_get (SREG *sreg); extern inline void sreg_set (SREG *sreg, uint8_t val); extern inline uint8_t sreg_get_bit (SREG *sreg, int bit); extern inline void sreg_set_bit (SREG *sreg, int bit, int val); static inline uint8_t sreg_read (VDevice *dev, int addr) { return sreg_get ((SREG *)dev); } static inline void sreg_write (VDevice *dev, int addr, uint8_t val) { sreg_set ((SREG *)dev, val); } static inline void sreg_reset (VDevice *dev) { display_io_reg (SREG_IO_REG, 0); ((SREG *)dev)->sreg.reg = 0; } static void sreg_add_addr (VDevice *dev, int addr, char *name, int rel_addr, void *data) { /* Nothing to do here. */ } /****************************************************************************\ * * General Purpose Working Register (gpwr) Methods. * \****************************************************************************/ static inline uint8_t gpwr_read (VDevice *dev, int addr); static inline void gpwr_write (VDevice *dev, int addr, uint8_t val); static inline void gpwr_reset (VDevice *dev); GPWR * gpwr_new (void) { GPWR *gpwr; gpwr = avr_new (GPWR, 1); gpwr_construct (gpwr); class_overload_destroy ((AvrClass *)gpwr, gpwr_destroy); return gpwr; } void gpwr_construct (GPWR *gpwr) { if (gpwr == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)gpwr, gpwr_read, gpwr_write, gpwr_reset, NULL); gpwr_reset ((VDevice *)gpwr); } void gpwr_destroy (void *gpwr) { if (gpwr == NULL) return; vdev_destroy (gpwr); } extern inline uint8_t gpwr_get (GPWR *gpwr, int reg); extern inline void gpwr_set (GPWR *gpwr, int reg, uint8_t val); static inline uint8_t gpwr_read (VDevice *dev, int addr) { return gpwr_get ((GPWR *)dev, addr); } static inline void gpwr_write (VDevice *dev, int addr, uint8_t val) { gpwr_set ((GPWR *)dev, addr, val); } static void gpwr_reset (VDevice *dev) { int i; for (i = 0; i < GPWR_SIZE; i++) gpwr_set ((GPWR *)dev, i, 0); } /****************************************************************************\ * * ACSR(VDevice) : Analog Comparator Control and Status Register Definition * \****************************************************************************/ static uint8_t acsr_read (VDevice *dev, int addr); static void acsr_write (VDevice *dev, int addr, uint8_t val); static void acsr_reset (VDevice *dev); ACSR * acsr_new (uint8_t func_mask) { ACSR *acsr; acsr = avr_new (ACSR, 1); acsr_construct (acsr, func_mask); class_overload_destroy ((AvrClass *)acsr, acsr_destroy); return acsr; } void acsr_construct (ACSR *acsr, uint8_t func_mask) { if (acsr == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)acsr, acsr_read, acsr_write, acsr_reset, vdev_def_AddAddr); acsr->func_mask = func_mask; acsr->acsr = 0; } void acsr_destroy (void *acsr) { if (acsr == NULL) return; vdev_destroy (acsr); } int acsr_get_bit (ACSR *acsr, int bit) { return !!(acsr->acsr & acsr->func_mask & (1 << bit)); } void acsr_set_bit (ACSR *acsr, int bit, int val) { /* the ACO bit is read only */ acsr->acsr = set_bit_in_byte (acsr->acsr, bit, val) & acsr->func_mask & ~(mask_ACO); } static uint8_t acsr_read (VDevice *dev, int addr) { ACSR *reg = (ACSR *)dev; return (reg->acsr & reg->func_mask); } static void acsr_write (VDevice *dev, int addr, uint8_t val) { ACSR *reg = (ACSR *)dev; /* the ACO bit is read only */ reg->acsr = (val & reg->func_mask & ~(mask_ACO)); } static void acsr_reset (VDevice *dev) { ((ACSR *)dev)->acsr = 0; } /****************************************************************************\ * * MCUCR(VDevice) : MCU general control register * \****************************************************************************/ static uint8_t mcucr_read (VDevice *dev, int addr); static void mcucr_write (VDevice *dev, int addr, uint8_t val); static void mcucr_reset (VDevice *dev); MCUCR * mcucr_new (uint8_t func_mask) { MCUCR *mcucr; mcucr = avr_new (MCUCR, 1); mcucr_construct (mcucr, func_mask); class_overload_destroy ((AvrClass *)mcucr, mcucr_destroy); return mcucr; } void mcucr_construct (MCUCR *mcucr, uint8_t func_mask) { if (mcucr == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)mcucr, mcucr_read, mcucr_write, mcucr_reset, vdev_def_AddAddr); mcucr->func_mask = func_mask; mcucr->mcucr = 0; } void mcucr_destroy (void *mcucr) { if (mcucr == NULL) return; vdev_destroy (mcucr); } int mcucr_get_bit (MCUCR *reg, int bit) { return !!(reg->mcucr & reg->func_mask & (1 << bit)); } void mcucr_set_bit (MCUCR *reg, int bit, int val) { reg->mcucr = set_bit_in_byte (reg->mcucr, bit, val) & reg->func_mask; } static uint8_t mcucr_read (VDevice *dev, int addr) { MCUCR *reg = (MCUCR *)dev; return (reg->mcucr & reg->func_mask); } static void mcucr_write (VDevice *dev, int addr, uint8_t val) { MCUCR *reg = (MCUCR *)dev; reg->mcucr = (val & reg->func_mask); } static void mcucr_reset (VDevice *dev) { ((MCUCR *)dev)->mcucr = 0; } /****************************************************************************\ * * WDTCR(VDevice) : Watchdog timer control register * \****************************************************************************/ /* static int wdtcr_get_bit ( WDTCR *wdtcr, int bit ); */ static void wdtcr_set_bit (WDTCR *wdtcr, int bit, int val); static uint8_t wdtcr_read (VDevice *dev, int addr); static void wdtcr_write (VDevice *dev, int addr, uint8_t val); static void wdtcr_reset (VDevice *dev); static int wdtcr_timer_cb (uint64_t time, AvrClass *data); static int wdtcr_toe_clr_cb (uint64_t time, AvrClass *data); WDTCR * wdtcr_new (uint8_t func_mask) { WDTCR *wdtcr; wdtcr = avr_new (WDTCR, 1); wdtcr_construct (wdtcr, func_mask); class_overload_destroy ((AvrClass *)wdtcr, wdtcr_destroy); return wdtcr; } void wdtcr_construct (WDTCR *wdtcr, uint8_t func_mask) { if (wdtcr == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)wdtcr, wdtcr_read, wdtcr_write, wdtcr_reset, vdev_def_AddAddr); wdtcr->func_mask = func_mask; wdtcr_reset ((VDevice *)wdtcr); } void wdtcr_destroy (void *wdtcr) { if (wdtcr == NULL) return; vdev_destroy (wdtcr); } /* * Function wdtcr_update: Called when the WDR instruction is issued */ void wdtcr_update (WDTCR *wdtcr) { wdtcr->last_WDR = get_program_time (); } #if 0 /* This doesn't seem to be used anywhere. */ static int wdtcr_get_bit (WDTCR *reg, int bit) { return !!(reg->wdtcr & reg->func_mask & (1 << bit)); } #endif static void wdtcr_set_bit (WDTCR *reg, int bit, int val) { reg->wdtcr = set_bit_in_byte (reg->wdtcr, bit, val) & reg->func_mask; } static uint8_t wdtcr_read (VDevice *dev, int addr) { WDTCR *reg = (WDTCR *)dev; return (reg->wdtcr & reg->func_mask); } /* * FIXME: Should the wdtcr->toe_clk counter be reset to TOE_CLKS * every time a WDTOE is set 1? I.E. does the hw reset the 4 cycle * counter every time WDTOE is set? This code assumes it does. */ static void wdtcr_write (VDevice *dev, int addr, uint8_t val) { WDTCR *reg = (WDTCR *)dev; uint8_t wd_enabled = (reg->wdtcr & mask_WDE); CallBack *cb; if (reg->func_mask & mask_WDTOE) { /* Device has WDTOE functionality */ if ((reg->wdtcr & mask_WDE) && !(reg->wdtcr & mask_WDTOE)) { /* WDE can _NOT_ be cleared if WDTOE is zero */ val |= mask_WDE; } if (val & mask_WDTOE) { /* program has set WDTOE */ reg->toe_clk = TOE_CLKS; /* create and install the callback if it not already installed */ if (reg->toe_cb == NULL) { cb = callback_new (wdtcr_toe_clr_cb, (AvrClass *)reg); reg->toe_cb = cb; avr_core_clk_cb_add ((AvrCore *)vdev_get_core (dev), cb); } } } reg->wdtcr = (val & reg->func_mask); if ((wd_enabled == 0) && (val & mask_WDE) && (reg->timer_cb == NULL)) { /* install the WD timer callback */ cb = callback_new (wdtcr_timer_cb, (AvrClass *)reg); reg->timer_cb = cb; avr_core_async_cb_add ((AvrCore *)vdev_get_core (dev), cb); } if (wd_enabled && ((val & mask_WDE) == 0) && (reg->timer_cb != NULL)) { /* tell callback to remove itself */ reg->timer_cb = NULL; } } static void wdtcr_reset (VDevice *dev) { WDTCR *wdtcr = (WDTCR *)dev; wdtcr->wdtcr = 0; wdtcr->last_WDR = get_program_time (); /* FIXME: This might not be the right thing to do */ wdtcr->timer_cb = NULL; wdtcr->toe_clk = TOE_CLKS; wdtcr->toe_cb = NULL; } /* * Timer callback will remove itself if wdtcr->timer_cb is set NULL. */ static int wdtcr_timer_cb (uint64_t time, AvrClass *data) { WDTCR *wdtcr = (WDTCR *)data; uint64_t time_diff; uint64_t time_out; if (wdtcr->timer_cb == NULL) return CB_RET_REMOVE; time_diff = time - wdtcr->last_WDR; time_out = TIMEOUT_BASE * (1 << (wdtcr->wdtcr & mask_WDP)); if (time_diff > time_out) { avr_warning ("watchdog reset: time %lld\n", time_diff); /* reset the device, we timed out */ avr_core_irq_raise ((AvrCore *)vdev_get_core ((VDevice *)wdtcr), irq_vect_table_index (RESET)); } return CB_RET_RETAIN; } /* * The WDTOE is cleared by hardware after TOE_CLKS clock cycles. */ static int wdtcr_toe_clr_cb (uint64_t time, AvrClass *data) { WDTCR *wdtcr = (WDTCR *)data; if (wdtcr->toe_cb == NULL) return CB_RET_REMOVE; if (wdtcr->toe_clk > 0) { wdtcr->toe_clk--; } else { wdtcr_set_bit (wdtcr, bit_WDTOE, 0); wdtcr->toe_cb = NULL; /* So we know that cb is not installed */ return CB_RET_REMOVE; } return CB_RET_RETAIN; } /****************************************************************************\ * * RAMPZ(VDevice) : The RAMPZ register used by ELPM and ESPM instructions. * * Even though the rampz register is not available to all devices, we will * install it for all in the simulator. It just so much easier that way and * we're already assuming that the compiler generated the correct code in * many places anyways. Let's see if we get bit. * \****************************************************************************/ static uint8_t rampz_read (VDevice *dev, int addr); static void rampz_write (VDevice *dev, int addr, uint8_t val); static void rampz_reset (VDevice *dev); VDevice * rampz_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)rampz_new (); } RAMPZ * rampz_new (void) { RAMPZ *rampz; rampz = avr_new (RAMPZ, 1); rampz_construct (rampz); class_overload_destroy ((AvrClass *)rampz, rampz_destroy); return rampz; } void rampz_construct (RAMPZ *rampz) { if (rampz == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)rampz, rampz_read, rampz_write, rampz_reset, vdev_def_AddAddr); rampz->reg = 0; } void rampz_destroy (void *rampz) { if (rampz == NULL) return; vdev_destroy (rampz); } uint8_t rampz_get (RAMPZ *rampz) { return rampz->reg; } void rampz_set (RAMPZ *rampz, uint8_t val) { rampz->reg = val; } static uint8_t rampz_read (VDevice *dev, int addr) { return rampz_get ((RAMPZ *)dev); } static void rampz_write (VDevice *dev, int addr, uint8_t val) { rampz_set ((RAMPZ *)dev, val); } static void rampz_reset (VDevice *dev) { display_io_reg (RAMPZ_IO_REG, 0); ((RAMPZ *)dev)->reg = 0; } simulavr-0.1.2.2/src/register.h0000644000175000001440000002216510006124612013213 00000000000000/* * $Id: register.h,v 1.7 2004/01/29 06:34:50 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_REGISTER_H #define SIM_REGISTER_H #include "display.h" /****************************************************************************\ * * SREG(VDevice) : Status Register Definition. * \****************************************************************************/ typedef union _uSREG uSREG; union _uSREG { uint8_t reg; struct { uint8_t C:1; uint8_t Z:1; uint8_t N:1; uint8_t V:1; uint8_t S:1; uint8_t H:1; uint8_t T:1; uint8_t I:1; } bit; }; enum _sreg_bits { SREG_C = 0, SREG_Z = 1, SREG_N = 2, SREG_V = 3, SREG_S = 4, SREG_H = 5, SREG_T = 6, SREG_I = 7 }; enum _sreg_addr_info { SREG_BASE = 0x5f, /* base sreg mem addr */ SREG_SIZE = 1, SREG_IO_REG = SREG_BASE - IO_REG_ADDR_BEGIN, }; typedef struct _SREG SREG; struct _SREG { VDevice parent; uSREG sreg; }; extern VDevice *sreg_create (int addr, char *name, int rel_addr, void *data); extern SREG *sreg_new (void); extern void sreg_construct (SREG *sreg); extern void sreg_destroy (void *sreg); extern inline uint8_t sreg_get (SREG *sreg) { return sreg->sreg.reg; } extern inline void sreg_set (SREG *sreg, uint8_t val) { sreg->sreg.reg = val; display_io_reg (SREG_IO_REG, sreg->sreg.reg); } extern inline uint8_t sreg_get_bit (SREG *sreg, int bit) { return !!(sreg->sreg.reg & (1 << bit)); } extern inline void sreg_set_bit (SREG *sreg, int bit, int val) { sreg->sreg.reg = set_bit_in_byte (sreg->sreg.reg, bit, val); display_io_reg (SREG_IO_REG, sreg->sreg.reg); } /****************************************************************************\ * * GPWR(VDevice) : General Purpose Working Registers Definition * \****************************************************************************/ enum _gpwr_addr_info { GPWR_BASE = 0x00, /* base gpwr mem addr */ GPWR_SIZE = 0x20, }; typedef struct _GPWR GPWR; struct _GPWR { VDevice parent; uint8_t reg[32]; }; extern GPWR *gpwr_new (void); extern void gpwr_construct (GPWR *gpwr); extern void gpwr_destroy (void *gpwr); extern inline uint8_t gpwr_get (GPWR *gpwr, int reg) { #if defined(CHECK_REGISTER_BOUNDS) if ((reg < 0) || (reg >= 0x20)) avr_error ("Invalid register: %d", reg); #endif return gpwr->reg[reg]; } extern inline void gpwr_set (GPWR *gpwr, int reg, uint8_t val) { #if defined(CHECK_REGISTER_BOUNDS) if ((reg < 0) || (reg >= 0x20)) avr_error ("Invalid register: %d", reg); #endif gpwr->reg[reg] = val; display_reg (reg, val); } /****************************************************************************\ * * AnaComp(VDevice) : Analog Comparator Definition * \****************************************************************************/ typedef enum { bit_ACIS0 = 0, /* interrupt mode select bit 0 */ bit_ACIS1 = 1, /* interrupt mode select bit 1 */ bit_ACIC = 2, /* input capture enable */ bit_ACIE = 3, /* interrupt enable */ bit_ACI = 4, /* interrupt flag */ bit_ACO = 5, /* output */ bit_ACD = 7, /* disable */ } ACSR_BITS; typedef enum { mask_ACIS0 = 1 << bit_ACIS0, mask_ACIS1 = 1 << bit_ACIS1, mask_ACIC = 1 << bit_ACIC, mask_ACIE = 1 << bit_ACIE, mask_ACI = 1 << bit_ACI, mask_ACO = 1 << bit_ACO, mask_ACD = 1 << bit_ACD, } ACSR_MASKS; enum _acsr_addr_info { ACSR_BASE = 0x28, /* acsr base mem addr */ ACSR_SIZE = 1, }; typedef struct _ACSR ACSR; struct _ACSR { VDevice parent; uint8_t acsr; /* analog comparator control and status register */ uint8_t func_mask; /* mask of which bits in register are active for device */ }; extern ACSR *acsr_new (uint8_t func_mask); extern void acsr_construct (ACSR *acsr, uint8_t func_mask); extern void acsr_destroy (void *acsr); extern int acsr_get_bit (ACSR *acsr, int bit); extern void acsr_set_bit (ACSR *acsr, int bit, int val); /****************************************************************************\ * * MCUCR(VDevice) : MCU general control register * \****************************************************************************/ typedef enum { bit_ISC00 = 0, /* interrupt sense control 0 bit 0 */ bit_ISC01 = 1, /* interrupt sense control 0 bit 1 */ bit_ISC10 = 2, /* interrupt sense control 1 bit 0 */ bit_ISC11 = 3, /* interrupt sense control 1 bit 1 */ bit_SM = 4, /* sleep mode */ bit_SE = 5, /* sleep enable */ bit_SRW = 6, /* external sram wait state */ bit_SRE = 7, /* external sram enable */ } MCUCR_BITS; typedef enum { mask_ISC00 = 1 << bit_ISC00, mask_ISC01 = 1 << bit_ISC01, mask_ISC10 = 1 << bit_ISC10, mask_ISC11 = 1 << bit_ISC11, mask_SM = 1 << bit_SM, mask_SE = 1 << bit_SE, mask_SRW = 1 << bit_SRW, mask_SRE = 1 << bit_SRE, } MCUCR_MASKS; enum _mcucr_addr_info { MCUCR_BASE = 0x55, /* mcucr base mem addr */ MCUCR_SIZE = 1, }; typedef struct _MCUCR MCUCR; struct _MCUCR { VDevice parent; uint8_t mcucr; /* MCU control register */ uint8_t func_mask; /* mask of which bits in register are active for device */ }; extern MCUCR *mcucr_new (uint8_t func_mask); extern void mcucr_construct (MCUCR *mcucr, uint8_t func_mask); extern void mcucr_destroy (void *mcucr); extern int mcucr_get_bit (MCUCR *mcucr, int bit); extern void mcucr_set_bit (MCUCR *mcucr, int bit, int val); /****************************************************************************\ * * WDTCR(VDevice) : watch dog timer control register * \****************************************************************************/ typedef enum { bit_WDP0 = 0, /* prescaler bit 0 */ bit_WDP1 = 1, /* prescaler bit 1 */ bit_WDP2 = 2, /* prescaler bit 2 */ bit_WDE = 3, /* watchdog enable */ bit_WDTOE = 4, /* turn-off enable */ } WDTCR_BITS; typedef enum { mask_WDP0 = 1 << bit_WDP0, mask_WDP1 = 1 << bit_WDP1, mask_WDP2 = 1 << bit_WDP2, mask_WDE = 1 << bit_WDE, mask_WDTOE = 1 << bit_WDTOE, mask_WDP = (mask_WDP2 | mask_WDP1 | mask_WDP0), } WDTCR_MASKS; enum _wdtcr_addr_info { WDTCR_BASE = 0x41, /* wdtcr base mem addr */ WDTCR_SIZE = 1, }; enum _wdtcr_constants { TIMEOUT_BASE = 30, /* about 30 ms for the base timeout before prescaling */ TOE_CLKS = 4, /* WDTOE is cleared by HW 4 cycles after be set */ }; typedef struct _WDTCR WDTCR; struct _WDTCR { VDevice parent; uint8_t wdtcr; uint8_t func_mask; uint64_t last_WDR; int toe_clk; CallBack *timer_cb; CallBack *toe_cb; }; extern WDTCR *wdtcr_new (uint8_t func_mask); extern void wdtcr_construct (WDTCR *wdtcr, uint8_t func_mask); extern void wdtcr_destroy (void *wdtcr); extern void wdtcr_update (WDTCR *wdtcr); /****************************************************************************\ * * RAMPZ(VDevice) : The RAMPZ register used by ELPM and ESPM instructions. * \****************************************************************************/ enum _rampz_addr_info { RAMPZ_BASE = 0x5b, /* base rampz mem addr */ RAMPZ_SIZE = 0x01, RAMPZ_IO_REG = RAMPZ_BASE - IO_REG_ADDR_BEGIN, }; typedef struct _RAMPZ RAMPZ; struct _RAMPZ { VDevice parent; uint8_t reg; }; extern VDevice *rampz_create (int addr, char *name, int rel_addr, void *data); extern RAMPZ *rampz_new (void); extern void rampz_construct (RAMPZ *rampz); extern void rampz_destroy (void *rampz); extern uint8_t rampz_get (RAMPZ *rampz); extern void rampz_set (RAMPZ *rampz, uint8_t val); #endif /* SIM_REGISTER_H */ simulavr-0.1.2.2/src/sig.c0000644000175000001440000000716407762602570012171 00000000000000/* * $Id: sig.c,v 1.6 2003/12/01 09:10:16 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file sig.c * \brief Public interface to signal handlers. * * This module provides a way for the simulator to process signals generated * by the native host system. Note that these signals in this context have * nothing to do with signals or interrupts as far as a program running in the * simulator is concerned. */ #include #include #include #include #include #include #include "avrerror.h" #include "sig.h" static volatile int global_got_sigint = 0; /* * Private. * * Handler for SIGINT signals. */ static void signal_handle_sigint (int signo) { global_got_sigint = 1; } /** * \brief Start watching for the occurrance of the given signal. * * This function will install a signal handler which will set a flag when the * signal occurs. Once the watch has been started, periodically call * signal_has_occurred() to check if the signal was raised. */ void signal_watch_start (int signo) { struct sigaction act, oact; sigemptyset (&act.sa_mask); act.sa_flags = 0; switch (signo) { case SIGINT: global_got_sigint = 0; act.sa_handler = signal_handle_sigint; break; default: avr_warning ("Invalid signal: %d\n", signo); return; } if (sigaction (signo, &act, &oact) < 0) avr_warning ("Failed to install signal handler: sig=%d: %s\n", signo, strerror (errno)); } /** * \brief Stop watching signal. * * Restores the default signal handler for the given signal and resets the * signal flag. */ void signal_watch_stop (int signo) { struct sigaction act, oact; sigemptyset (&act.sa_mask); act.sa_flags = 0; act.sa_handler = SIG_DFL; signal_reset (signo); if (sigaction (signo, &act, &oact) < 0) avr_warning ("Failed to restore default signal handler: sig=%d: %s\n", signo, strerror (errno)); } /** * \brief Check to see if a signal has occurred. * * \return Non-zero if signal has occurred. The flag will always be reset * automatically. */ int signal_has_occurred (int signo) { int res = 0; switch (signo) { case SIGINT: res = global_got_sigint; global_got_sigint = 0; break; default: avr_warning ("Invalid signal: %d", signo); } return res; } /** * \brief Clear the flag which indicates that a signal has ocurred. * * Use signal_reset to manually reset (i.e. clear) the flag. */ void signal_reset (int signo) { signal_has_occurred (signo); } simulavr-0.1.2.2/src/sig.h0000644000175000001440000000242307762567532012177 00000000000000/* * $Id: sig.h,v 1.5 2003/12/01 07:35:54 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_SIGNAL_H #define SIM_SIGNAL_H extern void signal_watch_start (int signo); extern void signal_watch_stop (int signo); extern int signal_has_occurred (int signo); extern void signal_reset (int signo); #endif /* SIM_SIGNAL_H */ simulavr-0.1.2.2/src/spi.c0000644000175000001440000002754710024663466012205 00000000000000/* * $Id: spi.c,v 1.5 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003, 2004 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file spi.c * \brief Module to simulate the AVR's SPI module. * */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "spi.h" #include "avrcore.h" #include "intvects.h" /****************************************************************************\ * * SPI Interrupts * \****************************************************************************/ static void spii_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t spi_intr_read (VDevice *dev, int addr); static void spi_intr_write (VDevice *dev, int addr, uint8_t val); static void spi_intr_reset (VDevice *dev); static int spi_intr_cb (uint64_t time, AvrClass *data); /** \brief Allocate a new SPI interrupt */ VDevice * spii_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)spi_intr_new (addr, name); } SPIIntr_T * spi_intr_new (int addr, char *name) { SPIIntr_T *spi; spi = avr_new (SPIIntr_T, 1); spi_intr_construct (spi, addr, name); class_overload_destroy ((AvrClass *)spi, spi_intr_destroy); return spi; } /** \brief Constructor for spi interrupt object. */ void spi_intr_construct (SPIIntr_T *spi, int addr, char *name) { if (spi == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)spi, spi_intr_read, spi_intr_write, spi_intr_reset, spii_add_addr); spii_add_addr ((VDevice *)spi, addr, name, 0, NULL); spi_intr_reset ((VDevice *)spi); } static void spii_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { SPIIntr_T *spi = (SPIIntr_T *)vdev; if (strncmp ("SPCR", name, 4) == 0) { spi->spcr_addr = addr; } else if (strncmp ("SPSR", name, 4) == 0) { spi->spsr_addr = addr; } else { avr_error ("invalid ADC register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for spi interrupt object. */ void spi_intr_destroy (void *spi) { if (spi == NULL) return; vdev_destroy (spi); } static uint8_t spi_intr_read (VDevice *dev, int addr) { SPIIntr_T *spi = (SPIIntr_T *)dev; if (addr == spi->spcr_addr) { return (spi->spcr); } else if (addr == spi->spsr_addr) { if (spi->spsr & mask_SPIF) spi->spsr_read |= mask_SPIF; if (spi->spsr & mask_WCOL) spi->spsr_read |= mask_WCOL; return (spi->spsr); } else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void spi_intr_write (VDevice *dev, int addr, uint8_t val) { SPIIntr_T *spi = (SPIIntr_T *)dev; CallBack *cb; if (addr == spi->spcr_addr) { spi->spcr = val; if (spi->spcr & mask_SPE) { /* we need to install the intr_cb function */ cb = callback_new (spi_intr_cb, (AvrClass *)spi); spi->intr_cb = cb; avr_core_async_cb_add ((AvrCore *)vdev_get_core (dev), cb); } else { spi->intr_cb = NULL; /* no interrupt are enabled, remove the callback */ } } else { avr_error ("Bad address: 0x%04x", addr); } } static void spi_intr_reset (VDevice *dev) { SPIIntr_T *spi = (SPIIntr_T *)dev; spi->intr_cb = NULL; spi->spcr = 0; spi->spsr = 0; spi->spsr_read = 0; } static int spi_intr_cb (uint64_t time, AvrClass *data) { SPIIntr_T *spi = (SPIIntr_T *)data; if (spi->intr_cb == NULL) return CB_RET_REMOVE; if ((spi->spcr & mask_SPE) && (spi->spcr & mask_SPIE) && (spi->spsr & mask_SPIF)) { /* an enabled interrupt occured */ AvrCore *core = (AvrCore *)vdev_get_core ((VDevice *)spi); avr_core_irq_raise (core, irq_vect_table_index (SPI_STC)); spi->spsr &= ~mask_SPIF; spi->spsr = 0; } return CB_RET_RETAIN; } /****************************************************************************\ * * SPI * \****************************************************************************/ static void spi_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t spi_read (VDevice *dev, int addr); static void spi_write (VDevice *dev, int addr, uint8_t val); static void spi_reset (VDevice *dev); static int spi_clk_incr_cb (uint64_t ck, AvrClass *data); /** \brief Allocate a new SPI structure. */ VDevice * spi_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)spi_new (addr, name, rel_addr); } SPI_T * spi_new (int addr, char *name, int rel_addr) { SPI_T *spi; spi = avr_new (SPI_T, 1); spi_construct (spi, addr, name, rel_addr); class_overload_destroy ((AvrClass *)spi, spi_destroy); return spi; } /** \brief Constructor for SPI object. */ void spi_construct (SPI_T *spi, int addr, char *name, int rel_addr) { if (spi == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)spi, spi_read, spi_write, spi_reset, spi_add_addr); spi_add_addr ((VDevice *)spi, addr, name, 0, NULL); if (rel_addr) spi->rel_addr = rel_addr; spi_reset ((VDevice *)spi); } static void spi_add_addr (VDevice *vdev, int addr, char *name, int ref_addr, void *data) { SPI_T *spi = (SPI_T *)vdev; if (strncmp ("SPDR", name, 4) == 0) { spi->spdr_addr = addr; } else { avr_error ("invalid SPI register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for SPI object. */ void spi_destroy (void *spi) { if (spi == NULL) return; vdev_destroy (spi); } static uint8_t spi_read (VDevice *dev, int addr) { SPI_T *spi = (SPI_T *)dev; SPIIntr_T *spi_ti; spi_ti = (SPIIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) spi), spi->rel_addr); if (addr == spi->spdr_addr) { if (spi_ti->spsr_read) { spi_ti->spsr &= ~spi_ti->spsr_read; spi_ti->spsr_read = 0; } return spi->spdr; } else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void spi_write (VDevice *dev, int addr, uint8_t val) { SPI_T *spi = (SPI_T *)dev; CallBack *cb; SPIIntr_T *spi_ti; spi_ti = (SPIIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) spi), spi->rel_addr); if (addr == spi->spdr_addr) { if (spi_ti->spsr_read) { spi_ti->spsr &= ~spi_ti->spsr_read; spi_ti->spsr_read = 0; } if (spi->tcnt != 0) { spi_ti->spsr |= mask_WCOL; } spi->spdr = val; /* When the user writes to SPDR, a callback is installed for either clock generated increments or externally generated increments. The two incrememtor callback are mutally exclusive, only one or the other can be installed at any given instant. */ switch ((spi_ti->spcr) & (mask_SPR0 | mask_SPR1)) { case SPI_CK_4: spi->divisor = 4; break; case SPI_CK_16: spi->divisor = 16; break; case SPI_CK_64: spi->divisor = 64; break; case SPI_CK_128: spi->divisor = 128; break; default: avr_error ("The impossible happened!"); } /* install the clock incrementor callback (with flair!) */ if (spi->clk_cb == NULL) { cb = callback_new (spi_clk_incr_cb, (AvrClass *)spi); spi->clk_cb = cb; avr_core_clk_cb_add ((AvrCore *)vdev_get_core ((VDevice *)spi), cb); } spi->tcnt = 8; /* set up timer for 8 clocks */ spi->spdr_in = spi_port_rd (addr); } else { avr_error ("Bad address: 0x%04x", addr); } } static void spi_reset (VDevice *dev) { SPI_T *spi = (SPI_T *)dev; spi->clk_cb = NULL; spi->spdr = 0; spi->tcnt = 0; spi->divisor = 0; } static int spi_clk_incr_cb (uint64_t ck, AvrClass *data) { SPI_T *spi = (SPI_T *)data; uint8_t last = spi->tcnt; SPIIntr_T *spi_ti; spi_ti = (SPIIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) spi), spi->rel_addr); if (spi->clk_cb == NULL) return CB_RET_REMOVE; if (spi->divisor <= 0) avr_error ("Bad divisor value: %d", spi->divisor); /* Decrement clock if ck is a mutliple of divisor. Since divisor is always a power of 2, it's much faster to do the bitwise AND instead of using the integer modulus operator (%). */ spi->tcnt -= ((ck & (spi->divisor - 1)) == 0); if (spi->tcnt != last) /* we've changed the counter */ { if (spi->tcnt == 0) { spi_ti->spsr |= mask_SPIF; /* spdr is not guaranteed until operation complete */ spi_port_wr (spi->spdr); /* tell what we wrote */ spi->spdr = spi->spdr_in; /* update spdr to what we read */ spi->clk_cb = NULL; return CB_RET_REMOVE; } } return CB_RET_RETAIN; } /* FIXME: TRoth/2003-11-28: These will eventually need to be plugged into an external connection interface. */ uint8_t spi_port_rd (int addr) { int data; char line[80]; while (1) { fprintf (stderr, "\nEnter a byte of hex data to read into the SPI at" " address 0x%04x: ", addr); /* try to read in a line of input */ if (fgets (line, sizeof (line), stdin) == NULL) continue; /* try to parse the line for a byte of data */ if (sscanf (line, "%x\n", &data) != 1) continue; break; } return (uint8_t) (data & 0xff); } void spi_port_wr (uint8_t val) { fprintf (stderr, "wrote 0x%02x to SPI\n", val); } simulavr-0.1.2.2/src/spi.h0000644000175000001440000001137210024663466012177 00000000000000/* * $Id: spi.h,v 1.4 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SPI_H #define SPI_H /****************************************************************************\ * * SPIInter_T(VDevice) : SPI Interrupt and Control Register * \****************************************************************************/ enum _spi_intr_constants { SPI_INTR_BASE = 0x2d, /* base address for vdev */ SPI_INTR_SIZE = 2, /* SPCR, SPSR */ SPI_INTR_SPCR_ADDR = 0, SPI_INTR_SPSR_ADDR = 1, }; typedef enum { bit_SPR0 = 0, /* Clock Rate Select 0 */ bit_SPR1 = 1, /* Clock Rate Select 1 */ bit_CPHA = 2, /* Clock Phase */ bit_CPOL = 3, /* Clock Polarity */ bit_MSTR = 4, /* Master / Slave Select */ bit_DORD = 5, /* Data Order */ bit_SPE = 6, /* SPI Enable */ bit_SPIE = 7, /* SPI Interrupt Enable */ } SPCR_BITS; typedef enum { mask_SPR0 = 1 << bit_SPR0, mask_SPR1 = 1 << bit_SPR1, mask_SPE = 1 << bit_SPE, mask_SPIE = 1 << bit_SPIE, } SPCR_MASKS; typedef enum { bit_WCOL = 6, /* Write Collision flag */ bit_SPIF = 7, /* SPI Interrupt flag */ } SPSR_BITS; typedef enum { mask_WCOL = 1 << bit_WCOL, mask_SPIF = 1 << bit_SPIF, } SPSR_MASKS; /* FIXME: Combine this with SPI_T. */ typedef struct _SPIIntr_T SPIIntr_T; struct _SPIIntr_T { VDevice parent; uint16_t spcr_addr; uint8_t spcr; /* SPI Interrupt and control mask register */ uint16_t spsr_addr; uint8_t spsr; /* SPI Interrupt and Write Coll flag register */ uint8_t spsr_read; /* SPCR read occured with SPIF set */ CallBack *intr_cb; /* callback for checking and raising interrupts */ }; extern VDevice *spii_create (int addr, char *name, int rel_addr, void *data); extern SPIIntr_T *spi_intr_new (int addr, char *name); extern void spi_intr_construct (SPIIntr_T *ti, int addr, char *name); extern void spi_intr_destroy (void *ti); /****************************************************************************\ * * General SPI bits and masks. * \****************************************************************************/ enum _spi_cs_constants { SPI_CK_4 = 0x00, /* CK/4 */ SPI_CK_16 = 0x01, /* CK/16 */ SPI_CK_64 = 0x02, /* CK/64 */ SPI_CK_128 = 0x03, /* CK/128 */ }; /****************************************************************************\ * * SPI(VDevice) : SPI * \****************************************************************************/ enum _spi_constants { SPI_BASE = 0x2f, /* base memory address */ SPI_SIZE = 1, /* SPDR */ SPI_SPDR_ADDR = 0, /* offset from base to SPDR Register */ }; typedef struct _SPI SPI_T; struct _SPI { VDevice parent; uint16_t spdr_addr; uint16_t rel_addr; /* interrupt address */ uint8_t spdr; /* data register */ uint8_t spdr_in; /* new data register */ uint8_t tcnt; /* SPI timer up-counter register */ uint8_t divisor; /* clock divisor */ CallBack *clk_cb; /* incr timer tied to clock */ }; extern VDevice *spi_create (int addr, char *name, int rel_addr, void *data); extern SPI_T *spi_new (int addr, char *name, int rel_addr); extern void spi_construct (SPI_T *spi, int addr, char *name, int rel_addr); extern void spi_destroy (void *spi); extern void spi_intr_set_flag (SPIIntr_T *ti); extern void spi_intr_clear_flag (SPIIntr_T *ti); extern uint8_t spi_port_rd (int addr); extern void spi_port_wr (uint8_t val); #endif simulavr-0.1.2.2/src/sram.c0000644000175000001440000000552210006401504012320 00000000000000/* * $Id: sram.c,v 1.10 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "display.h" static uint8_t sram_read (VDevice *dev, int addr); static void sram_write (VDevice *dev, int addr, uint8_t val); static void sram_reset (VDevice *dev); SRAM * sram_new (int base, int size) { SRAM *sram; sram = avr_new (SRAM, 1); sram_construct (sram, base, size); class_overload_destroy ((AvrClass *)sram, sram_destroy); return sram; } void sram_construct (SRAM *sram, int base, int size) { if (sram == NULL) avr_error ("passed null ptr"); sram->stor = storage_new (base, size); vdev_construct ((VDevice *)sram, sram_read, sram_write, sram_reset, vdev_def_AddAddr); } void sram_destroy (void *sram) { SRAM *_sram = (SRAM *)sram; if (sram == NULL) return; class_unref ((AvrClass *)_sram->stor); vdev_destroy (sram); } int sram_get_size (SRAM *sram) { return storage_get_size (sram->stor); } int sram_get_base (SRAM *sram) { return storage_get_base (sram->stor); } static uint8_t sram_read (VDevice *dev, int addr) { SRAM *sram = (SRAM *)dev; return storage_readb (sram->stor, addr); } static void sram_write (VDevice *dev, int addr, uint8_t val) { SRAM *sram = (SRAM *)dev; display_sram (addr, 1, &val); storage_writeb (sram->stor, addr, val); } static void sram_reset (VDevice *dev) { return; /* FIXME: should the array be cleared? */ } simulavr-0.1.2.2/src/sram.h0000644000175000001440000000332107762567532012355 00000000000000/* * $Id: sram.h,v 1.6 2003/12/01 07:35:54 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_SRAM_H #define SIM_SRAM_H /****************************************************************************\ * * SRAM(VDevice) Definition * \****************************************************************************/ enum _sram_addr_info { SRAM_BASE = 0x60, /* base sram mem addr */ SRAM_EXTENDED_IO_BASE = 0x100, }; typedef struct _SRAM SRAM; struct _SRAM { VDevice parent; Storage *stor; }; extern SRAM *sram_new (int base, int size); extern void sram_construct (SRAM *sram, int base, int size); extern void sram_destroy (void *sram); extern int sram_get_size (SRAM *sram); extern int sram_get_base (SRAM *sram); #endif /* SIM_SRAM_H */ simulavr-0.1.2.2/src/stack.c0000644000175000001440000002633710006401504012472 00000000000000/* * $Id: stack.c,v 1.15 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** \file stack.c \brief Module for the definition of the stack. Defines the classes stack, hw_stack, and mem_stack. FIXME: Ted, I would really really really love to put in a description of what is the difference between these three classes and how they're used, but I don't understand it myself. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "display.h" static uint32_t hw_pop (Stack *stack, int bytes); static void hw_push (Stack *stack, int bytes, uint32_t val); static uint32_t mem_pop (Stack *stack, int bytes); static void mem_push (Stack *stack, int bytes, uint32_t val); /****************************************************************************\ * * Stack(AvrClass) Definition. * \****************************************************************************/ /** \brief Allocates memory for a new Stack object This is a virtual method for higher level stack implementations and as such should not be used directly. */ Stack * stack_new (StackFP_Pop pop, StackFP_Push push) { Stack *st; st = avr_new (Stack, 1); stack_construct (st, pop, push); class_overload_destroy ((AvrClass *)st, stack_destroy); return st; } /** \brief Constructor for the Stack class. This is a virtual method for higher level stack implementations and as such should not be used directly. */ void stack_construct (Stack *stack, StackFP_Pop pop, StackFP_Push push) { if (stack == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)stack); stack->pop = pop; stack->push = push; } /** \brief Destructor for the Stack class. This is a virtual method for higher level stack implementations and as such should not be used directly. */ void stack_destroy (void *stack) { if (stack == NULL) return; class_destroy (stack); } /** \brief Pops a byte or a word off the stack and returns it. \param stack A pointer to the Stack object from which to pop \param bytes Number of bytes to pop off the stack (1 to 4 bytes). \return The 1 to 4 bytes value popped from the stack. This method provides access to the derived class's pop() method. */ uint32_t stack_pop (Stack *stack, int bytes) { return stack->pop (stack, bytes); } /** \brief Pushes a byte or a word of data onto the stack. \param stack A pointer to the Stack object from which to pop. \param bytes Size of the value being pushed onto the stack (1 to 4 bytes). \param val The value to be pushed. This method provides access to the derived class's push() method. */ void stack_push (Stack *stack, int bytes, uint32_t val) { stack->push (stack, bytes, val); } /****************************************************************************\ * * HWStack(Stack) Definition. * \****************************************************************************/ /** \brief Allocate a new HWStack object This is the stack implementation used by devices which lack SRAM and only have a fixed size hardware stack (e.i., the at90s1200) */ HWStack * hwstack_new (int depth) { HWStack *st; st = avr_new (HWStack, 1); hwstack_construct (st, depth); class_overload_destroy ((AvrClass *)st, hwstack_destroy); return st; } /** \brief Constructor for HWStack object */ void hwstack_construct (HWStack *stack, int depth) { if (stack == NULL) avr_error ("passed null ptr"); stack_construct ((Stack *)stack, hw_pop, hw_push); stack->depth = depth; stack->stack = avr_new0 (uint32_t, depth); } /** \brief Destructor for HWStack object */ void hwstack_destroy (void *stack) { if (stack == NULL) return; avr_free (((HWStack *)stack)->stack); stack_destroy (stack); } /* The HWStack pop method. */ static uint32_t hw_pop (Stack *stack, int bytes) { HWStack *hwst = (HWStack *)stack; int i; uint32_t val = hwst->stack[0]; for (i = 0; i < (hwst->depth - 1); i++) { hwst->stack[i] = hwst->stack[i + 1]; } return val; } /* The HWStack push method. */ static void hw_push (Stack *stack, int bytes, uint32_t val) { HWStack *hwst = (HWStack *)stack; int i; for (i = (hwst->depth - 1); i; i--) { hwst->stack[i - 1] = hwst->stack[i]; } hwst->stack[0] = val; } /****************************************************************************\ * * StackPointer(VDevice) Definition. * \****************************************************************************/ #ifndef DOXYGEN /* don't expose to doxygen */ typedef struct _StackPointer StackPointer; struct _StackPointer { VDevice parent; uint16_t SPL_addr; /* Since some devices don't have a SPH, we only track SPL address and assume the SPH address is SPL_addr + 1. */ uint8_t SPL; /* Low byte of stack pointer */ uint8_t SPH; /* High byte of stack pointer */ }; #endif static StackPointer *sp_new (int addr, char *name); static void sp_construct (StackPointer *sp, int addr, char *name); static void sp_destroy (void *sp); static uint8_t sp_read (VDevice *dev, int addr); static void sp_write (VDevice *dev, int addr, uint8_t val); static void sp_reset (VDevice *dev); static uint16_t sp_get (VDevice *sp); static void sp_set (VDevice *sp, uint16_t val); static void sp_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); /** \brief Create the Stack Pointer VDevice. This should only be used in the DevSuppDefn io reg init structure. */ VDevice * sp_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)sp_new (addr, name); } static StackPointer * sp_new (int addr, char *name) { StackPointer *sp; sp = avr_new (StackPointer, 1); sp_construct (sp, addr, name); class_overload_destroy ((AvrClass *)sp, sp_destroy); return sp; } static void sp_construct (StackPointer *sp, int addr, char *name) { if (sp == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)sp, sp_read, sp_write, sp_reset, sp_add_addr); sp_add_addr ((VDevice *)sp, addr, name, 0, NULL); sp_reset ((VDevice *)sp); } static void sp_destroy (void *sp) { if (sp == NULL) return; vdev_destroy (sp); } static uint8_t sp_read (VDevice *dev, int addr) { StackPointer *sp = (StackPointer *)dev; if (addr == sp->SPL_addr) return sp->SPL; else if (addr == (sp->SPL_addr + 1)) return sp->SPH; else avr_error ("Bad address: 0x%04x", addr); return 0; } static void sp_write (VDevice *dev, int addr, uint8_t val) { /* Don't need display_io_reg() here since it's called higher up in mem chain. */ StackPointer *sp = (StackPointer *)dev; if (addr == sp->SPL_addr) sp->SPL = val; else if (addr == (sp->SPL_addr + 1)) sp->SPH = val; else avr_error ("Bad address: 0x%04x", addr); } static void sp_reset (VDevice *dev) { StackPointer *sp = (StackPointer *)dev; display_io_reg (SPL_IO_REG, sp->SPL = 0); display_io_reg (SPH_IO_REG, sp->SPH = 0); } static uint16_t sp_get (VDevice *sp) { return (((StackPointer *)sp)->SPH << 8) + ((StackPointer *)sp)->SPL; } static void sp_set (VDevice *sp, uint16_t val) { display_io_reg (SPL_IO_REG, ((StackPointer *)sp)->SPL = val & 0xff); display_io_reg (SPH_IO_REG, ((StackPointer *)sp)->SPH = val >> 8); } static void sp_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { StackPointer *sp = (StackPointer *)vdev; if (strncmp ("SPL", name, 3) == 0) sp->SPL_addr = addr; else if (strncmp ("SPH", name, 3) == 0) ; else avr_error ("Bad address: 0x%04x", addr); } /****************************************************************************\ * * MemStack(Stack) Definition. * \****************************************************************************/ /** \brief Allocate a new MemStack object */ MemStack * memstack_new (Memory *mem, int spl_addr) { MemStack *st; st = avr_new (MemStack, 1); memstack_construct (st, mem, spl_addr); class_overload_destroy ((AvrClass *)st, memstack_destroy); return st; } /** \brief Constructor for MemStack object */ void memstack_construct (MemStack *stack, Memory *mem, int spl_addr) { if (stack == NULL) avr_error ("passed null ptr"); stack_construct ((Stack *)stack, mem_pop, mem_push); class_ref ((AvrClass *)mem); stack->mem = mem; stack->SP = mem_get_vdevice_by_addr (mem, spl_addr); if (stack->SP == NULL) { avr_error ("attempt to attach non-extistant SPL register"); } class_ref ((AvrClass *)stack->SP); } /** \brief Destructor for MemStack object */ void memstack_destroy (void *stack) { MemStack *_stack = (MemStack *)stack; if (stack == NULL) return; class_unref ((AvrClass *)_stack->SP); class_unref ((AvrClass *)_stack->mem); stack_destroy (stack); } /* The MemStack pop method */ static uint32_t mem_pop (Stack *stack, int bytes) { MemStack *mst = (MemStack *)stack; int i; uint32_t val = 0; uint16_t sp = sp_get (mst->SP); if ((bytes < 0) || (bytes >= sizeof (uint32_t))) avr_error ("bytes out of bounds: %d", bytes); for (i = bytes - 1; i >= 0; i--) { sp++; val |= (mem_read (mst->mem, sp) << (i * 8)); } sp_set (mst->SP, sp); return val; } /* The MemStack push method. */ static void mem_push (Stack *stack, int bytes, uint32_t val) { MemStack *mst = (MemStack *)stack; int i; uint16_t sp = sp_get (mst->SP); if ((bytes < 0) || (bytes >= sizeof (uint32_t))) avr_error ("bytes out of bounds: %d", bytes); for (i = 0; i < bytes; i++) { mem_write (mst->mem, sp, val & 0xff); val >>= 8; sp--; } sp_set (mst->SP, sp); } simulavr-0.1.2.2/src/stack.h0000644000175000001440000000673210006401504012474 00000000000000/* * $Id: stack.h,v 1.6 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_STACK_H #define SIM_STACK_H /****************************************************************************\ * * Stack(AvrClass) Definition. * * This is a virtual class for higher level stack implementations and as such * should not be used directly. * \****************************************************************************/ typedef struct _Stack Stack; typedef uint32_t (*StackFP_Pop) (Stack *stack, int bytes); typedef void (*StackFP_Push) (Stack *stack, int bytes, uint32_t val); typedef enum { STACK_HARDWARE, STACK_MEMORY, } StackType; struct _Stack { AvrClass parent; StackFP_Pop pop; StackFP_Push push; }; extern Stack *stack_new (StackFP_Pop pop, StackFP_Push push); extern void stack_construct (Stack *stack, StackFP_Pop pop, StackFP_Push push); extern void stack_destroy (void *stack); extern uint32_t stack_pop (Stack *stack, int bytes); extern void stack_push (Stack *stack, int bytes, uint32_t val); /****************************************************************************\ * * HWStack(Stack) Definition. * \****************************************************************************/ typedef struct _Hardware_Stack HWStack; struct _Hardware_Stack { Stack parent; int depth; uint32_t *stack; /* an array used as the stack */ }; extern HWStack *hwstack_new (int depth); extern void hwstack_construct (HWStack *stack, int depth); extern void hwstack_destroy (void *stack); /****************************************************************************\ * * MemStack(Stack) Definition. * \****************************************************************************/ typedef struct _Memory_Stack MemStack; enum _stack_point_constants { STACK_POINTER_BASE = 0x5d, STACK_POINTER_SIZE = 2, SPL_ADDR = STACK_POINTER_BASE, SPH_ADDR = STACK_POINTER_BASE + 1, SPL_IO_REG = SPL_ADDR - IO_REG_ADDR_BEGIN, SPH_IO_REG = SPH_ADDR - IO_REG_ADDR_BEGIN, }; struct _Memory_Stack { Stack parent; Memory *mem; /* Memory were the stack will live */ VDevice *SP; /* Virtual Device for the stack pointer */ }; extern MemStack *memstack_new (Memory *mem, int spl_addr); extern void memstack_construct (MemStack *stack, Memory *mem, int spl_addr); extern void memstack_destroy (void *stack); extern VDevice *sp_create (int addr, char *name, int rel_addr, void *data); #endif /* SIM_STACK_H */ simulavr-0.1.2.2/src/storage.c0000644000175000001440000000603307763046134013044 00000000000000/* * $Id: storage.c,v 1.8 2003/12/02 08:25:00 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "storage.h" /***************************************************************************\ * * Storage(AvrClass) Methods * \***************************************************************************/ Storage * storage_new (int base, int size) { Storage *stor; stor = avr_new (Storage, 1); storage_construct (stor, base, size); class_overload_destroy ((AvrClass *)stor, storage_destroy); return stor; } void storage_construct (Storage *stor, int base, int size) { if (stor == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)stor); stor->base = base; /* address */ stor->size = size; /* bytes */ stor->data = avr_new0 (uint8_t, size); } /* * Not to be called directly, except by a derived class. * Called via class_unref. */ void storage_destroy (void *stor) { if (stor == NULL) return; avr_free (((Storage *)stor)->data); class_destroy (stor); } extern inline uint8_t storage_readb (Storage *stor, int addr); extern inline uint16_t storage_readw (Storage *stor, int addr); void storage_writeb (Storage *stor, int addr, uint8_t val) { int _addr = addr - stor->base; if (stor == NULL) avr_error ("passed null ptr"); if ((_addr < 0) || (_addr >= stor->size)) avr_error ("address out of bounds: 0x%x", addr); stor->data[_addr] = val; } void storage_writew (Storage *stor, int addr, uint16_t val) { int _addr = addr - stor->base; if (stor == NULL) avr_error ("passed null ptr"); if ((_addr < 0) || (_addr >= stor->size)) avr_error ("address out of bounds: 0x%x", addr); stor->data[_addr] = (uint8_t) (val >> 8 & 0xff); stor->data[_addr + 1] = (uint8_t) (val & 0xff); } int storage_get_size (Storage *stor) { return stor->size; } int storage_get_base (Storage *stor) { return stor->base; } simulavr-0.1.2.2/src/storage.h0000644000175000001440000000504307763046134013051 00000000000000/* * $Id: storage.h,v 1.6 2003/12/02 08:25:00 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_STORAGE_H #define SIM_STORAGE_H /***************************************************************************\ * * Storage(AvrClass) Object * \***************************************************************************/ typedef struct _Storage Storage; struct _Storage { AvrClass parent; int base; /* address */ int size; /* bytes */ uint8_t *data; }; extern Storage *storage_new (int base, int size); extern void storage_construct (Storage *stor, int base, int size); extern void storage_destroy (void *stor); extern inline uint8_t storage_readb (Storage *stor, int addr) { int _addr = addr - stor->base; if (stor == NULL) avr_error ("passed null ptr"); if ((_addr < 0) || (_addr >= stor->size)) avr_error ("address out of bounds: 0x%x", addr); return stor->data[_addr]; } extern inline uint16_t storage_readw (Storage *stor, int addr) { int _addr = addr - stor->base; uint8_t bl, bh; if (stor == NULL) avr_error ("passed null ptr"); if ((_addr < 0) || (_addr >= stor->size)) avr_error ("address out of bounds: 0x%x", addr); bh = stor->data[_addr]; bl = stor->data[_addr + 1]; return (uint16_t) ((bh << 8) | bl); } extern void storage_writeb (Storage *stor, int addr, uint8_t val); extern void storage_writew (Storage *stor, int addr, uint16_t val); extern int storage_get_size (Storage *stor); extern int storage_get_base (Storage *stor); #endif /* SIM_STORAGE_H */ simulavr-0.1.2.2/src/timers.c0000644000175000001440000006203210024663466012701 00000000000000/* * $Id: timers.c,v 1.15 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file timers.c * \brief Module to simulate the AVR's on-board timer/counters. * * This currently only implements the timer/counter 0. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "avrcore.h" #include "intvects.h" #ifndef DOXYGEN /* *INDENT-OFF* */ Timer16Def global_timer16_defs[] = { { .timer_name = "Timer1", .tcnth_name = "TCNT1H", .tcntl_name = "TCNT1L", .tccra_name = "TCCR1A", .tccrb_name = "TCCR1B", .base = 0x4c, .tof = bit_TOV1, .ocf_a = bit_OCF1A, .ocf_b = bit_OCF1B, .ocf_c = 8 } }; OCReg16Def global_ocreg16_defs[] = { { .ocrdev_name = "OCR1A", .ocrl_name = "OCR1AL", .ocrh_name = "OCR1AH", .base = 0x4a }, { .ocrdev_name = "OCR1B", .ocrl_name = "OCR1BL", .ocrh_name = "OCR1BH", .base = 0x48 }, { .ocrdev_name = "OCR1C", .ocrl_name = "OCR1CL", .ocrh_name = "OCR1CH", .base = 0x78}, { .ocrdev_name = "OCR3A", .ocrl_name = "OCR3AL", .ocrh_name = "OCR3A", .base = 0x86 }, { .ocrdev_name = "OCR3B", .ocrl_name = "OCR3BL", .ocrh_name = "OCR3BH", .base = 0x84 }, { .ocrdev_name = "OCR3C", .ocrl_name = "OCR3CL", .ocrh_name = "OCR3CH", .base = 0x82 } }; /* *INDENT-ON* */ #endif /* not DOXYGEN */ /****************************************************************************\ * * Timer/Counter 0 * \****************************************************************************/ static void timer_iadd_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t timer_intr_read (VDevice *dev, int addr); static void timer_intr_write (VDevice *dev, int addr, uint8_t val); static void timer_intr_reset (VDevice *dev); static int timer_intr_cb (uint64_t time, AvrClass *data); /** \brief Allocate a new timer interrupt */ VDevice * timer_int_create (int addr, char *name, int rel_addr, void *data) { uint8_t *func_mask = (uint8_t *) data; if (data) return (VDevice *)timer_intr_new (addr, name, *func_mask); else avr_error ("Attempted timer interrupt create with NULL data pointer"); return 0; } TimerIntr_T * timer_intr_new (int addr, char *name, uint8_t func_mask) { TimerIntr_T *ti; ti = avr_new (TimerIntr_T, 1); timer_intr_construct (ti, addr, name, func_mask); class_overload_destroy ((AvrClass *)ti, timer_intr_destroy); return ti; } /** \brief Constructor for timer interrupt object. */ void timer_intr_construct (TimerIntr_T *ti, int addr, char *name, uint8_t func_mask) { if (ti == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)ti, timer_intr_read, timer_intr_write, timer_intr_reset, timer_iadd_addr); ti->func_mask = func_mask; timer_iadd_addr ((VDevice *)ti, addr, name, 0, NULL); timer_intr_reset ((VDevice *)ti); } static void timer_iadd_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { TimerIntr_T *ti = (TimerIntr_T *)vdev; if (strncmp ("TIFR", name, 4) == 0) { ti->tifr_addr = addr; } else if (strncmp ("TIMSK", name, 5) == 0) { ti->timsk_addr = addr; } else { avr_error ("invalid Timer Interrupt register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for timer interrupt object. */ void timer_intr_destroy (void *ti) { if (ti == NULL) return; vdev_destroy (ti); } static uint8_t timer_intr_read (VDevice *dev, int addr) { TimerIntr_T *ti = (TimerIntr_T *)dev; if (addr == ti->timsk_addr) { return (ti->timsk & ti->func_mask); } else if (addr == ti->tifr_addr) { return (ti->tifr & ti->func_mask); } else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void timer_intr_write (VDevice *dev, int addr, uint8_t val) { TimerIntr_T *ti = (TimerIntr_T *)dev; CallBack *cb; if (addr == ti->timsk_addr) { ti->timsk = (val & ti->func_mask); if (ti->timsk == 0) { ti->intr_cb = NULL; /* no interrupt are enabled, remove the callback */ } else if (ti->intr_cb == NULL) { /* we need to install the intr_cb function */ cb = callback_new (timer_intr_cb, (AvrClass *)ti); ti->intr_cb = cb; avr_core_async_cb_add ((AvrCore *)vdev_get_core (dev), cb); } } else if (addr == ti->tifr_addr) { ti->tifr &= ~(val & ti->func_mask); } else { avr_error ("Bad address: 0x%04x", addr); } } static void timer_intr_reset (VDevice *dev) { TimerIntr_T *ti = (TimerIntr_T *)dev; ti->intr_cb = NULL; ti->timsk = 0; ti->tifr = 0; } static int timer_intr_cb (uint64_t time, AvrClass *data) { TimerIntr_T *ti = (TimerIntr_T *)data; uint8_t intrs = ti->timsk & ti->tifr & ti->func_mask; if (ti->intr_cb == NULL) return CB_RET_REMOVE; if (intrs) { AvrCore *core = (AvrCore *)vdev_get_core ((VDevice *)ti); /* * FIXME: Once an irq has been raised, the flag should be cleared, * _BUT_ should it be done here? Might be a problem if there are * many interrupts pending and then the user wants to clear one. */ if (intrs & mask_TOV0) { avr_core_irq_raise (core, irq_vect_table_index (TIMER0_OVF)); ti->tifr &= ~mask_TOV0; } else if (intrs & mask_ICF1) { avr_core_irq_raise (core, irq_vect_table_index (TIMER1_CAPT)); ti->tifr &= ~mask_ICF1; } else if (intrs & mask_OCF1B) { avr_core_irq_raise (core, irq_vect_table_index (TIMER1_COMPB)); ti->tifr &= ~mask_OCF1B; } else if (intrs & mask_OCF1A) { avr_core_irq_raise (core, irq_vect_table_index (TIMER1_COMPA)); ti->tifr &= ~mask_OCF1A; } else if (intrs & mask_TOV1) { avr_core_irq_raise (core, irq_vect_table_index (TIMER1_OVF)); ti->tifr &= ~mask_TOV1; } else { avr_error ("An invalid interrupt was flagged"); } } return CB_RET_RETAIN; } /****************************************************************************\ * * Timer/Counter 0 * \****************************************************************************/ static void timer0_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t timer0_read (VDevice *dev, int addr); static void timer0_write (VDevice *dev, int addr, uint8_t val); static void timer0_reset (VDevice *dev); static int timer0_clk_incr_cb (uint64_t ck, AvrClass *data); /** \brief Allocate a new timer/counter 0. */ VDevice * timer0_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)timer0_new (addr, name, rel_addr); } Timer0_T * timer0_new (int addr, char *name, int rel_addr) { Timer0_T *timer; timer = avr_new (Timer0_T, 1); timer0_construct (timer, addr, name, rel_addr); class_overload_destroy ((AvrClass *)timer, timer0_destroy); return timer; } /** \brief Constructor for timer/counter 0 object. */ void timer0_construct (Timer0_T *timer, int addr, char *name, int rel_addr) { if (timer == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)timer, timer0_read, timer0_write, timer0_reset, timer0_add_addr); timer0_add_addr ((VDevice *)timer, addr, name, 0, NULL); if (rel_addr) timer->related_addr = rel_addr; timer0_reset ((VDevice *)timer); } /** \brief Destructor for timer/counter 0 object. */ void timer0_destroy (void *timer) { if (timer == NULL) return; vdev_destroy (timer); } static void timer0_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { Timer0_T *ti = (Timer0_T *)vdev; if (strncmp ("TCNT", name, 4) == 0) { ti->tcnt_addr = addr; } else if (strncmp ("TCCR", name, 4) == 0) { ti->tccr_addr = addr; } else { avr_error ("invalid Timer register name: '%s' @ 0x%04x", name, addr); } } static uint8_t timer0_read (VDevice *dev, int addr) { Timer0_T *timer = (Timer0_T *)dev; if (addr == timer->tcnt_addr) return timer->tcnt; else if (addr == timer->tccr_addr) return timer->tccr; else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void timer0_write (VDevice *dev, int addr, uint8_t val) { Timer0_T *timer = (Timer0_T *)dev; CallBack *cb; if (addr == timer->tcnt_addr) { timer->tcnt = val; } else if (addr == timer->tccr_addr) { /* * When the user writes toe TCCR, a callback is installed for either * clock generated increments or externally generated increments. The * two incrememtor callback are mutally exclusive, only one or the * other can be installed at any given instant. */ /* timer 0 only has clock select function. */ timer->tccr = val & mask_CS; switch (timer->tccr) { case CS_STOP: /* stop either of the installed callbacks */ timer->clk_cb = timer->ext_cb = NULL; timer->divisor = 0; return; case CS_EXT_FALL: case CS_EXT_RISE: /* FIXME: not implemented yet */ avr_error ("external timer/counter sources is not implemented" " yet"); return; case CS_CK: timer->divisor = 1; break; case CS_CK_8: timer->divisor = 8; break; case CS_CK_64: timer->divisor = 64; break; case CS_CK_256: timer->divisor = 256; break; case CS_CK_1024: timer->divisor = 1024; break; default: avr_error ("The impossible happened!"); } /* remove external incrementor if installed */ if (timer->ext_cb) timer->ext_cb = NULL; /* install the clock incrementor callback (with flair!) */ if (timer->clk_cb == NULL) { cb = callback_new (timer0_clk_incr_cb, (AvrClass *)timer); timer->clk_cb = cb; avr_core_clk_cb_add ((AvrCore *)vdev_get_core ((VDevice *)timer), cb); } } else { avr_error ("Bad address: 0x%04x", addr); } } static void timer0_reset (VDevice *dev) { Timer0_T *timer = (Timer0_T *)dev; timer->clk_cb = NULL; timer->ext_cb = NULL; timer->tccr = 0; timer->tcnt = 0; timer->divisor = 0; } static int timer0_clk_incr_cb (uint64_t ck, AvrClass *data) { Timer0_T *timer = (Timer0_T *)data; uint8_t last = timer->tcnt; TimerIntr_T *ti; ti = (TimerIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) timer), timer->related_addr); if (timer->clk_cb == NULL) return CB_RET_REMOVE; if (timer->divisor <= 0) avr_error ("Bad divisor value: %d", timer->divisor); /* Increment clock if ck is a mutliple of divisor. Since divisor is always a power of 2, it's much faster to do the bitwise AND instead of using the integer modulus operator (%). */ timer->tcnt += ((ck & (timer->divisor - 1)) == 0); /* Check if tcnt rolled over and if so, set the overflow flag. If overflow interrupts are set? what if they aren't? This is set irregardless of whether SREG-I or TOIE0 are set (overflow interrupt enabled) and thus allows the interrupt to be pending until manually cleared (writing a one to the TOV0 flag) or interrupts are enabled. My interpretation of the datasheets. See datasheet discussion of TIFR. TRoth */ if ((timer->tcnt == 0) && (timer->tcnt != last)) ti->tifr |= mask_TOV0; return CB_RET_RETAIN; } /****************************************************************************\ * * Timer/Counter 1/3 (16 bit) * \****************************************************************************/ /** \name 16 Bit Timer Functions */ /*@{*/ static void timer16_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static void timer16_destroy (void *timer); static uint8_t timer16_read (VDevice *dev, int addr); static void timer16_write (VDevice *dev, int addr, uint8_t val); static void timer16_reset (VDevice *dev); static int timer16_clk_incr_cb (uint64_t time, AvrClass *data); static void timer16_handle_tccr_write (Timer16_T *timer); /** \brief Allocate a new 16 bit timer/counter. */ VDevice * timer16_create (int addr, char *name, int rel_addr, void *data) { uint8_t *def_data = (uint8_t *) data; if (data) return (VDevice *)timer16_new (addr, name, rel_addr, global_timer16_defs[*def_data]); else avr_error ("Attempted timer 16 create with NULL data pointer"); return 0; } Timer16_T * timer16_new (int addr, char *name, int rel_addr, Timer16Def timerdef) { Timer16_T *timer; timer = avr_new (Timer16_T, 1); timer16_construct (timer, addr, name, rel_addr, timerdef); class_overload_destroy ((AvrClass *)timer, timer16_destroy); return timer; } /** \brief Constructor for 16 bit timer/counter object. */ void timer16_construct (Timer16_T *timer, int addr, char *name, int rel_addr, Timer16Def timerdef) { if (timer == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)timer, timer16_read, timer16_write, timer16_reset, timer16_add_addr); timer->timerdef = timerdef; timer16_add_addr ((VDevice *)timer, addr, name, 0, NULL); if (rel_addr) timer->related_addr = rel_addr; timer16_reset ((VDevice *)timer); } static void timer16_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { Timer16_T *ti = (Timer16_T *)vdev; if (strncmp ("TCNTL", name, 5) == 0) { ti->tcntl_addr = addr; } else if (strncmp ("TCNTH", name, 5) == 0) { ti->tcnth_addr = addr; } else if (strncmp ("TCCRA", name, 5) == 0) { ti->tccra_addr = addr; } else if (strncmp ("TCCRB", name, 5) == 0) { ti->tccrb_addr = addr; } else if (strncmp ("TCCRC", name, 5) == 0) { ti->tccrc_addr = addr; } else { avr_error ("invalid Timer16 register name: '%s' @ 0x%04x", name, addr); } } static void timer16_destroy (void *timer) { if (timer == NULL) return; vdev_destroy (timer); } static uint8_t timer16_read (VDevice *dev, int addr) { Timer16_T *timer = (Timer16_T *)dev; if (addr == timer->tcntl_addr) { timer->TEMP = (uint8_t) ((timer->tcnt) >> 8); return (timer->tcnt) & 0xFF; } else if (addr == timer->tcnth_addr) { return timer->TEMP; } else if (addr == timer->tccra_addr) { return timer->tccra; } else if (addr == timer->tccrb_addr) { return timer->tccrb; } else if (addr == timer->tccrc_addr) { return timer->tccrc; } else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void timer16_write (VDevice *dev, int addr, uint8_t val) { Timer16_T *timer = (Timer16_T *)dev; if (addr == timer->tcntl_addr) { timer->tcnt = (((timer->TEMP) << 8) & 0xFF00) | val; } else if (addr == timer->tcnth_addr) { timer->TEMP = val; } else if (addr == timer->tccra_addr) { timer->tccra = val; timer16_handle_tccr_write (timer); } else if (addr == timer->tccrb_addr) { timer->tccrb = val; timer16_handle_tccr_write (timer); } else if (addr == timer->tccrc_addr) { timer->tccrc = val; timer16_handle_tccr_write (timer); } else { avr_error ("Bad address: 0x%04x", addr); } } static void timer16_reset (VDevice *dev) { Timer16_T *timer = (Timer16_T *)dev; timer->clk_cb = NULL; timer->ext_cb = NULL; timer->tccra = 0; timer->tccrb = 0; timer->tccrc = 0; timer->tcnt = 0; timer->divisor = 0; } static void timer_intr_set_flag (TimerIntr_T *ti, uint8_t bitnr) { ti->tifr |= bitnr; } static int timer16_clk_incr_cb (uint64_t ck, AvrClass *data) { Timer16_T *timer = (Timer16_T *)data; uint16_t last = timer->tcnt; if (!timer->ti) timer->ti = (TimerIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) timer), timer->related_addr); if (timer->clk_cb == NULL) return CB_RET_REMOVE; /* Increment clock if ck is a mutliple of divisor. Since divisor is always a power of 2, it's much faster to do the bitwise AND instead of using the integer modulus operator (%). */ timer->tcnt += ((ck & (timer->divisor - 1)) == 0); if (timer->divisor <= 0) avr_error ("Bad divisor value: %d", timer->divisor); /* The following things only have to be checked if the counter value has changed */ if (timer->tcnt != last) { /* An overflow occurred */ if (timer->tcnt == 0) timer_intr_set_flag (timer->ti, mask_TOV1); /* The counter value matches one of the ocr values */ if (timer->ocra && (timer->tcnt == timer->ocra->ocr)) { timer_intr_set_flag (timer->ti, mask_OCF1A); } if (timer->ocrb && (timer->tcnt == timer->ocrb->ocr)) { timer_intr_set_flag (timer->ti, mask_OCF1B); } } return CB_RET_RETAIN; } #if 0 static void timer_intr_clear_flag (TimerIntr_T *ti, uint8_t bitnr) { ti->tifr &= ~(bitnr); } #endif static void timer16_handle_tccr_write (Timer16_T *timer) { int cs; CallBack *cb; /* * When the user writes toe TCCR, a callback is installed for either * clock generated increments or externally generated increments. The * two incrememtor callback are mutally exclusive, only one or the * other can be installed at any given instant. */ cs = timer->tccrb & 0x07; switch (cs) { case CS_STOP: /* stop either of the installed callbacks */ timer->clk_cb = timer->ext_cb = NULL; timer->divisor = 0; return; case CS_EXT_FALL: case CS_EXT_RISE: /* FIXME: not implemented yet */ avr_error ("external timer/counter sources is not implemented" "yet"); return; case CS_CK: timer->divisor = 1; break; case CS_CK_8: timer->divisor = 8; break; case CS_CK_64: timer->divisor = 64; break; case CS_CK_256: timer->divisor = 256; break; case CS_CK_1024: timer->divisor = 1024; break; default: avr_error ("The impossible happened!"); } /* remove external incrementor if installed */ if (timer->ext_cb) timer->ext_cb = NULL; /* install the clock incrementor callback (with flair!) */ if (timer->clk_cb == NULL) { cb = callback_new (timer16_clk_incr_cb, (AvrClass *)timer); timer->clk_cb = cb; avr_core_clk_cb_add ((AvrCore *)vdev_get_core ((VDevice *)timer), cb); } } /*@}*/ /****************************************************************************\ * * Timer16OCR(VDevice) : 16bit - Timer/Counter - Output Compare Register * \****************************************************************************/ /** \name 16 Bit Output Compare Register Functions */ /*@{*/ static void ocr_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static void ocreg16_destroy (void *ocr); static uint8_t ocreg16_read (VDevice *dev, int addr); static void ocreg16_write (VDevice *dev, int addr, uint8_t val); static void ocreg16_reset (VDevice *dev); /** \brief Allocate a new 16 bit Output Compare Register * \param ocrdef The definition struct for the \a OCR to be created */ VDevice * ocreg16_create (int addr, char *name, int rel_addr, void *data) { uint8_t *def_data = (uint8_t *) data; if (data) return (VDevice *)ocreg16_new (addr, name, global_ocreg16_defs[*def_data]); else avr_error ("Attempted OCReg create with NULL data pointer"); return 0; } OCReg16_T * ocreg16_new (int addr, char *name, OCReg16Def ocrdef) { OCReg16_T *ocreg; ocreg = avr_new (OCReg16_T, 1); ocreg16_construct (ocreg, addr, name, ocrdef); class_overload_destroy ((AvrClass *)ocreg, ocreg16_destroy); return ocreg; } /** \brief Constructor for 16 bit Output Compare Register object. */ void ocreg16_construct (OCReg16_T *ocreg, int addr, char *name, OCReg16Def ocrdef) { if (ocreg == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)ocreg, ocreg16_read, ocreg16_write, ocreg16_reset, ocr_add_addr); ocreg->ocrdef = ocrdef; ocr_add_addr ((VDevice *)ocreg, addr, name, 0, NULL); ocreg16_reset ((VDevice *)ocreg); } static void ocr_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { OCReg16_T *ocreg = (OCReg16_T *)vdev; if ((strncmp ("OCRAL", name, 5) == 0) || (strncmp ("OCRBL", name, 5) == 0) || (strncmp ("OCRCL", name, 5) == 0)) { ocreg->ocrl_addr = addr; } else if ((strncmp ("OCRAH", name, 5) == 0) || (strncmp ("OCRBH", name, 5) == 0) || (strncmp ("OCRCH", name, 5) == 0)) { ocreg->ocrh_addr = addr; } else { avr_error ("invalid Timer16 register name: '%s' @ 0x%04x", name, addr); } } static void ocreg16_destroy (void *ocreg) { if (ocreg == NULL) return; vdev_destroy (ocreg); } static uint8_t ocreg16_read (VDevice *dev, int addr) { OCReg16_T *ocreg = (OCReg16_T *)dev; if (addr == ocreg->ocrl_addr) { return (ocreg->ocr) & 0xFF; } else if (addr == ocreg->ocrh_addr) { return (ocreg->ocr) >> 8; } else { avr_error ("Bad address: 0x%04x", addr); } return 0; } static void ocreg16_write (VDevice *dev, int addr, uint8_t val) { OCReg16_T *ocreg = (OCReg16_T *)dev; if (addr == ocreg->ocrl_addr) { ocreg->ocr = (((ocreg->TEMP) << 8) & 0xFF00) | val; } else if (addr == ocreg->ocrh_addr) { ocreg->TEMP = val; } else { avr_error ("Bad address: 0x%04x", addr); } } static void ocreg16_reset (VDevice *dev) { OCReg16_T *ocreg = (OCReg16_T *)dev; ocreg->ocr = 0; } /*@}*/ simulavr-0.1.2.2/src/timers.h0000644000175000001440000002360710024663466012713 00000000000000/* * $Id: timers.h,v 1.7 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_TIMERS_H #define SIM_TIMERS_H /****************************************************************************\ * * TimerInter_T(VDevice) : Timer/Counter Interrupt Mask/Flag Registers * \****************************************************************************/ enum _timer_intr_constants { TIMER_INTR_BASE = 0x58, /* base address for vdev */ TIMER_INTR_SIZE = 2, /* TIFR and TIMSK */ TIMER_INTR_TIFR_ADDR = 0, TIMER_INTR_TIMSK_ADDR = 1, }; typedef enum { bit_TOIE0 = 1, /* timer/counter0 overflow interrupt enable */ bit_TICIE1 = 3, /* timer/counter1 input capture interrupt enable */ bit_OCIE1B = 5, /* timer/counter1 output compare B match interrupt enable */ bit_OCIE1A = 6, /* timer/counter1 output compare A match interrupt enable */ bit_TOIE1 = 7, /* timer/counter1 overflow interrupt enable */ } TIMSK_BITS; typedef enum { mask_TOIE0 = 1 << bit_TOIE0, mask_TICIE1 = 1 << bit_TICIE1, mask_OCIE1B = 1 << bit_OCIE1B, mask_OCIE1A = 1 << bit_OCIE1A, mask_TOIE1 = 1 << bit_TOIE1, } TIMSK_MASKS; typedef enum { bit_TOV0 = 1, /* timer/counter0 overflow flag */ bit_ICF1 = 3, /* input capture flag 1 */ bit_OCF1B = 5, /* output compare flag 1B */ bit_OCF1A = 6, /* output compare flag 1A */ bit_TOV1 = 7, /* timer/counter1 overflow flag */ } TIFR_BITS; typedef enum { mask_TOV0 = 1 << bit_TOV0, mask_ICF1 = 1 << bit_ICF1, mask_OCF1B = 1 << bit_OCF1B, mask_OCF1A = 1 << bit_OCF1A, mask_TOV1 = 1 << bit_TOV1, } TIFR_MASKS; typedef struct _TimerIntr_T TimerIntr_T; /* FIXME: will timsk and tifr always have the same func mask? */ struct _TimerIntr_T { VDevice parent; uint16_t timsk_addr; uint8_t timsk; /* Timer/counter interrupt mask register */ uint16_t tifr_addr; uint8_t tifr; /* Timer/counter interrupt flag register */ uint8_t func_mask; /* mask of available register functions */ CallBack *intr_cb; /* callback for checking and raising interrupts */ }; extern VDevice *timer_int_create (int addr, char *name, int rel_addr, void *data); extern TimerIntr_T *timer_intr_new (int addr, char *name, uint8_t func_mask); extern void timer_intr_construct (TimerIntr_T *ti, int addr, char *name, uint8_t func_mask); extern void timer_intr_destroy (void *ti); /****************************************************************************\ * * General Timer/Counter bits and masks. * \****************************************************************************/ typedef enum { bit_CS0 = 0, /* timer/counter clock select bit 0 */ bit_CS1 = 1, bit_CS2 = 2, bit_CTC = 3, /* clear timer/counter on compare match */ bit_ICES = 6, /* input capture edge select */ bit_ICNC = 7, /* input capture noise canceler (4 CKs) */ } TCCR_BITS; typedef enum { mask_CS0 = 1 << bit_CS0, mask_CS1 = 1 << bit_CS1, mask_CS2 = 1 << bit_CS2, mask_CTC = 1 << bit_CTC, mask_ICES = 1 << bit_ICES, mask_ICNC = 1 << bit_ICNC, mask_CS = (mask_CS0 | mask_CS1 | mask_CS2), } TCCR_MASKS; enum _cs_constants { CS_STOP = 0x00, /* Stop, the Timer/Counter is stopped */ CS_CK = 0x01, /* CK */ CS_CK_8 = 0x02, /* CK/8 */ CS_CK_64 = 0x03, /* CK/64 */ CS_CK_256 = 0x04, /* CK/256 */ CS_CK_1024 = 0x05, /* CK/1024 */ CS_EXT_FALL = 0x06, /* External Pin Tn, falling edge */ CS_EXT_RISE = 0x07, /* External Pin Tn, rising edge */ }; /****************************************************************************\ * * Timer0(VDevice) : Timer/Counter 0 * \****************************************************************************/ enum _timer0_constants { TIMER0_BASE = 0x52, /* base memory address */ TIMER0_SIZE = 2, /* TCCR0 and TCNT0 */ TIMER0_TCNT_ADDR = 0, /* offset from base to TCNT Register */ TIMER0_TCCR_ADDR = 1, }; typedef struct _Timer0 Timer0_T; struct _Timer0 { VDevice parent; uint16_t tccr_addr; uint8_t tccr; /* control register */ uint16_t tcnt_addr; uint8_t tcnt; /* Timer/Counter up-counter register */ int divisor; /* clock divisor */ uint16_t related_addr; /* interrupt address register */ CallBack *clk_cb; /* incr timer tied to clock */ CallBack *ext_cb; /* incr timer tied to external event */ }; extern VDevice *timer0_create (int addr, char *name, int rel_addr, void *data); extern Timer0_T *timer0_new (int addr, char *name, int rel_addr); extern void timer0_construct (Timer0_T *timer, int addr, char *name, int rel_addr); extern void timer0_destroy (void *timer); #if 0 extern void timer_intr_set_flag (TimerIntr_T *ti, uint8_t bitnr); extern void timer_intr_clear_flag (TimerIntr_T *ti, uint8_t bitnr); #endif /****************************************************************************\ * * OCR16(VDevice) : 16bit - Output Compare Register * \****************************************************************************/ enum _ocreg16_constants { OCREG16_SIZE = 2, OCRL_ADDR = 0, OCRH_ADDR = 1, }; enum _ocreg16_defs { OCR1A_DEF = 0, OCR1B_DEF, OCR1C_DEF, OCR3A_DEF, OCR3B_DEF, OCR3C_DEF, }; typedef struct _OCReg16Def OCReg16Def; struct _OCReg16Def { char *ocrdev_name; char *ocrl_name; char *ocrh_name; int base; }; extern OCReg16Def global_ocreg16_defs[]; typedef struct _OCReg16 OCReg16_T; struct _OCReg16 { VDevice parent; uint16_t ocr; /* output compare register */ uint16_t ocrl_addr; uint16_t ocrh_addr; uint8_t TEMP; /* TEMP register for read and write */ OCReg16Def ocrdef; }; extern VDevice *ocreg16_create (int addr, char *name, int rel_addr, void *data); extern OCReg16_T *ocreg16_new (int addr, char *name, OCReg16Def ocrdef); extern void ocreg16_construct (OCReg16_T *ocreg, int addr, char *name, OCReg16Def ocrdef); /****************************************************************************\ * * Timer16(VDevice) : Timer/Counter 1/3 (16bit) * \****************************************************************************/ enum _timer16_definitions { TD_TIMER1 = 0, TD_TIMER3, }; typedef struct _Timer16Def Timer16Def; struct _Timer16Def { char *timer_name; char *tcnth_name; char *tcntl_name; char *tccra_name; char *tccrb_name; int base; int tof; int ocf_a; int ocf_b; int ocf_c; }; extern Timer16Def global_timer16_defs[]; enum _timer16_constants { TIMER16_SIZE = 4, /* TCCRxA, TCCRxB, and TCNTxH, TCNTxL */ TCNTL_ADDR = 0, TCNTH_ADDR = 1, TCCRB_ADDR = 2, TCCRA_ADDR = 3, TIMER16_BASE = 0x4c, /* base memory address */ }; typedef struct _Timer16 Timer16_T; struct _Timer16 { VDevice parent; uint8_t tccra; /* control register A */ uint16_t tccra_addr; uint8_t tccrb; /* control register B */ uint16_t tccrb_addr; uint8_t tccrc; /* control register C */ uint16_t tccrc_addr; uint16_t tcnt; /* Timer/Counter up-counter register (2bytes) */ uint16_t tcntl_addr; uint16_t tcnth_addr; int divisor; /* clock divisor */ uint8_t TEMP; /* TEMP register for read and write */ uint16_t related_addr; /* interrupt address register */ CallBack *clk_cb; /* incr timer tied to clock */ CallBack *ext_cb; /* incr timer tied to external event */ OCReg16_T *ocra; /* Output compare registers */ OCReg16_T *ocrb; /* Output compare registers */ OCReg16_T *ocrc; /* Output compare registers */ TimerIntr_T *ti; Timer16Def timerdef; /* Timer definition structure */ }; extern VDevice *timer16_create (int addr, char *name, int rel_addr, void *data); extern Timer16_T *timer16_new (int addr, char *name, int rel_addr, Timer16Def timerdef); extern void timer16_construct (Timer16_T *timer, int addr, char *name, int rel_addr, Timer16Def timerdef); #endif /* SIM_TIMERS_H */ simulavr-0.1.2.2/src/uart.c0000644000175000001440000003503010024663466012347 00000000000000/* * $Id: uart.c,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003, 2004 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file uart.c * \brief Module to simulate the AVR's uart module. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "eeprom.h" #include "timers.h" #include "ports.h" #include "uart.h" #include "avrcore.h" #include "intvects.h" /****************************************************************************\ * * uart Interrupts * \****************************************************************************/ static void uart_iadd_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t uart_intr_read (VDevice *dev, int addr); static void uart_intr_write (VDevice *dev, int addr, uint8_t val); static void uart_intr_reset (VDevice *dev); static int uart_intr_cb (uint64_t time, AvrClass *data); int UART_Int_Table[] = { irq_vect_table_index (UART_RX), /* uart Rx complete */ irq_vect_table_index (UART_UDRE), /* uart data register empty */ irq_vect_table_index (UART_TX) /* uart Tx complete */ }; int UART0_Int_Table[] = { irq_vect_table_index (USART0_RX), /* uart Rx complete */ irq_vect_table_index (USART0_UDRE), /* uart data register empty */ irq_vect_table_index (USART0_TX) /* uart Tx complete */ }; int UART1_Int_Table[] = { irq_vect_table_index (USART1_RX), /* uart Rx complete */ irq_vect_table_index (USART1_UDRE), /* uart data register empty */ irq_vect_table_index (USART1_TX) /* uart Tx complete */ }; /** \brief Allocate a new uart interrupt */ VDevice * uart_int_create (int addr, char *name, int rel_addr, void *data) { if (data) return (VDevice *)uart_intr_new (addr, name, data); else avr_error ("Attempted UART create with NULL data pointer"); return 0; } UARTIntr_T * uart_intr_new (int addr, char *name, void *data) { uint8_t *uart_num = (uint8_t *) data; UARTIntr_T *uart; uart = avr_new (UARTIntr_T, 1); uart_intr_construct (uart, addr, name); class_overload_destroy ((AvrClass *)uart, uart_intr_destroy); if (*uart_num == USART0) uart->Int_Table = &UART0_Int_Table[0]; else if (*uart_num == USART1) uart->Int_Table = &UART1_Int_Table[0]; else uart->Int_Table = &UART_Int_Table[0]; uart_iadd_addr ((VDevice *)uart, addr, name, 0, NULL); return uart; } /** \brief Constructor for uart interrupt object. */ void uart_intr_construct (UARTIntr_T *uart, int addr, char *name) { if (uart == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)uart, uart_intr_read, uart_intr_write, uart_intr_reset, uart_iadd_addr); uart_intr_reset ((VDevice *)uart); } static void uart_iadd_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { UARTIntr_T *uart = (UARTIntr_T *)vdev; if (strncmp ("UBRRH", name, 5) == 0) { uart->ubrrh_addr = addr; } else if ((strncmp ("UBRR", name, 4) == 0) || (strncmp ("UBRR0", name, 5) == 0) || (strncmp ("UBRR1", name, 5) == 0)) { uart->ubrrl_addr = addr; } else if ((strncmp ("USR", name, 3) == 0) || (strncmp ("UCSR0A", name, 6) == 0) || (strncmp ("UCSR1A", name, 6) == 0)) { uart->usr_addr = addr; } else if ((strncmp ("UCR", name, 3) == 0) || (strncmp ("UCSR0B", name, 6) == 0) || (strncmp ("UCSR1B", name, 6) == 0)) { uart->ucr_addr = addr; } else { avr_error ("invalid UART register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for uart interrupt object. */ void uart_intr_destroy (void *uart) { if (uart == NULL) return; vdev_destroy (uart); } static uint8_t uart_intr_read (VDevice *dev, int addr) { UARTIntr_T *uart = (UARTIntr_T *)dev; if (addr == uart->ubrrl_addr) { return (uart->ubrr & 0xff); } else if (addr == uart->ubrrh_addr) { return (uart->ubrr >> 8); } else if (addr == uart->ucr_addr) { return (uart->ucr); } else if (addr == uart->usr_addr) { return (uart->usr); } else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void uart_intr_write (VDevice *dev, int addr, uint8_t val) { UARTIntr_T *uart = (UARTIntr_T *)dev; CallBack *cb; if (addr == uart->ubrrl_addr) { uart->ubrr = val + (uart->ubrr_temp << 8); } else if (addr == uart->ubrrh_addr) { uart->ubrr_temp = val; } else if (addr == uart->usr) { if (val & mask_TXC) uart->usr &= ~mask_TXC; } else if (addr == uart->ucr_addr) { (uart->ucr = val); /* look for interrupt enables */ if (((uart->ucr & mask_TXEN) && (uart->ucr & mask_TXCIE)) || ((uart->ucr & mask_RXEN) && (uart->ucr & mask_RXCIE)) || (uart->ucr & mask_UDRIE)) { if (uart->intr_cb == NULL) { /* we need to install the intr_cb function */ cb = callback_new (uart_intr_cb, (AvrClass *)uart); uart->intr_cb = cb; avr_core_async_cb_add ((AvrCore *)vdev_get_core (dev), cb); } } else { uart->intr_cb = NULL; /* no interrupt are enabled, remove the callback */ } } else { avr_error ("Bad address: 0x%04x", addr); } } static void uart_intr_reset (VDevice *dev) { UARTIntr_T *uart = (UARTIntr_T *)dev; uart->intr_cb = NULL; uart->ubrr = 0; uart->usr = 0; uart->ucr = 0; uart->usr_shadow = 0; } static int uart_intr_cb (uint64_t time, AvrClass *data) { UARTIntr_T *uart = (UARTIntr_T *)data; if (uart->intr_cb == NULL) return CB_RET_REMOVE; if ((uart->ucr & mask_RXCIE) && (uart->usr & mask_RXC)) /* an enabled interrupt occured */ { AvrCore *core = (AvrCore *)vdev_get_core ((VDevice *)uart); avr_core_irq_raise (core, (uart->Int_Table[URX])); } if ((uart->ucr & mask_TXCIE) && (uart->usr & mask_TXC)) /* an enabled interrupt occured */ { AvrCore *core = (AvrCore *)vdev_get_core ((VDevice *)uart); avr_core_irq_raise (core, (uart->Int_Table[UTX])); uart->usr &= ~mask_TXC; } if ((uart->ucr & mask_UDRIE) && (uart->usr & mask_UDRE) && (uart->usr_shadow & mask_UDRE)) /* an enabled interrupt occured */ { AvrCore *core = (AvrCore *)vdev_get_core ((VDevice *)uart); avr_core_irq_raise (core, (uart->Int_Table[UUDRE])); uart->usr_shadow &= ~mask_UDRE; /* only issue one interrupt / udre */ } return CB_RET_RETAIN; } /****************************************************************************\ * * uart * \****************************************************************************/ static void uart_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t uart_read (VDevice *dev, int addr); static void uart_write (VDevice *dev, int addr, uint8_t val); static void uart_reset (VDevice *dev); static int uart_clk_incr_cb (uint64_t ck, AvrClass *data); /** \brief Allocate a new uart structure. */ VDevice * uart_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)uart_new (addr, name, rel_addr); } UART_T * uart_new (int addr, char *name, int rel_addr) { UART_T *uart; uart = avr_new (UART_T, 1); uart_construct (uart, addr, name, rel_addr); class_overload_destroy ((AvrClass *)uart, uart_destroy); return uart; } /** \brief Constructor for uart object. */ void uart_construct (UART_T *uart, int addr, char *name, int rel_addr) { if (uart == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)uart, uart_read, uart_write, uart_reset, uart_add_addr); uart_add_addr ((VDevice *)uart, addr, name, 0, NULL); if (rel_addr) uart->related_addr = rel_addr; uart_reset ((VDevice *)uart); } static void uart_add_addr (VDevice *vdev, int addr, char *name, int ref_addr, void *data) { UART_T *uart = (UART_T *)vdev; if (strncmp ("UDR", name, 3) == 0) { uart->udr_addr = addr; } else { avr_error ("invalid SPI register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for uart object. */ void uart_destroy (void *uart) { if (uart == NULL) return; vdev_destroy (uart); } static uint8_t uart_read (VDevice *dev, int addr) { UART_T *uart = (UART_T *)dev; UARTIntr_T *uart_t; uint16_t udr_temp; uart_t = (UARTIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) uart), uart->related_addr); if (addr == uart->udr_addr) { uart_t->usr &= ~mask_RXC; /* clear RXC bit in USR */ if (uart->clk_cb) /* call back already installed */ { udr_temp = uart_port_rd (addr); uart->udr_rx = (uint8_t) udr_temp; /* lower 8 bits */ if ((uart_t->ucr & mask_CHR9) && /* 9 bits rec'd */ (udr_temp & (1 << 8))) /* hi bit set */ uart_t->ucr |= mask_RXB8; else uart_t->ucr &= ~mask_RXB8; } return uart->udr_rx; } else { avr_error ("Bad address: 0x%04x", addr); } return 0; /* will never get here */ } static void uart_write (VDevice *dev, int addr, uint8_t val) { UART_T *uart = (UART_T *)dev; UARTIntr_T *uart_t; CallBack *cb; uart_t = (UARTIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) uart), uart->related_addr); if (addr == uart->udr_addr) { if (uart_t->usr & mask_UDRE) { uart_t->usr &= ~mask_UDRE; uart_t->usr_shadow &= ~mask_UDRE; } else { uart_t->usr |= mask_UDRE; uart_t->usr_shadow |= mask_UDRE; } uart->udr_tx = val; /* * When the user writes to UDR, a callback is installed for * clock generated increments. */ uart->divisor = (uart_t->ubrr + 1) * 16; /* install the clock incrementor callback (with flair!) */ if (uart->clk_cb == NULL) { cb = callback_new (uart_clk_incr_cb, (AvrClass *)uart); uart->clk_cb = cb; avr_core_clk_cb_add ((AvrCore *)vdev_get_core ((VDevice *)uart), cb); } /* set up timer for 8 or 9 clocks based on ucr (includes start and stop bits) */ uart->tcnt = (uart_t->ucr & mask_CHR9) ? 11 : 10; } else { avr_error ("Bad address: 0x%04x", addr); } } static void uart_reset (VDevice *dev) { UART_T *uart = (UART_T *)dev; uart->clk_cb = NULL; uart->udr_rx = 0; uart->udr_tx = 0; uart->tcnt = 0; uart->divisor = 0; } static int uart_clk_incr_cb (uint64_t ck, AvrClass *data) { UART_T *uart = (UART_T *)data; UARTIntr_T *uart_t; uint8_t last = uart->tcnt; uart_t = (UARTIntr_T *)avr_core_get_vdev_by_addr ((AvrCore *) vdev_get_core ((VDevice *) uart), uart->related_addr); if (uart->clk_cb == NULL) return CB_RET_REMOVE; if (uart->divisor <= 0) avr_error ("Bad divisor value: %d", uart->divisor); /* decrement clock if ck is a mutliple of divisor */ uart->tcnt -= ((ck % uart->divisor) == 0); if (uart->tcnt != last) /* we've changed the counter */ { if (uart->tcnt == 0) { if (uart_t->usr & mask_UDRE) /* data register empty */ { uart_t->usr |= mask_TXC; uart->clk_cb = NULL; return CB_RET_REMOVE; } else /* there's a byte waiting to go */ { uart_t->usr |= mask_UDRE; uart_t->usr_shadow |= mask_UDRE; /* also write shadow */ /* set up timer for 8 or 9 clocks based on ucr, (includes start and stop bits) */ uart->tcnt = (uart_t->ucr & mask_CHR9) ? 11 : 10; } } } return CB_RET_RETAIN; } uint16_t uart_port_rd (int addr) { int data; char line[80]; while (1) { fprintf (stderr, "\nEnter 9 bits of hex data to read into the uart at " "address 0x%04x: ", addr); /* try to read in a line of input */ if (fgets (line, sizeof (line), stdin) == NULL) continue; /* try to parse the line for a byte of data */ if (sscanf (line, "%x\n", &data) != 1) continue; break; } return (uint16_t) (data & 0x1ff); } void uart_port_wr (uint8_t val) { fprintf (stderr, "wrote 0x%02x to uart\n", val); } simulavr-0.1.2.2/src/uart.h0000644000175000001440000001355610024663466012365 00000000000000/* * $Id: uart.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_UART_H #define SIM_UART_H enum _uart_definitions { UART = 0x01, /* only one uart */ USART0 = 0x02, /* two uarts, 2nd one low */ USART1 = 0x06, /* two uarts, 2nd one hi */ }; /****************************************************************************\ * * uartInter_T(VDevice) : uart Interrupt and Control Register * \****************************************************************************/ enum _uart_intr_constants { UART_INTR_BASE_1 = 0x20, /* base address for vdev UART1 */ UART_INTR_BASE_0 = 0x29, /* base address for vdev UART0 */ UART_INTR_BASE_128 = 0x99, /* base address for vdev UART1 mega 128 */ UART_INTR_SIZE = 3, /* UBRR, UCR, USR */ UART_INTR_UBRR_ADDR = 0, UART_INTR_UCR_ADDR = 1, UART_INTR_USR_ADDR = 2, }; enum _uart_int_table_constants { URX, /* uart Rx complete */ UUDRE, /* uart data register empty */ UTX /* uart Tx complete */ }; typedef enum { bit_MPCM = 0, /* Multi-processor Communication Mode */ bit_U2X = 1, /* Double X-mission Speed */ bit_OR = 3, /* OverRun */ bit_FE = 4, /* Framing Error */ bit_UDRE = 5, /* Data Register Empty */ bit_TXC = 6, /* Transmit Complete */ bit_RXC = 7, /* Receive Complete */ } UCR_BITS; typedef enum { mask_MPCM = 1 << bit_MPCM, mask_U2X = 1 << bit_U2X, mask_OR = 1 << bit_OR, mask_FE = 1 << bit_FE, mask_UDRE = 1 << bit_UDRE, mask_TXC = 1 << bit_TXC, mask_RXC = 1 << bit_RXC, } UCR_MASKS; typedef enum { bit_TXB8 = 0, /* Transmit Data Bit 8 */ bit_RXB8 = 1, /* Receive Data Bit 8 */ bit_CHR9 = 2, /* 9 bit characters */ bit_TXEN = 3, /* Transmitter Enable */ bit_RXEN = 4, /* Receiver Enable */ bit_UDRIE = 5, /* Data Register Interrupt Enable */ bit_TXCIE = 6, /* TX Complete Interrupt Enable */ bit_RXCIE = 7, /* RX Complete Interrupt Enable */ } USR_BITS; typedef enum { mask_TXB8 = 1 << bit_TXB8, mask_RXB8 = 1 << bit_RXB8, mask_CHR9 = 1 << bit_CHR9, mask_TXEN = 1 << bit_TXEN, mask_RXEN = 1 << bit_RXEN, mask_UDRIE = 1 << bit_UDRIE, mask_TXCIE = 1 << bit_TXCIE, mask_RXCIE = 1 << bit_RXCIE, } USR_MASKS; typedef struct _UARTIntr_T UARTIntr_T; struct _UARTIntr_T { VDevice parent; uint16_t ubrr; /* uart BAUD Rate register */ uint8_t ubrr_temp; uint16_t ubrrl_addr; uint16_t ubrrh_addr; uint8_t usr; /* uart status register */ uint16_t usr_addr; uint8_t ucr; /* uart control register */ uint16_t ucr_addr; uint8_t usr_shadow; /* shadow uart status register */ CallBack *intr_cb; /* callback - check and raise interrupts */ int *Int_Table; /* pointer to int index for this interrupt */ }; extern VDevice *uart_int_create (int addr, char *name, int rel_addr, void *data); extern UARTIntr_T *uart_intr_new (int addr, char *name, void *data); extern void uart_intr_construct (UARTIntr_T *uart, int addr, char *name); extern void uart_intr_destroy (void *ti); /****************************************************************************\ * * uart(VDevice) : uart * \****************************************************************************/ enum _uart_constants { UART_BASE_1 = 0x23, /* base memory address UART1 */ UART_BASE_0 = 0x2c, /* base memory address UART0 */ UART_BASE_128 = 0x9c, /* base memory address UART1, mega128 */ UART_SIZE = 1, /* SPDR */ UART_UDR_ADDR = 0, /* offset from base to SPDR Register */ }; typedef struct _UART UART_T; struct _UART { VDevice parent; uint8_t udr_rx; /* receive data register */ uint8_t udr_tx; /* transmit data register */ uint16_t udr_addr; uint16_t related_addr; /* interrupt address register */ uint16_t tcnt; /* uart timer up-counter register */ uint16_t divisor; /* clock divisor */ CallBack *clk_cb; /* incr timer tied to clock */ }; extern VDevice *uart_create (int addr, char *name, int rel_addr, void *data); extern UART_T *uart_new (int addr, char *name, int rel_addr); extern void uart_construct (UART_T *uart, int addr, char *name, int rel_addr); extern void uart_destroy (void *uart); extern void uart_intr_set_flag (UARTIntr_T *ti); extern void uart_intr_clear_flag (UARTIntr_T *ti); extern uint16_t uart_port_rd (int addr); extern void uart_port_wr (uint8_t val); #endif /* SIM_UART_H */ simulavr-0.1.2.2/src/usb.c0000644000175000001440000006740610024663466012201 00000000000000/* * $Id: usb.c,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003, 2004 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file usb.c * \brief Module to simulate the AVR's USB module. */ #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" #include "callback.h" #include "op_names.h" #include "storage.h" #include "flash.h" #include "vdevs.h" #include "memory.h" #include "stack.h" #include "register.h" #include "sram.h" #include "usb.h" #include "intvects.h" void usb_port_wr (char *name, uint8_t val); uint8_t usb_port_rd (char *name); /*****************************************************************************\ * * USB Interrupts * \*****************************************************************************/ static void usbi_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t usb_intr_read (VDevice *dev, int addr); static void usb_intr_write (VDevice *dev, int addr, uint8_t val); static void usb_intr_reset (VDevice *dev); static char *usb_intr_reg_name (VDevice *dev, int addr); /** \brief Allocate a new USB interrupt */ /* return (VDevice *)usb_intr_new (addr, name, (uint8_t) *data_ptr); }*/ VDevice * usbi_create (int addr, char *name, int rel_addr, void *data) { uint8_t *data_ptr = (uint8_t *) data; if (data) return (VDevice *)usb_intr_new (addr, name, (uint8_t) * data_ptr); else avr_error ("Attempted USB interrupt create with NULL data pointer"); return 0; } USBInter_T * usb_intr_new (int addr, char *name, uint8_t func_mask) { USBInter_T *usb; usb = avr_new (USBInter_T, 1); usb_intr_construct (usb, addr, name, func_mask); class_overload_destroy ((AvrClass *)usb, usb_intr_destroy); return usb; } /** \brief Constructor for usb interrupt object. */ void usb_intr_construct (USBInter_T *usb, int addr, char *name, uint8_t func_mask) { if (usb == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)usb, usb_intr_read, usb_intr_write, usb_intr_reset, usbi_add_addr); usb->func_mask = func_mask; usbi_add_addr ((VDevice *)usb, addr, name, 0, NULL); usb_intr_reset ((VDevice *)usb); } static void usbi_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { USBInter_T *usb = (USBInter_T *)vdev; if (strncmp ("UIER", name, 4) == 0) { usb->uier_addr = addr; } else if (strncmp ("UIAR", name, 4) == 0) { usb->uiar_addr = addr; } else if (strncmp ("UIMSK", name, 5) == 0) { usb->uimsk_addr = addr; } else if (strncmp ("UISR", name, 4) == 0) { usb->uisr_addr = addr; } else if (strncmp ("SPRSMSK", name, 7) == 0) { usb->sprsmsk_addr = addr; } else if (strncmp ("SPRSIE", name, 6) == 0) { usb->sprsie_addr = addr; } else if (strncmp ("SPRSR", name, 5) == 0) { usb->sprsr_addr = addr; } else if (strncmp ("GLB_STATE", name, 9) == 0) { usb->glb_state_addr = addr; } else if (strncmp ("FRM_NUM_L", name, 9) == 0) { usb->frm_num_l_addr = addr; } else if (strncmp ("FRM_NUM_H", name, 9) == 0) { usb->frm_num_h_addr = addr; } else { avr_error ("invalid USB Int register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for usb interrupt object. */ void usb_intr_destroy (void *usb) { if (usb == NULL) return; vdev_destroy (usb); } static uint8_t usb_intr_read (VDevice *dev, int addr) { USBInter_T *usb = (USBInter_T *)dev; if (addr == usb->uier_addr) return (usb->uier); else if (addr == usb->uimsk_addr) return (usb->uimsk); else if (addr == usb->uisr_addr) return (usb->uisr = usb_port_rd (usb_intr_reg_name ((VDevice *)usb, addr))); else if (addr == usb->sprsie_addr) return (usb->sprsie); else if (addr == usb->sprsr_addr) return (usb->sprsr = usb_port_rd (usb_intr_reg_name ((VDevice *)usb, addr))); else if (addr == usb->glb_state_addr) return (usb->glb_state); else if (addr == usb->frm_num_l_addr) return (usb->frm_num_l); else if (addr == usb->frm_num_h_addr) return (usb->frm_num_h); else if (addr == usb->sprsmsk_addr) return (usb->sprsmsk); else avr_error ("Bad address: 0x%04x", addr); return 0; /* will never get here */ } static void usb_intr_write (VDevice *dev, int addr, uint8_t val) { USBInter_T *usb = (USBInter_T *)dev; if (addr == usb->uier_addr) (usb->uier = val); else if (addr == usb->uimsk_addr) (usb->uimsk = val); else if (addr == usb->sprsmsk_addr) (usb->sprsmsk = val); else if (addr == usb->sprsie_addr) (usb->sprsie = val); else if (addr == usb->uiar_addr) (usb->uiar = val); else if (addr == usb->glb_state_addr) (usb->glb_state = val); else if (addr == usb->frm_num_l_addr) (usb->frm_num_l = val); else if (addr == usb->frm_num_h_addr) (usb->frm_num_h = val); else avr_error ("Bad address: 0x%04x", addr); } static void usb_intr_reset (VDevice *dev) { USBInter_T *usb = (USBInter_T *)dev; usb->sprsr = 0; usb->uisr = 0; } static char * usb_intr_reg_name (VDevice *dev, int addr) { USBInter_T *usb = (USBInter_T *)dev; if (addr == usb->uier_addr) return ("UIER"); else if (addr == usb->uimsk_addr) return ("UIMSK"); else if (addr == usb->uisr_addr) return ("UISR"); else if (addr == usb->sprsie_addr) return ("SPRSIE"); else if (addr == usb->sprsr_addr) return ("SPRSR"); else if (addr == usb->glb_state_addr) return ("GLB_STATE"); else if (addr == usb->frm_num_l_addr) return ("FRM_NUM_L"); else if (addr == usb->frm_num_h_addr) return ("FRM_NUM_H"); else if (addr == usb->sprsmsk_addr) return ("SPRSMSK"); else if (addr == usb->uiar_addr) return ("UIAR"); else avr_error ("Bad address: 0x%04x", addr); return NULL; /* will never get here */ } /*****************************************************************************\ * * USB * \*****************************************************************************/ static void usb_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data); static uint8_t usb_read (VDevice *dev, int addr); static void usb_write (VDevice *dev, int addr, uint8_t val); static void usb_reset (VDevice *dev); static char *usb_reg_name (VDevice *dev, int addr); /** \brief Allocate a new USB structure. */ VDevice * usb_create (int addr, char *name, int rel_addr, void *data) { return (VDevice *)usb_new (addr, name); } USB_T * usb_new (int addr, char *name) { USB_T *usb; usb = avr_new (USB_T, 1); usb_construct (usb, addr, name); class_overload_destroy ((AvrClass *)usb, usb_destroy); return usb; } /** \brief Constructor for new USB object. */ void usb_construct (USB_T *usb, int addr, char *name) { if (usb == NULL) avr_error ("passed null ptr"); vdev_construct ((VDevice *)usb, usb_read, usb_write, usb_reset, usb_add_addr); usb_add_addr ((VDevice *)usb, addr, name, 0, NULL); usb_reset ((VDevice *)usb); } static void usb_add_addr (VDevice *vdev, int addr, char *name, int rel_addr, void *data) { USB_T *usb = (USB_T *)vdev; if (strncmp ("FCAR5", name, 5) == 0) usb->fcar5_addr = addr; else if (strncmp ("FCAR4", name, 5) == 0) usb->fcar4_addr = addr; else if (strncmp ("FCAR3", name, 5) == 0) usb->fcar3_addr = addr; else if (strncmp ("FCAR2", name, 5) == 0) usb->fcar2_addr = addr; else if (strncmp ("FCAR1", name, 5) == 0) usb->fcar1_addr = addr; else if (strncmp ("FCAR0", name, 5) == 0) usb->fcar0_addr = addr; else if (strncmp ("HCAR0", name, 5) == 0) usb->hcar0_addr = addr; else if (strncmp ("PSTATE1", name, 7) == 0) usb->pstate1_addr = addr; else if (strncmp ("PSTATE2", name, 7) == 0) usb->pstate2_addr = addr; else if (strncmp ("PSTATE3", name, 7) == 0) usb->pstate3_addr = addr; else if (strncmp ("PSTATE4", name, 7) == 0) usb->pstate4_addr = addr; else if (strncmp ("PSTATE5", name, 7) == 0) usb->pstate5_addr = addr; else if (strncmp ("PSTATE6", name, 7) == 0) usb->pstate6_addr = addr; else if (strncmp ("PSTATE7", name, 7) == 0) usb->pstate7_addr = addr; else if (strncmp ("PSTATE8", name, 7) == 0) usb->pstate8_addr = addr; else if (strncmp ("HPSCR1", name, 6) == 0) usb->hpscr1_addr = addr; else if (strncmp ("HPSCR2", name, 6) == 0) usb->hpscr2_addr = addr; else if (strncmp ("HPSCR3", name, 6) == 0) usb->hpscr3_addr = addr; else if (strncmp ("HPSCR4", name, 6) == 0) usb->hpscr4_addr = addr; else if (strncmp ("HPSCR5", name, 6) == 0) usb->hpscr5_addr = addr; else if (strncmp ("HPSCR6", name, 6) == 0) usb->hpscr6_addr = addr; else if (strncmp ("HPSCR7", name, 6) == 0) usb->hpscr7_addr = addr; else if (strncmp ("HPSCR8", name, 6) == 0) usb->hpscr8_addr = addr; else if (strncmp ("HPSTAT1", name, 7) == 0) usb->hpstat1_addr = addr; else if (strncmp ("HPSTAT2", name, 7) == 0) usb->hpstat2_addr = addr; else if (strncmp ("HPSTAT3", name, 7) == 0) usb->hpstat3_addr = addr; else if (strncmp ("HPSTAT4", name, 7) == 0) usb->hpstat4_addr = addr; else if (strncmp ("HPSTAT5", name, 7) == 0) usb->hpstat5_addr = addr; else if (strncmp ("HPSTAT6", name, 7) == 0) usb->hpstat6_addr = addr; else if (strncmp ("HPSTAT7", name, 7) == 0) usb->hpstat7_addr = addr; else if (strncmp ("HPSTAT8", name, 7) == 0) usb->hpstat8_addr = addr; else if (strncmp ("HPCON", name, 5) == 0) usb->hpcon_addr = addr; else if (strncmp ("HSTR", name, 4) == 0) usb->hstr_addr = addr; else if (strncmp ("FBYTE_CNT5", name, 10) == 0) usb->fbyte_cnt5_addr = addr; else if (strncmp ("FBYTE_CNT4", name, 10) == 0) usb->fbyte_cnt4_addr = addr; else if (strncmp ("FBYTE_CNT3", name, 10) == 0) usb->fbyte_cnt3_addr = addr; else if (strncmp ("FBYTE_CNT2", name, 10) == 0) usb->fbyte_cnt2_addr = addr; else if (strncmp ("FBYTE_CNT1", name, 10) == 0) usb->fbyte_cnt1_addr = addr; else if (strncmp ("FBYTE_CNT0", name, 10) == 0) usb->fbyte_cnt0_addr = addr; else if (strncmp ("HBYTE_CNT0", name, 10) == 0) usb->hbyte_cnt0_addr = addr; else if (strncmp ("FDR5", name, 4) == 0) usb->fdr5_addr = addr; else if (strncmp ("FDR4", name, 4) == 0) usb->fdr4_addr = addr; else if (strncmp ("FDR3", name, 4) == 0) usb->fdr3_addr = addr; else if (strncmp ("FDR2", name, 4) == 0) usb->fdr2_addr = addr; else if (strncmp ("FDR1", name, 4) == 0) usb->fdr1_addr = addr; else if (strncmp ("FDR0", name, 4) == 0) usb->fdr0_addr = addr; else if (strncmp ("HDR0", name, 4) == 0) usb->hdr0_addr = addr; else if (strncmp ("FCSR5", name, 5) == 0) usb->fcsr5_addr = addr; else if (strncmp ("FCSR4", name, 5) == 0) usb->fcsr4_addr = addr; else if (strncmp ("FCSR3", name, 5) == 0) usb->fcsr3_addr = addr; else if (strncmp ("FCSR2", name, 5) == 0) usb->fcsr2_addr = addr; else if (strncmp ("FCSR1", name, 5) == 0) usb->fcsr1_addr = addr; else if (strncmp ("FCSR0", name, 5) == 0) usb->fcsr0_addr = addr; else if (strncmp ("HCSR0", name, 5) == 0) usb->hcsr0_addr = addr; else if (strncmp ("FENDP5_CNTR", name, 11) == 0) usb->fendp5_cntr_addr = addr; else if (strncmp ("FENDP4_CNTR", name, 11) == 0) usb->fendp4_cntr_addr = addr; else if (strncmp ("FENDP3_CNTR", name, 11) == 0) usb->fendp3_cntr_addr = addr; else if (strncmp ("FENDP2_CNTR", name, 11) == 0) usb->fendp2_cntr_addr = addr; else if (strncmp ("FENDP1_CNTR", name, 11) == 0) usb->fendp1_cntr_addr = addr; else if (strncmp ("FENDP0_CNTR", name, 11) == 0) usb->fendp0_cntr_addr = addr; else if (strncmp ("HENDP1_CNTR", name, 11) == 0) usb->hendp1_cntr_addr = addr; else if (strncmp ("HENDP0_CNTR", name, 11) == 0) usb->hendp0_cntr_addr = addr; else if (strncmp ("FADDR", name, 5) == 0) usb->faddr_addr = addr; else if (strncmp ("HADDR", name, 5) == 0) usb->haddr_addr = addr; else if (strncmp ("ISCR", name, 4) == 0) usb->iscr_addr = addr; else if (strncmp ("UOVCER", name, 6) == 0) usb->uovcer_addr = addr; else { avr_error ("invalid USB Int register name: '%s' @ 0x%04x", name, addr); } } /** \brief Destructor for USB object. */ void usb_destroy (void *usb) { if (usb == NULL) return; vdev_destroy (usb); } static uint8_t usb_read (VDevice *dev, int addr) { USB_T *usb = (USB_T *)dev; if (addr == usb->uovcer_addr) return usb->uovcer; else if (addr == usb->haddr_addr) return usb->haddr; else if (addr == usb->faddr_addr) return usb->faddr; else if (addr == usb->hstr_addr) return usb->hstr; else if (addr == usb->hpcon_addr) return usb->hpcon; else if (addr == usb->iscr_addr) return usb->iscr; else if (addr == usb->fendp5_cntr_addr) return usb->fendp5_cntr; else if (addr == usb->fendp4_cntr_addr) return usb->fendp4_cntr; else if (addr == usb->fendp3_cntr_addr) return usb->fendp3_cntr; else if (addr == usb->fendp2_cntr_addr) return usb->fendp2_cntr; else if (addr == usb->fendp1_cntr_addr) return usb->fendp1_cntr; else if (addr == usb->fendp0_cntr_addr) return usb->fendp0_cntr; else if (addr == usb->hendp1_cntr_addr) return usb->hendp1_cntr; else if (addr == usb->hendp0_cntr_addr) return usb->hendp0_cntr; else if (addr == usb->fcsr5_addr) return usb->fcsr5 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fcsr4_addr) return usb->fcsr4 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fcsr3_addr) return usb->fcsr3 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fcsr2_addr) return usb->fcsr2 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fcsr1_addr) return usb->fcsr1 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fcsr0_addr) { usb->fcsr0 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); if (usb->fcsr0 & RX_SETUP) usb->fbyte_cnt0 = 10; return usb->fcsr0; } else if (addr == usb->hcsr0_addr) { usb->hcsr0 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); if (usb->hcsr0 & RX_SETUP) usb->hbyte_cnt0 = 10; return usb->hcsr0; } else if (addr == usb->fcar5_addr) return usb->fcar5; else if (addr == usb->fcar4_addr) return usb->fcar4; else if (addr == usb->fcar3_addr) return usb->fcar3; else if (addr == usb->fcar2_addr) return usb->fcar2; else if (addr == usb->fcar1_addr) return usb->fcar1; else if (addr == usb->fcar0_addr) return usb->fcar0; else if (addr == usb->hcar0_addr) return usb->hcar0; else if (addr == usb->hpstat1_addr) return usb->hpstat1; else if (addr == usb->hpstat2_addr) return usb->hpstat2; else if (addr == usb->hpstat3_addr) return usb->hpstat3; else if (addr == usb->hpstat4_addr) return usb->hpstat4; else if (addr == usb->hpstat5_addr) return usb->hpstat5; else if (addr == usb->hpstat6_addr) return usb->hpstat6; else if (addr == usb->hpstat7_addr) return usb->hpstat7; else if (addr == usb->hpstat8_addr) return usb->hpstat8; else if (addr == usb->pstate1_addr) return usb->pstate1; else if (addr == usb->pstate2_addr) return usb->pstate2; else if (addr == usb->pstate3_addr) return usb->pstate3; else if (addr == usb->pstate4_addr) return usb->pstate4; else if (addr == usb->pstate5_addr) return usb->pstate5; else if (addr == usb->pstate6_addr) return usb->pstate6; else if (addr == usb->pstate7_addr) return usb->pstate7; else if (addr == usb->pstate8_addr) return usb->pstate8; else if (addr == usb->hpscr1_addr) return usb->hpscr1; else if (addr == usb->hpscr2_addr) return usb->hpscr2; else if (addr == usb->hpscr3_addr) return usb->hpscr3; else if (addr == usb->hpscr4_addr) return usb->hpscr4; else if (addr == usb->hpscr5_addr) return usb->hpscr5; else if (addr == usb->hpscr6_addr) return usb->hpscr6; else if (addr == usb->hpscr7_addr) return usb->hpscr7; else if (addr == usb->hpscr8_addr) return usb->hpscr8; else if (addr == usb->fbyte_cnt5_addr) return usb->fbyte_cnt5; else if (addr == usb->fbyte_cnt4_addr) return usb->fbyte_cnt4; else if (addr == usb->fbyte_cnt3_addr) return usb->fbyte_cnt3; else if (addr == usb->fbyte_cnt2_addr) return usb->fbyte_cnt2; else if (addr == usb->fbyte_cnt1_addr) return usb->fbyte_cnt1; else if (addr == usb->fbyte_cnt0_addr) return usb->fbyte_cnt0; else if (addr == usb->hbyte_cnt0_addr) return usb->hbyte_cnt0; else if (addr == usb->fdr5_addr) return usb->fdr5 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fdr4_addr) return usb->fdr4 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fdr3_addr) return usb->fdr3 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fdr2_addr) return usb->fdr2 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fdr1_addr) return usb->fdr1 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->fdr0_addr) return usb->fdr0 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else if (addr == usb->hdr0_addr) return usb->hdr0 = usb_port_rd (usb_reg_name ((VDevice *)usb, addr)); else avr_error ("Bad address: 0x%04x", addr); return 0; /* will never get here */ } static void usb_write (VDevice *dev, int addr, uint8_t val) { USB_T *usb = (USB_T *)dev; if (addr == usb->uovcer_addr) (usb->uovcer = val); else if (addr == usb->haddr_addr) (usb->haddr = val); else if (addr == usb->faddr_addr) (usb->faddr = val); else if (addr == usb->hstr_addr) (usb->hstr = val); else if (addr == usb->hpcon_addr) (usb->hpcon = val); else if (addr == usb->fendp5_cntr_addr) usb->fendp5_cntr = val; else if (addr == usb->fendp4_cntr_addr) usb->fendp4_cntr = val; else if (addr == usb->fendp3_cntr_addr) usb->fendp3_cntr = val; else if (addr == usb->fendp2_cntr_addr) usb->fendp2_cntr = val; else if (addr == usb->fendp1_cntr_addr) usb->fendp1_cntr = val; else if (addr == usb->fendp0_cntr_addr) usb->fendp0_cntr = val; else if (addr == usb->hendp1_cntr_addr) usb->hendp1_cntr = val; else if (addr == usb->hendp0_cntr_addr) usb->hendp0_cntr = val; else if (addr == usb->fcar5_addr) { usb->fcar5 = val; usb->fcsr5 &= ~val; (usb->fbyte_cnt5) = 0; } else if (addr == usb->fcar4_addr) { usb->fcar4 = val; usb->fcsr4 &= ~val; (usb->fbyte_cnt4) = 0; } else if (addr == usb->fcar3_addr) { usb->fcar3 = val; usb->fcsr3 &= ~val; (usb->fbyte_cnt3) = 0; } else if (addr == usb->fcar2_addr) { usb->fcar2 = val; usb->fcsr2 &= ~val; (usb->fbyte_cnt2) = 0; } else if (addr == usb->fcar1_addr) { usb->fcar1 = val; usb->fcsr1 &= ~val; (usb->fbyte_cnt1) = 0; } else if (addr == usb->fcar0_addr) { usb->fcar0 = val; usb->fcsr0 &= ~val; (usb->fbyte_cnt0) = 0; } else if (addr == usb->hcar0_addr) { usb->hcar0 = val; usb->hcsr0 &= ~val; (usb->hbyte_cnt0) = 0; } else if (addr == usb->fdr5_addr) { usb->fdr5 = val; (usb->fbyte_cnt5)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else if (addr == usb->fdr4_addr) { usb->fdr4 = val; (usb->fbyte_cnt4)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else if (addr == usb->fdr3_addr) { usb->fdr3 = val; (usb->fbyte_cnt3)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else if (addr == usb->fdr2_addr) { usb->fdr2 = val; (usb->fbyte_cnt2)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else if (addr == usb->fdr1_addr) { usb->fdr1 = val; (usb->fbyte_cnt1)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else if (addr == usb->fdr0_addr) { usb->fdr0 = val; (usb->fbyte_cnt0)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else if (addr == usb->hdr0_addr) { usb->hdr0 = val; (usb->hbyte_cnt0)++; usb_port_wr (usb_reg_name ((VDevice *)usb, addr), val); } else avr_error ("Bad address: 0x%04x", addr); } static void usb_reset (VDevice *dev) { USB_T *usb = (USB_T *)dev; usb->haddr = 0; usb->faddr = 0; usb->hstr = 0; usb->hpcon = 0; usb->uovcer = 0; } static char * usb_reg_name (VDevice *dev, int addr) { USB_T *usb = (USB_T *)dev; if (addr == usb->fcar5_addr) return "FCAR5"; else if (addr == usb->fcar4_addr) return "FCAR4"; else if (addr == usb->fcar3_addr) return "FCAR3"; else if (addr == usb->fcar2_addr) return "FCAR2"; else if (addr == usb->fcar1_addr) return "FCAR1"; else if (addr == usb->fcar0_addr) return "FCAR0"; else if (addr == usb->hcar0_addr) return "HCAR0"; else if (addr == usb->pstate1_addr) return "PSTATE1"; else if (addr == usb->pstate2_addr) return "PSTATE2"; else if (addr == usb->pstate3_addr) return "PSTATE3"; else if (addr == usb->pstate4_addr) return "PSTATE4"; else if (addr == usb->pstate5_addr) return "PSTATE5"; else if (addr == usb->pstate6_addr) return "PSTATE6"; else if (addr == usb->pstate7_addr) return "PSTATE7"; else if (addr == usb->pstate8_addr) return "PSTATE8"; else if (addr == usb->hpscr1_addr) return "HPSCR1"; else if (addr == usb->hpscr2_addr) return "HPSCR2"; else if (addr == usb->hpscr3_addr) return "HPSCR3"; else if (addr == usb->hpscr4_addr) return "HPSCR4"; else if (addr == usb->hpscr5_addr) return "HPSCR5"; else if (addr == usb->hpscr6_addr) return "HPSCR6"; else if (addr == usb->hpscr7_addr) return "HPSCR7"; else if (addr == usb->hpscr8_addr) return "HPSCR8"; else if (addr == usb->hpstat1_addr) return "HPSTAT1"; else if (addr == usb->hpstat2_addr) return "HPSTAT2"; else if (addr == usb->hpstat3_addr) return "HPSTAT3"; else if (addr == usb->hpstat4_addr) return "HPSTAT4"; else if (addr == usb->hpstat5_addr) return "HPSTAT5"; else if (addr == usb->hpstat6_addr) return "HPSTAT6"; else if (addr == usb->hpstat7_addr) return "HPSTAT7"; else if (addr == usb->hpstat8_addr) return "HPSTAT8"; else if (addr == usb->hpcon_addr) return "HPCON"; else if (addr == usb->hstr_addr) return "HSTR"; else if (addr == usb->fbyte_cnt5_addr) return "FBYTE_CNT5"; else if (addr == usb->fbyte_cnt4_addr) return "FBYTE_CNT4"; else if (addr == usb->fbyte_cnt3_addr) return "FBYTE_CNT3"; else if (addr == usb->fbyte_cnt2_addr) return "FBYTE_CNT2"; else if (addr == usb->fbyte_cnt1_addr) return "FBYTE_CNT1"; else if (addr == usb->fbyte_cnt0_addr) return "FBYTE_CNT0"; else if (addr == usb->hbyte_cnt0_addr) return "HBYTE_CNT0"; else if (addr == usb->fdr5_addr) return "FDR5"; else if (addr == usb->fdr4_addr) return "FDR4"; else if (addr == usb->fdr3_addr) return "FDR3"; else if (addr == usb->fdr2_addr) return "FDR2"; else if (addr == usb->fdr1_addr) return "FDR1"; else if (addr == usb->fdr0_addr) return "FDR0"; else if (addr == usb->hdr0_addr) return "HDR0"; else if (addr == usb->fcsr5_addr) return "FCSR5"; else if (addr == usb->fcsr4_addr) return "FCSR4"; else if (addr == usb->fcsr3_addr) return "FCSR3"; else if (addr == usb->fcsr2_addr) return "FCSR2"; else if (addr == usb->fcsr1_addr) return "FCSR1"; else if (addr == usb->fcsr0_addr) return "FCSR0"; else if (addr == usb->hcsr0_addr) return "HCSR0"; else if (addr == usb->fendp5_cntr_addr) return "FENDP5_CNTR"; else if (addr == usb->fendp4_cntr_addr) return "FENDP4_CNTR"; else if (addr == usb->fendp3_cntr_addr) return "FENDP3_CNTR"; else if (addr == usb->fendp2_cntr_addr) return "FENDP2_CNTR"; else if (addr == usb->fendp1_cntr_addr) return "FENDP1_CNTR"; else if (addr == usb->fendp0_cntr_addr) return "FENDP0_CNTR"; else if (addr == usb->hendp1_cntr_addr) return "HENDP1_CNTR"; else if (addr == usb->hendp0_cntr_addr) return "HENDP0_CNTR"; else if (addr == usb->faddr_addr) return "FADDR"; else if (addr == usb->haddr_addr) return "HADDR"; else if (addr == usb->iscr_addr) return "ISCR"; else if (addr == usb->uovcer_addr) return "UOVCER"; else avr_error ("Bad address: 0x%04x", addr); return NULL; } uint8_t usb_port_rd (char *name) { int data; char line[80]; while (1) { fprintf (stderr, "\nEnter a byte of hex data to read into %s: ", name); /* try to read in a line of input */ if (fgets (line, sizeof (line), stdin) == NULL) continue; /* try to parse the line for a byte of data */ if (sscanf (line, "%x\n", &data) != 1) continue; break; } return (uint8_t) (data & 0xff); } void usb_port_wr (char *name, uint8_t val) { fprintf (stderr, "wrote 0x%02x to %s\n", val, name); } simulavr-0.1.2.2/src/usb.h0000644000175000001440000003745710024663466012211 00000000000000/* * $Id: usb.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003 Keith Gudger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef USB_H #define USB_H /****************************************************************************\ * * USBInter_T(VDevice) : USB Interrupt Mask/Flag/Enable Registers * \****************************************************************************/ enum _usb_intr_constants { USB_INTR_BASE = 0x1ff3, /* base address for vdev */ USB_INTR_SIZE = 11, /* UIER, unused, UIAR, UIMSK */ USB_INTR_ENABLE_ADDR = 0, USB_INTR_UNUSED_ADDR = 1, USB_INTR_ACK_ADDR = 2, USB_INTR_MASK_ADDR = 3, USB_INTR_STATUS_ADDR = 4, USB_INTR_SPRSMSK_ADDR = 5, USB_INTR_SPRSIE_ADDR = 6, USB_INTR_SPRSR_ADDR = 7, USB_GLB_STATE_ADDR = 8, USB_FRM_NUM_L_ADDR = 9, USB_FRM_NUM_H_ADDR = 10, }; typedef enum { bit_FEP0 = 0, /* Function Endpoint 0 interrupt enable */ bit_FEP1 = 1, /* Function Endpoint 1 interrupt enable */ bit_FEP2 = 2, /* Function Endpoint 2 interrupt enable */ bit_HEP0 = 3, /* Hub Endpoint 0 interrupt enable */ bit_FEP3 = 4, /* Function Endpoint 3 interrupt enable */ } USBMSK_BITS; typedef enum { mask_FEP0 = 1 << bit_FEP0, mask_FEP1 = 1 << bit_FEP1, mask_FEP2 = 1 << bit_FEP2, mask_HEP0 = 1 << bit_HEP0, mask_FEP3 = 1 << bit_FEP3, } USB_MASKS; typedef enum { bit_TX_COMPLETE = 0, bit_RX_OUT_PACKET = 1, bit_RX_SETUP = 2, bit_STALL_SENT = 3, bit_TX_PACKET_READY = 4, bit_FORCE_STALL = 5, bit_DATA_END = 6, bit_DATA_DIR = 7, } USBCSR_BITS; typedef enum { bit_TX_COMPLETE_ACK = 0, bit_RX_OUT_PACKET_ACK = 1, bit_RX_SETUP_ACK = 2, bit_STALL_SENT_ACK = 3, } USBCAR_BITS; typedef enum { TX_COMPLETE = 1 << bit_TX_COMPLETE, RX_OUT_PACKET = 1 << bit_RX_OUT_PACKET, RX_SETUP = 1 << bit_RX_SETUP, STALL_SENT = 1 << bit_STALL_SENT, TX_PACKET_READY = 1 << bit_TX_PACKET_READY, FORCE_STALL = 1 << bit_FORCE_STALL, DATA_END = 1 << bit_DATA_END, DATA_DIR = 1 << bit_DATA_DIR, } USBCSR_MASKS; typedef struct _USBInter_T USBInter_T; struct _USBInter_T { VDevice parent; int uier_addr; /* USB interrupt enable (mask) register */ int uiar_addr; /* USB interrupt ack register */ int uimsk_addr; /* USB interrupt mask register */ int uisr_addr; /* USB interrupt flag register */ int sprsmsk_addr; int sprsie_addr; int sprsr_addr; int glb_state_addr; int frm_num_l_addr; int frm_num_h_addr; uint8_t uier; /* USB interrupt enable (mask) register */ uint8_t uiar; /* USB interrupt ack register */ uint8_t uimsk; /* USB interrupt mask register */ uint8_t uisr; /* USB interrupt flag register */ uint8_t func_mask; /* mask of available register functions */ uint8_t sprsmsk; uint8_t sprsie; uint8_t sprsr; uint8_t glb_state; uint8_t frm_num_l; uint8_t frm_num_h; CallBack *intr_cb; /* callback for checking and raising interrupts */ }; extern VDevice *usbi_create (int addr, char *name, int rel_addr, void *data); extern USBInter_T *usb_intr_new (int addr, char *name, uint8_t data); extern void usb_intr_construct (USBInter_T *usb, int addr, char *name, uint8_t func_mask); extern void usb_intr_destroy (void *usb); /****************************************************************************\ * * USB(VDevice) : USB Structure * \****************************************************************************/ enum _usb_constants { USB_BASE = 0x1fa0, /* base memory address */ USB_SIZE = 83, /* TCCR0 and TCNT0 */ USB_FCAR5_ADDR = 0, /* offset from base to FCAR Register */ USB_FCAR4_ADDR = 1, USB_FCAR3_ADDR = 2, USB_FCAR2_ADDR = 3, USB_FCAR1_ADDR = 4, USB_FCAR0_ADDR = 5, USB_HCAR0_ADDR = 7, USB_PSTATE1_ADDR = 8, USB_PSTATE2_ADDR = 9, USB_PSTATE3_ADDR = 0x0a, USB_PSTATE4_ADDR = 0x0b, USB_PSTATE5_ADDR = 0x0c, USB_PSTATE6_ADDR = 0x0d, USB_PSTATE7_ADDR = 0x0e, USB_PSTATE8_ADDR = 0x0f, USB_HPSCR1_ADDR = 0x10, /* 0x1fb0 */ USB_HPSCR2_ADDR = 0x11, USB_HPSCR3_ADDR = 0x12, USB_HPSCR4_ADDR = 0x13, USB_HPSCR5_ADDR = 0x14, USB_HPSCR6_ADDR = 0x15, USB_HPSCR7_ADDR = 0x16, USB_HPSCR8_ADDR = 0x17, USB_HPSTAT1_ADDR = 0x18, USB_HPSTAT2_ADDR = 0x19, USB_HPSTAT3_ADDR = 0x1a, USB_HPSTAT4_ADDR = 0x1b, USB_HPSTAT5_ADDR = 0x1c, USB_HPSTAT6_ADDR = 0x1d, USB_HPSTAT7_ADDR = 0x1e, USB_HPSTAT8_ADDR = 0x1f, USB_HPCON_ADDR = 0x25, USB_HSTR_ADDR = 0x27, /* 0X1FC7 */ USB_FBYTE_CNT5_ADDR = 0x28, USB_FBYTE_CNT4_ADDR = 0x29, USB_FBYTE_CNT3_ADDR = 0x2a, USB_FBYTE_CNT2_ADDR = 0x2b, USB_FBYTE_CNT1_ADDR = 0x2c, USB_FBYTE_CNT0_ADDR = 0x2d, USB_HBYTE_CNT0_ADDR = 0x2f, USB_FDR5_ADDR = 0x30, /* 0x1fd0 */ USB_FDR4_ADDR = 0x31, USB_FDR3_ADDR = 0x32, USB_FDR2_ADDR = 0x33, USB_FDR1_ADDR = 0x34, USB_FDR0_ADDR = 0x35, USB_HDR0_ADDR = 0x37, USB_FCSR5_ADDR = 0x38, USB_FCSR4_ADDR = 0x39, USB_FCSR3_ADDR = 0x3a, USB_FCSR2_ADDR = 0x3b, USB_FCSR1_ADDR = 0x3c, USB_FCSR0_ADDR = 0x3d, USB_HCSR0_ADDR = 0x3f, USB_FENDP5_CNTR_ADDR = 0x40, /* 0x1fe0 */ USB_FENDP4_CNTR_ADDR = 0x41, USB_FENDP3_CNTR_ADDR = 0x42, USB_FENDP2_CNTR_ADDR = 0x43, USB_FENDP1_CNTR_ADDR = 0x44, USB_FENDP0_CNTR_ADDR = 0x45, USB_HENDP1_CNTR_ADDR = 0x46, USB_HENDP0_CNTR_ADDR = 0x47, USB_FADDR_ADDR = 0x4e, /* 0x1fee */ USB_HADDR_ADDR = 0x4f, USB_ISCR_ADDR = 0x51, /* 0x1ff1 */ USB_UOVCER_ADDR = 0x52, /* 0x1ff2 */ }; typedef struct _USB USB_T; struct _USB { VDevice parent; uint16_t uovcer_addr; /* overcurrent register */ uint16_t haddr_addr; /* Hub Address register */ uint16_t faddr_addr; /* Function Address register */ uint16_t hstr_addr; /* Hub Status register */ uint16_t hpcon_addr; /* Hub Port Control register */ uint16_t iscr_addr; /* interrupt control sense register */ uint16_t fendp5_cntr_addr; /* endpoint 5 control register */ uint16_t fendp4_cntr_addr; /* endpoint 4 control register */ uint16_t fendp3_cntr_addr; /* endpoint 3 control register */ uint16_t fendp2_cntr_addr; /* endpoint 2 control register */ uint16_t fendp1_cntr_addr; /* endpoint 1 control register */ uint16_t fendp0_cntr_addr; /* endpoint 0 control register */ uint16_t hendp1_cntr_addr; /* hub endpoint control register */ uint16_t hendp0_cntr_addr; /* hub endpoint control register */ uint16_t fcsr5_addr; /* endpoint 5 control & status register */ uint16_t fcsr4_addr; /* endpoint 4 control & status register */ uint16_t fcsr3_addr; /* endpoint 3 control & status register */ uint16_t fcsr2_addr; /* endpoint 2 control & status register */ uint16_t fcsr1_addr; /* endpoint 1 control & status register */ uint16_t fcsr0_addr; /* endpoint 0 control & status register */ uint16_t hcsr0_addr; /* hub endpoint control & status register */ uint16_t fcar5_addr; /* endpoint 5 control & ack register */ uint16_t fcar4_addr; /* endpoint 4 control & ack register */ uint16_t fcar3_addr; /* endpoint 3 control & ack register */ uint16_t fcar2_addr; /* endpoint 2 control & ack register */ uint16_t fcar1_addr; /* endpoint 1 control & ack register */ uint16_t fcar0_addr; /* endpoint 0 control & ack register */ uint16_t hcar0_addr; /* hub endpoint control & ack register */ uint16_t hpstat1_addr; /* hub port 1 status register */ uint16_t hpstat2_addr; /* hub port 2 status register */ uint16_t hpstat3_addr; /* hub port 3 status register */ uint16_t hpstat4_addr; /* hub port 4 status register */ uint16_t hpstat5_addr; /* hub port 5 status register */ uint16_t hpstat6_addr; /* hub port 6 status register */ uint16_t hpstat7_addr; /* hub port 7 status register */ uint16_t hpstat8_addr; /* hub port 8 status register */ uint16_t pstate1_addr; /* hub port 1 port state register */ uint16_t pstate2_addr; /* hub port 2 port state register */ uint16_t pstate3_addr; /* hub port 3 port state register */ uint16_t pstate4_addr; /* hub port 4 port state register */ uint16_t pstate5_addr; /* hub port 5 port state register */ uint16_t pstate6_addr; /* hub port 6 port state register */ uint16_t pstate7_addr; /* hub port 7 port state register */ uint16_t pstate8_addr; /* hub port 8 port state register */ uint16_t hpscr1_addr; /* hub port 1 status change register */ uint16_t hpscr2_addr; /* hub port 2 status change register */ uint16_t hpscr3_addr; /* hub port 3 status change register */ uint16_t hpscr4_addr; /* hub port 4 status change register */ uint16_t hpscr5_addr; /* hub port 5 status change register */ uint16_t hpscr6_addr; /* hub port 6 status change register */ uint16_t hpscr7_addr; /* hub port 7 status change register */ uint16_t hpscr8_addr; /* hub port 8 status change register */ uint16_t fdr5_addr; /* endpoint 5 data register */ uint16_t fdr4_addr; /* endpoint 4 data register */ uint16_t fdr3_addr; /* endpoint 3 data register */ uint16_t fdr2_addr; /* endpoint 2 data register */ uint16_t fdr1_addr; /* endpoint 1 data register */ uint16_t fdr0_addr; /* endpoint 0 data register */ uint16_t hdr0_addr; /* hub endpoint data register */ uint16_t fbyte_cnt5_addr; /* byte count register */ uint16_t fbyte_cnt4_addr; /* byte count register */ uint16_t fbyte_cnt3_addr; /* byte count register */ uint16_t fbyte_cnt2_addr; /* byte count register */ uint16_t fbyte_cnt1_addr; /* byte count register */ uint16_t fbyte_cnt0_addr; /* byte count register */ uint16_t hbyte_cnt0_addr; /* byte count register */ uint8_t uovcer; /* overcurrent register */ uint8_t haddr; /* Hub Address register */ uint8_t faddr; /* Function Address register */ uint8_t hstr; /* Hub Status register */ uint8_t hpcon; /* Hub Port Control register */ uint8_t iscr; /* interrupt control sense register */ uint8_t fendp5_cntr; /* endpoint 5 control register */ uint8_t fendp4_cntr; /* endpoint 4 control register */ uint8_t fendp3_cntr; /* endpoint 3 control register */ uint8_t fendp2_cntr; /* endpoint 2 control register */ uint8_t fendp1_cntr; /* endpoint 1 control register */ uint8_t fendp0_cntr; /* endpoint 0 control register */ uint8_t hendp1_cntr; /* hub endpoint control register */ uint8_t hendp0_cntr; /* hub endpoint control register */ uint8_t fcsr5; /* endpoint 5 control & status register */ uint8_t fcsr4; /* endpoint 4 control & status register */ uint8_t fcsr3; /* endpoint 3 control & status register */ uint8_t fcsr2; /* endpoint 2 control & status register */ uint8_t fcsr1; /* endpoint 1 control & status register */ uint8_t fcsr0; /* endpoint 0 control & status register */ uint8_t hcsr0; /* hub endpoint control & status register */ uint8_t fcar5; /* endpoint 5 control & ack register */ uint8_t fcar4; /* endpoint 4 control & ack register */ uint8_t fcar3; /* endpoint 3 control & ack register */ uint8_t fcar2; /* endpoint 2 control & ack register */ uint8_t fcar1; /* endpoint 1 control & ack register */ uint8_t fcar0; /* endpoint 0 control & ack register */ uint8_t hcar0; /* hub endpoint control & ack register */ uint8_t hpstat1; /* hub port 1 status register */ uint8_t hpstat2; /* hub port 2 status register */ uint8_t hpstat3; /* hub port 3 status register */ uint8_t hpstat4; /* hub port 4 status register */ uint8_t hpstat5; /* hub port 5 status register */ uint8_t hpstat6; /* hub port 6 status register */ uint8_t hpstat7; /* hub port 7 status register */ uint8_t hpstat8; /* hub port 8 status register */ uint8_t pstate1; /* hub port 1 port state register */ uint8_t pstate2; /* hub port 2 port state register */ uint8_t pstate3; /* hub port 3 port state register */ uint8_t pstate4; /* hub port 4 port state register */ uint8_t pstate5; /* hub port 5 port state register */ uint8_t pstate6; /* hub port 6 port state register */ uint8_t pstate7; /* hub port 7 port state register */ uint8_t pstate8; /* hub port 8 port state register */ uint8_t hpscr1; /* hub port 1 status change register */ uint8_t hpscr2; /* hub port 2 status change register */ uint8_t hpscr3; /* hub port 3 status change register */ uint8_t hpscr4; /* hub port 4 status change register */ uint8_t hpscr5; /* hub port 5 status change register */ uint8_t hpscr6; /* hub port 6 status change register */ uint8_t hpscr7; /* hub port 7 status change register */ uint8_t hpscr8; /* hub port 8 status change register */ uint8_t fdr5; /* endpoint 5 data register */ uint8_t fdr4; /* endpoint 4 data register */ uint8_t fdr3; /* endpoint 3 data register */ uint8_t fdr2; /* endpoint 2 data register */ uint8_t fdr1; /* endpoint 1 data register */ uint8_t fdr0; /* endpoint 0 data register */ uint8_t hdr0; /* hub endpoint data register */ uint8_t fbyte_cnt5; /* byte count register */ uint8_t fbyte_cnt4; /* byte count register */ uint8_t fbyte_cnt3; /* byte count register */ uint8_t fbyte_cnt2; /* byte count register */ uint8_t fbyte_cnt1; /* byte count register */ uint8_t fbyte_cnt0; /* byte count register */ uint8_t hbyte_cnt0; /* byte count register */ }; extern VDevice *usb_create (int addr, char *name, int rel_addr, void *data); extern USB_T *usb_new (int addr, char *name); extern void usb_construct (USB_T *usb, int addr, char *name); extern void usb_destroy (void *usb); extern void usb_intr_set_flag (USB_T *usb, uint8_t bitnr); extern void usb_intr_clear_flag (USB_T *usb, uint8_t bitnr); #endif /* USB_H */ simulavr-0.1.2.2/src/utils.c0000644000175000001440000002157307762602571012550 00000000000000/* * $Id: utils.c,v 1.19 2003/12/01 09:10:17 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /** * \file utils.c * \brief Utility functions. * * This module provides general purpose utilities. */ #include #include #include #include #include #include #include #include "avrerror.h" #include "avrmalloc.h" #include "avrclass.h" #include "utils.h" /** \brief Utility function to convert a string to a FileFormatType code. */ int str2ffmt (char *str) { if (strncmp (str, "bin", 3) == 0) return FFMT_BIN; if (strncmp (str, "ihex", 4) == 0) return FFMT_IHEX; if (strncmp (str, "elf", 3) == 0) return FFMT_ELF; return -1; } /** \brief Set a bit in src to 1 if val != 0, clears bit if val == 0. */ extern inline uint8_t set_bit_in_byte (uint8_t src, int bit, int val); /** \brief Set a bit in src to 1 if val != 0, clears bit if val == 0. */ extern inline uint16_t set_bit_in_word (uint16_t src, int bit, int val); /** \brief Return the number of milliseconds of elapsed program time. \return an unsigned 64 bit number. Time zero is not well defined, so only time differences should be used. */ uint64_t get_program_time (void) { uint64_t result; struct timeval tv; if (gettimeofday (&tv, NULL) < 0) avr_error ("Failed to get program time."); result = ((uint64_t) tv.tv_sec * 1000) + ((uint64_t) tv.tv_usec / 1000); return result; } /***************************************************************************\ * * DList(AvrClass) Methods : A doubly linked list. * \***************************************************************************/ static DList *dlist_new_node (AvrClass *data); static void dlist_construct_node (DList *node, AvrClass *data); static void dlist_destroy_node (void *node); #ifndef DOXYGEN /* Don't expose to doxygen, structure is opaque. */ struct _DList { AvrClass parent; struct _DList *prev; struct _DList *next; AvrClass *data; }; #endif static DList * dlist_new_node (AvrClass *data) { DList *node; node = avr_new (DList, 1); dlist_construct_node (node, data); class_overload_destroy ((AvrClass *)node, dlist_destroy_node); return node; } static void dlist_construct_node (DList *node, AvrClass *data) { if (node == NULL) avr_error ("passed null ptr"); class_construct ((AvrClass *)node); node->prev = NULL; node->next = NULL; node->data = data; } static void dlist_destroy_node (void *node) { DList *_node = (DList *)node; if (_node == NULL) return; class_unref (_node->data); class_destroy (node); } /** \brief Add a new node to the end of the list. If cmp argument is not NULL, use cmp() to see if node already exists and don't add node if it exists. It is the responsibility of this function to unref data if not added. */ DList * dlist_add (DList *head, AvrClass *data, DListFP_Cmp cmp) { DList *node = head; if (head == NULL) /* The list is empty, make new node the head. */ return dlist_new_node (data); /* Walk the list to find the end */ while (node) { if (cmp && ((*cmp) (node->data, data) == 0)) { /* node already exists and we were asked to keep nodes unique */ class_unref (data); break; } if (node->next == NULL) { /* at the tail */ node->next = dlist_new_node (data); node->next->prev = node; break; } /* move on to next node */ node = node->next; } return head; } /** \brief Add a new node at the head of the list. */ DList * dlist_add_head (DList *head, AvrClass *data) { DList *node = dlist_new_node (data);; if (head) { head->prev = node; node->next = head; } return node; } /** \brief Conditionally delete a node from the list. Delete a node from the list if the node's data matches the specified data. Returns the head of the modified list. */ DList * dlist_delete (DList *head, AvrClass *data, DListFP_Cmp cmp) { DList *node = head; if (cmp == NULL) avr_error ("compare function not specified"); while (node) { if ((*cmp) (node->data, data) == 0) { if ((node->prev == NULL) && (node->next == NULL)) { /* deleting only node in list (node is head and tail) */ head = NULL; } else if (node->prev == NULL) { /* node is head, but other nodes exist */ node->next->prev = NULL; head = node->next; } else if (node->next == NULL) { /* node is tail, but other nodes exist */ node->prev->next = NULL; } else { /* node is not head nor tail */ node->prev->next = node->next; node->next->prev = node->prev; } /* this will also unref the node->data */ class_unref ((AvrClass *)node); return head; } /* move on to next node */ node = node->next; } /* if we get here, data wasn't found, just return original head */ return head; } /** \brief Blow away the entire list. */ void dlist_delete_all (DList *head) { DList *node; while (head) { node = head; head = head->next; class_unref ((AvrClass *)node); } } /** \brief Lookup an item in the list. Walk the list pointed to by head and return a pointer to the data if found. If not found, return NULL. \param head The head of the list to be iterated. \param data The data to be passed to the func when it is applied. \param cmp A function to be used for comparing the items. \return A pointer to the data found, or NULL if not found. */ AvrClass * dlist_lookup (DList *head, AvrClass *data, DListFP_Cmp cmp) { DList *node = head; if (cmp == NULL) avr_error ("compare function not specified"); while (node) { if ((*cmp) (node->data, data) == 0) return node->data; node = node->next; } /* If we get here, no node was found, return NULL. */ return NULL; } /** \brief Extract the data from the head of the list. Returns the data element for the head of the list. If the list is empty, return a NULL pointer. \param head The head of the list. \return A pointer to the data found, or NULL if not found. */ AvrClass * dlist_get_head_data (DList *head) { if (head == NULL) { return NULL; } return head->data; } /* a simple node compare function for the iterator. */ static int dlist_iterator_cmp (AvrClass *n1, AvrClass *n2) { /* Since this is only used in the iterator, we are guaranteed that it is safe to compare data pointers because both n1 and n2 came from the list. */ return (int)(n1 - n2); } /** \brief Iterate over all elements of the list. For each element, call the user supplied iterator function and pass it the node data and the user_data. If the iterator function return non-zero, remove the node from the list. \param head The head of the list to be iterated. \param func The function to be applied. \param user_data The data to be passed to the func when it is applied. \return A pointer to the head of the possibly modified list. */ DList * dlist_iterator (DList *head, DListFP_Iter func, void *user_data) { DList *node = head; if (func == NULL) avr_error ("no iteration func supplied"); while (node) { if ((*func) (node->data, user_data)) { /* remove node */ head = dlist_delete (head, node->data, dlist_iterator_cmp); } node = node->next; } return head; } simulavr-0.1.2.2/src/utils.h0000644000175000001440000000612107762567532012554 00000000000000/* * $Id: utils.h,v 1.6 2003/12/01 07:35:54 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_UTILS_H #define SIM_UTILS_H /****************************************************************************\ * * File Format Types * \****************************************************************************/ enum FileFormatType { FFMT_BIN, /* Raw Binary image */ FFMT_IHEX, /* Intel hex format */ FFMT_ELF, /* GCC ELF */ }; extern int str2ffmt (char *str); /****************************************************************************\ * * Utilities for setting or clearing a bit in a byte or word. * \****************************************************************************/ extern inline uint8_t set_bit_in_byte (uint8_t src, int bit, int val) { return ((src & ~(1 << bit)) | ((val != 0) << bit)); } extern inline uint16_t set_bit_in_word (uint16_t src, int bit, int val) { return ((src & ~(1 << bit)) | ((val != 0) << bit)); } /****************************************************************************\ * * Utility for getting elapsed program time in milliseconds. * \****************************************************************************/ extern uint64_t get_program_time (void); /****************************************************************************\ * * DList(AvrClass) Methods : A doubly linked list. * \****************************************************************************/ typedef struct _DList DList; typedef int (*DListFP_Cmp) (AvrClass *d1, AvrClass *d2); typedef int (*DListFP_Iter) (AvrClass *data, void *user_data); extern DList *dlist_add (DList *head, AvrClass *data, DListFP_Cmp cmp); extern DList *dlist_add_head (DList *head, AvrClass *data); extern DList *dlist_delete (DList *head, AvrClass *data, DListFP_Cmp cmp); extern void dlist_delete_all (DList *head); extern AvrClass *dlist_lookup (DList *head, AvrClass *data, DListFP_Cmp cmp); extern AvrClass *dlist_get_head_data (DList *head); extern DList *dlist_iterator (DList *head, DListFP_Iter func, void *user_data); #endif /* SIM_UTILS_H */ simulavr-0.1.2.2/src/vdevs.h0000644000175000001440000000702210006401504012507 00000000000000/* * $Id: vdevs.h,v 1.31 2004/01/30 07:09:56 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003, 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef SIM_VDEVS_H #define SIM_VDEVS_H /****************************************************************************\ * * Virtual Device Definition. * \****************************************************************************/ typedef struct _VDevice VDevice; typedef VDevice *(*VDevCreate) (int addr, char *name, int rel_addr, void *data); typedef uint8_t (*VDevFP_Read) (VDevice *dev, int addr); typedef void (*VDevFP_Write) (VDevice *dev, int addr, uint8_t val); typedef void (*VDevFP_Reset) (VDevice *dev); typedef void (*VDevFP_AddAddr) (VDevice *dev, int addr, char *name, int rel_addr, void *data); struct _VDevice { AvrClass parent; AvrClass *core; /* keep a pointer to the core the device is attached to */ VDevFP_Read read; /* read access for device */ VDevFP_Write write; /* write access for device */ VDevFP_Reset reset; /* reset function for device */ VDevFP_AddAddr add_addr; /* add an address to the list of addresses handled by this vdev */ }; extern VDevice *vdev_new (char *name, VDevFP_Read rd, VDevFP_Write wr, VDevFP_Reset reset, VDevFP_AddAddr add_addr); extern void vdev_construct (VDevice *dev, VDevFP_Read rd, VDevFP_Write wr, VDevFP_Reset reset, VDevFP_AddAddr add_addr); extern void vdev_destroy (void *dev); extern int vdev_name_cmp (AvrClass *c1, AvrClass *c2); extern int vdev_addr_cmp (AvrClass *c1, AvrClass *c2); extern uint8_t vdev_read (VDevice *dev, int addr); extern void vdev_write (VDevice *dev, int addr, uint8_t val); extern void vdev_reset (VDevice *dev); extern void vdev_set_core (VDevice *dev, AvrClass *core); extern inline AvrClass *vdev_get_core (VDevice *dev) { return dev->core; } extern void vdev_add_addr (VDevice *dev, int addr, char *name, int rel_addr, void *data); extern void vdev_def_AddAddr (VDevice *dev, int addr, char *name, int rel_addr, void *data); /****************************************************************************\ * * Include Virtual Device Definitions * \****************************************************************************/ #if 1 /* Make these go away! */ enum __io_reg_constants { IO_REG_ADDR_BEGIN = 0x20, IO_REG_ADDR_END = 0x60, }; #endif #endif /* SIM_VDEVS_H */ simulavr-0.1.2.2/src/defn/0000777000175000001440000000000010204750217012216 500000000000000simulavr-0.1.2.2/src/defn/90s1200.h0000644000175000001440000000642410007326245013230 00000000000000/* * $Id: 90s1200.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) static DevSuppDefn defn_at90s1200 = { .name = "at90s1200", .stack_type = STACK_HARDWARE, .irq_vect_idx = VTAB_AT90S1200, .size = { .pc = 2, .stack = 3, .flash = 1024, .sram = 0, .eeprom = 64 }, .io_reg = { { .addr = 0x28, .name = "ACSR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3c, .name = "EECR", }, { .addr = 0x3d, .name = "EEDR", }, { .addr = 0x3e, .name = "EEAR", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", }, { .addr = 0x59, .name = "TIMSK", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/90s2313.h0000644000175000001440000001010110007326245013221 00000000000000/* * $Id: 90s2313.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_at90s2313 = { .name = "at90s2313", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT90S2313, .size = { .pc = 2, .stack = 0, .flash = 2 * 1024, .sram = 128, .eeprom = 128 }, .io_reg = { { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRR", }, { .addr = 0x2a, .name = "UCR", }, { .addr = 0x2b, .name = "USR", }, { .addr = 0x2c, .name = "UDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3c, .name = "EECR", }, { .addr = 0x3d, .name = "EEDR", }, { .addr = 0x3e, .name = "EEAR", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", }, { .addr = 0x59, .name = "TIMSK", }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/90s4414.h0000644000175000001440000001321310007326245013234 00000000000000/* * $Id: 90s4414.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_at90s4414 = { .name = "at90s4414", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT90S4414, .size = { .pc = 2, .stack = 0, .flash = 4 * 1024, .sram = 256, .eeprom = 256 }, .io_reg = { { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRR", }, { .addr = 0x2a, .name = "UCR", }, { .addr = 0x2b, .name = "USR", }, { .addr = 0x2c, .name = "UDR", }, { .addr = 0x2d, .name = "SPCR", }, { .addr = 0x2e, .name = "SPSR", }, { .addr = 0x2f, .name = "SPDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3c, .name = "EECR", }, { .addr = 0x3d, .name = "EEDR", }, { .addr = 0x3e, .name = "EEARL", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCR1BL", }, { .addr = 0x49, .name = "OCR1BH", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", }, { .addr = 0x59, .name = "TIMSK", }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/90s8515.h0000644000175000001440000001326710007326245013253 00000000000000/* * $Id: 90s8515.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_at90s8515 = { .name = "at90s8515", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT90S4414, .size = { .pc = 2, .stack = 0, .flash = 8 * 1024, .sram = 512, .eeprom = 512 }, .io_reg = { { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRR", }, { .addr = 0x2a, .name = "UCR", }, { .addr = 0x2b, .name = "USR", }, { .addr = 0x2c, .name = "UDR", }, { .addr = 0x2d, .name = "SPCR", }, { .addr = 0x2e, .name = "SPSR", }, { .addr = 0x2f, .name = "SPDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3c, .name = "EECR", }, { .addr = 0x3d, .name = "EEDR", }, { .addr = 0x3e, .name = "EEARL", }, { .addr = 0x3f, .name = "EEARH", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCR1BL", }, { .addr = 0x49, .name = "OCR1BH", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", }, { .addr = 0x59, .name = "TIMSK", }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/mega8.h0000644000175000001440000001330510007326245013307 00000000000000/* * $Id: mega8.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_atmega8 = { .name = "atmega8", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_ATMEGA8, .size = { .pc = 2, .stack = 0, .flash = 8 * 1024, .sram = 1 * 1024, .eeprom = 512 }, .io_reg = { { .addr = 0x20, .name = "TWBR", }, { .addr = 0x21, .name = "TWSR", }, { .addr = 0x22, .name = "TWAR", }, { .addr = 0x23, .name = "TWDR", }, { .addr = 0x24, .name = "ADCL", }, { .addr = 0x25, .name = "ADCH", }, { .addr = 0x26, .name = "ADCSRA", }, { .addr = 0x27, .name = "ADMUX", }, { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRRL", }, { .addr = 0x2a, .name = "UCSRB", }, { .addr = 0x2b, .name = "UCSRA", }, { .addr = 0x2c, .name = "UDR", }, { .addr = 0x2d, .name = "SPCR", }, { .addr = 0x2e, .name = "SPSR", }, { .addr = 0x2f, .name = "SPDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x40, .name = "UBRRH", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x42, .name = "ASSR", }, { .addr = 0x43, .name = "OCR2", }, { .addr = 0x44, .name = "TCNT2", }, { .addr = 0x45, .name = "TCCR2", }, { .addr = 0x46, .name = "ICR1L", }, { .addr = 0x47, .name = "ICR1H", }, { .addr = 0x48, .name = "OCR1BL", }, { .addr = 0x49, .name = "OCR1BH", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x50, .name = "SFIOR", }, { .addr = 0x51, .name = "OSCCAL", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x54, .name = "MCUCSR", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x56, .name = "TWCR", }, { .addr = 0x57, .name = "SPMCR", }, { .addr = 0x58, .name = "TIFR", }, { .addr = 0x59, .name = "TIMSK", }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GICR", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/mega16.h0000644000175000001440000001451210007326245013367 00000000000000/* * $Id: mega16.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_atmega16 = { .name = "atmega16", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_ATMEGA16, .size = { .pc = 2, .stack = 0, .flash = 16 * 1024, .sram = 1 * 1024, .eeprom = 512 }, .io_reg = { { .addr = 0x20, .name = "TWBR", }, { .addr = 0x21, .name = "TWSR", }, { .addr = 0x22, .name = "TWAR", }, { .addr = 0x23, .name = "TWDR", }, { .addr = 0x24, .name = "ADCL", }, { .addr = 0x25, .name = "ADCH", }, { .addr = 0x26, .name = "ADCSRA", }, { .addr = 0x27, .name = "ADMUX", }, { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRRL", }, { .addr = 0x2a, .name = "UCSRB", }, { .addr = 0x2b, .name = "UCSRA", }, { .addr = 0x2c, .name = "UDR", }, { .addr = 0x2d, .name = "SPCR", }, { .addr = 0x2e, .name = "SPSR", }, { .addr = 0x2f, .name = "SPDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x40, .name = "UBRRH", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x42, .name = "ASSR", }, { .addr = 0x43, .name = "OCR2", }, { .addr = 0x44, .name = "TCNT2", }, { .addr = 0x45, .name = "TCCR2", }, { .addr = 0x46, .name = "ICR1L", }, { .addr = 0x47, .name = "ICR1H", }, { .addr = 0x48, .name = "OCR1BL", }, { .addr = 0x49, .name = "OCR1BH", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x50, .name = "SFIOR", }, { .addr = 0x51, .name = "OCDR", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x54, .name = "MCUCSR", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x56, .name = "TWCR", }, { .addr = 0x57, .name = "SPMCR", }, { .addr = 0x58, .name = "TIFR", }, { .addr = 0x59, .name = "TIMSK", }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GICR", }, { .addr = 0x5c, .name = "OCR0", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/mega103.h0000644000175000001440000001606610007326245013452 00000000000000/* * $Id: mega103.h,v 1.1 2004/02/02 01:49:25 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_atmega103 = { .name = "atmega103", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_ATMEGA103, .size = { .pc = 2, .stack = 0, .flash = 128 * 1024, .sram = 4000, /* last internal address at 0x0fff */ .eeprom = 4 * 1024 }, .io_reg = { { .addr = 0x20, .name = "PINF", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x21, .name = "PINE", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x22, .name = "DDRE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x23, .name = "PORTE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x24, .name = "ADCL", }, { .addr = 0x25, .name = "ADCH", }, { .addr = 0x26, .name = "ADCSR", }, { .addr = 0x27, .name = "ADMUX", }, { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRR", }, { .addr = 0x2a, .name = "UCR", }, { .addr = 0x2b, .name = "USR", }, { .addr = 0x2c, .name = "UDR", }, { .addr = 0x2d, .name = "SPCR", }, { .addr = 0x2e, .name = "SPSR", }, { .addr = 0x2f, .name = "SPDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x43, .name = "OCR2", }, { .addr = 0x44, .name = "TCNT2", }, { .addr = 0x45, .name = "TCCR2", }, { .addr = 0x46, .name = "ICR1L", }, { .addr = 0x47, .name = "ICR1H", }, { .addr = 0x48, .name = "OCR1BL", }, { .addr = 0x49, .name = "OCR1BH", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x50, .name = "ASSR", }, { .addr = 0x51, .name = "OCR0", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x54, .name = "MCUSR", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x56, .name = "TIFR", }, { .addr = 0x57, .name = "TIMSK", }, { .addr = 0x58, .name = "EIFR", }, { .addr = 0x59, .name = "EIMSK", }, { .addr = 0x5a, .name = "EICR", }, { .addr = 0x5b, .name = "RAMPZ", .vdev_create = rampz_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0x01, }, { .addr = 0x5c, .name = "XDIV", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/mega128.h0000644000175000001440000002325610122056424013455 00000000000000/* * $Id: mega128.h,v 1.2 2004/09/15 15:17:40 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static DevSuppDefn defn_atmega128 = { .name = "atmega128", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_ATMEGA128, .has_ext_io_reg = 1, .size = { .pc = 2, .stack = 0, .flash = 128 * 1024, .sram = 4 * 1024, .eeprom = 4 * 1024 }, .io_reg = { { .addr = 0x20, .name = "PINF", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x21, .name = "PINE", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x22, .name = "DDRE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x23, .name = "PORTE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x24, .name = "ADCL", }, { .addr = 0x25, .name = "ADCH", }, { .addr = 0x26, .name = "ADCSRA", }, { .addr = 0x27, .name = "ADMUX", }, { .addr = 0x28, .name = "ACSR", }, { .addr = 0x29, .name = "UBRR0L", }, { .addr = 0x2a, .name = "UCSR0B", }, { .addr = 0x2b, .name = "UCSR0A", }, { .addr = 0x2c, .name = "UDR0", }, { .addr = 0x2d, .name = "SPCR", }, { .addr = 0x2e, .name = "SPSR", }, { .addr = 0x2f, .name = "SPDR", }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x40, .name = "SFIOR", }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x42, .name = "OCDR", }, { .addr = 0x43, .name = "OCR2", }, { .addr = 0x44, .name = "TCNT2", }, { .addr = 0x45, .name = "TCCR2", }, { .addr = 0x46, .name = "ICR1L", }, { .addr = 0x47, .name = "ICR1H", }, { .addr = 0x48, .name = "OCR1BL", }, { .addr = 0x49, .name = "OCR1BH", }, { .addr = 0x4a, .name = "OCR1AL", }, { .addr = 0x4b, .name = "OCR1AH", }, { .addr = 0x4c, .name = "TCNT1L", }, { .addr = 0x4d, .name = "TCNT1H", }, { .addr = 0x4e, .name = "TCCR1B", }, { .addr = 0x4f, .name = "TCCR1A", }, { .addr = 0x50, .name = "ASSR", }, { .addr = 0x51, .name = "OCR0", }, { .addr = 0x52, .name = "TCNT0", }, { .addr = 0x53, .name = "TCCR0", }, { .addr = 0x54, .name = "MCUCSR", }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x56, .name = "TIFR", }, { .addr = 0x57, .name = "TIMSK", }, { .addr = 0x58, .name = "EIFR", }, { .addr = 0x59, .name = "EIMSK", }, { .addr = 0x5a, .name = "EICRB", }, { .addr = 0x5b, .name = "RAMPZ", .vdev_create = rampz_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0x01, }, { .addr = 0x5c, .name = "XDIV", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x61, .name = "DDRF", .ref_addr = 0x20, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x62, .name = "PORTF", .ref_addr = 0x20, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x63, .name = "PING", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x1f, .wr_mask = 0x1f, }, { .addr = 0x64, .name = "DDRG", .ref_addr = 0x63, .reset_value = 0x00, .rd_mask = 0x1f, .wr_mask = 0x1f, }, { .addr = 0x65, .name = "PORTG", .ref_addr = 0x63, .reset_value = 0x00, .rd_mask = 0x1f, .wr_mask = 0x1f, }, { .addr = 0x68, .name = "SPMCSR", }, { .addr = 0x6a, .name = "EICRA", }, { .addr = 0x6c, .name = "XMCRB", }, { .addr = 0x6d, .name = "XMCRA", }, { .addr = 0x6f, .name = "OSCCAL", }, { .addr = 0x70, .name = "TWBR", }, { .addr = 0x71, .name = "TWSR", }, { .addr = 0x72, .name = "TWAR", }, { .addr = 0x73, .name = "TWDR", }, { .addr = 0x74, .name = "TWCR", }, { .addr = 0x78, .name = "OCR1CL", }, { .addr = 0x79, .name = "OCR1CH", }, { .addr = 0x7a, .name = "TCCR1C", }, { .addr = 0x7c, .name = "ETIFR", }, { .addr = 0x7d, .name = "ETIMSK", }, { .addr = 0x80, .name = "ICR3L", }, { .addr = 0x81, .name = "ICR3H", }, { .addr = 0x82, .name = "OCR3CL", }, { .addr = 0x83, .name = "OCR3CH", }, { .addr = 0x84, .name = "OCR3BL", }, { .addr = 0x85, .name = "OCR3BH", }, { .addr = 0x86, .name = "OCR3AL", }, { .addr = 0x87, .name = "OCR3AH", }, { .addr = 0x88, .name = "TCNT3L", }, { .addr = 0x89, .name = "TCNT3H", }, { .addr = 0x8a, .name = "TCCR3B", }, { .addr = 0x8b, .name = "TCCR3A", }, { .addr = 0x8c, .name = "TCCR3C", }, { .addr = 0x90, .name = "UBRR0H", }, { .addr = 0x95, .name = "UCSR0C", }, { .addr = 0x98, .name = "UBRR1H", }, { .addr = 0x99, .name = "UBRR1L", }, { .addr = 0x9a, .name = "UCSR1B", }, { .addr = 0x9b, .name = "UCSR1A", }, { .addr = 0x9c, .name = "UDR1", }, { .addr = 0x9d, .name = "UCSR1C", }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/43usb320.h0000644000175000001440000004607110024663466013511 00000000000000/* * $Id: 43usb320.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static uint8_t uart_data_320 = UART; static uint8_t uier_320 = (mask_FEP0 | mask_FEP1 | mask_FEP2 | mask_FEP3 | mask_HEP0); static uint8_t timer_mask_320 = (mask_TOIE1 | mask_OCIE1A | mask_OCIE1B | mask_TICIE1 | mask_TOIE0); static uint8_t timer1_def_320 = TD_TIMER1; static uint8_t ocr1a_def_320 = OCR1A_DEF; static uint8_t ocr1b_def_320 = OCR1B_DEF; static DevSuppDefn defn_at43usb320 = { .name = "at43usb320", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT43USB320, .size = { .pc = 2, .stack = 0, .flash = 32 * 1024, .sram = 512, .eeprom = 0 }, .io_reg = { { .addr = 0x29, .name = "UBRR", .vdev_create = uart_int_create, .data = &uart_data_320, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x2a, .name = "UCR", .ref_addr = 0x29, .reset_value = 0x00, .rd_mask = 0xfe, .wr_mask = 0xfd, }, { .addr = 0x2b, .name = "USR", .ref_addr = 0x29, .reset_value = 0x00, .rd_mask = 0xf7, .wr_mask = 0x40, }, { .addr = 0x2c, .name = "UDR", .vdev_create = uart_create, .related = 0x29, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x2d, .name = "SPCR", .vdev_create = spii_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x2e, .name = "SPSR", .ref_addr = 0x2d, .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x2f, .name = "SPDR", .vdev_create = spi_create, .related = 0x2d, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCRBL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1b_def_320, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x49, .name = "OCRBH", .ref_addr = 0x48, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4a, .name = "OCRAL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1a_def_320, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4b, .name = "OCRAH", .ref_addr = 0x4a, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4c, .name = "TCNTL", .vdev_create = timer16_create, .related = 0x58, .data = &timer1_def_320, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4d, .name = "TCNTH", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4e, .name = "TCCRB", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xcf, .wr_mask = 0xcf, }, { .addr = 0x4f, .name = "TCCRA", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x52, .name = "TCNT", .vdev_create = timer0_create, .related = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x53, .name = "TCCR", .ref_addr = 0x52, .reset_value = 0, .rd_mask = 0x07, .wr_mask = 0x07, }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", .vdev_create = timer_int_create, .data = &(timer_mask_320), .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x59, .name = "TIMSK", .ref_addr = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa3, .name = "FCAR2", .vdev_create = usb_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa4, .name = "FCAR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa5, .name = "FCAR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa7, .name = "HCAR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa8, .name = "PSTATE1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa9, .name = "PSTATE2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1faa, .name = "PSTATE3", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fab, .name = "PSTATE4", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fac, .name = "PSTATE5", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb0, .name = "HPSCR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb1, .name = "HPSCR2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR3", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR4", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR5", .ref_addr = 0x1fa4, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb8, .name = "HPSTAT1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb9, .name = "HPSTAT2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fba, .name = "HPSTAT3", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fbb, .name = "HPSTAT4", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fbc, .name = "HPSTAT5", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc5, .name = "HPCON", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc7, .name = "HSTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcb, .name = "FBYTE_CNT2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcc, .name = "FBYTE_CNT1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcd, .name = "FBYTE_CNT0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcf, .name = "HBYTE_CNT0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd3, .name = "FDR2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd4, .name = "FDR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd5, .name = "FDR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd7, .name = "HDR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdb, .name = "FCSR2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdc, .name = "FCSR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdd, .name = "FCSR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdf, .name = "HCSR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe3, .name = "FENDP2_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe4, .name = "FENDP1_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe5, .name = "FENDP0_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe7, .name = "HENDP0_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fee, .name = "FADDR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fef, .name = "HADDR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff2, .name = "UOVCER", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff3, .name = "UIER", .vdev_create = usbi_create, .data = &(uier_320), .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x1ff5, .name = "UIAR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff6, .name = "UIMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff7, .name = "UISR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff8, .name = "SPRSMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff9, .name = "SPRSIE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffa, .name = "SPRSR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffb, .name = "GLB_STATE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffc, .name = "FRM_NUM_L", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffd, .name = "FRM_NUM_H", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/43usb325.h0000644000175000001440000004740610024663466013521 00000000000000/* * $Id: 43usb325.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static uint8_t uier_325 = (mask_FEP0 | mask_FEP1 | mask_FEP2 | mask_FEP3 | mask_HEP0); static uint8_t timer_mask_325 = (mask_TOIE1 | mask_OCIE1A | mask_OCIE1B | mask_TICIE1 | mask_TOIE0); static uint8_t timer1_def_325 = TD_TIMER1; static uint8_t ocr1a_def_325 = OCR1A_DEF; static uint8_t ocr1b_def_325 = OCR1B_DEF; static DevSuppDefn defn_at43usb325 = { .name = "at43usb325", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT43USB325, .size = { .pc = 2, .stack = 0, .flash = 16 * 1024, .sram = 512, .eeprom = 0 }, .io_reg = { { .addr = 0x21, .name = "PINE", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x22, .name = "DDRE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x23, .name = "PORTE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x24, .name = "PINF", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x25, .name = "DDRF", .ref_addr = 0x24, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x26, .name = "PORTF", .ref_addr = 0x24, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xfd, .wr_mask = 0xfd, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xfd, .wr_mask = 0xfd, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xfd, .wr_mask = 0xfd, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCRBL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1b_def_325, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x49, .name = "OCRBH", .ref_addr = 0x48, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4a, .name = "OCRAL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1a_def_325, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4b, .name = "OCRAH", .ref_addr = 0x4a, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4c, .name = "TCNTL", .vdev_create = timer16_create, .related = 0x58, .data = &timer1_def_325, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4d, .name = "TCNTH", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4e, .name = "TCCRB", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xcf, .wr_mask = 0xcf, }, { .addr = 0x4f, .name = "TCCRA", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x52, .name = "TCNT", .vdev_create = timer0_create, .related = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x53, .name = "TCCR", .ref_addr = 0x52, .reset_value = 0, .rd_mask = 0x07, .wr_mask = 0x07, }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", .vdev_create = timer_int_create, .data = &(timer_mask_325), .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x59, .name = "TIMSK", .ref_addr = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa2, .name = "FCAR3", .vdev_create = usb_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa3, .name = "FCAR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa4, .name = "FCAR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa5, .name = "FCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa7, .name = "HCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa9, .name = "PSTATE2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1faa, .name = "PSTATE3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fab, .name = "PSTATE4", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fac, .name = "PSTATE5", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb0, .name = "HPSCR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb1, .name = "HPSCR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR4", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR5", .ref_addr = 0x1fa4, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb8, .name = "HPSTAT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb9, .name = "HPSTAT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fba, .name = "HPSTAT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fbb, .name = "HPSTAT4", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fbc, .name = "HPSTAT5", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc5, .name = "HPCON", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc7, .name = "HSTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fca, .name = "FBYTE_CNT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcb, .name = "FBYTE_CNT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcc, .name = "FBYTE_CNT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcd, .name = "FBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcf, .name = "HBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd2, .name = "FDR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd3, .name = "FDR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd4, .name = "FDR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd5, .name = "FDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd7, .name = "HDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fda, .name = "FCSR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdb, .name = "FCSR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdc, .name = "FCSR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdd, .name = "FCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdf, .name = "HCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe2, .name = "FENDP3_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe3, .name = "FENDP2_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe4, .name = "FENDP1_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe5, .name = "FENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe7, .name = "HENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fee, .name = "FADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fef, .name = "HADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff1, .name = "ISCR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff2, .name = "UOVCER", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff3, .name = "UIER", .vdev_create = usbi_create, .data = &(uier_325), .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x1ff5, .name = "UIAR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff6, .name = "UIMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff7, .name = "UISR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff8, .name = "SPRSMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff9, .name = "SPRSIE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffa, .name = "SPRSR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffb, .name = "GLB_STATE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffc, .name = "FRM_NUM_L", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffd, .name = "FRM_NUM_H", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/43usb326.h0000644000175000001440000003541210024663466013514 00000000000000/* * $Id: 43usb326.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static uint8_t uier_326 = (mask_FEP0 | mask_FEP1 | mask_FEP2 | mask_HEP0); static uint8_t timer_mask_326 = (mask_TOIE0); static DevSuppDefn defn_at43usb326 = { .name = "at43usb326", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT43USB326, .size = { .pc = 2, .stack = 0, .flash = 16 * 1024, .sram = 512, .eeprom = 0 }, .io_reg = { { .addr = 0x21, .name = "PINE", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x22, .name = "DDRE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x23, .name = "PORTE", .ref_addr = 0x21, .reset_value = 0x00, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x03, .wr_mask = 0x03, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x03, .wr_mask = 0x03, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x03, .wr_mask = 0x03, }, { .addr = 0x33, .name = "PINC", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x34, .name = "DDRC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x35, .name = "PORTC", .ref_addr = 0x33, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x52, .name = "TCNT", .vdev_create = timer0_create, .related = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x53, .name = "TCCR", .ref_addr = 0x52, .reset_value = 0, .rd_mask = 0x07, .wr_mask = 0x07, }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", .vdev_create = timer_int_create, .data = &(timer_mask_326), .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x59, .name = "TIMSK", .ref_addr = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa3, .name = "FCAR2", .vdev_create = usb_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa4, .name = "FCAR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa5, .name = "FCAR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa7, .name = "HCAR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa9, .name = "PSTATE2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1faa, .name = "PSTATE3", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb0, .name = "HPSCR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb1, .name = "HPSCR2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR3", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb8, .name = "HPSTAT1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb9, .name = "HPSTAT2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fba, .name = "HPSTAT3", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc5, .name = "HPCON", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc7, .name = "HSTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcb, .name = "FBYTE_CNT2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcc, .name = "FBYTE_CNT1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcd, .name = "FBYTE_CNT0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcf, .name = "HBYTE_CNT0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd3, .name = "FDR2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd4, .name = "FDR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd5, .name = "FDR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd7, .name = "HDR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdb, .name = "FCSR2", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdc, .name = "FCSR1", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdd, .name = "FCSR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdf, .name = "HCSR0", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe3, .name = "FENDP2_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe4, .name = "FENDP1_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe5, .name = "FENDP0_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe7, .name = "HENDP0_CNTR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fee, .name = "FADDR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fef, .name = "HADDR", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff2, .name = "UOVCER", .ref_addr = 0x1fa3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff3, .name = "UIER", .vdev_create = usbi_create, .data = &(uier_326), .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x1ff5, .name = "UIAR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff6, .name = "UIMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff7, .name = "UISR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff8, .name = "SPRSMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff9, .name = "SPRSIE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffa, .name = "SPRSR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffb, .name = "GLB_STATE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffc, .name = "FRM_NUM_L", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffd, .name = "FRM_NUM_H", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/43usb351.h0000644000175000001440000003521710024663466013515 00000000000000/* * $Id: 43usb351.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static uint8_t uier_351 = (mask_FEP0 | mask_FEP1 | mask_FEP2 | mask_FEP3); static uint8_t timer_mask_351 = (mask_TOIE1 | mask_OCIE1A | mask_OCIE1B | mask_TICIE1 | mask_TOIE0); static uint8_t timer1_def_351 = TD_TIMER1; static uint8_t ocr1a_def_351 = OCR1A_DEF; static uint8_t ocr1b_def_351 = OCR1B_DEF; static DevSuppDefn defn_at43usb351 = { .name = "at43usb351", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT43USB355, .size = { .pc = 2, .stack = 0, .flash = 24 * 1024, .sram = 1 * 1024, .eeprom = 0 }, .io_reg = { { .addr = 0x22, .name = "ADCL", .vdev_create = adc_create, .data = &(uier_351), .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x23, .name = "ADCH", .ref_addr = 0x22, .reset_value = 0x00, .rd_mask = 0x03, .wr_mask = 0x03, }, { .addr = 0x27, .name = "ADCSR", .vdev_create = adc_int_create, .related = 0x22, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x28, .name = "ADMUX", .ref_addr = 0x27, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x2d, .name = "SPCR", .vdev_create = spii_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x2e, .name = "SPSR", .ref_addr = 0x2d, .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x2f, .name = "SPDR", .vdev_create = spi_create, .related = 0x2d, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCRBL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1b_def_351, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x49, .name = "OCRBH", .ref_addr = 0x48, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4a, .name = "OCRAL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1a_def_351, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4b, .name = "OCRAH", .ref_addr = 0x4a, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4c, .name = "TCNTL", .vdev_create = timer16_create, .related = 0x58, .data = &timer1_def_351, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4d, .name = "TCNTH", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4e, .name = "TCCRB", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xcf, .wr_mask = 0xcf, }, { .addr = 0x4f, .name = "TCCRA", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x52, .name = "TCNT", .vdev_create = timer0_create, .related = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x53, .name = "TCCR", .ref_addr = 0x52, .reset_value = 0, .rd_mask = 0x07, .wr_mask = 0x07, }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", .vdev_create = timer_int_create, .data = &(timer_mask_351), .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x59, .name = "TIMSK", .ref_addr = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa2, .name = "FCAR3", .vdev_create = usb_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa3, .name = "FCAR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa4, .name = "FCAR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa5, .name = "FCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fca, .name = "FBYTE_CNT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcb, .name = "FBYTE_CNT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcc, .name = "FBYTE_CNT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcd, .name = "FBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd2, .name = "FDR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd3, .name = "FDR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd4, .name = "FDR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd5, .name = "FDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fda, .name = "FCSR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdb, .name = "FCSR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdc, .name = "FCSR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdd, .name = "FCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe2, .name = "FENDP3_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe3, .name = "FENDP2_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe4, .name = "FENDP1_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe5, .name = "FENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fee, .name = "FADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff3, .name = "UIER", .vdev_create = usbi_create, .data = &(uier_351), .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x1ff5, .name = "UIAR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff6, .name = "UIMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff7, .name = "UISR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff8, .name = "SPRSMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff9, .name = "SPRSIE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffa, .name = "SPRSR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffb, .name = "GLB_STATE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffc, .name = "FRM_NUM_L", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffd, .name = "FRM_NUM_H", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/43usb353.h0000644000175000001440000004176210024663466013521 00000000000000/* * $Id: 43usb353.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static uint8_t uier_353 = (mask_FEP0 | mask_FEP1 | mask_FEP2 | mask_FEP3 | mask_HEP0); static uint8_t timer_mask_353 = (mask_TOIE1 | mask_OCIE1A | mask_OCIE1B | mask_TICIE1 | mask_TOIE0); static uint8_t timer1_def_353 = TD_TIMER1; static uint8_t ocr1a_def_353 = OCR1A_DEF; static uint8_t ocr1b_def_353 = OCR1B_DEF; static DevSuppDefn defn_at43usb353 = { .name = "at43usb353", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT43USB355, .size = { .pc = 2, .stack = 0, .flash = 24 * 1024, .sram = 1 * 1024, .eeprom = 0 }, .io_reg = { { .addr = 0x22, .name = "ADCL", .vdev_create = adc_create, .data = &(uier_353), .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x23, .name = "ADCH", .ref_addr = 0x22, .reset_value = 0x00, .rd_mask = 0x03, .wr_mask = 0x03, }, { .addr = 0x27, .name = "ADCSR", .vdev_create = adc_int_create, .related = 0x22, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x28, .name = "ADMUX", .ref_addr = 0x27, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0x7f, .wr_mask = 0x7f, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCRBL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1b_def_353, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x49, .name = "OCRBH", .ref_addr = 0x48, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4a, .name = "OCRAL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1a_def_353, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4b, .name = "OCRAH", .ref_addr = 0x4a, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4c, .name = "TCNTL", .vdev_create = timer16_create, .related = 0x58, .data = &timer1_def_353, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4d, .name = "TCNTH", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4e, .name = "TCCRB", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xcf, .wr_mask = 0xcf, }, { .addr = 0x4f, .name = "TCCRA", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x52, .name = "TCNT", .vdev_create = timer0_create, .related = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x53, .name = "TCCR", .ref_addr = 0x52, .reset_value = 0, .rd_mask = 0x07, .wr_mask = 0x07, }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", .vdev_create = timer_int_create, .data = &(timer_mask_353), .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x59, .name = "TIMSK", .ref_addr = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa2, .name = "FCAR3", .vdev_create = usb_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa3, .name = "FCAR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa4, .name = "FCAR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa5, .name = "FCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa7, .name = "HCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa9, .name = "PSTATE2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1faa, .name = "PSTATE3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb0, .name = "HPSCR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb1, .name = "HPSCR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb8, .name = "HPSTAT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb9, .name = "HPSTAT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fba, .name = "HPSTAT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc5, .name = "HPCON", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc7, .name = "HSTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fca, .name = "FBYTE_CNT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcb, .name = "FBYTE_CNT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcc, .name = "FBYTE_CNT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcd, .name = "FBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcf, .name = "HBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd2, .name = "FDR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd3, .name = "FDR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd4, .name = "FDR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd5, .name = "FDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd7, .name = "HDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fda, .name = "FCSR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdb, .name = "FCSR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdc, .name = "FCSR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdd, .name = "FCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdf, .name = "HCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe2, .name = "FENDP3_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe3, .name = "FENDP2_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe4, .name = "FENDP1_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe5, .name = "FENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe6, .name = "HENDP1_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe7, .name = "HENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fee, .name = "FADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fef, .name = "HADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff2, .name = "UOVCER", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff3, .name = "UIER", .vdev_create = usbi_create, .data = &(uier_353), .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x1ff5, .name = "UIAR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff6, .name = "UIMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff7, .name = "UISR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff8, .name = "SPRSMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff9, .name = "SPRSIE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffa, .name = "SPRSR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffb, .name = "GLB_STATE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffc, .name = "FRM_NUM_L", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffd, .name = "FRM_NUM_H", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/defn/43usb355.h0000644000175000001440000004567310024663466013530 00000000000000/* * $Id: 43usb355.h,v 1.3 2004/03/13 19:55:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2004 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #if defined (IN_DEVSUPP_C) /* *INDENT-OFF* */ static uint8_t uier_355 = (mask_FEP0 | mask_FEP1 | mask_FEP2 | mask_FEP3 | mask_HEP0); static uint8_t timer_mask_355 = (mask_TOIE1 | mask_OCIE1A | mask_OCIE1B | mask_TICIE1 | mask_TOIE0); static uint8_t timer1_def_355 = TD_TIMER1; static uint8_t ocr1a_def_355 = OCR1A_DEF; static uint8_t ocr1b_def_355 = OCR1B_DEF; static DevSuppDefn defn_at43usb355 = { .name = "at43usb355", .stack_type = STACK_MEMORY, .irq_vect_idx = VTAB_AT43USB355, .size = { .pc = 2, .stack = 0, .flash = 24 * 1024, .sram = 1 * 1024, .eeprom = 0 }, .io_reg = { { .addr = 0x22, .name = "ADCL", .vdev_create = adc_create, .data = &(uier_355), .related = 0x27, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x23, .name = "ADCH", .ref_addr = 0x22, .reset_value = 0x00, .rd_mask = 0x03, .wr_mask = 0x03, }, { .addr = 0x24, .name = "PINF", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x25, .name = "DDRF", .ref_addr = 0x24, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x26, .name = "PORTF", .ref_addr = 0x24, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x27, .name = "ADCSR", .vdev_create = adc_int_create, .related = 0x22, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x28, .name = "ADMUX", .ref_addr = 0x27, .reset_value = 0x00, .rd_mask = 0x0f, .wr_mask = 0x0f, }, { .addr = 0x2d, .name = "SPCR", .vdev_create = spii_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x2e, .name = "SPSR", .ref_addr = 0x2d, .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x2f, .name = "SPDR", .vdev_create = spi_create, .related = 0x2d, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x30, .name = "PIND", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x31, .name = "DDRD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x32, .name = "PORTD", .ref_addr = 0x30, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x36, .name = "PINB", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x37, .name = "DDRB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x38, .name = "PORTB", .ref_addr = 0x36, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x39, .name = "PINA", .vdev_create = port_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3a, .name = "DDRA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x3b, .name = "PORTA", .ref_addr = 0x39, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x41, .name = "WDTCR", }, { .addr = 0x44, .name = "ICR1L", }, { .addr = 0x45, .name = "ICR1H", }, { .addr = 0x48, .name = "OCRBL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1b_def_355, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x49, .name = "OCRBH", .ref_addr = 0x48, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4a, .name = "OCRAL", .vdev_create = ocreg16_create, .related = 0x4c, .data = &ocr1a_def_355, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4b, .name = "OCRAH", .ref_addr = 0x4a, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4c, .name = "TCNTL", .vdev_create = timer16_create, .related = 0x58, .data = &timer1_def_355, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4d, .name = "TCNTH", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x4e, .name = "TCCRB", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xcf, .wr_mask = 0xcf, }, { .addr = 0x4f, .name = "TCCRA", .ref_addr = 0x4c, .reset_value = 0, .rd_mask = 0xf3, .wr_mask = 0xf3, }, { .addr = 0x52, .name = "TCNT", .vdev_create = timer0_create, .related = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x53, .name = "TCCR", .ref_addr = 0x52, .reset_value = 0, .rd_mask = 0x07, .wr_mask = 0x07, }, { .addr = 0x55, .name = "MCUCR", }, { .addr = 0x58, .name = "TIFR", .vdev_create = timer_int_create, .data = &(timer_mask_355), .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x59, .name = "TIMSK", .ref_addr = 0x58, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5a, .name = "GIFR", }, { .addr = 0x5b, .name = "GIMSK", }, { .addr = 0x5d, .name = "SPL", .vdev_create = sp_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5e, .name = "SPH", .ref_addr = 0x5d, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x5f, .name = "SREG", .vdev_create = sreg_create, .reset_value = 0, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa2, .name = "FCAR3", .vdev_create = usb_create, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa3, .name = "FCAR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa4, .name = "FCAR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa5, .name = "FCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa7, .name = "HCAR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fa9, .name = "PSTATE2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1faa, .name = "PSTATE3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb0, .name = "HPSCR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb1, .name = "HPSCR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb2, .name = "HPSCR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb8, .name = "HPSTAT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fb9, .name = "HPSTAT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fba, .name = "HPSTAT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc5, .name = "HPCON", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fc7, .name = "HSTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fca, .name = "FBYTE_CNT3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcb, .name = "FBYTE_CNT2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcc, .name = "FBYTE_CNT1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcd, .name = "FBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fcf, .name = "HBYTE_CNT0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd2, .name = "FDR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd3, .name = "FDR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd4, .name = "FDR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd5, .name = "FDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fd7, .name = "HDR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fda, .name = "FCSR3", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdb, .name = "FCSR2", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdc, .name = "FCSR1", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdd, .name = "FCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fdf, .name = "HCSR0", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe2, .name = "FENDP3_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe3, .name = "FENDP2_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe4, .name = "FENDP1_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe5, .name = "FENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe6, .name = "HENDP1_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fe7, .name = "HENDP0_CNTR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fee, .name = "FADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1fef, .name = "HADDR", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff2, .name = "UOVCER", .ref_addr = 0x1fa2, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff3, .name = "UIER", .vdev_create = usbi_create, .data = &(uier_355), .reset_value = 0x00, .rd_mask = 0xc0, .wr_mask = 0xc0, }, { .addr = 0x1ff5, .name = "UIAR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff6, .name = "UIMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff7, .name = "UISR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff8, .name = "SPRSMSK", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ff9, .name = "SPRSIE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffa, .name = "SPRSR", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffb, .name = "GLB_STATE", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffc, .name = "FRM_NUM_L", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, { .addr = 0x1ffd, .name = "FRM_NUM_H", .ref_addr = 0x1ff3, .reset_value = 0x00, .rd_mask = 0xff, .wr_mask = 0xff, }, IO_REG_DEFN_TERMINATOR } }; /* *INDENT-ON* */ #endif /* IN_DEVSUPP_C */ simulavr-0.1.2.2/src/getopt/0000777000175000001440000000000010204750217012604 500000000000000simulavr-0.1.2.2/src/getopt/Makefile.am0000644000175000001440000000206607716312473014574 00000000000000# # $Id: Makefile.am,v 1.1 2003/08/13 01:32:43 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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NOTE: getopt is now part of the C library, so if you don't know what "Keep this file name-space clean" means, talk to drepper@gnu.org before changing it! Copyright (C) 1987, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002 Free Software Foundation, Inc. NOTE: This source is derived from an old version taken from the GNU C Library (glibc). This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* This tells Alpha OSF/1 not to define a getopt prototype in . Ditto for AIX 3.2 and . */ #ifndef _NO_PROTO # define _NO_PROTO #endif #ifdef HAVE_CONFIG_H # include #endif #if !defined __STDC__ || !__STDC__ /* This is a separate conditional since some stdc systems reject `defined (const)'. */ # ifndef const # define const # endif #endif #include /* Comment out all this code if we are using the GNU C Library, and are not actually compiling the library itself. This code is part of the GNU C Library, but also included in many other GNU distributions. Compiling and linking in this code is a waste when using the GNU C library (especially if it is a shared library). Rather than having every GNU program understand `configure --with-gnu-libc' and omit the object files, it is simpler to just do this in the source for each such file. */ #define GETOPT_INTERFACE_VERSION 2 #if !defined _LIBC && defined __GLIBC__ && __GLIBC__ >= 2 # include # if _GNU_GETOPT_INTERFACE_VERSION == GETOPT_INTERFACE_VERSION # define ELIDE_CODE # endif #endif #ifndef ELIDE_CODE /* This needs to come after some library #include to get __GNU_LIBRARY__ defined. */ #ifdef __GNU_LIBRARY__ /* Don't include stdlib.h for non-GNU C libraries because some of them contain conflicting prototypes for getopt. */ # include # include #endif /* GNU C library. */ #ifdef VMS # include # if HAVE_STRING_H - 0 # include # endif #endif #ifndef _ /* This is for other GNU distributions with internationalized messages. When compiling libc, the _ macro is predefined. */ # ifdef HAVE_LIBINTL_H # include # define _(msgid) gettext (msgid) # else # define _(msgid) (msgid) # endif #endif /* TRoth/2003-08-26: We are not currently using libintl anywere else in simulavr, so just make sure that _ is not defined to use gettext(). */ #undef _ #define _(msgid) (msgid) /* This version of `getopt' appears to the caller like standard Unix `getopt' but it behaves differently for the user, since it allows the user to intersperse the options with the other arguments. As `getopt' works, it permutes the elements of ARGV so that, when it is done, all the options precede everything else. Thus all application programs are extended to handle flexible argument order. Setting the environment variable POSIXLY_CORRECT disables permutation. Then the behavior is completely standard. GNU application programs can use a third alternative mode in which they can distinguish the relative order of options and other arguments. */ #include "gnu_getopt.h" /* For communication from `getopt' to the caller. When `getopt' finds an option that takes an argument, the argument value is returned here. Also, when `ordering' is RETURN_IN_ORDER, each non-option ARGV-element is returned here. */ char *optarg = NULL; /* Index in ARGV of the next element to be scanned. This is used for communication to and from the caller and for communication between successive calls to `getopt'. On entry to `getopt', zero means this is the first call; initialize. When `getopt' returns -1, this is the index of the first of the non-option elements that the caller should itself scan. Otherwise, `optind' communicates from one call to the next how much of ARGV has been scanned so far. */ /* 1003.2 says this must be 1 before any call. */ int optind = 1; /* Formerly, initialization of getopt depended on optind==0, which causes problems with re-calling getopt as programs generally don't know that. */ int __getopt_initialized = 0; /* The next char to be scanned in the option-element in which the last option character we returned was found. This allows us to pick up the scan where we left off. If this is zero, or a null string, it means resume the scan by advancing to the next ARGV-element. */ static char *nextchar; /* Callers store zero here to inhibit the error message for unrecognized options. */ int opterr = 1; /* Set to an option character which was unrecognized. This must be initialized on some systems to avoid linking in the system's own getopt implementation. */ int optopt = '?'; /* Describe how to deal with options that follow non-option ARGV-elements. If the caller did not specify anything, the default is REQUIRE_ORDER if the environment variable POSIXLY_CORRECT is defined, PERMUTE otherwise. REQUIRE_ORDER means don't recognize them as options; stop option processing when the first non-option is seen. This is what Unix does. This mode of operation is selected by either setting the environment variable POSIXLY_CORRECT, or using `+' as the first character of the list of option characters. PERMUTE is the default. We permute the contents of ARGV as we scan, so that eventually all the non-options are at the end. This allows options to be given in any order, even with programs that were not written to expect this. RETURN_IN_ORDER is an option available to programs that were written to expect options and other ARGV-elements in any order and that care about the ordering of the two. We describe each non-option ARGV-element as if it were the argument of an option with character code 1. Using `-' as the first character of the list of option characters selects this mode of operation. The special argument `--' forces an end of option-scanning regardless of the value of `ordering'. In the case of RETURN_IN_ORDER, only `--' can cause `getopt' to return -1 with `optind' != ARGC. */ static enum { REQUIRE_ORDER, PERMUTE, RETURN_IN_ORDER } ordering; /* Value of POSIXLY_CORRECT environment variable. */ static char *posixly_correct; #ifdef __GNU_LIBRARY__ /* We want to avoid inclusion of string.h with non-GNU libraries because there are many ways it can cause trouble. On some systems, it contains special magic macros that don't work in GCC. */ # include # define my_index strchr #else # if HAVE_STRING_H # include # else # if HAVE_STRINGS_H # include # endif # endif /* Avoid depending on library functions or files whose names are inconsistent. */ #ifndef getenv extern char *getenv (); #endif static char * my_index (str, chr) const char *str; int chr; { while (*str) { if (*str == chr) return (char *) str; str++; } return 0; } /* If using GCC, we can safely declare strlen this way. If not using GCC, it is ok not to declare it. */ #ifdef __GNUC__ /* Note that Motorola Delta 68k R3V7 comes with GCC but not stddef.h. That was relevant to code that was here before. */ # if (!defined __STDC__ || !__STDC__) && !defined strlen /* gcc with -traditional declares the built-in strlen to return int, and has done so at least since version 2.4.5. -- rms. */ extern int strlen (const char *); # endif /* not __STDC__ */ #endif /* __GNUC__ */ #endif /* not __GNU_LIBRARY__ */ /* Handle permutation of arguments. */ /* Describe the part of ARGV that contains non-options that have been skipped. `first_nonopt' is the index in ARGV of the first of them; `last_nonopt' is the index after the last of them. */ static int first_nonopt; static int last_nonopt; #ifdef _LIBC /* Bash 2.0 gives us an environment variable containing flags indicating ARGV elements that should not be considered arguments. */ /* Defined in getopt_init.c */ extern char *__getopt_nonoption_flags; static int nonoption_flags_max_len; static int nonoption_flags_len; static int original_argc; static char *const *original_argv; /* Make sure the environment variable bash 2.0 puts in the environment is valid for the getopt call we must make sure that the ARGV passed to getopt is that one passed to the process. */ static void __attribute__ ((unused)) store_args_and_env (int argc, char *const *argv) { /* XXX This is no good solution. We should rather copy the args so that we can compare them later. But we must not use malloc(3). */ original_argc = argc; original_argv = argv; } # ifdef text_set_element text_set_element (__libc_subinit, store_args_and_env); # endif /* text_set_element */ # define SWAP_FLAGS(ch1, ch2) \ if (nonoption_flags_len > 0) \ { \ char __tmp = __getopt_nonoption_flags[ch1]; \ __getopt_nonoption_flags[ch1] = __getopt_nonoption_flags[ch2]; \ __getopt_nonoption_flags[ch2] = __tmp; \ } #else /* !_LIBC */ # define SWAP_FLAGS(ch1, ch2) #endif /* _LIBC */ /* Exchange two adjacent subsequences of ARGV. One subsequence is elements [first_nonopt,last_nonopt) which contains all the non-options that have been skipped so far. The other is elements [last_nonopt,optind), which contains all the options processed since those non-options were skipped. `first_nonopt' and `last_nonopt' are relocated so that they describe the new indices of the non-options in ARGV after they are moved. */ #if defined __STDC__ && __STDC__ static void exchange (char **); #endif static void exchange (argv) char **argv; { int bottom = first_nonopt; int middle = last_nonopt; int top = optind; char *tem; /* Exchange the shorter segment with the far end of the longer segment. That puts the shorter segment into the right place. It leaves the longer segment in the right place overall, but it consists of two parts that need to be swapped next. */ #ifdef _LIBC /* First make sure the handling of the `__getopt_nonoption_flags' string can work normally. Our top argument must be in the range of the string. */ if (nonoption_flags_len > 0 && top >= nonoption_flags_max_len) { /* We must extend the array. The user plays games with us and presents new arguments. */ char *new_str = malloc (top + 1); if (new_str == NULL) nonoption_flags_len = nonoption_flags_max_len = 0; else { memset (__mempcpy (new_str, __getopt_nonoption_flags, nonoption_flags_max_len), '\0', top + 1 - nonoption_flags_max_len); nonoption_flags_max_len = top + 1; __getopt_nonoption_flags = new_str; } } #endif while (top > middle && middle > bottom) { if (top - middle > middle - bottom) { /* Bottom segment is the short one. */ int len = middle - bottom; register int i; /* Swap it with the top part of the top segment. */ for (i = 0; i < len; i++) { tem = argv[bottom + i]; argv[bottom + i] = argv[top - (middle - bottom) + i]; argv[top - (middle - bottom) + i] = tem; SWAP_FLAGS (bottom + i, top - (middle - bottom) + i); } /* Exclude the moved bottom segment from further swapping. */ top -= len; } else { /* Top segment is the short one. */ int len = top - middle; register int i; /* Swap it with the bottom part of the bottom segment. */ for (i = 0; i < len; i++) { tem = argv[bottom + i]; argv[bottom + i] = argv[middle + i]; argv[middle + i] = tem; SWAP_FLAGS (bottom + i, middle + i); } /* Exclude the moved top segment from further swapping. */ bottom += len; } } /* Update records for the slots the non-options now occupy. */ first_nonopt += (optind - last_nonopt); last_nonopt = optind; } /* Initialize the internal data when the first call is made. */ #if defined __STDC__ && __STDC__ static const char *_getopt_initialize (int, char *const *, const char *); #endif static const char * _getopt_initialize (argc, argv, optstring) int argc; char *const *argv; const char *optstring; { /* Start processing options with ARGV-element 1 (since ARGV-element 0 is the program name); the sequence of previously skipped non-option ARGV-elements is empty. */ first_nonopt = last_nonopt = optind; nextchar = NULL; posixly_correct = getenv ("POSIXLY_CORRECT"); /* Determine how to handle the ordering of options and nonoptions. */ if (optstring[0] == '-') { ordering = RETURN_IN_ORDER; ++optstring; } else if (optstring[0] == '+') { ordering = REQUIRE_ORDER; ++optstring; } else if (posixly_correct != NULL) ordering = REQUIRE_ORDER; else ordering = PERMUTE; #ifdef _LIBC if (posixly_correct == NULL && argc == original_argc && argv == original_argv) { if (nonoption_flags_max_len == 0) { if (__getopt_nonoption_flags == NULL || __getopt_nonoption_flags[0] == '\0') nonoption_flags_max_len = -1; else { const char *orig_str = __getopt_nonoption_flags; int len = nonoption_flags_max_len = strlen (orig_str); if (nonoption_flags_max_len < argc) nonoption_flags_max_len = argc; __getopt_nonoption_flags = (char *) malloc (nonoption_flags_max_len); if (__getopt_nonoption_flags == NULL) nonoption_flags_max_len = -1; else memset (__mempcpy (__getopt_nonoption_flags, orig_str, len), '\0', nonoption_flags_max_len - len); } } nonoption_flags_len = nonoption_flags_max_len; } else nonoption_flags_len = 0; #endif return optstring; } /* Scan elements of ARGV (whose length is ARGC) for option characters given in OPTSTRING. If an element of ARGV starts with '-', and is not exactly "-" or "--", then it is an option element. The characters of this element (aside from the initial '-') are option characters. If `getopt' is called repeatedly, it returns successively each of the option characters from each of the option elements. If `getopt' finds another option character, it returns that character, updating `optind' and `nextchar' so that the next call to `getopt' can resume the scan with the following option character or ARGV-element. If there are no more option characters, `getopt' returns -1. Then `optind' is the index in ARGV of the first ARGV-element that is not an option. (The ARGV-elements have been permuted so that those that are not options now come last.) OPTSTRING is a string containing the legitimate option characters. If an option character is seen that is not listed in OPTSTRING, return '?' after printing an error message. If you set `opterr' to zero, the error message is suppressed but we still return '?'. If a char in OPTSTRING is followed by a colon, that means it wants an arg, so the following text in the same ARGV-element, or the text of the following ARGV-element, is returned in `optarg'. Two colons mean an option that wants an optional arg; if there is text in the current ARGV-element, it is returned in `optarg', otherwise `optarg' is set to zero. If OPTSTRING starts with `-' or `+', it requests different methods of handling the non-option ARGV-elements. See the comments about RETURN_IN_ORDER and REQUIRE_ORDER, above. Long-named options begin with `--' instead of `-'. Their names may be abbreviated as long as the abbreviation is unique or is an exact match for some defined option. If they have an argument, it follows the option name in the same ARGV-element, separated from the option name by a `=', or else the in next ARGV-element. When `getopt' finds a long-named option, it returns 0 if that option's `flag' field is nonzero, the value of the option's `val' field if the `flag' field is zero. The elements of ARGV aren't really const, because we permute them. But we pretend they're const in the prototype to be compatible with other systems. LONGOPTS is a vector of `struct option' terminated by an element containing a name which is zero. LONGIND returns the index in LONGOPT of the long-named option found. It is only valid when a long-named option has been found by the most recent call. If LONG_ONLY is nonzero, '-' as well as '--' can introduce long-named options. */ int _getopt_internal (argc, argv, optstring, longopts, longind, long_only) int argc; char *const *argv; const char *optstring; const struct option *longopts; int *longind; int long_only; { optarg = NULL; if (optind == 0 || !__getopt_initialized) { if (optind == 0) optind = 1; /* Don't scan ARGV[0], the program name. */ optstring = _getopt_initialize (argc, argv, optstring); __getopt_initialized = 1; } /* Test whether ARGV[optind] points to a non-option argument. Either it does not have option syntax, or there is an environment flag from the shell indicating it is not an option. The later information is only used when the used in the GNU libc. */ #ifdef _LIBC # define NONOPTION_P (argv[optind][0] != '-' || argv[optind][1] == '\0' \ || (optind < nonoption_flags_len \ && __getopt_nonoption_flags[optind] == '1')) #else # define NONOPTION_P (argv[optind][0] != '-' || argv[optind][1] == '\0') #endif if (nextchar == NULL || *nextchar == '\0') { /* Advance to the next ARGV-element. */ /* Give FIRST_NONOPT & LAST_NONOPT rational values if OPTIND has been moved back by the user (who may also have changed the arguments). */ if (last_nonopt > optind) last_nonopt = optind; if (first_nonopt > optind) first_nonopt = optind; if (ordering == PERMUTE) { /* If we have just processed some options following some non-options, exchange them so that the options come first. */ if (first_nonopt != last_nonopt && last_nonopt != optind) exchange ((char **) argv); else if (last_nonopt != optind) first_nonopt = optind; /* Skip any additional non-options and extend the range of non-options previously skipped. */ while (optind < argc && NONOPTION_P) optind++; last_nonopt = optind; } /* The special ARGV-element `--' means premature end of options. Skip it like a null option, then exchange with previous non-options as if it were an option, then skip everything else like a non-option. */ if (optind != argc && !strcmp (argv[optind], "--")) { optind++; if (first_nonopt != last_nonopt && last_nonopt != optind) exchange ((char **) argv); else if (first_nonopt == last_nonopt) first_nonopt = optind; last_nonopt = argc; optind = argc; } /* If we have done all the ARGV-elements, stop the scan and back over any non-options that we skipped and permuted. */ if (optind == argc) { /* Set the next-arg-index to point at the non-options that we previously skipped, so the caller will digest them. */ if (first_nonopt != last_nonopt) optind = first_nonopt; return -1; } /* If we have come to a non-option and did not permute it, either stop the scan or describe it to the caller and pass it by. */ if (NONOPTION_P) { if (ordering == REQUIRE_ORDER) return -1; optarg = argv[optind++]; return 1; } /* We have found another option-ARGV-element. Skip the initial punctuation. */ nextchar = (argv[optind] + 1 + (longopts != NULL && argv[optind][1] == '-')); } /* Decode the current option-ARGV-element. */ /* Check whether the ARGV-element is a long option. If long_only and the ARGV-element has the form "-f", where f is a valid short option, don't consider it an abbreviated form of a long option that starts with f. Otherwise there would be no way to give the -f short option. On the other hand, if there's a long option "fubar" and the ARGV-element is "-fu", do consider that an abbreviation of the long option, just like "--fu", and not "-f" with arg "u". This distinction seems to be the most useful approach. */ if (longopts != NULL && (argv[optind][1] == '-' || (long_only && (argv[optind][2] || !my_index (optstring, argv[optind][1]))))) { char *nameend; const struct option *p; const struct option *pfound = NULL; int exact = 0; int ambig = 0; int indfound = -1; int option_index; for (nameend = nextchar; *nameend && *nameend != '='; nameend++) /* Do nothing. */ ; /* Test all long options for either exact match or abbreviated matches. */ for (p = longopts, option_index = 0; p->name; p++, option_index++) if (!strncmp (p->name, nextchar, nameend - nextchar)) { if ((unsigned int) (nameend - nextchar) == (unsigned int) strlen (p->name)) { /* Exact match found. */ pfound = p; indfound = option_index; exact = 1; break; } else if (pfound == NULL) { /* First nonexact match found. */ pfound = p; indfound = option_index; } else /* Second or later nonexact match found. */ ambig = 1; } if (ambig && !exact) { if (opterr) fprintf (stderr, _("%s: option `%s' is ambiguous\n"), argv[0], argv[optind]); nextchar += strlen (nextchar); optind++; optopt = 0; return '?'; } if (pfound != NULL) { option_index = indfound; optind++; if (*nameend) { /* Don't test has_arg with >, because some C compilers don't allow it to be used on enums. */ if (pfound->has_arg) optarg = nameend + 1; else { if (opterr) { if (argv[optind - 1][1] == '-') /* --option */ fprintf (stderr, _("%s: option `--%s' doesn't allow an argument\n"), argv[0], pfound->name); else /* +option or -option */ fprintf (stderr, _("%s: option `%c%s' doesn't allow an argument\n"), argv[0], argv[optind - 1][0], pfound->name); nextchar += strlen (nextchar); optopt = pfound->val; return '?'; } } } else if (pfound->has_arg == 1) { if (optind < argc) optarg = argv[optind++]; else { if (opterr) fprintf (stderr, _("%s: option `%s' requires an argument\n"), argv[0], argv[optind - 1]); nextchar += strlen (nextchar); optopt = pfound->val; return optstring[0] == ':' ? ':' : '?'; } } nextchar += strlen (nextchar); if (longind != NULL) *longind = option_index; if (pfound->flag) { *(pfound->flag) = pfound->val; return 0; } return pfound->val; } /* Can't find it as a long option. If this is not getopt_long_only, or the option starts with '--' or is not a valid short option, then it's an error. Otherwise interpret it as a short option. */ if (!long_only || argv[optind][1] == '-' || my_index (optstring, *nextchar) == NULL) { if (opterr) { if (argv[optind][1] == '-') /* --option */ fprintf (stderr, _("%s: unrecognized option `--%s'\n"), argv[0], nextchar); else /* +option or -option */ fprintf (stderr, _("%s: unrecognized option `%c%s'\n"), argv[0], argv[optind][0], nextchar); } nextchar = (char *) ""; optind++; optopt = 0; return '?'; } } /* Look at and handle the next short option-character. */ { char c = *nextchar++; char *temp = my_index (optstring, c); /* Increment `optind' when we start to process its last character. */ if (*nextchar == '\0') ++optind; if (temp == NULL || c == ':') { if (opterr) { if (posixly_correct) /* 1003.2 specifies the format of this message. */ fprintf (stderr, _("%s: illegal option -- %c\n"), argv[0], c); else fprintf (stderr, _("%s: invalid option -- %c\n"), argv[0], c); } optopt = c; return '?'; } /* Convenience. Treat POSIX -W foo same as long option --foo */ if (temp[0] == 'W' && temp[1] == ';') { char *nameend; const struct option *p; const struct option *pfound = NULL; int exact = 0; int ambig = 0; int indfound = 0; int option_index; /* This is an option that requires an argument. */ if (*nextchar != '\0') { optarg = nextchar; /* If we end this ARGV-element by taking the rest as an arg, we must advance to the next element now. */ optind++; } else if (optind == argc) { if (opterr) { /* 1003.2 specifies the format of this message. */ fprintf (stderr, _("%s: option requires an argument -- %c\n"), argv[0], c); } optopt = c; if (optstring[0] == ':') c = ':'; else c = '?'; return c; } else /* We already incremented `optind' once; increment it again when taking next ARGV-elt as argument. */ optarg = argv[optind++]; /* optarg is now the argument, see if it's in the table of longopts. */ for (nextchar = nameend = optarg; *nameend && *nameend != '='; nameend++) /* Do nothing. */ ; /* Test all long options for either exact match or abbreviated matches. */ for (p = longopts, option_index = 0; p->name; p++, option_index++) if (!strncmp (p->name, nextchar, nameend - nextchar)) { if ((unsigned int) (nameend - nextchar) == strlen (p->name)) { /* Exact match found. */ pfound = p; indfound = option_index; exact = 1; break; } else if (pfound == NULL) { /* First nonexact match found. */ pfound = p; indfound = option_index; } else /* Second or later nonexact match found. */ ambig = 1; } if (ambig && !exact) { if (opterr) fprintf (stderr, _("%s: option `-W %s' is ambiguous\n"), argv[0], argv[optind]); nextchar += strlen (nextchar); optind++; return '?'; } if (pfound != NULL) { option_index = indfound; if (*nameend) { /* Don't test has_arg with >, because some C compilers don't allow it to be used on enums. */ if (pfound->has_arg) optarg = nameend + 1; else { if (opterr) fprintf (stderr, _("\ %s: option `-W %s' doesn't allow an argument\n"), argv[0], pfound->name); nextchar += strlen (nextchar); return '?'; } } else if (pfound->has_arg == 1) { if (optind < argc) optarg = argv[optind++]; else { if (opterr) fprintf (stderr, _("%s: option `%s' requires an argument\n"), argv[0], argv[optind - 1]); nextchar += strlen (nextchar); return optstring[0] == ':' ? ':' : '?'; } } nextchar += strlen (nextchar); if (longind != NULL) *longind = option_index; if (pfound->flag) { *(pfound->flag) = pfound->val; return 0; } return pfound->val; } nextchar = NULL; return 'W'; /* Let the application handle it. */ } if (temp[1] == ':') { if (temp[2] == ':') { /* This is an option that accepts an argument optionally. */ if (*nextchar != '\0') { optarg = nextchar; optind++; } else optarg = NULL; nextchar = NULL; } else { /* This is an option that requires an argument. */ if (*nextchar != '\0') { optarg = nextchar; /* If we end this ARGV-element by taking the rest as an arg, we must advance to the next element now. */ optind++; } else if (optind == argc) { if (opterr) { /* 1003.2 specifies the format of this message. */ fprintf (stderr, _("%s: option requires an argument -- %c\n"), argv[0], c); } optopt = c; if (optstring[0] == ':') c = ':'; else c = '?'; } else /* We already incremented `optind' once; increment it again when taking next ARGV-elt as argument. */ optarg = argv[optind++]; nextchar = NULL; } } return c; } } int getopt (argc, argv, optstring) int argc; char *const *argv; const char *optstring; { return _getopt_internal (argc, argv, optstring, (const struct option *) 0, (int *) 0, 0); } #endif /* Not ELIDE_CODE. */ #ifdef TEST /* Compile with -DTEST to make an executable for use in testing the above definition of `getopt'. */ int main (argc, argv) int argc; char **argv; { int c; int digit_optind = 0; while (1) { int this_option_optind = optind ? optind : 1; c = getopt (argc, argv, "abc:d:0123456789"); if (c == -1) break; switch (c) { case '0': case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': if (digit_optind != 0 && digit_optind != this_option_optind) printf ("digits occur in two different argv-elements.\n"); digit_optind = this_option_optind; printf ("option %c\n", c); break; case 'a': printf ("option a\n"); break; case 'b': printf ("option b\n"); break; case 'c': printf ("option c with value `%s'\n", optarg); break; case '?': break; default: printf ("?? getopt returned character code 0%o ??\n", c); } } if (optind < argc) { printf ("non-option ARGV-elements: "); while (optind < argc) printf ("%s ", argv[optind++]); printf ("\n"); } exit (0); } #endif /* TEST */ simulavr-0.1.2.2/src/getopt/gnu_getopt.h0000644000175000001440000001253507716312473015066 00000000000000/* Declarations for getopt. Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, 2001, 2002 Free Software Foundation, Inc. NOTE: The canonical source of this file is maintained with the GNU C Library. Bugs can be reported to bug-glibc@gnu.org. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #ifndef _GNU_GETOPT_H #define _GNU_GETOPT_H 1 /* We only use getopt_long(), not getopt(), so we don't need a fully prototyped declaration of getopt(). This forces the prototype for getopt() to be compatible with all systems. Solaris in particular seems to have a prototype for getopt() in unistd.h which conflicts with the one in this file if we don't do this. */ #undef HAVE_DECL_GETOPT #define HAVE_DECL_GETOPT 1 #ifdef __cplusplus extern "C" { #endif /* For communication from `getopt' to the caller. When `getopt' finds an option that takes an argument, the argument value is returned here. Also, when `ordering' is RETURN_IN_ORDER, each non-option ARGV-element is returned here. */ extern char *optarg; /* Index in ARGV of the next element to be scanned. This is used for communication to and from the caller and for communication between successive calls to `getopt'. On entry to `getopt', zero means this is the first call; initialize. When `getopt' returns -1, this is the index of the first of the non-option elements that the caller should itself scan. Otherwise, `optind' communicates from one call to the next how much of ARGV has been scanned so far. */ extern int optind; /* Callers store zero here to inhibit the error message `getopt' prints for unrecognized options. */ extern int opterr; /* Set to an option character which was unrecognized. */ extern int optopt; /* Describe the long-named options requested by the application. The LONG_OPTIONS argument to getopt_long or getopt_long_only is a vector of `struct option' terminated by an element containing a name which is zero. The field `has_arg' is: no_argument (or 0) if the option does not take an argument, required_argument (or 1) if the option requires an argument, optional_argument (or 2) if the option takes an optional argument. If the field `flag' is not NULL, it points to a variable that is set to the value given in the field `val' when the option is found, but left unchanged if the option is not found. To have a long-named option do something other than set an `int' to a compiled-in constant, such as set a value from `optarg', set the option's `flag' field to zero and its `val' field to a nonzero value (the equivalent single-letter option character, if there is one). For long options that have a zero `flag' field, `getopt' returns the contents of the `val' field. */ struct option { #if defined (__STDC__) && __STDC__ const char *name; #else char *name; #endif /* has_arg can't be an enum because some compilers complain about type mismatches in all the code that assumes it is an int. */ int has_arg; int *flag; int val; }; /* Names for the values of the `has_arg' field of `struct option'. */ #define no_argument 0 #define required_argument 1 #define optional_argument 2 #if defined (__STDC__) && __STDC__ /* HAVE_DECL_* is a three-state macro: undefined, 0 or 1. If it is undefined, we haven't run the autoconf check so provide the declaration without arguments. If it is 0, we checked and failed to find the declaration so provide a fully prototyped one. If it is 1, we found it so don't provide any declaration at all. */ #if defined (__GNU_LIBRARY__) || (defined (HAVE_DECL_GETOPT) && !HAVE_DECL_GETOPT) /* Many other libraries have conflicting prototypes for getopt, with differences in the consts, in stdlib.h. To avoid compilation errors, only prototype getopt for the GNU C library. */ extern int getopt (int argc, char *const *argv, const char *shortopts); #else /* not __GNU_LIBRARY__ */ # if !defined (HAVE_DECL_GETOPT) extern int getopt (); # endif #endif /* __GNU_LIBRARY__ */ extern int getopt_long (int argc, char *const *argv, const char *shortopts, const struct option *longopts, int *longind); extern int getopt_long_only (int argc, char *const *argv, const char *shortopts, const struct option *longopts, int *longind); /* Internal only. Users should not call this directly. */ extern int _getopt_internal (int argc, char *const *argv, const char *shortopts, const struct option *longopts, int *longind, int long_only); #else /* not __STDC__ */ extern int getopt (); extern int getopt_long (); extern int getopt_long_only (); extern int _getopt_internal (); #endif /* __STDC__ */ #ifdef __cplusplus } #endif #endif /* gnu_getopt.h */ simulavr-0.1.2.2/src/getopt/gnu_getopt1.c0000644000175000001440000001067207716312473015142 00000000000000/* getopt_long and getopt_long_only entry points for GNU getopt. Copyright (C) 1987,88,89,90,91,92,93,94,96,97,98,99,2000,01,02 Free Software Foundation, Inc. NOTE: This source is derived from an old version taken from the GNU C Library (glibc). This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #ifdef HAVE_CONFIG_H #include #endif #include "gnu_getopt.h" #if !defined __STDC__ || !__STDC__ /* This is a separate conditional since some stdc systems reject `defined (const)'. */ #ifndef const #define const #endif #endif #include /* Comment out all this code if we are using the GNU C Library, and are not actually compiling the library itself. This code is part of the GNU C Library, but also included in many other GNU distributions. Compiling and linking in this code is a waste when using the GNU C library (especially if it is a shared library). Rather than having every GNU program understand `configure --with-gnu-libc' and omit the object files, it is simpler to just do this in the source for each such file. */ #define GETOPT_INTERFACE_VERSION 2 #if !defined _LIBC && defined __GLIBC__ && __GLIBC__ >= 2 #include #if _GNU_GETOPT_INTERFACE_VERSION == GETOPT_INTERFACE_VERSION #define ELIDE_CODE #endif #endif #ifndef ELIDE_CODE /* This needs to come after some library #include to get __GNU_LIBRARY__ defined. */ #ifdef __GNU_LIBRARY__ #include #endif #ifndef NULL #define NULL 0 #endif int getopt_long (argc, argv, options, long_options, opt_index) int argc; char *const *argv; const char *options; const struct option *long_options; int *opt_index; { return _getopt_internal (argc, argv, options, long_options, opt_index, 0); } /* Like getopt_long, but '-' as well as '--' can indicate a long option. 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Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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install-data install-data-am install-exec install-exec-am \ install-info install-info-am install-man install-strip \ installcheck installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \ uninstall-am uninstall-binPROGRAMS uninstall-info-am # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: simulavr-0.1.2.2/src/disp/disp.c0000644000175000001440000007206007762553062013303 00000000000000/* * $Id: disp.c,v 1.18 2003/12/01 05:48:34 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* WARNING: This code is a hack and needs major improvements. */ #include "config.h" #include #include #include #include #include #include #include #include #include #include #include #include #include "gnu_getopt.h" #ifdef HAS_NCURSES # include #else # include #endif /* *INDENT-OFF* */ enum _constants { REG_OFFSET = 9, REG_LABEL_LINE = 0, REG_ROWS = 4, /* 4 for Rnn */ REG_ROW_OFFSET = 3, /* 1 for PC, SP, etc; 1 fir X,Y,Z, 1 for SREG */ REG_LINES = REG_ROWS+REG_ROW_OFFSET, REG_COLS = 8, IO_REG_LABEL_LINE = REG_LABEL_LINE + REG_LINES + 1, IO_REG_LINES = 16, /* 16 lines for io registers */ IO_REG_COLS = 4, /* data displayed with # of cols */ SRAM_LABEL_LINE = IO_REG_LABEL_LINE + IO_REG_LINES + 1, SRAM_LABEL_ADDR_COL = 14, SRAM_GOTO_ADDR_COL = 40, SRAM_COLS = 16, SRAM_COL_OFFSET = 9, MAX_BUF = 1024, MAX_READ_RETRY = 10, MAX_REG = 32, MAX_IO_REG = 64, MAX_IO_REG_BUF = 64, }; /* *INDENT-ON* */ WINDOW *win_reg; WINDOW *win_io_reg; WINDOW *win_sram; WINDOW *win_main; WINDOW *cur_win; struct timespec nap = { 0, 1000000 }; /* 1 ms */ int sig_int = 0; int sig_winch = 0; unsigned int xreg = 0; unsigned int yreg = 0; unsigned int zreg = 0; unsigned int spreg = 0; union fp_reg { float fval; unsigned char ival[4]; }; union fp_reg fp_regs[3]; struct SRAM { int size; /* size of array */ int curr; /* curr cursor position */ int vis_lines; /* how many lines can we show */ int vis_beg; /* first visible address */ int vis_end; /* first non-visible address after last visible */ unsigned char *data; /* the data array */ }; struct SRAM sram[1]; /* global sram storage */ char *io_reg_names[MAX_IO_REG]; void sram_destroy (void); void disp_move_cursor (int addr); void disp_delete_windows (void); /* Convert a hexidecimal digit to a 4 bit nibble. */ int hex2nib (char hex) { if ((hex >= 'A') && (hex <= 'F')) return (10 + (hex - 'A')); else if ((hex >= 'a') && (hex <= 'f')) return (10 + (hex - 'a')); else if ((hex >= '0') && (hex <= '9')) return (hex - '0'); /* Shouldn't get here unless the developer screwed up ;) */ fprintf (stderr, "Invalid hexidecimal digit: 0x%02x", hex); exit (1); return 0; /* make compiler happy */ } void sram_init (int size, int start) { sram->size = size + start; sram->curr = -1; sram->vis_lines = 0; sram->vis_beg = 0; sram->vis_end = 0; sram->data = (unsigned char *)malloc (sizeof (unsigned char) * sram->size); if (sram->data == NULL) abort (); memset (sram->data, '\0', sram->size); /* zero out the array */ atexit (sram_destroy); } void sram_vis_setup (int lines) { /* we'll always show SRAM_COLS addresses per line */ sram->vis_lines = lines; sram->vis_beg = 0; sram->vis_end = SRAM_COLS * lines; if (sram->vis_end > sram->size) sram->vis_end = sram->size; } void sram_destroy (void) { if (sram->data) free (sram->data); } void disp_sig_handler (int sig) { switch (sig) { case SIGINT: sig_int++; break; case SIGWINCH: sig_winch++; break; } } /* Wrap read(2) so we can read a byte without having to do a shit load of error checking every time. */ char disp_read_byte (int fd) { char c; int res; int cnt = MAX_READ_RETRY; while (cnt--) { res = read (fd, &c, 1); if (res < 0) { fprintf (stderr, "read failed: %s", strerror (errno)); exit (1); } if (res == 0) { standout (); mvwprintw (win_main, LINES - 1, 4, " incomplete read "); standend (); continue; } return c; } fprintf (stderr, "Maximum read reties reached"); exit (1); return 0; /* make compiler happy */ } void disp_draw_borders (void) { /* Draw borders for all windows on main on main */ wstandout (win_main); wborder (win_main, '|', '|', '-', '-', '-', '-', '-', '-'); wmove (win_main, IO_REG_LABEL_LINE, 0); whline (win_main, '-', COLS); wmove (win_main, SRAM_LABEL_LINE, 0); whline (win_main, '-', COLS); mvwprintw (win_main, REG_LABEL_LINE, 3, " Registers "); mvwprintw (win_main, IO_REG_LABEL_LINE, 3, " IO Registers "); mvwprintw (win_main, SRAM_LABEL_LINE, 3, " SRAM [ 0x0000 ] "); wstandend (win_main); } void disp_print_reg (int reg, unsigned char val) { int row, col; row = (reg % REG_ROWS) + REG_ROW_OFFSET; col = ((COLS - 4) / REG_COLS) * (reg / REG_ROWS) + 7; mvwprintw (win_reg, row, col, "%02x", val); } void disp_print_pc (int val) { int w = (COLS - 4) / 4; mvwprintw (win_reg, 0, REG_OFFSET, "0x%08x", val); mvwprintw (win_reg, 0, REG_OFFSET + w, "0x%08x", val * 2); } void disp_print_sp (int val) { mvwprintw (win_reg, 0, REG_OFFSET + ((COLS - 4) / 4) * 2, "0x%08x", val); } /* Print the X, Y and Z address registers */ void disp_print_addr_reg (int reg, unsigned int val) { int c = REG_OFFSET + ((COLS - 4) / 4 * (reg / 2 - 13)); mvwprintw (win_reg, 1, c, "0x%08x", val); } /* Print the floating point registers. These are pseudo registers where fp0 -> r17::r14 fp1 -> r21::r18 fp2 -> r25::r22 */ void disp_print_float_reg (int fp_reg, float val) { mvwprintw (win_reg, fp_reg, REG_OFFSET + ((COLS - 4) / 4) * 3, " "); mvwprintw (win_reg, fp_reg, REG_OFFSET + ((COLS - 4) / 4) * 3, "%+e", (double)val); } void disp_print_sreg (unsigned char val) { int i; mvwprintw (win_reg, 2, 7, "%02x", val); for (i = 0; i < 8; i++) mvwprintw (win_reg, 2, 14 + (i * 4), "%d", val >> (7 - i) & 0x1); } void disp_reg_labels (void) { int i, j, w; /* Print PC, PC*2, SP, ??? */ w = (COLS - 4) / 4; mvwprintw (win_reg, 0, 2, " PC ="); mvwprintw (win_reg, 0, 2 + w, "PC*2 ="); mvwprintw (win_reg, 0, 2 + w * 2, " SP ="); /* Print X, Y, Z */ mvwprintw (win_reg, 1, 2, " X ="); mvwprintw (win_reg, 1, 2 + w, " Y ="); mvwprintw (win_reg, 1, 2 + w * 2, " Z ="); /* Floating point registers */ mvwprintw (win_reg, 0, 2 + w * 3 - 3, "r17::14 ="); mvwprintw (win_reg, 1, 2 + w * 3 - 3, "r21::18 ="); mvwprintw (win_reg, 2, 2 + w * 3 - 3, "r25::22 ="); /* Print SREG */ mvwprintw (win_reg, 2, 2, "SREG=00 I=0 T=0 H=0 S=0 V=0 N=0 Z=0 C=0"); w = (COLS - 4) / REG_COLS; /* Print the rNN registers */ for (i = 0; i < REG_ROWS; i++) { for (j = 0; j < REG_COLS; j++) { mvwprintw (win_reg, i + REG_ROW_OFFSET, 3 + w * j, "r%02d=", j * REG_ROWS + i); } } for (i = 0; i < MAX_REG; i++) disp_print_reg (i, 0); disp_print_addr_reg (26, 0); disp_print_addr_reg (28, 0); disp_print_addr_reg (30, 0); disp_print_float_reg (0, 0.0); disp_print_float_reg (1, 0.0); disp_print_float_reg (2, 0.0); disp_print_pc (0); disp_print_sp (0); } void disp_print_io_reg (int reg, unsigned char val) { int row, col; row = (reg % IO_REG_LINES); col = ((COLS - 4) / IO_REG_COLS) * (reg / IO_REG_LINES) + 7; mvwprintw (win_io_reg, row, col, "%02x", val); } void disp_print_io_reg_name (int reg, char *long_name) { int w, wn, r, c; char name[50]; w = (COLS - 4) / IO_REG_COLS; wn = w - 11; /* "[nn]=vv " */ r = reg % IO_REG_LINES; c = 11 + (reg / IO_REG_LINES) * w; strncpy (io_reg_names[reg], long_name, MAX_IO_REG_BUF); strncpy (name, long_name, wn); mvwprintw (win_io_reg, r, c, "%-*s", wn, name); } /* Print the IO Registers */ void disp_io_reg_labels (void) { int i, j, w; char name[50]; int wn; memset (name, '\0', 50); w = (COLS - 4) / IO_REG_COLS; wn = w - 11; /* "[nn]=vv " */ for (i = 0; i < IO_REG_LINES; i++) { for (j = 0; j < IO_REG_COLS; j++) { int reg = j * IO_REG_LINES + i; strncpy (name, io_reg_names[reg], wn); mvwprintw (win_io_reg, i, 2 + w * j, "[%02x]= %-*s", reg, wn, name); } } for (i = 0; i < MAX_IO_REG; i++) disp_print_io_reg (i, 0); } void disp_update_sram (void) { int i, j, w; int addr; werase (win_sram); w = (COLS - 2 - SRAM_COL_OFFSET) / SRAM_COLS; /* 2 for borders, 9 for addr */ for (i = 0; i < sram->vis_lines; i++) { addr = (sram->vis_beg / SRAM_COLS + i) * SRAM_COLS; if (addr >= sram->size) break; mvwprintw (win_sram, i, 0, "0x%04x :", addr); for (j = 0; j < SRAM_COLS; j++) { if (addr + j >= sram->size) break; mvwprintw (win_sram, i, SRAM_COL_OFFSET + j * w, "%02x", sram->data[addr + j]); } } } void disp_set_sram_values (char *pkt) { unsigned int addr, len; unsigned char datum; int i; if (sscanf (pkt, "%x,%x:", &addr, &len) != 2) return; while (*pkt != ':') pkt++; pkt++; /* skip over ':' */ for (i = 0; i < len; i++) { datum = hex2nib (*pkt++) << 4; datum += hex2nib (*pkt++) & 0xf; if (((addr + i) >= 0) && ((addr + i) < sram->size)) sram->data[addr + i] = datum; } /* Update the screen if any address in range [addr, addr+len) is in the range of [sram->vis_beg, sram->vis_end). */ if ((addr < sram->vis_end) && ((addr + len) > sram->vis_beg)) disp_update_sram (); } /* Move the cursor to another sram address and update the current address in the border. Scroll the SRAM window if needed. */ void disp_move_cursor (int addr) { int r, c, w; if (addr < 0) return; if (addr >= sram->size) return; sram->curr = addr; standout (); mvwprintw (win_main, SRAM_LABEL_LINE, SRAM_LABEL_ADDR_COL, "%04x", addr); standend (); if (addr < sram->vis_beg) { /* need to scroll up */ sram->vis_beg = (addr / SRAM_COLS) * SRAM_COLS; sram->vis_end = sram->vis_beg + (SRAM_COLS * sram->vis_lines); if (sram->vis_end > sram->size) sram->vis_end = sram->size; disp_update_sram (); } if (addr >= sram->vis_end) { /* need to scroll down */ sram->vis_beg = (addr / SRAM_COLS - sram->vis_lines + 1) * SRAM_COLS; sram->vis_end = sram->vis_beg + (SRAM_COLS * sram->vis_lines); if (sram->vis_end > sram->size) sram->vis_end = sram->size; disp_update_sram (); } /* move the cursor */ w = (COLS - 2 - SRAM_COL_OFFSET) / SRAM_COLS; /* 2 for borders, 9 for addr */ r = (addr - sram->vis_beg) / SRAM_COLS; c = SRAM_COL_OFFSET + ((addr % SRAM_COLS) * w); wmove (win_sram, r, c); } void disp_cycle_cur_win (void) { /* This does nothing at the moment */ /* if (cur_win == win_sram) */ /* cur_win = win_eeprom; */ /* else if (cur_win == win_eeprom) */ /* cur_win = win_sram; */ /* else */ /* { */ /* fprintf(stderr, "bad win for cycling\n"); */ /* abort(); */ /* } */ /* wmove(cur_win, 0, 0); */ } void disp_initialize (void) { int lines, cols, line, col; static int is_scr_initialized = 0; /* When the xterm is resized, we will call disp_initialize() again to re-draw the display. */ if (is_scr_initialized == 0) { win_main = initscr (); is_scr_initialized = 1; } else { disp_delete_windows (); } /* Setup the register window */ line = col = REG_LABEL_LINE + 1; lines = REG_LINES; cols = COLS - 2; /* use entire width of main less borders */ win_reg = subwin (win_main, lines, cols, line, col); /* Setup io register window */ line = IO_REG_LABEL_LINE + 1; lines = IO_REG_LINES; win_io_reg = subwin (win_main, lines, cols, line, col); /* Setup sram window */ line = SRAM_LABEL_LINE + 1; lines = LINES - line - 1; /* use rest of screen */ sram_vis_setup (lines); win_sram = subwin (win_main, lines, cols, line, col); disp_draw_borders (); disp_reg_labels (); disp_io_reg_labels (); disp_update_sram (); cur_win = win_sram; wrefresh (win_main); keypad (win_main, TRUE); noecho (); nodelay (win_main, TRUE); /* I used this for debugging, might need it again. */ if (0) { struct winsize size; if (ioctl (STDOUT_FILENO, TIOCGWINSZ, (char *)&size) >= 0) mvwprintw (win_main, 0, 20, "rows:%d(%d) cols:%d(%d)", size.ws_row, LINES, size.ws_col, COLS); } } /* The terminal has been resized, redraw the display. */ static void disp_change_size (void) { struct winsize size[1]; if (ioctl (STDIN_FILENO, TIOCGWINSZ, (char *)size) >= 0) { resizeterm (size->ws_row, size->ws_col); #if 0 mvwprintw (win_main, 0, 20, "rows:%d(%d) cols:%d(%d)", size->ws_row, LINES, size->ws_col, COLS); #endif werase (win_main); disp_initialize (); disp_move_cursor (sram->curr); wrefresh (win_main); wrefresh (win_reg); wrefresh (win_io_reg); wrefresh (win_sram); } } void disp_delete_windows (void) { delwin (win_reg); delwin (win_io_reg); delwin (win_sram); } void disp_cleanup (void) { disp_delete_windows (); endwin (); } void disp_usage (char *prog) { fprintf (stderr, "Usage: %s [-p |--pfd=nn] flash_size sram_size " "sram_start eeprom_size\n", prog); exit (1); } #define GOTO_INIT_STR " Goto Addr -> [ ] " #define GOTO_WIPE_STR "-----------------------------" #define GOTO_FMT_STR " Goto Addr -> [ %10s ] " #define MAX_ADDR_STR 10 /* See if the user has hit any keys and process them. Returns, 1 if user wants to quit and 0 otherwise. */ int disp_check_for_user_input (void) { int c; int new_addr; char *endptr; static int goto_mode = 0; static char addr_str[MAX_ADDR_STR + 1]; static int len = 0; if (goto_mode) { switch (c = getch ()) { case KEY_ENTER: case '\n': new_addr = strtol (addr_str, &endptr, 0); disp_move_cursor (new_addr); /* fall through to exit mode */ case '\033': /* ESC */ len = 0; memset (addr_str, '\0', sizeof (addr_str)); goto_mode = 0; standout (); mvwprintw (win_main, SRAM_LABEL_LINE, SRAM_GOTO_ADDR_COL, "%s", GOTO_WIPE_STR); standend (); break; case KEY_BACKSPACE: if (len > 0) { addr_str[--len] = '\0'; standout (); mvwprintw (win_main, SRAM_LABEL_LINE, SRAM_GOTO_ADDR_COL, GOTO_FMT_STR, addr_str); standend (); } break; default: if (isxdigit (c) || (c == 'x') || (c == 'X')) { if (len < (sizeof (addr_str) - 1)) { addr_str[len++] = c; standout (); mvwprintw (win_main, SRAM_LABEL_LINE, SRAM_GOTO_ADDR_COL, GOTO_FMT_STR, addr_str); standend (); } } } } else { switch (c = getch ()) { case ERR: break; /* no key has been pressed */ case '\t': disp_cycle_cur_win (); break; case 'k': case KEY_UP: disp_move_cursor (sram->curr - SRAM_COLS); break; case 'j': case KEY_DOWN: disp_move_cursor (sram->curr + SRAM_COLS); break; case 'h': case KEY_LEFT: disp_move_cursor (sram->curr - 1); break; case 'l': case KEY_RIGHT: disp_move_cursor (sram->curr + 1); break; case 'g': len = 0; memset (addr_str, '\0', sizeof (addr_str)); standout (); mvwprintw (win_main, SRAM_LABEL_LINE, SRAM_GOTO_ADDR_COL, GOTO_FMT_STR, " "); standend (); goto_mode = 1; break; case KEY_HOME: disp_move_cursor (0); break; case KEY_END: disp_move_cursor (sram->size - 1); break; case KEY_PPAGE: new_addr = sram->curr - (sram->vis_end - sram->vis_beg); if (new_addr < 0) { new_addr = 0; } disp_move_cursor (new_addr); break; case KEY_NPAGE: new_addr = sram->curr + (sram->vis_end - sram->vis_beg); if (new_addr >= sram->size) { new_addr = sram->size - 1; } disp_move_cursor (new_addr); break; case 'q': case 'Q': return 1; } } wrefresh (win_main); wrefresh (win_reg); wrefresh (win_io_reg); wrefresh (win_sram); return 0; } /* Parse an input packet which has already been decoded. */ int disp_parse_packet (char *pkt) { int val; unsigned int bval; char name[50]; switch (*pkt++) { case 'q': /* quit */ return 1; case 'p': /* set program counter */ if (sscanf (pkt, "%x", &val) == 1) disp_print_pc (val); break; case 'r': /* set register */ if (sscanf (pkt, "%x:%x", &val, &bval) == 2) { if ((val >= 14) && (val <= 25)) { int fp_reg = (val - 14) / 4; int fp_byte = (val - 14) % 4; fp_regs[fp_reg].ival[fp_byte] = (bval & 0xff); disp_print_float_reg (fp_reg, fp_regs[fp_reg].fval); } if ((val >= 26) && (val <= 31)) { unsigned int areg; switch (val) { case 26: areg = xreg = (xreg & 0xff00) | (bval & 0xff); break; case 27: areg = xreg = (xreg & 0xff) | ((bval << 8) & 0xff00); break; case 28: areg = yreg = (yreg & 0xff00) | (bval & 0xff); break; case 29: areg = yreg = (yreg & 0xff) | ((bval << 8) & 0xff00); break; case 30: areg = zreg = (zreg & 0xff00) | (bval & 0xff); break; case 31: areg = zreg = (zreg & 0xff) | ((bval << 8) & 0xff00); break; } disp_print_addr_reg (val, areg); } disp_print_reg (val, (unsigned char)bval); } break; case 's': /* set sram value */ disp_set_sram_values (pkt); break; case 'i': /* set io register value */ if (sscanf (pkt, "%x:%x", &val, &bval) == 2) { if (val == 0x3d) /* SPL */ { spreg = (spreg & 0xff00) | (bval & 0xff); disp_print_sp (spreg); } else if (val == 0x3e) /* SPH */ { spreg = (spreg & 0xff) | ((bval << 8) & 0xff00); disp_print_sp (spreg); } else if (val == 0x3f) /* SREG */ { disp_print_sreg (bval); } disp_print_io_reg (val, (unsigned char)bval); } break; case 'I': /* set io register name */ if (sscanf (pkt, "%x:%s", &val, name) == 2) disp_print_io_reg_name (val, name); break; case 'e': /* set eeprom value: not implemented yet */ break; case 'f': /* set flash value: not implemented yet */ break; } disp_move_cursor (sram->curr); return 0; } /* Read an incoming packet. Turns off non-bolcking mode while reading the packet data from the pipe and turns it on again when done. */ int disp_read_packet (int fd) { int i; char c; char pkt_buf[MAX_BUF + 1]; int cksum, pkt_cksum; int result = 0; /* turn non-blocking mode off */ if (fcntl (fd, F_SETFL, fcntl (fd, F_GETFL, 0) & ~O_NONBLOCK) < 0) { fprintf (stderr, "fcntl failed: %s\n", strerror (errno)); exit (1); } /* insure that packet is null terminated. */ memset (pkt_buf, 0, sizeof (pkt_buf)); pkt_cksum = i = 0; c = disp_read_byte (fd); while ((c != '#') && (i < MAX_BUF)) { pkt_buf[i++] = c; pkt_cksum += (unsigned char)c; c = disp_read_byte (fd); } cksum = hex2nib (disp_read_byte (fd)) << 4; cksum |= hex2nib (disp_read_byte (fd)); if ((pkt_cksum & 0xff) != cksum) { fprintf (stderr, "Bad checksum: sent 0x%x <--> computed 0x%x", cksum, pkt_cksum); sleep (10); exit (1); } /* parse the packet */ result = disp_parse_packet (pkt_buf); /* turn non-blocking mode back on */ if (fcntl (fd, F_SETFL, fcntl (fd, F_GETFL, 0) | O_NONBLOCK) < 0) { fprintf (stderr, "fcntl failed: %s\n", strerror (errno)); exit (1); } return result; } /* See if the parent process (usually simulavr) has written an update request to the update pipe. Parent may ask us to quit. Return 1 if we should quit, 0 otherwise. */ int disp_check_update_pipe (int pfd) { int res; char c; if (pfd < 0) return 0; /* no pipe to read from */ while (1) { res = read (pfd, &c, 1); if (res < 0) { if (errno == EAGAIN) return 0; /* no data available */ fprintf (stderr, "read failed: %s\n", strerror (errno)); exit (1); } if (res == 0) return 0; /* got some data */ switch (c) { case '$': return disp_read_packet (pfd); } } return 0; } /* *INDENT-OFF* */ static struct option long_opts[] = { /* name, has_arg, flag, val */ { "help", 0, 0, 'h' }, { "pfd", 1, 0, 'p' }, { 0, 0, 0, 0 } }; /* *INDENT-ON* */ struct ARGS { int flash_size; /* not used, yet */ int sram_size; int sram_start; int eeprom_size; /* not used, yet */ int pipe_fd; }; void disp_parse_cmd_line (int argc, char **argv, struct ARGS *args) { int c; char *prog = argv[0]; int option_index; opterr = 0; /* disable default error message */ /* init the args */ args->sram_size = 0; args->sram_start = 0; args->pipe_fd = -1; while (1) { c = getopt_long (argc, argv, "hp:", long_opts, &option_index); if (c == -1) break; /* no more options */ switch (c) { case 'h': case '?': disp_usage (prog); case 'p': args->pipe_fd = atoi (optarg); break; default: fprintf (stderr, "getop() did something screwey"); exit (1); } } if ((optind + 4) == argc) { args->flash_size = atoi (argv[optind + 0]); args->sram_size = atoi (argv[optind + 1]); args->sram_start = atoi (argv[optind + 2]); args->eeprom_size = atoi (argv[optind + 3]); } else disp_usage (prog); } int main (int argc, char **argv) { struct ARGS args[1]; int i; int max_fd; int rv; int updated; fd_set watchset, inset; struct timeval to, otime, tdiff; for (i = 0; i < MAX_IO_REG; i++) { io_reg_names[i] = (char *)malloc ((MAX_IO_REG_BUF + 1) * sizeof (char)); memset (io_reg_names[i], '\0', MAX_IO_REG_BUF + 1); strncpy (io_reg_names[i], "Reserved", MAX_IO_REG_BUF); } disp_parse_cmd_line (argc, argv, args); if (args->pipe_fd >= 0) { /* make pipe_fd non-blocking */ if (fcntl (args->pipe_fd, F_SETFL, fcntl (args->pipe_fd, F_GETFL, 0) | O_NONBLOCK) < 0) { fprintf (stderr, "fcntl failed: %s\n", strerror (errno)); exit (1); } } sram_init (args->sram_size, args->sram_start); signal (SIGINT, disp_sig_handler); signal (SIGWINCH, disp_sig_handler); /* setup the select() for multiplexing */ FD_ZERO (&watchset); if (args->pipe_fd >= 0) FD_SET (args->pipe_fd, &watchset); FD_SET (STDIN_FILENO, &watchset); max_fd = STDIN_FILENO > args->pipe_fd ? STDIN_FILENO : args->pipe_fd; disp_initialize (); atexit (disp_cleanup); disp_move_cursor (0); wrefresh (win_main); wrefresh (win_reg); wrefresh (win_io_reg); wrefresh (win_sram); timerclear (&otime); updated = 0; /* main loop */ while (FD_ISSET (STDIN_FILENO, &watchset) || ((args->pipe_fd >= 0) && FD_ISSET (args->pipe_fd, &watchset))) { if (sig_int) { sig_int = 0; break; } if (sig_winch) { sig_winch = 0; disp_change_size (); } to.tv_sec = 0; to.tv_usec = 100000; inset = watchset; /* copy watch since select() updates it */ if ((rv = select (max_fd + 1, &inset, NULL, NULL, &to)) < 0) { if (errno == EINTR) continue; fprintf (stderr, "select failed: %s\n", strerror (errno)); exit (1); } if (FD_ISSET (STDIN_FILENO, &inset)) { if (disp_check_for_user_input () && (args->pipe_fd == -1)) { /* Only enable quiting if not using the pipe so that the user can't quit the display if it's run as a sub-process. */ break; } } if ((args->pipe_fd >= 0) && FD_ISSET (args->pipe_fd, &inset)) { updated++; if (disp_check_update_pipe (args->pipe_fd)) break; } gettimeofday (&to, 0); timersub (&to, &otime, &tdiff); if (updated && (tdiff.tv_sec > 0 || tdiff.tv_usec > 100000)) { wrefresh (win_main); wrefresh (win_reg); wrefresh (win_io_reg); wrefresh (win_sram); updated = 0; otime = to; } } return 0; } simulavr-0.1.2.2/src/disp-vcd/0000777000175000001440000000000010204750217013013 500000000000000simulavr-0.1.2.2/src/disp-vcd/Makefile.am0000644000175000001440000000253007757741453015010 00000000000000# # $Id: Makefile.am,v 1.3 2003/11/22 20:12:27 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002, 2003 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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simulavr-0.1.2.2/src/disp-vcd/config_parser.c0000644000175000001440000011137710203247753015733 00000000000000/* A Bison parser, made by GNU Bison 1.875d. */ /* Skeleton parser for Yacc-like parsing with Bison, Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* As a special exception, when this file is copied by Bison into a Bison output file, you may use that output file without restriction. This special exception was added by the Free Software Foundation in version 1.24 of Bison. */ /* Written by Richard Stallman by simplifying the original so called ``semantic'' parser. */ /* All symbols defined below should begin with yy or YY, to avoid infringing on user name space. This should be done even for local variables, as they might otherwise be expanded by user macros. There are some unavoidable exceptions within include files to define necessary library symbols; they are noted "INFRINGES ON USER NAME SPACE" below. */ /* Identify Bison output. */ #define YYBISON 1 /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" /* Pure parsers. */ #define YYPURE 0 /* Using locations. */ #define YYLSP_NEEDED 0 /* If NAME_PREFIX is specified substitute the variables and functions names. */ #define yyparse config_parse #define yylex config_lex #define yyerror config_error #define yylval config_lval #define yychar config_char #define yydebug config_debug #define yynerrs config_nerrs /* Tokens. */ #ifndef YYTOKENTYPE # define YYTOKENTYPE /* Put the tokens into the symbol table, so that GDB and other debuggers know about them. */ enum yytokentype { CP_FREQUENCY = 258, CP_VCD_FILE = 259, CP_TRACE = 260, CP_SRAM = 261, CP_EEPROM = 262, CP_PROGMEM = 263, CP_REG = 264, CP_FREG = 265, CP_IOREG = 266, CP_SP = 267, CP_PC = 268, CP_NAME = 269, CP_FILENAME = 270, CP_NUMBER = 271 }; #endif #define CP_FREQUENCY 258 #define CP_VCD_FILE 259 #define CP_TRACE 260 #define CP_SRAM 261 #define CP_EEPROM 262 #define CP_PROGMEM 263 #define CP_REG 264 #define CP_FREG 265 #define CP_IOREG 266 #define CP_SP 267 #define CP_PC 268 #define CP_NAME 269 #define CP_FILENAME 270 #define CP_NUMBER 271 /* Copy the first part of user declarations. */ #line 26 "config_parser.y" #include #include #include #include "vcd.h" extern void config_scanner_init( FILE *infile ); extern int config_lex( void ); void config_error( char *s ); int parse_config( FILE *infile ); extern char *config_text; int errorFound; /* Enabling traces. */ #ifndef YYDEBUG # define YYDEBUG 0 #endif /* Enabling verbose error messages. */ #ifdef YYERROR_VERBOSE # undef YYERROR_VERBOSE # define YYERROR_VERBOSE 1 #else # define YYERROR_VERBOSE 0 #endif #if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) #line 64 "config_parser.y" typedef union YYSTYPE { int integer; char *string; struct { int from; int to; } t_range; } YYSTYPE; /* Line 191 of yacc.c. */ #line 145 "config_parser.c" # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 # define YYSTYPE_IS_TRIVIAL 1 #endif /* Copy the second part of user declarations. */ /* Line 214 of yacc.c. */ #line 157 "config_parser.c" #if ! defined (yyoverflow) || YYERROR_VERBOSE # ifndef YYFREE # define YYFREE free # endif # ifndef YYMALLOC # define YYMALLOC malloc # endif /* The parser invokes alloca or malloc; define the necessary symbols. */ # ifdef YYSTACK_USE_ALLOCA # if YYSTACK_USE_ALLOCA # define YYSTACK_ALLOC alloca # endif # else # if defined (alloca) || defined (_ALLOCA_H) # define YYSTACK_ALLOC alloca # else # ifdef __GNUC__ # define YYSTACK_ALLOC __builtin_alloca # endif # endif # endif # ifdef YYSTACK_ALLOC /* Pacify GCC's `empty if-body' warning. */ # define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) # else # if defined (__STDC__) || defined (__cplusplus) # include /* INFRINGES ON USER NAME SPACE */ # define YYSIZE_T size_t # endif # define YYSTACK_ALLOC YYMALLOC # define YYSTACK_FREE YYFREE # endif #endif /* ! defined (yyoverflow) || YYERROR_VERBOSE */ #if (! defined (yyoverflow) \ && (! defined (__cplusplus) \ || (defined (YYSTYPE_IS_TRIVIAL) && YYSTYPE_IS_TRIVIAL))) /* A type that is properly aligned for any stack member. */ union yyalloc { short int yyss; YYSTYPE yyvs; }; /* The size of the maximum gap between one aligned stack and the next. */ # define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) /* The size of an array large to enough to hold all stacks, each with N elements. */ # define YYSTACK_BYTES(N) \ ((N) * (sizeof (short int) + sizeof (YYSTYPE)) \ + YYSTACK_GAP_MAXIMUM) /* Copy COUNT objects from FROM to TO. The source and destination do not overlap. */ # ifndef YYCOPY # if defined (__GNUC__) && 1 < __GNUC__ # define YYCOPY(To, From, Count) \ __builtin_memcpy (To, From, (Count) * sizeof (*(From))) # else # define YYCOPY(To, From, Count) \ do \ { \ register YYSIZE_T yyi; \ for (yyi = 0; yyi < (Count); yyi++) \ (To)[yyi] = (From)[yyi]; \ } \ while (0) # endif # endif /* Relocate STACK from its old location to the new one. The local variables YYSIZE and YYSTACKSIZE give the old and new number of elements in the stack, and YYPTR gives the new location of the stack. Advance YYPTR to a properly aligned location for the next stack. */ # define YYSTACK_RELOCATE(Stack) \ do \ { \ YYSIZE_T yynewbytes; \ YYCOPY (&yyptr->Stack, Stack, yysize); \ Stack = &yyptr->Stack; \ yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ yyptr += yynewbytes / sizeof (*yyptr); \ } \ while (0) #endif #if defined (__STDC__) || defined (__cplusplus) typedef signed char yysigned_char; #else typedef short int yysigned_char; #endif /* YYFINAL -- State number of the termination state. */ #define YYFINAL 5 /* YYLAST -- Last index in YYTABLE. */ #define YYLAST 41 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 22 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 10 /* YYNRULES -- Number of rules. */ #define YYNRULES 23 /* YYNRULES -- Number of states. */ #define YYNSTATES 45 /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ #define YYUNDEFTOK 2 #define YYMAXUTOK 271 #define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) /* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ static const unsigned char yytranslate[] = { 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 21, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 19, 2, 2, 20, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 17, 2, 18, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }; #if YYDEBUG /* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in YYRHS. */ static const unsigned char yyprhs[] = { 0, 0, 3, 7, 12, 17, 22, 23, 25, 30, 33, 36, 39, 42, 45, 48, 51, 54, 56, 58, 60, 66, 68, 70 }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ static const yysigned_char yyrhs[] = { 23, 0, -1, 24, 25, 26, -1, 3, 20, 31, 21, -1, 4, 20, 29, 21, -1, 4, 20, 30, 21, -1, -1, 21, -1, 26, 5, 27, 21, -1, 1, 21, -1, 6, 28, -1, 7, 28, -1, 8, 28, -1, 9, 28, -1, 9, 29, -1, 11, 28, -1, 11, 29, -1, 12, -1, 13, -1, 31, -1, 17, 31, 19, 31, 18, -1, 14, -1, 15, -1, 16, -1 }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ static const unsigned char yyrline[] = { 0, 84, 84, 88, 94, 98, 103, 105, 106, 107, 110, 116, 117, 118, 124, 128, 134, 139, 143, 149, 154, 161, 168, 175 }; #endif #if YYDEBUG || YYERROR_VERBOSE /* YYTNME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. First, the terminals, then, starting at YYNTOKENS, nonterminals. */ static const char *const yytname[] = { "$end", "error", "$undefined", "CP_FREQUENCY", "CP_VCD_FILE", "CP_TRACE", "CP_SRAM", "CP_EEPROM", "CP_PROGMEM", "CP_REG", "CP_FREG", "CP_IOREG", "CP_SP", "CP_PC", "CP_NAME", "CP_FILENAME", "CP_NUMBER", "'['", "']'", "':'", "'='", "'\\n'", "$accept", "conf_file", "frequency_def", "vcd_file_def", "trace_defs", "trace_def", "range", "name", "filename", "number", 0 }; #endif # ifdef YYPRINT /* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to token YYLEX-NUM. */ static const unsigned short int yytoknum[] = { 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 91, 93, 58, 61, 10 }; # endif /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const unsigned char yyr1[] = { 0, 22, 23, 24, 25, 25, 26, 26, 26, 26, 27, 27, 27, 27, 27, 27, 27, 27, 27, 28, 28, 29, 30, 31 }; /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ static const unsigned char yyr2[] = { 0, 2, 3, 4, 4, 4, 0, 1, 4, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 5, 1, 1, 1 }; /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state STATE-NUM when YYTABLE doesn't specify something else to do. Zero means the default is an error. */ static const unsigned char yydefact[] = { 0, 0, 0, 0, 0, 1, 0, 0, 23, 0, 0, 0, 7, 2, 3, 21, 22, 0, 0, 9, 0, 4, 5, 0, 0, 0, 0, 0, 17, 18, 0, 0, 10, 19, 11, 12, 13, 14, 15, 16, 8, 0, 0, 0, 20 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yysigned_char yydefgoto[] = { -1, 2, 3, 7, 13, 30, 32, 17, 18, 33 }; /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ #define YYPACT_NINF -16 static const yysigned_char yypact[] = { 4, -15, 12, 16, 15, -16, 8, 1, -16, 11, -11, 13, -16, 28, -16, -16, -16, 14, 18, -16, 2, -16, -16, 9, 9, 9, 7, 7, -16, -16, 19, 15, -16, -16, -16, -16, -16, -16, -16, -16, -16, 17, 15, 23, -16 }; /* YYPGOTO[NTERM-NUM]. */ static const yysigned_char yypgoto[] = { -16, -16, -16, -16, -16, -16, -8, 3, -16, -4 }; /* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If positive, shift that token. If negative, reduce the rule which number is the opposite. If zero, do what YYDEFACT says. If YYTABLE_NINF, syntax error. */ #define YYTABLE_NINF -7 static const yysigned_char yytable[] = { 9, -6, 11, 15, 16, 4, -6, 1, 23, 24, 25, 26, 5, 27, 28, 29, 34, 35, 36, 38, 6, 15, 12, 8, 31, 8, 31, 41, 10, 37, 39, 8, 14, 20, 19, 21, 42, 0, 43, 22, 40, 44 }; static const yysigned_char yycheck[] = { 4, 0, 1, 14, 15, 20, 5, 3, 6, 7, 8, 9, 0, 11, 12, 13, 24, 25, 26, 27, 4, 14, 21, 16, 17, 16, 17, 31, 20, 26, 27, 16, 21, 5, 21, 21, 19, -1, 42, 21, 21, 18 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const unsigned char yystos[] = { 0, 3, 23, 24, 20, 0, 4, 25, 16, 31, 20, 1, 21, 26, 21, 14, 15, 29, 30, 21, 5, 21, 21, 6, 7, 8, 9, 11, 12, 13, 27, 17, 28, 31, 28, 28, 28, 29, 28, 29, 21, 31, 19, 31, 18 }; #if ! defined (YYSIZE_T) && defined (__SIZE_TYPE__) # define YYSIZE_T __SIZE_TYPE__ #endif #if ! defined (YYSIZE_T) && defined (size_t) # define YYSIZE_T size_t #endif #if ! defined (YYSIZE_T) # if defined (__STDC__) || defined (__cplusplus) # include /* INFRINGES ON USER NAME SPACE */ # define YYSIZE_T size_t # endif #endif #if ! defined (YYSIZE_T) # define YYSIZE_T unsigned int #endif #define yyerrok (yyerrstatus = 0) #define yyclearin (yychar = YYEMPTY) #define YYEMPTY (-2) #define YYEOF 0 #define YYACCEPT goto yyacceptlab #define YYABORT goto yyabortlab #define YYERROR goto yyerrorlab /* Like YYERROR except do call yyerror. This remains here temporarily to ease the transition to the new meaning of YYERROR, for GCC. Once GCC version 2 has supplanted version 1, this can go. */ #define YYFAIL goto yyerrlab #define YYRECOVERING() (!!yyerrstatus) #define YYBACKUP(Token, Value) \ do \ if (yychar == YYEMPTY && yylen == 1) \ { \ yychar = (Token); \ yylval = (Value); \ yytoken = YYTRANSLATE (yychar); \ YYPOPSTACK; \ goto yybackup; \ } \ else \ { \ yyerror ("syntax error: cannot back up");\ YYERROR; \ } \ while (0) #define YYTERROR 1 #define YYERRCODE 256 /* YYLLOC_DEFAULT -- Compute the default location (before the actions are run). */ #ifndef YYLLOC_DEFAULT # define YYLLOC_DEFAULT(Current, Rhs, N) \ ((Current).first_line = (Rhs)[1].first_line, \ (Current).first_column = (Rhs)[1].first_column, \ (Current).last_line = (Rhs)[N].last_line, \ (Current).last_column = (Rhs)[N].last_column) #endif /* YYLEX -- calling `yylex' with the right arguments. */ #ifdef YYLEX_PARAM # define YYLEX yylex (YYLEX_PARAM) #else # define YYLEX yylex () #endif /* Enable debugging if requested. */ #if YYDEBUG # ifndef YYFPRINTF # include /* INFRINGES ON USER NAME SPACE */ # define YYFPRINTF fprintf # endif # define YYDPRINTF(Args) \ do { \ if (yydebug) \ YYFPRINTF Args; \ } while (0) # define YYDSYMPRINT(Args) \ do { \ if (yydebug) \ yysymprint Args; \ } while (0) # define YYDSYMPRINTF(Title, Token, Value, Location) \ do { \ if (yydebug) \ { \ YYFPRINTF (stderr, "%s ", Title); \ yysymprint (stderr, \ Token, Value); \ YYFPRINTF (stderr, "\n"); \ } \ } while (0) /*------------------------------------------------------------------. | yy_stack_print -- Print the state stack from its BOTTOM up to its | | TOP (included). | `------------------------------------------------------------------*/ #if defined (__STDC__) || defined (__cplusplus) static void yy_stack_print (short int *bottom, short int *top) #else static void yy_stack_print (bottom, top) short int *bottom; short int *top; #endif { YYFPRINTF (stderr, "Stack now"); for (/* Nothing. */; bottom <= top; ++bottom) YYFPRINTF (stderr, " %d", *bottom); YYFPRINTF (stderr, "\n"); } # define YY_STACK_PRINT(Bottom, Top) \ do { \ if (yydebug) \ yy_stack_print ((Bottom), (Top)); \ } while (0) /*------------------------------------------------. | Report that the YYRULE is going to be reduced. | `------------------------------------------------*/ #if defined (__STDC__) || defined (__cplusplus) static void yy_reduce_print (int yyrule) #else static void yy_reduce_print (yyrule) int yyrule; #endif { int yyi; unsigned int yylno = yyrline[yyrule]; YYFPRINTF (stderr, "Reducing stack by rule %d (line %u), ", yyrule - 1, yylno); /* Print the symbols being reduced, and their result. */ for (yyi = yyprhs[yyrule]; 0 <= yyrhs[yyi]; yyi++) YYFPRINTF (stderr, "%s ", yytname [yyrhs[yyi]]); YYFPRINTF (stderr, "-> %s\n", yytname [yyr1[yyrule]]); } # define YY_REDUCE_PRINT(Rule) \ do { \ if (yydebug) \ yy_reduce_print (Rule); \ } while (0) /* Nonzero means print parse trace. It is left uninitialized so that multiple parsers can coexist. */ int yydebug; #else /* !YYDEBUG */ # define YYDPRINTF(Args) # define YYDSYMPRINT(Args) # define YYDSYMPRINTF(Title, Token, Value, Location) # define YY_STACK_PRINT(Bottom, Top) # define YY_REDUCE_PRINT(Rule) #endif /* !YYDEBUG */ /* YYINITDEPTH -- initial size of the parser's stacks. */ #ifndef YYINITDEPTH # define YYINITDEPTH 200 #endif /* YYMAXDEPTH -- maximum size the stacks can grow to (effective only if the built-in stack extension method is used). Do not make this value too large; the results are undefined if SIZE_MAX < YYSTACK_BYTES (YYMAXDEPTH) evaluated with infinite-precision integer arithmetic. */ #if defined (YYMAXDEPTH) && YYMAXDEPTH == 0 # undef YYMAXDEPTH #endif #ifndef YYMAXDEPTH # define YYMAXDEPTH 10000 #endif #if YYERROR_VERBOSE # ifndef yystrlen # if defined (__GLIBC__) && defined (_STRING_H) # define yystrlen strlen # else /* Return the length of YYSTR. */ static YYSIZE_T # if defined (__STDC__) || defined (__cplusplus) yystrlen (const char *yystr) # else yystrlen (yystr) const char *yystr; # endif { register const char *yys = yystr; while (*yys++ != '\0') continue; return yys - yystr - 1; } # endif # endif # ifndef yystpcpy # if defined (__GLIBC__) && defined (_STRING_H) && defined (_GNU_SOURCE) # define yystpcpy stpcpy # else /* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in YYDEST. */ static char * # if defined (__STDC__) || defined (__cplusplus) yystpcpy (char *yydest, const char *yysrc) # else yystpcpy (yydest, yysrc) char *yydest; const char *yysrc; # endif { register char *yyd = yydest; register const char *yys = yysrc; while ((*yyd++ = *yys++) != '\0') continue; return yyd - 1; } # endif # endif #endif /* !YYERROR_VERBOSE */ #if YYDEBUG /*--------------------------------. | Print this symbol on YYOUTPUT. | `--------------------------------*/ #if defined (__STDC__) || defined (__cplusplus) static void yysymprint (FILE *yyoutput, int yytype, YYSTYPE *yyvaluep) #else static void yysymprint (yyoutput, yytype, yyvaluep) FILE *yyoutput; int yytype; YYSTYPE *yyvaluep; #endif { /* Pacify ``unused variable'' warnings. */ (void) yyvaluep; if (yytype < YYNTOKENS) { YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); # ifdef YYPRINT YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); # endif } else YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); switch (yytype) { default: break; } YYFPRINTF (yyoutput, ")"); } #endif /* ! YYDEBUG */ /*-----------------------------------------------. | Release the memory associated to this symbol. | `-----------------------------------------------*/ #if defined (__STDC__) || defined (__cplusplus) static void yydestruct (int yytype, YYSTYPE *yyvaluep) #else static void yydestruct (yytype, yyvaluep) int yytype; YYSTYPE *yyvaluep; #endif { /* Pacify ``unused variable'' warnings. */ (void) yyvaluep; switch (yytype) { default: break; } } /* Prevent warnings from -Wmissing-prototypes. */ #ifdef YYPARSE_PARAM # if defined (__STDC__) || defined (__cplusplus) int yyparse (void *YYPARSE_PARAM); # else int yyparse (); # endif #else /* ! YYPARSE_PARAM */ #if defined (__STDC__) || defined (__cplusplus) int yyparse (void); #else int yyparse (); #endif #endif /* ! YYPARSE_PARAM */ /* The lookahead symbol. */ int yychar; /* The semantic value of the lookahead symbol. */ YYSTYPE yylval; /* Number of syntax errors so far. */ int yynerrs; /*----------. | yyparse. | `----------*/ #ifdef YYPARSE_PARAM # if defined (__STDC__) || defined (__cplusplus) int yyparse (void *YYPARSE_PARAM) # else int yyparse (YYPARSE_PARAM) void *YYPARSE_PARAM; # endif #else /* ! YYPARSE_PARAM */ #if defined (__STDC__) || defined (__cplusplus) int yyparse (void) #else int yyparse () #endif #endif { register int yystate; register int yyn; int yyresult; /* Number of tokens to shift before error messages enabled. */ int yyerrstatus; /* Lookahead token as an internal (translated) token number. */ int yytoken = 0; /* Three stacks and their tools: `yyss': related to states, `yyvs': related to semantic values, `yyls': related to locations. Refer to the stacks thru separate pointers, to allow yyoverflow to reallocate them elsewhere. */ /* The state stack. */ short int yyssa[YYINITDEPTH]; short int *yyss = yyssa; register short int *yyssp; /* The semantic value stack. */ YYSTYPE yyvsa[YYINITDEPTH]; YYSTYPE *yyvs = yyvsa; register YYSTYPE *yyvsp; #define YYPOPSTACK (yyvsp--, yyssp--) YYSIZE_T yystacksize = YYINITDEPTH; /* The variables used to return semantic value and location from the action routines. */ YYSTYPE yyval; /* When reducing, the number of symbols on the RHS of the reduced rule. */ int yylen; YYDPRINTF ((stderr, "Starting parse\n")); yystate = 0; yyerrstatus = 0; yynerrs = 0; yychar = YYEMPTY; /* Cause a token to be read. */ /* Initialize stack pointers. Waste one element of value and location stack so that they stay on the same level as the state stack. The wasted elements are never initialized. */ yyssp = yyss; yyvsp = yyvs; goto yysetstate; /*------------------------------------------------------------. | yynewstate -- Push a new state, which is found in yystate. | `------------------------------------------------------------*/ yynewstate: /* In all cases, when you get here, the value and location stacks have just been pushed. so pushing a state here evens the stacks. */ yyssp++; yysetstate: *yyssp = yystate; if (yyss + yystacksize - 1 <= yyssp) { /* Get the current used size of the three stacks, in elements. */ YYSIZE_T yysize = yyssp - yyss + 1; #ifdef yyoverflow { /* Give user a chance to reallocate the stack. Use copies of these so that the &'s don't force the real ones into memory. */ YYSTYPE *yyvs1 = yyvs; short int *yyss1 = yyss; /* Each stack pointer address is followed by the size of the data in use in that stack, in bytes. This used to be a conditional around just the two extra args, but that might be undefined if yyoverflow is a macro. */ yyoverflow ("parser stack overflow", &yyss1, yysize * sizeof (*yyssp), &yyvs1, yysize * sizeof (*yyvsp), &yystacksize); yyss = yyss1; yyvs = yyvs1; } #else /* no yyoverflow */ # ifndef YYSTACK_RELOCATE goto yyoverflowlab; # else /* Extend the stack our own way. */ if (YYMAXDEPTH <= yystacksize) goto yyoverflowlab; yystacksize *= 2; if (YYMAXDEPTH < yystacksize) yystacksize = YYMAXDEPTH; { short int *yyss1 = yyss; union yyalloc *yyptr = (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); if (! yyptr) goto yyoverflowlab; YYSTACK_RELOCATE (yyss); YYSTACK_RELOCATE (yyvs); # undef YYSTACK_RELOCATE if (yyss1 != yyssa) YYSTACK_FREE (yyss1); } # endif #endif /* no yyoverflow */ yyssp = yyss + yysize - 1; yyvsp = yyvs + yysize - 1; YYDPRINTF ((stderr, "Stack size increased to %lu\n", (unsigned long int) yystacksize)); if (yyss + yystacksize - 1 <= yyssp) YYABORT; } YYDPRINTF ((stderr, "Entering state %d\n", yystate)); goto yybackup; /*-----------. | yybackup. | `-----------*/ yybackup: /* Do appropriate processing given the current state. */ /* Read a lookahead token if we need one and don't already have one. */ /* yyresume: */ /* First try to decide what to do without reference to lookahead token. */ yyn = yypact[yystate]; if (yyn == YYPACT_NINF) goto yydefault; /* Not known => get a lookahead token if don't already have one. */ /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ if (yychar == YYEMPTY) { YYDPRINTF ((stderr, "Reading a token: ")); yychar = YYLEX; } if (yychar <= YYEOF) { yychar = yytoken = YYEOF; YYDPRINTF ((stderr, "Now at end of input.\n")); } else { yytoken = YYTRANSLATE (yychar); YYDSYMPRINTF ("Next token is", yytoken, &yylval, &yylloc); } /* If the proper action on seeing token YYTOKEN is to reduce or to detect an error, take that action. */ yyn += yytoken; if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) goto yydefault; yyn = yytable[yyn]; if (yyn <= 0) { if (yyn == 0 || yyn == YYTABLE_NINF) goto yyerrlab; yyn = -yyn; goto yyreduce; } if (yyn == YYFINAL) YYACCEPT; /* Shift the lookahead token. */ YYDPRINTF ((stderr, "Shifting token %s, ", yytname[yytoken])); /* Discard the token being shifted unless it is eof. */ if (yychar != YYEOF) yychar = YYEMPTY; *++yyvsp = yylval; /* Count tokens shifted since error; after three, turn off error status. */ if (yyerrstatus) yyerrstatus--; yystate = yyn; goto yynewstate; /*-----------------------------------------------------------. | yydefault -- do the default action for the current state. | `-----------------------------------------------------------*/ yydefault: yyn = yydefact[yystate]; if (yyn == 0) goto yyerrlab; goto yyreduce; /*-----------------------------. | yyreduce -- Do a reduction. | `-----------------------------*/ yyreduce: /* yyn is the number of a rule to reduce with. */ yylen = yyr2[yyn]; /* If YYLEN is nonzero, implement the default value of the action: `$$ = $1'. Otherwise, the following line sets YYVAL to garbage. This behavior is undocumented and Bison users should not rely upon it. Assigning to YYVAL unconditionally makes the parser a bit smaller, and it avoids a GCC warning that YYVAL may be used uninitialized. */ yyval = yyvsp[1-yylen]; YY_REDUCE_PRINT (yyn); switch (yyn) { case 3: #line 89 "config_parser.y" { vcd_set_frequency( yyvsp[-1].integer ); } break; case 4: #line 95 "config_parser.y" { vcd_set_file_name( yyvsp[-1].string ); } break; case 5: #line 99 "config_parser.y" { vcd_set_file_name( yyvsp[-1].string ); } break; case 9: #line 107 "config_parser.y" { yyerrok; } break; case 10: #line 111 "config_parser.y" { int i; for( i = yyvsp[0].t_range.from; i <= yyvsp[0].t_range.to; i++ ) vcd_trace_sram( i ); } break; case 13: #line 119 "config_parser.y" { int i; for( i = yyvsp[0].t_range.from; i <= yyvsp[0].t_range.to; i++ ) vcd_trace_reg( i ); } break; case 14: #line 125 "config_parser.y" { free( yyvsp[0].string ); } break; case 15: #line 129 "config_parser.y" { int i; for( i = yyvsp[0].t_range.from; i <= yyvsp[0].t_range.to; i++ ) vcd_trace_io_reg( NULL, i ); } break; case 16: #line 135 "config_parser.y" { vcd_trace_io_reg( yyvsp[0].string, -1 ); free( yyvsp[0].string ); } break; case 17: #line 140 "config_parser.y" { vcd_trace_sp(); } break; case 18: #line 144 "config_parser.y" { vcd_trace_pc(); } break; case 19: #line 150 "config_parser.y" { yyval.t_range.from = yyvsp[0].integer; yyval.t_range.to = yyvsp[0].integer; } break; case 20: #line 155 "config_parser.y" { yyval.t_range.from = yyvsp[-3].integer; yyval.t_range.to = yyvsp[-1].integer; } break; case 21: #line 162 "config_parser.y" { yyval.string = (char *)malloc( strlen( config_text ) + 1 ); strcpy( yyval.string, config_text ); } break; case 22: #line 169 "config_parser.y" { yyval.string = (char *)malloc( strlen( config_text ) + 1 ); strcpy( yyval.string, config_text ); } break; case 23: #line 176 "config_parser.y" { yyval.integer = atoi( config_text ); } break; } /* Line 1010 of yacc.c. */ #line 1190 "config_parser.c" yyvsp -= yylen; yyssp -= yylen; YY_STACK_PRINT (yyss, yyssp); *++yyvsp = yyval; /* Now `shift' the result of the reduction. Determine what state that goes to, based on the state we popped back to and the rule number reduced by. */ yyn = yyr1[yyn]; yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) yystate = yytable[yystate]; else yystate = yydefgoto[yyn - YYNTOKENS]; goto yynewstate; /*------------------------------------. | yyerrlab -- here on detecting error | `------------------------------------*/ yyerrlab: /* If not already recovering from an error, report this error. */ if (!yyerrstatus) { ++yynerrs; #if YYERROR_VERBOSE yyn = yypact[yystate]; if (YYPACT_NINF < yyn && yyn < YYLAST) { YYSIZE_T yysize = 0; int yytype = YYTRANSLATE (yychar); const char* yyprefix; char *yymsg; int yyx; /* Start YYX at -YYN if negative to avoid negative indexes in YYCHECK. */ int yyxbegin = yyn < 0 ? -yyn : 0; /* Stay within bounds of both yycheck and yytname. */ int yychecklim = YYLAST - yyn; int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; int yycount = 0; yyprefix = ", expecting "; for (yyx = yyxbegin; yyx < yyxend; ++yyx) if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) { yysize += yystrlen (yyprefix) + yystrlen (yytname [yyx]); yycount += 1; if (yycount == 5) { yysize = 0; break; } } yysize += (sizeof ("syntax error, unexpected ") + yystrlen (yytname[yytype])); yymsg = (char *) YYSTACK_ALLOC (yysize); if (yymsg != 0) { char *yyp = yystpcpy (yymsg, "syntax error, unexpected "); yyp = yystpcpy (yyp, yytname[yytype]); if (yycount < 5) { yyprefix = ", expecting "; for (yyx = yyxbegin; yyx < yyxend; ++yyx) if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) { yyp = yystpcpy (yyp, yyprefix); yyp = yystpcpy (yyp, yytname[yyx]); yyprefix = " or "; } } yyerror (yymsg); YYSTACK_FREE (yymsg); } else yyerror ("syntax error; also virtual memory exhausted"); } else #endif /* YYERROR_VERBOSE */ yyerror ("syntax error"); } if (yyerrstatus == 3) { /* If just tried and failed to reuse lookahead token after an error, discard it. */ if (yychar <= YYEOF) { /* If at end of input, pop the error token, then the rest of the stack, then return failure. */ if (yychar == YYEOF) for (;;) { YYPOPSTACK; if (yyssp == yyss) YYABORT; YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp); yydestruct (yystos[*yyssp], yyvsp); } } else { YYDSYMPRINTF ("Error: discarding", yytoken, &yylval, &yylloc); yydestruct (yytoken, &yylval); yychar = YYEMPTY; } } /* Else will try to reuse lookahead token after shifting the error token. */ goto yyerrlab1; /*---------------------------------------------------. | yyerrorlab -- error raised explicitly by YYERROR. | `---------------------------------------------------*/ yyerrorlab: #ifdef __GNUC__ /* Pacify GCC when the user code never invokes YYERROR and the label yyerrorlab therefore never appears in user code. */ if (0) goto yyerrorlab; #endif yyvsp -= yylen; yyssp -= yylen; yystate = *yyssp; goto yyerrlab1; /*-------------------------------------------------------------. | yyerrlab1 -- common code for both syntax error and YYERROR. | `-------------------------------------------------------------*/ yyerrlab1: yyerrstatus = 3; /* Each real token shifted decrements this. */ for (;;) { yyn = yypact[yystate]; if (yyn != YYPACT_NINF) { yyn += YYTERROR; if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) { yyn = yytable[yyn]; if (0 < yyn) break; } } /* Pop the current state because it cannot handle the error token. */ if (yyssp == yyss) YYABORT; YYDSYMPRINTF ("Error: popping", yystos[*yyssp], yyvsp, yylsp); yydestruct (yystos[yystate], yyvsp); YYPOPSTACK; yystate = *yyssp; YY_STACK_PRINT (yyss, yyssp); } if (yyn == YYFINAL) YYACCEPT; YYDPRINTF ((stderr, "Shifting error token, ")); *++yyvsp = yylval; yystate = yyn; goto yynewstate; /*-------------------------------------. | yyacceptlab -- YYACCEPT comes here. | `-------------------------------------*/ yyacceptlab: yyresult = 0; goto yyreturn; /*-----------------------------------. | yyabortlab -- YYABORT comes here. | `-----------------------------------*/ yyabortlab: yyresult = 1; goto yyreturn; #ifndef yyoverflow /*----------------------------------------------. | yyoverflowlab -- parser overflow comes here. | `----------------------------------------------*/ yyoverflowlab: yyerror ("parser stack overflow"); yyresult = 2; /* Fall through. */ #endif yyreturn: #ifndef yyoverflow if (yyss != yyssa) YYSTACK_FREE (yyss); #endif return yyresult; } #line 182 "config_parser.y" extern int config_get_line (void); /************************************************************************* * Funktion : mapping_error() gibt den als Parameter übergebenen String * auf dem Standard-Fehlerkanal aus. Diese Funktion wird von * mapping_parse() aufgerufen, wenn ein ihr ein Fehler gefunden * wurde. * Parameter : s - Auszugebender Fehlertext * Vorbeding. : - * Nachbeding. : - * Return : - *************************************************************************/ void config_error( char *s ) { errorFound = 1; fprintf( stderr, "line %i: %s\n", config_get_line(), s ); } /************************************************************************* * Funktion : * Parameter : * Vorbeding. : - * Nachbeding. : * Return : *************************************************************************/ int parse_config( FILE *infile ) { int rv; errorFound = 0; /* Scanner iniitialization. */ config_scanner_init( infile ); /* Parse the data. */ rv = config_parse(); if ( errorFound || (rv != 0) ) return( 0 ); return( 1 ); } simulavr-0.1.2.2/src/disp-vcd/config_parser.h0000644000175000001440000000447710203247753015742 00000000000000/* A Bison parser, made by GNU Bison 1.875d. */ /* Skeleton parser for Yacc-like parsing with Bison, Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* As a special exception, when this file is copied by Bison into a Bison output file, you may use that output file without restriction. This special exception was added by the Free Software Foundation in version 1.24 of Bison. */ /* Tokens. */ #ifndef YYTOKENTYPE # define YYTOKENTYPE /* Put the tokens into the symbol table, so that GDB and other debuggers know about them. */ enum yytokentype { CP_FREQUENCY = 258, CP_VCD_FILE = 259, CP_TRACE = 260, CP_SRAM = 261, CP_EEPROM = 262, CP_PROGMEM = 263, CP_REG = 264, CP_FREG = 265, CP_IOREG = 266, CP_SP = 267, CP_PC = 268, CP_NAME = 269, CP_FILENAME = 270, CP_NUMBER = 271 }; #endif #define CP_FREQUENCY 258 #define CP_VCD_FILE 259 #define CP_TRACE 260 #define CP_SRAM 261 #define CP_EEPROM 262 #define CP_PROGMEM 263 #define CP_REG 264 #define CP_FREG 265 #define CP_IOREG 266 #define CP_SP 267 #define CP_PC 268 #define CP_NAME 269 #define CP_FILENAME 270 #define CP_NUMBER 271 #if ! defined (YYSTYPE) && ! defined (YYSTYPE_IS_DECLARED) #line 64 "config_parser.y" typedef union YYSTYPE { int integer; char *string; struct { int from; int to; } t_range; } YYSTYPE; /* Line 1285 of yacc.c. */ #line 79 "y.tab.h" # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 # define YYSTYPE_IS_TRIVIAL 1 #endif extern YYSTYPE config_lval; simulavr-0.1.2.2/src/disp-vcd/config_scanner.c0000644000175000001440000012224010203247753016057 00000000000000#define yy_create_buffer config__create_buffer #define yy_delete_buffer config__delete_buffer #define yy_scan_buffer config__scan_buffer #define yy_scan_string config__scan_string #define yy_scan_bytes config__scan_bytes #define yy_flex_debug config__flex_debug #define yy_init_buffer config__init_buffer #define yy_flush_buffer config__flush_buffer #define yy_load_buffer_state config__load_buffer_state #define yy_switch_to_buffer config__switch_to_buffer #define yyin config_in #define yyleng config_leng #define yylex config_lex #define yyout config_out #define yyrestart config_restart #define yytext config_text #line 19 "config_scanner.c" /* A lexical scanner generated by flex */ /* Scanner skeleton version: * $Header: /home/daffy/u0/vern/flex/RCS/flex.skl,v 2.91 96/09/10 16:58:48 vern Exp $ */ #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 5 #include #include /* cfront 1.2 defines "c_plusplus" instead of "__cplusplus" */ #ifdef c_plusplus #ifndef __cplusplus #define __cplusplus #endif #endif #ifdef __cplusplus #include /* Use prototypes in function declarations. */ #define YY_USE_PROTOS /* The "const" storage-class-modifier is valid. */ #define YY_USE_CONST #else /* ! __cplusplus */ #if __STDC__ #define YY_USE_PROTOS #define YY_USE_CONST #endif /* __STDC__ */ #endif /* ! __cplusplus */ #ifdef __TURBOC__ #pragma warn -rch #pragma warn -use #include #include #define YY_USE_CONST #define YY_USE_PROTOS #endif #ifdef YY_USE_CONST #define yyconst const #else #define yyconst #endif #ifdef YY_USE_PROTOS #define YY_PROTO(proto) proto #else #define YY_PROTO(proto) () #endif /* Returned upon end-of-file. */ #define YY_NULL 0 /* Promotes a possibly negative, possibly signed char to an unsigned * integer for use as an array index. If the signed char is negative, * we want to instead treat it as an 8-bit unsigned char, hence the * double cast. */ #define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) /* Enter a start condition. This macro really ought to take a parameter, * but we do it the disgusting crufty way forced on us by the ()-less * definition of BEGIN. */ #define BEGIN yy_start = 1 + 2 * /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ #define YY_START ((yy_start - 1) / 2) #define YYSTATE YY_START /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) /* Special action meaning "start processing a new file". */ #define YY_NEW_FILE yyrestart( yyin ) #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ #define YY_BUF_SIZE 16384 typedef struct yy_buffer_state *YY_BUFFER_STATE; extern int yyleng; extern FILE *yyin, *yyout; #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 /* The funky do-while in the following #define is used to turn the definition * int a single C statement (which needs a semi-colon terminator). This * avoids problems with code like: * * if ( condition_holds ) * yyless( 5 ); * else * do_something_else(); * * Prior to using the do-while the compiler would get upset at the * "else" because it interpreted the "if" statement as being all * done when it reached the ';' after the yyless() call. */ /* Return all but the first 'n' matched characters back to the input stream. */ #define yyless(n) \ do \ { \ /* Undo effects of setting up yytext. */ \ *yy_cp = yy_hold_char; \ YY_RESTORE_YY_MORE_OFFSET \ yy_c_buf_p = yy_cp = yy_bp + n - YY_MORE_ADJ; \ YY_DO_BEFORE_ACTION; /* set up yytext again */ \ } \ while ( 0 ) #define unput(c) yyunput( c, yytext_ptr ) /* The following is because we cannot portably get our hands on size_t * (without autoconf's help, which isn't available because we want * flex-generated scanners to compile on their own). */ typedef unsigned int yy_size_t; struct yy_buffer_state { FILE *yy_input_file; char *yy_ch_buf; /* input buffer */ char *yy_buf_pos; /* current position in input buffer */ /* Size of input buffer in bytes, not including room for EOB * characters. */ yy_size_t yy_buf_size; /* Number of characters read into yy_ch_buf, not including EOB * characters. */ int yy_n_chars; /* Whether we "own" the buffer - i.e., we know we created it, * and can realloc() it to grow it, and should free() it to * delete it. */ int yy_is_our_buffer; /* Whether this is an "interactive" input source; if so, and * if we're using stdio for input, then we want to use getc() * instead of fread(), to make sure we stop fetching input after * each newline. */ int yy_is_interactive; /* Whether we're considered to be at the beginning of a line. * If so, '^' rules will be active on the next match, otherwise * not. */ int yy_at_bol; /* Whether to try to fill the input buffer when we reach the * end of it. */ int yy_fill_buffer; int yy_buffer_status; #define YY_BUFFER_NEW 0 #define YY_BUFFER_NORMAL 1 /* When an EOF's been seen but there's still some text to process * then we mark the buffer as YY_EOF_PENDING, to indicate that we * shouldn't try reading from the input source any more. We might * still have a bunch of tokens to match, though, because of * possible backing-up. * * When we actually see the EOF, we change the status to "new" * (via yyrestart()), so that the user can continue scanning by * just pointing yyin at a new input file. */ #define YY_BUFFER_EOF_PENDING 2 }; static YY_BUFFER_STATE yy_current_buffer = 0; /* We provide macros for accessing buffer states in case in the * future we want to put the buffer states in a more general * "scanner state". */ #define YY_CURRENT_BUFFER yy_current_buffer /* yy_hold_char holds the character lost when yytext is formed. */ static char yy_hold_char; static int yy_n_chars; /* number of characters read into yy_ch_buf */ int yyleng; /* Points to current character in buffer. */ static char *yy_c_buf_p = (char *) 0; static int yy_init = 1; /* whether we need to initialize */ static int yy_start = 0; /* start state number */ /* Flag which is used to allow yywrap()'s to do buffer switches * instead of setting up a fresh yyin. A bit of a hack ... */ static int yy_did_buffer_switch_on_eof; void yyrestart YY_PROTO(( FILE *input_file )); void yy_switch_to_buffer YY_PROTO(( YY_BUFFER_STATE new_buffer )); void yy_load_buffer_state YY_PROTO(( void )); YY_BUFFER_STATE yy_create_buffer YY_PROTO(( FILE *file, int size )); void yy_delete_buffer YY_PROTO(( YY_BUFFER_STATE b )); void yy_init_buffer YY_PROTO(( YY_BUFFER_STATE b, FILE *file )); void yy_flush_buffer YY_PROTO(( YY_BUFFER_STATE b )); #define YY_FLUSH_BUFFER yy_flush_buffer( yy_current_buffer ) YY_BUFFER_STATE yy_scan_buffer YY_PROTO(( char *base, yy_size_t size )); YY_BUFFER_STATE yy_scan_string YY_PROTO(( yyconst char *yy_str )); YY_BUFFER_STATE yy_scan_bytes YY_PROTO(( yyconst char *bytes, int len )); static void *yy_flex_alloc YY_PROTO(( yy_size_t )); static void *yy_flex_realloc YY_PROTO(( void *, yy_size_t )); static void yy_flex_free YY_PROTO(( void * )); #define yy_new_buffer yy_create_buffer #define yy_set_interactive(is_interactive) \ { \ if ( ! yy_current_buffer ) \ yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); \ yy_current_buffer->yy_is_interactive = is_interactive; \ } #define yy_set_bol(at_bol) \ { \ if ( ! yy_current_buffer ) \ yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); \ yy_current_buffer->yy_at_bol = at_bol; \ } #define YY_AT_BOL() (yy_current_buffer->yy_at_bol) #define yywrap() 1 #define YY_SKIP_YYWRAP typedef unsigned char YY_CHAR; FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; typedef int yy_state_type; extern char *yytext; #define yytext_ptr yytext static yy_state_type yy_get_previous_state YY_PROTO(( void )); static yy_state_type yy_try_NUL_trans YY_PROTO(( yy_state_type current_state )); static int yy_get_next_buffer YY_PROTO(( void )); static void yy_fatal_error YY_PROTO(( yyconst char msg[] )); /* Done after the current pattern has been matched and before the * corresponding action - sets up yytext. */ #define YY_DO_BEFORE_ACTION \ yytext_ptr = yy_bp; \ yyleng = (int) (yy_cp - yy_bp); \ yy_hold_char = *yy_cp; \ *yy_cp = '\0'; \ yy_c_buf_p = yy_cp; #define YY_NUM_RULES 18 #define YY_END_OF_BUFFER 19 static yyconst short int yy_accept[64] = { 0, 0, 0, 19, 17, 16, 14, 13, 15, 12, 12, 12, 12, 12, 12, 12, 12, 12, 14, 13, 12, 12, 12, 12, 11, 12, 12, 10, 12, 12, 12, 12, 12, 12, 12, 7, 12, 12, 12, 12, 8, 12, 12, 12, 4, 12, 12, 12, 12, 9, 12, 3, 12, 5, 12, 12, 12, 12, 6, 12, 12, 2, 1, 0 } ; static yyconst int yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 5, 1, 1, 6, 1, 1, 1, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 8, 1, 9, 1, 10, 1, 11, 7, 12, 13, 14, 15, 16, 7, 17, 7, 7, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 7, 7, 29, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } ; static yyconst int yy_meta[30] = { 0, 1, 1, 2, 2, 1, 1, 2, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 } ; static yyconst short int yy_base[66] = { 0, 0, 0, 127, 131, 131, 0, 122, 131, 122, 27, 28, 29, 30, 31, 33, 32, 34, 0, 120, 120, 36, 35, 37, 119, 41, 44, 118, 40, 56, 50, 45, 61, 62, 63, 117, 67, 68, 65, 69, 116, 70, 71, 75, 115, 78, 80, 79, 82, 114, 85, 113, 86, 111, 88, 90, 97, 98, 109, 99, 101, 108, 104, 131, 104, 103 } ; static yyconst short int yy_def[66] = { 0, 63, 1, 63, 63, 63, 64, 64, 63, 65, 65, 65, 65, 65, 65, 65, 65, 65, 64, 64, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 0, 63, 63 } ; static yyconst short int yy_nxt[161] = { 0, 4, 5, 6, 7, 8, 8, 9, 8, 8, 9, 9, 9, 9, 10, 11, 9, 12, 9, 9, 9, 9, 13, 9, 14, 15, 16, 9, 17, 9, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 21, 24, 18, 18, 26, 30, 18, 18, 32, 23, 36, 22, 18, 25, 27, 29, 28, 31, 18, 35, 33, 34, 38, 18, 18, 18, 37, 18, 39, 18, 18, 18, 18, 18, 46, 42, 40, 18, 43, 45, 18, 18, 18, 41, 18, 44, 49, 18, 18, 47, 18, 51, 18, 50, 52, 54, 48, 53, 55, 18, 18, 18, 56, 18, 20, 18, 18, 57, 58, 60, 18, 18, 61, 18, 59, 18, 18, 18, 18, 18, 18, 18, 18, 19, 18, 19, 63, 63, 63, 62, 3, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 } ; static yyconst short int yy_chk[161] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 10, 11, 12, 13, 14, 16, 15, 17, 22, 21, 23, 10, 13, 28, 25, 14, 17, 26, 31, 22, 12, 28, 11, 30, 13, 15, 16, 15, 21, 29, 26, 23, 25, 30, 32, 33, 34, 29, 38, 31, 36, 37, 39, 41, 42, 38, 33, 32, 43, 34, 37, 45, 47, 46, 32, 48, 36, 42, 50, 52, 39, 54, 45, 55, 43, 46, 48, 41, 47, 50, 56, 57, 59, 52, 60, 65, 64, 62, 54, 55, 57, 61, 58, 59, 53, 56, 51, 49, 44, 40, 35, 27, 24, 20, 19, 9, 7, 3, 0, 0, 60, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63, 63 } ; static yy_state_type yy_last_accepting_state; static char *yy_last_accepting_cpos; /* The intent behind this definition is that it'll catch * any uses of REJECT which flex missed. */ #define REJECT reject_used_but_not_detected #define yymore() yymore_used_but_not_detected #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; #line 1 "config_scanner.l" #define INITIAL 0 /* * $Id: config_scanner.l,v 1.4 2004/02/26 07:33:34 troth Exp $ * **************************************************************************** * * simulavr-vcd - A vcd file writer as display process for simulavr. * Copyright (C) 2002 Carsten Beth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #line 27 "config_scanner.l" #include "config_parser.h" static int line; #define YY_USE_PROTOS #define YY_NO_UNPUT 1 #line 469 "config_scanner.c" /* Macros after this point can all be overridden by user definitions in * section 1. */ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus extern "C" int yywrap YY_PROTO(( void )); #else extern int yywrap YY_PROTO(( void )); #endif #endif #ifndef YY_NO_UNPUT static void yyunput YY_PROTO(( int c, char *buf_ptr )); #endif #ifndef yytext_ptr static void yy_flex_strncpy YY_PROTO(( char *, yyconst char *, int )); #endif #ifdef YY_NEED_STRLEN static int yy_flex_strlen YY_PROTO(( yyconst char * )); #endif #ifndef YY_NO_INPUT #ifdef __cplusplus static int yyinput YY_PROTO(( void )); #else static int input YY_PROTO(( void )); #endif #endif #if YY_STACK_USED static int yy_start_stack_ptr = 0; static int yy_start_stack_depth = 0; static int *yy_start_stack = 0; #ifndef YY_NO_PUSH_STATE static void yy_push_state YY_PROTO(( int new_state )); #endif #ifndef YY_NO_POP_STATE static void yy_pop_state YY_PROTO(( void )); #endif #ifndef YY_NO_TOP_STATE static int yy_top_state YY_PROTO(( void )); #endif #else #define YY_NO_PUSH_STATE 1 #define YY_NO_POP_STATE 1 #define YY_NO_TOP_STATE 1 #endif #ifdef YY_MALLOC_DECL YY_MALLOC_DECL #else #if __STDC__ #ifndef __cplusplus #include #endif #else /* Just try to get by without declaring the routines. This will fail * miserably on non-ANSI systems for which sizeof(size_t) != sizeof(int) * or sizeof(void*) != sizeof(int). */ #endif #endif /* Amount of stuff to slurp up with each read. */ #ifndef YY_READ_BUF_SIZE #define YY_READ_BUF_SIZE 8192 #endif /* Copy whatever the last rule matched to the standard output. */ #ifndef ECHO /* This used to be an fputs(), but since the string might contain NUL's, * we now use fwrite(). */ #define ECHO (void) fwrite( yytext, yyleng, 1, yyout ) #endif /* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, * is returned in "result". */ #ifndef YY_INPUT #define YY_INPUT(buf,result,max_size) \ if ( yy_current_buffer->yy_is_interactive ) \ { \ int c = '*', n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ if ( c == '\n' ) \ buf[n++] = (char) c; \ if ( c == EOF && ferror( yyin ) ) \ YY_FATAL_ERROR( "input in flex scanner failed" ); \ result = n; \ } \ else if ( ((result = fread( buf, 1, max_size, yyin )) == 0) \ && ferror( yyin ) ) \ YY_FATAL_ERROR( "input in flex scanner failed" ); #endif /* No semi-colon after return; correct usage is to write "yyterminate();" - * we don't want an extra ';' after the "return" because that will cause * some compilers to complain about unreachable statements. */ #ifndef yyterminate #define yyterminate() return YY_NULL #endif /* Number of entries by which start-condition stack grows. */ #ifndef YY_START_STACK_INCR #define YY_START_STACK_INCR 25 #endif /* Report a fatal error. */ #ifndef YY_FATAL_ERROR #define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) #endif /* Default declaration of generated scanner - a define so the user can * easily add parameters. */ #ifndef YY_DECL #define YY_DECL int yylex YY_PROTO(( void )) #endif /* Code executed at the beginning of each rule, after yytext and yyleng * have been set up. */ #ifndef YY_USER_ACTION #define YY_USER_ACTION #endif /* Code executed at the end of each rule. */ #ifndef YY_BREAK #define YY_BREAK break; #endif #define YY_RULE_SETUP \ YY_USER_ACTION YY_DECL { register yy_state_type yy_current_state; register char *yy_cp = NULL, *yy_bp = NULL; register int yy_act; #line 39 "config_scanner.l" #line 623 "config_scanner.c" if ( yy_init ) { yy_init = 0; #ifdef YY_USER_INIT YY_USER_INIT; #endif if ( ! yy_start ) yy_start = 1; /* first start state */ if ( ! yyin ) yyin = stdin; if ( ! yyout ) yyout = stdout; if ( ! yy_current_buffer ) yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); yy_load_buffer_state(); } while ( 1 ) /* loops until end-of-file is reached */ { yy_cp = yy_c_buf_p; /* Support of yytext. */ *yy_cp = yy_hold_char; /* yy_bp points to the position in yy_ch_buf of the start of * the current run. */ yy_bp = yy_cp; yy_current_state = yy_start; yy_match: do { register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; if ( yy_accept[yy_current_state] ) { yy_last_accepting_state = yy_current_state; yy_last_accepting_cpos = yy_cp; } while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 64 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; ++yy_cp; } while ( yy_base[yy_current_state] != 131 ); yy_find_action: yy_act = yy_accept[yy_current_state]; if ( yy_act == 0 ) { /* have to back up */ yy_cp = yy_last_accepting_cpos; yy_current_state = yy_last_accepting_state; yy_act = yy_accept[yy_current_state]; } YY_DO_BEFORE_ACTION; do_action: /* This label is used only to access EOF actions. */ switch ( yy_act ) { /* beginning of action switch */ case 0: /* must back up */ /* undo the effects of YY_DO_BEFORE_ACTION */ *yy_cp = yy_hold_char; yy_cp = yy_last_accepting_cpos; yy_current_state = yy_last_accepting_state; goto yy_find_action; case 1: YY_RULE_SETUP #line 41 "config_scanner.l" return( CP_FREQUENCY ); YY_BREAK case 2: YY_RULE_SETUP #line 42 "config_scanner.l" return( CP_VCD_FILE ); YY_BREAK case 3: YY_RULE_SETUP #line 43 "config_scanner.l" return( CP_TRACE ); YY_BREAK case 4: YY_RULE_SETUP #line 45 "config_scanner.l" return( CP_SRAM ); YY_BREAK case 5: YY_RULE_SETUP #line 46 "config_scanner.l" return( CP_EEPROM ); YY_BREAK case 6: YY_RULE_SETUP #line 47 "config_scanner.l" return( CP_PROGMEM ); YY_BREAK case 7: YY_RULE_SETUP #line 48 "config_scanner.l" return( CP_REG ); YY_BREAK case 8: YY_RULE_SETUP #line 49 "config_scanner.l" return( CP_FREG ); YY_BREAK case 9: YY_RULE_SETUP #line 50 "config_scanner.l" return( CP_IOREG ); YY_BREAK case 10: YY_RULE_SETUP #line 51 "config_scanner.l" return( CP_SP ); YY_BREAK case 11: YY_RULE_SETUP #line 52 "config_scanner.l" return( CP_PC ); YY_BREAK case 12: YY_RULE_SETUP #line 54 "config_scanner.l" return( CP_NAME ); YY_BREAK case 13: YY_RULE_SETUP #line 55 "config_scanner.l" return( CP_NUMBER ); YY_BREAK case 14: YY_RULE_SETUP #line 56 "config_scanner.l" return( CP_FILENAME ); YY_BREAK case 15: YY_RULE_SETUP #line 57 "config_scanner.l" return( config_text[0] ); YY_BREAK case 16: YY_RULE_SETUP #line 58 "config_scanner.l" { line++; return( config_text[0] ); } YY_BREAK case 17: YY_RULE_SETUP #line 59 "config_scanner.l" YY_BREAK case 18: YY_RULE_SETUP #line 61 "config_scanner.l" ECHO; YY_BREAK #line 796 "config_scanner.c" case YY_STATE_EOF(INITIAL): yyterminate(); case YY_END_OF_BUFFER: { /* Amount of text matched not including the EOB char. */ int yy_amount_of_matched_text = (int) (yy_cp - yytext_ptr) - 1; /* Undo the effects of YY_DO_BEFORE_ACTION. */ *yy_cp = yy_hold_char; YY_RESTORE_YY_MORE_OFFSET if ( yy_current_buffer->yy_buffer_status == YY_BUFFER_NEW ) { /* We're scanning a new file or input source. It's * possible that this happened because the user * just pointed yyin at a new source and called * yylex(). If so, then we have to assure * consistency between yy_current_buffer and our * globals. Here is the right place to do so, because * this is the first action (other than possibly a * back-up) that will match for the new input source. */ yy_n_chars = yy_current_buffer->yy_n_chars; yy_current_buffer->yy_input_file = yyin; yy_current_buffer->yy_buffer_status = YY_BUFFER_NORMAL; } /* Note that here we test for yy_c_buf_p "<=" to the position * of the first EOB in the buffer, since yy_c_buf_p will * already have been incremented past the NUL character * (since all states make transitions on EOB to the * end-of-buffer state). Contrast this with the test * in input(). */ if ( yy_c_buf_p <= &yy_current_buffer->yy_ch_buf[yy_n_chars] ) { /* This was really a NUL. */ yy_state_type yy_next_state; yy_c_buf_p = yytext_ptr + yy_amount_of_matched_text; yy_current_state = yy_get_previous_state(); /* Okay, we're now positioned to make the NUL * transition. We couldn't have * yy_get_previous_state() go ahead and do it * for us because it doesn't know how to deal * with the possibility of jamming (and we don't * want to build jamming into it because then it * will run more slowly). */ yy_next_state = yy_try_NUL_trans( yy_current_state ); yy_bp = yytext_ptr + YY_MORE_ADJ; if ( yy_next_state ) { /* Consume the NUL. */ yy_cp = ++yy_c_buf_p; yy_current_state = yy_next_state; goto yy_match; } else { yy_cp = yy_c_buf_p; goto yy_find_action; } } else switch ( yy_get_next_buffer() ) { case EOB_ACT_END_OF_FILE: { yy_did_buffer_switch_on_eof = 0; if ( yywrap() ) { /* Note: because we've taken care in * yy_get_next_buffer() to have set up * yytext, we can now set up * yy_c_buf_p so that if some total * hoser (like flex itself) wants to * call the scanner after we return the * YY_NULL, it'll still work - another * YY_NULL will get returned. */ yy_c_buf_p = yytext_ptr + YY_MORE_ADJ; yy_act = YY_STATE_EOF(YY_START); goto do_action; } else { if ( ! yy_did_buffer_switch_on_eof ) YY_NEW_FILE; } break; } case EOB_ACT_CONTINUE_SCAN: yy_c_buf_p = yytext_ptr + yy_amount_of_matched_text; yy_current_state = yy_get_previous_state(); yy_cp = yy_c_buf_p; yy_bp = yytext_ptr + YY_MORE_ADJ; goto yy_match; case EOB_ACT_LAST_MATCH: yy_c_buf_p = &yy_current_buffer->yy_ch_buf[yy_n_chars]; yy_current_state = yy_get_previous_state(); yy_cp = yy_c_buf_p; yy_bp = yytext_ptr + YY_MORE_ADJ; goto yy_find_action; } break; } default: YY_FATAL_ERROR( "fatal flex scanner internal error--no action found" ); } /* end of action switch */ } /* end of scanning one token */ } /* end of yylex */ /* yy_get_next_buffer - try to read in a new buffer * * Returns a code representing an action: * EOB_ACT_LAST_MATCH - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position * EOB_ACT_END_OF_FILE - end of file */ static int yy_get_next_buffer() { register char *dest = yy_current_buffer->yy_ch_buf; register char *source = yytext_ptr; register int number_to_move, i; int ret_val; if ( yy_c_buf_p > &yy_current_buffer->yy_ch_buf[yy_n_chars + 1] ) YY_FATAL_ERROR( "fatal flex scanner internal error--end of buffer missed" ); if ( yy_current_buffer->yy_fill_buffer == 0 ) { /* Don't try to fill the buffer, so this is an EOF. */ if ( yy_c_buf_p - yytext_ptr - YY_MORE_ADJ == 1 ) { /* We matched a single character, the EOB, so * treat this as a final EOF. */ return EOB_ACT_END_OF_FILE; } else { /* We matched some text prior to the EOB, first * process it. */ return EOB_ACT_LAST_MATCH; } } /* Try to read more data. */ /* First move last chars to start of buffer. */ number_to_move = (int) (yy_c_buf_p - yytext_ptr) - 1; for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); if ( yy_current_buffer->yy_buffer_status == YY_BUFFER_EOF_PENDING ) /* don't do the read, it's not guaranteed to return an EOF, * just force an EOF */ yy_current_buffer->yy_n_chars = yy_n_chars = 0; else { int num_to_read = yy_current_buffer->yy_buf_size - number_to_move - 1; while ( num_to_read <= 0 ) { /* Not enough room in the buffer - grow it. */ #ifdef YY_USES_REJECT YY_FATAL_ERROR( "input buffer overflow, can't enlarge buffer because scanner uses REJECT" ); #else /* just a shorter name for the current buffer */ YY_BUFFER_STATE b = yy_current_buffer; int yy_c_buf_p_offset = (int) (yy_c_buf_p - b->yy_ch_buf); if ( b->yy_is_our_buffer ) { int new_size = b->yy_buf_size * 2; if ( new_size <= 0 ) b->yy_buf_size += b->yy_buf_size / 8; else b->yy_buf_size *= 2; b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ yy_flex_realloc( (void *) b->yy_ch_buf, b->yy_buf_size + 2 ); } else /* Can't grow it, we don't own it. */ b->yy_ch_buf = 0; if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "fatal error - scanner input buffer overflow" ); yy_c_buf_p = &b->yy_ch_buf[yy_c_buf_p_offset]; num_to_read = yy_current_buffer->yy_buf_size - number_to_move - 1; #endif } if ( num_to_read > YY_READ_BUF_SIZE ) num_to_read = YY_READ_BUF_SIZE; /* Read in more data. */ YY_INPUT( (&yy_current_buffer->yy_ch_buf[number_to_move]), yy_n_chars, num_to_read ); yy_current_buffer->yy_n_chars = yy_n_chars; } if ( yy_n_chars == 0 ) { if ( number_to_move == YY_MORE_ADJ ) { ret_val = EOB_ACT_END_OF_FILE; yyrestart( yyin ); } else { ret_val = EOB_ACT_LAST_MATCH; yy_current_buffer->yy_buffer_status = YY_BUFFER_EOF_PENDING; } } else ret_val = EOB_ACT_CONTINUE_SCAN; yy_n_chars += number_to_move; yy_current_buffer->yy_ch_buf[yy_n_chars] = YY_END_OF_BUFFER_CHAR; yy_current_buffer->yy_ch_buf[yy_n_chars + 1] = YY_END_OF_BUFFER_CHAR; yytext_ptr = &yy_current_buffer->yy_ch_buf[0]; return ret_val; } /* yy_get_previous_state - get the state just before the EOB char was reached */ static yy_state_type yy_get_previous_state() { register yy_state_type yy_current_state; register char *yy_cp; yy_current_state = yy_start; for ( yy_cp = yytext_ptr + YY_MORE_ADJ; yy_cp < yy_c_buf_p; ++yy_cp ) { register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); if ( yy_accept[yy_current_state] ) { yy_last_accepting_state = yy_current_state; yy_last_accepting_cpos = yy_cp; } while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 64 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; } return yy_current_state; } /* yy_try_NUL_trans - try to make a transition on the NUL character * * synopsis * next_state = yy_try_NUL_trans( current_state ); */ #ifdef YY_USE_PROTOS static yy_state_type yy_try_NUL_trans( yy_state_type yy_current_state ) #else static yy_state_type yy_try_NUL_trans( yy_current_state ) yy_state_type yy_current_state; #endif { register int yy_is_jam; register char *yy_cp = yy_c_buf_p; register YY_CHAR yy_c = 1; if ( yy_accept[yy_current_state] ) { yy_last_accepting_state = yy_current_state; yy_last_accepting_cpos = yy_cp; } while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 64 ) yy_c = yy_meta[(unsigned int) yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; yy_is_jam = (yy_current_state == 63); return yy_is_jam ? 0 : yy_current_state; } #ifndef YY_NO_UNPUT #ifdef YY_USE_PROTOS static void yyunput( int c, register char *yy_bp ) #else static void yyunput( c, yy_bp ) int c; register char *yy_bp; #endif { register char *yy_cp = yy_c_buf_p; /* undo effects of setting up yytext */ *yy_cp = yy_hold_char; if ( yy_cp < yy_current_buffer->yy_ch_buf + 2 ) { /* need to shift things up to make room */ /* +2 for EOB chars. */ register int number_to_move = yy_n_chars + 2; register char *dest = &yy_current_buffer->yy_ch_buf[ yy_current_buffer->yy_buf_size + 2]; register char *source = &yy_current_buffer->yy_ch_buf[number_to_move]; while ( source > yy_current_buffer->yy_ch_buf ) *--dest = *--source; yy_cp += (int) (dest - source); yy_bp += (int) (dest - source); yy_current_buffer->yy_n_chars = yy_n_chars = yy_current_buffer->yy_buf_size; if ( yy_cp < yy_current_buffer->yy_ch_buf + 2 ) YY_FATAL_ERROR( "flex scanner push-back overflow" ); } *--yy_cp = (char) c; yytext_ptr = yy_bp; yy_hold_char = *yy_cp; yy_c_buf_p = yy_cp; } #endif /* ifndef YY_NO_UNPUT */ #ifdef __cplusplus static int yyinput() #else static int input() #endif { int c; *yy_c_buf_p = yy_hold_char; if ( *yy_c_buf_p == YY_END_OF_BUFFER_CHAR ) { /* yy_c_buf_p now points to the character we want to return. * If this occurs *before* the EOB characters, then it's a * valid NUL; if not, then we've hit the end of the buffer. */ if ( yy_c_buf_p < &yy_current_buffer->yy_ch_buf[yy_n_chars] ) /* This was really a NUL. */ *yy_c_buf_p = '\0'; else { /* need more input */ int offset = yy_c_buf_p - yytext_ptr; ++yy_c_buf_p; switch ( yy_get_next_buffer() ) { case EOB_ACT_LAST_MATCH: /* This happens because yy_g_n_b() * sees that we've accumulated a * token and flags that we need to * try matching the token before * proceeding. But for input(), * there's no matching to consider. * So convert the EOB_ACT_LAST_MATCH * to EOB_ACT_END_OF_FILE. */ /* Reset buffer status. */ yyrestart( yyin ); /* fall through */ case EOB_ACT_END_OF_FILE: { if ( yywrap() ) return EOF; if ( ! yy_did_buffer_switch_on_eof ) YY_NEW_FILE; #ifdef __cplusplus return yyinput(); #else return input(); #endif } case EOB_ACT_CONTINUE_SCAN: yy_c_buf_p = yytext_ptr + offset; break; } } } c = *(unsigned char *) yy_c_buf_p; /* cast for 8-bit char's */ *yy_c_buf_p = '\0'; /* preserve yytext */ yy_hold_char = *++yy_c_buf_p; return c; } #ifdef YY_USE_PROTOS void yyrestart( FILE *input_file ) #else void yyrestart( input_file ) FILE *input_file; #endif { if ( ! yy_current_buffer ) yy_current_buffer = yy_create_buffer( yyin, YY_BUF_SIZE ); yy_init_buffer( yy_current_buffer, input_file ); yy_load_buffer_state(); } #ifdef YY_USE_PROTOS void yy_switch_to_buffer( YY_BUFFER_STATE new_buffer ) #else void yy_switch_to_buffer( new_buffer ) YY_BUFFER_STATE new_buffer; #endif { if ( yy_current_buffer == new_buffer ) return; if ( yy_current_buffer ) { /* Flush out information for old buffer. */ *yy_c_buf_p = yy_hold_char; yy_current_buffer->yy_buf_pos = yy_c_buf_p; yy_current_buffer->yy_n_chars = yy_n_chars; } yy_current_buffer = new_buffer; yy_load_buffer_state(); /* We don't actually know whether we did this switch during * EOF (yywrap()) processing, but the only time this flag * is looked at is after yywrap() is called, so it's safe * to go ahead and always set it. */ yy_did_buffer_switch_on_eof = 1; } #ifdef YY_USE_PROTOS void yy_load_buffer_state( void ) #else void yy_load_buffer_state() #endif { yy_n_chars = yy_current_buffer->yy_n_chars; yytext_ptr = yy_c_buf_p = yy_current_buffer->yy_buf_pos; yyin = yy_current_buffer->yy_input_file; yy_hold_char = *yy_c_buf_p; } #ifdef YY_USE_PROTOS YY_BUFFER_STATE yy_create_buffer( FILE *file, int size ) #else YY_BUFFER_STATE yy_create_buffer( file, size ) FILE *file; int size; #endif { YY_BUFFER_STATE b; b = (YY_BUFFER_STATE) yy_flex_alloc( sizeof( struct yy_buffer_state ) ); if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); b->yy_buf_size = size; /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ b->yy_ch_buf = (char *) yy_flex_alloc( b->yy_buf_size + 2 ); if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); b->yy_is_our_buffer = 1; yy_init_buffer( b, file ); return b; } #ifdef YY_USE_PROTOS void yy_delete_buffer( YY_BUFFER_STATE b ) #else void yy_delete_buffer( b ) YY_BUFFER_STATE b; #endif { if ( ! b ) return; if ( b == yy_current_buffer ) yy_current_buffer = (YY_BUFFER_STATE) 0; if ( b->yy_is_our_buffer ) yy_flex_free( (void *) b->yy_ch_buf ); yy_flex_free( (void *) b ); } #ifdef YY_USE_PROTOS void yy_init_buffer( YY_BUFFER_STATE b, FILE *file ) #else void yy_init_buffer( b, file ) YY_BUFFER_STATE b; FILE *file; #endif { yy_flush_buffer( b ); b->yy_input_file = file; b->yy_fill_buffer = 1; #if YY_ALWAYS_INTERACTIVE b->yy_is_interactive = 1; #else #if YY_NEVER_INTERACTIVE b->yy_is_interactive = 0; #else b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; #endif #endif } #ifdef YY_USE_PROTOS void yy_flush_buffer( YY_BUFFER_STATE b ) #else void yy_flush_buffer( b ) YY_BUFFER_STATE b; #endif { if ( ! b ) return; b->yy_n_chars = 0; /* We always need two end-of-buffer characters. The first causes * a transition to the end-of-buffer state. The second causes * a jam in that state. */ b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; b->yy_buf_pos = &b->yy_ch_buf[0]; b->yy_at_bol = 1; b->yy_buffer_status = YY_BUFFER_NEW; if ( b == yy_current_buffer ) yy_load_buffer_state(); } #ifndef YY_NO_SCAN_BUFFER #ifdef YY_USE_PROTOS YY_BUFFER_STATE yy_scan_buffer( char *base, yy_size_t size ) #else YY_BUFFER_STATE yy_scan_buffer( base, size ) char *base; yy_size_t size; #endif { YY_BUFFER_STATE b; if ( size < 2 || base[size-2] != YY_END_OF_BUFFER_CHAR || base[size-1] != YY_END_OF_BUFFER_CHAR ) /* They forgot to leave room for the EOB's. */ return 0; b = (YY_BUFFER_STATE) yy_flex_alloc( sizeof( struct yy_buffer_state ) ); if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ b->yy_buf_pos = b->yy_ch_buf = base; b->yy_is_our_buffer = 0; b->yy_input_file = 0; b->yy_n_chars = b->yy_buf_size; b->yy_is_interactive = 0; b->yy_at_bol = 1; b->yy_fill_buffer = 0; b->yy_buffer_status = YY_BUFFER_NEW; yy_switch_to_buffer( b ); return b; } #endif #ifndef YY_NO_SCAN_STRING #ifdef YY_USE_PROTOS YY_BUFFER_STATE yy_scan_string( yyconst char *yy_str ) #else YY_BUFFER_STATE yy_scan_string( yy_str ) yyconst char *yy_str; #endif { int len; for ( len = 0; yy_str[len]; ++len ) ; return yy_scan_bytes( yy_str, len ); } #endif #ifndef YY_NO_SCAN_BYTES #ifdef YY_USE_PROTOS YY_BUFFER_STATE yy_scan_bytes( yyconst char *bytes, int len ) #else YY_BUFFER_STATE yy_scan_bytes( bytes, len ) yyconst char *bytes; int len; #endif { YY_BUFFER_STATE b; char *buf; yy_size_t n; int i; /* Get memory for full buffer, including space for trailing EOB's. */ n = len + 2; buf = (char *) yy_flex_alloc( n ); if ( ! buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); for ( i = 0; i < len; ++i ) buf[i] = bytes[i]; buf[len] = buf[len+1] = YY_END_OF_BUFFER_CHAR; b = yy_scan_buffer( buf, n ); if ( ! b ) YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); /* It's okay to grow etc. this buffer, and we should throw it * away when we're done. */ b->yy_is_our_buffer = 1; return b; } #endif #ifndef YY_NO_PUSH_STATE #ifdef YY_USE_PROTOS static void yy_push_state( int new_state ) #else static void yy_push_state( new_state ) int new_state; #endif { if ( yy_start_stack_ptr >= yy_start_stack_depth ) { yy_size_t new_size; yy_start_stack_depth += YY_START_STACK_INCR; new_size = yy_start_stack_depth * sizeof( int ); if ( ! yy_start_stack ) yy_start_stack = (int *) yy_flex_alloc( new_size ); else yy_start_stack = (int *) yy_flex_realloc( (void *) yy_start_stack, new_size ); if ( ! yy_start_stack ) YY_FATAL_ERROR( "out of memory expanding start-condition stack" ); } yy_start_stack[yy_start_stack_ptr++] = YY_START; BEGIN(new_state); } #endif #ifndef YY_NO_POP_STATE static void yy_pop_state() { if ( --yy_start_stack_ptr < 0 ) YY_FATAL_ERROR( "start-condition stack underflow" ); BEGIN(yy_start_stack[yy_start_stack_ptr]); } #endif #ifndef YY_NO_TOP_STATE static int yy_top_state() { return yy_start_stack[yy_start_stack_ptr - 1]; } #endif #ifndef YY_EXIT_FAILURE #define YY_EXIT_FAILURE 2 #endif #ifdef YY_USE_PROTOS static void yy_fatal_error( yyconst char msg[] ) #else static void yy_fatal_error( msg ) char msg[]; #endif { (void) fprintf( stderr, "%s\n", msg ); exit( YY_EXIT_FAILURE ); } /* Redefine yyless() so it works in section 3 code. */ #undef yyless #define yyless(n) \ do \ { \ /* Undo effects of setting up yytext. */ \ yytext[yyleng] = yy_hold_char; \ yy_c_buf_p = yytext + n; \ yy_hold_char = *yy_c_buf_p; \ *yy_c_buf_p = '\0'; \ yyleng = n; \ } \ while ( 0 ) /* Internal utility routines. */ #ifndef yytext_ptr #ifdef YY_USE_PROTOS static void yy_flex_strncpy( char *s1, yyconst char *s2, int n ) #else static void yy_flex_strncpy( s1, s2, n ) char *s1; yyconst char *s2; int n; #endif { register int i; for ( i = 0; i < n; ++i ) s1[i] = s2[i]; } #endif #ifdef YY_NEED_STRLEN #ifdef YY_USE_PROTOS static int yy_flex_strlen( yyconst char *s ) #else static int yy_flex_strlen( s ) yyconst char *s; #endif { register int n; for ( n = 0; s[n]; ++n ) ; return n; } #endif #ifdef YY_USE_PROTOS static void *yy_flex_alloc( yy_size_t size ) #else static void *yy_flex_alloc( size ) yy_size_t size; #endif { return (void *) malloc( size ); } #ifdef YY_USE_PROTOS static void *yy_flex_realloc( void *ptr, yy_size_t size ) #else static void *yy_flex_realloc( ptr, size ) void *ptr; yy_size_t size; #endif { /* The cast to (char *) in the following accommodates both * implementations that use char* generic pointers, and those * that use void* generic pointers. It works with the latter * because both ANSI C and C++ allow castless assignment from * any pointer type to void*, and deal with argument conversions * as though doing an assignment. */ return (void *) realloc( (char *) ptr, size ); } #ifdef YY_USE_PROTOS static void yy_flex_free( void *ptr ) #else static void yy_flex_free( ptr ) void *ptr; #endif { free( ptr ); } #if YY_MAIN int main() { yylex(); return 0; } #endif #line 61 "config_scanner.l" void config_scanner_init( FILE *infile ) { config_restart( infile ); line = 1; } int config_get_line(void) { return( line ); } simulavr-0.1.2.2/src/disp-vcd/disp.c0000644000175000001440000003434107762553063014056 00000000000000/* * $Id: disp.c,v 1.3 2003/12/01 05:48:35 troth Exp $ * **************************************************************************** * * simulavr-vcd - A vcd file writer as display process for simulavr. * Copyright (C) 2002 Carsten Beth * * Derivated from: * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* WARNING: This code is a hack and needs major improvements. */ #include "config.h" #include #include #include #include #include #include #include #include #include #include #include "gnu_getopt.h" #include "vcd.h" /* *INDENT-OFF* */ enum _constants { REG_OFFSET = 9, REG_LABEL_LINE = 0, REG_ROWS = 4, /* 4 for Rnn */ REG_ROW_OFFSET = 3, /* 1 for PC, SP, etc; 1 fir X,Y,Z, 1 for SREG */ REG_LINES = REG_ROWS+REG_ROW_OFFSET, REG_COLS = 8, IO_REG_LABEL_LINE = REG_LABEL_LINE + REG_LINES + 1, IO_REG_LINES = 16, /* 16 lines for io registers */ IO_REG_COLS = 4, /* data displayed with # of cols */ SRAM_LABEL_LINE = IO_REG_LABEL_LINE + IO_REG_LINES + 1, SRAM_LABEL_ADDR_COL = 14, SRAM_GOTO_ADDR_COL = 40, SRAM_COLS = 16, SRAM_COL_OFFSET = 9, MAX_BUF = 1024, MAX_READ_RETRY = 10, MAX_REG = 32, MAX_IO_REG = 64, MAX_IO_REG_BUF = 64, }; /* *INDENT-ON* */ struct timespec nap = { 0, 1000000 }; /* 1 ms */ int sig_int = 0; unsigned int xreg = 0; unsigned int yreg = 0; unsigned int zreg = 0; unsigned int spreg = 0; union fp_reg { float fval; unsigned char ival[4]; }; union fp_reg fp_regs[3]; struct SRAM { int size; /* size of array */ int curr; /* curr cursor position */ int vis_lines; /* how many lines can we show */ int vis_beg; /* first visible address */ int vis_end; /* first non-visible address after last visible */ unsigned char *data; /* the data array */ }; struct SRAM sram[1]; /* global sram storage */ /* Convert a hexidecimal digit to a 4 bit nibble. */ int hex2nib (char hex) { if ((hex >= 'A') && (hex <= 'F')) return (10 + (hex - 'A')); else if ((hex >= 'a') && (hex <= 'f')) return (10 + (hex - 'a')); else if ((hex >= '0') && (hex <= '9')) return (hex - '0'); /* Shouldn't get here unless the developer screwed up ;) */ fprintf (stderr, "Invalid hexidecimal digit: 0x%02x", hex); exit (1); return 0; /* make compiler happy */ } void disp_sig_handler (int sig) { switch (sig) { case SIGINT: sig_int++; break; } } /* Wrap read(2) so we can read a byte without having to do a shit load of error checking every time. */ char disp_read_byte (int fd) { char c; int res; int cnt = MAX_READ_RETRY; while (cnt--) { res = read (fd, &c, 1); if (res < 0) { fprintf (stderr, "read failed: %s", strerror (errno)); exit (1); } if (res == 0) { continue; } return c; } fprintf (stderr, "Maximum read reties reached"); exit (1); return 0; /* make compiler happy */ } void disp_set_sram_values (char *pkt) { unsigned int addr, len; unsigned char datum; int i; if (sscanf (pkt, "%x,%x:", &addr, &len) != 2) return; while (*pkt != ':') pkt++; pkt++; /* skip over ':' */ for (i = 0; i < len; i++) { datum = hex2nib (*pkt++) << 4; datum += hex2nib (*pkt++) & 0xf; if ((addr + i) >= 0) vcd_write_sram (addr + i, datum); } } /* Move the cursor to another sram address and update the current address in the border. Scroll the SRAM window if needed. */ void disp_usage (char *prog) { fprintf (stderr, "Usage: %s [-p |--pfd=nn] flash_size sram_size " "sram_start eeprom_size\n", prog); exit (1); } /* Parse an input packet which has already been decoded. */ int disp_parse_packet (char *pkt) { int val; unsigned int bval; char name[50]; static int first_clock_occured = 0; switch (*pkt++) { case 'q': /* quit */ return 1; case 'p': /* set program counter */ if (sscanf (pkt, "%x", &val) == 1) vcd_write_pc (val); break; case 'n': /* set time */ if (sscanf (pkt, "%x", &bval) == 1) vcd_set_clock (bval); /* if the first clock occures write the vcd header */ if (!first_clock_occured) { first_clock_occured = 1; vcd_write_header (); } break; case 'r': /* set register */ if (sscanf (pkt, "%x:%x", &val, &bval) == 2) { if ((val >= 14) && (val <= 25)) { int fp_reg = (val - 14) / 4; int fp_byte = (val - 14) % 4; fp_regs[fp_reg].ival[fp_byte] = (bval & 0xff); } if ((val >= 26) && (val <= 31)) { unsigned int areg; switch (val) { case 26: areg = xreg = (xreg & 0xff00) | (bval & 0xff); break; case 27: areg = xreg = (xreg & 0xff) | ((bval << 8) & 0xff00); break; case 28: areg = yreg = (yreg & 0xff00) | (bval & 0xff); break; case 29: areg = yreg = (yreg & 0xff) | ((bval << 8) & 0xff00); break; case 30: areg = zreg = (zreg & 0xff00) | (bval & 0xff); break; case 31: areg = zreg = (zreg & 0xff) | ((bval << 8) & 0xff00); break; } } vcd_write_reg (val, bval); /* write (num, value) to vcd-file */ } break; case 's': /* set sram value */ disp_set_sram_values (pkt); break; case 'i': /* set io register value */ if (sscanf (pkt, "%x:%x", &val, &bval) == 2) { if (val == 0x3d) /* SPL */ { spreg = (spreg & 0xff00) | (bval & 0xff); vcd_write_sp (spreg); } else if (val == 0x3e) /* SPH */ { spreg = (spreg & 0xff) | ((bval << 8) & 0xff00); vcd_write_sp (spreg); } else if (val == 0x3f) /* SREG */ { } vcd_write_io_reg (val, bval); /* write (adress, value) to vcd-file */ } break; case 'I': /* set io register name */ if (sscanf (pkt, "%x:%s", &val, name) == 2) vcd_bind_io_reg_shortcut (name, val); break; case 'e': /* set eeprom value: not implemented yet */ break; case 'f': /* set flash value: not implemented yet */ break; } return 0; } /* Read an incoming packet. Turns off non-bolcking mode while reading the packet data from the pipe and turns it on again when done. */ int disp_read_packet (int fd) { int i; char c; char pkt_buf[MAX_BUF + 1]; int cksum, pkt_cksum; int result = 0; /* turn non-blocking mode off */ if (fcntl (fd, F_SETFL, fcntl (fd, F_GETFL, 0) & ~O_NONBLOCK) < 0) { fprintf (stderr, "fcntl failed: %s\n", strerror (errno)); exit (1); } /* insure that packet is null terminated. */ memset (pkt_buf, 0, sizeof (pkt_buf)); pkt_cksum = i = 0; c = disp_read_byte (fd); while ((c != '#') && (i < MAX_BUF)) { pkt_buf[i++] = c; pkt_cksum += (unsigned char)c; c = disp_read_byte (fd); } cksum = hex2nib (disp_read_byte (fd)) << 4; cksum |= hex2nib (disp_read_byte (fd)); if ((pkt_cksum & 0xff) != cksum) { fprintf (stderr, "Bad checksum: sent 0x%x <--> computed 0x%x", cksum, pkt_cksum); sleep (10); exit (1); } /* parse the packet */ result = disp_parse_packet (pkt_buf); /* turn non-blocking mode back on */ if (fcntl (fd, F_SETFL, fcntl (fd, F_GETFL, 0) | O_NONBLOCK) < 0) { fprintf (stderr, "fcntl failed: %s\n", strerror (errno)); exit (1); } return result; } /* See if the parent process (usually simulavr) has written an update request to the update pipe. Parent may ask us to quit. Return 1 if we should quit, 0 otherwise. */ int disp_check_update_pipe (int pfd) { int res; char c; if (pfd < 0) return 0; /* no pipe to read from */ while (1) { res = read (pfd, &c, 1); if (res < 0) { if (errno == EAGAIN) return 0; /* no data available */ fprintf (stderr, "read failed: %s\n", strerror (errno)); exit (1); } if (res == 0) return 0; /* got some data */ switch (c) { case '$': return disp_read_packet (pfd); } } return 0; } /* *INDENT-OFF* */ static struct option long_opts[] = { /* name, has_arg, flag, val */ { "help", 0, 0, 'h' }, { "pfd", 1, 0, 'p' }, { 0, 0, 0, 0 } }; /* *INDENT-ON* */ struct ARGS { int flash_size; /* not used, yet */ int sram_size; int sram_start; int eeprom_size; /* not used, yet */ int pipe_fd; }; void disp_parse_cmd_line (int argc, char **argv, struct ARGS *args) { int c; char *prog = argv[0]; int option_index; opterr = 0; /* disable default error message */ /* init the args */ args->sram_size = 0; args->sram_start = 0; args->pipe_fd = -1; while (1) { c = getopt_long (argc, argv, "hp:", long_opts, &option_index); if (c == -1) break; /* no more options */ switch (c) { case 'h': case '?': disp_usage (prog); case 'p': args->pipe_fd = atoi (optarg); break; default: fprintf (stderr, "getop() did something screwey"); exit (1); } } if ((optind + 4) == argc) { args->flash_size = atoi (argv[optind + 0]); args->sram_size = atoi (argv[optind + 1]); args->sram_start = atoi (argv[optind + 2]); args->eeprom_size = atoi (argv[optind + 3]); } else disp_usage (prog); } int main (int argc, char **argv) { struct ARGS args[1]; int max_fd; int rv; fd_set watchset, inset; struct timeval to; disp_parse_cmd_line (argc, argv, args); if (args->pipe_fd >= 0) { /* make pipe_fd non-blocking */ if (fcntl (args->pipe_fd, F_SETFL, fcntl (args->pipe_fd, F_GETFL, 0) | O_NONBLOCK) < 0) { fprintf (stderr, "fcntl failed: %s\n", strerror (errno)); exit (1); } } signal (SIGINT, disp_sig_handler); signal (SIGWINCH, disp_sig_handler); /* setup the select() for multiplexing */ FD_ZERO (&watchset); if (args->pipe_fd >= 0) FD_SET (args->pipe_fd, &watchset); FD_SET (STDIN_FILENO, &watchset); max_fd = STDIN_FILENO > args->pipe_fd ? STDIN_FILENO : args->pipe_fd; vcd_init (args->sram_size, args->eeprom_size); /* main loop */ while (FD_ISSET (STDIN_FILENO, &watchset) || ((args->pipe_fd >= 0) && FD_ISSET (args->pipe_fd, &watchset))) { if (sig_int) { sig_int = 0; break; } to.tv_sec = 0; to.tv_usec = 100000; inset = watchset; /* copy watch since select() updates it */ if ((rv = select (max_fd + 1, &inset, NULL, NULL, &to)) < 0) { if (errno == EINTR) continue; fprintf (stderr, "select failed: %s\n", strerror (errno)); exit (1); } if (FD_ISSET (STDIN_FILENO, &inset)) { if (args->pipe_fd == -1) { /* Only enable quiting if not using the pipe so that the user can't quit the display if it's run as a sub-process. */ break; } } if ((args->pipe_fd >= 0) && FD_ISSET (args->pipe_fd, &inset)) { if (disp_check_update_pipe (args->pipe_fd)) break; } } return 0; } simulavr-0.1.2.2/src/disp-vcd/vcd.c0000644000175000001440000004056410024133730013653 00000000000000/* * $Id: vcd.c,v 1.4 2004/03/11 19:02:48 troth Exp $ * **************************************************************************** * * simulavr-vcd - A vcd file writer as display process for simulavr. * Copyright (C) 2002 Carsten Beth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* WARNING: This code is a hack and needs major improvements. */ #include #include #include #include #include #include "vcd.h" #include "config.h" int vcd_read_config (char *config_file_name); /* from config_parser.c */ extern int parse_config (FILE * infile); /* Definitions for debugging (Add -DENABLE_DEBUG=1 to compile command to enable debugging output). */ #ifndef ENABLE_DEBUG # define ENABLE_DEBUG 0 #endif #if ENABLE_DEBUG == 1 # define DEBUG_FKT_CALL( x ) x; #else # define DEBUG_FKT_CALL( x ) #endif int frequency = 0; char *vcd_file_name = NULL; FILE *vcd_file = NULL; /* Number of clocks (time = 1/f * clk) */ unsigned int clk = 0; /* Dump tables are used to store the information which signals has to be written to the vcd file. We define one char for each signal. Each Signal with a dump table value != 0 will be written. */ char *io_reg_dump_table; char *reg_dump_table; char *sram_dump_table; char sp_dump_table; char pc_dump_table; /* A signal is an entry in the vcd file which has to be traced. */ typedef struct t_signal { char *name; /* Visible name */ char *shortcut; /* Short name which is written in vcd file */ int addr; /* Address of signal */ unsigned int width; /* Width of the traced signal */ t_signal_type type; /* vcd type of the traced signal */ struct t_signal *next; /* Pointer to the next signal */ } t_signal; /* There are several kinds of signals. */ t_signal *io_reg_signals = NULL; t_signal *reg_signals = NULL; t_signal *sram_signals = NULL; t_signal *other_signals = NULL; struct { int sram_size; int eeprom_size; } sizes; t_signal * vcd_new_signal (t_signal **signals, char *name, char *shortcut, int addr, unsigned int width, t_signal_type type) { t_signal *new; /* Allocate memory for new signal */ new = (t_signal *)malloc (sizeof (t_signal)); /* If there is a name, make a copy */ if (name) { new->name = (char *)malloc (strlen (name)); strcpy (new->name, name); } else name = NULL; /* If there is a shortcut, make a copy */ if (shortcut) { new->shortcut = (char *)malloc (strlen (shortcut)); strcpy (new->shortcut, shortcut); } else shortcut = NULL; /* Copy the other values */ new->addr = addr; new->width = width; new->type = type; /* Link to signal list */ new->next = *signals; *signals = new; return (new); } void vcd_free_signals (t_signal **signals) { t_signal *p; while (*signals) { /* Remove from list */ p = *signals; *signals = (*signals)->next; /* Free memory */ if (p->name) free (p->name); if (p->shortcut) free (p->shortcut); free (p); } } /* Close a vcd_file */ void vcd_close (void) { if (vcd_file && vcd_file != stdout) { fclose (vcd_file); vcd_file = NULL; } } /* Open a vcd_file by name. If name is "-" stdout will be used to write to. */ int vcd_open (char *vcd_file_name) { if (!vcd_file_name) { fprintf (stderr, "unvalid VCD file name: (NULL)\n"); return (0); } /* Possibly close an opened vcd file */ if (vcd_file) vcd_close (); /* Open a VCD file */ if (strcmp (vcd_file_name, "-") == 0) vcd_file = stdout; else { vcd_file = fopen (vcd_file_name, "w"); if (!vcd_file) { fprintf (stderr, "open VCD file failed: %s\n", strerror (errno)); return (0); } } return (1); } /* Close files and free memory. */ void vcd_exit (void) { vcd_close (); if (io_reg_dump_table) free (io_reg_dump_table); if (reg_dump_table) free (reg_dump_table); if (sram_dump_table) free (sram_dump_table); vcd_free_signals (&io_reg_signals); vcd_free_signals (®_signals); vcd_free_signals (&sram_signals); vcd_free_signals (&other_signals); if (vcd_file_name) free (vcd_file_name); } /* Initialize dump tables, parse config file and open vcd file. */ int vcd_init (int sram_size, int eeprom_size) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_init( %i, %i )\n", sram_size, eeprom_size)); atexit (vcd_exit); sizes.sram_size = sram_size; sizes.eeprom_size = eeprom_size; /* Initialize dump tables */ io_reg_dump_table = (char *)calloc (64, sizeof (char)); reg_dump_table = (char *)calloc (32, sizeof (char)); sram_dump_table = (char *)calloc (sram_size, sizeof (char)); sp_dump_table = 0; pc_dump_table = 0; if (!io_reg_dump_table || !reg_dump_table || !sram_dump_table) { fprintf (stderr, "virtual memory exhausted\n"); exit (1); } /* Parse configuration file */ if (!vcd_read_config ("vcd.cfg")) return (0); /* Open vcd file */ if (!vcd_open (vcd_file_name)) return (0); return (1); } /***************************************************************/ /* Write the current date and time to the vcd file */ int vcd_write_time (void) { time_t current_time = time (NULL); if (!vcd_file) return (0); fprintf (vcd_file, "$date\n"); fprintf (vcd_file, " %s", ctime (¤t_time)); fprintf (vcd_file, "$end\n"); fprintf (vcd_file, "\n"); return (1); } /* Write the version to the vcd file */ int vcd_write_version (void) { if (!vcd_file) return (0); fprintf (vcd_file, "$version\n"); fprintf (vcd_file, " simulavr vcd dumper version %s\n", VCD_VERSION); fprintf (vcd_file, "$end\n"); fprintf (vcd_file, "\n"); return (1); } /* Write the timescale to the vcd file. The timescale is always 1 ns. */ int vcd_write_timescale (void) { if (!vcd_file) return (0); fprintf (vcd_file, "$timescale\n"); fprintf (vcd_file, " 1ns\n"); fprintf (vcd_file, "$end\n"); fprintf (vcd_file, "\n"); return (1); } int vcd_bind_io_reg_shortcut (char *io_reg_name, int io_reg_addr) { t_signal *p; char name[100]; char shortcut[100]; DEBUG_FKT_CALL (fprintf (stderr, "vcd_bind_io_register_shortcut( %s, %i )\n", io_reg_name, io_reg_addr)); if (!io_reg_signals) return (0); /* Generate a name and shortcut */ snprintf (name, 100 - 1, "%x_%s", io_reg_addr, io_reg_name); snprintf (shortcut, 100 - 1, "ioreg%x", io_reg_addr); /* Count io_reg_signals to search for matching names or addresses */ for (p = io_reg_signals; p; p = p->next) { /* Does the addresses or names match? */ if ((p->addr == io_reg_addr) || (p->name && (strcmp (p->name, io_reg_name) == 0))) { /* Mark register as used */ io_reg_dump_table[io_reg_addr] = 1; /* Change the signals name */ if (p->name) free (p->name); p->name = (char *)malloc (strlen (name)); strcpy (p->name, name); /* Copy the address */ p->addr = io_reg_addr; /* Copy the shortcut */ if (p->shortcut) free (p->shortcut); p->shortcut = (char *)malloc (strlen (shortcut)); strcpy (p->shortcut, shortcut); } } return (1); } /* Set the controlers clock frequency. */ void vcd_set_frequency (int f) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_set_frequency( %i )\n", f)); frequency = f; } /* Set the file name which sould be used for the vcd file. */ void vcd_set_file_name (char *name) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_set_file_name( %s )\n", name)); if (vcd_file_name) free (vcd_file_name); vcd_file_name = name; } /* Mark a io-register for tracing. This function can be called either with an io_reg_name or an io_reg_addr. */ int vcd_trace_io_reg (char *io_reg_name, int io_reg_addr) { vcd_new_signal (&io_reg_signals, io_reg_name, NULL, io_reg_addr, 8, ST_REGISTER); return 0; /* FIXME: why wasn't this returning anything? */ } /* Mark register reg_num for tracing. */ int vcd_trace_reg (int reg_num) { char name[100]; char shortcut[100]; /* Generate a name and shortcut */ snprintf (name, 100 - 1, "REG_%02x", reg_num); snprintf (shortcut, 100 - 1, "reg%x", reg_num); vcd_new_signal (®_signals, name, shortcut, -1, 8, ST_REGISTER); /* mark register as used */ reg_dump_table[reg_num] = 1; return 0; /* FIXME: why wasn't this returning anything? */ } /* Mark sram[sram_addr] for tracing. */ int vcd_trace_sram (int sram_addr) { char name[30]; char shortcut[30]; if ((sram_addr < 0) || (sram_addr > sizes.sram_size - 1)) return (0); /* Generate name and shortcut */ sprintf (name, "SRAM_%02x", sram_addr); sprintf (shortcut, "sram%x", sram_addr); vcd_new_signal (&sram_signals, name, shortcut, -1, 8, ST_REGISTER); /* mark sram cell as used */ sram_dump_table[sram_addr] = 1; return 0; /* FIXME: why wasn't this returning anything? */ } /* Mark stack pointer for tracing. */ int vcd_trace_sp (void) { vcd_new_signal (&other_signals, "SP", "sp", -1, 16, ST_REGISTER); /* mark sp cell as used */ sp_dump_table = 1; return 0; /* FIXME: why wasn't this returning anything? */ } /* Mark program counter for tracing. */ int vcd_trace_pc (void) { vcd_new_signal (&other_signals, "PC", "pc", -1, 16, ST_REGISTER); /* mark pc cell as used */ pc_dump_table = 1; return 0; /* FIXME: why wasn't this returning anything? */ } /* Read an parse the config file. */ int vcd_read_config (char *config_file_name) { FILE *config_file; DEBUG_FKT_CALL (fprintf (stderr, "vcd_read_config( %s )\n", config_file_name)); config_file = fopen (config_file_name, "r"); if (!config_file) { fprintf (stderr, "open config file failed: %s\n", strerror (errno)); return (0); } if (!parse_config (config_file)) { fprintf (stderr, "error while reading config file\n"); fclose (config_file); return (0); } fclose (config_file); return (1); } /* Write signal declarations to the vcd file. */ void vcd_write_signals (t_signal *signals, char *module_name) { if (signals) { fprintf (vcd_file, "$scope module %s $end\n", module_name); for (; signals; signals = signals->next) if (signals->shortcut) fprintf (vcd_file, "$var reg %i %s %s $end\n", signals->width, signals->shortcut, signals->name); fprintf (vcd_file, "$upscope $end\n"); fprintf (vcd_file, "\n"); } } /* Write the header to the vcd file. */ int vcd_write_header (void) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_write_header()\n")); if (!vcd_file) return (0); /* Rewind file */ fseek (vcd_file, 0, SEEK_SET); vcd_write_time (); vcd_write_version (); vcd_write_timescale (); vcd_write_signals (io_reg_signals, "io_register"); vcd_write_signals (reg_signals, "register"); vcd_write_signals (sram_signals, "sram"); vcd_write_signals (other_signals, "other"); fprintf (vcd_file, "$enddefinitions $end\n"); fprintf (vcd_file, "\n"); /* Go back to the end of the vcd-file */ fseek (vcd_file, 0, SEEK_END); return (1); } /* Write a 8 bit binary value to the vcd file. */ void vcd_write_bit8 (unsigned char val) { int i; fputc ('b', vcd_file); /* write binary signature */ for (i = 0x80; i > 0; i /= 2) /* shift bit in i for masking */ fputc (((val & i) != 0) + '0', vcd_file); /* write masked bit */ } /* Write a 16 bit binary value to the vcd file. */ void vcd_write_bit16 (unsigned short val) { int i; fputc ('b', vcd_file); /* write binary signature */ for (i = 0x8000; i > 0; i /= 2) /* shift bit in i for masking */ fputc (((val & i) != 0) + '0', vcd_file); /* write masked bit */ } /* Write io-register to the vcd file. */ int vcd_write_io_reg (int io_reg_addr, unsigned char val) { DEBUG_FKT_CALL (fprintf (stderr, "io_vcd_write_reg( %i, %i )\n", io_reg_addr, val)); if (!vcd_file) return (0); if (!io_reg_dump_table[io_reg_addr]) return (0); vcd_write_clock (); vcd_write_bit8 (val); fprintf (vcd_file, " ioreg%x\n", io_reg_addr); /* write identifier */ fflush (vcd_file); /* for debug only */ return (1); } /* Write register to the vcd file. */ int vcd_write_reg (int reg_num, unsigned char val) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_write_reg( %i, %i )\n", reg_num, val)); if (!vcd_file) return (0); if (!reg_dump_table[reg_num]) return (0); vcd_write_clock (); vcd_write_bit8 (val); fprintf (vcd_file, " reg%x\n", reg_num); /* write identifier */ fflush (vcd_file); /* for debug only */ return (1); } /* Write sram to the vcd file. */ int vcd_write_sram (int sram_addr, unsigned char val) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_write_sram( %i, %i )\n", sram_addr, val)); if (!vcd_file) return (0); if ((sram_addr < 0) || (sram_addr > sizes.sram_size - 1)) return (0); if (!sram_dump_table[sram_addr]) return (0); vcd_write_clock (); vcd_write_bit8 (val); fprintf (vcd_file, " sram%x\n", sram_addr); /* write identifier */ fflush (vcd_file); /* for debug only */ return (1); } /* Write stack pointer to the vcd file. */ int vcd_write_sp (int sp) { static unsigned int written_sp = -1; DEBUG_FKT_CALL (fprintf (stderr, "vcd_write_sp( %i )\n", sp)); if (!vcd_file) return (0); if (!sp_dump_table || (sp == written_sp)) return (1); written_sp = sp; vcd_write_clock (); vcd_write_bit16 (sp); fprintf (vcd_file, " sp\n"); /* write identifier */ fflush (vcd_file); /* for debug only */ return (1); } /* Write program counter to the vcd file. */ int vcd_write_pc (int pc) { DEBUG_FKT_CALL (fprintf (stderr, "vcd_write_pc( %i )\n", pc)); if (!vcd_file) return (0); if (!pc_dump_table) return (0); vcd_write_clock (); vcd_write_bit16 (pc); fprintf (vcd_file, " pc\n"); /* write identifier */ fflush (vcd_file); /* for debug only */ return (1); } /* Set the current time. */ int vcd_set_clock (unsigned int c) { clk = c; return 0; /* FIXME: why wasn't this returning anything? */ } /* Write current time to the vcd file. */ int vcd_write_clock (void) { static unsigned int written_clk = -1; static unsigned int factor = 1e9; if (!vcd_file) return (0); /* Have we already written the current time? */ if (clk == written_clk) return (1); written_clk = clk; /* Write the current time */ fprintf (vcd_file, "#%i\n", clk * (factor / frequency)); fflush (vcd_file); /* for debug only */ return (1); } simulavr-0.1.2.2/src/disp-vcd/vcd.h0000644000175000001440000000374010024133730013653 00000000000000/* * $Id: vcd.h,v 1.3 2004/03/11 19:02:48 troth Exp $ * **************************************************************************** * * simulavr-vcd - A vcd file writer as display process for simulavr. * Copyright (C) 2002 Carsten Beth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* WARNING: This code is a hack and needs major improvements. */ #ifndef VCD_H #define VCD_H #define VCD_VERSION "0.0.1" typedef enum { ST_REGISTER, ST_INTEGER, ST_REAL } t_signal_type; /* Init */ int vcd_init( int sram_size, int eeprom_size ); /* Interface for parser */ void vcd_set_frequency( int f ); void vcd_set_file_name( char *name ); int vcd_trace_io_reg( char *io_reg_name, int io_reg_addr ); int vcd_trace_reg( int reg_num ); int vcd_trace_sram( int sram_addr ); int vcd_trace_sp( void ); int vcd_trace_pc( void ); /* Interface for disp.c */ int vcd_write_header( void ); int vcd_set_clock( unsigned int c ); int vcd_write_clock( void ); int vcd_bind_io_reg_shortcut( char *io_reg_name, int io_reg_addr ); int vcd_write_io_reg( int io_reg_addr, unsigned char val ); int vcd_write_reg( int reg_num, unsigned char val ); int vcd_write_sram( int sram_addr, unsigned char val ); int vcd_write_sp( int sp ); int vcd_write_pc( int pc ); #endif /* VCD_H */ simulavr-0.1.2.2/src/disp-vcd/config_parser.y0000644000175000001440000001076407565561340015767 00000000000000/* * $Id: config_parser.y,v 1.2 2002/11/17 00:29:20 troth Exp $ * **************************************************************************** * * simulavr-vcd - A vcd file writer as display process for simulavr. * Copyright (C) 2002 Carsten Beth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ %{ #include #include #include #include "vcd.h" extern void config_scanner_init( FILE *infile ); extern int config_lex( void ); void config_error( char *s ); int parse_config( FILE *infile ); extern char *config_text; int errorFound; %} %token CP_FREQUENCY %token CP_VCD_FILE %token CP_TRACE %token CP_SRAM %token CP_EEPROM %token CP_PROGMEM %token CP_REG %token CP_FREG %token CP_IOREG %token CP_SP %token CP_PC %token CP_NAME %token CP_FILENAME %token CP_NUMBER %right '[' ']' ':' '=' '\n' %union { int integer; char *string; struct { int from; int to; } t_range; }; %type range %type name %type filename %type number /* Grammar follows */ %% conf_file: frequency_def vcd_file_def trace_defs; frequency_def: CP_FREQUENCY '=' number '\n' { vcd_set_frequency( $3 ); }; vcd_file_def: CP_VCD_FILE '=' name '\n' { vcd_set_file_name( $3 ); } | CP_VCD_FILE '=' filename '\n' { vcd_set_file_name( $3 ); }; trace_defs: /* empty */ | '\n' | trace_defs CP_TRACE trace_def '\n' | error '\n' { yyerrok; }; trace_def: CP_SRAM range { int i; for( i = $2.from; i <= $2.to; i++ ) vcd_trace_sram( i ); } | CP_EEPROM range | CP_PROGMEM range | CP_REG range { int i; for( i = $2.from; i <= $2.to; i++ ) vcd_trace_reg( i ); } | CP_REG name { free( $2 ); } | CP_IOREG range { int i; for( i = $2.from; i <= $2.to; i++ ) vcd_trace_io_reg( NULL, i ); } | CP_IOREG name { vcd_trace_io_reg( $2, -1 ); free( $2 ); } | CP_SP { vcd_trace_sp(); } | CP_PC { vcd_trace_pc(); }; range: number { $$.from = $1; $$.to = $1; } | '[' number ':' number ']' { $$.from = $2; $$.to = $4; }; name: CP_NAME { $$ = (char *)malloc( strlen( config_text ) + 1 ); strcpy( $$, config_text ); }; filename: CP_FILENAME { $$ = (char *)malloc( strlen( config_text ) + 1 ); strcpy( $$, config_text ); }; number: CP_NUMBER { $$ = atoi( config_text ); }; /* End of grammar */ %% extern int config_get_line (void); /************************************************************************* * Funktion : mapping_error() gibt den als Parameter übergebenen String * auf dem Standard-Fehlerkanal aus. Diese Funktion wird von * mapping_parse() aufgerufen, wenn ein ihr ein Fehler gefunden * wurde. * Parameter : s - Auszugebender Fehlertext * Vorbeding. : - * Nachbeding. : - * Return : - *************************************************************************/ void config_error( char *s ) { errorFound = 1; fprintf( stderr, "line %i: %s\n", config_get_line(), s ); } /************************************************************************* * Funktion : * Parameter : * Vorbeding. : - * Nachbeding. : * Return : *************************************************************************/ int parse_config( FILE *infile ) { int rv; errorFound = 0; /* Scanner iniitialization. */ config_scanner_init( infile ); /* Parse the data. */ rv = config_parse(); if ( errorFound || (rv != 0) ) return( 0 ); return( 1 ); } simulavr-0.1.2.2/src/disp-vcd/config_scanner.l0000644000175000001440000000356610017320516016071 00000000000000/* * $Id: config_scanner.l,v 1.4 2004/02/26 07:33:34 troth Exp $ * **************************************************************************** * * simulavr-vcd - A vcd file writer as display process for simulavr. * Copyright (C) 2002 Carsten Beth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ %{ #include "config_parser.h" static int line; #define YY_USE_PROTOS %} %option noyywrap %option nounput %% "frequency" return( CP_FREQUENCY ); "vcd_file" return( CP_VCD_FILE ); "trace" return( CP_TRACE ); "sram" return( CP_SRAM ); "eeprom" return( CP_EEPROM ); "progmem" return( CP_PROGMEM ); "reg" return( CP_REG ); "freg" return( CP_FREG ); "ioreg" return( CP_IOREG ); "sp" return( CP_SP ); "pc" return( CP_PC ); [a-zA-Z_][0-9a-zA-Z_]* return( CP_NAME ); [0-9]+ return( CP_NUMBER ); [a-zA-Z0-9_.]+ return( CP_FILENAME ); "["|"]"|":"|"=" return( config_text[0] ); [\n] { line++; return( config_text[0] ); } . %% void config_scanner_init( FILE *infile ) { config_restart( infile ); line = 1; } int config_get_line(void) { return( line ); } simulavr-0.1.2.2/test_c/0000777000175000001440000000000010204750217011774 500000000000000simulavr-0.1.2.2/test_c/Makefile.am0000644000175000001440000000334107727527670013772 00000000000000# # $Id: Makefile.am,v 1.5 2003/09/10 04:59:36 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002, 2003, Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # MAINTAINERCLEANFILES = Makefile.in CLEANFILES = *.elf *.lst *.bin *.hex noinst_PROGRAMS = demo demo_kr deep_frame timer demo_SOURCES = demo.c common.h demo_kr_SOURCES = demo_kr.c common.h deep_frame_SOURCES = deep_frame.c common.h timer_SOURCES = timer.c common.h AVR_TARGET = -mmcu=atmega128 all-local: \ demo.lst demo.hex demo.bin \ demo_kr.lst demo_kr.hex demo_kr.bin \ deep_frame.lst deep_frame.hex deep_frame.bin \ timer.lst timer.hex timer.bin demo.elf: demo @cp $< $@ demo.lst demo.hex demo.bin : demo.elf demo_kr.elf: demo_kr @cp $< $@ demo_kr.lst demo_kr.hex demo_kr.bin : demo_kr.elf deep_frame.elf: deep_frame @cp $< $@ deep_frame.lst deep_frame.hex deep_frame.bin : deep_frame.elf timer.elf: timer @cp $< $@ timer.lst timer.hex timer.bin : timer.elf include $(top_srcdir)/Makefile_AVR_Rules simulavr-0.1.2.2/test_c/Makefile.in0000644000175000001440000004167710204750206013772 00000000000000# Makefile.in generated by automake 1.8.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # # $Id: Makefile.am,v 1.5 2003/09/10 04:59:36 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002, 2003, Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # # # $Id: Makefile_AVR_Rules,v 1.6 2002/04/17 20:47:57 troth Exp $ # ############################################################################### # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. 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demo_kr.lst demo_kr.hex demo_kr.bin \ deep_frame.lst deep_frame.hex deep_frame.bin \ timer.lst timer.hex timer.bin demo.elf: demo @cp $< $@ demo.lst demo.hex demo.bin : demo.elf demo_kr.elf: demo_kr @cp $< $@ demo_kr.lst demo_kr.hex demo_kr.bin : demo_kr.elf deep_frame.elf: deep_frame @cp $< $@ deep_frame.lst deep_frame.hex deep_frame.bin : deep_frame.elf timer.elf: timer @cp $< $@ timer.lst timer.hex timer.bin : timer.elf .elf.hex: $(AVR_OBJCOPY) -O ihex $< $@ .elf.bin: $(AVR_OBJCOPY) -O binary $< $@ .elf.lst: $(AVR_OBJDUMP) -h -S -D --stabs --disassemble-zeroes $< > $@ .asm.elf: $(AVR_AS) --gstabs $(AVR_TARGET) $(INCLUDES) -o $@ $< # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: simulavr-0.1.2.2/test_c/deep_frame.c0000644000175000001440000000055110006115645014144 00000000000000/* test deeply nested functions with gdb patch */ #include #include "common.h" void func4 (void) { static uint8_t val; PORTC = val++; } void func3 (void) { func4(); } void func2 (void) { func3(); } void func1 (void) { func2(); } int main(void) { DDRC = 0xff; while (1) { func1(); } return 0; } simulavr-0.1.2.2/test_c/common.h0000644000175000001440000000243507727527670013402 00000000000000/* * $Id: common.h,v 1.1 2003/09/10 04:59:36 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003, Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #ifndef COMMON_H #define COMMON_H 1 /* This file provides code to ease transition from one avr device to another. */ #ifndef PC0 # define PC0 0 #endif #ifndef PC1 # define PC1 1 #endif #ifndef PC2 # define PC2 2 #endif #endif /* COMMON_H */ simulavr-0.1.2.2/test_c/demo.c0000644000175000001440000000070307727527670013025 00000000000000/* * $Id: demo.c,v 1.6 2003/09/10 04:59:36 troth Exp $ * * Counter from 0xff down to 0x00, output to leds ~cnt. */ #include #include #include #include "common.h" int main(void) { #if TEST_BIG_STR # include "big_str.h" #endif /* TEST_BIG_STR */ uint8_t cnt; DDRB = 0xff; /* enable port b for output */ for ( cnt=0xff; cnt > 0; cnt-- ) PORTB = cnt; return 0; } simulavr-0.1.2.2/test_c/demo_kr.c0000644000175000001440000000244407727527670013525 00000000000000/* * $Id: demo_kr.c,v 1.4 2003/09/10 04:59:36 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002, 2003 Ken Restivo * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* This simple program was contributed by Ken Restivo. */ #include #include "common.h" void debugTest( void ) { PORTC |= _BV(PC0); } int main( void ) { DDRC = (_BV(PC0) | _BV(PC1) | _BV(PC2)); debugTest(); return (0); } simulavr-0.1.2.2/test_c/timer.c0000644000175000001440000001034307754361075013215 00000000000000/* * $Id: timer.c,v 1.2 2003/11/12 07:33:17 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2003, Hermann Kraus * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ /* This test program has several functions: * - Testing interrupts in general. * - Testing the timer overflow and output compare match irqs. * - Showing how the timers work. * - Allowing the user to examine the "struct" and "array" debugging with * Simulavr * * But be careful: This is an example for testing purposes only. For real * programs it wastes too much flash. */ #include #include #include #include "common.h" typedef struct _TimerInfo TimerInfo; struct _TimerInfo { uint16_t overflow_count; uint16_t oc_match_count[3]; }; static TimerInfo timer[4]; static uint32_t cycle; SIGNAL(SIG_OVERFLOW0) { timer[0].overflow_count++; } SIGNAL(SIG_OVERFLOW1) { timer[1].overflow_count++; } SIGNAL(SIG_OVERFLOW2) { timer[2].overflow_count++; } SIGNAL(SIG_OVERFLOW3) { timer[4].overflow_count++; } SIGNAL(SIG_OUTPUT_COMPARE0) { timer[0].oc_match_count[0]++; } SIGNAL(SIG_OUTPUT_COMPARE1A) { timer[1].oc_match_count[0]++; } SIGNAL(SIG_OUTPUT_COMPARE1B) { timer[1].oc_match_count[1]++; } SIGNAL(SIG_OUTPUT_COMPARE1C) { timer[1].oc_match_count[2]++; } SIGNAL(SIG_OUTPUT_COMPARE2) { timer[2].oc_match_count[0]++; } SIGNAL(SIG_OUTPUT_COMPARE3A) { timer[3].oc_match_count[0]++; } SIGNAL(SIG_OUTPUT_COMPARE3B) { timer[3].oc_match_count[1]++; } SIGNAL(SIG_OUTPUT_COMPARE3C) { timer[3].oc_match_count[2]++; } void clear_structs (void) { uint8_t i, n; for (i=0; i<4; i++) { timer[i].overflow_count=0; for (n=0; n<3; n++) { timer[i].oc_match_count[n]=0; } } } int main (void) { /* Init the struct mem with zeros. */ clear_structs(); /* TODO: Add PWM test as PWM functionality is introduced in Simulavr. Start 8bit Timer/Counter 0 with prescaler 8. */ TCCR0 = _BV(CS01); /* Start 16bit Timer/Counter 1 w/o prescaler. */ TCCR1B = _BV(CS10); /* Start 8bit Timer/Counter 2 with prescaler 32. */ #if defined (TCCR2) TCCR2 = (_BV(CS20) | _BV(CS22)); #endif /* Start 16bit Timer/Counter 3 with prescaler 1024. This is not yet implemented in simulavr (as all extended registers). */ #if defined (TCCR3B) TCCR3B = (_BV(CS30) | _BV(CS31) | _BV(CS32)); #endif /* Now we set some OCR-Values. */ /* 8 bit */ #if defined(OCR0) OCR0 = 12; #endif #if defined(OCR2) OCR2 = 34; #endif /* 16 bit */ OCR1A = 1234; OCR1B = 2345; #if defined(OCR1C) OCR1C = 3456; #endif #if defined(OCR3A) OCR3A = 4567; #endif #if defined(OCR3B) OCR3B = 5678; #endif #if defined(OCR3C) OCR3C = 6789; #endif /* Enable overflow irqs for timers 0-3 and output compare irq for timer 0, 1a, 1b, 3b. */ TIMSK = ( _BV(TOIE0) | _BV(TOIE1) #if defined(TOIE2) | _BV(TOIE2) #endif #if defined(OCIE0) | _BV(OCIE0) #endif | _BV(OCIE1A) | _BV(OCIE1B) ); #if defined(ETIMSK) ETIMSK = ( _BV(TOIE3) | _BV(OCIE3B) ); #endif sei (); /* Enable irqs */ for (;;) { cycle++; /* Increase cycle counter */ } return (0); } simulavr-0.1.2.2/test_asm/0000777000175000001440000000000010204750217012332 500000000000000simulavr-0.1.2.2/test_asm/Makefile.am0000644000175000001440000000167007457357576014341 00000000000000# # $Id: Makefile.am,v 1.2 2002/04/17 20:47:58 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # MAINTAINERCLEANFILES = Makefile.in SUBDIRS = test_8515 simulavr-0.1.2.2/test_asm/Makefile.in0000644000175000001440000003543510204750206014323 00000000000000# Makefile.in generated by automake 1.8.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, # 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # # $Id: Makefile.am,v 1.2 2002/04/17 20:47:58 troth Exp $ # # simulavr - A simulator for the Atmel AVR family of microcontrollers. # Copyright (C) 2001, 2002 Theodore A. Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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Roth # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA # ## FIXME: This build file is crap! Need to move all the .asm files to .S and ## handle these in a sane way. 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to rebuild." -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) clean: clean-am clean-am: clean-generic clean-local mostlyclean-am distclean: distclean-am -rm -f Makefile distclean-am: clean-am distclean-generic dvi: dvi-am dvi-am: html: html-am info: info-am info-am: install-data-am: install-exec-am: install-info: install-info-am install-man: installcheck-am: maintainer-clean: maintainer-clean-am -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic mostlyclean: mostlyclean-am mostlyclean-am: mostlyclean-generic pdf: pdf-am pdf-am: ps: ps-am ps-am: uninstall-am: uninstall-info-am .PHONY: all all-am all-local check check-am clean clean-generic \ clean-local distclean distclean-generic distdir dvi dvi-am \ html html-am info info-am install install-am install-data \ install-data-am install-exec install-exec-am install-info \ install-info-am install-man install-strip installcheck \ installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-generic pdf \ pdf-am ps ps-am uninstall uninstall-am uninstall-info-am # If we're using gnumake, we can automate creation of the .lst, # .bin and .hex files. Otherwise, the user will have to do it # manually. @ifGNUmake@ TEST_ELF = $(TEST_ASM_SRC:.asm=.elf) @ifGNUmake@ TEST_LST = $(TEST_ASM_SRC:.asm=.lst) @ifGNUmake@ TEST_BIN = $(TEST_ASM_SRC:.asm=.bin) @ifGNUmake@ TEST_HEX = $(TEST_ASM_SRC:.asm=.hex) @ifGNUmake@ TEST_PRG = $(TEST_ASM_SRC:.asm=) all-local: $(TEST_ELF) $(TEST_LST) $(TEST_BIN) $(TEST_HEX) for prg in $(TEST_PRG); do \ $(AVR_LD) -m avr2 -o $$prg $${prg}.elf || exit 1; \ done clean-local: rm -rf $(TEST_PRG) .elf.hex: $(AVR_OBJCOPY) -O ihex $< $@ .elf.bin: $(AVR_OBJCOPY) -O binary $< $@ .elf.lst: $(AVR_OBJDUMP) -h -S -D --stabs --disassemble-zeroes $< > $@ .asm.elf: $(AVR_AS) --gstabs $(AVR_TARGET) $(INCLUDES) -o $@ $< #download: dl.hex # uisp -dprog=stk200 -dlpt=/dev/parport0 --erase # uisp -dprog=stk200 -dlpt=/dev/parport0 --upload if=dl.hex # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: simulavr-0.1.2.2/test_asm/test_8515/test_blink.asm0000644000175000001440000000312207415444447016564 00000000000000; ; $Id: test_blink.asm,v 1.3 2002/01/05 00:30:31 troth Exp $ ; ; Uses an at90s8515 to make the LEDS flicker ; ;.device AT90S8515 .include "8515def.inc" .equ delay, 16 .equ delay_hi, 17 .equ cntr, 18 .equ input, 19 rjmp MAIN ; reset nop ; int0 nop ; int1 nop ; timer1 capt nop ; timer1 compa nop ; timer1 compb nop ; timer1 ovf nop ; timer0 ovf nop ; spi, stc nop ; uart, rx nop ; uart, udre nop ; uart, tx nop ; ana_comp MAIN: ldi cntr,0xff ldi delay,0xff ; clear delay ldi delay_hi,0xff ; clear delay_hi out DDRB,cntr ; enable portb driver for output START: in input,PIND cpi input,0xff breq START LIGHTS: out PORTB,cntr ; output the contents of cntr to portb dec delay ; decrement delay cpi delay,0 ; compare delay with 0 brne LIGHTS ; branch to LIGHTS if delay <> 0 dec delay_hi ; decrement delay_hi cpi delay_hi,0 ; compare delay_hi with 0 brne LIGHTS ; branch to LIGHTS if delay_hi <> 0 dec cntr ; decrement cntr LOOP: rjmp LIGHTS ; go into an infinite loop simulavr-0.1.2.2/test_asm/test_8515/test_cntr.asm0000644000175000001440000000231507377022375016435 00000000000000; ; $Id: test_cntr.asm,v 1.1 2001/11/21 22:04:45 troth Exp $ ; ; Use simple opcodes to test the instruction decoder. ; ;;; .device AT90S8515 .include "8515def.inc" ;;; .cseg rjmp MAIN ; reset nop ; int0 nop ; int1 nop ; timer1 capt nop ; timer1 compa nop ; timer1 compb nop ; timer1 ovf nop ; timer0 ovf nop ; spi, stc nop ; uart, rx nop ; uart, udre nop ; uart, tx nop ; ana_comp MAIN: ;; init stack pointer to 0x025f (the last byte of int sram) ldi r16, 0x5f ; low byte of end of int sram out SPL, r16 ldi r16, 0x02 ; high byte of end of int sram out SPH, r16 ldi r16, 0xff ; initialize outer loop counter LOOP1: cpi r16, 0x00 breq DONE dec r16 rcall INNER rjmp LOOP1 INNER: ldi r17, 0xff ; initialize inner loop counter LOOP2: cpi r17, 0x00 breq REPEAT dec r17 rjmp LOOP2 REPEAT: ret DONE: nop simulavr-0.1.2.2/test_asm/test_8515/test_eeprom.asm0000644000175000001440000000451107362717331016753 00000000000000; ; $Id: test_eeprom.asm,v 1.1 2001/10/16 02:43:37 troth Exp $ ; ;;; Test writing to and reading from the eeprom memory space. .include "8515def.inc" rjmp MAIN ; reset nop ; int0 nop ; int1 nop ; timer1 capt nop ; timer1 compa nop ; timer1 compb nop ; timer1 ovf nop ; timer0 ovf nop ; spi, stc nop ; uart, rx nop ; uart, udre nop ; uart, tx nop ; ana_comp MAIN: ;; init stack pointer to 0x025f (the last byte of int sram) ldi r16, lo8(RAMEND); low byte of end of int sram out SPL, r16 ldi r16, hi8(RAMEND); high byte of end of int sram out SPH, r16 ;; write a byte to eeprom ldi r16, 0x00 ; set up low addr ldi r17, 0x00 ; set up high addr ldi r18, 0x55 ; set up the data rcall SUB_EE_WR ; call subroutine to write data ldi r18, 0x00 ; clear r18, so we'll know if we read back correctly ;; read a byte from eeprom rcall SUB_EE_RD mov r0, r18 ; move result from r18 to r0 ;; jmp to done rjmp DONE ;;; Subroutine for writing a byte to eeprom ;;; r16 -> EEARL ;;; r17 -> EEARH ;;; r18 -> data to be written SUB_EE_WR: sbic EECR, EEWE ; poll the EEWE bit to see if we can write rjmp SUB_EE_WR ; if EEWE is cleared, skip the rjmp out EEARL, r16 ; write low addr to EEARL out EEARH, r17 ; write high addr to EEARH out EEDR, r18 ; write data to EEDR sbi EECR, EEMWE ; write 1 to EEMWE sbi EECR, EEWE ; write 1 to EEWE WR_POLL: sbic EECR, EEWE ; poll the EEWE bit until write has completed rjmp WR_POLL ; rjmp is skipped once EEWE is cleared ret ; return from subroutine ;;; Subroutine for reading a byte from eeprom ;;; r16 -> EEARL ;;; r17 -> EEARH ;;; result is placed in r18 SUB_EE_RD: sbic EECR, EEWE ; poll the EEWE bit to see if we can write rjmp SUB_EE_WR ; if EEWE is cleared, skip the rjmp out EEARL, r16 ; write low addr to EEARL out EEARH, r17 ; write high addr to EEARH sbi EECR, EERE ; strobe the eeprom in r18, EEDR ; move data read from eedr to r18 ret DONE: nop simulavr-0.1.2.2/test_asm/test_8515/test_port.asm0000644000175000001440000000220307364636365016455 00000000000000; ; $Id: test_port.asm,v 1.2 2001/10/21 21:24:05 troth Exp $ ; ;;; Test basic functionality of reading and writing to ;;; the io ports. ; ;.device AT90S8515 .include "8515def.inc" .equ zero, 17 ; r17 preset with 0x00 .equ ones, 18 ; r18 preset with 0xff ;;; Interrupt Jump Table rjmp MAIN ; reset nop ; int0 nop ; int1 nop ; timer1 capt nop ; timer1 compa nop ; timer1 compb nop ; timer1 ovf nop ; timer0 ovf nop ; spi, stc nop ; uart, rx nop ; uart, udre nop ; uart, tx nop ; ana_comp MAIN: ;; preload zero and ones ldi zero, 0x00 ldi ones, 0xff ;; init portb for output out DDRB, ones out PORTB, zero ;; init portd for input out DDRD, zero LOOP1: in r16, PIND ; read from PORTD to R17 out PORTB, R16 ; write R16 to PORTB rjmp LOOP1 simulavr-0.1.2.2/test_asm/test_8515/test_stack.asm0000644000175000001440000000253707362630120016565 00000000000000; ; $Id: test_stack.asm,v 1.3 2001/10/15 18:52:00 troth Exp $ ; ; Test pushing 4 bytes onto the stack. When done, expect to see: ;; last 4 bytes of sram with 00, 01, 02, 03 ;; SPH, SPL with 0x02, 0x5b ;; SREG -> 0x02 ;.device AT90S8515 .include "8515def.inc" rjmp MAIN ; reset nop ; int0 nop ; int1 nop ; timer1 capt nop ; timer1 compa nop ; timer1 compb nop ; timer1 ovf nop ; timer0 ovf nop ; spi, stc nop ; uart, rx nop ; uart, udre nop ; uart, tx nop ; ana_comp MAIN: ;; init stack pointer to 0x025f (the last byte of int sram) ldi r16, lo8(RAMEND); low byte of end of int sram out SPL, r16 ldi r16, hi8(RAMEND); high byte of end of int sram out SPH, r16 ;; push 4 numbers onto the stack (use r16 as a counter) ldi r16, 0x03 PUSH_EM: push r16 ; push r16 onto the stack, should inc SP cpi r16, 0x00 ; compare r16 with $00, should set sreg breq PUSHED_ALL ; branch to end if sreg['Z'] == 1 dec r16 ; decrment r16 rjmp PUSH_EM ; repeat PUSHED_ALL: nop simulavr-0.1.2.2/test_asm/test_8515/test_toie0.asm0000644000175000001440000000420507762065062016505 00000000000000; ; $Id: test_toie0.asm,v 1.2 2003/11/29 09:43:14 troth Exp $ ; ;;; Test the Timer/Counter 0 overflow interrupt functionality. ;;; This test will stop the counter by setting the clock select ;;; value in TCCR0 to 0 (stop). .include "8515def.inc" .equ zero, 17 ; r17 preset with 0x00 .equ ones, 18 ; r18 preset with 0xff .equ disp, 19 ; r19 is output display ;;; Interrupt Jump Table rjmp MAIN ; reset nop ; int0 nop ; int1 nop ; timer1 capt nop ; timer1 compa nop ; timer1 compb nop ; timer1 ovf rjmp TIMER_OVF ; timer0 ovf nop ; spi, stc nop ; uart, rx nop ; uart, udre nop ; uart, tx nop ; ana_comp TIMER_OVF: ;; Toggle the leds on Port B so we know that the interrupt ;; occured and was handled. out PORTB, disp ; set the leds dec disp ; decrement the display counter ;; if disp has counted down to 0, stop the counter via TCCR, ;; but leave the interrupt enabled brne OVF_RETURN ; skip to reti if disp is not zero ldi r20, 0x00 out TCCR0, r20 ; set clock select to 0x00 (stop) OVF_RETURN: reti ; return from interrupt MAIN: ;; init stack pointer to 0x025f (the last byte of int sram) ldi r16, lo8(RAMEND); low byte of end of int sram out SPL, r16 ldi r16, hi8(RAMEND); high byte of end of int sram out SPH, r16 ;; preload zero and ones ldi zero, 0x00 ldi ones, 0xff ldi disp, 0xff ;; init portb for output out DDRB, ones out PORTB, disp ;; Set the clock select for Timer0 to CK/256 ldi r20, 0x04 ; CS[2,1,0] = [1,0,0] out TCCR0, r20 ; write to Timer/Counter Control Register 0 ;; Enable the Timer0 Overflow interrupt ldi r20, 1<= 5.3 Prereq: info %description Simulavr is a simulator for the Atmel AVR family of microcontrollers. Simulavr can be used either standalone or as a remote target for gdb. When used as a remote target for gdb, the simulator is used as a backend to gdb such that gdb can be used as a source level debugger. ## The simulavr-docs subpackage %package docs Summary: Documentation for Simulavr. Group: Documentation %description docs Documentation for simulavr in html, postscript and pdf formats. %prep %setup -q %build export CFLAGS="$RPM_OPT_FLAGS -fomit-frame-pointer -finline-functions -Wall" ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man \ --infodir=/usr/share/info --disable-tests --enable-ps make %install rm -rf $RPM_BUILD_ROOT %makeinstall infodir=$RPM_BUILD_ROOT%{_infodir} \ prefix=$RPM_BUILD_ROOT%{_prefix} rm -f $RPM_BUILD_ROOT%{_infodir}/dir %clean rm -rf $RPM_BUILD_ROOT %post [ -f %{_infodir}/simulavr.info ] && \ /sbin/install-info %{_infodir}/simulavr.info %{_infodir}/dir || : [ -f %{_infodir}/simulavr.info.gz ] && \ /sbin/install-info %{_infodir}/simulavr.info.gz %{_infodir}/dir || : %preun if [ $1 = 0 ]; then [ -f %{_infodir}/avr-gdb.info ] && \ /sbin/install-info --delete %{_infodir}/simulavr.info %{_infodir}/dir || : [ -f %{_infodir}/avr-gdb.info.gz ] && \ /sbin/install-info --delete %{_infodir}/simulavr.info.gz %{_infodir}/dir || : fi %files %defattr(-,root,root) /usr/bin/* %{_mandir}/man1/simulavr* %{_infodir}/*info* %doc AUTHORS ChangeLog COPYING INSTALL ProjSummary %doc README README.gdb README.opcodes TODO %files docs %doc doc/html/*.html %doc doc/internals_html/*.html %doc doc/simulavr.ps #%doc doc/simulavr.pdf %doc doc/simulavr-internals.ps #%doc doc/simulavr-internals.pdf %changelog * Wed Aug 27 2003 Theodore A. Roth - Fix broken rpmbuild on RedHat-9. * Fri Jun 20 2003 Theodore A. Roth - Bump avr-gdb requirement to 5.3. * Sat Oct 12 2002 Theodore A. Roth - Add man pages. * Thu Sep 05 2002 Theodore A. Roth - Require gdb-5.2.1. - Don't build pdf dox. * Sun Feb 10 2002 Theodore A. Roth - Moved documentation into simulavr-docs subpackage. * Thu Feb 07 2002 Theodore A. Roth - Initial spec file.